From dc07c9e1100b7fd1fbd15cb16802c99f8b8d1f09 Mon Sep 17 00:00:00 2001
From: Ivan Grokhotkov <ivan@espressif.com>
Date: Thu, 16 Jun 2022 15:28:21 +0200
Subject: [PATCH] esp_system: fix garbled UART output on startup on esp32s2

Closes https://github.com/espressif/esp-idf/issues/9168
---
 components/esp32s2/clk.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/components/esp32s2/clk.c b/components/esp32s2/clk.c
index 760f1a7ed6..ffaac937e6 100644
--- a/components/esp32s2/clk.c
+++ b/components/esp32s2/clk.c
@@ -82,6 +82,12 @@ void esp_clk_init(void)
     RESET_REASON rst_reas;
     rst_reas = rtc_get_reset_reason(0);
     if (rst_reas == POWERON_RESET) {
+        /* Ocode calibration will switch to XTAL frequency, need to wait for UART FIFO
+         * to be empty, to avoid garbled output.
+         */
+        if (CONFIG_ESP_CONSOLE_UART_NUM >= 0) {
+            uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
+        }
         cfg.cali_ocode = 1;
     }
     rtc_init(cfg);