From e383616503720876a9cfe8c002c9d2b7fd188e69 Mon Sep 17 00:00:00 2001 From: "harshal.patil" Date: Fri, 29 Mar 2024 12:02:55 +0530 Subject: [PATCH] fix(mbedtls/aes): Fix incorrect dma alignment size --- components/mbedtls/port/aes/dma/esp_aes_dma_core.c | 3 +-- components/mbedtls/port/include/esp_crypto_dma.h | 11 +++++++---- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/components/mbedtls/port/aes/dma/esp_aes_dma_core.c b/components/mbedtls/port/aes/dma/esp_aes_dma_core.c index 728bd0ea6c..cc64191490 100644 --- a/components/mbedtls/port/aes/dma/esp_aes_dma_core.c +++ b/components/mbedtls/port/aes/dma/esp_aes_dma_core.c @@ -278,9 +278,8 @@ static inline void *aes_dma_calloc(size_t num, size_t size, uint32_t caps, size_ void *ptr = NULL; esp_dma_mem_info_t dma_mem_info = { .extra_heap_caps = caps, - .dma_alignment_bytes = 4, + .dma_alignment_bytes = DMA_DESC_MEM_ALIGN_SIZE, }; - //TODO: IDF-9638 esp_dma_capable_calloc(num, size, &dma_mem_info, &ptr, actual_size); return ptr; } diff --git a/components/mbedtls/port/include/esp_crypto_dma.h b/components/mbedtls/port/include/esp_crypto_dma.h index 03cbf84ccd..f273cbd31a 100644 --- a/components/mbedtls/port/include/esp_crypto_dma.h +++ b/components/mbedtls/port/include/esp_crypto_dma.h @@ -7,9 +7,12 @@ #pragma once #include "hal/dma_types.h" -#include "soc/gdma_channel.h" #include "soc/soc_caps.h" +#if SOC_GDMA_SUPPORTED +#include "soc/gdma_channel.h" +#include "hal/gdma_ll.h" +#endif /* SOC_GDMA_SUPPORTED */ #ifdef __cplusplus extern "C" @@ -22,17 +25,17 @@ extern "C" #if (SOC_AES_GDMA) || (SOC_SHA_GDMA) #if (SOC_GDMA_TRIG_PERIPH_AES0_BUS == SOC_GDMA_BUS_AHB) || (SOC_GDMA_TRIG_PERIPH_SHA0_BUS == SOC_GDMA_BUS_AHB) -#define DMA_DESC_MEM_ALIGN_SIZE 4 +#define DMA_DESC_MEM_ALIGN_SIZE GDMA_LL_AHB_DESC_ALIGNMENT typedef dma_descriptor_align4_t crypto_dma_desc_t; #elif (SOC_GDMA_TRIG_PERIPH_AES0_BUS == SOC_GDMA_BUS_AXI) || (SOC_GDMA_TRIG_PERIPH_SHA0_BUS == SOC_GDMA_BUS_AXI) -#define DMA_DESC_MEM_ALIGN_SIZE 8 +#define DMA_DESC_MEM_ALIGN_SIZE GDMA_LL_AXI_DESC_ALIGNMENT typedef dma_descriptor_align8_t crypto_dma_desc_t; #else #error "As we support a shared crypto GDMA layer for the AES and the SHA peripheral, both the peripherals must use the same GDMA bus" #endif /* (SOC_GDMA_TRIG_PERIPH_AES0_BUS == SOC_GDMA_BUS_AHB) || (SOC_GDMA_TRIG_PERIPH_AES0_BUS == SOC_GDMA_BUS_AHB) */ #elif (SOC_AES_CRYPTO_DMA) || (SOC_SHA_CRYPTO_DMA) -#define DMA_DESC_MEM_ALIGN_SIZE 4 +#define DMA_DESC_MEM_ALIGN_SIZE GDMA_LL_AHB_DESC_ALIGNMENT typedef dma_descriptor_align4_t crypto_dma_desc_t; #endif /* (SOC_AES_GDMA) && (SOC_SHA_GDMA) */