diff --git a/components/esp_system/port/arch/riscv/debug_helpers.c b/components/esp_system/port/arch/riscv/debug_helpers.c
index 6b27451306..38eccc8a13 100644
--- a/components/esp_system/port/arch/riscv/debug_helpers.c
+++ b/components/esp_system/port/arch/riscv/debug_helpers.c
@@ -17,12 +17,14 @@
 
 #if CONFIG_ESP_SYSTEM_USE_EH_FRAME
 #include "esp_private/eh_frame_parser.h"
-#endif // CONFIG_ESP_SYSTEM_USE_EH_FRAME
 
-#if !CONFIG_ESP_SYSTEM_USE_EH_FRAME
+#elif CONFIG_ESP_SYSTEM_USE_FRAME_POINTER
+extern void esp_fp_print_backtrace(const void*);
+
+#else // !CONFIG_ESP_SYSTEM_USE_EH_FRAME && !
 /* Function used to print all the registers pointed by the given frame .*/
 extern void panic_print_registers(const void *frame, int core);
-#endif // !CONFIG_ESP_SYSTEM_USE_EH_FRAME
+#endif // CONFIG_ESP_SYSTEM_USE_EH_FRAME
 
 /* Targets based on a RISC-V CPU cannot perform backtracing that easily.
     * We have two options here:
@@ -54,10 +56,10 @@ esp_err_t IRAM_ATTR esp_backtrace_print(int depth)
     memcpy(&backtrace_frame, frame, sizeof(esp_cpu_frame_t));
 
 #if CONFIG_ESP_SYSTEM_USE_EH_FRAME
-    esp_rom_printf("esp_backtrace_print: Print CPU %d (current core) backtrace\n", current_core);
     esp_eh_frame_print_backtrace(frame);
+#elif CONFIG_ESP_SYSTEM_USE_FRAME_POINTER
+    esp_fp_print_backtrace(frame);
 #else // CONFIG_ESP_SYSTEM_USE_EH_FRAME
-    esp_rom_printf("esp_backtrace_print: Print CPU %d (current core) registers\n", current_core);
     panic_prepare_frame_from_ctx(&backtrace_frame);
 
     panic_print_registers(&backtrace_frame, current_core);
diff --git a/components/esp_system/task_wdt/task_wdt.c b/components/esp_system/task_wdt/task_wdt.c
index 0541164a14..4b374c467d 100644
--- a/components/esp_system/task_wdt/task_wdt.c
+++ b/components/esp_system/task_wdt/task_wdt.c
@@ -29,14 +29,12 @@
 #include "riscv/rvruntime-frames.h"
 #endif //CONFIG_IDF_TARGET_ARCH_RISCV
 
-#if CONFIG_ESP_SYSTEM_USE_EH_FRAME
-#include "esp_private/eh_frame_parser.h"
-#endif // CONFIG_ESP_SYSTEM_USE_EH_FRAME
-
-#if CONFIG_IDF_TARGET_ARCH_RISCV && !CONFIG_ESP_SYSTEM_USE_EH_FRAME
-/* Function used to print all the registers pointed by the given frame .*/
-extern void panic_print_registers(const void *frame, int core);
-#endif // CONFIG_IDF_TARGET_ARCH_RISCV && !CONFIG_ESP_SYSTEM_USE_EH_FRAME
+#if CONFIG_ESP_SYSTEM_NO_BACKTRACE
+/* If the target doesn't support backtrace, we will show CPU registers*/
+#define BACKTRACE_MSG   "registers"
+#else // !CONFIG_ESP_SYSTEM_NO_BACKTRACE
+#define BACKTRACE_MSG   "backtrace"
+#endif
 
 /* We will use this function in order to simulate an `abort()` occurring in
  * a different context than the one it's called from. */
@@ -390,13 +388,11 @@ void task_wdt_timeout_abort(bool current_core)
     g_twdt_isr = true;
     void *frame = (void *) snapshot.pxTopOfStack;
 
-#if CONFIG_ESP_SYSTEM_USE_EH_FRAME | CONFIG_IDF_TARGET_ARCH_XTENSA
     if (current_core) {
-        ESP_EARLY_LOGE(TAG, "Print CPU %d (current core) backtrace", xPortGetCoreID());
+        ESP_EARLY_LOGE(TAG, "Print CPU %d (current core) " BACKTRACE_MSG, xPortGetCoreID());
     } else {
-        ESP_EARLY_LOGE(TAG, "Print CPU %d backtrace", xPortGetCoreID());
+        ESP_EARLY_LOGE(TAG, "Print CPU %d " BACKTRACE_MSG, xPortGetCoreID());
     }
-#endif
 
     xt_unhandled_exception(frame);
 }
@@ -412,7 +408,7 @@ static void task_wdt_timeout_handling(int cores_fail, bool panic)
         if ((cores_fail & BIT(0)) && (cores_fail & BIT(1))) {
             /* In the case where both CPUs have failing tasks, print the current CPU backtrace and then let the
              * other core fail. */
-            ESP_EARLY_LOGE(TAG, "Print CPU %d (current core) backtrace", current_core);
+            ESP_EARLY_LOGE(TAG, "Print CPU %d (current core) " BACKTRACE_MSG, current_core);
             esp_backtrace_print(100);
             /* TODO: the interrupt we send should have the highest priority */
             esp_crosscore_int_send_twdt_abort(other_core);
@@ -430,13 +426,13 @@ static void task_wdt_timeout_handling(int cores_fail, bool panic)
     } else {
         /* Print backtrace of the core that failed to reset the watchdog */
         if (cores_fail & BIT(current_core)) {
-            ESP_EARLY_LOGE(TAG, "Print CPU %d (current core) backtrace", current_core);
+            ESP_EARLY_LOGE(TAG, "Print CPU %d (current core) " BACKTRACE_MSG, current_core);
             esp_backtrace_print(100);
         }
 #if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
         const int other_core = !current_core;
         if (cores_fail & BIT(other_core)) {
-            ESP_EARLY_LOGE(TAG, "Print CPU %d backtrace", other_core);
+            ESP_EARLY_LOGE(TAG, "Print CPU %d " BACKTRACE_MSG, other_core);
             esp_crosscore_int_send_print_backtrace(other_core);
         }
 #endif // !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE