ci: add access psram with DFS unity test

components/esp_hw_support/test_apps/mspi/main/test_flash_psram.c

@@ -10,11 +10,14 @@
 #include "sdkconfig.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
+#include "freertos/semphr.h"
 #include "esp_system.h"
 #include "esp_check.h"
 #include "esp_attr.h"
 #include "esp_flash.h"
 #include "esp_partition.h"
+#include "esp_pm.h"
+#include "esp_private/esp_clk.h"
 #if CONFIG_IDF_TARGET_ESP32S3
 #include "esp32s3/rom/spi_flash.h"
 #include "esp32s3/rom/opi_flash.h"
@@ -32,9 +35,17 @@
 #define LENGTH_PER_TIME        1024
 #endif
 
-TEST_CASE("MSPI: Test_SPI0_PSRAM", "[mspi]")
+#define MHZ (1000000)
+#ifndef MIN
+#define MIN(x, y) (((x) < (y)) ? (x) : (y))
+#endif
+
+static SemaphoreHandle_t DoneSemphr;
+static SemaphoreHandle_t StopSemphr;
+
+static void psram_read_write_task(void* arg)
 {
-    printf("----------SPI0 PSRAM Test----------\n");
+    printf("----------SPI0 PSRAM Access Test----------\n");
 
     uint8_t *psram_wr_buf = (uint8_t *)heap_caps_malloc(LENGTH_PER_TIME, MALLOC_CAP_32BIT | MALLOC_CAP_SPIRAM);
     if (!psram_wr_buf) {
@@ -42,28 +53,143 @@ TEST_CASE("MSPI: Test_SPI0_PSRAM", "[mspi]")
         abort();
     }
 
-    uint32_t *psram_rd_buf = (uint32_t *)heap_caps_malloc(SPI0_PSRAM_TEST_LEN, MALLOC_CAP_32BIT | MALLOC_CAP_SPIRAM);
+    uint8_t *psram_rd_buf = (uint8_t *)heap_caps_malloc(SPI0_PSRAM_TEST_LEN, MALLOC_CAP_32BIT | MALLOC_CAP_SPIRAM);
     if (!psram_rd_buf) {
         printf("no memory\n");
         abort();
     }
 
     srand(399);
-    for (int i = 0; i < SPI0_PSRAM_TEST_LEN / LENGTH_PER_TIME; i++) {
+    for (uint32_t loop = 0; loop < (uint32_t)(arg); loop++) {
-        for (int j = 0; j < sizeof(psram_wr_buf); j++) {
+        for (int i = 0; i < SPI0_PSRAM_TEST_LEN / LENGTH_PER_TIME; i++) {
-            psram_wr_buf[j] = rand();
+            for (int j = 0; j < sizeof(psram_wr_buf); j++) {
-        }
+                psram_wr_buf[j] = rand();
-        memcpy(psram_rd_buf + i * LENGTH_PER_TIME, psram_wr_buf, LENGTH_PER_TIME);
+            }
+            memcpy(psram_rd_buf + i * LENGTH_PER_TIME, psram_wr_buf, LENGTH_PER_TIME);
 
-        if (memcmp(psram_rd_buf + i * LENGTH_PER_TIME, psram_wr_buf, LENGTH_PER_TIME) != 0) {
+            if (memcmp(psram_rd_buf + i * LENGTH_PER_TIME, psram_wr_buf, LENGTH_PER_TIME) != 0) {
-            free(psram_rd_buf);
+                free(psram_rd_buf);
-            free(psram_wr_buf);
+                free(psram_wr_buf);
-            TEST_FAIL_MESSAGE("SPI0 PSRAM Test Fail");
+                TEST_FAIL_MESSAGE("SPI0 PSRAM Test Fail");
+            }
         }
+        xSemaphoreGive(DoneSemphr);
+        vTaskDelay(10);
     }
     free(psram_rd_buf);
     free(psram_wr_buf);
-    printf(DRAM_STR("----------SPI0 PSRAM Test Success----------\n\n"));
+    vTaskDelete(NULL);
+}
+
+static void pm_light_sleep_enable(void)
+{
+    int cur_freq_mhz = esp_clk_cpu_freq() / MHZ;
+    int xtal_freq = esp_clk_xtal_freq() / MHZ;
+
+    esp_pm_config_t pm_config = {
+        .max_freq_mhz = cur_freq_mhz,
+        .min_freq_mhz = xtal_freq,
+        .light_sleep_enable = true
+    };
+    TEST_ESP_OK( esp_pm_configure(&pm_config) );
+}
+
+static void pm_light_sleep_disable(void)
+{
+    int cur_freq_mhz = esp_clk_cpu_freq() / MHZ;
+
+    esp_pm_config_t pm_config = {
+        .max_freq_mhz = cur_freq_mhz,
+        .min_freq_mhz = cur_freq_mhz,
+    };
+    TEST_ESP_OK( esp_pm_configure(&pm_config) );
+}
+
+static void pm_switch_freq(int max_cpu_freq_mhz)
+{
+    int xtal_freq_mhz = esp_clk_xtal_freq() / MHZ;
+
+    esp_pm_config_t pm_config = {
+        .max_freq_mhz = max_cpu_freq_mhz,
+        .min_freq_mhz = MIN(max_cpu_freq_mhz, xtal_freq_mhz),
+    };
+    TEST_ESP_OK( esp_pm_configure(&pm_config) );
+    printf("Waiting for frequency to be set to %d MHz...\n", max_cpu_freq_mhz);
+    while (esp_clk_cpu_freq() / MHZ != max_cpu_freq_mhz)
+    {
+        vTaskDelay(pdMS_TO_TICKS(200));
+        printf("Frequency is %d MHz\n", esp_clk_cpu_freq() / MHZ);
+    }
+}
+
+static void goto_idle_and_check_stop(uint32_t period)
+{
+    if (xSemaphoreTake(StopSemphr, pdMS_TO_TICKS(period)) == pdTRUE) {
+        pm_switch_freq(CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ);
+        vSemaphoreDelete(StopSemphr);
+        vTaskDelete(NULL);
+    }
+}
+
+static void pm_switch_task(void *arg)
+{
+    pm_light_sleep_disable();
+    uint32_t period = 100;
+    StopSemphr = xSemaphoreCreateBinary();
+    while (1) {
+        pm_light_sleep_enable();
+        goto_idle_and_check_stop(period);
+        pm_light_sleep_disable();
+        goto_idle_and_check_stop(period);
+        pm_switch_freq(10);
+        goto_idle_and_check_stop(period);
+        pm_switch_freq(80);
+        goto_idle_and_check_stop(period);
+        pm_switch_freq(40);
+        goto_idle_and_check_stop(period);
+    }
+}
+
+TEST_CASE("MSPI: Test_SPI0_PSRAM", "[mspi]")
+{
+    DoneSemphr = xSemaphoreCreateCounting(1, 0);
+    xTaskCreate(psram_read_write_task, "", 2048, (void *)(1), 3, NULL);
+    if (xSemaphoreTake(DoneSemphr, pdMS_TO_TICKS(100)) == pdTRUE) {
+        printf(DRAM_STR("----------SPI0 PSRAM Test Success----------\n\n"));
+    } else {
+        TEST_FAIL_MESSAGE(DRAM_STR("SPI0 PSRAM Test Timeout"));
+    }
+
+    vSemaphoreDelete(DoneSemphr);
+    /* Wait for test_task to finish up */
+    vTaskDelay(100);
+}
+
+
+TEST_CASE("MSPI: Test_SPI0_PSRAM with DFS", "[mspi]")
+{
+    printf("----------Access SPI0 PSRAM with DFS Test----------\n");
+
+    uint32_t test_loop = 50;
+    DoneSemphr = xSemaphoreCreateCounting(test_loop, 0);
+
+    xTaskCreatePinnedToCore(pm_switch_task, "", 4096, NULL, 3, NULL, 0);
+    xTaskCreatePinnedToCore(psram_read_write_task, "", 2048, (void *)(test_loop), 3, NULL, 1);
+
+    int cnt = 0;
+    while (cnt < test_loop) {
+        if (xSemaphoreTake(DoneSemphr, pdMS_TO_TICKS(1000)) == pdTRUE) {
+            cnt++;
+        } else {
+            vSemaphoreDelete(DoneSemphr);
+            TEST_FAIL_MESSAGE(DRAM_STR("SPI0 PSRAM Test Timeout"));
+        }
+    }
+    xSemaphoreGive(StopSemphr);
+    vSemaphoreDelete(DoneSemphr);
+    /* Wait for test_task to finish up */
+    vTaskDelay(pdMS_TO_TICKS(500));
+    printf(DRAM_STR("----------Access SPI0 PSRAM with DFS Test Success----------\n\n"));
 }
 #endif
 

components/esp_hw_support/test_apps/mspi/sdkconfig.defaults

@@ -4,3 +4,10 @@ CONFIG_ESP_TASK_WDT_EN=n
 CONFIG_PARTITION_TABLE_CUSTOM=y
 CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
 CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
+
+# For test access psram with DFS enabled
+CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
+CONFIG_SPIRAM_RODATA=y
+CONFIG_PM_ENABLE=y
+CONFIG_FREERTOS_USE_TICKLESS_IDLE=y
+CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP=5