diff --git a/components/esp_rom/CMakeLists.txt b/components/esp_rom/CMakeLists.txt
index 3b05e51d59..859ebcd58a 100644
--- a/components/esp_rom/CMakeLists.txt
+++ b/components/esp_rom/CMakeLists.txt
@@ -69,7 +69,9 @@ if(CONFIG_HAL_WDT_USE_ROM_IMPL)
     list(APPEND sources "patches/esp_rom_wdt.c")
 endif()
 
-
+if(CONFIG_ESP_ROM_CLIC_INT_TYPE_PATCH)
+    list(APPEND sources "patches/esp_rom_clic.c")
+endif()
 
 if(CONFIG_ESP_ROM_HAS_FLASH_COUNT_PAGES_BUG OR CONFIG_ESP_ROM_HAS_CACHE_WRITEBACK_BUG)
     list(APPEND sources "patches/esp_rom_cache_esp32s2_esp32s3.c")
diff --git a/components/esp_rom/esp32p4/Kconfig.soc_caps.in b/components/esp_rom/esp32p4/Kconfig.soc_caps.in
index 0218335e2c..af5b84d707 100644
--- a/components/esp_rom/esp32p4/Kconfig.soc_caps.in
+++ b/components/esp_rom/esp32p4/Kconfig.soc_caps.in
@@ -70,3 +70,7 @@ config ESP_ROM_HAS_NEWLIB_NANO_FORMAT
 config ESP_ROM_HAS_VERSION
     bool
     default y
+
+config ESP_ROM_CLIC_INT_TYPE_PATCH
+    bool
+    default y
diff --git a/components/esp_rom/esp32p4/esp_rom_caps.h b/components/esp_rom/esp32p4/esp_rom_caps.h
index 37374fea50..f0c1d32bb3 100644
--- a/components/esp_rom/esp32p4/esp_rom_caps.h
+++ b/components/esp_rom/esp32p4/esp_rom_caps.h
@@ -23,3 +23,4 @@
 #define ESP_ROM_HAS_NEWLIB                  (1) // ROM has newlib (at least parts of it) functions included
 #define ESP_ROM_HAS_NEWLIB_NANO_FORMAT      (1) // ROM has the newlib nano version of formatting functions
 #define ESP_ROM_HAS_VERSION                 (1) // ROM has version/eco information
+#define ESP_ROM_CLIC_INT_TYPE_PATCH         (1) // ROM api esprv_intc_int_set_type configuring edge type interrupt is invalid
diff --git a/components/esp_rom/esp32p4/ld/esp32p4.rom.ld b/components/esp_rom/esp32p4/ld/esp32p4.rom.ld
index 20f1520e97..6b8f14bf60 100644
--- a/components/esp_rom/esp32p4/ld/esp32p4.rom.ld
+++ b/components/esp_rom/esp32p4/ld/esp32p4.rom.ld
@@ -328,7 +328,6 @@ esprv_intc_int_set_priority = 0x4fc005b8;
 esprv_intc_int_set_threshold = 0x4fc005bc;
 esprv_intc_int_enable = 0x4fc005c0;
 esprv_intc_int_disable = 0x4fc005c4;
-esprv_intc_int_set_type = 0x4fc005c8;
 PROVIDE( intr_handler_set = 0x4fc005cc );
 intr_matrix_set = 0x4fc005d0;
 ets_intr_lock = 0x4fc005d4;
diff --git a/components/esp_rom/patches/esp_rom_clic.c b/components/esp_rom/patches/esp_rom_clic.c
new file mode 100644
index 0000000000..d4643e3ef5
--- /dev/null
+++ b/components/esp_rom/patches/esp_rom_clic.c
@@ -0,0 +1,22 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "esp_rom_caps.h"
+#include "soc/clic_reg.h"
+#include "riscv/interrupt.h"
+
+#if ESP_ROM_CLIC_INT_TYPE_PATCH
+
+/* Rom api esprv_intc_int_set_type, if the configured interrupt type is INTR_TYPE_EDGE,
+ * the actual configured type is still INTR_TYPE_LEVEL. So the patch is to solve this issue.
+ * Since esprv_intc_int_set_type has an alias defined as esprv_int_set_type in riscv/ld/rom.api.ld,
+ * therefore, use esprv_int_set_type to override the rom function.
+ */
+void esprv_int_set_type(int rv_int_num, enum intr_type type)
+{
+    REG_SET_FIELD(CLIC_INT_CTRL_REG(rv_int_num + CLIC_EXT_INTR_NUM_OFFSET), CLIC_INT_ATTR_TRIG, type);
+}
+#endif