diff --git a/components/esp_mm/esp_cache.c b/components/esp_mm/esp_cache.c
index f1c409d75b..c379ebeb20 100644
--- a/components/esp_mm/esp_cache.c
+++ b/components/esp_mm/esp_cache.c
@@ -59,6 +59,10 @@ esp_err_t esp_cache_msync(void *addr, size_t size, int flags)
     if (flags & ESP_CACHE_MSYNC_FLAG_DIR_M2C) {
         ESP_EARLY_LOGV(TAG, "M2C DIR");
 
+        if (flags & ESP_CACHE_MSYNC_FLAG_UNALIGNED) {
+            ESP_RETURN_ON_FALSE_ISR(false, ESP_ERR_INVALID_ARG, TAG, "M2C direction doesn't allow ESP_CACHE_MSYNC_FLAG_UNALIGNED");
+        }
+
         esp_os_enter_critical_safe(&s_spinlock);
         //Add preload feature / flag here, IDF-7800
         valid = cache_hal_invalidate_addr(vaddr, size);
diff --git a/components/esp_mm/test_apps/mm/main/test_cache_msync.c b/components/esp_mm/test_apps/mm/main/test_cache_msync.c
index 8b4c2200dd..deffc6e051 100644
--- a/components/esp_mm/test_apps/mm/main/test_cache_msync.c
+++ b/components/esp_mm/test_apps/mm/main/test_cache_msync.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -202,3 +202,8 @@ TEST_CASE("test cache msync work with PSRAM stack", "[cache]")
     free(stack_for_task);
 }
 #endif  //#if CONFIG_SPIRAM
+
+TEST_CASE("test cache msync unaligned flag not work with M2C direction", "[cache]")
+{
+    TEST_ASSERT(esp_cache_msync((void *)TEST_SYNC_START, 0x8000, ESP_CACHE_MSYNC_FLAG_UNALIGNED | ESP_CACHE_MSYNC_FLAG_DIR_M2C) == ESP_ERR_INVALID_ARG);
+}
diff --git a/components/mbedtls/port/aes/dma/esp_aes_dma_core.c b/components/mbedtls/port/aes/dma/esp_aes_dma_core.c
index 0aaa0737e1..c015fef781 100644
--- a/components/mbedtls/port/aes/dma/esp_aes_dma_core.c
+++ b/components/mbedtls/port/aes/dma/esp_aes_dma_core.c
@@ -364,7 +364,7 @@ static esp_err_t generate_descriptor_list(const uint8_t *buffer, const size_t le
         aligned_block_bytes = 0;
     }
 
-    size_t max_desc_size = (is_output) ? DMA_DESCRIPTOR_BUFFER_MAX_SIZE_16B_ALIGNED : DMA_DESCRIPTOR_BUFFER_MAX_SIZE_4B_ALIGNED;
+    size_t max_desc_size = (is_output) ? ALIGN_DOWN(DMA_DESCRIPTOR_BUFFER_MAX_SIZE_16B_ALIGNED, cache_line_size) : ALIGN_DOWN(DMA_DESCRIPTOR_BUFFER_MAX_SIZE_4B_ALIGNED, cache_line_size);
 
     dma_descs_needed = (unaligned_start_bytes ? 1 : 0) + dma_desc_get_required_num(aligned_block_bytes, max_desc_size) + (unaligned_end_bytes ? 1 : 0);
 
@@ -389,7 +389,7 @@ static esp_err_t generate_descriptor_list(const uint8_t *buffer, const size_t le
         memset(start_alignment_stream_buffer + unaligned_start_bytes, 0, alignment_buffer_size - unaligned_start_bytes);
 
         // add start alignment node to the DMA linked list
-        dma_desc_populate(dma_descriptors, start_alignment_stream_buffer, unaligned_start_bytes, DMA_DESCRIPTOR_BUFFER_MAX_SIZE_4B_ALIGNED, populated_dma_descs);
+        dma_desc_populate(dma_descriptors, start_alignment_stream_buffer, unaligned_start_bytes, max_desc_size, populated_dma_descs);
         populated_dma_descs += (unaligned_start_bytes ? 1 : 0);
     }
 
@@ -411,7 +411,7 @@ static esp_err_t generate_descriptor_list(const uint8_t *buffer, const size_t le
         memset(end_alignment_stream_buffer + unaligned_end_bytes, 0, alignment_buffer_size - unaligned_end_bytes);
 
         // add end alignment node to the DMA linked list
-        dma_desc_populate(dma_descriptors, end_alignment_stream_buffer, unaligned_end_bytes, DMA_DESCRIPTOR_BUFFER_MAX_SIZE_4B_ALIGNED, populated_dma_descs);
+        dma_desc_populate(dma_descriptors, end_alignment_stream_buffer, unaligned_end_bytes, max_desc_size, populated_dma_descs);
         populated_dma_descs += (unaligned_end_bytes ? 1 : 0);
     }
 
@@ -552,7 +552,7 @@ int esp_aes_process_dma(esp_aes_context *ctx, const unsigned char *input, unsign
         goto cleanup;
     }
     for (int i = 0; i < output_dma_desc_num; i++) {
-        if (esp_cache_msync(output_desc[i].buffer, output_desc[i].dw0.length, ESP_CACHE_MSYNC_FLAG_DIR_M2C | ESP_CACHE_MSYNC_FLAG_UNALIGNED) != ESP_OK) {
+        if (esp_cache_msync(output_desc[i].buffer, ALIGN_UP(output_desc[i].dw0.length, output_cache_line_size), ESP_CACHE_MSYNC_FLAG_DIR_M2C) != ESP_OK) {
             ESP_LOGE(TAG, "Output DMA descriptor buffers cache sync M2C failed");
             ret = -1;
             goto cleanup;
@@ -830,7 +830,7 @@ int esp_aes_process_dma(esp_aes_context *ctx, const unsigned char *input, unsign
 #if (CONFIG_SPIRAM && SOC_PSRAM_DMA_CAPABLE)
     if (block_bytes > 0) {
         if (esp_ptr_external_ram(output)) {
-            if(esp_cache_msync((void*)output, block_bytes, ESP_CACHE_MSYNC_FLAG_DIR_M2C | ESP_CACHE_MSYNC_FLAG_UNALIGNED) != ESP_OK) {
+            if(esp_cache_msync((void*)output, block_bytes, ESP_CACHE_MSYNC_FLAG_DIR_M2C) != ESP_OK) {
                 mbedtls_platform_zeroize(output, len);
                 ESP_LOGE(TAG, "Cache sync failed for the output in external RAM");
                 return -1;