From f895c6d414f17e70b96996e7d476728a7994a209 Mon Sep 17 00:00:00 2001 From: Cao Sen Miao Date: Wed, 6 Sep 2023 19:40:52 +0800 Subject: [PATCH] ci(spi_flash): Add flash test for 26MHZ XTAL on ESP32C2 --- .../test_apps/esp_flash/pytest_esp_flash.py | 15 +++++++++++++++ .../test_apps/esp_flash/sdkconfig.ci.c2_xtal26m | 2 ++ .../esp_flash/sdkconfig.ci.c2_xtal26m_rom | 3 +++ 3 files changed, 20 insertions(+) create mode 100644 components/spi_flash/test_apps/esp_flash/sdkconfig.ci.c2_xtal26m create mode 100644 components/spi_flash/test_apps/esp_flash/sdkconfig.ci.c2_xtal26m_rom diff --git a/components/spi_flash/test_apps/esp_flash/pytest_esp_flash.py b/components/spi_flash/test_apps/esp_flash/pytest_esp_flash.py index 4f68b670b2..8eeed76f5c 100644 --- a/components/spi_flash/test_apps/esp_flash/pytest_esp_flash.py +++ b/components/spi_flash/test_apps/esp_flash/pytest_esp_flash.py @@ -53,3 +53,18 @@ def test_esp_flash_rom(dut: Dut) -> None: ) def test_esp_flash_multi(dut: Dut) -> None: dut.run_all_single_board_cases(group='esp_flash_multi', timeout=120) + + +@pytest.mark.esp32c2 +@pytest.mark.generic +@pytest.mark.xtal_26mhz +@pytest.mark.parametrize( + 'config, baud', + [ + ('esp32c2_xtal26m', '74880'), + ('esp32c2_xtal26m_rom', '74880'), + ], + indirect=True, +) +def test_esp_flash_26mhz_c2(dut: Dut) -> None: + dut.run_all_single_board_cases(group='esp_flash') diff --git a/components/spi_flash/test_apps/esp_flash/sdkconfig.ci.c2_xtal26m b/components/spi_flash/test_apps/esp_flash/sdkconfig.ci.c2_xtal26m new file mode 100644 index 0000000000..172f022b67 --- /dev/null +++ b/components/spi_flash/test_apps/esp_flash/sdkconfig.ci.c2_xtal26m @@ -0,0 +1,2 @@ +CONFIG_IDF_TARGET="esp32c2" +CONFIG_XTAL_FREQ_26=y diff --git a/components/spi_flash/test_apps/esp_flash/sdkconfig.ci.c2_xtal26m_rom b/components/spi_flash/test_apps/esp_flash/sdkconfig.ci.c2_xtal26m_rom new file mode 100644 index 0000000000..58d23a6809 --- /dev/null +++ b/components/spi_flash/test_apps/esp_flash/sdkconfig.ci.c2_xtal26m_rom @@ -0,0 +1,3 @@ +CONFIG_IDF_TARGET="esp32c2" +CONFIG_XTAL_FREQ_26=y +CONFIG_SPI_FLASH_ROM_IMPL=y