refactor(esp_mm): reformat code with astyle_py 2

This commit is contained in:
Armando
2023-10-09 15:28:11 +08:00
parent 3de0b7218f
commit fc4b9d9507
8 changed files with 4 additions and 19 deletions

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@@ -35,7 +35,6 @@ extern "C" {
* - A Slot is the vaddr range between 2 blocks. * - A Slot is the vaddr range between 2 blocks.
*/ */
/** /**
* MMAP flags * MMAP flags
*/ */

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@@ -53,7 +53,6 @@ void cache_register_writeback(cache_driver_t *func);
*/ */
void cache_sync(void); void cache_sync(void);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

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@@ -58,7 +58,6 @@ esp_err_t esp_cache_aligned_malloc(size_t size, uint32_t flags, void **out_ptr,
*/ */
esp_err_t esp_cache_aligned_calloc(size_t n, size_t size, uint32_t flags, void **out_ptr, size_t *actual_size); esp_err_t esp_cache_aligned_calloc(size_t n, size_t size, uint32_t flags, void **out_ptr, size_t *actual_size);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

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@@ -14,7 +14,6 @@
extern "C" { extern "C" {
#endif #endif
/** /**
* Memory Mapping Private APIs for MMU supported memory * Memory Mapping Private APIs for MMU supported memory
*/ */
@@ -52,7 +51,6 @@ esp_err_t esp_mmu_map_reserve_block_with_caps(size_t size, mmu_mem_caps_t caps,
*/ */
esp_err_t esp_mmu_map_dump_mapped_blocks_private(void); esp_err_t esp_mmu_map_dump_mapped_blocks_private(void);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

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@@ -14,7 +14,6 @@
extern "C" { extern "C" {
#endif #endif
/** /**
* Set addr space dirty * Set addr space dirty
* *

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@@ -61,6 +61,5 @@ void app_main(void)
printf("| |___/\\__/ / | | | | || | | | | | | |___/\\__/ / | |\r\n"); printf("| |___/\\__/ / | | | | || | | | | | | |___/\\__/ / | |\r\n");
printf("\\____/\\____/\\_| \\_| |_/\\_| |_/ \\_/ \\____/\\____/ \\_/\r\n"); printf("\\____/\\____/\\_| \\_| |_/\\_| |_/ \\_/ \\____/\\____/ \\_/\r\n");
unity_run_menu(); unity_run_menu();
} }

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@@ -30,7 +30,6 @@ const static char *TAG = "CACHE_TEST";
#define TEST_NUM 10 #define TEST_NUM 10
#define TEST_BUF {0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9} #define TEST_BUF {0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9}
#define TEST_OFFSET 0x100000 #define TEST_OFFSET 0x100000
#if CONFIG_IDF_TARGET_ESP32S2 #if CONFIG_IDF_TARGET_ESP32S2
#define TEST_SYNC_START (SOC_DPORT_CACHE_ADDRESS_LOW + TEST_OFFSET) #define TEST_SYNC_START (SOC_DPORT_CACHE_ADDRESS_LOW + TEST_OFFSET)
@@ -41,13 +40,11 @@ const static char *TAG = "CACHE_TEST";
#endif #endif
#define TEST_SYNC_SIZE 0x8000 #define TEST_SYNC_SIZE 0x8000
#define RECORD_TIME_PREPARE() uint32_t __t1, __t2 #define RECORD_TIME_PREPARE() uint32_t __t1, __t2
#define RECORD_TIME_START() do {__t1 = esp_cpu_get_cycle_count();} while(0) #define RECORD_TIME_START() do {__t1 = esp_cpu_get_cycle_count();} while(0)
#define RECORD_TIME_END(p_time) do{__t2 = esp_cpu_get_cycle_count(); p_time = (__t2 - __t1);} while(0) #define RECORD_TIME_END(p_time) do{__t2 = esp_cpu_get_cycle_count(); p_time = (__t2 - __t1);} while(0)
#define GET_US_BY_CCOUNT(t) ((double)(t)/CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ) #define GET_US_BY_CCOUNT(t) ((double)(t)/CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ)
static void s_test_with_msync_cb(void *arg) static void s_test_with_msync_cb(void *arg)
{ {
(void)arg; (void)arg;
@@ -156,7 +153,6 @@ TEST_CASE("test cache msync work with Flash operation when XIP from PSRAM", "[ca
} }
#endif //#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS && CONFIG_SPIRAM_RODATA #endif //#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS && CONFIG_SPIRAM_RODATA
#if CONFIG_SPIRAM #if CONFIG_SPIRAM
/*--------------------------------------------------------------- /*---------------------------------------------------------------
Test esp_cache_msync with PSRAM stack Test esp_cache_msync with PSRAM stack

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@@ -56,7 +56,6 @@ typedef struct test_block_info_ {
static LIST_HEAD(test_block_list_head_, test_block_info_) test_block_head; static LIST_HEAD(test_block_list_head_, test_block_info_) test_block_head;
static void s_fill_random_data(uint8_t *buffer, size_t size, int random_seed) static void s_fill_random_data(uint8_t *buffer, size_t size, int random_seed)
{ {
srand(random_seed); srand(random_seed);
@@ -102,7 +101,6 @@ TEST_CASE("test all readable vaddr can map to flash", "[mmu]")
ESP_LOGV(TAG, "rand seed: %d, write flash addr: %p...", test_seed, (void *)part->address); ESP_LOGV(TAG, "rand seed: %d, write flash addr: %p...", test_seed, (void *)part->address);
TEST_ESP_OK(esp_flash_write(part->flash_chip, sector_buf, part->address, sizeof(sector_buf))); TEST_ESP_OK(esp_flash_write(part->flash_chip, sector_buf, part->address, sizeof(sector_buf)));
esp_err_t ret = ESP_FAIL; esp_err_t ret = ESP_FAIL;
int count = 0; int count = 0;
LIST_INIT(&test_block_head); LIST_INIT(&test_block_head);
@@ -144,7 +142,6 @@ TEST_CASE("test all readable vaddr can map to flash", "[mmu]")
free(sector_buf); free(sector_buf);
} }
TEST_CASE("test all executable vaddr can map to flash", "[mmu]") TEST_CASE("test all executable vaddr can map to flash", "[mmu]")
{ {
//Get the partition used for SPI1 erase operation //Get the partition used for SPI1 erase operation
@@ -173,8 +170,7 @@ TEST_CASE("test all executable vaddr can map to flash", "[mmu]")
TEST_ASSERT(paddr == part->address + i); TEST_ASSERT(paddr == part->address + i);
ESP_LOGV(TAG, "paddr: %p, on %s", (void *)paddr, (mem_target) == MMU_TARGET_FLASH0 ? "Flash" : "PSRAM"); ESP_LOGV(TAG, "paddr: %p, on %s", (void *)paddr, (mem_target) == MMU_TARGET_FLASH0 ? "Flash" : "PSRAM");
} }
} } else if (ret == ESP_ERR_NOT_FOUND) {
else if (ret == ESP_ERR_NOT_FOUND) {
free(block_info); free(block_info);
break; break;
} else { } else {