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feedc0de/esp-idf
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a242ae6d0b785cc5c14905bef1fdbdf28ceaa6b1
esp-idf/components/soc
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Ivan Grokhotkov a242ae6d0b soc/rtc: add fast paths for switching between PLL and XTAL
2017-10-18 14:19:14 +08:00
..
esp32
soc/rtc: add fast paths for switching between PLL and XTAL
2017-10-18 14:19:14 +08:00
include/soc
Add logic to make external RAM usable with malloc()
2017-09-28 17:17:50 +08:00
test
soc: add source code of rtc_clk, rtc_pm
2017-04-11 15:45:54 +08:00
component.mk
Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
2017-09-04 12:05:49 +08:00
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