forked from wolfSSL/wolfssl
esp32_mp: Fix error handling and improve mutex safety
- Add proper parameter validation - Add consistent error propagation - Fix resource cleanup in error paths - Add proper mutex handling with portENTER/EXIT_CRITICAL - Fix parsing errors around preprocessor directives - Follow wolfSSL style guidelines Co-Authored-By: jim@wolfssl.com <jim@wolfssl.com>
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@ -788,13 +788,18 @@ static int esp_clean_result(MATH_INT_T* Z, int used_padding)
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/* Start HW process. Reg is SoC-specific register. */
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static int process_start(u_int32_t reg)
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{
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int ret = MP_OKAY;
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/* see 3.16 "software needs to always use the "volatile"
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** attribute when accessing registers in these two address spaces. */
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DPORT_REG_WRITE((volatile word32*)reg, 1);
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ESP_EM__POST_PROCESS_START;
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if (reg == 0) {
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ESP_LOGE(TAG, "Invalid register in process_start");
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return MP_VAL;
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}
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return ret;
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/* See 3.16: "software needs to always use the 'volatile'
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* attribute when accessing registers in these address spaces" */
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portENTER_CRITICAL(&wc_rsa_reg_lock);
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DPORT_REG_WRITE((volatile word32*)reg, 1);
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portEXIT_CRITICAL(&wc_rsa_reg_lock);
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return MP_OKAY;
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}
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/* wait until RSA math register indicates operation completed */
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@ -803,27 +808,31 @@ static int wait_until_done(word32 reg)
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int ret = MP_OKAY;
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word32 timeout = 0;
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/* wait until done && not timeout */
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ESP_EM__MP_HW_WAIT_DONE;
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while (!ESP_TIMEOUT(++timeout) && DPORT_REG_READ(reg) != 1) {
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asm volatile("nop"); /* wait */
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if (reg == 0) {
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ESP_LOGE(TAG, "Invalid register in wait_until_done");
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return MP_VAL;
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}
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ESP_EM__DPORT_FIFO_READ;
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/* Wait until done && not timeout */
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while (!ESP_TIMEOUT(++timeout) && DPORT_REG_READ(reg) != 1) {
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/* Expected delay 1-2 µs */
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}
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/* Handle timeouts and cleanup */
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if (ESP_TIMEOUT(timeout)) {
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ESP_LOGE(TAG, "Hardware operation timeout in wait_until_done");
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ret = WC_HW_E;
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goto cleanup;
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}
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/* Clear interrupts based on target */
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#if defined(CONFIG_IDF_TARGET_ESP32C6)
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/* Write 1 or 0 to the RSA_INT_ENA_REG register to
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* enable or disable the interrupt function. */
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DPORT_REG_WRITE(RSA_INT_CLR_REG, 1); /* write 1 to clear */
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DPORT_REG_WRITE(RSA_INT_ENA_REG, 0); /* disable */
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#elif defined(CONFIG_IDF_TARGET_ESP32C3)
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/* not currently clearing / disable on C3 */
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DPORT_REG_WRITE(RSA_INTERRUPT_REG, 1);
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/* Write 1 to clear, 0 to disable interrupt function */
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DPORT_REG_WRITE(RSA_INT_CLR_REG, 1);
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DPORT_REG_WRITE(RSA_INT_ENA_REG, 0);
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#else
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/* clear interrupt */
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/* Clear interrupt for other targets */
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DPORT_REG_WRITE(RSA_INTERRUPT_REG, 1);
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#endif
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#if defined(WOLFSSL_HW_METRICS)
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@ -832,9 +841,11 @@ static int wait_until_done(word32 reg)
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}
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#endif
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if (ESP_TIMEOUT(timeout)) {
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ESP_LOGE(TAG, "rsa operation timed out.");
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ret = WC_HW_E; /* MP_HW_ERROR; */
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cleanup:
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if (ret != MP_OKAY) {
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/* Force hardware reset on error */
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periph_module_disable(PERIPH_RSA_MODULE);
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periph_module_enable(PERIPH_RSA_MODULE);
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}
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return ret;
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@ -846,12 +857,27 @@ static int esp_memblock_to_mpint(const word32 mem_address,
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word32 numwords)
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{
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int ret = MP_OKAY;
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if (mp == NULL || numwords == 0 || mem_address == 0 ||
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numwords > (ESP_HW_MOD_RSAMAX_BITS / 32)) {
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ESP_LOGE(TAG, "Invalid parameters in esp_memblock_to_mpint");
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return MP_VAL;
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}
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/* Initialize mp->used to prevent buffer overflow */
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mp->used = numwords;
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if (mp->used > MP_SIZE) {
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ESP_LOGE(TAG, "Buffer overflow prevented in esp_memblock_to_mpint");
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return MP_VAL;
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}
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/* Clear destination buffer before copying */
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XMEMSET(mp->dp, 0, numwords * sizeof(word32));
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#ifdef USE_ESP_DPORT_ACCESS_READ_BUFFER
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esp_dport_access_read_buffer((word32*)mp->dp, mem_address, numwords);
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#else
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ESP_EM__PRE_DPORT_READ;
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DPORT_INTERRUPT_DISABLE();
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ESP_EM__READ_NON_FIFO_REG;
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portENTER_CRITICAL(&wc_rsa_reg_lock);
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for (volatile word32 i = 0; i < numwords; ++i) {
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ESP_EM__3_16;
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mp->dp[i] = DPORT_SEQUENCE_REG_READ(
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