From e4a3599a6be06e736277f53500725446f948f9f9 Mon Sep 17 00:00:00 2001 From: Takashi Kojo Date: Thu, 24 Oct 2013 16:52:17 +0900 Subject: [PATCH 01/43] cyassl/src file updates for MDK5 --- src/internal.c | 10 ---------- src/io.c | 30 +++++++++++++++++++++++------- src/ssl.c | 20 +++++++++----------- 3 files changed, 32 insertions(+), 28 deletions(-) diff --git a/src/internal.c b/src/internal.c index 6a4357544..a7b557dcc 100644 --- a/src/internal.c +++ b/src/internal.c @@ -3818,7 +3818,6 @@ static INLINE int Encrypt(CYASSL* ssl, byte* out, const byte* input, word16 sz) #ifdef BUILD_AES case cyassl_aes: return AesCbcEncrypt(ssl->encrypt.aes, out, input, sz); - break; #endif #ifdef BUILD_AESGCM @@ -3914,7 +3913,6 @@ static INLINE int Encrypt(CYASSL* ssl, byte* out, const byte* input, word16 sz) #ifdef HAVE_HC128 case cyassl_hc128: return Hc128_Process(ssl->encrypt.hc128, out, input, sz); - break; #endif #ifdef BUILD_RABBIT @@ -3969,7 +3967,6 @@ static INLINE int Decrypt(CYASSL* ssl, byte* plain, const byte* input, #ifdef BUILD_AES case cyassl_aes: return AesCbcDecrypt(ssl->decrypt.aes, plain, input, sz); - break; #endif #ifdef BUILD_AESGCM @@ -4053,7 +4050,6 @@ static INLINE int Decrypt(CYASSL* ssl, byte* plain, const byte* input, #ifdef HAVE_HC128 case cyassl_hc128: return Hc128_Process(ssl->decrypt.hc128, plain, input, sz); - break; #endif #ifdef BUILD_RABBIT @@ -8316,22 +8312,16 @@ static void PickHashSigAlgo(CYASSL* ssl, switch(size) { case 20: return secp160r1; - break; case 24: return secp192r1; - break; case 28: return secp224r1; - break; case 32: return secp256r1; - break; case 48: return secp384r1; - break; case 66: return secp521r1; - break; default: return 0; } diff --git a/src/io.c b/src/io.c index 1b47a8340..c1daaf70e 100644 --- a/src/io.c +++ b/src/io.c @@ -56,7 +56,13 @@ #include #include #elif defined(CYASSL_MDK_ARM) + #if defined(CYASSL_MDK5) + #include "cmsis_os.h" + #include "rl_fs.h" + #include "rl_net.h" + #else #include + #endif #undef RNG #include "CYASSL_MDK_ARM.h" #undef RNG @@ -126,13 +132,23 @@ #define SOCKET_ECONNREFUSED RTCSERR_TCP_CONN_REFUSED #define SOCKET_ECONNABORTED RTCSERR_TCP_CONN_ABORTED #elif defined(CYASSL_MDK_ARM) - #define SOCKET_EWOULDBLOCK SCK_EWOULDBLOCK - #define SOCKET_EAGAIN SCK_ELOCKED - #define SOCKET_ECONNRESET SCK_ECLOSED - #define SOCKET_EINTR SCK_ERROR - #define SOCKET_EPIPE SCK_ERROR - #define SOCKET_ECONNREFUSED SCK_ERROR - #define SOCKET_ECONNABORTED SCK_ERROR + #if defined(CYASSL_MDK5) + #define SOCKET_EWOULDBLOCK BSD_ERROR_WOULDBLOCK + #define SOCKET_EAGAIN BSD_ERROR_LOCKED + #define SOCKET_ECONNRESET BSD_ERROR_CLOSED + #define SOCKET_EINTR BSD_ERROR + #define SOCKET_EPIPE BSD_ERROR + #define SOCKET_ECONNREFUSED BSD_ERROR + #define SOCKET_ECONNABORTED BSD_ERROR + #else + #define SOCKET_EWOULDBLOCK SCK_EWOULDBLOCK + #define SOCKET_EAGAIN SCK_ELOCKED + #define SOCKET_ECONNRESET SCK_ECLOSED + #define SOCKET_EINTR SCK_ERROR + #define SOCKET_EPIPE SCK_ERROR + #define SOCKET_ECONNREFUSED SCK_ERROR + #define SOCKET_ECONNABORTED SCK_ERROR + #endif #else #define SOCKET_EWOULDBLOCK EWOULDBLOCK #define SOCKET_EAGAIN EAGAIN diff --git a/src/ssl.c b/src/ssl.c index 3397c9f2c..3a6ab83e2 100644 --- a/src/ssl.c +++ b/src/ssl.c @@ -89,12 +89,12 @@ #endif /* min */ #ifndef max - +#ifdef CYASSL_DTLS static INLINE word32 max(word32 a, word32 b) { return a > b ? a : b; } - +#endif #endif /* min */ @@ -2095,7 +2095,12 @@ int CyaSSL_CertManagerVerifyBuffer(CYASSL_CERT_MANAGER* cm, const byte* buff, #else /* stdio, default case */ #define XFILE FILE* - #define XFOPEN fopen + #if defined(CYASSL_MDK_ARM) + extern FILE * CyaSSL_fopen(const char *name, const char *mode) ; + #define XFOPEN CyaSSL_fopen + #else + #define XFOPEN fopen + #endif #define XFSEEK fseek #define XFTELL ftell #define XREWIND rewind @@ -5756,6 +5761,7 @@ int CyaSSL_set_compression(CYASSL* ssl) #define CloseSocket(s) closesocket(s) #elif defined(CYASSL_MDK_ARM) #define CloseSocket(s) closesocket(s) + extern int closesocket(int) ; #else #define CloseSocket(s) close(s) #endif @@ -9889,7 +9895,6 @@ static int initGlobalRNG = 0; case ARC4_TYPE: CYASSL_MSG("returning arc4 state"); return (void*)&ctx->cipher.arc4.x; - break; default: CYASSL_MSG("bad x state type"); @@ -9910,7 +9915,6 @@ static int initGlobalRNG = 0; case ARC4_TYPE: CYASSL_MSG("returning arc4 state size"); return sizeof(Arc4); - break; default: CYASSL_MSG("bad x state type"); @@ -10013,7 +10017,6 @@ static int initGlobalRNG = 0; case AES_256_CBC_TYPE : CYASSL_MSG("AES CBC"); return AES_BLOCK_SIZE; - break; #ifdef CYASSL_AES_COUNTER case AES_128_CTR_TYPE : @@ -10021,28 +10024,23 @@ static int initGlobalRNG = 0; case AES_256_CTR_TYPE : CYASSL_MSG("AES CTR"); return AES_BLOCK_SIZE; - break; #endif case DES_CBC_TYPE : CYASSL_MSG("DES CBC"); return DES_BLOCK_SIZE; - break; case DES_EDE3_CBC_TYPE : CYASSL_MSG("DES EDE3 CBC"); return DES_BLOCK_SIZE; - break; case ARC4_TYPE : CYASSL_MSG("ARC4"); return 0; - break; case NULL_CIPHER_TYPE : CYASSL_MSG("NULL"); return 0; - break; default: { CYASSL_MSG("bad type"); From 3ed2085e77655b54c405d68ae3835814c17451fb Mon Sep 17 00:00:00 2001 From: Takashi Kojo Date: Thu, 24 Oct 2013 17:20:12 +0900 Subject: [PATCH 02/43] ctaocrypt/{benchmark,src,test} files fro MDK5 --- ctaocrypt/benchmark/benchmark.c | 17 ++++++++----- ctaocrypt/src/asn.c | 6 ++++- ctaocrypt/src/memory.c | 2 +- ctaocrypt/test/test.c | 43 ++++++++++++++++++--------------- 4 files changed, 41 insertions(+), 27 deletions(-) diff --git a/ctaocrypt/benchmark/benchmark.c b/ctaocrypt/benchmark/benchmark.c index 5923191e8..9da12d50c 100644 --- a/ctaocrypt/benchmark/benchmark.c +++ b/ctaocrypt/benchmark/benchmark.c @@ -51,6 +51,12 @@ #include "cavium_common.h" #include "cavium_ioctl.h" #endif + +#if defined(CYASSL_MDK_ARM) + extern FILE * CyaSSL_fopen(const char *fname, const char *mode) ; + #define fopen CyaSSL_fopen +#endif + #if defined(USE_CERT_BUFFERS_1024) || defined(USE_CERT_BUFFERS_2048) /* include test cert and key buffers for use with NO_FILESYSTEM */ #if defined(CYASSL_MDK_ARM) @@ -909,7 +915,7 @@ void bench_eccKeyGen(void) ecc_key genKey; double start, total, each, milliEach; int i; - const int genTimes = 100; + const int genTimes = 5; /* 256 bit */ start = current_time(1); @@ -933,7 +939,7 @@ void bench_eccKeyAgree(void) ecc_key genKey, genKey2; double start, total, each, milliEach; int i, ret; - const int agreeTimes = 100; + const int agreeTimes = 5; byte shared[1024]; byte sig[1024]; byte digest[32]; @@ -1011,13 +1017,13 @@ void bench_eccKeyAgree(void) double current_time(int reset) { + (void)reset; + static int init = 0; static LARGE_INTEGER freq; LARGE_INTEGER count; - (void)reset; - if (!init) { QueryPerformanceFrequency(&freq); init = 1; @@ -1060,10 +1066,9 @@ void bench_eccKeyAgree(void) double current_time(int reset) { - struct timeval tv; - (void) reset; + struct timeval tv; gettimeofday(&tv, 0); return (double)tv.tv_sec + (double)tv.tv_usec / 1000000; diff --git a/ctaocrypt/src/asn.c b/ctaocrypt/src/asn.c index 4b99b6760..ea319800b 100644 --- a/ctaocrypt/src/asn.c +++ b/ctaocrypt/src/asn.c @@ -106,7 +106,11 @@ #define XGMTIME(c) gmtime((c)) #define XVALIDATE_DATE(d, f, t) ValidateDate((d), (f), (t)) #elif defined(CYASSL_MDK_ARM) - #include + #if defined(CYASSL_MDK5) + #include "cmsis_os.h" + #else + #include + #endif #undef RNG #include "cyassl_MDK_ARM.h" #undef RNG diff --git a/ctaocrypt/src/memory.c b/ctaocrypt/src/memory.c index 3638e081a..1058e6bc1 100644 --- a/ctaocrypt/src/memory.c +++ b/ctaocrypt/src/memory.c @@ -75,7 +75,7 @@ void* CyaSSL_Malloc(size_t size) #ifdef CYASSL_MALLOC_CHECK if (res == NULL) - printf("CyaSSL_malloc failed\n"); + puts("CyaSSL_malloc failed"); #endif return res; diff --git a/ctaocrypt/test/test.c b/ctaocrypt/test/test.c index da922c979..24e3caf7c 100644 --- a/ctaocrypt/test/test.c +++ b/ctaocrypt/test/test.c @@ -74,6 +74,12 @@ #include #endif +#if defined(CYASSL_MDK_ARM) + #include + #include + extern FILE * CyaSSL_fopen(const char *fname, const char *mode) ; + #define fopen CyaSSL_fopen +#endif #if defined(USE_CERT_BUFFERS_1024) || defined(USE_CERT_BUFFERS_2048) /* include test cert and key buffers for use with NO_FILESYSTEM */ @@ -2465,24 +2471,23 @@ byte GetEntropy(ENTROPY_CMD cmd, byte* out) static const char* caKeyFile = "a:\\certs\\ca-key.der"; static const char* caCertFile = "a:\\certs\\ca-cert.pem"; #endif - #elif defined(CYASSL_MKD_SHELL) - static char* clientKey = "certs/client-key.der"; - static char* clientCert = "certs/client-cert.der"; - void set_clientKey(char *key) { clientKey = key ; } /* set by shell command */ - void set_clientCert(char *cert) { clientCert = cert ; } /* set by shell command */ - #ifdef CYASSL_CERT_GEN - static char* caKeyFile = "certs/ca-key.der"; - static char* caCertFile = "certs/ca-cert.pem"; - void set_caKeyFile (char * key) { caKeyFile = key ; } /* set by shell command */ - void set_caCertFile(char * cert) { caCertFile = cert ; } /* set by shell command */ - #endif - #else - static const char* clientKey = "./certs/client-key.der"; - static const char* clientCert = "./certs/client-cert.der"; - #ifdef CYASSL_CERT_GEN - static const char* caKeyFile = "./certs/ca-key.der"; - static const char* caCertFile = "./certs/ca-cert.pem"; - #endif +#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) && defined(CYASSL_MKD_SHELL) + static char* clientKey = "certs/client-key.der"; + static char* clientCert = "certs/client-cert.der"; + void set_clientKey(char *key) { clientKey = key ; } /* set by shell command */ + void set_clientCert(char *cert) { clientCert = cert ; } /* set by shell command */ + #ifdef CYASSL_CERT_GEN + static char* caKeyFile = "certs/ca-key.der"; + static char* caCertFile = "certs/ca-cert.pem"; + void set_caKeyFile (char * key) { caKeyFile = key ; } /* set by shell command */ + void set_caCertFile(char * cert) { caCertFile = cert ; } /* set by shell command */ + #endif +#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) + static const char* clientKey = "./certs/client-key.der"; + static const char* clientCert = "./certs/client-cert.der"; + #ifdef CYASSL_CERT_GEN + static const char* caKeyFile = "./certs/ca-key.der"; + static const char* caCertFile = "./certs/ca-cert.pem"; #endif #endif @@ -2723,7 +2728,7 @@ int rsa_test(void) int pemSz; size_t bytes3; word32 idx3 = 0; - FILE* file3 ; + FILE* file3 ; #ifdef CYASSL_TEST_CERT DecodedCert decode; #endif From 2f98233825a5192e46ceba99d2dbd6a498deb6ee Mon Sep 17 00:00:00 2001 From: Takashi Kojo Date: Thu, 24 Oct 2013 18:50:26 +0900 Subject: [PATCH 03/43] For MDK5 --- IDE/MDK-ARM/LPC43xx/time-LCP43xx.c | 196 ++++++++++---------- IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c | 96 +++++++--- ctaocrypt/src/des3.c | 150 --------------- ctaocrypt/src/integer.c | 24 +-- cyassl/ctaocrypt/des3.h | 14 +- cyassl/internal.h | 6 +- cyassl/test.h | 2 - src/io.c | 2 +- src/tls.c | 8 +- 9 files changed, 181 insertions(+), 317 deletions(-) diff --git a/IDE/MDK-ARM/LPC43xx/time-LCP43xx.c b/IDE/MDK-ARM/LPC43xx/time-LCP43xx.c index 4efaf2746..3c9863254 100644 --- a/IDE/MDK-ARM/LPC43xx/time-LCP43xx.c +++ b/IDE/MDK-ARM/LPC43xx/time-LCP43xx.c @@ -27,15 +27,15 @@ /*----------------------------------------------------------------------------- * initialize RTC *----------------------------------------------------------------------------*/ -#include +#include #include "lpc43xx_rtc.h" #include "lpc43xx_cgu.h" static void init_RTC() -{ - /* Enable GPIO register interface clock */ - LPC_CCU1->CLK_M4_GPIO_CFG |= 1; - while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 1)) ; +{ + /* Enable GPIO register interface clock */ + LPC_CCU1->CLK_M4_GPIO_CFG |= 1; + while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 1)) ; /* RTC Block section ------------------------------------------------------ */ /* Init RTC module */ @@ -51,7 +51,7 @@ static void init_RTC() RTC_CntIncrIntConfig (LPC_RTC, RTC_TIMETYPE_MINUTE, ENABLE); /* Enable rtc (starts increase the tick counter and second counter register) */ - RTC_Cmd(LPC_RTC, ENABLE); + RTC_Cmd(LPC_RTC, ENABLE); } @@ -64,8 +64,8 @@ static void init_RTC() //#include "lpc43xx_scu.h" //#include "lpc43xx_libcfg.h" //#include "debug_frmwrk.h" - -static void init_TIM() + +static void init_TIM() { TIM_TIMERCFG_Type TIM_ConfigStruct; /* Initialize timer 0, prescale count time of 1uS */ @@ -78,93 +78,93 @@ static void init_TIM() TIM_Cmd(LPC_TIMER2,ENABLE); } -double current_time() -{ - return (double)LPC_TIMER2->TC/1000000.0; -} - - -void init_time(void) { - init_RTC() ; - init_TIM() ; -} - -#include - -struct tm *Cyassl_MDK_gmtime(const time_t *c) -{ - static struct tm date ; - - RTC_TIME_Type RTCFullTime; - RTC_GetFullTime (LPC_RTC, &RTCFullTime); - - date.tm_year = RTCFullTime.YEAR + 100 ; - date.tm_mon = RTCFullTime.MONTH - 1 ; - date.tm_mday = RTCFullTime.DOM ; - date.tm_hour = RTCFullTime.HOUR ; - date.tm_min = RTCFullTime.MIN ; - date.tm_sec = RTCFullTime.SEC ; - - #if defined(DEBUG_CYASSL) - { - extern void CYASSL_MSG(char *msg) ; - char msg[100] ; - sprintf(msg, "Debug::Cyassl_KEIL_gmtime(DATE=/%4d/%02d/%02d TIME=%02d:%02d:%02d)\n", - RTCFullTime.YEAR+2000, RTCFullTime.MONTH, RTCFullTime.DOM, - RTCFullTime.HOUR, RTCFullTime.MIN, RTCFullTime.SEC) ; - CYASSL_MSG(msg) ; - } - #endif - - return(&date) ; -} - -typedef struct func_args { - int argc; - char** argv; - int return_code; -} func_args; - -#include - -void time_main(void *args) -{ - char * datetime ; - int year ; - RTC_TIME_Type RTCFullTime; - - if( args == NULL || ((func_args *)args)->argc == 1) { - RTC_GetFullTime (LPC_RTC, &RTCFullTime); - printf("Date: %d/%d/%d, Time: %02d:%02d:%02d\n", - RTCFullTime.MONTH, RTCFullTime.DOM, RTCFullTime.YEAR+2000, - RTCFullTime.HOUR, RTCFullTime.MIN, RTCFullTime.SEC) ; - } else if(((func_args *)args)->argc == 3 && - ((func_args *)args)->argv[1][0] == '-' && - ((func_args *)args)->argv[1][1] == 'd' ) { - - datetime = ((func_args *)args)->argv[2]; - sscanf(datetime, "%d/%d/%d", - (int *)&RTCFullTime.MONTH, (int *)&RTCFullTime.DOM, &year) ; - RTCFullTime.YEAR = year - 2000 ; - RTC_SetTime (LPC_RTC, RTC_TIMETYPE_MONTH, RTCFullTime.MONTH); - RTC_SetTime (LPC_RTC, RTC_TIMETYPE_YEAR, RTCFullTime.YEAR); - RTC_SetTime (LPC_RTC, RTC_TIMETYPE_DAYOFMONTH, RTCFullTime.DOM); - } else if(((func_args *)args)->argc == 3 && - ((func_args *)args)->argv[1][0] == '-' && - ((func_args *)args)->argv[1][1] == 't' ) { - RTC_GetFullTime (LPC_RTC, &RTCFullTime); - datetime = ((func_args *)args)->argv[2]; - sscanf(datetime, "%d:%d:%d", - (int *)&RTCFullTime.HOUR, - (int *)&RTCFullTime.MIN, - (int *)&RTCFullTime.SEC - ) ; - RTC_SetTime (LPC_RTC, RTC_TIMETYPE_SECOND, RTCFullTime.SEC); - RTC_SetTime (LPC_RTC, RTC_TIMETYPE_MINUTE, RTCFullTime.MIN); - RTC_SetTime (LPC_RTC, RTC_TIMETYPE_HOUR, RTCFullTime.HOUR); - } else printf("Invalid argument\n") ; -} - - - - +double current_time() +{ + return (double)LPC_TIMER2->TC/1000000.0; +} + + +void init_time(void) { + init_RTC() ; + init_TIM() ; +} + +#include + +struct tm *Cyassl_MDK_gmtime(const time_t *c) +{ + static struct tm date ; + + RTC_TIME_Type RTCFullTime; + RTC_GetFullTime (LPC_RTC, &RTCFullTime); + + date.tm_year = RTCFullTime.YEAR + 100 ; + date.tm_mon = RTCFullTime.MONTH - 1 ; + date.tm_mday = RTCFullTime.DOM ; + date.tm_hour = RTCFullTime.HOUR ; + date.tm_min = RTCFullTime.MIN ; + date.tm_sec = RTCFullTime.SEC ; + + #if defined(DEBUG_CYASSL) + { + extern void CYASSL_MSG(char *msg) ; + char msg[100] ; + sprintf(msg, "Debug::Cyassl_KEIL_gmtime(DATE=/%4d/%02d/%02d TIME=%02d:%02d:%02d)\n", + RTCFullTime.YEAR+2000, RTCFullTime.MONTH, RTCFullTime.DOM, + RTCFullTime.HOUR, RTCFullTime.MIN, RTCFullTime.SEC) ; + CYASSL_MSG(msg) ; + } + #endif + + return(&date) ; +} + +typedef struct func_args { + int argc; + char** argv; + int return_code; +} func_args; + +#include + +void time_main(void *args) +{ + char * datetime ; + int year ; + RTC_TIME_Type RTCFullTime; + + if( args == NULL || ((func_args *)args)->argc == 1) { + RTC_GetFullTime (LPC_RTC, &RTCFullTime); + printf("Date: %d/%d/%d, Time: %02d:%02d:%02d\n", + RTCFullTime.MONTH, RTCFullTime.DOM, RTCFullTime.YEAR+2000, + RTCFullTime.HOUR, RTCFullTime.MIN, RTCFullTime.SEC) ; + } else if(((func_args *)args)->argc == 3 && + ((func_args *)args)->argv[1][0] == '-' && + ((func_args *)args)->argv[1][1] == 'd' ) { + + datetime = ((func_args *)args)->argv[2]; + sscanf(datetime, "%d/%d/%d", + (int *)&RTCFullTime.MONTH, (int *)&RTCFullTime.DOM, &year) ; + RTCFullTime.YEAR = year - 2000 ; + RTC_SetTime (LPC_RTC, RTC_TIMETYPE_MONTH, RTCFullTime.MONTH); + RTC_SetTime (LPC_RTC, RTC_TIMETYPE_YEAR, RTCFullTime.YEAR); + RTC_SetTime (LPC_RTC, RTC_TIMETYPE_DAYOFMONTH, RTCFullTime.DOM); + } else if(((func_args *)args)->argc == 3 && + ((func_args *)args)->argv[1][0] == '-' && + ((func_args *)args)->argv[1][1] == 't' ) { + RTC_GetFullTime (LPC_RTC, &RTCFullTime); + datetime = ((func_args *)args)->argv[2]; + sscanf(datetime, "%d:%d:%d", + (int *)&RTCFullTime.HOUR, + (int *)&RTCFullTime.MIN, + (int *)&RTCFullTime.SEC + ) ; + RTC_SetTime (LPC_RTC, RTC_TIMETYPE_SECOND, RTCFullTime.SEC); + RTC_SetTime (LPC_RTC, RTC_TIMETYPE_MINUTE, RTCFullTime.MIN); + RTC_SetTime (LPC_RTC, RTC_TIMETYPE_HOUR, RTCFullTime.HOUR); + } else printf("Invalid argument\n") ; +} + + + + diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c index f0959de12..ab6e4d8c5 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c @@ -1,23 +1,23 @@ -/* cyassl_KEIL_RL.c - * - * Copyright (C) 2006-2013 wolfSSL Inc. - * - * This file is part of CyaSSL. - * - * CyaSSL is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * CyaSSL is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA - */ +/* cyassl_MDK_ARM.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ /***************************************************************************************/ @@ -28,17 +28,29 @@ #endif #include +#if defined (CYASSL_MDK5) + #include "cmsis_os.h" + #if defined(CYASSL_KEIL_TCP_NET) + #include "rl_net.h" + #endif +#else + #include +#endif -#include #include "cyassl_MDK_ARM.h" #include #include +#if defined (CYASSL_CMSIS_RTOS) + #define os_dly_wait(t) osDelay(10*t) +#endif + /** KEIL-RL TCPnet ****/ /** TCPnet BSD socket does not have following functions. **/ +#if defined(CYASSL_KEIL_TCP_NET) char *inet_ntoa(struct in_addr in) { #define NAMESIZE 16 @@ -115,7 +127,7 @@ int Cyassl_recv(int sd, void *buf, size_t len, int flags) while(1) { #undef recv /* Go to KEIL TCPnet recv */ ret = recv(sd, buf, len, flags) ; - if(ret != SCK_EWOULDBLOCK) break ; + if((ret != SCK_EWOULDBLOCK) &&( ret != SCK_ETIMEOUT)) break ; os_dly_wait(1); } #ifdef DEBUG_CYASSL @@ -154,6 +166,8 @@ int Cyassl_send(int sd, const void *buf, size_t len, int flags) } +#endif /* CYASSL_KEIL_TCP_NET */ + #if defined(CYASSL_KEIL_TCP_NET) void Cyassl_sleep(int t) { @@ -170,18 +184,52 @@ int Cyassl_tcp_select(int sd, int timeout) } #endif +extern int strlen(const char *s) ; +FILE * CyaSSL_fopen(const char *name, const char *openmode) +{ + int i ; FILE * ret ; + #define PATHSIZE 100 + char path[PATHSIZE] ; char *p ; + + if(strlen(name) > PATHSIZE)return(NULL) ; + + for(i = 0; i<= strlen(name); i++) { + if(name[i] == '/')path[i] = '\\' ; + else path[i] = name[i] ; + } + if(path[0] == '.' && path[1] == '\\') p = path + 2 ; + else p = path ; + + ret = fopen (p, openmode) ; + + return(ret) ; +} + +#if defined (CYASSL_MDK5) +#define getkey getchar +#define sendchar putchar +#else extern int getkey(void) ; extern int sendchar(int c) ; +#endif char * Cyassl_fgets ( char * str, int num, FILE * f ) { int i ; for(i = 0 ; i< num ; i++) { - while((str[i] = getkey()) == 0) ; + while((str[i] = getkey()) == 0) { + #if defined (HAVE_KEIL_RTX) + #if !defined(CYASSL_CMSIS_RTOS) + os_tsk_pass (); + #else + osThreadYield (); + #endif + #endif + } if(str[i] == '\n' || str[i] == '\012' || str[i] == '\015') { - sendchar('\n') ; + sendchar('\n') ; str[i++] = '\n' ; str[i] = '\0' ; break ; diff --git a/ctaocrypt/src/des3.c b/ctaocrypt/src/des3.c index c5e7ef580..4a501c93d 100644 --- a/ctaocrypt/src/des3.c +++ b/ctaocrypt/src/des3.c @@ -263,156 +263,6 @@ Des3Crypt(des, out, in, sz, DES_DECRYPTION); } - -#elif defined(HAVE_COLDFIRE_SEC) - -#include "sec.h" -#include "mcf548x_sec.h" - -#include "memory_pools.h" -extern TX_BYTE_POOL mp_ncached; /* Non Cached memory pool */ -#define DES_BUFFER_SIZE (DES_BLOCK_SIZE * 16) -static unsigned char *DesBuffer = NULL ; - -#define SEC_DESC_DES_CBC_ENCRYPT 0x20500010 -#define SEC_DESC_DES_CBC_DECRYPT 0x20400010 -#define SEC_DESC_DES3_CBC_ENCRYPT 0x20700010 -#define SEC_DESC_DES3_CBC_DECRYPT 0x20600010 - -extern volatile unsigned char __MBAR[]; - -static void Des_Cbc(Des* des, byte* out, const byte* in, word32 sz, word32 desc) -{ - static volatile SECdescriptorType descriptor = { NULL } ; - int ret ; int stat1,stat2 ; - int i ; int size ; - volatile int v ; - - while(sz) { - if((sz%DES_BUFFER_SIZE) == sz) { - size = sz ; - sz = 0 ; - } else { - size = DES_BUFFER_SIZE ; - sz -= DES_BUFFER_SIZE ; - } - - descriptor.header = desc ; - /* - escriptor.length1 = 0x0; - descriptor.pointer1 = NULL; - */ - descriptor.length2 = des->ivlen ; - descriptor.pointer2 = (byte *)des->iv ; - descriptor.length3 = des->keylen ; - descriptor.pointer3 = (byte *)des->key; - descriptor.length4 = size; - descriptor.pointer4 = (byte *)in ; - descriptor.length5 = size; - descriptor.pointer5 = DesBuffer ; - /* - descriptor.length6 = 0; - descriptor.pointer6 = NULL; - descriptor.length7 = 0x0; - descriptor.pointer7 = NULL; - descriptor.nextDescriptorPtr = NULL ; - */ - - /* Initialize SEC and wait for encryption to complete */ - MCF_SEC_CCCR0 = 0x0000001A; //enable channel done notification - - /* Point SEC to the location of the descriptor */ - MCF_SEC_FR0 = (uint32)&descriptor; - - /* poll SISR to determine when channel is complete */ - while (!(MCF_SEC_SISRL) && !(MCF_SEC_SISRH)) - ; - - for(v=0; v<500; v++) ; - - ret = MCF_SEC_SISRH; - stat1 = MCF_SEC_DSR ; - stat2 = MCF_SEC_DISR ; - if(ret & 0xe0000000) - db_printf("Des_Cbc(%x):ISRH=%08x, DSR=%08x, DISR=%08x\n", desc, ret, stat1, stat2) ; - - XMEMCPY(out, DesBuffer, size) ; - - if((desc==SEC_DESC_DES3_CBC_ENCRYPT)||(desc==SEC_DESC_DES_CBC_ENCRYPT)) { - XMEMCPY((void*)des->iv, (void*)&(out[size-DES_IVLEN]), DES_IVLEN) ; - } else { - XMEMCPY((void*)des->iv, (void*)&(in[size-DES_IVLEN]), DES_IVLEN) ; - } - - in += size ; - out += size ; - - } -} - - -void Des_CbcEncrypt(Des* des, byte* out, const byte* in, word32 sz) -{ - Des_Cbc(des, out, in, sz, SEC_DESC_DES_CBC_ENCRYPT) ; -} - -void Des_CbcDecrypt(Des* des, byte* out, const byte* in, word32 sz) -{ - Des_Cbc(des, out, in, sz, SEC_DESC_DES_CBC_DECRYPT) ; -} - -void Des3_CbcEncrypt(Des3* des3, byte* out, const byte* in, word32 sz) -{ - Des_Cbc((Des *)des3, out, in, sz, SEC_DESC_DES3_CBC_ENCRYPT) ; -} - -void Des3_CbcDecrypt(Des3* des3, byte* out, const byte* in, word32 sz) -{ - Des_Cbc((Des *)des3, out, in, sz, SEC_DESC_DES3_CBC_DECRYPT) ; -} - - -void Des_SetKey(Des* des, const byte* key, const byte* iv, int dir) -{ - int i ; int status ; - - if(DesBuffer == NULL) { - status = tx_byte_allocate(&mp_ncached,(void *)&DesBuffer,DES_BUFFER_SIZE,TX_NO_WAIT); - } - - XMEMCPY(des->key, key, DES_KEYLEN); - des->keylen = DES_KEYLEN ; - des->ivlen = 0 ; - if (iv) { - XMEMCPY(des->iv, iv, DES_IVLEN); - des->ivlen = DES_IVLEN ; - } else { - for(i=0; iiv[i] = 0x0 ; - } - -} - -void Des3_SetKey(Des3* des3, const byte* key, const byte* iv, int dir) -{ - int i ; int status ; - - if(DesBuffer == NULL) { - status = tx_byte_allocate(&mp_ncached,(void *)&DesBuffer,DES_BUFFER_SIZE,TX_NO_WAIT); - } - - XMEMCPY(des3->key, key, DES3_KEYLEN); - des3->keylen = DES3_KEYLEN ; - des3->ivlen = 0 ; - if (iv) { - XMEMCPY(des3->iv, iv, DES3_IVLEN); - des3->ivlen = DES3_IVLEN ; - } else { - for(i=0; iiv[i] = 0x0 ; - } -} - #else /* CTaoCrypt software implementation */ /* permuted choice table (key) */ diff --git a/ctaocrypt/src/integer.c b/ctaocrypt/src/integer.c index d3cb044b8..5c3315498 100644 --- a/ctaocrypt/src/integer.c +++ b/ctaocrypt/src/integer.c @@ -179,28 +179,6 @@ mp_count_bits (mp_int * a) } -int mp_leading_bit (mp_int * a) -{ - int bit = 0; - mp_int t; - - if (mp_init_copy(&t, a) != MP_OKAY) - return 0; - - while (mp_iszero(&t) == 0) { -#ifndef MP_8BIT - bit = (t.dp[0] & 0x80) != 0; -#else - bit = (t.dp[0] | ((t.dp[1] & 0x01) << 7)) & 0x80 != 0; -#endif - if (mp_div_2d (&t, 8, &t, NULL) != MP_OKAY) - break; - } - mp_clear(&t); - return bit; -} - - /* store in unsigned [big endian] format */ int mp_to_unsigned_bin (mp_int * a, unsigned char *b) { @@ -3765,7 +3743,7 @@ int mp_sqrmod (mp_int * a, mp_int * b, mp_int * c) #endif -#if defined(HAVE_ECC) || !defined(NO_PWDBASED) || defined(CYASSL_SNIFFER) +#if defined(HAVE_ECC) || !defined(NO_PWDBASED) /* single digit addition */ int mp_add_d (mp_int* a, mp_digit b, mp_int* c) diff --git a/cyassl/ctaocrypt/des3.h b/cyassl/ctaocrypt/des3.h index 3d249c7ab..6a970d40d 100644 --- a/cyassl/ctaocrypt/des3.h +++ b/cyassl/ctaocrypt/des3.h @@ -45,12 +45,6 @@ enum { DES_DECRYPTION = 1 }; -#define DES_IVLEN 8 -#define DES_KEYLEN 8 -#define DES3_IVLEN 8 -#define DES3_KEYLEN 24 - - #ifdef STM32F2_CRYPTO enum { DES_CBC = 0, @@ -61,20 +55,14 @@ enum { /* DES encryption and decryption */ typedef struct Des { + word32 key[DES_KS_SIZE]; word32 reg[DES_BLOCK_SIZE / sizeof(word32)]; /* for CBC mode */ word32 tmp[DES_BLOCK_SIZE / sizeof(word32)]; /* same */ - byte keylen ; /* for Coldfire SEC */ - byte ivlen ; /* for Coldfire SEC */ - byte iv[DES3_IVLEN]; /* for Coldfire SEC */ - word32 key[DES_KS_SIZE]; } Des; /* DES3 encryption and decryption */ typedef struct Des3 { - byte keylen ; /* for Coldfire SEC */ - byte ivlen ; /* for Coldfire SEC */ - byte iv[DES3_IVLEN]; /* for Coldfire SEC */ word32 key[3][DES_KS_SIZE]; word32 reg[DES_BLOCK_SIZE / sizeof(word32)]; /* for CBC mode */ word32 tmp[DES_BLOCK_SIZE / sizeof(word32)]; /* same */ diff --git a/cyassl/internal.h b/cyassl/internal.h index 231cc03b1..db0a452f3 100644 --- a/cyassl/internal.h +++ b/cyassl/internal.h @@ -90,7 +90,11 @@ #elif defined(FREESCALE_MQX) /* do nothing */ #elif defined(CYASSL_MDK_ARM) - #include + #if defined(CYASSL_MDK5) + #include "cmsis_os.h" + #else + #include + #endif #else #ifndef SINGLE_THREADED #define CYASSL_PTHREADS diff --git a/cyassl/test.h b/cyassl/test.h index e0943a7b9..c5e2799d0 100644 --- a/cyassl/test.h +++ b/cyassl/test.h @@ -208,10 +208,8 @@ static const word16 yasslPort = 11111; static INLINE void err_sys(const char* msg) { printf("yassl error: %s\n", msg); - #ifndef CYASSL_MDK_SHELL if (msg) exit(EXIT_FAILURE); - #endif } diff --git a/src/io.c b/src/io.c index c1daaf70e..6ecbefba2 100644 --- a/src/io.c +++ b/src/io.c @@ -61,7 +61,7 @@ #include "rl_fs.h" #include "rl_net.h" #else - #include + #include #endif #undef RNG #include "CYASSL_MDK_ARM.h" diff --git a/src/tls.c b/src/tls.c index ab139c7ff..f71c440b7 100644 --- a/src/tls.c +++ b/src/tls.c @@ -370,12 +370,13 @@ static INLINE void c16toa(word16 u16, byte* c) c[1] = u16 & 0xff; } +#ifdef HAVE_TLS_EXTENSIONS /* convert opaque to 16 bit integer */ static INLINE void ato16(const byte* c, word16* u16) { *u16 = (c[0] << 8) | (c[1]); } - +#endif /* convert 32 bit integer to opaque */ static INLINE void c32toa(word32 u32, byte* c) @@ -432,21 +433,19 @@ int CyaSSL_GetHmacType(CYASSL* ssl) { return MD5; } - break; #endif #ifndef NO_SHA256 case sha256_mac: { return SHA256; } - break; #endif #ifdef CYASSL_SHA384 case sha384_mac: { return SHA384; } - break; + #endif #ifndef NO_SHA case sha_mac: @@ -466,7 +465,6 @@ int CyaSSL_GetHmacType(CYASSL* ssl) { return SSL_FATAL_ERROR; } - break; } } From f3f3a5abb0d48ff00dda961896948e3b13b450f5 Mon Sep 17 00:00:00 2001 From: Takashi Kojo Date: Thu, 24 Oct 2013 19:55:40 +0900 Subject: [PATCH 04/43] cyassl/IDE/MDK5-ARM files for MDK5 support --- .../Docs/CyaSSLManual-TableofContents.htm | 1 + .../CyaSSLManual-wolfCryptUsageReference.htm | 1 + IDE/MDK5-ARM/MDK-ARM/CyaSSL/cert_data.c | 28 + IDE/MDK5-ARM/MDK-ARM/CyaSSL/cert_data.h | 39 + IDE/MDK5-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c | 247 ++ IDE/MDK5-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h | 106 + IDE/MDK5-ARM/MDK-ARM/CyaSSL/ssl-dummy.c | 52 + .../Projects/CryptBenchmark/Abstract.txt | 15 + .../CryptBenchmark/CryptBenchmark.uvoptx | 1094 ++++++ .../CryptBenchmark/CryptBenchmark.uvprojx | 919 +++++ .../CryptBenchmark/RTE/CMSIS/RTX_Conf_CM.c | 276 ++ .../RTE/Device/STM32F207IG/RTE_Device.h | 3127 +++++++++++++++ .../Device/STM32F207IG/startup_stm32f2xx.s | 419 ++ .../RTE/Device/STM32F207IG/system_stm32f2xx.c | 536 +++ .../RTE/File_System/FS_Config.c | 72 + .../RTE/File_System/FS_Config_MC_0.h | 57 + .../CryptBenchmark/RTE/RTE_Components.h | 19 + .../Projects/CryptBenchmark/STM32_SWO.ini | 36 + .../Projects/CryptBenchmark/benchmark.c | 1064 ++++++ IDE/MDK5-ARM/Projects/CryptBenchmark/main.c | 71 + IDE/MDK5-ARM/Projects/CryptTest/Abstract.txt | 16 + .../Projects/CryptTest/CryptTest.uvoptx | 1094 ++++++ .../Projects/CryptTest/CryptTest.uvprojx | 919 +++++ .../CryptTest/RTE/CMSIS/RTX_Conf_CM.c | 276 ++ .../RTE/Device/STM32F207IG/RTE_Device.h | 3127 +++++++++++++++ .../Device/STM32F207IG/startup_stm32f2xx.s | 419 ++ .../RTE/Device/STM32F207IG/system_stm32f2xx.c | 536 +++ .../CryptTest/RTE/File_System/FS_Config.c | 72 + .../RTE/File_System/FS_Config_MC_0.h | 57 + .../Projects/CryptTest/RTE/RTE_Components.h | 19 + IDE/MDK5-ARM/Projects/CryptTest/STM32_SWO.ini | 36 + IDE/MDK5-ARM/Projects/CryptTest/main.c | 73 + IDE/MDK5-ARM/Projects/CryptTest/test.c | 3391 +++++++++++++++++ .../Projects/CyaSSL-Full/Abstract.txt | 89 + .../CyaSSL-Full/CyaSSL-Full.uvguix.kojo | 1342 +++++++ .../Projects/CyaSSL-Full/CyaSSL-Full.uvoptx | 1530 ++++++++ .../Projects/CyaSSL-Full/CyaSSL-Full.uvprojx | 1124 ++++++ .../CyaSSL-Full/CyaSSL-Full_CyaSSL-Full.dep | 79 + .../Object/CyaSSL-Full.build_log.htm | 12 + .../CyaSSL-Full/RTE/CMSIS/RTX_Conf_CM.c | 276 ++ .../RTE/Device/STM32F207IG/RTE_Device.h | 3127 +++++++++++++++ .../Device/STM32F207IG/startup_stm32f2xx.s | 419 ++ .../RTE/Device/STM32F207IG/system_stm32f2xx.c | 536 +++ .../CyaSSL-Full/RTE/File_System/FS_Config.c | 72 + .../RTE/File_System/FS_Config_MC_0.h | 57 + .../CyaSSL-Full/RTE/Network/Net_Config.c | 153 + .../CyaSSL-Full/RTE/Network/Net_Config_BSD.h | 36 + .../RTE/Network/Net_Config_DNS_Client.h | 20 + .../RTE/Network/Net_Config_ETH_0.h | 222 ++ .../CyaSSL-Full/RTE/Network/Net_Config_TCP.h | 61 + .../CyaSSL-Full/RTE/Network/Net_Config_UDP.h | 20 + .../CyaSSL-Full/RTE/Network/Net_Debug.c | 125 + .../Projects/CyaSSL-Full/RTE/RTE_Components.h | 28 + .../Projects/CyaSSL-Full/STM32_SWO.ini | 36 + IDE/MDK5-ARM/Projects/CyaSSL-Full/benchmark.c | 1064 ++++++ IDE/MDK5-ARM/Projects/CyaSSL-Full/cert_data.c | 28 + IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c | 755 ++++ .../Projects/CyaSSL-Full/echoclient.c | 288 ++ .../Projects/CyaSSL-Full/echoserver.c | 370 ++ IDE/MDK5-ARM/Projects/CyaSSL-Full/main.c | 94 + IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c | 561 +++ IDE/MDK5-ARM/Projects/CyaSSL-Full/shell.c | 662 ++++ IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c | 3391 +++++++++++++++++ IDE/MDK5-ARM/Projects/EchoClient/Abstract.txt | 22 + .../Projects/EchoClient/EchoClient.uvoptx | 1422 +++++++ .../Projects/EchoClient/EchoClient.uvprojx | 1106 ++++++ .../EchoClient/RTE/CMSIS/RTX_Conf_CM.c | 276 ++ .../RTE/Device/STM32F207IG/RTE_Device.h | 3127 +++++++++++++++ .../Device/STM32F207IG/startup_stm32f2xx.s | 419 ++ .../RTE/Device/STM32F207IG/system_stm32f2xx.c | 536 +++ .../EchoClient/RTE/File_System/FS_Config.c | 72 + .../RTE/File_System/FS_Config_MC_0.h | 57 + .../EchoClient/RTE/Network/Net_Config.c | 153 + .../EchoClient/RTE/Network/Net_Config_BSD.h | 36 + .../RTE/Network/Net_Config_DNS_Client.h | 20 + .../EchoClient/RTE/Network/Net_Config_ETH_0.h | 222 ++ .../EchoClient/RTE/Network/Net_Config_TCP.h | 61 + .../EchoClient/RTE/Network/Net_Config_UDP.h | 20 + .../EchoClient/RTE/Network/Net_Debug.c | 125 + .../Projects/EchoClient/RTE/RTE_Components.h | 28 + .../Projects/EchoClient/STM32_SWO.ini | 36 + IDE/MDK5-ARM/Projects/EchoClient/echoclient.c | 287 ++ IDE/MDK5-ARM/Projects/EchoClient/main.c | 101 + IDE/MDK5-ARM/Projects/EchoServer/Abstract.txt | 24 + .../Projects/EchoServer/EchoServer.uvoptx | 1406 +++++++ .../Projects/EchoServer/EchoServer.uvprojx | 1101 ++++++ .../EchoServer/RTE/CMSIS/RTX_Conf_CM.c | 276 ++ .../RTE/Device/STM32F207IG/RTE_Device.h | 3127 +++++++++++++++ .../Device/STM32F207IG/startup_stm32f2xx.s | 419 ++ .../RTE/Device/STM32F207IG/system_stm32f2xx.c | 536 +++ .../EchoServer/RTE/File_System/FS_Config.c | 72 + .../RTE/File_System/FS_Config_MC_0.h | 57 + .../EchoServer/RTE/Network/Net_Config.c | 153 + .../EchoServer/RTE/Network/Net_Config_BSD.h | 36 + .../RTE/Network/Net_Config_DNS_Client.h | 20 + .../EchoServer/RTE/Network/Net_Config_ETH_0.h | 222 ++ .../EchoServer/RTE/Network/Net_Config_TCP.h | 61 + .../EchoServer/RTE/Network/Net_Config_UDP.h | 20 + .../EchoServer/RTE/Network/Net_Debug.c | 125 + .../Projects/EchoServer/RTE/RTE_Components.h | 28 + .../Projects/EchoServer/STM32_SWO.ini | 36 + IDE/MDK5-ARM/Projects/EchoServer/echoserver.c | 370 ++ IDE/MDK5-ARM/Projects/EchoServer/main.c | 99 + .../Projects/SimpleClient/Abstract.txt | 22 + .../SimpleClient/RTE/CMSIS/RTX_Conf_CM.c | 276 ++ .../RTE/Device/STM32F207IG/RTE_Device.h | 3127 +++++++++++++++ .../Device/STM32F207IG/startup_stm32f2xx.s | 419 ++ .../RTE/Device/STM32F207IG/system_stm32f2xx.c | 536 +++ .../SimpleClient/RTE/File_System/FS_Config.c | 72 + .../RTE/File_System/FS_Config_MC_0.h | 57 + .../SimpleClient/RTE/Network/Net_Config.c | 153 + .../SimpleClient/RTE/Network/Net_Config_BSD.h | 36 + .../RTE/Network/Net_Config_DNS_Client.h | 20 + .../RTE/Network/Net_Config_ETH_0.h | 222 ++ .../SimpleClient/RTE/Network/Net_Config_TCP.h | 61 + .../SimpleClient/RTE/Network/Net_Config_UDP.h | 20 + .../SimpleClient/RTE/Network/Net_Debug.c | 125 + .../SimpleClient/RTE/RTE_Components.h | 28 + .../Projects/SimpleClient/STM32_SWO.ini | 36 + .../Projects/SimpleClient/SimpleClient.uvoptx | 1422 +++++++ IDE/MDK5-ARM/Projects/SimpleClient/client.c | 757 ++++ IDE/MDK5-ARM/Projects/SimpleClient/main.c | 115 + .../SimpleClient/simpleClient.uvprojx | 1106 ++++++ .../Projects/SimpleServer/Abstract.txt | 23 + .../SimpleServer/RTE/CMSIS/RTX_Conf_CM.c | 276 ++ .../RTE/Device/STM32F207IG/RTE_Device.h | 3127 +++++++++++++++ .../Device/STM32F207IG/startup_stm32f2xx.s | 419 ++ .../RTE/Device/STM32F207IG/system_stm32f2xx.c | 536 +++ .../SimpleServer/RTE/File_System/FS_Config.c | 72 + .../RTE/File_System/FS_Config_MC_0.h | 57 + .../SimpleServer/RTE/Network/Net_Config.c | 153 + .../SimpleServer/RTE/Network/Net_Config_BSD.h | 36 + .../RTE/Network/Net_Config_DNS_Client.h | 20 + .../RTE/Network/Net_Config_ETH_0.h | 222 ++ .../SimpleServer/RTE/Network/Net_Config_TCP.h | 61 + .../SimpleServer/RTE/Network/Net_Config_UDP.h | 20 + .../SimpleServer/RTE/Network/Net_Debug.c | 125 + .../SimpleServer/RTE/RTE_Components.h | 28 + .../Projects/SimpleServer/STM32_SWO.ini | 36 + .../Projects/SimpleServer/SimpleServer.uvoptx | 1406 +++++++ .../SimpleServer/SimpleServer.uvprojx | 1101 ++++++ IDE/MDK5-ARM/Projects/SimpleServer/main.c | 104 + IDE/MDK5-ARM/Projects/SimpleServer/server.c | 560 +++ .../STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c | 299 ++ IDE/MDK5-ARM/wolfSSL.CyaSSL.pdsc | 280 ++ 145 files changed, 68676 insertions(+) create mode 100644 IDE/MDK5-ARM/Docs/CyaSSLManual-TableofContents.htm create mode 100644 IDE/MDK5-ARM/Docs/CyaSSLManual-wolfCryptUsageReference.htm create mode 100644 IDE/MDK5-ARM/MDK-ARM/CyaSSL/cert_data.c create mode 100644 IDE/MDK5-ARM/MDK-ARM/CyaSSL/cert_data.h create mode 100644 IDE/MDK5-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c create mode 100644 IDE/MDK5-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h create mode 100644 IDE/MDK5-ARM/MDK-ARM/CyaSSL/ssl-dummy.c create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/Abstract.txt create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvoptx create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvprojx create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/CMSIS/RTX_Conf_CM.c create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/Device/STM32F207IG/RTE_Device.h create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/Device/STM32F207IG/startup_stm32f2xx.s create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/Device/STM32F207IG/system_stm32f2xx.c create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/File_System/FS_Config.c create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/File_System/FS_Config_MC_0.h create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/RTE_Components.h create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/STM32_SWO.ini create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/benchmark.c create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/main.c create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/Abstract.txt create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/CryptTest.uvoptx create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/CryptTest.uvprojx create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/RTE/CMSIS/RTX_Conf_CM.c create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/RTE/Device/STM32F207IG/RTE_Device.h create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/RTE/Device/STM32F207IG/startup_stm32f2xx.s create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/RTE/Device/STM32F207IG/system_stm32f2xx.c create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/RTE/File_System/FS_Config.c create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/RTE/File_System/FS_Config_MC_0.h create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/RTE/RTE_Components.h create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/STM32_SWO.ini create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/main.c create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/test.c create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/Abstract.txt create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvguix.kojo create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvoptx create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvprojx create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full_CyaSSL-Full.dep create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/Object/CyaSSL-Full.build_log.htm create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/CMSIS/RTX_Conf_CM.c create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Device/STM32F207IG/RTE_Device.h create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Device/STM32F207IG/startup_stm32f2xx.s create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Device/STM32F207IG/system_stm32f2xx.c create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/File_System/FS_Config.c create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/File_System/FS_Config_MC_0.h create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config.c create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_BSD.h create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_DNS_Client.h create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_ETH_0.h create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_TCP.h create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_UDP.h create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Debug.c create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/RTE_Components.h create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/STM32_SWO.ini create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/benchmark.c create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/cert_data.c create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/echoclient.c create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/echoserver.c create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/main.c create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/shell.c create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/Abstract.txt create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/EchoClient.uvoptx create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/EchoClient.uvprojx create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/CMSIS/RTX_Conf_CM.c create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/Device/STM32F207IG/RTE_Device.h create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/Device/STM32F207IG/startup_stm32f2xx.s create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/Device/STM32F207IG/system_stm32f2xx.c create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/File_System/FS_Config.c create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/File_System/FS_Config_MC_0.h create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config.c create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_BSD.h create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_DNS_Client.h create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_ETH_0.h create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_TCP.h create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_UDP.h create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Debug.c create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/RTE_Components.h create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/STM32_SWO.ini create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/echoclient.c create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/main.c create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/Abstract.txt create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/EchoServer.uvoptx create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/EchoServer.uvprojx create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/CMSIS/RTX_Conf_CM.c create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/Device/STM32F207IG/RTE_Device.h create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/Device/STM32F207IG/startup_stm32f2xx.s create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/Device/STM32F207IG/system_stm32f2xx.c create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/File_System/FS_Config.c create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/File_System/FS_Config_MC_0.h create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config.c create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_BSD.h create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_DNS_Client.h create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_ETH_0.h create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_TCP.h create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_UDP.h create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Debug.c create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/RTE_Components.h create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/STM32_SWO.ini create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/echoserver.c create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/main.c create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/Abstract.txt create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/CMSIS/RTX_Conf_CM.c create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/Device/STM32F207IG/RTE_Device.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/Device/STM32F207IG/startup_stm32f2xx.s create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/Device/STM32F207IG/system_stm32f2xx.c create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/File_System/FS_Config.c create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/File_System/FS_Config_MC_0.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config.c create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_BSD.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_DNS_Client.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_ETH_0.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_TCP.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_UDP.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Debug.c create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/RTE_Components.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/STM32_SWO.ini create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/SimpleClient.uvoptx create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/client.c create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/main.c create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/simpleClient.uvprojx create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/Abstract.txt create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/CMSIS/RTX_Conf_CM.c create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/Device/STM32F207IG/RTE_Device.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/Device/STM32F207IG/startup_stm32f2xx.s create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/Device/STM32F207IG/system_stm32f2xx.c create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/File_System/FS_Config.c create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/File_System/FS_Config_MC_0.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config.c create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_BSD.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_DNS_Client.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_ETH_0.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_TCP.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_UDP.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Debug.c create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/RTE_Components.h create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/STM32_SWO.ini create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/SimpleServer.uvoptx create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/SimpleServer.uvprojx create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/main.c create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/server.c create mode 100644 IDE/MDK5-ARM/STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c create mode 100644 IDE/MDK5-ARM/wolfSSL.CyaSSL.pdsc diff --git a/IDE/MDK5-ARM/Docs/CyaSSLManual-TableofContents.htm b/IDE/MDK5-ARM/Docs/CyaSSLManual-TableofContents.htm new file mode 100644 index 000000000..2f90e2972 --- /dev/null +++ b/IDE/MDK5-ARM/Docs/CyaSSLManual-TableofContents.htm @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/IDE/MDK5-ARM/Docs/CyaSSLManual-wolfCryptUsageReference.htm b/IDE/MDK5-ARM/Docs/CyaSSLManual-wolfCryptUsageReference.htm new file mode 100644 index 000000000..d860715fd --- /dev/null +++ b/IDE/MDK5-ARM/Docs/CyaSSLManual-wolfCryptUsageReference.htm @@ -0,0 +1 @@ + diff --git a/IDE/MDK5-ARM/MDK-ARM/CyaSSL/cert_data.c b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/cert_data.c new file mode 100644 index 000000000..398d85c70 --- /dev/null +++ b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/cert_data.c @@ -0,0 +1,28 @@ +/* certs_test.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +/* Define initial data for cert buffers */ +#include + diff --git a/IDE/MDK5-ARM/MDK-ARM/CyaSSL/cert_data.h b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/cert_data.h new file mode 100644 index 000000000..6629ee051 --- /dev/null +++ b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/cert_data.h @@ -0,0 +1,39 @@ +#ifndef CYASSL_CERT_DATA_H +#define CYASSL_CERT_DATA_H + +#ifdef USE_CERT_BUFFERS_1024 +extern const unsigned char client_key_der_1024[] ; +extern int sizeof_client_key_der_1024 ; +/* ./certs/1024/client-cert.der, 1024-bit */ +extern const unsigned char client_cert_der_1024[] ; +extern int sizeof_client_cert_der_1024 ; +/* ./certs/1024/dh1024.der, 1024-bit */ +extern const unsigned char dh_key_der_1024[] ; +extern int sizeof_dh_key_der_1024 ; +/* ./certs/1024/dsa1024.der, 1024-bit */ +extern const unsigned char dsa_key_der_1024[] ; +extern int sizeof_dsa_key_der_1024 ; +/* ./certs/1024/rsa1024.der, 1024-bit */ +extern const unsigned char rsa_key_der_1024[] ; +extern int sizeof_rsa_key_der_1024 ; + +#elif defined(USE_CERT_BUFFERS_2048) +/* ./certs/client-key.der, 2048-bit */ +extern const unsigned char client_key_der_2048[] ; +extern int sizeof_client_key_der_2048 ; +/* ./certs/client-cert.der, 2048-bit */ +extern const unsigned char client_cert_der_2048[] ; +extern int sizeof_client_cert_der_2048 ; +/* ./certs/dh2048.der, 2048-bit */ +extern const unsigned char dh_key_der_2048[] ; +extern int sizeof_dh_key_der_2048 ; +/* ./certs/dsa2048.der, 2048-bit */ +extern const unsigned char dsa_key_der_2048[] ; +extern int sizeof_dsa_key_der_2048; +/* ./certs/rsa2048.der, 2048-bit */ +extern const unsigned char rsa_key_der_2048[] ; +extern int sizeof_rsa_key_der_2048 ; +#endif + +#endif + diff --git a/IDE/MDK5-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c new file mode 100644 index 000000000..53747afae --- /dev/null +++ b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c @@ -0,0 +1,247 @@ +/* cyassl_KEIL_RL.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + + +/***************************************************************************************/ +/** This file is for defining functions for specific to KEIL-RL. **/ +/***************************************************************************************/ +#ifdef HAVE_CONFIG_H + #include +#endif + +#include +#if defined (CYASSL_MDK5) + #include "cmsis_os.h" + #if defined(CYASSL_KEIL_TCP_NET) + #include "rl_net.h" + #endif +#else + #include +#endif + +#include "cyassl_MDK_ARM.h" + +#include +#include + +#if defined (CYASSL_CMSIS_RTOS) + #define os_dly_wait(t) osDelay(10*t) +#endif + + +/** KEIL-RL TCPnet ****/ +/** TCPnet BSD socket does not have following functions. **/ + +#if defined(CYASSL_KEIL_TCP_NET) +char *inet_ntoa(struct in_addr in) +{ + #define NAMESIZE 16 + static char name[NAMESIZE] ; + sprintf(name, "%d.%d.%d.%d", (in.s_addr>>24)&0xff, (in.s_addr>>16)&0xff, (in.s_addr>>8)&0xff, in.s_addr&0xff) ; + return name ; +} + +unsigned long inet_addr(const char *cp) +{ + unsigned int a[4] ; unsigned long ret ; + sscanf(cp, "%d.%d.%d.%d", &a[0], &a[1], &a[2], &a[3]) ; + ret = ((a[3]<<24) + (a[2]<<16) + (a[1]<<8) + a[0]) ; + return(ret) ; +} + + +/*** tcp_connect is actually associated with following syassl_tcp_connect. ***/ +int Cyassl_connect(int sd, const struct sockaddr* sa, int sz) +{ + int ret = 0 ; + #if defined(CYASSL_KEIL_TCP_NET) + + SOCKADDR_IN addr ; + + addr = *(SOCKADDR_IN *)sa ; + + do { + #undef connect /* Go to KEIL TCPnet connect */ + ret = connect(sd, (SOCKADDR *)&addr, sizeof(addr)) ; + os_dly_wait(50); + } while(ret == SCK_EWOULDBLOCK) ; + #ifdef DEBUG_CYASSL + { + char msg[50] ; + sprintf(msg, "BSD Connect return code: %d\n", ret) ; + CYASSL_MSG(msg) ; + } + #endif + + #endif /* CYASSL_KEIL_TCP_NET */ + return(ret ) ; +} + + +int Cyassl_accept(int sd, struct sockaddr *addr, int *addrlen) +{ + int ret = 0 ; + + #if defined(CYASSL_KEIL_TCP_NET) + while(1) { + #undef accept /* Go to KEIL TCPnet accept */ + ret = accept(sd, addr, addrlen) ; + if(ret != SCK_EWOULDBLOCK) break ; + os_dly_wait(1); + } + #ifdef DEBUG_CYASSL + { + char msg[50] ; + sprintf(msg, "BSD Accept return code: %d\n", ret) ; + CYASSL_MSG(msg) ; + } + #endif + + #endif /* CYASSL_KEIL_TCP_NET */ + return(ret ) ; + +} + +int Cyassl_recv(int sd, void *buf, size_t len, int flags) +{ + int ret = 0; + #if defined(CYASSL_KEIL_TCP_NET) + while(1) { + #undef recv /* Go to KEIL TCPnet recv */ + ret = recv(sd, buf, len, flags) ; + if((ret != SCK_EWOULDBLOCK) &&( ret != SCK_ETIMEOUT)) break ; + os_dly_wait(1); + } + #ifdef DEBUG_CYASSL + { + char msg[50] ; + sprintf(msg, "BSD Recv return code: %d\n", ret) ; + CYASSL_MSG(msg) ; + } + #endif + + #endif /* CYASSL_KEIL_TCP_NET */ + return(ret ) ; +} + +int Cyassl_send(int sd, const void *buf, size_t len, int flags) +{ + int ret = 0 ; + + #if defined(CYASSL_KEIL_TCP_NET) + while(1) { + #undef send /* Go to KEIL TCPnet send */ + ret = send(sd, buf, len, flags) ; + if(ret != SCK_EWOULDBLOCK) break ; + os_dly_wait(1); + } + #ifdef DEBUG_CYASSL + { + char msg[50] ; + sprintf(msg, "BSD Send return code: %d\n", ret) ; + CYASSL_MSG(msg) ; + } + #endif + +#endif /* CYASSL_KEIL_TCP_NET */ + return(ret) ; + +} + +#endif /* CYASSL_KEIL_TCP_NET */ + +#if defined(CYASSL_KEIL_TCP_NET) +void Cyassl_sleep(int t) +{ + #if defined(HAVE_KEIL_RTX) + os_dly_wait(t/1000+1) ; + #endif +} + +int Cyassl_tcp_select(int sd, int timeout) +{ + + return 0 ; + +} +#endif + +extern int strlen(const char *s) ; + +FILE * CyaSSL_fopen(const char *name, const char *openmode) +{ + int i ; FILE * ret ; + #define PATHSIZE 100 + char path[PATHSIZE] ; char *p ; + + if(strlen(name) > PATHSIZE)return(NULL) ; + + for(i = 0; i<= strlen(name); i++) { + if(name[i] == '/')path[i] = '\\' ; + else path[i] = name[i] ; + } + if(path[0] == '.' && path[1] == '\\') p = path + 2 ; + else p = path ; + + ret = fopen (p, openmode) ; + + return(ret) ; +} + +#if defined (CYASSL_MDK5) +#define getkey getchar +#define sendchar putchar +#else +extern int getkey(void) ; +extern int sendchar(int c) ; +#endif + +char * Cyassl_fgets ( char * str, int num, FILE * f ) +{ + int i ; + + for(i = 0 ; i< num ; i++) { + while((str[i] = getkey()) == 0) { + #if defined (HAVE_KEIL_RTX) && !defined(CYASSL_CMSIS_RTOS) + os_tsk_pass (); + #else + osThreadYield (); + #endif + } + if(str[i] == '\n' || str[i] == '\012' || str[i] == '\015') { + sendchar('\n') ; + str[i++] = '\n' ; + str[i] = '\0' ; + break ; + } else if(str[i] == '\010') { /* BS */ + if(i) { /* erace one char */ + sendchar('\010') ; sendchar(' ') ; sendchar('\010') ; + i = (i>0 ? (i-2) : -1 ) ; + continue ; + } + } else if(str[i] == '\033' || str[i] == '\004' ) { /* ESC or ^D */ + str[i] = '\0' ; + return(0) ; + } + sendchar(str[i]) ; + } + return(str) ; +} diff --git a/IDE/MDK5-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h new file mode 100644 index 000000000..51f3c901d --- /dev/null +++ b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h @@ -0,0 +1,106 @@ +/* cyassl_KEIL_RL.h + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +/******************************************************************************/ +/** This file is for defining types, values for specific to KEIL-MDK-ARM. **/ +/******************************************************************************/ +#ifndef CYASSL_KEIL_RL_H +#define CYASSL_KEIL_RL_H + + + +#include + +/* Go to STDIN */ +#define fgets(buff, sz, fd) Cyassl_fgets(buff, sz, fd) +extern char * Cyassl_fgets ( char * str, int num, FILE * f ) ; + +#define SOCKET_T int + +/*** #include ***/ +#define NUMBITSPERBYTE 8 +#define FD_SETSIZE 10 + +typedef long fd_mask; +#define NFDBITS (sizeof(fd_mask) * NUMBITSPERBYTE) /* bits per mask */ + +typedef struct fd_set { + fd_mask fds_bits[(FD_SETSIZE + NFDBITS - 1) / NFDBITS]; +} fd_set; + +/*** #include ***/ +struct timeval { + long tv_sec; /* seconds */ + long tv_usec; /* microseconds */ +}; + + +#if defined(CYASSL_KEIL_TCP_NET) + + +#if defined(CYASSL_MDK5) +#define SCK_EWOULDBLOCK BSD_ERROR_WOULDBLOCK +#define SCK_ETIMEOUT BSD_ERROR_TIMEOUT +#include "rl_net.h" +#endif + +typedef int socklen_t ; + +/* for avoiding conflict with KEIL-TCPnet BSD socket */ +/* Bodies are in cyassl_KEIL_RL.c */ +#define connect Cyassl_connect +#define accept Cyassl_accept +#define recv Cyassl_recv +#define send Cyassl_send +#define sleep Cyassl_sleep + +/* for avoiding conflicting with KEIL-TCPnet TCP socket */ +/* Bodies are in test.h */ +#define tcp_connect Cyassl_tcp_connect +#define tcp_socket Cyassl_tcp_soket +#define tcp_listen Cyassl_tcp_listen +#define tcp_select Cyassl_tcp_select + +extern int Cyassl_connect(int sd, const struct sockaddr * sa, int sz) ; +extern int Cyassl_accept(int sd, struct sockaddr *addr, socklen_t *addrlen); +extern int Cyassl_recv(int sd, void *buf, size_t len, int flags); +extern int Cyassl_send(int sd, const void *buf, size_t len, int flags); +extern void Cyassl_sleep(int sec) ; +extern int Cyassl_tcp_select(int sd, int timeout) ; + +/** KEIL-RL TCPnet ****/ +/* TCPnet BSD socket does not have following functions. */ +extern char *inet_ntoa(struct in_addr in); +extern unsigned long inet_addr(const char *cp); +extern int setsockopt(int sockfd, int level, int optname, + const void *optval, socklen_t optlen); +extern int select(int nfds, fd_set *readfds, fd_set *writefds, + fd_set *exceptfds, const struct timeval *timeout); + +#endif /* CYASSL_KEIL_TCP_NET */ + + +/* CyaSSL MDK-ARM time functions */ +#include +struct tm *Cyassl_MDK_gmtime(const time_t *c) ; +extern double current_time(void) ; + +#endif /* CYASSL_KEIL_RL_H */ diff --git a/IDE/MDK5-ARM/MDK-ARM/CyaSSL/ssl-dummy.c b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/ssl-dummy.c new file mode 100644 index 000000000..88110ce98 --- /dev/null +++ b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/ssl-dummy.c @@ -0,0 +1,52 @@ +/* ssl-dummy.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +#include +#include + +Signer* GetCA(void* vp, byte* hash) +{ + return NULL ; +} + +int CyaSSL_dtls(CYASSL* ssl) +{ + return NULL ; +} + +int CyaSSL_get_using_nonblock(CYASSL* ssl) +{ + return NULL ; +} + +Signer* GetCAByName(void* vp, byte* hash) +{ + return NULL ; +} + +int CyaSSL_PemCertToDer(const char* fileName, unsigned char* derBuf, int derSz) +{ + return NULL ; +} diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/Abstract.txt b/IDE/MDK5-ARM/Projects/CryptBenchmark/Abstract.txt new file mode 100644 index 000000000..e19c56403 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/Abstract.txt @@ -0,0 +1,15 @@ +This program is a simple benchmark of wolfCrypt library. + +In order to run this benchmark, copy +{PACK}\wolfSSL\CyaSSL\2.8.0\cyassl\certs folder and files to the SD memory. + +For benchmark configuration, refer config-Crypt.h. + +For the hardware crypt on config-Crypt.h, download +STSW-STM32062: STM32F2xx standard peripherals library at +http://www.st.com/. Copy Libraries\STM32F2xx_StdPeriph_Driver\{inc,src} to + {PACK}\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib + +Support +------- +Please send questions or comments to support@wolfssl.com diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvoptx b/IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvoptx new file mode 100644 index 000000000..6feae1d74 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvoptx @@ -0,0 +1,1094 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + CryptBenchmark + 0x4 + ARM-ADS + + 120000000 + + 1 + 1 + 0 + 1 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Object\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM3 + SARMCM3.DLL + -REMAP -MPU + TCM.DLL + -pCM3 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 8 + + + + + + + + + + .\STM32_SWO.ini + BIN\ULP2CM3.DLL + + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + ULP2CM3 + -UP1135060 -O206 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO19 -TC120000000 -TP18 -TDX0 -TDD0 -TDS8000 -TDT0 -TDC1F -TIE1 -TIP1 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024.flm -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm) + + + 0 + DLGUARM + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm)) + + + + + + 1 + 8 + 0x20000408 + + + + + 2 + 8 + 0x8004dc8 + + + + 0 + + + 0 + 0 + 1 + 0 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 32 + 0 + 0 + 0 + 0 + .\benchmark.c + benchmark.c + 0 + 0 + + + + + Configuration + 1 + 0 + 0 + 0 + + 2 + 3 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\RTE\wolfSSL\config-Crypt.h + config-Crypt.h + 0 + 0 + + + + + Documentation + 1 + 0 + 0 + 0 + + 3 + 4 + 5 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + .\Abstract.txt + Abstract.txt + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + 4 + 5 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib + RTX_CM3.lib + 1 + 0 + + + 4 + 6 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\CMSIS\RTX_Conf_CM.c + RTX_Conf_CM.c + 1 + 0 + + + + + ::Device + 0 + 0 + 0 + 1 + + 5 + 7 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c + DMA_STM32F2xx.c + 1 + 0 + + + 5 + 8 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c + GPIO_STM32F2xx.c + 1 + 0 + + + 5 + 9 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Device\STM32F207IG\RTE_Device.h + RTE_Device.h + 1 + 0 + + + 5 + 10 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Device\STM32F207IG\startup_stm32f2xx.s + startup_stm32f2xx.s + 1 + 0 + + + 5 + 11 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Device\STM32F207IG\system_stm32f2xx.c + system_stm32f2xx.c + 1 + 0 + + + + + ::Drivers + 0 + 0 + 0 + 1 + + 6 + 12 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c + MCI_STM32F2xx.c + 1 + 0 + + + + + ::File System + 0 + 0 + 0 + 1 + + 7 + 13 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib + FS_LFN_CM3_L.lib + 1 + 0 + + + 7 + 14 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\File_System\FS_Config.c + FS_Config.c + 1 + 0 + + + 7 + 15 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\File_System\FS_Config_MC_0.h + FS_Config_MC_0.h + 1 + 0 + + + + + ::wolfSSL + 0 + 0 + 0 + 1 + + 8 + 16 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c + cyassl_MDK_ARM.c + 1 + 0 + + + 8 + 17 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\ssl-dummy.c + ssl-dummy.c + 1 + 0 + + + 8 + 18 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c + time-STM32F2xx.c + 1 + 0 + + + 8 + 19 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c + aes.c + 1 + 0 + + + 8 + 20 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c + arc4.c + 1 + 0 + + + 8 + 21 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c + asm.c + 1 + 0 + + + 8 + 22 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c + asn.c + 1 + 0 + + + 8 + 23 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c + blake2b.c + 1 + 0 + + + 8 + 24 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c + camellia.c + 1 + 0 + + + 8 + 25 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c + coding.c + 1 + 0 + + + 8 + 26 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c + compress.c + 1 + 0 + + + 8 + 27 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c + des3.c + 1 + 0 + + + 8 + 28 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c + dh.c + 1 + 0 + + + 8 + 29 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c + dsa.c + 1 + 0 + + + 8 + 30 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c + ecc.c + 1 + 0 + + + 8 + 31 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c + ecc_fp.c + 1 + 0 + + + 8 + 32 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c + error.c + 1 + 0 + + + 8 + 33 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c + hc128.c + 1 + 0 + + + 8 + 34 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c + hmac.c + 1 + 0 + + + 8 + 35 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c + integer.c + 1 + 0 + + + 8 + 36 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c + logging.c + 1 + 0 + + + 8 + 37 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c + md2.c + 1 + 0 + + + 8 + 38 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c + md4.c + 1 + 0 + + + 8 + 39 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c + md5.c + 1 + 0 + + + 8 + 40 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c + memory.c + 1 + 0 + + + 8 + 41 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c + misc.c + 1 + 0 + + + 8 + 42 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c + pwdbased.c + 1 + 0 + + + 8 + 43 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c + rabbit.c + 1 + 0 + + + 8 + 44 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c + random.c + 1 + 0 + + + 8 + 45 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c + ripemd.c + 1 + 0 + + + 8 + 46 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c + rsa.c + 1 + 0 + + + 8 + 47 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c + sha.c + 1 + 0 + + + 8 + 48 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c + sha256.c + 1 + 0 + + + 8 + 49 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c + sha512.c + 1 + 0 + + + 8 + 50 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c + tfm.c + 1 + 0 + + + 8 + 51 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\wolfSSL\config-Crypt.h + config-Crypt.h + 1 + 0 + + + 8 + 52 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\wolfSSL\config.h + config.h + 1 + 0 + + + + diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvprojx b/IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvprojx new file mode 100644 index 000000000..d100a9f3c --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvprojx @@ -0,0 +1,919 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + CryptBenchmark + 0x4 + ARM-ADS + + + STM32F207IG + STMicroelectronics + IRAM(0x20000000,0x20000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M3") CLOCK(120000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm)) + 0 + $$Device:STM32F207IG$Device\Include\stm32f2xx.h + + + + + + + + + + $$Device:STM32F207IG$SVD\STM32F20x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Object\ + CryptBenchmark + 1 + 0 + 0 + 1 + 1 + .\Object\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM3 + SARMCM3.DLL + -REMAP -MPU + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + + 0 + 8 + + + + + + + + + + + + + .\STM32_SWO.ini + BIN\ULP2CM3.DLL + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 1 + BIN\ULP2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + HAVE_CONFIG_H MDK_CONF_Benchmark CYASSL_STM32F2xx + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + Source + + + main.c + 1 + .\main.c + + + benchmark.c + 1 + .\benchmark.c + + + + + Configuration + + + config-Crypt.h + 5 + .\RTE\wolfSSL\config-Crypt.h + + + + + Documentation + + + Abstract.txt + 5 + .\Abstract.txt + + + + + ::CMSIS + + + RTX_CM3.lib + 4 + C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib + + + RTX_Conf_CM.c + 1 + RTE\CMSIS\RTX_Conf_CM.c + + + + + ::Device + + + DMA_STM32F2xx.c + 1 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c + + + GPIO_STM32F2xx.c + 1 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c + + + RTE_Device.h + 5 + RTE\Device\STM32F207IG\RTE_Device.h + + + startup_stm32f2xx.s + 2 + RTE\Device\STM32F207IG\startup_stm32f2xx.s + + + system_stm32f2xx.c + 1 + RTE\Device\STM32F207IG\system_stm32f2xx.c + + + + + ::Drivers + + + MCI_STM32F2xx.c + 1 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c + + + + + ::File System + + + FS_LFN_CM3_L.lib + 4 + C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib + + + FS_Config.c + 1 + RTE\File_System\FS_Config.c + + + FS_Config_MC_0.h + 5 + RTE\File_System\FS_Config_MC_0.h + + + + + ::wolfSSL + + + cyassl_MDK_ARM.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c + + + ssl-dummy.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\ssl-dummy.c + + + time-STM32F2xx.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c + + + aes.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c + + + arc4.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c + + + asm.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c + + + asn.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c + + + blake2b.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c + + + camellia.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c + + + coding.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c + + + compress.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c + + + des3.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c + + + dh.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c + + + dsa.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c + + + ecc.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c + + + ecc_fp.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c + + + error.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c + + + hc128.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c + + + hmac.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c + + + integer.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c + + + logging.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c + + + md2.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c + + + md4.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c + + + md5.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c + + + memory.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c + + + misc.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c + + + pwdbased.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c + + + rabbit.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c + + + random.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c + + + ripemd.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c + + + rsa.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c + + + sha.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c + + + sha256.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c + + + sha512.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c + + + tfm.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c + + + config-Crypt.h + 5 + RTE\wolfSSL\config-Crypt.h + + + config.h + 5 + RTE\wolfSSL\config.h + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\CMSIS\RTX_Conf_CM.c + + + + + + + + RTE\Device\STM32F207IG\RTE_Device.h + + + + + + + + RTE\Device\STM32F207IG\startup_stm32f2xx.s + + + + + + + + RTE\Device\STM32F207IG\system_stm32f2xx.c + + + + + + + + RTE\File_System\FS_Config.c + + + + + + + + RTE\File_System\FS_Config_MC_0.h + + + + + + + + RTE\Network\Net_Config.c + + + + + + RTE\Network\Net_Config_BSD.h + + + + + + RTE\Network\Net_Config_DNS_Client.h + + + + + + RTE\Network\Net_Config_ETH_0.h + + + + + + RTE\Network\Net_Config_TCP.h + + + + + + RTE\Network\Net_Config_UDP.h + + + + + + RTE\Network\Net_Debug.c + + + + + + RTE\Other\config-Crypt.h + + + + + + RTE\Other\config-FS.h + + + + + + RTE\Other\config-RTX-TCP-FS.h + + + + + + RTE\Other\config.h + + + + + + RTE\wolfSSL\config-Crypt.h + + + + + + + + RTE\wolfSSL\config.h + + + + + + + + + + diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/CMSIS/RTX_Conf_CM.c b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/CMSIS/RTX_Conf_CM.c new file mode 100644 index 000000000..af8fdc4d5 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/CMSIS/RTX_Conf_CM.c @@ -0,0 +1,276 @@ +/*---------------------------------------------------------------------------- + * RL-ARM - RTX + *---------------------------------------------------------------------------- + * Name: RTX_Conf_CM.C + * Purpose: Configuration of CMSIS RTX Kernel for Cortex-M + * Rev.: V4.70 + *---------------------------------------------------------------------------- + * + * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + *---------------------------------------------------------------------------*/ + +#include "cmsis_os.h" + + +/*---------------------------------------------------------------------------- + * RTX User configuration part BEGIN + *---------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- +// +// Thread Configuration +// ======================= +// +// Number of concurrent running threads <0-250> +// Defines max. number of threads that will run at the same time. +// Default: 6 +#ifndef OS_TASKCNT + #define OS_TASKCNT 6 +#endif + +// Default Thread stack size [bytes] <64-4096:8><#/4> +// Defines default stack size for threads with osThreadDef stacksz = 0 +// Default: 200 +#ifndef OS_STKSIZE + #define OS_STKSIZE 50 +#endif + +// Main Thread stack size [bytes] <64-10000:8><#/4> +// Defines stack size for main thread. +// Default: 200 +#ifndef OS_MAINSTKSIZE + #define OS_MAINSTKSIZE 1500 +#endif + +// Number of threads with user-provided stack size <0-250> +// Defines the number of threads with user-provided stack size. +// Default: 0 +#ifndef OS_PRIVCNT + #define OS_PRIVCNT 0 +#endif + +// Total stack size [bytes] for threads with user-provided stack size <0-4096:8><#/4> +// Defines the combined stack size for threads with user-provided stack size. +// Default: 0 +#ifndef OS_PRIVSTKSIZE + #define OS_PRIVSTKSIZE 0 +#endif + +// Check for stack overflow +// Includes the stack checking code for stack overflow. +// Note that additional code reduces the Kernel performance. +#ifndef OS_STKCHECK + #define OS_STKCHECK 1 +#endif + +// Processor mode for thread execution +// <0=> Unprivileged mode +// <1=> Privileged mode +// Default: Privileged mode +#ifndef OS_RUNPRIV + #define OS_RUNPRIV 1 +#endif + +// + +// RTX Kernel Timer Tick Configuration +// ====================================== +// Use Cortex-M SysTick timer as RTX Kernel Timer +// Use the Cortex-M SysTick timer as a time-base for RTX. +#ifndef OS_SYSTICK + #define OS_SYSTICK 1 +#endif +// +// Timer clock value [Hz] <1-1000000000> +// Defines the timer clock value. +// Default: 12000000 (12MHz) +#ifndef OS_CLOCK + #define OS_CLOCK 12000000 +#endif + +// Timer tick value [us] <1-1000000> +// Defines the timer tick value. +// Default: 1000 (1ms) +#ifndef OS_TICK + #define OS_TICK 1000 +#endif + +// + +// System Configuration +// ======================= +// +// Round-Robin Thread switching +// =============================== +// +// Enables Round-Robin Thread switching. +#ifndef OS_ROBIN + #define OS_ROBIN 1 +#endif + +// Round-Robin Timeout [ticks] <1-1000> +// Defines how long a thread will execute before a thread switch. +// Default: 5 +#ifndef OS_ROBINTOUT + #define OS_ROBINTOUT 5 +#endif + +// + +// User Timers +// ============== +// Enables user Timers +#ifndef OS_TIMERS + #define OS_TIMERS 1 +#endif + +// Timer Thread Priority +// <1=> Low +// <2=> Below Normal <3=> Normal <4=> Above Normal +// <5=> High +// <6=> Realtime (highest) +// Defines priority for Timer Thread +// Default: High +#ifndef OS_TIMERPRIO + #define OS_TIMERPRIO 5 +#endif + +// Timer Thread stack size [bytes] <64-4096:8><#/4> +// Defines stack size for Timer thread. +// Default: 200 +#ifndef OS_TIMERSTKSZ + #define OS_TIMERSTKSZ 50 +#endif + +// Timer Callback Queue size <1-32> +// Number of concurrent active timer callback functions. +// Default: 4 +#ifndef OS_TIMERCBQS + #define OS_TIMERCBQS 4 +#endif + +// + +// ISR FIFO Queue size<4=> 4 entries <8=> 8 entries +// <12=> 12 entries <16=> 16 entries +// <24=> 24 entries <32=> 32 entries +// <48=> 48 entries <64=> 64 entries +// <96=> 96 entries +// ISR functions store requests to this buffer, +// when they are called from the interrupt handler. +// Default: 16 entries +#ifndef OS_FIFOSZ + #define OS_FIFOSZ 16 +#endif + +// + +//------------- <<< end of configuration section >>> ----------------------- + +// Standard library system mutexes +// =============================== +// Define max. number system mutexes that are used to protect +// the arm standard runtime library. For microlib they are not used. +#ifndef OS_MUTEXCNT + #define OS_MUTEXCNT 8 +#endif + +/*---------------------------------------------------------------------------- + * RTX User configuration part END + *---------------------------------------------------------------------------*/ + +#define OS_TRV ((uint32_t)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1) + + +/*---------------------------------------------------------------------------- + * Global Functions + *---------------------------------------------------------------------------*/ + +/*--------------------------- os_idle_demon ---------------------------------*/ + +void os_idle_demon (void) { + /* The idle demon is a system thread, running when no other thread is */ + /* ready to run. */ + + for (;;) { + /* HERE: include optional user code to be executed when no thread runs.*/ + } +} + +#if (OS_SYSTICK == 0) // Functions for alternative timer as RTX kernel timer + +/*--------------------------- os_tick_init ----------------------------------*/ + +// Initialize alternative hardware timer as RTX kernel timer +// Return: IRQ number of the alternative hardware timer +int os_tick_init (void) { + return (-1); /* Return IRQ number of timer (0..239) */ +} + +/*--------------------------- os_tick_val -----------------------------------*/ + +// Get alternative hardware timer current value (0 .. OS_TRV) +uint32_t os_tick_val (void) { + return (0); +} + +/*--------------------------- os_tick_ovf -----------------------------------*/ + +// Get alternative hardware timer overflow flag +// Return: 1 - overflow, 0 - no overflow +uint32_t os_tick_ovf (void) { + return (0); +} + +/*--------------------------- os_tick_irqack --------------------------------*/ + +// Acknowledge alternative hardware timer interrupt +void os_tick_irqack (void) { + /* ... */ +} + +#endif // (OS_SYSTICK == 0) + +/*--------------------------- os_error --------------------------------------*/ + +void os_error (uint32_t err_code) { + /* This function is called when a runtime error is detected. Parameter */ + /* 'err_code' holds the runtime error code (defined in RTL.H). */ + + /* HERE: include optional code to be executed on runtime error. */ + for (;;); +} + + +/*---------------------------------------------------------------------------- + * RTX Configuration Functions + *---------------------------------------------------------------------------*/ + +#include "RTX_CM_lib.h" + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/ diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/Device/STM32F207IG/RTE_Device.h b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/Device/STM32F207IG/RTE_Device.h new file mode 100644 index 000000000..2648e44d4 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/Device/STM32F207IG/RTE_Device.h @@ -0,0 +1,3127 @@ +/* ----------------------------------------------------------------------------- + * Copyright (C) 2013 ARM Limited. All rights reserved. + * + * $Date: 27. June 2013 + * $Revision: V1.01 + * + * Project: RTE Device Configuration for ST STM32F2xx + * -------------------------------------------------------------------------- */ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +#ifndef __RTE_DEVICE_H +#define __RTE_DEVICE_H + + +#define GPIO_PORT(num) \ + ((num == 0) ? GPIOA : \ + (num == 1) ? GPIOB : \ + (num == 2) ? GPIOC : \ + (num == 3) ? GPIOD : \ + (num == 4) ? GPIOE : \ + (num == 5) ? GPIOF : \ + (num == 6) ? GPIOG : \ + (num == 7) ? GPIOH : \ + (num == 8) ? GPIOI : \ + NULL) + + +// Clock Configuration +// High-speed Internal Clock <1-999999999> +#define RTE_HSI 16000000 +// High-speed External Clock <1-999999999> +#define RTE_HSE 25000000 +// System Clock <1-999999999> +#define RTE_SYSCLK 120000000 +// AHB Clock <1-999999999> +#define RTE_HCLK 120000000 +// APB1 Clock <1-999999999> +#define RTE_PCLK1 30000000 +// APB2 Clock <1-999999999> +#define RTE_PCLK2 60000000 +// 48MHz Clock +#define RTE_PLL48CK 48000000 +// + + +// USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_UART1] +// Configuration settings for Driver_UART1 in component ::Drivers:UART +#define RTE_USART1 0 + +// USART1_TX Pin <0=>PA9 <1=>PB6 +#define RTE_USART1_TX_ID 0 +#if (RTE_USART1_TX_ID == 0) +#define RTE_USART1_TX_PORT GPIOA +#define RTE_USART1_TX_BIT 9 +#elif (RTE_USART1_TX_ID == 1) +#define RTE_USART1_TX_PORT GPIOB +#define RTE_USART1_TX_BIT 6 +#else +#error "Invalid USART1_TX Pin Configuration!" +#endif + +// USART1_RX Pin <0=>PA10 <1=>PB7 +#define RTE_USART1_RX_ID 0 +#if (RTE_USART1_RX_ID == 0) +#define RTE_USART1_RX_PORT GPIOA +#define RTE_USART1_RX_BIT 10 +#elif (RTE_USART1_RX_ID == 1) +#define RTE_USART1_RX_PORT GPIOB +#define RTE_USART1_RX_BIT 7 +#else +#error "Invalid USART1_RX Pin Configuration!" +#endif + +// Synchronous +// USART1_CK Pin <0=>PA8 +// +#define RTE_USART1_CK 0 +#define RTE_USART1_CK_ID 0 +#if (RTE_USART1_CK_ID == 0) +#define RTE_USART1_CK_PORT GPIOA +#define RTE_USART1_CK_BIT 8 +#else +#error "Invalid USART1_CK Pin Configuration!" +#endif + +// Hardware flow control +// USART1_CTS Pin <0=>PA11 +// USART1_RTS Pin <0=>PA12 +// Manual CTS/RTS +// +#define RTE_USART1_HW_FLOW 0 +#define RTE_USART1_CTS_ID 0 +#define RTE_USART1_RTS_ID 0 +#define RTE_USART1_MANUAL_FLOW 0 +#if (RTE_USART1_CTS_ID == 0) +#define RTE_USART1_CTS_PORT GPIOA +#define RTE_USART1_CTS_BIT 11 +#else +#error "Invalid USART1_CTS Pin Configuration!" +#endif +#if (RTE_USART1_RTS_ID == 0) +#define RTE_USART1_RTS_PORT GPIOA +#define RTE_USART1_RTS_BIT 12 +#else +#error "Invalid USART1_RTS Pin Configuration!" +#endif + +// DMA Rx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <2=>2 <5=>5 +// Selects DMA Stream (only Stream 2 or 5 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART1_RX_DMA 1 +#define RTE_USART1_RX_DMA_NUMBER 2 +#define RTE_USART1_RX_DMA_STREAM 2 +#define RTE_USART1_RX_DMA_CHANNEL 4 +#define RTE_USART1_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <7=>7 +// Selects DMA Stream (only Stream 7 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART1_TX_DMA 1 +#define RTE_USART1_TX_DMA_NUMBER 2 +#define RTE_USART1_TX_DMA_STREAM 7 +#define RTE_USART1_TX_DMA_CHANNEL 4 +#define RTE_USART1_TX_DMA_PRIORITY 0 + +// + + +// USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_UART2] +// Configuration settings for Driver_UART2 in component ::Drivers:UART +#define RTE_USART2 0 + +// USART2_TX Pin <0=>PA2 <1=>PD5 +#define RTE_USART2_TX_ID 0 +#if (RTE_USART2_TX_ID == 0) +#define RTE_USART2_TX_PORT GPIOA +#define RTE_USART2_TX_BIT 2 +#elif (RTE_USART2_TX_ID == 1) +#define RTE_USART2_TX_PORT GPIOD +#define RTE_USART2_TX_BIT 5 +#else +#error "Invalid USART2_TX Pin Configuration!" +#endif + +// USART2_RX Pin <0=>PA3 <1=>PD6 +#define RTE_USART2_RX_ID 0 +#if (RTE_USART2_RX_ID == 0) +#define RTE_USART2_RX_PORT GPIOA +#define RTE_USART2_RX_BIT 3 +#elif (RTE_USART2_RX_ID == 1) +#define RTE_USART2_RX_PORT GPIOD +#define RTE_USART2_RX_BIT 6 +#else +#error "Invalid USART2_RX Pin Configuration!" +#endif + +// Synchronous +// USART2_CK Pin <0=>PA4 <1=>PD7 +// +#define RTE_USART2_CK 0 +#define RTE_USART2_CK_ID 0 +#if (RTE_USART2_CK_ID == 0) +#define RTE_USART2_CK_PORT GPIOA +#define RTE_USART2_CK_BIT 4 +#elif (RTE_USART2_CK_ID == 1) +#define RTE_USART2_CK_PORT GPIOD +#define RTE_USART2_CK_BIT 7 +#else +#error "Invalid USART2_CK Pin Configuration!" +#endif + +// Hardware flow control +// USART2_CTS Pin <0=>PA0 <1=>PD3 +// USART2_RTS Pin <0=>PA1 <1=>PD4 +// Manual CTS/RTS +// +#define RTE_USART2_HW_FLOW 0 +#define RTE_USART2_CTS_ID 0 +#define RTE_USART2_RTS_ID 0 +#define RTE_USART2_MANUAL_FLOW 0 +#if (RTE_USART2_CTS_ID == 0) +#define RTE_USART2_CTS_PORT GPIOA +#define RTE_USART2_CTS_BIT 0 +#elif (RTE_USART2_CTS_ID == 1) +#define RTE_USART2_CTS_PORT GPIOD +#define RTE_USART2_CTS_BIT 3 +#else +#error "Invalid USART2_CTS Pin Configuration!" +#endif +#if (RTE_USART2_RTS_ID == 0) +#define RTE_USART2_RTS_PORT GPIOA +#define RTE_USART2_RTS_BIT 1 +#elif (RTE_USART2_RTS_ID == 1) +#define RTE_USART2_RTS_PORT GPIOD +#define RTE_USART2_RTS_BIT 4 +#else +#error "Invalid USART2_RTS Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <5=>5 +// Selects DMA Stream (only Stream 5 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART2_RX_DMA 1 +#define RTE_USART2_RX_DMA_NUMBER 1 +#define RTE_USART2_RX_DMA_STREAM 5 +#define RTE_USART2_RX_DMA_CHANNEL 4 +#define RTE_USART2_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <6=>6 +// Selects DMA Stream (only Stream 6 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART2_TX_DMA 1 +#define RTE_USART2_TX_DMA_NUMBER 1 +#define RTE_USART2_TX_DMA_STREAM 6 +#define RTE_USART2_TX_DMA_CHANNEL 4 +#define RTE_USART2_TX_DMA_PRIORITY 0 + +// + + +// USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_UART3] +// Configuration settings for Driver_UART3 in component ::Drivers:UART +#define RTE_USART3 0 + +// USART3_TX Pin <0=>PB10 <1=>PC10 <2=>PD8 +#define RTE_USART3_TX_ID 0 +#if (RTE_USART3_TX_ID == 0) +#define RTE_USART3_TX_PORT GPIOB +#define RTE_USART3_TX_BIT 10 +#elif (RTE_USART3_TX_ID == 1) +#define RTE_USART3_TX_PORT GPIOC +#define RTE_USART3_TX_BIT 10 +#elif (RTE_USART3_TX_ID == 2) +#define RTE_USART3_TX_PORT GPIOD +#define RTE_USART3_TX_BIT 8 +#else +#error "Invalid USART3_TX Pin Configuration!" +#endif + +// USART3_RX Pin <0=>PB11 <1=>PC11 <2=>PD9 +#define RTE_USART3_RX_ID 0 +#if (RTE_USART3_RX_ID == 0) +#define RTE_USART3_RX_PORT GPIOB +#define RTE_USART3_RX_BIT 11 +#elif (RTE_USART3_RX_ID == 1) +#define RTE_USART3_RX_PORT GPIOC +#define RTE_USART3_RX_BIT 11 +#elif (RTE_USART3_RX_ID == 2) +#define RTE_USART3_RX_PORT GPIOD +#define RTE_USART3_RX_BIT 9 +#else +#error "Invalid USART3_RX Pin Configuration!" +#endif + +// Synchronous +// USART3_CK Pin <0=>PB12 <1=>PC12 <2=>PD10 +// +#define RTE_USART3_CK 0 +#define RTE_USART3_CK_ID 0 +#if (RTE_USART3_CK_ID == 0) +#define RTE_USART3_CK_PORT GPIOB +#define RTE_USART3_CK_BIT 12 +#elif (RTE_USART3_CK_ID == 1) +#define RTE_USART3_CK_PORT GPIOC +#define RTE_USART3_CK_BIT 12 +#elif (RTE_USART3_CK_ID == 2) +#define RTE_USART3_CK_PORT GPIOD +#define RTE_USART3_CK_BIT 10 +#else +#error "Invalid USART3_CK Pin Configuration!" +#endif + +// Hardware flow control +// USART3_CTS Pin <0=>PB13 <1=>PD11 +// USART3_RTS Pin <0=>PB14 <1=>PD12 +// Manual CTS/RTS +// +#define RTE_USART3_HW_FLOW 0 +#define RTE_USART3_CTS_ID 0 +#define RTE_USART3_RTS_ID 0 +#define RTE_USART3_MANUAL_FLOW 0 +#if (RTE_USART3_CTS_ID == 0) +#define RTE_USART3_CTS_PORT GPIOB +#define RTE_USART3_CTS_BIT 13 +#elif (RTE_USART3_CTS_ID == 1) +#define RTE_USART3_CTS_PORT GPIOD +#define RTE_USART3_CTS_BIT 11 +#else +#error "Invalid USART3_CTS Pin Configuration!" +#endif +#if (RTE_USART3_RTS_ID == 0) +#define RTE_USART3_RTS_PORT GPIOB +#define RTE_USART3_RTS_BIT 14 +#elif (RTE_USART3_RTS_ID == 1) +#define RTE_USART3_RTS_PORT GPIOD +#define RTE_USART3_RTS_BIT 12 +#else +#error "Invalid USART3_RTS Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <1=>1 +// Selects DMA Stream (only Stream 1 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART3_RX_DMA 1 +#define RTE_USART3_RX_DMA_NUMBER 1 +#define RTE_USART3_RX_DMA_STREAM 1 +#define RTE_USART3_RX_DMA_CHANNEL 4 +#define RTE_USART3_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <3=>3 +// Selects DMA Stream (only Stream 3 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART3_TX_DMA 1 +#define RTE_USART3_TX_DMA_NUMBER 1 +#define RTE_USART3_TX_DMA_STREAM 3 +#define RTE_USART3_TX_DMA_CHANNEL 4 +#define RTE_USART3_TX_DMA_PRIORITY 0 + +// + + +// UART4 (Universal asynchronous receiver transmitter) [Driver_UART4] +// Configuration settings for Driver_UART4 in component ::Drivers:UART +#define RTE_UART4 0 + +// UART4_TX Pin <0=>PA0 <1=>PC10 +#define RTE_UART4_TX_ID 0 +#if (RTE_UART4_TX_ID == 0) +#define RTE_UART4_TX_PORT GPIOA +#define RTE_UART4_TX_BIT 0 +#elif (RTE_UART4_TX_ID == 1) +#define RTE_UART4_TX_PORT GPIOC +#define RTE_UART4_TX_BIT 10 +#else +#error "Invalid UART4_TX Pin Configuration!" +#endif + +// UART4_RX Pin <0=>PA1 <1=>PC11 +#define RTE_UART4_RX_ID 0 +#if (RTE_UART4_RX_ID == 0) +#define RTE_UART4_RX_PORT GPIOA +#define RTE_UART4_RX_BIT 1 +#elif (RTE_UART4_RX_ID == 1) +#define RTE_UART4_RX_PORT GPIOC +#define RTE_UART4_RX_BIT 11 +#else +#error "Invalid UART4_RX Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <2=>2 +// Selects DMA Stream (only Stream 2 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_UART4_RX_DMA 1 +#define RTE_UART4_RX_DMA_NUMBER 1 +#define RTE_UART4_RX_DMA_STREAM 2 +#define RTE_UART4_RX_DMA_CHANNEL 4 +#define RTE_UART4_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <4=>4 +// Selects DMA Stream (only Stream 4 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_UART4_TX_DMA 1 +#define RTE_UART4_TX_DMA_NUMBER 1 +#define RTE_UART4_TX_DMA_STREAM 4 +#define RTE_UART4_TX_DMA_CHANNEL 4 +#define RTE_UART4_TX_DMA_PRIORITY 0 + +// + + +// UART5 (Universal asynchronous receiver transmitter) [Driver_UART5] +// Configuration settings for Driver_UART5 in component ::Drivers:UART +#define RTE_UART5 0 + +// UART5_TX Pin <0=>PC12 +#define RTE_UART5_TX_ID 0 +#if (RTE_UART5_TX_ID == 0) +#define RTE_UART5_TX_PORT GPIOC +#define RTE_UART5_TX_BIT 12 +#else +#error "Invalid UART5_TX Pin Configuration!" +#endif + +// UART5_RX Pin <0=>PD2 +#define RTE_UART5_RX_ID 0 +#if (RTE_UART5_RX_ID == 0) +#define RTE_UART5_RX_PORT GPIOD +#define RTE_UART5_RX_BIT 2 +#else +#error "Invalid UART5_RX Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <0=>0 +// Selects DMA Stream (only Stream 0 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_UART5_RX_DMA 1 +#define RTE_UART5_RX_DMA_NUMBER 1 +#define RTE_UART5_RX_DMA_STREAM 0 +#define RTE_UART5_RX_DMA_CHANNEL 4 +#define RTE_UART5_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <7=>7 +// Selects DMA Stream (only Stream 7 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_UART5_TX_DMA 1 +#define RTE_UART5_TX_DMA_NUMBER 1 +#define RTE_UART5_TX_DMA_STREAM 7 +#define RTE_UART5_TX_DMA_CHANNEL 4 +#define RTE_UART5_TX_DMA_PRIORITY 0 + +// + + +// USART6 (Universal synchronous asynchronous receiver transmitter) [Driver_UART6] +// Configuration settings for Driver_UART6 in component ::Drivers:UART +#define RTE_USART6 0 + +// USART6_TX Pin <0=>PC6 <1=>PG14 +#define RTE_USART6_TX_ID 0 +#if (RTE_USART6_TX_ID == 0) +#define RTE_USART6_TX_PORT GPIOC +#define RTE_USART6_TX_BIT 6 +#elif (RTE_USART6_TX_ID == 1) +#define RTE_USART6_TX_PORT GPIOG +#define RTE_USART6_TX_BIT 14 +#else +#error "Invalid USART6_TX Pin Configuration!" +#endif + +// USART6_RX Pin <0=>PC7 <1=>PG9 +#define RTE_USART6_RX_ID 0 +#if (RTE_USART6_RX_ID == 0) +#define RTE_USART6_RX_PORT GPIOC +#define RTE_USART6_RX_BIT 7 +#elif (RTE_USART6_RX_ID == 1) +#define RTE_USART6_RX_PORT GPIOG +#define RTE_USART6_RX_BIT 9 +#else +#error "Invalid USART6_RX Pin Configuration!" +#endif + +// Synchronous +// USART6_CK Pin <0=>PC8 <1=>PG7 +// +#define RTE_USART6_CK 0 +#define RTE_USART6_CK_ID 0 +#if (RTE_USART6_CK_ID == 0) +#define RTE_USART6_CK_PORT GPIOC +#define RTE_USART6_CK_BIT 8 +#elif (RTE_USART6_CK_ID == 1) +#define RTE_USART6_CK_PORT GPIOG +#define RTE_USART6_CK_BIT 7 +#else +#error "Invalid USART6_CK Pin Configuration!" +#endif + +// Hardware flow control +// USART6_CTS Pin <0=>PG13 <1=>PG15 +// USART6_RTS Pin <0=>PG8 <1=>PG12 +// Manual CTS/RTS +// +#define RTE_USART6_HW_FLOW 0 +#define RTE_USART6_CTS_ID 0 +#define RTE_USART6_RTS_ID 0 +#define RTE_USART6_MANUAL_FLOW 0 +#if (RTE_USART6_CTS_ID == 0) +#define RTE_USART6_CTS_PORT GPIOG +#define RTE_USART6_CTS_BIT 13 +#elif (RTE_USART6_CTS_ID == 1) +#define RTE_USART6_CTS_PORT GPIOG +#define RTE_USART6_CTS_BIT 15 +#else +#error "Invalid USART6_CTS Pin Configuration!" +#endif +#if (RTE_USART6_RTS_ID == 0) +#define RTE_USART6_RTS_PORT GPIOG +#define RTE_USART6_RTS_BIT 8 +#elif (RTE_USART6_RTS_ID == 1) +#define RTE_USART6_RTS_PORT GPIOG +#define RTE_USART6_RTS_BIT 12 +#else +#error "Invalid USART6_RTS Pin Configuration!" +#endif + +// DMA Rx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <1=>1 <2=>2 +// Selects DMA Stream (only Stream 1 or 2 can be used) +// Channel <5=>5 +// Selects DMA Channel (only Channel 5 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART6_RX_DMA 1 +#define RTE_USART6_RX_DMA_NUMBER 2 +#define RTE_USART6_RX_DMA_STREAM 1 +#define RTE_USART6_RX_DMA_CHANNEL 5 +#define RTE_USART6_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <6=>6 <7=>7 +// Selects DMA Stream (only Stream 6 or 7 can be used) +// Channel <5=>5 +// Selects DMA Channel (only Channel 5 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART6_TX_DMA 1 +#define RTE_USART6_TX_DMA_NUMBER 2 +#define RTE_USART6_TX_DMA_STREAM 6 +#define RTE_USART6_TX_DMA_CHANNEL 5 +#define RTE_USART6_TX_DMA_PRIORITY 0 + +// + + +// I2C1 (Inter-integrated Circuit Interface 1) [Driver_I2C1] +// Configuration settings for Driver_I2C1 in component ::Drivers:I2C +#define RTE_I2C1 0 + +// I2C1_SCL Pin <0=>PB6 <1=>PB8 +#define RTE_I2C1_SCL_PORT_ID 0 +#if (RTE_I2C1_SCL_PORT_ID == 0) +#define RTE_I2C1_SCL_PORT GPIOB +#define RTE_I2C1_SCL_BIT 6 +#elif (RTE_I2C1_SCL_PORT_ID == 1) +#define RTE_I2C1_SCL_PORT GPIOB +#define RTE_I2C1_SCL_BIT 8 +#else +#error "Invalid I2C1_SCL Pin Configuration!" +#endif + +// I2C1_SDA Pin <0=>PB7 <1=>PB9 +#define RTE_I2C1_SDA_PORT_ID 0 +#if (RTE_I2C1_SDA_PORT_ID == 0) +#define RTE_I2C1_SDA_PORT GPIOB +#define RTE_I2C1_SDA_BIT 7 +#elif (RTE_I2C1_SDA_PORT_ID == 1) +#define RTE_I2C1_SDA_PORT GPIOB +#define RTE_I2C1_SDA_BIT 9 +#else +#error "Invalid I2C1_SDA Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <0=>0 <5=>5 +// Selects DMA Stream (only Stream 0 or 5 can be used) +// Channel <1=>1 +// Selects DMA Channel (only Channel 1 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C1_RX_DMA 1 +#define RTE_I2C1_RX_DMA_NUMBER 1 +#define RTE_I2C1_RX_DMA_STREAM 0 +#define RTE_I2C1_RX_DMA_CHANNEL 1 +#define RTE_I2C1_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <6=>6 <7=>7 +// Selects DMA Stream (only Stream 6 or 7 can be used) +// Channel <1=>1 +// Selects DMA Channel (only Channel 1 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C1_TX_DMA 1 +#define RTE_I2C1_TX_DMA_NUMBER 1 +#define RTE_I2C1_TX_DMA_STREAM 6 +#define RTE_I2C1_TX_DMA_CHANNEL 1 +#define RTE_I2C1_TX_DMA_PRIORITY 0 + +// + + +// I2C2 (Inter-integrated Circuit Interface 2) [Driver_I2C2] +// Configuration settings for Driver_I2C2 in component ::Drivers:I2C +#define RTE_I2C2 0 + +// I2C2_SCL Pin <0=>PF1 <1=>PH4 <2=>PB10 +#define RTE_I2C2_SCL_PORT_ID 0 +#if (RTE_I2C2_SCL_PORT_ID == 0) +#define RTE_I2C2_SCL_PORT GPIOF +#define RTE_I2C2_SCL_BIT 1 +#elif (RTE_I2C2_SCL_PORT_ID == 1) +#define RTE_I2C2_SCL_PORT GPIOH +#define RTE_I2C2_SCL_BIT 4 +#elif (RTE_I2C2_SCL_PORT_ID == 2) +#define RTE_I2C2_SCL_PORT GPIOB +#define RTE_I2C2_SCL_BIT 10 +#else +#error "Invalid I2C2_SCL Pin Configuration!" +#endif + +// I2C2_SDA Pin <0=>PF0 <1=>PH5 <2=>PB11 +#define RTE_I2C2_SDA_PORT_ID 0 +#if (RTE_I2C2_SDA_PORT_ID == 0) +#define RTE_I2C2_SDA_PORT GPIOF +#define RTE_I2C2_SDA_BIT 0 +#elif (RTE_I2C2_SDA_PORT_ID == 1) +#define RTE_I2C2_SDA_PORT GPIOH +#define RTE_I2C2_SDA_BIT 5 +#elif (RTE_I2C2_SDA_PORT_ID == 2) +#define RTE_I2C2_SDA_PORT GPIOB +#define RTE_I2C2_SDA_BIT 11 +#else +#error "Invalid I2C2_SCL Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <2=>2 <3=>3 +// Selects DMA Stream (only Stream 2 or 3 can be used) +// Channel <7=>7 +// Selects DMA Channel (only Channel 7 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C2_RX_DMA 1 +#define RTE_I2C2_RX_DMA_NUMBER 1 +#define RTE_I2C2_RX_DMA_STREAM 2 +#define RTE_I2C2_RX_DMA_CHANNEL 7 +#define RTE_I2C2_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <7=>7 +// Selects DMA Stream (only Stream 7 can be used) +// Channel <7=>7 +// Selects DMA Channel (only Channel 1 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C2_TX_DMA 1 +#define RTE_I2C2_TX_DMA_NUMBER 1 +#define RTE_I2C2_TX_DMA_STREAM 7 +#define RTE_I2C2_TX_DMA_CHANNEL 7 +#define RTE_I2C2_TX_DMA_PRIORITY 0 + +// + + +// I2C3 (Inter-integrated Circuit Interface 3) [Driver_I2C3] +// Configuration settings for Driver_I2C3 in component ::Drivers:I2C +#define RTE_I2C3 0 + +// I2C3_SCL Pin <0=>PH7 <1=>PA8 +#define RTE_I2C3_SCL_PORT_ID 0 +#if (RTE_I2C3_SCL_PORT_ID == 0) +#define RTE_I2C3_SCL_PORT GPIOH +#define RTE_I2C3_SCL_BIT 7 +#elif (RTE_I2C3_SCL_PORT_ID == 1) +#define RTE_I2C3_SCL_PORT GPIOA +#define RTE_I2C3_SCL_BIT 8 +#else +#error "Invalid I2C3_SCL Pin Configuration!" +#endif + +// I2C3_SDA Pin <0=>PH8 <1=>PC9 +#define RTE_I2C3_SDA_PORT_ID 0 +#if (RTE_I2C3_SDA_PORT_ID == 0) +#define RTE_I2C3_SDA_PORT GPIOH +#define RTE_I2C3_SDA_BIT 8 +#elif (RTE_I2C3_SDA_PORT_ID == 1) +#define RTE_I2C3_SDA_PORT GPIOC +#define RTE_I2C3_SDA_BIT 9 +#else +#error "Invalid I2C3_SCL Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <2=>2 +// Selects DMA Stream (only Stream 2 can be used) +// Channel <3=>3 +// Selects DMA Channel (only Channel 3 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C3_RX_DMA 1 +#define RTE_I2C3_RX_DMA_NUMBER 1 +#define RTE_I2C3_RX_DMA_STREAM 2 +#define RTE_I2C3_RX_DMA_CHANNEL 3 +#define RTE_I2C3_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <4=>4 +// Selects DMA Stream (only Stream 4 can be used) +// Channel <3=>3 +// Selects DMA Channel (only Channel 3 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C3_TX_DMA 1 +#define RTE_I2C3_TX_DMA_NUMBER 1 +#define RTE_I2C3_TX_DMA_STREAM 4 +#define RTE_I2C3_TX_DMA_CHANNEL 3 +#define RTE_I2C3_TX_DMA_PRIORITY 0 + +// + + +// SPI1 (Serial Peripheral Interface 1) [Driver_SPI1] +// Configuration settings for Driver_SPI1 in component ::Drivers:SPI +#define RTE_SPI1 0 + +// SPI1_NSS Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SPI1_NSS_PIN 1 +#define RTE_SPI1_NSS_PORT GPIO_PORT(0) +#define RTE_SPI1_NSS_BIT 4 + +// SPI1_SCK Pin <0=>PA5 <1=>PB3 +#define RTE_SPI1_SCL_PORT_ID 0 +#if (RTE_SPI1_SCL_PORT_ID == 0) +#define RTE_SPI1_SCL_PORT GPIOA +#define RTE_SPI1_SCL_BIT 5 +#elif (RTE_SPI1_SCL_PORT_ID == 1) +#define RTE_SPI1_SCL_PORT GPIOB +#define RTE_SPI1_SCL_BIT 3 +#else +#error "Invalid SPI1_SCK Pin Configuration!" +#endif + +// SPI1_MISO Pin <0=>PA6 <1=>PB4 +#define RTE_SPI1_MISO_PORT_ID 0 +#if (RTE_SPI1_MISO_PORT_ID == 0) +#define RTE_SPI1_MISO_PORT GPIOA +#define RTE_SPI1_MISO_BIT 6 +#elif (RTE_SPI1_MISO_PORT_ID == 1) +#define RTE_SPI1_MISO_PORT GPIOB +#define RTE_SPI1_MISO_BIT 4 +#else +#error "Invalid SPI1_MISO Pin Configuration!" +#endif + +// SPI1_MOSI Pin <0=>PA7 <1=>PB5 +#define RTE_SPI1_MOSI_PORT_ID 0 +#if (RTE_SPI1_MOSI_PORT_ID == 0) +#define RTE_SPI1_MOSI_PORT GPIOA +#define RTE_SPI1_MOSI_BIT 7 +#elif (RTE_SPI1_MOSI_PORT_ID == 1) +#define RTE_SPI1_MOSI_PORT GPIOB +#define RTE_SPI1_MOSI_BIT 5 +#else +#error "Invalid SPI1_MISO Pin Configuration!" +#endif + +// DMA Rx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <0=>0 <2=>2 +// Selects DMA Stream (only Stream 0 or 2 can be used) +// Channel <3=>3 +// Selects DMA Channel (only Channel 3 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI1_RX_DMA 1 +#define RTE_SPI1_RX_DMA_NUMBER 2 +#define RTE_SPI1_RX_DMA_STREAM 0 +#define RTE_SPI1_RX_DMA_CHANNEL 3 +#define RTE_SPI1_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <3=>3 <5=>5 +// Selects DMA Stream (only Stream 3 or 5 can be used) +// Channel <3=>3 +// Selects DMA Channel (only Channel 3 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI1_TX_DMA 1 +#define RTE_SPI1_TX_DMA_NUMBER 2 +#define RTE_SPI1_TX_DMA_STREAM 5 +#define RTE_SPI1_TX_DMA_CHANNEL 3 +#define RTE_SPI1_TX_DMA_PRIORITY 0 + +// + + +// SPI2 (Serial Peripheral Interface 2) [Driver_SPI2] +// Configuration settings for Driver_SPI2 in component ::Drivers:SPI +#define RTE_SPI2 0 + +// SPI2_NSS Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SPI2_NSS_PIN 1 +#define RTE_SPI2_NSS_PORT GPIO_PORT(1) +#define RTE_SPI2_NSS_BIT 12 + +// SPI2_SCK Pin <0=>PB10 <1=>PB13 <2=>PI1 +#define RTE_SPI2_SCL_PORT_ID 0 +#if (RTE_SPI2_SCL_PORT_ID == 0) +#define RTE_SPI2_SCL_PORT GPIOB +#define RTE_SPI2_SCL_BIT 10 +#elif (RTE_SPI2_SCL_PORT_ID == 1) +#define RTE_SPI2_SCL_PORT GPIOB +#define RTE_SPI2_SCL_BIT 13 +#elif (RTE_SPI2_SCL_PORT_ID == 2) +#define RTE_SPI2_SCL_PORT GPIOI +#define RTE_SPI2_SCL_BIT 1 +#else +#error "Invalid SPI2_SCK Pin Configuration!" +#endif + +// SPI2_MISO Pin <0=>PB14 <1=>PC2 <2=>PI2 +#define RTE_SPI2_MISO_PORT_ID 0 +#if (RTE_SPI2_MISO_PORT_ID == 0) +#define RTE_SPI2_MISO_PORT GPIOB +#define RTE_SPI2_MISO_BIT 14 +#elif (RTE_SPI2_MISO_PORT_ID == 1) +#define RTE_SPI2_MISO_PORT GPIOC +#define RTE_SPI2_MISO_BIT 2 +#elif (RTE_SPI2_MISO_PORT_ID == 2) +#define RTE_SPI2_MISO_PORT GPIOI +#define RTE_SPI2_MISO_BIT 2 +#else +#error "Invalid SPI2_MISO Pin Configuration!" +#endif + +// SPI2_MOSI Pin <0=>PB15 <1=>PC3 <2=>OI3 +#define RTE_SPI2_MOSI_PORT_ID 0 +#if (RTE_SPI2_MOSI_PORT_ID == 0) +#define RTE_SPI2_MOSI_PORT GPIOB +#define RTE_SPI2_MOSI_BIT 15 +#elif (RTE_SPI2_MOSI_PORT_ID == 1) +#define RTE_SPI2_MOSI_PORT GPIOC +#define RTE_SPI2_MOSI_BIT 3 +#elif (RTE_SPI2_MOSI_PORT_ID == 2) +#define RTE_SPI2_MOSI_PORT GPIOI +#define RTE_SPI2_MOSI_BIT 3 +#else +#error "Invalid SPI2_MISO Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <2=>2 +// Selects DMA Stream (only Stream 2 can be used) +// Channel <0=>0 +// Selects DMA Channel (only Channel 0 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI2_RX_DMA 1 +#define RTE_SPI2_RX_DMA_NUMBER 1 +#define RTE_SPI2_RX_DMA_STREAM 2 +#define RTE_SPI2_RX_DMA_CHANNEL 0 +#define RTE_SPI2_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <3=>3 +// Selects DMA Stream (only Stream 3 can be used) +// Channel <0=>0 +// Selects DMA Channel (only Channel 0 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI2_TX_DMA 1 +#define RTE_SPI2_TX_DMA_NUMBER 1 +#define RTE_SPI2_TX_DMA_STREAM 3 +#define RTE_SPI2_TX_DMA_CHANNEL 0 +#define RTE_SPI2_TX_DMA_PRIORITY 0 + +// + + +// SPI3 (Serial Peripheral Interface 3) [Driver_SPI3] +// Configuration settings for Driver_SPI3 in component ::Drivers:SPI +#define RTE_SPI3 0 + +// SPI3_NSS Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SPI3_NSS_PIN 1 +#define RTE_SPI3_NSS_PORT GPIO_PORT(0) +#define RTE_SPI3_NSS_BIT 15 + +// SPI3_SCK Pin <0=>PB3 <1=>PC10 +#define RTE_SPI3_SCL_PORT_ID 0 +#if (RTE_SPI3_SCL_PORT_ID == 0) +#define RTE_SPI3_SCL_PORT GPIOB +#define RTE_SPI3_SCL_BIT 3 +#elif (RTE_SPI3_SCL_PORT_ID == 1) +#define RTE_SPI3_SCL_PORT GPIOC +#define RTE_SPI3_SCL_BIT 10 +#else +#error "Invalid SPI3_SCK Pin Configuration!" +#endif + +// SPI3_MISO Pin <0=>PB4 <1=>PC11 +#define RTE_SPI3_MISO_PORT_ID 0 +#if (RTE_SPI3_MISO_PORT_ID == 0) +#define RTE_SPI3_MISO_PORT GPIOB +#define RTE_SPI3_MISO_BIT 4 +#elif (RTE_SPI3_MISO_PORT_ID == 1) +#define RTE_SPI3_MISO_PORT GPIOC +#define RTE_SPI3_MISO_BIT 11 +#else +#error "Invalid SPI3_MISO Pin Configuration!" +#endif + +// SPI3_MOSI Pin <0=>PB5 <1=>PC12 +#define RTE_SPI3_MOSI_PORT_ID 0 +#if (RTE_SPI3_MOSI_PORT_ID == 0) +#define RTE_SPI3_MOSI_PORT GPIOB +#define RTE_SPI3_MOSI_BIT 5 +#elif (RTE_SPI3_MOSI_PORT_ID == 1) +#define RTE_SPI3_MOSI_PORT GPIOC +#define RTE_SPI3_MOSI_BIT 12 +#else +#error "Invalid SPI3_MISO Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <0=>0 <2=>2 +// Selects DMA Stream (only Stream 0 or 2 can be used) +// Channel <0=>0 +// Selects DMA Channel (only Channel 0 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI3_RX_DMA 1 +#define RTE_SPI3_RX_DMA_NUMBER 1 +#define RTE_SPI3_RX_DMA_STREAM 0 +#define RTE_SPI3_RX_DMA_CHANNEL 0 +#define RTE_SPI3_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <5=>5 <7=>7 +// Selects DMA Stream (only Stream 5 or 7 can be used) +// Channel <0=>0 +// Selects DMA Channel (only Channel 0 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI3_TX_DMA 1 +#define RTE_SPI3_TX_DMA_NUMBER 1 +#define RTE_SPI3_TX_DMA_STREAM 5 +#define RTE_SPI3_TX_DMA_CHANNEL 0 +#define RTE_SPI3_TX_DMA_PRIORITY 0 + +// + + +// SDIO (Secure Digital Input/Output) [Driver_MCI0] +// Configuration settings for Driver_MCI0 in component ::Drivers:MCI +#define RTE_SDIO 1 + +// SDIO_CD (Card Detect) Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SDIO_CD_PIN 1 +#define RTE_SDIO_CD_ACTIVE 0 +#define RTE_SDIO_CD_PORT GPIO_PORT(7) +#define RTE_SDIO_CD_BIT 15 + +// SDIO_WP (Write Protect) Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SDIO_WP_PIN 0 +#define RTE_SDIO_WP_ACTIVE 0 +#define RTE_SDIO_WP_PORT GPIO_PORT(7) +#define RTE_SDIO_WP_BIT 16 + +// SDIO Bus +// SDIO_CK Pin <0=>PC12 +#define RTE_SDIO_CK_PORT_ID 0 +#if (RTE_SDIO_CK_PORT_ID == 0) +#define RTE_SDIO_CK_PORT GPIOC +#define RTE_SDIO_CK_PIN 12 +#else +#error "Invalid SDIO_CK Pin Configuration!" +#endif +// SDIO_CMD Pin <0=>PD2 +#define RTE_SDIO_CMD_PORT_ID 0 +#if (RTE_SDIO_CMD_PORT_ID == 0) +#define RTE_SDIO_CMD_PORT GPIOD +#define RTE_SDIO_CMD_PIN 2 +#else +#error "Invalid SDIO_CDM Pin Configuration!" +#endif +// SDIO_D0 Pin <0=>PC8 +#define RTE_SDIO_D0_PORT_ID 0 +#if (RTE_SDIO_D0_PORT_ID == 0) +#define RTE_SDIO_D0_PORT GPIOC +#define RTE_SDIO_D0_PIN 8 +#else +#error "Invalid SDIO_D0 Pin Configuration!" +#endif +// SDIO_D1 Pin <0=>PC9 +#define RTE_SDIO_D1_PORT_ID 0 +#if (RTE_SDIO_D1_PORT_ID == 0) +#define RTE_SDIO_D1_PORT GPIOC +#define RTE_SDIO_D1_PIN 9 +#else +#error "Invalid SDIO_D1 Pin Configuration!" +#endif +// SDIO_D2 Pin <0=>PC10 +#define RTE_SDIO_D2_PORT_ID 0 +#if (RTE_SDIO_D2_PORT_ID == 0) +#define RTE_SDIO_D2_PORT GPIOC +#define RTE_SDIO_D2_PIN 10 +#else +#error "Invalid SDIO_D2 Pin Configuration!" +#endif +// SDIO_D3 Pin <0=>PC11 +#define RTE_SDIO_D3_PORT_ID 0 +#if (RTE_SDIO_D3_PORT_ID == 0) +#define RTE_SDIO_D3_PORT GPIOC +#define RTE_SDIO_D3_PIN 11 +#else +#error "Invalid SDIO_D3 Pin Configuration!" +#endif +// SDIO_D4 Pin <0=>PB8 +#define RTE_SDIO_D4_PORT_ID 0 +#if (RTE_SDIO_D4_PORT_ID == 0) +#define RTE_SDIO_D4_PORT GPIOB +#define RTE_SDIO_D4_PIN 8 +#else +#error "Invalid SDIO_D4 Pin Configuration!" +#endif +// SDIO_D5 Pin <0=>PB9 +#define RTE_SDIO_D5_PORT_ID 0 +#if (RTE_SDIO_D5_PORT_ID == 0) +#define RTE_SDIO_D5_PORT GPIOB +#define RTE_SDIO_D5_PIN 9 +#else +#error "Invalid SDIO_D5 Pin Configuration!" +#endif +// SDIO_D6 Pin <0=>PC6 +#define RTE_SDIO_D6_PORT_ID 0 +#if (RTE_SDIO_D6_PORT_ID == 0) +#define RTE_SDIO_D6_PORT GPIOC +#define RTE_SDIO_D6_PIN 6 +#else +#error "Invalid SDIO_D6 Pin Configuration!" +#endif +// SDIO_D7 Pin <0=>PC7 +#define RTE_SDIO_D7_PORT_ID 0 +#if (RTE_SDIO_D7_PORT_ID == 0) +#define RTE_SDIO_D7_PORT GPIOC +#define RTE_SDIO_D7_PIN 7 +#else +#error "Invalid SDIO_D7 Pin Configuration!" +#endif +// + +// DMA +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <3=>3 <6=>6 +// Selects DMA Stream (only Stream 3 or 6 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SDIO_DMA 1 +#define RTE_SDIO_DMA_NUMBER 2 +#define RTE_SDIO_DMA_STREAM 3 +#define RTE_SDIO_DMA_CHANNEL 4 +#define RTE_SDIO_DMA_PRIORITY 0 + +// + + +// ETH (Ethernet Interface) [Driver_ETH_MAC0] +// Configuration settings for Driver_ETH_MAC0 in component ::Drivers:Ethernet MAC +#define RTE_ETH 0 + +// MII (Media Independent Interface) +#define RTE_ETH_MII 0 + +// ETH_MII_TX_CLK Pin <0=>PC3 +#define RTE_ETH_MII_TX_CLK_PORT_ID 0 +#if (RTE_ETH_MII_TX_CLK_PORT_ID == 0) +#define RTE_ETH_MII_TX_CLK_PORT GPIOC +#define RTE_ETH_MII_TX_CLK_PIN 3 +#else +#error "Invalid ETH_MII_TX_CLK Pin Configuration!" +#endif +// ETH_MII_TXD0 Pin <0=>PB12 <1=>PG13 +#define RTE_ETH_MII_TXD0_PORT_ID 0 +#if (RTE_ETH_MII_TXD0_PORT_ID == 0) +#define RTE_ETH_MII_TXD0_PORT GPIOB +#define RTE_ETH_MII_TXD0_PIN 12 +#elif (RTE_ETH_MII_TXD0_PORT_ID == 1) +#define RTE_ETH_MII_TXD0_PORT GPIOG +#define RTE_ETH_MII_TXD0_PIN 13 +#else +#error "Invalid ETH_MII_TXD0 Pin Configuration!" +#endif +// ETH_MII_TXD1 Pin <0=>PB13 <1=>PG14 +#define RTE_ETH_MII_TXD1_PORT_ID 0 +#if (RTE_ETH_MII_TXD1_PORT_ID == 0) +#define RTE_ETH_MII_TXD1_PORT GPIOB +#define RTE_ETH_MII_TXD1_PIN 13 +#elif (RTE_ETH_MII_TXD1_PORT_ID == 1) +#define RTE_ETH_MII_TXD1_PORT GPIOG +#define RTE_ETH_MII_TXD1_PIN 14 +#else +#error "Invalid ETH_MII_TXD1 Pin Configuration!" +#endif +// ETH_MII_TXD2 Pin <0=>PC2 +#define RTE_ETH_MII_TXD2_PORT_ID 0 +#if (RTE_ETH_MII_TXD2_PORT_ID == 0) +#define RTE_ETH_MII_TXD2_PORT GPIOC +#define RTE_ETH_MII_TXD2_PIN 2 +#else +#error "Invalid ETH_MII_TXD2 Pin Configuration!" +#endif +// ETH_MII_TXD3 Pin <0=>PB8 <1=>PE2 +#define RTE_ETH_MII_TXD3_PORT_ID 0 +#if (RTE_ETH_MII_TXD3_PORT_ID == 0) +#define RTE_ETH_MII_TXD3_PORT GPIOB +#define RTE_ETH_MII_TXD3_PIN 8 +#elif (RTE_ETH_MII_TXD3_PORT_ID == 1) +#define RTE_ETH_MII_TXD3_PORT GPIOE +#define RTE_ETH_MII_TXD3_PIN 2 +#else +#error "Invalid ETH_MII_TXD3 Pin Configuration!" +#endif +// ETH_MII_TX_EN Pin <0=>PB11 <1=>PG11 +#define RTE_ETH_MII_TX_EN_PORT_ID 0 +#if (RTE_ETH_MII_TX_EN_PORT_ID == 0) +#define RTE_ETH_MII_TX_EN_PORT GPIOB +#define RTE_ETH_MII_TX_EN_PIN 11 +#elif (RTE_ETH_MII_TX_EN_PORT_ID == 1) +#define RTE_ETH_MII_TX_EN_PORT GPIOG +#define RTE_ETH_MII_TX_EN_PIN 11 +#else +#error "Invalid ETH_MII_TX_EN Pin Configuration!" +#endif +// ETH_MII_RX_CLK Pin <0=>PA1 +#define RTE_ETH_MII_RX_CLK_PORT_ID 0 +#if (RTE_ETH_MII_RX_CLK_PORT_ID == 0) +#define RTE_ETH_MII_RX_CLK_PORT GPIOA +#define RTE_ETH_MII_RX_CLK_PIN 1 +#else +#error "Invalid ETH_MII_RX_CLK Pin Configuration!" +#endif +// ETH_MII_RXD0 Pin <0=>PC4 +#define RTE_ETH_MII_RXD0_PORT_ID 0 +#if (RTE_ETH_MII_RXD0_PORT_ID == 0) +#define RTE_ETH_MII_RXD0_PORT GPIOC +#define RTE_ETH_MII_RXD0_PIN 4 +#else +#error "Invalid ETH_MII_RXD0 Pin Configuration!" +#endif +// ETH_MII_RXD1 Pin <0=>PC5 +#define RTE_ETH_MII_RXD1_PORT_ID 0 +#if (RTE_ETH_MII_RXD1_PORT_ID == 0) +#define RTE_ETH_MII_RXD1_PORT GPIOC +#define RTE_ETH_MII_RXD1_PIN 5 +#else +#error "Invalid ETH_MII_RXD1 Pin Configuration!" +#endif +// ETH_MII_RXD2 Pin <0=>PB0 <1=>PH6 +#define RTE_ETH_MII_RXD2_PORT_ID 0 +#if (RTE_ETH_MII_RXD2_PORT_ID == 0) +#define RTE_ETH_MII_RXD2_PORT GPIOB +#define RTE_ETH_MII_RXD2_PIN 0 +#elif (RTE_ETH_MII_RXD2_PORT_ID == 1) +#define RTE_ETH_MII_RXD2_PORT GPIOH +#define RTE_ETH_MII_RXD2_PIN 6 +#else +#error "Invalid ETH_MII_RXD2 Pin Configuration!" +#endif +// ETH_MII_RXD3 Pin <0=>PB1 <1=>PH7 +#define RTE_ETH_MII_RXD3_PORT_ID 0 +#if (RTE_ETH_MII_RXD3_PORT_ID == 0) +#define RTE_ETH_MII_RXD3_PORT GPIOB +#define RTE_ETH_MII_RXD3_PIN 1 +#elif (RTE_ETH_MII_RXD3_PORT_ID == 1) +#define RTE_ETH_MII_RXD3_PORT GPIOH +#define RTE_ETH_MII_RXD3_PIN 7 +#else +#error "Invalid ETH_MII_RXD3 Pin Configuration!" +#endif +// ETH_MII_RX_DV Pin <0=>PA7 +#define RTE_ETH_MII_RX_DV_PORT_ID 0 +#if (RTE_ETH_MII_RX_DV_PORT_ID == 0) +#define RTE_ETH_MII_RX_DV_PORT GPIOA +#define RTE_ETH_MII_RX_DV_PIN 7 +#else +#error "Invalid ETH_MII_RX_DV Pin Configuration!" +#endif +// ETH_MII_RX_ER Pin <0=>PB10 <1=>PI10 +#define RTE_ETH_MII_RX_ER_PORT_ID 0 +#if (RTE_ETH_MII_RX_ER_PORT_ID == 0) +#define RTE_ETH_MII_RX_ER_PORT GPIOB +#define RTE_ETH_MII_RX_ER_PIN 10 +#elif (RTE_ETH_MII_RXD3_PORT_ID == 1) +#define RTE_ETH_MII_RX_ER_PORT GPIOI +#define RTE_ETH_MII_RX_ER_PIN 10 +#else +#error "Invalid ETH_MII_RX_ER Pin Configuration!" +#endif +// ETH_MII_CRS Pin <0=>PA0 <1=>PH2 +#define RTE_ETH_MII_CRS_PORT_ID 0 +#if (RTE_ETH_MII_CRS_PORT_ID == 0) +#define RTE_ETH_MII_CRS_PORT GPIOA +#define RTE_ETH_MII_CRS_PIN 0 +#elif (RTE_ETH_MII_CRS_PORT_ID == 1) +#define RTE_ETH_MII_CRS_PORT GPIOH +#define RTE_ETH_MII_CRS_PIN 2 +#else +#error "Invalid ETH_MII_CRS Pin Configuration!" +#endif +// ETH_MII_COL Pin <0=>PA3 <1=>PH3 +#define RTE_ETH_MII_COL_PORT_ID 0 +#if (RTE_ETH_MII_COL_PORT_ID == 0) +#define RTE_ETH_MII_COL_PORT GPIOA +#define RTE_ETH_MII_COL_PIN 3 +#elif (RTE_ETH_MII_COL_PORT_ID == 1) +#define RTE_ETH_MII_COL_PORT GPIOH +#define RTE_ETH_MII_COL_PIN 3 +#else +#error "Invalid ETH_MII_COL Pin Configuration!" +#endif + +// + +// RMII (Reduced Media Independent Interface) +#define RTE_ETH_RMII 1 + +// ETH_RMII_TXD0 Pin <0=>PB12 <1=>PG13 +#define RTE_ETH_RMII_TXD0_PORT_ID 1 +#if (RTE_ETH_RMII_TXD0_PORT_ID == 0) +#define RTE_ETH_RMII_TXD0_PORT GPIOB +#define RTE_ETH_RMII_TXD0_PIN 12 +#elif (RTE_ETH_RMII_TXD0_PORT_ID == 1) +#define RTE_ETH_RMII_TXD0_PORT GPIOG +#define RTE_ETH_RMII_TXD0_PIN 13 +#else +#error "Invalid ETH_RMII_TXD0 Pin Configuration!" +#endif +// ETH_RMII_TXD1 Pin <0=>PB13 <1=>PG14 +#define RTE_ETH_RMII_TXD1_PORT_ID 1 +#if (RTE_ETH_RMII_TXD1_PORT_ID == 0) +#define RTE_ETH_RMII_TXD1_PORT GPIOB +#define RTE_ETH_RMII_TXD1_PIN 13 +#elif (RTE_ETH_RMII_TXD1_PORT_ID == 1) +#define RTE_ETH_RMII_TXD1_PORT GPIOG +#define RTE_ETH_RMII_TXD1_PIN 14 +#else +#error "Invalid ETH_RMII_TXD1 Pin Configuration!" +#endif +// ETH_RMII_TX_EN Pin <0=>PB11 <1=>PG11 +#define RTE_ETH_RMII_TX_EN_PORT_ID 1 +#if (RTE_ETH_RMII_TX_EN_PORT_ID == 0) +#define RTE_ETH_RMII_TX_EN_PORT GPIOB +#define RTE_ETH_RMII_TX_EN_PIN 11 +#elif (RTE_ETH_RMII_TX_EN_PORT_ID == 1) +#define RTE_ETH_RMII_TX_EN_PORT GPIOG +#define RTE_ETH_RMII_TX_EN_PIN 11 +#else +#error "Invalid ETH_RMII_TX_EN Pin Configuration!" +#endif +// ETH_RMII_RXD0 Pin <0=>PC4 +#define RTE_ETH_RMII_RXD0_PORT_ID 0 +#if (RTE_ETH_RMII_RXD0_PORT_ID == 0) +#define RTE_ETH_RMII_RXD0_PORT GPIOC +#define RTE_ETH_RMII_RXD0_PIN 4 +#else +#error "Invalid ETH_RMII_RXD0 Pin Configuration!" +#endif +// ETH_RMII_RXD1 Pin <0=>PC5 +#define RTE_ETH_RMII_RXD1_PORT_ID 0 +#if (RTE_ETH_RMII_RXD1_PORT_ID == 0) +#define RTE_ETH_RMII_RXD1_PORT GPIOC +#define RTE_ETH_RMII_RXD1_PIN 5 +#else +#error "Invalid ETH_RMII_RXD1 Pin Configuration!" +#endif +// ETH_RMII_REF_CLK Pin <0=>PA1 +#define RTE_ETH_RMII_REF_CLK_PORT_ID 0 +#if (RTE_ETH_RMII_REF_CLK_PORT_ID == 0) +#define RTE_ETH_RMII_REF_CLK_PORT GPIOA +#define RTE_ETH_RMII_REF_CLK_PIN 1 +#else +#error "Invalid ETH_RMII_REF_CLK Pin Configuration!" +#endif +// ETH_RMII_CRS_DV Pin <0=>PA7 +#define RTE_ETH_RMII_CRS_DV_PORT_ID 0 +#if (RTE_ETH_RMII_CRS_DV_PORT_ID == 0) +#define RTE_ETH_RMII_CRS_DV_PORT GPIOA +#define RTE_ETH_RMII_CRS_DV_PIN 7 +#else +#error "Invalid ETH_RMII_CRS_DV Pin Configuration!" +#endif + +// + +// Management Data Interface +// ETH_MDC Pin <0=>PC1 +#define RTE_ETH_MDI_MDC_PORT_ID 0 +#if (RTE_ETH_MDI_MDC_PORT_ID == 0) +#define RTE_ETH_MDI_MDC_PORT GPIOC +#define RTE_ETH_MDI_MDC_PIN 1 +#else +#error "Invalid ETH_MDC Pin Configuration!" +#endif +// ETH_MDIO Pin <0=>PA2 +#define RTE_ETH_MDI_MDIO_PORT_ID 0 +#if (RTE_ETH_MDI_MDIO_PORT_ID == 0) +#define RTE_ETH_MDI_MDIO_PORT GPIOA +#define RTE_ETH_MDI_MDIO_PIN 2 +#else +#error "Invalid ETH_MDIO Pin Configuration!" +#endif +// + +// Reference 25MHz/50MHz Clock generation +#define RTE_ETH_REF_CLOCK 0 + +// MCO Pin <0=>PA2 <1=>PC9 +#define RTE_ETH_REF_CLOCK_PORT_ID 0 +#if (RTE_ETH_REF_CLOCK_PORT_ID == 0) +#define RTE_ETH_REF_CLOCK_PORT GPIOA +#define RTE_ETH_REF_CLOCK_PIN 8 +#elif (RTE_ETH_REF_CLOCK_PORT_ID == 1) +#define RTE_ETH_REF_CLOCK_PORT GPIOC +#define RTE_ETH_REF_CLOCK_PIN 9 +#else +#error "Invalid MCO Pin Configuration!" +#endif + +// + +// + + +// USB OTG Full-speed +#define RTE_USB_OTG_FS 0 + +// Device [Driver_USBD0] +// Configuration settings for Driver_USBD0 in component ::Drivers:USB Device +#define RTE_USB_OTG_FS_DEV 1 + +// Endpoints +// Reduce memory requirements of Driver by disabling unused endpoints +// Endpoint 1 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 2 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 3 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// +#define RTE_USB_OTG_FS_DEV_EP 0x0000000F +#define RTE_USB_OTG_FS_DEV_EP_BULK 0x000E000E +#define RTE_USB_OTG_FS_DEV_EP_INT 0x000E000E +#define RTE_USB_OTG_FS_DEV_EP_ISO 0x000E000E + +// + +// Host [Driver_USBH0] +// Configuration settings for Driver_USBH0 in component ::Drivers:USB Host + +#define RTE_USB_OTG_FS_HOST 1 + +// VBUS Power On/Off Pin +// Configure Pin for driving VBUS +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_OTG_FS_VBUS_PIN 1 +#define RTE_OTG_FS_VBUS_ACTIVE 0 +#define RTE_OTG_FS_VBUS_PORT GPIO_PORT(7) +#define RTE_OTG_FS_VBUS_BIT 5 + +// Overcurrent Detection Pin +// Configure Pin for overcurrent detection +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_OTG_FS_OC_PIN 1 +#define RTE_OTG_FS_OC_ACTIVE 0 +#define RTE_OTG_FS_OC_PORT GPIO_PORT(5) +#define RTE_OTG_FS_OC_BIT 11 +// + +// + + +// USB OTG High-speed +#define RTE_USB_OTG_HS 0 + +// PHY (Physical Layer) + +// PHY Interface +// <0=>On-chip full-speed PHY +// <1=>External ULPI high-speed PHY +#define RTE_USB_OTG_HS_PHY 1 + +// External ULPI Pins (UTMI+ Low Pin Interface) + +// OTG_HS_ULPI_CK Pin <0=>PA5 +#define RTE_USB_OTG_HS_ULPI_CK_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_CK_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_CK_PORT GPIOA +#define RTE_USB_OTG_HS_ULPI_CK_PIN 5 +#else +#error "Invalid OTG_HS_ULPI_CK Pin Configuration!" +#endif +// OTG_HS_ULPI_DIR Pin <0=>PI11 <1=>PC2 +#define RTE_USB_OTG_HS_ULPI_DIR_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_DIR_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_DIR_PORT GPIOI +#define RTE_USB_OTG_HS_ULPI_DIR_PIN 11 +#elif (RTE_USB_OTG_HS_ULPI_DIR_PORT_ID == 1) +#define RTE_USB_OTG_HS_ULPI_DIR_PORT GPIOC +#define RTE_USB_OTG_HS_ULPI_DIR_PIN 2 +#else +#error "Invalid OTG_HS_ULPI_DIR Pin Configuration!" +#endif +// OTG_HS_ULPI_STP Pin <0=>PC0 +#define RTE_USB_OTG_HS_ULPI_STP_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_STP_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_STP_PORT GPIOC +#define RTE_USB_OTG_HS_ULPI_STP_PIN 0 +#else +#error "Invalid OTG_HS_ULPI_STP Pin Configuration!" +#endif +// OTG_HS_ULPI_NXT Pin <0=>PC2 <1=>PH4 +#define RTE_USB_OTG_HS_ULPI_NXT_PORT_ID 1 +#if (RTE_USB_OTG_HS_ULPI_NXT_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_NXT_PORT GPIOC +#define RTE_USB_OTG_HS_ULPI_NXT_PIN 2 +#elif (RTE_USB_OTG_HS_ULPI_NXT_PORT_ID == 1) +#define RTE_USB_OTG_HS_ULPI_NXT_PORT GPIOH +#define RTE_USB_OTG_HS_ULPI_NXT_PIN 4 +#else +#error "Invalid OTG_HS_ULPI_NXT Pin Configuration!" +#endif +// OTG_HS_ULPI_D0 Pin <0=>PA3 +#define RTE_USB_OTG_HS_ULPI_D0_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D0_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D0_PORT GPIOA +#define RTE_USB_OTG_HS_ULPI_D0_PIN 3 +#else +#error "Invalid OTG_HS_ULPI_D0 Pin Configuration!" +#endif +// OTG_HS_ULPI_D1 Pin <0=>PB0 +#define RTE_USB_OTG_HS_ULPI_D1_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D1_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D1_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D1_PIN 0 +#else +#error "Invalid OTG_HS_ULPI_D1 Pin Configuration!" +#endif +// OTG_HS_ULPI_D2 Pin <0=>PB1 +#define RTE_USB_OTG_HS_ULPI_D2_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D2_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D2_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D2_PIN 1 +#else +#error "Invalid OTG_HS_ULPI_D2 Pin Configuration!" +#endif +// OTG_HS_ULPI_D3 Pin <0=>PB10 +#define RTE_USB_OTG_HS_ULPI_D3_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D3_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D3_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D3_PIN 10 +#else +#error "Invalid OTG_HS_ULPI_D3 Pin Configuration!" +#endif +// OTG_HS_ULPI_D4 Pin <0=>PB11 +#define RTE_USB_OTG_HS_ULPI_D4_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D4_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D4_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D4_PIN 11 +#else +#error "Invalid OTG_HS_ULPI_D4 Pin Configuration!" +#endif +// OTG_HS_ULPI_D5 Pin <0=>PB12 +#define RTE_USB_OTG_HS_ULPI_D5_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D5_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D5_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D5_PIN 12 +#else +#error "Invalid OTG_HS_ULPI_D5 Pin Configuration!" +#endif +// OTG_HS_ULPI_D6 Pin <0=>PB13 +#define RTE_USB_OTG_HS_ULPI_D6_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D6_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D6_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D6_PIN 13 +#else +#error "Invalid OTG_HS_ULPI_D6 Pin Configuration!" +#endif +// OTG_HS_ULPI_D7 Pin <0=>PB5 +#define RTE_USB_OTG_HS_ULPI_D7_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D7_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D7_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D7_PIN 5 +#else +#error "Invalid OTG_HS_ULPI_D7 Pin Configuration!" +#endif + +// + +// + +// Device [Driver_USBD1] +// Configuration settings for Driver_USBD1 in component ::Drivers:USB Device +#define RTE_USB_OTG_HS_DEV 1 + +// Endpoints +// Reduce memory requirements of Driver by disabling unused endpoints +// Endpoint 1 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 2 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 3 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 4 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 5 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// +#define RTE_USB_OTG_HS_DEV_EP 0x0000003F +#define RTE_USB_OTG_HS_DEV_EP_BULK 0x003E003E +#define RTE_USB_OTG_HS_DEV_EP_INT 0x003E003E +#define RTE_USB_OTG_HS_DEV_EP_ISO 0x003E003E + +// + +// Host [Driver_USBH1] +// Configuration settings for Driver_USBH1 in component ::Drivers:USB Host +#define RTE_USB_OTG_HS_HOST 1 + +// VBUS Power On/Off Pin +// Configure Pin for driving VBUS +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_OTG_HS_VBUS_PIN 1 +#define RTE_OTG_HS_VBUS_ACTIVE 0 +#define RTE_OTG_HS_VBUS_PORT GPIO_PORT(2) +#define RTE_OTG_HS_VBUS_BIT 2 + +// Overcurrent Detection Pin +// Configure Pin for overcurrent detection +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_OTG_HS_OC_PIN 1 +#define RTE_OTG_HS_OC_ACTIVE 0 +#define RTE_OTG_HS_OC_PORT GPIO_PORT(5) +#define RTE_OTG_HS_OC_BIT 12 +// + +// + + +// EXTI (External Interrupt/Event Controller) +#define RTE_EXTI 0 + +// EXTI0 Line +#define RTE_EXTI0 0 +// Pin <0=>PA0 <1=>PB0 <2=>PC0 <3=>PD0 <4=>PE0 <5=>PF0 <6=>PG0 <7=>PH0 <8=>PI0 +#define RTE_EXTI0_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI0_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI0_TRIGGER 0 +// + +// EXTI1 Line +#define RTE_EXTI1 0 +// Pin <0=>PA1 <1=>PB1 <2=>PC1 <3=>PD1 <4=>PE1 <5=>PF1 <6=>PG1 <7=>PH1 <8=>PI1 +#define RTE_EXTI1_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI1_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI1_TRIGGER 0 +// + +// EXTI2 Line +#define RTE_EXTI2 0 +// Pin <0=>PA2 <1=>PB2 <2=>PC2 <3=>PD2 <4=>PE2 <5=>PF2 <6=>PG2 <7=>PH2 <8=>PI2 +#define RTE_EXTI2_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI2_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI2_TRIGGER 0 +// + +// EXTI3 Line +#define RTE_EXTI3 0 +// Pin <0=>PA3 <1=>PB3 <2=>PC3 <3=>PD3 <4=>PE3 <5=>PF3 <6=>PG3 <7=>PH3 <8=>PI3 +#define RTE_EXTI3_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI3_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI3_TRIGGER 0 +// + +// EXTI4 Line +#define RTE_EXTI4 0 +// Pin <0=>PA4 <1=>PB4 <2=>PC4 <3=>PD4 <4=>PE4 <5=>PF4 <6=>PG4 <7=>PH4 <8=>PI4 +#define RTE_EXTI4_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI4_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI4_TRIGGER 0 +// + +// EXTI5 Line +#define RTE_EXTI5 0 +// Pin <0=>PA5 <1=>PB5 <2=>PC5 <3=>PD5 <4=>PE5 <5=>PF5 <6=>PG5 <7=>PH5 <8=>PI5 +#define RTE_EXTI5_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI5_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI5_TRIGGER 0 +// + +// EXTI6 Line +#define RTE_EXTI6 0 +// Pin <0=>PA6 <1=>PB6 <2=>PC6 <3=>PD6 <4=>PE6 <5=>PF6 <6=>PG6 <7=>PH6 <8=>PI6 +#define RTE_EXTI6_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI6_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI6_TRIGGER 0 +// + +// EXTI7 Line +#define RTE_EXTI7 0 +// Pin <0=>PA7 <1=>PB7 <2=>PC7 <3=>PD7 <4=>PE7 <5=>PF7 <6=>PG7 <7=>PH7 <8=>PI7 +#define RTE_EXTI7_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI7_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI7_TRIGGER 0 +// + +// EXTI8 Line +#define RTE_EXTI8 0 +// Pin <0=>PA8 <1=>PB8 <2=>PC8 <3=>PD8 <4=>PE8 <5=>PF8 <6=>PG8 <7=>PH8 <8=>PI8 +#define RTE_EXTI8_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI8_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI8_TRIGGER 0 +// + +// EXTI9 Line +#define RTE_EXTI9 0 +// Pin <0=>PA9 <1=>PB9 <2=>PC9 <3=>PD9 <4=>PE9 <5=>PF9 <6=>PG9 <7=>PH9 <8=>PI9 +#define RTE_EXTI9_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI9_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI9_TRIGGER 0 +// + +// EXTI10 Line +#define RTE_EXTI10 0 +// Pin <0=>PA10 <1=>PB10 <2=>PC10 <3=>PD10 <4=>PE10 <5=>PF10 <6=>PG10 <7=>PH10 <8=>PI10 +#define RTE_EXTI10_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI10_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI10_TRIGGER 0 +// + +// EXTI11 Line +#define RTE_EXTI11 0 +// Pin <0=>PA11 <1=>PB11 <2=>PC11 <3=>PD11 <4=>PE11 <5=>PF11 <6=>PG11 <7=>PH11 <8=>PI11 +#define RTE_EXTI11_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI11_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI11_TRIGGER 0 +// + +// EXTI12 Line +#define RTE_EXTI12 0 +// Pin <0=>PA12 <1=>PB12 <2=>PC12 <3=>PD12 <4=>PE12 <5=>PF12 <6=>PG12 <7=>PH12 +#define RTE_EXTI12_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI12_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI12_TRIGGER 0 +// + +// EXTI13 Line +#define RTE_EXTI13 0 +// Pin <0=>PA13 <1=>PB13 <2=>PC13 <3=>PD13 <4=>PE13 <5=>PF13 <6=>PG13 <7=>PH13 +#define RTE_EXTI13_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI13_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI13_TRIGGER 0 +// + +// EXTI14 Line +#define RTE_EXTI14 0 +// Pin <0=>PA14 <1=>PB14 <2=>PC14 <3=>PD14 <4=>PE14 <5=>PF14 <6=>PG14 <7=>PH14 +#define RTE_EXTI14_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI14_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI14_TRIGGER 0 +// + +// EXTI15 Line +#define RTE_EXTI15 0 +// Pin <0=>PA15 <1=>PB15 <2=>PC15 <3=>PD15 <4=>PE15 <5=>PF15 <6=>PG15 <7=>PH15 +#define RTE_EXTI15_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI15_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI15_TRIGGER 0 +// + +// EXTI16 Line: PVD Output +#define RTE_EXTI16 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI16_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI16_TRIGGER 0 +// + +// EXTI17 Line: RTC Alarm +#define RTE_EXTI17 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI17_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI17_TRIGGER 0 +// + +// EXTI18 Line: USB OTG FS Wakeup +#define RTE_EXTI18 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI18_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI18_TRIGGER 0 +// + +// EXTI19 Line: Ethernet Wakeup +#define RTE_EXTI19 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI19_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI19_TRIGGER 0 +// + +// EXTI20 Line: USB OTG HS Wakeup +#define RTE_EXTI20 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI20_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI20_TRIGGER 0 +// + +// EXTI21 Line: RTC Tamper and TimeStamp +#define RTE_EXTI21 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI21_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI21_TRIGGER 0 +// + +// EXTI22 Line: RTC Wakeup +#define RTE_EXTI22 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI22_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI22_TRIGGER 0 +// + +// + + +// FSMC (Flexible Static Memory Controller) +#define RTE_FSMC 0 + +// Pin Configuration +// Configure Pins +#define RTE_FSMC_PINS 0 + +// Address Bus Pins +// <0=>A[17:16] +// <1=>A[10:0] <2=>A[15:0] <3=>A[16:0] <4=>A[17:0] +// <5=>A[18:0] <6=>A[19:0] <7=>A[20:0] <8=>A[21:0] +// <9=>A[22:0] <10=>A[23:0] <11=>A[24:0] <12=>A[25:0] +#define RTE_FSMC_ABUS_PINS 10 +// Data Bus Pins <0=>D[7:0] <1=>D[15:0] +#define RTE_FSMC_DBUS_PINS 0 +// FSMC_NOE Pin +#define RTE_FSMC_NOE_PIN 0 +// FSMC_NWE Pin +#define RTE_FSMC_NWE_PIN 0 +// FSMC_NBL0 Pin +#define RTE_FSMC_NBL0_PIN 0 +// FSMC_NBL1 Pin +#define RTE_FSMC_NBL1_PIN 0 +// FSMC_NL Pin +#define RTE_FSMC_NL_PIN 0 +// FSMC_NWAIT Pin +#define RTE_FSMC_NWAIT_PIN 0 +// FSMC_CLK Pin +#define RTE_FSMC_CLK_PIN 0 +// FSMC_NE1/NCE2 Pin +#define RTE_FSMC_NE1_PIN 0 +// FSMC_NE2/NCE3 Pin +#define RTE_FSMC_NE2_PIN 0 +// FSMC_NE3/NCE4_1 Pin +#define RTE_FSMC_NE3_PIN 0 +// FSMC_NE4 Pin +#define RTE_FSMC_NE4_PIN 0 +// FSMC_NCE4_2 Pin +#define RTE_FSMC_NCE42_PIN 0 +// FSMC_INT2 Pin +#define RTE_FSMC_INT2_PIN 0 +// FSMC_INT3 Pin +#define RTE_FSMC_INT3_PIN 0 +// FSMC_INTR Pin +#define RTE_FSMC_INTR_PIN 0 +// FSMC_NIORD Pin +#define RTE_FSMC_NIORD_PIN 0 +// FSMC_NIOWR Pin +#define RTE_FSMC_NIOWR_PIN 0 +// FSMC_NREG Pin +#define RTE_FSMC_NREG_PIN 0 +// FSMC_CD Pin +#define RTE_FSMC_CD_PIN 0 + +// + +// NOR Flash / PSRAM Controller + +// FSMC_NE1 Chip Select +// Configure Device on Chip Select FSMC_NE1 +#define RTE_FSMC_NE1 0 + +// Chip-select control +// CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write +// For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash +// memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal. +// ASYNCWAIT: Wait signal during asynchronous transfer +// Enables the FSMC to use the wait signal even during an asynchronous protocol. +// EXTMOD: Extended mode enable +// Enables the FSMC to program inside the write timing register, so it allows different timings for read and write. +// WAITEN: Wait enable +// For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal. +// WREN: Write enable +// Enable/disable write operations in the current bank by the FSMC +// WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state +// For memory access in burst mode, the NWAIT signal indicates whether the data from the memory +// are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted +// by the memory one clock cycle before the wait state or during the wait state +// WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high +// Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode. +// BURSTEN: Burst enable +// Enables the burst access mode for the memory. Valid only with synchronous burst memories. +// FACCEN: Flash access enable +// Enables NOR Flash memory access operations. +// MWID: Memory databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width, valid for all type of memories. +// MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash +// Defines the type of external memory attached to the corresponding memory bank. +// MUXEN: Address/data multiplexing enable +// When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories. +// MBKEN: Memory bank enable +// Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a +// disabled bank causes an ERROR on AHB bus. +#define RTE_FSMC_BCR1_CBURSTRW 0 +#define RTE_FSMC_BCR1_ASYNCWAIT 0 +#define RTE_FSMC_BCR1_EXTMOD 0 +#define RTE_FSMC_BCR1_WAITEN 1 +#define RTE_FSMC_BCR1_WREN 1 +#define RTE_FSMC_BCR1_WAITCFG 0 +#define RTE_FSMC_BCR1_WRAPMOD 0 +#define RTE_FSMC_BCR1_WAITPOL 0 +#define RTE_FSMC_BCR1_BURSTEN 0 +#define RTE_FSMC_BCR1_FACCEN 1 +#define RTE_FSMC_BCR1_MWID 1 +#define RTE_FSMC_BCR1_MTYP 2 +#define RTE_FSMC_BCR1_MUXEN 1 +#define RTE_FSMC_BCR1_MBKEN 1 +// + +// Chip-select timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with synchronous burst mode enabled, defines the number of memory clock +// cycles (+2) to issue to the memory before getting the first data: +// 0000: Data latency of 2 CLK clock cycles for first burst access +// 1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) +// periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care. +// In the case of CRAM, this field must be set to ‘0’. +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles: +// 0000: Reserved +// 0001: CLK period = 2 × HCLK periods +// 0010: CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Define the bus turnaround delay after a read access only +// from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive +// addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the +// minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the +// databus in Hi-Z state. +// These bits are written by software to add a delay at the end of a write/read transaction. This +// delay allows to match the minimum time between consecutive transactions (tEHEL from NEx +// high to NEx low) and the maximum time needed by the memory to free the data bus after a +// read access (tEHQZ): +// (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if +// EXTMOD = ‘0’ +// (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset) +// DATAST: Data phase duration <1-255> +// Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Define the duration of the address hold phase used in mode D and multiplexed accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration =1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is not used, the address hold phase is always 1 +// memory clock period duration. +// ADDSET: Address setup phase duration <0-15> +// Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don’t care. +#define RTE_FSMC_BTR1_ACCMOD 0 +#define RTE_FSMC_BTR1_DATLAT 15 +#define RTE_FSMC_BTR1_CLKDIV 15 +#define RTE_FSMC_BTR1_BUSTURN 15 +#define RTE_FSMC_BTR1_DATAST 255 +#define RTE_FSMC_BTR1_ADDHLD 15 +#define RTE_FSMC_BTR1_ADDSET 15 +// + +// Write timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles +// (+2) to issue to the memory before getting the first data. +// 0000: (0x0) Data latency of 2 CLK clock cycles for first burst access +// ... +// 1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In +// asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of +// CRAM, this field must be set to 0 +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles. +// 0000: Reserved +// 0001 CLK period = 2 × HCLK periods +// 0010 CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low). +// (BUSTRUN + 1) HCLK period = tEHELmin. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset) +// DATAST: Data phase duration <1-255> +// Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration = 1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration. +// ADDSET: Address setup phase duration <1-15> +// Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is don’t care. +#define RTE_FSMC_BWTR1_ACCMOD 0 +#define RTE_FSMC_BWTR1_DATLAT 15 +#define RTE_FSMC_BWTR1_CLKDIV 15 +#define RTE_FSMC_BWTR1_BUSTURN 15 +#define RTE_FSMC_BWTR1_DATAST 255 +#define RTE_FSMC_BWTR1_ADDHLD 15 +#define RTE_FSMC_BWTR1_ADDSET 15 +// +// + +// FSMC_NE2 Chip Select +// Configure Device on Chip Select FSMC_NE2 +#define RTE_FSMC_NE2 0 + +// Chip-select control +// CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write +// For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash +// memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal. +// ASYNCWAIT: Wait signal during asynchronous transfer +// Enables the FSMC to use the wait signal even during an asynchronous protocol. +// EXTMOD: Extended mode enable +// Enables the FSMC to program inside the write timing register, so it allows different timings for read and write. +// WAITEN: Wait enable +// For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal. +// WREN: Write enable +// Enable/disable write operations in the current bank by the FSMC +// WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state +// For memory access in burst mode, the NWAIT signal indicates whether the data from the memory +// are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted +// by the memory one clock cycle before the wait state or during the wait state +// WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high +// Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode. +// BURSTEN: Burst enable +// Enables the burst access mode for the memory. Valid only with synchronous burst memories. +// FACCEN: Flash access enable +// Enables NOR Flash memory access operations. +// MWID: Memory databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width, valid for all type of memories. +// MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash +// Defines the type of external memory attached to the corresponding memory bank. +// MUXEN: Address/data multiplexing enable +// When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories. +// MBKEN: Memory bank enable +// Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a +// disabled bank causes an ERROR on AHB bus. +#define RTE_FSMC_BCR2_CBURSTRW 0 +#define RTE_FSMC_BCR2_ASYNCWAIT 0 +#define RTE_FSMC_BCR2_EXTMOD 0 +#define RTE_FSMC_BCR2_WAITEN 1 +#define RTE_FSMC_BCR2_WREN 1 +#define RTE_FSMC_BCR2_WAITCFG 0 +#define RTE_FSMC_BCR2_WRAPMOD 0 +#define RTE_FSMC_BCR2_WAITPOL 0 +#define RTE_FSMC_BCR2_BURSTEN 0 +#define RTE_FSMC_BCR2_FACCEN 1 +#define RTE_FSMC_BCR2_MWID 1 +#define RTE_FSMC_BCR2_MTYP 0 +#define RTE_FSMC_BCR2_MUXEN 1 +#define RTE_FSMC_BCR2_MBKEN 0 +// + +// Chip-select timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with synchronous burst mode enabled, defines the number of memory clock +// cycles (+2) to issue to the memory before getting the first data: +// 0000: Data latency of 2 CLK clock cycles for first burst access +// 1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) +// periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care. +// In the case of CRAM, this field must be set to ‘0’. +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles: +// 0000: Reserved +// 0001: CLK period = 2 × HCLK periods +// 0010: CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Define the bus turnaround delay after a read access only +// from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive +// addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the +// minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the +// databus in Hi-Z state. +// These bits are written by software to add a delay at the end of a write/read transaction. This +// delay allows to match the minimum time between consecutive transactions (tEHEL from NEx +// high to NEx low) and the maximum time needed by the memory to free the data bus after a +// read access (tEHQZ): +// (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if +// EXTMOD = ‘0’ +// (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset) +// DATAST: Data phase duration <1-255> +// Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Define the duration of the address hold phase used in mode D and multiplexed accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration =1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is not used, the address hold phase is always 1 +// memory clock period duration. +// ADDSET: Address setup phase duration <0-15> +// Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don’t care. +#define RTE_FSMC_BTR2_ACCMOD 0 +#define RTE_FSMC_BTR2_DATLAT 15 +#define RTE_FSMC_BTR2_CLKDIV 15 +#define RTE_FSMC_BTR2_BUSTURN 15 +#define RTE_FSMC_BTR2_DATAST 255 +#define RTE_FSMC_BTR2_ADDHLD 15 +#define RTE_FSMC_BTR2_ADDSET 15 +// + +// Write timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles +// (+2) to issue to the memory before getting the first data. +// 0000: (0x0) Data latency of 2 CLK clock cycles for first burst access +// ... +// 1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In +// asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of +// CRAM, this field must be set to 0 +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles. +// 0000: Reserved +// 0001 CLK period = 2 × HCLK periods +// 0010 CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low). +// (BUSTRUN + 1) HCLK period = tEHELmin. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset) +// DATAST: Data phase duration <1-255> +// Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration = 1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration. +// ADDSET: Address setup phase duration <1-15> +// Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is don’t care. +#define RTE_FSMC_BWTR2_ACCMOD 0 +#define RTE_FSMC_BWTR2_DATLAT 15 +#define RTE_FSMC_BWTR2_CLKDIV 15 +#define RTE_FSMC_BWTR2_BUSTURN 15 +#define RTE_FSMC_BWTR2_DATAST 255 +#define RTE_FSMC_BWTR2_ADDHLD 15 +#define RTE_FSMC_BWTR2_ADDSET 15 +// +// + +// FSMC_NE3 Chip Select +// Configure Device on Chip Select FSMC_NE3 +#define RTE_FSMC_NE3 0 + +// Chip-select control +// CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write +// For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash +// memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal. +// ASYNCWAIT: Wait signal during asynchronous transfer +// Enables the FSMC to use the wait signal even during an asynchronous protocol. +// EXTMOD: Extended mode enable +// Enables the FSMC to program inside the write timing register, so it allows different timings for read and write. +// WAITEN: Wait enable +// For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal. +// WREN: Write enable +// Enable/disable write operations in the current bank by the FSMC +// WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state +// For memory access in burst mode, the NWAIT signal indicates whether the data from the memory +// are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted +// by the memory one clock cycle before the wait state or during the wait state +// WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high +// Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode. +// BURSTEN: Burst enable +// Enables the burst access mode for the memory. Valid only with synchronous burst memories. +// FACCEN: Flash access enable +// Enables NOR Flash memory access operations. +// MWID: Memory databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width, valid for all type of memories. +// MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash +// Defines the type of external memory attached to the corresponding memory bank. +// MUXEN: Address/data multiplexing enable +// When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories. +// MBKEN: Memory bank enable +// Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a +// disabled bank causes an ERROR on AHB bus. +#define RTE_FSMC_BCR3_CBURSTRW 0 +#define RTE_FSMC_BCR3_ASYNCWAIT 0 +#define RTE_FSMC_BCR3_EXTMOD 0 +#define RTE_FSMC_BCR3_WAITEN 1 +#define RTE_FSMC_BCR3_WREN 1 +#define RTE_FSMC_BCR3_WAITCFG 0 +#define RTE_FSMC_BCR3_WRAPMOD 0 +#define RTE_FSMC_BCR3_WAITPOL 0 +#define RTE_FSMC_BCR3_BURSTEN 0 +#define RTE_FSMC_BCR3_FACCEN 1 +#define RTE_FSMC_BCR3_MWID 1 +#define RTE_FSMC_BCR3_MTYP 0 +#define RTE_FSMC_BCR3_MUXEN 1 +#define RTE_FSMC_BCR3_MBKEN 0 +// + +// Chip-select timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with synchronous burst mode enabled, defines the number of memory clock +// cycles (+2) to issue to the memory before getting the first data: +// 0000: Data latency of 2 CLK clock cycles for first burst access +// 1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) +// periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care. +// In the case of CRAM, this field must be set to ‘0’. +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles: +// 0000: Reserved +// 0001: CLK period = 2 × HCLK periods +// 0010: CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Define the bus turnaround delay after a read access only +// from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive +// addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the +// minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the +// databus in Hi-Z state. +// These bits are written by software to add a delay at the end of a write/read transaction. This +// delay allows to match the minimum time between consecutive transactions (tEHEL from NEx +// high to NEx low) and the maximum time needed by the memory to free the data bus after a +// read access (tEHQZ): +// (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if +// EXTMOD = ‘0’ +// (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset) +// DATAST: Data phase duration <1-255> +// Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Define the duration of the address hold phase used in mode D and multiplexed accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration =1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is not used, the address hold phase is always 1 +// memory clock period duration. +// ADDSET: Address setup phase duration <0-15> +// Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don’t care. +#define RTE_FSMC_BTR3_ACCMOD 0 +#define RTE_FSMC_BTR3_DATLAT 15 +#define RTE_FSMC_BTR3_CLKDIV 15 +#define RTE_FSMC_BTR3_BUSTURN 15 +#define RTE_FSMC_BTR3_DATAST 255 +#define RTE_FSMC_BTR3_ADDHLD 15 +#define RTE_FSMC_BTR3_ADDSET 15 +// + +// Write timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles +// (+2) to issue to the memory before getting the first data. +// 0000: (0x0) Data latency of 2 CLK clock cycles for first burst access +// ... +// 1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In +// asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of +// CRAM, this field must be set to 0 +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles. +// 0000: Reserved +// 0001 CLK period = 2 × HCLK periods +// 0010 CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low). +// (BUSTRUN + 1) HCLK period = tEHELmin. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset) +// DATAST: Data phase duration <1-255> +// Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration = 1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration. +// ADDSET: Address setup phase duration <1-15> +// Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is don’t care. +#define RTE_FSMC_BWTR3_ACCMOD 0 +#define RTE_FSMC_BWTR3_DATLAT 15 +#define RTE_FSMC_BWTR3_CLKDIV 15 +#define RTE_FSMC_BWTR3_BUSTURN 15 +#define RTE_FSMC_BWTR3_DATAST 255 +#define RTE_FSMC_BWTR3_ADDHLD 15 +#define RTE_FSMC_BWTR3_ADDSET 15 +// +// + +// FSMC_NE4 Chip Select +// Configure Device on Chip Select FSMC_NE4 +#define RTE_FSMC_NE4 0 + +// Chip-select control +// CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write +// For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash +// memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal. +// ASYNCWAIT: Wait signal during asynchronous transfer +// Enables the FSMC to use the wait signal even during an asynchronous protocol. +// EXTMOD: Extended mode enable +// Enables the FSMC to program inside the write timing register, so it allows different timings for read and write. +// WAITEN: Wait enable +// For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal. +// WREN: Write enable +// Enable/disable write operations in the current bank by the FSMC +// WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state +// For memory access in burst mode, the NWAIT signal indicates whether the data from the memory +// are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted +// by the memory one clock cycle before the wait state or during the wait state +// WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high +// Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode. +// BURSTEN: Burst enable +// Enables the burst access mode for the memory. Valid only with synchronous burst memories. +// FACCEN: Flash access enable +// Enables NOR Flash memory access operations. +// MWID: Memory databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width, valid for all type of memories. +// MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash +// Defines the type of external memory attached to the corresponding memory bank. +// MUXEN: Address/data multiplexing enable +// When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories. +// MBKEN: Memory bank enable +// Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a +// disabled bank causes an ERROR on AHB bus. +#define RTE_FSMC_BCR4_CBURSTRW 0 +#define RTE_FSMC_BCR4_ASYNCWAIT 0 +#define RTE_FSMC_BCR4_EXTMOD 0 +#define RTE_FSMC_BCR4_WAITEN 1 +#define RTE_FSMC_BCR4_WREN 1 +#define RTE_FSMC_BCR4_WAITCFG 0 +#define RTE_FSMC_BCR4_WRAPMOD 0 +#define RTE_FSMC_BCR4_WAITPOL 0 +#define RTE_FSMC_BCR4_BURSTEN 0 +#define RTE_FSMC_BCR4_FACCEN 1 +#define RTE_FSMC_BCR4_MWID 1 +#define RTE_FSMC_BCR4_MTYP 0 +#define RTE_FSMC_BCR4_MUXEN 1 +#define RTE_FSMC_BCR4_MBKEN 0 +// + +// Chip-select timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with synchronous burst mode enabled, defines the number of memory clock +// cycles (+2) to issue to the memory before getting the first data: +// 0000: Data latency of 2 CLK clock cycles for first burst access +// 1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) +// periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care. +// In the case of CRAM, this field must be set to ‘0’. +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles: +// 0000: Reserved +// 0001: CLK period = 2 × HCLK periods +// 0010: CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Define the bus turnaround delay after a read access only +// from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive +// addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the +// minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the +// databus in Hi-Z state. +// These bits are written by software to add a delay at the end of a write/read transaction. This +// delay allows to match the minimum time between consecutive transactions (tEHEL from NEx +// high to NEx low) and the maximum time needed by the memory to free the data bus after a +// read access (tEHQZ): +// (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if +// EXTMOD = ‘0’ +// (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset) +// DATAST: Data phase duration <1-255> +// Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Define the duration of the address hold phase used in mode D and multiplexed accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration =1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is not used, the address hold phase is always 1 +// memory clock period duration. +// ADDSET: Address setup phase duration <0-15> +// Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don’t care. +#define RTE_FSMC_BTR4_ACCMOD 0 +#define RTE_FSMC_BTR4_DATLAT 15 +#define RTE_FSMC_BTR4_CLKDIV 15 +#define RTE_FSMC_BTR4_BUSTURN 15 +#define RTE_FSMC_BTR4_DATAST 255 +#define RTE_FSMC_BTR4_ADDHLD 15 +#define RTE_FSMC_BTR4_ADDSET 15 +// + +// Write timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles +// (+2) to issue to the memory before getting the first data. +// 0000: (0x0) Data latency of 2 CLK clock cycles for first burst access +// ... +// 1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In +// asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of +// CRAM, this field must be set to 0 +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles. +// 0000: Reserved +// 0001 CLK period = 2 × HCLK periods +// 0010 CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low). +// (BUSTRUN + 1) HCLK period = tEHELmin. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset) +// DATAST: Data phase duration <1-255> +// Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration = 1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration. +// ADDSET: Address setup phase duration <1-15> +// Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is don’t care. +#define RTE_FSMC_BWTR4_ACCMOD 0 +#define RTE_FSMC_BWTR4_DATLAT 15 +#define RTE_FSMC_BWTR4_CLKDIV 15 +#define RTE_FSMC_BWTR4_BUSTURN 15 +#define RTE_FSMC_BWTR4_DATAST 255 +#define RTE_FSMC_BWTR4_ADDHLD 15 +#define RTE_FSMC_BWTR4_ADDSET 15 +// +// + +// + +// NAND Flash Controller + +// FSMC_NCE2 Chip Select +// Configure NAND Device on Chip Select FSMC_NCE2 +#define RTE_FSMC_NCE2 0 + +// NAND Flash Control +// ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes +// Defines the page size for the extended ECC. +// TAR: ALE to RE delay <0-15> +// Sets time from ALE low to RE low in number of AHB clock cycles (HCLK). +// Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// TCLR: CLE to RE delay <0-15> +// Sets time from CLE low to RE low in number of AHB clock cycles (HCLK). +// Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// ECCEN: ECC computation logic enable +// PWID: Databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width. +// PTYP: Memory type <1=>NAND Flash +// Defines the type of device attached to the corresponding memory bank. +// PBKEN: NAND Flash memory bank enable +// Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus. +// PWAITEN: Wait feature enable +// Enables the Wait feature for the PC Card/NAND Flash memory bank. +#define RTE_FSMC_PCR2_ECCPS 0 +#define RTE_FSMC_PCR2_TAR 0 +#define RTE_FSMC_PCR2_TCLR 0 +#define RTE_FSMC_PCR2_ECCEN 0 +#define RTE_FSMC_PCR2_PWID 0 +#define RTE_FSMC_PCR2_PTYP 1 +#define RTE_FSMC_PCR2_PBKEN 0 +#define RTE_FSMC_PCR2_PWAITEN 0 + +// + +// Interrupt configuration +// IFEN: Falling edge detection enable +// ILEN: High-level detection enable +// IREN: Rising edge detection enable +#define RTE_FSMC_SR2_IFEN 0 +#define RTE_FSMC_SR2_ILEN 0 +#define RTE_FSMC_SR2_IREN 0 + +// + +// Common memory space timing +// MEMHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access to. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset) +// MEMSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up the address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 2 HCLK cycles (for NAND Flash) +// 1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset) +#define RTE_FSMC_PMEM2_MEMHIZ 255 +#define RTE_FSMC_PMEM2_MEMHOLD 255 +#define RTE_FSMC_PMEM2_MEMWAIT 255 +#define RTE_FSMC_PMEM2_MEMSET 255 + +// + +// Attribute memory space timing +// ATTHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT) +// ATTSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 1 HCLK cycle +// 1111 1111: 256 HCLK cycles (default value after reset) +#define RTE_FSMC_PATT2_ATTHIZ 255 +#define RTE_FSMC_PATT2_ATTHOLD 255 +#define RTE_FSMC_PATT2_ATTWAIT 255 +#define RTE_FSMC_PATT2_ATTSET 255 + +// + +// + +// FSMC_NCE3 Chip Select +// Configure NAND Device on Chip Select FSMC_NCE3 +#define RTE_FSMC_NCE3 0 + +// NAND Flash Control +// ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes +// Defines the page size for the extended ECC. +// TAR: ALE to RE delay <0-15> +// Sets time from ALE low to RE low in number of AHB clock cycles (HCLK). +// Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// TCLR: CLE to RE delay <0-15> +// Sets time from CLE low to RE low in number of AHB clock cycles (HCLK). +// Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// ECCEN: ECC computation logic enable +// PWID: Databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width. +// PTYP: Memory type <1=>NAND Flash +// Defines the type of device attached to the corresponding memory bank. +// PBKEN: NAND Flash memory bank enable +// Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus. +// PWAITEN: Wait feature enable +// Enables the Wait feature for the PC Card/NAND Flash memory bank. +#define RTE_FSMC_PCR3_ECCPS 0 +#define RTE_FSMC_PCR3_TAR 0 +#define RTE_FSMC_PCR3_TCLR 0 +#define RTE_FSMC_PCR3_ECCEN 0 +#define RTE_FSMC_PCR3_PWID 0 +#define RTE_FSMC_PCR3_PTYP 1 +#define RTE_FSMC_PCR3_PBKEN 0 +#define RTE_FSMC_PCR3_PWAITEN 0 + +// + +// Interrupt configuration +// IFEN: Falling edge detection enable +// ILEN: High-level detection enable +// IREN: Rising edge detection enable +#define RTE_FSMC_SR3_IFEN 0 +#define RTE_FSMC_SR3_ILEN 0 +#define RTE_FSMC_SR3_IREN 0 + +// + +// Common memory space timing +// MEMHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access to. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset) +// MEMSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up the address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 2 HCLK cycles (for NAND Flash) +// 1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset) +#define RTE_FSMC_PMEM3_MEMHIZ 255 +#define RTE_FSMC_PMEM3_MEMHOLD 255 +#define RTE_FSMC_PMEM3_MEMWAIT 255 +#define RTE_FSMC_PMEM3_MEMSET 255 + +// + +// Attribute memory space timing +// ATTHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT) +// ATTSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 1 HCLK cycle +// 1111 1111: 256 HCLK cycles (default value after reset) +#define RTE_FSMC_PATT3_ATTHIZ 255 +#define RTE_FSMC_PATT3_ATTHOLD 255 +#define RTE_FSMC_PATT3_ATTWAIT 255 +#define RTE_FSMC_PATT3_ATTSET 255 + +// + +// + +// + +// PC Card Controller + +// FSMC_NCE4_x Chip Select +// Configure PC Card/CompactFlash Device on Chip Select FSMC_NCE4_1/FSMC_NCE4_2 +#define RTE_FSMC_NCE4 0 + +// PC Card Control +// ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes +// Defines the page size for the extended ECC. +// TAR: ALE to RE delay <0-15> +// Sets time from ALE low to RE low in number of AHB clock cycles (HCLK). +// Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// TCLR: CLE to RE delay <0-15> +// Sets time from CLE low to RE low in number of AHB clock cycles (HCLK). +// Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// ECCEN: ECC computation logic enable +// PWID: Databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width. +// PTYP: Memory type <0=>PC Card, CompactFlash, CF+ or PCMCIOA +// Defines the type of device attached to the corresponding memory bank. +// PBKEN: PC Card memory bank enable +// Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus. +// PWAITEN: Wait feature enable +// Enables the Wait feature for the PC Card/NAND Flash memory bank. +#define RTE_FSMC_PCR4_ECCPS 0 +#define RTE_FSMC_PCR4_TAR 0 +#define RTE_FSMC_PCR4_TCLR 0 +#define RTE_FSMC_PCR4_ECCEN 0 +#define RTE_FSMC_PCR4_PWID 0 +#define RTE_FSMC_PCR4_PTYP 0 +#define RTE_FSMC_PCR4_PBKEN 0 +#define RTE_FSMC_PCR4_PWAITEN 0 + +// + +// Interrupt configuration +// IFEN: Falling edge detection enable +// ILEN: High-level detection enable +// IREN: Rising edge detection enable +#define RTE_FSMC_SR4_IFEN 0 +#define RTE_FSMC_SR4_ILEN 0 +#define RTE_FSMC_SR4_IREN 0 + +// + +// Common memory space timing +// MEMHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access to. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset) +// MEMSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up the address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 2 HCLK cycles (for NAND Flash) +// 1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset) +#define RTE_FSMC_PMEM4_MEMHIZ 255 +#define RTE_FSMC_PMEM4_MEMHOLD 255 +#define RTE_FSMC_PMEM4_MEMWAIT 255 +#define RTE_FSMC_PMEM4_MEMSET 255 + +// + +// Attribute memory space timing +// ATTHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT) +// ATTSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 1 HCLK cycle +// 1111 1111: 256 HCLK cycles (default value after reset) +#define RTE_FSMC_PATT4_ATTHIZ 255 +#define RTE_FSMC_PATT4_ATTHOLD 255 +#define RTE_FSMC_PATT4_ATTWAIT 255 +#define RTE_FSMC_PATT4_ATTSET 255 + +// + +// I/O space timing +// IOHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a PC Card write access. Only valid for write transaction. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// IOHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for PC Card read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// IOWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (SMNWE, +// SMNOE), for PC Card read or write access. The duration for command assertion is +// extended if the wait signal (NWAIT) is active (low) at the end of the +// programmed value of HCLK. +// 0000 0000: reserved, do not use this value +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT) +// 1111 1111: 256 HCLK cycles +// IOSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up the address before the command +// assertion (NWE, NOE), for PC Card read or write access. +// 0000 0000: 1 HCLK cycle +// 1111 1111: 256 HCLK cycles (default value after reset) +#define RTE_FSMC_PIO4_IOHIZ 255 +#define RTE_FSMC_PIO4_IOHOLD 255 +#define RTE_FSMC_PIO4_IOWAIT 255 +#define RTE_FSMC_PIO4_IOSET 255 + +// + +// + +// + +// + + +#endif /* __RTE_DEVICE_H */ diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/Device/STM32F207IG/startup_stm32f2xx.s b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/Device/STM32F207IG/startup_stm32f2xx.s new file mode 100644 index 000000000..eae6859dd --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/Device/STM32F207IG/startup_stm32f2xx.s @@ -0,0 +1,419 @@ +;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** +;* File Name : startup_stm32f2xx.s +;* Author : MCD Application Team +;* Version : V1.0.0 +;* Date : 18-April-2011 +;* Description : STM32F2xx devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM3 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS +; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. +; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, +; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE +; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING +; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. +;******************************************************************************* + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00002000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00009000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_IRQHandler ; PVD through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0 + DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1 + DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2 + DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3 + DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4 + DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5 + DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6 + DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s + DCD CAN1_TX_IRQHandler ; CAN1 TX + DCD CAN1_RX0_IRQHandler ; CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9 + DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10 + DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11 + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10]s + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line + DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12 + DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13 + DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14 + DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare + DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7 + DCD FSMC_IRQHandler ; FSMC + DCD SDIO_IRQHandler ; SDIO + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD UART4_IRQHandler ; UART4 + DCD UART5_IRQHandler ; UART5 + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0 + DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1 + DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2 + DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3 + DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4 + DCD ETH_IRQHandler ; Ethernet + DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line + DCD CAN2_TX_IRQHandler ; CAN2 TX + DCD CAN2_RX0_IRQHandler ; CAN2 RX0 + DCD CAN2_RX1_IRQHandler ; CAN2 RX1 + DCD CAN2_SCE_IRQHandler ; CAN2 SCE + DCD OTG_FS_IRQHandler ; USB OTG FS + DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5 + DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6 + DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7 + DCD USART6_IRQHandler ; USART6 + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out + DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In + DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI + DCD OTG_HS_IRQHandler ; USB OTG HS + DCD DCMI_IRQHandler ; DCMI + DCD CRYP_IRQHandler ; CRYP crypto + DCD HASH_RNG_IRQHandler ; Hash and Rng +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Stream0_IRQHandler [WEAK] + EXPORT DMA1_Stream1_IRQHandler [WEAK] + EXPORT DMA1_Stream2_IRQHandler [WEAK] + EXPORT DMA1_Stream3_IRQHandler [WEAK] + EXPORT DMA1_Stream4_IRQHandler [WEAK] + EXPORT DMA1_Stream5_IRQHandler [WEAK] + EXPORT DMA1_Stream6_IRQHandler [WEAK] + EXPORT ADC_IRQHandler [WEAK] + EXPORT CAN1_TX_IRQHandler [WEAK] + EXPORT CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK] + EXPORT TIM1_UP_TIM10_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT OTG_FS_WKUP_IRQHandler [WEAK] + EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK] + EXPORT TIM8_UP_TIM13_IRQHandler [WEAK] + EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK] + EXPORT TIM8_CC_IRQHandler [WEAK] + EXPORT DMA1_Stream7_IRQHandler [WEAK] + EXPORT FSMC_IRQHandler [WEAK] + EXPORT SDIO_IRQHandler [WEAK] + EXPORT TIM5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Stream0_IRQHandler [WEAK] + EXPORT DMA2_Stream1_IRQHandler [WEAK] + EXPORT DMA2_Stream2_IRQHandler [WEAK] + EXPORT DMA2_Stream3_IRQHandler [WEAK] + EXPORT DMA2_Stream4_IRQHandler [WEAK] + EXPORT ETH_IRQHandler [WEAK] + EXPORT ETH_WKUP_IRQHandler [WEAK] + EXPORT CAN2_TX_IRQHandler [WEAK] + EXPORT CAN2_RX0_IRQHandler [WEAK] + EXPORT CAN2_RX1_IRQHandler [WEAK] + EXPORT CAN2_SCE_IRQHandler [WEAK] + EXPORT OTG_FS_IRQHandler [WEAK] + EXPORT DMA2_Stream5_IRQHandler [WEAK] + EXPORT DMA2_Stream6_IRQHandler [WEAK] + EXPORT DMA2_Stream7_IRQHandler [WEAK] + EXPORT USART6_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK] + EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK] + EXPORT OTG_HS_WKUP_IRQHandler [WEAK] + EXPORT OTG_HS_IRQHandler [WEAK] + EXPORT DCMI_IRQHandler [WEAK] + EXPORT CRYP_IRQHandler [WEAK] + EXPORT HASH_RNG_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Stream0_IRQHandler +DMA1_Stream1_IRQHandler +DMA1_Stream2_IRQHandler +DMA1_Stream3_IRQHandler +DMA1_Stream4_IRQHandler +DMA1_Stream5_IRQHandler +DMA1_Stream6_IRQHandler +ADC_IRQHandler +CAN1_TX_IRQHandler +CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_TIM9_IRQHandler +TIM1_UP_TIM10_IRQHandler +TIM1_TRG_COM_TIM11_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +OTG_FS_WKUP_IRQHandler +TIM8_BRK_TIM12_IRQHandler +TIM8_UP_TIM13_IRQHandler +TIM8_TRG_COM_TIM14_IRQHandler +TIM8_CC_IRQHandler +DMA1_Stream7_IRQHandler +FSMC_IRQHandler +SDIO_IRQHandler +TIM5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Stream0_IRQHandler +DMA2_Stream1_IRQHandler +DMA2_Stream2_IRQHandler +DMA2_Stream3_IRQHandler +DMA2_Stream4_IRQHandler +ETH_IRQHandler +ETH_WKUP_IRQHandler +CAN2_TX_IRQHandler +CAN2_RX0_IRQHandler +CAN2_RX1_IRQHandler +CAN2_SCE_IRQHandler +OTG_FS_IRQHandler +DMA2_Stream5_IRQHandler +DMA2_Stream6_IRQHandler +DMA2_Stream7_IRQHandler +USART6_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +OTG_HS_EP1_OUT_IRQHandler +OTG_HS_EP1_IN_IRQHandler +OTG_HS_WKUP_IRQHandler +OTG_HS_IRQHandler +DCMI_IRQHandler +CRYP_IRQHandler +HASH_RNG_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE***** diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/Device/STM32F207IG/system_stm32f2xx.c b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/Device/STM32F207IG/system_stm32f2xx.c new file mode 100644 index 000000000..da0e189c8 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/Device/STM32F207IG/system_stm32f2xx.c @@ -0,0 +1,536 @@ +/** + ****************************************************************************** + * @file system_stm32f2xx.c + * @author MCD Application Team + * @version V1.0.0 + * @date 18-April-2011 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * This file contains the system clock configuration for STM32F2xx devices, + * and is generated by the clock configuration tool + * "STM32f2xx_Clock_Configuration_V1.0.0.xls" + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * and Divider factors, AHB/APBx prescalers and Flash settings), + * depending on the configuration made in the clock xls tool. + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f2xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (16 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f2xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 25MHz, refer to "HSE_VALUE" define + * in "stm32f2xx.h" file. When HSE is used as system clock source, directly or + * through PLL, and you are using different crystal you have to adapt the HSE + * value to your own configuration. + * + * 5. This file configures the system clock as follows: + *============================================================================= + *============================================================================= + * Supported STM32F2xx device revision | Rev B and Y + *----------------------------------------------------------------------------- + * System Clock source | PLL (HSE) + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 120000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 120000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 4 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 2 + *----------------------------------------------------------------------------- + * HSE Frequency(Hz) | 25000000 + *----------------------------------------------------------------------------- + * PLL_M | 25 + *----------------------------------------------------------------------------- + * PLL_N | 240 + *----------------------------------------------------------------------------- + * PLL_P | 2 + *----------------------------------------------------------------------------- + * PLL_Q | 5 + *----------------------------------------------------------------------------- + * PLLI2S_N | NA + *----------------------------------------------------------------------------- + * PLLI2S_R | NA + *----------------------------------------------------------------------------- + * I2S input clock | NA + *----------------------------------------------------------------------------- + * VDD(V) | 3.3 + *----------------------------------------------------------------------------- + * Flash Latency(WS) | 3 + *----------------------------------------------------------------------------- + * Prefetch Buffer | ON + *----------------------------------------------------------------------------- + * Instruction cache | ON + *----------------------------------------------------------------------------- + * Data cache | ON + *----------------------------------------------------------------------------- + * Require 48MHz for USB OTG FS, | Enabled + * SDIO and RNG clock | + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f2xx_system + * @{ + */ + +/** @addtogroup STM32F2xx_System_Private_Includes + * @{ + */ + +#include "stm32f2xx.h" + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_Defines + * @{ + */ + +/*!< Uncomment the following line if you need to use external SRAM mounted + on STM322xG_EVAL board as data memory */ +/* #define DATA_IN_ExtSRAM */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ + + +/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */ +#define PLL_M 25 +#define PLL_N 240 + +/* SYSCLK = PLL_VCO / PLL_P */ +#define PLL_P 2 + +/* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */ +#define PLL_Q 5 + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_Variables + * @{ + */ + + uint32_t SystemCoreClock = 120000000; + + __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemFrequency variable. + * @param None + * @retval None + */ +void SystemInit(void) +{ + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000; + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x24003010; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Disable all interrupts */ + RCC->CIR = 0x00000000; + +#ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); +#endif /* DATA_IN_ExtSRAM */ + + /* Configure the System clock source, PLL Multiplier and Divider factors, + AHB/APBx prescalers and Flash settings ----------------------------------*/ + SetSysClock(); + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f2xx.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f2xx.h file (default value + * 25 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock source */ + + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N + SYSCLK = PLL_VCO / PLL_P + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; + pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; + + if (pllsource != 0) + { + /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); + } + else + { + /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); + } + + pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; + SystemCoreClock = pllvco/pllp; + break; + default: + SystemCoreClock = HSI_VALUE; + break; + } + /* Compute HCLK frequency --------------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock source, PLL Multiplier and Divider factors, + * AHB/APBx prescalers and Flash settings + * @Note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ +static void SetSysClock(void) +{ +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* HCLK = SYSCLK / 1*/ + RCC->CFGR |= RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK / 2*/ + RCC->CFGR |= RCC_CFGR_PPRE2_DIV2; + + /* PCLK1 = HCLK / 4*/ + RCC->CFGR |= RCC_CFGR_PPRE1_DIV4; + + /* Configure the main PLL */ + RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) | + (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24); + + /* Enable the main PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till the main PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Configure Flash prefetch, Instruction cache, Data cache and wait state */ + FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_3WS; + + /* Select the main PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= RCC_CFGR_SW_PLL; + + /* Wait till the main PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL); + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } + +} + +/** + * @brief Setup the external memory controller. Called in startup_stm32f2xx.s + * before jump to __main + * @param None + * @retval None + */ +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f2xx.s before jump to main. + * This function configures the external SRAM mounted on STM322xG_EVAL board + * This SRAM will be used as program data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ +/*-- GPIOs Configuration -----------------------------------------------------*/ +/* + +-------------------+--------------------+------------------+------------------+ + + SRAM pins assignment + + +-------------------+--------------------+------------------+------------------+ + | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | + | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | + | PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | + | PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | + | PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | + | PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | + | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 | + | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+ + | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 | + | PD14 <-> FSMC_D0 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 | + | PD15 <-> FSMC_D1 | PE15 <-> FSMC_D12 |------------------+ + +-------------------+--------------------+ +*/ + /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */ + RCC->AHB1ENR = 0x00000078; + + /* Connect PDx pins to FSMC Alternate function */ + GPIOD->AFR[0] = 0x00cc00cc; + GPIOD->AFR[1] = 0xcc0ccccc; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xa2aa0a0a; + /* Configure PDx pins speed to 100 MHz */ + GPIOD->OSPEEDR = 0xf3ff0f0f; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FSMC Alternate function */ + GPIOE->AFR[0] = 0xc00000cc; + GPIOE->AFR[1] = 0xcccccccc; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xaaaa800a; + /* Configure PEx pins speed to 100 MHz */ + GPIOE->OSPEEDR = 0xffffc00f; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FSMC Alternate function */ + GPIOF->AFR[0] = 0x00cccccc; + GPIOF->AFR[1] = 0xcccc0000; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xaa000aaa; + /* Configure PFx pins speed to 100 MHz */ + GPIOF->OSPEEDR = 0xff000fff; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FSMC Alternate function */ + GPIOG->AFR[0] = 0x00cccccc; + GPIOG->AFR[1] = 0x000000c0; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0x00080aaa; + /* Configure PGx pins speed to 100 MHz */ + GPIOG->OSPEEDR = 0x000c0fff; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + +/*-- FSMC Configuration ------------------------------------------------------*/ + /* Enable the FSMC interface clock */ + RCC->AHB3ENR = 0x00000001; + + /* Configure and enable Bank1_SRAM2 */ + FSMC_Bank1->BTCR[2] = 0x00001015; + FSMC_Bank1->BTCR[3] = 0x00010400; + FSMC_Bank1E->BWTR[2] = 0x0fffffff; +/* + Bank1_SRAM2 is configured as follow: + + p.FSMC_AddressSetupTime = 0; + p.FSMC_AddressHoldTime = 0; + p.FSMC_DataSetupTime = 4; + p.FSMC_BusTurnAroundDuration = 1; + p.FSMC_CLKDivision = 0; + p.FSMC_DataLatency = 0; + p.FSMC_AccessMode = FSMC_AccessMode_A; + + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; +*/ + +} +#endif /* DATA_IN_ExtSRAM */ + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/File_System/FS_Config.c b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/File_System/FS_Config.c new file mode 100644 index 000000000..78564b080 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/File_System/FS_Config.c @@ -0,0 +1,72 @@ +/*------------------------------------------------------------------------------ + * MDK Middleware - Component ::File System + * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved. + *------------------------------------------------------------------------------ + * Name: FS_Config.c + * Purpose: File System Configuration + * Rev.: V5.00 + *----------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// File System +// Define File System global parameters + +// Number of open files <4-16> +// Define number of files that can be +// opened at the same time. +// Default: 8 +#define NUM_FILES 8 + +// FAT Name Cache Size <0-1000000> +// Define number of cached FAT file or directory names. +// 48 bytes of RAM is required for each cached name. +#define FAT_NAME_CACHE_SIZE 0 + +// Relocate FAT Name Cache Buffer +// Locate Cache Buffer at a specific address. +#define FAT_NAME_CACHE_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Define the Cache buffer base address. +#define FAT_NAME_CACHE_ADDR 0x60000000 + +// + +// + +#include "..\RTE_Components.h" + +#ifdef RTE_FileSystem_Drive_RAM +#include "FS_Config_RAM.h" +#endif + +#ifdef RTE_FileSystem_Drive_NOR_0 +#include "FS_Config_NOR_0.h" +#endif +#ifdef RTE_FileSystem_Drive_NOR_1 +#include "FS_Config_NOR_1.h" +#endif + +#ifdef RTE_FileSystem_Drive_NAND_0 +#include "FS_Config_NAND_0.h" +#endif +#ifdef RTE_FileSystem_Drive_NAND_1 +#include "FS_Config_NAND_1.h" +#endif + +#ifdef RTE_FileSystem_Drive_MC_0 +#include "FS_Config_MC_0.h" +#endif +#ifdef RTE_FileSystem_Drive_MC_1 +#include "FS_Config_MC_1.h" +#endif + +#ifdef RTE_FileSystem_Drive_USB_0 +#include "FS_Config_USB_0.h" +#endif +#ifdef RTE_FileSystem_Drive_USB_1 +#include "FS_Config_USB_1.h" +#endif + +#include "fs_config.h" diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/File_System/FS_Config_MC_0.h b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/File_System/FS_Config_MC_0.h new file mode 100644 index 000000000..0b1c6d3a7 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/File_System/FS_Config_MC_0.h @@ -0,0 +1,57 @@ +/*------------------------------------------------------------------------------ + * MDK Middleware - Component ::File System:Drive + * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved. + *------------------------------------------------------------------------------ + * Name: FS_Config_MC_0.h + * Purpose: File System Configuration for Memory Card Drive + * Rev.: V5.01 + *----------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// Memory Card Drive 0 +// Configuration for SD/SDHC/MMC Memory Card assigned to drive letter "M0:" +#define MC0_ENABLE 1 + +// Connect to hardware via Driver_MCI# <0-255> +// Select driver control block for hardware interface +#define MC0_MCI_DRIVER 0 + +// Connect to hardware via Driver_SPI# <0-255> +// Select driver control block for hardware interface when in SPI mode +#define MC0_SPI_DRIVER 0 + +// Memory Card Interface Mode <0=>Native <1=>SPI +// Native uses a SD Bus with up to 8 data lines, CLK, and CMD +// SPI uses 2 data lines (MOSI and MISO), SCLK and CS +// When using SPI both Driver_SPI# and Driver_MCI# must be specified +// since the MCI driver provides the control interface lines. +#define MC0_SPI 0 + +// Drive Cache Size <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Drive Cache stores data sectors and may be increased to speed-up +// file read/write operations on this drive (default: 4 KB) +#define MC0_CACHE_SIZE 4 + +// Locate Drive Cache and Drive Buffer +// Some microcontrollers support DMA only in specific memory areas and +// require to locate the drive buffers at a fixed address. +#define MC0_CACHE_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Set buffer base address to RAM areas that support DMA with the drive. +#define MC0_CACHE_ADDR 0x7FD00000 + +// + +// Use FAT Journal +// Protect File Allocation Table and Directory Entries for +// fail-safe operation. +#define MC0_FAT_JOURNAL 0 + +// Default Drive "M0:" +// Use this drive when no drive letter is specified. +#define MC0_DEFAULT_DRIVE 1 + +// diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/RTE_Components.h b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/RTE_Components.h new file mode 100644 index 000000000..aa51462ab --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/RTE_Components.h @@ -0,0 +1,19 @@ + +/* + * Auto generated Run-Time-Environment Component Configuration File + * *** Do not modify ! *** + * + * Project: 'CryptBenchmark' + * Target: 'CryptBenchmark' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + +#define RTE_DEVICE_STARTUP_STM32F2xx /* Device Startup for STM32F2 */ +#define RTE_Drivers_MCI0 /* Driver MCI0 */ +#define RTE_FileSystem_Core /* File System Core */ + #define RTE_FileSystem_LFN /* File System with Long Filename support */ +#define RTE_FileSystem_Drive_MC_0 /* File System Memory Card Drive 0 */ + +#endif /* RTE_COMPONENTS_H */ diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/STM32_SWO.ini b/IDE/MDK5-ARM/Projects/CryptBenchmark/STM32_SWO.ini new file mode 100644 index 000000000..239abce37 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/STM32_SWO.ini @@ -0,0 +1,36 @@ +/******************************************************************************/ +/* STM32_SWO.ini: STM32 Debugger Initialization File */ +/******************************************************************************/ +// <<< Use Configuration Wizard in Context Menu >>> // +/******************************************************************************/ +/* This file is part of the uVision/ARM development tools. */ +/* Copyright (c) 2004-2013 Keil Software. All rights reserved. */ +/* This software may only be used under the terms of a valid, current, */ +/* end user licence from KEIL for a compatible version of KEIL software */ +/* development tools. Nothing else gives you the right to use this software. */ +/******************************************************************************/ + + +FUNC void DebugSetup (void) { +// Debug MCU Configuration +// DBG_SLEEP Debug Sleep Mode +// DBG_STOP Debug Stop Mode +// DBG_STANDBY Debug Standby Mode +// TRACE_IOEN Trace I/O Enable +// TRACE_MODE Trace Mode +// <0=> Asynchronous +// <1=> Synchronous: TRACEDATA Size 1 +// <2=> Synchronous: TRACEDATA Size 2 +// <3=> Synchronous: TRACEDATA Size 4 +// DBG_IWDG_STOP Independant Watchdog Stopped when Core is halted +// DBG_WWDG_STOP Window Watchdog Stopped when Core is halted +// DBG_TIM1_STOP Timer 1 Stopped when Core is halted +// DBG_TIM2_STOP Timer 2 Stopped when Core is halted +// DBG_TIM3_STOP Timer 3 Stopped when Core is halted +// DBG_TIM4_STOP Timer 4 Stopped when Core is halted +// DBG_CAN_STOP CAN Stopped when Core is halted +// + _WDWORD(0xE0042004, 0x00000027); // DBGMCU_CR +} + +DebugSetup(); // Debugger Setup diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/benchmark.c b/IDE/MDK5-ARM/Projects/CryptBenchmark/benchmark.c new file mode 100644 index 000000000..277e808fa --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/benchmark.c @@ -0,0 +1,1064 @@ +/* benchmark.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +/* CTaoCrypt benchmark */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#ifdef HAVE_CAVIUM + #include "cavium_sysdep.h" + #include "cavium_common.h" + #include "cavium_ioctl.h" +#endif +#if defined(USE_CERT_BUFFERS_1024) || defined(USE_CERT_BUFFERS_2048) + /* include test cert and key buffers for use with NO_FILESYSTEM */ + #if defined(CYASSL_MDK_ARM) && !defined(SINGLE_THREADED) + #include "cert_data.h" /* use certs_test.c for initial data, + so other commands can share the data. */ + #else + #include + #endif +#endif + +#if defined(CYASSL_MDK_ARM) + #include + extern FILE * CyaSSL_fopen(const char *fname, const char *mode) ; + #define fopen CyaSSL_fopen +#endif + +#ifdef HAVE_BLAKE2 + #include + void bench_blake2(void); +#endif + +#ifdef _MSC_VER + /* 4996 warning to use MS extensions e.g., strcpy_s instead of strncpy */ + #pragma warning(disable: 4996) +#endif + +void bench_des(void); +void bench_arc4(void); +void bench_hc128(void); +void bench_rabbit(void); +void bench_aes(int); +void bench_aesgcm(void); +void bench_aesccm(void); +void bench_camellia(void); + +void bench_md5(void); +void bench_sha(void); +void bench_sha256(void); +void bench_sha512(void); +void bench_ripemd(void); + +void bench_rsa(void); +void bench_rsaKeyGen(void); +void bench_dh(void); +#ifdef HAVE_ECC +void bench_eccKeyGen(void); +void bench_eccKeyAgree(void); +#endif + +double current_time(int); + + +#ifdef HAVE_CAVIUM + +static int OpenNitroxDevice(int dma_mode,int dev_id) +{ + Csp1CoreAssignment core_assign; + Uint32 device; + + if (CspInitialize(CAVIUM_DIRECT,CAVIUM_DEV_ID)) + return -1; + if (Csp1GetDevType(&device)) + return -1; + if (device != NPX_DEVICE) { + if (ioctl(gpkpdev_hdlr[CAVIUM_DEV_ID], IOCTL_CSP1_GET_CORE_ASSIGNMENT, + (Uint32 *)&core_assign)!= 0) + return -1; + } + CspShutdown(CAVIUM_DEV_ID); + + return CspInitialize(dma_mode, dev_id); +} + +#endif + + +/* so embedded projects can pull in tests on their own */ +#if !defined(NO_MAIN_DRIVER) + +int main(int argc, char** argv) + +{ + (void)argc; + (void)argv; +#else +int benchmark_test(void *args) +{ +#endif + + #ifdef HAVE_CAVIUM + int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID); + if (ret != 0) { + printf("Cavium OpenNitroxDevice failed\n"); + exit(-1); + } +#endif /* HAVE_CAVIUM */ +#ifndef NO_AES + bench_aes(0); + bench_aes(1); +#endif +#ifdef HAVE_AESGCM + bench_aesgcm(); +#endif +#ifdef HAVE_AESCCM + bench_aesccm(); +#endif +#ifdef HAVE_CAMELLIA + bench_camellia(); +#endif +#ifndef NO_RC4 + bench_arc4(); +#endif +#ifdef HAVE_HC128 + bench_hc128(); +#endif +#ifndef NO_RABBIT + bench_rabbit(); +#endif +#ifndef NO_DES3 + bench_des(); +#endif + + printf("\n"); + +#ifndef NO_MD5 + bench_md5(); +#endif +#ifndef NO_SHA + bench_sha(); +#endif +#ifndef NO_SHA256 + bench_sha256(); +#endif +#ifdef CYASSL_SHA512 + bench_sha512(); +#endif +#ifdef CYASSL_RIPEMD + bench_ripemd(); +#endif +#ifdef HAVE_BLAKE2 + bench_blake2(); +#endif + + printf("\n"); + +#ifndef NO_RSA + bench_rsa(); +#endif + +#ifndef NO_DH + bench_dh(); +#endif + +#if defined(CYASSL_KEY_GEN) && !defined(NO_RSA) + bench_rsaKeyGen(); +#endif + +#ifdef HAVE_ECC + bench_eccKeyGen(); + bench_eccKeyAgree(); +#endif + + return 0; +} + + +#ifdef BENCH_EMBEDDED +const int numBlocks = 25; /* how many kB/megs to test (en/de)cryption */ +const char blockType[] = "kB"; /* used in printf output */ +const int times = 1; /* public key iterations */ +#else +const int numBlocks = 5; +const char blockType[] = "megs"; +const int times = 100; +#endif + +const byte key[] = +{ + 0x01,0x23,0x45,0x67,0x89,0xab,0xcd,0xef, + 0xfe,0xde,0xba,0x98,0x76,0x54,0x32,0x10, + 0x89,0xab,0xcd,0xef,0x01,0x23,0x45,0x67 +}; + +const byte iv[] = +{ + 0x12,0x34,0x56,0x78,0x90,0xab,0xcd,0xef, + 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01, + 0x11,0x21,0x31,0x41,0x51,0x61,0x71,0x81 + +}; + + +/* use kB instead of mB for embedded benchmarking */ +#ifdef BENCH_EMBEDDED +byte plain [1024]; +byte cipher[1024]; +#else +byte plain [1024*1024]; +byte cipher[1024*1024]; +#endif + + +#ifndef NO_AES +void bench_aes(int show) +{ + Aes enc; + double start, total, persec; + int i; + +#ifdef HAVE_CAVIUM + if (AesInitCavium(&enc, CAVIUM_DEV_ID) != 0) + printf("aes init cavium failed\n"); +#endif + + AesSetKey(&enc, key, 16, iv, AES_ENCRYPTION); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + AesCbcEncrypt(&enc, plain, cipher, sizeof(plain)); + + total = current_time(0) - start; + + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + if (show) + printf("AES %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +#ifdef HAVE_CAVIUM + AesFreeCavium(&enc); +#endif +} +#endif + + +byte additional[13]; +byte tag[16]; + + +#ifdef HAVE_AESGCM +void bench_aesgcm(void) +{ + Aes enc; + double start, total, persec; + int i; + + AesGcmSetKey(&enc, key, 16); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + AesGcmEncrypt(&enc, cipher, plain, sizeof(plain), iv, 12, + tag, 16, additional, 13); + + total = current_time(0) - start; + + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("AES-GCM %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif + + +#ifdef HAVE_AESCCM +void bench_aesccm(void) +{ + Aes enc; + double start, total, persec; + int i; + + AesCcmSetKey(&enc, key, 16); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + AesCcmEncrypt(&enc, cipher, plain, sizeof(plain), iv, 12, + tag, 16, additional, 13); + + total = current_time(0) - start; + + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("AES-CCM %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif + + +#ifdef HAVE_CAMELLIA +void bench_camellia(void) +{ + Camellia cam; + double start, total, persec; + int i; + + CamelliaSetKey(&cam, key, 16, iv); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + CamelliaCbcEncrypt(&cam, plain, cipher, sizeof(plain)); + + total = current_time(0) - start; + + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("Camellia %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif + + +#ifndef NO_DES3 +void bench_des(void) +{ + Des3 enc; + double start, total, persec; + int i; + +#ifdef HAVE_CAVIUM + if (Des3_InitCavium(&enc, CAVIUM_DEV_ID) != 0) + printf("des3 init cavium failed\n"); +#endif + Des3_SetKey(&enc, key, iv, DES_ENCRYPTION); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + Des3_CbcEncrypt(&enc, plain, cipher, sizeof(plain)); + + total = current_time(0) - start; + + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("3DES %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +#ifdef HAVE_CAVIUM + Des3_FreeCavium(&enc); +#endif +} +#endif + + +#ifndef NO_RC4 +void bench_arc4(void) +{ + Arc4 enc; + double start, total, persec; + int i; + +#ifdef HAVE_CAVIUM + if (Arc4InitCavium(&enc, CAVIUM_DEV_ID) != 0) + printf("arc4 init cavium failed\n"); +#endif + + Arc4SetKey(&enc, key, 16); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + Arc4Process(&enc, cipher, plain, sizeof(plain)); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("ARC4 %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +#ifdef HAVE_CAVIUM + Arc4FreeCavium(&enc); +#endif +} +#endif + + +#ifdef HAVE_HC128 +void bench_hc128(void) +{ + HC128 enc; + double start, total, persec; + int i; + + Hc128_SetKey(&enc, key, iv); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + Hc128_Process(&enc, cipher, plain, sizeof(plain)); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("HC128 %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif /* HAVE_HC128 */ + + +#ifndef NO_RABBIT +void bench_rabbit(void) +{ + Rabbit enc; + double start, total, persec; + int i; + + RabbitSetKey(&enc, key, iv); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + RabbitProcess(&enc, cipher, plain, sizeof(plain)); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("RABBIT %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif /* NO_RABBIT */ + + +#ifndef NO_MD5 +void bench_md5(void) +{ + Md5 hash; + byte digest[MD5_DIGEST_SIZE]; + double start, total, persec; + int i; + + InitMd5(&hash); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + Md5Update(&hash, plain, sizeof(plain)); + + Md5Final(&hash, digest); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("MD5 %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif /* NO_MD5 */ + + +#ifndef NO_SHA +void bench_sha(void) +{ + Sha hash; + byte digest[SHA_DIGEST_SIZE]; + double start, total, persec; + int i; + + InitSha(&hash); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + ShaUpdate(&hash, plain, sizeof(plain)); + + ShaFinal(&hash, digest); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("SHA %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif /* NO_SHA */ + + +#ifndef NO_SHA256 +void bench_sha256(void) +{ + Sha256 hash; + byte digest[SHA256_DIGEST_SIZE]; + double start, total, persec; + int i; + + InitSha256(&hash); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + Sha256Update(&hash, plain, sizeof(plain)); + + Sha256Final(&hash, digest); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("SHA-256 %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif + +#ifdef CYASSL_SHA512 +void bench_sha512(void) +{ + Sha512 hash; + byte digest[SHA512_DIGEST_SIZE]; + double start, total, persec; + int i; + + InitSha512(&hash); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + Sha512Update(&hash, plain, sizeof(plain)); + + Sha512Final(&hash, digest); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("SHA-512 %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif + +#ifdef CYASSL_RIPEMD +void bench_ripemd(void) +{ + RipeMd hash; + byte digest[RIPEMD_DIGEST_SIZE]; + double start, total, persec; + int i; + + InitRipeMd(&hash); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + RipeMdUpdate(&hash, plain, sizeof(plain)); + + RipeMdFinal(&hash, digest); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("RIPEMD %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif + + +#ifdef HAVE_BLAKE2 +void bench_blake2(void) +{ + Blake2b b2b; + byte digest[64]; + double start, total, persec; + int i; + + InitBlake2b(&b2b, 64); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + Blake2bUpdate(&b2b, plain, sizeof(plain)); + + Blake2bFinal(&b2b, digest, 64); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("BLAKE2b %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif + + +#if !defined(NO_RSA) || !defined(NO_DH) \ + || defined(CYASSL_KEYGEN) || defined(HAVE_ECC) +RNG rng; +#endif + +#ifndef NO_RSA + + +#if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) && \ + defined(CYASSL_MDK_SHELL) +static char *certRSAname = "certs/rsa2048.der" ; +void set_Bench_RSA_File(char * cert) { certRSAname = cert ; } + /* set by shell command */ +#elif defined(CYASSL_MDK_SHELL) + /* nothing */ +#else +static const char *certRSAname = "certs/rsa2048.der" ; +#endif + +void bench_rsa(void) +{ + int i; + int ret; + byte tmp[3072]; + size_t bytes; + word32 idx = 0; + + byte message[] = "Everyone gets Friday off."; + byte enc[512]; /* for up to 4096 bit */ + const int len = (int)strlen((char*)message); + double start, total, each, milliEach; + + RsaKey rsaKey; + int rsaKeySz = 2048; /* used in printf */ + +#ifdef USE_CERT_BUFFERS_1024 + XMEMCPY(tmp, rsa_key_der_1024, sizeof_rsa_key_der_1024); + bytes = sizeof_rsa_key_der_1024; + rsaKeySz = 1024; +#elif defined(USE_CERT_BUFFERS_2048) + XMEMCPY(tmp, rsa_key_der_2048, sizeof_rsa_key_der_2048); + bytes = sizeof_rsa_key_der_2048; +#else + FILE* file = fopen(certRSAname, "rb"); + + if (!file) { + printf("can't find %s, Please run from CyaSSL home dir\n", certRSAname); + return; + } + + bytes = fread(tmp, 1, sizeof(tmp), file); + fclose(file); +#endif /* USE_CERT_BUFFERS */ + + +#ifdef HAVE_CAVIUM + if (RsaInitCavium(&rsaKey, CAVIUM_DEV_ID) != 0) + printf("RSA init cavium failed\n"); +#endif + ret = InitRng(&rng); + if (ret < 0) { + printf("InitRNG failed\n"); + return; + } + InitRsaKey(&rsaKey, 0); + ret = RsaPrivateKeyDecode(tmp, &idx, &rsaKey, (word32)bytes); + + start = current_time(1); + + for (i = 0; i < times; i++) + ret = RsaPublicEncrypt(message,len,enc,sizeof(enc), &rsaKey, &rng); + + total = current_time(0) - start; + each = total / times; /* per second */ + milliEach = each * 1000; /* milliseconds */ + + printf("RSA %d encryption took %6.2f milliseconds, avg over %d" + " iterations\n", rsaKeySz, milliEach, times); + + if (ret < 0) { + printf("Rsa Public Encrypt failed\n"); + return; + } + + start = current_time(1); + + for (i = 0; i < times; i++) { + byte out[512]; /* for up to 4096 bit */ + RsaPrivateDecrypt(enc, (word32)ret, out, sizeof(out), &rsaKey); + } + + total = current_time(0) - start; + each = total / times; /* per second */ + milliEach = each * 1000; /* milliseconds */ + + printf("RSA %d decryption took %6.2f milliseconds, avg over %d" + " iterations\n", rsaKeySz, milliEach, times); + + FreeRsaKey(&rsaKey); +#ifdef HAVE_CAVIUM + RsaFreeCavium(&rsaKey); +#endif +} +#endif + + +#ifndef NO_DH + + +#if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) && \ + defined(CYASSL_MDK_SHELL) +static char *certDHname = "certs/dh2048.der" ; +void set_Bench_DH_File(char * cert) { certDHname = cert ; } + /* set by shell command */ +#elif defined(CYASSL_MDK_SHELL) + /* nothing */ +#else +static const char *certDHname = "certs/dh2048.der" ; +#endif + +void bench_dh(void) +{ + int i; + byte tmp[1024]; + size_t bytes; + word32 idx = 0, pubSz, privSz, pubSz2, privSz2, agreeSz; + + byte pub[256]; /* for 2048 bit */ + byte priv[256]; /* for 2048 bit */ + byte pub2[256]; /* for 2048 bit */ + byte priv2[256]; /* for 2048 bit */ + byte agree[256]; /* for 2048 bit */ + + double start, total, each, milliEach; + DhKey dhKey; + int dhKeySz = 2048; /* used in printf */ + + +#ifdef USE_CERT_BUFFERS_1024 + XMEMCPY(tmp, dh_key_der_1024, sizeof_dh_key_der_1024); + bytes = sizeof_dh_key_der_1024; + dhKeySz = 1024; +#elif defined(USE_CERT_BUFFERS_2048) + XMEMCPY(tmp, dh_key_der_2048, sizeof_dh_key_der_2048); + bytes = sizeof_dh_key_der_2048; +#else + FILE* file = fopen(certDHname, "rb"); + + if (!file) { + printf("can't find %s, Please run from CyaSSL home dir\n", certDHname); + return; + } + + bytes = fread(tmp, 1, sizeof(tmp), file); +#endif /* USE_CERT_BUFFERS */ + + + InitDhKey(&dhKey); + bytes = DhKeyDecode(tmp, &idx, &dhKey, (word32)bytes); + if (bytes != 0) { + printf("dhekydecode failed, can't benchmark\n"); + #if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) + fclose(file); + #endif + return; + } + + start = current_time(1); + + for (i = 0; i < times; i++) + DhGenerateKeyPair(&dhKey, &rng, priv, &privSz, pub, &pubSz); + + total = current_time(0) - start; + each = total / times; /* per second */ + milliEach = each * 1000; /* milliseconds */ + + printf("DH %d key generation %6.2f milliseconds, avg over %d" + " iterations\n", dhKeySz, milliEach, times); + + DhGenerateKeyPair(&dhKey, &rng, priv2, &privSz2, pub2, &pubSz2); + start = current_time(1); + + for (i = 0; i < times; i++) + DhAgree(&dhKey, agree, &agreeSz, priv, privSz, pub2, pubSz2); + + total = current_time(0) - start; + each = total / times; /* per second */ + milliEach = each * 1000; /* milliseconds */ + + printf("DH %d key agreement %6.2f milliseconds, avg over %d" + " iterations\n", dhKeySz, milliEach, times); + +#if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) + fclose(file); +#endif + FreeDhKey(&dhKey); +} +#endif + +#if defined(CYASSL_KEY_GEN) && !defined(NO_RSA) +void bench_rsaKeyGen(void) +{ + RsaKey genKey; + double start, total, each, milliEach; + int i; + const int genTimes = 5; + + /* 1024 bit */ + start = current_time(1); + + for(i = 0; i < genTimes; i++) { + InitRsaKey(&genKey, 0); + MakeRsaKey(&genKey, 1024, 65537, &rng); + FreeRsaKey(&genKey); + } + + total = current_time(0) - start; + each = total / genTimes; /* per second */ + milliEach = each * 1000; /* millisconds */ + printf("\n"); + printf("RSA 1024 key generation %6.2f milliseconds, avg over %d" + " iterations\n", milliEach, genTimes); + + /* 2048 bit */ + start = current_time(1); + + for(i = 0; i < genTimes; i++) { + InitRsaKey(&genKey, 0); + MakeRsaKey(&genKey, 2048, 65537, &rng); + FreeRsaKey(&genKey); + } + + total = current_time(0) - start; + each = total / genTimes; /* per second */ + milliEach = each * 1000; /* millisconds */ + printf("RSA 2048 key generation %6.2f milliseconds, avg over %d" + " iterations\n", milliEach, genTimes); +} +#endif /* CYASSL_KEY_GEN */ + +#ifdef HAVE_ECC +void bench_eccKeyGen(void) +{ + ecc_key genKey; + double start, total, each, milliEach; + int i; + const int genTimes = 5; + + /* 256 bit */ + start = current_time(1); + + for(i = 0; i < genTimes; i++) { + ecc_make_key(&rng, 32, &genKey); + ecc_free(&genKey); + } + + total = current_time(0) - start; + each = total / genTimes; /* per second */ + milliEach = each * 1000; /* millisconds */ + printf("\n"); + printf("ECC 256 key generation %6.2f milliseconds, avg over %d" + " iterations\n", milliEach, genTimes); +} + + +void bench_eccKeyAgree(void) +{ + ecc_key genKey, genKey2; + double start, total, each, milliEach; + int i, ret; + const int agreeTimes = 5; + byte shared[1024]; + byte sig[1024]; + byte digest[32]; + word32 x; + + ecc_init(&genKey); + ecc_init(&genKey2); + + ret = ecc_make_key(&rng, 32, &genKey); + if (ret != 0) { + printf("ecc_make_key failed\n"); + return; + } + ret = ecc_make_key(&rng, 32, &genKey2); + if (ret != 0) { + printf("ecc_make_key failed\n"); + return; + } + + /* 256 bit */ + start = current_time(1); + + for(i = 0; i < agreeTimes; i++) { + x = sizeof(shared); + ecc_shared_secret(&genKey, &genKey2, shared, &x); + } + + total = current_time(0) - start; + each = total / agreeTimes; /* per second */ + milliEach = each * 1000; /* millisconds */ + printf("EC-DHE key agreement %6.2f milliseconds, avg over %d" + " iterations\n", milliEach, agreeTimes); + + /* make dummy digest */ + for (i = 0; i < (int)sizeof(digest); i++) + digest[i] = i; + + + start = current_time(1); + + for(i = 0; i < agreeTimes; i++) { + x = sizeof(sig); + ecc_sign_hash(digest, sizeof(digest), sig, &x, &rng, &genKey); + } + + total = current_time(0) - start; + each = total / agreeTimes; /* per second */ + milliEach = each * 1000; /* millisconds */ + printf("EC-DSA sign time %6.2f milliseconds, avg over %d" + " iterations\n", milliEach, agreeTimes); + + ecc_free(&genKey2); + ecc_free(&genKey); +} +#endif /* HAVE_ECC */ + + +#ifdef _WIN32 + + #define WIN32_LEAN_AND_MEAN + #include + + double current_time(int reset) + { + (void)reset; + + static int init = 0; + static LARGE_INTEGER freq; + + LARGE_INTEGER count; + + if (!init) { + QueryPerformanceFrequency(&freq); + init = 1; + } + + QueryPerformanceCounter(&count); + + return (double)count.QuadPart / freq.QuadPart; + } + +#elif defined MICROCHIP_PIC32 + + #include + + double current_time(int reset) + { + /* NOTE: core timer tick rate = 40 Mhz, 1 tick = 25 ns */ + + unsigned int ns; + + /* should we reset our timer back to zero? Helps prevent timer + rollover */ + + if (reset) { + WriteCoreTimer(0); + } + + /* get timer in ns */ + ns = ReadCoreTimer() * 25; + + /* return seconds as a double */ + return ( ns / 1000000000.0 ); + } + +#elif defined CYASSL_MDK_ARM + extern double current_time(int reset) ; +#else + + #include + + double current_time(int reset) + { + (void) reset; + + struct timeval tv; + gettimeofday(&tv, 0); + + return (double)tv.tv_sec + (double)tv.tv_usec / 1000000; + } + +#endif /* _WIN32 */ + diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/main.c b/IDE/MDK5-ARM/Projects/CryptBenchmark/main.c new file mode 100644 index 000000000..4bc12cbd0 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/main.c @@ -0,0 +1,71 @@ +/* main.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +#include +#include + +#include "cmsis_os.h" +#include "rl_fs.h" + +#include + +/*----------------------------------------------------------------------------- + * Initialize a Flash Memory Card + *----------------------------------------------------------------------------*/ +static void init_filesystem (void) { + int32_t retv; + + retv = finit ("M0:"); + if (retv == 0) { + retv = fmount ("M0:"); + if (retv == 0) { + printf ("Drive M0 ready!\n"); + } + else { + printf ("Drive M0 mount failed!\n"); + } + } + else { + printf ("Drive M0 initialization failed!\n"); + } +} +extern void benchmark_test(void * arg) ; +extern void init_time(void) ; + +/*----------------------------------------------------------------------------- + * mian entry + *----------------------------------------------------------------------------*/ + +int main() +{ + void * arg = NULL ; + + init_time() ; + init_filesystem (); + printf("=== Start: Crypt Benchmark ===\n") ; + benchmark_test(arg) ; + printf("=== End: Crypt Benchmark ===\n") ; + +} diff --git a/IDE/MDK5-ARM/Projects/CryptTest/Abstract.txt b/IDE/MDK5-ARM/Projects/CryptTest/Abstract.txt new file mode 100644 index 000000000..5d4a8312e --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptTest/Abstract.txt @@ -0,0 +1,16 @@ +This program is a simple test suite of wolfCrypt library. + +In order to run this test suite, copy +{PACK}\wolfSSL\CyaSSL\2.8.0\cyassl\certs folder and files to the SD memory. + +For test configuration, refer config-Crypt.h. + +For the hardware crypt on config-Crypt.h, download +STSW-STM32062: STM32F2xx standard peripherals library at +http://www.st.com/. Copy Libraries\STM32F2xx_StdPeriph_Driver\{inc,src} to + {PACK}\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib + + + Support +------- +Please send questions or comments to support@wolfssl.com diff --git a/IDE/MDK5-ARM/Projects/CryptTest/CryptTest.uvoptx b/IDE/MDK5-ARM/Projects/CryptTest/CryptTest.uvoptx new file mode 100644 index 000000000..a7474ba71 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptTest/CryptTest.uvoptx @@ -0,0 +1,1094 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + CryptTest + 0x4 + ARM-ADS + + 120000000 + + 1 + 1 + 0 + 1 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Object\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM3 + SARMCM3.DLL + -REMAP -MPU + TCM.DLL + -pCM3 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 8 + + + + + + + + + + .\STM32_SWO.ini + BIN\ULP2CM3.DLL + + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + ULP2CM3 + -UP1135060 -O206 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO19 -TC120000000 -TP18 -TDX0 -TDD0 -TDS8000 -TDT0 -TDC1F -TIE1 -TIP1 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024.flm -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm) + + + 0 + DLGUARM + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm)) + + + + + + 1 + 8 + tmp + + + + + 2 + 8 + 0x8004dc8 + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\test.c + test.c + 0 + 0 + + + + + Configuration + 1 + 0 + 0 + 0 + + 2 + 3 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\RTE\wolfSSL\config-Crypt.h + config-Crypt.h + 0 + 0 + + + + + Documentation + 1 + 0 + 0 + 0 + + 3 + 4 + 5 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + .\Abstract.txt + Abstract.txt + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + 4 + 5 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib + RTX_CM3.lib + 1 + 0 + + + 4 + 6 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\CMSIS\RTX_Conf_CM.c + RTX_Conf_CM.c + 1 + 0 + + + + + ::Device + 0 + 0 + 0 + 1 + + 5 + 7 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c + DMA_STM32F2xx.c + 1 + 0 + + + 5 + 8 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c + GPIO_STM32F2xx.c + 1 + 0 + + + 5 + 9 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Device\STM32F207IG\RTE_Device.h + RTE_Device.h + 1 + 0 + + + 5 + 10 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Device\STM32F207IG\startup_stm32f2xx.s + startup_stm32f2xx.s + 1 + 0 + + + 5 + 11 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Device\STM32F207IG\system_stm32f2xx.c + system_stm32f2xx.c + 1 + 0 + + + + + ::Drivers + 0 + 0 + 0 + 1 + + 6 + 12 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c + MCI_STM32F2xx.c + 1 + 0 + + + + + ::File System + 0 + 0 + 0 + 1 + + 7 + 13 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib + FS_LFN_CM3_L.lib + 1 + 0 + + + 7 + 14 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\File_System\FS_Config.c + FS_Config.c + 1 + 0 + + + 7 + 15 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\File_System\FS_Config_MC_0.h + FS_Config_MC_0.h + 1 + 0 + + + + + ::wolfSSL + 0 + 0 + 0 + 1 + + 8 + 16 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c + cyassl_MDK_ARM.c + 1 + 0 + + + 8 + 17 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\ssl-dummy.c + ssl-dummy.c + 1 + 0 + + + 8 + 18 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c + time-STM32F2xx.c + 1 + 0 + + + 8 + 19 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c + aes.c + 1 + 0 + + + 8 + 20 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c + arc4.c + 1 + 0 + + + 8 + 21 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c + asm.c + 1 + 0 + + + 8 + 22 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c + asn.c + 1 + 0 + + + 8 + 23 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c + blake2b.c + 1 + 0 + + + 8 + 24 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c + camellia.c + 1 + 0 + + + 8 + 25 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c + coding.c + 1 + 0 + + + 8 + 26 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c + compress.c + 1 + 0 + + + 8 + 27 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c + des3.c + 1 + 0 + + + 8 + 28 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c + dh.c + 1 + 0 + + + 8 + 29 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c + dsa.c + 1 + 0 + + + 8 + 30 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c + ecc.c + 1 + 0 + + + 8 + 31 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c + ecc_fp.c + 1 + 0 + + + 8 + 32 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c + error.c + 1 + 0 + + + 8 + 33 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c + hc128.c + 1 + 0 + + + 8 + 34 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c + hmac.c + 1 + 0 + + + 8 + 35 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c + integer.c + 1 + 0 + + + 8 + 36 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c + logging.c + 1 + 0 + + + 8 + 37 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c + md2.c + 1 + 0 + + + 8 + 38 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c + md4.c + 1 + 0 + + + 8 + 39 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c + md5.c + 1 + 0 + + + 8 + 40 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c + memory.c + 1 + 0 + + + 8 + 41 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c + misc.c + 1 + 0 + + + 8 + 42 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c + pwdbased.c + 1 + 0 + + + 8 + 43 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c + rabbit.c + 1 + 0 + + + 8 + 44 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c + random.c + 1 + 0 + + + 8 + 45 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c + ripemd.c + 1 + 0 + + + 8 + 46 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c + rsa.c + 1 + 0 + + + 8 + 47 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c + sha.c + 1 + 0 + + + 8 + 48 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c + sha256.c + 1 + 0 + + + 8 + 49 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c + sha512.c + 1 + 0 + + + 8 + 50 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c + tfm.c + 1 + 0 + + + 8 + 51 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\wolfSSL\config-Crypt.h + config-Crypt.h + 1 + 0 + + + 8 + 52 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\wolfSSL\config.h + config.h + 1 + 0 + + + + diff --git a/IDE/MDK5-ARM/Projects/CryptTest/CryptTest.uvprojx b/IDE/MDK5-ARM/Projects/CryptTest/CryptTest.uvprojx new file mode 100644 index 000000000..6db3f16fa --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptTest/CryptTest.uvprojx @@ -0,0 +1,919 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + CryptTest + 0x4 + ARM-ADS + + + STM32F207IG + STMicroelectronics + IRAM(0x20000000,0x20000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M3") CLOCK(120000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm)) + 0 + $$Device:STM32F207IG$Device\Include\stm32f2xx.h + + + + + + + + + + $$Device:STM32F207IG$SVD\STM32F20x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Object\ + CryptTest + 1 + 0 + 0 + 1 + 1 + .\Object\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM3 + SARMCM3.DLL + -REMAP -MPU + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + + 0 + 8 + + + + + + + + + + + + + .\STM32_SWO.ini + BIN\ULP2CM3.DLL + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 1 + BIN\ULP2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + HAVE_CONFIG_H MDK_CONF_CryptTest CYASSL_STM32F2xx __DBG_ITM + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + Source + + + main.c + 1 + .\main.c + + + test.c + 1 + .\test.c + + + + + Configuration + + + config-Crypt.h + 5 + .\RTE\wolfSSL\config-Crypt.h + + + + + Documentation + + + Abstract.txt + 5 + .\Abstract.txt + + + + + ::CMSIS + + + RTX_CM3.lib + 4 + C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib + + + RTX_Conf_CM.c + 1 + RTE\CMSIS\RTX_Conf_CM.c + + + + + ::Device + + + DMA_STM32F2xx.c + 1 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c + + + GPIO_STM32F2xx.c + 1 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c + + + RTE_Device.h + 5 + RTE\Device\STM32F207IG\RTE_Device.h + + + startup_stm32f2xx.s + 2 + RTE\Device\STM32F207IG\startup_stm32f2xx.s + + + system_stm32f2xx.c + 1 + RTE\Device\STM32F207IG\system_stm32f2xx.c + + + + + ::Drivers + + + MCI_STM32F2xx.c + 1 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c + + + + + ::File System + + + FS_LFN_CM3_L.lib + 4 + C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib + + + FS_Config.c + 1 + RTE\File_System\FS_Config.c + + + FS_Config_MC_0.h + 5 + RTE\File_System\FS_Config_MC_0.h + + + + + ::wolfSSL + + + cyassl_MDK_ARM.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c + + + ssl-dummy.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\ssl-dummy.c + + + time-STM32F2xx.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c + + + aes.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c + + + arc4.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c + + + asm.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c + + + asn.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c + + + blake2b.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c + + + camellia.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c + + + coding.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c + + + compress.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c + + + des3.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c + + + dh.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c + + + dsa.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c + + + ecc.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c + + + ecc_fp.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c + + + error.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c + + + hc128.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c + + + hmac.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c + + + integer.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c + + + logging.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c + + + md2.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c + + + md4.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c + + + md5.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c + + + memory.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c + + + misc.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c + + + pwdbased.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c + + + rabbit.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c + + + random.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c + + + ripemd.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c + + + rsa.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c + + + sha.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c + + + sha256.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c + + + sha512.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c + + + tfm.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c + + + config-Crypt.h + 5 + RTE\wolfSSL\config-Crypt.h + + + config.h + 5 + RTE\wolfSSL\config.h + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\CMSIS\RTX_Conf_CM.c + + + + + + + + RTE\Device\STM32F207IG\RTE_Device.h + + + + + + + + RTE\Device\STM32F207IG\startup_stm32f2xx.s + + + + + + + + RTE\Device\STM32F207IG\system_stm32f2xx.c + + + + + + + + RTE\File_System\FS_Config.c + + + + + + + + RTE\File_System\FS_Config_MC_0.h + + + + + + + + RTE\Network\Net_Config.c + + + + + + RTE\Network\Net_Config_BSD.h + + + + + + RTE\Network\Net_Config_DNS_Client.h + + + + + + RTE\Network\Net_Config_ETH_0.h + + + + + + RTE\Network\Net_Config_TCP.h + + + + + + RTE\Network\Net_Config_UDP.h + + + + + + RTE\Network\Net_Debug.c + + + + + + RTE\Other\config-Crypt.h + + + + + + RTE\Other\config-FS.h + + + + + + RTE\Other\config-RTX-TCP-FS.h + + + + + + RTE\Other\config.h + + + + + + RTE\wolfSSL\config-Crypt.h + + + + + + + + RTE\wolfSSL\config.h + + + + + + + + + + diff --git a/IDE/MDK5-ARM/Projects/CryptTest/RTE/CMSIS/RTX_Conf_CM.c b/IDE/MDK5-ARM/Projects/CryptTest/RTE/CMSIS/RTX_Conf_CM.c new file mode 100644 index 000000000..31dd53c78 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptTest/RTE/CMSIS/RTX_Conf_CM.c @@ -0,0 +1,276 @@ +/*---------------------------------------------------------------------------- + * RL-ARM - RTX + *---------------------------------------------------------------------------- + * Name: RTX_Conf_CM.C + * Purpose: Configuration of CMSIS RTX Kernel for Cortex-M + * Rev.: V4.70 + *---------------------------------------------------------------------------- + * + * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + *---------------------------------------------------------------------------*/ + +#include "cmsis_os.h" + + +/*---------------------------------------------------------------------------- + * RTX User configuration part BEGIN + *---------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- +// +// Thread Configuration +// ======================= +// +// Number of concurrent running threads <0-250> +// Defines max. number of threads that will run at the same time. +// Default: 6 +#ifndef OS_TASKCNT + #define OS_TASKCNT 6 +#endif + +// Default Thread stack size [bytes] <64-4096:8><#/4> +// Defines default stack size for threads with osThreadDef stacksz = 0 +// Default: 200 +#ifndef OS_STKSIZE + #define OS_STKSIZE 50 +#endif + +// Main Thread stack size [bytes] <64-10000:8><#/4> +// Defines stack size for main thread. +// Default: 200 +#ifndef OS_MAINSTKSIZE + #define OS_MAINSTKSIZE 2000 +#endif + +// Number of threads with user-provided stack size <0-250> +// Defines the number of threads with user-provided stack size. +// Default: 0 +#ifndef OS_PRIVCNT + #define OS_PRIVCNT 0 +#endif + +// Total stack size [bytes] for threads with user-provided stack size <0-4096:8><#/4> +// Defines the combined stack size for threads with user-provided stack size. +// Default: 0 +#ifndef OS_PRIVSTKSIZE + #define OS_PRIVSTKSIZE 0 +#endif + +// Check for stack overflow +// Includes the stack checking code for stack overflow. +// Note that additional code reduces the Kernel performance. +#ifndef OS_STKCHECK + #define OS_STKCHECK 1 +#endif + +// Processor mode for thread execution +// <0=> Unprivileged mode +// <1=> Privileged mode +// Default: Privileged mode +#ifndef OS_RUNPRIV + #define OS_RUNPRIV 1 +#endif + +// + +// RTX Kernel Timer Tick Configuration +// ====================================== +// Use Cortex-M SysTick timer as RTX Kernel Timer +// Use the Cortex-M SysTick timer as a time-base for RTX. +#ifndef OS_SYSTICK + #define OS_SYSTICK 1 +#endif +// +// Timer clock value [Hz] <1-1000000000> +// Defines the timer clock value. +// Default: 12000000 (12MHz) +#ifndef OS_CLOCK + #define OS_CLOCK 12000000 +#endif + +// Timer tick value [us] <1-1000000> +// Defines the timer tick value. +// Default: 1000 (1ms) +#ifndef OS_TICK + #define OS_TICK 1000 +#endif + +// + +// System Configuration +// ======================= +// +// Round-Robin Thread switching +// =============================== +// +// Enables Round-Robin Thread switching. +#ifndef OS_ROBIN + #define OS_ROBIN 1 +#endif + +// Round-Robin Timeout [ticks] <1-1000> +// Defines how long a thread will execute before a thread switch. +// Default: 5 +#ifndef OS_ROBINTOUT + #define OS_ROBINTOUT 5 +#endif + +// + +// User Timers +// ============== +// Enables user Timers +#ifndef OS_TIMERS + #define OS_TIMERS 1 +#endif + +// Timer Thread Priority +// <1=> Low +// <2=> Below Normal <3=> Normal <4=> Above Normal +// <5=> High +// <6=> Realtime (highest) +// Defines priority for Timer Thread +// Default: High +#ifndef OS_TIMERPRIO + #define OS_TIMERPRIO 5 +#endif + +// Timer Thread stack size [bytes] <64-4096:8><#/4> +// Defines stack size for Timer thread. +// Default: 200 +#ifndef OS_TIMERSTKSZ + #define OS_TIMERSTKSZ 50 +#endif + +// Timer Callback Queue size <1-32> +// Number of concurrent active timer callback functions. +// Default: 4 +#ifndef OS_TIMERCBQS + #define OS_TIMERCBQS 4 +#endif + +// + +// ISR FIFO Queue size<4=> 4 entries <8=> 8 entries +// <12=> 12 entries <16=> 16 entries +// <24=> 24 entries <32=> 32 entries +// <48=> 48 entries <64=> 64 entries +// <96=> 96 entries +// ISR functions store requests to this buffer, +// when they are called from the interrupt handler. +// Default: 16 entries +#ifndef OS_FIFOSZ + #define OS_FIFOSZ 16 +#endif + +// + +//------------- <<< end of configuration section >>> ----------------------- + +// Standard library system mutexes +// =============================== +// Define max. number system mutexes that are used to protect +// the arm standard runtime library. For microlib they are not used. +#ifndef OS_MUTEXCNT + #define OS_MUTEXCNT 8 +#endif + +/*---------------------------------------------------------------------------- + * RTX User configuration part END + *---------------------------------------------------------------------------*/ + +#define OS_TRV ((uint32_t)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1) + + +/*---------------------------------------------------------------------------- + * Global Functions + *---------------------------------------------------------------------------*/ + +/*--------------------------- os_idle_demon ---------------------------------*/ + +void os_idle_demon (void) { + /* The idle demon is a system thread, running when no other thread is */ + /* ready to run. */ + + for (;;) { + /* HERE: include optional user code to be executed when no thread runs.*/ + } +} + +#if (OS_SYSTICK == 0) // Functions for alternative timer as RTX kernel timer + +/*--------------------------- os_tick_init ----------------------------------*/ + +// Initialize alternative hardware timer as RTX kernel timer +// Return: IRQ number of the alternative hardware timer +int os_tick_init (void) { + return (-1); /* Return IRQ number of timer (0..239) */ +} + +/*--------------------------- os_tick_val -----------------------------------*/ + +// Get alternative hardware timer current value (0 .. OS_TRV) +uint32_t os_tick_val (void) { + return (0); +} + +/*--------------------------- os_tick_ovf -----------------------------------*/ + +// Get alternative hardware timer overflow flag +// Return: 1 - overflow, 0 - no overflow +uint32_t os_tick_ovf (void) { + return (0); +} + +/*--------------------------- os_tick_irqack --------------------------------*/ + +// Acknowledge alternative hardware timer interrupt +void os_tick_irqack (void) { + /* ... */ +} + +#endif // (OS_SYSTICK == 0) + +/*--------------------------- os_error --------------------------------------*/ + +void os_error (uint32_t err_code) { + /* This function is called when a runtime error is detected. Parameter */ + /* 'err_code' holds the runtime error code (defined in RTL.H). */ + + /* HERE: include optional code to be executed on runtime error. */ + for (;;); +} + + +/*---------------------------------------------------------------------------- + * RTX Configuration Functions + *---------------------------------------------------------------------------*/ + +#include "RTX_CM_lib.h" + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/ diff --git a/IDE/MDK5-ARM/Projects/CryptTest/RTE/Device/STM32F207IG/RTE_Device.h b/IDE/MDK5-ARM/Projects/CryptTest/RTE/Device/STM32F207IG/RTE_Device.h new file mode 100644 index 000000000..2648e44d4 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptTest/RTE/Device/STM32F207IG/RTE_Device.h @@ -0,0 +1,3127 @@ +/* ----------------------------------------------------------------------------- + * Copyright (C) 2013 ARM Limited. All rights reserved. + * + * $Date: 27. June 2013 + * $Revision: V1.01 + * + * Project: RTE Device Configuration for ST STM32F2xx + * -------------------------------------------------------------------------- */ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +#ifndef __RTE_DEVICE_H +#define __RTE_DEVICE_H + + +#define GPIO_PORT(num) \ + ((num == 0) ? GPIOA : \ + (num == 1) ? GPIOB : \ + (num == 2) ? GPIOC : \ + (num == 3) ? GPIOD : \ + (num == 4) ? GPIOE : \ + (num == 5) ? GPIOF : \ + (num == 6) ? GPIOG : \ + (num == 7) ? GPIOH : \ + (num == 8) ? GPIOI : \ + NULL) + + +// Clock Configuration +// High-speed Internal Clock <1-999999999> +#define RTE_HSI 16000000 +// High-speed External Clock <1-999999999> +#define RTE_HSE 25000000 +// System Clock <1-999999999> +#define RTE_SYSCLK 120000000 +// AHB Clock <1-999999999> +#define RTE_HCLK 120000000 +// APB1 Clock <1-999999999> +#define RTE_PCLK1 30000000 +// APB2 Clock <1-999999999> +#define RTE_PCLK2 60000000 +// 48MHz Clock +#define RTE_PLL48CK 48000000 +// + + +// USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_UART1] +// Configuration settings for Driver_UART1 in component ::Drivers:UART +#define RTE_USART1 0 + +// USART1_TX Pin <0=>PA9 <1=>PB6 +#define RTE_USART1_TX_ID 0 +#if (RTE_USART1_TX_ID == 0) +#define RTE_USART1_TX_PORT GPIOA +#define RTE_USART1_TX_BIT 9 +#elif (RTE_USART1_TX_ID == 1) +#define RTE_USART1_TX_PORT GPIOB +#define RTE_USART1_TX_BIT 6 +#else +#error "Invalid USART1_TX Pin Configuration!" +#endif + +// USART1_RX Pin <0=>PA10 <1=>PB7 +#define RTE_USART1_RX_ID 0 +#if (RTE_USART1_RX_ID == 0) +#define RTE_USART1_RX_PORT GPIOA +#define RTE_USART1_RX_BIT 10 +#elif (RTE_USART1_RX_ID == 1) +#define RTE_USART1_RX_PORT GPIOB +#define RTE_USART1_RX_BIT 7 +#else +#error "Invalid USART1_RX Pin Configuration!" +#endif + +// Synchronous +// USART1_CK Pin <0=>PA8 +// +#define RTE_USART1_CK 0 +#define RTE_USART1_CK_ID 0 +#if (RTE_USART1_CK_ID == 0) +#define RTE_USART1_CK_PORT GPIOA +#define RTE_USART1_CK_BIT 8 +#else +#error "Invalid USART1_CK Pin Configuration!" +#endif + +// Hardware flow control +// USART1_CTS Pin <0=>PA11 +// USART1_RTS Pin <0=>PA12 +// Manual CTS/RTS +// +#define RTE_USART1_HW_FLOW 0 +#define RTE_USART1_CTS_ID 0 +#define RTE_USART1_RTS_ID 0 +#define RTE_USART1_MANUAL_FLOW 0 +#if (RTE_USART1_CTS_ID == 0) +#define RTE_USART1_CTS_PORT GPIOA +#define RTE_USART1_CTS_BIT 11 +#else +#error "Invalid USART1_CTS Pin Configuration!" +#endif +#if (RTE_USART1_RTS_ID == 0) +#define RTE_USART1_RTS_PORT GPIOA +#define RTE_USART1_RTS_BIT 12 +#else +#error "Invalid USART1_RTS Pin Configuration!" +#endif + +// DMA Rx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <2=>2 <5=>5 +// Selects DMA Stream (only Stream 2 or 5 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART1_RX_DMA 1 +#define RTE_USART1_RX_DMA_NUMBER 2 +#define RTE_USART1_RX_DMA_STREAM 2 +#define RTE_USART1_RX_DMA_CHANNEL 4 +#define RTE_USART1_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <7=>7 +// Selects DMA Stream (only Stream 7 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART1_TX_DMA 1 +#define RTE_USART1_TX_DMA_NUMBER 2 +#define RTE_USART1_TX_DMA_STREAM 7 +#define RTE_USART1_TX_DMA_CHANNEL 4 +#define RTE_USART1_TX_DMA_PRIORITY 0 + +// + + +// USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_UART2] +// Configuration settings for Driver_UART2 in component ::Drivers:UART +#define RTE_USART2 0 + +// USART2_TX Pin <0=>PA2 <1=>PD5 +#define RTE_USART2_TX_ID 0 +#if (RTE_USART2_TX_ID == 0) +#define RTE_USART2_TX_PORT GPIOA +#define RTE_USART2_TX_BIT 2 +#elif (RTE_USART2_TX_ID == 1) +#define RTE_USART2_TX_PORT GPIOD +#define RTE_USART2_TX_BIT 5 +#else +#error "Invalid USART2_TX Pin Configuration!" +#endif + +// USART2_RX Pin <0=>PA3 <1=>PD6 +#define RTE_USART2_RX_ID 0 +#if (RTE_USART2_RX_ID == 0) +#define RTE_USART2_RX_PORT GPIOA +#define RTE_USART2_RX_BIT 3 +#elif (RTE_USART2_RX_ID == 1) +#define RTE_USART2_RX_PORT GPIOD +#define RTE_USART2_RX_BIT 6 +#else +#error "Invalid USART2_RX Pin Configuration!" +#endif + +// Synchronous +// USART2_CK Pin <0=>PA4 <1=>PD7 +// +#define RTE_USART2_CK 0 +#define RTE_USART2_CK_ID 0 +#if (RTE_USART2_CK_ID == 0) +#define RTE_USART2_CK_PORT GPIOA +#define RTE_USART2_CK_BIT 4 +#elif (RTE_USART2_CK_ID == 1) +#define RTE_USART2_CK_PORT GPIOD +#define RTE_USART2_CK_BIT 7 +#else +#error "Invalid USART2_CK Pin Configuration!" +#endif + +// Hardware flow control +// USART2_CTS Pin <0=>PA0 <1=>PD3 +// USART2_RTS Pin <0=>PA1 <1=>PD4 +// Manual CTS/RTS +// +#define RTE_USART2_HW_FLOW 0 +#define RTE_USART2_CTS_ID 0 +#define RTE_USART2_RTS_ID 0 +#define RTE_USART2_MANUAL_FLOW 0 +#if (RTE_USART2_CTS_ID == 0) +#define RTE_USART2_CTS_PORT GPIOA +#define RTE_USART2_CTS_BIT 0 +#elif (RTE_USART2_CTS_ID == 1) +#define RTE_USART2_CTS_PORT GPIOD +#define RTE_USART2_CTS_BIT 3 +#else +#error "Invalid USART2_CTS Pin Configuration!" +#endif +#if (RTE_USART2_RTS_ID == 0) +#define RTE_USART2_RTS_PORT GPIOA +#define RTE_USART2_RTS_BIT 1 +#elif (RTE_USART2_RTS_ID == 1) +#define RTE_USART2_RTS_PORT GPIOD +#define RTE_USART2_RTS_BIT 4 +#else +#error "Invalid USART2_RTS Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <5=>5 +// Selects DMA Stream (only Stream 5 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART2_RX_DMA 1 +#define RTE_USART2_RX_DMA_NUMBER 1 +#define RTE_USART2_RX_DMA_STREAM 5 +#define RTE_USART2_RX_DMA_CHANNEL 4 +#define RTE_USART2_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <6=>6 +// Selects DMA Stream (only Stream 6 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART2_TX_DMA 1 +#define RTE_USART2_TX_DMA_NUMBER 1 +#define RTE_USART2_TX_DMA_STREAM 6 +#define RTE_USART2_TX_DMA_CHANNEL 4 +#define RTE_USART2_TX_DMA_PRIORITY 0 + +// + + +// USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_UART3] +// Configuration settings for Driver_UART3 in component ::Drivers:UART +#define RTE_USART3 0 + +// USART3_TX Pin <0=>PB10 <1=>PC10 <2=>PD8 +#define RTE_USART3_TX_ID 0 +#if (RTE_USART3_TX_ID == 0) +#define RTE_USART3_TX_PORT GPIOB +#define RTE_USART3_TX_BIT 10 +#elif (RTE_USART3_TX_ID == 1) +#define RTE_USART3_TX_PORT GPIOC +#define RTE_USART3_TX_BIT 10 +#elif (RTE_USART3_TX_ID == 2) +#define RTE_USART3_TX_PORT GPIOD +#define RTE_USART3_TX_BIT 8 +#else +#error "Invalid USART3_TX Pin Configuration!" +#endif + +// USART3_RX Pin <0=>PB11 <1=>PC11 <2=>PD9 +#define RTE_USART3_RX_ID 0 +#if (RTE_USART3_RX_ID == 0) +#define RTE_USART3_RX_PORT GPIOB +#define RTE_USART3_RX_BIT 11 +#elif (RTE_USART3_RX_ID == 1) +#define RTE_USART3_RX_PORT GPIOC +#define RTE_USART3_RX_BIT 11 +#elif (RTE_USART3_RX_ID == 2) +#define RTE_USART3_RX_PORT GPIOD +#define RTE_USART3_RX_BIT 9 +#else +#error "Invalid USART3_RX Pin Configuration!" +#endif + +// Synchronous +// USART3_CK Pin <0=>PB12 <1=>PC12 <2=>PD10 +// +#define RTE_USART3_CK 0 +#define RTE_USART3_CK_ID 0 +#if (RTE_USART3_CK_ID == 0) +#define RTE_USART3_CK_PORT GPIOB +#define RTE_USART3_CK_BIT 12 +#elif (RTE_USART3_CK_ID == 1) +#define RTE_USART3_CK_PORT GPIOC +#define RTE_USART3_CK_BIT 12 +#elif (RTE_USART3_CK_ID == 2) +#define RTE_USART3_CK_PORT GPIOD +#define RTE_USART3_CK_BIT 10 +#else +#error "Invalid USART3_CK Pin Configuration!" +#endif + +// Hardware flow control +// USART3_CTS Pin <0=>PB13 <1=>PD11 +// USART3_RTS Pin <0=>PB14 <1=>PD12 +// Manual CTS/RTS +// +#define RTE_USART3_HW_FLOW 0 +#define RTE_USART3_CTS_ID 0 +#define RTE_USART3_RTS_ID 0 +#define RTE_USART3_MANUAL_FLOW 0 +#if (RTE_USART3_CTS_ID == 0) +#define RTE_USART3_CTS_PORT GPIOB +#define RTE_USART3_CTS_BIT 13 +#elif (RTE_USART3_CTS_ID == 1) +#define RTE_USART3_CTS_PORT GPIOD +#define RTE_USART3_CTS_BIT 11 +#else +#error "Invalid USART3_CTS Pin Configuration!" +#endif +#if (RTE_USART3_RTS_ID == 0) +#define RTE_USART3_RTS_PORT GPIOB +#define RTE_USART3_RTS_BIT 14 +#elif (RTE_USART3_RTS_ID == 1) +#define RTE_USART3_RTS_PORT GPIOD +#define RTE_USART3_RTS_BIT 12 +#else +#error "Invalid USART3_RTS Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <1=>1 +// Selects DMA Stream (only Stream 1 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART3_RX_DMA 1 +#define RTE_USART3_RX_DMA_NUMBER 1 +#define RTE_USART3_RX_DMA_STREAM 1 +#define RTE_USART3_RX_DMA_CHANNEL 4 +#define RTE_USART3_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <3=>3 +// Selects DMA Stream (only Stream 3 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART3_TX_DMA 1 +#define RTE_USART3_TX_DMA_NUMBER 1 +#define RTE_USART3_TX_DMA_STREAM 3 +#define RTE_USART3_TX_DMA_CHANNEL 4 +#define RTE_USART3_TX_DMA_PRIORITY 0 + +// + + +// UART4 (Universal asynchronous receiver transmitter) [Driver_UART4] +// Configuration settings for Driver_UART4 in component ::Drivers:UART +#define RTE_UART4 0 + +// UART4_TX Pin <0=>PA0 <1=>PC10 +#define RTE_UART4_TX_ID 0 +#if (RTE_UART4_TX_ID == 0) +#define RTE_UART4_TX_PORT GPIOA +#define RTE_UART4_TX_BIT 0 +#elif (RTE_UART4_TX_ID == 1) +#define RTE_UART4_TX_PORT GPIOC +#define RTE_UART4_TX_BIT 10 +#else +#error "Invalid UART4_TX Pin Configuration!" +#endif + +// UART4_RX Pin <0=>PA1 <1=>PC11 +#define RTE_UART4_RX_ID 0 +#if (RTE_UART4_RX_ID == 0) +#define RTE_UART4_RX_PORT GPIOA +#define RTE_UART4_RX_BIT 1 +#elif (RTE_UART4_RX_ID == 1) +#define RTE_UART4_RX_PORT GPIOC +#define RTE_UART4_RX_BIT 11 +#else +#error "Invalid UART4_RX Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <2=>2 +// Selects DMA Stream (only Stream 2 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_UART4_RX_DMA 1 +#define RTE_UART4_RX_DMA_NUMBER 1 +#define RTE_UART4_RX_DMA_STREAM 2 +#define RTE_UART4_RX_DMA_CHANNEL 4 +#define RTE_UART4_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <4=>4 +// Selects DMA Stream (only Stream 4 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_UART4_TX_DMA 1 +#define RTE_UART4_TX_DMA_NUMBER 1 +#define RTE_UART4_TX_DMA_STREAM 4 +#define RTE_UART4_TX_DMA_CHANNEL 4 +#define RTE_UART4_TX_DMA_PRIORITY 0 + +// + + +// UART5 (Universal asynchronous receiver transmitter) [Driver_UART5] +// Configuration settings for Driver_UART5 in component ::Drivers:UART +#define RTE_UART5 0 + +// UART5_TX Pin <0=>PC12 +#define RTE_UART5_TX_ID 0 +#if (RTE_UART5_TX_ID == 0) +#define RTE_UART5_TX_PORT GPIOC +#define RTE_UART5_TX_BIT 12 +#else +#error "Invalid UART5_TX Pin Configuration!" +#endif + +// UART5_RX Pin <0=>PD2 +#define RTE_UART5_RX_ID 0 +#if (RTE_UART5_RX_ID == 0) +#define RTE_UART5_RX_PORT GPIOD +#define RTE_UART5_RX_BIT 2 +#else +#error "Invalid UART5_RX Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <0=>0 +// Selects DMA Stream (only Stream 0 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_UART5_RX_DMA 1 +#define RTE_UART5_RX_DMA_NUMBER 1 +#define RTE_UART5_RX_DMA_STREAM 0 +#define RTE_UART5_RX_DMA_CHANNEL 4 +#define RTE_UART5_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <7=>7 +// Selects DMA Stream (only Stream 7 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_UART5_TX_DMA 1 +#define RTE_UART5_TX_DMA_NUMBER 1 +#define RTE_UART5_TX_DMA_STREAM 7 +#define RTE_UART5_TX_DMA_CHANNEL 4 +#define RTE_UART5_TX_DMA_PRIORITY 0 + +// + + +// USART6 (Universal synchronous asynchronous receiver transmitter) [Driver_UART6] +// Configuration settings for Driver_UART6 in component ::Drivers:UART +#define RTE_USART6 0 + +// USART6_TX Pin <0=>PC6 <1=>PG14 +#define RTE_USART6_TX_ID 0 +#if (RTE_USART6_TX_ID == 0) +#define RTE_USART6_TX_PORT GPIOC +#define RTE_USART6_TX_BIT 6 +#elif (RTE_USART6_TX_ID == 1) +#define RTE_USART6_TX_PORT GPIOG +#define RTE_USART6_TX_BIT 14 +#else +#error "Invalid USART6_TX Pin Configuration!" +#endif + +// USART6_RX Pin <0=>PC7 <1=>PG9 +#define RTE_USART6_RX_ID 0 +#if (RTE_USART6_RX_ID == 0) +#define RTE_USART6_RX_PORT GPIOC +#define RTE_USART6_RX_BIT 7 +#elif (RTE_USART6_RX_ID == 1) +#define RTE_USART6_RX_PORT GPIOG +#define RTE_USART6_RX_BIT 9 +#else +#error "Invalid USART6_RX Pin Configuration!" +#endif + +// Synchronous +// USART6_CK Pin <0=>PC8 <1=>PG7 +// +#define RTE_USART6_CK 0 +#define RTE_USART6_CK_ID 0 +#if (RTE_USART6_CK_ID == 0) +#define RTE_USART6_CK_PORT GPIOC +#define RTE_USART6_CK_BIT 8 +#elif (RTE_USART6_CK_ID == 1) +#define RTE_USART6_CK_PORT GPIOG +#define RTE_USART6_CK_BIT 7 +#else +#error "Invalid USART6_CK Pin Configuration!" +#endif + +// Hardware flow control +// USART6_CTS Pin <0=>PG13 <1=>PG15 +// USART6_RTS Pin <0=>PG8 <1=>PG12 +// Manual CTS/RTS +// +#define RTE_USART6_HW_FLOW 0 +#define RTE_USART6_CTS_ID 0 +#define RTE_USART6_RTS_ID 0 +#define RTE_USART6_MANUAL_FLOW 0 +#if (RTE_USART6_CTS_ID == 0) +#define RTE_USART6_CTS_PORT GPIOG +#define RTE_USART6_CTS_BIT 13 +#elif (RTE_USART6_CTS_ID == 1) +#define RTE_USART6_CTS_PORT GPIOG +#define RTE_USART6_CTS_BIT 15 +#else +#error "Invalid USART6_CTS Pin Configuration!" +#endif +#if (RTE_USART6_RTS_ID == 0) +#define RTE_USART6_RTS_PORT GPIOG +#define RTE_USART6_RTS_BIT 8 +#elif (RTE_USART6_RTS_ID == 1) +#define RTE_USART6_RTS_PORT GPIOG +#define RTE_USART6_RTS_BIT 12 +#else +#error "Invalid USART6_RTS Pin Configuration!" +#endif + +// DMA Rx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <1=>1 <2=>2 +// Selects DMA Stream (only Stream 1 or 2 can be used) +// Channel <5=>5 +// Selects DMA Channel (only Channel 5 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART6_RX_DMA 1 +#define RTE_USART6_RX_DMA_NUMBER 2 +#define RTE_USART6_RX_DMA_STREAM 1 +#define RTE_USART6_RX_DMA_CHANNEL 5 +#define RTE_USART6_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <6=>6 <7=>7 +// Selects DMA Stream (only Stream 6 or 7 can be used) +// Channel <5=>5 +// Selects DMA Channel (only Channel 5 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART6_TX_DMA 1 +#define RTE_USART6_TX_DMA_NUMBER 2 +#define RTE_USART6_TX_DMA_STREAM 6 +#define RTE_USART6_TX_DMA_CHANNEL 5 +#define RTE_USART6_TX_DMA_PRIORITY 0 + +// + + +// I2C1 (Inter-integrated Circuit Interface 1) [Driver_I2C1] +// Configuration settings for Driver_I2C1 in component ::Drivers:I2C +#define RTE_I2C1 0 + +// I2C1_SCL Pin <0=>PB6 <1=>PB8 +#define RTE_I2C1_SCL_PORT_ID 0 +#if (RTE_I2C1_SCL_PORT_ID == 0) +#define RTE_I2C1_SCL_PORT GPIOB +#define RTE_I2C1_SCL_BIT 6 +#elif (RTE_I2C1_SCL_PORT_ID == 1) +#define RTE_I2C1_SCL_PORT GPIOB +#define RTE_I2C1_SCL_BIT 8 +#else +#error "Invalid I2C1_SCL Pin Configuration!" +#endif + +// I2C1_SDA Pin <0=>PB7 <1=>PB9 +#define RTE_I2C1_SDA_PORT_ID 0 +#if (RTE_I2C1_SDA_PORT_ID == 0) +#define RTE_I2C1_SDA_PORT GPIOB +#define RTE_I2C1_SDA_BIT 7 +#elif (RTE_I2C1_SDA_PORT_ID == 1) +#define RTE_I2C1_SDA_PORT GPIOB +#define RTE_I2C1_SDA_BIT 9 +#else +#error "Invalid I2C1_SDA Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <0=>0 <5=>5 +// Selects DMA Stream (only Stream 0 or 5 can be used) +// Channel <1=>1 +// Selects DMA Channel (only Channel 1 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C1_RX_DMA 1 +#define RTE_I2C1_RX_DMA_NUMBER 1 +#define RTE_I2C1_RX_DMA_STREAM 0 +#define RTE_I2C1_RX_DMA_CHANNEL 1 +#define RTE_I2C1_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <6=>6 <7=>7 +// Selects DMA Stream (only Stream 6 or 7 can be used) +// Channel <1=>1 +// Selects DMA Channel (only Channel 1 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C1_TX_DMA 1 +#define RTE_I2C1_TX_DMA_NUMBER 1 +#define RTE_I2C1_TX_DMA_STREAM 6 +#define RTE_I2C1_TX_DMA_CHANNEL 1 +#define RTE_I2C1_TX_DMA_PRIORITY 0 + +// + + +// I2C2 (Inter-integrated Circuit Interface 2) [Driver_I2C2] +// Configuration settings for Driver_I2C2 in component ::Drivers:I2C +#define RTE_I2C2 0 + +// I2C2_SCL Pin <0=>PF1 <1=>PH4 <2=>PB10 +#define RTE_I2C2_SCL_PORT_ID 0 +#if (RTE_I2C2_SCL_PORT_ID == 0) +#define RTE_I2C2_SCL_PORT GPIOF +#define RTE_I2C2_SCL_BIT 1 +#elif (RTE_I2C2_SCL_PORT_ID == 1) +#define RTE_I2C2_SCL_PORT GPIOH +#define RTE_I2C2_SCL_BIT 4 +#elif (RTE_I2C2_SCL_PORT_ID == 2) +#define RTE_I2C2_SCL_PORT GPIOB +#define RTE_I2C2_SCL_BIT 10 +#else +#error "Invalid I2C2_SCL Pin Configuration!" +#endif + +// I2C2_SDA Pin <0=>PF0 <1=>PH5 <2=>PB11 +#define RTE_I2C2_SDA_PORT_ID 0 +#if (RTE_I2C2_SDA_PORT_ID == 0) +#define RTE_I2C2_SDA_PORT GPIOF +#define RTE_I2C2_SDA_BIT 0 +#elif (RTE_I2C2_SDA_PORT_ID == 1) +#define RTE_I2C2_SDA_PORT GPIOH +#define RTE_I2C2_SDA_BIT 5 +#elif (RTE_I2C2_SDA_PORT_ID == 2) +#define RTE_I2C2_SDA_PORT GPIOB +#define RTE_I2C2_SDA_BIT 11 +#else +#error "Invalid I2C2_SCL Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <2=>2 <3=>3 +// Selects DMA Stream (only Stream 2 or 3 can be used) +// Channel <7=>7 +// Selects DMA Channel (only Channel 7 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C2_RX_DMA 1 +#define RTE_I2C2_RX_DMA_NUMBER 1 +#define RTE_I2C2_RX_DMA_STREAM 2 +#define RTE_I2C2_RX_DMA_CHANNEL 7 +#define RTE_I2C2_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <7=>7 +// Selects DMA Stream (only Stream 7 can be used) +// Channel <7=>7 +// Selects DMA Channel (only Channel 1 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C2_TX_DMA 1 +#define RTE_I2C2_TX_DMA_NUMBER 1 +#define RTE_I2C2_TX_DMA_STREAM 7 +#define RTE_I2C2_TX_DMA_CHANNEL 7 +#define RTE_I2C2_TX_DMA_PRIORITY 0 + +// + + +// I2C3 (Inter-integrated Circuit Interface 3) [Driver_I2C3] +// Configuration settings for Driver_I2C3 in component ::Drivers:I2C +#define RTE_I2C3 0 + +// I2C3_SCL Pin <0=>PH7 <1=>PA8 +#define RTE_I2C3_SCL_PORT_ID 0 +#if (RTE_I2C3_SCL_PORT_ID == 0) +#define RTE_I2C3_SCL_PORT GPIOH +#define RTE_I2C3_SCL_BIT 7 +#elif (RTE_I2C3_SCL_PORT_ID == 1) +#define RTE_I2C3_SCL_PORT GPIOA +#define RTE_I2C3_SCL_BIT 8 +#else +#error "Invalid I2C3_SCL Pin Configuration!" +#endif + +// I2C3_SDA Pin <0=>PH8 <1=>PC9 +#define RTE_I2C3_SDA_PORT_ID 0 +#if (RTE_I2C3_SDA_PORT_ID == 0) +#define RTE_I2C3_SDA_PORT GPIOH +#define RTE_I2C3_SDA_BIT 8 +#elif (RTE_I2C3_SDA_PORT_ID == 1) +#define RTE_I2C3_SDA_PORT GPIOC +#define RTE_I2C3_SDA_BIT 9 +#else +#error "Invalid I2C3_SCL Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <2=>2 +// Selects DMA Stream (only Stream 2 can be used) +// Channel <3=>3 +// Selects DMA Channel (only Channel 3 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C3_RX_DMA 1 +#define RTE_I2C3_RX_DMA_NUMBER 1 +#define RTE_I2C3_RX_DMA_STREAM 2 +#define RTE_I2C3_RX_DMA_CHANNEL 3 +#define RTE_I2C3_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <4=>4 +// Selects DMA Stream (only Stream 4 can be used) +// Channel <3=>3 +// Selects DMA Channel (only Channel 3 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C3_TX_DMA 1 +#define RTE_I2C3_TX_DMA_NUMBER 1 +#define RTE_I2C3_TX_DMA_STREAM 4 +#define RTE_I2C3_TX_DMA_CHANNEL 3 +#define RTE_I2C3_TX_DMA_PRIORITY 0 + +// + + +// SPI1 (Serial Peripheral Interface 1) [Driver_SPI1] +// Configuration settings for Driver_SPI1 in component ::Drivers:SPI +#define RTE_SPI1 0 + +// SPI1_NSS Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SPI1_NSS_PIN 1 +#define RTE_SPI1_NSS_PORT GPIO_PORT(0) +#define RTE_SPI1_NSS_BIT 4 + +// SPI1_SCK Pin <0=>PA5 <1=>PB3 +#define RTE_SPI1_SCL_PORT_ID 0 +#if (RTE_SPI1_SCL_PORT_ID == 0) +#define RTE_SPI1_SCL_PORT GPIOA +#define RTE_SPI1_SCL_BIT 5 +#elif (RTE_SPI1_SCL_PORT_ID == 1) +#define RTE_SPI1_SCL_PORT GPIOB +#define RTE_SPI1_SCL_BIT 3 +#else +#error "Invalid SPI1_SCK Pin Configuration!" +#endif + +// SPI1_MISO Pin <0=>PA6 <1=>PB4 +#define RTE_SPI1_MISO_PORT_ID 0 +#if (RTE_SPI1_MISO_PORT_ID == 0) +#define RTE_SPI1_MISO_PORT GPIOA +#define RTE_SPI1_MISO_BIT 6 +#elif (RTE_SPI1_MISO_PORT_ID == 1) +#define RTE_SPI1_MISO_PORT GPIOB +#define RTE_SPI1_MISO_BIT 4 +#else +#error "Invalid SPI1_MISO Pin Configuration!" +#endif + +// SPI1_MOSI Pin <0=>PA7 <1=>PB5 +#define RTE_SPI1_MOSI_PORT_ID 0 +#if (RTE_SPI1_MOSI_PORT_ID == 0) +#define RTE_SPI1_MOSI_PORT GPIOA +#define RTE_SPI1_MOSI_BIT 7 +#elif (RTE_SPI1_MOSI_PORT_ID == 1) +#define RTE_SPI1_MOSI_PORT GPIOB +#define RTE_SPI1_MOSI_BIT 5 +#else +#error "Invalid SPI1_MISO Pin Configuration!" +#endif + +// DMA Rx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <0=>0 <2=>2 +// Selects DMA Stream (only Stream 0 or 2 can be used) +// Channel <3=>3 +// Selects DMA Channel (only Channel 3 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI1_RX_DMA 1 +#define RTE_SPI1_RX_DMA_NUMBER 2 +#define RTE_SPI1_RX_DMA_STREAM 0 +#define RTE_SPI1_RX_DMA_CHANNEL 3 +#define RTE_SPI1_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <3=>3 <5=>5 +// Selects DMA Stream (only Stream 3 or 5 can be used) +// Channel <3=>3 +// Selects DMA Channel (only Channel 3 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI1_TX_DMA 1 +#define RTE_SPI1_TX_DMA_NUMBER 2 +#define RTE_SPI1_TX_DMA_STREAM 5 +#define RTE_SPI1_TX_DMA_CHANNEL 3 +#define RTE_SPI1_TX_DMA_PRIORITY 0 + +// + + +// SPI2 (Serial Peripheral Interface 2) [Driver_SPI2] +// Configuration settings for Driver_SPI2 in component ::Drivers:SPI +#define RTE_SPI2 0 + +// SPI2_NSS Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SPI2_NSS_PIN 1 +#define RTE_SPI2_NSS_PORT GPIO_PORT(1) +#define RTE_SPI2_NSS_BIT 12 + +// SPI2_SCK Pin <0=>PB10 <1=>PB13 <2=>PI1 +#define RTE_SPI2_SCL_PORT_ID 0 +#if (RTE_SPI2_SCL_PORT_ID == 0) +#define RTE_SPI2_SCL_PORT GPIOB +#define RTE_SPI2_SCL_BIT 10 +#elif (RTE_SPI2_SCL_PORT_ID == 1) +#define RTE_SPI2_SCL_PORT GPIOB +#define RTE_SPI2_SCL_BIT 13 +#elif (RTE_SPI2_SCL_PORT_ID == 2) +#define RTE_SPI2_SCL_PORT GPIOI +#define RTE_SPI2_SCL_BIT 1 +#else +#error "Invalid SPI2_SCK Pin Configuration!" +#endif + +// SPI2_MISO Pin <0=>PB14 <1=>PC2 <2=>PI2 +#define RTE_SPI2_MISO_PORT_ID 0 +#if (RTE_SPI2_MISO_PORT_ID == 0) +#define RTE_SPI2_MISO_PORT GPIOB +#define RTE_SPI2_MISO_BIT 14 +#elif (RTE_SPI2_MISO_PORT_ID == 1) +#define RTE_SPI2_MISO_PORT GPIOC +#define RTE_SPI2_MISO_BIT 2 +#elif (RTE_SPI2_MISO_PORT_ID == 2) +#define RTE_SPI2_MISO_PORT GPIOI +#define RTE_SPI2_MISO_BIT 2 +#else +#error "Invalid SPI2_MISO Pin Configuration!" +#endif + +// SPI2_MOSI Pin <0=>PB15 <1=>PC3 <2=>OI3 +#define RTE_SPI2_MOSI_PORT_ID 0 +#if (RTE_SPI2_MOSI_PORT_ID == 0) +#define RTE_SPI2_MOSI_PORT GPIOB +#define RTE_SPI2_MOSI_BIT 15 +#elif (RTE_SPI2_MOSI_PORT_ID == 1) +#define RTE_SPI2_MOSI_PORT GPIOC +#define RTE_SPI2_MOSI_BIT 3 +#elif (RTE_SPI2_MOSI_PORT_ID == 2) +#define RTE_SPI2_MOSI_PORT GPIOI +#define RTE_SPI2_MOSI_BIT 3 +#else +#error "Invalid SPI2_MISO Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <2=>2 +// Selects DMA Stream (only Stream 2 can be used) +// Channel <0=>0 +// Selects DMA Channel (only Channel 0 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI2_RX_DMA 1 +#define RTE_SPI2_RX_DMA_NUMBER 1 +#define RTE_SPI2_RX_DMA_STREAM 2 +#define RTE_SPI2_RX_DMA_CHANNEL 0 +#define RTE_SPI2_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <3=>3 +// Selects DMA Stream (only Stream 3 can be used) +// Channel <0=>0 +// Selects DMA Channel (only Channel 0 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI2_TX_DMA 1 +#define RTE_SPI2_TX_DMA_NUMBER 1 +#define RTE_SPI2_TX_DMA_STREAM 3 +#define RTE_SPI2_TX_DMA_CHANNEL 0 +#define RTE_SPI2_TX_DMA_PRIORITY 0 + +// + + +// SPI3 (Serial Peripheral Interface 3) [Driver_SPI3] +// Configuration settings for Driver_SPI3 in component ::Drivers:SPI +#define RTE_SPI3 0 + +// SPI3_NSS Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SPI3_NSS_PIN 1 +#define RTE_SPI3_NSS_PORT GPIO_PORT(0) +#define RTE_SPI3_NSS_BIT 15 + +// SPI3_SCK Pin <0=>PB3 <1=>PC10 +#define RTE_SPI3_SCL_PORT_ID 0 +#if (RTE_SPI3_SCL_PORT_ID == 0) +#define RTE_SPI3_SCL_PORT GPIOB +#define RTE_SPI3_SCL_BIT 3 +#elif (RTE_SPI3_SCL_PORT_ID == 1) +#define RTE_SPI3_SCL_PORT GPIOC +#define RTE_SPI3_SCL_BIT 10 +#else +#error "Invalid SPI3_SCK Pin Configuration!" +#endif + +// SPI3_MISO Pin <0=>PB4 <1=>PC11 +#define RTE_SPI3_MISO_PORT_ID 0 +#if (RTE_SPI3_MISO_PORT_ID == 0) +#define RTE_SPI3_MISO_PORT GPIOB +#define RTE_SPI3_MISO_BIT 4 +#elif (RTE_SPI3_MISO_PORT_ID == 1) +#define RTE_SPI3_MISO_PORT GPIOC +#define RTE_SPI3_MISO_BIT 11 +#else +#error "Invalid SPI3_MISO Pin Configuration!" +#endif + +// SPI3_MOSI Pin <0=>PB5 <1=>PC12 +#define RTE_SPI3_MOSI_PORT_ID 0 +#if (RTE_SPI3_MOSI_PORT_ID == 0) +#define RTE_SPI3_MOSI_PORT GPIOB +#define RTE_SPI3_MOSI_BIT 5 +#elif (RTE_SPI3_MOSI_PORT_ID == 1) +#define RTE_SPI3_MOSI_PORT GPIOC +#define RTE_SPI3_MOSI_BIT 12 +#else +#error "Invalid SPI3_MISO Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <0=>0 <2=>2 +// Selects DMA Stream (only Stream 0 or 2 can be used) +// Channel <0=>0 +// Selects DMA Channel (only Channel 0 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI3_RX_DMA 1 +#define RTE_SPI3_RX_DMA_NUMBER 1 +#define RTE_SPI3_RX_DMA_STREAM 0 +#define RTE_SPI3_RX_DMA_CHANNEL 0 +#define RTE_SPI3_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <5=>5 <7=>7 +// Selects DMA Stream (only Stream 5 or 7 can be used) +// Channel <0=>0 +// Selects DMA Channel (only Channel 0 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI3_TX_DMA 1 +#define RTE_SPI3_TX_DMA_NUMBER 1 +#define RTE_SPI3_TX_DMA_STREAM 5 +#define RTE_SPI3_TX_DMA_CHANNEL 0 +#define RTE_SPI3_TX_DMA_PRIORITY 0 + +// + + +// SDIO (Secure Digital Input/Output) [Driver_MCI0] +// Configuration settings for Driver_MCI0 in component ::Drivers:MCI +#define RTE_SDIO 1 + +// SDIO_CD (Card Detect) Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SDIO_CD_PIN 1 +#define RTE_SDIO_CD_ACTIVE 0 +#define RTE_SDIO_CD_PORT GPIO_PORT(7) +#define RTE_SDIO_CD_BIT 15 + +// SDIO_WP (Write Protect) Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SDIO_WP_PIN 0 +#define RTE_SDIO_WP_ACTIVE 0 +#define RTE_SDIO_WP_PORT GPIO_PORT(7) +#define RTE_SDIO_WP_BIT 16 + +// SDIO Bus +// SDIO_CK Pin <0=>PC12 +#define RTE_SDIO_CK_PORT_ID 0 +#if (RTE_SDIO_CK_PORT_ID == 0) +#define RTE_SDIO_CK_PORT GPIOC +#define RTE_SDIO_CK_PIN 12 +#else +#error "Invalid SDIO_CK Pin Configuration!" +#endif +// SDIO_CMD Pin <0=>PD2 +#define RTE_SDIO_CMD_PORT_ID 0 +#if (RTE_SDIO_CMD_PORT_ID == 0) +#define RTE_SDIO_CMD_PORT GPIOD +#define RTE_SDIO_CMD_PIN 2 +#else +#error "Invalid SDIO_CDM Pin Configuration!" +#endif +// SDIO_D0 Pin <0=>PC8 +#define RTE_SDIO_D0_PORT_ID 0 +#if (RTE_SDIO_D0_PORT_ID == 0) +#define RTE_SDIO_D0_PORT GPIOC +#define RTE_SDIO_D0_PIN 8 +#else +#error "Invalid SDIO_D0 Pin Configuration!" +#endif +// SDIO_D1 Pin <0=>PC9 +#define RTE_SDIO_D1_PORT_ID 0 +#if (RTE_SDIO_D1_PORT_ID == 0) +#define RTE_SDIO_D1_PORT GPIOC +#define RTE_SDIO_D1_PIN 9 +#else +#error "Invalid SDIO_D1 Pin Configuration!" +#endif +// SDIO_D2 Pin <0=>PC10 +#define RTE_SDIO_D2_PORT_ID 0 +#if (RTE_SDIO_D2_PORT_ID == 0) +#define RTE_SDIO_D2_PORT GPIOC +#define RTE_SDIO_D2_PIN 10 +#else +#error "Invalid SDIO_D2 Pin Configuration!" +#endif +// SDIO_D3 Pin <0=>PC11 +#define RTE_SDIO_D3_PORT_ID 0 +#if (RTE_SDIO_D3_PORT_ID == 0) +#define RTE_SDIO_D3_PORT GPIOC +#define RTE_SDIO_D3_PIN 11 +#else +#error "Invalid SDIO_D3 Pin Configuration!" +#endif +// SDIO_D4 Pin <0=>PB8 +#define RTE_SDIO_D4_PORT_ID 0 +#if (RTE_SDIO_D4_PORT_ID == 0) +#define RTE_SDIO_D4_PORT GPIOB +#define RTE_SDIO_D4_PIN 8 +#else +#error "Invalid SDIO_D4 Pin Configuration!" +#endif +// SDIO_D5 Pin <0=>PB9 +#define RTE_SDIO_D5_PORT_ID 0 +#if (RTE_SDIO_D5_PORT_ID == 0) +#define RTE_SDIO_D5_PORT GPIOB +#define RTE_SDIO_D5_PIN 9 +#else +#error "Invalid SDIO_D5 Pin Configuration!" +#endif +// SDIO_D6 Pin <0=>PC6 +#define RTE_SDIO_D6_PORT_ID 0 +#if (RTE_SDIO_D6_PORT_ID == 0) +#define RTE_SDIO_D6_PORT GPIOC +#define RTE_SDIO_D6_PIN 6 +#else +#error "Invalid SDIO_D6 Pin Configuration!" +#endif +// SDIO_D7 Pin <0=>PC7 +#define RTE_SDIO_D7_PORT_ID 0 +#if (RTE_SDIO_D7_PORT_ID == 0) +#define RTE_SDIO_D7_PORT GPIOC +#define RTE_SDIO_D7_PIN 7 +#else +#error "Invalid SDIO_D7 Pin Configuration!" +#endif +// + +// DMA +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <3=>3 <6=>6 +// Selects DMA Stream (only Stream 3 or 6 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SDIO_DMA 1 +#define RTE_SDIO_DMA_NUMBER 2 +#define RTE_SDIO_DMA_STREAM 3 +#define RTE_SDIO_DMA_CHANNEL 4 +#define RTE_SDIO_DMA_PRIORITY 0 + +// + + +// ETH (Ethernet Interface) [Driver_ETH_MAC0] +// Configuration settings for Driver_ETH_MAC0 in component ::Drivers:Ethernet MAC +#define RTE_ETH 0 + +// MII (Media Independent Interface) +#define RTE_ETH_MII 0 + +// ETH_MII_TX_CLK Pin <0=>PC3 +#define RTE_ETH_MII_TX_CLK_PORT_ID 0 +#if (RTE_ETH_MII_TX_CLK_PORT_ID == 0) +#define RTE_ETH_MII_TX_CLK_PORT GPIOC +#define RTE_ETH_MII_TX_CLK_PIN 3 +#else +#error "Invalid ETH_MII_TX_CLK Pin Configuration!" +#endif +// ETH_MII_TXD0 Pin <0=>PB12 <1=>PG13 +#define RTE_ETH_MII_TXD0_PORT_ID 0 +#if (RTE_ETH_MII_TXD0_PORT_ID == 0) +#define RTE_ETH_MII_TXD0_PORT GPIOB +#define RTE_ETH_MII_TXD0_PIN 12 +#elif (RTE_ETH_MII_TXD0_PORT_ID == 1) +#define RTE_ETH_MII_TXD0_PORT GPIOG +#define RTE_ETH_MII_TXD0_PIN 13 +#else +#error "Invalid ETH_MII_TXD0 Pin Configuration!" +#endif +// ETH_MII_TXD1 Pin <0=>PB13 <1=>PG14 +#define RTE_ETH_MII_TXD1_PORT_ID 0 +#if (RTE_ETH_MII_TXD1_PORT_ID == 0) +#define RTE_ETH_MII_TXD1_PORT GPIOB +#define RTE_ETH_MII_TXD1_PIN 13 +#elif (RTE_ETH_MII_TXD1_PORT_ID == 1) +#define RTE_ETH_MII_TXD1_PORT GPIOG +#define RTE_ETH_MII_TXD1_PIN 14 +#else +#error "Invalid ETH_MII_TXD1 Pin Configuration!" +#endif +// ETH_MII_TXD2 Pin <0=>PC2 +#define RTE_ETH_MII_TXD2_PORT_ID 0 +#if (RTE_ETH_MII_TXD2_PORT_ID == 0) +#define RTE_ETH_MII_TXD2_PORT GPIOC +#define RTE_ETH_MII_TXD2_PIN 2 +#else +#error "Invalid ETH_MII_TXD2 Pin Configuration!" +#endif +// ETH_MII_TXD3 Pin <0=>PB8 <1=>PE2 +#define RTE_ETH_MII_TXD3_PORT_ID 0 +#if (RTE_ETH_MII_TXD3_PORT_ID == 0) +#define RTE_ETH_MII_TXD3_PORT GPIOB +#define RTE_ETH_MII_TXD3_PIN 8 +#elif (RTE_ETH_MII_TXD3_PORT_ID == 1) +#define RTE_ETH_MII_TXD3_PORT GPIOE +#define RTE_ETH_MII_TXD3_PIN 2 +#else +#error "Invalid ETH_MII_TXD3 Pin Configuration!" +#endif +// ETH_MII_TX_EN Pin <0=>PB11 <1=>PG11 +#define RTE_ETH_MII_TX_EN_PORT_ID 0 +#if (RTE_ETH_MII_TX_EN_PORT_ID == 0) +#define RTE_ETH_MII_TX_EN_PORT GPIOB +#define RTE_ETH_MII_TX_EN_PIN 11 +#elif (RTE_ETH_MII_TX_EN_PORT_ID == 1) +#define RTE_ETH_MII_TX_EN_PORT GPIOG +#define RTE_ETH_MII_TX_EN_PIN 11 +#else +#error "Invalid ETH_MII_TX_EN Pin Configuration!" +#endif +// ETH_MII_RX_CLK Pin <0=>PA1 +#define RTE_ETH_MII_RX_CLK_PORT_ID 0 +#if (RTE_ETH_MII_RX_CLK_PORT_ID == 0) +#define RTE_ETH_MII_RX_CLK_PORT GPIOA +#define RTE_ETH_MII_RX_CLK_PIN 1 +#else +#error "Invalid ETH_MII_RX_CLK Pin Configuration!" +#endif +// ETH_MII_RXD0 Pin <0=>PC4 +#define RTE_ETH_MII_RXD0_PORT_ID 0 +#if (RTE_ETH_MII_RXD0_PORT_ID == 0) +#define RTE_ETH_MII_RXD0_PORT GPIOC +#define RTE_ETH_MII_RXD0_PIN 4 +#else +#error "Invalid ETH_MII_RXD0 Pin Configuration!" +#endif +// ETH_MII_RXD1 Pin <0=>PC5 +#define RTE_ETH_MII_RXD1_PORT_ID 0 +#if (RTE_ETH_MII_RXD1_PORT_ID == 0) +#define RTE_ETH_MII_RXD1_PORT GPIOC +#define RTE_ETH_MII_RXD1_PIN 5 +#else +#error "Invalid ETH_MII_RXD1 Pin Configuration!" +#endif +// ETH_MII_RXD2 Pin <0=>PB0 <1=>PH6 +#define RTE_ETH_MII_RXD2_PORT_ID 0 +#if (RTE_ETH_MII_RXD2_PORT_ID == 0) +#define RTE_ETH_MII_RXD2_PORT GPIOB +#define RTE_ETH_MII_RXD2_PIN 0 +#elif (RTE_ETH_MII_RXD2_PORT_ID == 1) +#define RTE_ETH_MII_RXD2_PORT GPIOH +#define RTE_ETH_MII_RXD2_PIN 6 +#else +#error "Invalid ETH_MII_RXD2 Pin Configuration!" +#endif +// ETH_MII_RXD3 Pin <0=>PB1 <1=>PH7 +#define RTE_ETH_MII_RXD3_PORT_ID 0 +#if (RTE_ETH_MII_RXD3_PORT_ID == 0) +#define RTE_ETH_MII_RXD3_PORT GPIOB +#define RTE_ETH_MII_RXD3_PIN 1 +#elif (RTE_ETH_MII_RXD3_PORT_ID == 1) +#define RTE_ETH_MII_RXD3_PORT GPIOH +#define RTE_ETH_MII_RXD3_PIN 7 +#else +#error "Invalid ETH_MII_RXD3 Pin Configuration!" +#endif +// ETH_MII_RX_DV Pin <0=>PA7 +#define RTE_ETH_MII_RX_DV_PORT_ID 0 +#if (RTE_ETH_MII_RX_DV_PORT_ID == 0) +#define RTE_ETH_MII_RX_DV_PORT GPIOA +#define RTE_ETH_MII_RX_DV_PIN 7 +#else +#error "Invalid ETH_MII_RX_DV Pin Configuration!" +#endif +// ETH_MII_RX_ER Pin <0=>PB10 <1=>PI10 +#define RTE_ETH_MII_RX_ER_PORT_ID 0 +#if (RTE_ETH_MII_RX_ER_PORT_ID == 0) +#define RTE_ETH_MII_RX_ER_PORT GPIOB +#define RTE_ETH_MII_RX_ER_PIN 10 +#elif (RTE_ETH_MII_RXD3_PORT_ID == 1) +#define RTE_ETH_MII_RX_ER_PORT GPIOI +#define RTE_ETH_MII_RX_ER_PIN 10 +#else +#error "Invalid ETH_MII_RX_ER Pin Configuration!" +#endif +// ETH_MII_CRS Pin <0=>PA0 <1=>PH2 +#define RTE_ETH_MII_CRS_PORT_ID 0 +#if (RTE_ETH_MII_CRS_PORT_ID == 0) +#define RTE_ETH_MII_CRS_PORT GPIOA +#define RTE_ETH_MII_CRS_PIN 0 +#elif (RTE_ETH_MII_CRS_PORT_ID == 1) +#define RTE_ETH_MII_CRS_PORT GPIOH +#define RTE_ETH_MII_CRS_PIN 2 +#else +#error "Invalid ETH_MII_CRS Pin Configuration!" +#endif +// ETH_MII_COL Pin <0=>PA3 <1=>PH3 +#define RTE_ETH_MII_COL_PORT_ID 0 +#if (RTE_ETH_MII_COL_PORT_ID == 0) +#define RTE_ETH_MII_COL_PORT GPIOA +#define RTE_ETH_MII_COL_PIN 3 +#elif (RTE_ETH_MII_COL_PORT_ID == 1) +#define RTE_ETH_MII_COL_PORT GPIOH +#define RTE_ETH_MII_COL_PIN 3 +#else +#error "Invalid ETH_MII_COL Pin Configuration!" +#endif + +// + +// RMII (Reduced Media Independent Interface) +#define RTE_ETH_RMII 1 + +// ETH_RMII_TXD0 Pin <0=>PB12 <1=>PG13 +#define RTE_ETH_RMII_TXD0_PORT_ID 1 +#if (RTE_ETH_RMII_TXD0_PORT_ID == 0) +#define RTE_ETH_RMII_TXD0_PORT GPIOB +#define RTE_ETH_RMII_TXD0_PIN 12 +#elif (RTE_ETH_RMII_TXD0_PORT_ID == 1) +#define RTE_ETH_RMII_TXD0_PORT GPIOG +#define RTE_ETH_RMII_TXD0_PIN 13 +#else +#error "Invalid ETH_RMII_TXD0 Pin Configuration!" +#endif +// ETH_RMII_TXD1 Pin <0=>PB13 <1=>PG14 +#define RTE_ETH_RMII_TXD1_PORT_ID 1 +#if (RTE_ETH_RMII_TXD1_PORT_ID == 0) +#define RTE_ETH_RMII_TXD1_PORT GPIOB +#define RTE_ETH_RMII_TXD1_PIN 13 +#elif (RTE_ETH_RMII_TXD1_PORT_ID == 1) +#define RTE_ETH_RMII_TXD1_PORT GPIOG +#define RTE_ETH_RMII_TXD1_PIN 14 +#else +#error "Invalid ETH_RMII_TXD1 Pin Configuration!" +#endif +// ETH_RMII_TX_EN Pin <0=>PB11 <1=>PG11 +#define RTE_ETH_RMII_TX_EN_PORT_ID 1 +#if (RTE_ETH_RMII_TX_EN_PORT_ID == 0) +#define RTE_ETH_RMII_TX_EN_PORT GPIOB +#define RTE_ETH_RMII_TX_EN_PIN 11 +#elif (RTE_ETH_RMII_TX_EN_PORT_ID == 1) +#define RTE_ETH_RMII_TX_EN_PORT GPIOG +#define RTE_ETH_RMII_TX_EN_PIN 11 +#else +#error "Invalid ETH_RMII_TX_EN Pin Configuration!" +#endif +// ETH_RMII_RXD0 Pin <0=>PC4 +#define RTE_ETH_RMII_RXD0_PORT_ID 0 +#if (RTE_ETH_RMII_RXD0_PORT_ID == 0) +#define RTE_ETH_RMII_RXD0_PORT GPIOC +#define RTE_ETH_RMII_RXD0_PIN 4 +#else +#error "Invalid ETH_RMII_RXD0 Pin Configuration!" +#endif +// ETH_RMII_RXD1 Pin <0=>PC5 +#define RTE_ETH_RMII_RXD1_PORT_ID 0 +#if (RTE_ETH_RMII_RXD1_PORT_ID == 0) +#define RTE_ETH_RMII_RXD1_PORT GPIOC +#define RTE_ETH_RMII_RXD1_PIN 5 +#else +#error "Invalid ETH_RMII_RXD1 Pin Configuration!" +#endif +// ETH_RMII_REF_CLK Pin <0=>PA1 +#define RTE_ETH_RMII_REF_CLK_PORT_ID 0 +#if (RTE_ETH_RMII_REF_CLK_PORT_ID == 0) +#define RTE_ETH_RMII_REF_CLK_PORT GPIOA +#define RTE_ETH_RMII_REF_CLK_PIN 1 +#else +#error "Invalid ETH_RMII_REF_CLK Pin Configuration!" +#endif +// ETH_RMII_CRS_DV Pin <0=>PA7 +#define RTE_ETH_RMII_CRS_DV_PORT_ID 0 +#if (RTE_ETH_RMII_CRS_DV_PORT_ID == 0) +#define RTE_ETH_RMII_CRS_DV_PORT GPIOA +#define RTE_ETH_RMII_CRS_DV_PIN 7 +#else +#error "Invalid ETH_RMII_CRS_DV Pin Configuration!" +#endif + +// + +// Management Data Interface +// ETH_MDC Pin <0=>PC1 +#define RTE_ETH_MDI_MDC_PORT_ID 0 +#if (RTE_ETH_MDI_MDC_PORT_ID == 0) +#define RTE_ETH_MDI_MDC_PORT GPIOC +#define RTE_ETH_MDI_MDC_PIN 1 +#else +#error "Invalid ETH_MDC Pin Configuration!" +#endif +// ETH_MDIO Pin <0=>PA2 +#define RTE_ETH_MDI_MDIO_PORT_ID 0 +#if (RTE_ETH_MDI_MDIO_PORT_ID == 0) +#define RTE_ETH_MDI_MDIO_PORT GPIOA +#define RTE_ETH_MDI_MDIO_PIN 2 +#else +#error "Invalid ETH_MDIO Pin Configuration!" +#endif +// + +// Reference 25MHz/50MHz Clock generation +#define RTE_ETH_REF_CLOCK 0 + +// MCO Pin <0=>PA2 <1=>PC9 +#define RTE_ETH_REF_CLOCK_PORT_ID 0 +#if (RTE_ETH_REF_CLOCK_PORT_ID == 0) +#define RTE_ETH_REF_CLOCK_PORT GPIOA +#define RTE_ETH_REF_CLOCK_PIN 8 +#elif (RTE_ETH_REF_CLOCK_PORT_ID == 1) +#define RTE_ETH_REF_CLOCK_PORT GPIOC +#define RTE_ETH_REF_CLOCK_PIN 9 +#else +#error "Invalid MCO Pin Configuration!" +#endif + +// + +// + + +// USB OTG Full-speed +#define RTE_USB_OTG_FS 0 + +// Device [Driver_USBD0] +// Configuration settings for Driver_USBD0 in component ::Drivers:USB Device +#define RTE_USB_OTG_FS_DEV 1 + +// Endpoints +// Reduce memory requirements of Driver by disabling unused endpoints +// Endpoint 1 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 2 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 3 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// +#define RTE_USB_OTG_FS_DEV_EP 0x0000000F +#define RTE_USB_OTG_FS_DEV_EP_BULK 0x000E000E +#define RTE_USB_OTG_FS_DEV_EP_INT 0x000E000E +#define RTE_USB_OTG_FS_DEV_EP_ISO 0x000E000E + +// + +// Host [Driver_USBH0] +// Configuration settings for Driver_USBH0 in component ::Drivers:USB Host + +#define RTE_USB_OTG_FS_HOST 1 + +// VBUS Power On/Off Pin +// Configure Pin for driving VBUS +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_OTG_FS_VBUS_PIN 1 +#define RTE_OTG_FS_VBUS_ACTIVE 0 +#define RTE_OTG_FS_VBUS_PORT GPIO_PORT(7) +#define RTE_OTG_FS_VBUS_BIT 5 + +// Overcurrent Detection Pin +// Configure Pin for overcurrent detection +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_OTG_FS_OC_PIN 1 +#define RTE_OTG_FS_OC_ACTIVE 0 +#define RTE_OTG_FS_OC_PORT GPIO_PORT(5) +#define RTE_OTG_FS_OC_BIT 11 +// + +// + + +// USB OTG High-speed +#define RTE_USB_OTG_HS 0 + +// PHY (Physical Layer) + +// PHY Interface +// <0=>On-chip full-speed PHY +// <1=>External ULPI high-speed PHY +#define RTE_USB_OTG_HS_PHY 1 + +// External ULPI Pins (UTMI+ Low Pin Interface) + +// OTG_HS_ULPI_CK Pin <0=>PA5 +#define RTE_USB_OTG_HS_ULPI_CK_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_CK_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_CK_PORT GPIOA +#define RTE_USB_OTG_HS_ULPI_CK_PIN 5 +#else +#error "Invalid OTG_HS_ULPI_CK Pin Configuration!" +#endif +// OTG_HS_ULPI_DIR Pin <0=>PI11 <1=>PC2 +#define RTE_USB_OTG_HS_ULPI_DIR_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_DIR_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_DIR_PORT GPIOI +#define RTE_USB_OTG_HS_ULPI_DIR_PIN 11 +#elif (RTE_USB_OTG_HS_ULPI_DIR_PORT_ID == 1) +#define RTE_USB_OTG_HS_ULPI_DIR_PORT GPIOC +#define RTE_USB_OTG_HS_ULPI_DIR_PIN 2 +#else +#error "Invalid OTG_HS_ULPI_DIR Pin Configuration!" +#endif +// OTG_HS_ULPI_STP Pin <0=>PC0 +#define RTE_USB_OTG_HS_ULPI_STP_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_STP_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_STP_PORT GPIOC +#define RTE_USB_OTG_HS_ULPI_STP_PIN 0 +#else +#error "Invalid OTG_HS_ULPI_STP Pin Configuration!" +#endif +// OTG_HS_ULPI_NXT Pin <0=>PC2 <1=>PH4 +#define RTE_USB_OTG_HS_ULPI_NXT_PORT_ID 1 +#if (RTE_USB_OTG_HS_ULPI_NXT_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_NXT_PORT GPIOC +#define RTE_USB_OTG_HS_ULPI_NXT_PIN 2 +#elif (RTE_USB_OTG_HS_ULPI_NXT_PORT_ID == 1) +#define RTE_USB_OTG_HS_ULPI_NXT_PORT GPIOH +#define RTE_USB_OTG_HS_ULPI_NXT_PIN 4 +#else +#error "Invalid OTG_HS_ULPI_NXT Pin Configuration!" +#endif +// OTG_HS_ULPI_D0 Pin <0=>PA3 +#define RTE_USB_OTG_HS_ULPI_D0_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D0_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D0_PORT GPIOA +#define RTE_USB_OTG_HS_ULPI_D0_PIN 3 +#else +#error "Invalid OTG_HS_ULPI_D0 Pin Configuration!" +#endif +// OTG_HS_ULPI_D1 Pin <0=>PB0 +#define RTE_USB_OTG_HS_ULPI_D1_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D1_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D1_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D1_PIN 0 +#else +#error "Invalid OTG_HS_ULPI_D1 Pin Configuration!" +#endif +// OTG_HS_ULPI_D2 Pin <0=>PB1 +#define RTE_USB_OTG_HS_ULPI_D2_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D2_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D2_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D2_PIN 1 +#else +#error "Invalid OTG_HS_ULPI_D2 Pin Configuration!" +#endif +// OTG_HS_ULPI_D3 Pin <0=>PB10 +#define RTE_USB_OTG_HS_ULPI_D3_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D3_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D3_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D3_PIN 10 +#else +#error "Invalid OTG_HS_ULPI_D3 Pin Configuration!" +#endif +// OTG_HS_ULPI_D4 Pin <0=>PB11 +#define RTE_USB_OTG_HS_ULPI_D4_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D4_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D4_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D4_PIN 11 +#else +#error "Invalid OTG_HS_ULPI_D4 Pin Configuration!" +#endif +// OTG_HS_ULPI_D5 Pin <0=>PB12 +#define RTE_USB_OTG_HS_ULPI_D5_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D5_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D5_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D5_PIN 12 +#else +#error "Invalid OTG_HS_ULPI_D5 Pin Configuration!" +#endif +// OTG_HS_ULPI_D6 Pin <0=>PB13 +#define RTE_USB_OTG_HS_ULPI_D6_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D6_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D6_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D6_PIN 13 +#else +#error "Invalid OTG_HS_ULPI_D6 Pin Configuration!" +#endif +// OTG_HS_ULPI_D7 Pin <0=>PB5 +#define RTE_USB_OTG_HS_ULPI_D7_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D7_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D7_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D7_PIN 5 +#else +#error "Invalid OTG_HS_ULPI_D7 Pin Configuration!" +#endif + +// + +// + +// Device [Driver_USBD1] +// Configuration settings for Driver_USBD1 in component ::Drivers:USB Device +#define RTE_USB_OTG_HS_DEV 1 + +// Endpoints +// Reduce memory requirements of Driver by disabling unused endpoints +// Endpoint 1 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 2 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 3 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 4 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 5 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// +#define RTE_USB_OTG_HS_DEV_EP 0x0000003F +#define RTE_USB_OTG_HS_DEV_EP_BULK 0x003E003E +#define RTE_USB_OTG_HS_DEV_EP_INT 0x003E003E +#define RTE_USB_OTG_HS_DEV_EP_ISO 0x003E003E + +// + +// Host [Driver_USBH1] +// Configuration settings for Driver_USBH1 in component ::Drivers:USB Host +#define RTE_USB_OTG_HS_HOST 1 + +// VBUS Power On/Off Pin +// Configure Pin for driving VBUS +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_OTG_HS_VBUS_PIN 1 +#define RTE_OTG_HS_VBUS_ACTIVE 0 +#define RTE_OTG_HS_VBUS_PORT GPIO_PORT(2) +#define RTE_OTG_HS_VBUS_BIT 2 + +// Overcurrent Detection Pin +// Configure Pin for overcurrent detection +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_OTG_HS_OC_PIN 1 +#define RTE_OTG_HS_OC_ACTIVE 0 +#define RTE_OTG_HS_OC_PORT GPIO_PORT(5) +#define RTE_OTG_HS_OC_BIT 12 +// + +// + + +// EXTI (External Interrupt/Event Controller) +#define RTE_EXTI 0 + +// EXTI0 Line +#define RTE_EXTI0 0 +// Pin <0=>PA0 <1=>PB0 <2=>PC0 <3=>PD0 <4=>PE0 <5=>PF0 <6=>PG0 <7=>PH0 <8=>PI0 +#define RTE_EXTI0_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI0_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI0_TRIGGER 0 +// + +// EXTI1 Line +#define RTE_EXTI1 0 +// Pin <0=>PA1 <1=>PB1 <2=>PC1 <3=>PD1 <4=>PE1 <5=>PF1 <6=>PG1 <7=>PH1 <8=>PI1 +#define RTE_EXTI1_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI1_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI1_TRIGGER 0 +// + +// EXTI2 Line +#define RTE_EXTI2 0 +// Pin <0=>PA2 <1=>PB2 <2=>PC2 <3=>PD2 <4=>PE2 <5=>PF2 <6=>PG2 <7=>PH2 <8=>PI2 +#define RTE_EXTI2_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI2_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI2_TRIGGER 0 +// + +// EXTI3 Line +#define RTE_EXTI3 0 +// Pin <0=>PA3 <1=>PB3 <2=>PC3 <3=>PD3 <4=>PE3 <5=>PF3 <6=>PG3 <7=>PH3 <8=>PI3 +#define RTE_EXTI3_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI3_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI3_TRIGGER 0 +// + +// EXTI4 Line +#define RTE_EXTI4 0 +// Pin <0=>PA4 <1=>PB4 <2=>PC4 <3=>PD4 <4=>PE4 <5=>PF4 <6=>PG4 <7=>PH4 <8=>PI4 +#define RTE_EXTI4_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI4_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI4_TRIGGER 0 +// + +// EXTI5 Line +#define RTE_EXTI5 0 +// Pin <0=>PA5 <1=>PB5 <2=>PC5 <3=>PD5 <4=>PE5 <5=>PF5 <6=>PG5 <7=>PH5 <8=>PI5 +#define RTE_EXTI5_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI5_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI5_TRIGGER 0 +// + +// EXTI6 Line +#define RTE_EXTI6 0 +// Pin <0=>PA6 <1=>PB6 <2=>PC6 <3=>PD6 <4=>PE6 <5=>PF6 <6=>PG6 <7=>PH6 <8=>PI6 +#define RTE_EXTI6_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI6_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI6_TRIGGER 0 +// + +// EXTI7 Line +#define RTE_EXTI7 0 +// Pin <0=>PA7 <1=>PB7 <2=>PC7 <3=>PD7 <4=>PE7 <5=>PF7 <6=>PG7 <7=>PH7 <8=>PI7 +#define RTE_EXTI7_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI7_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI7_TRIGGER 0 +// + +// EXTI8 Line +#define RTE_EXTI8 0 +// Pin <0=>PA8 <1=>PB8 <2=>PC8 <3=>PD8 <4=>PE8 <5=>PF8 <6=>PG8 <7=>PH8 <8=>PI8 +#define RTE_EXTI8_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI8_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI8_TRIGGER 0 +// + +// EXTI9 Line +#define RTE_EXTI9 0 +// Pin <0=>PA9 <1=>PB9 <2=>PC9 <3=>PD9 <4=>PE9 <5=>PF9 <6=>PG9 <7=>PH9 <8=>PI9 +#define RTE_EXTI9_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI9_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI9_TRIGGER 0 +// + +// EXTI10 Line +#define RTE_EXTI10 0 +// Pin <0=>PA10 <1=>PB10 <2=>PC10 <3=>PD10 <4=>PE10 <5=>PF10 <6=>PG10 <7=>PH10 <8=>PI10 +#define RTE_EXTI10_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI10_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI10_TRIGGER 0 +// + +// EXTI11 Line +#define RTE_EXTI11 0 +// Pin <0=>PA11 <1=>PB11 <2=>PC11 <3=>PD11 <4=>PE11 <5=>PF11 <6=>PG11 <7=>PH11 <8=>PI11 +#define RTE_EXTI11_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI11_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI11_TRIGGER 0 +// + +// EXTI12 Line +#define RTE_EXTI12 0 +// Pin <0=>PA12 <1=>PB12 <2=>PC12 <3=>PD12 <4=>PE12 <5=>PF12 <6=>PG12 <7=>PH12 +#define RTE_EXTI12_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI12_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI12_TRIGGER 0 +// + +// EXTI13 Line +#define RTE_EXTI13 0 +// Pin <0=>PA13 <1=>PB13 <2=>PC13 <3=>PD13 <4=>PE13 <5=>PF13 <6=>PG13 <7=>PH13 +#define RTE_EXTI13_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI13_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI13_TRIGGER 0 +// + +// EXTI14 Line +#define RTE_EXTI14 0 +// Pin <0=>PA14 <1=>PB14 <2=>PC14 <3=>PD14 <4=>PE14 <5=>PF14 <6=>PG14 <7=>PH14 +#define RTE_EXTI14_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI14_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI14_TRIGGER 0 +// + +// EXTI15 Line +#define RTE_EXTI15 0 +// Pin <0=>PA15 <1=>PB15 <2=>PC15 <3=>PD15 <4=>PE15 <5=>PF15 <6=>PG15 <7=>PH15 +#define RTE_EXTI15_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI15_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI15_TRIGGER 0 +// + +// EXTI16 Line: PVD Output +#define RTE_EXTI16 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI16_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI16_TRIGGER 0 +// + +// EXTI17 Line: RTC Alarm +#define RTE_EXTI17 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI17_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI17_TRIGGER 0 +// + +// EXTI18 Line: USB OTG FS Wakeup +#define RTE_EXTI18 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI18_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI18_TRIGGER 0 +// + +// EXTI19 Line: Ethernet Wakeup +#define RTE_EXTI19 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI19_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI19_TRIGGER 0 +// + +// EXTI20 Line: USB OTG HS Wakeup +#define RTE_EXTI20 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI20_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI20_TRIGGER 0 +// + +// EXTI21 Line: RTC Tamper and TimeStamp +#define RTE_EXTI21 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI21_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI21_TRIGGER 0 +// + +// EXTI22 Line: RTC Wakeup +#define RTE_EXTI22 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI22_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI22_TRIGGER 0 +// + +// + + +// FSMC (Flexible Static Memory Controller) +#define RTE_FSMC 0 + +// Pin Configuration +// Configure Pins +#define RTE_FSMC_PINS 0 + +// Address Bus Pins +// <0=>A[17:16] +// <1=>A[10:0] <2=>A[15:0] <3=>A[16:0] <4=>A[17:0] +// <5=>A[18:0] <6=>A[19:0] <7=>A[20:0] <8=>A[21:0] +// <9=>A[22:0] <10=>A[23:0] <11=>A[24:0] <12=>A[25:0] +#define RTE_FSMC_ABUS_PINS 10 +// Data Bus Pins <0=>D[7:0] <1=>D[15:0] +#define RTE_FSMC_DBUS_PINS 0 +// FSMC_NOE Pin +#define RTE_FSMC_NOE_PIN 0 +// FSMC_NWE Pin +#define RTE_FSMC_NWE_PIN 0 +// FSMC_NBL0 Pin +#define RTE_FSMC_NBL0_PIN 0 +// FSMC_NBL1 Pin +#define RTE_FSMC_NBL1_PIN 0 +// FSMC_NL Pin +#define RTE_FSMC_NL_PIN 0 +// FSMC_NWAIT Pin +#define RTE_FSMC_NWAIT_PIN 0 +// FSMC_CLK Pin +#define RTE_FSMC_CLK_PIN 0 +// FSMC_NE1/NCE2 Pin +#define RTE_FSMC_NE1_PIN 0 +// FSMC_NE2/NCE3 Pin +#define RTE_FSMC_NE2_PIN 0 +// FSMC_NE3/NCE4_1 Pin +#define RTE_FSMC_NE3_PIN 0 +// FSMC_NE4 Pin +#define RTE_FSMC_NE4_PIN 0 +// FSMC_NCE4_2 Pin +#define RTE_FSMC_NCE42_PIN 0 +// FSMC_INT2 Pin +#define RTE_FSMC_INT2_PIN 0 +// FSMC_INT3 Pin +#define RTE_FSMC_INT3_PIN 0 +// FSMC_INTR Pin +#define RTE_FSMC_INTR_PIN 0 +// FSMC_NIORD Pin +#define RTE_FSMC_NIORD_PIN 0 +// FSMC_NIOWR Pin +#define RTE_FSMC_NIOWR_PIN 0 +// FSMC_NREG Pin +#define RTE_FSMC_NREG_PIN 0 +// FSMC_CD Pin +#define RTE_FSMC_CD_PIN 0 + +// + +// NOR Flash / PSRAM Controller + +// FSMC_NE1 Chip Select +// Configure Device on Chip Select FSMC_NE1 +#define RTE_FSMC_NE1 0 + +// Chip-select control +// CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write +// For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash +// memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal. +// ASYNCWAIT: Wait signal during asynchronous transfer +// Enables the FSMC to use the wait signal even during an asynchronous protocol. +// EXTMOD: Extended mode enable +// Enables the FSMC to program inside the write timing register, so it allows different timings for read and write. +// WAITEN: Wait enable +// For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal. +// WREN: Write enable +// Enable/disable write operations in the current bank by the FSMC +// WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state +// For memory access in burst mode, the NWAIT signal indicates whether the data from the memory +// are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted +// by the memory one clock cycle before the wait state or during the wait state +// WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high +// Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode. +// BURSTEN: Burst enable +// Enables the burst access mode for the memory. Valid only with synchronous burst memories. +// FACCEN: Flash access enable +// Enables NOR Flash memory access operations. +// MWID: Memory databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width, valid for all type of memories. +// MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash +// Defines the type of external memory attached to the corresponding memory bank. +// MUXEN: Address/data multiplexing enable +// When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories. +// MBKEN: Memory bank enable +// Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a +// disabled bank causes an ERROR on AHB bus. +#define RTE_FSMC_BCR1_CBURSTRW 0 +#define RTE_FSMC_BCR1_ASYNCWAIT 0 +#define RTE_FSMC_BCR1_EXTMOD 0 +#define RTE_FSMC_BCR1_WAITEN 1 +#define RTE_FSMC_BCR1_WREN 1 +#define RTE_FSMC_BCR1_WAITCFG 0 +#define RTE_FSMC_BCR1_WRAPMOD 0 +#define RTE_FSMC_BCR1_WAITPOL 0 +#define RTE_FSMC_BCR1_BURSTEN 0 +#define RTE_FSMC_BCR1_FACCEN 1 +#define RTE_FSMC_BCR1_MWID 1 +#define RTE_FSMC_BCR1_MTYP 2 +#define RTE_FSMC_BCR1_MUXEN 1 +#define RTE_FSMC_BCR1_MBKEN 1 +// + +// Chip-select timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with synchronous burst mode enabled, defines the number of memory clock +// cycles (+2) to issue to the memory before getting the first data: +// 0000: Data latency of 2 CLK clock cycles for first burst access +// 1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) +// periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care. +// In the case of CRAM, this field must be set to ‘0’. +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles: +// 0000: Reserved +// 0001: CLK period = 2 × HCLK periods +// 0010: CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Define the bus turnaround delay after a read access only +// from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive +// addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the +// minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the +// databus in Hi-Z state. +// These bits are written by software to add a delay at the end of a write/read transaction. This +// delay allows to match the minimum time between consecutive transactions (tEHEL from NEx +// high to NEx low) and the maximum time needed by the memory to free the data bus after a +// read access (tEHQZ): +// (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if +// EXTMOD = ‘0’ +// (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset) +// DATAST: Data phase duration <1-255> +// Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Define the duration of the address hold phase used in mode D and multiplexed accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration =1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is not used, the address hold phase is always 1 +// memory clock period duration. +// ADDSET: Address setup phase duration <0-15> +// Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don’t care. +#define RTE_FSMC_BTR1_ACCMOD 0 +#define RTE_FSMC_BTR1_DATLAT 15 +#define RTE_FSMC_BTR1_CLKDIV 15 +#define RTE_FSMC_BTR1_BUSTURN 15 +#define RTE_FSMC_BTR1_DATAST 255 +#define RTE_FSMC_BTR1_ADDHLD 15 +#define RTE_FSMC_BTR1_ADDSET 15 +// + +// Write timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles +// (+2) to issue to the memory before getting the first data. +// 0000: (0x0) Data latency of 2 CLK clock cycles for first burst access +// ... +// 1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In +// asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of +// CRAM, this field must be set to 0 +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles. +// 0000: Reserved +// 0001 CLK period = 2 × HCLK periods +// 0010 CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low). +// (BUSTRUN + 1) HCLK period = tEHELmin. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset) +// DATAST: Data phase duration <1-255> +// Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration = 1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration. +// ADDSET: Address setup phase duration <1-15> +// Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is don’t care. +#define RTE_FSMC_BWTR1_ACCMOD 0 +#define RTE_FSMC_BWTR1_DATLAT 15 +#define RTE_FSMC_BWTR1_CLKDIV 15 +#define RTE_FSMC_BWTR1_BUSTURN 15 +#define RTE_FSMC_BWTR1_DATAST 255 +#define RTE_FSMC_BWTR1_ADDHLD 15 +#define RTE_FSMC_BWTR1_ADDSET 15 +// +// + +// FSMC_NE2 Chip Select +// Configure Device on Chip Select FSMC_NE2 +#define RTE_FSMC_NE2 0 + +// Chip-select control +// CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write +// For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash +// memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal. +// ASYNCWAIT: Wait signal during asynchronous transfer +// Enables the FSMC to use the wait signal even during an asynchronous protocol. +// EXTMOD: Extended mode enable +// Enables the FSMC to program inside the write timing register, so it allows different timings for read and write. +// WAITEN: Wait enable +// For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal. +// WREN: Write enable +// Enable/disable write operations in the current bank by the FSMC +// WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state +// For memory access in burst mode, the NWAIT signal indicates whether the data from the memory +// are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted +// by the memory one clock cycle before the wait state or during the wait state +// WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high +// Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode. +// BURSTEN: Burst enable +// Enables the burst access mode for the memory. Valid only with synchronous burst memories. +// FACCEN: Flash access enable +// Enables NOR Flash memory access operations. +// MWID: Memory databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width, valid for all type of memories. +// MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash +// Defines the type of external memory attached to the corresponding memory bank. +// MUXEN: Address/data multiplexing enable +// When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories. +// MBKEN: Memory bank enable +// Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a +// disabled bank causes an ERROR on AHB bus. +#define RTE_FSMC_BCR2_CBURSTRW 0 +#define RTE_FSMC_BCR2_ASYNCWAIT 0 +#define RTE_FSMC_BCR2_EXTMOD 0 +#define RTE_FSMC_BCR2_WAITEN 1 +#define RTE_FSMC_BCR2_WREN 1 +#define RTE_FSMC_BCR2_WAITCFG 0 +#define RTE_FSMC_BCR2_WRAPMOD 0 +#define RTE_FSMC_BCR2_WAITPOL 0 +#define RTE_FSMC_BCR2_BURSTEN 0 +#define RTE_FSMC_BCR2_FACCEN 1 +#define RTE_FSMC_BCR2_MWID 1 +#define RTE_FSMC_BCR2_MTYP 0 +#define RTE_FSMC_BCR2_MUXEN 1 +#define RTE_FSMC_BCR2_MBKEN 0 +// + +// Chip-select timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with synchronous burst mode enabled, defines the number of memory clock +// cycles (+2) to issue to the memory before getting the first data: +// 0000: Data latency of 2 CLK clock cycles for first burst access +// 1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) +// periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care. +// In the case of CRAM, this field must be set to ‘0’. +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles: +// 0000: Reserved +// 0001: CLK period = 2 × HCLK periods +// 0010: CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Define the bus turnaround delay after a read access only +// from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive +// addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the +// minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the +// databus in Hi-Z state. +// These bits are written by software to add a delay at the end of a write/read transaction. This +// delay allows to match the minimum time between consecutive transactions (tEHEL from NEx +// high to NEx low) and the maximum time needed by the memory to free the data bus after a +// read access (tEHQZ): +// (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if +// EXTMOD = ‘0’ +// (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset) +// DATAST: Data phase duration <1-255> +// Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Define the duration of the address hold phase used in mode D and multiplexed accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration =1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is not used, the address hold phase is always 1 +// memory clock period duration. +// ADDSET: Address setup phase duration <0-15> +// Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don’t care. +#define RTE_FSMC_BTR2_ACCMOD 0 +#define RTE_FSMC_BTR2_DATLAT 15 +#define RTE_FSMC_BTR2_CLKDIV 15 +#define RTE_FSMC_BTR2_BUSTURN 15 +#define RTE_FSMC_BTR2_DATAST 255 +#define RTE_FSMC_BTR2_ADDHLD 15 +#define RTE_FSMC_BTR2_ADDSET 15 +// + +// Write timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles +// (+2) to issue to the memory before getting the first data. +// 0000: (0x0) Data latency of 2 CLK clock cycles for first burst access +// ... +// 1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In +// asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of +// CRAM, this field must be set to 0 +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles. +// 0000: Reserved +// 0001 CLK period = 2 × HCLK periods +// 0010 CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low). +// (BUSTRUN + 1) HCLK period = tEHELmin. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset) +// DATAST: Data phase duration <1-255> +// Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration = 1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration. +// ADDSET: Address setup phase duration <1-15> +// Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is don’t care. +#define RTE_FSMC_BWTR2_ACCMOD 0 +#define RTE_FSMC_BWTR2_DATLAT 15 +#define RTE_FSMC_BWTR2_CLKDIV 15 +#define RTE_FSMC_BWTR2_BUSTURN 15 +#define RTE_FSMC_BWTR2_DATAST 255 +#define RTE_FSMC_BWTR2_ADDHLD 15 +#define RTE_FSMC_BWTR2_ADDSET 15 +// +// + +// FSMC_NE3 Chip Select +// Configure Device on Chip Select FSMC_NE3 +#define RTE_FSMC_NE3 0 + +// Chip-select control +// CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write +// For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash +// memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal. +// ASYNCWAIT: Wait signal during asynchronous transfer +// Enables the FSMC to use the wait signal even during an asynchronous protocol. +// EXTMOD: Extended mode enable +// Enables the FSMC to program inside the write timing register, so it allows different timings for read and write. +// WAITEN: Wait enable +// For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal. +// WREN: Write enable +// Enable/disable write operations in the current bank by the FSMC +// WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state +// For memory access in burst mode, the NWAIT signal indicates whether the data from the memory +// are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted +// by the memory one clock cycle before the wait state or during the wait state +// WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high +// Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode. +// BURSTEN: Burst enable +// Enables the burst access mode for the memory. Valid only with synchronous burst memories. +// FACCEN: Flash access enable +// Enables NOR Flash memory access operations. +// MWID: Memory databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width, valid for all type of memories. +// MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash +// Defines the type of external memory attached to the corresponding memory bank. +// MUXEN: Address/data multiplexing enable +// When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories. +// MBKEN: Memory bank enable +// Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a +// disabled bank causes an ERROR on AHB bus. +#define RTE_FSMC_BCR3_CBURSTRW 0 +#define RTE_FSMC_BCR3_ASYNCWAIT 0 +#define RTE_FSMC_BCR3_EXTMOD 0 +#define RTE_FSMC_BCR3_WAITEN 1 +#define RTE_FSMC_BCR3_WREN 1 +#define RTE_FSMC_BCR3_WAITCFG 0 +#define RTE_FSMC_BCR3_WRAPMOD 0 +#define RTE_FSMC_BCR3_WAITPOL 0 +#define RTE_FSMC_BCR3_BURSTEN 0 +#define RTE_FSMC_BCR3_FACCEN 1 +#define RTE_FSMC_BCR3_MWID 1 +#define RTE_FSMC_BCR3_MTYP 0 +#define RTE_FSMC_BCR3_MUXEN 1 +#define RTE_FSMC_BCR3_MBKEN 0 +// + +// Chip-select timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with synchronous burst mode enabled, defines the number of memory clock +// cycles (+2) to issue to the memory before getting the first data: +// 0000: Data latency of 2 CLK clock cycles for first burst access +// 1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) +// periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care. +// In the case of CRAM, this field must be set to ‘0’. +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles: +// 0000: Reserved +// 0001: CLK period = 2 × HCLK periods +// 0010: CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Define the bus turnaround delay after a read access only +// from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive +// addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the +// minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the +// databus in Hi-Z state. +// These bits are written by software to add a delay at the end of a write/read transaction. This +// delay allows to match the minimum time between consecutive transactions (tEHEL from NEx +// high to NEx low) and the maximum time needed by the memory to free the data bus after a +// read access (tEHQZ): +// (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if +// EXTMOD = ‘0’ +// (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset) +// DATAST: Data phase duration <1-255> +// Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Define the duration of the address hold phase used in mode D and multiplexed accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration =1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is not used, the address hold phase is always 1 +// memory clock period duration. +// ADDSET: Address setup phase duration <0-15> +// Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don’t care. +#define RTE_FSMC_BTR3_ACCMOD 0 +#define RTE_FSMC_BTR3_DATLAT 15 +#define RTE_FSMC_BTR3_CLKDIV 15 +#define RTE_FSMC_BTR3_BUSTURN 15 +#define RTE_FSMC_BTR3_DATAST 255 +#define RTE_FSMC_BTR3_ADDHLD 15 +#define RTE_FSMC_BTR3_ADDSET 15 +// + +// Write timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles +// (+2) to issue to the memory before getting the first data. +// 0000: (0x0) Data latency of 2 CLK clock cycles for first burst access +// ... +// 1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In +// asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of +// CRAM, this field must be set to 0 +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles. +// 0000: Reserved +// 0001 CLK period = 2 × HCLK periods +// 0010 CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low). +// (BUSTRUN + 1) HCLK period = tEHELmin. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset) +// DATAST: Data phase duration <1-255> +// Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration = 1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration. +// ADDSET: Address setup phase duration <1-15> +// Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is don’t care. +#define RTE_FSMC_BWTR3_ACCMOD 0 +#define RTE_FSMC_BWTR3_DATLAT 15 +#define RTE_FSMC_BWTR3_CLKDIV 15 +#define RTE_FSMC_BWTR3_BUSTURN 15 +#define RTE_FSMC_BWTR3_DATAST 255 +#define RTE_FSMC_BWTR3_ADDHLD 15 +#define RTE_FSMC_BWTR3_ADDSET 15 +// +// + +// FSMC_NE4 Chip Select +// Configure Device on Chip Select FSMC_NE4 +#define RTE_FSMC_NE4 0 + +// Chip-select control +// CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write +// For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash +// memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal. +// ASYNCWAIT: Wait signal during asynchronous transfer +// Enables the FSMC to use the wait signal even during an asynchronous protocol. +// EXTMOD: Extended mode enable +// Enables the FSMC to program inside the write timing register, so it allows different timings for read and write. +// WAITEN: Wait enable +// For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal. +// WREN: Write enable +// Enable/disable write operations in the current bank by the FSMC +// WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state +// For memory access in burst mode, the NWAIT signal indicates whether the data from the memory +// are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted +// by the memory one clock cycle before the wait state or during the wait state +// WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high +// Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode. +// BURSTEN: Burst enable +// Enables the burst access mode for the memory. Valid only with synchronous burst memories. +// FACCEN: Flash access enable +// Enables NOR Flash memory access operations. +// MWID: Memory databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width, valid for all type of memories. +// MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash +// Defines the type of external memory attached to the corresponding memory bank. +// MUXEN: Address/data multiplexing enable +// When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories. +// MBKEN: Memory bank enable +// Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a +// disabled bank causes an ERROR on AHB bus. +#define RTE_FSMC_BCR4_CBURSTRW 0 +#define RTE_FSMC_BCR4_ASYNCWAIT 0 +#define RTE_FSMC_BCR4_EXTMOD 0 +#define RTE_FSMC_BCR4_WAITEN 1 +#define RTE_FSMC_BCR4_WREN 1 +#define RTE_FSMC_BCR4_WAITCFG 0 +#define RTE_FSMC_BCR4_WRAPMOD 0 +#define RTE_FSMC_BCR4_WAITPOL 0 +#define RTE_FSMC_BCR4_BURSTEN 0 +#define RTE_FSMC_BCR4_FACCEN 1 +#define RTE_FSMC_BCR4_MWID 1 +#define RTE_FSMC_BCR4_MTYP 0 +#define RTE_FSMC_BCR4_MUXEN 1 +#define RTE_FSMC_BCR4_MBKEN 0 +// + +// Chip-select timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with synchronous burst mode enabled, defines the number of memory clock +// cycles (+2) to issue to the memory before getting the first data: +// 0000: Data latency of 2 CLK clock cycles for first burst access +// 1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) +// periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care. +// In the case of CRAM, this field must be set to ‘0’. +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles: +// 0000: Reserved +// 0001: CLK period = 2 × HCLK periods +// 0010: CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Define the bus turnaround delay after a read access only +// from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive +// addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the +// minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the +// databus in Hi-Z state. +// These bits are written by software to add a delay at the end of a write/read transaction. This +// delay allows to match the minimum time between consecutive transactions (tEHEL from NEx +// high to NEx low) and the maximum time needed by the memory to free the data bus after a +// read access (tEHQZ): +// (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if +// EXTMOD = ‘0’ +// (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset) +// DATAST: Data phase duration <1-255> +// Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Define the duration of the address hold phase used in mode D and multiplexed accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration =1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is not used, the address hold phase is always 1 +// memory clock period duration. +// ADDSET: Address setup phase duration <0-15> +// Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don’t care. +#define RTE_FSMC_BTR4_ACCMOD 0 +#define RTE_FSMC_BTR4_DATLAT 15 +#define RTE_FSMC_BTR4_CLKDIV 15 +#define RTE_FSMC_BTR4_BUSTURN 15 +#define RTE_FSMC_BTR4_DATAST 255 +#define RTE_FSMC_BTR4_ADDHLD 15 +#define RTE_FSMC_BTR4_ADDSET 15 +// + +// Write timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles +// (+2) to issue to the memory before getting the first data. +// 0000: (0x0) Data latency of 2 CLK clock cycles for first burst access +// ... +// 1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In +// asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of +// CRAM, this field must be set to 0 +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles. +// 0000: Reserved +// 0001 CLK period = 2 × HCLK periods +// 0010 CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low). +// (BUSTRUN + 1) HCLK period = tEHELmin. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset) +// DATAST: Data phase duration <1-255> +// Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration = 1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration. +// ADDSET: Address setup phase duration <1-15> +// Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is don’t care. +#define RTE_FSMC_BWTR4_ACCMOD 0 +#define RTE_FSMC_BWTR4_DATLAT 15 +#define RTE_FSMC_BWTR4_CLKDIV 15 +#define RTE_FSMC_BWTR4_BUSTURN 15 +#define RTE_FSMC_BWTR4_DATAST 255 +#define RTE_FSMC_BWTR4_ADDHLD 15 +#define RTE_FSMC_BWTR4_ADDSET 15 +// +// + +// + +// NAND Flash Controller + +// FSMC_NCE2 Chip Select +// Configure NAND Device on Chip Select FSMC_NCE2 +#define RTE_FSMC_NCE2 0 + +// NAND Flash Control +// ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes +// Defines the page size for the extended ECC. +// TAR: ALE to RE delay <0-15> +// Sets time from ALE low to RE low in number of AHB clock cycles (HCLK). +// Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// TCLR: CLE to RE delay <0-15> +// Sets time from CLE low to RE low in number of AHB clock cycles (HCLK). +// Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// ECCEN: ECC computation logic enable +// PWID: Databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width. +// PTYP: Memory type <1=>NAND Flash +// Defines the type of device attached to the corresponding memory bank. +// PBKEN: NAND Flash memory bank enable +// Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus. +// PWAITEN: Wait feature enable +// Enables the Wait feature for the PC Card/NAND Flash memory bank. +#define RTE_FSMC_PCR2_ECCPS 0 +#define RTE_FSMC_PCR2_TAR 0 +#define RTE_FSMC_PCR2_TCLR 0 +#define RTE_FSMC_PCR2_ECCEN 0 +#define RTE_FSMC_PCR2_PWID 0 +#define RTE_FSMC_PCR2_PTYP 1 +#define RTE_FSMC_PCR2_PBKEN 0 +#define RTE_FSMC_PCR2_PWAITEN 0 + +// + +// Interrupt configuration +// IFEN: Falling edge detection enable +// ILEN: High-level detection enable +// IREN: Rising edge detection enable +#define RTE_FSMC_SR2_IFEN 0 +#define RTE_FSMC_SR2_ILEN 0 +#define RTE_FSMC_SR2_IREN 0 + +// + +// Common memory space timing +// MEMHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access to. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset) +// MEMSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up the address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 2 HCLK cycles (for NAND Flash) +// 1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset) +#define RTE_FSMC_PMEM2_MEMHIZ 255 +#define RTE_FSMC_PMEM2_MEMHOLD 255 +#define RTE_FSMC_PMEM2_MEMWAIT 255 +#define RTE_FSMC_PMEM2_MEMSET 255 + +// + +// Attribute memory space timing +// ATTHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT) +// ATTSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 1 HCLK cycle +// 1111 1111: 256 HCLK cycles (default value after reset) +#define RTE_FSMC_PATT2_ATTHIZ 255 +#define RTE_FSMC_PATT2_ATTHOLD 255 +#define RTE_FSMC_PATT2_ATTWAIT 255 +#define RTE_FSMC_PATT2_ATTSET 255 + +// + +// + +// FSMC_NCE3 Chip Select +// Configure NAND Device on Chip Select FSMC_NCE3 +#define RTE_FSMC_NCE3 0 + +// NAND Flash Control +// ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes +// Defines the page size for the extended ECC. +// TAR: ALE to RE delay <0-15> +// Sets time from ALE low to RE low in number of AHB clock cycles (HCLK). +// Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// TCLR: CLE to RE delay <0-15> +// Sets time from CLE low to RE low in number of AHB clock cycles (HCLK). +// Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// ECCEN: ECC computation logic enable +// PWID: Databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width. +// PTYP: Memory type <1=>NAND Flash +// Defines the type of device attached to the corresponding memory bank. +// PBKEN: NAND Flash memory bank enable +// Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus. +// PWAITEN: Wait feature enable +// Enables the Wait feature for the PC Card/NAND Flash memory bank. +#define RTE_FSMC_PCR3_ECCPS 0 +#define RTE_FSMC_PCR3_TAR 0 +#define RTE_FSMC_PCR3_TCLR 0 +#define RTE_FSMC_PCR3_ECCEN 0 +#define RTE_FSMC_PCR3_PWID 0 +#define RTE_FSMC_PCR3_PTYP 1 +#define RTE_FSMC_PCR3_PBKEN 0 +#define RTE_FSMC_PCR3_PWAITEN 0 + +// + +// Interrupt configuration +// IFEN: Falling edge detection enable +// ILEN: High-level detection enable +// IREN: Rising edge detection enable +#define RTE_FSMC_SR3_IFEN 0 +#define RTE_FSMC_SR3_ILEN 0 +#define RTE_FSMC_SR3_IREN 0 + +// + +// Common memory space timing +// MEMHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access to. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset) +// MEMSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up the address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 2 HCLK cycles (for NAND Flash) +// 1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset) +#define RTE_FSMC_PMEM3_MEMHIZ 255 +#define RTE_FSMC_PMEM3_MEMHOLD 255 +#define RTE_FSMC_PMEM3_MEMWAIT 255 +#define RTE_FSMC_PMEM3_MEMSET 255 + +// + +// Attribute memory space timing +// ATTHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT) +// ATTSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 1 HCLK cycle +// 1111 1111: 256 HCLK cycles (default value after reset) +#define RTE_FSMC_PATT3_ATTHIZ 255 +#define RTE_FSMC_PATT3_ATTHOLD 255 +#define RTE_FSMC_PATT3_ATTWAIT 255 +#define RTE_FSMC_PATT3_ATTSET 255 + +// + +// + +// + +// PC Card Controller + +// FSMC_NCE4_x Chip Select +// Configure PC Card/CompactFlash Device on Chip Select FSMC_NCE4_1/FSMC_NCE4_2 +#define RTE_FSMC_NCE4 0 + +// PC Card Control +// ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes +// Defines the page size for the extended ECC. +// TAR: ALE to RE delay <0-15> +// Sets time from ALE low to RE low in number of AHB clock cycles (HCLK). +// Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// TCLR: CLE to RE delay <0-15> +// Sets time from CLE low to RE low in number of AHB clock cycles (HCLK). +// Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// ECCEN: ECC computation logic enable +// PWID: Databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width. +// PTYP: Memory type <0=>PC Card, CompactFlash, CF+ or PCMCIOA +// Defines the type of device attached to the corresponding memory bank. +// PBKEN: PC Card memory bank enable +// Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus. +// PWAITEN: Wait feature enable +// Enables the Wait feature for the PC Card/NAND Flash memory bank. +#define RTE_FSMC_PCR4_ECCPS 0 +#define RTE_FSMC_PCR4_TAR 0 +#define RTE_FSMC_PCR4_TCLR 0 +#define RTE_FSMC_PCR4_ECCEN 0 +#define RTE_FSMC_PCR4_PWID 0 +#define RTE_FSMC_PCR4_PTYP 0 +#define RTE_FSMC_PCR4_PBKEN 0 +#define RTE_FSMC_PCR4_PWAITEN 0 + +// + +// Interrupt configuration +// IFEN: Falling edge detection enable +// ILEN: High-level detection enable +// IREN: Rising edge detection enable +#define RTE_FSMC_SR4_IFEN 0 +#define RTE_FSMC_SR4_ILEN 0 +#define RTE_FSMC_SR4_IREN 0 + +// + +// Common memory space timing +// MEMHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access to. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset) +// MEMSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up the address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 2 HCLK cycles (for NAND Flash) +// 1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset) +#define RTE_FSMC_PMEM4_MEMHIZ 255 +#define RTE_FSMC_PMEM4_MEMHOLD 255 +#define RTE_FSMC_PMEM4_MEMWAIT 255 +#define RTE_FSMC_PMEM4_MEMSET 255 + +// + +// Attribute memory space timing +// ATTHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT) +// ATTSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 1 HCLK cycle +// 1111 1111: 256 HCLK cycles (default value after reset) +#define RTE_FSMC_PATT4_ATTHIZ 255 +#define RTE_FSMC_PATT4_ATTHOLD 255 +#define RTE_FSMC_PATT4_ATTWAIT 255 +#define RTE_FSMC_PATT4_ATTSET 255 + +// + +// I/O space timing +// IOHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a PC Card write access. Only valid for write transaction. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// IOHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for PC Card read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// IOWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (SMNWE, +// SMNOE), for PC Card read or write access. The duration for command assertion is +// extended if the wait signal (NWAIT) is active (low) at the end of the +// programmed value of HCLK. +// 0000 0000: reserved, do not use this value +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT) +// 1111 1111: 256 HCLK cycles +// IOSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up the address before the command +// assertion (NWE, NOE), for PC Card read or write access. +// 0000 0000: 1 HCLK cycle +// 1111 1111: 256 HCLK cycles (default value after reset) +#define RTE_FSMC_PIO4_IOHIZ 255 +#define RTE_FSMC_PIO4_IOHOLD 255 +#define RTE_FSMC_PIO4_IOWAIT 255 +#define RTE_FSMC_PIO4_IOSET 255 + +// + +// + +// + +// + + +#endif /* __RTE_DEVICE_H */ diff --git a/IDE/MDK5-ARM/Projects/CryptTest/RTE/Device/STM32F207IG/startup_stm32f2xx.s b/IDE/MDK5-ARM/Projects/CryptTest/RTE/Device/STM32F207IG/startup_stm32f2xx.s new file mode 100644 index 000000000..c31ce1991 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptTest/RTE/Device/STM32F207IG/startup_stm32f2xx.s @@ -0,0 +1,419 @@ +;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** +;* File Name : startup_stm32f2xx.s +;* Author : MCD Application Team +;* Version : V1.0.0 +;* Date : 18-April-2011 +;* Description : STM32F2xx devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM3 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS +; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. +; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, +; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE +; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING +; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. +;******************************************************************************* + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00001000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00009000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_IRQHandler ; PVD through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0 + DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1 + DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2 + DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3 + DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4 + DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5 + DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6 + DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s + DCD CAN1_TX_IRQHandler ; CAN1 TX + DCD CAN1_RX0_IRQHandler ; CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9 + DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10 + DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11 + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10]s + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line + DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12 + DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13 + DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14 + DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare + DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7 + DCD FSMC_IRQHandler ; FSMC + DCD SDIO_IRQHandler ; SDIO + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD UART4_IRQHandler ; UART4 + DCD UART5_IRQHandler ; UART5 + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0 + DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1 + DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2 + DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3 + DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4 + DCD ETH_IRQHandler ; Ethernet + DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line + DCD CAN2_TX_IRQHandler ; CAN2 TX + DCD CAN2_RX0_IRQHandler ; CAN2 RX0 + DCD CAN2_RX1_IRQHandler ; CAN2 RX1 + DCD CAN2_SCE_IRQHandler ; CAN2 SCE + DCD OTG_FS_IRQHandler ; USB OTG FS + DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5 + DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6 + DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7 + DCD USART6_IRQHandler ; USART6 + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out + DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In + DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI + DCD OTG_HS_IRQHandler ; USB OTG HS + DCD DCMI_IRQHandler ; DCMI + DCD CRYP_IRQHandler ; CRYP crypto + DCD HASH_RNG_IRQHandler ; Hash and Rng +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Stream0_IRQHandler [WEAK] + EXPORT DMA1_Stream1_IRQHandler [WEAK] + EXPORT DMA1_Stream2_IRQHandler [WEAK] + EXPORT DMA1_Stream3_IRQHandler [WEAK] + EXPORT DMA1_Stream4_IRQHandler [WEAK] + EXPORT DMA1_Stream5_IRQHandler [WEAK] + EXPORT DMA1_Stream6_IRQHandler [WEAK] + EXPORT ADC_IRQHandler [WEAK] + EXPORT CAN1_TX_IRQHandler [WEAK] + EXPORT CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK] + EXPORT TIM1_UP_TIM10_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT OTG_FS_WKUP_IRQHandler [WEAK] + EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK] + EXPORT TIM8_UP_TIM13_IRQHandler [WEAK] + EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK] + EXPORT TIM8_CC_IRQHandler [WEAK] + EXPORT DMA1_Stream7_IRQHandler [WEAK] + EXPORT FSMC_IRQHandler [WEAK] + EXPORT SDIO_IRQHandler [WEAK] + EXPORT TIM5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Stream0_IRQHandler [WEAK] + EXPORT DMA2_Stream1_IRQHandler [WEAK] + EXPORT DMA2_Stream2_IRQHandler [WEAK] + EXPORT DMA2_Stream3_IRQHandler [WEAK] + EXPORT DMA2_Stream4_IRQHandler [WEAK] + EXPORT ETH_IRQHandler [WEAK] + EXPORT ETH_WKUP_IRQHandler [WEAK] + EXPORT CAN2_TX_IRQHandler [WEAK] + EXPORT CAN2_RX0_IRQHandler [WEAK] + EXPORT CAN2_RX1_IRQHandler [WEAK] + EXPORT CAN2_SCE_IRQHandler [WEAK] + EXPORT OTG_FS_IRQHandler [WEAK] + EXPORT DMA2_Stream5_IRQHandler [WEAK] + EXPORT DMA2_Stream6_IRQHandler [WEAK] + EXPORT DMA2_Stream7_IRQHandler [WEAK] + EXPORT USART6_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK] + EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK] + EXPORT OTG_HS_WKUP_IRQHandler [WEAK] + EXPORT OTG_HS_IRQHandler [WEAK] + EXPORT DCMI_IRQHandler [WEAK] + EXPORT CRYP_IRQHandler [WEAK] + EXPORT HASH_RNG_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Stream0_IRQHandler +DMA1_Stream1_IRQHandler +DMA1_Stream2_IRQHandler +DMA1_Stream3_IRQHandler +DMA1_Stream4_IRQHandler +DMA1_Stream5_IRQHandler +DMA1_Stream6_IRQHandler +ADC_IRQHandler +CAN1_TX_IRQHandler +CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_TIM9_IRQHandler +TIM1_UP_TIM10_IRQHandler +TIM1_TRG_COM_TIM11_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +OTG_FS_WKUP_IRQHandler +TIM8_BRK_TIM12_IRQHandler +TIM8_UP_TIM13_IRQHandler +TIM8_TRG_COM_TIM14_IRQHandler +TIM8_CC_IRQHandler +DMA1_Stream7_IRQHandler +FSMC_IRQHandler +SDIO_IRQHandler +TIM5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Stream0_IRQHandler +DMA2_Stream1_IRQHandler +DMA2_Stream2_IRQHandler +DMA2_Stream3_IRQHandler +DMA2_Stream4_IRQHandler +ETH_IRQHandler +ETH_WKUP_IRQHandler +CAN2_TX_IRQHandler +CAN2_RX0_IRQHandler +CAN2_RX1_IRQHandler +CAN2_SCE_IRQHandler +OTG_FS_IRQHandler +DMA2_Stream5_IRQHandler +DMA2_Stream6_IRQHandler +DMA2_Stream7_IRQHandler +USART6_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +OTG_HS_EP1_OUT_IRQHandler +OTG_HS_EP1_IN_IRQHandler +OTG_HS_WKUP_IRQHandler +OTG_HS_IRQHandler +DCMI_IRQHandler +CRYP_IRQHandler +HASH_RNG_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE***** diff --git a/IDE/MDK5-ARM/Projects/CryptTest/RTE/Device/STM32F207IG/system_stm32f2xx.c b/IDE/MDK5-ARM/Projects/CryptTest/RTE/Device/STM32F207IG/system_stm32f2xx.c new file mode 100644 index 000000000..da0e189c8 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptTest/RTE/Device/STM32F207IG/system_stm32f2xx.c @@ -0,0 +1,536 @@ +/** + ****************************************************************************** + * @file system_stm32f2xx.c + * @author MCD Application Team + * @version V1.0.0 + * @date 18-April-2011 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * This file contains the system clock configuration for STM32F2xx devices, + * and is generated by the clock configuration tool + * "STM32f2xx_Clock_Configuration_V1.0.0.xls" + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * and Divider factors, AHB/APBx prescalers and Flash settings), + * depending on the configuration made in the clock xls tool. + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f2xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (16 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f2xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 25MHz, refer to "HSE_VALUE" define + * in "stm32f2xx.h" file. When HSE is used as system clock source, directly or + * through PLL, and you are using different crystal you have to adapt the HSE + * value to your own configuration. + * + * 5. This file configures the system clock as follows: + *============================================================================= + *============================================================================= + * Supported STM32F2xx device revision | Rev B and Y + *----------------------------------------------------------------------------- + * System Clock source | PLL (HSE) + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 120000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 120000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 4 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 2 + *----------------------------------------------------------------------------- + * HSE Frequency(Hz) | 25000000 + *----------------------------------------------------------------------------- + * PLL_M | 25 + *----------------------------------------------------------------------------- + * PLL_N | 240 + *----------------------------------------------------------------------------- + * PLL_P | 2 + *----------------------------------------------------------------------------- + * PLL_Q | 5 + *----------------------------------------------------------------------------- + * PLLI2S_N | NA + *----------------------------------------------------------------------------- + * PLLI2S_R | NA + *----------------------------------------------------------------------------- + * I2S input clock | NA + *----------------------------------------------------------------------------- + * VDD(V) | 3.3 + *----------------------------------------------------------------------------- + * Flash Latency(WS) | 3 + *----------------------------------------------------------------------------- + * Prefetch Buffer | ON + *----------------------------------------------------------------------------- + * Instruction cache | ON + *----------------------------------------------------------------------------- + * Data cache | ON + *----------------------------------------------------------------------------- + * Require 48MHz for USB OTG FS, | Enabled + * SDIO and RNG clock | + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f2xx_system + * @{ + */ + +/** @addtogroup STM32F2xx_System_Private_Includes + * @{ + */ + +#include "stm32f2xx.h" + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_Defines + * @{ + */ + +/*!< Uncomment the following line if you need to use external SRAM mounted + on STM322xG_EVAL board as data memory */ +/* #define DATA_IN_ExtSRAM */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ + + +/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */ +#define PLL_M 25 +#define PLL_N 240 + +/* SYSCLK = PLL_VCO / PLL_P */ +#define PLL_P 2 + +/* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */ +#define PLL_Q 5 + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_Variables + * @{ + */ + + uint32_t SystemCoreClock = 120000000; + + __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemFrequency variable. + * @param None + * @retval None + */ +void SystemInit(void) +{ + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000; + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x24003010; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Disable all interrupts */ + RCC->CIR = 0x00000000; + +#ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); +#endif /* DATA_IN_ExtSRAM */ + + /* Configure the System clock source, PLL Multiplier and Divider factors, + AHB/APBx prescalers and Flash settings ----------------------------------*/ + SetSysClock(); + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f2xx.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f2xx.h file (default value + * 25 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock source */ + + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N + SYSCLK = PLL_VCO / PLL_P + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; + pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; + + if (pllsource != 0) + { + /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); + } + else + { + /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); + } + + pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; + SystemCoreClock = pllvco/pllp; + break; + default: + SystemCoreClock = HSI_VALUE; + break; + } + /* Compute HCLK frequency --------------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock source, PLL Multiplier and Divider factors, + * AHB/APBx prescalers and Flash settings + * @Note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ +static void SetSysClock(void) +{ +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* HCLK = SYSCLK / 1*/ + RCC->CFGR |= RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK / 2*/ + RCC->CFGR |= RCC_CFGR_PPRE2_DIV2; + + /* PCLK1 = HCLK / 4*/ + RCC->CFGR |= RCC_CFGR_PPRE1_DIV4; + + /* Configure the main PLL */ + RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) | + (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24); + + /* Enable the main PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till the main PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Configure Flash prefetch, Instruction cache, Data cache and wait state */ + FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_3WS; + + /* Select the main PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= RCC_CFGR_SW_PLL; + + /* Wait till the main PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL); + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } + +} + +/** + * @brief Setup the external memory controller. Called in startup_stm32f2xx.s + * before jump to __main + * @param None + * @retval None + */ +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f2xx.s before jump to main. + * This function configures the external SRAM mounted on STM322xG_EVAL board + * This SRAM will be used as program data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ +/*-- GPIOs Configuration -----------------------------------------------------*/ +/* + +-------------------+--------------------+------------------+------------------+ + + SRAM pins assignment + + +-------------------+--------------------+------------------+------------------+ + | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | + | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | + | PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | + | PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | + | PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | + | PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | + | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 | + | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+ + | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 | + | PD14 <-> FSMC_D0 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 | + | PD15 <-> FSMC_D1 | PE15 <-> FSMC_D12 |------------------+ + +-------------------+--------------------+ +*/ + /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */ + RCC->AHB1ENR = 0x00000078; + + /* Connect PDx pins to FSMC Alternate function */ + GPIOD->AFR[0] = 0x00cc00cc; + GPIOD->AFR[1] = 0xcc0ccccc; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xa2aa0a0a; + /* Configure PDx pins speed to 100 MHz */ + GPIOD->OSPEEDR = 0xf3ff0f0f; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FSMC Alternate function */ + GPIOE->AFR[0] = 0xc00000cc; + GPIOE->AFR[1] = 0xcccccccc; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xaaaa800a; + /* Configure PEx pins speed to 100 MHz */ + GPIOE->OSPEEDR = 0xffffc00f; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FSMC Alternate function */ + GPIOF->AFR[0] = 0x00cccccc; + GPIOF->AFR[1] = 0xcccc0000; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xaa000aaa; + /* Configure PFx pins speed to 100 MHz */ + GPIOF->OSPEEDR = 0xff000fff; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FSMC Alternate function */ + GPIOG->AFR[0] = 0x00cccccc; + GPIOG->AFR[1] = 0x000000c0; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0x00080aaa; + /* Configure PGx pins speed to 100 MHz */ + GPIOG->OSPEEDR = 0x000c0fff; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + +/*-- FSMC Configuration ------------------------------------------------------*/ + /* Enable the FSMC interface clock */ + RCC->AHB3ENR = 0x00000001; + + /* Configure and enable Bank1_SRAM2 */ + FSMC_Bank1->BTCR[2] = 0x00001015; + FSMC_Bank1->BTCR[3] = 0x00010400; + FSMC_Bank1E->BWTR[2] = 0x0fffffff; +/* + Bank1_SRAM2 is configured as follow: + + p.FSMC_AddressSetupTime = 0; + p.FSMC_AddressHoldTime = 0; + p.FSMC_DataSetupTime = 4; + p.FSMC_BusTurnAroundDuration = 1; + p.FSMC_CLKDivision = 0; + p.FSMC_DataLatency = 0; + p.FSMC_AccessMode = FSMC_AccessMode_A; + + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; +*/ + +} +#endif /* DATA_IN_ExtSRAM */ + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/IDE/MDK5-ARM/Projects/CryptTest/RTE/File_System/FS_Config.c b/IDE/MDK5-ARM/Projects/CryptTest/RTE/File_System/FS_Config.c new file mode 100644 index 000000000..78564b080 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptTest/RTE/File_System/FS_Config.c @@ -0,0 +1,72 @@ +/*------------------------------------------------------------------------------ + * MDK Middleware - Component ::File System + * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved. + *------------------------------------------------------------------------------ + * Name: FS_Config.c + * Purpose: File System Configuration + * Rev.: V5.00 + *----------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// File System +// Define File System global parameters + +// Number of open files <4-16> +// Define number of files that can be +// opened at the same time. +// Default: 8 +#define NUM_FILES 8 + +// FAT Name Cache Size <0-1000000> +// Define number of cached FAT file or directory names. +// 48 bytes of RAM is required for each cached name. +#define FAT_NAME_CACHE_SIZE 0 + +// Relocate FAT Name Cache Buffer +// Locate Cache Buffer at a specific address. +#define FAT_NAME_CACHE_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Define the Cache buffer base address. +#define FAT_NAME_CACHE_ADDR 0x60000000 + +// + +// + +#include "..\RTE_Components.h" + +#ifdef RTE_FileSystem_Drive_RAM +#include "FS_Config_RAM.h" +#endif + +#ifdef RTE_FileSystem_Drive_NOR_0 +#include "FS_Config_NOR_0.h" +#endif +#ifdef RTE_FileSystem_Drive_NOR_1 +#include "FS_Config_NOR_1.h" +#endif + +#ifdef RTE_FileSystem_Drive_NAND_0 +#include "FS_Config_NAND_0.h" +#endif +#ifdef RTE_FileSystem_Drive_NAND_1 +#include "FS_Config_NAND_1.h" +#endif + +#ifdef RTE_FileSystem_Drive_MC_0 +#include "FS_Config_MC_0.h" +#endif +#ifdef RTE_FileSystem_Drive_MC_1 +#include "FS_Config_MC_1.h" +#endif + +#ifdef RTE_FileSystem_Drive_USB_0 +#include "FS_Config_USB_0.h" +#endif +#ifdef RTE_FileSystem_Drive_USB_1 +#include "FS_Config_USB_1.h" +#endif + +#include "fs_config.h" diff --git a/IDE/MDK5-ARM/Projects/CryptTest/RTE/File_System/FS_Config_MC_0.h b/IDE/MDK5-ARM/Projects/CryptTest/RTE/File_System/FS_Config_MC_0.h new file mode 100644 index 000000000..0b1c6d3a7 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptTest/RTE/File_System/FS_Config_MC_0.h @@ -0,0 +1,57 @@ +/*------------------------------------------------------------------------------ + * MDK Middleware - Component ::File System:Drive + * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved. + *------------------------------------------------------------------------------ + * Name: FS_Config_MC_0.h + * Purpose: File System Configuration for Memory Card Drive + * Rev.: V5.01 + *----------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// Memory Card Drive 0 +// Configuration for SD/SDHC/MMC Memory Card assigned to drive letter "M0:" +#define MC0_ENABLE 1 + +// Connect to hardware via Driver_MCI# <0-255> +// Select driver control block for hardware interface +#define MC0_MCI_DRIVER 0 + +// Connect to hardware via Driver_SPI# <0-255> +// Select driver control block for hardware interface when in SPI mode +#define MC0_SPI_DRIVER 0 + +// Memory Card Interface Mode <0=>Native <1=>SPI +// Native uses a SD Bus with up to 8 data lines, CLK, and CMD +// SPI uses 2 data lines (MOSI and MISO), SCLK and CS +// When using SPI both Driver_SPI# and Driver_MCI# must be specified +// since the MCI driver provides the control interface lines. +#define MC0_SPI 0 + +// Drive Cache Size <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Drive Cache stores data sectors and may be increased to speed-up +// file read/write operations on this drive (default: 4 KB) +#define MC0_CACHE_SIZE 4 + +// Locate Drive Cache and Drive Buffer +// Some microcontrollers support DMA only in specific memory areas and +// require to locate the drive buffers at a fixed address. +#define MC0_CACHE_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Set buffer base address to RAM areas that support DMA with the drive. +#define MC0_CACHE_ADDR 0x7FD00000 + +// + +// Use FAT Journal +// Protect File Allocation Table and Directory Entries for +// fail-safe operation. +#define MC0_FAT_JOURNAL 0 + +// Default Drive "M0:" +// Use this drive when no drive letter is specified. +#define MC0_DEFAULT_DRIVE 1 + +// diff --git a/IDE/MDK5-ARM/Projects/CryptTest/RTE/RTE_Components.h b/IDE/MDK5-ARM/Projects/CryptTest/RTE/RTE_Components.h new file mode 100644 index 000000000..4d1a63720 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptTest/RTE/RTE_Components.h @@ -0,0 +1,19 @@ + +/* + * Auto generated Run-Time-Environment Component Configuration File + * *** Do not modify ! *** + * + * Project: 'CryptTest' + * Target: 'CryptTest' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + +#define RTE_DEVICE_STARTUP_STM32F2xx /* Device Startup for STM32F2 */ +#define RTE_Drivers_MCI0 /* Driver MCI0 */ +#define RTE_FileSystem_Core /* File System Core */ + #define RTE_FileSystem_LFN /* File System with Long Filename support */ +#define RTE_FileSystem_Drive_MC_0 /* File System Memory Card Drive 0 */ + +#endif /* RTE_COMPONENTS_H */ diff --git a/IDE/MDK5-ARM/Projects/CryptTest/STM32_SWO.ini b/IDE/MDK5-ARM/Projects/CryptTest/STM32_SWO.ini new file mode 100644 index 000000000..239abce37 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptTest/STM32_SWO.ini @@ -0,0 +1,36 @@ +/******************************************************************************/ +/* STM32_SWO.ini: STM32 Debugger Initialization File */ +/******************************************************************************/ +// <<< Use Configuration Wizard in Context Menu >>> // +/******************************************************************************/ +/* This file is part of the uVision/ARM development tools. */ +/* Copyright (c) 2004-2013 Keil Software. All rights reserved. */ +/* This software may only be used under the terms of a valid, current, */ +/* end user licence from KEIL for a compatible version of KEIL software */ +/* development tools. Nothing else gives you the right to use this software. */ +/******************************************************************************/ + + +FUNC void DebugSetup (void) { +// Debug MCU Configuration +// DBG_SLEEP Debug Sleep Mode +// DBG_STOP Debug Stop Mode +// DBG_STANDBY Debug Standby Mode +// TRACE_IOEN Trace I/O Enable +// TRACE_MODE Trace Mode +// <0=> Asynchronous +// <1=> Synchronous: TRACEDATA Size 1 +// <2=> Synchronous: TRACEDATA Size 2 +// <3=> Synchronous: TRACEDATA Size 4 +// DBG_IWDG_STOP Independant Watchdog Stopped when Core is halted +// DBG_WWDG_STOP Window Watchdog Stopped when Core is halted +// DBG_TIM1_STOP Timer 1 Stopped when Core is halted +// DBG_TIM2_STOP Timer 2 Stopped when Core is halted +// DBG_TIM3_STOP Timer 3 Stopped when Core is halted +// DBG_TIM4_STOP Timer 4 Stopped when Core is halted +// DBG_CAN_STOP CAN Stopped when Core is halted +// + _WDWORD(0xE0042004, 0x00000027); // DBGMCU_CR +} + +DebugSetup(); // Debugger Setup diff --git a/IDE/MDK5-ARM/Projects/CryptTest/main.c b/IDE/MDK5-ARM/Projects/CryptTest/main.c new file mode 100644 index 000000000..c9054ae89 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptTest/main.c @@ -0,0 +1,73 @@ +/* main.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +#include +#include + +#include "cmsis_os.h" +#include "rl_fs.h" + +#include + +/*----------------------------------------------------------------------------- + * Initialize a Flash Memory Card + *----------------------------------------------------------------------------*/ +static void init_filesystem (void) { + int32_t retv; + + retv = finit ("M0:"); + if (retv == 0) { + retv = fmount ("M0:"); + if (retv == 0) { + printf ("Drive M0 ready!\n"); + } + else { + printf ("Drive M0 mount failed!\n"); + } + } + else { + printf ("Drive M0 initialization failed!\n"); + } +} +extern void ctaocrypt_test(void * arg) ; +extern void init_time(void) ; + +/*----------------------------------------------------------------------------- + * mian entry + *----------------------------------------------------------------------------*/ +//int myoptind = 0; +//char* myoptarg = NULL; + +int main() +{ + void * arg = NULL ; + + init_time() ; + init_filesystem (); + printf("=== Start: Crypt test ===\n") ; + ctaocrypt_test(arg) ; + printf("=== End: Crypt test ===\n") ; + +} diff --git a/IDE/MDK5-ARM/Projects/CryptTest/test.c b/IDE/MDK5-ARM/Projects/CryptTest/test.c new file mode 100644 index 000000000..6165cee31 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CryptTest/test.c @@ -0,0 +1,3391 @@ +/* test.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +#include + +#ifndef NO_CRYPT_TEST + +#ifdef CYASSL_TEST_CERT + #include +#else + #include +#endif +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef HAVE_ECC + #include +#endif +#ifdef HAVE_BLAKE2 + #include +#endif +#ifdef HAVE_LIBZ + #include +#endif + +#ifdef _MSC_VER + /* 4996 warning to use MS extensions e.g., strcpy_s instead of strncpy */ + #pragma warning(disable: 4996) +#endif + +#ifdef OPENSSL_EXTRA + #include + #include + #include + #include +#endif + +#if defined(CYASSL_MDK_ARM) + #include + #include + extern FILE * CyaSSL_fopen(const char *fname, const char *mode) ; + #define fopen CyaSSL_fopen +#endif + +#if defined(USE_CERT_BUFFERS_1024) || defined(USE_CERT_BUFFERS_2048) + /* include test cert and key buffers for use with NO_FILESYSTEM */ + #if defined(CYASSL_MDK_ARM) && !defined(SINGLE_THREADED) + #include "cert_data.h" + /* use certs_test.c for initial data, so other + commands can share the data. */ + #else + #include + #endif +#endif + +#ifdef HAVE_NTRU + #include "crypto_ntru.h" +#endif +#ifdef HAVE_CAVIUM + #include "cavium_sysdep.h" + #include "cavium_common.h" + #include "cavium_ioctl.h" +#endif + +#ifdef FREESCALE_MQX + #include + #include +#else + #include +#endif + + +#ifdef THREADX + /* since just testing, use THREADX log printf instead */ + int dc_log_printf(char*, ...); + #undef printf + #define printf dc_log_printf +#endif + +#include "ctaocrypt/test/test.h" + + +typedef struct testVector { + const char* input; + const char* output; + size_t inLen; + size_t outLen; +} testVector; + +int md2_test(void); +int md5_test(void); +int md4_test(void); +int sha_test(void); +int sha256_test(void); +int sha512_test(void); +int sha384_test(void); +int hmac_md5_test(void); +int hmac_sha_test(void); +int hmac_sha256_test(void); +int hmac_sha384_test(void); +int hmac_sha512_test(void); +int arc4_test(void); +int hc128_test(void); +int rabbit_test(void); +int des_test(void); +int des3_test(void); +int aes_test(void); +int aesgcm_test(void); +int aesccm_test(void); +int camellia_test(void); +int rsa_test(void); +int dh_test(void); +int dsa_test(void); +int random_test(void); +int pwdbased_test(void); +int ripemd_test(void); +int openssl_test(void); /* test mini api */ +int pbkdf1_test(void); +int pkcs12_test(void); +int pbkdf2_test(void); +#ifdef HAVE_ECC + int ecc_test(void); +#endif +#ifdef HAVE_BLAKE2 + int blake2b_test(void); +#endif +#ifdef HAVE_LIBZ + int compress_test(void); +#endif + + + +static void err_sys(const char* msg, int es) +{ + printf("%s error = %d\n", msg, es); + #if !defined(THREADX) && !defined(CYASSL_MDK_ARM) + if (msg) + exit(es); + #endif + return; +} + +/* func_args from test.h, so don't have to pull in other junk */ +typedef struct func_args { + int argc; + char** argv; + int return_code; +} func_args; + + + +void ctaocrypt_test(void* args) +{ + int ret = 0; + + ((func_args*)args)->return_code = -1; /* error state */ + +#if !defined(NO_BIG_INT) + if (CheckCtcSettings() != 1) + err_sys("Build vs runtime math mismatch\n", -1234); + +#ifdef USE_FAST_MATH + if (CheckFastMathSettings() != 1) + err_sys("Build vs runtime fastmath FP_MAX_BITS mismatch\n", -1235); +#endif /* USE_FAST_MATH */ +#endif /* !NO_BIG_INT */ + + +#ifndef NO_MD5 + if ( (ret = md5_test()) != 0) + err_sys("MD5 test failed!\n", ret); + else + printf( "MD5 test passed!\n"); +#endif + +#ifdef CYASSL_MD2 + if ( (ret = md2_test()) != 0) + err_sys("MD2 test failed!\n", ret); + else + printf( "MD2 test passed!\n"); +#endif + +#ifndef NO_MD4 + if ( (ret = md4_test()) != 0) + err_sys("MD4 test failed!\n", ret); + else + printf( "MD4 test passed!\n"); +#endif + +#ifndef NO_SHA + if ( (ret = sha_test()) != 0) + err_sys("SHA test failed!\n", ret); + else + printf( "SHA test passed!\n"); +#endif + +#ifndef NO_SHA256 + if ( (ret = sha256_test()) != 0) + err_sys("SHA-256 test failed!\n", ret); + else + printf( "SHA-256 test passed!\n"); +#endif + +#ifdef CYASSL_SHA384 + if ( (ret = sha384_test()) != 0) + err_sys("SHA-384 test failed!\n", ret); + else + printf( "SHA-384 test passed!\n"); +#endif + +#ifdef CYASSL_SHA512 + if ( (ret = sha512_test()) != 0) + err_sys("SHA-512 test failed!\n", ret); + else + printf( "SHA-512 test passed!\n"); +#endif + +#ifdef CYASSL_RIPEMD + if ( (ret = ripemd_test()) != 0) + err_sys("RIPEMD test failed!\n", ret); + else + printf( "RIPEMD test passed!\n"); +#endif + +#ifdef HAVE_BLAKE2 + if ( (ret = blake2b_test()) != 0) + err_sys("BLAKE2b test failed!\n", ret); + else + printf( "BLAKE2b test passed!\n"); +#endif + +#ifndef NO_HMAC + #ifndef NO_MD5 + if ( (ret = hmac_md5_test()) != 0) + err_sys("HMAC-MD5 test failed!\n", ret); + else + printf( "HMAC-MD5 test passed!\n"); + #endif + + #ifndef NO_SHA + if ( (ret = hmac_sha_test()) != 0) + err_sys("HMAC-SHA test failed!\n", ret); + else + printf( "HMAC-SHA test passed!\n"); + #endif + + #ifndef NO_SHA256 + if ( (ret = hmac_sha256_test()) != 0) + err_sys("HMAC-SHA256 test failed!\n", ret); + else + printf( "HMAC-SHA256 test passed!\n"); + #endif + + #ifdef CYASSL_SHA384 + if ( (ret = hmac_sha384_test()) != 0) + err_sys("HMAC-SHA384 test failed!\n", ret); + else + printf( "HMAC-SHA384 test passed!\n"); + #endif + + #ifdef CYASSL_SHA512 + if ( (ret = hmac_sha512_test()) != 0) + err_sys("HMAC-SHA512 test failed!\n", ret); + else + printf( "HMAC-SHA512 test passed!\n"); + #endif + +#endif + +#ifndef NO_RC4 + if ( (ret = arc4_test()) != 0) + err_sys("ARC4 test failed!\n", ret); + else + printf( "ARC4 test passed!\n"); +#endif + +#ifndef HAVE_HC128 + if ( (ret = hc128_test()) != 0) + err_sys("HC-128 test failed!\n", ret); + else + printf( "HC-128 test passed!\n"); +#endif + +#ifndef NO_RABBIT + if ( (ret = rabbit_test()) != 0) + err_sys("Rabbit test failed!\n", ret); + else + printf( "Rabbit test passed!\n"); +#endif + +#ifndef NO_DES3 + if ( (ret = des_test()) != 0) + err_sys("DES test failed!\n", ret); + else + printf( "DES test passed!\n"); +#endif + +#ifndef NO_DES3 + if ( (ret = des3_test()) != 0) + err_sys("DES3 test failed!\n", ret); + else + printf( "DES3 test passed!\n"); +#endif + +#ifndef NO_AES + if ( (ret = aes_test()) != 0) + err_sys("AES test failed!\n", ret); + else + printf( "AES test passed!\n"); + +#ifdef HAVE_AESGCM + if ( (ret = aesgcm_test()) != 0) + err_sys("AES-GCM test failed!\n", ret); + else + printf( "AES-GCM test passed!\n"); +#endif + +#ifdef HAVE_AESCCM + if ( (ret = aesccm_test()) != 0) + err_sys("AES-CCM test failed!\n", ret); + else + printf( "AES-CCM test passed!\n"); +#endif +#endif + +#ifdef HAVE_CAMELLIA + if ( (ret = camellia_test()) != 0) + err_sys("CAMELLIA test failed!\n", ret); + else + printf( "CAMELLIA test passed!\n"); +#endif + + if ( (ret = random_test()) != 0) + err_sys("RANDOM test failed!\n", ret); + else + printf( "RANDOM test passed!\n"); + +#ifndef NO_RSA + if ( (ret = rsa_test()) != 0) + err_sys("RSA test failed!\n", ret); + else + printf( "RSA test passed!\n"); +#endif + +#ifndef NO_DH + if ( (ret = dh_test()) != 0) + err_sys("DH test failed!\n", ret); + else + printf( "DH test passed!\n"); +#endif + +#ifndef NO_DSA + if ( (ret = dsa_test()) != 0) + err_sys("DSA test failed!\n", ret); + else + printf( "DSA test passed!\n"); +#endif + +#ifndef NO_PWDBASED + if ( (ret = pwdbased_test()) != 0) + err_sys("PWDBASED test failed!\n", ret); + else + printf( "PWDBASED test passed!\n"); +#endif + +#ifdef OPENSSL_EXTRA + if ( (ret = openssl_test()) != 0) + err_sys("OPENSSL test failed!\n", ret); + else + printf( "OPENSSL test passed!\n"); +#endif + +#ifdef HAVE_ECC + if ( (ret = ecc_test()) != 0) + err_sys("ECC test failed!\n", ret); + else + printf( "ECC test passed!\n"); +#endif + +#ifdef HAVE_LIBZ + if ( (ret = compress_test()) != 0) + err_sys("COMPRESS test failed!\n", ret); + else + printf( "COMPRESS test passed!\n"); +#endif + + ((func_args*)args)->return_code = ret; +} + + +#ifndef NO_MAIN_DRIVER + +#ifdef HAVE_CAVIUM + +static int OpenNitroxDevice(int dma_mode,int dev_id) +{ + Csp1CoreAssignment core_assign; + Uint32 device; + + if (CspInitialize(CAVIUM_DIRECT,CAVIUM_DEV_ID)) + return -1; + if (Csp1GetDevType(&device)) + return -1; + if (device != NPX_DEVICE) { + if (ioctl(gpkpdev_hdlr[CAVIUM_DEV_ID], IOCTL_CSP1_GET_CORE_ASSIGNMENT, + (Uint32 *)&core_assign)!= 0) + return -1; + } + CspShutdown(CAVIUM_DEV_ID); + + return CspInitialize(dma_mode, dev_id); +} + +#endif /* HAVE_CAVIUM */ + + /* so overall tests can pull in test function */ + + int main(int argc, char** argv) + { + + func_args args; + + +#ifdef HAVE_CAVIUM + int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID); + if (ret != 0) + err_sys("Cavium OpenNitroxDevice failed", -1236); +#endif /* HAVE_CAVIUM */ + + args.argc = argc; + args.argv = argv; + + ctaocrypt_test(&args); + +#ifdef HAVE_CAVIUM + CspShutdown(CAVIUM_DEV_ID); +#endif + + return args.return_code; + } + +#endif /* NO_MAIN_DRIVER */ + + +#ifdef CYASSL_MD2 +int md2_test() +{ + Md2 md2; + byte hash[MD2_DIGEST_SIZE]; + + testVector a, b, c, d, e, f, g; + testVector test_md2[7]; + int times = sizeof(test_md2) / sizeof(testVector), i; + + a.input = ""; + a.output = "\x83\x50\xe5\xa3\xe2\x4c\x15\x3d\xf2\x27\x5c\x9f\x80\x69" + "\x27\x73"; + a.inLen = strlen(a.input); + a.outLen = MD2_DIGEST_SIZE; + + b.input = "a"; + b.output = "\x32\xec\x01\xec\x4a\x6d\xac\x72\xc0\xab\x96\xfb\x34\xc0" + "\xb5\xd1"; + b.inLen = strlen(b.input); + b.outLen = MD2_DIGEST_SIZE; + + c.input = "abc"; + c.output = "\xda\x85\x3b\x0d\x3f\x88\xd9\x9b\x30\x28\x3a\x69\xe6\xde" + "\xd6\xbb"; + c.inLen = strlen(c.input); + c.outLen = MD2_DIGEST_SIZE; + + d.input = "message digest"; + d.output = "\xab\x4f\x49\x6b\xfb\x2a\x53\x0b\x21\x9f\xf3\x30\x31\xfe" + "\x06\xb0"; + d.inLen = strlen(d.input); + d.outLen = MD2_DIGEST_SIZE; + + e.input = "abcdefghijklmnopqrstuvwxyz"; + e.output = "\x4e\x8d\xdf\xf3\x65\x02\x92\xab\x5a\x41\x08\xc3\xaa\x47" + "\x94\x0b"; + e.inLen = strlen(e.input); + e.outLen = MD2_DIGEST_SIZE; + + f.input = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz012345" + "6789"; + f.output = "\xda\x33\xde\xf2\xa4\x2d\xf1\x39\x75\x35\x28\x46\xc3\x03" + "\x38\xcd"; + f.inLen = strlen(f.input); + f.outLen = MD2_DIGEST_SIZE; + + g.input = "1234567890123456789012345678901234567890123456789012345678" + "9012345678901234567890"; + g.output = "\xd5\x97\x6f\x79\xd8\x3d\x3a\x0d\xc9\x80\x6c\x3c\x66\xf3" + "\xef\xd8"; + g.inLen = strlen(g.input); + g.outLen = MD2_DIGEST_SIZE; + + test_md2[0] = a; + test_md2[1] = b; + test_md2[2] = c; + test_md2[3] = d; + test_md2[4] = e; + test_md2[5] = f; + test_md2[6] = g; + + InitMd2(&md2); + + for (i = 0; i < times; ++i) { + Md2Update(&md2, (byte*)test_md2[i].input, (word32)test_md2[i].inLen); + Md2Final(&md2, hash); + + if (memcmp(hash, test_md2[i].output, MD2_DIGEST_SIZE) != 0) + return -155 - i; + } + + return 0; +} +#endif + +#ifndef NO_MD5 +int md5_test(void) +{ + Md5 md5; + byte hash[MD5_DIGEST_SIZE]; + + testVector a, b, c, d, e; + testVector test_md5[5]; + int times = sizeof(test_md5) / sizeof(testVector), i; + + a.input = "abc"; + a.output = "\x90\x01\x50\x98\x3c\xd2\x4f\xb0\xd6\x96\x3f\x7d\x28\xe1\x7f" + "\x72"; + a.inLen = strlen(a.input); + a.outLen = MD5_DIGEST_SIZE; + + b.input = "message digest"; + b.output = "\xf9\x6b\x69\x7d\x7c\xb7\x93\x8d\x52\x5a\x2f\x31\xaa\xf1\x61" + "\xd0"; + b.inLen = strlen(b.input); + b.outLen = MD5_DIGEST_SIZE; + + c.input = "abcdefghijklmnopqrstuvwxyz"; + c.output = "\xc3\xfc\xd3\xd7\x61\x92\xe4\x00\x7d\xfb\x49\x6c\xca\x67\xe1" + "\x3b"; + c.inLen = strlen(c.input); + c.outLen = MD5_DIGEST_SIZE; + + d.input = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz012345" + "6789"; + d.output = "\xd1\x74\xab\x98\xd2\x77\xd9\xf5\xa5\x61\x1c\x2c\x9f\x41\x9d" + "\x9f"; + d.inLen = strlen(d.input); + d.outLen = MD5_DIGEST_SIZE; + + e.input = "1234567890123456789012345678901234567890123456789012345678" + "9012345678901234567890"; + e.output = "\x57\xed\xf4\xa2\x2b\xe3\xc9\x55\xac\x49\xda\x2e\x21\x07\xb6" + "\x7a"; + e.inLen = strlen(e.input); + e.outLen = MD5_DIGEST_SIZE; + + test_md5[0] = a; + test_md5[1] = b; + test_md5[2] = c; + test_md5[3] = d; + test_md5[4] = e; + + InitMd5(&md5); + + for (i = 0; i < times; ++i) { + Md5Update(&md5, (byte*)test_md5[i].input, (word32)test_md5[i].inLen); + Md5Final(&md5, hash); + + if (memcmp(hash, test_md5[i].output, MD5_DIGEST_SIZE) != 0) + return -5 - i; + } + + return 0; +} +#endif /* NO_MD5 */ + + +#ifndef NO_MD4 + +int md4_test(void) +{ + Md4 md4; + byte hash[MD4_DIGEST_SIZE]; + + testVector a, b, c, d, e, f, g; + testVector test_md4[7]; + int times = sizeof(test_md4) / sizeof(testVector), i; + + a.input = ""; + a.output = "\x31\xd6\xcf\xe0\xd1\x6a\xe9\x31\xb7\x3c\x59\xd7\xe0\xc0\x89" + "\xc0"; + a.inLen = strlen(a.input); + a.outLen = MD4_DIGEST_SIZE; + + b.input = "a"; + b.output = "\xbd\xe5\x2c\xb3\x1d\xe3\x3e\x46\x24\x5e\x05\xfb\xdb\xd6\xfb" + "\x24"; + b.inLen = strlen(b.input); + b.outLen = MD4_DIGEST_SIZE; + + c.input = "abc"; + c.output = "\xa4\x48\x01\x7a\xaf\x21\xd8\x52\x5f\xc1\x0a\xe8\x7a\xa6\x72" + "\x9d"; + c.inLen = strlen(c.input); + c.outLen = MD4_DIGEST_SIZE; + + d.input = "message digest"; + d.output = "\xd9\x13\x0a\x81\x64\x54\x9f\xe8\x18\x87\x48\x06\xe1\xc7\x01" + "\x4b"; + d.inLen = strlen(d.input); + d.outLen = MD4_DIGEST_SIZE; + + e.input = "abcdefghijklmnopqrstuvwxyz"; + e.output = "\xd7\x9e\x1c\x30\x8a\xa5\xbb\xcd\xee\xa8\xed\x63\xdf\x41\x2d" + "\xa9"; + e.inLen = strlen(e.input); + e.outLen = MD4_DIGEST_SIZE; + + f.input = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz012345" + "6789"; + f.output = "\x04\x3f\x85\x82\xf2\x41\xdb\x35\x1c\xe6\x27\xe1\x53\xe7\xf0" + "\xe4"; + f.inLen = strlen(f.input); + f.outLen = MD4_DIGEST_SIZE; + + g.input = "1234567890123456789012345678901234567890123456789012345678" + "9012345678901234567890"; + g.output = "\xe3\x3b\x4d\xdc\x9c\x38\xf2\x19\x9c\x3e\x7b\x16\x4f\xcc\x05" + "\x36"; + g.inLen = strlen(g.input); + g.outLen = MD4_DIGEST_SIZE; + + test_md4[0] = a; + test_md4[1] = b; + test_md4[2] = c; + test_md4[3] = d; + test_md4[4] = e; + test_md4[5] = f; + test_md4[6] = g; + + InitMd4(&md4); + + for (i = 0; i < times; ++i) { + Md4Update(&md4, (byte*)test_md4[i].input, (word32)test_md4[i].inLen); + Md4Final(&md4, hash); + + if (memcmp(hash, test_md4[i].output, MD4_DIGEST_SIZE) != 0) + return -205 - i; + } + + return 0; +} + +#endif /* NO_MD4 */ + +#ifndef NO_SHA + +int sha_test(void) +{ + Sha sha; + byte hash[SHA_DIGEST_SIZE]; + + testVector a, b, c, d; + testVector test_sha[4]; + int times = sizeof(test_sha) / sizeof(struct testVector), i; + + a.input = "abc"; + a.output = "\xA9\x99\x3E\x36\x47\x06\x81\x6A\xBA\x3E\x25\x71\x78\x50\xC2" + "\x6C\x9C\xD0\xD8\x9D"; + a.inLen = strlen(a.input); + a.outLen = SHA_DIGEST_SIZE; + + b.input = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"; + b.output = "\x84\x98\x3E\x44\x1C\x3B\xD2\x6E\xBA\xAE\x4A\xA1\xF9\x51\x29" + "\xE5\xE5\x46\x70\xF1"; + b.inLen = strlen(b.input); + b.outLen = SHA_DIGEST_SIZE; + + c.input = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" + "aaaaaa"; + c.output = "\x00\x98\xBA\x82\x4B\x5C\x16\x42\x7B\xD7\xA1\x12\x2A\x5A\x44" + "\x2A\x25\xEC\x64\x4D"; + c.inLen = strlen(c.input); + c.outLen = SHA_DIGEST_SIZE; + + d.input = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" + "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" + "aaaaaaaaaa"; + d.output = "\xAD\x5B\x3F\xDB\xCB\x52\x67\x78\xC2\x83\x9D\x2F\x15\x1E\xA7" + "\x53\x99\x5E\x26\xA0"; + d.inLen = strlen(d.input); + d.outLen = SHA_DIGEST_SIZE; + + test_sha[0] = a; + test_sha[1] = b; + test_sha[2] = c; + test_sha[3] = d; + + InitSha(&sha); + + for (i = 0; i < times; ++i) { + ShaUpdate(&sha, (byte*)test_sha[i].input, (word32)test_sha[i].inLen); + ShaFinal(&sha, hash); + + if (memcmp(hash, test_sha[i].output, SHA_DIGEST_SIZE) != 0) + return -10 - i; + } + + return 0; +} + +#endif /* NO_SHA */ + +#ifdef CYASSL_RIPEMD +int ripemd_test(void) +{ + RipeMd ripemd; + byte hash[RIPEMD_DIGEST_SIZE]; + + testVector a, b, c, d; + testVector test_ripemd[4]; + int times = sizeof(test_ripemd) / sizeof(struct testVector), i; + + a.input = "abc"; + a.output = "\x8e\xb2\x08\xf7\xe0\x5d\x98\x7a\x9b\x04\x4a\x8e\x98\xc6" + "\xb0\x87\xf1\x5a\x0b\xfc"; + a.inLen = strlen(a.input); + a.outLen = RIPEMD_DIGEST_SIZE; + + b.input = "message digest"; + b.output = "\x5d\x06\x89\xef\x49\xd2\xfa\xe5\x72\xb8\x81\xb1\x23\xa8" + "\x5f\xfa\x21\x59\x5f\x36"; + b.inLen = strlen(b.input); + b.outLen = RIPEMD_DIGEST_SIZE; + + c.input = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"; + c.output = "\x12\xa0\x53\x38\x4a\x9c\x0c\x88\xe4\x05\xa0\x6c\x27\xdc" + "\xf4\x9a\xda\x62\xeb\x2b"; + c.inLen = strlen(c.input); + c.outLen = RIPEMD_DIGEST_SIZE; + + d.input = "12345678901234567890123456789012345678901234567890123456" + "789012345678901234567890"; + d.output = "\x9b\x75\x2e\x45\x57\x3d\x4b\x39\xf4\xdb\xd3\x32\x3c\xab" + "\x82\xbf\x63\x32\x6b\xfb"; + d.inLen = strlen(d.input); + d.outLen = RIPEMD_DIGEST_SIZE; + + test_ripemd[0] = a; + test_ripemd[1] = b; + test_ripemd[2] = c; + test_ripemd[3] = d; + + InitRipeMd(&ripemd); + + for (i = 0; i < times; ++i) { + RipeMdUpdate(&ripemd, (byte*)test_ripemd[i].input, + (word32)test_ripemd[i].inLen); + RipeMdFinal(&ripemd, hash); + + if (memcmp(hash, test_ripemd[i].output, RIPEMD_DIGEST_SIZE) != 0) + return -10 - i; + } + + return 0; +} +#endif /* CYASSL_RIPEMD */ + + +#ifdef HAVE_BLAKE2 + + +#define BLAKE2_TESTS 3 + +static const byte blake2b_vec[BLAKE2_TESTS][BLAKE2B_OUTBYTES] = +{ + { + 0x78, 0x6A, 0x02, 0xF7, 0x42, 0x01, 0x59, 0x03, + 0xC6, 0xC6, 0xFD, 0x85, 0x25, 0x52, 0xD2, 0x72, + 0x91, 0x2F, 0x47, 0x40, 0xE1, 0x58, 0x47, 0x61, + 0x8A, 0x86, 0xE2, 0x17, 0xF7, 0x1F, 0x54, 0x19, + 0xD2, 0x5E, 0x10, 0x31, 0xAF, 0xEE, 0x58, 0x53, + 0x13, 0x89, 0x64, 0x44, 0x93, 0x4E, 0xB0, 0x4B, + 0x90, 0x3A, 0x68, 0x5B, 0x14, 0x48, 0xB7, 0x55, + 0xD5, 0x6F, 0x70, 0x1A, 0xFE, 0x9B, 0xE2, 0xCE + }, + { + 0x2F, 0xA3, 0xF6, 0x86, 0xDF, 0x87, 0x69, 0x95, + 0x16, 0x7E, 0x7C, 0x2E, 0x5D, 0x74, 0xC4, 0xC7, + 0xB6, 0xE4, 0x8F, 0x80, 0x68, 0xFE, 0x0E, 0x44, + 0x20, 0x83, 0x44, 0xD4, 0x80, 0xF7, 0x90, 0x4C, + 0x36, 0x96, 0x3E, 0x44, 0x11, 0x5F, 0xE3, 0xEB, + 0x2A, 0x3A, 0xC8, 0x69, 0x4C, 0x28, 0xBC, 0xB4, + 0xF5, 0xA0, 0xF3, 0x27, 0x6F, 0x2E, 0x79, 0x48, + 0x7D, 0x82, 0x19, 0x05, 0x7A, 0x50, 0x6E, 0x4B + }, + { + 0x1C, 0x08, 0x79, 0x8D, 0xC6, 0x41, 0xAB, 0xA9, + 0xDE, 0xE4, 0x35, 0xE2, 0x25, 0x19, 0xA4, 0x72, + 0x9A, 0x09, 0xB2, 0xBF, 0xE0, 0xFF, 0x00, 0xEF, + 0x2D, 0xCD, 0x8E, 0xD6, 0xF8, 0xA0, 0x7D, 0x15, + 0xEA, 0xF4, 0xAE, 0xE5, 0x2B, 0xBF, 0x18, 0xAB, + 0x56, 0x08, 0xA6, 0x19, 0x0F, 0x70, 0xB9, 0x04, + 0x86, 0xC8, 0xA7, 0xD4, 0x87, 0x37, 0x10, 0xB1, + 0x11, 0x5D, 0x3D, 0xEB, 0xBB, 0x43, 0x27, 0xB5 + } +}; + + + +int blake2b_test(void) +{ + Blake2b b2b; + byte digest[64]; + byte input[64]; + int i; + + for (i = 0; i < (int)sizeof(input); i++) + input[i] = (byte)i; + + for (i = 0; i < BLAKE2_TESTS; i++) { + InitBlake2b(&b2b, 64); + Blake2bUpdate(&b2b, input, i); + Blake2bFinal(&b2b, digest, 64); + + if (memcmp(digest, blake2b_vec[i], 64) != 0) { + return -300 - i; + } + } + + return 0; +} +#endif /* HAVE_BLAKE2 */ + + +#ifndef NO_SHA256 +int sha256_test(void) +{ + Sha256 sha; + byte hash[SHA256_DIGEST_SIZE]; + + testVector a, b; + testVector test_sha[2]; + int times = sizeof(test_sha) / sizeof(struct testVector), i; + + a.input = "abc"; + a.output = "\xBA\x78\x16\xBF\x8F\x01\xCF\xEA\x41\x41\x40\xDE\x5D\xAE\x22" + "\x23\xB0\x03\x61\xA3\x96\x17\x7A\x9C\xB4\x10\xFF\x61\xF2\x00" + "\x15\xAD"; + a.inLen = strlen(a.input); + a.outLen = SHA256_DIGEST_SIZE; + + b.input = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"; + b.output = "\x24\x8D\x6A\x61\xD2\x06\x38\xB8\xE5\xC0\x26\x93\x0C\x3E\x60" + "\x39\xA3\x3C\xE4\x59\x64\xFF\x21\x67\xF6\xEC\xED\xD4\x19\xDB" + "\x06\xC1"; + b.inLen = strlen(b.input); + b.outLen = SHA256_DIGEST_SIZE; + + test_sha[0] = a; + test_sha[1] = b; + + InitSha256(&sha); + + for (i = 0; i < times; ++i) { + Sha256Update(&sha, (byte*)test_sha[i].input,(word32)test_sha[i].inLen); + Sha256Final(&sha, hash); + + if (memcmp(hash, test_sha[i].output, SHA256_DIGEST_SIZE) != 0) + return -10 - i; + } + + return 0; +} +#endif + + +#ifdef CYASSL_SHA512 +int sha512_test(void) +{ + Sha512 sha; + byte hash[SHA512_DIGEST_SIZE]; + + testVector a, b; + testVector test_sha[2]; + int times = sizeof(test_sha) / sizeof(struct testVector), i; + + a.input = "abc"; + a.output = "\xdd\xaf\x35\xa1\x93\x61\x7a\xba\xcc\x41\x73\x49\xae\x20\x41" + "\x31\x12\xe6\xfa\x4e\x89\xa9\x7e\xa2\x0a\x9e\xee\xe6\x4b\x55" + "\xd3\x9a\x21\x92\x99\x2a\x27\x4f\xc1\xa8\x36\xba\x3c\x23\xa3" + "\xfe\xeb\xbd\x45\x4d\x44\x23\x64\x3c\xe8\x0e\x2a\x9a\xc9\x4f" + "\xa5\x4c\xa4\x9f"; + a.inLen = strlen(a.input); + a.outLen = SHA512_DIGEST_SIZE; + + b.input = "abcdefghbcdefghicdefghijdefghijkefghijklfghijklmghijklmnhi" + "jklmnoijklmnopjklmnopqklmnopqrlmnopqrsmnopqrstnopqrstu"; + b.output = "\x8e\x95\x9b\x75\xda\xe3\x13\xda\x8c\xf4\xf7\x28\x14\xfc\x14" + "\x3f\x8f\x77\x79\xc6\xeb\x9f\x7f\xa1\x72\x99\xae\xad\xb6\x88" + "\x90\x18\x50\x1d\x28\x9e\x49\x00\xf7\xe4\x33\x1b\x99\xde\xc4" + "\xb5\x43\x3a\xc7\xd3\x29\xee\xb6\xdd\x26\x54\x5e\x96\xe5\x5b" + "\x87\x4b\xe9\x09"; + b.inLen = strlen(b.input); + b.outLen = SHA512_DIGEST_SIZE; + + test_sha[0] = a; + test_sha[1] = b; + + InitSha512(&sha); + + for (i = 0; i < times; ++i) { + Sha512Update(&sha, (byte*)test_sha[i].input,(word32)test_sha[i].inLen); + Sha512Final(&sha, hash); + + if (memcmp(hash, test_sha[i].output, SHA512_DIGEST_SIZE) != 0) + return -10 - i; + } + + return 0; +} +#endif + + +#ifdef CYASSL_SHA384 +int sha384_test(void) +{ + Sha384 sha; + byte hash[SHA384_DIGEST_SIZE]; + + testVector a, b; + testVector test_sha[2]; + int times = sizeof(test_sha) / sizeof(struct testVector), i; + + a.input = "abc"; + a.output = "\xcb\x00\x75\x3f\x45\xa3\x5e\x8b\xb5\xa0\x3d\x69\x9a\xc6\x50" + "\x07\x27\x2c\x32\xab\x0e\xde\xd1\x63\x1a\x8b\x60\x5a\x43\xff" + "\x5b\xed\x80\x86\x07\x2b\xa1\xe7\xcc\x23\x58\xba\xec\xa1\x34" + "\xc8\x25\xa7"; + a.inLen = strlen(a.input); + a.outLen = SHA384_DIGEST_SIZE; + + b.input = "abcdefghbcdefghicdefghijdefghijkefghijklfghijklmghijklmnhi" + "jklmnoijklmnopjklmnopqklmnopqrlmnopqrsmnopqrstnopqrstu"; + b.output = "\x09\x33\x0c\x33\xf7\x11\x47\xe8\x3d\x19\x2f\xc7\x82\xcd\x1b" + "\x47\x53\x11\x1b\x17\x3b\x3b\x05\xd2\x2f\xa0\x80\x86\xe3\xb0" + "\xf7\x12\xfc\xc7\xc7\x1a\x55\x7e\x2d\xb9\x66\xc3\xe9\xfa\x91" + "\x74\x60\x39"; + b.inLen = strlen(b.input); + b.outLen = SHA384_DIGEST_SIZE; + + test_sha[0] = a; + test_sha[1] = b; + + InitSha384(&sha); + + for (i = 0; i < times; ++i) { + Sha384Update(&sha, (byte*)test_sha[i].input,(word32)test_sha[i].inLen); + Sha384Final(&sha, hash); + + if (memcmp(hash, test_sha[i].output, SHA384_DIGEST_SIZE) != 0) + return -10 - i; + } + + return 0; +} +#endif /* CYASSL_SHA384 */ + + +#if !defined(NO_HMAC) && !defined(NO_MD5) +int hmac_md5_test(void) +{ + Hmac hmac; + byte hash[MD5_DIGEST_SIZE]; + + const char* keys[]= + { + "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b", + "Jefe", + "\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA" + }; + + testVector a, b, c; + testVector test_hmac[3]; + + int times = sizeof(test_hmac) / sizeof(testVector), i; + + a.input = "Hi There"; + a.output = "\x92\x94\x72\x7a\x36\x38\xbb\x1c\x13\xf4\x8e\xf8\x15\x8b\xfc" + "\x9d"; + a.inLen = strlen(a.input); + a.outLen = MD5_DIGEST_SIZE; + + b.input = "what do ya want for nothing?"; + b.output = "\x75\x0c\x78\x3e\x6a\xb0\xb5\x03\xea\xa8\x6e\x31\x0a\x5d\xb7" + "\x38"; + b.inLen = strlen(b.input); + b.outLen = MD5_DIGEST_SIZE; + + c.input = "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD"; + c.output = "\x56\xbe\x34\x52\x1d\x14\x4c\x88\xdb\xb8\xc7\x33\xf0\xe8\xb3" + "\xf6"; + c.inLen = strlen(c.input); + c.outLen = MD5_DIGEST_SIZE; + + test_hmac[0] = a; + test_hmac[1] = b; + test_hmac[2] = c; + + for (i = 0; i < times; ++i) { +#ifdef HAVE_CAVIUM + if (i == 1) + continue; /* driver can't handle keys <= bytes */ + if (HmacInitCavium(&hmac, CAVIUM_DEV_ID) != 0) + return -20009; +#endif + HmacSetKey(&hmac, MD5, (byte*)keys[i], (word32)strlen(keys[i])); + HmacUpdate(&hmac, (byte*)test_hmac[i].input, + (word32)test_hmac[i].inLen); + HmacFinal(&hmac, hash); + + if (memcmp(hash, test_hmac[i].output, MD5_DIGEST_SIZE) != 0) + return -20 - i; +#ifdef HAVE_CAVIUM + HmacFreeCavium(&hmac); +#endif + } + + return 0; +} +#endif /* NO_HMAC && NO_MD5 */ + +#if !defined(NO_HMAC) && !defined(NO_SHA) +int hmac_sha_test(void) +{ + Hmac hmac; + byte hash[SHA_DIGEST_SIZE]; + + const char* keys[]= + { + "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b" + "\x0b\x0b\x0b", + "Jefe", + "\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA" + "\xAA\xAA\xAA" + }; + + testVector a, b, c; + testVector test_hmac[3]; + + int times = sizeof(test_hmac) / sizeof(testVector), i; + + a.input = "Hi There"; + a.output = "\xb6\x17\x31\x86\x55\x05\x72\x64\xe2\x8b\xc0\xb6\xfb\x37\x8c" + "\x8e\xf1\x46\xbe\x00"; + a.inLen = strlen(a.input); + a.outLen = SHA_DIGEST_SIZE; + + b.input = "what do ya want for nothing?"; + b.output = "\xef\xfc\xdf\x6a\xe5\xeb\x2f\xa2\xd2\x74\x16\xd5\xf1\x84\xdf" + "\x9c\x25\x9a\x7c\x79"; + b.inLen = strlen(b.input); + b.outLen = SHA_DIGEST_SIZE; + + c.input = "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD"; + c.output = "\x12\x5d\x73\x42\xb9\xac\x11\xcd\x91\xa3\x9a\xf4\x8a\xa1\x7b" + "\x4f\x63\xf1\x75\xd3"; + c.inLen = strlen(c.input); + c.outLen = SHA_DIGEST_SIZE; + + test_hmac[0] = a; + test_hmac[1] = b; + test_hmac[2] = c; + + for (i = 0; i < times; ++i) { +#ifdef HAVE_CAVIUM + if (i == 1) + continue; /* driver can't handle keys <= bytes */ + if (HmacInitCavium(&hmac, CAVIUM_DEV_ID) != 0) + return -20010; +#endif + HmacSetKey(&hmac, SHA, (byte*)keys[i], (word32)strlen(keys[i])); + HmacUpdate(&hmac, (byte*)test_hmac[i].input, + (word32)test_hmac[i].inLen); + HmacFinal(&hmac, hash); + + if (memcmp(hash, test_hmac[i].output, SHA_DIGEST_SIZE) != 0) + return -20 - i; +#ifdef HAVE_CAVIUM + HmacFreeCavium(&hmac); +#endif + } + + return 0; +} +#endif + + +#if !defined(NO_HMAC) && !defined(NO_SHA256) +int hmac_sha256_test(void) +{ + Hmac hmac; + byte hash[SHA256_DIGEST_SIZE]; + + const char* keys[]= + { + "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b" + "\x0b\x0b\x0b", + "Jefe", + "\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA" + "\xAA\xAA\xAA" + }; + + testVector a, b, c; + testVector test_hmac[3]; + + int times = sizeof(test_hmac) / sizeof(testVector), i; + + a.input = "Hi There"; + a.output = "\xb0\x34\x4c\x61\xd8\xdb\x38\x53\x5c\xa8\xaf\xce\xaf\x0b\xf1" + "\x2b\x88\x1d\xc2\x00\xc9\x83\x3d\xa7\x26\xe9\x37\x6c\x2e\x32" + "\xcf\xf7"; + a.inLen = strlen(a.input); + a.outLen = SHA256_DIGEST_SIZE; + + b.input = "what do ya want for nothing?"; + b.output = "\x5b\xdc\xc1\x46\xbf\x60\x75\x4e\x6a\x04\x24\x26\x08\x95\x75" + "\xc7\x5a\x00\x3f\x08\x9d\x27\x39\x83\x9d\xec\x58\xb9\x64\xec" + "\x38\x43"; + b.inLen = strlen(b.input); + b.outLen = SHA256_DIGEST_SIZE; + + c.input = "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD"; + c.output = "\x77\x3e\xa9\x1e\x36\x80\x0e\x46\x85\x4d\xb8\xeb\xd0\x91\x81" + "\xa7\x29\x59\x09\x8b\x3e\xf8\xc1\x22\xd9\x63\x55\x14\xce\xd5" + "\x65\xfe"; + c.inLen = strlen(c.input); + c.outLen = SHA256_DIGEST_SIZE; + + test_hmac[0] = a; + test_hmac[1] = b; + test_hmac[2] = c; + + for (i = 0; i < times; ++i) { +#ifdef HAVE_CAVIUM + if (i == 1) + continue; /* driver can't handle keys <= bytes */ + if (HmacInitCavium(&hmac, CAVIUM_DEV_ID) != 0) + return -20011; +#endif + HmacSetKey(&hmac, SHA256, (byte*)keys[i], (word32)strlen(keys[i])); + HmacUpdate(&hmac, (byte*)test_hmac[i].input, + (word32)test_hmac[i].inLen); + HmacFinal(&hmac, hash); + + if (memcmp(hash, test_hmac[i].output, SHA256_DIGEST_SIZE) != 0) + return -20 - i; +#ifdef HAVE_CAVIUM + HmacFreeCavium(&hmac); +#endif + } + + return 0; +} +#endif + + +#if !defined(NO_HMAC) && defined(CYASSL_SHA384) +int hmac_sha384_test(void) +{ + Hmac hmac; + byte hash[SHA384_DIGEST_SIZE]; + + const char* keys[]= + { + "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b" + "\x0b\x0b\x0b", + "Jefe", + "\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA" + "\xAA\xAA\xAA" + }; + + testVector a, b, c; + testVector test_hmac[3]; + + int times = sizeof(test_hmac) / sizeof(testVector), i; + + a.input = "Hi There"; + a.output = "\xaf\xd0\x39\x44\xd8\x48\x95\x62\x6b\x08\x25\xf4\xab\x46\x90" + "\x7f\x15\xf9\xda\xdb\xe4\x10\x1e\xc6\x82\xaa\x03\x4c\x7c\xeb" + "\xc5\x9c\xfa\xea\x9e\xa9\x07\x6e\xde\x7f\x4a\xf1\x52\xe8\xb2" + "\xfa\x9c\xb6"; + a.inLen = strlen(a.input); + a.outLen = SHA384_DIGEST_SIZE; + + b.input = "what do ya want for nothing?"; + b.output = "\xaf\x45\xd2\xe3\x76\x48\x40\x31\x61\x7f\x78\xd2\xb5\x8a\x6b" + "\x1b\x9c\x7e\xf4\x64\xf5\xa0\x1b\x47\xe4\x2e\xc3\x73\x63\x22" + "\x44\x5e\x8e\x22\x40\xca\x5e\x69\xe2\xc7\x8b\x32\x39\xec\xfa" + "\xb2\x16\x49"; + b.inLen = strlen(b.input); + b.outLen = SHA384_DIGEST_SIZE; + + c.input = "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD"; + c.output = "\x88\x06\x26\x08\xd3\xe6\xad\x8a\x0a\xa2\xac\xe0\x14\xc8\xa8" + "\x6f\x0a\xa6\x35\xd9\x47\xac\x9f\xeb\xe8\x3e\xf4\xe5\x59\x66" + "\x14\x4b\x2a\x5a\xb3\x9d\xc1\x38\x14\xb9\x4e\x3a\xb6\xe1\x01" + "\xa3\x4f\x27"; + c.inLen = strlen(c.input); + c.outLen = SHA384_DIGEST_SIZE; + + test_hmac[0] = a; + test_hmac[1] = b; + test_hmac[2] = c; + + for (i = 0; i < times; ++i) { + HmacSetKey(&hmac, SHA384, (byte*)keys[i], (word32)strlen(keys[i])); + HmacUpdate(&hmac, (byte*)test_hmac[i].input, + (word32)test_hmac[i].inLen); + HmacFinal(&hmac, hash); + + if (memcmp(hash, test_hmac[i].output, SHA384_DIGEST_SIZE) != 0) + return -20 - i; + } + + return 0; +} +#endif + + +#if !defined(NO_HMAC) && defined(CYASSL_SHA512) +int hmac_sha512_test(void) +{ + Hmac hmac; + byte hash[SHA512_DIGEST_SIZE]; + + const char* keys[]= + { + "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b" + "\x0b\x0b\x0b", + "Jefe", + "\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA" + "\xAA\xAA\xAA" + }; + + testVector a, b, c; + testVector test_hmac[3]; + + int times = sizeof(test_hmac) / sizeof(testVector), i; + + a.input = "Hi There"; + a.output = "\x87\xaa\x7c\xde\xa5\xef\x61\x9d\x4f\xf0\xb4\x24\x1a\x1d\x6c" + "\xb0\x23\x79\xf4\xe2\xce\x4e\xc2\x78\x7a\xd0\xb3\x05\x45\xe1" + "\x7c\xde\xda\xa8\x33\xb7\xd6\xb8\xa7\x02\x03\x8b\x27\x4e\xae" + "\xa3\xf4\xe4\xbe\x9d\x91\x4e\xeb\x61\xf1\x70\x2e\x69\x6c\x20" + "\x3a\x12\x68\x54"; + a.inLen = strlen(a.input); + a.outLen = SHA512_DIGEST_SIZE; + + b.input = "what do ya want for nothing?"; + b.output = "\x16\x4b\x7a\x7b\xfc\xf8\x19\xe2\xe3\x95\xfb\xe7\x3b\x56\xe0" + "\xa3\x87\xbd\x64\x22\x2e\x83\x1f\xd6\x10\x27\x0c\xd7\xea\x25" + "\x05\x54\x97\x58\xbf\x75\xc0\x5a\x99\x4a\x6d\x03\x4f\x65\xf8" + "\xf0\xe6\xfd\xca\xea\xb1\xa3\x4d\x4a\x6b\x4b\x63\x6e\x07\x0a" + "\x38\xbc\xe7\x37"; + b.inLen = strlen(b.input); + b.outLen = SHA512_DIGEST_SIZE; + + c.input = "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD"; + c.output = "\xfa\x73\xb0\x08\x9d\x56\xa2\x84\xef\xb0\xf0\x75\x6c\x89\x0b" + "\xe9\xb1\xb5\xdb\xdd\x8e\xe8\x1a\x36\x55\xf8\x3e\x33\xb2\x27" + "\x9d\x39\xbf\x3e\x84\x82\x79\xa7\x22\xc8\x06\xb4\x85\xa4\x7e" + "\x67\xc8\x07\xb9\x46\xa3\x37\xbe\xe8\x94\x26\x74\x27\x88\x59" + "\xe1\x32\x92\xfb"; + c.inLen = strlen(c.input); + c.outLen = SHA512_DIGEST_SIZE; + + test_hmac[0] = a; + test_hmac[1] = b; + test_hmac[2] = c; + + for (i = 0; i < times; ++i) { + HmacSetKey(&hmac, SHA512, (byte*)keys[i], (word32)strlen(keys[i])); + HmacUpdate(&hmac, (byte*)test_hmac[i].input, + (word32)test_hmac[i].inLen); + HmacFinal(&hmac, hash); + + if (memcmp(hash, test_hmac[i].output, SHA512_DIGEST_SIZE) != 0) + return -20 - i; + } + + return 0; +} +#endif + + +#ifndef NO_RC4 +int arc4_test(void) +{ + byte cipher[16]; + byte plain[16]; + + const char* keys[] = + { + "\x01\x23\x45\x67\x89\xab\xcd\xef", + "\x01\x23\x45\x67\x89\xab\xcd\xef", + "\x00\x00\x00\x00\x00\x00\x00\x00", + "\xef\x01\x23\x45" + }; + + testVector a, b, c, d; + testVector test_arc4[4]; + + int times = sizeof(test_arc4) / sizeof(testVector), i; + + a.input = "\x01\x23\x45\x67\x89\xab\xcd\xef"; + a.output = "\x75\xb7\x87\x80\x99\xe0\xc5\x96"; + a.inLen = 8; + a.outLen = 8; + + b.input = "\x00\x00\x00\x00\x00\x00\x00\x00"; + b.output = "\x74\x94\xc2\xe7\x10\x4b\x08\x79"; + b.inLen = 8; + b.outLen = 8; + + c.input = "\x00\x00\x00\x00\x00\x00\x00\x00"; + c.output = "\xde\x18\x89\x41\xa3\x37\x5d\x3a"; + c.inLen = 8; + c.outLen = 8; + + d.input = "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"; + d.output = "\xd6\xa1\x41\xa7\xec\x3c\x38\xdf\xbd\x61"; + d.inLen = 10; + d.outLen = 10; + + test_arc4[0] = a; + test_arc4[1] = b; + test_arc4[2] = c; + test_arc4[3] = d; + + for (i = 0; i < times; ++i) { + Arc4 enc; + Arc4 dec; + int keylen = 8; /* strlen with key 0x00 not good */ + if (i == 3) + keylen = 4; + +#ifdef HAVE_CAVIUM + if (Arc4InitCavium(&enc, CAVIUM_DEV_ID) != 0) + return -20001; + if (Arc4InitCavium(&dec, CAVIUM_DEV_ID) != 0) + return -20002; +#endif + + Arc4SetKey(&enc, (byte*)keys[i], keylen); + Arc4SetKey(&dec, (byte*)keys[i], keylen); + + Arc4Process(&enc, cipher, (byte*)test_arc4[i].input, + (word32)test_arc4[i].outLen); + Arc4Process(&dec, plain, cipher, (word32)test_arc4[i].outLen); + + if (memcmp(plain, test_arc4[i].input, test_arc4[i].outLen)) + return -20 - i; + + if (memcmp(cipher, test_arc4[i].output, test_arc4[i].outLen)) + return -20 - 5 - i; + +#ifdef HAVE_CAVIUM + Arc4FreeCavium(&enc); + Arc4FreeCavium(&dec); +#endif + } + + return 0; +} +#endif + + +int hc128_test(void) +{ +#ifdef HAVE_HC128 + byte cipher[16]; + byte plain[16]; + + const char* keys[] = + { + "\x80\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", + "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", + "\x00\x53\xA6\xF9\x4C\x9F\xF2\x45\x98\xEB\x3E\x91\xE4\x37\x8A\xDD", + "\x0F\x62\xB5\x08\x5B\xAE\x01\x54\xA7\xFA\x4D\xA0\xF3\x46\x99\xEC" + }; + + const char* ivs[] = + { + "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", + "\x80\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", + "\x0D\x74\xDB\x42\xA9\x10\x77\xDE\x45\xAC\x13\x7A\xE1\x48\xAF\x16", + "\x28\x8F\xF6\x5D\xC4\x2B\x92\xF9\x60\xC7\x2E\x95\xFC\x63\xCA\x31" + }; + + + testVector a, b, c, d; + testVector test_hc128[4]; + + int times = sizeof(test_hc128) / sizeof(testVector), i; + + a.input = "\x00\x00\x00\x00\x00\x00\x00\x00"; + a.output = "\x37\x86\x02\xB9\x8F\x32\xA7\x48"; + a.inLen = 8; + a.outLen = 8; + + b.input = "\x00\x00\x00\x00\x00\x00\x00\x00"; + b.output = "\x33\x7F\x86\x11\xC6\xED\x61\x5F"; + b.inLen = 8; + b.outLen = 8; + + c.input = "\x00\x00\x00\x00\x00\x00\x00\x00"; + c.output = "\x2E\x1E\xD1\x2A\x85\x51\xC0\x5A"; + c.inLen = 8; + c.outLen = 8; + + d.input = "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"; + d.output = "\x1C\xD8\xAE\xDD\xFE\x52\xE2\x17\xE8\x35\xD0\xB7\xE8\x4E\x29"; + d.inLen = 15; + d.outLen = 15; + + test_hc128[0] = a; + test_hc128[1] = b; + test_hc128[2] = c; + test_hc128[3] = d; + + for (i = 0; i < times; ++i) { + HC128 enc; + HC128 dec; + + /* align keys/ivs in plain/cipher buffers */ + memcpy(plain, keys[i], 16); + memcpy(cipher, ivs[i], 16); + + Hc128_SetKey(&enc, plain, cipher); + Hc128_SetKey(&dec, plain, cipher); + + /* align input */ + memcpy(plain, test_hc128[i].input, test_hc128[i].outLen); + Hc128_Process(&enc, cipher, plain, (word32)test_hc128[i].outLen); + Hc128_Process(&dec, plain, cipher, (word32)test_hc128[i].outLen); + + if (memcmp(plain, test_hc128[i].input, test_hc128[i].outLen)) + return -120 - i; + + if (memcmp(cipher, test_hc128[i].output, test_hc128[i].outLen)) + return -120 - 5 - i; + } + +#endif /* HAVE_HC128 */ + return 0; +} + + +#ifndef NO_RABBIT +int rabbit_test(void) +{ + byte cipher[16]; + byte plain[16]; + + const char* keys[] = + { + "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", + "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", + "\xAC\xC3\x51\xDC\xF1\x62\xFC\x3B\xFE\x36\x3D\x2E\x29\x13\x28\x91" + }; + + const char* ivs[] = + { + "\x00\x00\x00\x00\x00\x00\x00\x00", + "\x59\x7E\x26\xC1\x75\xF5\x73\xC3", + 0 + }; + + testVector a, b, c; + testVector test_rabbit[3]; + + int times = sizeof(test_rabbit) / sizeof(testVector), i; + + a.input = "\x00\x00\x00\x00\x00\x00\x00\x00"; + a.output = "\xED\xB7\x05\x67\x37\x5D\xCD\x7C"; + a.inLen = 8; + a.outLen = 8; + + b.input = "\x00\x00\x00\x00\x00\x00\x00\x00"; + b.output = "\x6D\x7D\x01\x22\x92\xCC\xDC\xE0"; + b.inLen = 8; + b.outLen = 8; + + c.input = "\x00\x00\x00\x00\x00\x00\x00\x00"; + c.output = "\x9C\x51\xE2\x87\x84\xC3\x7F\xE9"; + c.inLen = 8; + c.outLen = 8; + + test_rabbit[0] = a; + test_rabbit[1] = b; + test_rabbit[2] = c; + + for (i = 0; i < times; ++i) { + Rabbit enc; + Rabbit dec; + byte* iv; + + /* align keys/ivs in plain/cipher buffers */ + memcpy(plain, keys[i], 16); + if (ivs[i]) { + memcpy(cipher, ivs[i], 8); + iv = cipher; + } else + iv = NULL; + RabbitSetKey(&enc, plain, iv); + RabbitSetKey(&dec, plain, iv); + + /* align input */ + memcpy(plain, test_rabbit[i].input, test_rabbit[i].outLen); + RabbitProcess(&enc, cipher, plain, (word32)test_rabbit[i].outLen); + RabbitProcess(&dec, plain, cipher, (word32)test_rabbit[i].outLen); + + if (memcmp(plain, test_rabbit[i].input, test_rabbit[i].outLen)) + return -130 - i; + + if (memcmp(cipher, test_rabbit[i].output, test_rabbit[i].outLen)) + return -130 - 5 - i; + } + + return 0; +} +#endif /* NO_RABBIT */ + + +#ifndef NO_DES3 +int des_test(void) +{ + const byte vector[] = { /* "now is the time for all " w/o trailing 0 */ + 0x6e,0x6f,0x77,0x20,0x69,0x73,0x20,0x74, + 0x68,0x65,0x20,0x74,0x69,0x6d,0x65,0x20, + 0x66,0x6f,0x72,0x20,0x61,0x6c,0x6c,0x20 + }; + + byte plain[24]; + byte cipher[24]; + + Des enc; + Des dec; + + const byte key[] = + { + 0x01,0x23,0x45,0x67,0x89,0xab,0xcd,0xef + }; + + const byte iv[] = + { + 0x12,0x34,0x56,0x78,0x90,0xab,0xcd,0xef + }; + + const byte verify[] = + { + 0x8b,0x7c,0x52,0xb0,0x01,0x2b,0x6c,0xb8, + 0x4f,0x0f,0xeb,0xf3,0xfb,0x5f,0x86,0x73, + 0x15,0x85,0xb3,0x22,0x4b,0x86,0x2b,0x4b + }; + + + Des_SetKey(&enc, key, iv, DES_ENCRYPTION); + Des_CbcEncrypt(&enc, cipher, vector, sizeof(vector)); + Des_SetKey(&dec, key, iv, DES_DECRYPTION); + Des_CbcDecrypt(&dec, plain, cipher, sizeof(cipher)); + + if (memcmp(plain, vector, sizeof(plain))) + return -31; + + if (memcmp(cipher, verify, sizeof(cipher))) + return -32; + + return 0; +} +#endif /* NO_DES3 */ + + +#ifndef NO_DES3 +int des3_test(void) +{ + const byte vector[] = { /* "Now is the time for all " w/o trailing 0 */ + 0x4e,0x6f,0x77,0x20,0x69,0x73,0x20,0x74, + 0x68,0x65,0x20,0x74,0x69,0x6d,0x65,0x20, + 0x66,0x6f,0x72,0x20,0x61,0x6c,0x6c,0x20 + }; + + byte plain[24]; + byte cipher[24]; + + Des3 enc; + Des3 dec; + + const byte key3[] = + { + 0x01,0x23,0x45,0x67,0x89,0xab,0xcd,0xef, + 0xfe,0xde,0xba,0x98,0x76,0x54,0x32,0x10, + 0x89,0xab,0xcd,0xef,0x01,0x23,0x45,0x67 + }; + const byte iv3[] = + { + 0x12,0x34,0x56,0x78,0x90,0xab,0xcd,0xef, + 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01, + 0x11,0x21,0x31,0x41,0x51,0x61,0x71,0x81 + + }; + + const byte verify3[] = + { + 0x43,0xa0,0x29,0x7e,0xd1,0x84,0xf8,0x0e, + 0x89,0x64,0x84,0x32,0x12,0xd5,0x08,0x98, + 0x18,0x94,0x15,0x74,0x87,0x12,0x7d,0xb0 + }; + + +#ifdef HAVE_CAVIUM + if (Des3_InitCavium(&enc, CAVIUM_DEV_ID) != 0) + return -20005; + if (Des3_InitCavium(&dec, CAVIUM_DEV_ID) != 0) + return -20006; +#endif + Des3_SetKey(&enc, key3, iv3, DES_ENCRYPTION); + Des3_SetKey(&dec, key3, iv3, DES_DECRYPTION); + Des3_CbcEncrypt(&enc, cipher, vector, sizeof(vector)); + Des3_CbcDecrypt(&dec, plain, cipher, sizeof(cipher)); + + if (memcmp(plain, vector, sizeof(plain))) + return -33; + + if (memcmp(cipher, verify3, sizeof(cipher))) + return -34; + +#ifdef HAVE_CAVIUM + Des3_FreeCavium(&enc); + Des3_FreeCavium(&dec); +#endif + return 0; +} +#endif /* NO_DES */ + + +#ifndef NO_AES +int aes_test(void) +{ + Aes enc; + Aes dec; + + const byte msg[] = { /* "Now is the time for all " w/o trailing 0 */ + 0x6e,0x6f,0x77,0x20,0x69,0x73,0x20,0x74, + 0x68,0x65,0x20,0x74,0x69,0x6d,0x65,0x20, + 0x66,0x6f,0x72,0x20,0x61,0x6c,0x6c,0x20 + }; + + const byte verify[] = + { + 0x95,0x94,0x92,0x57,0x5f,0x42,0x81,0x53, + 0x2c,0xcc,0x9d,0x46,0x77,0xa2,0x33,0xcb + }; + + byte key[] = "0123456789abcdef "; /* align */ + byte iv[] = "1234567890abcdef "; /* align */ + + byte cipher[AES_BLOCK_SIZE * 4]; + byte plain [AES_BLOCK_SIZE * 4]; + +#ifdef HAVE_CAVIUM + if (AesInitCavium(&enc, CAVIUM_DEV_ID) != 0) + return -20003; + if (AesInitCavium(&dec, CAVIUM_DEV_ID) != 0) + return -20004; +#endif + AesSetKey(&enc, key, AES_BLOCK_SIZE, iv, AES_ENCRYPTION); + AesSetKey(&dec, key, AES_BLOCK_SIZE, iv, AES_DECRYPTION); + + AesCbcEncrypt(&enc, cipher, msg, AES_BLOCK_SIZE); + AesCbcDecrypt(&dec, plain, cipher, AES_BLOCK_SIZE); + + if (memcmp(plain, msg, AES_BLOCK_SIZE)) + return -60; + + if (memcmp(cipher, verify, AES_BLOCK_SIZE)) + return -61; + +#ifdef HAVE_CAVIUM + AesFreeCavium(&enc); + AesFreeCavium(&dec); +#endif +#ifdef CYASSL_AES_COUNTER + { + const byte ctrKey[] = + { + 0x2b,0x7e,0x15,0x16,0x28,0xae,0xd2,0xa6, + 0xab,0xf7,0x15,0x88,0x09,0xcf,0x4f,0x3c + }; + + const byte ctrIv[] = + { + 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7, + 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff + }; + + + const byte ctrPlain[] = + { + 0x6b,0xc1,0xbe,0xe2,0x2e,0x40,0x9f,0x96, + 0xe9,0x3d,0x7e,0x11,0x73,0x93,0x17,0x2a, + 0xae,0x2d,0x8a,0x57,0x1e,0x03,0xac,0x9c, + 0x9e,0xb7,0x6f,0xac,0x45,0xaf,0x8e,0x51, + 0x30,0xc8,0x1c,0x46,0xa3,0x5c,0xe4,0x11, + 0xe5,0xfb,0xc1,0x19,0x1a,0x0a,0x52,0xef, + 0xf6,0x9f,0x24,0x45,0xdf,0x4f,0x9b,0x17, + 0xad,0x2b,0x41,0x7b,0xe6,0x6c,0x37,0x10 + }; + + const byte ctrCipher[] = + { + 0x87,0x4d,0x61,0x91,0xb6,0x20,0xe3,0x26, + 0x1b,0xef,0x68,0x64,0x99,0x0d,0xb6,0xce, + 0x98,0x06,0xf6,0x6b,0x79,0x70,0xfd,0xff, + 0x86,0x17,0x18,0x7b,0xb9,0xff,0xfd,0xff, + 0x5a,0xe4,0xdf,0x3e,0xdb,0xd5,0xd3,0x5e, + 0x5b,0x4f,0x09,0x02,0x0d,0xb0,0x3e,0xab, + 0x1e,0x03,0x1d,0xda,0x2f,0xbe,0x03,0xd1, + 0x79,0x21,0x70,0xa0,0xf3,0x00,0x9c,0xee + }; + + AesSetKeyDirect(&enc, ctrKey, AES_BLOCK_SIZE, ctrIv, AES_ENCRYPTION); + /* Ctr only uses encrypt, even on key setup */ + AesSetKeyDirect(&dec, ctrKey, AES_BLOCK_SIZE, ctrIv, AES_ENCRYPTION); + + AesCtrEncrypt(&enc, cipher, ctrPlain, AES_BLOCK_SIZE*4); + AesCtrEncrypt(&dec, plain, cipher, AES_BLOCK_SIZE*4); + + if (memcmp(plain, ctrPlain, AES_BLOCK_SIZE*4)) + return -66; + + if (memcmp(cipher, ctrCipher, AES_BLOCK_SIZE*4)) + return -67; + } +#endif /* CYASSL_AES_COUNTER */ + + return 0; +} + +#ifdef HAVE_AESGCM +int aesgcm_test(void) +{ + Aes enc; + + /* + * This is Test Case 16 from the document Galois/ + * Counter Mode of Operation (GCM) by McGrew and + * Viega. + */ + const byte k[] = + { + 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c, + 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08, + 0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c, + 0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08 + }; + + const byte iv[] = + { + 0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad, + 0xde, 0xca, 0xf8, 0x88 + }; + + const byte p[] = + { + 0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5, + 0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a, + 0x86, 0xa7, 0xa9, 0x53, 0x15, 0x34, 0xf7, 0xda, + 0x2e, 0x4c, 0x30, 0x3d, 0x8a, 0x31, 0x8a, 0x72, + 0x1c, 0x3c, 0x0c, 0x95, 0x95, 0x68, 0x09, 0x53, + 0x2f, 0xcf, 0x0e, 0x24, 0x49, 0xa6, 0xb5, 0x25, + 0xb1, 0x6a, 0xed, 0xf5, 0xaa, 0x0d, 0xe6, 0x57, + 0xba, 0x63, 0x7b, 0x39 + }; + + const byte a[] = + { + 0xfe, 0xed, 0xfa, 0xce, 0xde, 0xad, 0xbe, 0xef, + 0xfe, 0xed, 0xfa, 0xce, 0xde, 0xad, 0xbe, 0xef, + 0xab, 0xad, 0xda, 0xd2 + }; + + const byte c[] = + { + 0x52, 0x2d, 0xc1, 0xf0, 0x99, 0x56, 0x7d, 0x07, + 0xf4, 0x7f, 0x37, 0xa3, 0x2a, 0x84, 0x42, 0x7d, + 0x64, 0x3a, 0x8c, 0xdc, 0xbf, 0xe5, 0xc0, 0xc9, + 0x75, 0x98, 0xa2, 0xbd, 0x25, 0x55, 0xd1, 0xaa, + 0x8c, 0xb0, 0x8e, 0x48, 0x59, 0x0d, 0xbb, 0x3d, + 0xa7, 0xb0, 0x8b, 0x10, 0x56, 0x82, 0x88, 0x38, + 0xc5, 0xf6, 0x1e, 0x63, 0x93, 0xba, 0x7a, 0x0a, + 0xbc, 0xc9, 0xf6, 0x62 + }; + + const byte t[] = + { + 0x76, 0xfc, 0x6e, 0xce, 0x0f, 0x4e, 0x17, 0x68, + 0xcd, 0xdf, 0x88, 0x53, 0xbb, 0x2d, 0x55, 0x1b + }; + + byte t2[sizeof(t)]; + byte p2[sizeof(c)]; + byte c2[sizeof(p)]; + + int result; + + memset(t2, 0, sizeof(t2)); + memset(c2, 0, sizeof(c2)); + memset(p2, 0, sizeof(p2)); + + AesGcmSetKey(&enc, k, sizeof(k)); + /* AES-GCM encrypt and decrypt both use AES encrypt internally */ + AesGcmEncrypt(&enc, c2, p, sizeof(c2), iv, sizeof(iv), + t2, sizeof(t2), a, sizeof(a)); + if (memcmp(c, c2, sizeof(c2))) + return -68; + if (memcmp(t, t2, sizeof(t2))) + return -69; + + result = AesGcmDecrypt(&enc, p2, c2, sizeof(p2), iv, sizeof(iv), + t2, sizeof(t2), a, sizeof(a)); + if (result != 0) + return -70; + if (memcmp(p, p2, sizeof(p2))) + return -71; + + return 0; +} +#endif /* HAVE_AESGCM */ + +#ifdef HAVE_AESCCM +int aesccm_test(void) +{ + Aes enc; + + /* key */ + const byte k[] = + { + 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, + 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf + }; + + /* nonce */ + const byte iv[] = + { + 0x00, 0x00, 0x00, 0x03, 0x02, 0x01, 0x00, 0xa0, + 0xa1, 0xa2, 0xa3, 0xa4, 0xa5 + }; + + /* plaintext */ + const byte p[] = + { + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e + }; + + const byte a[] = + { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 + }; + + const byte c[] = + { + 0x58, 0x8c, 0x97, 0x9a, 0x61, 0xc6, 0x63, 0xd2, + 0xf0, 0x66, 0xd0, 0xc2, 0xc0, 0xf9, 0x89, 0x80, + 0x6d, 0x5f, 0x6b, 0x61, 0xda, 0xc3, 0x84 + }; + + const byte t[] = + { + 0x17, 0xe8, 0xd1, 0x2c, 0xfd, 0xf9, 0x26, 0xe0 + }; + + byte t2[sizeof(t)]; + byte p2[sizeof(p)]; + byte c2[sizeof(c)]; + + int result; + + memset(t2, 0, sizeof(t2)); + memset(c2, 0, sizeof(c2)); + memset(p2, 0, sizeof(p2)); + + AesCcmSetKey(&enc, k, sizeof(k)); + /* AES-CCM encrypt and decrypt both use AES encrypt internally */ + AesCcmEncrypt(&enc, c2, p, sizeof(c2), iv, sizeof(iv), + t2, sizeof(t2), a, sizeof(a)); + if (memcmp(c, c2, sizeof(c2))) + return -107; + if (memcmp(t, t2, sizeof(t2))) + return -108; + + result = AesCcmDecrypt(&enc, p2, c2, sizeof(p2), iv, sizeof(iv), + t2, sizeof(t2), a, sizeof(a)); + if (result != 0) + return -109; + if (memcmp(p, p2, sizeof(p2))) + return -110; + + /* Test the authentication failure */ + t2[0]++; /* Corrupt the authentication tag. */ + result = AesCcmDecrypt(&enc, p2, c, sizeof(p2), iv, sizeof(iv), + t2, sizeof(t2), a, sizeof(a)); + if (result == 0) + return -111; + + /* Clear c2 to compare against p2. p2 should be set to zero in case of + * authentication fail. */ + memset(c2, 0, sizeof(c2)); + if (memcmp(p2, c2, sizeof(p2))) + return -112; + + return 0; +} +#endif /* HAVE_AESCCM */ + + +#endif /* NO_AES */ + + +#ifdef HAVE_CAMELLIA + +enum { + CAM_ECB_ENC, CAM_ECB_DEC, CAM_CBC_ENC, CAM_CBC_DEC +}; + +typedef struct { + int type; + const byte* plaintext; + const byte* iv; + const byte* ciphertext; + const byte* key; + word32 keySz; + int errorCode; +} test_vector_t; + +int camellia_test(void) +{ + /* Camellia ECB Test Plaintext */ + static const byte pte[] = + { + 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, + 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10 + }; + + /* Camellia ECB Test Initialization Vector */ + static const byte ive[] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; + + /* Test 1: Camellia ECB 128-bit key */ + static const byte k1[] = + { + 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, + 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10 + }; + static const byte c1[] = + { + 0x67, 0x67, 0x31, 0x38, 0x54, 0x96, 0x69, 0x73, + 0x08, 0x57, 0x06, 0x56, 0x48, 0xea, 0xbe, 0x43 + }; + + /* Test 2: Camellia ECB 192-bit key */ + static const byte k2[] = + { + 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, + 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10, + 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 + }; + static const byte c2[] = + { + 0xb4, 0x99, 0x34, 0x01, 0xb3, 0xe9, 0x96, 0xf8, + 0x4e, 0xe5, 0xce, 0xe7, 0xd7, 0x9b, 0x09, 0xb9 + }; + + /* Test 3: Camellia ECB 256-bit key */ + static const byte k3[] = + { + 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, + 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10, + 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, + 0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff + }; + static const byte c3[] = + { + 0x9a, 0xcc, 0x23, 0x7d, 0xff, 0x16, 0xd7, 0x6c, + 0x20, 0xef, 0x7c, 0x91, 0x9e, 0x3a, 0x75, 0x09 + }; + + /* Camellia CBC Test Plaintext */ + static const byte ptc[] = + { + 0x6B, 0xC1, 0xBE, 0xE2, 0x2E, 0x40, 0x9F, 0x96, + 0xE9, 0x3D, 0x7E, 0x11, 0x73, 0x93, 0x17, 0x2A + }; + + /* Camellia CBC Test Initialization Vector */ + static const byte ivc[] = + { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F + }; + + /* Test 4: Camellia-CBC 128-bit key */ + static const byte k4[] = + { + 0x2B, 0x7E, 0x15, 0x16, 0x28, 0xAE, 0xD2, 0xA6, + 0xAB, 0xF7, 0x15, 0x88, 0x09, 0xCF, 0x4F, 0x3C + }; + static const byte c4[] = + { + 0x16, 0x07, 0xCF, 0x49, 0x4B, 0x36, 0xBB, 0xF0, + 0x0D, 0xAE, 0xB0, 0xB5, 0x03, 0xC8, 0x31, 0xAB + }; + + /* Test 5: Camellia-CBC 192-bit key */ + static const byte k5[] = + { + 0x8E, 0x73, 0xB0, 0xF7, 0xDA, 0x0E, 0x64, 0x52, + 0xC8, 0x10, 0xF3, 0x2B, 0x80, 0x90, 0x79, 0xE5, + 0x62, 0xF8, 0xEA, 0xD2, 0x52, 0x2C, 0x6B, 0x7B + }; + static const byte c5[] = + { + 0x2A, 0x48, 0x30, 0xAB, 0x5A, 0xC4, 0xA1, 0xA2, + 0x40, 0x59, 0x55, 0xFD, 0x21, 0x95, 0xCF, 0x93 + }; + + /* Test 6: CBC 256-bit key */ + static const byte k6[] = + { + 0x60, 0x3D, 0xEB, 0x10, 0x15, 0xCA, 0x71, 0xBE, + 0x2B, 0x73, 0xAE, 0xF0, 0x85, 0x7D, 0x77, 0x81, + 0x1F, 0x35, 0x2C, 0x07, 0x3B, 0x61, 0x08, 0xD7, + 0x2D, 0x98, 0x10, 0xA3, 0x09, 0x14, 0xDF, 0xF4 + }; + static const byte c6[] = + { + 0xE6, 0xCF, 0xA3, 0x5F, 0xC0, 0x2B, 0x13, 0x4A, + 0x4D, 0x2C, 0x0B, 0x67, 0x37, 0xAC, 0x3E, 0xDA + }; + + byte out[CAMELLIA_BLOCK_SIZE]; + Camellia cam; + int i, testsSz; + const test_vector_t testVectors[] = + { + {CAM_ECB_ENC, pte, ive, c1, k1, sizeof(k1), -114}, + {CAM_ECB_ENC, pte, ive, c2, k2, sizeof(k2), -115}, + {CAM_ECB_ENC, pte, ive, c3, k3, sizeof(k3), -116}, + {CAM_ECB_DEC, pte, ive, c1, k1, sizeof(k1), -117}, + {CAM_ECB_DEC, pte, ive, c2, k2, sizeof(k2), -118}, + {CAM_ECB_DEC, pte, ive, c3, k3, sizeof(k3), -119}, + {CAM_CBC_ENC, ptc, ivc, c4, k4, sizeof(k4), -120}, + {CAM_CBC_ENC, ptc, ivc, c5, k5, sizeof(k5), -121}, + {CAM_CBC_ENC, ptc, ivc, c6, k6, sizeof(k6), -122}, + {CAM_CBC_DEC, ptc, ivc, c4, k4, sizeof(k4), -123}, + {CAM_CBC_DEC, ptc, ivc, c5, k5, sizeof(k5), -124}, + {CAM_CBC_DEC, ptc, ivc, c6, k6, sizeof(k6), -125} + }; + + if ((sizeof(pte) != CAMELLIA_BLOCK_SIZE) || + (sizeof(ptc) != CAMELLIA_BLOCK_SIZE)) + return -113; + + testsSz = sizeof(testVectors)/sizeof(test_vector_t); + for (i = 0; i < testsSz; i++) { + CamelliaSetKey(&cam, testVectors[i].key, testVectors[i].keySz, + testVectors[i].iv); + + switch (testVectors[i].type) { + case CAM_ECB_ENC: + CamelliaEncryptDirect(&cam, out, testVectors[i].plaintext); + if (memcmp(out, testVectors[i].ciphertext, CAMELLIA_BLOCK_SIZE)) + return testVectors[i].errorCode; + break; + case CAM_ECB_DEC: + CamelliaDecryptDirect(&cam, out, testVectors[i].ciphertext); + if (memcmp(out, testVectors[i].plaintext, CAMELLIA_BLOCK_SIZE)) + return testVectors[i].errorCode; + break; + case CAM_CBC_ENC: + CamelliaCbcEncrypt(&cam, out, testVectors[i].plaintext, + CAMELLIA_BLOCK_SIZE); + if (memcmp(out, testVectors[i].ciphertext, CAMELLIA_BLOCK_SIZE)) + return testVectors[i].errorCode; + break; + case CAM_CBC_DEC: + CamelliaCbcDecrypt(&cam, out, testVectors[i].ciphertext, + CAMELLIA_BLOCK_SIZE); + if (memcmp(out, testVectors[i].plaintext, CAMELLIA_BLOCK_SIZE)) + return testVectors[i].errorCode; + break; + default: + break; + } + } + + /* Setting the IV and checking it was actually set. */ + CamelliaSetIV(&cam, ivc); + if (XMEMCMP(cam.reg, ivc, CAMELLIA_BLOCK_SIZE)) + return -1; + + /* Setting the IV to NULL should leave the IV unchanged */ + if (CamelliaSetIV(&cam, NULL) != 0 || + XMEMCMP(cam.reg, ive, CAMELLIA_BLOCK_SIZE)) + return -1; + + /* First parameter should never be null */ + if (CamelliaSetIV(NULL, NULL) == 0) + return -1; + + /* Key should have a size of 16, 24, or 32 */ + if (CamelliaSetKey(&cam, k1, 0, NULL) == 0) + return -1; + + return 0; +} +#endif /* HAVE_CAMELLIA */ + + +int random_test(void) +{ + RNG rng; + byte block[32]; + int ret; + +#ifdef HAVE_CAVIUM + ret = InitRngCavium(&rng, CAVIUM_DEV_ID); + if (ret != 0) return -2007; +#endif + ret = InitRng(&rng); + if (ret != 0) return -39; + + RNG_GenerateBlock(&rng, block, sizeof(block)); + + return 0; +} + + +#ifdef HAVE_NTRU + +byte GetEntropy(ENTROPY_CMD cmd, byte* out); + +byte GetEntropy(ENTROPY_CMD cmd, byte* out) +{ + static RNG rng; + + if (cmd == INIT) { + int ret = InitRng(&rng); + if (ret == 0) + return 1; + else + return 0; + } + + if (out == NULL) + return 0; + + if (cmd == GET_BYTE_OF_ENTROPY) { + RNG_GenerateBlock(&rng, out, 1); + return 1; + } + + if (cmd == GET_NUM_BYTES_PER_BYTE_OF_ENTROPY) { + *out = 1; + return 1; + } + + return 0; +} + +#endif /* HAVE_NTRU */ + +#ifndef NO_RSA + +#ifdef FREESCALE_MQX + static const char* clientKey = "a:\\certs\\client-key.der"; + static const char* clientCert = "a:\\certs\\client-cert.der"; + #ifdef CYASSL_CERT_GEN + static const char* caKeyFile = "a:\\certs\\ca-key.der"; + static const char* caCertFile = "a:\\certs\\ca-cert.pem"; + #endif +#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) && defined(CYASSL_MKD_SHELL) + static char* clientKey = "certs/client-key.der"; + static char* clientCert = "certs/client-cert.der"; + void set_clientKey(char *key) { clientKey = key ; } /* set by shell command */ + void set_clientCert(char *cert) { clientCert = cert ; } /* set by shell command */ + #ifdef CYASSL_CERT_GEN + static char* caKeyFile = "certs/ca-key.der"; + static char* caCertFile = "certs/ca-cert.pem"; + void set_caKeyFile (char * key) { caKeyFile = key ; } /* set by shell command */ + void set_caCertFile(char * cert) { caCertFile = cert ; } /* set by shell command */ + #endif +#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) + static const char* clientKey = "./certs/client-key.der"; + static const char* clientCert = "./certs/client-cert.der"; + #ifdef CYASSL_CERT_GEN + static const char* caKeyFile = "./certs/ca-key.der"; + static const char* caCertFile = "./certs/ca-cert.pem"; + #endif +#endif + + + +#define FOURK_BUF 4096 + +int rsa_test(void) +{ + byte* tmp; + size_t bytes; + RsaKey key; + RNG rng; + word32 idx = 0; + int ret; + byte in[] = "Everyone gets Friday off."; + word32 inLen = (word32)strlen((char*)in); + byte out[256]; + byte plain[256]; +#if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) + FILE* file, * file2; +#endif +#ifdef CYASSL_TEST_CERT + DecodedCert cert; +#endif + + tmp = (byte*)malloc(FOURK_BUF); + if (tmp == NULL) + return -40; + +#ifdef USE_CERT_BUFFERS_1024 + XMEMCPY(tmp, client_key_der_1024, sizeof_client_key_der_1024); + bytes = sizeof_client_key_der_1024; +#elif defined(USE_CERT_BUFFERS_2048) + XMEMCPY(tmp, client_key_der_2048, sizeof_client_key_der_2048); + bytes = sizeof_client_key_der_2048; +#else + file = fopen(clientKey, "rb"); + + if (!file) + err_sys("can't open ./certs/client-key.der, " + "Please run from CyaSSL home dir", -40); + + bytes = fread(tmp, 1, FOURK_BUF, file); + fclose(file); +#endif /* USE_CERT_BUFFERS */ + +#ifdef HAVE_CAVIUM + RsaInitCavium(&key, CAVIUM_DEV_ID); +#endif + InitRsaKey(&key, 0); + ret = RsaPrivateKeyDecode(tmp, &idx, &key, (word32)bytes); + if (ret != 0) return -41; + + ret = InitRng(&rng); + if (ret != 0) return -42; + + ret = RsaPublicEncrypt(in, inLen, out, sizeof(out), &key, &rng); + if (ret < 0) return -43; + + ret = RsaPrivateDecrypt(out, ret, plain, sizeof(plain), &key); + if (ret < 0) return -44; + + if (memcmp(plain, in, inLen)) return -45; + + ret = RsaSSL_Sign(in, inLen, out, sizeof(out), &key, &rng); + if (ret < 0) return -46; + + memset(plain, 0, sizeof(plain)); + ret = RsaSSL_Verify(out, ret, plain, sizeof(plain), &key); + if (ret < 0) return -47; + + if (memcmp(plain, in, ret)) return -48; + +#if defined(CYASSL_MDK_ARM) + #define sizeof(s) strlen((char *)(s)) +#endif + +#ifdef USE_CERT_BUFFERS_1024 + XMEMCPY(tmp, client_cert_der_1024, sizeof_client_cert_der_1024); + bytes = sizeof_client_cert_der_1024; +#elif defined(USE_CERT_BUFFERS_2048) + XMEMCPY(tmp, client_cert_der_2048, sizeof_client_cert_der_2048); + bytes = sizeof_client_cert_der_2048; +#else + file2 = fopen(clientCert, "rb"); + if (!file2) + return -49; + + bytes = fread(tmp, 1, FOURK_BUF, file2); + fclose(file2); +#endif + +#ifdef sizeof + #undef sizeof +#endif + +#ifdef CYASSL_TEST_CERT + InitDecodedCert(&cert, tmp, (word32)bytes, 0); + + ret = ParseCert(&cert, CERT_TYPE, NO_VERIFY, 0); + if (ret != 0) return -491; + + FreeDecodedCert(&cert); +#else + (void)bytes; +#endif + + +#ifdef CYASSL_KEY_GEN + { + byte* der; + byte* pem; + int derSz = 0; + int pemSz = 0; + RsaKey derIn; + RsaKey genKey; + FILE* keyFile; + FILE* pemFile; + + InitRsaKey(&genKey, 0); + ret = MakeRsaKey(&genKey, 1024, 65537, &rng); + if (ret != 0) + return -301; + + der = (byte*)malloc(FOURK_BUF); + if (der == NULL) + return -307; + pem = (byte*)malloc(FOURK_BUF); + if (pem == NULL) + return -308; + + derSz = RsaKeyToDer(&genKey, der, FOURK_BUF); + if (derSz < 0) + return -302; + + keyFile = fopen("./key.der", "wb"); + if (!keyFile) + return -303; + ret = (int)fwrite(der, derSz, 1, keyFile); + fclose(keyFile); + + pemSz = DerToPem(der, derSz, pem, FOURK_BUF, PRIVATEKEY_TYPE); + if (pemSz < 0) + return -304; + + pemFile = fopen("./key.pem", "wb"); + if (!pemFile) + return -305; + ret = (int)fwrite(pem, pemSz, 1, pemFile); + fclose(pemFile); + + InitRsaKey(&derIn, 0); + idx = 0; + ret = RsaPrivateKeyDecode(der, &idx, &derIn, derSz); + if (ret != 0) + return -306; + + FreeRsaKey(&derIn); + FreeRsaKey(&genKey); + free(pem); + free(der); + } +#endif /* CYASSL_KEY_GEN */ + + +#ifdef CYASSL_CERT_GEN + /* self signed */ + { + Cert myCert; + byte* derCert; + byte* pem; + FILE* derFile; + FILE* pemFile; + int certSz; + int pemSz; +#ifdef CYASSL_TEST_CERT + DecodedCert decode; +#endif + + derCert = (byte*)malloc(FOURK_BUF); + if (derCert == NULL) + return -309; + pem = (byte*)malloc(FOURK_BUF); + if (pem == NULL) + return -310; + + InitCert(&myCert); + + strncpy(myCert.subject.country, "US", CTC_NAME_SIZE); + strncpy(myCert.subject.state, "OR", CTC_NAME_SIZE); + strncpy(myCert.subject.locality, "Portland", CTC_NAME_SIZE); + strncpy(myCert.subject.org, "yaSSL", CTC_NAME_SIZE); + strncpy(myCert.subject.unit, "Development", CTC_NAME_SIZE); + strncpy(myCert.subject.commonName, "www.yassl.com", CTC_NAME_SIZE); + strncpy(myCert.subject.email, "info@yassl.com", CTC_NAME_SIZE); + myCert.isCA = 1; + myCert.sigType = CTC_SHA256wRSA; + + certSz = MakeSelfCert(&myCert, derCert, FOURK_BUF, &key, &rng); + if (certSz < 0) + return -401; + +#ifdef CYASSL_TEST_CERT + InitDecodedCert(&decode, derCert, certSz, 0); + ret = ParseCert(&decode, CERT_TYPE, NO_VERIFY, 0); + if (ret != 0) + return -402; + FreeDecodedCert(&decode); +#endif + derFile = fopen("./cert.der", "wb"); + if (!derFile) + return -403; + ret = (int)fwrite(derCert, certSz, 1, derFile); + fclose(derFile); + + pemSz = DerToPem(derCert, certSz, pem, FOURK_BUF, CERT_TYPE); + if (pemSz < 0) + return -404; + + pemFile = fopen("./cert.pem", "wb"); + if (!pemFile) + return -405; + ret = (int)fwrite(pem, pemSz, 1, pemFile); + fclose(pemFile); + free(pem); + free(derCert); + } + /* CA style */ + { + RsaKey caKey; + Cert myCert; + byte* derCert; + byte* pem; + FILE* derFile; + FILE* pemFile; + int certSz; + int pemSz; + size_t bytes3; + word32 idx3 = 0; + FILE* file3 ; +#ifdef CYASSL_TEST_CERT + DecodedCert decode; +#endif + + derCert = (byte*)malloc(FOURK_BUF); + if (derCert == NULL) + return -311; + pem = (byte*)malloc(FOURK_BUF); + if (pem == NULL) + return -312; + + file3 = fopen(caKeyFile, "rb"); + + if (!file3) + return -412; + + bytes3 = fread(tmp, 1, FOURK_BUF, file3); + fclose(file3); + + InitRsaKey(&caKey, 0); + ret = RsaPrivateKeyDecode(tmp, &idx3, &caKey, (word32)bytes3); + if (ret != 0) return -413; + + InitCert(&myCert); + + strncpy(myCert.subject.country, "US", CTC_NAME_SIZE); + strncpy(myCert.subject.state, "OR", CTC_NAME_SIZE); + strncpy(myCert.subject.locality, "Portland", CTC_NAME_SIZE); + strncpy(myCert.subject.org, "yaSSL", CTC_NAME_SIZE); + strncpy(myCert.subject.unit, "Development", CTC_NAME_SIZE); + strncpy(myCert.subject.commonName, "www.yassl.com", CTC_NAME_SIZE); + strncpy(myCert.subject.email, "info@yassl.com", CTC_NAME_SIZE); + + ret = SetIssuer(&myCert, caCertFile); + if (ret < 0) + return -405; + + certSz = MakeCert(&myCert, derCert, FOURK_BUF, &key, &rng); + if (certSz < 0) + return -407; + + certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng); + if (certSz < 0) + return -408; + + +#ifdef CYASSL_TEST_CERT + InitDecodedCert(&decode, derCert, certSz, 0); + ret = ParseCert(&decode, CERT_TYPE, NO_VERIFY, 0); + if (ret != 0) + return -409; + FreeDecodedCert(&decode); +#endif + + derFile = fopen("./othercert.der", "wb"); + if (!derFile) + return -410; + ret = (int)fwrite(derCert, certSz, 1, derFile); + fclose(derFile); + + pemSz = DerToPem(derCert, certSz, pem, FOURK_BUF, CERT_TYPE); + if (pemSz < 0) + return -411; + + pemFile = fopen("./othercert.pem", "wb"); + if (!pemFile) + return -412; + ret = (int)fwrite(pem, pemSz, 1, pemFile); + fclose(pemFile); + free(pem); + free(derCert); + FreeRsaKey(&caKey); + } +#ifdef HAVE_NTRU + { + RsaKey caKey; + Cert myCert; + byte* derCert; + byte* pem; + FILE* derFile; + FILE* pemFile; + FILE* caFile; + FILE* ntruPrivFile; + int certSz; + int pemSz; + size_t bytes; + word32 idx = 0; +#ifdef CYASSL_TEST_CERT + DecodedCert decode; +#endif + derCert = (byte*)malloc(FOURK_BUF); + if (derCert == NULL) + return -311; + pem = (byte*)malloc(FOURK_BUF); + if (pem == NULL) + return -312; + + byte public_key[557]; /* sized for EES401EP2 */ + word16 public_key_len; /* no. of octets in public key */ + byte private_key[607]; /* sized for EES401EP2 */ + word16 private_key_len; /* no. of octets in private key */ + DRBG_HANDLE drbg; + static uint8_t const pers_str[] = { + 'C', 'y', 'a', 'S', 'S', 'L', ' ', 't', 'e', 's', 't' + }; + word32 rc = crypto_drbg_instantiate(112, pers_str, sizeof(pers_str), + GetEntropy, &drbg); + if (rc != DRBG_OK) + return -450; + + rc = crypto_ntru_encrypt_keygen(drbg, NTRU_EES401EP2, &public_key_len, + NULL, &private_key_len, NULL); + if (rc != NTRU_OK) + return -451; + + rc = crypto_ntru_encrypt_keygen(drbg, NTRU_EES401EP2, &public_key_len, + public_key, &private_key_len, private_key); + crypto_drbg_uninstantiate(drbg); + + if (rc != NTRU_OK) + return -452; + + caFile = fopen(caKeyFile, "rb"); + + if (!caFile) + return -453; + + bytes = fread(tmp, 1, FOURK_BUF, caFile); + fclose(caFile); + + InitRsaKey(&caKey, 0); + ret = RsaPrivateKeyDecode(tmp, &idx, &caKey, (word32)bytes); + if (ret != 0) return -454; + + InitCert(&myCert); + + strncpy(myCert.subject.country, "US", CTC_NAME_SIZE); + strncpy(myCert.subject.state, "OR", CTC_NAME_SIZE); + strncpy(myCert.subject.locality, "Portland", CTC_NAME_SIZE); + strncpy(myCert.subject.org, "yaSSL", CTC_NAME_SIZE); + strncpy(myCert.subject.unit, "Development", CTC_NAME_SIZE); + strncpy(myCert.subject.commonName, "www.yassl.com", CTC_NAME_SIZE); + strncpy(myCert.subject.email, "info@yassl.com", CTC_NAME_SIZE); + + ret = SetIssuer(&myCert, caCertFile); + if (ret < 0) + return -455; + + certSz = MakeNtruCert(&myCert, derCert, FOURK_BUF, public_key, + public_key_len, &rng); + if (certSz < 0) + return -456; + + certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng); + if (certSz < 0) + return -457; + + +#ifdef CYASSL_TEST_CERT + InitDecodedCert(&decode, derCert, certSz, 0); + ret = ParseCert(&decode, CERT_TYPE, NO_VERIFY, 0); + if (ret != 0) + return -458; + FreeDecodedCert(&decode); +#endif + derFile = fopen("./ntru-cert.der", "wb"); + if (!derFile) + return -459; + ret = fwrite(derCert, certSz, 1, derFile); + fclose(derFile); + + pemSz = DerToPem(derCert, certSz, pem, FOURK_BUF, CERT_TYPE); + if (pemSz < 0) + return -460; + + pemFile = fopen("./ntru-cert.pem", "wb"); + if (!pemFile) + return -461; + ret = fwrite(pem, pemSz, 1, pemFile); + fclose(pemFile); + + ntruPrivFile = fopen("./ntru-key.raw", "wb"); + if (!ntruPrivFile) + return -462; + ret = fwrite(private_key, private_key_len, 1, ntruPrivFile); + fclose(ntruPrivFile); + free(pem); + free(derCert); + FreeRsaKey(&caKey); + } +#endif /* HAVE_NTRU */ +#endif /* CYASSL_CERT_GEN */ + + FreeRsaKey(&key); +#ifdef HAVE_CAVIUM + RsaFreeCavium(&key); +#endif + free(tmp); + + return 0; +} + +#endif + + +#ifndef NO_DH + +#ifdef FREESCALE_MQX + static const char* dhKey = "a:\certs\\dh2048.der"; +#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) + static const char* dhKey = "./certs/dh2048.der"; +#endif + +int dh_test(void) +{ + int ret; + word32 bytes; + word32 idx = 0, privSz, pubSz, privSz2, pubSz2, agreeSz, agreeSz2; + byte tmp[1024]; + byte priv[256]; + byte pub[256]; + byte priv2[256]; + byte pub2[256]; + byte agree[256]; + byte agree2[256]; + DhKey key; + DhKey key2; + RNG rng; + + +#ifdef USE_CERT_BUFFERS_1024 + XMEMCPY(tmp, dh_key_der_1024, sizeof_dh_key_der_1024); + bytes = sizeof_dh_key_der_1024; +#elif defined(USE_CERT_BUFFERS_2048) + XMEMCPY(tmp, dh_key_der_2048, sizeof_dh_key_der_2048); + bytes = sizeof_dh_key_der_2048; +#else + FILE* file = fopen(dhKey, "rb"); + + if (!file) + return -50; + + bytes = (word32) fread(tmp, 1, sizeof(tmp), file); + fclose(file); +#endif /* USE_CERT_BUFFERS */ + + InitDhKey(&key); + InitDhKey(&key2); + ret = DhKeyDecode(tmp, &idx, &key, bytes); + if (ret != 0) + return -51; + + idx = 0; + ret = DhKeyDecode(tmp, &idx, &key2, bytes); + if (ret != 0) + return -52; + + ret = InitRng(&rng); + if (ret != 0) + return -53; + + ret = DhGenerateKeyPair(&key, &rng, priv, &privSz, pub, &pubSz); + ret += DhGenerateKeyPair(&key2, &rng, priv2, &privSz2, pub2, &pubSz2); + if (ret != 0) + return -54; + + ret = DhAgree(&key, agree, &agreeSz, priv, privSz, pub2, pubSz2); + ret += DhAgree(&key2, agree2, &agreeSz2, priv2, privSz2, pub, pubSz); + if (ret != 0) + return -55; + + if (memcmp(agree, agree2, agreeSz)) + return -56; + + FreeDhKey(&key); + FreeDhKey(&key2); + + return 0; +} + +#endif /* NO_DH */ + + +#ifndef NO_DSA + +#ifdef FREESCALE_MQX + static const char* dsaKey = "a:\\certs\\dsa2048.der"; +#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) + static const char* dsaKey = "./certs/dsa2048.der"; +#endif + +int dsa_test(void) +{ + int ret, answer; + word32 bytes; + word32 idx = 0; + byte tmp[1024]; + DsaKey key; + RNG rng; + Sha sha; + byte hash[SHA_DIGEST_SIZE]; + byte signature[40]; + + +#ifdef USE_CERT_BUFFERS_1024 + XMEMCPY(tmp, dsa_key_der_1024, sizeof_dsa_key_der_1024); + bytes = sizeof_dsa_key_der_1024; +#elif defined(USE_CERT_BUFFERS_2048) + XMEMCPY(tmp, dsa_key_der_2048, sizeof_dsa_key_der_2048); + bytes = sizeof_dsa_key_der_2048; +#else + FILE* file = fopen(dsaKey, "rb"); + + if (!file) + return -60; + + bytes = (word32) fread(tmp, 1, sizeof(tmp), file); + fclose(file); +#endif /* USE_CERT_BUFFERS */ + + InitSha(&sha); + ShaUpdate(&sha, tmp, bytes); + ShaFinal(&sha, hash); + + InitDsaKey(&key); + ret = DsaPrivateKeyDecode(tmp, &idx, &key, bytes); + if (ret != 0) return -61; + + ret = InitRng(&rng); + if (ret != 0) return -62; + + ret = DsaSign(hash, signature, &key, &rng); + if (ret != 0) return -63; + + ret = DsaVerify(hash, signature, &key, &answer); + if (ret != 0) return -64; + if (answer != 1) return -65; + + FreeDsaKey(&key); + + return 0; +} + +#endif /* NO_DSA */ + + +#ifdef OPENSSL_EXTRA + +int openssl_test(void) +{ + EVP_MD_CTX md_ctx; + testVector a, b, c, d, e, f; + byte hash[SHA_DIGEST_SIZE*4]; /* max size */ + + (void)e; + (void)f; + + a.input = "1234567890123456789012345678901234567890123456789012345678" + "9012345678901234567890"; + a.output = "\x57\xed\xf4\xa2\x2b\xe3\xc9\x55\xac\x49\xda\x2e\x21\x07\xb6" + "\x7a"; + a.inLen = strlen(a.input); + a.outLen = MD5_DIGEST_SIZE; + + EVP_MD_CTX_init(&md_ctx); + EVP_DigestInit(&md_ctx, EVP_md5()); + + EVP_DigestUpdate(&md_ctx, a.input, a.inLen); + EVP_DigestFinal(&md_ctx, hash, 0); + + if (memcmp(hash, a.output, MD5_DIGEST_SIZE) != 0) + return -71; + + b.input = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" + "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" + "aaaaaaaaaa"; + b.output = "\xAD\x5B\x3F\xDB\xCB\x52\x67\x78\xC2\x83\x9D\x2F\x15\x1E\xA7" + "\x53\x99\x5E\x26\xA0"; + b.inLen = strlen(b.input); + b.outLen = SHA_DIGEST_SIZE; + + EVP_MD_CTX_init(&md_ctx); + EVP_DigestInit(&md_ctx, EVP_sha1()); + + EVP_DigestUpdate(&md_ctx, b.input, b.inLen); + EVP_DigestFinal(&md_ctx, hash, 0); + + if (memcmp(hash, b.output, SHA_DIGEST_SIZE) != 0) + return -72; + + + d.input = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"; + d.output = "\x24\x8D\x6A\x61\xD2\x06\x38\xB8\xE5\xC0\x26\x93\x0C\x3E\x60" + "\x39\xA3\x3C\xE4\x59\x64\xFF\x21\x67\xF6\xEC\xED\xD4\x19\xDB" + "\x06\xC1"; + d.inLen = strlen(d.input); + d.outLen = SHA256_DIGEST_SIZE; + + EVP_MD_CTX_init(&md_ctx); + EVP_DigestInit(&md_ctx, EVP_sha256()); + + EVP_DigestUpdate(&md_ctx, d.input, d.inLen); + EVP_DigestFinal(&md_ctx, hash, 0); + + if (memcmp(hash, d.output, SHA256_DIGEST_SIZE) != 0) + return -78; + +#ifdef CYASSL_SHA384 + + e.input = "abcdefghbcdefghicdefghijdefghijkefghijklfghijklmghijklmnhi" + "jklmnoijklmnopjklmnopqklmnopqrlmnopqrsmnopqrstnopqrstu"; + e.output = "\x09\x33\x0c\x33\xf7\x11\x47\xe8\x3d\x19\x2f\xc7\x82\xcd\x1b" + "\x47\x53\x11\x1b\x17\x3b\x3b\x05\xd2\x2f\xa0\x80\x86\xe3\xb0" + "\xf7\x12\xfc\xc7\xc7\x1a\x55\x7e\x2d\xb9\x66\xc3\xe9\xfa\x91" + "\x74\x60\x39"; + e.inLen = strlen(e.input); + e.outLen = SHA384_DIGEST_SIZE; + + EVP_MD_CTX_init(&md_ctx); + EVP_DigestInit(&md_ctx, EVP_sha384()); + + EVP_DigestUpdate(&md_ctx, e.input, e.inLen); + EVP_DigestFinal(&md_ctx, hash, 0); + + if (memcmp(hash, e.output, SHA384_DIGEST_SIZE) != 0) + return -79; + +#endif /* CYASSL_SHA384 */ + + +#ifdef CYASSL_SHA512 + + f.input = "abcdefghbcdefghicdefghijdefghijkefghijklfghijklmghijklmnhi" + "jklmnoijklmnopjklmnopqklmnopqrlmnopqrsmnopqrstnopqrstu"; + f.output = "\x8e\x95\x9b\x75\xda\xe3\x13\xda\x8c\xf4\xf7\x28\x14\xfc\x14" + "\x3f\x8f\x77\x79\xc6\xeb\x9f\x7f\xa1\x72\x99\xae\xad\xb6\x88" + "\x90\x18\x50\x1d\x28\x9e\x49\x00\xf7\xe4\x33\x1b\x99\xde\xc4" + "\xb5\x43\x3a\xc7\xd3\x29\xee\xb6\xdd\x26\x54\x5e\x96\xe5\x5b" + "\x87\x4b\xe9\x09"; + f.inLen = strlen(f.input); + f.outLen = SHA512_DIGEST_SIZE; + + EVP_MD_CTX_init(&md_ctx); + EVP_DigestInit(&md_ctx, EVP_sha512()); + + EVP_DigestUpdate(&md_ctx, f.input, f.inLen); + EVP_DigestFinal(&md_ctx, hash, 0); + + if (memcmp(hash, f.output, SHA512_DIGEST_SIZE) != 0) + return -80; + +#endif /* CYASSL_SHA512 */ + + + if (RAND_bytes(hash, sizeof(hash)) != 1) + return -73; + + c.input = "what do ya want for nothing?"; + c.output = "\x75\x0c\x78\x3e\x6a\xb0\xb5\x03\xea\xa8\x6e\x31\x0a\x5d\xb7" + "\x38"; + c.inLen = strlen(c.input); + c.outLen = MD5_DIGEST_SIZE; + + HMAC(EVP_md5(), "Jefe", 4, (byte*)c.input, (int)c.inLen, hash, 0); + + if (memcmp(hash, c.output, MD5_DIGEST_SIZE) != 0) + return -74; + + { /* des test */ + const byte vector[] = { /* "now is the time for all " w/o trailing 0 */ + 0x6e,0x6f,0x77,0x20,0x69,0x73,0x20,0x74, + 0x68,0x65,0x20,0x74,0x69,0x6d,0x65,0x20, + 0x66,0x6f,0x72,0x20,0x61,0x6c,0x6c,0x20 + }; + + byte plain[24]; + byte cipher[24]; + + const_DES_cblock key = + { + 0x01,0x23,0x45,0x67,0x89,0xab,0xcd,0xef + }; + + DES_cblock iv = + { + 0x12,0x34,0x56,0x78,0x90,0xab,0xcd,0xef + }; + + DES_key_schedule sched; + + const byte verify[] = + { + 0x8b,0x7c,0x52,0xb0,0x01,0x2b,0x6c,0xb8, + 0x4f,0x0f,0xeb,0xf3,0xfb,0x5f,0x86,0x73, + 0x15,0x85,0xb3,0x22,0x4b,0x86,0x2b,0x4b + }; + + DES_key_sched(&key, &sched); + + DES_cbc_encrypt(vector, cipher, sizeof(vector), &sched, &iv, DES_ENCRYPT); + DES_cbc_encrypt(cipher, plain, sizeof(vector), &sched, &iv, DES_DECRYPT); + + if (memcmp(plain, vector, sizeof(vector)) != 0) + return -75; + + if (memcmp(cipher, verify, sizeof(verify)) != 0) + return -76; + + /* test changing iv */ + DES_ncbc_encrypt(vector, cipher, 8, &sched, &iv, DES_ENCRYPT); + DES_ncbc_encrypt(vector + 8, cipher + 8, 16, &sched, &iv, DES_ENCRYPT); + + if (memcmp(cipher, verify, sizeof(verify)) != 0) + return -77; + + } /* end des test */ + + { /* evp_cipher test */ + EVP_CIPHER_CTX ctx; + + + const byte msg[] = { /* "Now is the time for all " w/o trailing 0 */ + 0x6e,0x6f,0x77,0x20,0x69,0x73,0x20,0x74, + 0x68,0x65,0x20,0x74,0x69,0x6d,0x65,0x20, + 0x66,0x6f,0x72,0x20,0x61,0x6c,0x6c,0x20 + }; + + const byte verify[] = + { + 0x95,0x94,0x92,0x57,0x5f,0x42,0x81,0x53, + 0x2c,0xcc,0x9d,0x46,0x77,0xa2,0x33,0xcb + }; + + byte key[] = "0123456789abcdef "; /* align */ + byte iv[] = "1234567890abcdef "; /* align */ + + byte cipher[AES_BLOCK_SIZE * 4]; + byte plain [AES_BLOCK_SIZE * 4]; + + EVP_CIPHER_CTX_init(&ctx); + if (EVP_CipherInit(&ctx, EVP_aes_128_cbc(), key, iv, 1) == 0) + return -81; + + if (EVP_Cipher(&ctx, cipher, (byte*)msg, 16) == 0) + return -82; + + if (memcmp(cipher, verify, AES_BLOCK_SIZE)) + return -83; + + EVP_CIPHER_CTX_init(&ctx); + if (EVP_CipherInit(&ctx, EVP_aes_128_cbc(), key, iv, 0) == 0) + return -84; + + if (EVP_Cipher(&ctx, plain, cipher, 16) == 0) + return -85; + + if (memcmp(plain, msg, AES_BLOCK_SIZE)) + return -86; + + + } /* end evp_cipher test */ + + return 0; +} + +#endif /* OPENSSL_EXTRA */ + + +#ifndef NO_PWDBASED + +int pkcs12_test(void) +{ + const byte passwd[] = { 0x00, 0x73, 0x00, 0x6d, 0x00, 0x65, 0x00, 0x67, + 0x00, 0x00 }; + const byte salt[] = { 0x0a, 0x58, 0xCF, 0x64, 0x53, 0x0d, 0x82, 0x3f }; + + const byte passwd2[] = { 0x00, 0x71, 0x00, 0x75, 0x00, 0x65, 0x00, 0x65, + 0x00, 0x67, 0x00, 0x00 }; + const byte salt2[] = { 0x16, 0x82, 0xC0, 0xfC, 0x5b, 0x3f, 0x7e, 0xc5 }; + byte derived[64]; + + const byte verify[] = { + 0x8A, 0xAA, 0xE6, 0x29, 0x7B, 0x6C, 0xB0, 0x46, + 0x42, 0xAB, 0x5B, 0x07, 0x78, 0x51, 0x28, 0x4E, + 0xB7, 0x12, 0x8F, 0x1A, 0x2A, 0x7F, 0xBC, 0xA3 + }; + + const byte verify2[] = { + 0x48, 0x3D, 0xD6, 0xE9, 0x19, 0xD7, 0xDE, 0x2E, + 0x8E, 0x64, 0x8B, 0xA8, 0xF8, 0x62, 0xF3, 0xFB, + 0xFB, 0xDC, 0x2B, 0xCB, 0x2C, 0x02, 0x95, 0x7F + }; + + int id = 1; + int kLen = 24; + int iterations = 1; + int ret = PKCS12_PBKDF(derived, passwd, sizeof(passwd), salt, 8, iterations, + kLen, SHA, id); + + if (ret < 0) + return -103; + + if ( (ret = memcmp(derived, verify, kLen)) != 0) + return -104; + + iterations = 1000; + ret = PKCS12_PBKDF(derived, passwd2, sizeof(passwd2), salt2, 8, iterations, + kLen, SHA, id); + if (ret < 0) + return -105; + + if ( (ret = memcmp(derived, verify2, 24)) != 0) + return -106; + + return 0; +} + + +int pbkdf2_test(void) +{ + char passwd[] = "password"; + const byte salt[] = { 0x78, 0x57, 0x8E, 0x5a, 0x5d, 0x63, 0xcb, 0x06 }; + int iterations = 2048; + int kLen = 24; + byte derived[64]; + + const byte verify[] = { + 0xBF, 0xDE, 0x6B, 0xE9, 0x4D, 0xF7, 0xE1, 0x1D, 0xD4, 0x09, 0xBC, 0xE2, + 0x0A, 0x02, 0x55, 0xEC, 0x32, 0x7C, 0xB9, 0x36, 0xFF, 0xE9, 0x36, 0x43 + + }; + + PBKDF2(derived, (byte*)passwd, (int)strlen(passwd), salt, 8, iterations, + kLen, SHA); + + if (memcmp(derived, verify, sizeof(verify)) != 0) + return -102; + + return 0; +} + + +int pbkdf1_test(void) +{ + char passwd[] = "password"; + const byte salt[] = { 0x78, 0x57, 0x8E, 0x5a, 0x5d, 0x63, 0xcb, 0x06 }; + int iterations = 1000; + int kLen = 16; + byte derived[16]; + + const byte verify[] = { + 0xDC, 0x19, 0x84, 0x7E, 0x05, 0xC6, 0x4D, 0x2F, 0xAF, 0x10, 0xEB, 0xFB, + 0x4A, 0x3D, 0x2A, 0x20 + }; + + PBKDF1(derived, (byte*)passwd, (int)strlen(passwd), salt, 8, iterations, + kLen, SHA); + + if (memcmp(derived, verify, sizeof(verify)) != 0) + return -101; + + return 0; +} + + +int pwdbased_test(void) +{ + int ret = pbkdf1_test(); + ret += pbkdf2_test(); + + return ret + pkcs12_test(); +} + +#endif /* NO_PWDBASED */ + + +#ifdef HAVE_ECC + +int ecc_test(void) +{ + RNG rng; + byte sharedA[1024]; + byte sharedB[1024]; + byte sig[1024]; + byte digest[20]; + byte exportBuf[1024]; + word32 x, y; + int i, verify, ret; + ecc_key userA, userB, pubKey; + + ret = InitRng(&rng); + if (ret != 0) + return -1001; + + ecc_init(&userA); + ecc_init(&userB); + ecc_init(&pubKey); + + ret = ecc_make_key(&rng, 32, &userA); + ret = ecc_make_key(&rng, 32, &userB); + + if (ret != 0) + return -1002; + + x = sizeof(sharedA); + ret = ecc_shared_secret(&userA, &userB, sharedA, &x); + + y = sizeof(sharedB); + ret = ecc_shared_secret(&userB, &userA, sharedB, &y); + + if (ret != 0) + return -1003; + + if (y != x) + return -1004; + + if (memcmp(sharedA, sharedB, x)) + return -1005; + + x = sizeof(exportBuf); + ret = ecc_export_x963(&userA, exportBuf, &x); + if (ret != 0) + return -1006; + + ret = ecc_import_x963(exportBuf, x, &pubKey); + + if (ret != 0) + return -1007; + + y = sizeof(sharedB); + ret = ecc_shared_secret(&userB, &pubKey, sharedB, &y); + + if (ret != 0) + return -1008; + + if (memcmp(sharedA, sharedB, y)) + return -1010; + + /* test DSA sign hash */ + for (i = 0; i < (int)sizeof(digest); i++) + digest[i] = i; + + x = sizeof(sig); + ret = ecc_sign_hash(digest, sizeof(digest), sig, &x, &rng, &userA); + + verify = 0; + ret = ecc_verify_hash(sig, x, digest, sizeof(digest), &verify, &userA); + + if (ret != 0) + return -1011; + + if (verify != 1) + return -1012; + + ecc_free(&pubKey); + ecc_free(&userB); + ecc_free(&userA); + + return 0; +} + +#endif /* HAVE_ECC */ + +#ifdef HAVE_LIBZ + +const byte sample_text[] = + "Biodiesel cupidatat marfa, cliche aute put a bird on it incididunt elit\n" + "polaroid. Sunt tattooed bespoke reprehenderit. Sint twee organic id\n" + "marfa. Commodo veniam ad esse gastropub. 3 wolf moon sartorial vero,\n" + "plaid delectus biodiesel squid +1 vice. Post-ironic keffiyeh leggings\n" + "selfies cray fap hoodie, forage anim. Carles cupidatat shoreditch, VHS\n" + "small batch meggings kogi dolore food truck bespoke gastropub.\n" + "\n" + "Terry richardson adipisicing actually typewriter tumblr, twee whatever\n" + "four loko you probably haven't heard of them high life. Messenger bag\n" + "whatever tattooed deep v mlkshk. Brooklyn pinterest assumenda chillwave\n" + "et, banksy ullamco messenger bag umami pariatur direct trade forage.\n" + "Typewriter culpa try-hard, pariatur sint brooklyn meggings. Gentrify\n" + "food truck next level, tousled irony non semiotics PBR ethical anim cred\n" + "readymade. Mumblecore brunch lomo odd future, portland organic terry\n" + "richardson elit leggings adipisicing ennui raw denim banjo hella. Godard\n" + "mixtape polaroid, pork belly readymade organic cray typewriter helvetica\n" + "four loko whatever street art yr farm-to-table.\n" + "\n" + "Vinyl keytar vice tofu. Locavore you probably haven't heard of them pug\n" + "pickled, hella tonx labore truffaut DIY mlkshk elit cosby sweater sint\n" + "et mumblecore. Elit swag semiotics, reprehenderit DIY sartorial nisi ugh\n" + "nesciunt pug pork belly wayfarers selfies delectus. Ethical hoodie\n" + "seitan fingerstache kale chips. Terry richardson artisan williamsburg,\n" + "eiusmod fanny pack irony tonx ennui lo-fi incididunt tofu YOLO\n" + "readymade. 8-bit sed ethnic beard officia. Pour-over iphone DIY butcher,\n" + "ethnic art party qui letterpress nisi proident jean shorts mlkshk\n" + "locavore.\n" + "\n" + "Narwhal flexitarian letterpress, do gluten-free voluptate next level\n" + "banh mi tonx incididunt carles DIY. Odd future nulla 8-bit beard ut\n" + "cillum pickled velit, YOLO officia you probably haven't heard of them\n" + "trust fund gastropub. Nisi adipisicing tattooed, Austin mlkshk 90's\n" + "small batch american apparel. Put a bird on it cosby sweater before they\n" + "sold out pork belly kogi hella. Street art mollit sustainable polaroid,\n" + "DIY ethnic ea pug beard dreamcatcher cosby sweater magna scenester nisi.\n" + "Sed pork belly skateboard mollit, labore proident eiusmod. Sriracha\n" + "excepteur cosby sweater, anim deserunt laborum eu aliquip ethical et\n" + "neutra PBR selvage.\n" + "\n" + "Raw denim pork belly truffaut, irony plaid sustainable put a bird on it\n" + "next level jean shorts exercitation. Hashtag keytar whatever, nihil\n" + "authentic aliquip disrupt laborum. Tattooed selfies deserunt trust fund\n" + "wayfarers. 3 wolf moon synth church-key sartorial, gastropub leggings\n" + "tattooed. Labore high life commodo, meggings raw denim fingerstache pug\n" + "trust fund leggings seitan forage. Nostrud ullamco duis, reprehenderit\n" + "incididunt flannel sustainable helvetica pork belly pug banksy you\n" + "probably haven't heard of them nesciunt farm-to-table. Disrupt nostrud\n" + "mollit magna, sriracha sartorial helvetica.\n" + "\n" + "Nulla kogi reprehenderit, skateboard sustainable duis adipisicing viral\n" + "ad fanny pack salvia. Fanny pack trust fund you probably haven't heard\n" + "of them YOLO vice nihil. Keffiyeh cray lo-fi pinterest cardigan aliqua,\n" + "reprehenderit aute. Culpa tousled williamsburg, marfa lomo actually anim\n" + "skateboard. Iphone aliqua ugh, semiotics pariatur vero readymade\n" + "organic. Marfa squid nulla, in laborum disrupt laboris irure gastropub.\n" + "Veniam sunt food truck leggings, sint vinyl fap.\n" + "\n" + "Hella dolore pork belly, truffaut carles you probably haven't heard of\n" + "them PBR helvetica in sapiente. Fashion axe ugh bushwick american\n" + "apparel. Fingerstache sed iphone, jean shorts blue bottle nisi bushwick\n" + "flexitarian officia veniam plaid bespoke fap YOLO lo-fi. Blog\n" + "letterpress mumblecore, food truck id cray brooklyn cillum ad sed.\n" + "Assumenda chambray wayfarers vinyl mixtape sustainable. VHS vinyl\n" + "delectus, culpa williamsburg polaroid cliche swag church-key synth kogi\n" + "magna pop-up literally. Swag thundercats ennui shoreditch vegan\n" + "pitchfork neutra truffaut etsy, sed single-origin coffee craft beer.\n" + "\n" + "Odio letterpress brooklyn elit. Nulla single-origin coffee in occaecat\n" + "meggings. Irony meggings 8-bit, chillwave lo-fi adipisicing cred\n" + "dreamcatcher veniam. Put a bird on it irony umami, trust fund bushwick\n" + "locavore kale chips. Sriracha swag thundercats, chillwave disrupt\n" + "tousled beard mollit mustache leggings portland next level. Nihil esse\n" + "est, skateboard art party etsy thundercats sed dreamcatcher ut iphone\n" + "swag consectetur et. Irure skateboard banjo, nulla deserunt messenger\n" + "bag dolor terry richardson sapiente.\n"; + + +int compress_test(void) +{ + int ret = 0; + word32 dSz = sizeof(sample_text); + word32 cSz = (dSz + (word32)(dSz * 0.001) + 12); + byte *c = NULL; + byte *d = NULL; + + c = calloc(cSz, sizeof(byte)); + d = calloc(dSz, sizeof(byte)); + + if (c == NULL || d == NULL) + ret = -300; + + if (ret == 0 && (ret = Compress(c, cSz, sample_text, dSz, 0)) < 0) + ret = -301; + + if (ret > 0) { + cSz = (word32)ret; + ret = 0; + } + + if (ret == 0 && DeCompress(d, dSz, c, cSz) != (int)dSz) + ret = -302; + + if (ret == 0 && memcmp(d, sample_text, dSz)) + ret = -303; + + if (c) free(c); + if (d) free(d); + + return ret; +} + +#endif /* HAVE_LIBZ */ + +#endif /* NO_CRYPT_TEST */ diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/Abstract.txt b/IDE/MDK5-ARM/Projects/CyaSSL-Full/Abstract.txt new file mode 100644 index 000000000..b541cb662 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/Abstract.txt @@ -0,0 +1,89 @@ +This program gives wolfCrypt and CyaSSL library demo. + +In order to run the demo, +Copy {PACK}\wolfSSL\CyaSSL\2.8.0\cyassl\certs folder and files to the SD memory. +For demo configuration, refer config-Crypt.h and config-CyaSSL.h. + +After download and start the execution, you can type in commands through the +Debug(printf) viewer. + +time [-d date][-t time] Set/Get RTC: The time is used for certificate validation. +test wolfCrypt Simple test suite +benchmark wolfCrypt Simple benchmark +server& simple server in background mode +client simple client +echoserver& echo server in background mode +echoclient echo client +server/client -h help for server/client command + + +=== Typical Command Usage Scenario === + +Starting Shell +>time -d 9/23/2013 +>time +Date: 9/23/2013, Time: 00:38:31 +>test +MD5 test passed! +MD4 test passed! +SHA test passed! +... + +>benchmark +AES 25 kB took 0.025 seconds, 0.96 MB/s +ARC4 25 kB took 0.006 seconds, 3.83 MB/s +... + +DH 2048 key agreement 685.93 milliseconds, avg over 1 iterations + +>echoserver& +"echoserver" is running with the background mode. + +>echoclient +ABCDEFG +ABCDEFG +WXYZ +WXYZ +quit +sending server shutdown command: quit! +client sent quit command: shutting down! + +>server& +"server" is running with the background mode. + +>client +peer's cert info: + issuer : /C=... + subject: /C=... + serial number:02 +SSL version is TLSv1.2 +SSL cipher suite is TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 +peer's cert info: + issuer : /C=... + subject: /C=... + serial number:... +SSL version is TLSv1.2 +SSL cipher suite is TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 +Client message: hello cyassl! +Server response: I hear you fa shizzle! + +>client -h 192.168.2.100 -p 443 -g -v 0 +peer's cert info: + issuer : /CN=... + subject: /CN=... + serial number:44:39:... +SSL version is SSLv3 +SSL cipher suite is SSL_RSA_WITH_RC4_128_SHA +SSL connect ok, sending GET... +... +=== + +For the hardware crypt on config-Crypt.h, download +STSW-STM32062: STM32F2xx standard peripherals library at +http://www.st.com/. Copy Libraries\STM32F2xx_StdPeriph_Driver\{inc,src} to + {PACK}\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib + + +Support +------- +Please send questions or comments to support@wolfssl.com diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvguix.kojo b/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvguix.kojo new file mode 100644 index 000000000..6bb8a7870 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvguix.kojo @@ -0,0 +1,1342 @@ + + + + -4.1 + +
### uVision Project, (C) Keil Software
+ + + + + + 38003 + Registers + 115 159 + + + 346 + Code Coverage + 966 160 + + + 204 + Performance Analyzer + 1126 + + + + + + 1506 + Symbols + + 133 133 133 + + + 1936 + Watch 1 + + 133 133 133 + + + 1937 + Watch 2 + + 133 133 133 + + + 1935 + Call Stack + Locals + + 133 133 133 + + + 2506 + Trace Data + + 75 135 130 95 70 230 200 + + + + + + 1 + 1 + 0 + + + + + + + 44 + 0 + 1 + + -1 + -1 + + + -1 + -1 + + + 148 + 32 + 1713 + 1071 + + + + 0 + + 60 + 010000000400000001000000010000000100000001000000000000000200000000000000010000000100000000000000280000002800000000000000 + + + + 0 + Build + + -1 + -1 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 200100004F00000090050000DF000000 + + + 16 + 8A000000A10000005203000031010000 + + + + 1005 + 1005 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000660000001901000048030000 + + + 16 + 8A000000A1000000A6010000E1020000 + + + + 109 + 109 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000660000001901000048030000 + + + 16 + 8A000000A1000000A6010000E1020000 + + + + 1465 + 1465 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 000000002D02000090050000BD020000 + + + 16 + 8A000000A10000005203000031010000 + + + + 1466 + 1466 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000300200008D05000090020000 + + + 16 + 8A000000A10000005203000031010000 + + + + 1467 + 1467 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000300200008D05000090020000 + + + 16 + 8A000000A10000005203000031010000 + + + + 1468 + 1468 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000300200008D05000090020000 + + + 16 + 8A000000A10000005203000031010000 + + + + 1506 + 1506 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + 03040000660000008D050000C6010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 1913 + 1913 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 200100006300000090050000DF000000 + + + 16 + 8A000000A10000005203000031010000 + + + + 1935 + 1935 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 03000000300200008D050000A4020000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 1936 + 1936 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000300200008D05000090020000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 1937 + 1937 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000300200008D05000090020000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 1939 + 1939 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000300200008D05000090020000 + + + 16 + 8A000000A10000005203000031010000 + + + + 1940 + 1940 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000300200008D05000090020000 + + + 16 + 8A000000A10000005203000031010000 + + + + 1941 + 1941 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000300200008D05000090020000 + + + 16 + 8A000000A10000005203000031010000 + + + + 1942 + 1942 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000300200008D05000090020000 + + + 16 + 8A000000A10000005203000031010000 + + + + 195 + 195 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000660000001901000048030000 + + + 16 + 8A000000A1000000A6010000E1020000 + + + + 196 + 196 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000660000001901000048030000 + + + 16 + 8A000000A1000000A6010000E1020000 + + + + 197 + 197 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 000000004102000090050000BD020000 + + + 16 + 8A000000A10000005203000031010000 + + + + 198 + 198 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 000000001902000090050000BD020000 + + + 16 + 8A000000A10000005203000031010000 + + + + 199 + 199 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000440200008D050000A4020000 + + + 16 + 8A000000A10000005203000031010000 + + + + 203 + 203 + 0 + 0 + 0 + 0 + 32767 + 0 + 8192 + 0 + + 16 + 200100006300000090050000DF000000 + + + 16 + 8A000000A10000005203000031010000 + + + + 204 + 204 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 23010000660000008D050000C6000000 + + + 16 + 8A000000A10000005203000031010000 + + + + 221 + 221 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 00000000000000000000000000000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 2506 + 2506 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 00040000630000009005000029020000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 2507 + 2507 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 000000002D02000090050000A9020000 + + + 16 + 8A000000A10000005203000031010000 + + + + 343 + 343 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 23010000660000008D050000C6000000 + + + 16 + 8A000000A10000005203000031010000 + + + + 346 + 346 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 23010000660000008D050000C6000000 + + + 16 + 8A000000A10000005203000031010000 + + + + 35824 + 35824 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 23010000660000008D050000C6000000 + + + 16 + 8A000000A10000005203000031010000 + + + + 35885 + 35885 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35886 + 35886 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35887 + 35887 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35888 + 35888 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35889 + 35889 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35890 + 35890 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35891 + 35891 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35892 + 35892 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35893 + 35893 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35894 + 35894 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35895 + 35895 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35896 + 35896 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35897 + 35897 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35898 + 35898 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35899 + 35899 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35900 + 35900 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35901 + 35901 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35902 + 35902 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35903 + 35903 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35904 + 35904 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 35905 + 35905 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03040000660000008D0500007C010000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 38003 + 38003 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000006600000019010000A4020000 + + + 16 + 8A000000A1000000A6010000E1020000 + + + + 38007 + 38007 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 000000004102000090050000BD020000 + + + 16 + 8A000000A10000005203000031010000 + + + + 436 + 436 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000440200008D050000A4020000 + + + 16 + 8A000000A1000000A6010000E1020000 + + + + 437 + 437 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000300200008D05000090020000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 440 + 440 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000300200008D05000090020000 + + + 16 + 8A000000A10000001A02000031020000 + + + + 59392 + 59392 + 1 + 0 + 0 + 0 + 32767 + 0 + 8192 + 0 + + 16 + 0000000000000000B70300001C000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59393 + 0 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 00000000610300008106000074030000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59399 + 59399 + 1 + 0 + 0 + 0 + 32767 + 0 + 8192 + 1 + + 16 + 000000001C000000C201000038000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59400 + 59400 + 0 + 0 + 0 + 0 + 32767 + 0 + 8192 + 2 + + 16 + 00000000380000006F02000054000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 2619 + 000000000B000000000000000020000000000000FFFFFFFFFFFFFFFF20010000DF00000090050000E3000000000000000100001004000000010000000000000000000000FFFFFFFF06000000CB00000057010000CC000000F08B00005A01000079070000FFFF02000B004354616262656450616E6500200000000000008A000000A10000005203000031010000200100004F00000090050000DF0000000000000040280046060000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFFFC0300004F0000000004000029020000000000000200001004000000010000000000000000000000FFFFFFFF17000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C0000018000400000000000008A000000A10000001A02000031020000000400004F00000090050000290200000000000040410046170000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000001000000FFFFFFFFFFFFFFFF1C0100004F0000002001000061030000010000000200001004000000010000000000000000000000FFFFFFFF05000000ED0300006D000000C3000000C400000073940000018000100000010000008A000000A1000000A6010000E1020000000000004F0000001C010000610300000000000040140056050000000750726F6A65637401000000ED03000001000000FFFFFFFFFFFFFFFF05426F6F6B73010000006D00000001000000FFFFFFFFFFFFFFFF0946756E6374696F6E7301000000C300000001000000FFFFFFFFFFFFFFFF0954656D706C6174657301000000C400000001000000FFFFFFFFFFFFFFFF09526567697374657273000000007394000001000000FFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFED03000001000000FFFFFFFFED030000000000000080000000000000FFFFFFFFFFFFFFFF0000000015020000900500001902000000000000010000100400000001000000000000000000000000000000000000000000000001000000C6000000FFFFFFFF0E0000008F070000930700009407000095070000960700009007000091070000B5010000B8010000B9050000BA050000BB050000BC050000CB090000018000400000000000008A000000A10000001A02000031020000000000001902000090050000BD02000000000000404100460E0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031000000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFFFFFFFFFF0000000001000000000000000000000001000000FFFFFFFFC802000019020000CC020000BD02000000000000020000000400000000000000000000000000000000000000000000000000000002000000C6000000FFFFFFFF8F07000001000000FFFFFFFF8F07000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF0000000029020000900500002D020000000000000100001004000000010000000000000000000000FFFFFFFF04000000C5000000C7000000B401000077940000018000800000000000008A000000A10000005203000031010000000000002D02000090050000BD0200000000000040820046040000000C4275696C64204F757470757401000000C500000001000000FFFFFFFFFFFFFFFF0D46696E6420496E2046696C657300000000C700000001000000FFFFFFFFFFFFFFFF0A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0742726F77736572000000007794000001000000FFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFC500000001000000FFFFFFFFC5000000000000000000000000000000 + + + 59392 + File + + 2002 + 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000400020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000040004000000000000000000000000000000000100000001000000018022E100000000040005000000000000000000000000000000000100000001000000018025E10000000004000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000004000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000004000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000004000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000400460000000000000000000000000000000001000000010000000180FE880000000004004500000000000000000000000000000000010000000100000001800B810000000004001300000000000000000000000000000000010000000100000001800C810000000004001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000400000000000000000000000000000000000001000000010000009600000002002050FFFFFFFF0096000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000004001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018022800000020000001500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000400160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000000180C8880000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E4C010000020001001A0000000F50726F6A6563742057696E646F7773000000000000000000000000010000000100000000000000000000000100000008002880DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002880DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002880E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002880E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000288018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000028800000000000000400FFFFFFFF00000000000000000000000000010000000100000000000000000000000100000000002880D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002880E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65FF7F0000 + + + 1423 + 2800FFFF01001100434D4643546F6F6C426172427574746F6E00E1000000000000FFFFFFFF000100000000000000010000000000000001000000018001E1000000000000FFFFFFFF000100000000000000010000000000000001000000018003E1000000000000FFFFFFFF0001000000000000000100000000000000010000000180CD7F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF000000000000000000010000000000000001000000018023E1000000000000FFFFFFFF000100000000000000010000000000000001000000018022E1000000000000FFFFFFFF000100000000000000010000000000000001000000018025E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802BE1000000000000FFFFFFFF00010000000000000001000000000000000100000001802CE1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001807A8A000000000000FFFFFFFF00010000000000000001000000000000000100000001807B8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180D3B0000000000000FFFFFFFF000100000000000000010000000000000001000000018015B1000000000000FFFFFFFF0001000000000000000100000000000000010000000180F4B0000000000000FFFFFFFF000100000000000000010000000000000001000000018036B1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FF88000000000000FFFFFFFF0001000000000000000100000000000000010000000180FE88000000000000FFFFFFFF00010000000000000001000000000000000100000001800B81000000000000FFFFFFFF00010000000000000001000000000000000100000001800C81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180F088000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE7F000000000000FFFFFFFF000100000000000000010000000000000001000000018024E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800A81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802280000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C488000000000000FFFFFFFF0001000000000000000100000000000000010000000180C988000000000000FFFFFFFF0001000000000000000100000000000000010000000180C788000000000000FFFFFFFF0001000000000000000100000000000000010000000180C888000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180DD88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FB7F000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 1423 + 2800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000000000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000000000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000000000C0000000000000000000000000000000001000000010000000180F4B00000000000000D000000000000000000000000000000000100000001000000018036B10000000000000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF880000000000000F0000000000000000000000000000000001000000010000000180FE880000000000001000000000000000000000000000000000010000000100000001800B810000000000001100000000000000000000000000000000010000000100000001800C810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F088000000000000130000000000000000000000000000000001000000010000000180EE7F00000000000014000000000000000000000000000000000100000001000000018024E10000000000001500000000000000000000000000000000010000000100000001800A810000000000001600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018022800000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000180000000000000000000000000000000001000000010000000180C988000000000000190000000000000000000000000000000001000000010000000180C7880000000000001A0000000000000000000000000000000001000000010000000180C8880000000000001B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180DD880000000000001C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001D000000000000000000000000000000000100000001000000 + + + + 59399 + Build + + 649 + 00200000010000000F00FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000004001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E00000000000000000000000000000000010000000100000001809E8A0000000004001F0000000000000000000000000000000001000000010000000180D17F0000000004002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050000000000B43796153534C2D46756C6C960000000000000001000B43796153534C2D46756C6C000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000400240000000000000000000000000000000001000000010000000180A8010000000000004E0000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C64FF7F0000 + + + 548 + 0F00FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000FFFFFFFF0001000000000000000100000000000000010000000180D07F000000000000FFFFFFFF00010000000000000001000000000000000100000001803080000000000000FFFFFFFF00010000000000000001000000000000000100000001809E8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D17F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001804C8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001806680000000000000FFFFFFFF0001000000000000000100000000000000010000000180EB88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180B08A000000000000FFFFFFFF0001000000000000000100000000000000010000000180A801000000000000FFFFFFFF0001000000000000000100000000000000010000000180BE01000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 548 + 0F00FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000000000000000000000000000000000000001000000010000000180D07F00000000000001000000000000000000000000000000000100000001000000018030800000000000000200000000000000000000000000000000010000000100000001809E8A000000000000030000000000000000000000000000000001000000010000000180D17F0000000000000400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000000500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001806680000000000000060000000000000000000000000000000001000000010000000180EB880000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000080000000000000000000000000000000001000000010000000180B08A000000000000090000000000000000000000000000000001000000010000000180A8010000000000000A0000000000000000000000000000000001000000010000000180BE010000000000000B000000000000000000000000000000000100000001000000 + + + + 59400 + Debug + + 2220 + 00200000000000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000000002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000000000002D0000000000000000000000000000000001000000010000000180F07F0000000000002E0000000000000000000000000000000001000000010000000180E8880000000000003700000000000000000000000000000000010000000100000001803B010000000000002F0000000000000000000000000000000001000000010000000180BB8A00000000000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000000000000310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000002001380D88B000000000000310000000757617463682031000000000000000000000000010000000100000000000000000000000100000000001380D98B0000000000003100000007576174636820320000000000000000000000000100000001000000000000000000000001000000000013800F01000000000000320000000E4D656D6F72792057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000084D656D6F72792031000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000084D656D6F72792032000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000084D656D6F72792033000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000084D656D6F727920340000000000000000000000000100000001000000000000000000000001000000000013801001000000000000330000000E53657269616C2057696E646F77730000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000755415254202331000000000000000000000000010000000100000000000000000000000100000000001380940700000000000033000000075541525420233200000000000000000000000001000000010000000000000000000000010000000000138095070000000000003300000007554152542023330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000000E49544D2F525441205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000000000003400000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380658A000000000000340000000E4C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E00000014506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000D436F646520436F76657261676500000000000000000000000001000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720100000000000000000000000100000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720100000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000138001890000000000003600000007546F6F6C626F7800000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730100000000000000000000000100000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000000000000100000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F720100000000000000000000000100000001000000000000000000000001000000000000000000054465627567FF7F0000 + + + 898 + 1900FFFF01001100434D4643546F6F6C426172427574746F6ECC88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801780000000000000FFFFFFFF00010000000000000001000000000000000100000001801D80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801A80000000000000FFFFFFFF00010000000000000001000000000000000100000001801B80000000000000FFFFFFFF0001000000000000000100000000000000010000000180E57F000000000000FFFFFFFF00010000000000000001000000000000000100000001801C80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800089000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180E48B000000000000FFFFFFFF0001000000000000000100000000000000010000000180F07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180E888000000000000FFFFFFFF00010000000000000001000000000000000100000001803B01000000000000FFFFFFFF0001000000000000000100000000000000010000000180BB8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D88B000000000000FFFFFFFF0001000000000000000100000000000000010000000180D28B000000000000FFFFFFFF00010000000000000001000000000000000100000001809307000000000000FFFFFFFF0001000000000000000100000000000000010000000180658A000000000000FFFFFFFF0001000000000000000100000000000000010000000180C18A000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE8B000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800189000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 898 + 1900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000000000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000000100000000000000000000000000000000010000000100000001801D800000000000000200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000000300000000000000000000000000000000010000000100000001801B80000000000000040000000000000000000000000000000001000000010000000180E57F0000000000000500000000000000000000000000000000010000000100000001801C800000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B000000000000080000000000000000000000000000000001000000010000000180F07F000000000000090000000000000000000000000000000001000000010000000180E8880000000000000A00000000000000000000000000000000010000000100000001803B010000000000000B0000000000000000000000000000000001000000010000000180BB8A0000000000000C0000000000000000000000000000000001000000010000000180D88B0000000000000D0000000000000000000000000000000001000000010000000180D28B0000000000000E000000000000000000000000000000000100000001000000018093070000000000000F0000000000000000000000000000000001000000010000000180658A000000000000100000000000000000000000000000000001000000010000000180C18A000000000000110000000000000000000000000000000001000000010000000180EE8B0000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180018900000000000013000000000000000000000000000000000100000001000000 + + + + 0 + 1920 + 1080 + + + + + + + diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvoptx b/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvoptx new file mode 100644 index 000000000..5df758980 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvoptx @@ -0,0 +1,1530 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + CyaSSL-Full + 0x4 + ARM-ADS + + 25000000 + + 1 + 1 + 0 + 1 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Object\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM3 + SARMCM3.DLL + -REMAP -MPU + TCM.DLL + -pCM3 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 8 + + + + + + + + + + .\STM32_SWO.ini + BIN\ULP2CM3.DLL + + + + 0 + DLGUARM + + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + ULP2CM3 + -UP1135060 -O206 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO19 -TC120000000 -TP18 -TDX0 -TDD0 -TDS8000 -TDT0 -TDC1F -TIE1 -TIP1 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024.flm -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32F2xx_1024 -FL0100000 -FS08000000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm) + + + + + + 0 + 1 + str[i] + + + 1 + 1 + str + + + + + 1 + 3 + 0x20003d9e + + + + + 2 + 8 + 0x8004dc8 + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + + + + + + + + Source + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 13 + 0 + 0 + 0 + 0 + .\shell.c + shell.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\test.c + test.c + 0 + 0 + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\benchmark.c + benchmark.c + 0 + 0 + + + 1 + 5 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\client.c + client.c + 0 + 0 + + + 1 + 6 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + .\echoclient.c + echoclient.c + 0 + 0 + + + 1 + 7 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\echoserver.c + echoserver.c + 0 + 0 + + + 1 + 8 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\server.c + server.c + 0 + 0 + + + 1 + 9 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\cert_data.c + cert_data.c + 0 + 0 + + + + + Configuration + 1 + 0 + 0 + 0 + + 2 + 10 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\RTE\wolfSSL\config-CyaSSL.h + config-CyaSSL.h + 0 + 0 + + + 2 + 11 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + .\RTE\wolfSSL\config-Crypt.h + config-Crypt.h + 0 + 0 + + + + + Documentation + 1 + 0 + 0 + 0 + + 3 + 12 + 5 + 0 + 0 + 10 + 0 + 1 + 32 + 0 + .\Abstract.txt + Abstract.txt + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + 4 + 13 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib + RTX_CM3.lib + 1 + 0 + + + 4 + 14 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\CMSIS\RTX_Conf_CM.c + RTX_Conf_CM.c + 1 + 0 + + + + + ::Device + 0 + 0 + 0 + 1 + + 5 + 15 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c + DMA_STM32F2xx.c + 1 + 0 + + + 5 + 16 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c + GPIO_STM32F2xx.c + 1 + 0 + + + 5 + 17 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Device\STM32F207IG\RTE_Device.h + RTE_Device.h + 1 + 0 + + + 5 + 18 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Device\STM32F207IG\startup_stm32f2xx.s + startup_stm32f2xx.s + 1 + 0 + + + 5 + 19 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Device\STM32F207IG\system_stm32f2xx.c + system_stm32f2xx.c + 1 + 0 + + + + + ::Drivers + 0 + 0 + 0 + 1 + + 6 + 20 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Driver\PHY_ST802RT1.c + PHY_ST802RT1.c + 1 + 0 + + + 6 + 21 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\EMAC_STM32F2xx.c + EMAC_STM32F2xx.c + 1 + 0 + + + 6 + 22 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c + MCI_STM32F2xx.c + 1 + 0 + + + + + ::File System + 0 + 0 + 0 + 1 + + 7 + 23 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib + FS_LFN_CM3_L.lib + 1 + 0 + + + 7 + 24 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\File_System\FS_Config.c + FS_Config.c + 1 + 0 + + + 7 + 25 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\File_System\FS_Config_MC_0.h + FS_Config_MC_0.h + 1 + 0 + + + + + ::Network + 1 + 0 + 0 + 1 + + 8 + 26 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Lib\ARM\Net_Dbg_CM3_L.lib + Net_Dbg_CM3_L.lib + 1 + 0 + + + 8 + 27 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Network\Net_Config.c + Net_Config.c + 1 + 0 + + + 8 + 28 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Network\Net_Config_BSD.h + Net_Config_BSD.h + 1 + 0 + + + 8 + 29 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Network\Net_Config_DNS_Client.h + Net_Config_DNS_Client.h + 1 + 0 + + + 8 + 30 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Network\Net_Config_ETH_0.h + Net_Config_ETH_0.h + 1 + 0 + + + 8 + 31 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Network\Net_Config_TCP.h + Net_Config_TCP.h + 1 + 0 + + + 8 + 32 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Network\Net_Config_UDP.h + Net_Config_UDP.h + 1 + 0 + + + 8 + 33 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\Network\Net_Debug.c + Net_Debug.c + 1 + 0 + + + + + ::wolfSSL + 0 + 0 + 0 + 1 + + 9 + 34 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c + cyassl_MDK_ARM.c + 1 + 0 + + + 9 + 35 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c + time-STM32F2xx.c + 1 + 0 + + + 9 + 36 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c + aes.c + 1 + 0 + + + 9 + 37 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c + arc4.c + 1 + 0 + + + 9 + 38 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c + asm.c + 1 + 0 + + + 9 + 39 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c + asn.c + 1 + 0 + + + 9 + 40 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c + blake2b.c + 1 + 0 + + + 9 + 41 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c + camellia.c + 1 + 0 + + + 9 + 42 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c + coding.c + 1 + 0 + + + 9 + 43 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c + compress.c + 1 + 0 + + + 9 + 44 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c + des3.c + 1 + 0 + + + 9 + 45 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c + dh.c + 1 + 0 + + + 9 + 46 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c + dsa.c + 1 + 0 + + + 9 + 47 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c + ecc.c + 1 + 0 + + + 9 + 48 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c + ecc_fp.c + 1 + 0 + + + 9 + 49 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c + error.c + 1 + 0 + + + 9 + 50 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c + hc128.c + 1 + 0 + + + 9 + 51 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c + hmac.c + 1 + 0 + + + 9 + 52 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c + integer.c + 1 + 0 + + + 9 + 53 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c + logging.c + 1 + 0 + + + 9 + 54 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c + md2.c + 1 + 0 + + + 9 + 55 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c + md4.c + 1 + 0 + + + 9 + 56 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c + md5.c + 1 + 0 + + + 9 + 57 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c + memory.c + 1 + 0 + + + 9 + 58 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c + misc.c + 1 + 0 + + + 9 + 59 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c + pwdbased.c + 1 + 0 + + + 9 + 60 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c + rabbit.c + 1 + 0 + + + 9 + 61 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c + random.c + 1 + 0 + + + 9 + 62 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c + ripemd.c + 1 + 0 + + + 9 + 63 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c + rsa.c + 1 + 0 + + + 9 + 64 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c + sha.c + 1 + 0 + + + 9 + 65 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c + sha256.c + 1 + 0 + + + 9 + 66 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c + sha512.c + 1 + 0 + + + 9 + 67 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c + tfm.c + 1 + 0 + + + 9 + 68 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\crl.c + crl.c + 1 + 0 + + + 9 + 69 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\internal.c + internal.c + 1 + 0 + + + 9 + 70 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\io.c + io.c + 1 + 0 + + + 9 + 71 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\keys.c + keys.c + 1 + 0 + + + 9 + 72 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ocsp.c + ocsp.c + 1 + 0 + + + 9 + 73 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\sniffer.c + sniffer.c + 1 + 0 + + + 9 + 74 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ssl.c + ssl.c + 1 + 0 + + + 9 + 75 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\tls.c + tls.c + 1 + 0 + + + 9 + 76 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\wolfSSL\config-Crypt.h + config-Crypt.h + 1 + 0 + + + 9 + 77 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\wolfSSL\config-CyaSSL.h + config-CyaSSL.h + 1 + 0 + + + 9 + 78 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + RTE\wolfSSL\config.h + config.h + 1 + 0 + + + + diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvprojx b/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvprojx new file mode 100644 index 000000000..d45fdec8a --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvprojx @@ -0,0 +1,1124 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + CyaSSL-Full + 0x4 + ARM-ADS + + + STM32F207IG + STMicroelectronics + IRAM(0x20000000,0x20000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M3") CLOCK(120000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm)) + 0 + $$Device:STM32F207IG$Device\Include\stm32f2xx.h + + + + + + + + + + $$Device:STM32F207IG$SVD\STM32F20x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Object\ + CyaSSL-Full + 1 + 0 + 0 + 1 + 1 + .\Object\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM3 + SARMCM3.DLL + -REMAP -MPU + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + + 0 + 8 + + + + + + + + + + + + + .\STM32_SWO.ini + BIN\ULP2CM3.DLL + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 0 + BIN\ULP2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + HAVE_CONFIG_H __DBG_ITM __RTX MDK_CONF_CYASSL CYASSL_STM32F2xx + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + Source + + + main.c + 1 + .\main.c + + + shell.c + 1 + .\shell.c + + + test.c + 1 + .\test.c + + + benchmark.c + 1 + .\benchmark.c + + + client.c + 1 + .\client.c + + + echoclient.c + 1 + .\echoclient.c + + + echoserver.c + 1 + .\echoserver.c + + + server.c + 1 + .\server.c + + + cert_data.c + 1 + .\cert_data.c + + + + + Configuration + + + config-CyaSSL.h + 5 + .\RTE\wolfSSL\config-CyaSSL.h + + + config-Crypt.h + 5 + .\RTE\wolfSSL\config-Crypt.h + + + + + Documentation + + + Abstract.txt + 5 + .\Abstract.txt + + + + + ::CMSIS + + + RTX_CM3.lib + 4 + C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib + + + RTX_Conf_CM.c + 1 + RTE\CMSIS\RTX_Conf_CM.c + + + + + ::Device + + + DMA_STM32F2xx.c + 1 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c + + + GPIO_STM32F2xx.c + 1 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c + + + RTE_Device.h + 5 + RTE\Device\STM32F207IG\RTE_Device.h + + + startup_stm32f2xx.s + 2 + RTE\Device\STM32F207IG\startup_stm32f2xx.s + + + system_stm32f2xx.c + 1 + RTE\Device\STM32F207IG\system_stm32f2xx.c + + + + + ::Drivers + + + PHY_ST802RT1.c + 1 + C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Driver\PHY_ST802RT1.c + + + EMAC_STM32F2xx.c + 1 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\EMAC_STM32F2xx.c + + + MCI_STM32F2xx.c + 1 + C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c + + + + + ::File System + + + FS_LFN_CM3_L.lib + 4 + C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib + + + FS_Config.c + 1 + RTE\File_System\FS_Config.c + + + FS_Config_MC_0.h + 5 + RTE\File_System\FS_Config_MC_0.h + + + + + ::Network + + + Net_Dbg_CM3_L.lib + 4 + C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Lib\ARM\Net_Dbg_CM3_L.lib + + + Net_Config.c + 1 + RTE\Network\Net_Config.c + + + Net_Config_BSD.h + 5 + RTE\Network\Net_Config_BSD.h + + + Net_Config_DNS_Client.h + 5 + RTE\Network\Net_Config_DNS_Client.h + + + Net_Config_ETH_0.h + 5 + RTE\Network\Net_Config_ETH_0.h + + + Net_Config_TCP.h + 5 + RTE\Network\Net_Config_TCP.h + + + Net_Config_UDP.h + 5 + RTE\Network\Net_Config_UDP.h + + + Net_Debug.c + 1 + RTE\Network\Net_Debug.c + + + + + ::wolfSSL + + + cyassl_MDK_ARM.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c + + + time-STM32F2xx.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c + + + aes.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c + + + arc4.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c + + + asm.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c + + + asn.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c + + + blake2b.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c + + + camellia.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c + + + coding.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c + + + compress.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c + + + des3.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c + + + dh.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c + + + dsa.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c + + + ecc.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c + + + ecc_fp.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c + + + error.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c + + + hc128.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c + + + hmac.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c + + + integer.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c + + + logging.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c + + + md2.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c + + + md4.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c + + + md5.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c + + + memory.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c + + + misc.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c + + + pwdbased.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c + + + rabbit.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c + + + random.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c + + + ripemd.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c + + + rsa.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c + + + sha.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c + + + sha256.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c + + + sha512.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c + + + tfm.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c + + + crl.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\crl.c + + + internal.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\internal.c + + + io.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\io.c + + + keys.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\keys.c + + + ocsp.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ocsp.c + + + sniffer.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\sniffer.c + + + ssl.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ssl.c + + + tls.c + 1 + C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\tls.c + + + config-Crypt.h + 5 + RTE\wolfSSL\config-Crypt.h + + + config-CyaSSL.h + 5 + RTE\wolfSSL\config-CyaSSL.h + + + config.h + 5 + RTE\wolfSSL\config.h + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\CMSIS\RTX_Conf_CM.c + + + + + + + + RTE\Device\STM32F207IG\RTE_Device.h + + + + + + + + RTE\Device\STM32F207IG\startup_stm32f2xx.s + + + + + + + + RTE\Device\STM32F207IG\system_stm32f2xx.c + + + + + + + + RTE\File_System\FS_Config.c + + + + + + + + RTE\File_System\FS_Config_MC_0.h + + + + + + + + RTE\Network\Net_Config.c + + + + + + + + RTE\Network\Net_Config_BSD.h + + + + + + + + RTE\Network\Net_Config_DNS_Client.h + + + + + + + + RTE\Network\Net_Config_ETH_0.h + + + + + + + + RTE\Network\Net_Config_TCP.h + + + + + + + + RTE\Network\Net_Config_UDP.h + + + + + + + + RTE\Network\Net_Debug.c + + + + + + + + RTE\Other\config-RTX-TCP-FS.h + + + + + + RTE\Other\config.h + + + + + + RTE\wolfSSL\config-Crypt.h + + + + + + + + RTE\wolfSSL\config-CyaSSL.h + + + + + + + + RTE\wolfSSL\config.h + + + + + + + + + + diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full_CyaSSL-Full.dep b/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full_CyaSSL-Full.dep new file mode 100644 index 000000000..966cbe457 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full_CyaSSL-Full.dep @@ -0,0 +1,79 @@ +Dependencies for Project 'CyaSSL-Full', Target 'CyaSSL-Full': (DO NOT MODIFY !) +F (.\main.c)(0x52675C4A)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\main.o --omf_browse .\object\main.crf --depend .\object\main.d) +F (.\shell.c)(0x523B984C)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\shell.o --omf_browse .\object\shell.crf --depend .\object\shell.d) +F (.\test.c)(0x524E6E34)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\test.o --omf_browse .\object\test.crf --depend .\object\test.d) +F (.\benchmark.c)(0x5232780E)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\benchmark.o --omf_browse .\object\benchmark.crf --depend .\object\benchmark.d) +F (.\client.c)(0x523AC4A0)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\client.o --omf_browse .\object\client.crf --depend .\object\client.d) +F (.\echoclient.c)(0x523277E2)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\echoclient.o --omf_browse .\object\echoclient.crf --depend .\object\echoclient.d) +F (.\echoserver.c)(0x523277D4)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\echoserver.o --omf_browse .\object\echoserver.crf --depend .\object\echoserver.d) +F (.\server.c)(0x523AC4BA)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\server.o --omf_browse .\object\server.crf --depend .\object\server.d) +F (.\cert_data.c)(0x523277FE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\cert_data.o --omf_browse .\object\cert_data.crf --depend .\object\cert_data.d) +F (.\RTE\wolfSSL\config-CyaSSL.h)(0x523279FE)() +F (.\RTE\wolfSSL\config-Crypt.h)(0x52327A08)() +F (.\Abstract.txt)(0x526765CD)() +F (C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib)(0x5244BA9A)() +F (RTE\CMSIS\RTX_Conf_CM.c)(0x522BC824)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\rtx_conf_cm.o --omf_browse .\object\rtx_conf_cm.crf --depend .\object\rtx_conf_cm.d) +F (C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c)(0x520AB72C)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\dma_stm32f2xx.o --omf_browse .\object\dma_stm32f2xx.crf --depend .\object\dma_stm32f2xx.d) +F (C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c)(0x514117F8)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\gpio_stm32f2xx.o --omf_browse .\object\gpio_stm32f2xx.crf --depend .\object\gpio_stm32f2xx.d) +F (RTE\Device\STM32F207IG\RTE_Device.h)(0x520C57EA)() +F (RTE\Device\STM32F207IG\startup_stm32f2xx.s)(0x524C04BE)(--cpu Cortex-M3 --pd "__RTX SETA 1" -g --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL --list .\object\startup_stm32f2xx.lst --xref -o .\object\startup_stm32f2xx.o --depend .\object\startup_stm32f2xx.d) +F (RTE\Device\STM32F207IG\system_stm32f2xx.c)(0x4E640246)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\system_stm32f2xx.o --omf_browse .\object\system_stm32f2xx.crf --depend .\object\system_stm32f2xx.d) +F (C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Driver\PHY_ST802RT1.c)(0x52411D22)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\phy_st802rt1.o --omf_browse .\object\phy_st802rt1.crf --depend .\object\phy_st802rt1.d) +F (C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\EMAC_STM32F2xx.c)(0x52328C8E)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\emac_stm32f2xx.o --omf_browse .\object\emac_stm32f2xx.crf --depend .\object\emac_stm32f2xx.d) +F (C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c)(0x52324BC0)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\mci_stm32f2xx.o --omf_browse .\object\mci_stm32f2xx.crf --depend .\object\mci_stm32f2xx.d) +F (C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib)(0x524362F0)() +F (RTE\File_System\FS_Config.c)(0x51CBD1D2)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\fs_config.o --omf_browse .\object\fs_config.crf --depend .\object\fs_config.d) +F (RTE\File_System\FS_Config_MC_0.h)(0x520C36F0)() +F (C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Lib\ARM\Net_Dbg_CM3_L.lib)(0x524B8A0E)() +F (RTE\Network\Net_Config.c)(0x520C5816)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\net_config.o --omf_browse .\object\net_config.crf --depend .\object\net_config.d) +F (RTE\Network\Net_Config_BSD.h)(0x52326150)() +F (RTE\Network\Net_Config_DNS_Client.h)(0x51CBD1D2)() +F (RTE\Network\Net_Config_ETH_0.h)(0x520C56DC)() +F (RTE\Network\Net_Config_TCP.h)(0x52326152)() +F (RTE\Network\Net_Config_UDP.h)(0x52326152)() +F (RTE\Network\Net_Debug.c)(0x523BA1F2)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\net_debug.o --omf_browse .\object\net_debug.crf --depend .\object\net_debug.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c)(0x523AC74C)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\cyassl_mdk_arm.o --omf_browse .\object\cyassl_mdk_arm.crf --depend .\object\cyassl_mdk_arm.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c)(0x525754AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\time-stm32f2xx.o --omf_browse .\object\time-stm32f2xx.crf --depend .\object\time-stm32f2xx.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c)(0x5216DBDE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\aes.o --omf_browse .\object\aes.crf --depend .\object\aes.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\arc4.o --omf_browse .\object\arc4.crf --depend .\object\arc4.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\asm.o --omf_browse .\object\asm.crf --depend .\object\asm.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c)(0x52329E8A)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\asn.o --omf_browse .\object\asn.crf --depend .\object\asn.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\blake2b.o --omf_browse .\object\blake2b.crf --depend .\object\blake2b.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c)(0x51DA2952)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\camellia.o --omf_browse .\object\camellia.crf --depend .\object\camellia.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\coding.o --omf_browse .\object\coding.crf --depend .\object\coding.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\compress.o --omf_browse .\object\compress.crf --depend .\object\compress.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c)(0x51DA2952)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\des3.o --omf_browse .\object\des3.crf --depend .\object\des3.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\dh.o --omf_browse .\object\dh.crf --depend .\object\dh.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\dsa.o --omf_browse .\object\dsa.crf --depend .\object\dsa.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c)(0x5215D7AC)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\ecc.o --omf_browse .\object\ecc.crf --depend .\object\ecc.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c)(0x4FBF1BB4)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\ecc_fp.o --omf_browse .\object\ecc_fp.crf --depend .\object\ecc_fp.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c)(0x520063E0)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\error.o --omf_browse .\object\error.crf --depend .\object\error.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c)(0x51DA2952)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\hc128.o --omf_browse .\object\hc128.crf --depend .\object\hc128.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c)(0x51942D42)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\hmac.o --omf_browse .\object\hmac.crf --depend .\object\hmac.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c)(0x51F0CCBE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\integer.o --omf_browse .\object\integer.crf --depend .\object\integer.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c)(0x51942D42)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\logging.o --omf_browse .\object\logging.crf --depend .\object\logging.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\md2.o --omf_browse .\object\md2.crf --depend .\object\md2.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\md4.o --omf_browse .\object\md4.crf --depend .\object\md4.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c)(0x51942D42)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\md5.o --omf_browse .\object\md5.crf --depend .\object\md5.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c)(0x523ABC8A)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\memory.o --omf_browse .\object\memory.crf --depend .\object\memory.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c)(0x51942D42)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\misc.o --omf_browse .\object\misc.crf --depend .\object\misc.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c)(0x51942D42)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\pwdbased.o --omf_browse .\object\pwdbased.crf --depend .\object\pwdbased.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c)(0x51DA2952)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\rabbit.o --omf_browse .\object\rabbit.crf --depend .\object\rabbit.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c)(0x51BA9FE8)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\random.o --omf_browse .\object\random.crf --depend .\object\random.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\ripemd.o --omf_browse .\object\ripemd.crf --depend .\object\ripemd.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\rsa.o --omf_browse .\object\rsa.crf --depend .\object\rsa.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c)(0x51942D42)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\sha.o --omf_browse .\object\sha.crf --depend .\object\sha.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\sha256.o --omf_browse .\object\sha256.crf --depend .\object\sha256.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\sha512.o --omf_browse .\object\sha512.crf --depend .\object\sha512.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c)(0x51F0CCBE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\tfm.o --omf_browse .\object\tfm.crf --depend .\object\tfm.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\crl.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\crl.o --omf_browse .\object\crl.crf --depend .\object\crl.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\internal.c)(0x52663ACA)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\internal.o --omf_browse .\object\internal.crf --depend .\object\internal.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\io.c)(0x5232A8CE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\io.o --omf_browse .\object\io.crf --depend .\object\io.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\keys.c)(0x521C327A)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\keys.o --omf_browse .\object\keys.crf --depend .\object\keys.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ocsp.c)(0x51C7D2F0)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\ocsp.o --omf_browse .\object\ocsp.crf --depend .\object\ocsp.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\sniffer.c)(0x5204A7E4)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\sniffer.o --omf_browse .\object\sniffer.crf --depend .\object\sniffer.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ssl.c)(0x524BE6BC)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\ssl.o --omf_browse .\object\ssl.crf --depend .\object\ssl.d) +F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\tls.c)(0x524E69A6)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG -I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include -I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include -I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include -I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl -I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL -D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\tls.o --omf_browse .\object\tls.crf --depend .\object\tls.d) +F (RTE\wolfSSL\config-Crypt.h)(0x52327A08)() +F (RTE\wolfSSL\config-CyaSSL.h)(0x523279FE)() +F (RTE\wolfSSL\config.h)(0x524BE316)() diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/Object/CyaSSL-Full.build_log.htm b/IDE/MDK5-ARM/Projects/CyaSSL-Full/Object/CyaSSL-Full.build_log.htm new file mode 100644 index 000000000..dc05157d2 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/Object/CyaSSL-Full.build_log.htm @@ -0,0 +1,12 @@ + + +
+
µVision Build Log

+
Project:

+C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\CyaSSL-Full.uvprojx
+Project File Date:  10/23/2013
+
+
Output:

+
+ + diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/CMSIS/RTX_Conf_CM.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/CMSIS/RTX_Conf_CM.c new file mode 100644 index 000000000..3ff6766f3 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/CMSIS/RTX_Conf_CM.c @@ -0,0 +1,276 @@ +/*---------------------------------------------------------------------------- + * RL-ARM - RTX + *---------------------------------------------------------------------------- + * Name: RTX_Conf_CM.C + * Purpose: Configuration of CMSIS RTX Kernel for Cortex-M + * Rev.: V4.70 + *---------------------------------------------------------------------------- + * + * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH + * All rights reserved. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + *---------------------------------------------------------------------------*/ + +#include "cmsis_os.h" + + +/*---------------------------------------------------------------------------- + * RTX User configuration part BEGIN + *---------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- +// +// Thread Configuration +// ======================= +// +// Number of concurrent running threads <0-250> +// Defines max. number of threads that will run at the same time. +// Default: 6 +#ifndef OS_TASKCNT + #define OS_TASKCNT 6 +#endif + +// Default Thread stack size [bytes] <64-4096:8><#/4> +// Defines default stack size for threads with osThreadDef stacksz = 0 +// Default: 200 +#ifndef OS_STKSIZE + #define OS_STKSIZE 250 +#endif + +// Main Thread stack size [bytes] <64-4096:8><#/4> +// Defines stack size for main thread. +// Default: 200 +#ifndef OS_MAINSTKSIZE + #define OS_MAINSTKSIZE 250 +#endif + +// Number of threads with user-provided stack size <0-250> +// Defines the number of threads with user-provided stack size. +// Default: 0 +#ifndef OS_PRIVCNT + #define OS_PRIVCNT 2 +#endif + +// Total stack size [bytes] for threads with user-provided stack size <0-0x10000:8><#/4> +// Defines the combined stack size for threads with user-provided stack size. +// Default: 0 +#ifndef OS_PRIVSTKSIZE + #define OS_PRIVSTKSIZE 4500 +#endif + +// Check for stack overflow +// Includes the stack checking code for stack overflow. +// Note that additional code reduces the Kernel performance. +#ifndef OS_STKCHECK + #define OS_STKCHECK 1 +#endif + +// Processor mode for thread execution +// <0=> Unprivileged mode +// <1=> Privileged mode +// Default: Privileged mode +#ifndef OS_RUNPRIV + #define OS_RUNPRIV 1 +#endif + +// + +// RTX Kernel Timer Tick Configuration +// ====================================== +// Use Cortex-M SysTick timer as RTX Kernel Timer +// Use the Cortex-M SysTick timer as a time-base for RTX. +#ifndef OS_SYSTICK + #define OS_SYSTICK 1 +#endif +// +// Timer clock value [Hz] <1-1000000000> +// Defines the timer clock value. +// Default: 12000000 (12MHz) +#ifndef OS_CLOCK + #define OS_CLOCK 12000000 +#endif + +// Timer tick value [us] <1-1000000> +// Defines the timer tick value. +// Default: 1000 (1ms) +#ifndef OS_TICK + #define OS_TICK 1000 +#endif + +// + +// System Configuration +// ======================= +// +// Round-Robin Thread switching +// =============================== +// +// Enables Round-Robin Thread switching. +#ifndef OS_ROBIN + #define OS_ROBIN 1 +#endif + +// Round-Robin Timeout [ticks] <1-1000> +// Defines how long a thread will execute before a thread switch. +// Default: 5 +#ifndef OS_ROBINTOUT + #define OS_ROBINTOUT 5 +#endif + +// + +// User Timers +// ============== +// Enables user Timers +#ifndef OS_TIMERS + #define OS_TIMERS 1 +#endif + +// Timer Thread Priority +// <1=> Low +// <2=> Below Normal <3=> Normal <4=> Above Normal +// <5=> High +// <6=> Realtime (highest) +// Defines priority for Timer Thread +// Default: High +#ifndef OS_TIMERPRIO + #define OS_TIMERPRIO 5 +#endif + +// Timer Thread stack size [bytes] <64-64000:8><#/4> +// Defines stack size for Timer thread. +// Default: 200 +#ifndef OS_TIMERSTKSZ + #define OS_TIMERSTKSZ 50 +#endif + +// Timer Callback Queue size <1-32> +// Number of concurrent active timer callback functions. +// Default: 4 +#ifndef OS_TIMERCBQS + #define OS_TIMERCBQS 4 +#endif + +// + +// ISR FIFO Queue size<4=> 4 entries <8=> 8 entries +// <12=> 12 entries <16=> 16 entries +// <24=> 24 entries <32=> 32 entries +// <48=> 48 entries <64=> 64 entries +// <96=> 96 entries +// ISR functions store requests to this buffer, +// when they are called from the interrupt handler. +// Default: 16 entries +#ifndef OS_FIFOSZ + #define OS_FIFOSZ 16 +#endif + +// + +//------------- <<< end of configuration section >>> ----------------------- + +// Standard library system mutexes +// =============================== +// Define max. number system mutexes that are used to protect +// the arm standard runtime library. For microlib they are not used. +#ifndef OS_MUTEXCNT + #define OS_MUTEXCNT 8 +#endif + +/*---------------------------------------------------------------------------- + * RTX User configuration part END + *---------------------------------------------------------------------------*/ + +#define OS_TRV ((uint32_t)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1) + + +/*---------------------------------------------------------------------------- + * Global Functions + *---------------------------------------------------------------------------*/ + +/*--------------------------- os_idle_demon ---------------------------------*/ + +void os_idle_demon (void) { + /* The idle demon is a system thread, running when no other thread is */ + /* ready to run. */ + + for (;;) { + /* HERE: include optional user code to be executed when no thread runs.*/ + } +} + +#if (OS_SYSTICK == 0) // Functions for alternative timer as RTX kernel timer + +/*--------------------------- os_tick_init ----------------------------------*/ + +// Initialize alternative hardware timer as RTX kernel timer +// Return: IRQ number of the alternative hardware timer +int os_tick_init (void) { + return (-1); /* Return IRQ number of timer (0..239) */ +} + +/*--------------------------- os_tick_val -----------------------------------*/ + +// Get alternative hardware timer current value (0 .. OS_TRV) +uint32_t os_tick_val (void) { + return (0); +} + +/*--------------------------- os_tick_ovf -----------------------------------*/ + +// Get alternative hardware timer overflow flag +// Return: 1 - overflow, 0 - no overflow +uint32_t os_tick_ovf (void) { + return (0); +} + +/*--------------------------- os_tick_irqack --------------------------------*/ + +// Acknowledge alternative hardware timer interrupt +void os_tick_irqack (void) { + /* ... */ +} + +#endif // (OS_SYSTICK == 0) + +/*--------------------------- os_error --------------------------------------*/ + +void os_error (uint32_t err_code) { + /* This function is called when a runtime error is detected. Parameter */ + /* 'err_code' holds the runtime error code (defined in RTL.H). */ + + /* HERE: include optional code to be executed on runtime error. */ + for (;;); +} + + +/*---------------------------------------------------------------------------- + * RTX Configuration Functions + *---------------------------------------------------------------------------*/ + +#include "RTX_CM_lib.h" + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/ diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Device/STM32F207IG/RTE_Device.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Device/STM32F207IG/RTE_Device.h new file mode 100644 index 000000000..4a09246f3 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Device/STM32F207IG/RTE_Device.h @@ -0,0 +1,3127 @@ +/* ----------------------------------------------------------------------------- + * Copyright (C) 2013 ARM Limited. All rights reserved. + * + * $Date: 27. June 2013 + * $Revision: V1.01 + * + * Project: RTE Device Configuration for ST STM32F2xx + * -------------------------------------------------------------------------- */ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +#ifndef __RTE_DEVICE_H +#define __RTE_DEVICE_H + + +#define GPIO_PORT(num) \ + ((num == 0) ? GPIOA : \ + (num == 1) ? GPIOB : \ + (num == 2) ? GPIOC : \ + (num == 3) ? GPIOD : \ + (num == 4) ? GPIOE : \ + (num == 5) ? GPIOF : \ + (num == 6) ? GPIOG : \ + (num == 7) ? GPIOH : \ + (num == 8) ? GPIOI : \ + NULL) + + +// Clock Configuration +// High-speed Internal Clock <1-999999999> +#define RTE_HSI 16000000 +// High-speed External Clock <1-999999999> +#define RTE_HSE 25000000 +// System Clock <1-999999999> +#define RTE_SYSCLK 120000000 +// AHB Clock <1-999999999> +#define RTE_HCLK 120000000 +// APB1 Clock <1-999999999> +#define RTE_PCLK1 30000000 +// APB2 Clock <1-999999999> +#define RTE_PCLK2 60000000 +// 48MHz Clock +#define RTE_PLL48CK 48000000 +// + + +// USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_UART1] +// Configuration settings for Driver_UART1 in component ::Drivers:UART +#define RTE_USART1 0 + +// USART1_TX Pin <0=>PA9 <1=>PB6 +#define RTE_USART1_TX_ID 0 +#if (RTE_USART1_TX_ID == 0) +#define RTE_USART1_TX_PORT GPIOA +#define RTE_USART1_TX_BIT 9 +#elif (RTE_USART1_TX_ID == 1) +#define RTE_USART1_TX_PORT GPIOB +#define RTE_USART1_TX_BIT 6 +#else +#error "Invalid USART1_TX Pin Configuration!" +#endif + +// USART1_RX Pin <0=>PA10 <1=>PB7 +#define RTE_USART1_RX_ID 0 +#if (RTE_USART1_RX_ID == 0) +#define RTE_USART1_RX_PORT GPIOA +#define RTE_USART1_RX_BIT 10 +#elif (RTE_USART1_RX_ID == 1) +#define RTE_USART1_RX_PORT GPIOB +#define RTE_USART1_RX_BIT 7 +#else +#error "Invalid USART1_RX Pin Configuration!" +#endif + +// Synchronous +// USART1_CK Pin <0=>PA8 +// +#define RTE_USART1_CK 0 +#define RTE_USART1_CK_ID 0 +#if (RTE_USART1_CK_ID == 0) +#define RTE_USART1_CK_PORT GPIOA +#define RTE_USART1_CK_BIT 8 +#else +#error "Invalid USART1_CK Pin Configuration!" +#endif + +// Hardware flow control +// USART1_CTS Pin <0=>PA11 +// USART1_RTS Pin <0=>PA12 +// Manual CTS/RTS +// +#define RTE_USART1_HW_FLOW 0 +#define RTE_USART1_CTS_ID 0 +#define RTE_USART1_RTS_ID 0 +#define RTE_USART1_MANUAL_FLOW 0 +#if (RTE_USART1_CTS_ID == 0) +#define RTE_USART1_CTS_PORT GPIOA +#define RTE_USART1_CTS_BIT 11 +#else +#error "Invalid USART1_CTS Pin Configuration!" +#endif +#if (RTE_USART1_RTS_ID == 0) +#define RTE_USART1_RTS_PORT GPIOA +#define RTE_USART1_RTS_BIT 12 +#else +#error "Invalid USART1_RTS Pin Configuration!" +#endif + +// DMA Rx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <2=>2 <5=>5 +// Selects DMA Stream (only Stream 2 or 5 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART1_RX_DMA 1 +#define RTE_USART1_RX_DMA_NUMBER 2 +#define RTE_USART1_RX_DMA_STREAM 2 +#define RTE_USART1_RX_DMA_CHANNEL 4 +#define RTE_USART1_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <7=>7 +// Selects DMA Stream (only Stream 7 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART1_TX_DMA 1 +#define RTE_USART1_TX_DMA_NUMBER 2 +#define RTE_USART1_TX_DMA_STREAM 7 +#define RTE_USART1_TX_DMA_CHANNEL 4 +#define RTE_USART1_TX_DMA_PRIORITY 0 + +// + + +// USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_UART2] +// Configuration settings for Driver_UART2 in component ::Drivers:UART +#define RTE_USART2 0 + +// USART2_TX Pin <0=>PA2 <1=>PD5 +#define RTE_USART2_TX_ID 0 +#if (RTE_USART2_TX_ID == 0) +#define RTE_USART2_TX_PORT GPIOA +#define RTE_USART2_TX_BIT 2 +#elif (RTE_USART2_TX_ID == 1) +#define RTE_USART2_TX_PORT GPIOD +#define RTE_USART2_TX_BIT 5 +#else +#error "Invalid USART2_TX Pin Configuration!" +#endif + +// USART2_RX Pin <0=>PA3 <1=>PD6 +#define RTE_USART2_RX_ID 0 +#if (RTE_USART2_RX_ID == 0) +#define RTE_USART2_RX_PORT GPIOA +#define RTE_USART2_RX_BIT 3 +#elif (RTE_USART2_RX_ID == 1) +#define RTE_USART2_RX_PORT GPIOD +#define RTE_USART2_RX_BIT 6 +#else +#error "Invalid USART2_RX Pin Configuration!" +#endif + +// Synchronous +// USART2_CK Pin <0=>PA4 <1=>PD7 +// +#define RTE_USART2_CK 0 +#define RTE_USART2_CK_ID 0 +#if (RTE_USART2_CK_ID == 0) +#define RTE_USART2_CK_PORT GPIOA +#define RTE_USART2_CK_BIT 4 +#elif (RTE_USART2_CK_ID == 1) +#define RTE_USART2_CK_PORT GPIOD +#define RTE_USART2_CK_BIT 7 +#else +#error "Invalid USART2_CK Pin Configuration!" +#endif + +// Hardware flow control +// USART2_CTS Pin <0=>PA0 <1=>PD3 +// USART2_RTS Pin <0=>PA1 <1=>PD4 +// Manual CTS/RTS +// +#define RTE_USART2_HW_FLOW 0 +#define RTE_USART2_CTS_ID 0 +#define RTE_USART2_RTS_ID 0 +#define RTE_USART2_MANUAL_FLOW 0 +#if (RTE_USART2_CTS_ID == 0) +#define RTE_USART2_CTS_PORT GPIOA +#define RTE_USART2_CTS_BIT 0 +#elif (RTE_USART2_CTS_ID == 1) +#define RTE_USART2_CTS_PORT GPIOD +#define RTE_USART2_CTS_BIT 3 +#else +#error "Invalid USART2_CTS Pin Configuration!" +#endif +#if (RTE_USART2_RTS_ID == 0) +#define RTE_USART2_RTS_PORT GPIOA +#define RTE_USART2_RTS_BIT 1 +#elif (RTE_USART2_RTS_ID == 1) +#define RTE_USART2_RTS_PORT GPIOD +#define RTE_USART2_RTS_BIT 4 +#else +#error "Invalid USART2_RTS Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <5=>5 +// Selects DMA Stream (only Stream 5 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART2_RX_DMA 1 +#define RTE_USART2_RX_DMA_NUMBER 1 +#define RTE_USART2_RX_DMA_STREAM 5 +#define RTE_USART2_RX_DMA_CHANNEL 4 +#define RTE_USART2_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <6=>6 +// Selects DMA Stream (only Stream 6 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART2_TX_DMA 1 +#define RTE_USART2_TX_DMA_NUMBER 1 +#define RTE_USART2_TX_DMA_STREAM 6 +#define RTE_USART2_TX_DMA_CHANNEL 4 +#define RTE_USART2_TX_DMA_PRIORITY 0 + +// + + +// USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_UART3] +// Configuration settings for Driver_UART3 in component ::Drivers:UART +#define RTE_USART3 0 + +// USART3_TX Pin <0=>PB10 <1=>PC10 <2=>PD8 +#define RTE_USART3_TX_ID 0 +#if (RTE_USART3_TX_ID == 0) +#define RTE_USART3_TX_PORT GPIOB +#define RTE_USART3_TX_BIT 10 +#elif (RTE_USART3_TX_ID == 1) +#define RTE_USART3_TX_PORT GPIOC +#define RTE_USART3_TX_BIT 10 +#elif (RTE_USART3_TX_ID == 2) +#define RTE_USART3_TX_PORT GPIOD +#define RTE_USART3_TX_BIT 8 +#else +#error "Invalid USART3_TX Pin Configuration!" +#endif + +// USART3_RX Pin <0=>PB11 <1=>PC11 <2=>PD9 +#define RTE_USART3_RX_ID 0 +#if (RTE_USART3_RX_ID == 0) +#define RTE_USART3_RX_PORT GPIOB +#define RTE_USART3_RX_BIT 11 +#elif (RTE_USART3_RX_ID == 1) +#define RTE_USART3_RX_PORT GPIOC +#define RTE_USART3_RX_BIT 11 +#elif (RTE_USART3_RX_ID == 2) +#define RTE_USART3_RX_PORT GPIOD +#define RTE_USART3_RX_BIT 9 +#else +#error "Invalid USART3_RX Pin Configuration!" +#endif + +// Synchronous +// USART3_CK Pin <0=>PB12 <1=>PC12 <2=>PD10 +// +#define RTE_USART3_CK 0 +#define RTE_USART3_CK_ID 0 +#if (RTE_USART3_CK_ID == 0) +#define RTE_USART3_CK_PORT GPIOB +#define RTE_USART3_CK_BIT 12 +#elif (RTE_USART3_CK_ID == 1) +#define RTE_USART3_CK_PORT GPIOC +#define RTE_USART3_CK_BIT 12 +#elif (RTE_USART3_CK_ID == 2) +#define RTE_USART3_CK_PORT GPIOD +#define RTE_USART3_CK_BIT 10 +#else +#error "Invalid USART3_CK Pin Configuration!" +#endif + +// Hardware flow control +// USART3_CTS Pin <0=>PB13 <1=>PD11 +// USART3_RTS Pin <0=>PB14 <1=>PD12 +// Manual CTS/RTS +// +#define RTE_USART3_HW_FLOW 0 +#define RTE_USART3_CTS_ID 0 +#define RTE_USART3_RTS_ID 0 +#define RTE_USART3_MANUAL_FLOW 0 +#if (RTE_USART3_CTS_ID == 0) +#define RTE_USART3_CTS_PORT GPIOB +#define RTE_USART3_CTS_BIT 13 +#elif (RTE_USART3_CTS_ID == 1) +#define RTE_USART3_CTS_PORT GPIOD +#define RTE_USART3_CTS_BIT 11 +#else +#error "Invalid USART3_CTS Pin Configuration!" +#endif +#if (RTE_USART3_RTS_ID == 0) +#define RTE_USART3_RTS_PORT GPIOB +#define RTE_USART3_RTS_BIT 14 +#elif (RTE_USART3_RTS_ID == 1) +#define RTE_USART3_RTS_PORT GPIOD +#define RTE_USART3_RTS_BIT 12 +#else +#error "Invalid USART3_RTS Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <1=>1 +// Selects DMA Stream (only Stream 1 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART3_RX_DMA 1 +#define RTE_USART3_RX_DMA_NUMBER 1 +#define RTE_USART3_RX_DMA_STREAM 1 +#define RTE_USART3_RX_DMA_CHANNEL 4 +#define RTE_USART3_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <3=>3 +// Selects DMA Stream (only Stream 3 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART3_TX_DMA 1 +#define RTE_USART3_TX_DMA_NUMBER 1 +#define RTE_USART3_TX_DMA_STREAM 3 +#define RTE_USART3_TX_DMA_CHANNEL 4 +#define RTE_USART3_TX_DMA_PRIORITY 0 + +// + + +// UART4 (Universal asynchronous receiver transmitter) [Driver_UART4] +// Configuration settings for Driver_UART4 in component ::Drivers:UART +#define RTE_UART4 0 + +// UART4_TX Pin <0=>PA0 <1=>PC10 +#define RTE_UART4_TX_ID 0 +#if (RTE_UART4_TX_ID == 0) +#define RTE_UART4_TX_PORT GPIOA +#define RTE_UART4_TX_BIT 0 +#elif (RTE_UART4_TX_ID == 1) +#define RTE_UART4_TX_PORT GPIOC +#define RTE_UART4_TX_BIT 10 +#else +#error "Invalid UART4_TX Pin Configuration!" +#endif + +// UART4_RX Pin <0=>PA1 <1=>PC11 +#define RTE_UART4_RX_ID 0 +#if (RTE_UART4_RX_ID == 0) +#define RTE_UART4_RX_PORT GPIOA +#define RTE_UART4_RX_BIT 1 +#elif (RTE_UART4_RX_ID == 1) +#define RTE_UART4_RX_PORT GPIOC +#define RTE_UART4_RX_BIT 11 +#else +#error "Invalid UART4_RX Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <2=>2 +// Selects DMA Stream (only Stream 2 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_UART4_RX_DMA 1 +#define RTE_UART4_RX_DMA_NUMBER 1 +#define RTE_UART4_RX_DMA_STREAM 2 +#define RTE_UART4_RX_DMA_CHANNEL 4 +#define RTE_UART4_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <4=>4 +// Selects DMA Stream (only Stream 4 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_UART4_TX_DMA 1 +#define RTE_UART4_TX_DMA_NUMBER 1 +#define RTE_UART4_TX_DMA_STREAM 4 +#define RTE_UART4_TX_DMA_CHANNEL 4 +#define RTE_UART4_TX_DMA_PRIORITY 0 + +// + + +// UART5 (Universal asynchronous receiver transmitter) [Driver_UART5] +// Configuration settings for Driver_UART5 in component ::Drivers:UART +#define RTE_UART5 0 + +// UART5_TX Pin <0=>PC12 +#define RTE_UART5_TX_ID 0 +#if (RTE_UART5_TX_ID == 0) +#define RTE_UART5_TX_PORT GPIOC +#define RTE_UART5_TX_BIT 12 +#else +#error "Invalid UART5_TX Pin Configuration!" +#endif + +// UART5_RX Pin <0=>PD2 +#define RTE_UART5_RX_ID 0 +#if (RTE_UART5_RX_ID == 0) +#define RTE_UART5_RX_PORT GPIOD +#define RTE_UART5_RX_BIT 2 +#else +#error "Invalid UART5_RX Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <0=>0 +// Selects DMA Stream (only Stream 0 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_UART5_RX_DMA 1 +#define RTE_UART5_RX_DMA_NUMBER 1 +#define RTE_UART5_RX_DMA_STREAM 0 +#define RTE_UART5_RX_DMA_CHANNEL 4 +#define RTE_UART5_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <7=>7 +// Selects DMA Stream (only Stream 7 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_UART5_TX_DMA 1 +#define RTE_UART5_TX_DMA_NUMBER 1 +#define RTE_UART5_TX_DMA_STREAM 7 +#define RTE_UART5_TX_DMA_CHANNEL 4 +#define RTE_UART5_TX_DMA_PRIORITY 0 + +// + + +// USART6 (Universal synchronous asynchronous receiver transmitter) [Driver_UART6] +// Configuration settings for Driver_UART6 in component ::Drivers:UART +#define RTE_USART6 0 + +// USART6_TX Pin <0=>PC6 <1=>PG14 +#define RTE_USART6_TX_ID 0 +#if (RTE_USART6_TX_ID == 0) +#define RTE_USART6_TX_PORT GPIOC +#define RTE_USART6_TX_BIT 6 +#elif (RTE_USART6_TX_ID == 1) +#define RTE_USART6_TX_PORT GPIOG +#define RTE_USART6_TX_BIT 14 +#else +#error "Invalid USART6_TX Pin Configuration!" +#endif + +// USART6_RX Pin <0=>PC7 <1=>PG9 +#define RTE_USART6_RX_ID 0 +#if (RTE_USART6_RX_ID == 0) +#define RTE_USART6_RX_PORT GPIOC +#define RTE_USART6_RX_BIT 7 +#elif (RTE_USART6_RX_ID == 1) +#define RTE_USART6_RX_PORT GPIOG +#define RTE_USART6_RX_BIT 9 +#else +#error "Invalid USART6_RX Pin Configuration!" +#endif + +// Synchronous +// USART6_CK Pin <0=>PC8 <1=>PG7 +// +#define RTE_USART6_CK 0 +#define RTE_USART6_CK_ID 0 +#if (RTE_USART6_CK_ID == 0) +#define RTE_USART6_CK_PORT GPIOC +#define RTE_USART6_CK_BIT 8 +#elif (RTE_USART6_CK_ID == 1) +#define RTE_USART6_CK_PORT GPIOG +#define RTE_USART6_CK_BIT 7 +#else +#error "Invalid USART6_CK Pin Configuration!" +#endif + +// Hardware flow control +// USART6_CTS Pin <0=>PG13 <1=>PG15 +// USART6_RTS Pin <0=>PG8 <1=>PG12 +// Manual CTS/RTS +// +#define RTE_USART6_HW_FLOW 0 +#define RTE_USART6_CTS_ID 0 +#define RTE_USART6_RTS_ID 0 +#define RTE_USART6_MANUAL_FLOW 0 +#if (RTE_USART6_CTS_ID == 0) +#define RTE_USART6_CTS_PORT GPIOG +#define RTE_USART6_CTS_BIT 13 +#elif (RTE_USART6_CTS_ID == 1) +#define RTE_USART6_CTS_PORT GPIOG +#define RTE_USART6_CTS_BIT 15 +#else +#error "Invalid USART6_CTS Pin Configuration!" +#endif +#if (RTE_USART6_RTS_ID == 0) +#define RTE_USART6_RTS_PORT GPIOG +#define RTE_USART6_RTS_BIT 8 +#elif (RTE_USART6_RTS_ID == 1) +#define RTE_USART6_RTS_PORT GPIOG +#define RTE_USART6_RTS_BIT 12 +#else +#error "Invalid USART6_RTS Pin Configuration!" +#endif + +// DMA Rx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <1=>1 <2=>2 +// Selects DMA Stream (only Stream 1 or 2 can be used) +// Channel <5=>5 +// Selects DMA Channel (only Channel 5 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART6_RX_DMA 1 +#define RTE_USART6_RX_DMA_NUMBER 2 +#define RTE_USART6_RX_DMA_STREAM 1 +#define RTE_USART6_RX_DMA_CHANNEL 5 +#define RTE_USART6_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <6=>6 <7=>7 +// Selects DMA Stream (only Stream 6 or 7 can be used) +// Channel <5=>5 +// Selects DMA Channel (only Channel 5 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_USART6_TX_DMA 1 +#define RTE_USART6_TX_DMA_NUMBER 2 +#define RTE_USART6_TX_DMA_STREAM 6 +#define RTE_USART6_TX_DMA_CHANNEL 5 +#define RTE_USART6_TX_DMA_PRIORITY 0 + +// + + +// I2C1 (Inter-integrated Circuit Interface 1) [Driver_I2C1] +// Configuration settings for Driver_I2C1 in component ::Drivers:I2C +#define RTE_I2C1 0 + +// I2C1_SCL Pin <0=>PB6 <1=>PB8 +#define RTE_I2C1_SCL_PORT_ID 0 +#if (RTE_I2C1_SCL_PORT_ID == 0) +#define RTE_I2C1_SCL_PORT GPIOB +#define RTE_I2C1_SCL_BIT 6 +#elif (RTE_I2C1_SCL_PORT_ID == 1) +#define RTE_I2C1_SCL_PORT GPIOB +#define RTE_I2C1_SCL_BIT 8 +#else +#error "Invalid I2C1_SCL Pin Configuration!" +#endif + +// I2C1_SDA Pin <0=>PB7 <1=>PB9 +#define RTE_I2C1_SDA_PORT_ID 0 +#if (RTE_I2C1_SDA_PORT_ID == 0) +#define RTE_I2C1_SDA_PORT GPIOB +#define RTE_I2C1_SDA_BIT 7 +#elif (RTE_I2C1_SDA_PORT_ID == 1) +#define RTE_I2C1_SDA_PORT GPIOB +#define RTE_I2C1_SDA_BIT 9 +#else +#error "Invalid I2C1_SDA Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <0=>0 <5=>5 +// Selects DMA Stream (only Stream 0 or 5 can be used) +// Channel <1=>1 +// Selects DMA Channel (only Channel 1 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C1_RX_DMA 1 +#define RTE_I2C1_RX_DMA_NUMBER 1 +#define RTE_I2C1_RX_DMA_STREAM 0 +#define RTE_I2C1_RX_DMA_CHANNEL 1 +#define RTE_I2C1_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <6=>6 <7=>7 +// Selects DMA Stream (only Stream 6 or 7 can be used) +// Channel <1=>1 +// Selects DMA Channel (only Channel 1 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C1_TX_DMA 1 +#define RTE_I2C1_TX_DMA_NUMBER 1 +#define RTE_I2C1_TX_DMA_STREAM 6 +#define RTE_I2C1_TX_DMA_CHANNEL 1 +#define RTE_I2C1_TX_DMA_PRIORITY 0 + +// + + +// I2C2 (Inter-integrated Circuit Interface 2) [Driver_I2C2] +// Configuration settings for Driver_I2C2 in component ::Drivers:I2C +#define RTE_I2C2 0 + +// I2C2_SCL Pin <0=>PF1 <1=>PH4 <2=>PB10 +#define RTE_I2C2_SCL_PORT_ID 0 +#if (RTE_I2C2_SCL_PORT_ID == 0) +#define RTE_I2C2_SCL_PORT GPIOF +#define RTE_I2C2_SCL_BIT 1 +#elif (RTE_I2C2_SCL_PORT_ID == 1) +#define RTE_I2C2_SCL_PORT GPIOH +#define RTE_I2C2_SCL_BIT 4 +#elif (RTE_I2C2_SCL_PORT_ID == 2) +#define RTE_I2C2_SCL_PORT GPIOB +#define RTE_I2C2_SCL_BIT 10 +#else +#error "Invalid I2C2_SCL Pin Configuration!" +#endif + +// I2C2_SDA Pin <0=>PF0 <1=>PH5 <2=>PB11 +#define RTE_I2C2_SDA_PORT_ID 0 +#if (RTE_I2C2_SDA_PORT_ID == 0) +#define RTE_I2C2_SDA_PORT GPIOF +#define RTE_I2C2_SDA_BIT 0 +#elif (RTE_I2C2_SDA_PORT_ID == 1) +#define RTE_I2C2_SDA_PORT GPIOH +#define RTE_I2C2_SDA_BIT 5 +#elif (RTE_I2C2_SDA_PORT_ID == 2) +#define RTE_I2C2_SDA_PORT GPIOB +#define RTE_I2C2_SDA_BIT 11 +#else +#error "Invalid I2C2_SCL Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <2=>2 <3=>3 +// Selects DMA Stream (only Stream 2 or 3 can be used) +// Channel <7=>7 +// Selects DMA Channel (only Channel 7 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C2_RX_DMA 1 +#define RTE_I2C2_RX_DMA_NUMBER 1 +#define RTE_I2C2_RX_DMA_STREAM 2 +#define RTE_I2C2_RX_DMA_CHANNEL 7 +#define RTE_I2C2_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <7=>7 +// Selects DMA Stream (only Stream 7 can be used) +// Channel <7=>7 +// Selects DMA Channel (only Channel 1 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C2_TX_DMA 1 +#define RTE_I2C2_TX_DMA_NUMBER 1 +#define RTE_I2C2_TX_DMA_STREAM 7 +#define RTE_I2C2_TX_DMA_CHANNEL 7 +#define RTE_I2C2_TX_DMA_PRIORITY 0 + +// + + +// I2C3 (Inter-integrated Circuit Interface 3) [Driver_I2C3] +// Configuration settings for Driver_I2C3 in component ::Drivers:I2C +#define RTE_I2C3 0 + +// I2C3_SCL Pin <0=>PH7 <1=>PA8 +#define RTE_I2C3_SCL_PORT_ID 0 +#if (RTE_I2C3_SCL_PORT_ID == 0) +#define RTE_I2C3_SCL_PORT GPIOH +#define RTE_I2C3_SCL_BIT 7 +#elif (RTE_I2C3_SCL_PORT_ID == 1) +#define RTE_I2C3_SCL_PORT GPIOA +#define RTE_I2C3_SCL_BIT 8 +#else +#error "Invalid I2C3_SCL Pin Configuration!" +#endif + +// I2C3_SDA Pin <0=>PH8 <1=>PC9 +#define RTE_I2C3_SDA_PORT_ID 0 +#if (RTE_I2C3_SDA_PORT_ID == 0) +#define RTE_I2C3_SDA_PORT GPIOH +#define RTE_I2C3_SDA_BIT 8 +#elif (RTE_I2C3_SDA_PORT_ID == 1) +#define RTE_I2C3_SDA_PORT GPIOC +#define RTE_I2C3_SDA_BIT 9 +#else +#error "Invalid I2C3_SCL Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <2=>2 +// Selects DMA Stream (only Stream 2 can be used) +// Channel <3=>3 +// Selects DMA Channel (only Channel 3 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C3_RX_DMA 1 +#define RTE_I2C3_RX_DMA_NUMBER 1 +#define RTE_I2C3_RX_DMA_STREAM 2 +#define RTE_I2C3_RX_DMA_CHANNEL 3 +#define RTE_I2C3_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <4=>4 +// Selects DMA Stream (only Stream 4 can be used) +// Channel <3=>3 +// Selects DMA Channel (only Channel 3 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_I2C3_TX_DMA 1 +#define RTE_I2C3_TX_DMA_NUMBER 1 +#define RTE_I2C3_TX_DMA_STREAM 4 +#define RTE_I2C3_TX_DMA_CHANNEL 3 +#define RTE_I2C3_TX_DMA_PRIORITY 0 + +// + + +// SPI1 (Serial Peripheral Interface 1) [Driver_SPI1] +// Configuration settings for Driver_SPI1 in component ::Drivers:SPI +#define RTE_SPI1 0 + +// SPI1_NSS Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SPI1_NSS_PIN 1 +#define RTE_SPI1_NSS_PORT GPIO_PORT(0) +#define RTE_SPI1_NSS_BIT 4 + +// SPI1_SCK Pin <0=>PA5 <1=>PB3 +#define RTE_SPI1_SCL_PORT_ID 0 +#if (RTE_SPI1_SCL_PORT_ID == 0) +#define RTE_SPI1_SCL_PORT GPIOA +#define RTE_SPI1_SCL_BIT 5 +#elif (RTE_SPI1_SCL_PORT_ID == 1) +#define RTE_SPI1_SCL_PORT GPIOB +#define RTE_SPI1_SCL_BIT 3 +#else +#error "Invalid SPI1_SCK Pin Configuration!" +#endif + +// SPI1_MISO Pin <0=>PA6 <1=>PB4 +#define RTE_SPI1_MISO_PORT_ID 0 +#if (RTE_SPI1_MISO_PORT_ID == 0) +#define RTE_SPI1_MISO_PORT GPIOA +#define RTE_SPI1_MISO_BIT 6 +#elif (RTE_SPI1_MISO_PORT_ID == 1) +#define RTE_SPI1_MISO_PORT GPIOB +#define RTE_SPI1_MISO_BIT 4 +#else +#error "Invalid SPI1_MISO Pin Configuration!" +#endif + +// SPI1_MOSI Pin <0=>PA7 <1=>PB5 +#define RTE_SPI1_MOSI_PORT_ID 0 +#if (RTE_SPI1_MOSI_PORT_ID == 0) +#define RTE_SPI1_MOSI_PORT GPIOA +#define RTE_SPI1_MOSI_BIT 7 +#elif (RTE_SPI1_MOSI_PORT_ID == 1) +#define RTE_SPI1_MOSI_PORT GPIOB +#define RTE_SPI1_MOSI_BIT 5 +#else +#error "Invalid SPI1_MISO Pin Configuration!" +#endif + +// DMA Rx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <0=>0 <2=>2 +// Selects DMA Stream (only Stream 0 or 2 can be used) +// Channel <3=>3 +// Selects DMA Channel (only Channel 3 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI1_RX_DMA 1 +#define RTE_SPI1_RX_DMA_NUMBER 2 +#define RTE_SPI1_RX_DMA_STREAM 0 +#define RTE_SPI1_RX_DMA_CHANNEL 3 +#define RTE_SPI1_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <3=>3 <5=>5 +// Selects DMA Stream (only Stream 3 or 5 can be used) +// Channel <3=>3 +// Selects DMA Channel (only Channel 3 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI1_TX_DMA 1 +#define RTE_SPI1_TX_DMA_NUMBER 2 +#define RTE_SPI1_TX_DMA_STREAM 5 +#define RTE_SPI1_TX_DMA_CHANNEL 3 +#define RTE_SPI1_TX_DMA_PRIORITY 0 + +// + + +// SPI2 (Serial Peripheral Interface 2) [Driver_SPI2] +// Configuration settings for Driver_SPI2 in component ::Drivers:SPI +#define RTE_SPI2 0 + +// SPI2_NSS Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SPI2_NSS_PIN 1 +#define RTE_SPI2_NSS_PORT GPIO_PORT(1) +#define RTE_SPI2_NSS_BIT 12 + +// SPI2_SCK Pin <0=>PB10 <1=>PB13 <2=>PI1 +#define RTE_SPI2_SCL_PORT_ID 0 +#if (RTE_SPI2_SCL_PORT_ID == 0) +#define RTE_SPI2_SCL_PORT GPIOB +#define RTE_SPI2_SCL_BIT 10 +#elif (RTE_SPI2_SCL_PORT_ID == 1) +#define RTE_SPI2_SCL_PORT GPIOB +#define RTE_SPI2_SCL_BIT 13 +#elif (RTE_SPI2_SCL_PORT_ID == 2) +#define RTE_SPI2_SCL_PORT GPIOI +#define RTE_SPI2_SCL_BIT 1 +#else +#error "Invalid SPI2_SCK Pin Configuration!" +#endif + +// SPI2_MISO Pin <0=>PB14 <1=>PC2 <2=>PI2 +#define RTE_SPI2_MISO_PORT_ID 0 +#if (RTE_SPI2_MISO_PORT_ID == 0) +#define RTE_SPI2_MISO_PORT GPIOB +#define RTE_SPI2_MISO_BIT 14 +#elif (RTE_SPI2_MISO_PORT_ID == 1) +#define RTE_SPI2_MISO_PORT GPIOC +#define RTE_SPI2_MISO_BIT 2 +#elif (RTE_SPI2_MISO_PORT_ID == 2) +#define RTE_SPI2_MISO_PORT GPIOI +#define RTE_SPI2_MISO_BIT 2 +#else +#error "Invalid SPI2_MISO Pin Configuration!" +#endif + +// SPI2_MOSI Pin <0=>PB15 <1=>PC3 <2=>OI3 +#define RTE_SPI2_MOSI_PORT_ID 0 +#if (RTE_SPI2_MOSI_PORT_ID == 0) +#define RTE_SPI2_MOSI_PORT GPIOB +#define RTE_SPI2_MOSI_BIT 15 +#elif (RTE_SPI2_MOSI_PORT_ID == 1) +#define RTE_SPI2_MOSI_PORT GPIOC +#define RTE_SPI2_MOSI_BIT 3 +#elif (RTE_SPI2_MOSI_PORT_ID == 2) +#define RTE_SPI2_MOSI_PORT GPIOI +#define RTE_SPI2_MOSI_BIT 3 +#else +#error "Invalid SPI2_MISO Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <2=>2 +// Selects DMA Stream (only Stream 2 can be used) +// Channel <0=>0 +// Selects DMA Channel (only Channel 0 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI2_RX_DMA 1 +#define RTE_SPI2_RX_DMA_NUMBER 1 +#define RTE_SPI2_RX_DMA_STREAM 2 +#define RTE_SPI2_RX_DMA_CHANNEL 0 +#define RTE_SPI2_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <3=>3 +// Selects DMA Stream (only Stream 3 can be used) +// Channel <0=>0 +// Selects DMA Channel (only Channel 0 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI2_TX_DMA 1 +#define RTE_SPI2_TX_DMA_NUMBER 1 +#define RTE_SPI2_TX_DMA_STREAM 3 +#define RTE_SPI2_TX_DMA_CHANNEL 0 +#define RTE_SPI2_TX_DMA_PRIORITY 0 + +// + + +// SPI3 (Serial Peripheral Interface 3) [Driver_SPI3] +// Configuration settings for Driver_SPI3 in component ::Drivers:SPI +#define RTE_SPI3 0 + +// SPI3_NSS Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SPI3_NSS_PIN 1 +#define RTE_SPI3_NSS_PORT GPIO_PORT(0) +#define RTE_SPI3_NSS_BIT 15 + +// SPI3_SCK Pin <0=>PB3 <1=>PC10 +#define RTE_SPI3_SCL_PORT_ID 0 +#if (RTE_SPI3_SCL_PORT_ID == 0) +#define RTE_SPI3_SCL_PORT GPIOB +#define RTE_SPI3_SCL_BIT 3 +#elif (RTE_SPI3_SCL_PORT_ID == 1) +#define RTE_SPI3_SCL_PORT GPIOC +#define RTE_SPI3_SCL_BIT 10 +#else +#error "Invalid SPI3_SCK Pin Configuration!" +#endif + +// SPI3_MISO Pin <0=>PB4 <1=>PC11 +#define RTE_SPI3_MISO_PORT_ID 0 +#if (RTE_SPI3_MISO_PORT_ID == 0) +#define RTE_SPI3_MISO_PORT GPIOB +#define RTE_SPI3_MISO_BIT 4 +#elif (RTE_SPI3_MISO_PORT_ID == 1) +#define RTE_SPI3_MISO_PORT GPIOC +#define RTE_SPI3_MISO_BIT 11 +#else +#error "Invalid SPI3_MISO Pin Configuration!" +#endif + +// SPI3_MOSI Pin <0=>PB5 <1=>PC12 +#define RTE_SPI3_MOSI_PORT_ID 0 +#if (RTE_SPI3_MOSI_PORT_ID == 0) +#define RTE_SPI3_MOSI_PORT GPIOB +#define RTE_SPI3_MOSI_BIT 5 +#elif (RTE_SPI3_MOSI_PORT_ID == 1) +#define RTE_SPI3_MOSI_PORT GPIOC +#define RTE_SPI3_MOSI_BIT 12 +#else +#error "Invalid SPI3_MISO Pin Configuration!" +#endif + +// DMA Rx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <0=>0 <2=>2 +// Selects DMA Stream (only Stream 0 or 2 can be used) +// Channel <0=>0 +// Selects DMA Channel (only Channel 0 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI3_RX_DMA 1 +#define RTE_SPI3_RX_DMA_NUMBER 1 +#define RTE_SPI3_RX_DMA_STREAM 0 +#define RTE_SPI3_RX_DMA_CHANNEL 0 +#define RTE_SPI3_RX_DMA_PRIORITY 0 + +// DMA Tx +// Number <1=>1 +// Selects DMA Number (only DMA1 can be used) +// Stream <5=>5 <7=>7 +// Selects DMA Stream (only Stream 5 or 7 can be used) +// Channel <0=>0 +// Selects DMA Channel (only Channel 0 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SPI3_TX_DMA 1 +#define RTE_SPI3_TX_DMA_NUMBER 1 +#define RTE_SPI3_TX_DMA_STREAM 5 +#define RTE_SPI3_TX_DMA_CHANNEL 0 +#define RTE_SPI3_TX_DMA_PRIORITY 0 + +// + + +// SDIO (Secure Digital Input/Output) [Driver_MCI0] +// Configuration settings for Driver_MCI0 in component ::Drivers:MCI +#define RTE_SDIO 1 + +// SDIO_CD (Card Detect) Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SDIO_CD_PIN 1 +#define RTE_SDIO_CD_ACTIVE 0 +#define RTE_SDIO_CD_PORT GPIO_PORT(7) +#define RTE_SDIO_CD_BIT 15 + +// SDIO_WP (Write Protect) Pin +// Configure Pin if exists +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_SDIO_WP_PIN 0 +#define RTE_SDIO_WP_ACTIVE 0 +#define RTE_SDIO_WP_PORT GPIO_PORT(7) +#define RTE_SDIO_WP_BIT 16 + +// SDIO Bus +// SDIO_CK Pin <0=>PC12 +#define RTE_SDIO_CK_PORT_ID 0 +#if (RTE_SDIO_CK_PORT_ID == 0) +#define RTE_SDIO_CK_PORT GPIOC +#define RTE_SDIO_CK_PIN 12 +#else +#error "Invalid SDIO_CK Pin Configuration!" +#endif +// SDIO_CMD Pin <0=>PD2 +#define RTE_SDIO_CMD_PORT_ID 0 +#if (RTE_SDIO_CMD_PORT_ID == 0) +#define RTE_SDIO_CMD_PORT GPIOD +#define RTE_SDIO_CMD_PIN 2 +#else +#error "Invalid SDIO_CDM Pin Configuration!" +#endif +// SDIO_D0 Pin <0=>PC8 +#define RTE_SDIO_D0_PORT_ID 0 +#if (RTE_SDIO_D0_PORT_ID == 0) +#define RTE_SDIO_D0_PORT GPIOC +#define RTE_SDIO_D0_PIN 8 +#else +#error "Invalid SDIO_D0 Pin Configuration!" +#endif +// SDIO_D1 Pin <0=>PC9 +#define RTE_SDIO_D1_PORT_ID 0 +#if (RTE_SDIO_D1_PORT_ID == 0) +#define RTE_SDIO_D1_PORT GPIOC +#define RTE_SDIO_D1_PIN 9 +#else +#error "Invalid SDIO_D1 Pin Configuration!" +#endif +// SDIO_D2 Pin <0=>PC10 +#define RTE_SDIO_D2_PORT_ID 0 +#if (RTE_SDIO_D2_PORT_ID == 0) +#define RTE_SDIO_D2_PORT GPIOC +#define RTE_SDIO_D2_PIN 10 +#else +#error "Invalid SDIO_D2 Pin Configuration!" +#endif +// SDIO_D3 Pin <0=>PC11 +#define RTE_SDIO_D3_PORT_ID 0 +#if (RTE_SDIO_D3_PORT_ID == 0) +#define RTE_SDIO_D3_PORT GPIOC +#define RTE_SDIO_D3_PIN 11 +#else +#error "Invalid SDIO_D3 Pin Configuration!" +#endif +// SDIO_D4 Pin <0=>PB8 +#define RTE_SDIO_D4_PORT_ID 0 +#if (RTE_SDIO_D4_PORT_ID == 0) +#define RTE_SDIO_D4_PORT GPIOB +#define RTE_SDIO_D4_PIN 8 +#else +#error "Invalid SDIO_D4 Pin Configuration!" +#endif +// SDIO_D5 Pin <0=>PB9 +#define RTE_SDIO_D5_PORT_ID 0 +#if (RTE_SDIO_D5_PORT_ID == 0) +#define RTE_SDIO_D5_PORT GPIOB +#define RTE_SDIO_D5_PIN 9 +#else +#error "Invalid SDIO_D5 Pin Configuration!" +#endif +// SDIO_D6 Pin <0=>PC6 +#define RTE_SDIO_D6_PORT_ID 0 +#if (RTE_SDIO_D6_PORT_ID == 0) +#define RTE_SDIO_D6_PORT GPIOC +#define RTE_SDIO_D6_PIN 6 +#else +#error "Invalid SDIO_D6 Pin Configuration!" +#endif +// SDIO_D7 Pin <0=>PC7 +#define RTE_SDIO_D7_PORT_ID 0 +#if (RTE_SDIO_D7_PORT_ID == 0) +#define RTE_SDIO_D7_PORT GPIOC +#define RTE_SDIO_D7_PIN 7 +#else +#error "Invalid SDIO_D7 Pin Configuration!" +#endif +// + +// DMA +// Number <2=>2 +// Selects DMA Number (only DMA2 can be used) +// Stream <3=>3 <6=>6 +// Selects DMA Stream (only Stream 3 or 6 can be used) +// Channel <4=>4 +// Selects DMA Channel (only Channel 4 can be used) +// Priority <0=>Low <1=>Medium <2=>High <3=>Very High +// Selects DMA Priority +// +#define RTE_SDIO_DMA 1 +#define RTE_SDIO_DMA_NUMBER 2 +#define RTE_SDIO_DMA_STREAM 3 +#define RTE_SDIO_DMA_CHANNEL 4 +#define RTE_SDIO_DMA_PRIORITY 0 + +// + + +// ETH (Ethernet Interface) [Driver_ETH_MAC0] +// Configuration settings for Driver_ETH_MAC0 in component ::Drivers:Ethernet MAC +#define RTE_ETH 1 + +// MII (Media Independent Interface) +#define RTE_ETH_MII 0 + +// ETH_MII_TX_CLK Pin <0=>PC3 +#define RTE_ETH_MII_TX_CLK_PORT_ID 0 +#if (RTE_ETH_MII_TX_CLK_PORT_ID == 0) +#define RTE_ETH_MII_TX_CLK_PORT GPIOC +#define RTE_ETH_MII_TX_CLK_PIN 3 +#else +#error "Invalid ETH_MII_TX_CLK Pin Configuration!" +#endif +// ETH_MII_TXD0 Pin <0=>PB12 <1=>PG13 +#define RTE_ETH_MII_TXD0_PORT_ID 0 +#if (RTE_ETH_MII_TXD0_PORT_ID == 0) +#define RTE_ETH_MII_TXD0_PORT GPIOB +#define RTE_ETH_MII_TXD0_PIN 12 +#elif (RTE_ETH_MII_TXD0_PORT_ID == 1) +#define RTE_ETH_MII_TXD0_PORT GPIOG +#define RTE_ETH_MII_TXD0_PIN 13 +#else +#error "Invalid ETH_MII_TXD0 Pin Configuration!" +#endif +// ETH_MII_TXD1 Pin <0=>PB13 <1=>PG14 +#define RTE_ETH_MII_TXD1_PORT_ID 0 +#if (RTE_ETH_MII_TXD1_PORT_ID == 0) +#define RTE_ETH_MII_TXD1_PORT GPIOB +#define RTE_ETH_MII_TXD1_PIN 13 +#elif (RTE_ETH_MII_TXD1_PORT_ID == 1) +#define RTE_ETH_MII_TXD1_PORT GPIOG +#define RTE_ETH_MII_TXD1_PIN 14 +#else +#error "Invalid ETH_MII_TXD1 Pin Configuration!" +#endif +// ETH_MII_TXD2 Pin <0=>PC2 +#define RTE_ETH_MII_TXD2_PORT_ID 0 +#if (RTE_ETH_MII_TXD2_PORT_ID == 0) +#define RTE_ETH_MII_TXD2_PORT GPIOC +#define RTE_ETH_MII_TXD2_PIN 2 +#else +#error "Invalid ETH_MII_TXD2 Pin Configuration!" +#endif +// ETH_MII_TXD3 Pin <0=>PB8 <1=>PE2 +#define RTE_ETH_MII_TXD3_PORT_ID 0 +#if (RTE_ETH_MII_TXD3_PORT_ID == 0) +#define RTE_ETH_MII_TXD3_PORT GPIOB +#define RTE_ETH_MII_TXD3_PIN 8 +#elif (RTE_ETH_MII_TXD3_PORT_ID == 1) +#define RTE_ETH_MII_TXD3_PORT GPIOE +#define RTE_ETH_MII_TXD3_PIN 2 +#else +#error "Invalid ETH_MII_TXD3 Pin Configuration!" +#endif +// ETH_MII_TX_EN Pin <0=>PB11 <1=>PG11 +#define RTE_ETH_MII_TX_EN_PORT_ID 0 +#if (RTE_ETH_MII_TX_EN_PORT_ID == 0) +#define RTE_ETH_MII_TX_EN_PORT GPIOB +#define RTE_ETH_MII_TX_EN_PIN 11 +#elif (RTE_ETH_MII_TX_EN_PORT_ID == 1) +#define RTE_ETH_MII_TX_EN_PORT GPIOG +#define RTE_ETH_MII_TX_EN_PIN 11 +#else +#error "Invalid ETH_MII_TX_EN Pin Configuration!" +#endif +// ETH_MII_RX_CLK Pin <0=>PA1 +#define RTE_ETH_MII_RX_CLK_PORT_ID 0 +#if (RTE_ETH_MII_RX_CLK_PORT_ID == 0) +#define RTE_ETH_MII_RX_CLK_PORT GPIOA +#define RTE_ETH_MII_RX_CLK_PIN 1 +#else +#error "Invalid ETH_MII_RX_CLK Pin Configuration!" +#endif +// ETH_MII_RXD0 Pin <0=>PC4 +#define RTE_ETH_MII_RXD0_PORT_ID 0 +#if (RTE_ETH_MII_RXD0_PORT_ID == 0) +#define RTE_ETH_MII_RXD0_PORT GPIOC +#define RTE_ETH_MII_RXD0_PIN 4 +#else +#error "Invalid ETH_MII_RXD0 Pin Configuration!" +#endif +// ETH_MII_RXD1 Pin <0=>PC5 +#define RTE_ETH_MII_RXD1_PORT_ID 0 +#if (RTE_ETH_MII_RXD1_PORT_ID == 0) +#define RTE_ETH_MII_RXD1_PORT GPIOC +#define RTE_ETH_MII_RXD1_PIN 5 +#else +#error "Invalid ETH_MII_RXD1 Pin Configuration!" +#endif +// ETH_MII_RXD2 Pin <0=>PB0 <1=>PH6 +#define RTE_ETH_MII_RXD2_PORT_ID 0 +#if (RTE_ETH_MII_RXD2_PORT_ID == 0) +#define RTE_ETH_MII_RXD2_PORT GPIOB +#define RTE_ETH_MII_RXD2_PIN 0 +#elif (RTE_ETH_MII_RXD2_PORT_ID == 1) +#define RTE_ETH_MII_RXD2_PORT GPIOH +#define RTE_ETH_MII_RXD2_PIN 6 +#else +#error "Invalid ETH_MII_RXD2 Pin Configuration!" +#endif +// ETH_MII_RXD3 Pin <0=>PB1 <1=>PH7 +#define RTE_ETH_MII_RXD3_PORT_ID 0 +#if (RTE_ETH_MII_RXD3_PORT_ID == 0) +#define RTE_ETH_MII_RXD3_PORT GPIOB +#define RTE_ETH_MII_RXD3_PIN 1 +#elif (RTE_ETH_MII_RXD3_PORT_ID == 1) +#define RTE_ETH_MII_RXD3_PORT GPIOH +#define RTE_ETH_MII_RXD3_PIN 7 +#else +#error "Invalid ETH_MII_RXD3 Pin Configuration!" +#endif +// ETH_MII_RX_DV Pin <0=>PA7 +#define RTE_ETH_MII_RX_DV_PORT_ID 0 +#if (RTE_ETH_MII_RX_DV_PORT_ID == 0) +#define RTE_ETH_MII_RX_DV_PORT GPIOA +#define RTE_ETH_MII_RX_DV_PIN 7 +#else +#error "Invalid ETH_MII_RX_DV Pin Configuration!" +#endif +// ETH_MII_RX_ER Pin <0=>PB10 <1=>PI10 +#define RTE_ETH_MII_RX_ER_PORT_ID 0 +#if (RTE_ETH_MII_RX_ER_PORT_ID == 0) +#define RTE_ETH_MII_RX_ER_PORT GPIOB +#define RTE_ETH_MII_RX_ER_PIN 10 +#elif (RTE_ETH_MII_RXD3_PORT_ID == 1) +#define RTE_ETH_MII_RX_ER_PORT GPIOI +#define RTE_ETH_MII_RX_ER_PIN 10 +#else +#error "Invalid ETH_MII_RX_ER Pin Configuration!" +#endif +// ETH_MII_CRS Pin <0=>PA0 <1=>PH2 +#define RTE_ETH_MII_CRS_PORT_ID 0 +#if (RTE_ETH_MII_CRS_PORT_ID == 0) +#define RTE_ETH_MII_CRS_PORT GPIOA +#define RTE_ETH_MII_CRS_PIN 0 +#elif (RTE_ETH_MII_CRS_PORT_ID == 1) +#define RTE_ETH_MII_CRS_PORT GPIOH +#define RTE_ETH_MII_CRS_PIN 2 +#else +#error "Invalid ETH_MII_CRS Pin Configuration!" +#endif +// ETH_MII_COL Pin <0=>PA3 <1=>PH3 +#define RTE_ETH_MII_COL_PORT_ID 0 +#if (RTE_ETH_MII_COL_PORT_ID == 0) +#define RTE_ETH_MII_COL_PORT GPIOA +#define RTE_ETH_MII_COL_PIN 3 +#elif (RTE_ETH_MII_COL_PORT_ID == 1) +#define RTE_ETH_MII_COL_PORT GPIOH +#define RTE_ETH_MII_COL_PIN 3 +#else +#error "Invalid ETH_MII_COL Pin Configuration!" +#endif + +// + +// RMII (Reduced Media Independent Interface) +#define RTE_ETH_RMII 1 + +// ETH_RMII_TXD0 Pin <0=>PB12 <1=>PG13 +#define RTE_ETH_RMII_TXD0_PORT_ID 1 +#if (RTE_ETH_RMII_TXD0_PORT_ID == 0) +#define RTE_ETH_RMII_TXD0_PORT GPIOB +#define RTE_ETH_RMII_TXD0_PIN 12 +#elif (RTE_ETH_RMII_TXD0_PORT_ID == 1) +#define RTE_ETH_RMII_TXD0_PORT GPIOG +#define RTE_ETH_RMII_TXD0_PIN 13 +#else +#error "Invalid ETH_RMII_TXD0 Pin Configuration!" +#endif +// ETH_RMII_TXD1 Pin <0=>PB13 <1=>PG14 +#define RTE_ETH_RMII_TXD1_PORT_ID 1 +#if (RTE_ETH_RMII_TXD1_PORT_ID == 0) +#define RTE_ETH_RMII_TXD1_PORT GPIOB +#define RTE_ETH_RMII_TXD1_PIN 13 +#elif (RTE_ETH_RMII_TXD1_PORT_ID == 1) +#define RTE_ETH_RMII_TXD1_PORT GPIOG +#define RTE_ETH_RMII_TXD1_PIN 14 +#else +#error "Invalid ETH_RMII_TXD1 Pin Configuration!" +#endif +// ETH_RMII_TX_EN Pin <0=>PB11 <1=>PG11 +#define RTE_ETH_RMII_TX_EN_PORT_ID 1 +#if (RTE_ETH_RMII_TX_EN_PORT_ID == 0) +#define RTE_ETH_RMII_TX_EN_PORT GPIOB +#define RTE_ETH_RMII_TX_EN_PIN 11 +#elif (RTE_ETH_RMII_TX_EN_PORT_ID == 1) +#define RTE_ETH_RMII_TX_EN_PORT GPIOG +#define RTE_ETH_RMII_TX_EN_PIN 11 +#else +#error "Invalid ETH_RMII_TX_EN Pin Configuration!" +#endif +// ETH_RMII_RXD0 Pin <0=>PC4 +#define RTE_ETH_RMII_RXD0_PORT_ID 0 +#if (RTE_ETH_RMII_RXD0_PORT_ID == 0) +#define RTE_ETH_RMII_RXD0_PORT GPIOC +#define RTE_ETH_RMII_RXD0_PIN 4 +#else +#error "Invalid ETH_RMII_RXD0 Pin Configuration!" +#endif +// ETH_RMII_RXD1 Pin <0=>PC5 +#define RTE_ETH_RMII_RXD1_PORT_ID 0 +#if (RTE_ETH_RMII_RXD1_PORT_ID == 0) +#define RTE_ETH_RMII_RXD1_PORT GPIOC +#define RTE_ETH_RMII_RXD1_PIN 5 +#else +#error "Invalid ETH_RMII_RXD1 Pin Configuration!" +#endif +// ETH_RMII_REF_CLK Pin <0=>PA1 +#define RTE_ETH_RMII_REF_CLK_PORT_ID 0 +#if (RTE_ETH_RMII_REF_CLK_PORT_ID == 0) +#define RTE_ETH_RMII_REF_CLK_PORT GPIOA +#define RTE_ETH_RMII_REF_CLK_PIN 1 +#else +#error "Invalid ETH_RMII_REF_CLK Pin Configuration!" +#endif +// ETH_RMII_CRS_DV Pin <0=>PA7 +#define RTE_ETH_RMII_CRS_DV_PORT_ID 0 +#if (RTE_ETH_RMII_CRS_DV_PORT_ID == 0) +#define RTE_ETH_RMII_CRS_DV_PORT GPIOA +#define RTE_ETH_RMII_CRS_DV_PIN 7 +#else +#error "Invalid ETH_RMII_CRS_DV Pin Configuration!" +#endif + +// + +// Management Data Interface +// ETH_MDC Pin <0=>PC1 +#define RTE_ETH_MDI_MDC_PORT_ID 0 +#if (RTE_ETH_MDI_MDC_PORT_ID == 0) +#define RTE_ETH_MDI_MDC_PORT GPIOC +#define RTE_ETH_MDI_MDC_PIN 1 +#else +#error "Invalid ETH_MDC Pin Configuration!" +#endif +// ETH_MDIO Pin <0=>PA2 +#define RTE_ETH_MDI_MDIO_PORT_ID 0 +#if (RTE_ETH_MDI_MDIO_PORT_ID == 0) +#define RTE_ETH_MDI_MDIO_PORT GPIOA +#define RTE_ETH_MDI_MDIO_PIN 2 +#else +#error "Invalid ETH_MDIO Pin Configuration!" +#endif +// + +// Reference 25MHz/50MHz Clock generation +#define RTE_ETH_REF_CLOCK 0 + +// MCO Pin <0=>PA2 <1=>PC9 +#define RTE_ETH_REF_CLOCK_PORT_ID 0 +#if (RTE_ETH_REF_CLOCK_PORT_ID == 0) +#define RTE_ETH_REF_CLOCK_PORT GPIOA +#define RTE_ETH_REF_CLOCK_PIN 8 +#elif (RTE_ETH_REF_CLOCK_PORT_ID == 1) +#define RTE_ETH_REF_CLOCK_PORT GPIOC +#define RTE_ETH_REF_CLOCK_PIN 9 +#else +#error "Invalid MCO Pin Configuration!" +#endif + +// + +// + + +// USB OTG Full-speed +#define RTE_USB_OTG_FS 0 + +// Device [Driver_USBD0] +// Configuration settings for Driver_USBD0 in component ::Drivers:USB Device +#define RTE_USB_OTG_FS_DEV 1 + +// Endpoints +// Reduce memory requirements of Driver by disabling unused endpoints +// Endpoint 1 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 2 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 3 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// +#define RTE_USB_OTG_FS_DEV_EP 0x0000000F +#define RTE_USB_OTG_FS_DEV_EP_BULK 0x000E000E +#define RTE_USB_OTG_FS_DEV_EP_INT 0x000E000E +#define RTE_USB_OTG_FS_DEV_EP_ISO 0x000E000E + +// + +// Host [Driver_USBH0] +// Configuration settings for Driver_USBH0 in component ::Drivers:USB Host + +#define RTE_USB_OTG_FS_HOST 1 + +// VBUS Power On/Off Pin +// Configure Pin for driving VBUS +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_OTG_FS_VBUS_PIN 1 +#define RTE_OTG_FS_VBUS_ACTIVE 0 +#define RTE_OTG_FS_VBUS_PORT GPIO_PORT(7) +#define RTE_OTG_FS_VBUS_BIT 5 + +// Overcurrent Detection Pin +// Configure Pin for overcurrent detection +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_OTG_FS_OC_PIN 1 +#define RTE_OTG_FS_OC_ACTIVE 0 +#define RTE_OTG_FS_OC_PORT GPIO_PORT(5) +#define RTE_OTG_FS_OC_BIT 11 +// + +// + + +// USB OTG High-speed +#define RTE_USB_OTG_HS 0 + +// PHY (Physical Layer) + +// PHY Interface +// <0=>On-chip full-speed PHY +// <1=>External ULPI high-speed PHY +#define RTE_USB_OTG_HS_PHY 1 + +// External ULPI Pins (UTMI+ Low Pin Interface) + +// OTG_HS_ULPI_CK Pin <0=>PA5 +#define RTE_USB_OTG_HS_ULPI_CK_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_CK_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_CK_PORT GPIOA +#define RTE_USB_OTG_HS_ULPI_CK_PIN 5 +#else +#error "Invalid OTG_HS_ULPI_CK Pin Configuration!" +#endif +// OTG_HS_ULPI_DIR Pin <0=>PI11 <1=>PC2 +#define RTE_USB_OTG_HS_ULPI_DIR_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_DIR_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_DIR_PORT GPIOI +#define RTE_USB_OTG_HS_ULPI_DIR_PIN 11 +#elif (RTE_USB_OTG_HS_ULPI_DIR_PORT_ID == 1) +#define RTE_USB_OTG_HS_ULPI_DIR_PORT GPIOC +#define RTE_USB_OTG_HS_ULPI_DIR_PIN 2 +#else +#error "Invalid OTG_HS_ULPI_DIR Pin Configuration!" +#endif +// OTG_HS_ULPI_STP Pin <0=>PC0 +#define RTE_USB_OTG_HS_ULPI_STP_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_STP_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_STP_PORT GPIOC +#define RTE_USB_OTG_HS_ULPI_STP_PIN 0 +#else +#error "Invalid OTG_HS_ULPI_STP Pin Configuration!" +#endif +// OTG_HS_ULPI_NXT Pin <0=>PC2 <1=>PH4 +#define RTE_USB_OTG_HS_ULPI_NXT_PORT_ID 1 +#if (RTE_USB_OTG_HS_ULPI_NXT_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_NXT_PORT GPIOC +#define RTE_USB_OTG_HS_ULPI_NXT_PIN 2 +#elif (RTE_USB_OTG_HS_ULPI_NXT_PORT_ID == 1) +#define RTE_USB_OTG_HS_ULPI_NXT_PORT GPIOH +#define RTE_USB_OTG_HS_ULPI_NXT_PIN 4 +#else +#error "Invalid OTG_HS_ULPI_NXT Pin Configuration!" +#endif +// OTG_HS_ULPI_D0 Pin <0=>PA3 +#define RTE_USB_OTG_HS_ULPI_D0_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D0_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D0_PORT GPIOA +#define RTE_USB_OTG_HS_ULPI_D0_PIN 3 +#else +#error "Invalid OTG_HS_ULPI_D0 Pin Configuration!" +#endif +// OTG_HS_ULPI_D1 Pin <0=>PB0 +#define RTE_USB_OTG_HS_ULPI_D1_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D1_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D1_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D1_PIN 0 +#else +#error "Invalid OTG_HS_ULPI_D1 Pin Configuration!" +#endif +// OTG_HS_ULPI_D2 Pin <0=>PB1 +#define RTE_USB_OTG_HS_ULPI_D2_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D2_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D2_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D2_PIN 1 +#else +#error "Invalid OTG_HS_ULPI_D2 Pin Configuration!" +#endif +// OTG_HS_ULPI_D3 Pin <0=>PB10 +#define RTE_USB_OTG_HS_ULPI_D3_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D3_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D3_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D3_PIN 10 +#else +#error "Invalid OTG_HS_ULPI_D3 Pin Configuration!" +#endif +// OTG_HS_ULPI_D4 Pin <0=>PB11 +#define RTE_USB_OTG_HS_ULPI_D4_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D4_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D4_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D4_PIN 11 +#else +#error "Invalid OTG_HS_ULPI_D4 Pin Configuration!" +#endif +// OTG_HS_ULPI_D5 Pin <0=>PB12 +#define RTE_USB_OTG_HS_ULPI_D5_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D5_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D5_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D5_PIN 12 +#else +#error "Invalid OTG_HS_ULPI_D5 Pin Configuration!" +#endif +// OTG_HS_ULPI_D6 Pin <0=>PB13 +#define RTE_USB_OTG_HS_ULPI_D6_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D6_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D6_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D6_PIN 13 +#else +#error "Invalid OTG_HS_ULPI_D6 Pin Configuration!" +#endif +// OTG_HS_ULPI_D7 Pin <0=>PB5 +#define RTE_USB_OTG_HS_ULPI_D7_PORT_ID 0 +#if (RTE_USB_OTG_HS_ULPI_D7_PORT_ID == 0) +#define RTE_USB_OTG_HS_ULPI_D7_PORT GPIOB +#define RTE_USB_OTG_HS_ULPI_D7_PIN 5 +#else +#error "Invalid OTG_HS_ULPI_D7 Pin Configuration!" +#endif + +// + +// + +// Device [Driver_USBD1] +// Configuration settings for Driver_USBD1 in component ::Drivers:USB Device +#define RTE_USB_OTG_HS_DEV 1 + +// Endpoints +// Reduce memory requirements of Driver by disabling unused endpoints +// Endpoint 1 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 2 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 3 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 4 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// Endpoint 5 +// Bulk OUT +// Bulk IN +// Interrupt OUT +// Interrupt IN +// Isochronous OUT +// Isochronous IN +// +// +#define RTE_USB_OTG_HS_DEV_EP 0x0000003F +#define RTE_USB_OTG_HS_DEV_EP_BULK 0x003E003E +#define RTE_USB_OTG_HS_DEV_EP_INT 0x003E003E +#define RTE_USB_OTG_HS_DEV_EP_ISO 0x003E003E + +// + +// Host [Driver_USBH1] +// Configuration settings for Driver_USBH1 in component ::Drivers:USB Host +#define RTE_USB_OTG_HS_HOST 1 + +// VBUS Power On/Off Pin +// Configure Pin for driving VBUS +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_OTG_HS_VBUS_PIN 1 +#define RTE_OTG_HS_VBUS_ACTIVE 0 +#define RTE_OTG_HS_VBUS_PORT GPIO_PORT(2) +#define RTE_OTG_HS_VBUS_BIT 2 + +// Overcurrent Detection Pin +// Configure Pin for overcurrent detection +// GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11) +// Active State <0=>Low <1=>High +// Selects Active State Logical Level +// Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD +// <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI +// Selects Port Name +// Bit <0-15> +// Selects Port Bit +// +#define RTE_OTG_HS_OC_PIN 1 +#define RTE_OTG_HS_OC_ACTIVE 0 +#define RTE_OTG_HS_OC_PORT GPIO_PORT(5) +#define RTE_OTG_HS_OC_BIT 12 +// + +// + + +// EXTI (External Interrupt/Event Controller) +#define RTE_EXTI 0 + +// EXTI0 Line +#define RTE_EXTI0 0 +// Pin <0=>PA0 <1=>PB0 <2=>PC0 <3=>PD0 <4=>PE0 <5=>PF0 <6=>PG0 <7=>PH0 <8=>PI0 +#define RTE_EXTI0_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI0_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI0_TRIGGER 0 +// + +// EXTI1 Line +#define RTE_EXTI1 0 +// Pin <0=>PA1 <1=>PB1 <2=>PC1 <3=>PD1 <4=>PE1 <5=>PF1 <6=>PG1 <7=>PH1 <8=>PI1 +#define RTE_EXTI1_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI1_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI1_TRIGGER 0 +// + +// EXTI2 Line +#define RTE_EXTI2 0 +// Pin <0=>PA2 <1=>PB2 <2=>PC2 <3=>PD2 <4=>PE2 <5=>PF2 <6=>PG2 <7=>PH2 <8=>PI2 +#define RTE_EXTI2_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI2_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI2_TRIGGER 0 +// + +// EXTI3 Line +#define RTE_EXTI3 0 +// Pin <0=>PA3 <1=>PB3 <2=>PC3 <3=>PD3 <4=>PE3 <5=>PF3 <6=>PG3 <7=>PH3 <8=>PI3 +#define RTE_EXTI3_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI3_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI3_TRIGGER 0 +// + +// EXTI4 Line +#define RTE_EXTI4 0 +// Pin <0=>PA4 <1=>PB4 <2=>PC4 <3=>PD4 <4=>PE4 <5=>PF4 <6=>PG4 <7=>PH4 <8=>PI4 +#define RTE_EXTI4_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI4_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI4_TRIGGER 0 +// + +// EXTI5 Line +#define RTE_EXTI5 0 +// Pin <0=>PA5 <1=>PB5 <2=>PC5 <3=>PD5 <4=>PE5 <5=>PF5 <6=>PG5 <7=>PH5 <8=>PI5 +#define RTE_EXTI5_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI5_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI5_TRIGGER 0 +// + +// EXTI6 Line +#define RTE_EXTI6 0 +// Pin <0=>PA6 <1=>PB6 <2=>PC6 <3=>PD6 <4=>PE6 <5=>PF6 <6=>PG6 <7=>PH6 <8=>PI6 +#define RTE_EXTI6_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI6_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI6_TRIGGER 0 +// + +// EXTI7 Line +#define RTE_EXTI7 0 +// Pin <0=>PA7 <1=>PB7 <2=>PC7 <3=>PD7 <4=>PE7 <5=>PF7 <6=>PG7 <7=>PH7 <8=>PI7 +#define RTE_EXTI7_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI7_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI7_TRIGGER 0 +// + +// EXTI8 Line +#define RTE_EXTI8 0 +// Pin <0=>PA8 <1=>PB8 <2=>PC8 <3=>PD8 <4=>PE8 <5=>PF8 <6=>PG8 <7=>PH8 <8=>PI8 +#define RTE_EXTI8_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI8_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI8_TRIGGER 0 +// + +// EXTI9 Line +#define RTE_EXTI9 0 +// Pin <0=>PA9 <1=>PB9 <2=>PC9 <3=>PD9 <4=>PE9 <5=>PF9 <6=>PG9 <7=>PH9 <8=>PI9 +#define RTE_EXTI9_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI9_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI9_TRIGGER 0 +// + +// EXTI10 Line +#define RTE_EXTI10 0 +// Pin <0=>PA10 <1=>PB10 <2=>PC10 <3=>PD10 <4=>PE10 <5=>PF10 <6=>PG10 <7=>PH10 <8=>PI10 +#define RTE_EXTI10_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI10_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI10_TRIGGER 0 +// + +// EXTI11 Line +#define RTE_EXTI11 0 +// Pin <0=>PA11 <1=>PB11 <2=>PC11 <3=>PD11 <4=>PE11 <5=>PF11 <6=>PG11 <7=>PH11 <8=>PI11 +#define RTE_EXTI11_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI11_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI11_TRIGGER 0 +// + +// EXTI12 Line +#define RTE_EXTI12 0 +// Pin <0=>PA12 <1=>PB12 <2=>PC12 <3=>PD12 <4=>PE12 <5=>PF12 <6=>PG12 <7=>PH12 +#define RTE_EXTI12_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI12_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI12_TRIGGER 0 +// + +// EXTI13 Line +#define RTE_EXTI13 0 +// Pin <0=>PA13 <1=>PB13 <2=>PC13 <3=>PD13 <4=>PE13 <5=>PF13 <6=>PG13 <7=>PH13 +#define RTE_EXTI13_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI13_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI13_TRIGGER 0 +// + +// EXTI14 Line +#define RTE_EXTI14 0 +// Pin <0=>PA14 <1=>PB14 <2=>PC14 <3=>PD14 <4=>PE14 <5=>PF14 <6=>PG14 <7=>PH14 +#define RTE_EXTI14_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI14_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI14_TRIGGER 0 +// + +// EXTI15 Line +#define RTE_EXTI15 0 +// Pin <0=>PA15 <1=>PB15 <2=>PC15 <3=>PD15 <4=>PE15 <5=>PF15 <6=>PG15 <7=>PH15 +#define RTE_EXTI15_PIN 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI15_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI15_TRIGGER 0 +// + +// EXTI16 Line: PVD Output +#define RTE_EXTI16 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI16_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI16_TRIGGER 0 +// + +// EXTI17 Line: RTC Alarm +#define RTE_EXTI17 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI17_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI17_TRIGGER 0 +// + +// EXTI18 Line: USB OTG FS Wakeup +#define RTE_EXTI18 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI18_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI18_TRIGGER 0 +// + +// EXTI19 Line: Ethernet Wakeup +#define RTE_EXTI19 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI19_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI19_TRIGGER 0 +// + +// EXTI20 Line: USB OTG HS Wakeup +#define RTE_EXTI20 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI20_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI20_TRIGGER 0 +// + +// EXTI21 Line: RTC Tamper and TimeStamp +#define RTE_EXTI21 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI21_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI21_TRIGGER 0 +// + +// EXTI22 Line: RTC Wakeup +#define RTE_EXTI22 0 +// Mode <0=>Interrupt <1=>Event +#define RTE_EXTI22_MODE 0 +// Trigger <0=>None <1=>Raising edge <2=>Falling edge <3=>Any edge +#define RTE_EXTI22_TRIGGER 0 +// + +// + + +// FSMC (Flexible Static Memory Controller) +#define RTE_FSMC 0 + +// Pin Configuration +// Configure Pins +#define RTE_FSMC_PINS 0 + +// Address Bus Pins +// <0=>A[17:16] +// <1=>A[10:0] <2=>A[15:0] <3=>A[16:0] <4=>A[17:0] +// <5=>A[18:0] <6=>A[19:0] <7=>A[20:0] <8=>A[21:0] +// <9=>A[22:0] <10=>A[23:0] <11=>A[24:0] <12=>A[25:0] +#define RTE_FSMC_ABUS_PINS 10 +// Data Bus Pins <0=>D[7:0] <1=>D[15:0] +#define RTE_FSMC_DBUS_PINS 0 +// FSMC_NOE Pin +#define RTE_FSMC_NOE_PIN 0 +// FSMC_NWE Pin +#define RTE_FSMC_NWE_PIN 0 +// FSMC_NBL0 Pin +#define RTE_FSMC_NBL0_PIN 0 +// FSMC_NBL1 Pin +#define RTE_FSMC_NBL1_PIN 0 +// FSMC_NL Pin +#define RTE_FSMC_NL_PIN 0 +// FSMC_NWAIT Pin +#define RTE_FSMC_NWAIT_PIN 0 +// FSMC_CLK Pin +#define RTE_FSMC_CLK_PIN 0 +// FSMC_NE1/NCE2 Pin +#define RTE_FSMC_NE1_PIN 0 +// FSMC_NE2/NCE3 Pin +#define RTE_FSMC_NE2_PIN 0 +// FSMC_NE3/NCE4_1 Pin +#define RTE_FSMC_NE3_PIN 0 +// FSMC_NE4 Pin +#define RTE_FSMC_NE4_PIN 0 +// FSMC_NCE4_2 Pin +#define RTE_FSMC_NCE42_PIN 0 +// FSMC_INT2 Pin +#define RTE_FSMC_INT2_PIN 0 +// FSMC_INT3 Pin +#define RTE_FSMC_INT3_PIN 0 +// FSMC_INTR Pin +#define RTE_FSMC_INTR_PIN 0 +// FSMC_NIORD Pin +#define RTE_FSMC_NIORD_PIN 0 +// FSMC_NIOWR Pin +#define RTE_FSMC_NIOWR_PIN 0 +// FSMC_NREG Pin +#define RTE_FSMC_NREG_PIN 0 +// FSMC_CD Pin +#define RTE_FSMC_CD_PIN 0 + +// + +// NOR Flash / PSRAM Controller + +// FSMC_NE1 Chip Select +// Configure Device on Chip Select FSMC_NE1 +#define RTE_FSMC_NE1 0 + +// Chip-select control +// CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write +// For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash +// memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal. +// ASYNCWAIT: Wait signal during asynchronous transfer +// Enables the FSMC to use the wait signal even during an asynchronous protocol. +// EXTMOD: Extended mode enable +// Enables the FSMC to program inside the write timing register, so it allows different timings for read and write. +// WAITEN: Wait enable +// For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal. +// WREN: Write enable +// Enable/disable write operations in the current bank by the FSMC +// WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state +// For memory access in burst mode, the NWAIT signal indicates whether the data from the memory +// are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted +// by the memory one clock cycle before the wait state or during the wait state +// WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high +// Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode. +// BURSTEN: Burst enable +// Enables the burst access mode for the memory. Valid only with synchronous burst memories. +// FACCEN: Flash access enable +// Enables NOR Flash memory access operations. +// MWID: Memory databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width, valid for all type of memories. +// MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash +// Defines the type of external memory attached to the corresponding memory bank. +// MUXEN: Address/data multiplexing enable +// When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories. +// MBKEN: Memory bank enable +// Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a +// disabled bank causes an ERROR on AHB bus. +#define RTE_FSMC_BCR1_CBURSTRW 0 +#define RTE_FSMC_BCR1_ASYNCWAIT 0 +#define RTE_FSMC_BCR1_EXTMOD 0 +#define RTE_FSMC_BCR1_WAITEN 1 +#define RTE_FSMC_BCR1_WREN 1 +#define RTE_FSMC_BCR1_WAITCFG 0 +#define RTE_FSMC_BCR1_WRAPMOD 0 +#define RTE_FSMC_BCR1_WAITPOL 0 +#define RTE_FSMC_BCR1_BURSTEN 0 +#define RTE_FSMC_BCR1_FACCEN 1 +#define RTE_FSMC_BCR1_MWID 1 +#define RTE_FSMC_BCR1_MTYP 2 +#define RTE_FSMC_BCR1_MUXEN 1 +#define RTE_FSMC_BCR1_MBKEN 1 +// + +// Chip-select timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with synchronous burst mode enabled, defines the number of memory clock +// cycles (+2) to issue to the memory before getting the first data: +// 0000: Data latency of 2 CLK clock cycles for first burst access +// 1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) +// periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care. +// In the case of CRAM, this field must be set to ‘0’. +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles: +// 0000: Reserved +// 0001: CLK period = 2 × HCLK periods +// 0010: CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Define the bus turnaround delay after a read access only +// from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive +// addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the +// minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the +// databus in Hi-Z state. +// These bits are written by software to add a delay at the end of a write/read transaction. This +// delay allows to match the minimum time between consecutive transactions (tEHEL from NEx +// high to NEx low) and the maximum time needed by the memory to free the data bus after a +// read access (tEHQZ): +// (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if +// EXTMOD = ‘0’ +// (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset) +// DATAST: Data phase duration <1-255> +// Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Define the duration of the address hold phase used in mode D and multiplexed accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration =1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is not used, the address hold phase is always 1 +// memory clock period duration. +// ADDSET: Address setup phase duration <0-15> +// Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don’t care. +#define RTE_FSMC_BTR1_ACCMOD 0 +#define RTE_FSMC_BTR1_DATLAT 15 +#define RTE_FSMC_BTR1_CLKDIV 15 +#define RTE_FSMC_BTR1_BUSTURN 15 +#define RTE_FSMC_BTR1_DATAST 255 +#define RTE_FSMC_BTR1_ADDHLD 15 +#define RTE_FSMC_BTR1_ADDSET 15 +// + +// Write timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles +// (+2) to issue to the memory before getting the first data. +// 0000: (0x0) Data latency of 2 CLK clock cycles for first burst access +// ... +// 1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In +// asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of +// CRAM, this field must be set to 0 +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles. +// 0000: Reserved +// 0001 CLK period = 2 × HCLK periods +// 0010 CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low). +// (BUSTRUN + 1) HCLK period = tEHELmin. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset) +// DATAST: Data phase duration <1-255> +// Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration = 1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration. +// ADDSET: Address setup phase duration <1-15> +// Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is don’t care. +#define RTE_FSMC_BWTR1_ACCMOD 0 +#define RTE_FSMC_BWTR1_DATLAT 15 +#define RTE_FSMC_BWTR1_CLKDIV 15 +#define RTE_FSMC_BWTR1_BUSTURN 15 +#define RTE_FSMC_BWTR1_DATAST 255 +#define RTE_FSMC_BWTR1_ADDHLD 15 +#define RTE_FSMC_BWTR1_ADDSET 15 +// +// + +// FSMC_NE2 Chip Select +// Configure Device on Chip Select FSMC_NE2 +#define RTE_FSMC_NE2 0 + +// Chip-select control +// CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write +// For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash +// memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal. +// ASYNCWAIT: Wait signal during asynchronous transfer +// Enables the FSMC to use the wait signal even during an asynchronous protocol. +// EXTMOD: Extended mode enable +// Enables the FSMC to program inside the write timing register, so it allows different timings for read and write. +// WAITEN: Wait enable +// For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal. +// WREN: Write enable +// Enable/disable write operations in the current bank by the FSMC +// WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state +// For memory access in burst mode, the NWAIT signal indicates whether the data from the memory +// are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted +// by the memory one clock cycle before the wait state or during the wait state +// WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high +// Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode. +// BURSTEN: Burst enable +// Enables the burst access mode for the memory. Valid only with synchronous burst memories. +// FACCEN: Flash access enable +// Enables NOR Flash memory access operations. +// MWID: Memory databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width, valid for all type of memories. +// MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash +// Defines the type of external memory attached to the corresponding memory bank. +// MUXEN: Address/data multiplexing enable +// When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories. +// MBKEN: Memory bank enable +// Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a +// disabled bank causes an ERROR on AHB bus. +#define RTE_FSMC_BCR2_CBURSTRW 0 +#define RTE_FSMC_BCR2_ASYNCWAIT 0 +#define RTE_FSMC_BCR2_EXTMOD 0 +#define RTE_FSMC_BCR2_WAITEN 1 +#define RTE_FSMC_BCR2_WREN 1 +#define RTE_FSMC_BCR2_WAITCFG 0 +#define RTE_FSMC_BCR2_WRAPMOD 0 +#define RTE_FSMC_BCR2_WAITPOL 0 +#define RTE_FSMC_BCR2_BURSTEN 0 +#define RTE_FSMC_BCR2_FACCEN 1 +#define RTE_FSMC_BCR2_MWID 1 +#define RTE_FSMC_BCR2_MTYP 0 +#define RTE_FSMC_BCR2_MUXEN 1 +#define RTE_FSMC_BCR2_MBKEN 0 +// + +// Chip-select timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with synchronous burst mode enabled, defines the number of memory clock +// cycles (+2) to issue to the memory before getting the first data: +// 0000: Data latency of 2 CLK clock cycles for first burst access +// 1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) +// periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care. +// In the case of CRAM, this field must be set to ‘0’. +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles: +// 0000: Reserved +// 0001: CLK period = 2 × HCLK periods +// 0010: CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Define the bus turnaround delay after a read access only +// from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive +// addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the +// minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the +// databus in Hi-Z state. +// These bits are written by software to add a delay at the end of a write/read transaction. This +// delay allows to match the minimum time between consecutive transactions (tEHEL from NEx +// high to NEx low) and the maximum time needed by the memory to free the data bus after a +// read access (tEHQZ): +// (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if +// EXTMOD = ‘0’ +// (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset) +// DATAST: Data phase duration <1-255> +// Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Define the duration of the address hold phase used in mode D and multiplexed accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration =1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is not used, the address hold phase is always 1 +// memory clock period duration. +// ADDSET: Address setup phase duration <0-15> +// Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don’t care. +#define RTE_FSMC_BTR2_ACCMOD 0 +#define RTE_FSMC_BTR2_DATLAT 15 +#define RTE_FSMC_BTR2_CLKDIV 15 +#define RTE_FSMC_BTR2_BUSTURN 15 +#define RTE_FSMC_BTR2_DATAST 255 +#define RTE_FSMC_BTR2_ADDHLD 15 +#define RTE_FSMC_BTR2_ADDSET 15 +// + +// Write timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles +// (+2) to issue to the memory before getting the first data. +// 0000: (0x0) Data latency of 2 CLK clock cycles for first burst access +// ... +// 1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In +// asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of +// CRAM, this field must be set to 0 +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles. +// 0000: Reserved +// 0001 CLK period = 2 × HCLK periods +// 0010 CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low). +// (BUSTRUN + 1) HCLK period = tEHELmin. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset) +// DATAST: Data phase duration <1-255> +// Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration = 1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration. +// ADDSET: Address setup phase duration <1-15> +// Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is don’t care. +#define RTE_FSMC_BWTR2_ACCMOD 0 +#define RTE_FSMC_BWTR2_DATLAT 15 +#define RTE_FSMC_BWTR2_CLKDIV 15 +#define RTE_FSMC_BWTR2_BUSTURN 15 +#define RTE_FSMC_BWTR2_DATAST 255 +#define RTE_FSMC_BWTR2_ADDHLD 15 +#define RTE_FSMC_BWTR2_ADDSET 15 +// +// + +// FSMC_NE3 Chip Select +// Configure Device on Chip Select FSMC_NE3 +#define RTE_FSMC_NE3 0 + +// Chip-select control +// CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write +// For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash +// memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal. +// ASYNCWAIT: Wait signal during asynchronous transfer +// Enables the FSMC to use the wait signal even during an asynchronous protocol. +// EXTMOD: Extended mode enable +// Enables the FSMC to program inside the write timing register, so it allows different timings for read and write. +// WAITEN: Wait enable +// For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal. +// WREN: Write enable +// Enable/disable write operations in the current bank by the FSMC +// WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state +// For memory access in burst mode, the NWAIT signal indicates whether the data from the memory +// are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted +// by the memory one clock cycle before the wait state or during the wait state +// WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high +// Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode. +// BURSTEN: Burst enable +// Enables the burst access mode for the memory. Valid only with synchronous burst memories. +// FACCEN: Flash access enable +// Enables NOR Flash memory access operations. +// MWID: Memory databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width, valid for all type of memories. +// MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash +// Defines the type of external memory attached to the corresponding memory bank. +// MUXEN: Address/data multiplexing enable +// When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories. +// MBKEN: Memory bank enable +// Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a +// disabled bank causes an ERROR on AHB bus. +#define RTE_FSMC_BCR3_CBURSTRW 0 +#define RTE_FSMC_BCR3_ASYNCWAIT 0 +#define RTE_FSMC_BCR3_EXTMOD 0 +#define RTE_FSMC_BCR3_WAITEN 1 +#define RTE_FSMC_BCR3_WREN 1 +#define RTE_FSMC_BCR3_WAITCFG 0 +#define RTE_FSMC_BCR3_WRAPMOD 0 +#define RTE_FSMC_BCR3_WAITPOL 0 +#define RTE_FSMC_BCR3_BURSTEN 0 +#define RTE_FSMC_BCR3_FACCEN 1 +#define RTE_FSMC_BCR3_MWID 1 +#define RTE_FSMC_BCR3_MTYP 0 +#define RTE_FSMC_BCR3_MUXEN 1 +#define RTE_FSMC_BCR3_MBKEN 0 +// + +// Chip-select timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with synchronous burst mode enabled, defines the number of memory clock +// cycles (+2) to issue to the memory before getting the first data: +// 0000: Data latency of 2 CLK clock cycles for first burst access +// 1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) +// periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care. +// In the case of CRAM, this field must be set to ‘0’. +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles: +// 0000: Reserved +// 0001: CLK period = 2 × HCLK periods +// 0010: CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Define the bus turnaround delay after a read access only +// from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive +// addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the +// minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the +// databus in Hi-Z state. +// These bits are written by software to add a delay at the end of a write/read transaction. This +// delay allows to match the minimum time between consecutive transactions (tEHEL from NEx +// high to NEx low) and the maximum time needed by the memory to free the data bus after a +// read access (tEHQZ): +// (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if +// EXTMOD = ‘0’ +// (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset) +// DATAST: Data phase duration <1-255> +// Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Define the duration of the address hold phase used in mode D and multiplexed accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration =1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is not used, the address hold phase is always 1 +// memory clock period duration. +// ADDSET: Address setup phase duration <0-15> +// Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don’t care. +#define RTE_FSMC_BTR3_ACCMOD 0 +#define RTE_FSMC_BTR3_DATLAT 15 +#define RTE_FSMC_BTR3_CLKDIV 15 +#define RTE_FSMC_BTR3_BUSTURN 15 +#define RTE_FSMC_BTR3_DATAST 255 +#define RTE_FSMC_BTR3_ADDHLD 15 +#define RTE_FSMC_BTR3_ADDSET 15 +// + +// Write timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles +// (+2) to issue to the memory before getting the first data. +// 0000: (0x0) Data latency of 2 CLK clock cycles for first burst access +// ... +// 1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In +// asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of +// CRAM, this field must be set to 0 +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles. +// 0000: Reserved +// 0001 CLK period = 2 × HCLK periods +// 0010 CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low). +// (BUSTRUN + 1) HCLK period = tEHELmin. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset) +// DATAST: Data phase duration <1-255> +// Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration = 1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration. +// ADDSET: Address setup phase duration <1-15> +// Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is don’t care. +#define RTE_FSMC_BWTR3_ACCMOD 0 +#define RTE_FSMC_BWTR3_DATLAT 15 +#define RTE_FSMC_BWTR3_CLKDIV 15 +#define RTE_FSMC_BWTR3_BUSTURN 15 +#define RTE_FSMC_BWTR3_DATAST 255 +#define RTE_FSMC_BWTR3_ADDHLD 15 +#define RTE_FSMC_BWTR3_ADDSET 15 +// +// + +// FSMC_NE4 Chip Select +// Configure Device on Chip Select FSMC_NE4 +#define RTE_FSMC_NE4 0 + +// Chip-select control +// CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write +// For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash +// memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal. +// ASYNCWAIT: Wait signal during asynchronous transfer +// Enables the FSMC to use the wait signal even during an asynchronous protocol. +// EXTMOD: Extended mode enable +// Enables the FSMC to program inside the write timing register, so it allows different timings for read and write. +// WAITEN: Wait enable +// For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal. +// WREN: Write enable +// Enable/disable write operations in the current bank by the FSMC +// WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state +// For memory access in burst mode, the NWAIT signal indicates whether the data from the memory +// are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted +// by the memory one clock cycle before the wait state or during the wait state +// WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high +// Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode. +// BURSTEN: Burst enable +// Enables the burst access mode for the memory. Valid only with synchronous burst memories. +// FACCEN: Flash access enable +// Enables NOR Flash memory access operations. +// MWID: Memory databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width, valid for all type of memories. +// MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash +// Defines the type of external memory attached to the corresponding memory bank. +// MUXEN: Address/data multiplexing enable +// When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories. +// MBKEN: Memory bank enable +// Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a +// disabled bank causes an ERROR on AHB bus. +#define RTE_FSMC_BCR4_CBURSTRW 0 +#define RTE_FSMC_BCR4_ASYNCWAIT 0 +#define RTE_FSMC_BCR4_EXTMOD 0 +#define RTE_FSMC_BCR4_WAITEN 1 +#define RTE_FSMC_BCR4_WREN 1 +#define RTE_FSMC_BCR4_WAITCFG 0 +#define RTE_FSMC_BCR4_WRAPMOD 0 +#define RTE_FSMC_BCR4_WAITPOL 0 +#define RTE_FSMC_BCR4_BURSTEN 0 +#define RTE_FSMC_BCR4_FACCEN 1 +#define RTE_FSMC_BCR4_MWID 1 +#define RTE_FSMC_BCR4_MTYP 0 +#define RTE_FSMC_BCR4_MUXEN 1 +#define RTE_FSMC_BCR4_MBKEN 0 +// + +// Chip-select timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with synchronous burst mode enabled, defines the number of memory clock +// cycles (+2) to issue to the memory before getting the first data: +// 0000: Data latency of 2 CLK clock cycles for first burst access +// 1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) +// periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care. +// In the case of CRAM, this field must be set to ‘0’. +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles: +// 0000: Reserved +// 0001: CLK period = 2 × HCLK periods +// 0010: CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Define the bus turnaround delay after a read access only +// from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive +// addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the +// minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the +// databus in Hi-Z state. +// These bits are written by software to add a delay at the end of a write/read transaction. This +// delay allows to match the minimum time between consecutive transactions (tEHEL from NEx +// high to NEx low) and the maximum time needed by the memory to free the data bus after a +// read access (tEHQZ): +// (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if +// EXTMOD = ‘0’ +// (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset) +// DATAST: Data phase duration <1-255> +// Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Define the duration of the address hold phase used in mode D and multiplexed accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration =1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is not used, the address hold phase is always 1 +// memory clock period duration. +// ADDSET: Address setup phase duration <0-15> +// Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don’t care. +#define RTE_FSMC_BTR4_ACCMOD 0 +#define RTE_FSMC_BTR4_DATLAT 15 +#define RTE_FSMC_BTR4_CLKDIV 15 +#define RTE_FSMC_BTR4_BUSTURN 15 +#define RTE_FSMC_BTR4_DATAST 255 +#define RTE_FSMC_BTR4_ADDHLD 15 +#define RTE_FSMC_BTR4_ADDSET 15 +// + +// Write timing +// ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D +// Specifies the asynchronous access modes. Access mode is taken into account only when +// Extended mode is enabled in the Chip-select control register. +// DATLAT: Data latency <0-15> +// For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles +// (+2) to issue to the memory before getting the first data. +// 0000: (0x0) Data latency of 2 CLK clock cycles for first burst access +// ... +// 1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset) +// Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In +// asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of +// CRAM, this field must be set to 0 +// CLKDIV: Clock divide ratio (for CLK signal) <1-15> +// Defines the period of CLK clock output signal, expressed in number of HCLK cycles. +// 0000: Reserved +// 0001 CLK period = 2 × HCLK periods +// 0010 CLK period = 3 × HCLK periods +// 1111: CLK period = 16 × HCLK periods (default value after reset) +// In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. +// BUSTURN: Bus turnaround phase duration <0-15> +// Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low). +// (BUSTRUN + 1) HCLK period = tEHELmin. +// 0000: BUSTURN phase duration = 0 HCLK clock cycle added +// ... +// 1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset) +// DATAST: Data phase duration <1-255> +// Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses. +// 0000 0000: Reserved +// 0000 0001: DATAST phase duration = 1 × HCLK clock cycles +// 0000 0010: DATAST phase duration = 2 × HCLK clock cycles +// ... +// 1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset) +// Note: In synchronous accesses, this value is don't care. +// ADDHLD: Address hold phase duration <1-15> +// Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses. +// 0000: Reserved +// 0001: ADDHLD phase duration = 1 × HCLK clock cycle +// 0010: ADDHLD phase duration = 2 × HCLK clock cycle +// ... +// 1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration. +// ADDSET: Address setup phase duration <1-15> +// Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed. +// 0000: ADDSET phase duration = 0 × HCLK clock cycle +// ... +// 1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset) +// Note: In synchronous NOR Flash accesses, this value is don’t care. +#define RTE_FSMC_BWTR4_ACCMOD 0 +#define RTE_FSMC_BWTR4_DATLAT 15 +#define RTE_FSMC_BWTR4_CLKDIV 15 +#define RTE_FSMC_BWTR4_BUSTURN 15 +#define RTE_FSMC_BWTR4_DATAST 255 +#define RTE_FSMC_BWTR4_ADDHLD 15 +#define RTE_FSMC_BWTR4_ADDSET 15 +// +// + +// + +// NAND Flash Controller + +// FSMC_NCE2 Chip Select +// Configure NAND Device on Chip Select FSMC_NCE2 +#define RTE_FSMC_NCE2 0 + +// NAND Flash Control +// ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes +// Defines the page size for the extended ECC. +// TAR: ALE to RE delay <0-15> +// Sets time from ALE low to RE low in number of AHB clock cycles (HCLK). +// Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// TCLR: CLE to RE delay <0-15> +// Sets time from CLE low to RE low in number of AHB clock cycles (HCLK). +// Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// ECCEN: ECC computation logic enable +// PWID: Databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width. +// PTYP: Memory type <1=>NAND Flash +// Defines the type of device attached to the corresponding memory bank. +// PBKEN: NAND Flash memory bank enable +// Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus. +// PWAITEN: Wait feature enable +// Enables the Wait feature for the PC Card/NAND Flash memory bank. +#define RTE_FSMC_PCR2_ECCPS 0 +#define RTE_FSMC_PCR2_TAR 0 +#define RTE_FSMC_PCR2_TCLR 0 +#define RTE_FSMC_PCR2_ECCEN 0 +#define RTE_FSMC_PCR2_PWID 0 +#define RTE_FSMC_PCR2_PTYP 1 +#define RTE_FSMC_PCR2_PBKEN 0 +#define RTE_FSMC_PCR2_PWAITEN 0 + +// + +// Interrupt configuration +// IFEN: Falling edge detection enable +// ILEN: High-level detection enable +// IREN: Rising edge detection enable +#define RTE_FSMC_SR2_IFEN 0 +#define RTE_FSMC_SR2_ILEN 0 +#define RTE_FSMC_SR2_IREN 0 + +// + +// Common memory space timing +// MEMHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access to. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset) +// MEMSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up the address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 2 HCLK cycles (for NAND Flash) +// 1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset) +#define RTE_FSMC_PMEM2_MEMHIZ 255 +#define RTE_FSMC_PMEM2_MEMHOLD 255 +#define RTE_FSMC_PMEM2_MEMWAIT 255 +#define RTE_FSMC_PMEM2_MEMSET 255 + +// + +// Attribute memory space timing +// ATTHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT) +// ATTSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 1 HCLK cycle +// 1111 1111: 256 HCLK cycles (default value after reset) +#define RTE_FSMC_PATT2_ATTHIZ 255 +#define RTE_FSMC_PATT2_ATTHOLD 255 +#define RTE_FSMC_PATT2_ATTWAIT 255 +#define RTE_FSMC_PATT2_ATTSET 255 + +// + +// + +// FSMC_NCE3 Chip Select +// Configure NAND Device on Chip Select FSMC_NCE3 +#define RTE_FSMC_NCE3 0 + +// NAND Flash Control +// ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes +// Defines the page size for the extended ECC. +// TAR: ALE to RE delay <0-15> +// Sets time from ALE low to RE low in number of AHB clock cycles (HCLK). +// Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// TCLR: CLE to RE delay <0-15> +// Sets time from CLE low to RE low in number of AHB clock cycles (HCLK). +// Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// ECCEN: ECC computation logic enable +// PWID: Databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width. +// PTYP: Memory type <1=>NAND Flash +// Defines the type of device attached to the corresponding memory bank. +// PBKEN: NAND Flash memory bank enable +// Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus. +// PWAITEN: Wait feature enable +// Enables the Wait feature for the PC Card/NAND Flash memory bank. +#define RTE_FSMC_PCR3_ECCPS 0 +#define RTE_FSMC_PCR3_TAR 0 +#define RTE_FSMC_PCR3_TCLR 0 +#define RTE_FSMC_PCR3_ECCEN 0 +#define RTE_FSMC_PCR3_PWID 0 +#define RTE_FSMC_PCR3_PTYP 1 +#define RTE_FSMC_PCR3_PBKEN 0 +#define RTE_FSMC_PCR3_PWAITEN 0 + +// + +// Interrupt configuration +// IFEN: Falling edge detection enable +// ILEN: High-level detection enable +// IREN: Rising edge detection enable +#define RTE_FSMC_SR3_IFEN 0 +#define RTE_FSMC_SR3_ILEN 0 +#define RTE_FSMC_SR3_IREN 0 + +// + +// Common memory space timing +// MEMHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access to. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset) +// MEMSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up the address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 2 HCLK cycles (for NAND Flash) +// 1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset) +#define RTE_FSMC_PMEM3_MEMHIZ 255 +#define RTE_FSMC_PMEM3_MEMHOLD 255 +#define RTE_FSMC_PMEM3_MEMWAIT 255 +#define RTE_FSMC_PMEM3_MEMSET 255 + +// + +// Attribute memory space timing +// ATTHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT) +// ATTSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 1 HCLK cycle +// 1111 1111: 256 HCLK cycles (default value after reset) +#define RTE_FSMC_PATT3_ATTHIZ 255 +#define RTE_FSMC_PATT3_ATTHOLD 255 +#define RTE_FSMC_PATT3_ATTWAIT 255 +#define RTE_FSMC_PATT3_ATTSET 255 + +// + +// + +// + +// PC Card Controller + +// FSMC_NCE4_x Chip Select +// Configure PC Card/CompactFlash Device on Chip Select FSMC_NCE4_1/FSMC_NCE4_2 +#define RTE_FSMC_NCE4 0 + +// PC Card Control +// ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes +// Defines the page size for the extended ECC. +// TAR: ALE to RE delay <0-15> +// Sets time from ALE low to RE low in number of AHB clock cycles (HCLK). +// Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// TCLR: CLE to RE delay <0-15> +// Sets time from CLE low to RE low in number of AHB clock cycles (HCLK). +// Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period +// 0000: 1 HCLK cycle (default) +// 1111: 16 HCLK cycles +// Note: SET is MEMSET or ATTSET according to the addressed space. +// ECCEN: ECC computation logic enable +// PWID: Databus width <0=>8 bits <1=>16 bits +// Defines the external memory device width. +// PTYP: Memory type <0=>PC Card, CompactFlash, CF+ or PCMCIOA +// Defines the type of device attached to the corresponding memory bank. +// PBKEN: PC Card memory bank enable +// Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus. +// PWAITEN: Wait feature enable +// Enables the Wait feature for the PC Card/NAND Flash memory bank. +#define RTE_FSMC_PCR4_ECCPS 0 +#define RTE_FSMC_PCR4_TAR 0 +#define RTE_FSMC_PCR4_TCLR 0 +#define RTE_FSMC_PCR4_ECCEN 0 +#define RTE_FSMC_PCR4_PWID 0 +#define RTE_FSMC_PCR4_PTYP 0 +#define RTE_FSMC_PCR4_PBKEN 0 +#define RTE_FSMC_PCR4_PWAITEN 0 + +// + +// Interrupt configuration +// IFEN: Falling edge detection enable +// ILEN: High-level detection enable +// IREN: Rising edge detection enable +#define RTE_FSMC_SR4_IFEN 0 +#define RTE_FSMC_SR4_ILEN 0 +#define RTE_FSMC_SR4_IREN 0 + +// + +// Common memory space timing +// MEMHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// MEMWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access to. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset) +// MEMSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up the address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 2 HCLK cycles (for NAND Flash) +// 1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset) +#define RTE_FSMC_PMEM4_MEMHIZ 255 +#define RTE_FSMC_PMEM4_MEMHOLD 255 +#define RTE_FSMC_PMEM4_MEMWAIT 255 +#define RTE_FSMC_PMEM4_MEMSET 255 + +// + +// Attribute memory space timing +// ATTHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a NAND Flash write access. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// ATTWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE, +// NOE), for NAND Flash read or write access. The duration for command assertion +// is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value. +// 0000 0000: reserved +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT) +// 1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT) +// ATTSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up address before the command +// assertion (NWE, NOE), for NAND Flash read or write access. +// 0000 0000: 1 HCLK cycle +// 1111 1111: 256 HCLK cycles (default value after reset) +#define RTE_FSMC_PATT4_ATTHIZ 255 +#define RTE_FSMC_PATT4_ATTHOLD 255 +#define RTE_FSMC_PATT4_ATTWAIT 255 +#define RTE_FSMC_PATT4_ATTSET 255 + +// + +// I/O space timing +// IOHIZ: Databus HiZ time <0-255> +// Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the +// start of a PC Card write access. Only valid for write transaction. +// 0000 0000: 0 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// IOHOLD: Hold time <1-255> +// Defines the number of HCLK clock cycles to hold address (and data for write access) after +// the command deassertion (NWE, NOE), for PC Card read or write access. +// 0000 0000: reserved +// 0000 0001: 1 HCLK cycle +// 1111 1111: 255 HCLK cycles (default value after reset) +// IOWAIT: Wait time <1-255> +// Defines the minimum number of HCLK (+1) clock cycles to assert the command (SMNWE, +// SMNOE), for PC Card read or write access. The duration for command assertion is +// extended if the wait signal (NWAIT) is active (low) at the end of the +// programmed value of HCLK. +// 0000 0000: reserved, do not use this value +// 0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT) +// 1111 1111: 256 HCLK cycles +// IOSET: Setup time <0-255> +// Defines the number of HCLK (+1) clock cycles to set up the address before the command +// assertion (NWE, NOE), for PC Card read or write access. +// 0000 0000: 1 HCLK cycle +// 1111 1111: 256 HCLK cycles (default value after reset) +#define RTE_FSMC_PIO4_IOHIZ 255 +#define RTE_FSMC_PIO4_IOHOLD 255 +#define RTE_FSMC_PIO4_IOWAIT 255 +#define RTE_FSMC_PIO4_IOSET 255 + +// + +// + +// + +// + + +#endif /* __RTE_DEVICE_H */ diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Device/STM32F207IG/startup_stm32f2xx.s b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Device/STM32F207IG/startup_stm32f2xx.s new file mode 100644 index 000000000..205f9ffbb --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Device/STM32F207IG/startup_stm32f2xx.s @@ -0,0 +1,419 @@ +;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** +;* File Name : startup_stm32f2xx.s +;* Author : MCD Application Team +;* Version : V1.0.0 +;* Date : 18-April-2011 +;* Description : STM32F2xx devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM3 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS +; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. +; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, +; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE +; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING +; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. +;******************************************************************************* + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00001000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x0000F000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_IRQHandler ; PVD through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0 + DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1 + DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2 + DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3 + DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4 + DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5 + DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6 + DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s + DCD CAN1_TX_IRQHandler ; CAN1 TX + DCD CAN1_RX0_IRQHandler ; CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9 + DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10 + DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11 + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10]s + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line + DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12 + DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13 + DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14 + DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare + DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7 + DCD FSMC_IRQHandler ; FSMC + DCD SDIO_IRQHandler ; SDIO + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD UART4_IRQHandler ; UART4 + DCD UART5_IRQHandler ; UART5 + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0 + DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1 + DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2 + DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3 + DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4 + DCD ETH_IRQHandler ; Ethernet + DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line + DCD CAN2_TX_IRQHandler ; CAN2 TX + DCD CAN2_RX0_IRQHandler ; CAN2 RX0 + DCD CAN2_RX1_IRQHandler ; CAN2 RX1 + DCD CAN2_SCE_IRQHandler ; CAN2 SCE + DCD OTG_FS_IRQHandler ; USB OTG FS + DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5 + DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6 + DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7 + DCD USART6_IRQHandler ; USART6 + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out + DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In + DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI + DCD OTG_HS_IRQHandler ; USB OTG HS + DCD DCMI_IRQHandler ; DCMI + DCD CRYP_IRQHandler ; CRYP crypto + DCD HASH_RNG_IRQHandler ; Hash and Rng +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Stream0_IRQHandler [WEAK] + EXPORT DMA1_Stream1_IRQHandler [WEAK] + EXPORT DMA1_Stream2_IRQHandler [WEAK] + EXPORT DMA1_Stream3_IRQHandler [WEAK] + EXPORT DMA1_Stream4_IRQHandler [WEAK] + EXPORT DMA1_Stream5_IRQHandler [WEAK] + EXPORT DMA1_Stream6_IRQHandler [WEAK] + EXPORT ADC_IRQHandler [WEAK] + EXPORT CAN1_TX_IRQHandler [WEAK] + EXPORT CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK] + EXPORT TIM1_UP_TIM10_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT OTG_FS_WKUP_IRQHandler [WEAK] + EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK] + EXPORT TIM8_UP_TIM13_IRQHandler [WEAK] + EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK] + EXPORT TIM8_CC_IRQHandler [WEAK] + EXPORT DMA1_Stream7_IRQHandler [WEAK] + EXPORT FSMC_IRQHandler [WEAK] + EXPORT SDIO_IRQHandler [WEAK] + EXPORT TIM5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Stream0_IRQHandler [WEAK] + EXPORT DMA2_Stream1_IRQHandler [WEAK] + EXPORT DMA2_Stream2_IRQHandler [WEAK] + EXPORT DMA2_Stream3_IRQHandler [WEAK] + EXPORT DMA2_Stream4_IRQHandler [WEAK] + EXPORT ETH_IRQHandler [WEAK] + EXPORT ETH_WKUP_IRQHandler [WEAK] + EXPORT CAN2_TX_IRQHandler [WEAK] + EXPORT CAN2_RX0_IRQHandler [WEAK] + EXPORT CAN2_RX1_IRQHandler [WEAK] + EXPORT CAN2_SCE_IRQHandler [WEAK] + EXPORT OTG_FS_IRQHandler [WEAK] + EXPORT DMA2_Stream5_IRQHandler [WEAK] + EXPORT DMA2_Stream6_IRQHandler [WEAK] + EXPORT DMA2_Stream7_IRQHandler [WEAK] + EXPORT USART6_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK] + EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK] + EXPORT OTG_HS_WKUP_IRQHandler [WEAK] + EXPORT OTG_HS_IRQHandler [WEAK] + EXPORT DCMI_IRQHandler [WEAK] + EXPORT CRYP_IRQHandler [WEAK] + EXPORT HASH_RNG_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Stream0_IRQHandler +DMA1_Stream1_IRQHandler +DMA1_Stream2_IRQHandler +DMA1_Stream3_IRQHandler +DMA1_Stream4_IRQHandler +DMA1_Stream5_IRQHandler +DMA1_Stream6_IRQHandler +ADC_IRQHandler +CAN1_TX_IRQHandler +CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_TIM9_IRQHandler +TIM1_UP_TIM10_IRQHandler +TIM1_TRG_COM_TIM11_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +OTG_FS_WKUP_IRQHandler +TIM8_BRK_TIM12_IRQHandler +TIM8_UP_TIM13_IRQHandler +TIM8_TRG_COM_TIM14_IRQHandler +TIM8_CC_IRQHandler +DMA1_Stream7_IRQHandler +FSMC_IRQHandler +SDIO_IRQHandler +TIM5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Stream0_IRQHandler +DMA2_Stream1_IRQHandler +DMA2_Stream2_IRQHandler +DMA2_Stream3_IRQHandler +DMA2_Stream4_IRQHandler +ETH_IRQHandler +ETH_WKUP_IRQHandler +CAN2_TX_IRQHandler +CAN2_RX0_IRQHandler +CAN2_RX1_IRQHandler +CAN2_SCE_IRQHandler +OTG_FS_IRQHandler +DMA2_Stream5_IRQHandler +DMA2_Stream6_IRQHandler +DMA2_Stream7_IRQHandler +USART6_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +OTG_HS_EP1_OUT_IRQHandler +OTG_HS_EP1_IN_IRQHandler +OTG_HS_WKUP_IRQHandler +OTG_HS_IRQHandler +DCMI_IRQHandler +CRYP_IRQHandler +HASH_RNG_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE***** diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Device/STM32F207IG/system_stm32f2xx.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Device/STM32F207IG/system_stm32f2xx.c new file mode 100644 index 000000000..da0e189c8 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Device/STM32F207IG/system_stm32f2xx.c @@ -0,0 +1,536 @@ +/** + ****************************************************************************** + * @file system_stm32f2xx.c + * @author MCD Application Team + * @version V1.0.0 + * @date 18-April-2011 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * This file contains the system clock configuration for STM32F2xx devices, + * and is generated by the clock configuration tool + * "STM32f2xx_Clock_Configuration_V1.0.0.xls" + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * and Divider factors, AHB/APBx prescalers and Flash settings), + * depending on the configuration made in the clock xls tool. + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f2xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (16 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f2xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 25MHz, refer to "HSE_VALUE" define + * in "stm32f2xx.h" file. When HSE is used as system clock source, directly or + * through PLL, and you are using different crystal you have to adapt the HSE + * value to your own configuration. + * + * 5. This file configures the system clock as follows: + *============================================================================= + *============================================================================= + * Supported STM32F2xx device revision | Rev B and Y + *----------------------------------------------------------------------------- + * System Clock source | PLL (HSE) + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 120000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 120000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 4 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 2 + *----------------------------------------------------------------------------- + * HSE Frequency(Hz) | 25000000 + *----------------------------------------------------------------------------- + * PLL_M | 25 + *----------------------------------------------------------------------------- + * PLL_N | 240 + *----------------------------------------------------------------------------- + * PLL_P | 2 + *----------------------------------------------------------------------------- + * PLL_Q | 5 + *----------------------------------------------------------------------------- + * PLLI2S_N | NA + *----------------------------------------------------------------------------- + * PLLI2S_R | NA + *----------------------------------------------------------------------------- + * I2S input clock | NA + *----------------------------------------------------------------------------- + * VDD(V) | 3.3 + *----------------------------------------------------------------------------- + * Flash Latency(WS) | 3 + *----------------------------------------------------------------------------- + * Prefetch Buffer | ON + *----------------------------------------------------------------------------- + * Instruction cache | ON + *----------------------------------------------------------------------------- + * Data cache | ON + *----------------------------------------------------------------------------- + * Require 48MHz for USB OTG FS, | Enabled + * SDIO and RNG clock | + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f2xx_system + * @{ + */ + +/** @addtogroup STM32F2xx_System_Private_Includes + * @{ + */ + +#include "stm32f2xx.h" + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_Defines + * @{ + */ + +/*!< Uncomment the following line if you need to use external SRAM mounted + on STM322xG_EVAL board as data memory */ +/* #define DATA_IN_ExtSRAM */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ + + +/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */ +#define PLL_M 25 +#define PLL_N 240 + +/* SYSCLK = PLL_VCO / PLL_P */ +#define PLL_P 2 + +/* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */ +#define PLL_Q 5 + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_Variables + * @{ + */ + + uint32_t SystemCoreClock = 120000000; + + __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** @addtogroup STM32F2xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemFrequency variable. + * @param None + * @retval None + */ +void SystemInit(void) +{ + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000; + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x24003010; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Disable all interrupts */ + RCC->CIR = 0x00000000; + +#ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); +#endif /* DATA_IN_ExtSRAM */ + + /* Configure the System clock source, PLL Multiplier and Divider factors, + AHB/APBx prescalers and Flash settings ----------------------------------*/ + SetSysClock(); + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f2xx.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f2xx.h file (default value + * 25 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock source */ + + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N + SYSCLK = PLL_VCO / PLL_P + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; + pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; + + if (pllsource != 0) + { + /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); + } + else + { + /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); + } + + pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; + SystemCoreClock = pllvco/pllp; + break; + default: + SystemCoreClock = HSI_VALUE; + break; + } + /* Compute HCLK frequency --------------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock source, PLL Multiplier and Divider factors, + * AHB/APBx prescalers and Flash settings + * @Note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ +static void SetSysClock(void) +{ +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* HCLK = SYSCLK / 1*/ + RCC->CFGR |= RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK / 2*/ + RCC->CFGR |= RCC_CFGR_PPRE2_DIV2; + + /* PCLK1 = HCLK / 4*/ + RCC->CFGR |= RCC_CFGR_PPRE1_DIV4; + + /* Configure the main PLL */ + RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) | + (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24); + + /* Enable the main PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till the main PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Configure Flash prefetch, Instruction cache, Data cache and wait state */ + FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_3WS; + + /* Select the main PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= RCC_CFGR_SW_PLL; + + /* Wait till the main PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL); + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } + +} + +/** + * @brief Setup the external memory controller. Called in startup_stm32f2xx.s + * before jump to __main + * @param None + * @retval None + */ +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f2xx.s before jump to main. + * This function configures the external SRAM mounted on STM322xG_EVAL board + * This SRAM will be used as program data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ +/*-- GPIOs Configuration -----------------------------------------------------*/ +/* + +-------------------+--------------------+------------------+------------------+ + + SRAM pins assignment + + +-------------------+--------------------+------------------+------------------+ + | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | + | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | + | PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | + | PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | + | PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | + | PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | + | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 | + | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+ + | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 | + | PD14 <-> FSMC_D0 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 | + | PD15 <-> FSMC_D1 | PE15 <-> FSMC_D12 |------------------+ + +-------------------+--------------------+ +*/ + /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */ + RCC->AHB1ENR = 0x00000078; + + /* Connect PDx pins to FSMC Alternate function */ + GPIOD->AFR[0] = 0x00cc00cc; + GPIOD->AFR[1] = 0xcc0ccccc; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xa2aa0a0a; + /* Configure PDx pins speed to 100 MHz */ + GPIOD->OSPEEDR = 0xf3ff0f0f; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FSMC Alternate function */ + GPIOE->AFR[0] = 0xc00000cc; + GPIOE->AFR[1] = 0xcccccccc; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xaaaa800a; + /* Configure PEx pins speed to 100 MHz */ + GPIOE->OSPEEDR = 0xffffc00f; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FSMC Alternate function */ + GPIOF->AFR[0] = 0x00cccccc; + GPIOF->AFR[1] = 0xcccc0000; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xaa000aaa; + /* Configure PFx pins speed to 100 MHz */ + GPIOF->OSPEEDR = 0xff000fff; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FSMC Alternate function */ + GPIOG->AFR[0] = 0x00cccccc; + GPIOG->AFR[1] = 0x000000c0; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0x00080aaa; + /* Configure PGx pins speed to 100 MHz */ + GPIOG->OSPEEDR = 0x000c0fff; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + +/*-- FSMC Configuration ------------------------------------------------------*/ + /* Enable the FSMC interface clock */ + RCC->AHB3ENR = 0x00000001; + + /* Configure and enable Bank1_SRAM2 */ + FSMC_Bank1->BTCR[2] = 0x00001015; + FSMC_Bank1->BTCR[3] = 0x00010400; + FSMC_Bank1E->BWTR[2] = 0x0fffffff; +/* + Bank1_SRAM2 is configured as follow: + + p.FSMC_AddressSetupTime = 0; + p.FSMC_AddressHoldTime = 0; + p.FSMC_DataSetupTime = 4; + p.FSMC_BusTurnAroundDuration = 1; + p.FSMC_CLKDivision = 0; + p.FSMC_DataLatency = 0; + p.FSMC_AccessMode = FSMC_AccessMode_A; + + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; +*/ + +} +#endif /* DATA_IN_ExtSRAM */ + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/File_System/FS_Config.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/File_System/FS_Config.c new file mode 100644 index 000000000..78564b080 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/File_System/FS_Config.c @@ -0,0 +1,72 @@ +/*------------------------------------------------------------------------------ + * MDK Middleware - Component ::File System + * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved. + *------------------------------------------------------------------------------ + * Name: FS_Config.c + * Purpose: File System Configuration + * Rev.: V5.00 + *----------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// File System +// Define File System global parameters + +// Number of open files <4-16> +// Define number of files that can be +// opened at the same time. +// Default: 8 +#define NUM_FILES 8 + +// FAT Name Cache Size <0-1000000> +// Define number of cached FAT file or directory names. +// 48 bytes of RAM is required for each cached name. +#define FAT_NAME_CACHE_SIZE 0 + +// Relocate FAT Name Cache Buffer +// Locate Cache Buffer at a specific address. +#define FAT_NAME_CACHE_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Define the Cache buffer base address. +#define FAT_NAME_CACHE_ADDR 0x60000000 + +// + +// + +#include "..\RTE_Components.h" + +#ifdef RTE_FileSystem_Drive_RAM +#include "FS_Config_RAM.h" +#endif + +#ifdef RTE_FileSystem_Drive_NOR_0 +#include "FS_Config_NOR_0.h" +#endif +#ifdef RTE_FileSystem_Drive_NOR_1 +#include "FS_Config_NOR_1.h" +#endif + +#ifdef RTE_FileSystem_Drive_NAND_0 +#include "FS_Config_NAND_0.h" +#endif +#ifdef RTE_FileSystem_Drive_NAND_1 +#include "FS_Config_NAND_1.h" +#endif + +#ifdef RTE_FileSystem_Drive_MC_0 +#include "FS_Config_MC_0.h" +#endif +#ifdef RTE_FileSystem_Drive_MC_1 +#include "FS_Config_MC_1.h" +#endif + +#ifdef RTE_FileSystem_Drive_USB_0 +#include "FS_Config_USB_0.h" +#endif +#ifdef RTE_FileSystem_Drive_USB_1 +#include "FS_Config_USB_1.h" +#endif + +#include "fs_config.h" diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/File_System/FS_Config_MC_0.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/File_System/FS_Config_MC_0.h new file mode 100644 index 000000000..0b1c6d3a7 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/File_System/FS_Config_MC_0.h @@ -0,0 +1,57 @@ +/*------------------------------------------------------------------------------ + * MDK Middleware - Component ::File System:Drive + * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved. + *------------------------------------------------------------------------------ + * Name: FS_Config_MC_0.h + * Purpose: File System Configuration for Memory Card Drive + * Rev.: V5.01 + *----------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// Memory Card Drive 0 +// Configuration for SD/SDHC/MMC Memory Card assigned to drive letter "M0:" +#define MC0_ENABLE 1 + +// Connect to hardware via Driver_MCI# <0-255> +// Select driver control block for hardware interface +#define MC0_MCI_DRIVER 0 + +// Connect to hardware via Driver_SPI# <0-255> +// Select driver control block for hardware interface when in SPI mode +#define MC0_SPI_DRIVER 0 + +// Memory Card Interface Mode <0=>Native <1=>SPI +// Native uses a SD Bus with up to 8 data lines, CLK, and CMD +// SPI uses 2 data lines (MOSI and MISO), SCLK and CS +// When using SPI both Driver_SPI# and Driver_MCI# must be specified +// since the MCI driver provides the control interface lines. +#define MC0_SPI 0 + +// Drive Cache Size <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Drive Cache stores data sectors and may be increased to speed-up +// file read/write operations on this drive (default: 4 KB) +#define MC0_CACHE_SIZE 4 + +// Locate Drive Cache and Drive Buffer +// Some microcontrollers support DMA only in specific memory areas and +// require to locate the drive buffers at a fixed address. +#define MC0_CACHE_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Set buffer base address to RAM areas that support DMA with the drive. +#define MC0_CACHE_ADDR 0x7FD00000 + +// + +// Use FAT Journal +// Protect File Allocation Table and Directory Entries for +// fail-safe operation. +#define MC0_FAT_JOURNAL 0 + +// Default Drive "M0:" +// Use this drive when no drive letter is specified. +#define MC0_DEFAULT_DRIVE 1 + +// diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config.c new file mode 100644 index 000000000..6b9dc8e00 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config.c @@ -0,0 +1,153 @@ +/*------------------------------------------------------------------------------ + * MDK Middleware - Component ::Network + * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved. + *------------------------------------------------------------------------------ + * Name: Net_Config.c + * Purpose: Network Configuration + * Rev.: V5.00 + *----------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// System Definitions +// Global Network System definitions +// Local Host Name +// This is the name under which embedded host can be +// accessed on a local area network. +// Default: "my_host" +#define NET_HOST_NAME "my_host" + +// Memory Pool size <1536-262144:4><#/4> +// This is the size of a memory pool in bytes. Buffers for +// Network packets are allocated from this memory pool. +// Default: 12000 bytes +#define NET_MEM_SIZE 3000 + +// + +#include "..\RTE_Components.h" + +#ifdef RTE_Network_Interface_ETH_0 +#include "Net_Config_ETH_0.h" +#endif +#ifdef RTE_Network_Interface_ETH_1 +#include "Net_Config_ETH_1.h" +#endif + +#ifdef RTE_Network_Interface_PPP_0 +#include "Net_Config_PPP_0.h" +#endif +#ifdef RTE_Network_Interface_PPP_1 +#include "Net_Config_PPP_1.h" +#endif + +#ifdef RTE_Network_Interface_SLIP_0 +#include "Net_Config_SLIP_0.h" +#endif +#ifdef RTE_Network_Interface_SLIP_1 +#include "Net_Config_SLIP_1.h" +#endif + +#ifdef RTE_Network_Socket_UDP +#include "Net_Config_UDP.h" +#endif +#ifdef RTE_Network_Socket_TCP +#include "Net_Config_TCP.h" +#endif +#ifdef RTE_Network_Socket_BSD +#include "Net_Config_BSD.h" +#endif + +#ifdef RTE_Network_Web_Server_RO +#include "Net_Config_HTTP_Server.h" +#endif +#ifdef RTE_Network_Web_Server_FS +#include "Net_Config_HTTP_Server.h" +#endif + +#ifdef RTE_Network_Telnet_Server +#include "Net_Config_Telnet_Server.h" +#endif + +#ifdef RTE_Network_TFTP_Server +#include "Net_Config_TFTP_Server.h" +#endif +#ifdef RTE_Network_TFTP_Client +#include "Net_Config_TFTP_Client.h" +#endif + +#ifdef RTE_Network_FTP_Server +#include "Net_Config_FTP_Server.h" +#endif +#ifdef RTE_Network_FTP_Client +#include "Net_Config_FTP_Client.h" +#endif + +#ifdef RTE_Network_DNS_Client +#include "Net_Config_DNS_Client.h" +#endif + +#ifdef RTE_Network_SMTP_Client +#include "Net_Config_SMTP_Client.h" +#endif + +#ifdef RTE_Network_SNMP_Agent +#include "Net_Config_SNMP_Agent.h" +#endif + +#ifdef RTE_Network_SNTP_Client +#include "Net_Config_SNTP_Client.h" +#endif + +#include "net_config.h" + +/** +\addtogroup net_genFunc +@{ +*/ +/** + \fn void net_sys_error (ERROR_CODE error) + \ingroup net_cores + \brief Network system error handler. +*/ +void net_sys_error (ERROR_CODE error) { + /* This function is called when a fatal error is encountered. */ + /* The normal program execution is not possible anymore. */ + + switch (error) { + case ERR_MEM_ALLOC: + /* Out of memory */ + break; + + case ERR_MEM_FREE: + /* Trying to release non existing memory block */ + break; + + case ERR_MEM_CORRUPT: + /* Memory Link pointer Corrupted */ + /* More data written than the size of allocated mem block */ + break; + + case ERR_MEM_LOCK: + /* Locked Memory management function (alloc/free) re-entered */ + break; + + case ERR_UDP_ALLOC: + /* Out of UDP Sockets */ + break; + + case ERR_TCP_ALLOC: + /* Out of TCP Sockets */ + break; + + case ERR_TCP_STATE: + /* TCP State machine in undefined state */ + break; + } + + /* End-less loop */ + while (1); +} +/** +@} +*/ diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_BSD.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_BSD.h new file mode 100644 index 000000000..7d515a507 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_BSD.h @@ -0,0 +1,36 @@ +/*------------------------------------------------------------------------------ + * MDK Middleware - Component ::Network:Socket + * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved. + *------------------------------------------------------------------------------ + * Name: Net_Config_BSD.h + * Purpose: Network Configuration BSD Sockets + * Rev.: V5.00 + *----------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// Berkley (BSD) Sockets +#define BSD_ENABLE 1 + +// Number of BSD Sockets <1-20> +// Number of available Berkeley Sockets +// Default: 2 +#define BSD_NUM_SOCKS 10 + +// Number of Streaming Server Sockets <0-20> +// Defines a number of Streaming (TCP) Server sockets, +// that listen for an incoming connection from the client. +// Default: 1 +#define BSD_SERVER_SOCKS 1 + +// Receive Timeout in seconds <0-600> +// A timeout for socket receive in blocking mode. +// Timeout value of 0 means indefinite timeout. +// Default: 20 +#define BSD_RECEIVE_TOUT 20 + +// Hostname Resolver +// Enable or disable Berkeley style hostname resolver. +#define BSD_HOSTNAME_ENABLE 0 + +// diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_DNS_Client.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_DNS_Client.h new file mode 100644 index 000000000..d30b71807 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_DNS_Client.h @@ -0,0 +1,20 @@ +/*------------------------------------------------------------------------------ + * MDK Middleware - Component ::Network:Service + * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved. + *------------------------------------------------------------------------------ + * Name: Net_Config_DNS_Client.h + * Purpose: Network Configuration DNS Client + * Rev.: V5.00 + *----------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// DNS Client +#define DNS_CLIENT_ENABLE 1 + +// Cache Table size <5-100> +// Number of cached DNS host names/IP addresses +// Default: 20 +#define DNS_CLIENT_TAB_SIZE 20 + +// diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_ETH_0.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_ETH_0.h new file mode 100644 index 000000000..7be57ad6d --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_ETH_0.h @@ -0,0 +1,222 @@ +/*------------------------------------------------------------------------------ + * MDK Middleware - Component ::Network:Interface + * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved. + *------------------------------------------------------------------------------ + * Name: Net_Config_ETH_0.h + * Purpose: Network Configuration ETH Interface + * Rev.: V5.00 + *----------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// Ethernet Network Interface 0 +#define ETH0_ENABLE 1 + +// Connect to hardware via Driver_ETH# <0-255> +// Select driver control block for MAC and PHY interface +#define ETH0_DRIVER 1 + +// MAC Address +// Local Ethernet MAC Address +// Value FF:FF:FF:FF:FF:FF is not allowed. +// It is an ethernet Broadcast MAC address. +// Address byte 1 <0x00-0xff:2> +// LSB is an ethernet Multicast bit. +// Must be 0 for local MAC address. +// Default: 0x1E +#define ETH0_MAC1 0x1E + +// Address byte 2 <0x00-0xff> +// Default: 0x30 +#define ETH0_MAC2 0x30 + +// Address byte 3 <0x00-0xff> +// Default: 0x6C +#define ETH0_MAC3 0x6C + +// Address byte 4 <0x00-0xff> +// Default: 0xA2 +#define ETH0_MAC4 0xA2 + +// Address byte 5 <0x00-0xff> +// Default: 0x45 +#define ETH0_MAC5 0x45 + +// Address byte 6 <0x00-0xff> +// Default: 0x5E +#define ETH0_MAC6 0x5E +// + +// IP Address +// Local Static IP Address +// Value 255.255.255.255 is not allowed. +// It is a Broadcast IP address. +// Address byte 1 <0-255> +// Default: 192 +#define ETH0_IP1 192 + +// Address byte 2 <0-255> +// Default: 168 +#define ETH0_IP2 168 + +// Address byte 3 <0-255> +// Default: 0 +#define ETH0_IP3 0 + +// Address byte 4 <0-255> +// Default: 100 +#define ETH0_IP4 100 +// + +// Subnet mask +// Local Subnet mask +// Mask byte 1 <0-255> +// Default: 255 +#define ETH0_MASK1 255 + +// Mask byte 2 <0-255> +// Default: 255 +#define ETH0_MASK2 255 + +// Mask byte 3 <0-255> +// Default: 255 +#define ETH0_MASK3 255 + +// Mask byte 4 <0-255> +// Default: 0 +#define ETH0_MASK4 0 +// + +// Default Gateway +// Default Gateway IP Address +// Address byte 1 <0-255> +// Default: 192 +#define ETH0_GW1 192 + +// Address byte 2 <0-255> +// Default: 168 +#define ETH0_GW2 168 + +// Address byte 3 <0-255> +// Default: 0 +#define ETH0_GW3 0 + +// Address byte 4 <0-255> +// Default: 254 +#define ETH0_GW4 254 +// + +// Primary DNS Server +// Primary DNS Server IP Address +// Address byte 1 <0-255> +// Default: 194 +#define ETH0_PRI_DNS1 194 + +// Address byte 2 <0-255> +// Default: 25 +#define ETH0_PRI_DNS2 25 + +// Address byte 3 <0-255> +// Default: 2 +#define ETH0_PRI_DNS3 2 + +// Address byte 4 <0-255> +// Default: 129 +#define ETH0_PRI_DNS4 129 +// + +// Secondary DNS Server +// Secondary DNS Server IP Address +// Address byte 1 <0-255> +// Default: 194 +#define ETH0_SEC_DNS1 194 + +// Address byte 2 <0-255> +// Default: 25 +#define ETH0_SEC_DNS2 25 + +// Address byte 3 <0-255> +// Default: 2 +#define ETH0_SEC_DNS3 2 + +// Address byte 4 <0-255> +// Default: 130 +#define ETH0_SEC_DNS4 130 +// + +// ARP Definitions +// Address Resolution Protocol Definitions +// Cache Table size <5-100> +// Number of cached hardware/IP addresses +// Default: 10 +#define ETH0_ARP_TAB_SIZE 10 + +// Cache Timeout in seconds <5-255> +// A timeout for a cached hardware/IP addresses +// Default: 150 +#define ETH0_ARP_CACHE_TOUT 150 + +// Number of Retries <0-20> +// Number of Retries to resolve an IP address +// before ARP module gives up +// Default: 4 +#define ETH0_ARP_MAX_RETRY 4 + +// Resend Timeout in seconds <1-10> +// A timeout to resend the ARP Request +// Default: 2 +#define ETH0_ARP_RESEND_TOUT 2 + +// Send Notification on Address changes +// When this option is enabled, the embedded host +// will send a Gratuitous ARP notification at startup, +// or when the device IP address has changed. +// Default: Disabled +#define ETH0_ARP_NOTIFY 0 +// + +// IGMP Group Management +// Enable or disable Internet Group Management Protocol +#define ETH0_IGMP_ENABLE 0 + +// Membership Table size <2-50> +// Number of Groups this host can join +// Default: 5 +#define ETH0_IGMP_TAB_SIZE 5 +// + +// NetBIOS Name Service +// When this option is enabled, the embedded host can be +// accessed by his name on the local LAN using NBNS protocol. +// You need to modify also the number of UDP Sockets, +// because NBNS protocol uses one UDP socket to run. +#define ETH0_NBNS_ENABLE 1 + +// Dynamic Host Configuration +// When this option is enabled, local IP address, Net Mask +// and Default Gateway are obtained automatically from +// the DHCP Server on local LAN. +// You need to modify also the number of UDP Sockets, +// because DHCP protocol uses one UDP socket to run. +#define ETH0_DHCP_ENABLE 1 + +// Vendor Class Identifier +// This value is optional. If specified, it is added +// to DHCP request message, identifying vendor type. +// Default: "" +#define ETH0_DHCP_VCID "" + +// Bootfile Name +// This value is optional. If enabled, the Bootfile Name +// (option 67) is also requested from DHCP server. +// Default: disabled +#define ETH0_DHCP_BOOTFILE 0 + +// NTP Servers +// This value is optional. If enabled, a list of NTP Servers +// (option 42) is also requested from DHCP server. +// Default: disabled +#define ETH0_DHCP_NTP_SERVERS 0 +// + +// diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_TCP.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_TCP.h new file mode 100644 index 000000000..e659ce921 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_TCP.h @@ -0,0 +1,61 @@ +/*------------------------------------------------------------------------------ + * MDK Middleware - Component ::Network:Socket + * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved. + *------------------------------------------------------------------------------ + * Name: Net_Config_TCP.h + * Purpose: Network Configuration TCP Sockets + * Rev.: V5.00 + *----------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// TCP Sockets +#define TCP_ENABLE 1 + +// Number of TCP Sockets <1-20> +// Number of available TCP sockets +// Default: 5 +#define TCP_NUM_SOCKS 10 + +// Number of Retries <0-20> +// How many times TCP module will try to retransmit data +// before giving up. Increase this value for high-latency +// and low_throughput networks. +// Default: 5 +#define TCP_MAX_RETRY 5 + +// Retry Timeout in seconds <1-10> +// If data frame not acknowledged within this time frame, +// TCP module will try to resend the data again. +// Default: 4 +#define TCP_RETRY_TOUT 4 + +// Default Connect Timeout in seconds <1-600> +// Default TCP Socket Keep Alive timeout. When it expires +// with no TCP data frame send, TCP Connection is closed. +// Default: 120 +#define TCP_DEFAULT_TOUT 120 + +// Maximum Segment Size <536-1460> +// The Maximum Segment Size specifies the maximum +// number of bytes in the TCP segment's Data field. +// Default: 1460 +#define TCP_MAX_SEG_SIZE 1460 + +// Receive Window Size <536-65535> +// Receive Window Size specifies the size of data, +// that the socket is able to buffer in flow-control mode. +// Default: 4380 +#define TCP_RECEIVE_WIN_SIZE 4380 + +// + +// TCP Initial Retransmit period in seconds +#define TCP_INITIAL_RETRY_TOUT 1 + +// TCP SYN frame retransmit period in seconds +#define TCP_SYN_RETRY_TOUT 2 + +// Number of retries to establish a connection +#define TCP_CONNECT_RETRY 7 + diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_UDP.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_UDP.h new file mode 100644 index 000000000..55e7f21ba --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Config_UDP.h @@ -0,0 +1,20 @@ +/*------------------------------------------------------------------------------ + * MDK Middleware - Component ::Network:Socket + * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved. + *------------------------------------------------------------------------------ + * Name: Net_Config_UDP.h + * Purpose: Network Configuration UDP Sockets + * Rev.: V5.00 + *----------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// UDP Sockets +#define UDP_ENABLE 1 + +// Number of UDP Sockets <1-30> +// Number of available UDP sockets +// Default: 5 +#define UDP_NUM_SOCKS 15 + +// diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Debug.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Debug.c new file mode 100644 index 000000000..735089a40 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/Network/Net_Debug.c @@ -0,0 +1,125 @@ +/*------------------------------------------------------------------------------ + * MDK Middleware - Component ::Network + * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved. + *------------------------------------------------------------------------------ + * Name: Net_Debug.c + * Purpose: Network Debug Configuration + * Rev.: V5.00 + *----------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// Print Time Stamp +// Enable printing the time-info in debug messages +#define DBG_TIME 1 + +// TCPnet Debug Definitions +// Memory Management Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Dynamic Memory debug messages +#define DBG_MEM 1 + +// Ethernet Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Ethernet debug messages +#define DBG_ETH 0 + +// PPP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off PPP debug messages +#define DBG_PPP 0 + +// SLIP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off SLIP debug messages +#define DBG_SLIP 0 + +// ARP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off ARP debug messages +#define DBG_ARP 0 + +// IP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off IP debug messages +#define DBG_IP 1 + +// ICMP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off ICMP debug messages +#define DBG_ICMP 1 + +// IGMP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off IGMP debug messages +#define DBG_IGMP 1 + +// UDP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off UDP debug messages +#define DBG_UDP 1 + +// TCP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off TCP debug messages +#define DBG_TCP 1 + +// NBNS Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off NetBIOS Name Service debug messages +#define DBG_NBNS 1 + +// DHCP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Dynamic Host Configuration debug messages +#define DBG_DHCP 1 + +// DNS Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Domain Name Service debug messages +#define DBG_DNS 1 + +// SNMP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Simple Network Management debug messages +#define DBG_SNMP 1 + +// SNTP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Simple Network Time debug messages +#define DBG_SNTP 1 + +// BSD Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off BSD Interface debug messages +#define DBG_BSD 1 +// + +// Application Debug Definitions +// HTTP Server Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Web Server debug messages +#define DBG_HTTP_SERVER 1 + +// FTP Server Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off FTP Server debug messages +#define DBG_FTP_SERVER 1 + +// FTP Client Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off FTP Client debug messages +#define DBG_FTP_CLIENT 1 + +// Telnet Server Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Telnet Server debug messages +#define DBG_TELNET_SERVER 1 + +// TFTP Server Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off TFTP Server debug messages +#define DBG_TFTP_SERVER 1 + +// TFTP Client Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off TFTP Client debug messages +#define DBG_TFTP_CLIENT 1 + +// SMTP Client Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off SMTP Client debug messages +#define DBG_SMTP_CLIENT 1 +// + + +#include "net_debug.h" + + +/** + \fn void net_debug_init (void) + \brief Initialize Network Debug Interface. +*/ +void net_debug_init (void) { + /* Add your code to initialize the Debug output. This is usually the */ + /* serial interface. The function is called at TCPnet system startup. */ + /* You may need to customize also the 'putchar()' function. */ + +} diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/RTE_Components.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/RTE_Components.h new file mode 100644 index 000000000..07fef4e5e --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/RTE_Components.h @@ -0,0 +1,28 @@ + +/* + * Auto generated Run-Time-Environment Component Configuration File + * *** Do not modify ! *** + * + * Project: 'CyaSSL-Full' + * Target: 'CyaSSL-Full' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + +#define RTE_DEVICE_STARTUP_STM32F2xx /* Device Startup for STM32F2 */ +#define RTE_Drivers_ETH_MAC0 /* Driver ETH_MAC0 */ +#define RTE_Drivers_MCI0 /* Driver MCI0 */ +#define RTE_Drivers_PHY_ST802RT1 /* Driver PHY ST802RT1 */ +#define RTE_FileSystem_Core /* File System Core */ + #define RTE_FileSystem_LFN /* File System with Long Filename support */ +#define RTE_FileSystem_Drive_MC_0 /* File System Memory Card Drive 0 */ +#define RTE_Network_Core /* Network Core */ + #define RTE_Network_Debug /* Network Debug Version */ +#define RTE_Network_DNS_Client /* Network DNS Client */ +#define RTE_Network_Interface_ETH_0 /* Network Interface ETH 0 */ +#define RTE_Network_Socket_BSD /* Network Socket BSD */ +#define RTE_Network_Socket_TCP /* Network Socket TCP */ +#define RTE_Network_Socket_UDP /* Network Socket UDP */ + +#endif /* RTE_COMPONENTS_H */ diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/STM32_SWO.ini b/IDE/MDK5-ARM/Projects/CyaSSL-Full/STM32_SWO.ini new file mode 100644 index 000000000..239abce37 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/STM32_SWO.ini @@ -0,0 +1,36 @@ +/******************************************************************************/ +/* STM32_SWO.ini: STM32 Debugger Initialization File */ +/******************************************************************************/ +// <<< Use Configuration Wizard in Context Menu >>> // +/******************************************************************************/ +/* This file is part of the uVision/ARM development tools. */ +/* Copyright (c) 2004-2013 Keil Software. All rights reserved. */ +/* This software may only be used under the terms of a valid, current, */ +/* end user licence from KEIL for a compatible version of KEIL software */ +/* development tools. Nothing else gives you the right to use this software. */ +/******************************************************************************/ + + +FUNC void DebugSetup (void) { +// Debug MCU Configuration +// DBG_SLEEP Debug Sleep Mode +// DBG_STOP Debug Stop Mode +// DBG_STANDBY Debug Standby Mode +// TRACE_IOEN Trace I/O Enable +// TRACE_MODE Trace Mode +// <0=> Asynchronous +// <1=> Synchronous: TRACEDATA Size 1 +// <2=> Synchronous: TRACEDATA Size 2 +// <3=> Synchronous: TRACEDATA Size 4 +// DBG_IWDG_STOP Independant Watchdog Stopped when Core is halted +// DBG_WWDG_STOP Window Watchdog Stopped when Core is halted +// DBG_TIM1_STOP Timer 1 Stopped when Core is halted +// DBG_TIM2_STOP Timer 2 Stopped when Core is halted +// DBG_TIM3_STOP Timer 3 Stopped when Core is halted +// DBG_TIM4_STOP Timer 4 Stopped when Core is halted +// DBG_CAN_STOP CAN Stopped when Core is halted +// + _WDWORD(0xE0042004, 0x00000027); // DBGMCU_CR +} + +DebugSetup(); // Debugger Setup diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/benchmark.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/benchmark.c new file mode 100644 index 000000000..277e808fa --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/benchmark.c @@ -0,0 +1,1064 @@ +/* benchmark.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +/* CTaoCrypt benchmark */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#ifdef HAVE_CAVIUM + #include "cavium_sysdep.h" + #include "cavium_common.h" + #include "cavium_ioctl.h" +#endif +#if defined(USE_CERT_BUFFERS_1024) || defined(USE_CERT_BUFFERS_2048) + /* include test cert and key buffers for use with NO_FILESYSTEM */ + #if defined(CYASSL_MDK_ARM) && !defined(SINGLE_THREADED) + #include "cert_data.h" /* use certs_test.c for initial data, + so other commands can share the data. */ + #else + #include + #endif +#endif + +#if defined(CYASSL_MDK_ARM) + #include + extern FILE * CyaSSL_fopen(const char *fname, const char *mode) ; + #define fopen CyaSSL_fopen +#endif + +#ifdef HAVE_BLAKE2 + #include + void bench_blake2(void); +#endif + +#ifdef _MSC_VER + /* 4996 warning to use MS extensions e.g., strcpy_s instead of strncpy */ + #pragma warning(disable: 4996) +#endif + +void bench_des(void); +void bench_arc4(void); +void bench_hc128(void); +void bench_rabbit(void); +void bench_aes(int); +void bench_aesgcm(void); +void bench_aesccm(void); +void bench_camellia(void); + +void bench_md5(void); +void bench_sha(void); +void bench_sha256(void); +void bench_sha512(void); +void bench_ripemd(void); + +void bench_rsa(void); +void bench_rsaKeyGen(void); +void bench_dh(void); +#ifdef HAVE_ECC +void bench_eccKeyGen(void); +void bench_eccKeyAgree(void); +#endif + +double current_time(int); + + +#ifdef HAVE_CAVIUM + +static int OpenNitroxDevice(int dma_mode,int dev_id) +{ + Csp1CoreAssignment core_assign; + Uint32 device; + + if (CspInitialize(CAVIUM_DIRECT,CAVIUM_DEV_ID)) + return -1; + if (Csp1GetDevType(&device)) + return -1; + if (device != NPX_DEVICE) { + if (ioctl(gpkpdev_hdlr[CAVIUM_DEV_ID], IOCTL_CSP1_GET_CORE_ASSIGNMENT, + (Uint32 *)&core_assign)!= 0) + return -1; + } + CspShutdown(CAVIUM_DEV_ID); + + return CspInitialize(dma_mode, dev_id); +} + +#endif + + +/* so embedded projects can pull in tests on their own */ +#if !defined(NO_MAIN_DRIVER) + +int main(int argc, char** argv) + +{ + (void)argc; + (void)argv; +#else +int benchmark_test(void *args) +{ +#endif + + #ifdef HAVE_CAVIUM + int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID); + if (ret != 0) { + printf("Cavium OpenNitroxDevice failed\n"); + exit(-1); + } +#endif /* HAVE_CAVIUM */ +#ifndef NO_AES + bench_aes(0); + bench_aes(1); +#endif +#ifdef HAVE_AESGCM + bench_aesgcm(); +#endif +#ifdef HAVE_AESCCM + bench_aesccm(); +#endif +#ifdef HAVE_CAMELLIA + bench_camellia(); +#endif +#ifndef NO_RC4 + bench_arc4(); +#endif +#ifdef HAVE_HC128 + bench_hc128(); +#endif +#ifndef NO_RABBIT + bench_rabbit(); +#endif +#ifndef NO_DES3 + bench_des(); +#endif + + printf("\n"); + +#ifndef NO_MD5 + bench_md5(); +#endif +#ifndef NO_SHA + bench_sha(); +#endif +#ifndef NO_SHA256 + bench_sha256(); +#endif +#ifdef CYASSL_SHA512 + bench_sha512(); +#endif +#ifdef CYASSL_RIPEMD + bench_ripemd(); +#endif +#ifdef HAVE_BLAKE2 + bench_blake2(); +#endif + + printf("\n"); + +#ifndef NO_RSA + bench_rsa(); +#endif + +#ifndef NO_DH + bench_dh(); +#endif + +#if defined(CYASSL_KEY_GEN) && !defined(NO_RSA) + bench_rsaKeyGen(); +#endif + +#ifdef HAVE_ECC + bench_eccKeyGen(); + bench_eccKeyAgree(); +#endif + + return 0; +} + + +#ifdef BENCH_EMBEDDED +const int numBlocks = 25; /* how many kB/megs to test (en/de)cryption */ +const char blockType[] = "kB"; /* used in printf output */ +const int times = 1; /* public key iterations */ +#else +const int numBlocks = 5; +const char blockType[] = "megs"; +const int times = 100; +#endif + +const byte key[] = +{ + 0x01,0x23,0x45,0x67,0x89,0xab,0xcd,0xef, + 0xfe,0xde,0xba,0x98,0x76,0x54,0x32,0x10, + 0x89,0xab,0xcd,0xef,0x01,0x23,0x45,0x67 +}; + +const byte iv[] = +{ + 0x12,0x34,0x56,0x78,0x90,0xab,0xcd,0xef, + 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01, + 0x11,0x21,0x31,0x41,0x51,0x61,0x71,0x81 + +}; + + +/* use kB instead of mB for embedded benchmarking */ +#ifdef BENCH_EMBEDDED +byte plain [1024]; +byte cipher[1024]; +#else +byte plain [1024*1024]; +byte cipher[1024*1024]; +#endif + + +#ifndef NO_AES +void bench_aes(int show) +{ + Aes enc; + double start, total, persec; + int i; + +#ifdef HAVE_CAVIUM + if (AesInitCavium(&enc, CAVIUM_DEV_ID) != 0) + printf("aes init cavium failed\n"); +#endif + + AesSetKey(&enc, key, 16, iv, AES_ENCRYPTION); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + AesCbcEncrypt(&enc, plain, cipher, sizeof(plain)); + + total = current_time(0) - start; + + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + if (show) + printf("AES %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +#ifdef HAVE_CAVIUM + AesFreeCavium(&enc); +#endif +} +#endif + + +byte additional[13]; +byte tag[16]; + + +#ifdef HAVE_AESGCM +void bench_aesgcm(void) +{ + Aes enc; + double start, total, persec; + int i; + + AesGcmSetKey(&enc, key, 16); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + AesGcmEncrypt(&enc, cipher, plain, sizeof(plain), iv, 12, + tag, 16, additional, 13); + + total = current_time(0) - start; + + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("AES-GCM %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif + + +#ifdef HAVE_AESCCM +void bench_aesccm(void) +{ + Aes enc; + double start, total, persec; + int i; + + AesCcmSetKey(&enc, key, 16); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + AesCcmEncrypt(&enc, cipher, plain, sizeof(plain), iv, 12, + tag, 16, additional, 13); + + total = current_time(0) - start; + + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("AES-CCM %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif + + +#ifdef HAVE_CAMELLIA +void bench_camellia(void) +{ + Camellia cam; + double start, total, persec; + int i; + + CamelliaSetKey(&cam, key, 16, iv); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + CamelliaCbcEncrypt(&cam, plain, cipher, sizeof(plain)); + + total = current_time(0) - start; + + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("Camellia %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif + + +#ifndef NO_DES3 +void bench_des(void) +{ + Des3 enc; + double start, total, persec; + int i; + +#ifdef HAVE_CAVIUM + if (Des3_InitCavium(&enc, CAVIUM_DEV_ID) != 0) + printf("des3 init cavium failed\n"); +#endif + Des3_SetKey(&enc, key, iv, DES_ENCRYPTION); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + Des3_CbcEncrypt(&enc, plain, cipher, sizeof(plain)); + + total = current_time(0) - start; + + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("3DES %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +#ifdef HAVE_CAVIUM + Des3_FreeCavium(&enc); +#endif +} +#endif + + +#ifndef NO_RC4 +void bench_arc4(void) +{ + Arc4 enc; + double start, total, persec; + int i; + +#ifdef HAVE_CAVIUM + if (Arc4InitCavium(&enc, CAVIUM_DEV_ID) != 0) + printf("arc4 init cavium failed\n"); +#endif + + Arc4SetKey(&enc, key, 16); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + Arc4Process(&enc, cipher, plain, sizeof(plain)); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("ARC4 %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +#ifdef HAVE_CAVIUM + Arc4FreeCavium(&enc); +#endif +} +#endif + + +#ifdef HAVE_HC128 +void bench_hc128(void) +{ + HC128 enc; + double start, total, persec; + int i; + + Hc128_SetKey(&enc, key, iv); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + Hc128_Process(&enc, cipher, plain, sizeof(plain)); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("HC128 %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif /* HAVE_HC128 */ + + +#ifndef NO_RABBIT +void bench_rabbit(void) +{ + Rabbit enc; + double start, total, persec; + int i; + + RabbitSetKey(&enc, key, iv); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + RabbitProcess(&enc, cipher, plain, sizeof(plain)); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("RABBIT %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif /* NO_RABBIT */ + + +#ifndef NO_MD5 +void bench_md5(void) +{ + Md5 hash; + byte digest[MD5_DIGEST_SIZE]; + double start, total, persec; + int i; + + InitMd5(&hash); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + Md5Update(&hash, plain, sizeof(plain)); + + Md5Final(&hash, digest); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("MD5 %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif /* NO_MD5 */ + + +#ifndef NO_SHA +void bench_sha(void) +{ + Sha hash; + byte digest[SHA_DIGEST_SIZE]; + double start, total, persec; + int i; + + InitSha(&hash); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + ShaUpdate(&hash, plain, sizeof(plain)); + + ShaFinal(&hash, digest); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("SHA %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif /* NO_SHA */ + + +#ifndef NO_SHA256 +void bench_sha256(void) +{ + Sha256 hash; + byte digest[SHA256_DIGEST_SIZE]; + double start, total, persec; + int i; + + InitSha256(&hash); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + Sha256Update(&hash, plain, sizeof(plain)); + + Sha256Final(&hash, digest); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("SHA-256 %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif + +#ifdef CYASSL_SHA512 +void bench_sha512(void) +{ + Sha512 hash; + byte digest[SHA512_DIGEST_SIZE]; + double start, total, persec; + int i; + + InitSha512(&hash); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + Sha512Update(&hash, plain, sizeof(plain)); + + Sha512Final(&hash, digest); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("SHA-512 %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif + +#ifdef CYASSL_RIPEMD +void bench_ripemd(void) +{ + RipeMd hash; + byte digest[RIPEMD_DIGEST_SIZE]; + double start, total, persec; + int i; + + InitRipeMd(&hash); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + RipeMdUpdate(&hash, plain, sizeof(plain)); + + RipeMdFinal(&hash, digest); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("RIPEMD %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif + + +#ifdef HAVE_BLAKE2 +void bench_blake2(void) +{ + Blake2b b2b; + byte digest[64]; + double start, total, persec; + int i; + + InitBlake2b(&b2b, 64); + start = current_time(1); + + for(i = 0; i < numBlocks; i++) + Blake2bUpdate(&b2b, plain, sizeof(plain)); + + Blake2bFinal(&b2b, digest, 64); + + total = current_time(0) - start; + persec = 1 / total * numBlocks; +#ifdef BENCH_EMBEDDED + /* since using kB, convert to MB/s */ + persec = persec / 1024; +#endif + + printf("BLAKE2b %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks, + blockType, total, persec); +} +#endif + + +#if !defined(NO_RSA) || !defined(NO_DH) \ + || defined(CYASSL_KEYGEN) || defined(HAVE_ECC) +RNG rng; +#endif + +#ifndef NO_RSA + + +#if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) && \ + defined(CYASSL_MDK_SHELL) +static char *certRSAname = "certs/rsa2048.der" ; +void set_Bench_RSA_File(char * cert) { certRSAname = cert ; } + /* set by shell command */ +#elif defined(CYASSL_MDK_SHELL) + /* nothing */ +#else +static const char *certRSAname = "certs/rsa2048.der" ; +#endif + +void bench_rsa(void) +{ + int i; + int ret; + byte tmp[3072]; + size_t bytes; + word32 idx = 0; + + byte message[] = "Everyone gets Friday off."; + byte enc[512]; /* for up to 4096 bit */ + const int len = (int)strlen((char*)message); + double start, total, each, milliEach; + + RsaKey rsaKey; + int rsaKeySz = 2048; /* used in printf */ + +#ifdef USE_CERT_BUFFERS_1024 + XMEMCPY(tmp, rsa_key_der_1024, sizeof_rsa_key_der_1024); + bytes = sizeof_rsa_key_der_1024; + rsaKeySz = 1024; +#elif defined(USE_CERT_BUFFERS_2048) + XMEMCPY(tmp, rsa_key_der_2048, sizeof_rsa_key_der_2048); + bytes = sizeof_rsa_key_der_2048; +#else + FILE* file = fopen(certRSAname, "rb"); + + if (!file) { + printf("can't find %s, Please run from CyaSSL home dir\n", certRSAname); + return; + } + + bytes = fread(tmp, 1, sizeof(tmp), file); + fclose(file); +#endif /* USE_CERT_BUFFERS */ + + +#ifdef HAVE_CAVIUM + if (RsaInitCavium(&rsaKey, CAVIUM_DEV_ID) != 0) + printf("RSA init cavium failed\n"); +#endif + ret = InitRng(&rng); + if (ret < 0) { + printf("InitRNG failed\n"); + return; + } + InitRsaKey(&rsaKey, 0); + ret = RsaPrivateKeyDecode(tmp, &idx, &rsaKey, (word32)bytes); + + start = current_time(1); + + for (i = 0; i < times; i++) + ret = RsaPublicEncrypt(message,len,enc,sizeof(enc), &rsaKey, &rng); + + total = current_time(0) - start; + each = total / times; /* per second */ + milliEach = each * 1000; /* milliseconds */ + + printf("RSA %d encryption took %6.2f milliseconds, avg over %d" + " iterations\n", rsaKeySz, milliEach, times); + + if (ret < 0) { + printf("Rsa Public Encrypt failed\n"); + return; + } + + start = current_time(1); + + for (i = 0; i < times; i++) { + byte out[512]; /* for up to 4096 bit */ + RsaPrivateDecrypt(enc, (word32)ret, out, sizeof(out), &rsaKey); + } + + total = current_time(0) - start; + each = total / times; /* per second */ + milliEach = each * 1000; /* milliseconds */ + + printf("RSA %d decryption took %6.2f milliseconds, avg over %d" + " iterations\n", rsaKeySz, milliEach, times); + + FreeRsaKey(&rsaKey); +#ifdef HAVE_CAVIUM + RsaFreeCavium(&rsaKey); +#endif +} +#endif + + +#ifndef NO_DH + + +#if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) && \ + defined(CYASSL_MDK_SHELL) +static char *certDHname = "certs/dh2048.der" ; +void set_Bench_DH_File(char * cert) { certDHname = cert ; } + /* set by shell command */ +#elif defined(CYASSL_MDK_SHELL) + /* nothing */ +#else +static const char *certDHname = "certs/dh2048.der" ; +#endif + +void bench_dh(void) +{ + int i; + byte tmp[1024]; + size_t bytes; + word32 idx = 0, pubSz, privSz, pubSz2, privSz2, agreeSz; + + byte pub[256]; /* for 2048 bit */ + byte priv[256]; /* for 2048 bit */ + byte pub2[256]; /* for 2048 bit */ + byte priv2[256]; /* for 2048 bit */ + byte agree[256]; /* for 2048 bit */ + + double start, total, each, milliEach; + DhKey dhKey; + int dhKeySz = 2048; /* used in printf */ + + +#ifdef USE_CERT_BUFFERS_1024 + XMEMCPY(tmp, dh_key_der_1024, sizeof_dh_key_der_1024); + bytes = sizeof_dh_key_der_1024; + dhKeySz = 1024; +#elif defined(USE_CERT_BUFFERS_2048) + XMEMCPY(tmp, dh_key_der_2048, sizeof_dh_key_der_2048); + bytes = sizeof_dh_key_der_2048; +#else + FILE* file = fopen(certDHname, "rb"); + + if (!file) { + printf("can't find %s, Please run from CyaSSL home dir\n", certDHname); + return; + } + + bytes = fread(tmp, 1, sizeof(tmp), file); +#endif /* USE_CERT_BUFFERS */ + + + InitDhKey(&dhKey); + bytes = DhKeyDecode(tmp, &idx, &dhKey, (word32)bytes); + if (bytes != 0) { + printf("dhekydecode failed, can't benchmark\n"); + #if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) + fclose(file); + #endif + return; + } + + start = current_time(1); + + for (i = 0; i < times; i++) + DhGenerateKeyPair(&dhKey, &rng, priv, &privSz, pub, &pubSz); + + total = current_time(0) - start; + each = total / times; /* per second */ + milliEach = each * 1000; /* milliseconds */ + + printf("DH %d key generation %6.2f milliseconds, avg over %d" + " iterations\n", dhKeySz, milliEach, times); + + DhGenerateKeyPair(&dhKey, &rng, priv2, &privSz2, pub2, &pubSz2); + start = current_time(1); + + for (i = 0; i < times; i++) + DhAgree(&dhKey, agree, &agreeSz, priv, privSz, pub2, pubSz2); + + total = current_time(0) - start; + each = total / times; /* per second */ + milliEach = each * 1000; /* milliseconds */ + + printf("DH %d key agreement %6.2f milliseconds, avg over %d" + " iterations\n", dhKeySz, milliEach, times); + +#if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) + fclose(file); +#endif + FreeDhKey(&dhKey); +} +#endif + +#if defined(CYASSL_KEY_GEN) && !defined(NO_RSA) +void bench_rsaKeyGen(void) +{ + RsaKey genKey; + double start, total, each, milliEach; + int i; + const int genTimes = 5; + + /* 1024 bit */ + start = current_time(1); + + for(i = 0; i < genTimes; i++) { + InitRsaKey(&genKey, 0); + MakeRsaKey(&genKey, 1024, 65537, &rng); + FreeRsaKey(&genKey); + } + + total = current_time(0) - start; + each = total / genTimes; /* per second */ + milliEach = each * 1000; /* millisconds */ + printf("\n"); + printf("RSA 1024 key generation %6.2f milliseconds, avg over %d" + " iterations\n", milliEach, genTimes); + + /* 2048 bit */ + start = current_time(1); + + for(i = 0; i < genTimes; i++) { + InitRsaKey(&genKey, 0); + MakeRsaKey(&genKey, 2048, 65537, &rng); + FreeRsaKey(&genKey); + } + + total = current_time(0) - start; + each = total / genTimes; /* per second */ + milliEach = each * 1000; /* millisconds */ + printf("RSA 2048 key generation %6.2f milliseconds, avg over %d" + " iterations\n", milliEach, genTimes); +} +#endif /* CYASSL_KEY_GEN */ + +#ifdef HAVE_ECC +void bench_eccKeyGen(void) +{ + ecc_key genKey; + double start, total, each, milliEach; + int i; + const int genTimes = 5; + + /* 256 bit */ + start = current_time(1); + + for(i = 0; i < genTimes; i++) { + ecc_make_key(&rng, 32, &genKey); + ecc_free(&genKey); + } + + total = current_time(0) - start; + each = total / genTimes; /* per second */ + milliEach = each * 1000; /* millisconds */ + printf("\n"); + printf("ECC 256 key generation %6.2f milliseconds, avg over %d" + " iterations\n", milliEach, genTimes); +} + + +void bench_eccKeyAgree(void) +{ + ecc_key genKey, genKey2; + double start, total, each, milliEach; + int i, ret; + const int agreeTimes = 5; + byte shared[1024]; + byte sig[1024]; + byte digest[32]; + word32 x; + + ecc_init(&genKey); + ecc_init(&genKey2); + + ret = ecc_make_key(&rng, 32, &genKey); + if (ret != 0) { + printf("ecc_make_key failed\n"); + return; + } + ret = ecc_make_key(&rng, 32, &genKey2); + if (ret != 0) { + printf("ecc_make_key failed\n"); + return; + } + + /* 256 bit */ + start = current_time(1); + + for(i = 0; i < agreeTimes; i++) { + x = sizeof(shared); + ecc_shared_secret(&genKey, &genKey2, shared, &x); + } + + total = current_time(0) - start; + each = total / agreeTimes; /* per second */ + milliEach = each * 1000; /* millisconds */ + printf("EC-DHE key agreement %6.2f milliseconds, avg over %d" + " iterations\n", milliEach, agreeTimes); + + /* make dummy digest */ + for (i = 0; i < (int)sizeof(digest); i++) + digest[i] = i; + + + start = current_time(1); + + for(i = 0; i < agreeTimes; i++) { + x = sizeof(sig); + ecc_sign_hash(digest, sizeof(digest), sig, &x, &rng, &genKey); + } + + total = current_time(0) - start; + each = total / agreeTimes; /* per second */ + milliEach = each * 1000; /* millisconds */ + printf("EC-DSA sign time %6.2f milliseconds, avg over %d" + " iterations\n", milliEach, agreeTimes); + + ecc_free(&genKey2); + ecc_free(&genKey); +} +#endif /* HAVE_ECC */ + + +#ifdef _WIN32 + + #define WIN32_LEAN_AND_MEAN + #include + + double current_time(int reset) + { + (void)reset; + + static int init = 0; + static LARGE_INTEGER freq; + + LARGE_INTEGER count; + + if (!init) { + QueryPerformanceFrequency(&freq); + init = 1; + } + + QueryPerformanceCounter(&count); + + return (double)count.QuadPart / freq.QuadPart; + } + +#elif defined MICROCHIP_PIC32 + + #include + + double current_time(int reset) + { + /* NOTE: core timer tick rate = 40 Mhz, 1 tick = 25 ns */ + + unsigned int ns; + + /* should we reset our timer back to zero? Helps prevent timer + rollover */ + + if (reset) { + WriteCoreTimer(0); + } + + /* get timer in ns */ + ns = ReadCoreTimer() * 25; + + /* return seconds as a double */ + return ( ns / 1000000000.0 ); + } + +#elif defined CYASSL_MDK_ARM + extern double current_time(int reset) ; +#else + + #include + + double current_time(int reset) + { + (void) reset; + + struct timeval tv; + gettimeofday(&tv, 0); + + return (double)tv.tv_sec + (double)tv.tv_usec / 1000000; + } + +#endif /* _WIN32 */ + diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/cert_data.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/cert_data.c new file mode 100644 index 000000000..398d85c70 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/cert_data.c @@ -0,0 +1,28 @@ +/* certs_test.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +/* Define initial data for cert buffers */ +#include + diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c new file mode 100644 index 000000000..fb3efe6cc --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c @@ -0,0 +1,755 @@ +/* client.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + #define CYASSL_MDK_ARM +#if defined(CYASSL_MDK_ARM) + #include + #include + + #if defined(CYASSL_MDK5) + #include "cmsis_os.h" + #include "rl_fs.h" + #include "rl_net.h" + #else + #include "rtl.h" + #endif + + #include "cyassl_MDK_ARM.h" +#endif + +#include + +#if !defined(CYASSL_TRACK_MEMORY) && !defined(NO_MAIN_DRIVER) + /* in case memory tracker wants stats */ + #define CYASSL_TRACK_MEMORY +#endif + +#include + +#ifdef CYASSL_MDK_SHELL +extern void exit_command(void) ; +#define exit(code) exit_command() +#endif + +#include + +#include "examples/client/client.h" + +#define USE_CYASSL_MEMORY + +#ifdef CYASSL_CALLBACKS + int handShakeCB(HandShakeInfo*); + int timeoutCB(TimeoutInfo*); + Timeval timeout; +#endif + + +static void NonBlockingSSL_Connect(CYASSL* ssl) +{ +#ifndef CYASSL_CALLBACKS + int ret = CyaSSL_connect(ssl); +#else + int ret = CyaSSL_connect_ex(ssl, handShakeCB, timeoutCB, timeout); +#endif + int error = CyaSSL_get_error(ssl, 0); + SOCKET_T sockfd = (SOCKET_T)CyaSSL_get_fd(ssl); + int select_ret; + + while (ret != SSL_SUCCESS && (error == SSL_ERROR_WANT_READ || + error == SSL_ERROR_WANT_WRITE)) { + int currTimeout = 1; + + if (error == SSL_ERROR_WANT_READ) + printf("... client would read block\n"); + else + printf("... client would write block\n"); + +#ifdef CYASSL_DTLS + currTimeout = CyaSSL_dtls_get_current_timeout(ssl); +#endif + select_ret = tcp_select(sockfd, currTimeout); + + if ((select_ret == TEST_RECV_READY) || + (select_ret == TEST_ERROR_READY)) { + #ifndef CYASSL_CALLBACKS + ret = CyaSSL_connect(ssl); + #else + ret = CyaSSL_connect_ex(ssl,handShakeCB,timeoutCB,timeout); + #endif + error = CyaSSL_get_error(ssl, 0); + } + else if (select_ret == TEST_TIMEOUT && !CyaSSL_dtls(ssl)) { + error = SSL_ERROR_WANT_READ; + } +#ifdef CYASSL_DTLS + else if (select_ret == TEST_TIMEOUT && CyaSSL_dtls(ssl) && + CyaSSL_dtls_got_timeout(ssl) >= 0) { + error = SSL_ERROR_WANT_READ; + } +#endif + else { + error = SSL_FATAL_ERROR; + } + } + if (ret != SSL_SUCCESS) + err_sys("SSL_connect failed"); +} + + +static void Usage(void) +{ + printf("client " LIBCYASSL_VERSION_STRING + " NOTE: All files relative to CyaSSL home dir\n"); + printf("-? Help, print this usage\n"); + printf("-h Host to connect to, default %s\n", yasslIP); + printf("-p Port to connect on, not 0, default %d\n", yasslPort); + printf("-v SSL version [0-3], SSLv3(0) - TLS1.2(3)), default %d\n", + CLIENT_DEFAULT_VERSION); + printf("-l Cipher list\n"); + printf("-c Certificate file, default %s\n", cliCert); + printf("-k Key file, default %s\n", cliKey); + printf("-A Certificate Authority file, default %s\n", caCert); + printf("-b Benchmark connections and print stats\n"); + printf("-s Use pre Shared keys\n"); + printf("-t Track CyaSSL memory use\n"); + printf("-d Disable peer checks\n"); + printf("-g Send server HTTP GET\n"); + printf("-u Use UDP DTLS," + " add -v 2 for DTLSv1 (default), -v 3 for DTLSv1.2\n"); + printf("-m Match domain name in cert\n"); + printf("-N Use Non-blocking sockets\n"); + printf("-r Resume session\n"); + printf("-f Fewer packets/group messages\n"); + printf("-x Disable client cert/key loading\n"); +#ifdef SHOW_SIZES + printf("-z Print structure sizes\n"); +#endif + printf("-S Use Host Name Indication\n"); +} + + +THREAD_RETURN CYASSL_THREAD client_test(void* args) +{ + SOCKET_T sockfd = 0; + + CYASSL_METHOD* method = 0; + CYASSL_CTX* ctx = 0; + CYASSL* ssl = 0; + + CYASSL* sslResume = 0; + CYASSL_SESSION* session = 0; + char resumeMsg[] = "resuming cyassl!"; + int resumeSz = sizeof(resumeMsg); + + char msg[32] = "hello cyassl!"; /* GET may make bigger */ + char reply[80]; + int input; + int msgSz = (int)strlen(msg); + + int port = yasslPort; + char* host = (char*)yasslIP; + char* domain = (char*)"www.yassl.com"; + + int ch; + int version = CLIENT_INVALID_VERSION; + int usePsk = 0; + int sendGET = 0; + int benchmark = 0; + int doDTLS = 0; + int matchName = 0; + int doPeerCheck = 1; + int nonBlocking = 0; + int resumeSession = 0; + int trackMemory = 0; + int useClientCert = 1; + int fewerPackets = 0; + char* cipherList = NULL; + char* verifyCert = (char*)caCert; + char* ourCert = (char*)cliCert; + char* ourKey = (char*)cliKey; + +#ifdef HAVE_SNI + char* sniHostName = NULL; +#endif + + int argc = ((func_args*)args)->argc; + char** argv = ((func_args*)args)->argv; + + ((func_args*)args)->return_code = -1; /* error state */ + +#ifdef NO_RSA + verifyCert = (char*)eccCert; + ourCert = (char*)cliEccCert; + ourKey = (char*)cliEccKey; +#endif + (void)resumeSz; + (void)session; + (void)sslResume; + (void)trackMemory; + + while ((ch = mygetopt(argc, argv, "?gdusmNrtfxh:p:v:l:A:c:k:b:zS:")) != -1){ + switch (ch) { + case '?' : + Usage(); + exit(EXIT_SUCCESS); + + case 'g' : + sendGET = 1; + break; + + case 'd' : + doPeerCheck = 0; + break; + + case 'u' : + doDTLS = 1; + break; + + case 's' : + usePsk = 1; + break; + + case 't' : + #ifdef USE_CYASSL_MEMORY + trackMemory = 1; + #endif + break; + + case 'm' : + matchName = 1; + break; + + case 'x' : + useClientCert = 0; + break; + + case 'f' : + fewerPackets = 1; + break; + + case 'h' : + host = myoptarg; + domain = myoptarg; + break; + + case 'p' : + port = atoi(myoptarg); + #if !defined(NO_MAIN_DRIVER) || defined(USE_WINDOWS_API) + if (port == 0) + err_sys("port number cannot be 0"); + #endif + break; + + case 'v' : + version = atoi(myoptarg); + if (version < 0 || version > 3) { + Usage(); + exit(MY_EX_USAGE); + } + break; + + case 'l' : + cipherList = myoptarg; + break; + + case 'A' : + verifyCert = myoptarg; + break; + + case 'c' : + ourCert = myoptarg; + break; + + case 'k' : + ourKey = myoptarg; + break; + + case 'b' : + benchmark = atoi(myoptarg); + if (benchmark < 0 || benchmark > 1000000) { + Usage(); + exit(MY_EX_USAGE); + } + break; + + case 'N' : + nonBlocking = 1; + break; + + case 'r' : + resumeSession = 1; + break; + + case 'z' : + #ifndef CYASSL_LEANPSK + CyaSSL_GetObjectSize(); + #endif + break; + + case 'S' : + #ifdef HAVE_SNI + sniHostName = myoptarg; + #endif + break; + + default: + Usage(); + exit(MY_EX_USAGE); + } + } + + myoptind = 0; /* reset for test cases */ + + /* sort out DTLS versus TLS versions */ + if (version == CLIENT_INVALID_VERSION) { + if (doDTLS) + version = CLIENT_DTLS_DEFAULT_VERSION; + else + version = CLIENT_DEFAULT_VERSION; + } + else { + if (doDTLS) { + if (version == 3) + version = -2; + else + version = -1; + } + } + +#ifdef USE_CYASSL_MEMORY + if (trackMemory) + InitMemoryTracker(); +#endif + + switch (version) { +#ifndef NO_OLD_TLS + case 0: + method = CyaSSLv3_client_method(); + break; + + + #ifndef NO_TLS + case 1: + method = CyaTLSv1_client_method(); + break; + + case 2: + method = CyaTLSv1_1_client_method(); + break; + #endif /* NO_TLS */ + +#endif /* NO_OLD_TLS */ + +#ifndef NO_TLS + case 3: + method = CyaTLSv1_2_client_method(); + break; +#endif + +#ifdef CYASSL_DTLS + case -1: + method = CyaDTLSv1_client_method(); + break; + + case -2: + method = CyaDTLSv1_2_client_method(); + break; +#endif + + default: + err_sys("Bad SSL version"); + break; + } + + if (method == NULL) + err_sys("unable to get method"); + + ctx = CyaSSL_CTX_new(method); + if (ctx == NULL) + err_sys("unable to get ctx"); + + if (cipherList) + if (CyaSSL_CTX_set_cipher_list(ctx, cipherList) != SSL_SUCCESS) + err_sys("client can't set cipher list 1"); + +#ifdef CYASSL_LEANPSK + usePsk = 1; +#endif + +#if defined(NO_RSA) && !defined(HAVE_ECC) + usePsk = 1; +#endif + + if (fewerPackets) + CyaSSL_CTX_set_group_messages(ctx); + + if (usePsk) { +#ifndef NO_PSK + CyaSSL_CTX_set_psk_client_callback(ctx, my_psk_client_cb); + if (cipherList == NULL) { + const char *defaultCipherList; + #ifdef HAVE_NULL_CIPHER + defaultCipherList = "PSK-NULL-SHA256"; + #else + defaultCipherList = "PSK-AES128-CBC-SHA256"; + #endif + if (CyaSSL_CTX_set_cipher_list(ctx,defaultCipherList) !=SSL_SUCCESS) + err_sys("client can't set cipher list 2"); + } +#endif + useClientCert = 0; + } + +#ifdef OPENSSL_EXTRA + CyaSSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack); +#endif + +#if defined(CYASSL_SNIFFER) && !defined(HAVE_NTRU) && !defined(HAVE_ECC) + if (cipherList == NULL) { + /* don't use EDH, can't sniff tmp keys */ + if (CyaSSL_CTX_set_cipher_list(ctx, "AES256-SHA256") != SSL_SUCCESS) { + err_sys("client can't set cipher list 3"); + } + } +#endif + +#ifdef USER_CA_CB + CyaSSL_CTX_SetCACb(ctx, CaCb); +#endif + +#ifdef VERIFY_CALLBACK + CyaSSL_CTX_set_verify(ctx, SSL_VERIFY_PEER, myVerify); +#endif +#if !defined(NO_FILESYSTEM) && !defined(NO_CERTS) + if (useClientCert){ + if (CyaSSL_CTX_use_certificate_chain_file(ctx, ourCert) != SSL_SUCCESS) + err_sys("can't load client cert file, check file and run from" + " CyaSSL home dir"); + + if (CyaSSL_CTX_use_PrivateKey_file(ctx, ourKey, SSL_FILETYPE_PEM) + != SSL_SUCCESS) + err_sys("can't load client private key file, check file and run " + "from CyaSSL home dir"); + } + + if (!usePsk) { + if (CyaSSL_CTX_load_verify_locations(ctx, verifyCert, 0) != SSL_SUCCESS) + err_sys("can't load ca file, Please run from CyaSSL home dir"); + } +#endif +#if !defined(NO_CERTS) + if (!usePsk && doPeerCheck == 0) + CyaSSL_CTX_set_verify(ctx, SSL_VERIFY_NONE, 0); +#endif + +#ifdef HAVE_CAVIUM + CyaSSL_CTX_UseCavium(ctx, CAVIUM_DEV_ID); +#endif + +#ifdef HAVE_SNI + if (sniHostName) + if (CyaSSL_CTX_UseSNI(ctx, 0, sniHostName, XSTRLEN(sniHostName))) + err_sys("UseSNI failed"); +#endif + + if (benchmark) { + /* time passed in number of connects give average */ + int times = benchmark; + int i = 0; + + double start = current_time(), avg; + + for (i = 0; i < times; i++) { + tcp_connect(&sockfd, host, port, doDTLS); + + ssl = CyaSSL_new(ctx); + CyaSSL_set_fd(ssl, sockfd); + if (CyaSSL_connect(ssl) != SSL_SUCCESS) + err_sys("SSL_connect failed"); + + CyaSSL_shutdown(ssl); + CyaSSL_free(ssl); + CloseSocket(sockfd); + } + avg = current_time() - start; + avg /= times; + avg *= 1000; /* milliseconds */ + printf("CyaSSL_connect avg took: %8.3f milliseconds\n", avg); + + CyaSSL_CTX_free(ctx); + ((func_args*)args)->return_code = 0; + + exit(EXIT_SUCCESS); + } + + #if defined(CYASSL_MDK_ARM) + CyaSSL_CTX_set_verify(ctx, SSL_VERIFY_NONE, 0); + #endif + + ssl = CyaSSL_new(ctx); + if (ssl == NULL) + err_sys("unable to get SSL object"); + + CyaSSL_set_quiet_shutdown(ssl, 1) ; + + if (doDTLS) { + SOCKADDR_IN_T addr; + build_addr(&addr, host, port, 1); + CyaSSL_dtls_set_peer(ssl, &addr, sizeof(addr)); + tcp_socket(&sockfd, 1); + } + else { + tcp_connect(&sockfd, host, port, 0); + } + CyaSSL_set_fd(ssl, sockfd); +#ifdef HAVE_CRL + if (CyaSSL_EnableCRL(ssl, CYASSL_CRL_CHECKALL) != SSL_SUCCESS) + err_sys("can't enable crl check"); + if (CyaSSL_LoadCRL(ssl, crlPemDir, SSL_FILETYPE_PEM, 0) != SSL_SUCCESS) + err_sys("can't load crl, check crlfile and date validity"); + if (CyaSSL_SetCRL_Cb(ssl, CRL_CallBack) != SSL_SUCCESS) + err_sys("can't set crl callback"); +#endif + if (matchName && doPeerCheck) + CyaSSL_check_domain_name(ssl, domain); +#ifndef CYASSL_CALLBACKS + if (nonBlocking) { + CyaSSL_set_using_nonblock(ssl, 1); + tcp_set_nonblocking(&sockfd); + NonBlockingSSL_Connect(ssl); + } + else if (CyaSSL_connect(ssl) != SSL_SUCCESS) { + /* see note at top of README */ + int err = CyaSSL_get_error(ssl, 0); + char buffer[80]; + printf("err = %d, %s\n", err, + CyaSSL_ERR_error_string(err, buffer)); + err_sys("SSL_connect failed"); + /* if you're getting an error here */ + } +#else + timeout.tv_sec = 2; + timeout.tv_usec = 0; + NonBlockingSSL_Connect(ssl); /* will keep retrying on timeout */ +#endif + showPeer(ssl); + + if (sendGET) { + printf("SSL connect ok, sending GET...\n"); + msgSz = 28; + strncpy(msg, "GET /index.html HTTP/1.0\r\n\r\n", msgSz); + msg[msgSz] = '\0'; + } + if (CyaSSL_write(ssl, msg, msgSz) != msgSz) + err_sys("SSL_write failed"); + + input = CyaSSL_read(ssl, reply, sizeof(reply)-1); + if (input > 0) { + reply[input] = 0; + printf("Server response: %s", reply); + + if (sendGET && (input == (sizeof(reply)-1))) { /* get html */ + while (1) { + input = CyaSSL_read(ssl, reply, sizeof(reply)-1); + if (input > 0) { + reply[input] = 0; + printf("%s", reply); + if(input < sizeof(reply)-1) + break ; + } + else + break; + } + } + printf("\n"); + } + else if (input < 0) { + int readErr = CyaSSL_get_error(ssl, 0); + if (readErr != SSL_ERROR_WANT_READ) + err_sys("CyaSSL_read failed"); + } + +#ifdef CYASSL_CMSIS_RTOS + osDelay(5000) ; +#endif + +#ifndef NO_SESSION_CACHE + if (resumeSession) { + if (doDTLS) { + strncpy(msg, "break", 6); + msgSz = (int)strlen(msg); + /* try to send session close */ + CyaSSL_write(ssl, msg, msgSz); + } + session = CyaSSL_get_session(ssl); + sslResume = CyaSSL_new(ctx); + } +#endif + + if (doDTLS == 0) /* don't send alert after "break" command */ + CyaSSL_shutdown(ssl); /* echoserver will interpret as new conn */ + CyaSSL_free(ssl); + CloseSocket(sockfd); + +#ifndef NO_SESSION_CACHE + if (resumeSession) { + if (doDTLS) { + SOCKADDR_IN_T addr; + #ifdef USE_WINDOWS_API + Sleep(500); + #else + sleep(1); + #endif + build_addr(&addr, host, port, 1); + CyaSSL_dtls_set_peer(sslResume, &addr, sizeof(addr)); + tcp_socket(&sockfd, 1); + } + else { + tcp_connect(&sockfd, host, port, 0); + } + CyaSSL_set_fd(sslResume, sockfd); + CyaSSL_set_session(sslResume, session); + + showPeer(sslResume); +#ifndef CYASSL_CALLBACKS + if (nonBlocking) { + CyaSSL_set_using_nonblock(sslResume, 1); + tcp_set_nonblocking(&sockfd); + NonBlockingSSL_Connect(sslResume); + } + else if (CyaSSL_connect(sslResume) != SSL_SUCCESS) + err_sys("SSL resume failed"); +#else + timeout.tv_sec = 2; + timeout.tv_usec = 0; + NonBlockingSSL_Connect(ssl); /* will keep retrying on timeout */ +#endif + + if (CyaSSL_session_reused(sslResume)) + printf("reused session id\n"); + else + printf("didn't reuse session id!!!\n"); + + if (CyaSSL_write(sslResume, resumeMsg, resumeSz) != resumeSz) + err_sys("SSL_write failed"); + + if (nonBlocking) { + /* give server a chance to bounce a message back to client */ + #ifdef USE_WINDOWS_API + Sleep(500); + #else + sleep(1); + #endif + } + + input = CyaSSL_read(sslResume, reply, sizeof(reply)-1); + if (input > 0) { + reply[input] = 0; + printf("Server resume response: %s\n", reply); + } + + /* try to send session break */ + CyaSSL_write(sslResume, msg, msgSz); + + CyaSSL_shutdown(sslResume); + CyaSSL_free(sslResume); + CloseSocket(sockfd); + } +#endif /* NO_SESSION_CACHE */ + + CyaSSL_CTX_free(ctx); + + ((func_args*)args)->return_code = 0; + +#ifdef USE_CYASSL_MEMORY + if (trackMemory) + ShowMemoryTracker(); +#endif /* USE_CYASSL_MEMORY */ + + return 0; +} + + +/* so overall tests can pull in test function */ +#ifndef NO_MAIN_DRIVER + + int main(int argc, char** argv) + { + func_args args; + +#ifdef HAVE_CAVIUM + int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID); + if (ret != 0) + err_sys("Cavium OpenNitroxDevice failed"); +#endif /* HAVE_CAVIUM */ + + StartTCP(); + + args.argc = argc; + args.argv = argv; + + CyaSSL_Init(); +#if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL) + CyaSSL_Debugging_ON(); +#endif + if (CurrentDir("client") || CurrentDir("build")) + ChangeDirBack(2); + +#ifdef HAVE_STACK_SIZE + StackSizeCheck(&args, client_test); +#else + client_test(&args); +#endif + CyaSSL_Cleanup(); + +#ifdef HAVE_CAVIUM + CspShutdown(CAVIUM_DEV_ID); +#endif + return args.return_code; + } + + int myoptind = 0; + char* myoptarg = NULL; + +#endif /* NO_MAIN_DRIVER */ + + + +#ifdef CYASSL_CALLBACKS + + int handShakeCB(HandShakeInfo* info) + { + (void)info; + return 0; + } + + + int timeoutCB(TimeoutInfo* info) + { + (void)info; + return 0; + } + +#endif + diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/echoclient.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/echoclient.c new file mode 100644 index 000000000..0d6b2a706 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/echoclient.c @@ -0,0 +1,288 @@ +/* echoclient.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +#include + +#include + +#if defined(CYASSL_MDK_ARM) + #include + #include + + #if defined(CYASSL_MDK5) + #include "cmsis_os.h" + #include "rl_fs.h" + #include "rl_net.h" +// #include "config-EchoClient.h" + #else + #include "rtl.h" + #endif + + #include "cyassl_MDK_ARM.h" +#endif + +#include + +#include "examples/echoclient/echoclient.h" + +void echoclient_test(void* args) +{ + SOCKET_T sockfd = 0; + + FILE* fin = stdin ; + FILE* fout = stdout; + + int inCreated = 0; + int outCreated = 0; + + char msg[1024]; + char reply[1024+1]; + + SSL_METHOD* method = 0; + SSL_CTX* ctx = 0; + SSL* ssl = 0; + + int doDTLS = 0; + int doPSK = 0; + int sendSz; + int argc = 0; + char** argv = 0; + int port = yasslPort; + + ((func_args*)args)->return_code = -1; /* error state */ + +#ifndef CYASSL_MDK_ARM + argc = ((func_args*)args)->argc; + argv = ((func_args*)args)->argv; +#endif + + if (argc >= 2) { + fin = fopen(argv[1], "r"); + inCreated = 1; + } + if (argc >= 3) { + fout = fopen(argv[2], "w"); + outCreated = 1; + } + + if (!fin) err_sys("can't open input file"); + if (!fout) err_sys("can't open output file"); + +#ifdef CYASSL_DTLS + doDTLS = 1; +#endif + +#ifdef CYASSL_LEANPSK + doPSK = 1; +#endif + +#if defined(NO_RSA) && !defined(HAVE_ECC) + doPSK = 1; +#endif + +#if defined(NO_MAIN_DRIVER) && !defined(USE_WINDOWS_API) && !defined(CYASSL_MDK_SHELL) + port = ((func_args*)args)->signal->port; +#endif +#if defined (CYASSL_CALLEE_PORT) + port = CYASSL_CALLEE_PORT ; +#endif + +#if defined(CYASSL_DTLS) + method = DTLSv1_client_method(); +#elif !defined(NO_TLS) + method = CyaSSLv23_client_method(); +#else + method = SSLv3_client_method(); +#endif + ctx = SSL_CTX_new(method); + +#ifndef NO_FILESYSTEM + #ifndef NO_RSA + if (SSL_CTX_load_verify_locations(ctx, caCert, 0) != SSL_SUCCESS) + err_sys("can't load ca file, Please run from CyaSSL home dir"); + #endif + #ifdef HAVE_ECC + if (SSL_CTX_load_verify_locations(ctx, eccCert, 0) != SSL_SUCCESS) + err_sys("can't load ca file, Please run from CyaSSL home dir"); + #endif +#elif !defined(NO_CERTS) + if (!doPSK) + load_buffer(ctx, caCert, CYASSL_CA); +#endif + +#if defined(CYASSL_SNIFFER) && !defined(HAVE_NTRU) && !defined(HAVE_ECC) + /* don't use EDH, can't sniff tmp keys */ + SSL_CTX_set_cipher_list(ctx, "AES256-SHA"); +#endif + if (doPSK) { +#ifndef NO_PSK + const char *defaultCipherList; + + CyaSSL_CTX_set_psk_client_callback(ctx, my_psk_client_cb); + #ifdef HAVE_NULL_CIPHER + defaultCipherList = "PSK-NULL-SHA256"; + #else + defaultCipherList = "PSK-AES128-CBC-SHA256"; + #endif + if (CyaSSL_CTX_set_cipher_list(ctx,defaultCipherList) !=SSL_SUCCESS) + err_sys("client can't set cipher list 2"); +#endif + } + +#ifdef OPENSSL_EXTRA + SSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack); +#endif + + #if defined(CYASSL_MDK_ARM) + CyaSSL_CTX_set_verify(ctx, SSL_VERIFY_NONE, 0); + #endif + + ssl = SSL_new(ctx); + CyaSSL_set_quiet_shutdown(ssl, 1) ; + + if (doDTLS) { + SOCKADDR_IN_T addr; + build_addr(&addr, yasslIP, port, 1); + CyaSSL_dtls_set_peer(ssl, &addr, sizeof(addr)); + tcp_socket(&sockfd, 1); + } + else { + tcp_connect(&sockfd, yasslIP, port, 0); + } + + SSL_set_fd(ssl, sockfd); +#if defined(USE_WINDOWS_API) && defined(CYASSL_DTLS) && defined(NO_MAIN_DRIVER) + /* let echoserver bind first, TODO: add Windows signal like pthreads does */ + Sleep(100); +#endif + + if (SSL_connect(ssl) != SSL_SUCCESS) err_sys("SSL_connect failed"); + + while (fgets(msg, sizeof(msg), fin) != 0) { + + sendSz = (int)strlen(msg); + + if (SSL_write(ssl, msg, sendSz) != sendSz) + err_sys("SSL_write failed"); + + if (strncmp(msg, "quit", 4) == 0) { + fputs("sending server shutdown command: quit!\n", fout); + break; + } + + if (strncmp(msg, "break", 5) == 0) { + fputs("sending server session close: break!\n", fout); + break; + } + + #ifndef CYASSL_MDK_SHELL + while (sendSz) { + int got; + if ( (got = SSL_read(ssl, reply, sizeof(reply)-1)) > 0) { + reply[got] = 0; + fputs(reply, fout); + fflush(fout) ; + sendSz -= got; + } + else + break; + } + #else + { + int got; + if ( (got = SSL_read(ssl, reply, sizeof(reply)-1)) > 0) { + reply[got] = 0; + fputs(reply, fout); + fflush(fout) ; + sendSz -= got; + } + } + #endif + } + +#ifdef CYASSL_CMSIS_RTOS + osDelay(5000) ; +#endif + + +#ifdef CYASSL_DTLS + strncpy(msg, "break", 6); + sendSz = (int)strlen(msg); + /* try to tell server done */ + SSL_write(ssl, msg, sendSz); +#else + SSL_shutdown(ssl); +#endif + + SSL_free(ssl); + SSL_CTX_free(ctx); + + fflush(fout); + if (inCreated) fclose(fin); + if (outCreated) fclose(fout); + + CloseSocket(sockfd); + ((func_args*)args)->return_code = 0; +} + + +/* so overall tests can pull in test function */ +#ifndef NO_MAIN_DRIVER + + int main(int argc, char** argv) + { + func_args args; + +#ifdef HAVE_CAVIUM + int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID); + if (ret != 0) + err_sys("Cavium OpenNitroxDevice failed"); +#endif /* HAVE_CAVIUM */ + + StartTCP(); + + args.argc = argc; + args.argv = argv; + + CyaSSL_Init(); +#if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL) + CyaSSL_Debugging_ON(); +#endif + + if (CurrentDir("echoclient") || CurrentDir("build")) + ChangeDirBack(2); + echoclient_test(&args); + + CyaSSL_Cleanup(); + +#ifdef HAVE_CAVIUM + CspShutdown(CAVIUM_DEV_ID); +#endif + return args.return_code; + } + +#endif /* NO_MAIN_DRIVER */ + + diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/echoserver.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/echoserver.c new file mode 100644 index 000000000..ba8e10f18 --- /dev/null +++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/echoserver.c @@ -0,0 +1,370 @@ +/* echoserver.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +#include + +#if defined(CYASSL_MDK_ARM) + #include + #include + + #if defined(CYASSL_MDK5) + #include "cmsis_os.h" + #include "rl_fs.h" + #include "rl_net.h" + #else + #include "rtl.h" + #endif + + #include "cyassl_MDK_ARM.h" +#endif + +#include +#include + +#ifndef NO_MAIN_DRIVER + #define ECHO_OUT +#endif + +#include "examples/echoserver/echoserver.h" + + +#ifdef SESSION_STATS + CYASSL_API void PrintSessionStats(void); +#endif + +#define SVR_COMMAND_SIZE 256 + +static void SignalReady(void* args, int port) +{ +#if defined(_POSIX_THREADS) && defined(NO_MAIN_DRIVER) && !defined(__MINGW32__) + /* signal ready to tcp_accept */ + func_args* server_args = (func_args*)args; + tcp_ready* ready = server_args->signal; + pthread_mutex_lock(&ready->mutex); + ready->ready = 1; + ready->port = port; + pthread_cond_signal(&ready->cond); + pthread_mutex_unlock(&ready->mutex); +#endif + (void)args; + (void)port; +} + + +THREAD_RETURN CYASSL_THREAD echoserver_test(void* args) +{ + SOCKET_T sockfd = 0; + CYASSL_METHOD* method = 0; + CYASSL_CTX* ctx = 0; + + int doDTLS = 0; + int doPSK = 0; + int outCreated = 0; + int shutDown = 0; + int useAnyAddr = 0; + int port = yasslPort; + int argc = ((func_args*)args)->argc; + char** argv = ((func_args*)args)->argv; + +#ifdef ECHO_OUT + FILE* fout = stdout; + if (argc >= 2) { + fout = fopen(argv[1], "w"); + outCreated = 1; + } + if (!fout) err_sys("can't open output file"); +#endif + (void)outCreated; + (void)argc; + (void)argv; + + ((func_args*)args)->return_code = -1; /* error state */ + +#ifdef CYASSL_DTLS + doDTLS = 1; +#endif + +#ifdef CYASSL_LEANPSK + doPSK = 1; +#endif + +#if defined(NO_RSA) && !defined(HAVE_ECC) + doPSK = 1; +#endif + + #if defined(NO_MAIN_DRIVER) && !defined(USE_WINDOWS_API) && \ + !defined(CYASSL_SNIFFER) && !defined(CYASSL_MDK_ARM) + port = 0; + #endif + #if defined(USE_ANY_ADDR) + useAnyAddr = 1; + #endif + tcp_listen(&sockfd, &port, useAnyAddr, doDTLS); + +#if defined(CYASSL_DTLS) + method = CyaDTLSv1_server_method(); +#elif !defined(NO_TLS) + method = CyaSSLv23_server_method(); +#else + method = CyaSSLv3_server_method(); +#endif + ctx = CyaSSL_CTX_new(method); + /* CyaSSL_CTX_set_session_cache_mode(ctx, SSL_SESS_CACHE_OFF); */ + +#ifdef OPENSSL_EXTRA + CyaSSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack); +#endif + +#ifndef NO_FILESYSTEM + if (doPSK == 0) { + #ifdef HAVE_NTRU + /* ntru */ + if (CyaSSL_CTX_use_certificate_file(ctx, ntruCert, SSL_FILETYPE_PEM) + != SSL_SUCCESS) + err_sys("can't load ntru cert file, " + "Please run from CyaSSL home dir"); + + if (CyaSSL_CTX_use_NTRUPrivateKey_file(ctx, ntruKey) + != SSL_SUCCESS) + err_sys("can't load ntru key file, " + "Please run from CyaSSL home dir"); + #elif defined(HAVE_ECC) + /* ecc */ + if (CyaSSL_CTX_use_certificate_file(ctx, eccCert, SSL_FILETYPE_PEM) + != SSL_SUCCESS) + err_sys("can't load server cert file, " + "Please run from CyaSSL home dir"); + + if (CyaSSL_CTX_use_PrivateKey_file(ctx, eccKey, SSL_FILETYPE_PEM) + != SSL_SUCCESS) + err_sys("can't load server key file, " + "Please run from CyaSSL home dir"); + #elif defined(NO_CERTS) + /* do nothing, just don't load cert files */ + #else + /* normal */ + if (CyaSSL_CTX_use_certificate_file(ctx, svrCert, SSL_FILETYPE_PEM) + != SSL_SUCCESS) + err_sys("can't load server cert file, " + "Please run from CyaSSL home dir"); + + if (CyaSSL_CTX_use_PrivateKey_file(ctx, svrKey, SSL_FILETYPE_PEM) + != SSL_SUCCESS) + err_sys("can't load server key file, " + "Please run from CyaSSL home dir"); + #endif + } /* doPSK */ +#elif !defined(NO_CERTS) + if (!doPSK) { + load_buffer(ctx, svrCert, CYASSL_CERT); + load_buffer(ctx, svrKey, CYASSL_KEY); + } +#endif + +#if defined(CYASSL_SNIFFER) && !defined(HAVE_NTRU) && !defined(HAVE_ECC) + /* don't use EDH, can't sniff tmp keys */ + CyaSSL_CTX_set_cipher_list(ctx, "AES256-SHA"); +#endif + + if (doPSK) { +#ifndef NO_PSK + const char *defaultCipherList; + + CyaSSL_CTX_set_psk_server_callback(ctx, my_psk_server_cb); + CyaSSL_CTX_use_psk_identity_hint(ctx, "cyassl server"); + #ifdef HAVE_NULL_CIPHER + defaultCipherList = "PSK-NULL-SHA256"; + #else + defaultCipherList = "PSK-AES128-CBC-SHA256"; + #endif + if (CyaSSL_CTX_set_cipher_list(ctx, defaultCipherList) != SSL_SUCCESS) + err_sys("server can't set cipher list 2"); +#endif + } + + SignalReady(args, port); + + while (!shutDown) { + CYASSL* ssl = 0; + char command[SVR_COMMAND_SIZE+1]; + int echoSz = 0; + int clientfd; + int firstRead = 1; + int gotFirstG = 0; + +#ifndef CYASSL_DTLS + SOCKADDR_IN_T client; + socklen_t client_len = sizeof(client); + clientfd = accept(sockfd, (struct sockaddr*)&client, + (ACCEPT_THIRD_T)&client_len); +#else + clientfd = udp_read_connect(sockfd); +#endif + if (clientfd == -1) err_sys("tcp accept failed"); + + ssl = CyaSSL_new(ctx); + if (ssl == NULL) err_sys("SSL_new failed"); + CyaSSL_set_quiet_shutdown(ssl, 1) ; + + CyaSSL_set_fd(ssl, clientfd); + #if !defined(NO_FILESYSTEM) && defined(OPENSSL_EXTRA) + CyaSSL_SetTmpDH_file(ssl, dhParam, SSL_FILETYPE_PEM); + #elif !defined(NO_CERTS) + SetDH(ssl); /* will repick suites with DHE, higher than PSK */ + #endif + if (CyaSSL_accept(ssl) != SSL_SUCCESS) { + printf("SSL_accept failed\n"); + CyaSSL_free(ssl); + CloseSocket(clientfd); + continue; + } +#if defined(PEER_INFO) + showPeer(ssl); +#endif + + while ( (echoSz = CyaSSL_read(ssl, command, sizeof(command)-1)) > 0) { + + if (firstRead == 1) { + firstRead = 0; /* browser may send 1 byte 'G' to start */ + if (echoSz == 1 && command[0] == 'G') { + gotFirstG = 1; + continue; + } + } + else if (gotFirstG == 1 && strncmp(command, "ET /", 4) == 0) { + strncpy(command, "GET", 4); + /* fall through to normal GET */ + } + + if ( strncmp(command, "quit", 4) == 0) { + printf("client sent quit command: shutting down!\n"); + shutDown = 1; + break; + } + if ( strncmp(command, "break", 5) == 0) { + printf("client sent break command: closing session!\n"); + break; + } +#ifdef SESSION_STATS + if ( strncmp(command, "printstats", 10) == 0) { + PrintSessionStats(); + break; + } +#endif + if ( strncmp(command, "GET", 3) == 0) { + char type[] = "HTTP/1.0 200 ok\r\nContent-type:" + " text/html\r\n\r\n"; + char header[] = "\n
\n";
+                char body[]   = "greetings from CyaSSL\n";
+                char footer[] = "\r\n\r\n";
+            
+                strncpy(command, type, sizeof(type));
+                echoSz = sizeof(type) - 1;
+
+                strncpy(&command[echoSz], header, sizeof(header));
+                echoSz += (int)sizeof(header) - 1;
+                strncpy(&command[echoSz], body, sizeof(body));
+                echoSz += (int)sizeof(body) - 1;
+                strncpy(&command[echoSz], footer, sizeof(footer));
+                echoSz += (int)sizeof(footer);
+
+                if (CyaSSL_write(ssl, command, echoSz) != echoSz)
+                    err_sys("SSL_write failed");
+                break;
+            }
+            command[echoSz] = 0;
+
+            #ifdef ECHO_OUT
+                fputs(command, fout);
+            #endif
+
+            if (CyaSSL_write(ssl, command, echoSz) != echoSz)
+                err_sys("SSL_write failed");
+        }
+#ifndef CYASSL_DTLS
+        CyaSSL_shutdown(ssl);
+#endif
+        CyaSSL_free(ssl);
+        CloseSocket(clientfd);
+#ifdef CYASSL_DTLS
+        tcp_listen(&sockfd, &port, useAnyAddr, doDTLS);
+        SignalReady(args, port);
+#endif
+    }
+#ifdef CYASSL_CMSIS_RTOS
+    osDelay(5000) ;
+#endif
+    CloseSocket(sockfd);
+    CyaSSL_CTX_free(ctx);
+
+#ifdef ECHO_OUT
+    if (outCreated)
+        fclose(fout);
+#endif
+
+    ((func_args*)args)->return_code = 0;
+    return 0;
+}
+
+
+/* so overall tests can pull in test function */
+#ifndef NO_MAIN_DRIVER
+
+    int main(int argc, char** argv)
+    {
+        func_args args;
+
+#ifdef HAVE_CAVIUM
+        int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID);
+        if (ret != 0)
+            err_sys("Cavium OpenNitroxDevice failed");
+#endif /* HAVE_CAVIUM */
+
+        StartTCP();
+
+        args.argc = argc;
+        args.argv = argv;
+
+        CyaSSL_Init();
+#if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL)
+        CyaSSL_Debugging_ON();
+#endif
+        if (CurrentDir("echoserver") || CurrentDir("build"))
+            ChangeDirBack(2);
+        echoserver_test(&args);
+        CyaSSL_Cleanup();
+
+#ifdef HAVE_CAVIUM
+        CspShutdown(CAVIUM_DEV_ID);
+#endif
+        return args.return_code;
+    }
+
+        
+#endif /* NO_MAIN_DRIVER */
+
+
+
+
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/main.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/main.c
new file mode 100644
index 000000000..8f7bd1fd5
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/main.c
@@ -0,0 +1,94 @@
+/* main.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+ 
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+#include 
+
+#include "cmsis_os.h"
+#include "rl_fs.h" 
+#include "rl_net.h" 
+#include 
+#include "cyassl_MDK_ARM.h"
+#include 
+
+/*-----------------------------------------------------------------------------
+ *        Initialize a Flash Memory Card
+ *----------------------------------------------------------------------------*/
+static void init_filesystem (void) {
+  int32_t retv;
+
+  retv = finit ("M0:");
+  if (retv == 0) {
+    retv = fmount ("M0:");
+    if (retv == 0) {
+      printf ("Drive M0 ready!\n");
+    }
+    else {
+      printf ("Drive M0 mount failed!\n");
+    }
+  }
+  else {
+    printf ("Drive M0 initialization failed!\n");
+  }
+}
+
+/*-----------------------------------------------------------------------------
+ *        TCP/IP tasks
+ *----------------------------------------------------------------------------*/
+void tcp_poll (void const *arg)
+{
+    CYASSL_MSG("TCP polling started.\n") ;
+    while (1) {
+        net_main ();
+        osDelay(1) ;
+    }
+}
+
+extern void shell_main(void * args) ;
+extern void init_time(void) ;
+
+osThreadDef (tcp_poll, osPriorityHigh, 1, 0) ;
+/*-----------------------------------------------------------------------------
+ *       mian entry 
+ *----------------------------------------------------------------------------*/
+int myoptind = 0;
+char* myoptarg = NULL;
+
+int main() 
+{
+    void *arg = NULL ;
+    init_time() ;
+    init_filesystem ();
+    net_initialize() ;
+    osThreadCreate (osThread (tcp_poll), NULL); 
+    osDelay(10000) ;  /* wait for DHCP */
+    #if defined(DEBUG_CYASSL)
+         printf("Turning ON Debug message\n") ;
+         CyaSSL_Debugging_ON() ;
+    #endif
+
+    shell_main(arg) ;   
+
+}
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c
new file mode 100644
index 000000000..8e155f30a
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c
@@ -0,0 +1,561 @@
+/* server.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+
+#if !defined(CYASSL_TRACK_MEMORY) && !defined(NO_MAIN_DRIVER)
+    /* in case memory tracker wants stats */
+    #define CYASSL_TRACK_MEMORY
+#endif
+
+#if defined(CYASSL_MDK_ARM)
+    #include 
+    #include 
+    
+    #if defined(CYASSL_MDK5)
+        #include "cmsis_os.h"
+        #include "rl_fs.h" 
+        #include "rl_net.h" 
+    #else
+        #include "rtl.h"
+    #endif
+    
+    #include "cyassl_MDK_ARM.h"
+#endif
+
+#include 
+
+#ifdef CYASSL_MDK_SHELL
+extern void exit_command(void) ;
+#define exit(code) exit_command() 
+#endif
+
+#include 
+
+#include "examples/server/server.h"
+
+
+#ifdef CYASSL_CALLBACKS
+    int srvHandShakeCB(HandShakeInfo*);
+    int srvTimeoutCB(TimeoutInfo*);
+    Timeval srvTo;
+#endif
+
+static void NonBlockingSSL_Accept(SSL* ssl)
+{
+#ifndef CYASSL_CALLBACKS
+    int ret = SSL_accept(ssl);
+#else
+    int ret = CyaSSL_accept_ex(ssl, srvHandShakeCB, srvTimeoutCB, srvTo);
+#endif
+    int error = SSL_get_error(ssl, 0);
+    SOCKET_T sockfd = (SOCKET_T)CyaSSL_get_fd(ssl);
+    int select_ret;
+
+    while (ret != SSL_SUCCESS && (error == SSL_ERROR_WANT_READ ||
+                                  error == SSL_ERROR_WANT_WRITE)) {
+        int currTimeout = 1;
+
+        if (error == SSL_ERROR_WANT_READ)
+            printf("... server would read block\n");
+        else
+            printf("... server would write block\n");
+
+#ifdef CYASSL_DTLS
+        currTimeout = CyaSSL_dtls_get_current_timeout(ssl);
+#endif
+        select_ret = tcp_select(sockfd, currTimeout);
+
+        if ((select_ret == TEST_RECV_READY) ||
+                                        (select_ret == TEST_ERROR_READY)) {
+            #ifndef CYASSL_CALLBACKS
+                ret = SSL_accept(ssl);
+            #else
+                ret = CyaSSL_accept_ex(ssl,
+                                    srvHandShakeCB, srvTimeoutCB, srvTo);
+            #endif
+            error = SSL_get_error(ssl, 0);
+        }
+        else if (select_ret == TEST_TIMEOUT && !CyaSSL_dtls(ssl)) {
+            error = SSL_ERROR_WANT_READ;
+        }
+#ifdef CYASSL_DTLS
+        else if (select_ret == TEST_TIMEOUT && CyaSSL_dtls(ssl) &&
+                                            CyaSSL_dtls_got_timeout(ssl) >= 0) {
+            error = SSL_ERROR_WANT_READ;
+        }
+#endif
+        else {
+            error = SSL_FATAL_ERROR;
+        }
+    }
+    if (ret != SSL_SUCCESS)
+        err_sys("SSL_accept failed");
+}
+
+
+static void Usage(void)
+{
+    printf("server "    LIBCYASSL_VERSION_STRING
+           " NOTE: All files relative to CyaSSL home dir\n");
+    printf("-?          Help, print this usage\n");
+    printf("-p     Port to listen on, not 0, default %d\n", yasslPort);
+    printf("-v     SSL version [0-3], SSLv3(0) - TLS1.2(3)), default %d\n",
+                                 SERVER_DEFAULT_VERSION);
+    printf("-l     Cipher list\n");
+    printf("-c    Certificate file,           default %s\n", svrCert);
+    printf("-k    Key file,                   default %s\n", svrKey);
+    printf("-A    Certificate Authority file, default %s\n", cliCert);
+    printf("-d          Disable client cert check\n");
+    printf("-b          Bind to any interface instead of localhost only\n");
+    printf("-s          Use pre Shared keys\n");
+    printf("-t          Track CyaSSL memory use\n");
+    printf("-u          Use UDP DTLS,"
+           " add -v 2 for DTLSv1 (default), -v 3 for DTLSv1.2\n");
+    printf("-f          Fewer packets/group messages\n");
+    printf("-N          Use Non-blocking sockets\n");
+    printf("-S     Use Host Name Indication\n");
+}
+
+THREAD_RETURN CYASSL_THREAD server_test(void* args)
+{
+    SOCKET_T sockfd   = 0;
+    SOCKET_T clientfd = 0;
+
+    SSL_METHOD* method = 0;
+    SSL_CTX*    ctx    = 0;
+    SSL*        ssl    = 0;
+
+    char   msg[] = "I hear you fa shizzle!";
+    char   input[80];
+    int    idx;
+    int    ch;
+    int    version = SERVER_DEFAULT_VERSION;
+    int    doCliCertCheck = 1;
+    int    useAnyAddr = 0;
+    int    port = yasslPort;
+    int    usePsk = 0;
+    int    doDTLS = 0;
+    int    useNtruKey   = 0;
+    int    nonBlocking  = 0;
+    int    trackMemory  = 0;
+    int    fewerPackets = 0;
+    char*  cipherList = NULL;
+    char*  verifyCert = (char*)cliCert;
+    char*  ourCert    = (char*)svrCert;
+    char*  ourKey     = (char*)svrKey;
+    int    argc = ((func_args*)args)->argc;
+    char** argv = ((func_args*)args)->argv;
+
+#ifdef HAVE_SNI
+    char*  sniHostName = NULL;
+#endif
+
+    ((func_args*)args)->return_code = -1; /* error state */
+
+#ifdef NO_RSA
+    verifyCert = (char*)cliEccCert;
+    ourCert    = (char*)eccCert;
+    ourKey     = (char*)eccKey;
+#endif
+    (void)trackMemory;
+
+    while ((ch = mygetopt(argc, argv, "?dbstnNufp:v:l:A:c:k:S:")) != -1) {
+        switch (ch) {
+            case '?' :
+                Usage();
+                exit(EXIT_SUCCESS);
+
+            case 'd' :
+                doCliCertCheck = 0;
+                break;
+
+            case 'b' :
+                useAnyAddr = 1;
+                break;
+
+            case 's' :
+                usePsk = 1;
+                break;
+
+            case 't' :
+            #ifdef USE_CYASSL_MEMORY
+                trackMemory = 1;
+            #endif
+                break;
+
+            case 'n' :
+                useNtruKey = 1;
+                break;
+
+            case 'u' :
+                doDTLS  = 1;
+                break;
+
+            case 'f' :
+                fewerPackets = 1;
+                break;
+
+            case 'p' :
+                port = atoi(myoptarg);
+                #if !defined(NO_MAIN_DRIVER) || defined(USE_WINDOWS_API)
+                    if (port == 0)
+                        err_sys("port number cannot be 0");
+                #endif
+                break;
+
+            case 'v' :
+                version = atoi(myoptarg);
+                if (version < 0 || version > 3) {
+                    Usage();
+                    exit(MY_EX_USAGE);
+                }
+                break;
+
+            case 'l' :
+                cipherList = myoptarg;
+                break;
+
+            case 'A' :
+                verifyCert = myoptarg;
+                break;
+
+            case 'c' :
+                ourCert = myoptarg;
+                break;
+
+            case 'k' :
+                ourKey = myoptarg;
+                break;
+
+            case 'N':
+                nonBlocking = 1;
+                break;
+
+            case 'S' :
+                #ifdef HAVE_SNI
+                    sniHostName = myoptarg;
+                #endif
+                break;
+
+            default:
+                Usage();
+                exit(MY_EX_USAGE);
+        }
+    }
+
+    myoptind = 0;      /* reset for test cases */
+
+    /* sort out DTLS versus TLS versions */
+    if (version == CLIENT_INVALID_VERSION) {
+        if (doDTLS)
+            version = CLIENT_DTLS_DEFAULT_VERSION;
+        else
+            version = CLIENT_DEFAULT_VERSION;
+    }
+    else {
+        if (doDTLS) {
+            if (version == 3)
+                version = -2;
+            else
+                version = -1;
+        }
+    }
+
+#ifdef USE_CYASSL_MEMORY
+    if (trackMemory)
+        InitMemoryTracker(); 
+#endif
+
+    switch (version) {
+#ifndef NO_OLD_TLS
+        case 0:
+            method = SSLv3_server_method();
+            break;
+
+    #ifndef NO_TLS
+        case 1:
+            method = TLSv1_server_method();
+            break;
+
+
+        case 2:
+            method = TLSv1_1_server_method();
+            break;
+
+        #endif
+#endif
+
+#ifndef NO_TLS
+        case 3:
+            method = TLSv1_2_server_method();
+            break;
+#endif
+                
+#ifdef CYASSL_DTLS
+        case -1:
+            method = DTLSv1_server_method();
+            break;
+
+        case -2:
+            method = DTLSv1_2_server_method();
+            break;
+#endif
+
+        default:
+            err_sys("Bad SSL version");
+    }
+
+    if (method == NULL)
+        err_sys("unable to get method");
+
+    ctx = SSL_CTX_new(method);
+    if (ctx == NULL)
+        err_sys("unable to get ctx");
+
+    if (cipherList)
+        if (SSL_CTX_set_cipher_list(ctx, cipherList) != SSL_SUCCESS)
+            err_sys("server can't set cipher list 1");
+
+#ifdef CYASSL_LEANPSK
+    usePsk = 1;
+#endif
+
+#if defined(NO_RSA) && !defined(HAVE_ECC)
+    usePsk = 1;
+#endif
+
+    if (fewerPackets)
+        CyaSSL_CTX_set_group_messages(ctx);
+
+#if !defined(NO_FILESYSTEM) && !defined(NO_CERTS)
+    if (!usePsk) {
+        if (SSL_CTX_use_certificate_file(ctx, ourCert, SSL_FILETYPE_PEM)
+                                         != SSL_SUCCESS)
+            err_sys("can't load server cert file, check file and run from"
+                    " CyaSSL home dir");
+    }
+#endif
+
+#ifdef HAVE_NTRU
+    if (useNtruKey) {
+        if (CyaSSL_CTX_use_NTRUPrivateKey_file(ctx, ourKey)
+                                               != SSL_SUCCESS)
+            err_sys("can't load ntru key file, "
+                    "Please run from CyaSSL home dir");
+    }
+#endif
+
+#if !defined(NO_FILESYSTEM) && !defined(NO_CERTS)
+    if (!useNtruKey && !usePsk) {
+        if (SSL_CTX_use_PrivateKey_file(ctx, ourKey, SSL_FILETYPE_PEM)
+                                         != SSL_SUCCESS)
+            err_sys("can't load server cert file, check file and run from"
+                " CyaSSL home dir");
+    }
+#endif
+
+    if (usePsk) {
+#ifndef NO_PSK
+        SSL_CTX_set_psk_server_callback(ctx, my_psk_server_cb);
+        SSL_CTX_use_psk_identity_hint(ctx, "cyassl server");
+        if (cipherList == NULL) {
+            const char *defaultCipherList;
+            #ifdef HAVE_NULL_CIPHER
+                defaultCipherList = "PSK-NULL-SHA256";
+            #else
+                defaultCipherList = "PSK-AES128-CBC-SHA256";
+            #endif
+            if (SSL_CTX_set_cipher_list(ctx, defaultCipherList) != SSL_SUCCESS)
+                err_sys("server can't set cipher list 2");
+        }
+#endif
+    }
+
+#if !defined(NO_FILESYSTEM) && !defined(NO_CERTS)
+    /* if not using PSK, verify peer with certs */
+    if (doCliCertCheck && usePsk == 0) {
+        SSL_CTX_set_verify(ctx, SSL_VERIFY_PEER |
+                                SSL_VERIFY_FAIL_IF_NO_PEER_CERT,0);
+        if (SSL_CTX_load_verify_locations(ctx, verifyCert, 0) != SSL_SUCCESS)
+            err_sys("can't load ca file, Please run from CyaSSL home dir");
+    }
+#endif
+
+#ifdef OPENSSL_EXTRA
+    SSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack);
+#endif
+
+#if defined(CYASSL_SNIFFER) && !defined(HAVE_NTRU) && !defined(HAVE_ECC)
+    /* don't use EDH, can't sniff tmp keys */
+    if (cipherList == NULL) {
+        if (SSL_CTX_set_cipher_list(ctx, "AES256-SHA256") != SSL_SUCCESS)
+            err_sys("server can't set cipher list 3");
+    }
+#endif
+
+#ifdef HAVE_SNI
+    if (sniHostName) {
+        if (CyaSSL_CTX_UseSNI(ctx, CYASSL_SNI_HOST_NAME, sniHostName,
+                                                          XSTRLEN(sniHostName)))
+            err_sys("UseSNI failed");
+        else
+            CyaSSL_CTX_SNI_SetOptions(ctx, CYASSL_SNI_HOST_NAME,
+                                                  CYASSL_SNI_ABORT_ON_MISMATCH);
+    }
+#endif
+
+    ssl = SSL_new(ctx);
+    if (ssl == NULL)
+        err_sys("unable to get SSL");
+    CyaSSL_set_quiet_shutdown(ssl, 1) ;
+#ifdef HAVE_CRL
+    CyaSSL_EnableCRL(ssl, 0);
+    CyaSSL_LoadCRL(ssl, crlPemDir, SSL_FILETYPE_PEM, CYASSL_CRL_MONITOR |
+                                                     CYASSL_CRL_START_MON);
+    CyaSSL_SetCRL_Cb(ssl, CRL_CallBack);
+#endif
+        osDelay(5000) ;
+    tcp_accept(&sockfd, &clientfd, (func_args*)args, port, useAnyAddr, doDTLS);
+    if (!doDTLS) 
+        CloseSocket(sockfd);
+
+    SSL_set_fd(ssl, clientfd);
+    if (usePsk == 0) {
+        #if !defined(NO_FILESYSTEM) && defined(OPENSSL_EXTRA)
+            CyaSSL_SetTmpDH_file(ssl, dhParam, SSL_FILETYPE_PEM);
+        #elif !defined(NO_CERTS)
+            SetDH(ssl);  /* repick suites with DHE, higher priority than PSK */
+        #endif
+    }
+        osDelay(5000) ;
+#ifndef CYASSL_CALLBACKS
+    if (nonBlocking) {
+        CyaSSL_set_using_nonblock(ssl, 1);
+        tcp_set_nonblocking(&clientfd);
+        NonBlockingSSL_Accept(ssl);
+    } else if (SSL_accept(ssl) != SSL_SUCCESS) {
+        int err = SSL_get_error(ssl, 0);
+        char buffer[80];
+        printf("error = %d, %s\n", err, ERR_error_string(err, buffer));
+        err_sys("SSL_accept failed");
+    }
+#else
+    NonBlockingSSL_Accept(ssl);
+#endif
+    showPeer(ssl);
+        osDelay(5000) ;
+    idx = SSL_read(ssl, input, sizeof(input)-1);
+    if (idx > 0) {
+        input[idx] = 0;
+        printf("Client message: %s\n", input);
+
+    }
+    else if (idx < 0) {
+        int readErr = SSL_get_error(ssl, 0);
+        if (readErr != SSL_ERROR_WANT_READ)
+            err_sys("SSL_read failed");
+    }
+
+    if (SSL_write(ssl, msg, sizeof(msg)) != sizeof(msg))
+        err_sys("SSL_write failed");
+        
+    SSL_shutdown(ssl);
+    SSL_free(ssl);
+    SSL_CTX_free(ctx);
+    
+    CloseSocket(clientfd);
+    ((func_args*)args)->return_code = 0;
+
+#ifdef USE_CYASSL_MEMORY
+    if (trackMemory)
+        ShowMemoryTracker();
+#endif /* USE_CYASSL_MEMORY */
+
+    return 0;
+}
+
+
+/* so overall tests can pull in test function */
+#ifndef NO_MAIN_DRIVER
+
+    int main(int argc, char** argv)
+    {
+        func_args args;
+
+#ifdef HAVE_CAVIUM
+        int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID);
+        if (ret != 0)
+            err_sys("Cavium OpenNitroxDevice failed");
+#endif /* HAVE_CAVIUM */
+
+        StartTCP();
+
+        args.argc = argc;
+        args.argv = argv;
+
+        CyaSSL_Init();
+#if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL)
+        CyaSSL_Debugging_ON();
+#endif
+        if (CurrentDir("server") || CurrentDir("build"))
+            ChangeDirBack(2);
+   
+#ifdef HAVE_STACK_SIZE
+        StackSizeCheck(&args, server_test);
+#else 
+        server_test(&args);
+#endif
+        CyaSSL_Cleanup();
+
+#ifdef HAVE_CAVIUM
+        CspShutdown(CAVIUM_DEV_ID);
+#endif
+        return args.return_code;
+    }
+
+    int myoptind = 0;
+    char* myoptarg = NULL;
+
+#endif /* NO_MAIN_DRIVER */
+
+
+#ifdef CYASSL_CALLBACKS
+
+    int srvHandShakeCB(HandShakeInfo* info)
+    {
+        (void)info;
+        return 0;
+    }
+
+
+    int srvTimeoutCB(TimeoutInfo* info)
+    {
+        (void)info;
+        return 0;
+    }
+
+#endif
+
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/shell.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/shell.c
new file mode 100644
index 000000000..9e8e484f0
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/shell.c
@@ -0,0 +1,662 @@
+/*shell.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+ 
+ /*** tiny Shell for CyaSSL apps ***/
+ 
+ #ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include "cyassl/internal.h"
+#undef RNG
+#include 
+
+#if defined(CYASSL_MDK_ARM)
+    #include 
+    #include 
+    #include 
+        #if defined(CYASSL_MDK5)
+            #include "cmsis_os.h"
+        #include "rl_fs.h" 
+    #else
+            #include 
+        #endif
+    #include "cyassl_MDK_ARM.h"
+#endif
+
+#ifdef CYASSL_KEIL_NET
+#include "cyassl/test.h"
+#else
+typedef struct func_args {
+    int    argc;
+    char** argv;
+    int    return_code;
+} func_args;
+#endif
+
+#ifdef NO_ECHOCLIENT
+#define echoclient_test command_not_found
+#endif
+#ifdef NO_ECHOSERVER
+#define echoserver_test command_not_found
+#endif
+#ifdef NO_SIMPLE_CLIENT
+#define client_test command_not_found
+#endif
+#ifdef NO_SIMPLE_SERVER
+#define server_test command_not_found
+#endif
+#ifdef NO_CRYPT_BENCHMARK
+#define benchmark_test command_not_found
+#endif
+#ifdef NO_CRYPT_TEST
+#define ctaocrypt_test command_not_found
+#endif
+
+#ifndef CYASSL_KEIL_NET
+#define ipaddr_comm command_not_found
+#endif
+
+#if !defined(HAVE_KEIL_RTX)
+#define stack_comm command_not_found
+#endif
+
+
+#if !defined(DEBUG_CYASSL)
+#define dbg_comm command_not_found
+#endif
+
+
+void command_not_found(void *argv) {
+        printf("Command not found\n") ;
+}
+
+extern void echoclient_test(void *args) ;
+extern void echoserver_test(void *args) ;
+extern void benchmark_test(void *args) ;
+extern void ctaocrypt_test(void *args) ;
+extern void client_test(void *args) ;
+extern void server_test(void *args) ;
+extern void kill_task(void *args) ;
+extern void time_main(void *args) ;
+extern void ipaddr_comm(void *args) ;
+extern void stack_comm(void *args) ;
+extern void for_command(void *args) ;
+extern void dbg_comm(void *arg) ;
+extern void help_comm(void *arg) ;
+
+#if !defined(NO_CRYPT_TEST)
+
+#ifndef NO_MD5
+extern void md5_test(void *arg) ;
+#endif
+#ifdef CYASSL_MD2
+extern void md2_test(void *arg) ;
+#endif
+#ifndef NO_MD4
+extern void md4_test(void *arg) ;
+#endif
+
+extern void sha_test(void *arg) ;
+
+#ifndef NO_SHA256
+extern void sha256_test(void *arg) ;
+#endif
+#ifdef CYASSL_SHA384
+extern void sha384_test(void *arg) ;
+#endif
+
+#ifdef CYASSL_SHA512
+extern void sha512_test(void *arg) ;
+#endif
+
+#ifdef CYASSL_RIPEMD
+extern void ripemd_test(void *arg) ;
+#endif
+#ifndef NO_HMAC
+    #ifndef NO_MD5
+extern void hmac_md5_test(void *arg) ;
+    #endif
+extern void hmac_sha_test(void *arg) ;
+
+    #ifndef NO_SHA256
+extern void hmac_sha256_test(void *arg) ;
+    #endif
+
+    #ifdef CYASSL_SHA384
+extern void hmac_sha384_test(void *arg) ;
+    #endif
+#endif
+#ifndef NO_RC4
+extern void arc4_test(void *arg) ;
+#endif
+
+#ifndef NO_HC128
+extern void hc128_test(void *arg) ;
+#endif
+
+#ifndef NO_RABBIT
+extern void rabbit_test(void *arg) ;
+#endif
+
+#ifndef NO_DES3
+extern void des_test(void *arg) ;
+extern void des3_test(void *arg) ;
+#endif
+
+#ifndef NO_AES
+extern void aes_test(void *arg) ;
+#ifdef HAVE_AESGCM
+extern void aesgcm_test(void *arg) ;
+#endif
+
+#ifdef HAVE_AESCCM
+extern void aesccm_test(void *arg) ;
+#endif
+#endif
+
+#ifdef HAVE_CAMELLIA
+extern void camellia_test(void *arg) ;
+#endif
+extern void random_test(void *arg) ;
+
+#ifndef NO_RSA
+extern void rsa_test(void *arg) ;
+#endif
+
+#ifndef NO_DH
+extern void dh_test(void *arg) ;
+#endif
+
+#ifndef NO_DSA
+extern void dsa_test(void *arg) ;
+#endif
+    
+#ifndef NO_PWDBASED
+extern void pwdbased_test(void *arg) ;
+#endif
+
+#ifdef OPENSSL_EXTRA
+extern void openssl_test(void *arg) ;
+#endif
+
+#ifdef HAVE_ECC
+extern void ecc_test(void *arg) ;
+#endif
+
+#endif /* NO_CRYPT_TEST */
+
+static struct {
+  const char *command ;
+    void (*func)(void *args) ;
+}   commandTable[] = {
+    "echoclient", echoclient_test,
+    "echoserver", echoserver_test,
+    "benchmark", benchmark_test,
+    "test", ctaocrypt_test,
+    "client", client_test,
+    "server", server_test,
+    "time", time_main,          /* get/set RTC:  [-d mm/dd/yyyy] [-t hh:mm:ss]*/
+    "ipaddr", ipaddr_comm,      /* TBD */
+    "stack", stack_comm,        /* On/Off check stack size */
+    "for", for_command,         /* iterate next command X times */
+    "debug", dbg_comm,          /* On/Off debug message  */
+    "help", help_comm,          /* Breif description about the commands */
+
+    /** short name **/
+    "ec", echoclient_test,
+    "es", echoserver_test,
+    "bm", benchmark_test,
+    "te", ctaocrypt_test,
+    "cl", client_test,
+    "sv", server_test,
+    "ip", ipaddr_comm,
+    "st", stack_comm,
+  "dbg", dbg_comm,
+    "?",    help_comm,
+
+/*** test suites ****/
+#if !defined(NO_CRYPT_TEST)
+#ifndef NO_MD5
+  "md5",  md5_test,
+#endif
+#ifdef CYASSL_MD2
+  "md2",  md2_test,
+#endif
+#ifndef NO_MD4
+  "md4",  md4_test,
+#endif
+  "sha",  sha_test,
+#ifndef NO_SHA256
+  "sha256",  sha256_test,
+#endif
+#ifdef CYASSL_SHA384
+  "sha384",  sha384_test,
+#endif
+#ifdef CYASSL_SHA512
+  "sha512",  sha512_test,
+#endif
+#ifdef CYASSL_RIPEMD
+  "ripemd",  ripemd_test,
+#endif
+#ifndef NO_HMAC
+  #ifndef NO_MD5
+  "hmac_md5",  hmac_md5_test,
+    #endif
+  "hmac_sha",  hmac_sha_test,
+    #ifndef NO_SHA256
+  "hmac_sha256",  hmac_sha256_test,
+    #endif
+    #ifdef CYASSL_SHA384
+  "hmac_sha384",  hmac_sha384_test,
+  #endif
+#endif
+#ifndef NO_RC4
+    "arc4",  arc4_test,
+#endif
+#ifndef NO_HC128
+  "hc128",  hc128_test,
+#endif
+#ifndef NO_RABBIT
+  "rabbit",  rabbit_test,
+#endif
+#ifndef NO_DES3
+  "des",  des_test,
+  "des3",  des3_test,
+#endif  
+#ifndef NO_AES  
+  "aes",  aes_test,
+    #ifdef HAVE_AESGCM
+  "aesgcm",  aesgcm_test,
+    #endif
+    #ifdef HAVE_AESCCM
+  "aesccm",  aesccm_test,
+    #endif
+#endif
+
+#ifdef HAVE_CAMELLIA
+  "camellia",  camellia_test,
+#endif
+  "random",  random_test,
+#ifndef NO_RSA
+  "rsa",  rsa_test,
+#endif
+#ifndef NO_DH
+  "dh",  dh_test,
+#endif
+#ifndef NO_DSA
+    "dsa",  dsa_test,
+#endif 
+#ifndef NO_PWDBASED
+  "pwdbased",  pwdbased_test,
+#endif  
+#ifdef OPENSSL_EXTRA
+  "openssl",  openssl_test,
+#endif
+#ifdef HAVE_ECC
+  "ecc",  ecc_test,
+#endif
+
+#endif /* NO_CRYPT_TEST */
+
+    "",  NULL
+} ;
+
+enum jobtype { FORGROUND, BACKGROUND }  ;
+
+#define IF_DELIMITER(ch) ((ch) == ' ' || (ch) == '\n')
+
+static int BackGround = 0 ; /* 1: background job is running */
+
+/*******  Get Command Line *****************************/
+static int getline(char * line, int sz, func_args *args, int*bf_flg) 
+{
+    char * ret ;
+    int i ;
+    
+    #define MAXARGS 10
+    #define MAXARGLEN 30
+    static char *argv[MAXARGS] ;
+    args->argv = argv ;
+    
+    putchar('>') ;
+    fflush(stdout) ;
+    ret = fgets(line, sz, stdin) ;
+    
+    #define SHELL_ERROR_FGETS -102
+    if(ret != line) return(SHELL_ERROR_FGETS) ;
+    
+    if(line[strlen(line)-2] == '&') {
+        (*bf_flg) = BACKGROUND ;
+        line[strlen(line)-2] = '\n' ;
+    } else {
+        (*bf_flg) = FORGROUND ;
+    }
+    args->argc = 0 ;
+    for(i=0; iargv[args->argc] = &(line[i]) ;
+        while(!IF_DELIMITER(line[i])) i++ ;
+        args->argc++ ;
+        if(line[i] == '\n') {
+            line[i]  = '\0' ;
+            break ;
+        } else {
+            line[i]  = '\0' ;
+        }
+    }
+    return i ;
+}
+
+
+/************* Embedded Shell Commands **********************************/
+#define IP_SIZE 16
+
+#ifdef CYASSL_KEIL_NET
+static void ipaddr_comm(void *args) 
+{
+    if(((func_args *)args)->argc == 1) {
+            printf("IP addr: %s, port %d\n", yasslIP, yasslPort) ;
+    } else {
+        if(BackGround != 0) {
+        printf("Cannot change IP addr while background server is running\n") ;
+        } else if(((func_args *)args)->argc == 3 && 
+                  ((func_args *)args)->argv[1][0] == '-'&& 
+                  ((func_args *)args)->argv[1][1] == 'a' ) {
+/*          strcpy(yasslIP, ((func_args *)args)->argv[2]) ; */
+        } else if(((func_args *)args)->argc == 3 && 
+                  ((func_args *)args)->argv[1][0] == '-' && 
+                  ((func_args *)args)->argv[1][1] == 'p' ) {
+/*          yasslPort = atoi(((func_args *)args)->argv[2]) ; */
+        } else printf("Invalid argument\n") ; 
+    }
+}
+
+#endif
+
+
+
+#if defined(HAVE_KEIL_RTX)
+static int stack_ck = 0 ;
+
+void stack_comm(void *args) 
+{
+    if(stack_ck) {
+        printf("Stack Check: Off\n") ;
+        stack_ck = 0 ;
+    } else {
+        printf("Stack Check: On\n") ;
+        stack_ck = 1 ;
+    }
+}
+    
+#define FILL_PATTERN 0xa596695a
+void stack_fill(char * stack, int size)
+{
+    int i ;
+
+    if(stack_ck == 0)return ;
+    for(i=1; iargc == 1) {
+        printf("For %d times\n", for_iteration) ;
+    } else if( args == NULL || ((func_args *)args)->argc == 2) {
+        for_iteration = atoi(((func_args *)args)->argv[1]) ;
+    } else printf("Invalid argument\n") ;
+}
+
+
+#if defined(DEBUG_CYASSL)
+
+static int CyasslDebug = 1 ;
+
+static void dbg_comm(void *args) 
+{
+    if(CyasslDebug == 1) {
+        CyasslDebug = 0 ;
+        printf("Turning OFF Debug message\n") ;
+        CyaSSL_Debugging_OFF() ;
+    } else {
+        CyasslDebug = 1 ;
+        printf("Turning ON Debug message\n") ;
+        CyaSSL_Debugging_ON() ;
+    }
+}
+#endif
+
+static void help_comm(void *args) 
+{
+    static char *commands[] = {
+        "time [-d mm/dd/yyyy][-t hh:mm:ss]  : set/get time, for cert validation",
+        "test", 
+        "benchmark",
+        "echoserver&            : simple echo server in background mode",
+        "echoclient             : simple echo client followed by any input string, or \"quit\", \"break\"",
+        "server&                : simple server in background mode",
+        "client                 : simple client",
+        "client -g -v [0123] -h xxx.xxx.xxx.xxx -p 443  : usage example",
+        "server/client -h        :  help for server/client command",
+        "help",
+        ""  
+    } ;
+
+    int i ;
+    printf("Commands:\n") ;
+    for(i=0; commands[i][0] ; i++)
+        printf("    %s\n", commands[i]) ;
+
+}
+
+
+
+#define BG_JOB_STACK_SIZE 8000
+#if (!defined(NO_SIMPLE_SERVER) && !defined(NO_ECHOSERVER)) && \
+                                                   defined(HAVE_KEIL_RTX)
+#if !defined(CYASSL_CMSIS_RTOS)
+static char bg_job_stack[BG_JOB_STACK_SIZE] ;
+#endif
+
+#endif
+
+#define COMMAND_STACK_SIZE 10000
+#if defined(HAVE_KEIL_RTX) && !defined(CYASSL_CMSIS_RTOS)
+static char command_stack[COMMAND_STACK_SIZE] ;
+#endif
+
+
+#ifdef  HAVE_KEIL_RTX
+static   CyaSSL_Mutex command_mutex ;
+#endif
+
+void exit_command(void) {
+	  printf("Command Aborted\n") ;
+    #ifdef CYASSL_CMSIS_RTOS
+        osThreadTerminate(osThreadGetId()) ;
+    #else
+        os_tsk_delete_self() ;
+    #endif
+}
+
+
+/***********    Invoke Forground Command  *********************/
+static void command_invoke(void const *args) 
+{
+    void (*func)(void const * ) ;
+    int i,iteration ;
+    
+    func = (void(*)(void const *))((func_args *)args)->argv[0] ; 
+    #ifdef  HAVE_KEIL_RTX
+    LockMutex((CyaSSL_Mutex *)&command_mutex) ;
+    #endif
+    iteration = for_iteration ;
+    for(i=0; i< iteration; i++) {
+        if(iteration > 1) printf("--- Start for %d ---->\n", i) ;
+        #if defined(HAVE_KEIL_RTX) && !defined(CYASSL_CMSIS_RTOS)
+        stack_fill(command_stack, COMMAND_STACK_SIZE) ;
+        #endif
+                
+        func(args) ;        /* invoke command */
+                
+        #if defined(HAVE_KEIL_RTX)&& !defined(CYASSL_CMSIS_RTOS)
+        stack_check(command_stack, COMMAND_STACK_SIZE) ;
+        #endif
+    }
+
+    if(iteration > 1) 
+    for_iteration = 1 ;
+    osDelay(20000) ;
+    #ifdef HAVE_KEIL_RTX
+        UnLockMutex((CyaSSL_Mutex *)&command_mutex) ;
+        #ifdef CYASSL_CMSIS_RTOS
+            osThreadTerminate(osThreadGetId()) ;
+        #else
+            os_tsk_delete_self() ;
+        #endif
+    #endif
+}
+
+#if defined(HAVE_KEIL_RTX)
+/*******  Invoke Background Job   *******************************/
+static void bg_job_invoke(void const *args) 
+{
+    void (*func)(void const * ) ;
+    BackGround = 1 ; 
+    #if defined(HAVE_KEIL_RTX)&& !defined(CYASSL_CMSIS_RTOS)
+    stack_fill(bg_job_stack, BG_JOB_STACK_SIZE) ;
+    #endif
+
+    func = (void(*)(void const *))((func_args *)args)->argv[0] ; 
+    func(args) ;        /* invoke command */
+    #if defined(HAVE_KEIL_RTX) && !defined(CYASSL_CMSIS_RTOS)
+    stack_check(bg_job_stack, BG_JOB_STACK_SIZE) ;
+    #endif
+    
+    osDelay(20000) ;
+    BackGround = 0 ;
+
+    #ifdef CYASSL_CMSIS_RTOS
+        osThreadTerminate(osThreadGetId()) ;
+    #else   
+        os_tsk_delete_self() ; ;
+    #endif
+}
+#endif
+
+#define LINESIZE 100
+static char line[LINESIZE] ;
+
+#if defined(CYASSL_CMSIS_RTOS)
+    osThreadDef (command_invoke, osPriorityAboveNormal , 1, COMMAND_STACK_SIZE) ;
+    osThreadDef (bg_job_invoke, osPriorityNormal , 1 , BG_JOB_STACK_SIZE) ;
+#endif
+/********* SHEULL MAIN LOOP ***********************************/
+void shell_main(void *arg) {
+    int i ; 
+    func_args args ;
+    int bf_flg ;
+   
+    i = BackGround ; 
+        /* Dummy for avoiding warning: BackGround is defined but not used. */
+    
+ #if defined(HAVE_KEIL_RTX)
+    InitMutex(&command_mutex) ;
+#endif
+    time_main(NULL) ;
+    help_comm(NULL) ;
+    
+    printf("Starting Shell\n") ;
+    while(1) {
+              //while(1) ;
+        if(getline(line,  LINESIZE, &args, &bf_flg) > 0) {
+        for(i=0; commandTable[i].func != NULL; i++) {
+            if(strcmp(commandTable[i].command, args.argv[0]) == 0) {
+            args.argv[0] = (char *) commandTable[i].func ;
+                if(bf_flg == FORGROUND) {
+                    #if defined(HAVE_KEIL_RTX) && !defined(CYASSL_CMSIS_RTOS)
+                        UnLockMutex((CyaSSL_Mutex *)&command_mutex) ;
+                        os_tsk_create_user_ex( (void(*)(void *))&command_invoke, 7,
+                             command_stack, COMMAND_STACK_SIZE, &args) ;
+                                      #else
+                                            #if defined(CYASSL_CMSIS_RTOS)
+                                UnLockMutex((CyaSSL_Mutex *)&command_mutex) ;
+                          osThreadCreate (osThread (command_invoke) , &args);   
+                          #else
+                          command_invoke(&args) ;
+                                            #endif
+                    #endif
+                    #ifdef  HAVE_KEIL_RTX
+                    LockMutex((CyaSSL_Mutex *)&command_mutex) ;
+                    #endif
+                } else {
+                    #if (!defined(NO_SIMPLE_SERVER) && \
+                         !defined(NO_ECHOSERVER)) && \
+                         defined(HAVE_KEIL_RTX)
+                    if(BackGround != 0) {
+                        printf("Multiple background servers not supported.\n") ;
+                    } else {
+                        printf("\"%s\" is running with the background mode.\n", 
+                                                     commandTable[i].command) ;
+                        #if  defined(HAVE_KEIL_RTX) && !defined(CYASSL_CMSIS_RTOS)
+                             os_tsk_create_user_ex( (void(*)(void *))&bg_job_invoke, 
+                                   6, bg_job_stack, BG_JOB_STACK_SIZE, &args) ;
+                        #else
+                                osThreadCreate (osThread (bg_job_invoke),  &args); 
+                                osDelay (500) ;
+                        #endif
+                    }
+                    #else
+                    printf("Invalid Command: no background job\n") ;
+                    #endif
+                }
+                break ;
+            }
+        }
+        if(commandTable[i].func == NULL)
+            printf("Command not found\n") ;
+        }
+    }
+}
+
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c
new file mode 100644
index 000000000..6165cee31
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c
@@ -0,0 +1,3391 @@
+/* test.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+
+#ifndef NO_CRYPT_TEST
+
+#ifdef CYASSL_TEST_CERT
+    #include 
+#else
+    #include 
+#endif
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#ifdef HAVE_ECC
+    #include 
+#endif    
+#ifdef HAVE_BLAKE2
+    #include 
+#endif    
+#ifdef HAVE_LIBZ
+    #include 
+#endif
+
+#ifdef _MSC_VER
+    /* 4996 warning to use MS extensions e.g., strcpy_s instead of strncpy */
+    #pragma warning(disable: 4996)
+#endif
+
+#ifdef OPENSSL_EXTRA
+    #include 
+    #include 
+    #include 
+    #include 
+#endif
+
+#if defined(CYASSL_MDK_ARM)
+        #include 
+        #include 
+    extern FILE * CyaSSL_fopen(const char *fname, const char *mode) ;
+    #define fopen CyaSSL_fopen
+#endif
+
+#if defined(USE_CERT_BUFFERS_1024) || defined(USE_CERT_BUFFERS_2048)
+    /* include test cert and key buffers for use with NO_FILESYSTEM */
+    #if defined(CYASSL_MDK_ARM) && !defined(SINGLE_THREADED)
+        #include "cert_data.h" 
+                        /* use certs_test.c for initial data, so other 
+                                               commands can share the data. */
+    #else
+        #include 
+    #endif
+#endif
+
+#ifdef HAVE_NTRU
+    #include "crypto_ntru.h"
+#endif
+#ifdef HAVE_CAVIUM
+    #include "cavium_sysdep.h"
+    #include "cavium_common.h"
+    #include "cavium_ioctl.h"
+#endif
+
+#ifdef FREESCALE_MQX
+    #include 
+    #include 
+#else
+    #include 
+#endif
+
+
+#ifdef THREADX
+    /* since just testing, use THREADX log printf instead */
+    int dc_log_printf(char*, ...);
+        #undef printf
+        #define printf dc_log_printf
+#endif
+
+#include "ctaocrypt/test/test.h"
+
+
+typedef struct testVector {
+    const char*  input;
+    const char*  output; 
+    size_t inLen;
+    size_t outLen;
+} testVector;
+
+int  md2_test(void);
+int  md5_test(void);
+int  md4_test(void);
+int  sha_test(void);
+int  sha256_test(void);
+int  sha512_test(void);
+int  sha384_test(void);
+int  hmac_md5_test(void);
+int  hmac_sha_test(void);
+int  hmac_sha256_test(void);
+int  hmac_sha384_test(void);
+int  hmac_sha512_test(void);
+int  arc4_test(void);
+int  hc128_test(void);
+int  rabbit_test(void);
+int  des_test(void);
+int  des3_test(void);
+int  aes_test(void);
+int  aesgcm_test(void);
+int  aesccm_test(void);
+int  camellia_test(void);
+int  rsa_test(void);
+int  dh_test(void);
+int  dsa_test(void);
+int  random_test(void);
+int  pwdbased_test(void);
+int  ripemd_test(void);
+int  openssl_test(void);   /* test mini api */
+int pbkdf1_test(void);
+int pkcs12_test(void);
+int pbkdf2_test(void);
+#ifdef HAVE_ECC
+    int  ecc_test(void);
+#endif
+#ifdef HAVE_BLAKE2
+    int  blake2b_test(void);
+#endif
+#ifdef HAVE_LIBZ
+    int compress_test(void);
+#endif
+
+
+
+static void err_sys(const char* msg, int es)
+{
+    printf("%s error = %d\n", msg, es);
+    #if !defined(THREADX) && !defined(CYASSL_MDK_ARM)
+    if (msg)
+        exit(es);
+    #endif
+    return;
+}
+
+/* func_args from test.h, so don't have to pull in other junk */
+typedef struct func_args {
+    int    argc;
+    char** argv;
+    int    return_code;
+} func_args;
+
+
+
+void ctaocrypt_test(void* args)
+{
+    int ret = 0;
+
+    ((func_args*)args)->return_code = -1; /* error state */
+
+#if !defined(NO_BIG_INT)
+    if (CheckCtcSettings() != 1)
+        err_sys("Build vs runtime math mismatch\n", -1234);
+
+#ifdef USE_FAST_MATH
+    if (CheckFastMathSettings() != 1)
+        err_sys("Build vs runtime fastmath FP_MAX_BITS mismatch\n", -1235);
+#endif /* USE_FAST_MATH */
+#endif /* !NO_BIG_INT */
+
+
+#ifndef NO_MD5
+    if ( (ret = md5_test()) != 0) 
+        err_sys("MD5      test failed!\n", ret);
+    else
+        printf( "MD5      test passed!\n");
+#endif
+
+#ifdef CYASSL_MD2
+    if ( (ret = md2_test()) != 0) 
+        err_sys("MD2      test failed!\n", ret);
+    else
+        printf( "MD2      test passed!\n");
+#endif
+
+#ifndef NO_MD4
+    if ( (ret = md4_test()) != 0) 
+        err_sys("MD4      test failed!\n", ret);
+    else
+        printf( "MD4      test passed!\n");
+#endif
+
+#ifndef NO_SHA
+    if ( (ret = sha_test()) != 0) 
+        err_sys("SHA      test failed!\n", ret);
+    else
+        printf( "SHA      test passed!\n");
+#endif
+
+#ifndef NO_SHA256
+    if ( (ret = sha256_test()) != 0) 
+        err_sys("SHA-256  test failed!\n", ret);
+    else
+        printf( "SHA-256  test passed!\n");
+#endif
+
+#ifdef CYASSL_SHA384
+    if ( (ret = sha384_test()) != 0) 
+        err_sys("SHA-384  test failed!\n", ret);
+    else
+        printf( "SHA-384  test passed!\n");
+#endif
+
+#ifdef CYASSL_SHA512
+    if ( (ret = sha512_test()) != 0) 
+        err_sys("SHA-512  test failed!\n", ret);
+    else
+        printf( "SHA-512  test passed!\n");
+#endif
+
+#ifdef CYASSL_RIPEMD
+    if ( (ret = ripemd_test()) != 0) 
+        err_sys("RIPEMD   test failed!\n", ret);
+    else
+        printf( "RIPEMD   test passed!\n");
+#endif
+
+#ifdef HAVE_BLAKE2 
+    if ( (ret = blake2b_test()) != 0) 
+        err_sys("BLAKE2b  test failed!\n", ret);
+    else
+        printf( "BLAKE2b  test passed!\n");
+#endif
+
+#ifndef NO_HMAC
+    #ifndef NO_MD5
+        if ( (ret = hmac_md5_test()) != 0) 
+            err_sys("HMAC-MD5 test failed!\n", ret);
+        else
+            printf( "HMAC-MD5 test passed!\n");
+    #endif
+
+    #ifndef NO_SHA
+    if ( (ret = hmac_sha_test()) != 0) 
+        err_sys("HMAC-SHA test failed!\n", ret);
+    else
+        printf( "HMAC-SHA test passed!\n");
+    #endif
+
+    #ifndef NO_SHA256
+        if ( (ret = hmac_sha256_test()) != 0) 
+            err_sys("HMAC-SHA256 test failed!\n", ret);
+        else
+            printf( "HMAC-SHA256 test passed!\n");
+    #endif
+
+    #ifdef CYASSL_SHA384
+        if ( (ret = hmac_sha384_test()) != 0) 
+            err_sys("HMAC-SHA384 test failed!\n", ret);
+        else
+            printf( "HMAC-SHA384 test passed!\n");
+    #endif
+
+    #ifdef CYASSL_SHA512
+        if ( (ret = hmac_sha512_test()) != 0) 
+            err_sys("HMAC-SHA512 test failed!\n", ret);
+        else
+            printf( "HMAC-SHA512 test passed!\n");
+    #endif
+
+#endif
+
+#ifndef NO_RC4
+    if ( (ret = arc4_test()) != 0)
+        err_sys("ARC4     test failed!\n", ret);
+    else
+        printf( "ARC4     test passed!\n");
+#endif
+
+#ifndef HAVE_HC128
+    if ( (ret = hc128_test()) != 0)
+        err_sys("HC-128   test failed!\n", ret);
+    else
+        printf( "HC-128   test passed!\n");
+#endif
+
+#ifndef NO_RABBIT
+    if ( (ret = rabbit_test()) != 0)
+        err_sys("Rabbit   test failed!\n", ret);
+    else
+        printf( "Rabbit   test passed!\n");
+#endif
+
+#ifndef NO_DES3
+    if ( (ret = des_test()) != 0)
+        err_sys("DES      test failed!\n", ret);
+    else
+        printf( "DES      test passed!\n");
+#endif
+
+#ifndef NO_DES3
+    if ( (ret = des3_test()) != 0)
+        err_sys("DES3     test failed!\n", ret);
+    else
+        printf( "DES3     test passed!\n");
+#endif
+
+#ifndef NO_AES
+    if ( (ret = aes_test()) != 0)
+        err_sys("AES      test failed!\n", ret);
+    else
+        printf( "AES      test passed!\n");
+
+#ifdef HAVE_AESGCM
+    if ( (ret = aesgcm_test()) != 0)
+        err_sys("AES-GCM  test failed!\n", ret);
+    else
+        printf( "AES-GCM  test passed!\n");
+#endif
+
+#ifdef HAVE_AESCCM
+    if ( (ret = aesccm_test()) != 0)
+        err_sys("AES-CCM  test failed!\n", ret);
+    else
+        printf( "AES-CCM  test passed!\n");
+#endif
+#endif
+
+#ifdef HAVE_CAMELLIA
+    if ( (ret = camellia_test()) != 0)
+        err_sys("CAMELLIA test failed!\n", ret);
+    else
+        printf( "CAMELLIA test passed!\n");
+#endif
+
+    if ( (ret = random_test()) != 0)
+        err_sys("RANDOM   test failed!\n", ret);
+    else
+        printf( "RANDOM   test passed!\n");
+
+#ifndef NO_RSA
+    if ( (ret = rsa_test()) != 0) 
+        err_sys("RSA      test failed!\n", ret);
+    else
+        printf( "RSA      test passed!\n");
+#endif
+
+#ifndef NO_DH
+    if ( (ret = dh_test()) != 0) 
+        err_sys("DH       test failed!\n", ret);
+    else
+        printf( "DH       test passed!\n");
+#endif
+
+#ifndef NO_DSA
+    if ( (ret = dsa_test()) != 0) 
+        err_sys("DSA      test failed!\n", ret);
+    else
+        printf( "DSA      test passed!\n");
+#endif
+    
+#ifndef NO_PWDBASED
+    if ( (ret = pwdbased_test()) != 0) 
+        err_sys("PWDBASED test failed!\n", ret);
+    else
+        printf( "PWDBASED test passed!\n");
+#endif
+    
+#ifdef OPENSSL_EXTRA
+    if ( (ret = openssl_test()) != 0) 
+        err_sys("OPENSSL  test failed!\n", ret);
+    else
+        printf( "OPENSSL  test passed!\n");
+#endif
+
+#ifdef HAVE_ECC
+    if ( (ret = ecc_test()) != 0) 
+        err_sys("ECC      test failed!\n", ret);
+    else
+        printf( "ECC      test passed!\n");
+#endif
+
+#ifdef HAVE_LIBZ
+    if ( (ret = compress_test()) != 0) 
+        err_sys("COMPRESS test failed!\n", ret);
+    else
+        printf( "COMPRESS test passed!\n");
+#endif
+
+    ((func_args*)args)->return_code = ret;
+}
+
+
+#ifndef NO_MAIN_DRIVER
+
+#ifdef HAVE_CAVIUM
+
+static int OpenNitroxDevice(int dma_mode,int dev_id)
+{
+   Csp1CoreAssignment core_assign;
+   Uint32             device;
+
+   if (CspInitialize(CAVIUM_DIRECT,CAVIUM_DEV_ID))
+      return -1;
+   if (Csp1GetDevType(&device))
+      return -1;
+   if (device != NPX_DEVICE) {
+      if (ioctl(gpkpdev_hdlr[CAVIUM_DEV_ID], IOCTL_CSP1_GET_CORE_ASSIGNMENT,
+                (Uint32 *)&core_assign)!= 0)
+         return -1;
+   }
+   CspShutdown(CAVIUM_DEV_ID);
+
+   return CspInitialize(dma_mode, dev_id);
+}
+
+#endif /* HAVE_CAVIUM */
+
+    /* so overall tests can pull in test function */
+
+    int main(int argc, char** argv)
+    {
+
+        func_args args;
+
+            
+#ifdef HAVE_CAVIUM
+        int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID);
+        if (ret != 0)
+            err_sys("Cavium OpenNitroxDevice failed", -1236);
+#endif /* HAVE_CAVIUM */
+
+        args.argc = argc;
+        args.argv = argv;
+
+        ctaocrypt_test(&args);
+
+#ifdef HAVE_CAVIUM
+        CspShutdown(CAVIUM_DEV_ID);
+#endif
+                
+        return args.return_code;
+    }
+
+#endif /* NO_MAIN_DRIVER */
+
+
+#ifdef CYASSL_MD2
+int md2_test()
+{
+    Md2  md2;
+    byte hash[MD2_DIGEST_SIZE];
+
+    testVector a, b, c, d, e, f, g;
+    testVector test_md2[7];
+    int times = sizeof(test_md2) / sizeof(testVector), i;
+
+    a.input  = "";
+    a.output = "\x83\x50\xe5\xa3\xe2\x4c\x15\x3d\xf2\x27\x5c\x9f\x80\x69"
+               "\x27\x73";
+    a.inLen  = strlen(a.input);
+    a.outLen = MD2_DIGEST_SIZE;
+
+    b.input  = "a";
+    b.output = "\x32\xec\x01\xec\x4a\x6d\xac\x72\xc0\xab\x96\xfb\x34\xc0"
+               "\xb5\xd1";
+    b.inLen  = strlen(b.input);
+    b.outLen = MD2_DIGEST_SIZE;
+
+    c.input  = "abc";
+    c.output = "\xda\x85\x3b\x0d\x3f\x88\xd9\x9b\x30\x28\x3a\x69\xe6\xde"
+               "\xd6\xbb";
+    c.inLen  = strlen(c.input);
+    c.outLen = MD2_DIGEST_SIZE;
+
+    d.input  = "message digest";
+    d.output = "\xab\x4f\x49\x6b\xfb\x2a\x53\x0b\x21\x9f\xf3\x30\x31\xfe"
+               "\x06\xb0";
+    d.inLen  = strlen(d.input);
+    d.outLen = MD2_DIGEST_SIZE;
+
+    e.input  = "abcdefghijklmnopqrstuvwxyz";
+    e.output = "\x4e\x8d\xdf\xf3\x65\x02\x92\xab\x5a\x41\x08\xc3\xaa\x47"
+               "\x94\x0b";
+    e.inLen  = strlen(e.input);
+    e.outLen = MD2_DIGEST_SIZE;
+
+    f.input  = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz012345"
+               "6789";
+    f.output = "\xda\x33\xde\xf2\xa4\x2d\xf1\x39\x75\x35\x28\x46\xc3\x03"
+               "\x38\xcd";
+    f.inLen  = strlen(f.input);
+    f.outLen = MD2_DIGEST_SIZE;
+
+    g.input  = "1234567890123456789012345678901234567890123456789012345678"
+               "9012345678901234567890";
+    g.output = "\xd5\x97\x6f\x79\xd8\x3d\x3a\x0d\xc9\x80\x6c\x3c\x66\xf3"
+               "\xef\xd8";
+    g.inLen  = strlen(g.input);
+    g.outLen = MD2_DIGEST_SIZE;
+
+    test_md2[0] = a;
+    test_md2[1] = b;
+    test_md2[2] = c;
+    test_md2[3] = d;
+    test_md2[4] = e;
+    test_md2[5] = f;
+    test_md2[6] = g;
+
+    InitMd2(&md2);
+
+    for (i = 0; i < times; ++i) {
+        Md2Update(&md2, (byte*)test_md2[i].input, (word32)test_md2[i].inLen);
+        Md2Final(&md2, hash);
+
+        if (memcmp(hash, test_md2[i].output, MD2_DIGEST_SIZE) != 0)
+            return -155 - i;
+    }
+
+    return 0;
+}
+#endif 
+
+#ifndef NO_MD5
+int md5_test(void)
+{
+    Md5  md5;
+    byte hash[MD5_DIGEST_SIZE];
+
+    testVector a, b, c, d, e;
+    testVector test_md5[5];
+    int times = sizeof(test_md5) / sizeof(testVector), i;
+
+    a.input  = "abc";
+    a.output = "\x90\x01\x50\x98\x3c\xd2\x4f\xb0\xd6\x96\x3f\x7d\x28\xe1\x7f"
+               "\x72";
+    a.inLen  = strlen(a.input);
+    a.outLen = MD5_DIGEST_SIZE;
+
+    b.input  = "message digest";
+    b.output = "\xf9\x6b\x69\x7d\x7c\xb7\x93\x8d\x52\x5a\x2f\x31\xaa\xf1\x61"
+               "\xd0";
+    b.inLen  = strlen(b.input);
+    b.outLen = MD5_DIGEST_SIZE;
+
+    c.input  = "abcdefghijklmnopqrstuvwxyz";
+    c.output = "\xc3\xfc\xd3\xd7\x61\x92\xe4\x00\x7d\xfb\x49\x6c\xca\x67\xe1"
+               "\x3b";
+    c.inLen  = strlen(c.input);
+    c.outLen = MD5_DIGEST_SIZE; 
+
+    d.input  = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz012345"
+               "6789";
+    d.output = "\xd1\x74\xab\x98\xd2\x77\xd9\xf5\xa5\x61\x1c\x2c\x9f\x41\x9d"
+               "\x9f";
+    d.inLen  = strlen(d.input);
+    d.outLen = MD5_DIGEST_SIZE; 
+
+    e.input  = "1234567890123456789012345678901234567890123456789012345678"
+               "9012345678901234567890";
+    e.output = "\x57\xed\xf4\xa2\x2b\xe3\xc9\x55\xac\x49\xda\x2e\x21\x07\xb6"
+               "\x7a";
+    e.inLen  = strlen(e.input);
+    e.outLen = MD5_DIGEST_SIZE; 
+
+    test_md5[0] = a;
+    test_md5[1] = b;
+    test_md5[2] = c;
+    test_md5[3] = d;
+    test_md5[4] = e;
+
+    InitMd5(&md5);
+
+    for (i = 0; i < times; ++i) {
+        Md5Update(&md5, (byte*)test_md5[i].input, (word32)test_md5[i].inLen);
+        Md5Final(&md5, hash);
+
+        if (memcmp(hash, test_md5[i].output, MD5_DIGEST_SIZE) != 0)
+            return -5 - i;
+    }
+
+    return 0;
+}
+#endif /* NO_MD5 */
+
+
+#ifndef NO_MD4
+
+int md4_test(void)
+{
+    Md4  md4;
+    byte hash[MD4_DIGEST_SIZE];
+
+    testVector a, b, c, d, e, f, g;
+    testVector test_md4[7];
+    int times = sizeof(test_md4) / sizeof(testVector), i;
+
+    a.input  = "";
+    a.output = "\x31\xd6\xcf\xe0\xd1\x6a\xe9\x31\xb7\x3c\x59\xd7\xe0\xc0\x89" 
+               "\xc0";
+    a.inLen  = strlen(a.input);
+    a.outLen = MD4_DIGEST_SIZE;
+
+    b.input  = "a";
+    b.output = "\xbd\xe5\x2c\xb3\x1d\xe3\x3e\x46\x24\x5e\x05\xfb\xdb\xd6\xfb" 
+               "\x24";
+    b.inLen  = strlen(b.input);
+    b.outLen = MD4_DIGEST_SIZE; 
+
+    c.input  = "abc";
+    c.output = "\xa4\x48\x01\x7a\xaf\x21\xd8\x52\x5f\xc1\x0a\xe8\x7a\xa6\x72" 
+               "\x9d";
+    c.inLen  = strlen(c.input);
+    c.outLen = MD4_DIGEST_SIZE;
+
+    d.input  = "message digest";
+    d.output = "\xd9\x13\x0a\x81\x64\x54\x9f\xe8\x18\x87\x48\x06\xe1\xc7\x01" 
+               "\x4b";
+    d.inLen  = strlen(d.input);
+    d.outLen = MD4_DIGEST_SIZE;
+
+    e.input  = "abcdefghijklmnopqrstuvwxyz";
+    e.output = "\xd7\x9e\x1c\x30\x8a\xa5\xbb\xcd\xee\xa8\xed\x63\xdf\x41\x2d" 
+               "\xa9";
+    e.inLen  = strlen(e.input);
+    e.outLen = MD4_DIGEST_SIZE;
+
+    f.input  = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz012345"
+               "6789";
+    f.output = "\x04\x3f\x85\x82\xf2\x41\xdb\x35\x1c\xe6\x27\xe1\x53\xe7\xf0" 
+               "\xe4";
+    f.inLen  = strlen(f.input);
+    f.outLen = MD4_DIGEST_SIZE;
+
+    g.input  = "1234567890123456789012345678901234567890123456789012345678"
+               "9012345678901234567890";
+    g.output = "\xe3\x3b\x4d\xdc\x9c\x38\xf2\x19\x9c\x3e\x7b\x16\x4f\xcc\x05" 
+               "\x36";
+    g.inLen  = strlen(g.input);
+    g.outLen = MD4_DIGEST_SIZE;
+
+    test_md4[0] = a;
+    test_md4[1] = b;
+    test_md4[2] = c;
+    test_md4[3] = d;
+    test_md4[4] = e;
+    test_md4[5] = f;
+    test_md4[6] = g;
+
+    InitMd4(&md4);
+
+    for (i = 0; i < times; ++i) {
+        Md4Update(&md4, (byte*)test_md4[i].input, (word32)test_md4[i].inLen);
+        Md4Final(&md4, hash);
+
+        if (memcmp(hash, test_md4[i].output, MD4_DIGEST_SIZE) != 0)
+            return -205 - i;
+    }
+
+    return 0;
+}
+
+#endif /* NO_MD4 */
+
+#ifndef NO_SHA
+
+int sha_test(void)
+{
+    Sha  sha;
+    byte hash[SHA_DIGEST_SIZE];
+
+    testVector a, b, c, d;
+    testVector test_sha[4];
+    int times = sizeof(test_sha) / sizeof(struct testVector), i;
+
+    a.input  = "abc";
+    a.output = "\xA9\x99\x3E\x36\x47\x06\x81\x6A\xBA\x3E\x25\x71\x78\x50\xC2"
+               "\x6C\x9C\xD0\xD8\x9D";
+    a.inLen  = strlen(a.input);
+    a.outLen = SHA_DIGEST_SIZE;
+
+    b.input  = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq";
+    b.output = "\x84\x98\x3E\x44\x1C\x3B\xD2\x6E\xBA\xAE\x4A\xA1\xF9\x51\x29"
+               "\xE5\xE5\x46\x70\xF1";
+    b.inLen  = strlen(b.input);
+    b.outLen = SHA_DIGEST_SIZE;
+
+    c.input  = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+               "aaaaaa";
+    c.output = "\x00\x98\xBA\x82\x4B\x5C\x16\x42\x7B\xD7\xA1\x12\x2A\x5A\x44"
+               "\x2A\x25\xEC\x64\x4D";
+    c.inLen  = strlen(c.input);
+    c.outLen = SHA_DIGEST_SIZE; 
+
+    d.input  = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+               "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+               "aaaaaaaaaa";
+    d.output = "\xAD\x5B\x3F\xDB\xCB\x52\x67\x78\xC2\x83\x9D\x2F\x15\x1E\xA7"
+               "\x53\x99\x5E\x26\xA0";
+    d.inLen  = strlen(d.input);
+    d.outLen = SHA_DIGEST_SIZE;
+
+    test_sha[0] = a;
+    test_sha[1] = b;
+    test_sha[2] = c;
+    test_sha[3] = d;
+
+    InitSha(&sha);
+
+    for (i = 0; i < times; ++i) {
+        ShaUpdate(&sha, (byte*)test_sha[i].input, (word32)test_sha[i].inLen);
+        ShaFinal(&sha, hash);
+
+        if (memcmp(hash, test_sha[i].output, SHA_DIGEST_SIZE) != 0)
+            return -10 - i;
+    }
+
+    return 0;
+}
+
+#endif /* NO_SHA */
+
+#ifdef CYASSL_RIPEMD
+int ripemd_test(void)
+{
+    RipeMd  ripemd;
+    byte hash[RIPEMD_DIGEST_SIZE];
+
+    testVector a, b, c, d;
+    testVector test_ripemd[4];
+    int times = sizeof(test_ripemd) / sizeof(struct testVector), i;
+
+    a.input  = "abc";
+    a.output = "\x8e\xb2\x08\xf7\xe0\x5d\x98\x7a\x9b\x04\x4a\x8e\x98\xc6"
+               "\xb0\x87\xf1\x5a\x0b\xfc";
+    a.inLen  = strlen(a.input);
+    a.outLen = RIPEMD_DIGEST_SIZE;
+
+    b.input  = "message digest";
+    b.output = "\x5d\x06\x89\xef\x49\xd2\xfa\xe5\x72\xb8\x81\xb1\x23\xa8"
+               "\x5f\xfa\x21\x59\x5f\x36";
+    b.inLen  = strlen(b.input);
+    b.outLen = RIPEMD_DIGEST_SIZE;
+
+    c.input  = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"; 
+    c.output = "\x12\xa0\x53\x38\x4a\x9c\x0c\x88\xe4\x05\xa0\x6c\x27\xdc"
+               "\xf4\x9a\xda\x62\xeb\x2b";
+    c.inLen  = strlen(c.input);
+    c.outLen = RIPEMD_DIGEST_SIZE;
+
+    d.input  = "12345678901234567890123456789012345678901234567890123456"
+               "789012345678901234567890";
+    d.output = "\x9b\x75\x2e\x45\x57\x3d\x4b\x39\xf4\xdb\xd3\x32\x3c\xab"
+               "\x82\xbf\x63\x32\x6b\xfb"; 
+    d.inLen  = strlen(d.input);
+    d.outLen = RIPEMD_DIGEST_SIZE;
+
+    test_ripemd[0] = a;
+    test_ripemd[1] = b;
+    test_ripemd[2] = c;
+    test_ripemd[3] = d;
+
+    InitRipeMd(&ripemd);
+
+    for (i = 0; i < times; ++i) {
+        RipeMdUpdate(&ripemd, (byte*)test_ripemd[i].input,
+                     (word32)test_ripemd[i].inLen);
+        RipeMdFinal(&ripemd, hash);
+
+        if (memcmp(hash, test_ripemd[i].output, RIPEMD_DIGEST_SIZE) != 0)
+            return -10 - i;
+    }
+
+    return 0;
+}
+#endif /* CYASSL_RIPEMD */
+
+
+#ifdef HAVE_BLAKE2
+
+
+#define BLAKE2_TESTS 3
+
+static const byte blake2b_vec[BLAKE2_TESTS][BLAKE2B_OUTBYTES] =
+{
+  {
+    0x78, 0x6A, 0x02, 0xF7, 0x42, 0x01, 0x59, 0x03,
+    0xC6, 0xC6, 0xFD, 0x85, 0x25, 0x52, 0xD2, 0x72,
+    0x91, 0x2F, 0x47, 0x40, 0xE1, 0x58, 0x47, 0x61,
+    0x8A, 0x86, 0xE2, 0x17, 0xF7, 0x1F, 0x54, 0x19,
+    0xD2, 0x5E, 0x10, 0x31, 0xAF, 0xEE, 0x58, 0x53,
+    0x13, 0x89, 0x64, 0x44, 0x93, 0x4E, 0xB0, 0x4B,
+    0x90, 0x3A, 0x68, 0x5B, 0x14, 0x48, 0xB7, 0x55,
+    0xD5, 0x6F, 0x70, 0x1A, 0xFE, 0x9B, 0xE2, 0xCE
+  },
+  {
+    0x2F, 0xA3, 0xF6, 0x86, 0xDF, 0x87, 0x69, 0x95,
+    0x16, 0x7E, 0x7C, 0x2E, 0x5D, 0x74, 0xC4, 0xC7,
+    0xB6, 0xE4, 0x8F, 0x80, 0x68, 0xFE, 0x0E, 0x44,
+    0x20, 0x83, 0x44, 0xD4, 0x80, 0xF7, 0x90, 0x4C,
+    0x36, 0x96, 0x3E, 0x44, 0x11, 0x5F, 0xE3, 0xEB,
+    0x2A, 0x3A, 0xC8, 0x69, 0x4C, 0x28, 0xBC, 0xB4,
+    0xF5, 0xA0, 0xF3, 0x27, 0x6F, 0x2E, 0x79, 0x48,
+    0x7D, 0x82, 0x19, 0x05, 0x7A, 0x50, 0x6E, 0x4B
+  },
+  {
+    0x1C, 0x08, 0x79, 0x8D, 0xC6, 0x41, 0xAB, 0xA9,
+    0xDE, 0xE4, 0x35, 0xE2, 0x25, 0x19, 0xA4, 0x72,
+    0x9A, 0x09, 0xB2, 0xBF, 0xE0, 0xFF, 0x00, 0xEF,
+    0x2D, 0xCD, 0x8E, 0xD6, 0xF8, 0xA0, 0x7D, 0x15,
+    0xEA, 0xF4, 0xAE, 0xE5, 0x2B, 0xBF, 0x18, 0xAB,
+    0x56, 0x08, 0xA6, 0x19, 0x0F, 0x70, 0xB9, 0x04,
+    0x86, 0xC8, 0xA7, 0xD4, 0x87, 0x37, 0x10, 0xB1,
+    0x11, 0x5D, 0x3D, 0xEB, 0xBB, 0x43, 0x27, 0xB5
+  }
+};
+
+
+
+int blake2b_test(void)
+{
+    Blake2b b2b;
+    byte    digest[64];
+    byte    input[64];
+    int     i;
+
+    for (i = 0; i < (int)sizeof(input); i++)
+        input[i] = (byte)i;
+
+    for (i = 0; i < BLAKE2_TESTS; i++) {
+        InitBlake2b(&b2b, 64);
+        Blake2bUpdate(&b2b, input, i);
+        Blake2bFinal(&b2b, digest, 64);
+
+        if (memcmp(digest, blake2b_vec[i], 64) != 0) {
+            return -300 - i;
+        }
+    }
+
+    return 0;
+}
+#endif /* HAVE_BLAKE2 */
+
+
+#ifndef NO_SHA256
+int sha256_test(void)
+{
+    Sha256 sha;
+    byte   hash[SHA256_DIGEST_SIZE];
+
+    testVector a, b;
+    testVector test_sha[2];
+    int times = sizeof(test_sha) / sizeof(struct testVector), i;
+
+    a.input  = "abc";
+    a.output = "\xBA\x78\x16\xBF\x8F\x01\xCF\xEA\x41\x41\x40\xDE\x5D\xAE\x22"
+               "\x23\xB0\x03\x61\xA3\x96\x17\x7A\x9C\xB4\x10\xFF\x61\xF2\x00"
+               "\x15\xAD";
+    a.inLen  = strlen(a.input);
+    a.outLen = SHA256_DIGEST_SIZE;
+
+    b.input  = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq";
+    b.output = "\x24\x8D\x6A\x61\xD2\x06\x38\xB8\xE5\xC0\x26\x93\x0C\x3E\x60"
+               "\x39\xA3\x3C\xE4\x59\x64\xFF\x21\x67\xF6\xEC\xED\xD4\x19\xDB"
+               "\x06\xC1";
+    b.inLen  = strlen(b.input);
+    b.outLen = SHA256_DIGEST_SIZE;
+
+    test_sha[0] = a;
+    test_sha[1] = b;
+
+    InitSha256(&sha);
+
+    for (i = 0; i < times; ++i) {
+        Sha256Update(&sha, (byte*)test_sha[i].input,(word32)test_sha[i].inLen);
+        Sha256Final(&sha, hash);
+
+        if (memcmp(hash, test_sha[i].output, SHA256_DIGEST_SIZE) != 0)
+            return -10 - i;
+    }
+
+    return 0;
+}
+#endif
+
+
+#ifdef CYASSL_SHA512
+int sha512_test(void)
+{
+    Sha512 sha;
+    byte   hash[SHA512_DIGEST_SIZE];
+
+    testVector a, b;
+    testVector test_sha[2];
+    int times = sizeof(test_sha) / sizeof(struct testVector), i;
+
+    a.input  = "abc";
+    a.output = "\xdd\xaf\x35\xa1\x93\x61\x7a\xba\xcc\x41\x73\x49\xae\x20\x41"
+               "\x31\x12\xe6\xfa\x4e\x89\xa9\x7e\xa2\x0a\x9e\xee\xe6\x4b\x55"
+               "\xd3\x9a\x21\x92\x99\x2a\x27\x4f\xc1\xa8\x36\xba\x3c\x23\xa3"
+               "\xfe\xeb\xbd\x45\x4d\x44\x23\x64\x3c\xe8\x0e\x2a\x9a\xc9\x4f"
+               "\xa5\x4c\xa4\x9f";
+    a.inLen  = strlen(a.input);
+    a.outLen = SHA512_DIGEST_SIZE;
+
+    b.input  = "abcdefghbcdefghicdefghijdefghijkefghijklfghijklmghijklmnhi"
+               "jklmnoijklmnopjklmnopqklmnopqrlmnopqrsmnopqrstnopqrstu";
+    b.output = "\x8e\x95\x9b\x75\xda\xe3\x13\xda\x8c\xf4\xf7\x28\x14\xfc\x14"
+               "\x3f\x8f\x77\x79\xc6\xeb\x9f\x7f\xa1\x72\x99\xae\xad\xb6\x88"
+               "\x90\x18\x50\x1d\x28\x9e\x49\x00\xf7\xe4\x33\x1b\x99\xde\xc4"
+               "\xb5\x43\x3a\xc7\xd3\x29\xee\xb6\xdd\x26\x54\x5e\x96\xe5\x5b"
+               "\x87\x4b\xe9\x09"; 
+    b.inLen  = strlen(b.input);
+    b.outLen = SHA512_DIGEST_SIZE;
+
+    test_sha[0] = a;
+    test_sha[1] = b;
+
+    InitSha512(&sha);
+
+    for (i = 0; i < times; ++i) {
+        Sha512Update(&sha, (byte*)test_sha[i].input,(word32)test_sha[i].inLen);
+        Sha512Final(&sha, hash);
+
+        if (memcmp(hash, test_sha[i].output, SHA512_DIGEST_SIZE) != 0)
+            return -10 - i;
+    }
+
+    return 0;
+}
+#endif
+
+
+#ifdef CYASSL_SHA384
+int sha384_test(void)
+{
+    Sha384 sha;
+    byte   hash[SHA384_DIGEST_SIZE];
+
+    testVector a, b;
+    testVector test_sha[2];
+    int times = sizeof(test_sha) / sizeof(struct testVector), i;
+
+    a.input  = "abc";
+    a.output = "\xcb\x00\x75\x3f\x45\xa3\x5e\x8b\xb5\xa0\x3d\x69\x9a\xc6\x50"
+               "\x07\x27\x2c\x32\xab\x0e\xde\xd1\x63\x1a\x8b\x60\x5a\x43\xff"
+               "\x5b\xed\x80\x86\x07\x2b\xa1\xe7\xcc\x23\x58\xba\xec\xa1\x34"
+               "\xc8\x25\xa7";
+    a.inLen  = strlen(a.input);
+    a.outLen = SHA384_DIGEST_SIZE;
+
+    b.input  = "abcdefghbcdefghicdefghijdefghijkefghijklfghijklmghijklmnhi"
+               "jklmnoijklmnopjklmnopqklmnopqrlmnopqrsmnopqrstnopqrstu";
+    b.output = "\x09\x33\x0c\x33\xf7\x11\x47\xe8\x3d\x19\x2f\xc7\x82\xcd\x1b"
+               "\x47\x53\x11\x1b\x17\x3b\x3b\x05\xd2\x2f\xa0\x80\x86\xe3\xb0"
+               "\xf7\x12\xfc\xc7\xc7\x1a\x55\x7e\x2d\xb9\x66\xc3\xe9\xfa\x91"
+               "\x74\x60\x39";
+    b.inLen  = strlen(b.input);
+    b.outLen = SHA384_DIGEST_SIZE; 
+
+    test_sha[0] = a;
+    test_sha[1] = b;
+
+    InitSha384(&sha);
+
+    for (i = 0; i < times; ++i) {
+        Sha384Update(&sha, (byte*)test_sha[i].input,(word32)test_sha[i].inLen);
+        Sha384Final(&sha, hash);
+
+        if (memcmp(hash, test_sha[i].output, SHA384_DIGEST_SIZE) != 0)
+            return -10 - i;
+    }
+
+    return 0;
+}
+#endif /* CYASSL_SHA384 */
+
+
+#if !defined(NO_HMAC) && !defined(NO_MD5)
+int hmac_md5_test(void)
+{
+    Hmac hmac;
+    byte hash[MD5_DIGEST_SIZE];
+
+    const char* keys[]=
+    {
+        "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b",
+        "Jefe",
+        "\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA"
+    };
+
+    testVector a, b, c;
+    testVector test_hmac[3];
+
+    int times = sizeof(test_hmac) / sizeof(testVector), i;
+
+    a.input  = "Hi There";
+    a.output = "\x92\x94\x72\x7a\x36\x38\xbb\x1c\x13\xf4\x8e\xf8\x15\x8b\xfc"
+               "\x9d";
+    a.inLen  = strlen(a.input);
+    a.outLen = MD5_DIGEST_SIZE;
+
+    b.input  = "what do ya want for nothing?";
+    b.output = "\x75\x0c\x78\x3e\x6a\xb0\xb5\x03\xea\xa8\x6e\x31\x0a\x5d\xb7"
+               "\x38";
+    b.inLen  = strlen(b.input);
+    b.outLen = MD5_DIGEST_SIZE;
+
+    c.input  = "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD";
+    c.output = "\x56\xbe\x34\x52\x1d\x14\x4c\x88\xdb\xb8\xc7\x33\xf0\xe8\xb3"
+               "\xf6";
+    c.inLen  = strlen(c.input);
+    c.outLen = MD5_DIGEST_SIZE;
+
+    test_hmac[0] = a;
+    test_hmac[1] = b;
+    test_hmac[2] = c;
+
+    for (i = 0; i < times; ++i) {
+#ifdef HAVE_CAVIUM
+        if (i == 1)
+            continue; /* driver can't handle keys <= bytes */
+        if (HmacInitCavium(&hmac, CAVIUM_DEV_ID) != 0)
+            return -20009; 
+#endif
+        HmacSetKey(&hmac, MD5, (byte*)keys[i], (word32)strlen(keys[i]));
+        HmacUpdate(&hmac, (byte*)test_hmac[i].input,
+                   (word32)test_hmac[i].inLen);
+        HmacFinal(&hmac, hash);
+
+        if (memcmp(hash, test_hmac[i].output, MD5_DIGEST_SIZE) != 0)
+            return -20 - i;
+#ifdef HAVE_CAVIUM
+        HmacFreeCavium(&hmac);
+#endif
+    }
+
+    return 0;
+}
+#endif /* NO_HMAC && NO_MD5 */
+
+#if !defined(NO_HMAC) && !defined(NO_SHA)
+int hmac_sha_test(void)
+{
+    Hmac hmac;
+    byte hash[SHA_DIGEST_SIZE];
+
+    const char* keys[]=
+    {
+        "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b"
+                                                                "\x0b\x0b\x0b",
+        "Jefe",
+        "\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA"
+                                                                "\xAA\xAA\xAA"
+    };
+
+    testVector a, b, c;
+    testVector test_hmac[3];
+
+    int times = sizeof(test_hmac) / sizeof(testVector), i;
+
+    a.input  = "Hi There";
+    a.output = "\xb6\x17\x31\x86\x55\x05\x72\x64\xe2\x8b\xc0\xb6\xfb\x37\x8c"
+               "\x8e\xf1\x46\xbe\x00";
+    a.inLen  = strlen(a.input);
+    a.outLen = SHA_DIGEST_SIZE;
+
+    b.input  = "what do ya want for nothing?";
+    b.output = "\xef\xfc\xdf\x6a\xe5\xeb\x2f\xa2\xd2\x74\x16\xd5\xf1\x84\xdf"
+               "\x9c\x25\x9a\x7c\x79";
+    b.inLen  = strlen(b.input);
+    b.outLen = SHA_DIGEST_SIZE;
+
+    c.input  = "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD";
+    c.output = "\x12\x5d\x73\x42\xb9\xac\x11\xcd\x91\xa3\x9a\xf4\x8a\xa1\x7b"
+               "\x4f\x63\xf1\x75\xd3";
+    c.inLen  = strlen(c.input);
+    c.outLen = SHA_DIGEST_SIZE;
+
+    test_hmac[0] = a;
+    test_hmac[1] = b;
+    test_hmac[2] = c;
+
+    for (i = 0; i < times; ++i) {
+#ifdef HAVE_CAVIUM
+        if (i == 1)
+            continue; /* driver can't handle keys <= bytes */
+        if (HmacInitCavium(&hmac, CAVIUM_DEV_ID) != 0)
+            return -20010; 
+#endif
+        HmacSetKey(&hmac, SHA, (byte*)keys[i], (word32)strlen(keys[i]));
+        HmacUpdate(&hmac, (byte*)test_hmac[i].input,
+                   (word32)test_hmac[i].inLen);
+        HmacFinal(&hmac, hash);
+
+        if (memcmp(hash, test_hmac[i].output, SHA_DIGEST_SIZE) != 0)
+            return -20 - i;
+#ifdef HAVE_CAVIUM
+        HmacFreeCavium(&hmac);
+#endif
+    }
+
+    return 0;
+}
+#endif
+
+
+#if !defined(NO_HMAC) && !defined(NO_SHA256)
+int hmac_sha256_test(void)
+{
+    Hmac hmac;
+    byte hash[SHA256_DIGEST_SIZE];
+
+    const char* keys[]=
+    {
+        "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b"
+                                                                "\x0b\x0b\x0b",
+        "Jefe",
+        "\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA"
+                                                                "\xAA\xAA\xAA"
+    };
+
+    testVector a, b, c;
+    testVector test_hmac[3];
+
+    int times = sizeof(test_hmac) / sizeof(testVector), i;
+
+    a.input  = "Hi There";
+    a.output = "\xb0\x34\x4c\x61\xd8\xdb\x38\x53\x5c\xa8\xaf\xce\xaf\x0b\xf1"
+               "\x2b\x88\x1d\xc2\x00\xc9\x83\x3d\xa7\x26\xe9\x37\x6c\x2e\x32"
+               "\xcf\xf7";
+    a.inLen  = strlen(a.input);
+    a.outLen = SHA256_DIGEST_SIZE;
+
+    b.input  = "what do ya want for nothing?";
+    b.output = "\x5b\xdc\xc1\x46\xbf\x60\x75\x4e\x6a\x04\x24\x26\x08\x95\x75"
+               "\xc7\x5a\x00\x3f\x08\x9d\x27\x39\x83\x9d\xec\x58\xb9\x64\xec"
+               "\x38\x43";
+    b.inLen  = strlen(b.input);
+    b.outLen = SHA256_DIGEST_SIZE;
+
+    c.input  = "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD";
+    c.output = "\x77\x3e\xa9\x1e\x36\x80\x0e\x46\x85\x4d\xb8\xeb\xd0\x91\x81"
+               "\xa7\x29\x59\x09\x8b\x3e\xf8\xc1\x22\xd9\x63\x55\x14\xce\xd5"
+               "\x65\xfe";
+    c.inLen  = strlen(c.input);
+    c.outLen = SHA256_DIGEST_SIZE;
+
+    test_hmac[0] = a;
+    test_hmac[1] = b;
+    test_hmac[2] = c;
+
+    for (i = 0; i < times; ++i) {
+#ifdef HAVE_CAVIUM
+        if (i == 1)
+            continue; /* driver can't handle keys <= bytes */
+        if (HmacInitCavium(&hmac, CAVIUM_DEV_ID) != 0)
+            return -20011; 
+#endif
+        HmacSetKey(&hmac, SHA256, (byte*)keys[i], (word32)strlen(keys[i]));
+        HmacUpdate(&hmac, (byte*)test_hmac[i].input,
+                   (word32)test_hmac[i].inLen);
+        HmacFinal(&hmac, hash);
+
+        if (memcmp(hash, test_hmac[i].output, SHA256_DIGEST_SIZE) != 0)
+            return -20 - i;
+#ifdef HAVE_CAVIUM
+        HmacFreeCavium(&hmac);
+#endif
+    }
+
+    return 0;
+}
+#endif
+
+
+#if !defined(NO_HMAC) && defined(CYASSL_SHA384)
+int hmac_sha384_test(void)
+{
+    Hmac hmac;
+    byte hash[SHA384_DIGEST_SIZE];
+
+    const char* keys[]=
+    {
+        "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b"
+                                                                "\x0b\x0b\x0b",
+        "Jefe",
+        "\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA"
+                                                                "\xAA\xAA\xAA"
+    };
+
+    testVector a, b, c;
+    testVector test_hmac[3];
+
+    int times = sizeof(test_hmac) / sizeof(testVector), i;
+
+    a.input  = "Hi There";
+    a.output = "\xaf\xd0\x39\x44\xd8\x48\x95\x62\x6b\x08\x25\xf4\xab\x46\x90"
+               "\x7f\x15\xf9\xda\xdb\xe4\x10\x1e\xc6\x82\xaa\x03\x4c\x7c\xeb"
+               "\xc5\x9c\xfa\xea\x9e\xa9\x07\x6e\xde\x7f\x4a\xf1\x52\xe8\xb2"
+               "\xfa\x9c\xb6";
+    a.inLen  = strlen(a.input);
+    a.outLen = SHA384_DIGEST_SIZE;
+
+    b.input  = "what do ya want for nothing?";
+    b.output = "\xaf\x45\xd2\xe3\x76\x48\x40\x31\x61\x7f\x78\xd2\xb5\x8a\x6b"
+               "\x1b\x9c\x7e\xf4\x64\xf5\xa0\x1b\x47\xe4\x2e\xc3\x73\x63\x22"
+               "\x44\x5e\x8e\x22\x40\xca\x5e\x69\xe2\xc7\x8b\x32\x39\xec\xfa"
+               "\xb2\x16\x49";
+    b.inLen  = strlen(b.input);
+    b.outLen = SHA384_DIGEST_SIZE;
+
+    c.input  = "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD";
+    c.output = "\x88\x06\x26\x08\xd3\xe6\xad\x8a\x0a\xa2\xac\xe0\x14\xc8\xa8"
+               "\x6f\x0a\xa6\x35\xd9\x47\xac\x9f\xeb\xe8\x3e\xf4\xe5\x59\x66"
+               "\x14\x4b\x2a\x5a\xb3\x9d\xc1\x38\x14\xb9\x4e\x3a\xb6\xe1\x01"
+               "\xa3\x4f\x27";
+    c.inLen  = strlen(c.input);
+    c.outLen = SHA384_DIGEST_SIZE;
+
+    test_hmac[0] = a;
+    test_hmac[1] = b;
+    test_hmac[2] = c;
+
+    for (i = 0; i < times; ++i) {
+        HmacSetKey(&hmac, SHA384, (byte*)keys[i], (word32)strlen(keys[i]));
+        HmacUpdate(&hmac, (byte*)test_hmac[i].input,
+                   (word32)test_hmac[i].inLen);
+        HmacFinal(&hmac, hash);
+
+        if (memcmp(hash, test_hmac[i].output, SHA384_DIGEST_SIZE) != 0)
+            return -20 - i;
+    }
+
+    return 0;
+}
+#endif
+
+
+#if !defined(NO_HMAC) && defined(CYASSL_SHA512)
+int hmac_sha512_test(void)
+{
+    Hmac hmac;
+    byte hash[SHA512_DIGEST_SIZE];
+
+    const char* keys[]=
+    {
+        "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b"
+                                                                "\x0b\x0b\x0b",
+        "Jefe",
+        "\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA"
+                                                                "\xAA\xAA\xAA"
+    };
+
+    testVector a, b, c;
+    testVector test_hmac[3];
+
+    int times = sizeof(test_hmac) / sizeof(testVector), i;
+
+    a.input  = "Hi There";
+    a.output = "\x87\xaa\x7c\xde\xa5\xef\x61\x9d\x4f\xf0\xb4\x24\x1a\x1d\x6c"
+               "\xb0\x23\x79\xf4\xe2\xce\x4e\xc2\x78\x7a\xd0\xb3\x05\x45\xe1"
+               "\x7c\xde\xda\xa8\x33\xb7\xd6\xb8\xa7\x02\x03\x8b\x27\x4e\xae"
+               "\xa3\xf4\xe4\xbe\x9d\x91\x4e\xeb\x61\xf1\x70\x2e\x69\x6c\x20"
+               "\x3a\x12\x68\x54";
+    a.inLen  = strlen(a.input);
+    a.outLen = SHA512_DIGEST_SIZE;
+
+    b.input  = "what do ya want for nothing?";
+    b.output = "\x16\x4b\x7a\x7b\xfc\xf8\x19\xe2\xe3\x95\xfb\xe7\x3b\x56\xe0"
+               "\xa3\x87\xbd\x64\x22\x2e\x83\x1f\xd6\x10\x27\x0c\xd7\xea\x25"
+               "\x05\x54\x97\x58\xbf\x75\xc0\x5a\x99\x4a\x6d\x03\x4f\x65\xf8"
+               "\xf0\xe6\xfd\xca\xea\xb1\xa3\x4d\x4a\x6b\x4b\x63\x6e\x07\x0a"
+               "\x38\xbc\xe7\x37";
+    b.inLen  = strlen(b.input);
+    b.outLen = SHA512_DIGEST_SIZE;
+
+    c.input  = "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD";
+    c.output = "\xfa\x73\xb0\x08\x9d\x56\xa2\x84\xef\xb0\xf0\x75\x6c\x89\x0b"
+               "\xe9\xb1\xb5\xdb\xdd\x8e\xe8\x1a\x36\x55\xf8\x3e\x33\xb2\x27"
+               "\x9d\x39\xbf\x3e\x84\x82\x79\xa7\x22\xc8\x06\xb4\x85\xa4\x7e"
+               "\x67\xc8\x07\xb9\x46\xa3\x37\xbe\xe8\x94\x26\x74\x27\x88\x59"
+               "\xe1\x32\x92\xfb";
+    c.inLen  = strlen(c.input);
+    c.outLen = SHA512_DIGEST_SIZE;
+
+    test_hmac[0] = a;
+    test_hmac[1] = b;
+    test_hmac[2] = c;
+
+    for (i = 0; i < times; ++i) {
+        HmacSetKey(&hmac, SHA512, (byte*)keys[i], (word32)strlen(keys[i]));
+        HmacUpdate(&hmac, (byte*)test_hmac[i].input,
+                   (word32)test_hmac[i].inLen);
+        HmacFinal(&hmac, hash);
+
+        if (memcmp(hash, test_hmac[i].output, SHA512_DIGEST_SIZE) != 0)
+            return -20 - i;
+    }
+
+    return 0;
+}
+#endif
+
+
+#ifndef NO_RC4
+int arc4_test(void)
+{
+    byte cipher[16];
+    byte plain[16];
+
+    const char* keys[] = 
+    {           
+        "\x01\x23\x45\x67\x89\xab\xcd\xef",
+        "\x01\x23\x45\x67\x89\xab\xcd\xef",
+        "\x00\x00\x00\x00\x00\x00\x00\x00",
+        "\xef\x01\x23\x45"
+    };
+
+    testVector a, b, c, d;
+    testVector test_arc4[4];
+
+    int times = sizeof(test_arc4) / sizeof(testVector), i;
+
+    a.input  = "\x01\x23\x45\x67\x89\xab\xcd\xef";
+    a.output = "\x75\xb7\x87\x80\x99\xe0\xc5\x96";
+    a.inLen  = 8;
+    a.outLen = 8;
+
+    b.input  = "\x00\x00\x00\x00\x00\x00\x00\x00";
+    b.output = "\x74\x94\xc2\xe7\x10\x4b\x08\x79";
+    b.inLen  = 8;
+    b.outLen = 8;
+
+    c.input  = "\x00\x00\x00\x00\x00\x00\x00\x00";
+    c.output = "\xde\x18\x89\x41\xa3\x37\x5d\x3a";
+    c.inLen  = 8;
+    c.outLen = 8;
+
+    d.input  = "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00";
+    d.output = "\xd6\xa1\x41\xa7\xec\x3c\x38\xdf\xbd\x61";
+    d.inLen  = 10;
+    d.outLen = 10;
+
+    test_arc4[0] = a;
+    test_arc4[1] = b;
+    test_arc4[2] = c;
+    test_arc4[3] = d;
+
+    for (i = 0; i < times; ++i) {
+        Arc4 enc;
+        Arc4 dec;
+        int  keylen = 8;  /* strlen with key 0x00 not good */
+        if (i == 3)
+            keylen = 4;
+
+#ifdef HAVE_CAVIUM
+        if (Arc4InitCavium(&enc, CAVIUM_DEV_ID) != 0)
+            return -20001; 
+        if (Arc4InitCavium(&dec, CAVIUM_DEV_ID) != 0)
+            return -20002; 
+#endif
+
+        Arc4SetKey(&enc, (byte*)keys[i], keylen);
+        Arc4SetKey(&dec, (byte*)keys[i], keylen);
+
+        Arc4Process(&enc, cipher, (byte*)test_arc4[i].input,
+                    (word32)test_arc4[i].outLen);
+        Arc4Process(&dec, plain,  cipher, (word32)test_arc4[i].outLen);
+
+        if (memcmp(plain, test_arc4[i].input, test_arc4[i].outLen))
+            return -20 - i;
+
+        if (memcmp(cipher, test_arc4[i].output, test_arc4[i].outLen))
+            return -20 - 5 - i;
+
+#ifdef HAVE_CAVIUM
+        Arc4FreeCavium(&enc);
+        Arc4FreeCavium(&dec);
+#endif
+    }
+
+    return 0;
+}
+#endif
+
+
+int hc128_test(void)
+{
+#ifdef HAVE_HC128
+    byte cipher[16];
+    byte plain[16];
+
+    const char* keys[] = 
+    {           
+        "\x80\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+        "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+        "\x00\x53\xA6\xF9\x4C\x9F\xF2\x45\x98\xEB\x3E\x91\xE4\x37\x8A\xDD",
+        "\x0F\x62\xB5\x08\x5B\xAE\x01\x54\xA7\xFA\x4D\xA0\xF3\x46\x99\xEC"
+    };
+
+    const char* ivs[] =
+    {
+        "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+        "\x80\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+        "\x0D\x74\xDB\x42\xA9\x10\x77\xDE\x45\xAC\x13\x7A\xE1\x48\xAF\x16",
+        "\x28\x8F\xF6\x5D\xC4\x2B\x92\xF9\x60\xC7\x2E\x95\xFC\x63\xCA\x31"
+    };
+
+
+    testVector a, b, c, d;
+    testVector test_hc128[4];
+
+    int times = sizeof(test_hc128) / sizeof(testVector), i;
+
+    a.input  = "\x00\x00\x00\x00\x00\x00\x00\x00";
+    a.output = "\x37\x86\x02\xB9\x8F\x32\xA7\x48";
+    a.inLen  = 8;
+    a.outLen = 8;
+
+    b.input  = "\x00\x00\x00\x00\x00\x00\x00\x00";
+    b.output = "\x33\x7F\x86\x11\xC6\xED\x61\x5F";
+    b.inLen  = 8;
+    b.outLen = 8;
+
+    c.input  = "\x00\x00\x00\x00\x00\x00\x00\x00";
+    c.output = "\x2E\x1E\xD1\x2A\x85\x51\xC0\x5A";
+    c.inLen  = 8;
+    c.outLen = 8;
+
+    d.input  = "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00";
+    d.output = "\x1C\xD8\xAE\xDD\xFE\x52\xE2\x17\xE8\x35\xD0\xB7\xE8\x4E\x29";
+    d.inLen  = 15;
+    d.outLen = 15;
+
+    test_hc128[0] = a;
+    test_hc128[1] = b;
+    test_hc128[2] = c;
+    test_hc128[3] = d;
+
+    for (i = 0; i < times; ++i) {
+        HC128 enc;
+        HC128 dec;
+
+        /* align keys/ivs in plain/cipher buffers */
+        memcpy(plain,  keys[i], 16); 
+        memcpy(cipher, ivs[i],  16); 
+
+        Hc128_SetKey(&enc, plain, cipher);
+        Hc128_SetKey(&dec, plain, cipher);
+
+        /* align input */
+        memcpy(plain, test_hc128[i].input, test_hc128[i].outLen);
+        Hc128_Process(&enc, cipher, plain,  (word32)test_hc128[i].outLen);
+        Hc128_Process(&dec, plain,  cipher, (word32)test_hc128[i].outLen);
+
+        if (memcmp(plain, test_hc128[i].input, test_hc128[i].outLen))
+            return -120 - i;
+
+        if (memcmp(cipher, test_hc128[i].output, test_hc128[i].outLen))
+            return -120 - 5 - i;
+    }
+
+#endif /* HAVE_HC128 */
+    return 0;
+}
+
+
+#ifndef NO_RABBIT
+int rabbit_test(void)
+{
+    byte cipher[16];
+    byte plain[16];
+
+    const char* keys[] = 
+    {           
+        "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+        "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+        "\xAC\xC3\x51\xDC\xF1\x62\xFC\x3B\xFE\x36\x3D\x2E\x29\x13\x28\x91"
+    };
+
+    const char* ivs[] =
+    {
+        "\x00\x00\x00\x00\x00\x00\x00\x00",
+        "\x59\x7E\x26\xC1\x75\xF5\x73\xC3",
+        0
+    };
+
+    testVector a, b, c;
+    testVector test_rabbit[3];
+
+    int times = sizeof(test_rabbit) / sizeof(testVector), i;
+
+    a.input  = "\x00\x00\x00\x00\x00\x00\x00\x00";
+    a.output = "\xED\xB7\x05\x67\x37\x5D\xCD\x7C";
+    a.inLen  = 8;
+    a.outLen = 8;
+
+    b.input  = "\x00\x00\x00\x00\x00\x00\x00\x00";
+    b.output = "\x6D\x7D\x01\x22\x92\xCC\xDC\xE0";
+    b.inLen  = 8;
+    b.outLen = 8;
+
+    c.input  = "\x00\x00\x00\x00\x00\x00\x00\x00";
+    c.output = "\x9C\x51\xE2\x87\x84\xC3\x7F\xE9";
+    c.inLen  = 8;
+    c.outLen = 8;
+
+    test_rabbit[0] = a;
+    test_rabbit[1] = b;
+    test_rabbit[2] = c;
+
+    for (i = 0; i < times; ++i) {
+        Rabbit enc;
+        Rabbit dec;
+        byte*  iv;
+
+        /* align keys/ivs in plain/cipher buffers */
+        memcpy(plain,  keys[i], 16);
+        if (ivs[i]) {
+            memcpy(cipher, ivs[i],   8);
+            iv = cipher;
+        } else
+            iv = NULL;
+        RabbitSetKey(&enc, plain, iv);
+        RabbitSetKey(&dec, plain, iv);
+
+        /* align input */
+        memcpy(plain, test_rabbit[i].input, test_rabbit[i].outLen);
+        RabbitProcess(&enc, cipher, plain,  (word32)test_rabbit[i].outLen);
+        RabbitProcess(&dec, plain,  cipher, (word32)test_rabbit[i].outLen);
+
+        if (memcmp(plain, test_rabbit[i].input, test_rabbit[i].outLen))
+            return -130 - i;
+
+        if (memcmp(cipher, test_rabbit[i].output, test_rabbit[i].outLen))
+            return -130 - 5 - i;
+    }
+
+    return 0;
+}
+#endif /* NO_RABBIT */
+
+
+#ifndef NO_DES3
+int des_test(void)
+{
+    const byte vector[] = { /* "now is the time for all " w/o trailing 0 */
+        0x6e,0x6f,0x77,0x20,0x69,0x73,0x20,0x74,
+        0x68,0x65,0x20,0x74,0x69,0x6d,0x65,0x20,
+        0x66,0x6f,0x72,0x20,0x61,0x6c,0x6c,0x20
+    };
+
+    byte plain[24];
+    byte cipher[24];
+
+    Des enc;
+    Des dec;
+
+    const byte key[] = 
+    {
+        0x01,0x23,0x45,0x67,0x89,0xab,0xcd,0xef
+    };
+
+    const byte iv[] = 
+    {
+        0x12,0x34,0x56,0x78,0x90,0xab,0xcd,0xef
+    };
+
+    const byte verify[] = 
+    {
+        0x8b,0x7c,0x52,0xb0,0x01,0x2b,0x6c,0xb8,
+        0x4f,0x0f,0xeb,0xf3,0xfb,0x5f,0x86,0x73,
+        0x15,0x85,0xb3,0x22,0x4b,0x86,0x2b,0x4b
+    };
+
+
+    Des_SetKey(&enc, key, iv, DES_ENCRYPTION);
+    Des_CbcEncrypt(&enc, cipher, vector, sizeof(vector));
+    Des_SetKey(&dec, key, iv, DES_DECRYPTION);
+    Des_CbcDecrypt(&dec, plain, cipher, sizeof(cipher));
+
+    if (memcmp(plain, vector, sizeof(plain)))
+        return -31;
+
+    if (memcmp(cipher, verify, sizeof(cipher)))
+        return -32;
+
+    return 0;
+}
+#endif /* NO_DES3 */
+
+
+#ifndef NO_DES3
+int des3_test(void)
+{
+    const byte vector[] = { /* "Now is the time for all " w/o trailing 0 */
+        0x4e,0x6f,0x77,0x20,0x69,0x73,0x20,0x74,
+        0x68,0x65,0x20,0x74,0x69,0x6d,0x65,0x20,
+        0x66,0x6f,0x72,0x20,0x61,0x6c,0x6c,0x20
+    };
+
+    byte plain[24];
+    byte cipher[24];
+
+    Des3 enc;
+    Des3 dec;
+
+    const byte key3[] = 
+    {
+        0x01,0x23,0x45,0x67,0x89,0xab,0xcd,0xef,
+        0xfe,0xde,0xba,0x98,0x76,0x54,0x32,0x10,
+        0x89,0xab,0xcd,0xef,0x01,0x23,0x45,0x67
+    };
+    const byte iv3[] = 
+    {
+        0x12,0x34,0x56,0x78,0x90,0xab,0xcd,0xef,
+        0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
+        0x11,0x21,0x31,0x41,0x51,0x61,0x71,0x81
+        
+    };
+
+    const byte verify3[] = 
+    {
+        0x43,0xa0,0x29,0x7e,0xd1,0x84,0xf8,0x0e,
+        0x89,0x64,0x84,0x32,0x12,0xd5,0x08,0x98,
+        0x18,0x94,0x15,0x74,0x87,0x12,0x7d,0xb0
+    };
+
+
+#ifdef HAVE_CAVIUM
+    if (Des3_InitCavium(&enc, CAVIUM_DEV_ID) != 0)
+        return -20005; 
+    if (Des3_InitCavium(&dec, CAVIUM_DEV_ID) != 0)
+        return -20006; 
+#endif
+    Des3_SetKey(&enc, key3, iv3, DES_ENCRYPTION);
+    Des3_SetKey(&dec, key3, iv3, DES_DECRYPTION);
+    Des3_CbcEncrypt(&enc, cipher, vector, sizeof(vector));
+    Des3_CbcDecrypt(&dec, plain, cipher, sizeof(cipher));
+
+    if (memcmp(plain, vector, sizeof(plain)))
+        return -33;
+
+    if (memcmp(cipher, verify3, sizeof(cipher)))
+        return -34;
+
+#ifdef HAVE_CAVIUM
+    Des3_FreeCavium(&enc);
+    Des3_FreeCavium(&dec);
+#endif
+    return 0;
+}
+#endif /* NO_DES */
+
+
+#ifndef NO_AES
+int aes_test(void)
+{
+    Aes enc;
+    Aes dec;
+
+    const byte msg[] = { /* "Now is the time for all " w/o trailing 0 */
+        0x6e,0x6f,0x77,0x20,0x69,0x73,0x20,0x74,
+        0x68,0x65,0x20,0x74,0x69,0x6d,0x65,0x20,
+        0x66,0x6f,0x72,0x20,0x61,0x6c,0x6c,0x20
+    };
+
+    const byte verify[] = 
+    {
+        0x95,0x94,0x92,0x57,0x5f,0x42,0x81,0x53,
+        0x2c,0xcc,0x9d,0x46,0x77,0xa2,0x33,0xcb
+    };
+
+    byte key[] = "0123456789abcdef   ";  /* align */
+    byte iv[]  = "1234567890abcdef   ";  /* align */
+
+    byte cipher[AES_BLOCK_SIZE * 4];
+    byte plain [AES_BLOCK_SIZE * 4];
+
+#ifdef HAVE_CAVIUM
+        if (AesInitCavium(&enc, CAVIUM_DEV_ID) != 0)
+            return -20003; 
+        if (AesInitCavium(&dec, CAVIUM_DEV_ID) != 0)
+            return -20004; 
+#endif
+    AesSetKey(&enc, key, AES_BLOCK_SIZE, iv, AES_ENCRYPTION);
+    AesSetKey(&dec, key, AES_BLOCK_SIZE, iv, AES_DECRYPTION);
+
+    AesCbcEncrypt(&enc, cipher, msg,   AES_BLOCK_SIZE);
+    AesCbcDecrypt(&dec, plain, cipher, AES_BLOCK_SIZE);
+
+    if (memcmp(plain, msg, AES_BLOCK_SIZE))
+        return -60;
+
+    if (memcmp(cipher, verify, AES_BLOCK_SIZE))
+        return -61;
+
+#ifdef HAVE_CAVIUM
+        AesFreeCavium(&enc);
+        AesFreeCavium(&dec);
+#endif
+#ifdef CYASSL_AES_COUNTER
+    {
+        const byte ctrKey[] = 
+        {
+            0x2b,0x7e,0x15,0x16,0x28,0xae,0xd2,0xa6,
+            0xab,0xf7,0x15,0x88,0x09,0xcf,0x4f,0x3c
+        };
+
+        const byte ctrIv[] =
+        {
+            0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,
+            0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff
+        };
+
+
+        const byte ctrPlain[] =
+        {
+            0x6b,0xc1,0xbe,0xe2,0x2e,0x40,0x9f,0x96,
+            0xe9,0x3d,0x7e,0x11,0x73,0x93,0x17,0x2a,
+            0xae,0x2d,0x8a,0x57,0x1e,0x03,0xac,0x9c,
+            0x9e,0xb7,0x6f,0xac,0x45,0xaf,0x8e,0x51,
+            0x30,0xc8,0x1c,0x46,0xa3,0x5c,0xe4,0x11,
+            0xe5,0xfb,0xc1,0x19,0x1a,0x0a,0x52,0xef,
+            0xf6,0x9f,0x24,0x45,0xdf,0x4f,0x9b,0x17,
+            0xad,0x2b,0x41,0x7b,0xe6,0x6c,0x37,0x10
+        };
+
+        const byte ctrCipher[] =
+        {
+            0x87,0x4d,0x61,0x91,0xb6,0x20,0xe3,0x26,
+            0x1b,0xef,0x68,0x64,0x99,0x0d,0xb6,0xce,
+            0x98,0x06,0xf6,0x6b,0x79,0x70,0xfd,0xff,
+            0x86,0x17,0x18,0x7b,0xb9,0xff,0xfd,0xff,
+            0x5a,0xe4,0xdf,0x3e,0xdb,0xd5,0xd3,0x5e,
+            0x5b,0x4f,0x09,0x02,0x0d,0xb0,0x3e,0xab,
+            0x1e,0x03,0x1d,0xda,0x2f,0xbe,0x03,0xd1,
+            0x79,0x21,0x70,0xa0,0xf3,0x00,0x9c,0xee
+        };
+
+        AesSetKeyDirect(&enc, ctrKey, AES_BLOCK_SIZE, ctrIv, AES_ENCRYPTION);
+        /* Ctr only uses encrypt, even on key setup */
+        AesSetKeyDirect(&dec, ctrKey, AES_BLOCK_SIZE, ctrIv, AES_ENCRYPTION);
+
+        AesCtrEncrypt(&enc, cipher, ctrPlain, AES_BLOCK_SIZE*4);
+        AesCtrEncrypt(&dec, plain, cipher, AES_BLOCK_SIZE*4);
+
+        if (memcmp(plain, ctrPlain, AES_BLOCK_SIZE*4))
+            return -66;
+
+        if (memcmp(cipher, ctrCipher, AES_BLOCK_SIZE*4))
+            return -67;
+    }
+#endif /* CYASSL_AES_COUNTER */
+
+    return 0;
+}
+
+#ifdef HAVE_AESGCM
+int aesgcm_test(void)
+{
+    Aes enc;
+
+    /*
+     * This is Test Case 16 from the document Galois/
+     * Counter Mode of Operation (GCM) by McGrew and
+     * Viega.
+     */
+    const byte k[] =
+    {
+        0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
+        0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08,
+        0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
+        0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08
+    };
+
+    const byte iv[] =
+    {
+        0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad,
+        0xde, 0xca, 0xf8, 0x88
+    };
+    
+    const byte p[] =
+    {
+        0xd9, 0x31, 0x32, 0x25, 0xf8, 0x84, 0x06, 0xe5,
+        0xa5, 0x59, 0x09, 0xc5, 0xaf, 0xf5, 0x26, 0x9a,
+        0x86, 0xa7, 0xa9, 0x53, 0x15, 0x34, 0xf7, 0xda,
+        0x2e, 0x4c, 0x30, 0x3d, 0x8a, 0x31, 0x8a, 0x72,
+        0x1c, 0x3c, 0x0c, 0x95, 0x95, 0x68, 0x09, 0x53,
+        0x2f, 0xcf, 0x0e, 0x24, 0x49, 0xa6, 0xb5, 0x25,
+        0xb1, 0x6a, 0xed, 0xf5, 0xaa, 0x0d, 0xe6, 0x57,
+        0xba, 0x63, 0x7b, 0x39
+    };
+    
+    const byte a[] =
+    {
+        0xfe, 0xed, 0xfa, 0xce, 0xde, 0xad, 0xbe, 0xef,
+        0xfe, 0xed, 0xfa, 0xce, 0xde, 0xad, 0xbe, 0xef,
+        0xab, 0xad, 0xda, 0xd2
+    };
+    
+    const byte c[] =
+    {
+        0x52, 0x2d, 0xc1, 0xf0, 0x99, 0x56, 0x7d, 0x07,
+        0xf4, 0x7f, 0x37, 0xa3, 0x2a, 0x84, 0x42, 0x7d,
+        0x64, 0x3a, 0x8c, 0xdc, 0xbf, 0xe5, 0xc0, 0xc9,
+        0x75, 0x98, 0xa2, 0xbd, 0x25, 0x55, 0xd1, 0xaa,
+        0x8c, 0xb0, 0x8e, 0x48, 0x59, 0x0d, 0xbb, 0x3d,
+        0xa7, 0xb0, 0x8b, 0x10, 0x56, 0x82, 0x88, 0x38,
+        0xc5, 0xf6, 0x1e, 0x63, 0x93, 0xba, 0x7a, 0x0a,
+        0xbc, 0xc9, 0xf6, 0x62
+    };
+
+    const byte t[] =
+    {
+        0x76, 0xfc, 0x6e, 0xce, 0x0f, 0x4e, 0x17, 0x68,
+        0xcd, 0xdf, 0x88, 0x53, 0xbb, 0x2d, 0x55, 0x1b
+    };
+
+    byte t2[sizeof(t)];
+    byte p2[sizeof(c)];
+    byte c2[sizeof(p)];
+
+    int result;
+
+    memset(t2, 0, sizeof(t2));
+    memset(c2, 0, sizeof(c2));
+    memset(p2, 0, sizeof(p2));
+
+    AesGcmSetKey(&enc, k, sizeof(k));
+    /* AES-GCM encrypt and decrypt both use AES encrypt internally */
+    AesGcmEncrypt(&enc, c2, p, sizeof(c2), iv, sizeof(iv),
+                                                 t2, sizeof(t2), a, sizeof(a));
+    if (memcmp(c, c2, sizeof(c2)))
+        return -68;
+    if (memcmp(t, t2, sizeof(t2)))
+        return -69;
+
+    result = AesGcmDecrypt(&enc, p2, c2, sizeof(p2), iv, sizeof(iv),
+                                                 t2, sizeof(t2), a, sizeof(a));
+    if (result != 0)
+        return -70;
+    if (memcmp(p, p2, sizeof(p2)))
+        return -71;
+
+    return 0;
+}
+#endif /* HAVE_AESGCM */
+
+#ifdef HAVE_AESCCM
+int aesccm_test(void)
+{
+    Aes enc;
+
+    /* key */
+    const byte k[] =
+    {
+        0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
+        0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf
+    };
+
+    /* nonce */
+    const byte iv[] =
+    {
+        0x00, 0x00, 0x00, 0x03, 0x02, 0x01, 0x00, 0xa0,
+        0xa1, 0xa2, 0xa3, 0xa4, 0xa5
+    };
+
+    /* plaintext */
+    const byte p[] =
+    {
+        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+        0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e
+    };
+
+    const byte a[] =
+    {
+        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
+    };
+
+    const byte c[] =
+    {
+        0x58, 0x8c, 0x97, 0x9a, 0x61, 0xc6, 0x63, 0xd2,
+        0xf0, 0x66, 0xd0, 0xc2, 0xc0, 0xf9, 0x89, 0x80,
+        0x6d, 0x5f, 0x6b, 0x61, 0xda, 0xc3, 0x84
+    };
+
+    const byte t[] =
+    {
+        0x17, 0xe8, 0xd1, 0x2c, 0xfd, 0xf9, 0x26, 0xe0 
+    };
+
+    byte t2[sizeof(t)];
+    byte p2[sizeof(p)];
+    byte c2[sizeof(c)];
+
+    int result;
+
+    memset(t2, 0, sizeof(t2));
+    memset(c2, 0, sizeof(c2));
+    memset(p2, 0, sizeof(p2));
+
+    AesCcmSetKey(&enc, k, sizeof(k));
+    /* AES-CCM encrypt and decrypt both use AES encrypt internally */
+    AesCcmEncrypt(&enc, c2, p, sizeof(c2), iv, sizeof(iv),
+                                                 t2, sizeof(t2), a, sizeof(a));
+    if (memcmp(c, c2, sizeof(c2)))
+        return -107;
+    if (memcmp(t, t2, sizeof(t2)))
+        return -108;
+
+    result = AesCcmDecrypt(&enc, p2, c2, sizeof(p2), iv, sizeof(iv),
+                                                 t2, sizeof(t2), a, sizeof(a));
+    if (result != 0)
+        return -109;
+    if (memcmp(p, p2, sizeof(p2)))
+        return -110;
+
+    /* Test the authentication failure */
+    t2[0]++; /* Corrupt the authentication tag. */
+    result = AesCcmDecrypt(&enc, p2, c, sizeof(p2), iv, sizeof(iv),
+                                                 t2, sizeof(t2), a, sizeof(a));
+    if (result == 0)
+        return -111;
+
+    /* Clear c2 to compare against p2. p2 should be set to zero in case of
+     * authentication fail. */
+    memset(c2, 0, sizeof(c2));
+    if (memcmp(p2, c2, sizeof(p2)))
+        return -112;
+
+    return 0;
+}
+#endif /* HAVE_AESCCM */
+
+
+#endif /* NO_AES */
+
+
+#ifdef HAVE_CAMELLIA
+
+enum {
+    CAM_ECB_ENC, CAM_ECB_DEC, CAM_CBC_ENC, CAM_CBC_DEC
+};
+
+typedef struct {
+    int type;
+    const byte* plaintext;
+    const byte* iv;
+    const byte* ciphertext;
+    const byte* key;
+    word32 keySz;
+    int errorCode;
+} test_vector_t;
+
+int camellia_test(void)
+{
+    /* Camellia ECB Test Plaintext */
+    static const byte pte[] = 
+    {
+        0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef,
+        0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10
+    };
+
+    /* Camellia ECB Test Initialization Vector */
+    static const byte ive[] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
+
+    /* Test 1: Camellia ECB 128-bit key */
+    static const byte k1[] =
+    {
+        0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef,
+        0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10
+    };
+    static const byte c1[] =
+    {
+        0x67, 0x67, 0x31, 0x38, 0x54, 0x96, 0x69, 0x73,
+        0x08, 0x57, 0x06, 0x56, 0x48, 0xea, 0xbe, 0x43
+    };
+
+    /* Test 2: Camellia ECB 192-bit key */
+    static const byte k2[] =
+    {
+        0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef,
+        0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10,
+        0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77
+    };
+    static const byte c2[] =
+    {
+        0xb4, 0x99, 0x34, 0x01, 0xb3, 0xe9, 0x96, 0xf8,
+        0x4e, 0xe5, 0xce, 0xe7, 0xd7, 0x9b, 0x09, 0xb9
+    };
+
+    /* Test 3: Camellia ECB 256-bit key */
+    static const byte k3[] =
+    {
+        0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef,
+        0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10,
+        0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77,
+        0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff
+    };
+    static const byte c3[] =
+    {
+        0x9a, 0xcc, 0x23, 0x7d, 0xff, 0x16, 0xd7, 0x6c,
+        0x20, 0xef, 0x7c, 0x91, 0x9e, 0x3a, 0x75, 0x09
+    };
+
+    /* Camellia CBC Test Plaintext */
+    static const byte ptc[] =
+    {
+        0x6B, 0xC1, 0xBE, 0xE2, 0x2E, 0x40, 0x9F, 0x96,
+        0xE9, 0x3D, 0x7E, 0x11, 0x73, 0x93, 0x17, 0x2A 
+    };
+
+    /* Camellia CBC Test Initialization Vector */
+    static const byte ivc[] =
+    {
+        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+        0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F 
+    };
+
+    /* Test 4: Camellia-CBC 128-bit key */
+    static const byte k4[] =
+    {
+        0x2B, 0x7E, 0x15, 0x16, 0x28, 0xAE, 0xD2, 0xA6,
+        0xAB, 0xF7, 0x15, 0x88, 0x09, 0xCF, 0x4F, 0x3C 
+    };
+    static const byte c4[] =
+    {
+        0x16, 0x07, 0xCF, 0x49, 0x4B, 0x36, 0xBB, 0xF0,
+        0x0D, 0xAE, 0xB0, 0xB5, 0x03, 0xC8, 0x31, 0xAB 
+    };
+
+    /* Test 5: Camellia-CBC 192-bit key */
+    static const byte k5[] =
+    {
+        0x8E, 0x73, 0xB0, 0xF7, 0xDA, 0x0E, 0x64, 0x52,
+        0xC8, 0x10, 0xF3, 0x2B, 0x80, 0x90, 0x79, 0xE5,
+        0x62, 0xF8, 0xEA, 0xD2, 0x52, 0x2C, 0x6B, 0x7B 
+    };
+    static const byte c5[] =
+    {
+        0x2A, 0x48, 0x30, 0xAB, 0x5A, 0xC4, 0xA1, 0xA2,
+        0x40, 0x59, 0x55, 0xFD, 0x21, 0x95, 0xCF, 0x93 
+    };
+
+    /* Test 6: CBC 256-bit key */
+    static const byte k6[] =
+    {
+        0x60, 0x3D, 0xEB, 0x10, 0x15, 0xCA, 0x71, 0xBE,
+        0x2B, 0x73, 0xAE, 0xF0, 0x85, 0x7D, 0x77, 0x81,
+        0x1F, 0x35, 0x2C, 0x07, 0x3B, 0x61, 0x08, 0xD7,
+        0x2D, 0x98, 0x10, 0xA3, 0x09, 0x14, 0xDF, 0xF4 
+    };
+    static const byte c6[] =
+    {
+        0xE6, 0xCF, 0xA3, 0x5F, 0xC0, 0x2B, 0x13, 0x4A,
+        0x4D, 0x2C, 0x0B, 0x67, 0x37, 0xAC, 0x3E, 0xDA 
+    };
+
+    byte out[CAMELLIA_BLOCK_SIZE];
+    Camellia cam;
+    int i, testsSz;
+    const test_vector_t testVectors[] =
+    {
+        {CAM_ECB_ENC, pte, ive, c1, k1, sizeof(k1), -114},
+        {CAM_ECB_ENC, pte, ive, c2, k2, sizeof(k2), -115},
+        {CAM_ECB_ENC, pte, ive, c3, k3, sizeof(k3), -116},
+        {CAM_ECB_DEC, pte, ive, c1, k1, sizeof(k1), -117},
+        {CAM_ECB_DEC, pte, ive, c2, k2, sizeof(k2), -118},
+        {CAM_ECB_DEC, pte, ive, c3, k3, sizeof(k3), -119},
+        {CAM_CBC_ENC, ptc, ivc, c4, k4, sizeof(k4), -120},
+        {CAM_CBC_ENC, ptc, ivc, c5, k5, sizeof(k5), -121},
+        {CAM_CBC_ENC, ptc, ivc, c6, k6, sizeof(k6), -122},
+        {CAM_CBC_DEC, ptc, ivc, c4, k4, sizeof(k4), -123},
+        {CAM_CBC_DEC, ptc, ivc, c5, k5, sizeof(k5), -124},
+        {CAM_CBC_DEC, ptc, ivc, c6, k6, sizeof(k6), -125}
+    };
+
+    if ((sizeof(pte) != CAMELLIA_BLOCK_SIZE) ||
+                                          (sizeof(ptc) != CAMELLIA_BLOCK_SIZE))
+        return -113;
+
+    testsSz = sizeof(testVectors)/sizeof(test_vector_t);
+    for (i = 0; i < testsSz; i++) {
+        CamelliaSetKey(&cam, testVectors[i].key, testVectors[i].keySz,
+                                                             testVectors[i].iv);
+
+        switch (testVectors[i].type) {
+            case CAM_ECB_ENC:
+                CamelliaEncryptDirect(&cam, out, testVectors[i].plaintext);
+                if (memcmp(out, testVectors[i].ciphertext, CAMELLIA_BLOCK_SIZE))
+                    return testVectors[i].errorCode;
+                break;
+            case CAM_ECB_DEC:
+                CamelliaDecryptDirect(&cam, out, testVectors[i].ciphertext);
+                if (memcmp(out, testVectors[i].plaintext, CAMELLIA_BLOCK_SIZE))
+                    return testVectors[i].errorCode;
+                break;
+            case CAM_CBC_ENC:
+                CamelliaCbcEncrypt(&cam, out, testVectors[i].plaintext,
+                                                           CAMELLIA_BLOCK_SIZE);
+                if (memcmp(out, testVectors[i].ciphertext, CAMELLIA_BLOCK_SIZE))
+                    return testVectors[i].errorCode;
+                break;
+            case CAM_CBC_DEC:
+                CamelliaCbcDecrypt(&cam, out, testVectors[i].ciphertext,
+                                                           CAMELLIA_BLOCK_SIZE);
+                if (memcmp(out, testVectors[i].plaintext, CAMELLIA_BLOCK_SIZE))
+                    return testVectors[i].errorCode;
+                break;
+            default:
+                break;
+        }
+    }
+
+    /* Setting the IV and checking it was actually set. */
+    CamelliaSetIV(&cam, ivc);
+    if (XMEMCMP(cam.reg, ivc, CAMELLIA_BLOCK_SIZE))
+        return -1;
+
+    /* Setting the IV to NULL should leave the IV unchanged */
+    if (CamelliaSetIV(&cam, NULL) != 0 ||
+                                    XMEMCMP(cam.reg, ive, CAMELLIA_BLOCK_SIZE))
+        return -1;
+    
+    /* First parameter should never be null */
+    if (CamelliaSetIV(NULL, NULL) == 0)
+        return -1;
+
+    /* Key should have a size of 16, 24, or 32 */
+    if (CamelliaSetKey(&cam, k1, 0, NULL) == 0)
+        return -1;
+
+    return 0;
+}
+#endif /* HAVE_CAMELLIA */
+
+
+int random_test(void)
+{
+    RNG  rng;
+    byte block[32];
+    int ret;
+
+#ifdef HAVE_CAVIUM
+    ret = InitRngCavium(&rng, CAVIUM_DEV_ID);
+    if (ret != 0) return -2007;
+#endif
+    ret = InitRng(&rng);
+    if (ret != 0) return -39;
+
+    RNG_GenerateBlock(&rng, block, sizeof(block));
+
+    return 0;
+}
+
+
+#ifdef HAVE_NTRU
+
+byte GetEntropy(ENTROPY_CMD cmd, byte* out);
+
+byte GetEntropy(ENTROPY_CMD cmd, byte* out)
+{
+    static RNG rng;
+
+    if (cmd == INIT) {
+        int ret = InitRng(&rng);
+        if (ret == 0)
+            return 1;
+        else
+            return 0;
+    }
+
+    if (out == NULL)
+        return 0;
+
+    if (cmd == GET_BYTE_OF_ENTROPY) {
+        RNG_GenerateBlock(&rng, out, 1);
+        return 1;
+    }
+
+    if (cmd == GET_NUM_BYTES_PER_BYTE_OF_ENTROPY) {
+        *out = 1;
+        return 1;
+    }
+
+    return 0;
+}
+
+#endif /* HAVE_NTRU */
+
+#ifndef NO_RSA
+
+#ifdef FREESCALE_MQX
+    static const char* clientKey  = "a:\\certs\\client-key.der";
+    static const char* clientCert = "a:\\certs\\client-cert.der";
+    #ifdef CYASSL_CERT_GEN
+        static const char* caKeyFile  = "a:\\certs\\ca-key.der";
+        static const char* caCertFile = "a:\\certs\\ca-cert.pem";
+    #endif
+#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) && defined(CYASSL_MKD_SHELL) 
+    static char* clientKey = "certs/client-key.der";
+    static char* clientCert = "certs/client-cert.der";
+    void set_clientKey(char *key) {  clientKey = key ; }      /* set by shell command */
+    void set_clientCert(char *cert) {  clientCert = cert ; }  /* set by shell command */        
+    #ifdef CYASSL_CERT_GEN
+        static char* caKeyFile  = "certs/ca-key.der";
+        static char* caCertFile = "certs/ca-cert.pem";
+        void set_caKeyFile (char * key)  { caKeyFile   = key ; }     /* set by shell command */
+        void set_caCertFile(char * cert) { caCertFile = cert ; }     /* set by shell command */
+    #endif
+#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) 
+    static const char* clientKey  = "./certs/client-key.der";
+    static const char* clientCert = "./certs/client-cert.der";
+    #ifdef CYASSL_CERT_GEN
+        static const char* caKeyFile  = "./certs/ca-key.der";
+        static const char* caCertFile = "./certs/ca-cert.pem";
+    #endif
+#endif
+
+
+
+#define FOURK_BUF 4096
+
+int rsa_test(void)
+{
+    byte*   tmp;
+    size_t bytes;
+    RsaKey key;
+    RNG    rng;
+    word32 idx = 0;
+    int    ret;
+    byte   in[] = "Everyone gets Friday off.";
+    word32 inLen = (word32)strlen((char*)in);
+    byte   out[256];
+    byte   plain[256];
+#if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048)
+    FILE*  file, * file2;
+#endif
+#ifdef CYASSL_TEST_CERT
+    DecodedCert cert;
+#endif
+
+    tmp = (byte*)malloc(FOURK_BUF);
+    if (tmp == NULL)
+        return -40;
+
+#ifdef USE_CERT_BUFFERS_1024
+    XMEMCPY(tmp, client_key_der_1024, sizeof_client_key_der_1024);
+    bytes = sizeof_client_key_der_1024;
+#elif defined(USE_CERT_BUFFERS_2048)
+    XMEMCPY(tmp, client_key_der_2048, sizeof_client_key_der_2048);
+    bytes = sizeof_client_key_der_2048;
+#else
+    file = fopen(clientKey, "rb");
+
+    if (!file)
+        err_sys("can't open ./certs/client-key.der, "
+                "Please run from CyaSSL home dir", -40);
+
+    bytes = fread(tmp, 1, FOURK_BUF, file);
+    fclose(file);
+#endif /* USE_CERT_BUFFERS */
+ 
+#ifdef HAVE_CAVIUM
+    RsaInitCavium(&key, CAVIUM_DEV_ID);
+#endif 
+    InitRsaKey(&key, 0);  
+    ret = RsaPrivateKeyDecode(tmp, &idx, &key, (word32)bytes);
+    if (ret != 0) return -41;
+
+    ret = InitRng(&rng);
+    if (ret != 0) return -42;
+
+    ret = RsaPublicEncrypt(in, inLen, out, sizeof(out), &key, &rng);
+    if (ret < 0) return -43;
+
+    ret = RsaPrivateDecrypt(out, ret, plain, sizeof(plain), &key);
+    if (ret < 0) return -44;
+
+    if (memcmp(plain, in, inLen)) return -45;
+
+    ret = RsaSSL_Sign(in, inLen, out, sizeof(out), &key, &rng);
+    if (ret < 0) return -46;
+
+    memset(plain, 0, sizeof(plain));
+    ret = RsaSSL_Verify(out, ret, plain, sizeof(plain), &key);
+    if (ret < 0) return -47;
+
+    if (memcmp(plain, in, ret)) return -48;
+
+#if defined(CYASSL_MDK_ARM)
+    #define sizeof(s) strlen((char *)(s))
+#endif
+
+#ifdef USE_CERT_BUFFERS_1024
+    XMEMCPY(tmp, client_cert_der_1024, sizeof_client_cert_der_1024);
+    bytes = sizeof_client_cert_der_1024;
+#elif defined(USE_CERT_BUFFERS_2048)
+    XMEMCPY(tmp, client_cert_der_2048, sizeof_client_cert_der_2048);
+    bytes = sizeof_client_cert_der_2048;
+#else
+    file2 = fopen(clientCert, "rb");
+    if (!file2)
+        return -49;
+
+    bytes = fread(tmp, 1, FOURK_BUF, file2);
+    fclose(file2);
+#endif
+
+#ifdef sizeof
+        #undef sizeof
+#endif      
+
+#ifdef CYASSL_TEST_CERT
+    InitDecodedCert(&cert, tmp, (word32)bytes, 0);
+
+    ret = ParseCert(&cert, CERT_TYPE, NO_VERIFY, 0);
+    if (ret != 0) return -491;
+
+    FreeDecodedCert(&cert);
+#else
+    (void)bytes;
+#endif
+
+
+#ifdef CYASSL_KEY_GEN
+    {
+        byte*  der;
+        byte*  pem;
+        int    derSz = 0;
+        int    pemSz = 0;
+        RsaKey derIn;
+        RsaKey genKey;
+        FILE* keyFile;
+        FILE* pemFile;
+
+        InitRsaKey(&genKey, 0);
+        ret = MakeRsaKey(&genKey, 1024, 65537, &rng);
+        if (ret != 0)
+            return -301;
+
+        der = (byte*)malloc(FOURK_BUF);
+        if (der == NULL)
+            return -307;
+        pem = (byte*)malloc(FOURK_BUF);
+        if (pem == NULL)
+            return -308;
+
+        derSz = RsaKeyToDer(&genKey, der, FOURK_BUF);
+        if (derSz < 0)
+            return -302;
+
+        keyFile = fopen("./key.der", "wb");
+        if (!keyFile)
+            return -303;
+        ret = (int)fwrite(der, derSz, 1, keyFile);
+        fclose(keyFile);
+
+        pemSz = DerToPem(der, derSz, pem, FOURK_BUF, PRIVATEKEY_TYPE);
+        if (pemSz < 0)
+            return -304;
+
+        pemFile = fopen("./key.pem", "wb");
+        if (!pemFile) 
+            return -305;
+        ret = (int)fwrite(pem, pemSz, 1, pemFile);
+        fclose(pemFile);
+
+        InitRsaKey(&derIn, 0);
+        idx = 0;
+        ret = RsaPrivateKeyDecode(der, &idx, &derIn, derSz);
+        if (ret != 0)
+            return -306;
+
+        FreeRsaKey(&derIn);
+        FreeRsaKey(&genKey);
+        free(pem);
+        free(der);
+    }
+#endif /* CYASSL_KEY_GEN */
+
+
+#ifdef CYASSL_CERT_GEN
+    /* self signed */
+    {
+        Cert        myCert;
+        byte*       derCert;
+        byte*       pem;
+        FILE*       derFile;
+        FILE*       pemFile;
+        int         certSz;
+        int         pemSz;
+#ifdef CYASSL_TEST_CERT
+        DecodedCert decode;
+#endif
+
+        derCert = (byte*)malloc(FOURK_BUF);
+        if (derCert == NULL)
+            return -309;
+        pem = (byte*)malloc(FOURK_BUF);
+        if (pem == NULL)
+            return -310;
+
+        InitCert(&myCert);
+
+        strncpy(myCert.subject.country, "US", CTC_NAME_SIZE);
+        strncpy(myCert.subject.state, "OR", CTC_NAME_SIZE);
+        strncpy(myCert.subject.locality, "Portland", CTC_NAME_SIZE);
+        strncpy(myCert.subject.org, "yaSSL", CTC_NAME_SIZE);
+        strncpy(myCert.subject.unit, "Development", CTC_NAME_SIZE);
+        strncpy(myCert.subject.commonName, "www.yassl.com", CTC_NAME_SIZE);
+        strncpy(myCert.subject.email, "info@yassl.com", CTC_NAME_SIZE);
+        myCert.isCA    = 1;
+        myCert.sigType = CTC_SHA256wRSA;
+
+        certSz = MakeSelfCert(&myCert, derCert, FOURK_BUF, &key, &rng); 
+        if (certSz < 0)
+            return -401;
+
+#ifdef CYASSL_TEST_CERT
+        InitDecodedCert(&decode, derCert, certSz, 0);
+        ret = ParseCert(&decode, CERT_TYPE, NO_VERIFY, 0);
+        if (ret != 0)
+            return -402;
+        FreeDecodedCert(&decode);
+#endif
+        derFile = fopen("./cert.der", "wb");
+        if (!derFile)
+            return -403;
+        ret = (int)fwrite(derCert, certSz, 1, derFile);
+        fclose(derFile);
+
+        pemSz = DerToPem(derCert, certSz, pem, FOURK_BUF, CERT_TYPE);
+        if (pemSz < 0)
+            return -404;
+
+        pemFile = fopen("./cert.pem", "wb");
+        if (!pemFile)
+            return -405;
+        ret = (int)fwrite(pem, pemSz, 1, pemFile);
+        fclose(pemFile);
+        free(pem);
+        free(derCert);
+    }
+    /* CA style */
+    {
+        RsaKey      caKey;
+        Cert        myCert;
+        byte*       derCert;
+        byte*       pem;
+        FILE*       derFile;
+        FILE*       pemFile;
+        int         certSz;
+        int         pemSz;
+        size_t      bytes3;
+        word32      idx3 = 0;
+              FILE* file3 ;
+#ifdef CYASSL_TEST_CERT
+        DecodedCert decode;
+#endif
+
+        derCert = (byte*)malloc(FOURK_BUF);
+        if (derCert == NULL)
+            return -311;
+        pem = (byte*)malloc(FOURK_BUF);
+        if (pem == NULL)
+            return -312;
+
+        file3 = fopen(caKeyFile, "rb");
+
+        if (!file3)
+            return -412;
+
+        bytes3 = fread(tmp, 1, FOURK_BUF, file3);
+        fclose(file3);
+  
+        InitRsaKey(&caKey, 0);  
+        ret = RsaPrivateKeyDecode(tmp, &idx3, &caKey, (word32)bytes3);
+        if (ret != 0) return -413;
+
+        InitCert(&myCert);
+
+        strncpy(myCert.subject.country, "US", CTC_NAME_SIZE);
+        strncpy(myCert.subject.state, "OR", CTC_NAME_SIZE);
+        strncpy(myCert.subject.locality, "Portland", CTC_NAME_SIZE);
+        strncpy(myCert.subject.org, "yaSSL", CTC_NAME_SIZE);
+        strncpy(myCert.subject.unit, "Development", CTC_NAME_SIZE);
+        strncpy(myCert.subject.commonName, "www.yassl.com", CTC_NAME_SIZE);
+        strncpy(myCert.subject.email, "info@yassl.com", CTC_NAME_SIZE);
+
+        ret = SetIssuer(&myCert, caCertFile);
+        if (ret < 0)
+            return -405;
+
+        certSz = MakeCert(&myCert, derCert, FOURK_BUF, &key, &rng); 
+        if (certSz < 0)
+            return -407;
+
+        certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng);
+        if (certSz < 0)
+            return -408;
+
+
+#ifdef CYASSL_TEST_CERT
+        InitDecodedCert(&decode, derCert, certSz, 0);
+        ret = ParseCert(&decode, CERT_TYPE, NO_VERIFY, 0);
+        if (ret != 0)
+            return -409;
+        FreeDecodedCert(&decode);
+#endif
+
+        derFile = fopen("./othercert.der", "wb");
+        if (!derFile)
+            return -410;
+        ret = (int)fwrite(derCert, certSz, 1, derFile);
+        fclose(derFile);
+
+        pemSz = DerToPem(derCert, certSz, pem, FOURK_BUF, CERT_TYPE);
+        if (pemSz < 0)
+            return -411;
+
+        pemFile = fopen("./othercert.pem", "wb");
+        if (!pemFile)
+            return -412;
+        ret = (int)fwrite(pem, pemSz, 1, pemFile);
+        fclose(pemFile);
+        free(pem);
+        free(derCert);
+        FreeRsaKey(&caKey);
+    }
+#ifdef HAVE_NTRU
+    {
+        RsaKey      caKey;
+        Cert        myCert;
+        byte*       derCert;
+        byte*       pem;
+        FILE*       derFile;
+        FILE*       pemFile;
+        FILE*       caFile;
+        FILE*       ntruPrivFile;
+        int         certSz;
+        int         pemSz;
+        size_t      bytes;
+        word32      idx = 0;
+#ifdef CYASSL_TEST_CERT
+        DecodedCert decode;
+#endif
+        derCert = (byte*)malloc(FOURK_BUF);
+        if (derCert == NULL)
+            return -311;
+        pem = (byte*)malloc(FOURK_BUF);
+        if (pem == NULL)
+            return -312;
+
+        byte   public_key[557];          /* sized for EES401EP2 */
+        word16 public_key_len;           /* no. of octets in public key */
+        byte   private_key[607];         /* sized for EES401EP2 */
+        word16 private_key_len;          /* no. of octets in private key */
+        DRBG_HANDLE drbg;
+        static uint8_t const pers_str[] = {
+                'C', 'y', 'a', 'S', 'S', 'L', ' ', 't', 'e', 's', 't'
+        };
+        word32 rc = crypto_drbg_instantiate(112, pers_str, sizeof(pers_str),
+                                            GetEntropy, &drbg);
+        if (rc != DRBG_OK)
+            return -450;
+
+        rc = crypto_ntru_encrypt_keygen(drbg, NTRU_EES401EP2, &public_key_len,
+                                        NULL, &private_key_len, NULL);
+        if (rc != NTRU_OK)
+            return -451;
+
+        rc = crypto_ntru_encrypt_keygen(drbg, NTRU_EES401EP2, &public_key_len,
+                                     public_key, &private_key_len, private_key);
+        crypto_drbg_uninstantiate(drbg);
+
+        if (rc != NTRU_OK)
+            return -452;
+
+        caFile = fopen(caKeyFile, "rb");
+
+        if (!caFile)
+            return -453;
+
+        bytes = fread(tmp, 1, FOURK_BUF, caFile);
+        fclose(caFile);
+  
+        InitRsaKey(&caKey, 0);  
+        ret = RsaPrivateKeyDecode(tmp, &idx, &caKey, (word32)bytes);
+        if (ret != 0) return -454;
+
+        InitCert(&myCert);
+
+        strncpy(myCert.subject.country, "US", CTC_NAME_SIZE);
+        strncpy(myCert.subject.state, "OR", CTC_NAME_SIZE);
+        strncpy(myCert.subject.locality, "Portland", CTC_NAME_SIZE);
+        strncpy(myCert.subject.org, "yaSSL", CTC_NAME_SIZE);
+        strncpy(myCert.subject.unit, "Development", CTC_NAME_SIZE);
+        strncpy(myCert.subject.commonName, "www.yassl.com", CTC_NAME_SIZE);
+        strncpy(myCert.subject.email, "info@yassl.com", CTC_NAME_SIZE);
+
+        ret = SetIssuer(&myCert, caCertFile);
+        if (ret < 0)
+            return -455;
+
+        certSz = MakeNtruCert(&myCert, derCert, FOURK_BUF, public_key,
+                              public_key_len, &rng); 
+        if (certSz < 0)
+            return -456;
+
+        certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng);
+        if (certSz < 0)
+            return -457;
+
+
+#ifdef CYASSL_TEST_CERT
+        InitDecodedCert(&decode, derCert, certSz, 0);
+        ret = ParseCert(&decode, CERT_TYPE, NO_VERIFY, 0);
+        if (ret != 0)
+            return -458;
+        FreeDecodedCert(&decode);
+#endif
+        derFile = fopen("./ntru-cert.der", "wb");
+        if (!derFile)
+            return -459;
+        ret = fwrite(derCert, certSz, 1, derFile);
+        fclose(derFile);
+
+        pemSz = DerToPem(derCert, certSz, pem, FOURK_BUF, CERT_TYPE);
+        if (pemSz < 0)
+            return -460;
+
+        pemFile = fopen("./ntru-cert.pem", "wb");
+        if (!pemFile)
+            return -461;
+        ret = fwrite(pem, pemSz, 1, pemFile);
+        fclose(pemFile);
+
+        ntruPrivFile = fopen("./ntru-key.raw", "wb");
+        if (!ntruPrivFile)
+            return -462;
+        ret = fwrite(private_key, private_key_len, 1, ntruPrivFile);
+        fclose(ntruPrivFile);
+        free(pem);
+        free(derCert);
+        FreeRsaKey(&caKey);
+    }
+#endif /* HAVE_NTRU */
+#endif /* CYASSL_CERT_GEN */
+
+    FreeRsaKey(&key);
+#ifdef HAVE_CAVIUM
+    RsaFreeCavium(&key);
+#endif 
+    free(tmp);
+
+    return 0;
+}
+
+#endif
+
+
+#ifndef NO_DH
+
+#ifdef FREESCALE_MQX
+    static const char* dhKey = "a:\certs\\dh2048.der";
+#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048)
+    static const char* dhKey = "./certs/dh2048.der";
+#endif
+
+int dh_test(void)
+{
+    int    ret;
+    word32 bytes;
+    word32 idx = 0, privSz, pubSz, privSz2, pubSz2, agreeSz, agreeSz2;
+    byte   tmp[1024];
+    byte   priv[256];
+    byte   pub[256];
+    byte   priv2[256];
+    byte   pub2[256];
+    byte   agree[256];
+    byte   agree2[256];
+    DhKey  key;
+    DhKey  key2;
+    RNG    rng;
+    
+        
+#ifdef USE_CERT_BUFFERS_1024
+    XMEMCPY(tmp, dh_key_der_1024, sizeof_dh_key_der_1024);
+    bytes = sizeof_dh_key_der_1024;
+#elif defined(USE_CERT_BUFFERS_2048)
+    XMEMCPY(tmp, dh_key_der_2048, sizeof_dh_key_der_2048);
+    bytes = sizeof_dh_key_der_2048;
+#else
+    FILE*  file = fopen(dhKey, "rb");
+
+    if (!file)
+        return -50;
+
+    bytes = (word32) fread(tmp, 1, sizeof(tmp), file);
+    fclose(file);
+#endif /* USE_CERT_BUFFERS */
+
+    InitDhKey(&key);  
+    InitDhKey(&key2);  
+    ret = DhKeyDecode(tmp, &idx, &key, bytes);
+    if (ret != 0)
+        return -51;
+
+    idx = 0;
+    ret = DhKeyDecode(tmp, &idx, &key2, bytes);
+    if (ret != 0)
+        return -52;
+
+    ret = InitRng(&rng);
+    if (ret != 0)
+        return -53;
+    
+    ret =  DhGenerateKeyPair(&key, &rng, priv, &privSz, pub, &pubSz);
+    ret += DhGenerateKeyPair(&key2, &rng, priv2, &privSz2, pub2, &pubSz2);
+    if (ret != 0)
+        return -54;
+
+    ret =  DhAgree(&key, agree, &agreeSz, priv, privSz, pub2, pubSz2);
+    ret += DhAgree(&key2, agree2, &agreeSz2, priv2, privSz2, pub, pubSz);
+    if (ret != 0)
+        return -55;
+
+    if (memcmp(agree, agree2, agreeSz))
+        return -56;
+
+    FreeDhKey(&key);
+    FreeDhKey(&key2);
+
+    return 0;
+}
+
+#endif /* NO_DH */
+
+
+#ifndef NO_DSA
+
+#ifdef FREESCALE_MQX
+    static const char* dsaKey = "a:\\certs\\dsa2048.der";
+#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048)
+    static const char* dsaKey = "./certs/dsa2048.der";
+#endif
+
+int dsa_test(void)
+{
+    int    ret, answer;
+    word32 bytes;
+    word32 idx = 0;
+    byte   tmp[1024];
+    DsaKey key;
+    RNG    rng;
+    Sha    sha;
+    byte   hash[SHA_DIGEST_SIZE];
+    byte   signature[40];
+
+        
+#ifdef USE_CERT_BUFFERS_1024
+    XMEMCPY(tmp, dsa_key_der_1024, sizeof_dsa_key_der_1024);
+    bytes = sizeof_dsa_key_der_1024;
+#elif defined(USE_CERT_BUFFERS_2048)
+    XMEMCPY(tmp, dsa_key_der_2048, sizeof_dsa_key_der_2048);
+    bytes = sizeof_dsa_key_der_2048;
+#else
+    FILE*  file = fopen(dsaKey, "rb");
+
+    if (!file)
+        return -60;
+
+    bytes = (word32) fread(tmp, 1, sizeof(tmp), file);
+    fclose(file);
+#endif /* USE_CERT_BUFFERS */
+  
+    InitSha(&sha);
+    ShaUpdate(&sha, tmp, bytes);
+    ShaFinal(&sha, hash);
+
+    InitDsaKey(&key);
+    ret = DsaPrivateKeyDecode(tmp, &idx, &key, bytes);
+    if (ret != 0) return -61;
+
+    ret = InitRng(&rng);
+    if (ret != 0) return -62;
+
+    ret = DsaSign(hash, signature, &key, &rng);
+    if (ret != 0) return -63;
+
+    ret = DsaVerify(hash, signature, &key, &answer);
+    if (ret != 0) return -64;
+    if (answer != 1) return -65;
+    
+    FreeDsaKey(&key);
+    
+    return 0;
+}
+
+#endif /* NO_DSA */
+
+
+#ifdef OPENSSL_EXTRA
+
+int openssl_test(void)
+{
+    EVP_MD_CTX md_ctx;
+    testVector a, b, c, d, e, f;
+    byte       hash[SHA_DIGEST_SIZE*4];  /* max size */
+
+    (void)e;
+    (void)f;
+
+    a.input  = "1234567890123456789012345678901234567890123456789012345678"
+               "9012345678901234567890";
+    a.output = "\x57\xed\xf4\xa2\x2b\xe3\xc9\x55\xac\x49\xda\x2e\x21\x07\xb6"
+               "\x7a";
+    a.inLen  = strlen(a.input);
+    a.outLen = MD5_DIGEST_SIZE;
+
+    EVP_MD_CTX_init(&md_ctx);
+    EVP_DigestInit(&md_ctx, EVP_md5());
+
+    EVP_DigestUpdate(&md_ctx, a.input, a.inLen);
+    EVP_DigestFinal(&md_ctx, hash, 0);
+
+    if (memcmp(hash, a.output, MD5_DIGEST_SIZE) != 0)
+        return -71;
+
+    b.input  = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+               "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+               "aaaaaaaaaa";
+    b.output = "\xAD\x5B\x3F\xDB\xCB\x52\x67\x78\xC2\x83\x9D\x2F\x15\x1E\xA7"
+               "\x53\x99\x5E\x26\xA0";
+    b.inLen  = strlen(b.input);
+    b.outLen = SHA_DIGEST_SIZE;
+
+    EVP_MD_CTX_init(&md_ctx);
+    EVP_DigestInit(&md_ctx, EVP_sha1());
+
+    EVP_DigestUpdate(&md_ctx, b.input, b.inLen);
+    EVP_DigestFinal(&md_ctx, hash, 0);
+
+    if (memcmp(hash, b.output, SHA_DIGEST_SIZE) != 0)
+        return -72;
+
+
+    d.input  = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq";
+    d.output = "\x24\x8D\x6A\x61\xD2\x06\x38\xB8\xE5\xC0\x26\x93\x0C\x3E\x60"
+               "\x39\xA3\x3C\xE4\x59\x64\xFF\x21\x67\xF6\xEC\xED\xD4\x19\xDB"
+               "\x06\xC1";
+    d.inLen  = strlen(d.input);
+    d.outLen = SHA256_DIGEST_SIZE;
+
+    EVP_MD_CTX_init(&md_ctx);
+    EVP_DigestInit(&md_ctx, EVP_sha256());
+
+    EVP_DigestUpdate(&md_ctx, d.input, d.inLen);
+    EVP_DigestFinal(&md_ctx, hash, 0);
+
+    if (memcmp(hash, d.output, SHA256_DIGEST_SIZE) != 0)
+        return -78;
+
+#ifdef CYASSL_SHA384
+
+    e.input  = "abcdefghbcdefghicdefghijdefghijkefghijklfghijklmghijklmnhi"
+               "jklmnoijklmnopjklmnopqklmnopqrlmnopqrsmnopqrstnopqrstu";
+    e.output = "\x09\x33\x0c\x33\xf7\x11\x47\xe8\x3d\x19\x2f\xc7\x82\xcd\x1b"
+               "\x47\x53\x11\x1b\x17\x3b\x3b\x05\xd2\x2f\xa0\x80\x86\xe3\xb0"
+               "\xf7\x12\xfc\xc7\xc7\x1a\x55\x7e\x2d\xb9\x66\xc3\xe9\xfa\x91"
+               "\x74\x60\x39";    
+    e.inLen  = strlen(e.input);
+    e.outLen = SHA384_DIGEST_SIZE;
+
+    EVP_MD_CTX_init(&md_ctx);
+    EVP_DigestInit(&md_ctx, EVP_sha384());
+
+    EVP_DigestUpdate(&md_ctx, e.input, e.inLen);
+    EVP_DigestFinal(&md_ctx, hash, 0);
+
+    if (memcmp(hash, e.output, SHA384_DIGEST_SIZE) != 0)
+        return -79;
+
+#endif /* CYASSL_SHA384 */
+
+
+#ifdef CYASSL_SHA512
+
+    f.input  = "abcdefghbcdefghicdefghijdefghijkefghijklfghijklmghijklmnhi"
+               "jklmnoijklmnopjklmnopqklmnopqrlmnopqrsmnopqrstnopqrstu";
+    f.output = "\x8e\x95\x9b\x75\xda\xe3\x13\xda\x8c\xf4\xf7\x28\x14\xfc\x14"
+               "\x3f\x8f\x77\x79\xc6\xeb\x9f\x7f\xa1\x72\x99\xae\xad\xb6\x88"
+               "\x90\x18\x50\x1d\x28\x9e\x49\x00\xf7\xe4\x33\x1b\x99\xde\xc4"
+               "\xb5\x43\x3a\xc7\xd3\x29\xee\xb6\xdd\x26\x54\x5e\x96\xe5\x5b"
+               "\x87\x4b\xe9\x09"; 
+    f.inLen  = strlen(f.input);
+    f.outLen = SHA512_DIGEST_SIZE; 
+
+    EVP_MD_CTX_init(&md_ctx);
+    EVP_DigestInit(&md_ctx, EVP_sha512());
+
+    EVP_DigestUpdate(&md_ctx, f.input, f.inLen);
+    EVP_DigestFinal(&md_ctx, hash, 0);
+
+    if (memcmp(hash, f.output, SHA512_DIGEST_SIZE) != 0)
+        return -80;
+
+#endif /* CYASSL_SHA512 */
+
+
+    if (RAND_bytes(hash, sizeof(hash)) != 1)
+        return -73;
+            
+    c.input  = "what do ya want for nothing?";
+    c.output = "\x75\x0c\x78\x3e\x6a\xb0\xb5\x03\xea\xa8\x6e\x31\x0a\x5d\xb7"
+               "\x38";
+    c.inLen  = strlen(c.input);
+    c.outLen = MD5_DIGEST_SIZE;
+
+    HMAC(EVP_md5(), "Jefe", 4, (byte*)c.input, (int)c.inLen, hash, 0);
+
+    if (memcmp(hash, c.output, MD5_DIGEST_SIZE) != 0)
+        return -74;
+
+    { /* des test */
+    const byte vector[] = { /* "now is the time for all " w/o trailing 0 */
+        0x6e,0x6f,0x77,0x20,0x69,0x73,0x20,0x74,
+        0x68,0x65,0x20,0x74,0x69,0x6d,0x65,0x20,
+        0x66,0x6f,0x72,0x20,0x61,0x6c,0x6c,0x20
+    };
+
+    byte plain[24];
+    byte cipher[24];
+
+    const_DES_cblock key = 
+    {
+        0x01,0x23,0x45,0x67,0x89,0xab,0xcd,0xef
+    };
+
+    DES_cblock iv = 
+    {
+        0x12,0x34,0x56,0x78,0x90,0xab,0xcd,0xef
+    };
+
+    DES_key_schedule sched;
+
+    const byte verify[] = 
+    {
+        0x8b,0x7c,0x52,0xb0,0x01,0x2b,0x6c,0xb8,
+        0x4f,0x0f,0xeb,0xf3,0xfb,0x5f,0x86,0x73,
+        0x15,0x85,0xb3,0x22,0x4b,0x86,0x2b,0x4b
+    };
+
+    DES_key_sched(&key, &sched);
+
+    DES_cbc_encrypt(vector, cipher, sizeof(vector), &sched, &iv, DES_ENCRYPT);
+    DES_cbc_encrypt(cipher, plain, sizeof(vector), &sched, &iv, DES_DECRYPT);
+
+    if (memcmp(plain, vector, sizeof(vector)) != 0)
+        return -75;
+
+    if (memcmp(cipher, verify, sizeof(verify)) != 0)
+        return -76;
+
+        /* test changing iv */
+    DES_ncbc_encrypt(vector, cipher, 8, &sched, &iv, DES_ENCRYPT);
+    DES_ncbc_encrypt(vector + 8, cipher + 8, 16, &sched, &iv, DES_ENCRYPT);
+
+    if (memcmp(cipher, verify, sizeof(verify)) != 0)
+        return -77;
+
+    }  /* end des test */
+
+    {  /* evp_cipher test */
+        EVP_CIPHER_CTX ctx;
+
+
+        const byte msg[] = { /* "Now is the time for all " w/o trailing 0 */
+            0x6e,0x6f,0x77,0x20,0x69,0x73,0x20,0x74,
+            0x68,0x65,0x20,0x74,0x69,0x6d,0x65,0x20,
+            0x66,0x6f,0x72,0x20,0x61,0x6c,0x6c,0x20
+        };
+
+        const byte verify[] = 
+        {
+            0x95,0x94,0x92,0x57,0x5f,0x42,0x81,0x53,
+            0x2c,0xcc,0x9d,0x46,0x77,0xa2,0x33,0xcb
+        };
+
+        byte key[] = "0123456789abcdef   ";  /* align */
+        byte iv[]  = "1234567890abcdef   ";  /* align */
+
+        byte cipher[AES_BLOCK_SIZE * 4];
+        byte plain [AES_BLOCK_SIZE * 4];
+
+        EVP_CIPHER_CTX_init(&ctx);
+        if (EVP_CipherInit(&ctx, EVP_aes_128_cbc(), key, iv, 1) == 0)
+            return -81;
+
+        if (EVP_Cipher(&ctx, cipher, (byte*)msg, 16) == 0)
+            return -82;
+
+        if (memcmp(cipher, verify, AES_BLOCK_SIZE))
+            return -83;
+
+        EVP_CIPHER_CTX_init(&ctx);
+        if (EVP_CipherInit(&ctx, EVP_aes_128_cbc(), key, iv, 0) == 0)
+            return -84;
+
+        if (EVP_Cipher(&ctx, plain, cipher, 16) == 0)
+            return -85;
+
+        if (memcmp(plain, msg, AES_BLOCK_SIZE))
+            return -86;
+
+
+    }  /* end evp_cipher test */
+
+    return 0;
+}
+
+#endif /* OPENSSL_EXTRA */
+
+
+#ifndef NO_PWDBASED
+
+int pkcs12_test(void)
+{
+    const byte passwd[] = { 0x00, 0x73, 0x00, 0x6d, 0x00, 0x65, 0x00, 0x67,
+                            0x00, 0x00 }; 
+    const byte salt[] =   { 0x0a, 0x58, 0xCF, 0x64, 0x53, 0x0d, 0x82, 0x3f };
+
+    const byte passwd2[] = { 0x00, 0x71, 0x00, 0x75, 0x00, 0x65, 0x00, 0x65,
+                             0x00, 0x67, 0x00, 0x00 }; 
+    const byte salt2[] =   { 0x16, 0x82, 0xC0, 0xfC, 0x5b, 0x3f, 0x7e, 0xc5 };
+    byte  derived[64];
+
+    const byte verify[] = {
+        0x8A, 0xAA, 0xE6, 0x29, 0x7B, 0x6C, 0xB0, 0x46,
+        0x42, 0xAB, 0x5B, 0x07, 0x78, 0x51, 0x28, 0x4E,
+        0xB7, 0x12, 0x8F, 0x1A, 0x2A, 0x7F, 0xBC, 0xA3
+    };
+
+    const byte verify2[] = {
+        0x48, 0x3D, 0xD6, 0xE9, 0x19, 0xD7, 0xDE, 0x2E,
+        0x8E, 0x64, 0x8B, 0xA8, 0xF8, 0x62, 0xF3, 0xFB,
+        0xFB, 0xDC, 0x2B, 0xCB, 0x2C, 0x02, 0x95, 0x7F
+    };
+
+    int id         =  1;
+    int kLen       = 24;
+    int iterations =  1;
+    int ret = PKCS12_PBKDF(derived, passwd, sizeof(passwd), salt, 8, iterations,
+                           kLen, SHA, id);
+
+    if (ret < 0)
+        return -103;
+
+    if ( (ret = memcmp(derived, verify, kLen)) != 0)
+        return -104;
+
+    iterations = 1000;
+    ret = PKCS12_PBKDF(derived, passwd2, sizeof(passwd2), salt2, 8, iterations, 
+                       kLen, SHA, id);
+    if (ret < 0)
+        return -105;
+
+    if ( (ret = memcmp(derived, verify2, 24)) != 0)
+        return -106;
+
+    return 0;
+}
+
+
+int pbkdf2_test(void)
+{
+    char passwd[] = "password";
+    const byte salt[] = { 0x78, 0x57, 0x8E, 0x5a, 0x5d, 0x63, 0xcb, 0x06 };
+    int   iterations = 2048;
+    int   kLen = 24;
+    byte  derived[64];
+
+    const byte verify[] = {
+        0xBF, 0xDE, 0x6B, 0xE9, 0x4D, 0xF7, 0xE1, 0x1D, 0xD4, 0x09, 0xBC, 0xE2,
+        0x0A, 0x02, 0x55, 0xEC, 0x32, 0x7C, 0xB9, 0x36, 0xFF, 0xE9, 0x36, 0x43
+
+    };
+
+    PBKDF2(derived, (byte*)passwd, (int)strlen(passwd), salt, 8, iterations,
+           kLen, SHA);
+
+    if (memcmp(derived, verify, sizeof(verify)) != 0)
+        return -102;
+
+    return 0;
+}
+
+
+int pbkdf1_test(void)
+{
+    char passwd[] = "password";
+    const byte salt[] = { 0x78, 0x57, 0x8E, 0x5a, 0x5d, 0x63, 0xcb, 0x06 };
+    int   iterations = 1000;
+    int   kLen = 16;
+    byte  derived[16];
+
+    const byte verify[] = {
+        0xDC, 0x19, 0x84, 0x7E, 0x05, 0xC6, 0x4D, 0x2F, 0xAF, 0x10, 0xEB, 0xFB,
+        0x4A, 0x3D, 0x2A, 0x20
+    };
+
+    PBKDF1(derived, (byte*)passwd, (int)strlen(passwd), salt, 8, iterations,
+           kLen, SHA);
+
+    if (memcmp(derived, verify, sizeof(verify)) != 0)
+        return -101;
+
+    return 0;
+}
+
+
+int pwdbased_test(void)
+{
+   int ret =  pbkdf1_test();
+   ret += pbkdf2_test();
+
+   return ret + pkcs12_test();
+}
+
+#endif /* NO_PWDBASED */
+
+
+#ifdef HAVE_ECC
+
+int ecc_test(void)
+{
+    RNG     rng;
+    byte    sharedA[1024];
+    byte    sharedB[1024];
+    byte    sig[1024];
+    byte    digest[20];
+    byte    exportBuf[1024];
+    word32  x, y;
+    int     i, verify, ret;
+    ecc_key userA, userB, pubKey;
+
+    ret = InitRng(&rng);
+    if (ret != 0)
+        return -1001;
+
+    ecc_init(&userA);
+    ecc_init(&userB);
+    ecc_init(&pubKey);
+
+    ret = ecc_make_key(&rng, 32, &userA);
+    ret = ecc_make_key(&rng, 32, &userB);
+
+    if (ret != 0)
+        return -1002;
+
+    x = sizeof(sharedA);
+    ret = ecc_shared_secret(&userA, &userB, sharedA, &x);
+   
+    y = sizeof(sharedB);
+    ret = ecc_shared_secret(&userB, &userA, sharedB, &y);
+    
+    if (ret != 0)
+        return -1003;
+
+    if (y != x)
+        return -1004;
+
+    if (memcmp(sharedA, sharedB, x))
+        return -1005;
+
+    x = sizeof(exportBuf);
+    ret = ecc_export_x963(&userA, exportBuf, &x);
+    if (ret != 0)
+        return -1006;
+
+    ret = ecc_import_x963(exportBuf, x, &pubKey);
+
+    if (ret != 0) 
+        return -1007;
+
+    y = sizeof(sharedB);
+    ret = ecc_shared_secret(&userB, &pubKey, sharedB, &y);
+   
+    if (ret != 0)
+        return -1008;
+
+    if (memcmp(sharedA, sharedB, y))
+        return -1010;
+
+    /* test DSA sign hash */
+    for (i = 0; i < (int)sizeof(digest); i++)
+        digest[i] = i;
+
+    x = sizeof(sig);
+    ret = ecc_sign_hash(digest, sizeof(digest), sig, &x, &rng, &userA);
+    
+    verify = 0;
+    ret = ecc_verify_hash(sig, x, digest, sizeof(digest), &verify, &userA);
+
+    if (ret != 0)
+        return -1011;
+
+    if (verify != 1)
+        return -1012;
+
+    ecc_free(&pubKey);
+    ecc_free(&userB);
+    ecc_free(&userA);
+
+    return 0;
+}
+
+#endif /* HAVE_ECC */
+
+#ifdef HAVE_LIBZ
+
+const byte sample_text[] =
+    "Biodiesel cupidatat marfa, cliche aute put a bird on it incididunt elit\n"
+    "polaroid. Sunt tattooed bespoke reprehenderit. Sint twee organic id\n"
+    "marfa. Commodo veniam ad esse gastropub. 3 wolf moon sartorial vero,\n"
+    "plaid delectus biodiesel squid +1 vice. Post-ironic keffiyeh leggings\n"
+    "selfies cray fap hoodie, forage anim. Carles cupidatat shoreditch, VHS\n"
+    "small batch meggings kogi dolore food truck bespoke gastropub.\n"
+    "\n"
+    "Terry richardson adipisicing actually typewriter tumblr, twee whatever\n"
+    "four loko you probably haven't heard of them high life. Messenger bag\n"
+    "whatever tattooed deep v mlkshk. Brooklyn pinterest assumenda chillwave\n"
+    "et, banksy ullamco messenger bag umami pariatur direct trade forage.\n"
+    "Typewriter culpa try-hard, pariatur sint brooklyn meggings. Gentrify\n"
+    "food truck next level, tousled irony non semiotics PBR ethical anim cred\n"
+    "readymade. Mumblecore brunch lomo odd future, portland organic terry\n"
+    "richardson elit leggings adipisicing ennui raw denim banjo hella. Godard\n"
+    "mixtape polaroid, pork belly readymade organic cray typewriter helvetica\n"
+    "four loko whatever street art yr farm-to-table.\n"
+    "\n"
+    "Vinyl keytar vice tofu. Locavore you probably haven't heard of them pug\n"
+    "pickled, hella tonx labore truffaut DIY mlkshk elit cosby sweater sint\n"
+    "et mumblecore. Elit swag semiotics, reprehenderit DIY sartorial nisi ugh\n"
+    "nesciunt pug pork belly wayfarers selfies delectus. Ethical hoodie\n"
+    "seitan fingerstache kale chips. Terry richardson artisan williamsburg,\n"
+    "eiusmod fanny pack irony tonx ennui lo-fi incididunt tofu YOLO\n"
+    "readymade. 8-bit sed ethnic beard officia. Pour-over iphone DIY butcher,\n"
+    "ethnic art party qui letterpress nisi proident jean shorts mlkshk\n"
+    "locavore.\n"
+    "\n"
+    "Narwhal flexitarian letterpress, do gluten-free voluptate next level\n"
+    "banh mi tonx incididunt carles DIY. Odd future nulla 8-bit beard ut\n"
+    "cillum pickled velit, YOLO officia you probably haven't heard of them\n"
+    "trust fund gastropub. Nisi adipisicing tattooed, Austin mlkshk 90's\n"
+    "small batch american apparel. Put a bird on it cosby sweater before they\n"
+    "sold out pork belly kogi hella. Street art mollit sustainable polaroid,\n"
+    "DIY ethnic ea pug beard dreamcatcher cosby sweater magna scenester nisi.\n"
+    "Sed pork belly skateboard mollit, labore proident eiusmod. Sriracha\n"
+    "excepteur cosby sweater, anim deserunt laborum eu aliquip ethical et\n"
+    "neutra PBR selvage.\n"
+    "\n"
+    "Raw denim pork belly truffaut, irony plaid sustainable put a bird on it\n"
+    "next level jean shorts exercitation. Hashtag keytar whatever, nihil\n"
+    "authentic aliquip disrupt laborum. Tattooed selfies deserunt trust fund\n"
+    "wayfarers. 3 wolf moon synth church-key sartorial, gastropub leggings\n"
+    "tattooed. Labore high life commodo, meggings raw denim fingerstache pug\n"
+    "trust fund leggings seitan forage. Nostrud ullamco duis, reprehenderit\n"
+    "incididunt flannel sustainable helvetica pork belly pug banksy you\n"
+    "probably haven't heard of them nesciunt farm-to-table. Disrupt nostrud\n"
+    "mollit magna, sriracha sartorial helvetica.\n"
+    "\n"
+    "Nulla kogi reprehenderit, skateboard sustainable duis adipisicing viral\n"
+    "ad fanny pack salvia. Fanny pack trust fund you probably haven't heard\n"
+    "of them YOLO vice nihil. Keffiyeh cray lo-fi pinterest cardigan aliqua,\n"
+    "reprehenderit aute. Culpa tousled williamsburg, marfa lomo actually anim\n"
+    "skateboard. Iphone aliqua ugh, semiotics pariatur vero readymade\n"
+    "organic. Marfa squid nulla, in laborum disrupt laboris irure gastropub.\n"
+    "Veniam sunt food truck leggings, sint vinyl fap.\n"
+    "\n"
+    "Hella dolore pork belly, truffaut carles you probably haven't heard of\n"
+    "them PBR helvetica in sapiente. Fashion axe ugh bushwick american\n"
+    "apparel. Fingerstache sed iphone, jean shorts blue bottle nisi bushwick\n"
+    "flexitarian officia veniam plaid bespoke fap YOLO lo-fi. Blog\n"
+    "letterpress mumblecore, food truck id cray brooklyn cillum ad sed.\n"
+    "Assumenda chambray wayfarers vinyl mixtape sustainable. VHS vinyl\n"
+    "delectus, culpa williamsburg polaroid cliche swag church-key synth kogi\n"
+    "magna pop-up literally. Swag thundercats ennui shoreditch vegan\n"
+    "pitchfork neutra truffaut etsy, sed single-origin coffee craft beer.\n"
+    "\n"
+    "Odio letterpress brooklyn elit. Nulla single-origin coffee in occaecat\n"
+    "meggings. Irony meggings 8-bit, chillwave lo-fi adipisicing cred\n"
+    "dreamcatcher veniam. Put a bird on it irony umami, trust fund bushwick\n"
+    "locavore kale chips. Sriracha swag thundercats, chillwave disrupt\n"
+    "tousled beard mollit mustache leggings portland next level. Nihil esse\n"
+    "est, skateboard art party etsy thundercats sed dreamcatcher ut iphone\n"
+    "swag consectetur et. Irure skateboard banjo, nulla deserunt messenger\n"
+    "bag dolor terry richardson sapiente.\n";
+
+
+int compress_test(void)
+{
+    int ret = 0;
+    word32 dSz = sizeof(sample_text);
+    word32 cSz = (dSz + (word32)(dSz * 0.001) + 12);
+    byte *c = NULL;
+    byte *d = NULL;
+
+    c = calloc(cSz, sizeof(byte));
+    d = calloc(dSz, sizeof(byte));
+
+    if (c == NULL || d == NULL)
+        ret = -300;
+
+    if (ret == 0 && (ret = Compress(c, cSz, sample_text, dSz, 0)) < 0)
+        ret = -301;
+
+    if (ret > 0) {
+        cSz = (word32)ret;
+        ret = 0;
+    }
+
+    if (ret == 0 && DeCompress(d, dSz, c, cSz) != (int)dSz)
+        ret = -302;
+
+    if (ret == 0 && memcmp(d, sample_text, dSz))
+        ret = -303;
+    
+    if (c) free(c);
+    if (d) free(d);
+
+    return ret;
+}
+
+#endif /* HAVE_LIBZ */
+
+#endif /* NO_CRYPT_TEST */
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/Abstract.txt b/IDE/MDK5-ARM/Projects/EchoClient/Abstract.txt
new file mode 100644
index 000000000..2656e4033
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/Abstract.txt
@@ -0,0 +1,22 @@
+This program is echo client with CyaSSL/wolfCrypt library.
+
+In order to run this program, 
+Copy {PACK}\wolfSSL\CyaSSL\2.8.0\cyassl\certs folder and files to the SD memory.
+Set config-EchoClient.h configuration file for the Callee IP or Port number.
+
+For further configuration, refer config-Crypt.h and config-CyaSSL.h.
+
+When testing this client, it is recommended to test against one of the standard 
+CyaSSL example applications running on a desktop machine.  The standard CyaSSL 
+example applications are located in the CyaSSL root directory under the 
+/examples directory.
+
+For the hardware crypt on config-Crypt.h, download 
+STSW-STM32062: STM32F2xx standard peripherals library at 
+http://www.st.com/. Copy Libraries\STM32F2xx_StdPeriph_Driver\{inc,src} to 
+ {PACK}\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib
+
+
+Support
+-------
+Please send questions or comments to support@wolfssl.com
\ No newline at end of file
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/EchoClient.uvoptx b/IDE/MDK5-ARM/Projects/EchoClient/EchoClient.uvoptx
new file mode 100644
index 000000000..7e61facf5
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/EchoClient.uvoptx
@@ -0,0 +1,1422 @@
+
+
+
+  1.0
+
+  
### uVision Project, (C) Keil Software

+
+  
+    *.c
+    *.s*; *.src; *.a*
+    *.obj
+    *.lib
+    *.txt; *.h; *.inc
+    *.plm
+    *.cpp
+  
+
+  
+    0
+    0
+  
+
+  
+    EchoClient
+    0x4
+    ARM-ADS
+    
+      120000000
+      
+        1
+        1
+        0
+        1
+      
+      
+        1
+        65535
+        0
+        0
+        0
+      
+      
+        79
+        66
+        8
+        .\Object\
+      
+      
+        1
+        1
+        1
+        0
+        1
+        1
+        0
+        1
+        0
+        0
+        0
+        0
+      
+      
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        0
+        0
+      
+      
+        1
+        0
+        1
+      
+      255
+      
+        SARMCM3.DLL
+        -REMAP -MPU
+        DCM.DLL
+        -pCM3
+        SARMCM3.DLL
+        -REMAP -MPU
+        TCM.DLL
+        -pCM3
+      
+      
+        0
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        0
+        1
+        1
+        0
+        0
+        8
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        .\STM32_SWO.ini
+        BIN\ULP2CM3.DLL
+      
+      
+        
+          0
+          DLGTARM
+          (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+        
+        
+          0
+          ARMDBGFLAGS
+          
+        
+        
+          0
+          ULP2CM3
+          -UP1135060 -O206 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO19 -TC120000000 -TP18 -TDX0 -TDD0 -TDS8000 -TDT0 -TDC1F -TIE1 -TIP1 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024.flm -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm)
+        
+        
+          0
+          DLGUARM
+          
+        
+        
+          0
+          UL2CM3
+          UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm))
+        
+      
+      
+      
+        
+          1
+          8
+          ((func_args*)args)->signal->port
+        
+      
+      
+        
+          2
+          8
+          0x8004dc8
+        
+      
+      
+        0
+      
+      
+        0
+        0
+        1
+        0
+        0
+        0
+        0
+        1
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        1
+        0
+        0
+        0
+        0
+      
+      
+      
+    
+  
+
+  
+    Source
+    1
+    0
+    0
+    0
+    
+      1
+      1
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      .\main.c
+      main.c
+      0
+      0
+    
+    
+      1
+      2
+      1
+      0
+      0
+      28
+      0
+      0
+      0
+      0
+      .\echoclient.c
+      echoclient.c
+      0
+      0
+    
+  
+
+  
+    Configuration
+    1
+    0
+    0
+    0
+    
+      2
+      3
+      5
+      0
+      0
+      24
+      0
+      0
+      0
+      0
+      .\config-EchoClient.h
+      config-EchoClient.h
+      0
+      0
+    
+    
+      2
+      4
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      .\RTE\wolfSSL\config-CyaSSL.h
+      config-CyaSSL.h
+      0
+      0
+    
+    
+      2
+      5
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      .\RTE\wolfSSL\config-Crypt.h
+      config-Crypt.h
+      0
+      0
+    
+  
+
+  
+    Dcumentation
+    1
+    0
+    0
+    0
+    
+      3
+      6
+      5
+      0
+      0
+      0
+      0
+      1
+      1
+      0
+      .\Abstract.txt
+      Abstract.txt
+      0
+      0
+    
+  
+
+  
+    ::CMSIS
+    0
+    0
+    0
+    1
+    
+      4
+      7
+      4
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib
+      RTX_CM3.lib
+      1
+      0
+    
+    
+      4
+      8
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\CMSIS\RTX_Conf_CM.c
+      RTX_Conf_CM.c
+      1
+      0
+    
+  
+
+  
+    ::Device
+    0
+    0
+    0
+    1
+    
+      5
+      9
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c
+      DMA_STM32F2xx.c
+      1
+      0
+    
+    
+      5
+      10
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c
+      GPIO_STM32F2xx.c
+      1
+      0
+    
+    
+      5
+      11
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Device\STM32F207IG\RTE_Device.h
+      RTE_Device.h
+      1
+      0
+    
+    
+      5
+      12
+      2
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Device\STM32F207IG\startup_stm32f2xx.s
+      startup_stm32f2xx.s
+      1
+      0
+    
+    
+      5
+      13
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Device\STM32F207IG\system_stm32f2xx.c
+      system_stm32f2xx.c
+      1
+      0
+    
+  
+
+  
+    ::Drivers
+    0
+    0
+    0
+    1
+    
+      6
+      14
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Driver\PHY_ST802RT1.c
+      PHY_ST802RT1.c
+      1
+      0
+    
+    
+      6
+      15
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\EMAC_STM32F2xx.c
+      EMAC_STM32F2xx.c
+      1
+      0
+    
+    
+      6
+      16
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c
+      MCI_STM32F2xx.c
+      1
+      0
+    
+  
+
+  
+    ::File System
+    0
+    0
+    0
+    1
+    
+      7
+      17
+      4
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib
+      FS_LFN_CM3_L.lib
+      1
+      0
+    
+    
+      7
+      18
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\File_System\FS_Config.c
+      FS_Config.c
+      1
+      0
+    
+    
+      7
+      19
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\File_System\FS_Config_MC_0.h
+      FS_Config_MC_0.h
+      1
+      0
+    
+  
+
+  
+    ::Network
+    0
+    0
+    0
+    1
+    
+      8
+      20
+      4
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Lib\ARM\Net_Dbg_CM3_L.lib
+      Net_Dbg_CM3_L.lib
+      1
+      0
+    
+    
+      8
+      21
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config.c
+      Net_Config.c
+      1
+      0
+    
+    
+      8
+      22
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_BSD.h
+      Net_Config_BSD.h
+      1
+      0
+    
+    
+      8
+      23
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_DNS_Client.h
+      Net_Config_DNS_Client.h
+      1
+      0
+    
+    
+      8
+      24
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_ETH_0.h
+      Net_Config_ETH_0.h
+      1
+      0
+    
+    
+      8
+      25
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_TCP.h
+      Net_Config_TCP.h
+      1
+      0
+    
+    
+      8
+      26
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_UDP.h
+      Net_Config_UDP.h
+      1
+      0
+    
+    
+      8
+      27
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Debug.c
+      Net_Debug.c
+      1
+      0
+    
+  
+
+  
+    ::wolfSSL
+    0
+    0
+    0
+    1
+    
+      9
+      28
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
+      cyassl_MDK_ARM.c
+      1
+      0
+    
+    
+      9
+      29
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
+      time-STM32F2xx.c
+      1
+      0
+    
+    
+      9
+      30
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c
+      aes.c
+      1
+      0
+    
+    
+      9
+      31
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c
+      arc4.c
+      1
+      0
+    
+    
+      9
+      32
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c
+      asm.c
+      1
+      0
+    
+    
+      9
+      33
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c
+      asn.c
+      1
+      0
+    
+    
+      9
+      34
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c
+      blake2b.c
+      1
+      0
+    
+    
+      9
+      35
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c
+      camellia.c
+      1
+      0
+    
+    
+      9
+      36
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c
+      coding.c
+      1
+      0
+    
+    
+      9
+      37
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c
+      compress.c
+      1
+      0
+    
+    
+      9
+      38
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c
+      des3.c
+      1
+      0
+    
+    
+      9
+      39
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c
+      dh.c
+      1
+      0
+    
+    
+      9
+      40
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c
+      dsa.c
+      1
+      0
+    
+    
+      9
+      41
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c
+      ecc.c
+      1
+      0
+    
+    
+      9
+      42
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c
+      ecc_fp.c
+      1
+      0
+    
+    
+      9
+      43
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c
+      error.c
+      1
+      0
+    
+    
+      9
+      44
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c
+      hc128.c
+      1
+      0
+    
+    
+      9
+      45
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c
+      hmac.c
+      1
+      0
+    
+    
+      9
+      46
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c
+      integer.c
+      1
+      0
+    
+    
+      9
+      47
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c
+      logging.c
+      1
+      0
+    
+    
+      9
+      48
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c
+      md2.c
+      1
+      0
+    
+    
+      9
+      49
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c
+      md4.c
+      1
+      0
+    
+    
+      9
+      50
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c
+      md5.c
+      1
+      0
+    
+    
+      9
+      51
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c
+      memory.c
+      1
+      0
+    
+    
+      9
+      52
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c
+      misc.c
+      1
+      0
+    
+    
+      9
+      53
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c
+      pwdbased.c
+      1
+      0
+    
+    
+      9
+      54
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c
+      rabbit.c
+      1
+      0
+    
+    
+      9
+      55
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c
+      random.c
+      1
+      0
+    
+    
+      9
+      56
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c
+      ripemd.c
+      1
+      0
+    
+    
+      9
+      57
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c
+      rsa.c
+      1
+      0
+    
+    
+      9
+      58
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c
+      sha.c
+      1
+      0
+    
+    
+      9
+      59
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c
+      sha256.c
+      1
+      0
+    
+    
+      9
+      60
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c
+      sha512.c
+      1
+      0
+    
+    
+      9
+      61
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c
+      tfm.c
+      1
+      0
+    
+    
+      9
+      62
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\crl.c
+      crl.c
+      1
+      0
+    
+    
+      9
+      63
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\internal.c
+      internal.c
+      1
+      0
+    
+    
+      9
+      64
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\io.c
+      io.c
+      1
+      0
+    
+    
+      9
+      65
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\keys.c
+      keys.c
+      1
+      0
+    
+    
+      9
+      66
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ocsp.c
+      ocsp.c
+      1
+      0
+    
+    
+      9
+      67
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\sniffer.c
+      sniffer.c
+      1
+      0
+    
+    
+      9
+      68
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ssl.c
+      ssl.c
+      1
+      0
+    
+    
+      9
+      69
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\tls.c
+      tls.c
+      1
+      0
+    
+    
+      9
+      70
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\wolfSSL\config-Crypt.h
+      config-Crypt.h
+      1
+      0
+    
+    
+      9
+      71
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\wolfSSL\config-CyaSSL.h
+      config-CyaSSL.h
+      1
+      0
+    
+    
+      9
+      72
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\wolfSSL\config.h
+      config.h
+      1
+      0
+    
+  
+
+
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/EchoClient.uvprojx b/IDE/MDK5-ARM/Projects/EchoClient/EchoClient.uvprojx
new file mode 100644
index 000000000..7b4076c60
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/EchoClient.uvprojx
@@ -0,0 +1,1106 @@
+
+
+
+  2.1
+
+  
### uVision Project, (C) Keil Software

+
+  
+    
+      EchoClient
+      0x4
+      ARM-ADS
+      
+        
+          STM32F207IG
+          STMicroelectronics
+          IRAM(0x20000000,0x20000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M3") CLOCK(120000000) ELITTLE
+          
+          
+          UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm))
+          0
+          $$Device:STM32F207IG$Device\Include\stm32f2xx.h
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          $$Device:STM32F207IG$SVD\STM32F20x.svd
+          0
+          0
+          
+          
+          
+          
+          
+          
+            0
+            0
+            0
+            0
+            1
+          
+          .\Object\
+          EchoClient
+          1
+          0
+          0
+          1
+          1
+          .\Object\
+          1
+          0
+          0
+          
+            0
+            0
+            
+            
+            0
+            0
+            0
+            0
+          
+          
+            0
+            0
+            
+            
+            0
+            0
+          
+          
+            0
+            0
+            
+            
+            0
+            0
+          
+          0
+          
+        
+        
+          0
+          0
+          0
+          0
+          0
+          1
+          0
+          0
+          0
+          0
+          3
+          
+          
+          1
+        
+        
+          SARMCM3.DLL
+          -REMAP -MPU
+          DCM.DLL
+          -pCM3
+          SARMCM3.DLL
+          -REMAP -MPU
+          TCM.DLL
+          -pCM3
+        
+        
+          
+            1
+            0
+            0
+            0
+            16
+          
+          
+            0
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+          
+          
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+            1
+            1
+          
+          0
+          8
+          
+            
+            
+            
+            
+            
+          
+          
+            
+            
+            
+            
+            .\STM32_SWO.ini
+            BIN\ULP2CM3.DLL
+          
+        
+        
+          
+            1
+            0
+            0
+            1
+            1
+            4100
+          
+          1
+          BIN\ULP2CM3.DLL
+          "" ()
+          
+          
+          
+          
+          0
+        
+        
+          
+            0
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+            1
+            1
+            0
+            1
+            1
+            0
+            0
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+            0
+            "Cortex-M3"
+            
+            0
+            0
+            0
+            1
+            1
+            0
+            0
+            0
+            0
+            0
+            8
+            0
+            0
+            0
+            3
+            3
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            1
+            0
+            0
+            0
+            0
+            1
+            0
+            
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x20000000
+                0x20000
+              
+              
+                1
+                0x8000000
+                0x100000
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                1
+                0x8000000
+                0x100000
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x20000000
+                0x20000
+              
+              
+                0
+                0x0
+                0x0
+              
+            
+            
+          
+          
+            1
+            4
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            
+              
+              HAVE_CONFIG_H  MDK_CONF_EchoClient CYASSL_STM32F2xx
+              
+              
+            
+          
+          
+            1
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            
+              
+              
+              
+              
+            
+          
+          
+            1
+            0
+            0
+            0
+            1
+            0
+            0x08000000
+            0x20000000
+            
+            
+            
+            
+            
+            
+          
+        
+      
+      
+        
+          Source
+          
+            
+              main.c
+              1
+              .\main.c
+            
+            
+              echoclient.c
+              1
+              .\echoclient.c
+            
+          
+        
+        
+          Configuration
+          
+            
+              config-EchoClient.h
+              5
+              .\config-EchoClient.h
+            
+            
+              config-CyaSSL.h
+              5
+              .\RTE\wolfSSL\config-CyaSSL.h
+            
+            
+              config-Crypt.h
+              5
+              .\RTE\wolfSSL\config-Crypt.h
+            
+          
+        
+        
+          Dcumentation
+          
+            
+              Abstract.txt
+              5
+              .\Abstract.txt
+            
+          
+        
+        
+          ::CMSIS
+          
+            
+              RTX_CM3.lib
+              4
+              C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib
+            
+            
+              RTX_Conf_CM.c
+              1
+              RTE\CMSIS\RTX_Conf_CM.c
+            
+          
+        
+        
+          ::Device
+          
+            
+              DMA_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c
+            
+            
+              GPIO_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c
+            
+            
+              RTE_Device.h
+              5
+              RTE\Device\STM32F207IG\RTE_Device.h
+            
+            
+              startup_stm32f2xx.s
+              2
+              RTE\Device\STM32F207IG\startup_stm32f2xx.s
+            
+            
+              system_stm32f2xx.c
+              1
+              RTE\Device\STM32F207IG\system_stm32f2xx.c
+            
+          
+        
+        
+          ::Drivers
+          
+            
+              PHY_ST802RT1.c
+              1
+              C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Driver\PHY_ST802RT1.c
+            
+            
+              EMAC_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\EMAC_STM32F2xx.c
+            
+            
+              MCI_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c
+            
+          
+        
+        
+          ::File System
+          
+            
+              FS_LFN_CM3_L.lib
+              4
+              C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib
+            
+            
+              FS_Config.c
+              1
+              RTE\File_System\FS_Config.c
+            
+            
+              FS_Config_MC_0.h
+              5
+              RTE\File_System\FS_Config_MC_0.h
+            
+          
+        
+        
+          ::Network
+          
+            
+              Net_Dbg_CM3_L.lib
+              4
+              C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Lib\ARM\Net_Dbg_CM3_L.lib
+            
+            
+              Net_Config.c
+              1
+              RTE\Network\Net_Config.c
+            
+            
+              Net_Config_BSD.h
+              5
+              RTE\Network\Net_Config_BSD.h
+            
+            
+              Net_Config_DNS_Client.h
+              5
+              RTE\Network\Net_Config_DNS_Client.h
+            
+            
+              Net_Config_ETH_0.h
+              5
+              RTE\Network\Net_Config_ETH_0.h
+            
+            
+              Net_Config_TCP.h
+              5
+              RTE\Network\Net_Config_TCP.h
+            
+            
+              Net_Config_UDP.h
+              5
+              RTE\Network\Net_Config_UDP.h
+            
+            
+              Net_Debug.c
+              1
+              RTE\Network\Net_Debug.c
+            
+          
+        
+        
+          ::wolfSSL
+          
+            
+              cyassl_MDK_ARM.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
+            
+            
+              time-STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
+            
+            
+              aes.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c
+            
+            
+              arc4.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c
+            
+            
+              asm.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c
+            
+            
+              asn.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c
+            
+            
+              blake2b.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c
+            
+            
+              camellia.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c
+            
+            
+              coding.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c
+            
+            
+              compress.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c
+            
+            
+              des3.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c
+            
+            
+              dh.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c
+            
+            
+              dsa.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c
+            
+            
+              ecc.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c
+            
+            
+              ecc_fp.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c
+            
+            
+              error.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c
+            
+            
+              hc128.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c
+            
+            
+              hmac.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c
+            
+            
+              integer.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c
+            
+            
+              logging.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c
+            
+            
+              md2.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c
+            
+            
+              md4.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c
+            
+            
+              md5.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c
+            
+            
+              memory.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c
+            
+            
+              misc.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c
+            
+            
+              pwdbased.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c
+            
+            
+              rabbit.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c
+            
+            
+              random.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c
+            
+            
+              ripemd.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c
+            
+            
+              rsa.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c
+            
+            
+              sha.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c
+            
+            
+              sha256.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c
+            
+            
+              sha512.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c
+            
+            
+              tfm.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c
+            
+            
+              crl.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\crl.c
+            
+            
+              internal.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\internal.c
+            
+            
+              io.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\io.c
+            
+            
+              keys.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\keys.c
+            
+            
+              ocsp.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ocsp.c
+            
+            
+              sniffer.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\sniffer.c
+            
+            
+              ssl.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ssl.c
+            
+            
+              tls.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\tls.c
+            
+            
+              config-Crypt.h
+              5
+              RTE\wolfSSL\config-Crypt.h
+            
+            
+              config-CyaSSL.h
+              5
+              RTE\wolfSSL\config-CyaSSL.h
+            
+            
+              config.h
+              5
+              RTE\wolfSSL\config.h
+            
+          
+        
+      
+    
+  
+
+  
+    
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+    
+    
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+    
+    
+      
+        RTE\CMSIS\RTX_Conf_CM.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\Device\STM32F207IG\RTE_Device.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Device\STM32F207IG\startup_stm32f2xx.s
+        
+        
+        
+          
+        
+      
+      
+        RTE\Device\STM32F207IG\system_stm32f2xx.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\File_System\FS_Config.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\File_System\FS_Config_MC_0.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_BSD.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_DNS_Client.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_ETH_0.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_TCP.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_UDP.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Debug.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\Other\config-Crypt.h
+        
+        
+        
+      
+      
+        RTE\Other\config-CyaSSL.h
+        
+        
+        
+      
+      
+        RTE\Other\config-RTX-TCP-FS.h
+        
+        
+        
+      
+      
+        RTE\Other\config.h
+        
+        
+        
+      
+      
+        RTE\wolfSSL\config-Crypt.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\wolfSSL\config-CyaSSL.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\wolfSSL\config.h
+        
+        
+        
+          
+        
+      
+    
+  
+
+
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/CMSIS/RTX_Conf_CM.c b/IDE/MDK5-ARM/Projects/EchoClient/RTE/CMSIS/RTX_Conf_CM.c
new file mode 100644
index 000000000..54b3e0bfc
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/CMSIS/RTX_Conf_CM.c
@@ -0,0 +1,276 @@
+/*----------------------------------------------------------------------------
+ *      RL-ARM - RTX
+ *----------------------------------------------------------------------------
+ *      Name:    RTX_Conf_CM.C
+ *      Purpose: Configuration of CMSIS RTX Kernel for Cortex-M
+ *      Rev.:    V4.70
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *  - Neither the name of ARM  nor the names of its contributors may be used 
+ *    to endorse or promote products derived from this software without 
+ *    specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *---------------------------------------------------------------------------*/
+
+#include "cmsis_os.h"
+
+
+/*----------------------------------------------------------------------------
+ *      RTX User configuration part BEGIN
+ *---------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
+//
+// Thread Configuration
+// =======================
+//
+//   Number of concurrent running threads <0-250>
+//    Defines max. number of threads that will run at the same time.
+//    Default: 6
+#ifndef OS_TASKCNT
+ #define OS_TASKCNT     5
+#endif
+
+//   Default Thread stack size [bytes] <64-4096:8><#/4>
+//    Defines default stack size for threads with osThreadDef stacksz = 0
+//    Default: 200
+#ifndef OS_STKSIZE
+ #define OS_STKSIZE     250
+#endif
+
+//   Main Thread stack size [bytes] <64-20000:8><#/4>
+//    Defines stack size for main thread.
+//    Default: 200
+#ifndef OS_MAINSTKSIZE
+ #define OS_MAINSTKSIZE 2000
+#endif
+
+//   Number of threads with user-provided stack size <0-250>
+//    Defines the number of threads with user-provided stack size.
+//    Default: 0
+#ifndef OS_PRIVCNT
+ #define OS_PRIVCNT     2
+#endif
+
+//   Total stack size [bytes] for threads with user-provided stack size <0-0x10000:8><#/4>
+//    Defines the combined stack size for threads with user-provided stack size.
+//    Default: 0
+#ifndef OS_PRIVSTKSIZE
+ #define OS_PRIVSTKSIZE 2500
+#endif
+
+// Check for stack overflow
+//  Includes the stack checking code for stack overflow.
+//  Note that additional code reduces the Kernel performance.
+#ifndef OS_STKCHECK
+ #define OS_STKCHECK    1
+#endif
+
+// Processor mode for thread execution 
+//   <0=> Unprivileged mode 
+//   <1=> Privileged mode
+//  Default: Privileged mode
+#ifndef OS_RUNPRIV
+ #define OS_RUNPRIV     1
+#endif
+
+// 
+
+// RTX Kernel Timer Tick Configuration
+// ======================================
+//  Use Cortex-M SysTick timer as RTX Kernel Timer
+//  Use the Cortex-M SysTick timer as a time-base for RTX.
+#ifndef OS_SYSTICK
+ #define OS_SYSTICK     1
+#endif
+//
+//   Timer clock value [Hz] <1-1000000000>
+//    Defines the timer clock value.
+//    Default: 12000000  (12MHz)
+#ifndef OS_CLOCK
+ #define OS_CLOCK       12000000
+#endif
+
+//   Timer tick value [us] <1-1000000>
+//    Defines the timer tick value.
+//    Default: 1000  (1ms)
+#ifndef OS_TICK
+ #define OS_TICK        1000
+#endif
+
+// 
+
+// System Configuration
+// =======================
+//
+// Round-Robin Thread switching
+// ===============================
+//
+//  Enables Round-Robin Thread switching.
+#ifndef OS_ROBIN
+ #define OS_ROBIN       1
+#endif
+
+//   Round-Robin Timeout [ticks] <1-1000>
+//    Defines how long a thread will execute before a thread switch.
+//    Default: 5
+#ifndef OS_ROBINTOUT
+ #define OS_ROBINTOUT   5
+#endif
+
+// 
+
+// User Timers
+// ==============
+//    Enables user Timers
+#ifndef OS_TIMERS
+ #define OS_TIMERS      1
+#endif
+
+//   Timer Thread Priority
+//                        <1=> Low
+//     <2=> Below Normal  <3=> Normal  <4=> Above Normal
+//                        <5=> High
+//                        <6=> Realtime (highest)
+//    Defines priority for Timer Thread
+//    Default: High
+#ifndef OS_TIMERPRIO
+ #define OS_TIMERPRIO   5
+#endif
+
+//   Timer Thread stack size [bytes] <64-64000:8><#/4>
+//    Defines stack size for Timer thread.
+//    Default: 200
+#ifndef OS_TIMERSTKSZ
+ #define OS_TIMERSTKSZ  50
+#endif
+
+//   Timer Callback Queue size <1-32>
+//    Number of concurrent active timer callback functions.
+//    Default: 4
+#ifndef OS_TIMERCBQS
+ #define OS_TIMERCBQS   4
+#endif
+
+// 
+
+//   ISR FIFO Queue size<4=>   4 entries  <8=>   8 entries
+//                         <12=> 12 entries  <16=> 16 entries
+//                         <24=> 24 entries  <32=> 32 entries
+//                         <48=> 48 entries  <64=> 64 entries
+//                         <96=> 96 entries
+//    ISR functions store requests to this buffer,
+//    when they are called from the interrupt handler.
+//    Default: 16 entries
+#ifndef OS_FIFOSZ
+ #define OS_FIFOSZ      16
+#endif
+
+// 
+
+//------------- <<< end of configuration section >>> -----------------------
+
+// Standard library system mutexes
+// ===============================
+//  Define max. number system mutexes that are used to protect 
+//  the arm standard runtime library. For microlib they are not used.
+#ifndef OS_MUTEXCNT
+ #define OS_MUTEXCNT    8
+#endif
+
+/*----------------------------------------------------------------------------
+ *      RTX User configuration part END
+ *---------------------------------------------------------------------------*/
+
+#define OS_TRV          ((uint32_t)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1)
+
+
+/*----------------------------------------------------------------------------
+ *      Global Functions
+ *---------------------------------------------------------------------------*/
+
+/*--------------------------- os_idle_demon ---------------------------------*/
+
+void os_idle_demon (void) {
+  /* The idle demon is a system thread, running when no other thread is      */
+  /* ready to run.                                                           */
+
+  for (;;) {
+    /* HERE: include optional user code to be executed when no thread runs.*/
+  }
+}
+
+#if (OS_SYSTICK == 0)   // Functions for alternative timer as RTX kernel timer
+
+/*--------------------------- os_tick_init ----------------------------------*/
+
+// Initialize alternative hardware timer as RTX kernel timer
+// Return: IRQ number of the alternative hardware timer
+int os_tick_init (void) {
+  return (-1);  /* Return IRQ number of timer (0..239) */
+}
+
+/*--------------------------- os_tick_val -----------------------------------*/
+
+// Get alternative hardware timer current value (0 .. OS_TRV)
+uint32_t os_tick_val (void) {
+  return (0);
+}
+
+/*--------------------------- os_tick_ovf -----------------------------------*/
+
+// Get alternative hardware timer overflow flag
+// Return: 1 - overflow, 0 - no overflow
+uint32_t os_tick_ovf (void) {
+  return (0);
+}
+
+/*--------------------------- os_tick_irqack --------------------------------*/
+
+// Acknowledge alternative hardware timer interrupt
+void os_tick_irqack (void) {
+  /* ... */
+}
+
+#endif   // (OS_SYSTICK == 0)
+
+/*--------------------------- os_error --------------------------------------*/
+
+void os_error (uint32_t err_code) {
+  /* This function is called when a runtime error is detected. Parameter */
+  /* 'err_code' holds the runtime error code (defined in RTL.H).         */
+
+  /* HERE: include optional code to be executed on runtime error. */
+  for (;;);
+}
+
+
+/*----------------------------------------------------------------------------
+ *      RTX Configuration Functions
+ *---------------------------------------------------------------------------*/
+
+#include "RTX_CM_lib.h"
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/Device/STM32F207IG/RTE_Device.h b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Device/STM32F207IG/RTE_Device.h
new file mode 100644
index 000000000..4a09246f3
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Device/STM32F207IG/RTE_Device.h
@@ -0,0 +1,3127 @@
+/* -----------------------------------------------------------------------------
+ * Copyright (C) 2013 ARM Limited. All rights reserved.
+ *  
+ * $Date:        27. June 2013
+ * $Revision:    V1.01
+ *  
+ * Project:      RTE Device Configuration for ST STM32F2xx
+ * -------------------------------------------------------------------------- */
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+
+#define GPIO_PORT(num) \
+ ((num == 0) ? GPIOA : \
+  (num == 1) ? GPIOB : \
+  (num == 2) ? GPIOC : \
+  (num == 3) ? GPIOD : \
+  (num == 4) ? GPIOE : \
+  (num == 5) ? GPIOF : \
+  (num == 6) ? GPIOG : \
+  (num == 7) ? GPIOH : \
+  (num == 8) ? GPIOI : \
+  NULL)
+
+
+//  Clock Configuration
+//    High-speed Internal Clock <1-999999999>
+#define RTE_HSI                         16000000
+//    High-speed External Clock <1-999999999>
+#define RTE_HSE                         25000000
+//    System Clock <1-999999999>
+#define RTE_SYSCLK                      120000000
+//    AHB Clock    <1-999999999>
+#define RTE_HCLK                        120000000
+//    APB1 Clock   <1-999999999>
+#define RTE_PCLK1                       30000000
+//    APB2 Clock   <1-999999999>
+#define RTE_PCLK2                       60000000
+//       48MHz Clock
+#define RTE_PLL48CK                     48000000
+// 
+
+
+//  USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_UART1]
+//  Configuration settings for Driver_UART1 in component ::Drivers:UART
+#define RTE_USART1                      0
+
+//    USART1_TX Pin <0=>PA9 <1=>PB6
+#define RTE_USART1_TX_ID                0
+#if    (RTE_USART1_TX_ID == 0)
+#define RTE_USART1_TX_PORT              GPIOA
+#define RTE_USART1_TX_BIT               9
+#elif  (RTE_USART1_TX_ID == 1)
+#define RTE_USART1_TX_PORT              GPIOB
+#define RTE_USART1_TX_BIT               6
+#else
+#error "Invalid USART1_TX Pin Configuration!"
+#endif
+
+//    USART1_RX Pin <0=>PA10 <1=>PB7
+#define RTE_USART1_RX_ID                0
+#if    (RTE_USART1_RX_ID == 0)
+#define RTE_USART1_RX_PORT              GPIOA
+#define RTE_USART1_RX_BIT               10
+#elif  (RTE_USART1_RX_ID == 1)
+#define RTE_USART1_RX_PORT              GPIOB
+#define RTE_USART1_RX_BIT               7
+#else
+#error "Invalid USART1_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART1_CK Pin <0=>PA8
+//     
+#define RTE_USART1_CK                   0
+#define RTE_USART1_CK_ID                0
+#if    (RTE_USART1_CK_ID == 0)
+#define RTE_USART1_CK_PORT              GPIOA
+#define RTE_USART1_CK_BIT               8
+#else
+#error "Invalid USART1_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART1_CTS Pin <0=>PA11
+//        USART1_RTS Pin <0=>PA12
+//        Manual CTS/RTS
+//     
+#define RTE_USART1_HW_FLOW              0
+#define RTE_USART1_CTS_ID               0
+#define RTE_USART1_RTS_ID               0
+#define RTE_USART1_MANUAL_FLOW          0
+#if    (RTE_USART1_CTS_ID == 0)
+#define RTE_USART1_CTS_PORT             GPIOA
+#define RTE_USART1_CTS_BIT              11
+#else
+#error "Invalid USART1_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART1_RTS_ID == 0)
+#define RTE_USART1_RTS_PORT             GPIOA
+#define RTE_USART1_RTS_BIT              12
+#else
+#error "Invalid USART1_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <2=>2 <5=>5
+//       Selects DMA Stream (only Stream 2 or 5 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART1_RX_DMA               1
+#define RTE_USART1_RX_DMA_NUMBER        2
+#define RTE_USART1_RX_DMA_STREAM        2
+#define RTE_USART1_RX_DMA_CHANNEL       4
+#define RTE_USART1_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <7=>7
+//       Selects DMA Stream (only Stream 7 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART1_TX_DMA               1
+#define RTE_USART1_TX_DMA_NUMBER        2
+#define RTE_USART1_TX_DMA_STREAM        7
+#define RTE_USART1_TX_DMA_CHANNEL       4
+#define RTE_USART1_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_UART2]
+//  Configuration settings for Driver_UART2 in component ::Drivers:UART
+#define RTE_USART2                      0
+
+//    USART2_TX Pin <0=>PA2 <1=>PD5
+#define RTE_USART2_TX_ID                0
+#if    (RTE_USART2_TX_ID == 0)
+#define RTE_USART2_TX_PORT              GPIOA
+#define RTE_USART2_TX_BIT               2
+#elif  (RTE_USART2_TX_ID == 1)
+#define RTE_USART2_TX_PORT              GPIOD
+#define RTE_USART2_TX_BIT               5
+#else
+#error "Invalid USART2_TX Pin Configuration!"
+#endif
+
+//    USART2_RX Pin <0=>PA3 <1=>PD6
+#define RTE_USART2_RX_ID                0
+#if    (RTE_USART2_RX_ID == 0)
+#define RTE_USART2_RX_PORT              GPIOA
+#define RTE_USART2_RX_BIT               3
+#elif  (RTE_USART2_RX_ID == 1)
+#define RTE_USART2_RX_PORT              GPIOD
+#define RTE_USART2_RX_BIT               6
+#else
+#error "Invalid USART2_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART2_CK Pin <0=>PA4 <1=>PD7
+//     
+#define RTE_USART2_CK                   0
+#define RTE_USART2_CK_ID                0
+#if    (RTE_USART2_CK_ID == 0)
+#define RTE_USART2_CK_PORT              GPIOA
+#define RTE_USART2_CK_BIT               4
+#elif  (RTE_USART2_CK_ID == 1)
+#define RTE_USART2_CK_PORT              GPIOD
+#define RTE_USART2_CK_BIT               7
+#else
+#error "Invalid USART2_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART2_CTS Pin <0=>PA0 <1=>PD3
+//        USART2_RTS Pin <0=>PA1 <1=>PD4
+//        Manual CTS/RTS
+//     
+#define RTE_USART2_HW_FLOW              0
+#define RTE_USART2_CTS_ID               0
+#define RTE_USART2_RTS_ID               0
+#define RTE_USART2_MANUAL_FLOW          0
+#if    (RTE_USART2_CTS_ID == 0)
+#define RTE_USART2_CTS_PORT             GPIOA
+#define RTE_USART2_CTS_BIT              0
+#elif  (RTE_USART2_CTS_ID == 1)
+#define RTE_USART2_CTS_PORT             GPIOD
+#define RTE_USART2_CTS_BIT              3
+#else
+#error "Invalid USART2_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART2_RTS_ID == 0)
+#define RTE_USART2_RTS_PORT             GPIOA
+#define RTE_USART2_RTS_BIT              1
+#elif  (RTE_USART2_RTS_ID == 1)
+#define RTE_USART2_RTS_PORT             GPIOD
+#define RTE_USART2_RTS_BIT              4
+#else
+#error "Invalid USART2_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <5=>5
+//       Selects DMA Stream (only Stream 5 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART2_RX_DMA               1
+#define RTE_USART2_RX_DMA_NUMBER        1
+#define RTE_USART2_RX_DMA_STREAM        5
+#define RTE_USART2_RX_DMA_CHANNEL       4
+#define RTE_USART2_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <6=>6
+//       Selects DMA Stream (only Stream 6 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART2_TX_DMA               1
+#define RTE_USART2_TX_DMA_NUMBER        1
+#define RTE_USART2_TX_DMA_STREAM        6
+#define RTE_USART2_TX_DMA_CHANNEL       4
+#define RTE_USART2_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_UART3]
+//  Configuration settings for Driver_UART3 in component ::Drivers:UART
+#define RTE_USART3                      0
+
+//    USART3_TX Pin <0=>PB10 <1=>PC10 <2=>PD8
+#define RTE_USART3_TX_ID                0
+#if    (RTE_USART3_TX_ID == 0)
+#define RTE_USART3_TX_PORT              GPIOB
+#define RTE_USART3_TX_BIT               10
+#elif  (RTE_USART3_TX_ID == 1)
+#define RTE_USART3_TX_PORT              GPIOC
+#define RTE_USART3_TX_BIT               10
+#elif  (RTE_USART3_TX_ID == 2)
+#define RTE_USART3_TX_PORT              GPIOD
+#define RTE_USART3_TX_BIT               8
+#else
+#error "Invalid USART3_TX Pin Configuration!"
+#endif
+
+//    USART3_RX Pin <0=>PB11 <1=>PC11 <2=>PD9
+#define RTE_USART3_RX_ID                0
+#if    (RTE_USART3_RX_ID == 0)
+#define RTE_USART3_RX_PORT              GPIOB
+#define RTE_USART3_RX_BIT               11
+#elif  (RTE_USART3_RX_ID == 1)
+#define RTE_USART3_RX_PORT              GPIOC
+#define RTE_USART3_RX_BIT               11
+#elif  (RTE_USART3_RX_ID == 2)
+#define RTE_USART3_RX_PORT              GPIOD
+#define RTE_USART3_RX_BIT               9
+#else
+#error "Invalid USART3_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART3_CK Pin <0=>PB12 <1=>PC12 <2=>PD10
+//     
+#define RTE_USART3_CK                   0
+#define RTE_USART3_CK_ID                0
+#if    (RTE_USART3_CK_ID == 0)
+#define RTE_USART3_CK_PORT              GPIOB
+#define RTE_USART3_CK_BIT               12
+#elif  (RTE_USART3_CK_ID == 1)
+#define RTE_USART3_CK_PORT              GPIOC
+#define RTE_USART3_CK_BIT               12
+#elif  (RTE_USART3_CK_ID == 2)
+#define RTE_USART3_CK_PORT              GPIOD
+#define RTE_USART3_CK_BIT               10
+#else
+#error "Invalid USART3_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART3_CTS Pin <0=>PB13 <1=>PD11
+//        USART3_RTS Pin <0=>PB14 <1=>PD12
+//        Manual CTS/RTS
+//     
+#define RTE_USART3_HW_FLOW              0
+#define RTE_USART3_CTS_ID               0
+#define RTE_USART3_RTS_ID               0
+#define RTE_USART3_MANUAL_FLOW          0
+#if    (RTE_USART3_CTS_ID == 0)
+#define RTE_USART3_CTS_PORT             GPIOB
+#define RTE_USART3_CTS_BIT              13
+#elif  (RTE_USART3_CTS_ID == 1)
+#define RTE_USART3_CTS_PORT             GPIOD
+#define RTE_USART3_CTS_BIT              11
+#else
+#error "Invalid USART3_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART3_RTS_ID == 0)
+#define RTE_USART3_RTS_PORT             GPIOB
+#define RTE_USART3_RTS_BIT              14
+#elif  (RTE_USART3_RTS_ID == 1)
+#define RTE_USART3_RTS_PORT             GPIOD
+#define RTE_USART3_RTS_BIT              12
+#else
+#error "Invalid USART3_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <1=>1
+//       Selects DMA Stream (only Stream 1 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART3_RX_DMA               1
+#define RTE_USART3_RX_DMA_NUMBER        1
+#define RTE_USART3_RX_DMA_STREAM        1
+#define RTE_USART3_RX_DMA_CHANNEL       4
+#define RTE_USART3_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <3=>3
+//       Selects DMA Stream (only Stream 3 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART3_TX_DMA               1
+#define RTE_USART3_TX_DMA_NUMBER        1
+#define RTE_USART3_TX_DMA_STREAM        3
+#define RTE_USART3_TX_DMA_CHANNEL       4
+#define RTE_USART3_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  UART4 (Universal asynchronous receiver transmitter) [Driver_UART4]
+//  Configuration settings for Driver_UART4 in component ::Drivers:UART
+#define RTE_UART4                       0
+
+//    UART4_TX Pin <0=>PA0 <1=>PC10
+#define RTE_UART4_TX_ID                 0
+#if    (RTE_UART4_TX_ID == 0)
+#define RTE_UART4_TX_PORT               GPIOA
+#define RTE_UART4_TX_BIT                0
+#elif  (RTE_UART4_TX_ID == 1)
+#define RTE_UART4_TX_PORT               GPIOC
+#define RTE_UART4_TX_BIT                10
+#else
+#error "Invalid UART4_TX Pin Configuration!"
+#endif
+
+//    UART4_RX Pin <0=>PA1 <1=>PC11
+#define RTE_UART4_RX_ID                 0
+#if    (RTE_UART4_RX_ID == 0)
+#define RTE_UART4_RX_PORT               GPIOA
+#define RTE_UART4_RX_BIT                1
+#elif  (RTE_UART4_RX_ID == 1)
+#define RTE_UART4_RX_PORT               GPIOC
+#define RTE_UART4_RX_BIT                11
+#else
+#error "Invalid UART4_RX Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2
+//       Selects DMA Stream (only Stream 2 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART4_RX_DMA                1
+#define RTE_UART4_RX_DMA_NUMBER         1
+#define RTE_UART4_RX_DMA_STREAM         2
+#define RTE_UART4_RX_DMA_CHANNEL        4
+#define RTE_UART4_RX_DMA_PRIORITY       0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <4=>4
+//       Selects DMA Stream (only Stream 4 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART4_TX_DMA                1
+#define RTE_UART4_TX_DMA_NUMBER         1
+#define RTE_UART4_TX_DMA_STREAM         4
+#define RTE_UART4_TX_DMA_CHANNEL        4
+#define RTE_UART4_TX_DMA_PRIORITY       0
+
+// 
+
+
+//  UART5 (Universal asynchronous receiver transmitter) [Driver_UART5]
+//  Configuration settings for Driver_UART5 in component ::Drivers:UART
+#define RTE_UART5                       0
+
+//    UART5_TX Pin <0=>PC12
+#define RTE_UART5_TX_ID                 0
+#if    (RTE_UART5_TX_ID == 0)
+#define RTE_UART5_TX_PORT               GPIOC
+#define RTE_UART5_TX_BIT                12
+#else
+#error "Invalid UART5_TX Pin Configuration!"
+#endif
+
+//    UART5_RX Pin <0=>PD2
+#define RTE_UART5_RX_ID                 0
+#if    (RTE_UART5_RX_ID == 0)
+#define RTE_UART5_RX_PORT               GPIOD
+#define RTE_UART5_RX_BIT                2
+#else
+#error "Invalid UART5_RX Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <0=>0
+//       Selects DMA Stream (only Stream 0 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART5_RX_DMA                1
+#define RTE_UART5_RX_DMA_NUMBER         1
+#define RTE_UART5_RX_DMA_STREAM         0
+#define RTE_UART5_RX_DMA_CHANNEL        4
+#define RTE_UART5_RX_DMA_PRIORITY       0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <7=>7
+//       Selects DMA Stream (only Stream 7 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART5_TX_DMA                1
+#define RTE_UART5_TX_DMA_NUMBER         1
+#define RTE_UART5_TX_DMA_STREAM         7
+#define RTE_UART5_TX_DMA_CHANNEL        4
+#define RTE_UART5_TX_DMA_PRIORITY       0
+
+// 
+
+
+//  USART6 (Universal synchronous asynchronous receiver transmitter) [Driver_UART6]
+//  Configuration settings for Driver_UART6 in component ::Drivers:UART
+#define RTE_USART6                      0
+
+//    USART6_TX Pin <0=>PC6 <1=>PG14
+#define RTE_USART6_TX_ID                0
+#if    (RTE_USART6_TX_ID == 0)
+#define RTE_USART6_TX_PORT              GPIOC
+#define RTE_USART6_TX_BIT               6
+#elif  (RTE_USART6_TX_ID == 1)
+#define RTE_USART6_TX_PORT              GPIOG
+#define RTE_USART6_TX_BIT               14
+#else
+#error "Invalid USART6_TX Pin Configuration!"
+#endif
+
+//    USART6_RX Pin <0=>PC7 <1=>PG9
+#define RTE_USART6_RX_ID                0
+#if    (RTE_USART6_RX_ID == 0)
+#define RTE_USART6_RX_PORT              GPIOC
+#define RTE_USART6_RX_BIT               7
+#elif  (RTE_USART6_RX_ID == 1)
+#define RTE_USART6_RX_PORT              GPIOG
+#define RTE_USART6_RX_BIT               9
+#else
+#error "Invalid USART6_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART6_CK Pin <0=>PC8 <1=>PG7
+//     
+#define RTE_USART6_CK                   0
+#define RTE_USART6_CK_ID                0
+#if    (RTE_USART6_CK_ID == 0)
+#define RTE_USART6_CK_PORT              GPIOC
+#define RTE_USART6_CK_BIT               8
+#elif  (RTE_USART6_CK_ID == 1)
+#define RTE_USART6_CK_PORT              GPIOG
+#define RTE_USART6_CK_BIT               7
+#else
+#error "Invalid USART6_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART6_CTS Pin <0=>PG13 <1=>PG15
+//        USART6_RTS Pin <0=>PG8  <1=>PG12
+//        Manual CTS/RTS
+//     
+#define RTE_USART6_HW_FLOW              0
+#define RTE_USART6_CTS_ID               0
+#define RTE_USART6_RTS_ID               0
+#define RTE_USART6_MANUAL_FLOW          0
+#if    (RTE_USART6_CTS_ID == 0)
+#define RTE_USART6_CTS_PORT             GPIOG
+#define RTE_USART6_CTS_BIT              13
+#elif  (RTE_USART6_CTS_ID == 1)
+#define RTE_USART6_CTS_PORT             GPIOG
+#define RTE_USART6_CTS_BIT              15
+#else
+#error "Invalid USART6_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART6_RTS_ID == 0)
+#define RTE_USART6_RTS_PORT             GPIOG
+#define RTE_USART6_RTS_BIT              8
+#elif  (RTE_USART6_RTS_ID == 1)
+#define RTE_USART6_RTS_PORT             GPIOG
+#define RTE_USART6_RTS_BIT              12
+#else
+#error "Invalid USART6_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <1=>1 <2=>2
+//       Selects DMA Stream (only Stream 1 or 2 can be used)
+//      Channel <5=>5
+//       Selects DMA Channel (only Channel 5 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART6_RX_DMA               1
+#define RTE_USART6_RX_DMA_NUMBER        2
+#define RTE_USART6_RX_DMA_STREAM        1
+#define RTE_USART6_RX_DMA_CHANNEL       5
+#define RTE_USART6_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <6=>6 <7=>7
+//       Selects DMA Stream (only Stream 6 or 7 can be used)
+//      Channel <5=>5
+//       Selects DMA Channel (only Channel 5 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART6_TX_DMA               1
+#define RTE_USART6_TX_DMA_NUMBER        2
+#define RTE_USART6_TX_DMA_STREAM        6
+#define RTE_USART6_TX_DMA_CHANNEL       5
+#define RTE_USART6_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  I2C1 (Inter-integrated Circuit Interface 1) [Driver_I2C1]
+//  Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        0
+
+//    I2C1_SCL Pin <0=>PB6 <1=>PB8
+#define RTE_I2C1_SCL_PORT_ID            0
+#if    (RTE_I2C1_SCL_PORT_ID == 0)
+#define RTE_I2C1_SCL_PORT               GPIOB
+#define RTE_I2C1_SCL_BIT                6
+#elif  (RTE_I2C1_SCL_PORT_ID == 1)
+#define RTE_I2C1_SCL_PORT               GPIOB
+#define RTE_I2C1_SCL_BIT                8
+#else
+#error "Invalid I2C1_SCL Pin Configuration!"
+#endif
+
+//    I2C1_SDA Pin <0=>PB7 <1=>PB9
+#define RTE_I2C1_SDA_PORT_ID            0
+#if    (RTE_I2C1_SDA_PORT_ID == 0)
+#define RTE_I2C1_SDA_PORT               GPIOB
+#define RTE_I2C1_SDA_BIT                7
+#elif  (RTE_I2C1_SDA_PORT_ID == 1)
+#define RTE_I2C1_SDA_PORT               GPIOB
+#define RTE_I2C1_SDA_BIT                9
+#else
+#error "Invalid I2C1_SDA Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <0=>0 <5=>5
+//       Selects DMA Stream (only Stream 0 or 5 can be used)
+//      Channel <1=>1
+//       Selects DMA Channel (only Channel 1 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C1_RX_DMA                 1
+#define RTE_I2C1_RX_DMA_NUMBER          1
+#define RTE_I2C1_RX_DMA_STREAM          0
+#define RTE_I2C1_RX_DMA_CHANNEL         1
+#define RTE_I2C1_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <6=>6 <7=>7
+//       Selects DMA Stream (only Stream 6 or 7 can be used)
+//      Channel <1=>1
+//       Selects DMA Channel (only Channel 1 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C1_TX_DMA                 1
+#define RTE_I2C1_TX_DMA_NUMBER          1
+#define RTE_I2C1_TX_DMA_STREAM          6
+#define RTE_I2C1_TX_DMA_CHANNEL         1
+#define RTE_I2C1_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  I2C2 (Inter-integrated Circuit Interface 2) [Driver_I2C2]
+//  Configuration settings for Driver_I2C2 in component ::Drivers:I2C
+#define RTE_I2C2                        0
+
+//    I2C2_SCL Pin <0=>PF1 <1=>PH4 <2=>PB10
+#define RTE_I2C2_SCL_PORT_ID            0
+#if    (RTE_I2C2_SCL_PORT_ID == 0)
+#define RTE_I2C2_SCL_PORT               GPIOF
+#define RTE_I2C2_SCL_BIT                1
+#elif  (RTE_I2C2_SCL_PORT_ID == 1)
+#define RTE_I2C2_SCL_PORT               GPIOH
+#define RTE_I2C2_SCL_BIT                4
+#elif  (RTE_I2C2_SCL_PORT_ID == 2)
+#define RTE_I2C2_SCL_PORT               GPIOB
+#define RTE_I2C2_SCL_BIT                10
+#else
+#error "Invalid I2C2_SCL Pin Configuration!"
+#endif
+
+//    I2C2_SDA Pin <0=>PF0 <1=>PH5 <2=>PB11
+#define RTE_I2C2_SDA_PORT_ID            0
+#if    (RTE_I2C2_SDA_PORT_ID == 0)
+#define RTE_I2C2_SDA_PORT               GPIOF
+#define RTE_I2C2_SDA_BIT                0
+#elif  (RTE_I2C2_SDA_PORT_ID == 1)
+#define RTE_I2C2_SDA_PORT               GPIOH
+#define RTE_I2C2_SDA_BIT                5
+#elif  (RTE_I2C2_SDA_PORT_ID == 2)
+#define RTE_I2C2_SDA_PORT               GPIOB
+#define RTE_I2C2_SDA_BIT                11
+#else
+#error "Invalid I2C2_SCL Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2 <3=>3
+//       Selects DMA Stream (only Stream 2 or 3 can be used)
+//      Channel <7=>7
+//       Selects DMA Channel (only Channel 7 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C2_RX_DMA                 1
+#define RTE_I2C2_RX_DMA_NUMBER          1
+#define RTE_I2C2_RX_DMA_STREAM          2
+#define RTE_I2C2_RX_DMA_CHANNEL         7
+#define RTE_I2C2_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <7=>7
+//       Selects DMA Stream (only Stream 7 can be used)
+//      Channel <7=>7
+//       Selects DMA Channel (only Channel 1 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C2_TX_DMA                 1
+#define RTE_I2C2_TX_DMA_NUMBER          1
+#define RTE_I2C2_TX_DMA_STREAM          7
+#define RTE_I2C2_TX_DMA_CHANNEL         7
+#define RTE_I2C2_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  I2C3 (Inter-integrated Circuit Interface 3) [Driver_I2C3]
+//  Configuration settings for Driver_I2C3 in component ::Drivers:I2C
+#define RTE_I2C3                        0
+
+//    I2C3_SCL Pin <0=>PH7 <1=>PA8
+#define RTE_I2C3_SCL_PORT_ID            0
+#if    (RTE_I2C3_SCL_PORT_ID == 0)
+#define RTE_I2C3_SCL_PORT               GPIOH
+#define RTE_I2C3_SCL_BIT                7
+#elif  (RTE_I2C3_SCL_PORT_ID == 1)
+#define RTE_I2C3_SCL_PORT               GPIOA
+#define RTE_I2C3_SCL_BIT                8
+#else
+#error "Invalid I2C3_SCL Pin Configuration!"
+#endif
+
+//    I2C3_SDA Pin <0=>PH8 <1=>PC9
+#define RTE_I2C3_SDA_PORT_ID            0
+#if    (RTE_I2C3_SDA_PORT_ID == 0)
+#define RTE_I2C3_SDA_PORT               GPIOH
+#define RTE_I2C3_SDA_BIT                8
+#elif  (RTE_I2C3_SDA_PORT_ID == 1)
+#define RTE_I2C3_SDA_PORT               GPIOC
+#define RTE_I2C3_SDA_BIT                9
+#else
+#error "Invalid I2C3_SCL Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2
+//       Selects DMA Stream (only Stream 2 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C3_RX_DMA                 1
+#define RTE_I2C3_RX_DMA_NUMBER          1
+#define RTE_I2C3_RX_DMA_STREAM          2
+#define RTE_I2C3_RX_DMA_CHANNEL         3
+#define RTE_I2C3_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <4=>4
+//       Selects DMA Stream (only Stream 4 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C3_TX_DMA                 1
+#define RTE_I2C3_TX_DMA_NUMBER          1
+#define RTE_I2C3_TX_DMA_STREAM          4
+#define RTE_I2C3_TX_DMA_CHANNEL         3
+#define RTE_I2C3_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SPI1 (Serial Peripheral Interface 1) [Driver_SPI1]
+//  Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        0
+
+//    SPI1_NSS Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SPI1_NSS_PIN                1
+#define RTE_SPI1_NSS_PORT               GPIO_PORT(0)
+#define RTE_SPI1_NSS_BIT                4
+
+//    SPI1_SCK Pin <0=>PA5 <1=>PB3
+#define RTE_SPI1_SCL_PORT_ID            0
+#if    (RTE_SPI1_SCL_PORT_ID == 0)
+#define RTE_SPI1_SCL_PORT               GPIOA
+#define RTE_SPI1_SCL_BIT                5
+#elif  (RTE_SPI1_SCL_PORT_ID == 1)
+#define RTE_SPI1_SCL_PORT               GPIOB
+#define RTE_SPI1_SCL_BIT                3
+#else
+#error "Invalid SPI1_SCK Pin Configuration!"
+#endif
+
+//    SPI1_MISO Pin <0=>PA6 <1=>PB4
+#define RTE_SPI1_MISO_PORT_ID           0
+#if    (RTE_SPI1_MISO_PORT_ID == 0)
+#define RTE_SPI1_MISO_PORT              GPIOA
+#define RTE_SPI1_MISO_BIT               6
+#elif  (RTE_SPI1_MISO_PORT_ID == 1)
+#define RTE_SPI1_MISO_PORT              GPIOB
+#define RTE_SPI1_MISO_BIT               4
+#else
+#error "Invalid SPI1_MISO Pin Configuration!"
+#endif
+
+//    SPI1_MOSI Pin <0=>PA7 <1=>PB5
+#define RTE_SPI1_MOSI_PORT_ID           0
+#if    (RTE_SPI1_MOSI_PORT_ID == 0)
+#define RTE_SPI1_MOSI_PORT              GPIOA
+#define RTE_SPI1_MOSI_BIT               7
+#elif  (RTE_SPI1_MOSI_PORT_ID == 1)
+#define RTE_SPI1_MOSI_PORT              GPIOB
+#define RTE_SPI1_MOSI_BIT               5
+#else
+#error "Invalid SPI1_MISO Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <0=>0 <2=>2
+//       Selects DMA Stream (only Stream 0 or 2 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI1_RX_DMA                 1
+#define RTE_SPI1_RX_DMA_NUMBER          2
+#define RTE_SPI1_RX_DMA_STREAM          0
+#define RTE_SPI1_RX_DMA_CHANNEL         3
+#define RTE_SPI1_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <3=>3 <5=>5
+//       Selects DMA Stream (only Stream 3 or 5 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI1_TX_DMA                 1
+#define RTE_SPI1_TX_DMA_NUMBER          2
+#define RTE_SPI1_TX_DMA_STREAM          5
+#define RTE_SPI1_TX_DMA_CHANNEL         3
+#define RTE_SPI1_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SPI2 (Serial Peripheral Interface 2) [Driver_SPI2]
+//  Configuration settings for Driver_SPI2 in component ::Drivers:SPI
+#define RTE_SPI2                        0
+
+//    SPI2_NSS Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SPI2_NSS_PIN                1
+#define RTE_SPI2_NSS_PORT               GPIO_PORT(1)
+#define RTE_SPI2_NSS_BIT                12
+
+//    SPI2_SCK Pin <0=>PB10 <1=>PB13 <2=>PI1
+#define RTE_SPI2_SCL_PORT_ID            0
+#if    (RTE_SPI2_SCL_PORT_ID == 0)
+#define RTE_SPI2_SCL_PORT               GPIOB
+#define RTE_SPI2_SCL_BIT                10
+#elif  (RTE_SPI2_SCL_PORT_ID == 1)
+#define RTE_SPI2_SCL_PORT               GPIOB
+#define RTE_SPI2_SCL_BIT                13
+#elif  (RTE_SPI2_SCL_PORT_ID == 2)
+#define RTE_SPI2_SCL_PORT               GPIOI
+#define RTE_SPI2_SCL_BIT                1
+#else
+#error "Invalid SPI2_SCK Pin Configuration!"
+#endif
+
+//    SPI2_MISO Pin <0=>PB14 <1=>PC2 <2=>PI2
+#define RTE_SPI2_MISO_PORT_ID           0
+#if    (RTE_SPI2_MISO_PORT_ID == 0)
+#define RTE_SPI2_MISO_PORT              GPIOB
+#define RTE_SPI2_MISO_BIT               14
+#elif  (RTE_SPI2_MISO_PORT_ID == 1)
+#define RTE_SPI2_MISO_PORT              GPIOC
+#define RTE_SPI2_MISO_BIT               2
+#elif  (RTE_SPI2_MISO_PORT_ID == 2)
+#define RTE_SPI2_MISO_PORT              GPIOI
+#define RTE_SPI2_MISO_BIT               2
+#else
+#error "Invalid SPI2_MISO Pin Configuration!"
+#endif
+
+//    SPI2_MOSI Pin <0=>PB15 <1=>PC3 <2=>OI3
+#define RTE_SPI2_MOSI_PORT_ID           0
+#if    (RTE_SPI2_MOSI_PORT_ID == 0)
+#define RTE_SPI2_MOSI_PORT              GPIOB
+#define RTE_SPI2_MOSI_BIT               15
+#elif  (RTE_SPI2_MOSI_PORT_ID == 1)
+#define RTE_SPI2_MOSI_PORT              GPIOC
+#define RTE_SPI2_MOSI_BIT               3
+#elif  (RTE_SPI2_MOSI_PORT_ID == 2)
+#define RTE_SPI2_MOSI_PORT              GPIOI
+#define RTE_SPI2_MOSI_BIT               3
+#else
+#error "Invalid SPI2_MISO Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2
+//       Selects DMA Stream (only Stream 2 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI2_RX_DMA                 1
+#define RTE_SPI2_RX_DMA_NUMBER          1
+#define RTE_SPI2_RX_DMA_STREAM          2
+#define RTE_SPI2_RX_DMA_CHANNEL         0
+#define RTE_SPI2_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <3=>3
+//       Selects DMA Stream (only Stream 3 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI2_TX_DMA                 1
+#define RTE_SPI2_TX_DMA_NUMBER          1
+#define RTE_SPI2_TX_DMA_STREAM          3
+#define RTE_SPI2_TX_DMA_CHANNEL         0
+#define RTE_SPI2_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SPI3 (Serial Peripheral Interface 3) [Driver_SPI3]
+//  Configuration settings for Driver_SPI3 in component ::Drivers:SPI
+#define RTE_SPI3                        0
+
+//    SPI3_NSS Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SPI3_NSS_PIN                1
+#define RTE_SPI3_NSS_PORT               GPIO_PORT(0)
+#define RTE_SPI3_NSS_BIT                15
+
+//    SPI3_SCK Pin <0=>PB3 <1=>PC10
+#define RTE_SPI3_SCL_PORT_ID            0
+#if    (RTE_SPI3_SCL_PORT_ID == 0)
+#define RTE_SPI3_SCL_PORT               GPIOB
+#define RTE_SPI3_SCL_BIT                3
+#elif  (RTE_SPI3_SCL_PORT_ID == 1)
+#define RTE_SPI3_SCL_PORT               GPIOC
+#define RTE_SPI3_SCL_BIT                10
+#else
+#error "Invalid SPI3_SCK Pin Configuration!"
+#endif
+
+//    SPI3_MISO Pin <0=>PB4 <1=>PC11
+#define RTE_SPI3_MISO_PORT_ID           0
+#if    (RTE_SPI3_MISO_PORT_ID == 0)
+#define RTE_SPI3_MISO_PORT              GPIOB
+#define RTE_SPI3_MISO_BIT               4
+#elif  (RTE_SPI3_MISO_PORT_ID == 1)
+#define RTE_SPI3_MISO_PORT              GPIOC
+#define RTE_SPI3_MISO_BIT               11
+#else
+#error "Invalid SPI3_MISO Pin Configuration!"
+#endif
+
+//    SPI3_MOSI Pin <0=>PB5 <1=>PC12
+#define RTE_SPI3_MOSI_PORT_ID           0
+#if    (RTE_SPI3_MOSI_PORT_ID == 0)
+#define RTE_SPI3_MOSI_PORT              GPIOB
+#define RTE_SPI3_MOSI_BIT               5
+#elif  (RTE_SPI3_MOSI_PORT_ID == 1)
+#define RTE_SPI3_MOSI_PORT              GPIOC
+#define RTE_SPI3_MOSI_BIT               12
+#else
+#error "Invalid SPI3_MISO Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <0=>0 <2=>2
+//       Selects DMA Stream (only Stream 0 or 2 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI3_RX_DMA                 1
+#define RTE_SPI3_RX_DMA_NUMBER          1
+#define RTE_SPI3_RX_DMA_STREAM          0
+#define RTE_SPI3_RX_DMA_CHANNEL         0
+#define RTE_SPI3_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <5=>5 <7=>7
+//       Selects DMA Stream (only Stream 5 or 7 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI3_TX_DMA                 1
+#define RTE_SPI3_TX_DMA_NUMBER          1
+#define RTE_SPI3_TX_DMA_STREAM          5
+#define RTE_SPI3_TX_DMA_CHANNEL         0
+#define RTE_SPI3_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SDIO (Secure Digital Input/Output) [Driver_MCI0]
+//  Configuration settings for Driver_MCI0 in component ::Drivers:MCI
+#define RTE_SDIO                        1
+
+//    SDIO_CD (Card Detect) Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Active State <0=>Low <1=>High
+//       Selects Active State Logical Level
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SDIO_CD_PIN                 1
+#define RTE_SDIO_CD_ACTIVE              0
+#define RTE_SDIO_CD_PORT                GPIO_PORT(7)
+#define RTE_SDIO_CD_BIT                 15
+
+//    SDIO_WP (Write Protect) Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Active State <0=>Low <1=>High
+//       Selects Active State Logical Level
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SDIO_WP_PIN                 0
+#define RTE_SDIO_WP_ACTIVE              0
+#define RTE_SDIO_WP_PORT                GPIO_PORT(7)
+#define RTE_SDIO_WP_BIT                 16
+
+//    SDIO Bus
+//      SDIO_CK Pin <0=>PC12
+#define RTE_SDIO_CK_PORT_ID             0
+#if    (RTE_SDIO_CK_PORT_ID == 0)
+#define RTE_SDIO_CK_PORT                GPIOC
+#define RTE_SDIO_CK_PIN                 12
+#else
+#error "Invalid SDIO_CK Pin Configuration!"
+#endif
+//      SDIO_CMD Pin <0=>PD2
+#define RTE_SDIO_CMD_PORT_ID            0
+#if    (RTE_SDIO_CMD_PORT_ID == 0)
+#define RTE_SDIO_CMD_PORT               GPIOD
+#define RTE_SDIO_CMD_PIN                2
+#else
+#error "Invalid SDIO_CDM Pin Configuration!"
+#endif
+//      SDIO_D0 Pin <0=>PC8
+#define RTE_SDIO_D0_PORT_ID             0
+#if    (RTE_SDIO_D0_PORT_ID == 0)
+#define RTE_SDIO_D0_PORT                GPIOC
+#define RTE_SDIO_D0_PIN                 8
+#else
+#error "Invalid SDIO_D0 Pin Configuration!"
+#endif
+//      SDIO_D1 Pin <0=>PC9
+#define RTE_SDIO_D1_PORT_ID             0
+#if    (RTE_SDIO_D1_PORT_ID == 0)
+#define RTE_SDIO_D1_PORT                GPIOC
+#define RTE_SDIO_D1_PIN                 9
+#else
+#error "Invalid SDIO_D1 Pin Configuration!"
+#endif
+//      SDIO_D2 Pin <0=>PC10
+#define RTE_SDIO_D2_PORT_ID             0
+#if    (RTE_SDIO_D2_PORT_ID == 0)
+#define RTE_SDIO_D2_PORT                GPIOC
+#define RTE_SDIO_D2_PIN                 10
+#else
+#error "Invalid SDIO_D2 Pin Configuration!"
+#endif
+//      SDIO_D3 Pin <0=>PC11
+#define RTE_SDIO_D3_PORT_ID             0
+#if    (RTE_SDIO_D3_PORT_ID == 0)
+#define RTE_SDIO_D3_PORT                GPIOC
+#define RTE_SDIO_D3_PIN                 11
+#else
+#error "Invalid SDIO_D3 Pin Configuration!"
+#endif
+//      SDIO_D4 Pin <0=>PB8
+#define RTE_SDIO_D4_PORT_ID             0
+#if    (RTE_SDIO_D4_PORT_ID == 0)
+#define RTE_SDIO_D4_PORT                GPIOB
+#define RTE_SDIO_D4_PIN                 8
+#else
+#error "Invalid SDIO_D4 Pin Configuration!"
+#endif
+//      SDIO_D5 Pin <0=>PB9
+#define RTE_SDIO_D5_PORT_ID             0
+#if    (RTE_SDIO_D5_PORT_ID == 0)
+#define RTE_SDIO_D5_PORT                GPIOB
+#define RTE_SDIO_D5_PIN                 9
+#else
+#error "Invalid SDIO_D5 Pin Configuration!"
+#endif
+//      SDIO_D6 Pin <0=>PC6
+#define RTE_SDIO_D6_PORT_ID             0
+#if    (RTE_SDIO_D6_PORT_ID == 0)
+#define RTE_SDIO_D6_PORT                GPIOC
+#define RTE_SDIO_D6_PIN                 6
+#else
+#error "Invalid SDIO_D6 Pin Configuration!"
+#endif
+//      SDIO_D7 Pin <0=>PC7
+#define RTE_SDIO_D7_PORT_ID             0
+#if    (RTE_SDIO_D7_PORT_ID == 0)
+#define RTE_SDIO_D7_PORT                GPIOC
+#define RTE_SDIO_D7_PIN                 7
+#else
+#error "Invalid SDIO_D7 Pin Configuration!"
+#endif
+//   
+
+//    DMA
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <3=>3 <6=>6
+//       Selects DMA Stream (only Stream 3 or 6 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SDIO_DMA                    1
+#define RTE_SDIO_DMA_NUMBER             2
+#define RTE_SDIO_DMA_STREAM             3
+#define RTE_SDIO_DMA_CHANNEL            4
+#define RTE_SDIO_DMA_PRIORITY           0
+
+// 
+
+
+//  ETH (Ethernet Interface) [Driver_ETH_MAC0]
+//  Configuration settings for Driver_ETH_MAC0 in component ::Drivers:Ethernet MAC
+#define RTE_ETH                         1
+
+//    MII (Media Independent Interface)
+#define RTE_ETH_MII                     0
+
+//      ETH_MII_TX_CLK Pin <0=>PC3
+#define RTE_ETH_MII_TX_CLK_PORT_ID      0
+#if    (RTE_ETH_MII_TX_CLK_PORT_ID == 0)
+#define RTE_ETH_MII_TX_CLK_PORT         GPIOC
+#define RTE_ETH_MII_TX_CLK_PIN          3
+#else
+#error "Invalid ETH_MII_TX_CLK Pin Configuration!"
+#endif
+//      ETH_MII_TXD0 Pin <0=>PB12 <1=>PG13
+#define RTE_ETH_MII_TXD0_PORT_ID        0
+#if    (RTE_ETH_MII_TXD0_PORT_ID == 0)
+#define RTE_ETH_MII_TXD0_PORT           GPIOB
+#define RTE_ETH_MII_TXD0_PIN            12
+#elif  (RTE_ETH_MII_TXD0_PORT_ID == 1)
+#define RTE_ETH_MII_TXD0_PORT           GPIOG
+#define RTE_ETH_MII_TXD0_PIN            13
+#else
+#error "Invalid ETH_MII_TXD0 Pin Configuration!"
+#endif
+//      ETH_MII_TXD1 Pin <0=>PB13 <1=>PG14
+#define RTE_ETH_MII_TXD1_PORT_ID        0
+#if    (RTE_ETH_MII_TXD1_PORT_ID == 0)
+#define RTE_ETH_MII_TXD1_PORT           GPIOB
+#define RTE_ETH_MII_TXD1_PIN            13
+#elif  (RTE_ETH_MII_TXD1_PORT_ID == 1)
+#define RTE_ETH_MII_TXD1_PORT           GPIOG
+#define RTE_ETH_MII_TXD1_PIN            14
+#else
+#error "Invalid ETH_MII_TXD1 Pin Configuration!"
+#endif
+//      ETH_MII_TXD2 Pin <0=>PC2
+#define RTE_ETH_MII_TXD2_PORT_ID        0
+#if    (RTE_ETH_MII_TXD2_PORT_ID == 0)
+#define RTE_ETH_MII_TXD2_PORT           GPIOC
+#define RTE_ETH_MII_TXD2_PIN            2
+#else
+#error "Invalid ETH_MII_TXD2 Pin Configuration!"
+#endif
+//      ETH_MII_TXD3 Pin <0=>PB8 <1=>PE2
+#define RTE_ETH_MII_TXD3_PORT_ID        0
+#if    (RTE_ETH_MII_TXD3_PORT_ID == 0)
+#define RTE_ETH_MII_TXD3_PORT           GPIOB
+#define RTE_ETH_MII_TXD3_PIN            8
+#elif  (RTE_ETH_MII_TXD3_PORT_ID == 1)
+#define RTE_ETH_MII_TXD3_PORT           GPIOE
+#define RTE_ETH_MII_TXD3_PIN            2
+#else
+#error "Invalid ETH_MII_TXD3 Pin Configuration!"
+#endif
+//      ETH_MII_TX_EN Pin <0=>PB11 <1=>PG11
+#define RTE_ETH_MII_TX_EN_PORT_ID       0
+#if    (RTE_ETH_MII_TX_EN_PORT_ID == 0)
+#define RTE_ETH_MII_TX_EN_PORT          GPIOB
+#define RTE_ETH_MII_TX_EN_PIN           11
+#elif  (RTE_ETH_MII_TX_EN_PORT_ID == 1)
+#define RTE_ETH_MII_TX_EN_PORT          GPIOG
+#define RTE_ETH_MII_TX_EN_PIN           11
+#else
+#error "Invalid ETH_MII_TX_EN Pin Configuration!"
+#endif
+//      ETH_MII_RX_CLK Pin <0=>PA1
+#define RTE_ETH_MII_RX_CLK_PORT_ID        0
+#if    (RTE_ETH_MII_RX_CLK_PORT_ID == 0)
+#define RTE_ETH_MII_RX_CLK_PORT         GPIOA
+#define RTE_ETH_MII_RX_CLK_PIN          1
+#else
+#error "Invalid ETH_MII_RX_CLK Pin Configuration!"
+#endif
+//      ETH_MII_RXD0 Pin <0=>PC4
+#define RTE_ETH_MII_RXD0_PORT_ID        0
+#if    (RTE_ETH_MII_RXD0_PORT_ID == 0)
+#define RTE_ETH_MII_RXD0_PORT           GPIOC
+#define RTE_ETH_MII_RXD0_PIN            4
+#else
+#error "Invalid ETH_MII_RXD0 Pin Configuration!"
+#endif
+//      ETH_MII_RXD1 Pin <0=>PC5
+#define RTE_ETH_MII_RXD1_PORT_ID        0
+#if    (RTE_ETH_MII_RXD1_PORT_ID == 0)
+#define RTE_ETH_MII_RXD1_PORT           GPIOC
+#define RTE_ETH_MII_RXD1_PIN            5
+#else
+#error "Invalid ETH_MII_RXD1 Pin Configuration!"
+#endif
+//      ETH_MII_RXD2 Pin <0=>PB0 <1=>PH6
+#define RTE_ETH_MII_RXD2_PORT_ID        0
+#if    (RTE_ETH_MII_RXD2_PORT_ID == 0)
+#define RTE_ETH_MII_RXD2_PORT           GPIOB
+#define RTE_ETH_MII_RXD2_PIN            0
+#elif  (RTE_ETH_MII_RXD2_PORT_ID == 1)
+#define RTE_ETH_MII_RXD2_PORT           GPIOH
+#define RTE_ETH_MII_RXD2_PIN            6
+#else
+#error "Invalid ETH_MII_RXD2 Pin Configuration!"
+#endif
+//      ETH_MII_RXD3 Pin <0=>PB1 <1=>PH7
+#define RTE_ETH_MII_RXD3_PORT_ID        0
+#if    (RTE_ETH_MII_RXD3_PORT_ID == 0)
+#define RTE_ETH_MII_RXD3_PORT           GPIOB
+#define RTE_ETH_MII_RXD3_PIN            1
+#elif  (RTE_ETH_MII_RXD3_PORT_ID == 1)
+#define RTE_ETH_MII_RXD3_PORT           GPIOH
+#define RTE_ETH_MII_RXD3_PIN            7
+#else
+#error "Invalid ETH_MII_RXD3 Pin Configuration!"
+#endif
+//      ETH_MII_RX_DV Pin <0=>PA7
+#define RTE_ETH_MII_RX_DV_PORT_ID       0
+#if    (RTE_ETH_MII_RX_DV_PORT_ID == 0)
+#define RTE_ETH_MII_RX_DV_PORT          GPIOA
+#define RTE_ETH_MII_RX_DV_PIN           7
+#else
+#error "Invalid ETH_MII_RX_DV Pin Configuration!"
+#endif
+//      ETH_MII_RX_ER Pin <0=>PB10 <1=>PI10
+#define RTE_ETH_MII_RX_ER_PORT_ID       0
+#if    (RTE_ETH_MII_RX_ER_PORT_ID == 0)
+#define RTE_ETH_MII_RX_ER_PORT          GPIOB
+#define RTE_ETH_MII_RX_ER_PIN           10
+#elif  (RTE_ETH_MII_RXD3_PORT_ID == 1)
+#define RTE_ETH_MII_RX_ER_PORT          GPIOI
+#define RTE_ETH_MII_RX_ER_PIN           10
+#else
+#error "Invalid ETH_MII_RX_ER Pin Configuration!"
+#endif
+//      ETH_MII_CRS Pin <0=>PA0 <1=>PH2
+#define RTE_ETH_MII_CRS_PORT_ID       0
+#if    (RTE_ETH_MII_CRS_PORT_ID == 0)
+#define RTE_ETH_MII_CRS_PORT            GPIOA
+#define RTE_ETH_MII_CRS_PIN             0
+#elif  (RTE_ETH_MII_CRS_PORT_ID == 1)
+#define RTE_ETH_MII_CRS_PORT            GPIOH
+#define RTE_ETH_MII_CRS_PIN             2
+#else
+#error "Invalid ETH_MII_CRS Pin Configuration!"
+#endif
+//      ETH_MII_COL Pin <0=>PA3 <1=>PH3
+#define RTE_ETH_MII_COL_PORT_ID       0
+#if    (RTE_ETH_MII_COL_PORT_ID == 0)
+#define RTE_ETH_MII_COL_PORT            GPIOA
+#define RTE_ETH_MII_COL_PIN             3
+#elif  (RTE_ETH_MII_COL_PORT_ID == 1)
+#define RTE_ETH_MII_COL_PORT            GPIOH
+#define RTE_ETH_MII_COL_PIN             3
+#else
+#error "Invalid ETH_MII_COL Pin Configuration!"
+#endif
+
+//   
+
+//    RMII (Reduced Media Independent Interface)
+#define RTE_ETH_RMII                    1
+
+//      ETH_RMII_TXD0 Pin <0=>PB12 <1=>PG13
+#define RTE_ETH_RMII_TXD0_PORT_ID       1
+#if    (RTE_ETH_RMII_TXD0_PORT_ID == 0)
+#define RTE_ETH_RMII_TXD0_PORT          GPIOB
+#define RTE_ETH_RMII_TXD0_PIN           12
+#elif  (RTE_ETH_RMII_TXD0_PORT_ID == 1)
+#define RTE_ETH_RMII_TXD0_PORT          GPIOG
+#define RTE_ETH_RMII_TXD0_PIN           13
+#else
+#error "Invalid ETH_RMII_TXD0 Pin Configuration!"
+#endif
+//      ETH_RMII_TXD1 Pin <0=>PB13 <1=>PG14
+#define RTE_ETH_RMII_TXD1_PORT_ID       1
+#if    (RTE_ETH_RMII_TXD1_PORT_ID == 0)
+#define RTE_ETH_RMII_TXD1_PORT          GPIOB
+#define RTE_ETH_RMII_TXD1_PIN           13
+#elif  (RTE_ETH_RMII_TXD1_PORT_ID == 1)
+#define RTE_ETH_RMII_TXD1_PORT          GPIOG
+#define RTE_ETH_RMII_TXD1_PIN           14
+#else
+#error "Invalid ETH_RMII_TXD1 Pin Configuration!"
+#endif
+//      ETH_RMII_TX_EN Pin <0=>PB11 <1=>PG11
+#define RTE_ETH_RMII_TX_EN_PORT_ID      1
+#if    (RTE_ETH_RMII_TX_EN_PORT_ID == 0)
+#define RTE_ETH_RMII_TX_EN_PORT         GPIOB
+#define RTE_ETH_RMII_TX_EN_PIN          11
+#elif  (RTE_ETH_RMII_TX_EN_PORT_ID == 1)
+#define RTE_ETH_RMII_TX_EN_PORT         GPIOG
+#define RTE_ETH_RMII_TX_EN_PIN          11
+#else
+#error "Invalid ETH_RMII_TX_EN Pin Configuration!"
+#endif
+//      ETH_RMII_RXD0 Pin <0=>PC4
+#define RTE_ETH_RMII_RXD0_PORT_ID       0
+#if    (RTE_ETH_RMII_RXD0_PORT_ID == 0)
+#define RTE_ETH_RMII_RXD0_PORT          GPIOC
+#define RTE_ETH_RMII_RXD0_PIN           4
+#else
+#error "Invalid ETH_RMII_RXD0 Pin Configuration!"
+#endif
+//      ETH_RMII_RXD1 Pin <0=>PC5
+#define RTE_ETH_RMII_RXD1_PORT_ID       0
+#if    (RTE_ETH_RMII_RXD1_PORT_ID == 0)
+#define RTE_ETH_RMII_RXD1_PORT          GPIOC
+#define RTE_ETH_RMII_RXD1_PIN           5
+#else
+#error "Invalid ETH_RMII_RXD1 Pin Configuration!"
+#endif
+//      ETH_RMII_REF_CLK Pin <0=>PA1
+#define RTE_ETH_RMII_REF_CLK_PORT_ID    0
+#if    (RTE_ETH_RMII_REF_CLK_PORT_ID == 0)
+#define RTE_ETH_RMII_REF_CLK_PORT       GPIOA
+#define RTE_ETH_RMII_REF_CLK_PIN        1
+#else
+#error "Invalid ETH_RMII_REF_CLK Pin Configuration!"
+#endif
+//      ETH_RMII_CRS_DV Pin <0=>PA7
+#define RTE_ETH_RMII_CRS_DV_PORT_ID     0
+#if    (RTE_ETH_RMII_CRS_DV_PORT_ID == 0)
+#define RTE_ETH_RMII_CRS_DV_PORT        GPIOA
+#define RTE_ETH_RMII_CRS_DV_PIN         7
+#else
+#error "Invalid ETH_RMII_CRS_DV Pin Configuration!"
+#endif
+
+//   
+
+//    Management Data Interface
+//      ETH_MDC Pin <0=>PC1
+#define RTE_ETH_MDI_MDC_PORT_ID         0
+#if    (RTE_ETH_MDI_MDC_PORT_ID == 0)
+#define RTE_ETH_MDI_MDC_PORT            GPIOC
+#define RTE_ETH_MDI_MDC_PIN             1
+#else
+#error "Invalid ETH_MDC Pin Configuration!"
+#endif
+//      ETH_MDIO Pin <0=>PA2
+#define RTE_ETH_MDI_MDIO_PORT_ID        0
+#if    (RTE_ETH_MDI_MDIO_PORT_ID == 0)
+#define RTE_ETH_MDI_MDIO_PORT           GPIOA
+#define RTE_ETH_MDI_MDIO_PIN            2
+#else
+#error "Invalid ETH_MDIO Pin Configuration!"
+#endif
+//   
+
+//    Reference 25MHz/50MHz Clock generation
+#define RTE_ETH_REF_CLOCK               0
+
+//      MCO Pin <0=>PA2 <1=>PC9
+#define RTE_ETH_REF_CLOCK_PORT_ID       0
+#if    (RTE_ETH_REF_CLOCK_PORT_ID == 0)
+#define RTE_ETH_REF_CLOCK_PORT          GPIOA
+#define RTE_ETH_REF_CLOCK_PIN           8
+#elif  (RTE_ETH_REF_CLOCK_PORT_ID == 1)
+#define RTE_ETH_REF_CLOCK_PORT          GPIOC
+#define RTE_ETH_REF_CLOCK_PIN           9
+#else
+#error "Invalid MCO Pin Configuration!"
+#endif
+
+//   
+
+// 
+
+
+//  USB OTG Full-speed
+#define RTE_USB_OTG_FS                  0
+
+//    Device [Driver_USBD0]
+//    Configuration settings for Driver_USBD0 in component ::Drivers:USB Device
+#define RTE_USB_OTG_FS_DEV              1
+
+//      Endpoints
+//      Reduce memory requirements of Driver by disabling unused endpoints
+//        Endpoint 1
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 2
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 3
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//     
+#define RTE_USB_OTG_FS_DEV_EP           0x0000000F
+#define RTE_USB_OTG_FS_DEV_EP_BULK      0x000E000E
+#define RTE_USB_OTG_FS_DEV_EP_INT       0x000E000E
+#define RTE_USB_OTG_FS_DEV_EP_ISO       0x000E000E
+
+//   
+
+//    Host [Driver_USBH0]
+//    Configuration settings for Driver_USBH0 in component ::Drivers:USB Host
+
+#define RTE_USB_OTG_FS_HOST             1
+
+//      VBUS Power On/Off Pin
+//      Configure Pin for driving VBUS
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_FS_VBUS_PIN             1
+#define RTE_OTG_FS_VBUS_ACTIVE          0
+#define RTE_OTG_FS_VBUS_PORT            GPIO_PORT(7)
+#define RTE_OTG_FS_VBUS_BIT             5
+
+//      Overcurrent Detection Pin
+//      Configure Pin for overcurrent detection
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_FS_OC_PIN               1
+#define RTE_OTG_FS_OC_ACTIVE            0
+#define RTE_OTG_FS_OC_PORT              GPIO_PORT(5)
+#define RTE_OTG_FS_OC_BIT               11
+//   
+
+// 
+
+
+//  USB OTG High-speed
+#define RTE_USB_OTG_HS                  0
+
+//    PHY (Physical Layer)
+
+//      PHY Interface
+//       <0=>On-chip full-speed PHY
+//       <1=>External ULPI high-speed PHY
+#define RTE_USB_OTG_HS_PHY              1
+
+//      External ULPI Pins (UTMI+ Low Pin Interface)
+
+//        OTG_HS_ULPI_CK Pin <0=>PA5
+#define RTE_USB_OTG_HS_ULPI_CK_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_CK_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_CK_PORT     GPIOA
+#define RTE_USB_OTG_HS_ULPI_CK_PIN      5
+#else
+#error "Invalid OTG_HS_ULPI_CK Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_DIR Pin <0=>PI11 <1=>PC2
+#define RTE_USB_OTG_HS_ULPI_DIR_PORT_ID 0
+#if    (RTE_USB_OTG_HS_ULPI_DIR_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_DIR_PORT    GPIOI
+#define RTE_USB_OTG_HS_ULPI_DIR_PIN     11
+#elif  (RTE_USB_OTG_HS_ULPI_DIR_PORT_ID == 1)
+#define RTE_USB_OTG_HS_ULPI_DIR_PORT    GPIOC
+#define RTE_USB_OTG_HS_ULPI_DIR_PIN     2
+#else
+#error "Invalid OTG_HS_ULPI_DIR Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_STP Pin <0=>PC0
+#define RTE_USB_OTG_HS_ULPI_STP_PORT_ID 0
+#if    (RTE_USB_OTG_HS_ULPI_STP_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_STP_PORT    GPIOC
+#define RTE_USB_OTG_HS_ULPI_STP_PIN     0
+#else
+#error "Invalid OTG_HS_ULPI_STP Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_NXT Pin <0=>PC2 <1=>PH4
+#define RTE_USB_OTG_HS_ULPI_NXT_PORT_ID 1
+#if    (RTE_USB_OTG_HS_ULPI_NXT_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_NXT_PORT    GPIOC
+#define RTE_USB_OTG_HS_ULPI_NXT_PIN     2
+#elif  (RTE_USB_OTG_HS_ULPI_NXT_PORT_ID == 1)
+#define RTE_USB_OTG_HS_ULPI_NXT_PORT    GPIOH
+#define RTE_USB_OTG_HS_ULPI_NXT_PIN     4
+#else
+#error "Invalid OTG_HS_ULPI_NXT Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D0 Pin <0=>PA3
+#define RTE_USB_OTG_HS_ULPI_D0_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D0_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D0_PORT     GPIOA
+#define RTE_USB_OTG_HS_ULPI_D0_PIN      3
+#else
+#error "Invalid OTG_HS_ULPI_D0 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D1 Pin <0=>PB0
+#define RTE_USB_OTG_HS_ULPI_D1_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D1_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D1_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D1_PIN      0
+#else
+#error "Invalid OTG_HS_ULPI_D1 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D2 Pin <0=>PB1
+#define RTE_USB_OTG_HS_ULPI_D2_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D2_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D2_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D2_PIN      1
+#else
+#error "Invalid OTG_HS_ULPI_D2 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D3 Pin <0=>PB10
+#define RTE_USB_OTG_HS_ULPI_D3_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D3_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D3_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D3_PIN      10
+#else
+#error "Invalid OTG_HS_ULPI_D3 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D4 Pin <0=>PB11
+#define RTE_USB_OTG_HS_ULPI_D4_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D4_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D4_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D4_PIN      11
+#else
+#error "Invalid OTG_HS_ULPI_D4 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D5 Pin <0=>PB12
+#define RTE_USB_OTG_HS_ULPI_D5_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D5_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D5_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D5_PIN      12
+#else
+#error "Invalid OTG_HS_ULPI_D5 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D6 Pin <0=>PB13
+#define RTE_USB_OTG_HS_ULPI_D6_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D6_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D6_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D6_PIN      13
+#else
+#error "Invalid OTG_HS_ULPI_D6 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D7 Pin <0=>PB5
+#define RTE_USB_OTG_HS_ULPI_D7_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D7_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D7_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D7_PIN      5
+#else
+#error "Invalid OTG_HS_ULPI_D7 Pin Configuration!"
+#endif
+
+//     
+
+//   
+
+//    Device [Driver_USBD1]
+//    Configuration settings for Driver_USBD1 in component ::Drivers:USB Device
+#define RTE_USB_OTG_HS_DEV              1
+
+//      Endpoints
+//      Reduce memory requirements of Driver by disabling unused endpoints
+//        Endpoint 1
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 2
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 3
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 4
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 5
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//     
+#define RTE_USB_OTG_HS_DEV_EP           0x0000003F
+#define RTE_USB_OTG_HS_DEV_EP_BULK      0x003E003E
+#define RTE_USB_OTG_HS_DEV_EP_INT       0x003E003E
+#define RTE_USB_OTG_HS_DEV_EP_ISO       0x003E003E
+
+//   
+
+//    Host [Driver_USBH1]
+//    Configuration settings for Driver_USBH1 in component ::Drivers:USB Host
+#define RTE_USB_OTG_HS_HOST             1
+
+//      VBUS Power On/Off Pin
+//      Configure Pin for driving VBUS
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_HS_VBUS_PIN             1
+#define RTE_OTG_HS_VBUS_ACTIVE          0
+#define RTE_OTG_HS_VBUS_PORT            GPIO_PORT(2)
+#define RTE_OTG_HS_VBUS_BIT             2
+
+//      Overcurrent Detection Pin
+//      Configure Pin for overcurrent detection
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_HS_OC_PIN               1
+#define RTE_OTG_HS_OC_ACTIVE            0
+#define RTE_OTG_HS_OC_PORT              GPIO_PORT(5)
+#define RTE_OTG_HS_OC_BIT               12
+//   
+
+// 
+
+
+//  EXTI (External Interrupt/Event Controller)
+#define RTE_EXTI                        0
+
+//    EXTI0 Line
+#define RTE_EXTI0                       0
+//      Pin   <0=>PA0  <1=>PB0  <2=>PC0  <3=>PD0  <4=>PE0  <5=>PF0  <6=>PG0  <7=>PH0  <8=>PI0
+#define RTE_EXTI0_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI0_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI0_TRIGGER               0
+//   
+
+//    EXTI1 Line
+#define RTE_EXTI1                       0
+//      Pin   <0=>PA1  <1=>PB1  <2=>PC1  <3=>PD1  <4=>PE1  <5=>PF1  <6=>PG1  <7=>PH1  <8=>PI1
+#define RTE_EXTI1_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI1_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI1_TRIGGER               0
+//   
+
+//    EXTI2 Line
+#define RTE_EXTI2                       0
+//      Pin   <0=>PA2  <1=>PB2  <2=>PC2  <3=>PD2  <4=>PE2  <5=>PF2  <6=>PG2  <7=>PH2  <8=>PI2
+#define RTE_EXTI2_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI2_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI2_TRIGGER               0
+//   
+
+//    EXTI3 Line
+#define RTE_EXTI3                       0
+//      Pin   <0=>PA3  <1=>PB3  <2=>PC3  <3=>PD3  <4=>PE3  <5=>PF3  <6=>PG3  <7=>PH3  <8=>PI3
+#define RTE_EXTI3_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI3_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI3_TRIGGER               0
+//   
+
+//    EXTI4 Line
+#define RTE_EXTI4                       0
+//      Pin   <0=>PA4  <1=>PB4  <2=>PC4  <3=>PD4  <4=>PE4  <5=>PF4  <6=>PG4  <7=>PH4  <8=>PI4
+#define RTE_EXTI4_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI4_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI4_TRIGGER               0
+//   
+
+//    EXTI5 Line
+#define RTE_EXTI5                       0
+//      Pin   <0=>PA5  <1=>PB5  <2=>PC5  <3=>PD5  <4=>PE5  <5=>PF5  <6=>PG5  <7=>PH5  <8=>PI5
+#define RTE_EXTI5_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI5_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI5_TRIGGER               0
+//   
+
+//    EXTI6 Line
+#define RTE_EXTI6                       0
+//      Pin   <0=>PA6  <1=>PB6  <2=>PC6  <3=>PD6  <4=>PE6  <5=>PF6  <6=>PG6  <7=>PH6  <8=>PI6
+#define RTE_EXTI6_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI6_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI6_TRIGGER               0
+//   
+
+//    EXTI7 Line
+#define RTE_EXTI7                       0
+//      Pin   <0=>PA7  <1=>PB7  <2=>PC7  <3=>PD7  <4=>PE7  <5=>PF7  <6=>PG7  <7=>PH7  <8=>PI7
+#define RTE_EXTI7_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI7_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI7_TRIGGER               0
+//   
+
+//    EXTI8 Line
+#define RTE_EXTI8                       0
+//      Pin   <0=>PA8  <1=>PB8  <2=>PC8  <3=>PD8  <4=>PE8  <5=>PF8  <6=>PG8  <7=>PH8  <8=>PI8
+#define RTE_EXTI8_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI8_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI8_TRIGGER               0
+//   
+
+//    EXTI9 Line
+#define RTE_EXTI9                       0
+//      Pin   <0=>PA9  <1=>PB9  <2=>PC9  <3=>PD9  <4=>PE9  <5=>PF9  <6=>PG9  <7=>PH9  <8=>PI9
+#define RTE_EXTI9_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI9_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI9_TRIGGER               0
+//   
+
+//    EXTI10 Line
+#define RTE_EXTI10                      0
+//      Pin   <0=>PA10 <1=>PB10 <2=>PC10 <3=>PD10 <4=>PE10 <5=>PF10 <6=>PG10 <7=>PH10 <8=>PI10
+#define RTE_EXTI10_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI10_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI10_TRIGGER              0
+//   
+
+//    EXTI11 Line
+#define RTE_EXTI11                      0
+//      Pin   <0=>PA11 <1=>PB11 <2=>PC11 <3=>PD11 <4=>PE11 <5=>PF11 <6=>PG11 <7=>PH11 <8=>PI11
+#define RTE_EXTI11_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI11_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI11_TRIGGER              0
+//   
+
+//    EXTI12 Line
+#define RTE_EXTI12                      0
+//      Pin   <0=>PA12 <1=>PB12 <2=>PC12 <3=>PD12 <4=>PE12 <5=>PF12 <6=>PG12 <7=>PH12
+#define RTE_EXTI12_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI12_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI12_TRIGGER              0
+//   
+
+//    EXTI13 Line
+#define RTE_EXTI13                      0
+//      Pin   <0=>PA13 <1=>PB13 <2=>PC13 <3=>PD13 <4=>PE13 <5=>PF13 <6=>PG13 <7=>PH13
+#define RTE_EXTI13_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI13_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI13_TRIGGER              0
+//   
+
+//    EXTI14 Line
+#define RTE_EXTI14                      0
+//      Pin   <0=>PA14 <1=>PB14 <2=>PC14 <3=>PD14 <4=>PE14 <5=>PF14 <6=>PG14 <7=>PH14
+#define RTE_EXTI14_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI14_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI14_TRIGGER              0
+//   
+
+//    EXTI15 Line
+#define RTE_EXTI15                      0
+//      Pin   <0=>PA15 <1=>PB15 <2=>PC15 <3=>PD15 <4=>PE15 <5=>PF15 <6=>PG15 <7=>PH15
+#define RTE_EXTI15_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI15_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI15_TRIGGER              0
+//   
+
+//    EXTI16 Line: PVD Output
+#define RTE_EXTI16                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI16_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI16_TRIGGER              0
+//   
+
+//    EXTI17 Line: RTC Alarm
+#define RTE_EXTI17                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI17_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI17_TRIGGER              0
+//   
+
+//    EXTI18 Line: USB OTG FS Wakeup
+#define RTE_EXTI18                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI18_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI18_TRIGGER              0
+//   
+
+//    EXTI19 Line: Ethernet Wakeup
+#define RTE_EXTI19                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI19_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI19_TRIGGER              0
+//   
+
+//    EXTI20 Line: USB OTG HS Wakeup
+#define RTE_EXTI20                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI20_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI20_TRIGGER              0
+//   
+
+//    EXTI21 Line: RTC Tamper and TimeStamp
+#define RTE_EXTI21                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI21_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI21_TRIGGER              0
+//   
+
+//    EXTI22 Line: RTC Wakeup
+#define RTE_EXTI22                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI22_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI22_TRIGGER              0
+//   
+
+// 
+
+
+//  FSMC (Flexible Static Memory Controller)
+#define RTE_FSMC                        0
+
+//    Pin Configuration
+//    Configure Pins
+#define RTE_FSMC_PINS                   0
+
+//      Address Bus Pins
+//       <0=>A[17:16]
+//       <1=>A[10:0]   <2=>A[15:0]   <3=>A[16:0]   <4=>A[17:0]
+//       <5=>A[18:0]   <6=>A[19:0]   <7=>A[20:0]   <8=>A[21:0]
+//       <9=>A[22:0]  <10=>A[23:0]  <11=>A[24:0]  <12=>A[25:0]
+#define RTE_FSMC_ABUS_PINS              10
+//      Data Bus Pins  <0=>D[7:0] <1=>D[15:0]
+#define RTE_FSMC_DBUS_PINS              0
+//      FSMC_NOE Pin
+#define RTE_FSMC_NOE_PIN                0
+//      FSMC_NWE Pin
+#define RTE_FSMC_NWE_PIN                0
+//      FSMC_NBL0 Pin
+#define RTE_FSMC_NBL0_PIN               0
+//      FSMC_NBL1 Pin
+#define RTE_FSMC_NBL1_PIN               0
+//      FSMC_NL Pin
+#define RTE_FSMC_NL_PIN                 0
+//      FSMC_NWAIT Pin
+#define RTE_FSMC_NWAIT_PIN              0
+//      FSMC_CLK Pin
+#define RTE_FSMC_CLK_PIN                0
+//      FSMC_NE1/NCE2 Pin
+#define RTE_FSMC_NE1_PIN                0
+//      FSMC_NE2/NCE3 Pin
+#define RTE_FSMC_NE2_PIN                0
+//      FSMC_NE3/NCE4_1 Pin
+#define RTE_FSMC_NE3_PIN                0
+//      FSMC_NE4 Pin
+#define RTE_FSMC_NE4_PIN                0
+//      FSMC_NCE4_2 Pin
+#define RTE_FSMC_NCE42_PIN              0
+//      FSMC_INT2 Pin
+#define RTE_FSMC_INT2_PIN               0
+//      FSMC_INT3 Pin
+#define RTE_FSMC_INT3_PIN               0
+//      FSMC_INTR Pin
+#define RTE_FSMC_INTR_PIN               0
+//      FSMC_NIORD Pin
+#define RTE_FSMC_NIORD_PIN              0
+//      FSMC_NIOWR Pin
+#define RTE_FSMC_NIOWR_PIN              0
+//      FSMC_NREG Pin
+#define RTE_FSMC_NREG_PIN               0
+//      FSMC_CD Pin
+#define RTE_FSMC_CD_PIN                 0
+
+//   
+
+//    NOR Flash / PSRAM Controller
+
+//      FSMC_NE1 Chip Select
+//      Configure Device on Chip Select FSMC_NE1
+#define RTE_FSMC_NE1                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR1_CBURSTRW          0
+#define RTE_FSMC_BCR1_ASYNCWAIT         0
+#define RTE_FSMC_BCR1_EXTMOD            0
+#define RTE_FSMC_BCR1_WAITEN            1
+#define RTE_FSMC_BCR1_WREN              1
+#define RTE_FSMC_BCR1_WAITCFG           0
+#define RTE_FSMC_BCR1_WRAPMOD           0
+#define RTE_FSMC_BCR1_WAITPOL           0
+#define RTE_FSMC_BCR1_BURSTEN           0
+#define RTE_FSMC_BCR1_FACCEN            1
+#define RTE_FSMC_BCR1_MWID              1
+#define RTE_FSMC_BCR1_MTYP              2
+#define RTE_FSMC_BCR1_MUXEN             1
+#define RTE_FSMC_BCR1_MBKEN             1
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR1_ACCMOD            0
+#define RTE_FSMC_BTR1_DATLAT            15
+#define RTE_FSMC_BTR1_CLKDIV            15
+#define RTE_FSMC_BTR1_BUSTURN           15
+#define RTE_FSMC_BTR1_DATAST            255
+#define RTE_FSMC_BTR1_ADDHLD            15
+#define RTE_FSMC_BTR1_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR1_ACCMOD        0
+#define RTE_FSMC_BWTR1_DATLAT        15
+#define RTE_FSMC_BWTR1_CLKDIV        15
+#define RTE_FSMC_BWTR1_BUSTURN       15
+#define RTE_FSMC_BWTR1_DATAST        255
+#define RTE_FSMC_BWTR1_ADDHLD        15
+#define RTE_FSMC_BWTR1_ADDSET        15
+//       
+//     
+
+//      FSMC_NE2 Chip Select
+//      Configure Device on Chip Select FSMC_NE2
+#define RTE_FSMC_NE2                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR2_CBURSTRW          0
+#define RTE_FSMC_BCR2_ASYNCWAIT         0
+#define RTE_FSMC_BCR2_EXTMOD            0
+#define RTE_FSMC_BCR2_WAITEN            1
+#define RTE_FSMC_BCR2_WREN              1
+#define RTE_FSMC_BCR2_WAITCFG           0
+#define RTE_FSMC_BCR2_WRAPMOD           0
+#define RTE_FSMC_BCR2_WAITPOL           0
+#define RTE_FSMC_BCR2_BURSTEN           0
+#define RTE_FSMC_BCR2_FACCEN            1
+#define RTE_FSMC_BCR2_MWID              1
+#define RTE_FSMC_BCR2_MTYP              0
+#define RTE_FSMC_BCR2_MUXEN             1
+#define RTE_FSMC_BCR2_MBKEN             0
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR2_ACCMOD            0
+#define RTE_FSMC_BTR2_DATLAT            15
+#define RTE_FSMC_BTR2_CLKDIV            15
+#define RTE_FSMC_BTR2_BUSTURN           15
+#define RTE_FSMC_BTR2_DATAST            255
+#define RTE_FSMC_BTR2_ADDHLD            15
+#define RTE_FSMC_BTR2_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR2_ACCMOD        0
+#define RTE_FSMC_BWTR2_DATLAT        15
+#define RTE_FSMC_BWTR2_CLKDIV        15
+#define RTE_FSMC_BWTR2_BUSTURN       15
+#define RTE_FSMC_BWTR2_DATAST        255
+#define RTE_FSMC_BWTR2_ADDHLD        15
+#define RTE_FSMC_BWTR2_ADDSET        15
+//       
+//     
+
+//      FSMC_NE3 Chip Select
+//      Configure Device on Chip Select FSMC_NE3
+#define RTE_FSMC_NE3                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR3_CBURSTRW          0
+#define RTE_FSMC_BCR3_ASYNCWAIT         0
+#define RTE_FSMC_BCR3_EXTMOD            0
+#define RTE_FSMC_BCR3_WAITEN            1
+#define RTE_FSMC_BCR3_WREN              1
+#define RTE_FSMC_BCR3_WAITCFG           0
+#define RTE_FSMC_BCR3_WRAPMOD           0
+#define RTE_FSMC_BCR3_WAITPOL           0
+#define RTE_FSMC_BCR3_BURSTEN           0
+#define RTE_FSMC_BCR3_FACCEN            1
+#define RTE_FSMC_BCR3_MWID              1
+#define RTE_FSMC_BCR3_MTYP              0
+#define RTE_FSMC_BCR3_MUXEN             1
+#define RTE_FSMC_BCR3_MBKEN             0
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR3_ACCMOD            0
+#define RTE_FSMC_BTR3_DATLAT            15
+#define RTE_FSMC_BTR3_CLKDIV            15
+#define RTE_FSMC_BTR3_BUSTURN           15
+#define RTE_FSMC_BTR3_DATAST            255
+#define RTE_FSMC_BTR3_ADDHLD            15
+#define RTE_FSMC_BTR3_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR3_ACCMOD        0
+#define RTE_FSMC_BWTR3_DATLAT        15
+#define RTE_FSMC_BWTR3_CLKDIV        15
+#define RTE_FSMC_BWTR3_BUSTURN       15
+#define RTE_FSMC_BWTR3_DATAST        255
+#define RTE_FSMC_BWTR3_ADDHLD        15
+#define RTE_FSMC_BWTR3_ADDSET        15
+//       
+//     
+
+//      FSMC_NE4 Chip Select
+//      Configure Device on Chip Select FSMC_NE4
+#define RTE_FSMC_NE4                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR4_CBURSTRW          0
+#define RTE_FSMC_BCR4_ASYNCWAIT         0
+#define RTE_FSMC_BCR4_EXTMOD            0
+#define RTE_FSMC_BCR4_WAITEN            1
+#define RTE_FSMC_BCR4_WREN              1
+#define RTE_FSMC_BCR4_WAITCFG           0
+#define RTE_FSMC_BCR4_WRAPMOD           0
+#define RTE_FSMC_BCR4_WAITPOL           0
+#define RTE_FSMC_BCR4_BURSTEN           0
+#define RTE_FSMC_BCR4_FACCEN            1
+#define RTE_FSMC_BCR4_MWID              1
+#define RTE_FSMC_BCR4_MTYP              0
+#define RTE_FSMC_BCR4_MUXEN             1
+#define RTE_FSMC_BCR4_MBKEN             0
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR4_ACCMOD            0
+#define RTE_FSMC_BTR4_DATLAT            15
+#define RTE_FSMC_BTR4_CLKDIV            15
+#define RTE_FSMC_BTR4_BUSTURN           15
+#define RTE_FSMC_BTR4_DATAST            255
+#define RTE_FSMC_BTR4_ADDHLD            15
+#define RTE_FSMC_BTR4_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR4_ACCMOD        0
+#define RTE_FSMC_BWTR4_DATLAT        15
+#define RTE_FSMC_BWTR4_CLKDIV        15
+#define RTE_FSMC_BWTR4_BUSTURN       15
+#define RTE_FSMC_BWTR4_DATAST        255
+#define RTE_FSMC_BWTR4_ADDHLD        15
+#define RTE_FSMC_BWTR4_ADDSET        15
+//       
+//     
+
+//   
+
+//    NAND Flash Controller
+
+//      FSMC_NCE2 Chip Select
+//      Configure NAND Device on Chip Select FSMC_NCE2
+#define RTE_FSMC_NCE2                   0
+
+//        NAND Flash Control
+//          ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes
+//          Defines the page size for the extended ECC.
+//          TAR: ALE to RE delay <0-15>
+//          Sets time from ALE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          TCLR: CLE to RE delay <0-15>
+//          Sets time from CLE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          ECCEN: ECC computation logic enable 
+//         PWID: Databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width.
+//          PTYP: Memory type <1=>NAND Flash
+//          Defines the type of device attached to the corresponding memory bank.
+//          PBKEN: NAND Flash memory bank enable
+//          Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus.
+//          PWAITEN: Wait feature enable
+//          Enables the Wait feature for the PC Card/NAND Flash memory bank.
+#define RTE_FSMC_PCR2_ECCPS             0
+#define RTE_FSMC_PCR2_TAR               0
+#define RTE_FSMC_PCR2_TCLR              0
+#define RTE_FSMC_PCR2_ECCEN             0
+#define RTE_FSMC_PCR2_PWID              0
+#define RTE_FSMC_PCR2_PTYP              1
+#define RTE_FSMC_PCR2_PBKEN             0
+#define RTE_FSMC_PCR2_PWAITEN           0
+
+//       
+
+//        Interrupt configuration
+//         IFEN: Falling edge detection enable
+//         ILEN: High-level detection enable
+//         IREN: Rising edge detection enable
+#define RTE_FSMC_SR2_IFEN               0
+#define RTE_FSMC_SR2_ILEN               0
+#define RTE_FSMC_SR2_IREN               0
+
+//       
+
+//       Common memory space timing
+//          MEMHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access to. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset)
+//          MEMSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 2 HCLK cycles (for NAND Flash)
+//           1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset)
+#define RTE_FSMC_PMEM2_MEMHIZ           255
+#define RTE_FSMC_PMEM2_MEMHOLD          255
+#define RTE_FSMC_PMEM2_MEMWAIT          255
+#define RTE_FSMC_PMEM2_MEMSET           255
+
+//       
+
+//       Attribute memory space timing
+//          ATTHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT)
+//          ATTSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PATT2_ATTHIZ           255
+#define RTE_FSMC_PATT2_ATTHOLD          255
+#define RTE_FSMC_PATT2_ATTWAIT          255
+#define RTE_FSMC_PATT2_ATTSET           255
+
+//       
+
+//     
+
+//      FSMC_NCE3 Chip Select
+//      Configure NAND Device on Chip Select FSMC_NCE3
+#define RTE_FSMC_NCE3                   0
+
+//        NAND Flash Control
+//          ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes
+//          Defines the page size for the extended ECC.
+//          TAR: ALE to RE delay <0-15>
+//          Sets time from ALE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          TCLR: CLE to RE delay <0-15>
+//          Sets time from CLE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          ECCEN: ECC computation logic enable 
+//         PWID: Databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width.
+//          PTYP: Memory type <1=>NAND Flash
+//          Defines the type of device attached to the corresponding memory bank.
+//          PBKEN: NAND Flash memory bank enable
+//          Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus.
+//          PWAITEN: Wait feature enable
+//          Enables the Wait feature for the PC Card/NAND Flash memory bank.
+#define RTE_FSMC_PCR3_ECCPS             0
+#define RTE_FSMC_PCR3_TAR               0
+#define RTE_FSMC_PCR3_TCLR              0
+#define RTE_FSMC_PCR3_ECCEN             0
+#define RTE_FSMC_PCR3_PWID              0
+#define RTE_FSMC_PCR3_PTYP              1
+#define RTE_FSMC_PCR3_PBKEN             0
+#define RTE_FSMC_PCR3_PWAITEN           0
+
+//       
+
+//        Interrupt configuration
+//         IFEN: Falling edge detection enable
+//         ILEN: High-level detection enable
+//         IREN: Rising edge detection enable
+#define RTE_FSMC_SR3_IFEN               0
+#define RTE_FSMC_SR3_ILEN               0
+#define RTE_FSMC_SR3_IREN               0
+
+//       
+
+//       Common memory space timing
+//          MEMHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access to. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset)
+//          MEMSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 2 HCLK cycles (for NAND Flash)
+//           1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset)
+#define RTE_FSMC_PMEM3_MEMHIZ           255
+#define RTE_FSMC_PMEM3_MEMHOLD          255
+#define RTE_FSMC_PMEM3_MEMWAIT          255
+#define RTE_FSMC_PMEM3_MEMSET           255
+
+//       
+
+//       Attribute memory space timing
+//          ATTHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT)
+//          ATTSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PATT3_ATTHIZ           255
+#define RTE_FSMC_PATT3_ATTHOLD          255
+#define RTE_FSMC_PATT3_ATTWAIT          255
+#define RTE_FSMC_PATT3_ATTSET           255
+
+//       
+
+//     
+
+//   
+
+//    PC Card Controller
+
+//      FSMC_NCE4_x Chip Select
+//      Configure PC Card/CompactFlash Device on Chip Select FSMC_NCE4_1/FSMC_NCE4_2
+#define RTE_FSMC_NCE4              0
+
+//        PC Card Control
+//          ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes
+//          Defines the page size for the extended ECC.
+//          TAR: ALE to RE delay <0-15>
+//          Sets time from ALE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          TCLR: CLE to RE delay <0-15>
+//          Sets time from CLE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          ECCEN: ECC computation logic enable
+//         PWID: Databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width.
+//          PTYP: Memory type <0=>PC Card, CompactFlash, CF+ or PCMCIOA
+//          Defines the type of device attached to the corresponding memory bank.
+//          PBKEN: PC Card memory bank enable
+//          Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus.
+//          PWAITEN: Wait feature enable
+//          Enables the Wait feature for the PC Card/NAND Flash memory bank.
+#define RTE_FSMC_PCR4_ECCPS             0
+#define RTE_FSMC_PCR4_TAR               0
+#define RTE_FSMC_PCR4_TCLR              0
+#define RTE_FSMC_PCR4_ECCEN             0
+#define RTE_FSMC_PCR4_PWID              0
+#define RTE_FSMC_PCR4_PTYP              0
+#define RTE_FSMC_PCR4_PBKEN             0
+#define RTE_FSMC_PCR4_PWAITEN           0
+
+//       
+
+//        Interrupt configuration
+//         IFEN: Falling edge detection enable
+//         ILEN: High-level detection enable
+//         IREN: Rising edge detection enable
+#define RTE_FSMC_SR4_IFEN               0
+#define RTE_FSMC_SR4_ILEN               0
+#define RTE_FSMC_SR4_IREN               0
+
+//       
+
+//        Common memory space timing
+//          MEMHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access to. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset)
+//          MEMSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 2 HCLK cycles (for NAND Flash)
+//           1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset)
+#define RTE_FSMC_PMEM4_MEMHIZ           255
+#define RTE_FSMC_PMEM4_MEMHOLD          255
+#define RTE_FSMC_PMEM4_MEMWAIT          255
+#define RTE_FSMC_PMEM4_MEMSET           255
+
+//       
+
+//        Attribute memory space timing
+//          ATTHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT)
+//          ATTSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PATT4_ATTHIZ           255
+#define RTE_FSMC_PATT4_ATTHOLD          255
+#define RTE_FSMC_PATT4_ATTWAIT          255
+#define RTE_FSMC_PATT4_ATTSET           255
+
+//       
+
+//        I/O space timing
+//          IOHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a PC Card write access. Only valid for write transaction.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          IOHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for PC Card read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          IOWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (SMNWE,
+//           SMNOE), for PC Card read or write access. The duration for command assertion is
+//           extended if the wait signal (NWAIT) is active (low) at the end of the
+//           programmed value of HCLK.
+//           0000 0000: reserved, do not use this value
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles
+//          IOSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for PC Card read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PIO4_IOHIZ             255
+#define RTE_FSMC_PIO4_IOHOLD            255
+#define RTE_FSMC_PIO4_IOWAIT            255
+#define RTE_FSMC_PIO4_IOSET             255
+
+//       
+
+//     
+
+//   
+
+// 
+
+
+#endif  /* __RTE_DEVICE_H */
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/Device/STM32F207IG/startup_stm32f2xx.s b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Device/STM32F207IG/startup_stm32f2xx.s
new file mode 100644
index 000000000..d398143ef
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Device/STM32F207IG/startup_stm32f2xx.s
@@ -0,0 +1,419 @@
+;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
+;* File Name          : startup_stm32f2xx.s
+;* Author             : MCD Application Team
+;* Version            : V1.0.0
+;* Date               : 18-April-2011
+;* Description        : STM32F2xx devices vector table for MDK-ARM toolchain. 
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the CortexM3 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>   
+;*******************************************************************************
+; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+;*******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+;  Stack Configuration
+;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; 
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+;  Heap Configuration
+;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; 
+
+Heap_Size       EQU     0x00007000
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog                                        
+                DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection                        
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line            
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line                       
+                DCD     FLASH_IRQHandler                  ; FLASH                                           
+                DCD     RCC_IRQHandler                    ; RCC                                             
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0                                             
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1                                             
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2                                             
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3                                             
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4                                             
+                DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0                                   
+                DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1                                   
+                DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2                                   
+                DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3                                   
+                DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4                                   
+                DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5                                   
+                DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6                                   
+                DCD     ADC_IRQHandler                    ; ADC1, ADC2 and ADC3s                            
+                DCD     CAN1_TX_IRQHandler                ; CAN1 TX                                                
+                DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0                                               
+                DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1                                               
+                DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE                                               
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s                                    
+                DCD     TIM1_BRK_TIM9_IRQHandler          ; TIM1 Break and TIM9                   
+                DCD     TIM1_UP_TIM10_IRQHandler          ; TIM1 Update and TIM10                 
+                DCD     TIM1_TRG_COM_TIM11_IRQHandler     ; TIM1 Trigger and Commutation and TIM11
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare                                   
+                DCD     TIM2_IRQHandler                   ; TIM2                                            
+                DCD     TIM3_IRQHandler                   ; TIM3                                            
+                DCD     TIM4_IRQHandler                   ; TIM4                                            
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event                                             
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error                                             
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event                                             
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error                                               
+                DCD     SPI1_IRQHandler                   ; SPI1                                            
+                DCD     SPI2_IRQHandler                   ; SPI2                                            
+                DCD     USART1_IRQHandler                 ; USART1                                          
+                DCD     USART2_IRQHandler                 ; USART2                                          
+                DCD     USART3_IRQHandler                 ; USART3                                          
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s                                  
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line                  
+                DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI line                        
+                DCD     TIM8_BRK_TIM12_IRQHandler         ; TIM8 Break and TIM12                  
+                DCD     TIM8_UP_TIM13_IRQHandler          ; TIM8 Update and TIM13                 
+                DCD     TIM8_TRG_COM_TIM14_IRQHandler     ; TIM8 Trigger and Commutation and TIM14
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare                                   
+                DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7                                           
+                DCD     FSMC_IRQHandler                   ; FSMC                                            
+                DCD     SDIO_IRQHandler                   ; SDIO                                            
+                DCD     TIM5_IRQHandler                   ; TIM5                                            
+                DCD     SPI3_IRQHandler                   ; SPI3                                            
+                DCD     UART4_IRQHandler                  ; UART4                                           
+                DCD     UART5_IRQHandler                  ; UART5                                           
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors                   
+                DCD     TIM7_IRQHandler                   ; TIM7                   
+                DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0                                   
+                DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1                                   
+                DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2                                   
+                DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3                                   
+                DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4                                   
+                DCD     ETH_IRQHandler                    ; Ethernet                                        
+                DCD     ETH_WKUP_IRQHandler               ; Ethernet Wakeup through EXTI line                      
+                DCD     CAN2_TX_IRQHandler                ; CAN2 TX                                                
+                DCD     CAN2_RX0_IRQHandler               ; CAN2 RX0                                               
+                DCD     CAN2_RX1_IRQHandler               ; CAN2 RX1                                               
+                DCD     CAN2_SCE_IRQHandler               ; CAN2 SCE                                               
+                DCD     OTG_FS_IRQHandler                 ; USB OTG FS                                      
+                DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5                                   
+                DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6                                   
+                DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7                                   
+                DCD     USART6_IRQHandler                 ; USART6                                           
+                DCD     I2C3_EV_IRQHandler                ; I2C3 event                                             
+                DCD     I2C3_ER_IRQHandler                ; I2C3 error                                             
+                DCD     OTG_HS_EP1_OUT_IRQHandler         ; USB OTG HS End Point 1 Out                      
+                DCD     OTG_HS_EP1_IN_IRQHandler          ; USB OTG HS End Point 1 In                       
+                DCD     OTG_HS_WKUP_IRQHandler            ; USB OTG HS Wakeup through EXTI                         
+                DCD     OTG_HS_IRQHandler                 ; USB OTG HS                                      
+                DCD     DCMI_IRQHandler                   ; DCMI                                            
+                DCD     CRYP_IRQHandler                   ; CRYP crypto                                     
+                DCD     HASH_RNG_IRQHandler               ; Hash and Rng 
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WWDG_IRQHandler                   [WEAK]                                        
+                EXPORT  PVD_IRQHandler                    [WEAK]                      
+                EXPORT  TAMP_STAMP_IRQHandler             [WEAK]         
+                EXPORT  RTC_WKUP_IRQHandler               [WEAK]                     
+                EXPORT  FLASH_IRQHandler                  [WEAK]                                         
+                EXPORT  RCC_IRQHandler                    [WEAK]                                            
+                EXPORT  EXTI0_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI1_IRQHandler                  [WEAK]                                             
+                EXPORT  EXTI2_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI3_IRQHandler                  [WEAK]                                           
+                EXPORT  EXTI4_IRQHandler                  [WEAK]                                            
+                EXPORT  DMA1_Stream0_IRQHandler           [WEAK]                                
+                EXPORT  DMA1_Stream1_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream2_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream3_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream4_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream5_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream6_IRQHandler           [WEAK]                                   
+                EXPORT  ADC_IRQHandler                    [WEAK]                         
+                EXPORT  CAN1_TX_IRQHandler                [WEAK]                                                
+                EXPORT  CAN1_RX0_IRQHandler               [WEAK]                                               
+                EXPORT  CAN1_RX1_IRQHandler               [WEAK]                                                
+                EXPORT  CAN1_SCE_IRQHandler               [WEAK]                                                
+                EXPORT  EXTI9_5_IRQHandler                [WEAK]                                    
+                EXPORT  TIM1_BRK_TIM9_IRQHandler          [WEAK]                  
+                EXPORT  TIM1_UP_TIM10_IRQHandler          [WEAK]                
+                EXPORT  TIM1_TRG_COM_TIM11_IRQHandler     [WEAK] 
+                EXPORT  TIM1_CC_IRQHandler                [WEAK]                                   
+                EXPORT  TIM2_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM3_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM4_IRQHandler                   [WEAK]                                            
+                EXPORT  I2C1_EV_IRQHandler                [WEAK]                                             
+                EXPORT  I2C1_ER_IRQHandler                [WEAK]                                             
+                EXPORT  I2C2_EV_IRQHandler                [WEAK]                                            
+                EXPORT  I2C2_ER_IRQHandler                [WEAK]                                               
+                EXPORT  SPI1_IRQHandler                   [WEAK]                                           
+                EXPORT  SPI2_IRQHandler                   [WEAK]                                            
+                EXPORT  USART1_IRQHandler                 [WEAK]                                          
+                EXPORT  USART2_IRQHandler                 [WEAK]                                          
+                EXPORT  USART3_IRQHandler                 [WEAK]                                         
+                EXPORT  EXTI15_10_IRQHandler              [WEAK]                                  
+                EXPORT  RTC_Alarm_IRQHandler              [WEAK]                  
+                EXPORT  OTG_FS_WKUP_IRQHandler            [WEAK]                        
+                EXPORT  TIM8_BRK_TIM12_IRQHandler         [WEAK]                 
+                EXPORT  TIM8_UP_TIM13_IRQHandler          [WEAK]                 
+                EXPORT  TIM8_TRG_COM_TIM14_IRQHandler     [WEAK] 
+                EXPORT  TIM8_CC_IRQHandler                [WEAK]                                   
+                EXPORT  DMA1_Stream7_IRQHandler           [WEAK]                                          
+                EXPORT  FSMC_IRQHandler                   [WEAK]                                             
+                EXPORT  SDIO_IRQHandler                   [WEAK]                                             
+                EXPORT  TIM5_IRQHandler                   [WEAK]                                             
+                EXPORT  SPI3_IRQHandler                   [WEAK]                                             
+                EXPORT  UART4_IRQHandler                  [WEAK]                                            
+                EXPORT  UART5_IRQHandler                  [WEAK]                                            
+                EXPORT  TIM6_DAC_IRQHandler               [WEAK]                   
+                EXPORT  TIM7_IRQHandler                   [WEAK]                    
+                EXPORT  DMA2_Stream0_IRQHandler           [WEAK]                                  
+                EXPORT  DMA2_Stream1_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream2_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream3_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream4_IRQHandler           [WEAK]                                 
+                EXPORT  ETH_IRQHandler                    [WEAK]                                         
+                EXPORT  ETH_WKUP_IRQHandler               [WEAK]                     
+                EXPORT  CAN2_TX_IRQHandler                [WEAK]                                               
+                EXPORT  CAN2_RX0_IRQHandler               [WEAK]                                               
+                EXPORT  CAN2_RX1_IRQHandler               [WEAK]                                               
+                EXPORT  CAN2_SCE_IRQHandler               [WEAK]                                               
+                EXPORT  OTG_FS_IRQHandler                 [WEAK]                                       
+                EXPORT  DMA2_Stream5_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream6_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream7_IRQHandler           [WEAK]                                   
+                EXPORT  USART6_IRQHandler                 [WEAK]                                           
+                EXPORT  I2C3_EV_IRQHandler                [WEAK]                                              
+                EXPORT  I2C3_ER_IRQHandler                [WEAK]                                              
+                EXPORT  OTG_HS_EP1_OUT_IRQHandler         [WEAK]                      
+                EXPORT  OTG_HS_EP1_IN_IRQHandler          [WEAK]                      
+                EXPORT  OTG_HS_WKUP_IRQHandler            [WEAK]                        
+                EXPORT  OTG_HS_IRQHandler                 [WEAK]                                      
+                EXPORT  DCMI_IRQHandler                   [WEAK]                                             
+                EXPORT  CRYP_IRQHandler                   [WEAK]                                     
+                EXPORT  HASH_RNG_IRQHandler               [WEAK]
+
+WWDG_IRQHandler                                                       
+PVD_IRQHandler                                      
+TAMP_STAMP_IRQHandler                  
+RTC_WKUP_IRQHandler                                
+FLASH_IRQHandler                                                       
+RCC_IRQHandler                                                            
+EXTI0_IRQHandler                                                          
+EXTI1_IRQHandler                                                           
+EXTI2_IRQHandler                                                          
+EXTI3_IRQHandler                                                         
+EXTI4_IRQHandler                                                          
+DMA1_Stream0_IRQHandler                                       
+DMA1_Stream1_IRQHandler                                          
+DMA1_Stream2_IRQHandler                                          
+DMA1_Stream3_IRQHandler                                          
+DMA1_Stream4_IRQHandler                                          
+DMA1_Stream5_IRQHandler                                          
+DMA1_Stream6_IRQHandler                                          
+ADC_IRQHandler                                         
+CAN1_TX_IRQHandler                                                            
+CAN1_RX0_IRQHandler                                                          
+CAN1_RX1_IRQHandler                                                           
+CAN1_SCE_IRQHandler                                                           
+EXTI9_5_IRQHandler                                                
+TIM1_BRK_TIM9_IRQHandler                        
+TIM1_UP_TIM10_IRQHandler                      
+TIM1_TRG_COM_TIM11_IRQHandler  
+TIM1_CC_IRQHandler                                               
+TIM2_IRQHandler                                                           
+TIM3_IRQHandler                                                           
+TIM4_IRQHandler                                                           
+I2C1_EV_IRQHandler                                                         
+I2C1_ER_IRQHandler                                                         
+I2C2_EV_IRQHandler                                                        
+I2C2_ER_IRQHandler                                                           
+SPI1_IRQHandler                                                          
+SPI2_IRQHandler                                                           
+USART1_IRQHandler                                                       
+USART2_IRQHandler                                                       
+USART3_IRQHandler                                                      
+EXTI15_10_IRQHandler                                            
+RTC_Alarm_IRQHandler                            
+OTG_FS_WKUP_IRQHandler                                
+TIM8_BRK_TIM12_IRQHandler                      
+TIM8_UP_TIM13_IRQHandler                       
+TIM8_TRG_COM_TIM14_IRQHandler  
+TIM8_CC_IRQHandler                                               
+DMA1_Stream7_IRQHandler                                                 
+FSMC_IRQHandler                                                            
+SDIO_IRQHandler                                                            
+TIM5_IRQHandler                                                            
+SPI3_IRQHandler                                                            
+UART4_IRQHandler                                                          
+UART5_IRQHandler                                                          
+TIM6_DAC_IRQHandler                            
+TIM7_IRQHandler                              
+DMA2_Stream0_IRQHandler                                         
+DMA2_Stream1_IRQHandler                                          
+DMA2_Stream2_IRQHandler                                           
+DMA2_Stream3_IRQHandler                                           
+DMA2_Stream4_IRQHandler                                        
+ETH_IRQHandler                                                         
+ETH_WKUP_IRQHandler                                
+CAN2_TX_IRQHandler                                                           
+CAN2_RX0_IRQHandler                                                          
+CAN2_RX1_IRQHandler                                                          
+CAN2_SCE_IRQHandler                                                          
+OTG_FS_IRQHandler                                                    
+DMA2_Stream5_IRQHandler                                          
+DMA2_Stream6_IRQHandler                                          
+DMA2_Stream7_IRQHandler                                          
+USART6_IRQHandler                                                        
+I2C3_EV_IRQHandler                                                          
+I2C3_ER_IRQHandler                                                          
+OTG_HS_EP1_OUT_IRQHandler                           
+OTG_HS_EP1_IN_IRQHandler                            
+OTG_HS_WKUP_IRQHandler                                
+OTG_HS_IRQHandler                                                   
+DCMI_IRQHandler                                                            
+CRYP_IRQHandler                                                    
+HASH_RNG_IRQHandler                                               
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+                
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+                
+                 ELSE
+                
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+                 
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/Device/STM32F207IG/system_stm32f2xx.c b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Device/STM32F207IG/system_stm32f2xx.c
new file mode 100644
index 000000000..da0e189c8
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Device/STM32F207IG/system_stm32f2xx.c
@@ -0,0 +1,536 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32f2xx.c
+  * @author  MCD Application Team
+  * @version V1.0.0
+  * @date    18-April-2011
+  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
+  *          This file contains the system clock configuration for STM32F2xx devices,
+  *          and is generated by the clock configuration tool
+  *          "STM32f2xx_Clock_Configuration_V1.0.0.xls"
+  *             
+  * 1.  This file provides two functions and one global variable to be called from 
+  *     user application:
+  *      - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
+  *                      and Divider factors, AHB/APBx prescalers and Flash settings),
+  *                      depending on the configuration made in the clock xls tool. 
+  *                      This function is called at startup just after reset and 
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32f2xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick 
+  *                                  timer or configure other parameters.
+  *                                     
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  * 2. After each device reset the HSI (16 MHz) is used as system clock source.
+  *    Then SystemInit() function is called, in "startup_stm32f2xx.s" file, to
+  *    configure the system clock before to branch to main program.
+  *
+  * 3. If the system clock source selected by user fails to startup, the SystemInit()
+  *    function will do nothing and HSI still used as system clock source. User can 
+  *    add some code to deal with this issue inside the SetSysClock() function.
+  *
+  * 4. The default value of HSE crystal is set to 25MHz, refer to "HSE_VALUE" define
+  *    in "stm32f2xx.h" file. When HSE is used as system clock source, directly or
+  *    through PLL, and you are using different crystal you have to adapt the HSE
+  *    value to your own configuration.
+  *
+  * 5. This file configures the system clock as follows:
+  *=============================================================================
+  *=============================================================================
+  *        Supported STM32F2xx device revision    | Rev B and Y
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | PLL (HSE)
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 120000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 120000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 4
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 2
+  *-----------------------------------------------------------------------------
+  *        HSE Frequency(Hz)                      | 25000000
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 25
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 240
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 5
+  *-----------------------------------------------------------------------------
+  *        PLLI2S_N                               | NA
+  *-----------------------------------------------------------------------------
+  *        PLLI2S_R                               | NA
+  *-----------------------------------------------------------------------------
+  *        I2S input clock                        | NA
+  *-----------------------------------------------------------------------------
+  *        VDD(V)                                 | 3.3
+  *-----------------------------------------------------------------------------
+  *        Flash Latency(WS)                      | 3
+  *-----------------------------------------------------------------------------
+  *        Prefetch Buffer                        | ON
+  *-----------------------------------------------------------------------------
+  *        Instruction cache                      | ON
+  *-----------------------------------------------------------------------------
+  *        Data cache                             | ON
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for USB OTG FS,          | Enabled
+  *        SDIO and RNG clock                     |
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ****************************************************************************** 
+  * @attention
+  *
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * 
© COPYRIGHT 2011 STMicroelectronics

+  ******************************************************************************  
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f2xx_system
+  * @{
+  */  
+  
+/** @addtogroup STM32F2xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32f2xx.h"
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Defines
+  * @{
+  */
+
+/*!< Uncomment the following line if you need to use external SRAM mounted
+     on STM322xG_EVAL board as data memory  */
+/* #define DATA_IN_ExtSRAM */
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field. 
+                                   This value must be a multiple of 0x200. */
+
+
+/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
+#define PLL_M      25
+#define PLL_N      240
+
+/* SYSCLK = PLL_VCO / PLL_P */
+#define PLL_P      2
+
+/* USB OTG FS, SDIO and RNG Clock =  PLL_VCO / PLLQ */
+#define PLL_Q      5
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Variables
+  * @{
+  */
+
+  uint32_t SystemCoreClock = 120000000;
+
+  __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+static void SetSysClock(void);
+#ifdef DATA_IN_ExtSRAM
+  static void SystemInit_ExtMemCtl(void); 
+#endif /* DATA_IN_ExtSRAM */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system
+  *         Initialize the Embedded Flash Interface, the PLL and update the 
+  *         SystemFrequency variable.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+  /* Reset the RCC clock configuration to the default reset state ------------*/
+  /* Set HSION bit */
+  RCC->CR |= (uint32_t)0x00000001;
+
+  /* Reset CFGR register */
+  RCC->CFGR = 0x00000000;
+
+  /* Reset HSEON, CSSON and PLLON bits */
+  RCC->CR &= (uint32_t)0xFEF6FFFF;
+
+  /* Reset PLLCFGR register */
+  RCC->PLLCFGR = 0x24003010;
+
+  /* Reset HSEBYP bit */
+  RCC->CR &= (uint32_t)0xFFFBFFFF;
+
+  /* Disable all interrupts */
+  RCC->CIR = 0x00000000;
+
+#ifdef DATA_IN_ExtSRAM
+  SystemInit_ExtMemCtl(); 
+#endif /* DATA_IN_ExtSRAM */
+         
+  /* Configure the System clock source, PLL Multiplier and Divider factors, 
+     AHB/APBx prescalers and Flash settings ----------------------------------*/
+  SetSysClock();
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *           
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.         
+  *     
+  * @note   - The system frequency computed by this function is not the real 
+  *           frequency in the chip. It is calculated based on the predefined 
+  *           constant and the selected clock source:
+  *             
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *                                              
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+  *                          
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *         
+  *         (*) HSI_VALUE is a constant defined in stm32f2xx.h file (default value
+  *             16 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.   
+  *    
+  *         (**) HSE_VALUE is a constant defined in stm32f2xx.h file (default value
+  *              25 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *                
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *     
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+  
+  /* Get SYSCLK source -------------------------------------------------------*/
+  tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+  switch (tmp)
+  {
+    case 0x00:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+    case 0x04:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+    case 0x08:  /* PLL used as system clock source */
+
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+         SYSCLK = PLL_VCO / PLL_P
+         */    
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+      
+      if (pllsource != 0)
+      {
+        /* HSE used as PLL clock source */
+        pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+      else
+      {
+        /* HSI used as PLL clock source */
+        pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);      
+      }
+
+      pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+      SystemCoreClock = pllvco/pllp;
+      break;
+    default:
+      SystemCoreClock = HSI_VALUE;
+      break;
+  }
+  /* Compute HCLK frequency --------------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK frequency */
+  SystemCoreClock >>= tmp;
+}
+
+/**
+  * @brief  Configures the System clock source, PLL Multiplier and Divider factors, 
+  *         AHB/APBx prescalers and Flash settings
+  * @Note   This function should be called only once the RCC clock configuration  
+  *         is reset to the default reset state (done in SystemInit() function).   
+  * @param  None
+  * @retval None
+  */
+static void SetSysClock(void)
+{
+/******************************************************************************/
+/*            PLL (clocked by HSE) used as System clock source                */
+/******************************************************************************/
+  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
+  
+  /* Enable HSE */
+  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
+ 
+  /* Wait till HSE is ready and if Time out is reached exit */
+  do
+  {
+    HSEStatus = RCC->CR & RCC_CR_HSERDY;
+    StartUpCounter++;
+  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
+
+  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
+  {
+    HSEStatus = (uint32_t)0x01;
+  }
+  else
+  {
+    HSEStatus = (uint32_t)0x00;
+  }
+
+  if (HSEStatus == (uint32_t)0x01)
+  {
+    /* HCLK = SYSCLK / 1*/
+    RCC->CFGR |= RCC_CFGR_HPRE_DIV1;
+      
+    /* PCLK2 = HCLK / 2*/
+    RCC->CFGR |= RCC_CFGR_PPRE2_DIV2;
+    
+    /* PCLK1 = HCLK / 4*/
+    RCC->CFGR |= RCC_CFGR_PPRE1_DIV4;
+
+    /* Configure the main PLL */
+    RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) |
+                   (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);
+
+    /* Enable the main PLL */
+    RCC->CR |= RCC_CR_PLLON;
+
+    /* Wait till the main PLL is ready */
+    while((RCC->CR & RCC_CR_PLLRDY) == 0)
+    {
+    }
+   
+    /* Configure Flash prefetch, Instruction cache, Data cache and wait state */
+    FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_3WS;
+
+    /* Select the main PLL as system clock source */
+    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
+    RCC->CFGR |= RCC_CFGR_SW_PLL;
+
+    /* Wait till the main PLL is used as system clock source */
+    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
+    {
+    }
+  }
+  else
+  { /* If HSE fails to start-up, the application will have wrong clock
+         configuration. User can add here some code to deal with this error */
+  }
+
+}
+
+/**
+  * @brief  Setup the external memory controller. Called in startup_stm32f2xx.s
+  *         before jump to __main
+  * @param  None
+  * @retval None
+  */
+#ifdef DATA_IN_ExtSRAM
+/**
+  * @brief  Setup the external memory controller.
+  *         Called in startup_stm32f2xx.s before jump to main.
+  *         This function configures the external SRAM mounted on STM322xG_EVAL board
+  *         This SRAM will be used as program data memory (including heap and stack).
+  * @param  None
+  * @retval None
+  */
+void SystemInit_ExtMemCtl(void)
+{
+/*-- GPIOs Configuration -----------------------------------------------------*/
+/*
+ +-------------------+--------------------+------------------+------------------+
+ +                       SRAM pins assignment                                  +
+ +-------------------+--------------------+------------------+------------------+
+ | PD0  <-> FSMC_D2  | PE0  <-> FSMC_NBL0 | PF0  <-> FSMC_A0 | PG0 <-> FSMC_A10 |
+ | PD1  <-> FSMC_D3  | PE1  <-> FSMC_NBL1 | PF1  <-> FSMC_A1 | PG1 <-> FSMC_A11 |
+ | PD4  <-> FSMC_NOE | PE7  <-> FSMC_D4   | PF2  <-> FSMC_A2 | PG2 <-> FSMC_A12 |
+ | PD5  <-> FSMC_NWE | PE8  <-> FSMC_D5   | PF3  <-> FSMC_A3 | PG3 <-> FSMC_A13 |
+ | PD8  <-> FSMC_D13 | PE9  <-> FSMC_D6   | PF4  <-> FSMC_A4 | PG4 <-> FSMC_A14 |
+ | PD9  <-> FSMC_D14 | PE10 <-> FSMC_D7   | PF5  <-> FSMC_A5 | PG5 <-> FSMC_A15 |
+ | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8   | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 |
+ | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9   | PF13 <-> FSMC_A7 |------------------+
+ | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10  | PF14 <-> FSMC_A8 | 
+ | PD14 <-> FSMC_D0  | PE14 <-> FSMC_D11  | PF15 <-> FSMC_A9 | 
+ | PD15 <-> FSMC_D1  | PE15 <-> FSMC_D12  |------------------+
+ +-------------------+--------------------+
+*/
+   /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+  RCC->AHB1ENR   = 0x00000078;
+  
+  /* Connect PDx pins to FSMC Alternate function */
+  GPIOD->AFR[0]  = 0x00cc00cc;
+  GPIOD->AFR[1]  = 0xcc0ccccc;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xa2aa0a0a;
+  /* Configure PDx pins speed to 100 MHz */  
+  GPIOD->OSPEEDR = 0xf3ff0f0f;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FSMC Alternate function */
+  GPIOE->AFR[0]  = 0xc00000cc;
+  GPIOE->AFR[1]  = 0xcccccccc;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xaaaa800a;
+  /* Configure PEx pins speed to 100 MHz */ 
+  GPIOE->OSPEEDR = 0xffffc00f;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+
+  /* Connect PFx pins to FSMC Alternate function */
+  GPIOF->AFR[0]  = 0x00cccccc;
+  GPIOF->AFR[1]  = 0xcccc0000;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xaa000aaa;
+  /* Configure PFx pins speed to 100 MHz */ 
+  GPIOF->OSPEEDR = 0xff000fff;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FSMC Alternate function */
+  GPIOG->AFR[0]  = 0x00cccccc;
+  GPIOG->AFR[1]  = 0x000000c0;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0x00080aaa;
+  /* Configure PGx pins speed to 100 MHz */ 
+  GPIOG->OSPEEDR = 0x000c0fff;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+  
+/*-- FSMC Configuration ------------------------------------------------------*/
+  /* Enable the FSMC interface clock */
+  RCC->AHB3ENR         = 0x00000001;
+
+  /* Configure and enable Bank1_SRAM2 */
+  FSMC_Bank1->BTCR[2]  = 0x00001015;
+  FSMC_Bank1->BTCR[3]  = 0x00010400;
+  FSMC_Bank1E->BWTR[2] = 0x0fffffff;
+/*
+  Bank1_SRAM2 is configured as follow:
+
+  p.FSMC_AddressSetupTime = 0;
+  p.FSMC_AddressHoldTime = 0;
+  p.FSMC_DataSetupTime = 4;
+  p.FSMC_BusTurnAroundDuration = 1;
+  p.FSMC_CLKDivision = 0;
+  p.FSMC_DataLatency = 0;
+  p.FSMC_AccessMode = FSMC_AccessMode_A;
+
+  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
+  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
+  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
+  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;  
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
+  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
+  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
+  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
+*/
+  
+}
+#endif /* DATA_IN_ExtSRAM */
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+  
+/**
+  * @}
+  */
+/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/File_System/FS_Config.c b/IDE/MDK5-ARM/Projects/EchoClient/RTE/File_System/FS_Config.c
new file mode 100644
index 000000000..78564b080
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/File_System/FS_Config.c
@@ -0,0 +1,72 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::File System
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    FS_Config.c
+ * Purpose: File System Configuration
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// File System
+// Define File System global parameters
+
+//   Number of open files <4-16>
+//   Define number of files that can be
+//   opened at the same time.
+//   Default: 8
+#define NUM_FILES               8
+
+//   FAT Name Cache Size <0-1000000>
+//   Define number of cached FAT file or directory names.
+//   48 bytes of RAM is required for each cached name.
+#define FAT_NAME_CACHE_SIZE     0
+
+//   Relocate FAT Name Cache Buffer
+//   Locate Cache Buffer at a specific address.
+#define FAT_NAME_CACHE_RELOC    0
+
+//     Base address <0x0000-0xFFFFFE00:0x200>
+//     Define the Cache buffer base address.
+#define FAT_NAME_CACHE_ADDR     0x60000000
+
+//   
+
+// 
+
+#include "..\RTE_Components.h"
+
+#ifdef  RTE_FileSystem_Drive_RAM
+#include "FS_Config_RAM.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_NOR_0
+#include "FS_Config_NOR_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_NOR_1
+#include "FS_Config_NOR_1.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_NAND_0
+#include "FS_Config_NAND_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_NAND_1
+#include "FS_Config_NAND_1.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_MC_0
+#include "FS_Config_MC_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_MC_1
+#include "FS_Config_MC_1.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_USB_0
+#include "FS_Config_USB_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_USB_1
+#include "FS_Config_USB_1.h"
+#endif
+
+#include "fs_config.h"
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/File_System/FS_Config_MC_0.h b/IDE/MDK5-ARM/Projects/EchoClient/RTE/File_System/FS_Config_MC_0.h
new file mode 100644
index 000000000..0b1c6d3a7
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/File_System/FS_Config_MC_0.h
@@ -0,0 +1,57 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::File System:Drive
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    FS_Config_MC_0.h
+ * Purpose: File System Configuration for Memory Card Drive
+ * Rev.:    V5.01
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Memory Card Drive 0
+// Configuration for SD/SDHC/MMC Memory Card assigned to drive letter "M0:"
+#define MC0_ENABLE              1
+
+//   Connect to hardware via Driver_MCI# <0-255>
+//   Select driver control block for hardware interface
+#define MC0_MCI_DRIVER          0
+
+//   Connect to hardware via Driver_SPI# <0-255>
+//   Select driver control block for hardware interface when in SPI mode
+#define MC0_SPI_DRIVER          0
+
+//   Memory Card Interface Mode <0=>Native <1=>SPI
+//   Native uses a SD Bus with up to 8 data lines, CLK, and CMD
+//   SPI uses 2 data lines (MOSI and MISO), SCLK and CS
+//   When using SPI both Driver_SPI# and Driver_MCI# must be specified
+//   since the MCI driver provides the control interface lines.
+#define MC0_SPI                 0
+          
+//   Drive Cache Size <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
+//                       <8=>8 KB <16=>16 KB <32=>32 KB
+//   Drive Cache stores data sectors and may be increased to speed-up
+//   file read/write operations on this drive (default: 4 KB)
+#define MC0_CACHE_SIZE          4
+
+//   Locate Drive Cache and Drive Buffer
+//   Some microcontrollers support DMA only in specific memory areas and
+//   require to locate the drive buffers at a fixed address.
+#define MC0_CACHE_RELOC         0
+
+//     Base address <0x0000-0xFFFFFE00:0x200>
+//     Set buffer base address to RAM areas that support DMA with the drive.
+#define MC0_CACHE_ADDR          0x7FD00000
+
+//   
+
+//   Use FAT Journal
+//   Protect File Allocation Table and Directory Entries for
+//   fail-safe operation.
+#define MC0_FAT_JOURNAL         0
+
+//   Default Drive "M0:"
+//   Use this drive when no drive letter is specified.
+#define MC0_DEFAULT_DRIVE       1
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config.c b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config.c
new file mode 100644
index 000000000..6b9dc8e00
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config.c
@@ -0,0 +1,153 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config.c
+ * Purpose: Network Configuration
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// System Definitions
+//  Global Network System definitions
+//   Local Host Name
+//    This is the name under which embedded host can be
+//    accessed on a local area network.
+//    Default: "my_host"
+#define NET_HOST_NAME           "my_host"
+
+//   Memory Pool size <1536-262144:4><#/4>
+//    This is the size of a memory pool in bytes. Buffers for
+//    Network packets are allocated from this memory pool.
+//    Default: 12000 bytes
+#define NET_MEM_SIZE            3000
+
+// 
+
+#include "..\RTE_Components.h"
+
+#ifdef  RTE_Network_Interface_ETH_0
+#include "Net_Config_ETH_0.h"
+#endif
+#ifdef  RTE_Network_Interface_ETH_1
+#include "Net_Config_ETH_1.h"
+#endif
+
+#ifdef  RTE_Network_Interface_PPP_0
+#include "Net_Config_PPP_0.h"
+#endif
+#ifdef  RTE_Network_Interface_PPP_1
+#include "Net_Config_PPP_1.h"
+#endif
+
+#ifdef  RTE_Network_Interface_SLIP_0
+#include "Net_Config_SLIP_0.h"
+#endif
+#ifdef  RTE_Network_Interface_SLIP_1
+#include "Net_Config_SLIP_1.h"
+#endif
+
+#ifdef  RTE_Network_Socket_UDP
+#include "Net_Config_UDP.h"
+#endif
+#ifdef  RTE_Network_Socket_TCP
+#include "Net_Config_TCP.h"
+#endif
+#ifdef  RTE_Network_Socket_BSD
+#include "Net_Config_BSD.h"
+#endif
+
+#ifdef  RTE_Network_Web_Server_RO
+#include "Net_Config_HTTP_Server.h"
+#endif
+#ifdef  RTE_Network_Web_Server_FS
+#include "Net_Config_HTTP_Server.h"
+#endif
+
+#ifdef  RTE_Network_Telnet_Server
+#include "Net_Config_Telnet_Server.h"
+#endif
+
+#ifdef  RTE_Network_TFTP_Server
+#include "Net_Config_TFTP_Server.h"
+#endif
+#ifdef  RTE_Network_TFTP_Client
+#include "Net_Config_TFTP_Client.h"
+#endif
+
+#ifdef  RTE_Network_FTP_Server
+#include "Net_Config_FTP_Server.h"
+#endif
+#ifdef  RTE_Network_FTP_Client
+#include "Net_Config_FTP_Client.h"
+#endif
+
+#ifdef  RTE_Network_DNS_Client
+#include "Net_Config_DNS_Client.h"
+#endif
+
+#ifdef  RTE_Network_SMTP_Client
+#include "Net_Config_SMTP_Client.h"
+#endif
+
+#ifdef  RTE_Network_SNMP_Agent
+#include "Net_Config_SNMP_Agent.h"
+#endif
+
+#ifdef  RTE_Network_SNTP_Client
+#include "Net_Config_SNTP_Client.h"
+#endif
+
+#include "net_config.h"
+
+/**
+\addtogroup net_genFunc
+@{
+*/
+/**
+  \fn          void net_sys_error (ERROR_CODE error)
+  \ingroup     net_cores
+  \brief       Network system error handler.
+*/
+void net_sys_error (ERROR_CODE error) {
+  /* This function is called when a fatal error is encountered. */
+  /* The normal program execution is not possible anymore.      */
+
+  switch (error) {
+    case ERR_MEM_ALLOC:
+      /* Out of memory */
+      break;
+
+    case ERR_MEM_FREE:
+      /* Trying to release non existing memory block */
+      break;
+
+    case ERR_MEM_CORRUPT:
+      /* Memory Link pointer Corrupted */
+      /* More data written than the size of allocated mem block */
+      break;
+
+    case ERR_MEM_LOCK:
+      /* Locked Memory management function (alloc/free) re-entered */
+      break;
+
+    case ERR_UDP_ALLOC:
+      /* Out of UDP Sockets */
+      break;
+
+    case ERR_TCP_ALLOC:
+      /* Out of TCP Sockets */
+      break;
+
+    case ERR_TCP_STATE:
+      /* TCP State machine in undefined state */
+      break;
+  }
+
+  /* End-less loop */
+  while (1);
+}
+/**
+@}
+*/
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_BSD.h b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_BSD.h
new file mode 100644
index 000000000..d7e6a614a
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_BSD.h
@@ -0,0 +1,36 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Socket
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_BSD.h
+ * Purpose: Network Configuration BSD Sockets
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Berkley (BSD) Sockets
+#define BSD_ENABLE              1
+
+//   Number of BSD Sockets <1-20>
+//    Number of available Berkeley Sockets
+//    Default: 2
+#define BSD_NUM_SOCKS           7
+
+//   Number of Streaming Server Sockets <0-20>
+//    Defines a number of Streaming (TCP) Server sockets,
+//    that listen for an incoming connection from the client.
+//    Default: 1
+#define BSD_SERVER_SOCKS        1
+
+//   Receive Timeout in seconds <0-600>
+//    A timeout for socket receive in blocking mode.
+//    Timeout value of 0 means indefinite timeout.
+//    Default: 20
+#define BSD_RECEIVE_TOUT        20
+
+//   Hostname Resolver
+//    Enable or disable Berkeley style hostname resolver.
+#define BSD_HOSTNAME_ENABLE     0
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_DNS_Client.h b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_DNS_Client.h
new file mode 100644
index 000000000..d30b71807
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_DNS_Client.h
@@ -0,0 +1,20 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Service
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_DNS_Client.h
+ * Purpose: Network Configuration DNS Client
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// DNS Client
+#define DNS_CLIENT_ENABLE       1
+
+//     Cache Table size <5-100>
+//      Number of cached DNS host names/IP addresses
+//      Default: 20
+#define DNS_CLIENT_TAB_SIZE     20
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_ETH_0.h b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_ETH_0.h
new file mode 100644
index 000000000..7be57ad6d
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_ETH_0.h
@@ -0,0 +1,222 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Interface
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_ETH_0.h
+ * Purpose: Network Configuration ETH Interface
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Ethernet Network Interface 0
+#define ETH0_ENABLE             1
+
+//   Connect to hardware via Driver_ETH# <0-255>
+//   Select driver control block for MAC and PHY interface
+#define ETH0_DRIVER             1
+
+//   MAC Address
+//    Local Ethernet MAC Address
+//    Value FF:FF:FF:FF:FF:FF is not allowed.
+//    It is an ethernet Broadcast MAC address.
+//     Address byte 1 <0x00-0xff:2>
+//      LSB is an ethernet Multicast bit.
+//      Must be 0 for local MAC address.
+//      Default: 0x1E
+#define ETH0_MAC1               0x1E
+
+//     Address byte 2 <0x00-0xff>
+//      Default: 0x30
+#define ETH0_MAC2               0x30
+
+//     Address byte 3 <0x00-0xff>
+//      Default: 0x6C
+#define ETH0_MAC3               0x6C
+
+//     Address byte 4 <0x00-0xff>
+//      Default: 0xA2
+#define ETH0_MAC4               0xA2
+
+//     Address byte 5 <0x00-0xff>
+//      Default: 0x45
+#define ETH0_MAC5               0x45
+
+//     Address byte 6 <0x00-0xff>
+//      Default: 0x5E
+#define ETH0_MAC6               0x5E
+//   
+
+//   IP Address
+//    Local Static IP Address
+//    Value 255.255.255.255 is not allowed.
+//    It is a Broadcast IP address.
+//     Address byte 1 <0-255>
+//      Default: 192
+#define ETH0_IP1                192
+
+//     Address byte 2 <0-255>
+//      Default: 168
+#define ETH0_IP2                168
+
+//     Address byte 3 <0-255>
+//      Default: 0
+#define ETH0_IP3                0
+
+//     Address byte 4 <0-255>
+//      Default: 100
+#define ETH0_IP4                100
+//   
+
+//   Subnet mask
+//    Local Subnet mask
+//     Mask byte 1 <0-255>
+//      Default: 255
+#define ETH0_MASK1              255
+
+//     Mask byte 2 <0-255>
+//      Default: 255
+#define ETH0_MASK2              255
+
+//     Mask byte 3 <0-255>
+//      Default: 255
+#define ETH0_MASK3              255
+
+//     Mask byte 4 <0-255>
+//      Default: 0
+#define ETH0_MASK4              0
+//   
+
+//   Default Gateway
+//    Default Gateway IP Address
+//     Address byte 1 <0-255>
+//      Default: 192
+#define ETH0_GW1                192
+
+//     Address byte 2 <0-255>
+//      Default: 168
+#define ETH0_GW2                168
+
+//     Address byte 3 <0-255>
+//      Default: 0
+#define ETH0_GW3                0
+
+//     Address byte 4 <0-255>
+//      Default: 254
+#define ETH0_GW4                254
+//   
+
+//   Primary DNS Server
+//    Primary DNS Server IP Address
+//     Address byte 1 <0-255>
+//      Default: 194
+#define ETH0_PRI_DNS1           194
+
+//     Address byte 2 <0-255>
+//      Default: 25
+#define ETH0_PRI_DNS2           25
+
+//     Address byte 3 <0-255>
+//      Default: 2
+#define ETH0_PRI_DNS3           2
+
+//     Address byte 4 <0-255>
+//      Default: 129
+#define ETH0_PRI_DNS4           129
+//   
+
+//   Secondary DNS Server
+//    Secondary DNS Server IP Address
+//     Address byte 1 <0-255>
+//      Default: 194
+#define ETH0_SEC_DNS1           194
+
+//     Address byte 2 <0-255>
+//      Default: 25
+#define ETH0_SEC_DNS2           25
+
+//     Address byte 3 <0-255>
+//      Default: 2
+#define ETH0_SEC_DNS3           2
+
+//     Address byte 4 <0-255>
+//      Default: 130
+#define ETH0_SEC_DNS4           130
+//   
+
+//   ARP Definitions
+//    Address Resolution Protocol Definitions
+//     Cache Table size <5-100>
+//      Number of cached hardware/IP addresses
+//      Default: 10
+#define ETH0_ARP_TAB_SIZE       10
+
+//     Cache Timeout in seconds <5-255>
+//      A timeout for a cached hardware/IP addresses
+//      Default: 150
+#define ETH0_ARP_CACHE_TOUT     150
+
+//     Number of Retries <0-20>
+//      Number of Retries to resolve an IP address
+//      before ARP module gives up
+//      Default: 4
+#define ETH0_ARP_MAX_RETRY      4
+
+//     Resend Timeout in seconds <1-10>
+//      A timeout to resend the ARP Request
+//      Default: 2
+#define ETH0_ARP_RESEND_TOUT    2
+
+//     Send Notification on Address changes
+//      When this option is enabled, the embedded host
+//      will send a Gratuitous ARP notification at startup,
+//      or when the device IP address has changed.
+//      Default: Disabled
+#define ETH0_ARP_NOTIFY         0
+//   
+
+//   IGMP Group Management
+//    Enable or disable Internet Group Management Protocol
+#define ETH0_IGMP_ENABLE        0
+
+//     Membership Table size <2-50>
+//      Number of Groups this host can join
+//      Default: 5
+#define ETH0_IGMP_TAB_SIZE      5
+//   
+
+//   NetBIOS Name Service
+//    When this option is enabled, the embedded host can be
+//    accessed by his name on the local LAN using NBNS protocol.
+//    You need to modify also the number of UDP Sockets,
+//    because NBNS protocol uses one UDP socket to run.
+#define ETH0_NBNS_ENABLE        1
+
+//   Dynamic Host Configuration
+//    When this option is enabled, local IP address, Net Mask
+//    and Default Gateway are obtained automatically from
+//    the DHCP Server on local LAN.
+//    You need to modify also the number of UDP Sockets,
+//    because DHCP protocol uses one UDP socket to run.
+#define ETH0_DHCP_ENABLE        1
+
+//     Vendor Class Identifier
+//      This value is optional. If specified, it is added
+//      to DHCP request message, identifying vendor type.
+//      Default: ""
+#define ETH0_DHCP_VCID          ""
+
+//     Bootfile Name
+//      This value is optional. If enabled, the Bootfile Name
+//      (option 67) is also requested from DHCP server.
+//      Default: disabled
+#define ETH0_DHCP_BOOTFILE      0
+
+//     NTP Servers
+//      This value is optional. If enabled, a list of NTP Servers
+//      (option 42) is also requested from DHCP server.
+//      Default: disabled
+#define ETH0_DHCP_NTP_SERVERS   0
+//   
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_TCP.h b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_TCP.h
new file mode 100644
index 000000000..e659ce921
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_TCP.h
@@ -0,0 +1,61 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Socket
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_TCP.h
+ * Purpose: Network Configuration TCP Sockets
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// TCP Sockets
+#define TCP_ENABLE              1
+
+//   Number of TCP Sockets <1-20>
+//    Number of available TCP sockets
+//    Default: 5
+#define TCP_NUM_SOCKS           10
+
+//   Number of Retries <0-20>
+//    How many times TCP module will try to retransmit data
+//    before giving up. Increase this value for high-latency
+//    and low_throughput networks.
+//    Default: 5
+#define TCP_MAX_RETRY           5
+
+//   Retry Timeout in seconds <1-10>
+//    If data frame not acknowledged within this time frame,
+//    TCP module will try to resend the data again.
+//    Default: 4
+#define TCP_RETRY_TOUT          4
+
+//   Default Connect Timeout in seconds <1-600>
+//    Default TCP Socket Keep Alive timeout. When it expires
+//    with no TCP data frame send, TCP Connection is closed.
+//    Default: 120
+#define TCP_DEFAULT_TOUT        120
+
+//   Maximum Segment Size <536-1460>
+//    The Maximum Segment Size specifies the maximum
+//    number of bytes in the TCP segment's Data field.
+//    Default: 1460
+#define TCP_MAX_SEG_SIZE        1460
+
+//   Receive Window Size <536-65535>
+//    Receive Window Size specifies the size of data, 
+//    that the socket is able to buffer in flow-control mode.
+//    Default: 4380
+#define TCP_RECEIVE_WIN_SIZE    4380
+
+// 
+
+// TCP Initial Retransmit period in seconds
+#define TCP_INITIAL_RETRY_TOUT  1
+
+// TCP SYN frame retransmit period in seconds
+#define TCP_SYN_RETRY_TOUT      2
+
+// Number of retries to establish a connection
+#define TCP_CONNECT_RETRY       7
+
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_UDP.h b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_UDP.h
new file mode 100644
index 000000000..b7995c22d
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Config_UDP.h
@@ -0,0 +1,20 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Socket
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_UDP.h
+ * Purpose: Network Configuration UDP Sockets
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// UDP Sockets
+#define UDP_ENABLE              1
+
+//   Number of UDP Sockets <1-20>
+//    Number of available UDP sockets
+//    Default: 5
+#define UDP_NUM_SOCKS           10
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Debug.c b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Debug.c
new file mode 100644
index 000000000..735089a40
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/Network/Net_Debug.c
@@ -0,0 +1,125 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Debug.c
+ * Purpose: Network Debug Configuration
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Print Time Stamp
+//    Enable printing the time-info in debug messages
+#define DBG_TIME                1
+
+// TCPnet Debug Definitions
+//   Memory Management Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Dynamic Memory debug messages
+#define DBG_MEM                 1
+
+//   Ethernet Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Ethernet debug messages
+#define DBG_ETH                 0
+
+//   PPP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off PPP debug messages
+#define DBG_PPP                 0
+
+//   SLIP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off SLIP debug messages
+#define DBG_SLIP                0
+
+//   ARP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off ARP debug messages
+#define DBG_ARP                 0
+
+//   IP Debug    <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off IP debug messages
+#define DBG_IP                  1
+
+//   ICMP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off ICMP debug messages
+#define DBG_ICMP                1
+
+//   IGMP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off IGMP debug messages
+#define DBG_IGMP                1
+
+//   UDP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off UDP debug messages
+#define DBG_UDP                 1
+
+//   TCP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off TCP debug messages
+#define DBG_TCP                 1
+
+//   NBNS Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off NetBIOS Name Service debug messages
+#define DBG_NBNS                1
+
+//   DHCP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Dynamic Host Configuration debug messages
+#define DBG_DHCP                1
+
+//   DNS Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Domain Name Service debug messages
+#define DBG_DNS                 1
+
+//   SNMP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Simple Network Management debug messages
+#define DBG_SNMP                1
+
+//   SNTP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Simple Network Time debug messages
+#define DBG_SNTP                1
+
+//   BSD Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off BSD Interface debug messages
+#define DBG_BSD                 1
+// 
+
+// Application Debug Definitions
+//   HTTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Web Server debug messages
+#define DBG_HTTP_SERVER         1
+
+//   FTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off FTP Server debug messages
+#define DBG_FTP_SERVER          1
+
+//   FTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off FTP Client debug messages
+#define DBG_FTP_CLIENT          1
+
+//   Telnet Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Telnet Server debug messages
+#define DBG_TELNET_SERVER       1
+
+//   TFTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off TFTP Server debug messages
+#define DBG_TFTP_SERVER         1
+
+//   TFTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off TFTP Client debug messages
+#define DBG_TFTP_CLIENT         1
+
+//   SMTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off SMTP Client debug messages
+#define DBG_SMTP_CLIENT         1
+// 
+
+
+#include "net_debug.h"
+
+
+/**
+  \fn          void net_debug_init (void)
+  \brief       Initialize Network Debug Interface.
+*/
+void net_debug_init (void) {
+  /* Add your code to initialize the Debug output. This is usually the  */
+  /* serial interface. The function is called at TCPnet system startup. */
+  /* You may need to customize also the 'putchar()' function.           */
+
+}
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/RTE_Components.h b/IDE/MDK5-ARM/Projects/EchoClient/RTE/RTE_Components.h
new file mode 100644
index 000000000..631a77143
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/RTE_Components.h
@@ -0,0 +1,28 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ *      *** Do not modify ! ***
+ *
+ * Project: 'EchoClient' 
+ * Target:  'EchoClient' 
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+#define RTE_DEVICE_STARTUP_STM32F2xx    /* Device Startup for STM32F2 */
+#define RTE_Drivers_ETH_MAC0            /* Driver ETH_MAC0 */
+#define RTE_Drivers_MCI0                /* Driver MCI0 */
+#define RTE_Drivers_PHY_ST802RT1        /* Driver PHY ST802RT1 */
+#define RTE_FileSystem_Core             /* File System Core */
+          #define RTE_FileSystem_LFN              /* File System with Long Filename support */
+#define RTE_FileSystem_Drive_MC_0       /* File System Memory Card Drive 0 */
+#define RTE_Network_Core                /* Network Core */
+          #define RTE_Network_Debug               /* Network Debug Version */
+#define RTE_Network_DNS_Client          /* Network DNS Client */
+#define RTE_Network_Interface_ETH_0     /* Network Interface ETH 0 */
+#define RTE_Network_Socket_BSD          /* Network Socket BSD */
+#define RTE_Network_Socket_TCP          /* Network Socket TCP */
+#define RTE_Network_Socket_UDP          /* Network Socket UDP */
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/STM32_SWO.ini b/IDE/MDK5-ARM/Projects/EchoClient/STM32_SWO.ini
new file mode 100644
index 000000000..239abce37
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/STM32_SWO.ini
@@ -0,0 +1,36 @@
+/******************************************************************************/
+/* STM32_SWO.ini: STM32 Debugger Initialization File                           */
+/******************************************************************************/
+// <<< Use Configuration Wizard in Context Menu >>>                           // 
+/******************************************************************************/
+/* This file is part of the uVision/ARM development tools.                    */
+/* Copyright (c) 2004-2013 Keil Software. All rights reserved.                */
+/* This software may only be used under the terms of a valid, current,        */
+/* end user licence from KEIL for a compatible version of KEIL software       */
+/* development tools. Nothing else gives you the right to use this software.  */
+/******************************************************************************/
+
+
+FUNC void DebugSetup (void) {
+//  Debug MCU Configuration
+//       DBG_SLEEP      Debug Sleep Mode
+//       DBG_STOP       Debug Stop Mode
+//       DBG_STANDBY    Debug Standby Mode
+//       TRACE_IOEN     Trace I/O Enable 
+//    TRACE_MODE     Trace Mode
+//             <0=> Asynchronous
+//             <1=> Synchronous: TRACEDATA Size 1
+//             <2=> Synchronous: TRACEDATA Size 2
+//             <3=> Synchronous: TRACEDATA Size 4
+//       DBG_IWDG_STOP  Independant Watchdog Stopped when Core is halted
+//       DBG_WWDG_STOP  Window Watchdog Stopped when Core is halted
+//      DBG_TIM1_STOP  Timer 1 Stopped when Core is halted
+//      DBG_TIM2_STOP  Timer 2 Stopped when Core is halted
+//      DBG_TIM3_STOP  Timer 3 Stopped when Core is halted
+//      DBG_TIM4_STOP  Timer 4 Stopped when Core is halted
+//      DBG_CAN_STOP   CAN Stopped when Core is halted
+// 
+  _WDWORD(0xE0042004, 0x00000027);  // DBGMCU_CR
+}
+
+DebugSetup();                       // Debugger Setup
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/echoclient.c b/IDE/MDK5-ARM/Projects/EchoClient/echoclient.c
new file mode 100644
index 000000000..bc7e26310
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/echoclient.c
@@ -0,0 +1,287 @@
+/* echoclient.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+
+#include 
+
+#if defined(CYASSL_MDK_ARM)
+    #include 
+    #include 
+    
+    #if defined(CYASSL_MDK5)
+        #include "cmsis_os.h"
+        #include "rl_fs.h" 
+        #include "rl_net.h" 
+    #else
+        #include "rtl.h"
+    #endif
+    
+    #include "cyassl_MDK_ARM.h"
+#endif
+
+#include 
+
+#include "examples/echoclient/echoclient.h"
+
+void echoclient_test(void* args)
+{
+    SOCKET_T sockfd = 0;
+
+    FILE* fin   = stdin  ;
+    FILE* fout = stdout;
+
+    int inCreated  = 0;
+    int outCreated = 0;
+
+    char msg[1024];
+    char reply[1024+1];
+
+    SSL_METHOD* method = 0;
+    SSL_CTX*    ctx    = 0;
+    SSL*        ssl    = 0;
+
+    int doDTLS = 0;
+    int doPSK = 0;
+    int sendSz;
+    int argc    = 0;
+    char** argv = 0;
+    int port = yasslPort;
+
+    ((func_args*)args)->return_code = -1; /* error state */
+    
+#ifndef CYASSL_MDK_ARM
+    argc = ((func_args*)args)->argc;
+    argv = ((func_args*)args)->argv;
+#endif
+
+    if (argc >= 2) {
+        fin  = fopen(argv[1], "r"); 
+        inCreated = 1;
+    }
+    if (argc >= 3) {
+        fout = fopen(argv[2], "w");
+        outCreated = 1;
+    }
+
+    if (!fin)  err_sys("can't open input file");
+    if (!fout) err_sys("can't open output file");
+
+#ifdef CYASSL_DTLS
+    doDTLS  = 1;
+#endif
+
+#ifdef CYASSL_LEANPSK 
+    doPSK = 1;
+#endif
+
+#if defined(NO_RSA) && !defined(HAVE_ECC)
+    doPSK = 1;
+#endif
+
+#if defined(NO_MAIN_DRIVER) && !defined(USE_WINDOWS_API) && !defined(CYASSL_MDK_SHELL)
+    port = ((func_args*)args)->signal->port;
+#endif
+#if defined (CYASSL_CALLEE_PORT)
+    port = CYASSL_CALLEE_PORT ;
+#endif
+
+#if defined(CYASSL_DTLS)
+    method  = DTLSv1_client_method();
+#elif  !defined(NO_TLS)
+    method = CyaSSLv23_client_method();
+#else
+    method = SSLv3_client_method();
+#endif
+    ctx    = SSL_CTX_new(method);
+
+#ifndef NO_FILESYSTEM
+    #ifndef NO_RSA
+    if (SSL_CTX_load_verify_locations(ctx, caCert, 0) != SSL_SUCCESS)
+        err_sys("can't load ca file, Please run from CyaSSL home dir");
+    #endif
+    #ifdef HAVE_ECC
+        if (SSL_CTX_load_verify_locations(ctx, eccCert, 0) != SSL_SUCCESS)
+            err_sys("can't load ca file, Please run from CyaSSL home dir");
+    #endif
+#elif !defined(NO_CERTS)
+    if (!doPSK)
+        load_buffer(ctx, caCert, CYASSL_CA);
+#endif
+
+#if defined(CYASSL_SNIFFER) && !defined(HAVE_NTRU) && !defined(HAVE_ECC)
+    /* don't use EDH, can't sniff tmp keys */
+    SSL_CTX_set_cipher_list(ctx, "AES256-SHA");
+#endif
+    if (doPSK) {
+#ifndef NO_PSK
+        const char *defaultCipherList;
+
+        CyaSSL_CTX_set_psk_client_callback(ctx, my_psk_client_cb);
+        #ifdef HAVE_NULL_CIPHER
+            defaultCipherList = "PSK-NULL-SHA256";
+        #else
+            defaultCipherList = "PSK-AES128-CBC-SHA256";
+        #endif
+        if (CyaSSL_CTX_set_cipher_list(ctx,defaultCipherList) !=SSL_SUCCESS)
+            err_sys("client can't set cipher list 2");
+#endif
+    }
+
+#ifdef OPENSSL_EXTRA
+    SSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack);
+#endif
+
+    #if defined(CYASSL_MDK_ARM)
+    CyaSSL_CTX_set_verify(ctx, SSL_VERIFY_NONE, 0);
+    #endif
+
+    ssl = SSL_new(ctx);
+    CyaSSL_set_quiet_shutdown(ssl, 1) ;
+    
+    if (doDTLS) {
+        SOCKADDR_IN_T addr;
+        build_addr(&addr, yasslIP, port, 1);
+        CyaSSL_dtls_set_peer(ssl, &addr, sizeof(addr));
+        tcp_socket(&sockfd, 1);
+    }
+    else {
+        tcp_connect(&sockfd, yasslIP, port, 0);
+    }
+        
+    SSL_set_fd(ssl, sockfd);
+#if defined(USE_WINDOWS_API) && defined(CYASSL_DTLS) && defined(NO_MAIN_DRIVER)
+    /* let echoserver bind first, TODO: add Windows signal like pthreads does */
+    Sleep(100);
+#endif
+
+    if (SSL_connect(ssl) != SSL_SUCCESS) err_sys("SSL_connect failed");
+
+    while (fgets(msg, sizeof(msg), fin) != 0) {
+     
+        sendSz = (int)strlen(msg);
+
+        if (SSL_write(ssl, msg, sendSz) != sendSz)
+            err_sys("SSL_write failed");
+
+        if (strncmp(msg, "quit", 4) == 0) {
+            fputs("sending server shutdown command: quit!\n", fout);
+            break;
+        }
+
+        if (strncmp(msg, "break", 5) == 0) {
+            fputs("sending server session close: break!\n", fout);
+            break;
+        }
+
+        #ifndef CYASSL_MDK_SHELL
+        while (sendSz) {
+            int got;
+            if ( (got = SSL_read(ssl, reply, sizeof(reply)-1)) > 0) {
+                reply[got] = 0;
+                fputs(reply, fout);
+                fflush(fout) ;
+                sendSz -= got;
+            }
+            else
+                break;
+        }
+        #else
+        {
+            int got;
+            if ( (got = SSL_read(ssl, reply, sizeof(reply)-1)) > 0) {
+                reply[got] = 0;
+                fputs(reply, fout);
+                fflush(fout) ;
+                sendSz -= got;
+            }
+        }
+        #endif
+    }
+
+#ifdef CYASSL_CMSIS_RTOS
+    osDelay(5000) ;
+#endif
+
+
+#ifdef CYASSL_DTLS
+    strncpy(msg, "break", 6);
+    sendSz = (int)strlen(msg);
+    /* try to tell server done */
+    SSL_write(ssl, msg, sendSz);
+#else
+    SSL_shutdown(ssl);
+#endif
+
+    SSL_free(ssl);
+    SSL_CTX_free(ctx);
+
+    fflush(fout);
+    if (inCreated)  fclose(fin);
+    if (outCreated) fclose(fout);
+
+    CloseSocket(sockfd);
+    ((func_args*)args)->return_code = 0; 
+}
+
+
+/* so overall tests can pull in test function */
+#ifndef NO_MAIN_DRIVER
+
+    int main(int argc, char** argv)
+    {
+        func_args args;
+
+#ifdef HAVE_CAVIUM
+        int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID);
+        if (ret != 0)
+            err_sys("Cavium OpenNitroxDevice failed");
+#endif /* HAVE_CAVIUM */
+
+        StartTCP();
+
+        args.argc = argc;
+        args.argv = argv;
+
+        CyaSSL_Init();
+#if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL)
+        CyaSSL_Debugging_ON();
+#endif
+
+        if (CurrentDir("echoclient") || CurrentDir("build"))
+            ChangeDirBack(2);
+        echoclient_test(&args);
+
+        CyaSSL_Cleanup();
+
+#ifdef HAVE_CAVIUM
+        CspShutdown(CAVIUM_DEV_ID);
+#endif
+        return args.return_code;
+    }
+        
+#endif /* NO_MAIN_DRIVER */
+
+
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/main.c b/IDE/MDK5-ARM/Projects/EchoClient/main.c
new file mode 100644
index 000000000..9fe4eec3e
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/main.c
@@ -0,0 +1,101 @@
+/* main.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+ 
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+#include 
+
+#include "cmsis_os.h"
+#include "rl_fs.h" 
+#include "rl_net.h" 
+#include 
+#include "cyassl_MDK_ARM.h"
+#include 
+
+/*-----------------------------------------------------------------------------
+ *        Initialize a Flash Memory Card
+ *----------------------------------------------------------------------------*/
+static void init_filesystem (void) {
+  int32_t retv;
+
+  retv = finit ("M0:");
+  if (retv == 0) {
+    retv = fmount ("M0:");
+    if (retv == 0) {
+      printf ("Drive M0 ready!\n");
+    }
+    else {
+      printf ("Drive M0 mount failed!\n");
+    }
+  }
+  else {
+    printf ("Drive M0 initialization failed!\n");
+  }
+}
+
+/*-----------------------------------------------------------------------------
+ *        TCP/IP tasks
+ *----------------------------------------------------------------------------*/
+void tcp_poll (void const *arg)
+{
+    CYASSL_MSG("TCP polling started.\n") ;
+    while (1) {
+        net_main ();
+        osDelay(1) ;
+    }
+}
+
+typedef struct func_args {
+    int    argc;
+    char** argv;
+} func_args;
+
+extern void echoclient_test(func_args * args) ;
+extern void init_time(void) ;
+
+    osThreadDef (tcp_poll, osPriorityHigh , 1, 0) ;
+/*-----------------------------------------------------------------------------
+ *       mian entry 
+ *----------------------------------------------------------------------------*/
+int myoptind = 0;
+char* myoptarg = NULL;
+
+#include "config-EchoClient.h"
+
+int main() 
+{
+    void *arg = NULL ;
+    init_time() ;
+    init_filesystem ();
+    net_initialize() ;
+    osThreadCreate (osThread (tcp_poll), NULL); 
+    osDelay(30000) ;  /* wait for DHCP */
+    #if defined(DEBUG_CYASSL)
+         printf("Turning ON Debug message\n") ;
+         CyaSSL_Debugging_ON() ;
+    #endif
+
+    echoclient_test(args) ;
+
+}
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/Abstract.txt b/IDE/MDK5-ARM/Projects/EchoServer/Abstract.txt
new file mode 100644
index 000000000..d43c94a38
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/Abstract.txt
@@ -0,0 +1,24 @@
+This program is echo server with CyaSSL/wolfCrypt library.
+
+In order to run this program, 
+Copy {PACK}\wolfSSL\CyaSSL\2.8.0\cyassl\certs folder and files to the SD memory.
+Set the server IP address in Net_Config_ETH_0.h
+The server default port is 11111, defined in test.h.
+
+For further configuration, refer config-Crypt.h and config-CyaSSL.h.
+
+When testing this server, it is recommended to test against one of the standard 
+CyaSSL example applications running on a desktop machine.  The standard CyaSSL 
+example applications are located in the CyaSSL root directory under the 
+/examples directory.
+
+For the hardware crypt on config-Crypt.h, download 
+STSW-STM32062: STM32F2xx standard peripherals library at 
+http://www.st.com/. Copy Libraries\STM32F2xx_StdPeriph_Driver\{inc,src} to 
+ {PACK}\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib
+
+
+Support
+-------
+Please send questions or comments to support@wolfssl.com
+ 
\ No newline at end of file
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/EchoServer.uvoptx b/IDE/MDK5-ARM/Projects/EchoServer/EchoServer.uvoptx
new file mode 100644
index 000000000..ba35f0f5c
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/EchoServer.uvoptx
@@ -0,0 +1,1406 @@
+
+
+
+  1.0
+
+  
### uVision Project, (C) Keil Software

+
+  
+    *.c
+    *.s*; *.src; *.a*
+    *.obj
+    *.lib
+    *.txt; *.h; *.inc
+    *.plm
+    *.cpp
+  
+
+  
+    0
+    0
+  
+
+  
+    EchoServer
+    0x4
+    ARM-ADS
+    
+      120000000
+      
+        1
+        1
+        0
+        1
+      
+      
+        1
+        65535
+        0
+        0
+        0
+      
+      
+        79
+        66
+        8
+        .\Object\
+      
+      
+        1
+        1
+        1
+        0
+        1
+        1
+        0
+        1
+        0
+        0
+        0
+        0
+      
+      
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        0
+        0
+      
+      
+        1
+        0
+        1
+      
+      255
+      
+        SARMCM3.DLL
+        -REMAP -MPU
+        DCM.DLL
+        -pCM3
+        SARMCM3.DLL
+        -REMAP -MPU
+        TCM.DLL
+        -pCM3
+      
+      
+        0
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        0
+        1
+        1
+        0
+        0
+        8
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        .\STM32_SWO.ini
+        BIN\ULP2CM3.DLL
+      
+      
+        
+          0
+          DLGTARM
+          (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+        
+        
+          0
+          ARMDBGFLAGS
+          
+        
+        
+          0
+          ULP2CM3
+          -UP1135060 -O206 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO19 -TC120000000 -TP18 -TDX0 -TDD0 -TDS8000 -TDT0 -TDC1F -TIE1 -TIP1 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024.flm -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm)
+        
+        
+          0
+          DLGUARM
+          
+        
+        
+          0
+          UL2CM3
+          UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm))
+        
+      
+      
+      
+        
+          1
+          8
+          0x20000408
+        
+      
+      
+        
+          2
+          8
+          0x8004dc8
+        
+      
+      
+        0
+      
+      
+        0
+        0
+        1
+        0
+        0
+        0
+        0
+        1
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        1
+        0
+        0
+        0
+        0
+      
+      
+      
+    
+  
+
+  
+    Source
+    1
+    0
+    0
+    0
+    
+      1
+      1
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      .\main.c
+      main.c
+      0
+      0
+    
+    
+      1
+      2
+      1
+      0
+      0
+      17
+      0
+      0
+      0
+      0
+      .\echoserver.c
+      echoserver.c
+      0
+      0
+    
+  
+
+  
+    Configuration
+    1
+    0
+    0
+    0
+    
+      2
+      3
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      .\RTE\wolfSSL\config-CyaSSL.h
+      config-CyaSSL.h
+      0
+      0
+    
+    
+      2
+      4
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      .\RTE\wolfSSL\config-Crypt.h
+      config-Crypt.h
+      0
+      0
+    
+  
+
+  
+    Documentation
+    1
+    0
+    0
+    0
+    
+      3
+      5
+      5
+      0
+      0
+      0
+      0
+      1
+      1
+      0
+      .\Abstract.txt
+      Abstract.txt
+      0
+      0
+    
+  
+
+  
+    ::CMSIS
+    0
+    0
+    0
+    1
+    
+      4
+      6
+      4
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib
+      RTX_CM3.lib
+      1
+      0
+    
+    
+      4
+      7
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\CMSIS\RTX_Conf_CM.c
+      RTX_Conf_CM.c
+      1
+      0
+    
+  
+
+  
+    ::Device
+    0
+    0
+    0
+    1
+    
+      5
+      8
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c
+      DMA_STM32F2xx.c
+      1
+      0
+    
+    
+      5
+      9
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c
+      GPIO_STM32F2xx.c
+      1
+      0
+    
+    
+      5
+      10
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Device\STM32F207IG\RTE_Device.h
+      RTE_Device.h
+      1
+      0
+    
+    
+      5
+      11
+      2
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Device\STM32F207IG\startup_stm32f2xx.s
+      startup_stm32f2xx.s
+      1
+      0
+    
+    
+      5
+      12
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Device\STM32F207IG\system_stm32f2xx.c
+      system_stm32f2xx.c
+      1
+      0
+    
+  
+
+  
+    ::Drivers
+    0
+    0
+    0
+    1
+    
+      6
+      13
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Driver\PHY_ST802RT1.c
+      PHY_ST802RT1.c
+      1
+      0
+    
+    
+      6
+      14
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\EMAC_STM32F2xx.c
+      EMAC_STM32F2xx.c
+      1
+      0
+    
+    
+      6
+      15
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c
+      MCI_STM32F2xx.c
+      1
+      0
+    
+  
+
+  
+    ::File System
+    0
+    0
+    0
+    1
+    
+      7
+      16
+      4
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib
+      FS_LFN_CM3_L.lib
+      1
+      0
+    
+    
+      7
+      17
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\File_System\FS_Config.c
+      FS_Config.c
+      1
+      0
+    
+    
+      7
+      18
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\File_System\FS_Config_MC_0.h
+      FS_Config_MC_0.h
+      1
+      0
+    
+  
+
+  
+    ::Network
+    0
+    0
+    0
+    1
+    
+      8
+      19
+      4
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Lib\ARM\Net_Dbg_CM3_L.lib
+      Net_Dbg_CM3_L.lib
+      1
+      0
+    
+    
+      8
+      20
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config.c
+      Net_Config.c
+      1
+      0
+    
+    
+      8
+      21
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_BSD.h
+      Net_Config_BSD.h
+      1
+      0
+    
+    
+      8
+      22
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_DNS_Client.h
+      Net_Config_DNS_Client.h
+      1
+      0
+    
+    
+      8
+      23
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_ETH_0.h
+      Net_Config_ETH_0.h
+      1
+      0
+    
+    
+      8
+      24
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_TCP.h
+      Net_Config_TCP.h
+      1
+      0
+    
+    
+      8
+      25
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_UDP.h
+      Net_Config_UDP.h
+      1
+      0
+    
+    
+      8
+      26
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Debug.c
+      Net_Debug.c
+      1
+      0
+    
+  
+
+  
+    ::wolfSSL
+    0
+    0
+    0
+    1
+    
+      9
+      27
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
+      cyassl_MDK_ARM.c
+      1
+      0
+    
+    
+      9
+      28
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
+      time-STM32F2xx.c
+      1
+      0
+    
+    
+      9
+      29
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c
+      aes.c
+      1
+      0
+    
+    
+      9
+      30
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c
+      arc4.c
+      1
+      0
+    
+    
+      9
+      31
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c
+      asm.c
+      1
+      0
+    
+    
+      9
+      32
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c
+      asn.c
+      1
+      0
+    
+    
+      9
+      33
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c
+      blake2b.c
+      1
+      0
+    
+    
+      9
+      34
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c
+      camellia.c
+      1
+      0
+    
+    
+      9
+      35
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c
+      coding.c
+      1
+      0
+    
+    
+      9
+      36
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c
+      compress.c
+      1
+      0
+    
+    
+      9
+      37
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c
+      des3.c
+      1
+      0
+    
+    
+      9
+      38
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c
+      dh.c
+      1
+      0
+    
+    
+      9
+      39
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c
+      dsa.c
+      1
+      0
+    
+    
+      9
+      40
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c
+      ecc.c
+      1
+      0
+    
+    
+      9
+      41
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c
+      ecc_fp.c
+      1
+      0
+    
+    
+      9
+      42
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c
+      error.c
+      1
+      0
+    
+    
+      9
+      43
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c
+      hc128.c
+      1
+      0
+    
+    
+      9
+      44
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c
+      hmac.c
+      1
+      0
+    
+    
+      9
+      45
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c
+      integer.c
+      1
+      0
+    
+    
+      9
+      46
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c
+      logging.c
+      1
+      0
+    
+    
+      9
+      47
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c
+      md2.c
+      1
+      0
+    
+    
+      9
+      48
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c
+      md4.c
+      1
+      0
+    
+    
+      9
+      49
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c
+      md5.c
+      1
+      0
+    
+    
+      9
+      50
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c
+      memory.c
+      1
+      0
+    
+    
+      9
+      51
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c
+      misc.c
+      1
+      0
+    
+    
+      9
+      52
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c
+      pwdbased.c
+      1
+      0
+    
+    
+      9
+      53
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c
+      rabbit.c
+      1
+      0
+    
+    
+      9
+      54
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c
+      random.c
+      1
+      0
+    
+    
+      9
+      55
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c
+      ripemd.c
+      1
+      0
+    
+    
+      9
+      56
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c
+      rsa.c
+      1
+      0
+    
+    
+      9
+      57
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c
+      sha.c
+      1
+      0
+    
+    
+      9
+      58
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c
+      sha256.c
+      1
+      0
+    
+    
+      9
+      59
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c
+      sha512.c
+      1
+      0
+    
+    
+      9
+      60
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c
+      tfm.c
+      1
+      0
+    
+    
+      9
+      61
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\crl.c
+      crl.c
+      1
+      0
+    
+    
+      9
+      62
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\internal.c
+      internal.c
+      1
+      0
+    
+    
+      9
+      63
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\io.c
+      io.c
+      1
+      0
+    
+    
+      9
+      64
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\keys.c
+      keys.c
+      1
+      0
+    
+    
+      9
+      65
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ocsp.c
+      ocsp.c
+      1
+      0
+    
+    
+      9
+      66
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\sniffer.c
+      sniffer.c
+      1
+      0
+    
+    
+      9
+      67
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ssl.c
+      ssl.c
+      1
+      0
+    
+    
+      9
+      68
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\tls.c
+      tls.c
+      1
+      0
+    
+    
+      9
+      69
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\wolfSSL\config-Crypt.h
+      config-Crypt.h
+      1
+      0
+    
+    
+      9
+      70
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\wolfSSL\config-CyaSSL.h
+      config-CyaSSL.h
+      1
+      0
+    
+    
+      9
+      71
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\wolfSSL\config.h
+      config.h
+      1
+      0
+    
+  
+
+
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/EchoServer.uvprojx b/IDE/MDK5-ARM/Projects/EchoServer/EchoServer.uvprojx
new file mode 100644
index 000000000..b8ce12e1e
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/EchoServer.uvprojx
@@ -0,0 +1,1101 @@
+
+
+
+  2.1
+
+  
### uVision Project, (C) Keil Software

+
+  
+    
+      EchoServer
+      0x4
+      ARM-ADS
+      
+        
+          STM32F207IG
+          STMicroelectronics
+          IRAM(0x20000000,0x20000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M3") CLOCK(120000000) ELITTLE
+          
+          
+          UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm))
+          0
+          $$Device:STM32F207IG$Device\Include\stm32f2xx.h
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          $$Device:STM32F207IG$SVD\STM32F20x.svd
+          0
+          0
+          
+          
+          
+          
+          
+          
+            0
+            0
+            0
+            0
+            1
+          
+          .\Object\
+          EchoServer
+          1
+          0
+          0
+          1
+          1
+          .\Object\
+          1
+          0
+          0
+          
+            0
+            0
+            
+            
+            0
+            0
+            0
+            0
+          
+          
+            0
+            0
+            
+            
+            0
+            0
+          
+          
+            0
+            0
+            
+            
+            0
+            0
+          
+          0
+          
+        
+        
+          0
+          0
+          0
+          0
+          0
+          1
+          0
+          0
+          0
+          0
+          3
+          
+          
+          1
+        
+        
+          SARMCM3.DLL
+          -REMAP -MPU
+          DCM.DLL
+          -pCM3
+          SARMCM3.DLL
+          -REMAP -MPU
+          TCM.DLL
+          -pCM3
+        
+        
+          
+            1
+            0
+            0
+            0
+            16
+          
+          
+            0
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+          
+          
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+            1
+            1
+          
+          0
+          8
+          
+            
+            
+            
+            
+            
+          
+          
+            
+            
+            
+            
+            .\STM32_SWO.ini
+            BIN\ULP2CM3.DLL
+          
+        
+        
+          
+            1
+            0
+            0
+            1
+            1
+            4100
+          
+          1
+          BIN\ULP2CM3.DLL
+          "" ()
+          
+          
+          
+          
+          0
+        
+        
+          
+            0
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+            1
+            1
+            0
+            1
+            1
+            0
+            0
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+            0
+            "Cortex-M3"
+            
+            0
+            0
+            0
+            1
+            1
+            0
+            0
+            0
+            0
+            0
+            8
+            0
+            0
+            0
+            3
+            3
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            1
+            0
+            0
+            0
+            0
+            1
+            0
+            
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x20000000
+                0x20000
+              
+              
+                1
+                0x8000000
+                0x100000
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                1
+                0x8000000
+                0x100000
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x20000000
+                0x20000
+              
+              
+                0
+                0x0
+                0x0
+              
+            
+            
+          
+          
+            1
+            4
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            
+              
+              HAVE_CONFIG_H  MDK_CONF_SimpleClient CYASSL_STM32F2xx
+              
+              
+            
+          
+          
+            1
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            
+              
+              
+              
+              
+            
+          
+          
+            1
+            0
+            0
+            0
+            1
+            0
+            0x08000000
+            0x20000000
+            
+            
+            
+            
+            
+            
+          
+        
+      
+      
+        
+          Source
+          
+            
+              main.c
+              1
+              .\main.c
+            
+            
+              echoserver.c
+              1
+              .\echoserver.c
+            
+          
+        
+        
+          Configuration
+          
+            
+              config-CyaSSL.h
+              5
+              .\RTE\wolfSSL\config-CyaSSL.h
+            
+            
+              config-Crypt.h
+              5
+              .\RTE\wolfSSL\config-Crypt.h
+            
+          
+        
+        
+          Documentation
+          
+            
+              Abstract.txt
+              5
+              .\Abstract.txt
+            
+          
+        
+        
+          ::CMSIS
+          
+            
+              RTX_CM3.lib
+              4
+              C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib
+            
+            
+              RTX_Conf_CM.c
+              1
+              RTE\CMSIS\RTX_Conf_CM.c
+            
+          
+        
+        
+          ::Device
+          
+            
+              DMA_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c
+            
+            
+              GPIO_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c
+            
+            
+              RTE_Device.h
+              5
+              RTE\Device\STM32F207IG\RTE_Device.h
+            
+            
+              startup_stm32f2xx.s
+              2
+              RTE\Device\STM32F207IG\startup_stm32f2xx.s
+            
+            
+              system_stm32f2xx.c
+              1
+              RTE\Device\STM32F207IG\system_stm32f2xx.c
+            
+          
+        
+        
+          ::Drivers
+          
+            
+              PHY_ST802RT1.c
+              1
+              C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Driver\PHY_ST802RT1.c
+            
+            
+              EMAC_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\EMAC_STM32F2xx.c
+            
+            
+              MCI_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c
+            
+          
+        
+        
+          ::File System
+          
+            
+              FS_LFN_CM3_L.lib
+              4
+              C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib
+            
+            
+              FS_Config.c
+              1
+              RTE\File_System\FS_Config.c
+            
+            
+              FS_Config_MC_0.h
+              5
+              RTE\File_System\FS_Config_MC_0.h
+            
+          
+        
+        
+          ::Network
+          
+            
+              Net_Dbg_CM3_L.lib
+              4
+              C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Lib\ARM\Net_Dbg_CM3_L.lib
+            
+            
+              Net_Config.c
+              1
+              RTE\Network\Net_Config.c
+            
+            
+              Net_Config_BSD.h
+              5
+              RTE\Network\Net_Config_BSD.h
+            
+            
+              Net_Config_DNS_Client.h
+              5
+              RTE\Network\Net_Config_DNS_Client.h
+            
+            
+              Net_Config_ETH_0.h
+              5
+              RTE\Network\Net_Config_ETH_0.h
+            
+            
+              Net_Config_TCP.h
+              5
+              RTE\Network\Net_Config_TCP.h
+            
+            
+              Net_Config_UDP.h
+              5
+              RTE\Network\Net_Config_UDP.h
+            
+            
+              Net_Debug.c
+              1
+              RTE\Network\Net_Debug.c
+            
+          
+        
+        
+          ::wolfSSL
+          
+            
+              cyassl_MDK_ARM.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
+            
+            
+              time-STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
+            
+            
+              aes.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c
+            
+            
+              arc4.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c
+            
+            
+              asm.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c
+            
+            
+              asn.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c
+            
+            
+              blake2b.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c
+            
+            
+              camellia.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c
+            
+            
+              coding.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c
+            
+            
+              compress.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c
+            
+            
+              des3.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c
+            
+            
+              dh.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c
+            
+            
+              dsa.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c
+            
+            
+              ecc.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c
+            
+            
+              ecc_fp.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c
+            
+            
+              error.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c
+            
+            
+              hc128.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c
+            
+            
+              hmac.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c
+            
+            
+              integer.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c
+            
+            
+              logging.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c
+            
+            
+              md2.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c
+            
+            
+              md4.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c
+            
+            
+              md5.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c
+            
+            
+              memory.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c
+            
+            
+              misc.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c
+            
+            
+              pwdbased.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c
+            
+            
+              rabbit.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c
+            
+            
+              random.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c
+            
+            
+              ripemd.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c
+            
+            
+              rsa.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c
+            
+            
+              sha.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c
+            
+            
+              sha256.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c
+            
+            
+              sha512.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c
+            
+            
+              tfm.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c
+            
+            
+              crl.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\crl.c
+            
+            
+              internal.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\internal.c
+            
+            
+              io.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\io.c
+            
+            
+              keys.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\keys.c
+            
+            
+              ocsp.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ocsp.c
+            
+            
+              sniffer.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\sniffer.c
+            
+            
+              ssl.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ssl.c
+            
+            
+              tls.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\tls.c
+            
+            
+              config-Crypt.h
+              5
+              RTE\wolfSSL\config-Crypt.h
+            
+            
+              config-CyaSSL.h
+              5
+              RTE\wolfSSL\config-CyaSSL.h
+            
+            
+              config.h
+              5
+              RTE\wolfSSL\config.h
+            
+          
+        
+      
+    
+  
+
+  
+    
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+    
+    
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+    
+    
+      
+        RTE\CMSIS\RTX_Conf_CM.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\Device\STM32F207IG\RTE_Device.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Device\STM32F207IG\startup_stm32f2xx.s
+        
+        
+        
+          
+        
+      
+      
+        RTE\Device\STM32F207IG\system_stm32f2xx.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\File_System\FS_Config.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\File_System\FS_Config_MC_0.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_BSD.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_DNS_Client.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_ETH_0.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_TCP.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_UDP.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Debug.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\Other\config-Crypt.h
+        
+        
+        
+      
+      
+        RTE\Other\config-CyaSSL.h
+        
+        
+        
+      
+      
+        RTE\Other\config-RTX-TCP-FS.h
+        
+        
+        
+      
+      
+        RTE\Other\config.h
+        
+        
+        
+      
+      
+        RTE\wolfSSL\config-Crypt.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\wolfSSL\config-CyaSSL.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\wolfSSL\config.h
+        
+        
+        
+          
+        
+      
+    
+  
+
+
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/CMSIS/RTX_Conf_CM.c b/IDE/MDK5-ARM/Projects/EchoServer/RTE/CMSIS/RTX_Conf_CM.c
new file mode 100644
index 000000000..54b3e0bfc
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/CMSIS/RTX_Conf_CM.c
@@ -0,0 +1,276 @@
+/*----------------------------------------------------------------------------
+ *      RL-ARM - RTX
+ *----------------------------------------------------------------------------
+ *      Name:    RTX_Conf_CM.C
+ *      Purpose: Configuration of CMSIS RTX Kernel for Cortex-M
+ *      Rev.:    V4.70
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *  - Neither the name of ARM  nor the names of its contributors may be used 
+ *    to endorse or promote products derived from this software without 
+ *    specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *---------------------------------------------------------------------------*/
+
+#include "cmsis_os.h"
+
+
+/*----------------------------------------------------------------------------
+ *      RTX User configuration part BEGIN
+ *---------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
+//
+// Thread Configuration
+// =======================
+//
+//   Number of concurrent running threads <0-250>
+//    Defines max. number of threads that will run at the same time.
+//    Default: 6
+#ifndef OS_TASKCNT
+ #define OS_TASKCNT     5
+#endif
+
+//   Default Thread stack size [bytes] <64-4096:8><#/4>
+//    Defines default stack size for threads with osThreadDef stacksz = 0
+//    Default: 200
+#ifndef OS_STKSIZE
+ #define OS_STKSIZE     250
+#endif
+
+//   Main Thread stack size [bytes] <64-20000:8><#/4>
+//    Defines stack size for main thread.
+//    Default: 200
+#ifndef OS_MAINSTKSIZE
+ #define OS_MAINSTKSIZE 2000
+#endif
+
+//   Number of threads with user-provided stack size <0-250>
+//    Defines the number of threads with user-provided stack size.
+//    Default: 0
+#ifndef OS_PRIVCNT
+ #define OS_PRIVCNT     2
+#endif
+
+//   Total stack size [bytes] for threads with user-provided stack size <0-0x10000:8><#/4>
+//    Defines the combined stack size for threads with user-provided stack size.
+//    Default: 0
+#ifndef OS_PRIVSTKSIZE
+ #define OS_PRIVSTKSIZE 2500
+#endif
+
+// Check for stack overflow
+//  Includes the stack checking code for stack overflow.
+//  Note that additional code reduces the Kernel performance.
+#ifndef OS_STKCHECK
+ #define OS_STKCHECK    1
+#endif
+
+// Processor mode for thread execution 
+//   <0=> Unprivileged mode 
+//   <1=> Privileged mode
+//  Default: Privileged mode
+#ifndef OS_RUNPRIV
+ #define OS_RUNPRIV     1
+#endif
+
+// 
+
+// RTX Kernel Timer Tick Configuration
+// ======================================
+//  Use Cortex-M SysTick timer as RTX Kernel Timer
+//  Use the Cortex-M SysTick timer as a time-base for RTX.
+#ifndef OS_SYSTICK
+ #define OS_SYSTICK     1
+#endif
+//
+//   Timer clock value [Hz] <1-1000000000>
+//    Defines the timer clock value.
+//    Default: 12000000  (12MHz)
+#ifndef OS_CLOCK
+ #define OS_CLOCK       12000000
+#endif
+
+//   Timer tick value [us] <1-1000000>
+//    Defines the timer tick value.
+//    Default: 1000  (1ms)
+#ifndef OS_TICK
+ #define OS_TICK        1000
+#endif
+
+// 
+
+// System Configuration
+// =======================
+//
+// Round-Robin Thread switching
+// ===============================
+//
+//  Enables Round-Robin Thread switching.
+#ifndef OS_ROBIN
+ #define OS_ROBIN       1
+#endif
+
+//   Round-Robin Timeout [ticks] <1-1000>
+//    Defines how long a thread will execute before a thread switch.
+//    Default: 5
+#ifndef OS_ROBINTOUT
+ #define OS_ROBINTOUT   5
+#endif
+
+// 
+
+// User Timers
+// ==============
+//    Enables user Timers
+#ifndef OS_TIMERS
+ #define OS_TIMERS      1
+#endif
+
+//   Timer Thread Priority
+//                        <1=> Low
+//     <2=> Below Normal  <3=> Normal  <4=> Above Normal
+//                        <5=> High
+//                        <6=> Realtime (highest)
+//    Defines priority for Timer Thread
+//    Default: High
+#ifndef OS_TIMERPRIO
+ #define OS_TIMERPRIO   5
+#endif
+
+//   Timer Thread stack size [bytes] <64-64000:8><#/4>
+//    Defines stack size for Timer thread.
+//    Default: 200
+#ifndef OS_TIMERSTKSZ
+ #define OS_TIMERSTKSZ  50
+#endif
+
+//   Timer Callback Queue size <1-32>
+//    Number of concurrent active timer callback functions.
+//    Default: 4
+#ifndef OS_TIMERCBQS
+ #define OS_TIMERCBQS   4
+#endif
+
+// 
+
+//   ISR FIFO Queue size<4=>   4 entries  <8=>   8 entries
+//                         <12=> 12 entries  <16=> 16 entries
+//                         <24=> 24 entries  <32=> 32 entries
+//                         <48=> 48 entries  <64=> 64 entries
+//                         <96=> 96 entries
+//    ISR functions store requests to this buffer,
+//    when they are called from the interrupt handler.
+//    Default: 16 entries
+#ifndef OS_FIFOSZ
+ #define OS_FIFOSZ      16
+#endif
+
+// 
+
+//------------- <<< end of configuration section >>> -----------------------
+
+// Standard library system mutexes
+// ===============================
+//  Define max. number system mutexes that are used to protect 
+//  the arm standard runtime library. For microlib they are not used.
+#ifndef OS_MUTEXCNT
+ #define OS_MUTEXCNT    8
+#endif
+
+/*----------------------------------------------------------------------------
+ *      RTX User configuration part END
+ *---------------------------------------------------------------------------*/
+
+#define OS_TRV          ((uint32_t)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1)
+
+
+/*----------------------------------------------------------------------------
+ *      Global Functions
+ *---------------------------------------------------------------------------*/
+
+/*--------------------------- os_idle_demon ---------------------------------*/
+
+void os_idle_demon (void) {
+  /* The idle demon is a system thread, running when no other thread is      */
+  /* ready to run.                                                           */
+
+  for (;;) {
+    /* HERE: include optional user code to be executed when no thread runs.*/
+  }
+}
+
+#if (OS_SYSTICK == 0)   // Functions for alternative timer as RTX kernel timer
+
+/*--------------------------- os_tick_init ----------------------------------*/
+
+// Initialize alternative hardware timer as RTX kernel timer
+// Return: IRQ number of the alternative hardware timer
+int os_tick_init (void) {
+  return (-1);  /* Return IRQ number of timer (0..239) */
+}
+
+/*--------------------------- os_tick_val -----------------------------------*/
+
+// Get alternative hardware timer current value (0 .. OS_TRV)
+uint32_t os_tick_val (void) {
+  return (0);
+}
+
+/*--------------------------- os_tick_ovf -----------------------------------*/
+
+// Get alternative hardware timer overflow flag
+// Return: 1 - overflow, 0 - no overflow
+uint32_t os_tick_ovf (void) {
+  return (0);
+}
+
+/*--------------------------- os_tick_irqack --------------------------------*/
+
+// Acknowledge alternative hardware timer interrupt
+void os_tick_irqack (void) {
+  /* ... */
+}
+
+#endif   // (OS_SYSTICK == 0)
+
+/*--------------------------- os_error --------------------------------------*/
+
+void os_error (uint32_t err_code) {
+  /* This function is called when a runtime error is detected. Parameter */
+  /* 'err_code' holds the runtime error code (defined in RTL.H).         */
+
+  /* HERE: include optional code to be executed on runtime error. */
+  for (;;);
+}
+
+
+/*----------------------------------------------------------------------------
+ *      RTX Configuration Functions
+ *---------------------------------------------------------------------------*/
+
+#include "RTX_CM_lib.h"
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/Device/STM32F207IG/RTE_Device.h b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Device/STM32F207IG/RTE_Device.h
new file mode 100644
index 000000000..4a09246f3
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Device/STM32F207IG/RTE_Device.h
@@ -0,0 +1,3127 @@
+/* -----------------------------------------------------------------------------
+ * Copyright (C) 2013 ARM Limited. All rights reserved.
+ *  
+ * $Date:        27. June 2013
+ * $Revision:    V1.01
+ *  
+ * Project:      RTE Device Configuration for ST STM32F2xx
+ * -------------------------------------------------------------------------- */
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+
+#define GPIO_PORT(num) \
+ ((num == 0) ? GPIOA : \
+  (num == 1) ? GPIOB : \
+  (num == 2) ? GPIOC : \
+  (num == 3) ? GPIOD : \
+  (num == 4) ? GPIOE : \
+  (num == 5) ? GPIOF : \
+  (num == 6) ? GPIOG : \
+  (num == 7) ? GPIOH : \
+  (num == 8) ? GPIOI : \
+  NULL)
+
+
+//  Clock Configuration
+//    High-speed Internal Clock <1-999999999>
+#define RTE_HSI                         16000000
+//    High-speed External Clock <1-999999999>
+#define RTE_HSE                         25000000
+//    System Clock <1-999999999>
+#define RTE_SYSCLK                      120000000
+//    AHB Clock    <1-999999999>
+#define RTE_HCLK                        120000000
+//    APB1 Clock   <1-999999999>
+#define RTE_PCLK1                       30000000
+//    APB2 Clock   <1-999999999>
+#define RTE_PCLK2                       60000000
+//       48MHz Clock
+#define RTE_PLL48CK                     48000000
+// 
+
+
+//  USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_UART1]
+//  Configuration settings for Driver_UART1 in component ::Drivers:UART
+#define RTE_USART1                      0
+
+//    USART1_TX Pin <0=>PA9 <1=>PB6
+#define RTE_USART1_TX_ID                0
+#if    (RTE_USART1_TX_ID == 0)
+#define RTE_USART1_TX_PORT              GPIOA
+#define RTE_USART1_TX_BIT               9
+#elif  (RTE_USART1_TX_ID == 1)
+#define RTE_USART1_TX_PORT              GPIOB
+#define RTE_USART1_TX_BIT               6
+#else
+#error "Invalid USART1_TX Pin Configuration!"
+#endif
+
+//    USART1_RX Pin <0=>PA10 <1=>PB7
+#define RTE_USART1_RX_ID                0
+#if    (RTE_USART1_RX_ID == 0)
+#define RTE_USART1_RX_PORT              GPIOA
+#define RTE_USART1_RX_BIT               10
+#elif  (RTE_USART1_RX_ID == 1)
+#define RTE_USART1_RX_PORT              GPIOB
+#define RTE_USART1_RX_BIT               7
+#else
+#error "Invalid USART1_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART1_CK Pin <0=>PA8
+//     
+#define RTE_USART1_CK                   0
+#define RTE_USART1_CK_ID                0
+#if    (RTE_USART1_CK_ID == 0)
+#define RTE_USART1_CK_PORT              GPIOA
+#define RTE_USART1_CK_BIT               8
+#else
+#error "Invalid USART1_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART1_CTS Pin <0=>PA11
+//        USART1_RTS Pin <0=>PA12
+//        Manual CTS/RTS
+//     
+#define RTE_USART1_HW_FLOW              0
+#define RTE_USART1_CTS_ID               0
+#define RTE_USART1_RTS_ID               0
+#define RTE_USART1_MANUAL_FLOW          0
+#if    (RTE_USART1_CTS_ID == 0)
+#define RTE_USART1_CTS_PORT             GPIOA
+#define RTE_USART1_CTS_BIT              11
+#else
+#error "Invalid USART1_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART1_RTS_ID == 0)
+#define RTE_USART1_RTS_PORT             GPIOA
+#define RTE_USART1_RTS_BIT              12
+#else
+#error "Invalid USART1_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <2=>2 <5=>5
+//       Selects DMA Stream (only Stream 2 or 5 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART1_RX_DMA               1
+#define RTE_USART1_RX_DMA_NUMBER        2
+#define RTE_USART1_RX_DMA_STREAM        2
+#define RTE_USART1_RX_DMA_CHANNEL       4
+#define RTE_USART1_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <7=>7
+//       Selects DMA Stream (only Stream 7 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART1_TX_DMA               1
+#define RTE_USART1_TX_DMA_NUMBER        2
+#define RTE_USART1_TX_DMA_STREAM        7
+#define RTE_USART1_TX_DMA_CHANNEL       4
+#define RTE_USART1_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_UART2]
+//  Configuration settings for Driver_UART2 in component ::Drivers:UART
+#define RTE_USART2                      0
+
+//    USART2_TX Pin <0=>PA2 <1=>PD5
+#define RTE_USART2_TX_ID                0
+#if    (RTE_USART2_TX_ID == 0)
+#define RTE_USART2_TX_PORT              GPIOA
+#define RTE_USART2_TX_BIT               2
+#elif  (RTE_USART2_TX_ID == 1)
+#define RTE_USART2_TX_PORT              GPIOD
+#define RTE_USART2_TX_BIT               5
+#else
+#error "Invalid USART2_TX Pin Configuration!"
+#endif
+
+//    USART2_RX Pin <0=>PA3 <1=>PD6
+#define RTE_USART2_RX_ID                0
+#if    (RTE_USART2_RX_ID == 0)
+#define RTE_USART2_RX_PORT              GPIOA
+#define RTE_USART2_RX_BIT               3
+#elif  (RTE_USART2_RX_ID == 1)
+#define RTE_USART2_RX_PORT              GPIOD
+#define RTE_USART2_RX_BIT               6
+#else
+#error "Invalid USART2_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART2_CK Pin <0=>PA4 <1=>PD7
+//     
+#define RTE_USART2_CK                   0
+#define RTE_USART2_CK_ID                0
+#if    (RTE_USART2_CK_ID == 0)
+#define RTE_USART2_CK_PORT              GPIOA
+#define RTE_USART2_CK_BIT               4
+#elif  (RTE_USART2_CK_ID == 1)
+#define RTE_USART2_CK_PORT              GPIOD
+#define RTE_USART2_CK_BIT               7
+#else
+#error "Invalid USART2_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART2_CTS Pin <0=>PA0 <1=>PD3
+//        USART2_RTS Pin <0=>PA1 <1=>PD4
+//        Manual CTS/RTS
+//     
+#define RTE_USART2_HW_FLOW              0
+#define RTE_USART2_CTS_ID               0
+#define RTE_USART2_RTS_ID               0
+#define RTE_USART2_MANUAL_FLOW          0
+#if    (RTE_USART2_CTS_ID == 0)
+#define RTE_USART2_CTS_PORT             GPIOA
+#define RTE_USART2_CTS_BIT              0
+#elif  (RTE_USART2_CTS_ID == 1)
+#define RTE_USART2_CTS_PORT             GPIOD
+#define RTE_USART2_CTS_BIT              3
+#else
+#error "Invalid USART2_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART2_RTS_ID == 0)
+#define RTE_USART2_RTS_PORT             GPIOA
+#define RTE_USART2_RTS_BIT              1
+#elif  (RTE_USART2_RTS_ID == 1)
+#define RTE_USART2_RTS_PORT             GPIOD
+#define RTE_USART2_RTS_BIT              4
+#else
+#error "Invalid USART2_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <5=>5
+//       Selects DMA Stream (only Stream 5 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART2_RX_DMA               1
+#define RTE_USART2_RX_DMA_NUMBER        1
+#define RTE_USART2_RX_DMA_STREAM        5
+#define RTE_USART2_RX_DMA_CHANNEL       4
+#define RTE_USART2_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <6=>6
+//       Selects DMA Stream (only Stream 6 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART2_TX_DMA               1
+#define RTE_USART2_TX_DMA_NUMBER        1
+#define RTE_USART2_TX_DMA_STREAM        6
+#define RTE_USART2_TX_DMA_CHANNEL       4
+#define RTE_USART2_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_UART3]
+//  Configuration settings for Driver_UART3 in component ::Drivers:UART
+#define RTE_USART3                      0
+
+//    USART3_TX Pin <0=>PB10 <1=>PC10 <2=>PD8
+#define RTE_USART3_TX_ID                0
+#if    (RTE_USART3_TX_ID == 0)
+#define RTE_USART3_TX_PORT              GPIOB
+#define RTE_USART3_TX_BIT               10
+#elif  (RTE_USART3_TX_ID == 1)
+#define RTE_USART3_TX_PORT              GPIOC
+#define RTE_USART3_TX_BIT               10
+#elif  (RTE_USART3_TX_ID == 2)
+#define RTE_USART3_TX_PORT              GPIOD
+#define RTE_USART3_TX_BIT               8
+#else
+#error "Invalid USART3_TX Pin Configuration!"
+#endif
+
+//    USART3_RX Pin <0=>PB11 <1=>PC11 <2=>PD9
+#define RTE_USART3_RX_ID                0
+#if    (RTE_USART3_RX_ID == 0)
+#define RTE_USART3_RX_PORT              GPIOB
+#define RTE_USART3_RX_BIT               11
+#elif  (RTE_USART3_RX_ID == 1)
+#define RTE_USART3_RX_PORT              GPIOC
+#define RTE_USART3_RX_BIT               11
+#elif  (RTE_USART3_RX_ID == 2)
+#define RTE_USART3_RX_PORT              GPIOD
+#define RTE_USART3_RX_BIT               9
+#else
+#error "Invalid USART3_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART3_CK Pin <0=>PB12 <1=>PC12 <2=>PD10
+//     
+#define RTE_USART3_CK                   0
+#define RTE_USART3_CK_ID                0
+#if    (RTE_USART3_CK_ID == 0)
+#define RTE_USART3_CK_PORT              GPIOB
+#define RTE_USART3_CK_BIT               12
+#elif  (RTE_USART3_CK_ID == 1)
+#define RTE_USART3_CK_PORT              GPIOC
+#define RTE_USART3_CK_BIT               12
+#elif  (RTE_USART3_CK_ID == 2)
+#define RTE_USART3_CK_PORT              GPIOD
+#define RTE_USART3_CK_BIT               10
+#else
+#error "Invalid USART3_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART3_CTS Pin <0=>PB13 <1=>PD11
+//        USART3_RTS Pin <0=>PB14 <1=>PD12
+//        Manual CTS/RTS
+//     
+#define RTE_USART3_HW_FLOW              0
+#define RTE_USART3_CTS_ID               0
+#define RTE_USART3_RTS_ID               0
+#define RTE_USART3_MANUAL_FLOW          0
+#if    (RTE_USART3_CTS_ID == 0)
+#define RTE_USART3_CTS_PORT             GPIOB
+#define RTE_USART3_CTS_BIT              13
+#elif  (RTE_USART3_CTS_ID == 1)
+#define RTE_USART3_CTS_PORT             GPIOD
+#define RTE_USART3_CTS_BIT              11
+#else
+#error "Invalid USART3_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART3_RTS_ID == 0)
+#define RTE_USART3_RTS_PORT             GPIOB
+#define RTE_USART3_RTS_BIT              14
+#elif  (RTE_USART3_RTS_ID == 1)
+#define RTE_USART3_RTS_PORT             GPIOD
+#define RTE_USART3_RTS_BIT              12
+#else
+#error "Invalid USART3_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <1=>1
+//       Selects DMA Stream (only Stream 1 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART3_RX_DMA               1
+#define RTE_USART3_RX_DMA_NUMBER        1
+#define RTE_USART3_RX_DMA_STREAM        1
+#define RTE_USART3_RX_DMA_CHANNEL       4
+#define RTE_USART3_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <3=>3
+//       Selects DMA Stream (only Stream 3 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART3_TX_DMA               1
+#define RTE_USART3_TX_DMA_NUMBER        1
+#define RTE_USART3_TX_DMA_STREAM        3
+#define RTE_USART3_TX_DMA_CHANNEL       4
+#define RTE_USART3_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  UART4 (Universal asynchronous receiver transmitter) [Driver_UART4]
+//  Configuration settings for Driver_UART4 in component ::Drivers:UART
+#define RTE_UART4                       0
+
+//    UART4_TX Pin <0=>PA0 <1=>PC10
+#define RTE_UART4_TX_ID                 0
+#if    (RTE_UART4_TX_ID == 0)
+#define RTE_UART4_TX_PORT               GPIOA
+#define RTE_UART4_TX_BIT                0
+#elif  (RTE_UART4_TX_ID == 1)
+#define RTE_UART4_TX_PORT               GPIOC
+#define RTE_UART4_TX_BIT                10
+#else
+#error "Invalid UART4_TX Pin Configuration!"
+#endif
+
+//    UART4_RX Pin <0=>PA1 <1=>PC11
+#define RTE_UART4_RX_ID                 0
+#if    (RTE_UART4_RX_ID == 0)
+#define RTE_UART4_RX_PORT               GPIOA
+#define RTE_UART4_RX_BIT                1
+#elif  (RTE_UART4_RX_ID == 1)
+#define RTE_UART4_RX_PORT               GPIOC
+#define RTE_UART4_RX_BIT                11
+#else
+#error "Invalid UART4_RX Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2
+//       Selects DMA Stream (only Stream 2 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART4_RX_DMA                1
+#define RTE_UART4_RX_DMA_NUMBER         1
+#define RTE_UART4_RX_DMA_STREAM         2
+#define RTE_UART4_RX_DMA_CHANNEL        4
+#define RTE_UART4_RX_DMA_PRIORITY       0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <4=>4
+//       Selects DMA Stream (only Stream 4 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART4_TX_DMA                1
+#define RTE_UART4_TX_DMA_NUMBER         1
+#define RTE_UART4_TX_DMA_STREAM         4
+#define RTE_UART4_TX_DMA_CHANNEL        4
+#define RTE_UART4_TX_DMA_PRIORITY       0
+
+// 
+
+
+//  UART5 (Universal asynchronous receiver transmitter) [Driver_UART5]
+//  Configuration settings for Driver_UART5 in component ::Drivers:UART
+#define RTE_UART5                       0
+
+//    UART5_TX Pin <0=>PC12
+#define RTE_UART5_TX_ID                 0
+#if    (RTE_UART5_TX_ID == 0)
+#define RTE_UART5_TX_PORT               GPIOC
+#define RTE_UART5_TX_BIT                12
+#else
+#error "Invalid UART5_TX Pin Configuration!"
+#endif
+
+//    UART5_RX Pin <0=>PD2
+#define RTE_UART5_RX_ID                 0
+#if    (RTE_UART5_RX_ID == 0)
+#define RTE_UART5_RX_PORT               GPIOD
+#define RTE_UART5_RX_BIT                2
+#else
+#error "Invalid UART5_RX Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <0=>0
+//       Selects DMA Stream (only Stream 0 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART5_RX_DMA                1
+#define RTE_UART5_RX_DMA_NUMBER         1
+#define RTE_UART5_RX_DMA_STREAM         0
+#define RTE_UART5_RX_DMA_CHANNEL        4
+#define RTE_UART5_RX_DMA_PRIORITY       0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <7=>7
+//       Selects DMA Stream (only Stream 7 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART5_TX_DMA                1
+#define RTE_UART5_TX_DMA_NUMBER         1
+#define RTE_UART5_TX_DMA_STREAM         7
+#define RTE_UART5_TX_DMA_CHANNEL        4
+#define RTE_UART5_TX_DMA_PRIORITY       0
+
+// 
+
+
+//  USART6 (Universal synchronous asynchronous receiver transmitter) [Driver_UART6]
+//  Configuration settings for Driver_UART6 in component ::Drivers:UART
+#define RTE_USART6                      0
+
+//    USART6_TX Pin <0=>PC6 <1=>PG14
+#define RTE_USART6_TX_ID                0
+#if    (RTE_USART6_TX_ID == 0)
+#define RTE_USART6_TX_PORT              GPIOC
+#define RTE_USART6_TX_BIT               6
+#elif  (RTE_USART6_TX_ID == 1)
+#define RTE_USART6_TX_PORT              GPIOG
+#define RTE_USART6_TX_BIT               14
+#else
+#error "Invalid USART6_TX Pin Configuration!"
+#endif
+
+//    USART6_RX Pin <0=>PC7 <1=>PG9
+#define RTE_USART6_RX_ID                0
+#if    (RTE_USART6_RX_ID == 0)
+#define RTE_USART6_RX_PORT              GPIOC
+#define RTE_USART6_RX_BIT               7
+#elif  (RTE_USART6_RX_ID == 1)
+#define RTE_USART6_RX_PORT              GPIOG
+#define RTE_USART6_RX_BIT               9
+#else
+#error "Invalid USART6_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART6_CK Pin <0=>PC8 <1=>PG7
+//     
+#define RTE_USART6_CK                   0
+#define RTE_USART6_CK_ID                0
+#if    (RTE_USART6_CK_ID == 0)
+#define RTE_USART6_CK_PORT              GPIOC
+#define RTE_USART6_CK_BIT               8
+#elif  (RTE_USART6_CK_ID == 1)
+#define RTE_USART6_CK_PORT              GPIOG
+#define RTE_USART6_CK_BIT               7
+#else
+#error "Invalid USART6_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART6_CTS Pin <0=>PG13 <1=>PG15
+//        USART6_RTS Pin <0=>PG8  <1=>PG12
+//        Manual CTS/RTS
+//     
+#define RTE_USART6_HW_FLOW              0
+#define RTE_USART6_CTS_ID               0
+#define RTE_USART6_RTS_ID               0
+#define RTE_USART6_MANUAL_FLOW          0
+#if    (RTE_USART6_CTS_ID == 0)
+#define RTE_USART6_CTS_PORT             GPIOG
+#define RTE_USART6_CTS_BIT              13
+#elif  (RTE_USART6_CTS_ID == 1)
+#define RTE_USART6_CTS_PORT             GPIOG
+#define RTE_USART6_CTS_BIT              15
+#else
+#error "Invalid USART6_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART6_RTS_ID == 0)
+#define RTE_USART6_RTS_PORT             GPIOG
+#define RTE_USART6_RTS_BIT              8
+#elif  (RTE_USART6_RTS_ID == 1)
+#define RTE_USART6_RTS_PORT             GPIOG
+#define RTE_USART6_RTS_BIT              12
+#else
+#error "Invalid USART6_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <1=>1 <2=>2
+//       Selects DMA Stream (only Stream 1 or 2 can be used)
+//      Channel <5=>5
+//       Selects DMA Channel (only Channel 5 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART6_RX_DMA               1
+#define RTE_USART6_RX_DMA_NUMBER        2
+#define RTE_USART6_RX_DMA_STREAM        1
+#define RTE_USART6_RX_DMA_CHANNEL       5
+#define RTE_USART6_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <6=>6 <7=>7
+//       Selects DMA Stream (only Stream 6 or 7 can be used)
+//      Channel <5=>5
+//       Selects DMA Channel (only Channel 5 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART6_TX_DMA               1
+#define RTE_USART6_TX_DMA_NUMBER        2
+#define RTE_USART6_TX_DMA_STREAM        6
+#define RTE_USART6_TX_DMA_CHANNEL       5
+#define RTE_USART6_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  I2C1 (Inter-integrated Circuit Interface 1) [Driver_I2C1]
+//  Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        0
+
+//    I2C1_SCL Pin <0=>PB6 <1=>PB8
+#define RTE_I2C1_SCL_PORT_ID            0
+#if    (RTE_I2C1_SCL_PORT_ID == 0)
+#define RTE_I2C1_SCL_PORT               GPIOB
+#define RTE_I2C1_SCL_BIT                6
+#elif  (RTE_I2C1_SCL_PORT_ID == 1)
+#define RTE_I2C1_SCL_PORT               GPIOB
+#define RTE_I2C1_SCL_BIT                8
+#else
+#error "Invalid I2C1_SCL Pin Configuration!"
+#endif
+
+//    I2C1_SDA Pin <0=>PB7 <1=>PB9
+#define RTE_I2C1_SDA_PORT_ID            0
+#if    (RTE_I2C1_SDA_PORT_ID == 0)
+#define RTE_I2C1_SDA_PORT               GPIOB
+#define RTE_I2C1_SDA_BIT                7
+#elif  (RTE_I2C1_SDA_PORT_ID == 1)
+#define RTE_I2C1_SDA_PORT               GPIOB
+#define RTE_I2C1_SDA_BIT                9
+#else
+#error "Invalid I2C1_SDA Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <0=>0 <5=>5
+//       Selects DMA Stream (only Stream 0 or 5 can be used)
+//      Channel <1=>1
+//       Selects DMA Channel (only Channel 1 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C1_RX_DMA                 1
+#define RTE_I2C1_RX_DMA_NUMBER          1
+#define RTE_I2C1_RX_DMA_STREAM          0
+#define RTE_I2C1_RX_DMA_CHANNEL         1
+#define RTE_I2C1_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <6=>6 <7=>7
+//       Selects DMA Stream (only Stream 6 or 7 can be used)
+//      Channel <1=>1
+//       Selects DMA Channel (only Channel 1 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C1_TX_DMA                 1
+#define RTE_I2C1_TX_DMA_NUMBER          1
+#define RTE_I2C1_TX_DMA_STREAM          6
+#define RTE_I2C1_TX_DMA_CHANNEL         1
+#define RTE_I2C1_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  I2C2 (Inter-integrated Circuit Interface 2) [Driver_I2C2]
+//  Configuration settings for Driver_I2C2 in component ::Drivers:I2C
+#define RTE_I2C2                        0
+
+//    I2C2_SCL Pin <0=>PF1 <1=>PH4 <2=>PB10
+#define RTE_I2C2_SCL_PORT_ID            0
+#if    (RTE_I2C2_SCL_PORT_ID == 0)
+#define RTE_I2C2_SCL_PORT               GPIOF
+#define RTE_I2C2_SCL_BIT                1
+#elif  (RTE_I2C2_SCL_PORT_ID == 1)
+#define RTE_I2C2_SCL_PORT               GPIOH
+#define RTE_I2C2_SCL_BIT                4
+#elif  (RTE_I2C2_SCL_PORT_ID == 2)
+#define RTE_I2C2_SCL_PORT               GPIOB
+#define RTE_I2C2_SCL_BIT                10
+#else
+#error "Invalid I2C2_SCL Pin Configuration!"
+#endif
+
+//    I2C2_SDA Pin <0=>PF0 <1=>PH5 <2=>PB11
+#define RTE_I2C2_SDA_PORT_ID            0
+#if    (RTE_I2C2_SDA_PORT_ID == 0)
+#define RTE_I2C2_SDA_PORT               GPIOF
+#define RTE_I2C2_SDA_BIT                0
+#elif  (RTE_I2C2_SDA_PORT_ID == 1)
+#define RTE_I2C2_SDA_PORT               GPIOH
+#define RTE_I2C2_SDA_BIT                5
+#elif  (RTE_I2C2_SDA_PORT_ID == 2)
+#define RTE_I2C2_SDA_PORT               GPIOB
+#define RTE_I2C2_SDA_BIT                11
+#else
+#error "Invalid I2C2_SCL Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2 <3=>3
+//       Selects DMA Stream (only Stream 2 or 3 can be used)
+//      Channel <7=>7
+//       Selects DMA Channel (only Channel 7 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C2_RX_DMA                 1
+#define RTE_I2C2_RX_DMA_NUMBER          1
+#define RTE_I2C2_RX_DMA_STREAM          2
+#define RTE_I2C2_RX_DMA_CHANNEL         7
+#define RTE_I2C2_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <7=>7
+//       Selects DMA Stream (only Stream 7 can be used)
+//      Channel <7=>7
+//       Selects DMA Channel (only Channel 1 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C2_TX_DMA                 1
+#define RTE_I2C2_TX_DMA_NUMBER          1
+#define RTE_I2C2_TX_DMA_STREAM          7
+#define RTE_I2C2_TX_DMA_CHANNEL         7
+#define RTE_I2C2_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  I2C3 (Inter-integrated Circuit Interface 3) [Driver_I2C3]
+//  Configuration settings for Driver_I2C3 in component ::Drivers:I2C
+#define RTE_I2C3                        0
+
+//    I2C3_SCL Pin <0=>PH7 <1=>PA8
+#define RTE_I2C3_SCL_PORT_ID            0
+#if    (RTE_I2C3_SCL_PORT_ID == 0)
+#define RTE_I2C3_SCL_PORT               GPIOH
+#define RTE_I2C3_SCL_BIT                7
+#elif  (RTE_I2C3_SCL_PORT_ID == 1)
+#define RTE_I2C3_SCL_PORT               GPIOA
+#define RTE_I2C3_SCL_BIT                8
+#else
+#error "Invalid I2C3_SCL Pin Configuration!"
+#endif
+
+//    I2C3_SDA Pin <0=>PH8 <1=>PC9
+#define RTE_I2C3_SDA_PORT_ID            0
+#if    (RTE_I2C3_SDA_PORT_ID == 0)
+#define RTE_I2C3_SDA_PORT               GPIOH
+#define RTE_I2C3_SDA_BIT                8
+#elif  (RTE_I2C3_SDA_PORT_ID == 1)
+#define RTE_I2C3_SDA_PORT               GPIOC
+#define RTE_I2C3_SDA_BIT                9
+#else
+#error "Invalid I2C3_SCL Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2
+//       Selects DMA Stream (only Stream 2 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C3_RX_DMA                 1
+#define RTE_I2C3_RX_DMA_NUMBER          1
+#define RTE_I2C3_RX_DMA_STREAM          2
+#define RTE_I2C3_RX_DMA_CHANNEL         3
+#define RTE_I2C3_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <4=>4
+//       Selects DMA Stream (only Stream 4 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C3_TX_DMA                 1
+#define RTE_I2C3_TX_DMA_NUMBER          1
+#define RTE_I2C3_TX_DMA_STREAM          4
+#define RTE_I2C3_TX_DMA_CHANNEL         3
+#define RTE_I2C3_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SPI1 (Serial Peripheral Interface 1) [Driver_SPI1]
+//  Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        0
+
+//    SPI1_NSS Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SPI1_NSS_PIN                1
+#define RTE_SPI1_NSS_PORT               GPIO_PORT(0)
+#define RTE_SPI1_NSS_BIT                4
+
+//    SPI1_SCK Pin <0=>PA5 <1=>PB3
+#define RTE_SPI1_SCL_PORT_ID            0
+#if    (RTE_SPI1_SCL_PORT_ID == 0)
+#define RTE_SPI1_SCL_PORT               GPIOA
+#define RTE_SPI1_SCL_BIT                5
+#elif  (RTE_SPI1_SCL_PORT_ID == 1)
+#define RTE_SPI1_SCL_PORT               GPIOB
+#define RTE_SPI1_SCL_BIT                3
+#else
+#error "Invalid SPI1_SCK Pin Configuration!"
+#endif
+
+//    SPI1_MISO Pin <0=>PA6 <1=>PB4
+#define RTE_SPI1_MISO_PORT_ID           0
+#if    (RTE_SPI1_MISO_PORT_ID == 0)
+#define RTE_SPI1_MISO_PORT              GPIOA
+#define RTE_SPI1_MISO_BIT               6
+#elif  (RTE_SPI1_MISO_PORT_ID == 1)
+#define RTE_SPI1_MISO_PORT              GPIOB
+#define RTE_SPI1_MISO_BIT               4
+#else
+#error "Invalid SPI1_MISO Pin Configuration!"
+#endif
+
+//    SPI1_MOSI Pin <0=>PA7 <1=>PB5
+#define RTE_SPI1_MOSI_PORT_ID           0
+#if    (RTE_SPI1_MOSI_PORT_ID == 0)
+#define RTE_SPI1_MOSI_PORT              GPIOA
+#define RTE_SPI1_MOSI_BIT               7
+#elif  (RTE_SPI1_MOSI_PORT_ID == 1)
+#define RTE_SPI1_MOSI_PORT              GPIOB
+#define RTE_SPI1_MOSI_BIT               5
+#else
+#error "Invalid SPI1_MISO Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <0=>0 <2=>2
+//       Selects DMA Stream (only Stream 0 or 2 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI1_RX_DMA                 1
+#define RTE_SPI1_RX_DMA_NUMBER          2
+#define RTE_SPI1_RX_DMA_STREAM          0
+#define RTE_SPI1_RX_DMA_CHANNEL         3
+#define RTE_SPI1_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <3=>3 <5=>5
+//       Selects DMA Stream (only Stream 3 or 5 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI1_TX_DMA                 1
+#define RTE_SPI1_TX_DMA_NUMBER          2
+#define RTE_SPI1_TX_DMA_STREAM          5
+#define RTE_SPI1_TX_DMA_CHANNEL         3
+#define RTE_SPI1_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SPI2 (Serial Peripheral Interface 2) [Driver_SPI2]
+//  Configuration settings for Driver_SPI2 in component ::Drivers:SPI
+#define RTE_SPI2                        0
+
+//    SPI2_NSS Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SPI2_NSS_PIN                1
+#define RTE_SPI2_NSS_PORT               GPIO_PORT(1)
+#define RTE_SPI2_NSS_BIT                12
+
+//    SPI2_SCK Pin <0=>PB10 <1=>PB13 <2=>PI1
+#define RTE_SPI2_SCL_PORT_ID            0
+#if    (RTE_SPI2_SCL_PORT_ID == 0)
+#define RTE_SPI2_SCL_PORT               GPIOB
+#define RTE_SPI2_SCL_BIT                10
+#elif  (RTE_SPI2_SCL_PORT_ID == 1)
+#define RTE_SPI2_SCL_PORT               GPIOB
+#define RTE_SPI2_SCL_BIT                13
+#elif  (RTE_SPI2_SCL_PORT_ID == 2)
+#define RTE_SPI2_SCL_PORT               GPIOI
+#define RTE_SPI2_SCL_BIT                1
+#else
+#error "Invalid SPI2_SCK Pin Configuration!"
+#endif
+
+//    SPI2_MISO Pin <0=>PB14 <1=>PC2 <2=>PI2
+#define RTE_SPI2_MISO_PORT_ID           0
+#if    (RTE_SPI2_MISO_PORT_ID == 0)
+#define RTE_SPI2_MISO_PORT              GPIOB
+#define RTE_SPI2_MISO_BIT               14
+#elif  (RTE_SPI2_MISO_PORT_ID == 1)
+#define RTE_SPI2_MISO_PORT              GPIOC
+#define RTE_SPI2_MISO_BIT               2
+#elif  (RTE_SPI2_MISO_PORT_ID == 2)
+#define RTE_SPI2_MISO_PORT              GPIOI
+#define RTE_SPI2_MISO_BIT               2
+#else
+#error "Invalid SPI2_MISO Pin Configuration!"
+#endif
+
+//    SPI2_MOSI Pin <0=>PB15 <1=>PC3 <2=>OI3
+#define RTE_SPI2_MOSI_PORT_ID           0
+#if    (RTE_SPI2_MOSI_PORT_ID == 0)
+#define RTE_SPI2_MOSI_PORT              GPIOB
+#define RTE_SPI2_MOSI_BIT               15
+#elif  (RTE_SPI2_MOSI_PORT_ID == 1)
+#define RTE_SPI2_MOSI_PORT              GPIOC
+#define RTE_SPI2_MOSI_BIT               3
+#elif  (RTE_SPI2_MOSI_PORT_ID == 2)
+#define RTE_SPI2_MOSI_PORT              GPIOI
+#define RTE_SPI2_MOSI_BIT               3
+#else
+#error "Invalid SPI2_MISO Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2
+//       Selects DMA Stream (only Stream 2 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI2_RX_DMA                 1
+#define RTE_SPI2_RX_DMA_NUMBER          1
+#define RTE_SPI2_RX_DMA_STREAM          2
+#define RTE_SPI2_RX_DMA_CHANNEL         0
+#define RTE_SPI2_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <3=>3
+//       Selects DMA Stream (only Stream 3 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI2_TX_DMA                 1
+#define RTE_SPI2_TX_DMA_NUMBER          1
+#define RTE_SPI2_TX_DMA_STREAM          3
+#define RTE_SPI2_TX_DMA_CHANNEL         0
+#define RTE_SPI2_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SPI3 (Serial Peripheral Interface 3) [Driver_SPI3]
+//  Configuration settings for Driver_SPI3 in component ::Drivers:SPI
+#define RTE_SPI3                        0
+
+//    SPI3_NSS Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SPI3_NSS_PIN                1
+#define RTE_SPI3_NSS_PORT               GPIO_PORT(0)
+#define RTE_SPI3_NSS_BIT                15
+
+//    SPI3_SCK Pin <0=>PB3 <1=>PC10
+#define RTE_SPI3_SCL_PORT_ID            0
+#if    (RTE_SPI3_SCL_PORT_ID == 0)
+#define RTE_SPI3_SCL_PORT               GPIOB
+#define RTE_SPI3_SCL_BIT                3
+#elif  (RTE_SPI3_SCL_PORT_ID == 1)
+#define RTE_SPI3_SCL_PORT               GPIOC
+#define RTE_SPI3_SCL_BIT                10
+#else
+#error "Invalid SPI3_SCK Pin Configuration!"
+#endif
+
+//    SPI3_MISO Pin <0=>PB4 <1=>PC11
+#define RTE_SPI3_MISO_PORT_ID           0
+#if    (RTE_SPI3_MISO_PORT_ID == 0)
+#define RTE_SPI3_MISO_PORT              GPIOB
+#define RTE_SPI3_MISO_BIT               4
+#elif  (RTE_SPI3_MISO_PORT_ID == 1)
+#define RTE_SPI3_MISO_PORT              GPIOC
+#define RTE_SPI3_MISO_BIT               11
+#else
+#error "Invalid SPI3_MISO Pin Configuration!"
+#endif
+
+//    SPI3_MOSI Pin <0=>PB5 <1=>PC12
+#define RTE_SPI3_MOSI_PORT_ID           0
+#if    (RTE_SPI3_MOSI_PORT_ID == 0)
+#define RTE_SPI3_MOSI_PORT              GPIOB
+#define RTE_SPI3_MOSI_BIT               5
+#elif  (RTE_SPI3_MOSI_PORT_ID == 1)
+#define RTE_SPI3_MOSI_PORT              GPIOC
+#define RTE_SPI3_MOSI_BIT               12
+#else
+#error "Invalid SPI3_MISO Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <0=>0 <2=>2
+//       Selects DMA Stream (only Stream 0 or 2 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI3_RX_DMA                 1
+#define RTE_SPI3_RX_DMA_NUMBER          1
+#define RTE_SPI3_RX_DMA_STREAM          0
+#define RTE_SPI3_RX_DMA_CHANNEL         0
+#define RTE_SPI3_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <5=>5 <7=>7
+//       Selects DMA Stream (only Stream 5 or 7 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI3_TX_DMA                 1
+#define RTE_SPI3_TX_DMA_NUMBER          1
+#define RTE_SPI3_TX_DMA_STREAM          5
+#define RTE_SPI3_TX_DMA_CHANNEL         0
+#define RTE_SPI3_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SDIO (Secure Digital Input/Output) [Driver_MCI0]
+//  Configuration settings for Driver_MCI0 in component ::Drivers:MCI
+#define RTE_SDIO                        1
+
+//    SDIO_CD (Card Detect) Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Active State <0=>Low <1=>High
+//       Selects Active State Logical Level
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SDIO_CD_PIN                 1
+#define RTE_SDIO_CD_ACTIVE              0
+#define RTE_SDIO_CD_PORT                GPIO_PORT(7)
+#define RTE_SDIO_CD_BIT                 15
+
+//    SDIO_WP (Write Protect) Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Active State <0=>Low <1=>High
+//       Selects Active State Logical Level
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SDIO_WP_PIN                 0
+#define RTE_SDIO_WP_ACTIVE              0
+#define RTE_SDIO_WP_PORT                GPIO_PORT(7)
+#define RTE_SDIO_WP_BIT                 16
+
+//    SDIO Bus
+//      SDIO_CK Pin <0=>PC12
+#define RTE_SDIO_CK_PORT_ID             0
+#if    (RTE_SDIO_CK_PORT_ID == 0)
+#define RTE_SDIO_CK_PORT                GPIOC
+#define RTE_SDIO_CK_PIN                 12
+#else
+#error "Invalid SDIO_CK Pin Configuration!"
+#endif
+//      SDIO_CMD Pin <0=>PD2
+#define RTE_SDIO_CMD_PORT_ID            0
+#if    (RTE_SDIO_CMD_PORT_ID == 0)
+#define RTE_SDIO_CMD_PORT               GPIOD
+#define RTE_SDIO_CMD_PIN                2
+#else
+#error "Invalid SDIO_CDM Pin Configuration!"
+#endif
+//      SDIO_D0 Pin <0=>PC8
+#define RTE_SDIO_D0_PORT_ID             0
+#if    (RTE_SDIO_D0_PORT_ID == 0)
+#define RTE_SDIO_D0_PORT                GPIOC
+#define RTE_SDIO_D0_PIN                 8
+#else
+#error "Invalid SDIO_D0 Pin Configuration!"
+#endif
+//      SDIO_D1 Pin <0=>PC9
+#define RTE_SDIO_D1_PORT_ID             0
+#if    (RTE_SDIO_D1_PORT_ID == 0)
+#define RTE_SDIO_D1_PORT                GPIOC
+#define RTE_SDIO_D1_PIN                 9
+#else
+#error "Invalid SDIO_D1 Pin Configuration!"
+#endif
+//      SDIO_D2 Pin <0=>PC10
+#define RTE_SDIO_D2_PORT_ID             0
+#if    (RTE_SDIO_D2_PORT_ID == 0)
+#define RTE_SDIO_D2_PORT                GPIOC
+#define RTE_SDIO_D2_PIN                 10
+#else
+#error "Invalid SDIO_D2 Pin Configuration!"
+#endif
+//      SDIO_D3 Pin <0=>PC11
+#define RTE_SDIO_D3_PORT_ID             0
+#if    (RTE_SDIO_D3_PORT_ID == 0)
+#define RTE_SDIO_D3_PORT                GPIOC
+#define RTE_SDIO_D3_PIN                 11
+#else
+#error "Invalid SDIO_D3 Pin Configuration!"
+#endif
+//      SDIO_D4 Pin <0=>PB8
+#define RTE_SDIO_D4_PORT_ID             0
+#if    (RTE_SDIO_D4_PORT_ID == 0)
+#define RTE_SDIO_D4_PORT                GPIOB
+#define RTE_SDIO_D4_PIN                 8
+#else
+#error "Invalid SDIO_D4 Pin Configuration!"
+#endif
+//      SDIO_D5 Pin <0=>PB9
+#define RTE_SDIO_D5_PORT_ID             0
+#if    (RTE_SDIO_D5_PORT_ID == 0)
+#define RTE_SDIO_D5_PORT                GPIOB
+#define RTE_SDIO_D5_PIN                 9
+#else
+#error "Invalid SDIO_D5 Pin Configuration!"
+#endif
+//      SDIO_D6 Pin <0=>PC6
+#define RTE_SDIO_D6_PORT_ID             0
+#if    (RTE_SDIO_D6_PORT_ID == 0)
+#define RTE_SDIO_D6_PORT                GPIOC
+#define RTE_SDIO_D6_PIN                 6
+#else
+#error "Invalid SDIO_D6 Pin Configuration!"
+#endif
+//      SDIO_D7 Pin <0=>PC7
+#define RTE_SDIO_D7_PORT_ID             0
+#if    (RTE_SDIO_D7_PORT_ID == 0)
+#define RTE_SDIO_D7_PORT                GPIOC
+#define RTE_SDIO_D7_PIN                 7
+#else
+#error "Invalid SDIO_D7 Pin Configuration!"
+#endif
+//   
+
+//    DMA
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <3=>3 <6=>6
+//       Selects DMA Stream (only Stream 3 or 6 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SDIO_DMA                    1
+#define RTE_SDIO_DMA_NUMBER             2
+#define RTE_SDIO_DMA_STREAM             3
+#define RTE_SDIO_DMA_CHANNEL            4
+#define RTE_SDIO_DMA_PRIORITY           0
+
+// 
+
+
+//  ETH (Ethernet Interface) [Driver_ETH_MAC0]
+//  Configuration settings for Driver_ETH_MAC0 in component ::Drivers:Ethernet MAC
+#define RTE_ETH                         1
+
+//    MII (Media Independent Interface)
+#define RTE_ETH_MII                     0
+
+//      ETH_MII_TX_CLK Pin <0=>PC3
+#define RTE_ETH_MII_TX_CLK_PORT_ID      0
+#if    (RTE_ETH_MII_TX_CLK_PORT_ID == 0)
+#define RTE_ETH_MII_TX_CLK_PORT         GPIOC
+#define RTE_ETH_MII_TX_CLK_PIN          3
+#else
+#error "Invalid ETH_MII_TX_CLK Pin Configuration!"
+#endif
+//      ETH_MII_TXD0 Pin <0=>PB12 <1=>PG13
+#define RTE_ETH_MII_TXD0_PORT_ID        0
+#if    (RTE_ETH_MII_TXD0_PORT_ID == 0)
+#define RTE_ETH_MII_TXD0_PORT           GPIOB
+#define RTE_ETH_MII_TXD0_PIN            12
+#elif  (RTE_ETH_MII_TXD0_PORT_ID == 1)
+#define RTE_ETH_MII_TXD0_PORT           GPIOG
+#define RTE_ETH_MII_TXD0_PIN            13
+#else
+#error "Invalid ETH_MII_TXD0 Pin Configuration!"
+#endif
+//      ETH_MII_TXD1 Pin <0=>PB13 <1=>PG14
+#define RTE_ETH_MII_TXD1_PORT_ID        0
+#if    (RTE_ETH_MII_TXD1_PORT_ID == 0)
+#define RTE_ETH_MII_TXD1_PORT           GPIOB
+#define RTE_ETH_MII_TXD1_PIN            13
+#elif  (RTE_ETH_MII_TXD1_PORT_ID == 1)
+#define RTE_ETH_MII_TXD1_PORT           GPIOG
+#define RTE_ETH_MII_TXD1_PIN            14
+#else
+#error "Invalid ETH_MII_TXD1 Pin Configuration!"
+#endif
+//      ETH_MII_TXD2 Pin <0=>PC2
+#define RTE_ETH_MII_TXD2_PORT_ID        0
+#if    (RTE_ETH_MII_TXD2_PORT_ID == 0)
+#define RTE_ETH_MII_TXD2_PORT           GPIOC
+#define RTE_ETH_MII_TXD2_PIN            2
+#else
+#error "Invalid ETH_MII_TXD2 Pin Configuration!"
+#endif
+//      ETH_MII_TXD3 Pin <0=>PB8 <1=>PE2
+#define RTE_ETH_MII_TXD3_PORT_ID        0
+#if    (RTE_ETH_MII_TXD3_PORT_ID == 0)
+#define RTE_ETH_MII_TXD3_PORT           GPIOB
+#define RTE_ETH_MII_TXD3_PIN            8
+#elif  (RTE_ETH_MII_TXD3_PORT_ID == 1)
+#define RTE_ETH_MII_TXD3_PORT           GPIOE
+#define RTE_ETH_MII_TXD3_PIN            2
+#else
+#error "Invalid ETH_MII_TXD3 Pin Configuration!"
+#endif
+//      ETH_MII_TX_EN Pin <0=>PB11 <1=>PG11
+#define RTE_ETH_MII_TX_EN_PORT_ID       0
+#if    (RTE_ETH_MII_TX_EN_PORT_ID == 0)
+#define RTE_ETH_MII_TX_EN_PORT          GPIOB
+#define RTE_ETH_MII_TX_EN_PIN           11
+#elif  (RTE_ETH_MII_TX_EN_PORT_ID == 1)
+#define RTE_ETH_MII_TX_EN_PORT          GPIOG
+#define RTE_ETH_MII_TX_EN_PIN           11
+#else
+#error "Invalid ETH_MII_TX_EN Pin Configuration!"
+#endif
+//      ETH_MII_RX_CLK Pin <0=>PA1
+#define RTE_ETH_MII_RX_CLK_PORT_ID        0
+#if    (RTE_ETH_MII_RX_CLK_PORT_ID == 0)
+#define RTE_ETH_MII_RX_CLK_PORT         GPIOA
+#define RTE_ETH_MII_RX_CLK_PIN          1
+#else
+#error "Invalid ETH_MII_RX_CLK Pin Configuration!"
+#endif
+//      ETH_MII_RXD0 Pin <0=>PC4
+#define RTE_ETH_MII_RXD0_PORT_ID        0
+#if    (RTE_ETH_MII_RXD0_PORT_ID == 0)
+#define RTE_ETH_MII_RXD0_PORT           GPIOC
+#define RTE_ETH_MII_RXD0_PIN            4
+#else
+#error "Invalid ETH_MII_RXD0 Pin Configuration!"
+#endif
+//      ETH_MII_RXD1 Pin <0=>PC5
+#define RTE_ETH_MII_RXD1_PORT_ID        0
+#if    (RTE_ETH_MII_RXD1_PORT_ID == 0)
+#define RTE_ETH_MII_RXD1_PORT           GPIOC
+#define RTE_ETH_MII_RXD1_PIN            5
+#else
+#error "Invalid ETH_MII_RXD1 Pin Configuration!"
+#endif
+//      ETH_MII_RXD2 Pin <0=>PB0 <1=>PH6
+#define RTE_ETH_MII_RXD2_PORT_ID        0
+#if    (RTE_ETH_MII_RXD2_PORT_ID == 0)
+#define RTE_ETH_MII_RXD2_PORT           GPIOB
+#define RTE_ETH_MII_RXD2_PIN            0
+#elif  (RTE_ETH_MII_RXD2_PORT_ID == 1)
+#define RTE_ETH_MII_RXD2_PORT           GPIOH
+#define RTE_ETH_MII_RXD2_PIN            6
+#else
+#error "Invalid ETH_MII_RXD2 Pin Configuration!"
+#endif
+//      ETH_MII_RXD3 Pin <0=>PB1 <1=>PH7
+#define RTE_ETH_MII_RXD3_PORT_ID        0
+#if    (RTE_ETH_MII_RXD3_PORT_ID == 0)
+#define RTE_ETH_MII_RXD3_PORT           GPIOB
+#define RTE_ETH_MII_RXD3_PIN            1
+#elif  (RTE_ETH_MII_RXD3_PORT_ID == 1)
+#define RTE_ETH_MII_RXD3_PORT           GPIOH
+#define RTE_ETH_MII_RXD3_PIN            7
+#else
+#error "Invalid ETH_MII_RXD3 Pin Configuration!"
+#endif
+//      ETH_MII_RX_DV Pin <0=>PA7
+#define RTE_ETH_MII_RX_DV_PORT_ID       0
+#if    (RTE_ETH_MII_RX_DV_PORT_ID == 0)
+#define RTE_ETH_MII_RX_DV_PORT          GPIOA
+#define RTE_ETH_MII_RX_DV_PIN           7
+#else
+#error "Invalid ETH_MII_RX_DV Pin Configuration!"
+#endif
+//      ETH_MII_RX_ER Pin <0=>PB10 <1=>PI10
+#define RTE_ETH_MII_RX_ER_PORT_ID       0
+#if    (RTE_ETH_MII_RX_ER_PORT_ID == 0)
+#define RTE_ETH_MII_RX_ER_PORT          GPIOB
+#define RTE_ETH_MII_RX_ER_PIN           10
+#elif  (RTE_ETH_MII_RXD3_PORT_ID == 1)
+#define RTE_ETH_MII_RX_ER_PORT          GPIOI
+#define RTE_ETH_MII_RX_ER_PIN           10
+#else
+#error "Invalid ETH_MII_RX_ER Pin Configuration!"
+#endif
+//      ETH_MII_CRS Pin <0=>PA0 <1=>PH2
+#define RTE_ETH_MII_CRS_PORT_ID       0
+#if    (RTE_ETH_MII_CRS_PORT_ID == 0)
+#define RTE_ETH_MII_CRS_PORT            GPIOA
+#define RTE_ETH_MII_CRS_PIN             0
+#elif  (RTE_ETH_MII_CRS_PORT_ID == 1)
+#define RTE_ETH_MII_CRS_PORT            GPIOH
+#define RTE_ETH_MII_CRS_PIN             2
+#else
+#error "Invalid ETH_MII_CRS Pin Configuration!"
+#endif
+//      ETH_MII_COL Pin <0=>PA3 <1=>PH3
+#define RTE_ETH_MII_COL_PORT_ID       0
+#if    (RTE_ETH_MII_COL_PORT_ID == 0)
+#define RTE_ETH_MII_COL_PORT            GPIOA
+#define RTE_ETH_MII_COL_PIN             3
+#elif  (RTE_ETH_MII_COL_PORT_ID == 1)
+#define RTE_ETH_MII_COL_PORT            GPIOH
+#define RTE_ETH_MII_COL_PIN             3
+#else
+#error "Invalid ETH_MII_COL Pin Configuration!"
+#endif
+
+//   
+
+//    RMII (Reduced Media Independent Interface)
+#define RTE_ETH_RMII                    1
+
+//      ETH_RMII_TXD0 Pin <0=>PB12 <1=>PG13
+#define RTE_ETH_RMII_TXD0_PORT_ID       1
+#if    (RTE_ETH_RMII_TXD0_PORT_ID == 0)
+#define RTE_ETH_RMII_TXD0_PORT          GPIOB
+#define RTE_ETH_RMII_TXD0_PIN           12
+#elif  (RTE_ETH_RMII_TXD0_PORT_ID == 1)
+#define RTE_ETH_RMII_TXD0_PORT          GPIOG
+#define RTE_ETH_RMII_TXD0_PIN           13
+#else
+#error "Invalid ETH_RMII_TXD0 Pin Configuration!"
+#endif
+//      ETH_RMII_TXD1 Pin <0=>PB13 <1=>PG14
+#define RTE_ETH_RMII_TXD1_PORT_ID       1
+#if    (RTE_ETH_RMII_TXD1_PORT_ID == 0)
+#define RTE_ETH_RMII_TXD1_PORT          GPIOB
+#define RTE_ETH_RMII_TXD1_PIN           13
+#elif  (RTE_ETH_RMII_TXD1_PORT_ID == 1)
+#define RTE_ETH_RMII_TXD1_PORT          GPIOG
+#define RTE_ETH_RMII_TXD1_PIN           14
+#else
+#error "Invalid ETH_RMII_TXD1 Pin Configuration!"
+#endif
+//      ETH_RMII_TX_EN Pin <0=>PB11 <1=>PG11
+#define RTE_ETH_RMII_TX_EN_PORT_ID      1
+#if    (RTE_ETH_RMII_TX_EN_PORT_ID == 0)
+#define RTE_ETH_RMII_TX_EN_PORT         GPIOB
+#define RTE_ETH_RMII_TX_EN_PIN          11
+#elif  (RTE_ETH_RMII_TX_EN_PORT_ID == 1)
+#define RTE_ETH_RMII_TX_EN_PORT         GPIOG
+#define RTE_ETH_RMII_TX_EN_PIN          11
+#else
+#error "Invalid ETH_RMII_TX_EN Pin Configuration!"
+#endif
+//      ETH_RMII_RXD0 Pin <0=>PC4
+#define RTE_ETH_RMII_RXD0_PORT_ID       0
+#if    (RTE_ETH_RMII_RXD0_PORT_ID == 0)
+#define RTE_ETH_RMII_RXD0_PORT          GPIOC
+#define RTE_ETH_RMII_RXD0_PIN           4
+#else
+#error "Invalid ETH_RMII_RXD0 Pin Configuration!"
+#endif
+//      ETH_RMII_RXD1 Pin <0=>PC5
+#define RTE_ETH_RMII_RXD1_PORT_ID       0
+#if    (RTE_ETH_RMII_RXD1_PORT_ID == 0)
+#define RTE_ETH_RMII_RXD1_PORT          GPIOC
+#define RTE_ETH_RMII_RXD1_PIN           5
+#else
+#error "Invalid ETH_RMII_RXD1 Pin Configuration!"
+#endif
+//      ETH_RMII_REF_CLK Pin <0=>PA1
+#define RTE_ETH_RMII_REF_CLK_PORT_ID    0
+#if    (RTE_ETH_RMII_REF_CLK_PORT_ID == 0)
+#define RTE_ETH_RMII_REF_CLK_PORT       GPIOA
+#define RTE_ETH_RMII_REF_CLK_PIN        1
+#else
+#error "Invalid ETH_RMII_REF_CLK Pin Configuration!"
+#endif
+//      ETH_RMII_CRS_DV Pin <0=>PA7
+#define RTE_ETH_RMII_CRS_DV_PORT_ID     0
+#if    (RTE_ETH_RMII_CRS_DV_PORT_ID == 0)
+#define RTE_ETH_RMII_CRS_DV_PORT        GPIOA
+#define RTE_ETH_RMII_CRS_DV_PIN         7
+#else
+#error "Invalid ETH_RMII_CRS_DV Pin Configuration!"
+#endif
+
+//   
+
+//    Management Data Interface
+//      ETH_MDC Pin <0=>PC1
+#define RTE_ETH_MDI_MDC_PORT_ID         0
+#if    (RTE_ETH_MDI_MDC_PORT_ID == 0)
+#define RTE_ETH_MDI_MDC_PORT            GPIOC
+#define RTE_ETH_MDI_MDC_PIN             1
+#else
+#error "Invalid ETH_MDC Pin Configuration!"
+#endif
+//      ETH_MDIO Pin <0=>PA2
+#define RTE_ETH_MDI_MDIO_PORT_ID        0
+#if    (RTE_ETH_MDI_MDIO_PORT_ID == 0)
+#define RTE_ETH_MDI_MDIO_PORT           GPIOA
+#define RTE_ETH_MDI_MDIO_PIN            2
+#else
+#error "Invalid ETH_MDIO Pin Configuration!"
+#endif
+//   
+
+//    Reference 25MHz/50MHz Clock generation
+#define RTE_ETH_REF_CLOCK               0
+
+//      MCO Pin <0=>PA2 <1=>PC9
+#define RTE_ETH_REF_CLOCK_PORT_ID       0
+#if    (RTE_ETH_REF_CLOCK_PORT_ID == 0)
+#define RTE_ETH_REF_CLOCK_PORT          GPIOA
+#define RTE_ETH_REF_CLOCK_PIN           8
+#elif  (RTE_ETH_REF_CLOCK_PORT_ID == 1)
+#define RTE_ETH_REF_CLOCK_PORT          GPIOC
+#define RTE_ETH_REF_CLOCK_PIN           9
+#else
+#error "Invalid MCO Pin Configuration!"
+#endif
+
+//   
+
+// 
+
+
+//  USB OTG Full-speed
+#define RTE_USB_OTG_FS                  0
+
+//    Device [Driver_USBD0]
+//    Configuration settings for Driver_USBD0 in component ::Drivers:USB Device
+#define RTE_USB_OTG_FS_DEV              1
+
+//      Endpoints
+//      Reduce memory requirements of Driver by disabling unused endpoints
+//        Endpoint 1
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 2
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 3
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//     
+#define RTE_USB_OTG_FS_DEV_EP           0x0000000F
+#define RTE_USB_OTG_FS_DEV_EP_BULK      0x000E000E
+#define RTE_USB_OTG_FS_DEV_EP_INT       0x000E000E
+#define RTE_USB_OTG_FS_DEV_EP_ISO       0x000E000E
+
+//   
+
+//    Host [Driver_USBH0]
+//    Configuration settings for Driver_USBH0 in component ::Drivers:USB Host
+
+#define RTE_USB_OTG_FS_HOST             1
+
+//      VBUS Power On/Off Pin
+//      Configure Pin for driving VBUS
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_FS_VBUS_PIN             1
+#define RTE_OTG_FS_VBUS_ACTIVE          0
+#define RTE_OTG_FS_VBUS_PORT            GPIO_PORT(7)
+#define RTE_OTG_FS_VBUS_BIT             5
+
+//      Overcurrent Detection Pin
+//      Configure Pin for overcurrent detection
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_FS_OC_PIN               1
+#define RTE_OTG_FS_OC_ACTIVE            0
+#define RTE_OTG_FS_OC_PORT              GPIO_PORT(5)
+#define RTE_OTG_FS_OC_BIT               11
+//   
+
+// 
+
+
+//  USB OTG High-speed
+#define RTE_USB_OTG_HS                  0
+
+//    PHY (Physical Layer)
+
+//      PHY Interface
+//       <0=>On-chip full-speed PHY
+//       <1=>External ULPI high-speed PHY
+#define RTE_USB_OTG_HS_PHY              1
+
+//      External ULPI Pins (UTMI+ Low Pin Interface)
+
+//        OTG_HS_ULPI_CK Pin <0=>PA5
+#define RTE_USB_OTG_HS_ULPI_CK_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_CK_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_CK_PORT     GPIOA
+#define RTE_USB_OTG_HS_ULPI_CK_PIN      5
+#else
+#error "Invalid OTG_HS_ULPI_CK Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_DIR Pin <0=>PI11 <1=>PC2
+#define RTE_USB_OTG_HS_ULPI_DIR_PORT_ID 0
+#if    (RTE_USB_OTG_HS_ULPI_DIR_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_DIR_PORT    GPIOI
+#define RTE_USB_OTG_HS_ULPI_DIR_PIN     11
+#elif  (RTE_USB_OTG_HS_ULPI_DIR_PORT_ID == 1)
+#define RTE_USB_OTG_HS_ULPI_DIR_PORT    GPIOC
+#define RTE_USB_OTG_HS_ULPI_DIR_PIN     2
+#else
+#error "Invalid OTG_HS_ULPI_DIR Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_STP Pin <0=>PC0
+#define RTE_USB_OTG_HS_ULPI_STP_PORT_ID 0
+#if    (RTE_USB_OTG_HS_ULPI_STP_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_STP_PORT    GPIOC
+#define RTE_USB_OTG_HS_ULPI_STP_PIN     0
+#else
+#error "Invalid OTG_HS_ULPI_STP Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_NXT Pin <0=>PC2 <1=>PH4
+#define RTE_USB_OTG_HS_ULPI_NXT_PORT_ID 1
+#if    (RTE_USB_OTG_HS_ULPI_NXT_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_NXT_PORT    GPIOC
+#define RTE_USB_OTG_HS_ULPI_NXT_PIN     2
+#elif  (RTE_USB_OTG_HS_ULPI_NXT_PORT_ID == 1)
+#define RTE_USB_OTG_HS_ULPI_NXT_PORT    GPIOH
+#define RTE_USB_OTG_HS_ULPI_NXT_PIN     4
+#else
+#error "Invalid OTG_HS_ULPI_NXT Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D0 Pin <0=>PA3
+#define RTE_USB_OTG_HS_ULPI_D0_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D0_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D0_PORT     GPIOA
+#define RTE_USB_OTG_HS_ULPI_D0_PIN      3
+#else
+#error "Invalid OTG_HS_ULPI_D0 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D1 Pin <0=>PB0
+#define RTE_USB_OTG_HS_ULPI_D1_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D1_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D1_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D1_PIN      0
+#else
+#error "Invalid OTG_HS_ULPI_D1 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D2 Pin <0=>PB1
+#define RTE_USB_OTG_HS_ULPI_D2_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D2_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D2_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D2_PIN      1
+#else
+#error "Invalid OTG_HS_ULPI_D2 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D3 Pin <0=>PB10
+#define RTE_USB_OTG_HS_ULPI_D3_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D3_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D3_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D3_PIN      10
+#else
+#error "Invalid OTG_HS_ULPI_D3 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D4 Pin <0=>PB11
+#define RTE_USB_OTG_HS_ULPI_D4_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D4_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D4_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D4_PIN      11
+#else
+#error "Invalid OTG_HS_ULPI_D4 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D5 Pin <0=>PB12
+#define RTE_USB_OTG_HS_ULPI_D5_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D5_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D5_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D5_PIN      12
+#else
+#error "Invalid OTG_HS_ULPI_D5 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D6 Pin <0=>PB13
+#define RTE_USB_OTG_HS_ULPI_D6_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D6_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D6_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D6_PIN      13
+#else
+#error "Invalid OTG_HS_ULPI_D6 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D7 Pin <0=>PB5
+#define RTE_USB_OTG_HS_ULPI_D7_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D7_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D7_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D7_PIN      5
+#else
+#error "Invalid OTG_HS_ULPI_D7 Pin Configuration!"
+#endif
+
+//     
+
+//   
+
+//    Device [Driver_USBD1]
+//    Configuration settings for Driver_USBD1 in component ::Drivers:USB Device
+#define RTE_USB_OTG_HS_DEV              1
+
+//      Endpoints
+//      Reduce memory requirements of Driver by disabling unused endpoints
+//        Endpoint 1
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 2
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 3
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 4
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 5
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//     
+#define RTE_USB_OTG_HS_DEV_EP           0x0000003F
+#define RTE_USB_OTG_HS_DEV_EP_BULK      0x003E003E
+#define RTE_USB_OTG_HS_DEV_EP_INT       0x003E003E
+#define RTE_USB_OTG_HS_DEV_EP_ISO       0x003E003E
+
+//   
+
+//    Host [Driver_USBH1]
+//    Configuration settings for Driver_USBH1 in component ::Drivers:USB Host
+#define RTE_USB_OTG_HS_HOST             1
+
+//      VBUS Power On/Off Pin
+//      Configure Pin for driving VBUS
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_HS_VBUS_PIN             1
+#define RTE_OTG_HS_VBUS_ACTIVE          0
+#define RTE_OTG_HS_VBUS_PORT            GPIO_PORT(2)
+#define RTE_OTG_HS_VBUS_BIT             2
+
+//      Overcurrent Detection Pin
+//      Configure Pin for overcurrent detection
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_HS_OC_PIN               1
+#define RTE_OTG_HS_OC_ACTIVE            0
+#define RTE_OTG_HS_OC_PORT              GPIO_PORT(5)
+#define RTE_OTG_HS_OC_BIT               12
+//   
+
+// 
+
+
+//  EXTI (External Interrupt/Event Controller)
+#define RTE_EXTI                        0
+
+//    EXTI0 Line
+#define RTE_EXTI0                       0
+//      Pin   <0=>PA0  <1=>PB0  <2=>PC0  <3=>PD0  <4=>PE0  <5=>PF0  <6=>PG0  <7=>PH0  <8=>PI0
+#define RTE_EXTI0_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI0_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI0_TRIGGER               0
+//   
+
+//    EXTI1 Line
+#define RTE_EXTI1                       0
+//      Pin   <0=>PA1  <1=>PB1  <2=>PC1  <3=>PD1  <4=>PE1  <5=>PF1  <6=>PG1  <7=>PH1  <8=>PI1
+#define RTE_EXTI1_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI1_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI1_TRIGGER               0
+//   
+
+//    EXTI2 Line
+#define RTE_EXTI2                       0
+//      Pin   <0=>PA2  <1=>PB2  <2=>PC2  <3=>PD2  <4=>PE2  <5=>PF2  <6=>PG2  <7=>PH2  <8=>PI2
+#define RTE_EXTI2_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI2_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI2_TRIGGER               0
+//   
+
+//    EXTI3 Line
+#define RTE_EXTI3                       0
+//      Pin   <0=>PA3  <1=>PB3  <2=>PC3  <3=>PD3  <4=>PE3  <5=>PF3  <6=>PG3  <7=>PH3  <8=>PI3
+#define RTE_EXTI3_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI3_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI3_TRIGGER               0
+//   
+
+//    EXTI4 Line
+#define RTE_EXTI4                       0
+//      Pin   <0=>PA4  <1=>PB4  <2=>PC4  <3=>PD4  <4=>PE4  <5=>PF4  <6=>PG4  <7=>PH4  <8=>PI4
+#define RTE_EXTI4_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI4_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI4_TRIGGER               0
+//   
+
+//    EXTI5 Line
+#define RTE_EXTI5                       0
+//      Pin   <0=>PA5  <1=>PB5  <2=>PC5  <3=>PD5  <4=>PE5  <5=>PF5  <6=>PG5  <7=>PH5  <8=>PI5
+#define RTE_EXTI5_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI5_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI5_TRIGGER               0
+//   
+
+//    EXTI6 Line
+#define RTE_EXTI6                       0
+//      Pin   <0=>PA6  <1=>PB6  <2=>PC6  <3=>PD6  <4=>PE6  <5=>PF6  <6=>PG6  <7=>PH6  <8=>PI6
+#define RTE_EXTI6_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI6_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI6_TRIGGER               0
+//   
+
+//    EXTI7 Line
+#define RTE_EXTI7                       0
+//      Pin   <0=>PA7  <1=>PB7  <2=>PC7  <3=>PD7  <4=>PE7  <5=>PF7  <6=>PG7  <7=>PH7  <8=>PI7
+#define RTE_EXTI7_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI7_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI7_TRIGGER               0
+//   
+
+//    EXTI8 Line
+#define RTE_EXTI8                       0
+//      Pin   <0=>PA8  <1=>PB8  <2=>PC8  <3=>PD8  <4=>PE8  <5=>PF8  <6=>PG8  <7=>PH8  <8=>PI8
+#define RTE_EXTI8_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI8_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI8_TRIGGER               0
+//   
+
+//    EXTI9 Line
+#define RTE_EXTI9                       0
+//      Pin   <0=>PA9  <1=>PB9  <2=>PC9  <3=>PD9  <4=>PE9  <5=>PF9  <6=>PG9  <7=>PH9  <8=>PI9
+#define RTE_EXTI9_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI9_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI9_TRIGGER               0
+//   
+
+//    EXTI10 Line
+#define RTE_EXTI10                      0
+//      Pin   <0=>PA10 <1=>PB10 <2=>PC10 <3=>PD10 <4=>PE10 <5=>PF10 <6=>PG10 <7=>PH10 <8=>PI10
+#define RTE_EXTI10_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI10_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI10_TRIGGER              0
+//   
+
+//    EXTI11 Line
+#define RTE_EXTI11                      0
+//      Pin   <0=>PA11 <1=>PB11 <2=>PC11 <3=>PD11 <4=>PE11 <5=>PF11 <6=>PG11 <7=>PH11 <8=>PI11
+#define RTE_EXTI11_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI11_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI11_TRIGGER              0
+//   
+
+//    EXTI12 Line
+#define RTE_EXTI12                      0
+//      Pin   <0=>PA12 <1=>PB12 <2=>PC12 <3=>PD12 <4=>PE12 <5=>PF12 <6=>PG12 <7=>PH12
+#define RTE_EXTI12_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI12_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI12_TRIGGER              0
+//   
+
+//    EXTI13 Line
+#define RTE_EXTI13                      0
+//      Pin   <0=>PA13 <1=>PB13 <2=>PC13 <3=>PD13 <4=>PE13 <5=>PF13 <6=>PG13 <7=>PH13
+#define RTE_EXTI13_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI13_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI13_TRIGGER              0
+//   
+
+//    EXTI14 Line
+#define RTE_EXTI14                      0
+//      Pin   <0=>PA14 <1=>PB14 <2=>PC14 <3=>PD14 <4=>PE14 <5=>PF14 <6=>PG14 <7=>PH14
+#define RTE_EXTI14_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI14_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI14_TRIGGER              0
+//   
+
+//    EXTI15 Line
+#define RTE_EXTI15                      0
+//      Pin   <0=>PA15 <1=>PB15 <2=>PC15 <3=>PD15 <4=>PE15 <5=>PF15 <6=>PG15 <7=>PH15
+#define RTE_EXTI15_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI15_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI15_TRIGGER              0
+//   
+
+//    EXTI16 Line: PVD Output
+#define RTE_EXTI16                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI16_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI16_TRIGGER              0
+//   
+
+//    EXTI17 Line: RTC Alarm
+#define RTE_EXTI17                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI17_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI17_TRIGGER              0
+//   
+
+//    EXTI18 Line: USB OTG FS Wakeup
+#define RTE_EXTI18                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI18_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI18_TRIGGER              0
+//   
+
+//    EXTI19 Line: Ethernet Wakeup
+#define RTE_EXTI19                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI19_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI19_TRIGGER              0
+//   
+
+//    EXTI20 Line: USB OTG HS Wakeup
+#define RTE_EXTI20                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI20_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI20_TRIGGER              0
+//   
+
+//    EXTI21 Line: RTC Tamper and TimeStamp
+#define RTE_EXTI21                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI21_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI21_TRIGGER              0
+//   
+
+//    EXTI22 Line: RTC Wakeup
+#define RTE_EXTI22                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI22_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI22_TRIGGER              0
+//   
+
+// 
+
+
+//  FSMC (Flexible Static Memory Controller)
+#define RTE_FSMC                        0
+
+//    Pin Configuration
+//    Configure Pins
+#define RTE_FSMC_PINS                   0
+
+//      Address Bus Pins
+//       <0=>A[17:16]
+//       <1=>A[10:0]   <2=>A[15:0]   <3=>A[16:0]   <4=>A[17:0]
+//       <5=>A[18:0]   <6=>A[19:0]   <7=>A[20:0]   <8=>A[21:0]
+//       <9=>A[22:0]  <10=>A[23:0]  <11=>A[24:0]  <12=>A[25:0]
+#define RTE_FSMC_ABUS_PINS              10
+//      Data Bus Pins  <0=>D[7:0] <1=>D[15:0]
+#define RTE_FSMC_DBUS_PINS              0
+//      FSMC_NOE Pin
+#define RTE_FSMC_NOE_PIN                0
+//      FSMC_NWE Pin
+#define RTE_FSMC_NWE_PIN                0
+//      FSMC_NBL0 Pin
+#define RTE_FSMC_NBL0_PIN               0
+//      FSMC_NBL1 Pin
+#define RTE_FSMC_NBL1_PIN               0
+//      FSMC_NL Pin
+#define RTE_FSMC_NL_PIN                 0
+//      FSMC_NWAIT Pin
+#define RTE_FSMC_NWAIT_PIN              0
+//      FSMC_CLK Pin
+#define RTE_FSMC_CLK_PIN                0
+//      FSMC_NE1/NCE2 Pin
+#define RTE_FSMC_NE1_PIN                0
+//      FSMC_NE2/NCE3 Pin
+#define RTE_FSMC_NE2_PIN                0
+//      FSMC_NE3/NCE4_1 Pin
+#define RTE_FSMC_NE3_PIN                0
+//      FSMC_NE4 Pin
+#define RTE_FSMC_NE4_PIN                0
+//      FSMC_NCE4_2 Pin
+#define RTE_FSMC_NCE42_PIN              0
+//      FSMC_INT2 Pin
+#define RTE_FSMC_INT2_PIN               0
+//      FSMC_INT3 Pin
+#define RTE_FSMC_INT3_PIN               0
+//      FSMC_INTR Pin
+#define RTE_FSMC_INTR_PIN               0
+//      FSMC_NIORD Pin
+#define RTE_FSMC_NIORD_PIN              0
+//      FSMC_NIOWR Pin
+#define RTE_FSMC_NIOWR_PIN              0
+//      FSMC_NREG Pin
+#define RTE_FSMC_NREG_PIN               0
+//      FSMC_CD Pin
+#define RTE_FSMC_CD_PIN                 0
+
+//   
+
+//    NOR Flash / PSRAM Controller
+
+//      FSMC_NE1 Chip Select
+//      Configure Device on Chip Select FSMC_NE1
+#define RTE_FSMC_NE1                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR1_CBURSTRW          0
+#define RTE_FSMC_BCR1_ASYNCWAIT         0
+#define RTE_FSMC_BCR1_EXTMOD            0
+#define RTE_FSMC_BCR1_WAITEN            1
+#define RTE_FSMC_BCR1_WREN              1
+#define RTE_FSMC_BCR1_WAITCFG           0
+#define RTE_FSMC_BCR1_WRAPMOD           0
+#define RTE_FSMC_BCR1_WAITPOL           0
+#define RTE_FSMC_BCR1_BURSTEN           0
+#define RTE_FSMC_BCR1_FACCEN            1
+#define RTE_FSMC_BCR1_MWID              1
+#define RTE_FSMC_BCR1_MTYP              2
+#define RTE_FSMC_BCR1_MUXEN             1
+#define RTE_FSMC_BCR1_MBKEN             1
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR1_ACCMOD            0
+#define RTE_FSMC_BTR1_DATLAT            15
+#define RTE_FSMC_BTR1_CLKDIV            15
+#define RTE_FSMC_BTR1_BUSTURN           15
+#define RTE_FSMC_BTR1_DATAST            255
+#define RTE_FSMC_BTR1_ADDHLD            15
+#define RTE_FSMC_BTR1_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR1_ACCMOD        0
+#define RTE_FSMC_BWTR1_DATLAT        15
+#define RTE_FSMC_BWTR1_CLKDIV        15
+#define RTE_FSMC_BWTR1_BUSTURN       15
+#define RTE_FSMC_BWTR1_DATAST        255
+#define RTE_FSMC_BWTR1_ADDHLD        15
+#define RTE_FSMC_BWTR1_ADDSET        15
+//       
+//     
+
+//      FSMC_NE2 Chip Select
+//      Configure Device on Chip Select FSMC_NE2
+#define RTE_FSMC_NE2                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR2_CBURSTRW          0
+#define RTE_FSMC_BCR2_ASYNCWAIT         0
+#define RTE_FSMC_BCR2_EXTMOD            0
+#define RTE_FSMC_BCR2_WAITEN            1
+#define RTE_FSMC_BCR2_WREN              1
+#define RTE_FSMC_BCR2_WAITCFG           0
+#define RTE_FSMC_BCR2_WRAPMOD           0
+#define RTE_FSMC_BCR2_WAITPOL           0
+#define RTE_FSMC_BCR2_BURSTEN           0
+#define RTE_FSMC_BCR2_FACCEN            1
+#define RTE_FSMC_BCR2_MWID              1
+#define RTE_FSMC_BCR2_MTYP              0
+#define RTE_FSMC_BCR2_MUXEN             1
+#define RTE_FSMC_BCR2_MBKEN             0
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR2_ACCMOD            0
+#define RTE_FSMC_BTR2_DATLAT            15
+#define RTE_FSMC_BTR2_CLKDIV            15
+#define RTE_FSMC_BTR2_BUSTURN           15
+#define RTE_FSMC_BTR2_DATAST            255
+#define RTE_FSMC_BTR2_ADDHLD            15
+#define RTE_FSMC_BTR2_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR2_ACCMOD        0
+#define RTE_FSMC_BWTR2_DATLAT        15
+#define RTE_FSMC_BWTR2_CLKDIV        15
+#define RTE_FSMC_BWTR2_BUSTURN       15
+#define RTE_FSMC_BWTR2_DATAST        255
+#define RTE_FSMC_BWTR2_ADDHLD        15
+#define RTE_FSMC_BWTR2_ADDSET        15
+//       
+//     
+
+//      FSMC_NE3 Chip Select
+//      Configure Device on Chip Select FSMC_NE3
+#define RTE_FSMC_NE3                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR3_CBURSTRW          0
+#define RTE_FSMC_BCR3_ASYNCWAIT         0
+#define RTE_FSMC_BCR3_EXTMOD            0
+#define RTE_FSMC_BCR3_WAITEN            1
+#define RTE_FSMC_BCR3_WREN              1
+#define RTE_FSMC_BCR3_WAITCFG           0
+#define RTE_FSMC_BCR3_WRAPMOD           0
+#define RTE_FSMC_BCR3_WAITPOL           0
+#define RTE_FSMC_BCR3_BURSTEN           0
+#define RTE_FSMC_BCR3_FACCEN            1
+#define RTE_FSMC_BCR3_MWID              1
+#define RTE_FSMC_BCR3_MTYP              0
+#define RTE_FSMC_BCR3_MUXEN             1
+#define RTE_FSMC_BCR3_MBKEN             0
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR3_ACCMOD            0
+#define RTE_FSMC_BTR3_DATLAT            15
+#define RTE_FSMC_BTR3_CLKDIV            15
+#define RTE_FSMC_BTR3_BUSTURN           15
+#define RTE_FSMC_BTR3_DATAST            255
+#define RTE_FSMC_BTR3_ADDHLD            15
+#define RTE_FSMC_BTR3_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR3_ACCMOD        0
+#define RTE_FSMC_BWTR3_DATLAT        15
+#define RTE_FSMC_BWTR3_CLKDIV        15
+#define RTE_FSMC_BWTR3_BUSTURN       15
+#define RTE_FSMC_BWTR3_DATAST        255
+#define RTE_FSMC_BWTR3_ADDHLD        15
+#define RTE_FSMC_BWTR3_ADDSET        15
+//       
+//     
+
+//      FSMC_NE4 Chip Select
+//      Configure Device on Chip Select FSMC_NE4
+#define RTE_FSMC_NE4                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR4_CBURSTRW          0
+#define RTE_FSMC_BCR4_ASYNCWAIT         0
+#define RTE_FSMC_BCR4_EXTMOD            0
+#define RTE_FSMC_BCR4_WAITEN            1
+#define RTE_FSMC_BCR4_WREN              1
+#define RTE_FSMC_BCR4_WAITCFG           0
+#define RTE_FSMC_BCR4_WRAPMOD           0
+#define RTE_FSMC_BCR4_WAITPOL           0
+#define RTE_FSMC_BCR4_BURSTEN           0
+#define RTE_FSMC_BCR4_FACCEN            1
+#define RTE_FSMC_BCR4_MWID              1
+#define RTE_FSMC_BCR4_MTYP              0
+#define RTE_FSMC_BCR4_MUXEN             1
+#define RTE_FSMC_BCR4_MBKEN             0
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR4_ACCMOD            0
+#define RTE_FSMC_BTR4_DATLAT            15
+#define RTE_FSMC_BTR4_CLKDIV            15
+#define RTE_FSMC_BTR4_BUSTURN           15
+#define RTE_FSMC_BTR4_DATAST            255
+#define RTE_FSMC_BTR4_ADDHLD            15
+#define RTE_FSMC_BTR4_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR4_ACCMOD        0
+#define RTE_FSMC_BWTR4_DATLAT        15
+#define RTE_FSMC_BWTR4_CLKDIV        15
+#define RTE_FSMC_BWTR4_BUSTURN       15
+#define RTE_FSMC_BWTR4_DATAST        255
+#define RTE_FSMC_BWTR4_ADDHLD        15
+#define RTE_FSMC_BWTR4_ADDSET        15
+//       
+//     
+
+//   
+
+//    NAND Flash Controller
+
+//      FSMC_NCE2 Chip Select
+//      Configure NAND Device on Chip Select FSMC_NCE2
+#define RTE_FSMC_NCE2                   0
+
+//        NAND Flash Control
+//          ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes
+//          Defines the page size for the extended ECC.
+//          TAR: ALE to RE delay <0-15>
+//          Sets time from ALE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          TCLR: CLE to RE delay <0-15>
+//          Sets time from CLE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          ECCEN: ECC computation logic enable 
+//         PWID: Databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width.
+//          PTYP: Memory type <1=>NAND Flash
+//          Defines the type of device attached to the corresponding memory bank.
+//          PBKEN: NAND Flash memory bank enable
+//          Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus.
+//          PWAITEN: Wait feature enable
+//          Enables the Wait feature for the PC Card/NAND Flash memory bank.
+#define RTE_FSMC_PCR2_ECCPS             0
+#define RTE_FSMC_PCR2_TAR               0
+#define RTE_FSMC_PCR2_TCLR              0
+#define RTE_FSMC_PCR2_ECCEN             0
+#define RTE_FSMC_PCR2_PWID              0
+#define RTE_FSMC_PCR2_PTYP              1
+#define RTE_FSMC_PCR2_PBKEN             0
+#define RTE_FSMC_PCR2_PWAITEN           0
+
+//       
+
+//        Interrupt configuration
+//         IFEN: Falling edge detection enable
+//         ILEN: High-level detection enable
+//         IREN: Rising edge detection enable
+#define RTE_FSMC_SR2_IFEN               0
+#define RTE_FSMC_SR2_ILEN               0
+#define RTE_FSMC_SR2_IREN               0
+
+//       
+
+//       Common memory space timing
+//          MEMHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access to. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset)
+//          MEMSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 2 HCLK cycles (for NAND Flash)
+//           1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset)
+#define RTE_FSMC_PMEM2_MEMHIZ           255
+#define RTE_FSMC_PMEM2_MEMHOLD          255
+#define RTE_FSMC_PMEM2_MEMWAIT          255
+#define RTE_FSMC_PMEM2_MEMSET           255
+
+//       
+
+//       Attribute memory space timing
+//          ATTHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT)
+//          ATTSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PATT2_ATTHIZ           255
+#define RTE_FSMC_PATT2_ATTHOLD          255
+#define RTE_FSMC_PATT2_ATTWAIT          255
+#define RTE_FSMC_PATT2_ATTSET           255
+
+//       
+
+//     
+
+//      FSMC_NCE3 Chip Select
+//      Configure NAND Device on Chip Select FSMC_NCE3
+#define RTE_FSMC_NCE3                   0
+
+//        NAND Flash Control
+//          ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes
+//          Defines the page size for the extended ECC.
+//          TAR: ALE to RE delay <0-15>
+//          Sets time from ALE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          TCLR: CLE to RE delay <0-15>
+//          Sets time from CLE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          ECCEN: ECC computation logic enable 
+//         PWID: Databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width.
+//          PTYP: Memory type <1=>NAND Flash
+//          Defines the type of device attached to the corresponding memory bank.
+//          PBKEN: NAND Flash memory bank enable
+//          Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus.
+//          PWAITEN: Wait feature enable
+//          Enables the Wait feature for the PC Card/NAND Flash memory bank.
+#define RTE_FSMC_PCR3_ECCPS             0
+#define RTE_FSMC_PCR3_TAR               0
+#define RTE_FSMC_PCR3_TCLR              0
+#define RTE_FSMC_PCR3_ECCEN             0
+#define RTE_FSMC_PCR3_PWID              0
+#define RTE_FSMC_PCR3_PTYP              1
+#define RTE_FSMC_PCR3_PBKEN             0
+#define RTE_FSMC_PCR3_PWAITEN           0
+
+//       
+
+//        Interrupt configuration
+//         IFEN: Falling edge detection enable
+//         ILEN: High-level detection enable
+//         IREN: Rising edge detection enable
+#define RTE_FSMC_SR3_IFEN               0
+#define RTE_FSMC_SR3_ILEN               0
+#define RTE_FSMC_SR3_IREN               0
+
+//       
+
+//       Common memory space timing
+//          MEMHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access to. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset)
+//          MEMSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 2 HCLK cycles (for NAND Flash)
+//           1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset)
+#define RTE_FSMC_PMEM3_MEMHIZ           255
+#define RTE_FSMC_PMEM3_MEMHOLD          255
+#define RTE_FSMC_PMEM3_MEMWAIT          255
+#define RTE_FSMC_PMEM3_MEMSET           255
+
+//       
+
+//       Attribute memory space timing
+//          ATTHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT)
+//          ATTSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PATT3_ATTHIZ           255
+#define RTE_FSMC_PATT3_ATTHOLD          255
+#define RTE_FSMC_PATT3_ATTWAIT          255
+#define RTE_FSMC_PATT3_ATTSET           255
+
+//       
+
+//     
+
+//   
+
+//    PC Card Controller
+
+//      FSMC_NCE4_x Chip Select
+//      Configure PC Card/CompactFlash Device on Chip Select FSMC_NCE4_1/FSMC_NCE4_2
+#define RTE_FSMC_NCE4              0
+
+//        PC Card Control
+//          ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes
+//          Defines the page size for the extended ECC.
+//          TAR: ALE to RE delay <0-15>
+//          Sets time from ALE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          TCLR: CLE to RE delay <0-15>
+//          Sets time from CLE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          ECCEN: ECC computation logic enable
+//         PWID: Databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width.
+//          PTYP: Memory type <0=>PC Card, CompactFlash, CF+ or PCMCIOA
+//          Defines the type of device attached to the corresponding memory bank.
+//          PBKEN: PC Card memory bank enable
+//          Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus.
+//          PWAITEN: Wait feature enable
+//          Enables the Wait feature for the PC Card/NAND Flash memory bank.
+#define RTE_FSMC_PCR4_ECCPS             0
+#define RTE_FSMC_PCR4_TAR               0
+#define RTE_FSMC_PCR4_TCLR              0
+#define RTE_FSMC_PCR4_ECCEN             0
+#define RTE_FSMC_PCR4_PWID              0
+#define RTE_FSMC_PCR4_PTYP              0
+#define RTE_FSMC_PCR4_PBKEN             0
+#define RTE_FSMC_PCR4_PWAITEN           0
+
+//       
+
+//        Interrupt configuration
+//         IFEN: Falling edge detection enable
+//         ILEN: High-level detection enable
+//         IREN: Rising edge detection enable
+#define RTE_FSMC_SR4_IFEN               0
+#define RTE_FSMC_SR4_ILEN               0
+#define RTE_FSMC_SR4_IREN               0
+
+//       
+
+//        Common memory space timing
+//          MEMHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access to. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset)
+//          MEMSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 2 HCLK cycles (for NAND Flash)
+//           1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset)
+#define RTE_FSMC_PMEM4_MEMHIZ           255
+#define RTE_FSMC_PMEM4_MEMHOLD          255
+#define RTE_FSMC_PMEM4_MEMWAIT          255
+#define RTE_FSMC_PMEM4_MEMSET           255
+
+//       
+
+//        Attribute memory space timing
+//          ATTHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT)
+//          ATTSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PATT4_ATTHIZ           255
+#define RTE_FSMC_PATT4_ATTHOLD          255
+#define RTE_FSMC_PATT4_ATTWAIT          255
+#define RTE_FSMC_PATT4_ATTSET           255
+
+//       
+
+//        I/O space timing
+//          IOHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a PC Card write access. Only valid for write transaction.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          IOHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for PC Card read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          IOWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (SMNWE,
+//           SMNOE), for PC Card read or write access. The duration for command assertion is
+//           extended if the wait signal (NWAIT) is active (low) at the end of the
+//           programmed value of HCLK.
+//           0000 0000: reserved, do not use this value
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles
+//          IOSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for PC Card read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PIO4_IOHIZ             255
+#define RTE_FSMC_PIO4_IOHOLD            255
+#define RTE_FSMC_PIO4_IOWAIT            255
+#define RTE_FSMC_PIO4_IOSET             255
+
+//       
+
+//     
+
+//   
+
+// 
+
+
+#endif  /* __RTE_DEVICE_H */
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/Device/STM32F207IG/startup_stm32f2xx.s b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Device/STM32F207IG/startup_stm32f2xx.s
new file mode 100644
index 000000000..c4e2ab9fa
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Device/STM32F207IG/startup_stm32f2xx.s
@@ -0,0 +1,419 @@
+;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
+;* File Name          : startup_stm32f2xx.s
+;* Author             : MCD Application Team
+;* Version            : V1.0.0
+;* Date               : 18-April-2011
+;* Description        : STM32F2xx devices vector table for MDK-ARM toolchain. 
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the CortexM3 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>   
+;*******************************************************************************
+; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+;*******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+;  Stack Configuration
+;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; 
+
+Stack_Size      EQU     0x00002000
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+;  Heap Configuration
+;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; 
+
+Heap_Size       EQU     0x00007000
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog                                        
+                DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection                        
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line            
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line                       
+                DCD     FLASH_IRQHandler                  ; FLASH                                           
+                DCD     RCC_IRQHandler                    ; RCC                                             
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0                                             
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1                                             
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2                                             
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3                                             
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4                                             
+                DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0                                   
+                DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1                                   
+                DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2                                   
+                DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3                                   
+                DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4                                   
+                DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5                                   
+                DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6                                   
+                DCD     ADC_IRQHandler                    ; ADC1, ADC2 and ADC3s                            
+                DCD     CAN1_TX_IRQHandler                ; CAN1 TX                                                
+                DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0                                               
+                DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1                                               
+                DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE                                               
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s                                    
+                DCD     TIM1_BRK_TIM9_IRQHandler          ; TIM1 Break and TIM9                   
+                DCD     TIM1_UP_TIM10_IRQHandler          ; TIM1 Update and TIM10                 
+                DCD     TIM1_TRG_COM_TIM11_IRQHandler     ; TIM1 Trigger and Commutation and TIM11
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare                                   
+                DCD     TIM2_IRQHandler                   ; TIM2                                            
+                DCD     TIM3_IRQHandler                   ; TIM3                                            
+                DCD     TIM4_IRQHandler                   ; TIM4                                            
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event                                             
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error                                             
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event                                             
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error                                               
+                DCD     SPI1_IRQHandler                   ; SPI1                                            
+                DCD     SPI2_IRQHandler                   ; SPI2                                            
+                DCD     USART1_IRQHandler                 ; USART1                                          
+                DCD     USART2_IRQHandler                 ; USART2                                          
+                DCD     USART3_IRQHandler                 ; USART3                                          
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s                                  
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line                  
+                DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI line                        
+                DCD     TIM8_BRK_TIM12_IRQHandler         ; TIM8 Break and TIM12                  
+                DCD     TIM8_UP_TIM13_IRQHandler          ; TIM8 Update and TIM13                 
+                DCD     TIM8_TRG_COM_TIM14_IRQHandler     ; TIM8 Trigger and Commutation and TIM14
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare                                   
+                DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7                                           
+                DCD     FSMC_IRQHandler                   ; FSMC                                            
+                DCD     SDIO_IRQHandler                   ; SDIO                                            
+                DCD     TIM5_IRQHandler                   ; TIM5                                            
+                DCD     SPI3_IRQHandler                   ; SPI3                                            
+                DCD     UART4_IRQHandler                  ; UART4                                           
+                DCD     UART5_IRQHandler                  ; UART5                                           
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors                   
+                DCD     TIM7_IRQHandler                   ; TIM7                   
+                DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0                                   
+                DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1                                   
+                DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2                                   
+                DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3                                   
+                DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4                                   
+                DCD     ETH_IRQHandler                    ; Ethernet                                        
+                DCD     ETH_WKUP_IRQHandler               ; Ethernet Wakeup through EXTI line                      
+                DCD     CAN2_TX_IRQHandler                ; CAN2 TX                                                
+                DCD     CAN2_RX0_IRQHandler               ; CAN2 RX0                                               
+                DCD     CAN2_RX1_IRQHandler               ; CAN2 RX1                                               
+                DCD     CAN2_SCE_IRQHandler               ; CAN2 SCE                                               
+                DCD     OTG_FS_IRQHandler                 ; USB OTG FS                                      
+                DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5                                   
+                DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6                                   
+                DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7                                   
+                DCD     USART6_IRQHandler                 ; USART6                                           
+                DCD     I2C3_EV_IRQHandler                ; I2C3 event                                             
+                DCD     I2C3_ER_IRQHandler                ; I2C3 error                                             
+                DCD     OTG_HS_EP1_OUT_IRQHandler         ; USB OTG HS End Point 1 Out                      
+                DCD     OTG_HS_EP1_IN_IRQHandler          ; USB OTG HS End Point 1 In                       
+                DCD     OTG_HS_WKUP_IRQHandler            ; USB OTG HS Wakeup through EXTI                         
+                DCD     OTG_HS_IRQHandler                 ; USB OTG HS                                      
+                DCD     DCMI_IRQHandler                   ; DCMI                                            
+                DCD     CRYP_IRQHandler                   ; CRYP crypto                                     
+                DCD     HASH_RNG_IRQHandler               ; Hash and Rng 
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WWDG_IRQHandler                   [WEAK]                                        
+                EXPORT  PVD_IRQHandler                    [WEAK]                      
+                EXPORT  TAMP_STAMP_IRQHandler             [WEAK]         
+                EXPORT  RTC_WKUP_IRQHandler               [WEAK]                     
+                EXPORT  FLASH_IRQHandler                  [WEAK]                                         
+                EXPORT  RCC_IRQHandler                    [WEAK]                                            
+                EXPORT  EXTI0_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI1_IRQHandler                  [WEAK]                                             
+                EXPORT  EXTI2_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI3_IRQHandler                  [WEAK]                                           
+                EXPORT  EXTI4_IRQHandler                  [WEAK]                                            
+                EXPORT  DMA1_Stream0_IRQHandler           [WEAK]                                
+                EXPORT  DMA1_Stream1_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream2_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream3_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream4_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream5_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream6_IRQHandler           [WEAK]                                   
+                EXPORT  ADC_IRQHandler                    [WEAK]                         
+                EXPORT  CAN1_TX_IRQHandler                [WEAK]                                                
+                EXPORT  CAN1_RX0_IRQHandler               [WEAK]                                               
+                EXPORT  CAN1_RX1_IRQHandler               [WEAK]                                                
+                EXPORT  CAN1_SCE_IRQHandler               [WEAK]                                                
+                EXPORT  EXTI9_5_IRQHandler                [WEAK]                                    
+                EXPORT  TIM1_BRK_TIM9_IRQHandler          [WEAK]                  
+                EXPORT  TIM1_UP_TIM10_IRQHandler          [WEAK]                
+                EXPORT  TIM1_TRG_COM_TIM11_IRQHandler     [WEAK] 
+                EXPORT  TIM1_CC_IRQHandler                [WEAK]                                   
+                EXPORT  TIM2_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM3_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM4_IRQHandler                   [WEAK]                                            
+                EXPORT  I2C1_EV_IRQHandler                [WEAK]                                             
+                EXPORT  I2C1_ER_IRQHandler                [WEAK]                                             
+                EXPORT  I2C2_EV_IRQHandler                [WEAK]                                            
+                EXPORT  I2C2_ER_IRQHandler                [WEAK]                                               
+                EXPORT  SPI1_IRQHandler                   [WEAK]                                           
+                EXPORT  SPI2_IRQHandler                   [WEAK]                                            
+                EXPORT  USART1_IRQHandler                 [WEAK]                                          
+                EXPORT  USART2_IRQHandler                 [WEAK]                                          
+                EXPORT  USART3_IRQHandler                 [WEAK]                                         
+                EXPORT  EXTI15_10_IRQHandler              [WEAK]                                  
+                EXPORT  RTC_Alarm_IRQHandler              [WEAK]                  
+                EXPORT  OTG_FS_WKUP_IRQHandler            [WEAK]                        
+                EXPORT  TIM8_BRK_TIM12_IRQHandler         [WEAK]                 
+                EXPORT  TIM8_UP_TIM13_IRQHandler          [WEAK]                 
+                EXPORT  TIM8_TRG_COM_TIM14_IRQHandler     [WEAK] 
+                EXPORT  TIM8_CC_IRQHandler                [WEAK]                                   
+                EXPORT  DMA1_Stream7_IRQHandler           [WEAK]                                          
+                EXPORT  FSMC_IRQHandler                   [WEAK]                                             
+                EXPORT  SDIO_IRQHandler                   [WEAK]                                             
+                EXPORT  TIM5_IRQHandler                   [WEAK]                                             
+                EXPORT  SPI3_IRQHandler                   [WEAK]                                             
+                EXPORT  UART4_IRQHandler                  [WEAK]                                            
+                EXPORT  UART5_IRQHandler                  [WEAK]                                            
+                EXPORT  TIM6_DAC_IRQHandler               [WEAK]                   
+                EXPORT  TIM7_IRQHandler                   [WEAK]                    
+                EXPORT  DMA2_Stream0_IRQHandler           [WEAK]                                  
+                EXPORT  DMA2_Stream1_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream2_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream3_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream4_IRQHandler           [WEAK]                                 
+                EXPORT  ETH_IRQHandler                    [WEAK]                                         
+                EXPORT  ETH_WKUP_IRQHandler               [WEAK]                     
+                EXPORT  CAN2_TX_IRQHandler                [WEAK]                                               
+                EXPORT  CAN2_RX0_IRQHandler               [WEAK]                                               
+                EXPORT  CAN2_RX1_IRQHandler               [WEAK]                                               
+                EXPORT  CAN2_SCE_IRQHandler               [WEAK]                                               
+                EXPORT  OTG_FS_IRQHandler                 [WEAK]                                       
+                EXPORT  DMA2_Stream5_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream6_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream7_IRQHandler           [WEAK]                                   
+                EXPORT  USART6_IRQHandler                 [WEAK]                                           
+                EXPORT  I2C3_EV_IRQHandler                [WEAK]                                              
+                EXPORT  I2C3_ER_IRQHandler                [WEAK]                                              
+                EXPORT  OTG_HS_EP1_OUT_IRQHandler         [WEAK]                      
+                EXPORT  OTG_HS_EP1_IN_IRQHandler          [WEAK]                      
+                EXPORT  OTG_HS_WKUP_IRQHandler            [WEAK]                        
+                EXPORT  OTG_HS_IRQHandler                 [WEAK]                                      
+                EXPORT  DCMI_IRQHandler                   [WEAK]                                             
+                EXPORT  CRYP_IRQHandler                   [WEAK]                                     
+                EXPORT  HASH_RNG_IRQHandler               [WEAK]
+
+WWDG_IRQHandler                                                       
+PVD_IRQHandler                                      
+TAMP_STAMP_IRQHandler                  
+RTC_WKUP_IRQHandler                                
+FLASH_IRQHandler                                                       
+RCC_IRQHandler                                                            
+EXTI0_IRQHandler                                                          
+EXTI1_IRQHandler                                                           
+EXTI2_IRQHandler                                                          
+EXTI3_IRQHandler                                                         
+EXTI4_IRQHandler                                                          
+DMA1_Stream0_IRQHandler                                       
+DMA1_Stream1_IRQHandler                                          
+DMA1_Stream2_IRQHandler                                          
+DMA1_Stream3_IRQHandler                                          
+DMA1_Stream4_IRQHandler                                          
+DMA1_Stream5_IRQHandler                                          
+DMA1_Stream6_IRQHandler                                          
+ADC_IRQHandler                                         
+CAN1_TX_IRQHandler                                                            
+CAN1_RX0_IRQHandler                                                          
+CAN1_RX1_IRQHandler                                                           
+CAN1_SCE_IRQHandler                                                           
+EXTI9_5_IRQHandler                                                
+TIM1_BRK_TIM9_IRQHandler                        
+TIM1_UP_TIM10_IRQHandler                      
+TIM1_TRG_COM_TIM11_IRQHandler  
+TIM1_CC_IRQHandler                                               
+TIM2_IRQHandler                                                           
+TIM3_IRQHandler                                                           
+TIM4_IRQHandler                                                           
+I2C1_EV_IRQHandler                                                         
+I2C1_ER_IRQHandler                                                         
+I2C2_EV_IRQHandler                                                        
+I2C2_ER_IRQHandler                                                           
+SPI1_IRQHandler                                                          
+SPI2_IRQHandler                                                           
+USART1_IRQHandler                                                       
+USART2_IRQHandler                                                       
+USART3_IRQHandler                                                      
+EXTI15_10_IRQHandler                                            
+RTC_Alarm_IRQHandler                            
+OTG_FS_WKUP_IRQHandler                                
+TIM8_BRK_TIM12_IRQHandler                      
+TIM8_UP_TIM13_IRQHandler                       
+TIM8_TRG_COM_TIM14_IRQHandler  
+TIM8_CC_IRQHandler                                               
+DMA1_Stream7_IRQHandler                                                 
+FSMC_IRQHandler                                                            
+SDIO_IRQHandler                                                            
+TIM5_IRQHandler                                                            
+SPI3_IRQHandler                                                            
+UART4_IRQHandler                                                          
+UART5_IRQHandler                                                          
+TIM6_DAC_IRQHandler                            
+TIM7_IRQHandler                              
+DMA2_Stream0_IRQHandler                                         
+DMA2_Stream1_IRQHandler                                          
+DMA2_Stream2_IRQHandler                                           
+DMA2_Stream3_IRQHandler                                           
+DMA2_Stream4_IRQHandler                                        
+ETH_IRQHandler                                                         
+ETH_WKUP_IRQHandler                                
+CAN2_TX_IRQHandler                                                           
+CAN2_RX0_IRQHandler                                                          
+CAN2_RX1_IRQHandler                                                          
+CAN2_SCE_IRQHandler                                                          
+OTG_FS_IRQHandler                                                    
+DMA2_Stream5_IRQHandler                                          
+DMA2_Stream6_IRQHandler                                          
+DMA2_Stream7_IRQHandler                                          
+USART6_IRQHandler                                                        
+I2C3_EV_IRQHandler                                                          
+I2C3_ER_IRQHandler                                                          
+OTG_HS_EP1_OUT_IRQHandler                           
+OTG_HS_EP1_IN_IRQHandler                            
+OTG_HS_WKUP_IRQHandler                                
+OTG_HS_IRQHandler                                                   
+DCMI_IRQHandler                                                            
+CRYP_IRQHandler                                                    
+HASH_RNG_IRQHandler                                               
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+                
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+                
+                 ELSE
+                
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+                 
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/Device/STM32F207IG/system_stm32f2xx.c b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Device/STM32F207IG/system_stm32f2xx.c
new file mode 100644
index 000000000..da0e189c8
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Device/STM32F207IG/system_stm32f2xx.c
@@ -0,0 +1,536 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32f2xx.c
+  * @author  MCD Application Team
+  * @version V1.0.0
+  * @date    18-April-2011
+  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
+  *          This file contains the system clock configuration for STM32F2xx devices,
+  *          and is generated by the clock configuration tool
+  *          "STM32f2xx_Clock_Configuration_V1.0.0.xls"
+  *             
+  * 1.  This file provides two functions and one global variable to be called from 
+  *     user application:
+  *      - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
+  *                      and Divider factors, AHB/APBx prescalers and Flash settings),
+  *                      depending on the configuration made in the clock xls tool. 
+  *                      This function is called at startup just after reset and 
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32f2xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick 
+  *                                  timer or configure other parameters.
+  *                                     
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  * 2. After each device reset the HSI (16 MHz) is used as system clock source.
+  *    Then SystemInit() function is called, in "startup_stm32f2xx.s" file, to
+  *    configure the system clock before to branch to main program.
+  *
+  * 3. If the system clock source selected by user fails to startup, the SystemInit()
+  *    function will do nothing and HSI still used as system clock source. User can 
+  *    add some code to deal with this issue inside the SetSysClock() function.
+  *
+  * 4. The default value of HSE crystal is set to 25MHz, refer to "HSE_VALUE" define
+  *    in "stm32f2xx.h" file. When HSE is used as system clock source, directly or
+  *    through PLL, and you are using different crystal you have to adapt the HSE
+  *    value to your own configuration.
+  *
+  * 5. This file configures the system clock as follows:
+  *=============================================================================
+  *=============================================================================
+  *        Supported STM32F2xx device revision    | Rev B and Y
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | PLL (HSE)
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 120000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 120000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 4
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 2
+  *-----------------------------------------------------------------------------
+  *        HSE Frequency(Hz)                      | 25000000
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 25
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 240
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 5
+  *-----------------------------------------------------------------------------
+  *        PLLI2S_N                               | NA
+  *-----------------------------------------------------------------------------
+  *        PLLI2S_R                               | NA
+  *-----------------------------------------------------------------------------
+  *        I2S input clock                        | NA
+  *-----------------------------------------------------------------------------
+  *        VDD(V)                                 | 3.3
+  *-----------------------------------------------------------------------------
+  *        Flash Latency(WS)                      | 3
+  *-----------------------------------------------------------------------------
+  *        Prefetch Buffer                        | ON
+  *-----------------------------------------------------------------------------
+  *        Instruction cache                      | ON
+  *-----------------------------------------------------------------------------
+  *        Data cache                             | ON
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for USB OTG FS,          | Enabled
+  *        SDIO and RNG clock                     |
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ****************************************************************************** 
+  * @attention
+  *
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * 
© COPYRIGHT 2011 STMicroelectronics

+  ******************************************************************************  
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f2xx_system
+  * @{
+  */  
+  
+/** @addtogroup STM32F2xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32f2xx.h"
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Defines
+  * @{
+  */
+
+/*!< Uncomment the following line if you need to use external SRAM mounted
+     on STM322xG_EVAL board as data memory  */
+/* #define DATA_IN_ExtSRAM */
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field. 
+                                   This value must be a multiple of 0x200. */
+
+
+/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
+#define PLL_M      25
+#define PLL_N      240
+
+/* SYSCLK = PLL_VCO / PLL_P */
+#define PLL_P      2
+
+/* USB OTG FS, SDIO and RNG Clock =  PLL_VCO / PLLQ */
+#define PLL_Q      5
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Variables
+  * @{
+  */
+
+  uint32_t SystemCoreClock = 120000000;
+
+  __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+static void SetSysClock(void);
+#ifdef DATA_IN_ExtSRAM
+  static void SystemInit_ExtMemCtl(void); 
+#endif /* DATA_IN_ExtSRAM */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system
+  *         Initialize the Embedded Flash Interface, the PLL and update the 
+  *         SystemFrequency variable.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+  /* Reset the RCC clock configuration to the default reset state ------------*/
+  /* Set HSION bit */
+  RCC->CR |= (uint32_t)0x00000001;
+
+  /* Reset CFGR register */
+  RCC->CFGR = 0x00000000;
+
+  /* Reset HSEON, CSSON and PLLON bits */
+  RCC->CR &= (uint32_t)0xFEF6FFFF;
+
+  /* Reset PLLCFGR register */
+  RCC->PLLCFGR = 0x24003010;
+
+  /* Reset HSEBYP bit */
+  RCC->CR &= (uint32_t)0xFFFBFFFF;
+
+  /* Disable all interrupts */
+  RCC->CIR = 0x00000000;
+
+#ifdef DATA_IN_ExtSRAM
+  SystemInit_ExtMemCtl(); 
+#endif /* DATA_IN_ExtSRAM */
+         
+  /* Configure the System clock source, PLL Multiplier and Divider factors, 
+     AHB/APBx prescalers and Flash settings ----------------------------------*/
+  SetSysClock();
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *           
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.         
+  *     
+  * @note   - The system frequency computed by this function is not the real 
+  *           frequency in the chip. It is calculated based on the predefined 
+  *           constant and the selected clock source:
+  *             
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *                                              
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+  *                          
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *         
+  *         (*) HSI_VALUE is a constant defined in stm32f2xx.h file (default value
+  *             16 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.   
+  *    
+  *         (**) HSE_VALUE is a constant defined in stm32f2xx.h file (default value
+  *              25 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *                
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *     
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+  
+  /* Get SYSCLK source -------------------------------------------------------*/
+  tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+  switch (tmp)
+  {
+    case 0x00:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+    case 0x04:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+    case 0x08:  /* PLL used as system clock source */
+
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+         SYSCLK = PLL_VCO / PLL_P
+         */    
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+      
+      if (pllsource != 0)
+      {
+        /* HSE used as PLL clock source */
+        pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+      else
+      {
+        /* HSI used as PLL clock source */
+        pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);      
+      }
+
+      pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+      SystemCoreClock = pllvco/pllp;
+      break;
+    default:
+      SystemCoreClock = HSI_VALUE;
+      break;
+  }
+  /* Compute HCLK frequency --------------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK frequency */
+  SystemCoreClock >>= tmp;
+}
+
+/**
+  * @brief  Configures the System clock source, PLL Multiplier and Divider factors, 
+  *         AHB/APBx prescalers and Flash settings
+  * @Note   This function should be called only once the RCC clock configuration  
+  *         is reset to the default reset state (done in SystemInit() function).   
+  * @param  None
+  * @retval None
+  */
+static void SetSysClock(void)
+{
+/******************************************************************************/
+/*            PLL (clocked by HSE) used as System clock source                */
+/******************************************************************************/
+  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
+  
+  /* Enable HSE */
+  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
+ 
+  /* Wait till HSE is ready and if Time out is reached exit */
+  do
+  {
+    HSEStatus = RCC->CR & RCC_CR_HSERDY;
+    StartUpCounter++;
+  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
+
+  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
+  {
+    HSEStatus = (uint32_t)0x01;
+  }
+  else
+  {
+    HSEStatus = (uint32_t)0x00;
+  }
+
+  if (HSEStatus == (uint32_t)0x01)
+  {
+    /* HCLK = SYSCLK / 1*/
+    RCC->CFGR |= RCC_CFGR_HPRE_DIV1;
+      
+    /* PCLK2 = HCLK / 2*/
+    RCC->CFGR |= RCC_CFGR_PPRE2_DIV2;
+    
+    /* PCLK1 = HCLK / 4*/
+    RCC->CFGR |= RCC_CFGR_PPRE1_DIV4;
+
+    /* Configure the main PLL */
+    RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) |
+                   (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);
+
+    /* Enable the main PLL */
+    RCC->CR |= RCC_CR_PLLON;
+
+    /* Wait till the main PLL is ready */
+    while((RCC->CR & RCC_CR_PLLRDY) == 0)
+    {
+    }
+   
+    /* Configure Flash prefetch, Instruction cache, Data cache and wait state */
+    FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_3WS;
+
+    /* Select the main PLL as system clock source */
+    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
+    RCC->CFGR |= RCC_CFGR_SW_PLL;
+
+    /* Wait till the main PLL is used as system clock source */
+    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
+    {
+    }
+  }
+  else
+  { /* If HSE fails to start-up, the application will have wrong clock
+         configuration. User can add here some code to deal with this error */
+  }
+
+}
+
+/**
+  * @brief  Setup the external memory controller. Called in startup_stm32f2xx.s
+  *         before jump to __main
+  * @param  None
+  * @retval None
+  */
+#ifdef DATA_IN_ExtSRAM
+/**
+  * @brief  Setup the external memory controller.
+  *         Called in startup_stm32f2xx.s before jump to main.
+  *         This function configures the external SRAM mounted on STM322xG_EVAL board
+  *         This SRAM will be used as program data memory (including heap and stack).
+  * @param  None
+  * @retval None
+  */
+void SystemInit_ExtMemCtl(void)
+{
+/*-- GPIOs Configuration -----------------------------------------------------*/
+/*
+ +-------------------+--------------------+------------------+------------------+
+ +                       SRAM pins assignment                                  +
+ +-------------------+--------------------+------------------+------------------+
+ | PD0  <-> FSMC_D2  | PE0  <-> FSMC_NBL0 | PF0  <-> FSMC_A0 | PG0 <-> FSMC_A10 |
+ | PD1  <-> FSMC_D3  | PE1  <-> FSMC_NBL1 | PF1  <-> FSMC_A1 | PG1 <-> FSMC_A11 |
+ | PD4  <-> FSMC_NOE | PE7  <-> FSMC_D4   | PF2  <-> FSMC_A2 | PG2 <-> FSMC_A12 |
+ | PD5  <-> FSMC_NWE | PE8  <-> FSMC_D5   | PF3  <-> FSMC_A3 | PG3 <-> FSMC_A13 |
+ | PD8  <-> FSMC_D13 | PE9  <-> FSMC_D6   | PF4  <-> FSMC_A4 | PG4 <-> FSMC_A14 |
+ | PD9  <-> FSMC_D14 | PE10 <-> FSMC_D7   | PF5  <-> FSMC_A5 | PG5 <-> FSMC_A15 |
+ | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8   | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 |
+ | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9   | PF13 <-> FSMC_A7 |------------------+
+ | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10  | PF14 <-> FSMC_A8 | 
+ | PD14 <-> FSMC_D0  | PE14 <-> FSMC_D11  | PF15 <-> FSMC_A9 | 
+ | PD15 <-> FSMC_D1  | PE15 <-> FSMC_D12  |------------------+
+ +-------------------+--------------------+
+*/
+   /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+  RCC->AHB1ENR   = 0x00000078;
+  
+  /* Connect PDx pins to FSMC Alternate function */
+  GPIOD->AFR[0]  = 0x00cc00cc;
+  GPIOD->AFR[1]  = 0xcc0ccccc;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xa2aa0a0a;
+  /* Configure PDx pins speed to 100 MHz */  
+  GPIOD->OSPEEDR = 0xf3ff0f0f;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FSMC Alternate function */
+  GPIOE->AFR[0]  = 0xc00000cc;
+  GPIOE->AFR[1]  = 0xcccccccc;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xaaaa800a;
+  /* Configure PEx pins speed to 100 MHz */ 
+  GPIOE->OSPEEDR = 0xffffc00f;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+
+  /* Connect PFx pins to FSMC Alternate function */
+  GPIOF->AFR[0]  = 0x00cccccc;
+  GPIOF->AFR[1]  = 0xcccc0000;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xaa000aaa;
+  /* Configure PFx pins speed to 100 MHz */ 
+  GPIOF->OSPEEDR = 0xff000fff;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FSMC Alternate function */
+  GPIOG->AFR[0]  = 0x00cccccc;
+  GPIOG->AFR[1]  = 0x000000c0;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0x00080aaa;
+  /* Configure PGx pins speed to 100 MHz */ 
+  GPIOG->OSPEEDR = 0x000c0fff;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+  
+/*-- FSMC Configuration ------------------------------------------------------*/
+  /* Enable the FSMC interface clock */
+  RCC->AHB3ENR         = 0x00000001;
+
+  /* Configure and enable Bank1_SRAM2 */
+  FSMC_Bank1->BTCR[2]  = 0x00001015;
+  FSMC_Bank1->BTCR[3]  = 0x00010400;
+  FSMC_Bank1E->BWTR[2] = 0x0fffffff;
+/*
+  Bank1_SRAM2 is configured as follow:
+
+  p.FSMC_AddressSetupTime = 0;
+  p.FSMC_AddressHoldTime = 0;
+  p.FSMC_DataSetupTime = 4;
+  p.FSMC_BusTurnAroundDuration = 1;
+  p.FSMC_CLKDivision = 0;
+  p.FSMC_DataLatency = 0;
+  p.FSMC_AccessMode = FSMC_AccessMode_A;
+
+  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
+  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
+  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
+  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;  
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
+  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
+  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
+  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
+*/
+  
+}
+#endif /* DATA_IN_ExtSRAM */
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+  
+/**
+  * @}
+  */
+/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/File_System/FS_Config.c b/IDE/MDK5-ARM/Projects/EchoServer/RTE/File_System/FS_Config.c
new file mode 100644
index 000000000..78564b080
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/File_System/FS_Config.c
@@ -0,0 +1,72 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::File System
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    FS_Config.c
+ * Purpose: File System Configuration
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// File System
+// Define File System global parameters
+
+//   Number of open files <4-16>
+//   Define number of files that can be
+//   opened at the same time.
+//   Default: 8
+#define NUM_FILES               8
+
+//   FAT Name Cache Size <0-1000000>
+//   Define number of cached FAT file or directory names.
+//   48 bytes of RAM is required for each cached name.
+#define FAT_NAME_CACHE_SIZE     0
+
+//   Relocate FAT Name Cache Buffer
+//   Locate Cache Buffer at a specific address.
+#define FAT_NAME_CACHE_RELOC    0
+
+//     Base address <0x0000-0xFFFFFE00:0x200>
+//     Define the Cache buffer base address.
+#define FAT_NAME_CACHE_ADDR     0x60000000
+
+//   
+
+// 
+
+#include "..\RTE_Components.h"
+
+#ifdef  RTE_FileSystem_Drive_RAM
+#include "FS_Config_RAM.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_NOR_0
+#include "FS_Config_NOR_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_NOR_1
+#include "FS_Config_NOR_1.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_NAND_0
+#include "FS_Config_NAND_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_NAND_1
+#include "FS_Config_NAND_1.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_MC_0
+#include "FS_Config_MC_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_MC_1
+#include "FS_Config_MC_1.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_USB_0
+#include "FS_Config_USB_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_USB_1
+#include "FS_Config_USB_1.h"
+#endif
+
+#include "fs_config.h"
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/File_System/FS_Config_MC_0.h b/IDE/MDK5-ARM/Projects/EchoServer/RTE/File_System/FS_Config_MC_0.h
new file mode 100644
index 000000000..0b1c6d3a7
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/File_System/FS_Config_MC_0.h
@@ -0,0 +1,57 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::File System:Drive
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    FS_Config_MC_0.h
+ * Purpose: File System Configuration for Memory Card Drive
+ * Rev.:    V5.01
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Memory Card Drive 0
+// Configuration for SD/SDHC/MMC Memory Card assigned to drive letter "M0:"
+#define MC0_ENABLE              1
+
+//   Connect to hardware via Driver_MCI# <0-255>
+//   Select driver control block for hardware interface
+#define MC0_MCI_DRIVER          0
+
+//   Connect to hardware via Driver_SPI# <0-255>
+//   Select driver control block for hardware interface when in SPI mode
+#define MC0_SPI_DRIVER          0
+
+//   Memory Card Interface Mode <0=>Native <1=>SPI
+//   Native uses a SD Bus with up to 8 data lines, CLK, and CMD
+//   SPI uses 2 data lines (MOSI and MISO), SCLK and CS
+//   When using SPI both Driver_SPI# and Driver_MCI# must be specified
+//   since the MCI driver provides the control interface lines.
+#define MC0_SPI                 0
+          
+//   Drive Cache Size <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
+//                       <8=>8 KB <16=>16 KB <32=>32 KB
+//   Drive Cache stores data sectors and may be increased to speed-up
+//   file read/write operations on this drive (default: 4 KB)
+#define MC0_CACHE_SIZE          4
+
+//   Locate Drive Cache and Drive Buffer
+//   Some microcontrollers support DMA only in specific memory areas and
+//   require to locate the drive buffers at a fixed address.
+#define MC0_CACHE_RELOC         0
+
+//     Base address <0x0000-0xFFFFFE00:0x200>
+//     Set buffer base address to RAM areas that support DMA with the drive.
+#define MC0_CACHE_ADDR          0x7FD00000
+
+//   
+
+//   Use FAT Journal
+//   Protect File Allocation Table and Directory Entries for
+//   fail-safe operation.
+#define MC0_FAT_JOURNAL         0
+
+//   Default Drive "M0:"
+//   Use this drive when no drive letter is specified.
+#define MC0_DEFAULT_DRIVE       1
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config.c b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config.c
new file mode 100644
index 000000000..6b9dc8e00
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config.c
@@ -0,0 +1,153 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config.c
+ * Purpose: Network Configuration
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// System Definitions
+//  Global Network System definitions
+//   Local Host Name
+//    This is the name under which embedded host can be
+//    accessed on a local area network.
+//    Default: "my_host"
+#define NET_HOST_NAME           "my_host"
+
+//   Memory Pool size <1536-262144:4><#/4>
+//    This is the size of a memory pool in bytes. Buffers for
+//    Network packets are allocated from this memory pool.
+//    Default: 12000 bytes
+#define NET_MEM_SIZE            3000
+
+// 
+
+#include "..\RTE_Components.h"
+
+#ifdef  RTE_Network_Interface_ETH_0
+#include "Net_Config_ETH_0.h"
+#endif
+#ifdef  RTE_Network_Interface_ETH_1
+#include "Net_Config_ETH_1.h"
+#endif
+
+#ifdef  RTE_Network_Interface_PPP_0
+#include "Net_Config_PPP_0.h"
+#endif
+#ifdef  RTE_Network_Interface_PPP_1
+#include "Net_Config_PPP_1.h"
+#endif
+
+#ifdef  RTE_Network_Interface_SLIP_0
+#include "Net_Config_SLIP_0.h"
+#endif
+#ifdef  RTE_Network_Interface_SLIP_1
+#include "Net_Config_SLIP_1.h"
+#endif
+
+#ifdef  RTE_Network_Socket_UDP
+#include "Net_Config_UDP.h"
+#endif
+#ifdef  RTE_Network_Socket_TCP
+#include "Net_Config_TCP.h"
+#endif
+#ifdef  RTE_Network_Socket_BSD
+#include "Net_Config_BSD.h"
+#endif
+
+#ifdef  RTE_Network_Web_Server_RO
+#include "Net_Config_HTTP_Server.h"
+#endif
+#ifdef  RTE_Network_Web_Server_FS
+#include "Net_Config_HTTP_Server.h"
+#endif
+
+#ifdef  RTE_Network_Telnet_Server
+#include "Net_Config_Telnet_Server.h"
+#endif
+
+#ifdef  RTE_Network_TFTP_Server
+#include "Net_Config_TFTP_Server.h"
+#endif
+#ifdef  RTE_Network_TFTP_Client
+#include "Net_Config_TFTP_Client.h"
+#endif
+
+#ifdef  RTE_Network_FTP_Server
+#include "Net_Config_FTP_Server.h"
+#endif
+#ifdef  RTE_Network_FTP_Client
+#include "Net_Config_FTP_Client.h"
+#endif
+
+#ifdef  RTE_Network_DNS_Client
+#include "Net_Config_DNS_Client.h"
+#endif
+
+#ifdef  RTE_Network_SMTP_Client
+#include "Net_Config_SMTP_Client.h"
+#endif
+
+#ifdef  RTE_Network_SNMP_Agent
+#include "Net_Config_SNMP_Agent.h"
+#endif
+
+#ifdef  RTE_Network_SNTP_Client
+#include "Net_Config_SNTP_Client.h"
+#endif
+
+#include "net_config.h"
+
+/**
+\addtogroup net_genFunc
+@{
+*/
+/**
+  \fn          void net_sys_error (ERROR_CODE error)
+  \ingroup     net_cores
+  \brief       Network system error handler.
+*/
+void net_sys_error (ERROR_CODE error) {
+  /* This function is called when a fatal error is encountered. */
+  /* The normal program execution is not possible anymore.      */
+
+  switch (error) {
+    case ERR_MEM_ALLOC:
+      /* Out of memory */
+      break;
+
+    case ERR_MEM_FREE:
+      /* Trying to release non existing memory block */
+      break;
+
+    case ERR_MEM_CORRUPT:
+      /* Memory Link pointer Corrupted */
+      /* More data written than the size of allocated mem block */
+      break;
+
+    case ERR_MEM_LOCK:
+      /* Locked Memory management function (alloc/free) re-entered */
+      break;
+
+    case ERR_UDP_ALLOC:
+      /* Out of UDP Sockets */
+      break;
+
+    case ERR_TCP_ALLOC:
+      /* Out of TCP Sockets */
+      break;
+
+    case ERR_TCP_STATE:
+      /* TCP State machine in undefined state */
+      break;
+  }
+
+  /* End-less loop */
+  while (1);
+}
+/**
+@}
+*/
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_BSD.h b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_BSD.h
new file mode 100644
index 000000000..4166a0a2d
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_BSD.h
@@ -0,0 +1,36 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Socket
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_BSD.h
+ * Purpose: Network Configuration BSD Sockets
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Berkley (BSD) Sockets
+#define BSD_ENABLE              1
+
+//   Number of BSD Sockets <1-20>
+//    Number of available Berkeley Sockets
+//    Default: 2
+#define BSD_NUM_SOCKS           15
+
+//   Number of Streaming Server Sockets <0-20>
+//    Defines a number of Streaming (TCP) Server sockets,
+//    that listen for an incoming connection from the client.
+//    Default: 1
+#define BSD_SERVER_SOCKS        1
+
+//   Receive Timeout in seconds <0-600>
+//    A timeout for socket receive in blocking mode.
+//    Timeout value of 0 means indefinite timeout.
+//    Default: 20
+#define BSD_RECEIVE_TOUT        20
+
+//   Hostname Resolver
+//    Enable or disable Berkeley style hostname resolver.
+#define BSD_HOSTNAME_ENABLE     0
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_DNS_Client.h b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_DNS_Client.h
new file mode 100644
index 000000000..d30b71807
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_DNS_Client.h
@@ -0,0 +1,20 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Service
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_DNS_Client.h
+ * Purpose: Network Configuration DNS Client
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// DNS Client
+#define DNS_CLIENT_ENABLE       1
+
+//     Cache Table size <5-100>
+//      Number of cached DNS host names/IP addresses
+//      Default: 20
+#define DNS_CLIENT_TAB_SIZE     20
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_ETH_0.h b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_ETH_0.h
new file mode 100644
index 000000000..9a49f3821
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_ETH_0.h
@@ -0,0 +1,222 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Interface
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_ETH_0.h
+ * Purpose: Network Configuration ETH Interface
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Ethernet Network Interface 0
+#define ETH0_ENABLE             1
+
+//   Connect to hardware via Driver_ETH# <0-255>
+//   Select driver control block for MAC and PHY interface
+#define ETH0_DRIVER             1
+
+//   MAC Address
+//    Local Ethernet MAC Address
+//    Value FF:FF:FF:FF:FF:FF is not allowed.
+//    It is an ethernet Broadcast MAC address.
+//     Address byte 1 <0x00-0xff:2>
+//      LSB is an ethernet Multicast bit.
+//      Must be 0 for local MAC address.
+//      Default: 0x1E
+#define ETH0_MAC1               0x1E
+
+//     Address byte 2 <0x00-0xff>
+//      Default: 0x30
+#define ETH0_MAC2               0x30
+
+//     Address byte 3 <0x00-0xff>
+//      Default: 0x6C
+#define ETH0_MAC3               0x6C
+
+//     Address byte 4 <0x00-0xff>
+//      Default: 0xA2
+#define ETH0_MAC4               0xA2
+
+//     Address byte 5 <0x00-0xff>
+//      Default: 0x45
+#define ETH0_MAC5               0x45
+
+//     Address byte 6 <0x00-0xff>
+//      Default: 0x5E
+#define ETH0_MAC6               0x5E
+//   
+
+//   IP Address
+//    Local Static IP Address
+//    Value 255.255.255.255 is not allowed.
+//    It is a Broadcast IP address.
+//     Address byte 1 <0-255>
+//      Default: 192
+#define ETH0_IP1                192
+
+//     Address byte 2 <0-255>
+//      Default: 168
+#define ETH0_IP2                168
+
+//     Address byte 3 <0-255>
+//      Default: 0
+#define ETH0_IP3                0
+
+//     Address byte 4 <0-255>
+//      Default: 100
+#define ETH0_IP4                100
+//   
+
+//   Subnet mask
+//    Local Subnet mask
+//     Mask byte 1 <0-255>
+//      Default: 255
+#define ETH0_MASK1              255
+
+//     Mask byte 2 <0-255>
+//      Default: 255
+#define ETH0_MASK2              255
+
+//     Mask byte 3 <0-255>
+//      Default: 255
+#define ETH0_MASK3              255
+
+//     Mask byte 4 <0-255>
+//      Default: 0
+#define ETH0_MASK4              0
+//   
+
+//   Default Gateway
+//    Default Gateway IP Address
+//     Address byte 1 <0-255>
+//      Default: 192
+#define ETH0_GW1                192
+
+//     Address byte 2 <0-255>
+//      Default: 168
+#define ETH0_GW2                168
+
+//     Address byte 3 <0-255>
+//      Default: 0
+#define ETH0_GW3                0
+
+//     Address byte 4 <0-255>
+//      Default: 254
+#define ETH0_GW4                254
+//   
+
+//   Primary DNS Server
+//    Primary DNS Server IP Address
+//     Address byte 1 <0-255>
+//      Default: 194
+#define ETH0_PRI_DNS1           194
+
+//     Address byte 2 <0-255>
+//      Default: 25
+#define ETH0_PRI_DNS2           25
+
+//     Address byte 3 <0-255>
+//      Default: 2
+#define ETH0_PRI_DNS3           2
+
+//     Address byte 4 <0-255>
+//      Default: 129
+#define ETH0_PRI_DNS4           129
+//   
+
+//   Secondary DNS Server
+//    Secondary DNS Server IP Address
+//     Address byte 1 <0-255>
+//      Default: 194
+#define ETH0_SEC_DNS1           194
+
+//     Address byte 2 <0-255>
+//      Default: 25
+#define ETH0_SEC_DNS2           25
+
+//     Address byte 3 <0-255>
+//      Default: 2
+#define ETH0_SEC_DNS3           2
+
+//     Address byte 4 <0-255>
+//      Default: 130
+#define ETH0_SEC_DNS4           130
+//   
+
+//   ARP Definitions
+//    Address Resolution Protocol Definitions
+//     Cache Table size <5-100>
+//      Number of cached hardware/IP addresses
+//      Default: 10
+#define ETH0_ARP_TAB_SIZE       10
+
+//     Cache Timeout in seconds <5-255>
+//      A timeout for a cached hardware/IP addresses
+//      Default: 150
+#define ETH0_ARP_CACHE_TOUT     150
+
+//     Number of Retries <0-20>
+//      Number of Retries to resolve an IP address
+//      before ARP module gives up
+//      Default: 4
+#define ETH0_ARP_MAX_RETRY      4
+
+//     Resend Timeout in seconds <1-10>
+//      A timeout to resend the ARP Request
+//      Default: 2
+#define ETH0_ARP_RESEND_TOUT    2
+
+//     Send Notification on Address changes
+//      When this option is enabled, the embedded host
+//      will send a Gratuitous ARP notification at startup,
+//      or when the device IP address has changed.
+//      Default: Disabled
+#define ETH0_ARP_NOTIFY         0
+//   
+
+//   IGMP Group Management
+//    Enable or disable Internet Group Management Protocol
+#define ETH0_IGMP_ENABLE        0
+
+//     Membership Table size <2-50>
+//      Number of Groups this host can join
+//      Default: 5
+#define ETH0_IGMP_TAB_SIZE      5
+//   
+
+//   NetBIOS Name Service
+//    When this option is enabled, the embedded host can be
+//    accessed by his name on the local LAN using NBNS protocol.
+//    You need to modify also the number of UDP Sockets,
+//    because NBNS protocol uses one UDP socket to run.
+#define ETH0_NBNS_ENABLE        1
+
+//   Dynamic Host Configuration
+//    When this option is enabled, local IP address, Net Mask
+//    and Default Gateway are obtained automatically from
+//    the DHCP Server on local LAN.
+//    You need to modify also the number of UDP Sockets,
+//    because DHCP protocol uses one UDP socket to run.
+#define ETH0_DHCP_ENABLE        0
+
+//     Vendor Class Identifier
+//      This value is optional. If specified, it is added
+//      to DHCP request message, identifying vendor type.
+//      Default: ""
+#define ETH0_DHCP_VCID          ""
+
+//     Bootfile Name
+//      This value is optional. If enabled, the Bootfile Name
+//      (option 67) is also requested from DHCP server.
+//      Default: disabled
+#define ETH0_DHCP_BOOTFILE      0
+
+//     NTP Servers
+//      This value is optional. If enabled, a list of NTP Servers
+//      (option 42) is also requested from DHCP server.
+//      Default: disabled
+#define ETH0_DHCP_NTP_SERVERS   0
+//   
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_TCP.h b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_TCP.h
new file mode 100644
index 000000000..9d5b419e4
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_TCP.h
@@ -0,0 +1,61 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Socket
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_TCP.h
+ * Purpose: Network Configuration TCP Sockets
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// TCP Sockets
+#define TCP_ENABLE              1
+
+//   Number of TCP Sockets <1-20>
+//    Number of available TCP sockets
+//    Default: 5
+#define TCP_NUM_SOCKS           15
+
+//   Number of Retries <0-20>
+//    How many times TCP module will try to retransmit data
+//    before giving up. Increase this value for high-latency
+//    and low_throughput networks.
+//    Default: 5
+#define TCP_MAX_RETRY           5
+
+//   Retry Timeout in seconds <1-10>
+//    If data frame not acknowledged within this time frame,
+//    TCP module will try to resend the data again.
+//    Default: 4
+#define TCP_RETRY_TOUT          4
+
+//   Default Connect Timeout in seconds <1-600>
+//    Default TCP Socket Keep Alive timeout. When it expires
+//    with no TCP data frame send, TCP Connection is closed.
+//    Default: 120
+#define TCP_DEFAULT_TOUT        120
+
+//   Maximum Segment Size <536-1460>
+//    The Maximum Segment Size specifies the maximum
+//    number of bytes in the TCP segment's Data field.
+//    Default: 1460
+#define TCP_MAX_SEG_SIZE        1460
+
+//   Receive Window Size <536-65535>
+//    Receive Window Size specifies the size of data, 
+//    that the socket is able to buffer in flow-control mode.
+//    Default: 4380
+#define TCP_RECEIVE_WIN_SIZE    4380
+
+// 
+
+// TCP Initial Retransmit period in seconds
+#define TCP_INITIAL_RETRY_TOUT  1
+
+// TCP SYN frame retransmit period in seconds
+#define TCP_SYN_RETRY_TOUT      2
+
+// Number of retries to establish a connection
+#define TCP_CONNECT_RETRY       7
+
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_UDP.h b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_UDP.h
new file mode 100644
index 000000000..113f314a9
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Config_UDP.h
@@ -0,0 +1,20 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Socket
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_UDP.h
+ * Purpose: Network Configuration UDP Sockets
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// UDP Sockets
+#define UDP_ENABLE              1
+
+//   Number of UDP Sockets <1-20>
+//    Number of available UDP sockets
+//    Default: 5
+#define UDP_NUM_SOCKS           20
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Debug.c b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Debug.c
new file mode 100644
index 000000000..735089a40
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/Network/Net_Debug.c
@@ -0,0 +1,125 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Debug.c
+ * Purpose: Network Debug Configuration
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Print Time Stamp
+//    Enable printing the time-info in debug messages
+#define DBG_TIME                1
+
+// TCPnet Debug Definitions
+//   Memory Management Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Dynamic Memory debug messages
+#define DBG_MEM                 1
+
+//   Ethernet Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Ethernet debug messages
+#define DBG_ETH                 0
+
+//   PPP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off PPP debug messages
+#define DBG_PPP                 0
+
+//   SLIP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off SLIP debug messages
+#define DBG_SLIP                0
+
+//   ARP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off ARP debug messages
+#define DBG_ARP                 0
+
+//   IP Debug    <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off IP debug messages
+#define DBG_IP                  1
+
+//   ICMP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off ICMP debug messages
+#define DBG_ICMP                1
+
+//   IGMP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off IGMP debug messages
+#define DBG_IGMP                1
+
+//   UDP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off UDP debug messages
+#define DBG_UDP                 1
+
+//   TCP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off TCP debug messages
+#define DBG_TCP                 1
+
+//   NBNS Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off NetBIOS Name Service debug messages
+#define DBG_NBNS                1
+
+//   DHCP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Dynamic Host Configuration debug messages
+#define DBG_DHCP                1
+
+//   DNS Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Domain Name Service debug messages
+#define DBG_DNS                 1
+
+//   SNMP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Simple Network Management debug messages
+#define DBG_SNMP                1
+
+//   SNTP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Simple Network Time debug messages
+#define DBG_SNTP                1
+
+//   BSD Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off BSD Interface debug messages
+#define DBG_BSD                 1
+// 
+
+// Application Debug Definitions
+//   HTTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Web Server debug messages
+#define DBG_HTTP_SERVER         1
+
+//   FTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off FTP Server debug messages
+#define DBG_FTP_SERVER          1
+
+//   FTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off FTP Client debug messages
+#define DBG_FTP_CLIENT          1
+
+//   Telnet Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Telnet Server debug messages
+#define DBG_TELNET_SERVER       1
+
+//   TFTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off TFTP Server debug messages
+#define DBG_TFTP_SERVER         1
+
+//   TFTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off TFTP Client debug messages
+#define DBG_TFTP_CLIENT         1
+
+//   SMTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off SMTP Client debug messages
+#define DBG_SMTP_CLIENT         1
+// 
+
+
+#include "net_debug.h"
+
+
+/**
+  \fn          void net_debug_init (void)
+  \brief       Initialize Network Debug Interface.
+*/
+void net_debug_init (void) {
+  /* Add your code to initialize the Debug output. This is usually the  */
+  /* serial interface. The function is called at TCPnet system startup. */
+  /* You may need to customize also the 'putchar()' function.           */
+
+}
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/RTE_Components.h b/IDE/MDK5-ARM/Projects/EchoServer/RTE/RTE_Components.h
new file mode 100644
index 000000000..20773df02
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/RTE_Components.h
@@ -0,0 +1,28 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ *      *** Do not modify ! ***
+ *
+ * Project: 'EchoServer' 
+ * Target:  'EchoServer' 
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+#define RTE_DEVICE_STARTUP_STM32F2xx    /* Device Startup for STM32F2 */
+#define RTE_Drivers_ETH_MAC0            /* Driver ETH_MAC0 */
+#define RTE_Drivers_MCI0                /* Driver MCI0 */
+#define RTE_Drivers_PHY_ST802RT1        /* Driver PHY ST802RT1 */
+#define RTE_FileSystem_Core             /* File System Core */
+          #define RTE_FileSystem_LFN              /* File System with Long Filename support */
+#define RTE_FileSystem_Drive_MC_0       /* File System Memory Card Drive 0 */
+#define RTE_Network_Core                /* Network Core */
+          #define RTE_Network_Debug               /* Network Debug Version */
+#define RTE_Network_DNS_Client          /* Network DNS Client */
+#define RTE_Network_Interface_ETH_0     /* Network Interface ETH 0 */
+#define RTE_Network_Socket_BSD          /* Network Socket BSD */
+#define RTE_Network_Socket_TCP          /* Network Socket TCP */
+#define RTE_Network_Socket_UDP          /* Network Socket UDP */
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/STM32_SWO.ini b/IDE/MDK5-ARM/Projects/EchoServer/STM32_SWO.ini
new file mode 100644
index 000000000..239abce37
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/STM32_SWO.ini
@@ -0,0 +1,36 @@
+/******************************************************************************/
+/* STM32_SWO.ini: STM32 Debugger Initialization File                           */
+/******************************************************************************/
+// <<< Use Configuration Wizard in Context Menu >>>                           // 
+/******************************************************************************/
+/* This file is part of the uVision/ARM development tools.                    */
+/* Copyright (c) 2004-2013 Keil Software. All rights reserved.                */
+/* This software may only be used under the terms of a valid, current,        */
+/* end user licence from KEIL for a compatible version of KEIL software       */
+/* development tools. Nothing else gives you the right to use this software.  */
+/******************************************************************************/
+
+
+FUNC void DebugSetup (void) {
+//  Debug MCU Configuration
+//       DBG_SLEEP      Debug Sleep Mode
+//       DBG_STOP       Debug Stop Mode
+//       DBG_STANDBY    Debug Standby Mode
+//       TRACE_IOEN     Trace I/O Enable 
+//    TRACE_MODE     Trace Mode
+//             <0=> Asynchronous
+//             <1=> Synchronous: TRACEDATA Size 1
+//             <2=> Synchronous: TRACEDATA Size 2
+//             <3=> Synchronous: TRACEDATA Size 4
+//       DBG_IWDG_STOP  Independant Watchdog Stopped when Core is halted
+//       DBG_WWDG_STOP  Window Watchdog Stopped when Core is halted
+//      DBG_TIM1_STOP  Timer 1 Stopped when Core is halted
+//      DBG_TIM2_STOP  Timer 2 Stopped when Core is halted
+//      DBG_TIM3_STOP  Timer 3 Stopped when Core is halted
+//      DBG_TIM4_STOP  Timer 4 Stopped when Core is halted
+//      DBG_CAN_STOP   CAN Stopped when Core is halted
+// 
+  _WDWORD(0xE0042004, 0x00000027);  // DBGMCU_CR
+}
+
+DebugSetup();                       // Debugger Setup
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/echoserver.c b/IDE/MDK5-ARM/Projects/EchoServer/echoserver.c
new file mode 100644
index 000000000..ba8e10f18
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/echoserver.c
@@ -0,0 +1,370 @@
+/* echoserver.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+
+#if defined(CYASSL_MDK_ARM)
+    #include 
+    #include 
+
+    #if defined(CYASSL_MDK5)
+        #include "cmsis_os.h"
+        #include "rl_fs.h" 
+        #include "rl_net.h" 
+    #else
+        #include "rtl.h"
+    #endif
+
+    #include "cyassl_MDK_ARM.h"
+#endif
+
+#include 
+#include 
+
+#ifndef NO_MAIN_DRIVER
+    #define ECHO_OUT
+#endif
+
+#include "examples/echoserver/echoserver.h"
+
+
+#ifdef SESSION_STATS
+    CYASSL_API void PrintSessionStats(void);
+#endif
+
+#define SVR_COMMAND_SIZE 256
+
+static void SignalReady(void* args, int port)
+{
+#if defined(_POSIX_THREADS) && defined(NO_MAIN_DRIVER) && !defined(__MINGW32__)
+    /* signal ready to tcp_accept */
+    func_args* server_args = (func_args*)args;
+    tcp_ready* ready = server_args->signal;
+    pthread_mutex_lock(&ready->mutex);
+    ready->ready = 1;
+    ready->port = port;
+    pthread_cond_signal(&ready->cond);
+    pthread_mutex_unlock(&ready->mutex);
+#endif
+    (void)args;
+    (void)port;
+}
+
+
+THREAD_RETURN CYASSL_THREAD echoserver_test(void* args)
+{
+    SOCKET_T       sockfd = 0;
+    CYASSL_METHOD* method = 0;
+    CYASSL_CTX*    ctx    = 0;
+
+    int    doDTLS = 0;
+    int    doPSK = 0;
+    int    outCreated = 0;
+    int    shutDown = 0;
+    int    useAnyAddr = 0;
+    int    port = yasslPort;
+    int    argc = ((func_args*)args)->argc;
+    char** argv = ((func_args*)args)->argv;
+
+#ifdef ECHO_OUT
+    FILE* fout = stdout;
+    if (argc >= 2) {
+        fout = fopen(argv[1], "w");
+        outCreated = 1;
+    }
+    if (!fout) err_sys("can't open output file");
+#endif
+    (void)outCreated;
+    (void)argc;
+    (void)argv;
+
+    ((func_args*)args)->return_code = -1; /* error state */
+
+#ifdef CYASSL_DTLS
+    doDTLS  = 1;
+#endif
+
+#ifdef CYASSL_LEANPSK
+    doPSK = 1;
+#endif
+
+#if defined(NO_RSA) && !defined(HAVE_ECC)
+    doPSK = 1;
+#endif
+
+    #if defined(NO_MAIN_DRIVER) && !defined(USE_WINDOWS_API) && \
+                      !defined(CYASSL_SNIFFER) && !defined(CYASSL_MDK_ARM)
+        port = 0;
+    #endif
+    #if defined(USE_ANY_ADDR)
+        useAnyAddr = 1;
+    #endif
+    tcp_listen(&sockfd, &port, useAnyAddr, doDTLS);
+
+#if defined(CYASSL_DTLS)
+    method  = CyaDTLSv1_server_method();
+#elif  !defined(NO_TLS)
+    method = CyaSSLv23_server_method();
+#else
+    method = CyaSSLv3_server_method();
+#endif
+    ctx    = CyaSSL_CTX_new(method);
+    /* CyaSSL_CTX_set_session_cache_mode(ctx, SSL_SESS_CACHE_OFF); */
+
+#ifdef OPENSSL_EXTRA
+    CyaSSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack);
+#endif
+
+#ifndef NO_FILESYSTEM
+    if (doPSK == 0) {
+    #ifdef HAVE_NTRU
+        /* ntru */
+        if (CyaSSL_CTX_use_certificate_file(ctx, ntruCert, SSL_FILETYPE_PEM)
+                != SSL_SUCCESS)
+            err_sys("can't load ntru cert file, "
+                    "Please run from CyaSSL home dir");
+
+        if (CyaSSL_CTX_use_NTRUPrivateKey_file(ctx, ntruKey)
+                != SSL_SUCCESS)
+            err_sys("can't load ntru key file, "
+                    "Please run from CyaSSL home dir");
+    #elif defined(HAVE_ECC)
+        /* ecc */
+        if (CyaSSL_CTX_use_certificate_file(ctx, eccCert, SSL_FILETYPE_PEM)
+                != SSL_SUCCESS)
+            err_sys("can't load server cert file, "
+                    "Please run from CyaSSL home dir");
+
+        if (CyaSSL_CTX_use_PrivateKey_file(ctx, eccKey, SSL_FILETYPE_PEM)
+                != SSL_SUCCESS)
+            err_sys("can't load server key file, "
+                    "Please run from CyaSSL home dir");
+    #elif defined(NO_CERTS)
+        /* do nothing, just don't load cert files */
+    #else
+        /* normal */
+        if (CyaSSL_CTX_use_certificate_file(ctx, svrCert, SSL_FILETYPE_PEM)
+                != SSL_SUCCESS)
+            err_sys("can't load server cert file, "
+                    "Please run from CyaSSL home dir");
+
+        if (CyaSSL_CTX_use_PrivateKey_file(ctx, svrKey, SSL_FILETYPE_PEM)
+                != SSL_SUCCESS)
+            err_sys("can't load server key file, "
+                    "Please run from CyaSSL home dir");
+    #endif
+    } /* doPSK */
+#elif !defined(NO_CERTS)
+    if (!doPSK) {
+        load_buffer(ctx, svrCert, CYASSL_CERT);
+        load_buffer(ctx, svrKey,  CYASSL_KEY);
+    }
+#endif
+
+#if defined(CYASSL_SNIFFER) && !defined(HAVE_NTRU) && !defined(HAVE_ECC)
+    /* don't use EDH, can't sniff tmp keys */
+    CyaSSL_CTX_set_cipher_list(ctx, "AES256-SHA");
+#endif
+
+    if (doPSK) {
+#ifndef NO_PSK
+        const char *defaultCipherList;
+
+        CyaSSL_CTX_set_psk_server_callback(ctx, my_psk_server_cb);
+        CyaSSL_CTX_use_psk_identity_hint(ctx, "cyassl server");
+        #ifdef HAVE_NULL_CIPHER
+            defaultCipherList = "PSK-NULL-SHA256";
+        #else
+            defaultCipherList = "PSK-AES128-CBC-SHA256";
+        #endif
+        if (CyaSSL_CTX_set_cipher_list(ctx, defaultCipherList) != SSL_SUCCESS)
+            err_sys("server can't set cipher list 2");
+#endif
+    }
+
+    SignalReady(args, port);
+
+    while (!shutDown) {
+        CYASSL* ssl = 0;
+        char    command[SVR_COMMAND_SIZE+1];
+        int     echoSz = 0;
+        int     clientfd;
+        int     firstRead = 1;
+        int     gotFirstG = 0;
+                
+#ifndef CYASSL_DTLS 
+        SOCKADDR_IN_T client;
+        socklen_t     client_len = sizeof(client);
+        clientfd = accept(sockfd, (struct sockaddr*)&client,
+                         (ACCEPT_THIRD_T)&client_len);
+#else
+        clientfd = udp_read_connect(sockfd);
+#endif
+        if (clientfd == -1) err_sys("tcp accept failed");
+
+        ssl = CyaSSL_new(ctx);
+        if (ssl == NULL) err_sys("SSL_new failed");
+              CyaSSL_set_quiet_shutdown(ssl, 1) ;
+            
+        CyaSSL_set_fd(ssl, clientfd);
+        #if !defined(NO_FILESYSTEM) && defined(OPENSSL_EXTRA)
+            CyaSSL_SetTmpDH_file(ssl, dhParam, SSL_FILETYPE_PEM);
+        #elif !defined(NO_CERTS)
+            SetDH(ssl);  /* will repick suites with DHE, higher than PSK */
+        #endif
+        if (CyaSSL_accept(ssl) != SSL_SUCCESS) {
+            printf("SSL_accept failed\n");
+            CyaSSL_free(ssl);
+            CloseSocket(clientfd);
+            continue;
+        }
+#if defined(PEER_INFO)
+        showPeer(ssl);
+#endif
+
+        while ( (echoSz = CyaSSL_read(ssl, command, sizeof(command)-1)) > 0) {
+
+            if (firstRead == 1) {
+                firstRead = 0;  /* browser may send 1 byte 'G' to start */
+                if (echoSz == 1 && command[0] == 'G') {
+                    gotFirstG = 1;
+                    continue;
+                }
+            }
+            else if (gotFirstG == 1 && strncmp(command, "ET /", 4) == 0) {
+                strncpy(command, "GET", 4);
+                /* fall through to normal GET */
+            }
+           
+            if ( strncmp(command, "quit", 4) == 0) {
+                printf("client sent quit command: shutting down!\n");
+                shutDown = 1;
+                break;
+            }
+            if ( strncmp(command, "break", 5) == 0) {
+                printf("client sent break command: closing session!\n");
+                break;
+            }
+#ifdef SESSION_STATS
+            if ( strncmp(command, "printstats", 10) == 0) {
+                PrintSessionStats();
+                break;
+            }
+#endif
+            if ( strncmp(command, "GET", 3) == 0) {
+                char type[]   = "HTTP/1.0 200 ok\r\nContent-type:"
+                                " text/html\r\n\r\n";
+                char header[] = "\n
\n";
+                char body[]   = "greetings from CyaSSL\n";
+                char footer[] = "\r\n\r\n";
+            
+                strncpy(command, type, sizeof(type));
+                echoSz = sizeof(type) - 1;
+
+                strncpy(&command[echoSz], header, sizeof(header));
+                echoSz += (int)sizeof(header) - 1;
+                strncpy(&command[echoSz], body, sizeof(body));
+                echoSz += (int)sizeof(body) - 1;
+                strncpy(&command[echoSz], footer, sizeof(footer));
+                echoSz += (int)sizeof(footer);
+
+                if (CyaSSL_write(ssl, command, echoSz) != echoSz)
+                    err_sys("SSL_write failed");
+                break;
+            }
+            command[echoSz] = 0;
+
+            #ifdef ECHO_OUT
+                fputs(command, fout);
+            #endif
+
+            if (CyaSSL_write(ssl, command, echoSz) != echoSz)
+                err_sys("SSL_write failed");
+        }
+#ifndef CYASSL_DTLS
+        CyaSSL_shutdown(ssl);
+#endif
+        CyaSSL_free(ssl);
+        CloseSocket(clientfd);
+#ifdef CYASSL_DTLS
+        tcp_listen(&sockfd, &port, useAnyAddr, doDTLS);
+        SignalReady(args, port);
+#endif
+    }
+#ifdef CYASSL_CMSIS_RTOS
+    osDelay(5000) ;
+#endif
+    CloseSocket(sockfd);
+    CyaSSL_CTX_free(ctx);
+
+#ifdef ECHO_OUT
+    if (outCreated)
+        fclose(fout);
+#endif
+
+    ((func_args*)args)->return_code = 0;
+    return 0;
+}
+
+
+/* so overall tests can pull in test function */
+#ifndef NO_MAIN_DRIVER
+
+    int main(int argc, char** argv)
+    {
+        func_args args;
+
+#ifdef HAVE_CAVIUM
+        int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID);
+        if (ret != 0)
+            err_sys("Cavium OpenNitroxDevice failed");
+#endif /* HAVE_CAVIUM */
+
+        StartTCP();
+
+        args.argc = argc;
+        args.argv = argv;
+
+        CyaSSL_Init();
+#if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL)
+        CyaSSL_Debugging_ON();
+#endif
+        if (CurrentDir("echoserver") || CurrentDir("build"))
+            ChangeDirBack(2);
+        echoserver_test(&args);
+        CyaSSL_Cleanup();
+
+#ifdef HAVE_CAVIUM
+        CspShutdown(CAVIUM_DEV_ID);
+#endif
+        return args.return_code;
+    }
+
+        
+#endif /* NO_MAIN_DRIVER */
+
+
+
+
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/main.c b/IDE/MDK5-ARM/Projects/EchoServer/main.c
new file mode 100644
index 000000000..b02b5cb47
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/main.c
@@ -0,0 +1,99 @@
+/* main.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+ 
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+#include 
+
+#include "cmsis_os.h"
+#include "rl_fs.h" 
+#include "rl_net.h" 
+#include 
+#include "cyassl_MDK_ARM.h"
+#include 
+
+/*-----------------------------------------------------------------------------
+ *        Initialize a Flash Memory Card
+ *----------------------------------------------------------------------------*/
+static void init_filesystem (void) {
+    int32_t retv;
+
+    retv = finit ("M0:");
+    if (retv == 0) {
+        retv = fmount ("M0:");
+        if (retv == 0) {
+            printf ("Drive M0 ready!\n");
+        }
+        else {
+          printf ("Drive M0 mount failed!\n");
+        }
+    } else {
+        printf ("Drive M0 initialization failed!\n");
+    }
+}
+
+/*-----------------------------------------------------------------------------
+ *        TCP/IP tasks
+ *----------------------------------------------------------------------------*/
+void tcp_poll (void const *arg)
+{
+    CYASSL_MSG("TCP polling started.\n") ;
+    while (1) {
+        net_main ();
+        osDelay(1) ;
+    }
+}
+
+typedef struct func_args {
+    int    argc;
+    char** argv;
+} func_args;
+
+extern void echoserver_test(func_args * args) ;
+extern void init_time(void) ;
+
+    osThreadDef (tcp_poll, osPriorityHigh, 1, 0) ;
+/*-----------------------------------------------------------------------------
+ *       mian entry 
+ *----------------------------------------------------------------------------*/
+int myoptind = 0;
+char* myoptarg = NULL;
+
+int main() 
+{
+    void *arg = NULL ;
+    init_time() ;
+    init_filesystem ();
+    net_initialize() ;
+    osThreadCreate (osThread (tcp_poll), NULL); 
+    osDelay(10000) ;  /* wait for DHCP */
+    #if defined(DEBUG_CYASSL)
+        printf("Turning ON Debug message\n") ;
+        CyaSSL_Debugging_ON() ;
+    #endif
+
+        printf("echoserver: Started\n") ;
+    echoserver_test(args) ;
+    printf("echoserver: Terminated\n") ;
+}
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/Abstract.txt b/IDE/MDK5-ARM/Projects/SimpleClient/Abstract.txt
new file mode 100644
index 000000000..39ab9e9ef
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/Abstract.txt
@@ -0,0 +1,22 @@
+This program is a simple client example with CyaSSL/wolfCrypt library.
+
+In order to run this program,
+Copy {PACK}\wolfSSL\CyaSSL\2.8.0\cyassl\certs folder and files to the SD memory.
+Set config-SimpleClient.h configuration file for the Callee IP or Port number.
+
+For further configuration, refer config-Crypt.h and config-CyaSSL.h.
+
+When testing this client, it is recommended to test against one of the standard 
+CyaSSL example applications running on a desktop machine.  The standard CyaSSL 
+example applications are located in the CyaSSL root directory under the 
+/examples directory.
+
+For the hardware crypt on config-Crypt.h, download 
+STSW-STM32062: STM32F2xx standard peripherals library at 
+http://www.st.com/. Copy Libraries\STM32F2xx_StdPeriph_Driver\{inc,src} to 
+ {PACK}\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib
+
+
+Support
+-------
+Please send questions or comments to support@wolfssl.com
\ No newline at end of file
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/CMSIS/RTX_Conf_CM.c b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/CMSIS/RTX_Conf_CM.c
new file mode 100644
index 000000000..54b3e0bfc
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/CMSIS/RTX_Conf_CM.c
@@ -0,0 +1,276 @@
+/*----------------------------------------------------------------------------
+ *      RL-ARM - RTX
+ *----------------------------------------------------------------------------
+ *      Name:    RTX_Conf_CM.C
+ *      Purpose: Configuration of CMSIS RTX Kernel for Cortex-M
+ *      Rev.:    V4.70
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *  - Neither the name of ARM  nor the names of its contributors may be used 
+ *    to endorse or promote products derived from this software without 
+ *    specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *---------------------------------------------------------------------------*/
+
+#include "cmsis_os.h"
+
+
+/*----------------------------------------------------------------------------
+ *      RTX User configuration part BEGIN
+ *---------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
+//
+// Thread Configuration
+// =======================
+//
+//   Number of concurrent running threads <0-250>
+//    Defines max. number of threads that will run at the same time.
+//    Default: 6
+#ifndef OS_TASKCNT
+ #define OS_TASKCNT     5
+#endif
+
+//   Default Thread stack size [bytes] <64-4096:8><#/4>
+//    Defines default stack size for threads with osThreadDef stacksz = 0
+//    Default: 200
+#ifndef OS_STKSIZE
+ #define OS_STKSIZE     250
+#endif
+
+//   Main Thread stack size [bytes] <64-20000:8><#/4>
+//    Defines stack size for main thread.
+//    Default: 200
+#ifndef OS_MAINSTKSIZE
+ #define OS_MAINSTKSIZE 2000
+#endif
+
+//   Number of threads with user-provided stack size <0-250>
+//    Defines the number of threads with user-provided stack size.
+//    Default: 0
+#ifndef OS_PRIVCNT
+ #define OS_PRIVCNT     2
+#endif
+
+//   Total stack size [bytes] for threads with user-provided stack size <0-0x10000:8><#/4>
+//    Defines the combined stack size for threads with user-provided stack size.
+//    Default: 0
+#ifndef OS_PRIVSTKSIZE
+ #define OS_PRIVSTKSIZE 2500
+#endif
+
+// Check for stack overflow
+//  Includes the stack checking code for stack overflow.
+//  Note that additional code reduces the Kernel performance.
+#ifndef OS_STKCHECK
+ #define OS_STKCHECK    1
+#endif
+
+// Processor mode for thread execution 
+//   <0=> Unprivileged mode 
+//   <1=> Privileged mode
+//  Default: Privileged mode
+#ifndef OS_RUNPRIV
+ #define OS_RUNPRIV     1
+#endif
+
+// 
+
+// RTX Kernel Timer Tick Configuration
+// ======================================
+//  Use Cortex-M SysTick timer as RTX Kernel Timer
+//  Use the Cortex-M SysTick timer as a time-base for RTX.
+#ifndef OS_SYSTICK
+ #define OS_SYSTICK     1
+#endif
+//
+//   Timer clock value [Hz] <1-1000000000>
+//    Defines the timer clock value.
+//    Default: 12000000  (12MHz)
+#ifndef OS_CLOCK
+ #define OS_CLOCK       12000000
+#endif
+
+//   Timer tick value [us] <1-1000000>
+//    Defines the timer tick value.
+//    Default: 1000  (1ms)
+#ifndef OS_TICK
+ #define OS_TICK        1000
+#endif
+
+// 
+
+// System Configuration
+// =======================
+//
+// Round-Robin Thread switching
+// ===============================
+//
+//  Enables Round-Robin Thread switching.
+#ifndef OS_ROBIN
+ #define OS_ROBIN       1
+#endif
+
+//   Round-Robin Timeout [ticks] <1-1000>
+//    Defines how long a thread will execute before a thread switch.
+//    Default: 5
+#ifndef OS_ROBINTOUT
+ #define OS_ROBINTOUT   5
+#endif
+
+// 
+
+// User Timers
+// ==============
+//    Enables user Timers
+#ifndef OS_TIMERS
+ #define OS_TIMERS      1
+#endif
+
+//   Timer Thread Priority
+//                        <1=> Low
+//     <2=> Below Normal  <3=> Normal  <4=> Above Normal
+//                        <5=> High
+//                        <6=> Realtime (highest)
+//    Defines priority for Timer Thread
+//    Default: High
+#ifndef OS_TIMERPRIO
+ #define OS_TIMERPRIO   5
+#endif
+
+//   Timer Thread stack size [bytes] <64-64000:8><#/4>
+//    Defines stack size for Timer thread.
+//    Default: 200
+#ifndef OS_TIMERSTKSZ
+ #define OS_TIMERSTKSZ  50
+#endif
+
+//   Timer Callback Queue size <1-32>
+//    Number of concurrent active timer callback functions.
+//    Default: 4
+#ifndef OS_TIMERCBQS
+ #define OS_TIMERCBQS   4
+#endif
+
+// 
+
+//   ISR FIFO Queue size<4=>   4 entries  <8=>   8 entries
+//                         <12=> 12 entries  <16=> 16 entries
+//                         <24=> 24 entries  <32=> 32 entries
+//                         <48=> 48 entries  <64=> 64 entries
+//                         <96=> 96 entries
+//    ISR functions store requests to this buffer,
+//    when they are called from the interrupt handler.
+//    Default: 16 entries
+#ifndef OS_FIFOSZ
+ #define OS_FIFOSZ      16
+#endif
+
+// 
+
+//------------- <<< end of configuration section >>> -----------------------
+
+// Standard library system mutexes
+// ===============================
+//  Define max. number system mutexes that are used to protect 
+//  the arm standard runtime library. For microlib they are not used.
+#ifndef OS_MUTEXCNT
+ #define OS_MUTEXCNT    8
+#endif
+
+/*----------------------------------------------------------------------------
+ *      RTX User configuration part END
+ *---------------------------------------------------------------------------*/
+
+#define OS_TRV          ((uint32_t)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1)
+
+
+/*----------------------------------------------------------------------------
+ *      Global Functions
+ *---------------------------------------------------------------------------*/
+
+/*--------------------------- os_idle_demon ---------------------------------*/
+
+void os_idle_demon (void) {
+  /* The idle demon is a system thread, running when no other thread is      */
+  /* ready to run.                                                           */
+
+  for (;;) {
+    /* HERE: include optional user code to be executed when no thread runs.*/
+  }
+}
+
+#if (OS_SYSTICK == 0)   // Functions for alternative timer as RTX kernel timer
+
+/*--------------------------- os_tick_init ----------------------------------*/
+
+// Initialize alternative hardware timer as RTX kernel timer
+// Return: IRQ number of the alternative hardware timer
+int os_tick_init (void) {
+  return (-1);  /* Return IRQ number of timer (0..239) */
+}
+
+/*--------------------------- os_tick_val -----------------------------------*/
+
+// Get alternative hardware timer current value (0 .. OS_TRV)
+uint32_t os_tick_val (void) {
+  return (0);
+}
+
+/*--------------------------- os_tick_ovf -----------------------------------*/
+
+// Get alternative hardware timer overflow flag
+// Return: 1 - overflow, 0 - no overflow
+uint32_t os_tick_ovf (void) {
+  return (0);
+}
+
+/*--------------------------- os_tick_irqack --------------------------------*/
+
+// Acknowledge alternative hardware timer interrupt
+void os_tick_irqack (void) {
+  /* ... */
+}
+
+#endif   // (OS_SYSTICK == 0)
+
+/*--------------------------- os_error --------------------------------------*/
+
+void os_error (uint32_t err_code) {
+  /* This function is called when a runtime error is detected. Parameter */
+  /* 'err_code' holds the runtime error code (defined in RTL.H).         */
+
+  /* HERE: include optional code to be executed on runtime error. */
+  for (;;);
+}
+
+
+/*----------------------------------------------------------------------------
+ *      RTX Configuration Functions
+ *---------------------------------------------------------------------------*/
+
+#include "RTX_CM_lib.h"
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Device/STM32F207IG/RTE_Device.h b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Device/STM32F207IG/RTE_Device.h
new file mode 100644
index 000000000..4a09246f3
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Device/STM32F207IG/RTE_Device.h
@@ -0,0 +1,3127 @@
+/* -----------------------------------------------------------------------------
+ * Copyright (C) 2013 ARM Limited. All rights reserved.
+ *  
+ * $Date:        27. June 2013
+ * $Revision:    V1.01
+ *  
+ * Project:      RTE Device Configuration for ST STM32F2xx
+ * -------------------------------------------------------------------------- */
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+
+#define GPIO_PORT(num) \
+ ((num == 0) ? GPIOA : \
+  (num == 1) ? GPIOB : \
+  (num == 2) ? GPIOC : \
+  (num == 3) ? GPIOD : \
+  (num == 4) ? GPIOE : \
+  (num == 5) ? GPIOF : \
+  (num == 6) ? GPIOG : \
+  (num == 7) ? GPIOH : \
+  (num == 8) ? GPIOI : \
+  NULL)
+
+
+//  Clock Configuration
+//    High-speed Internal Clock <1-999999999>
+#define RTE_HSI                         16000000
+//    High-speed External Clock <1-999999999>
+#define RTE_HSE                         25000000
+//    System Clock <1-999999999>
+#define RTE_SYSCLK                      120000000
+//    AHB Clock    <1-999999999>
+#define RTE_HCLK                        120000000
+//    APB1 Clock   <1-999999999>
+#define RTE_PCLK1                       30000000
+//    APB2 Clock   <1-999999999>
+#define RTE_PCLK2                       60000000
+//       48MHz Clock
+#define RTE_PLL48CK                     48000000
+// 
+
+
+//  USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_UART1]
+//  Configuration settings for Driver_UART1 in component ::Drivers:UART
+#define RTE_USART1                      0
+
+//    USART1_TX Pin <0=>PA9 <1=>PB6
+#define RTE_USART1_TX_ID                0
+#if    (RTE_USART1_TX_ID == 0)
+#define RTE_USART1_TX_PORT              GPIOA
+#define RTE_USART1_TX_BIT               9
+#elif  (RTE_USART1_TX_ID == 1)
+#define RTE_USART1_TX_PORT              GPIOB
+#define RTE_USART1_TX_BIT               6
+#else
+#error "Invalid USART1_TX Pin Configuration!"
+#endif
+
+//    USART1_RX Pin <0=>PA10 <1=>PB7
+#define RTE_USART1_RX_ID                0
+#if    (RTE_USART1_RX_ID == 0)
+#define RTE_USART1_RX_PORT              GPIOA
+#define RTE_USART1_RX_BIT               10
+#elif  (RTE_USART1_RX_ID == 1)
+#define RTE_USART1_RX_PORT              GPIOB
+#define RTE_USART1_RX_BIT               7
+#else
+#error "Invalid USART1_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART1_CK Pin <0=>PA8
+//     
+#define RTE_USART1_CK                   0
+#define RTE_USART1_CK_ID                0
+#if    (RTE_USART1_CK_ID == 0)
+#define RTE_USART1_CK_PORT              GPIOA
+#define RTE_USART1_CK_BIT               8
+#else
+#error "Invalid USART1_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART1_CTS Pin <0=>PA11
+//        USART1_RTS Pin <0=>PA12
+//        Manual CTS/RTS
+//     
+#define RTE_USART1_HW_FLOW              0
+#define RTE_USART1_CTS_ID               0
+#define RTE_USART1_RTS_ID               0
+#define RTE_USART1_MANUAL_FLOW          0
+#if    (RTE_USART1_CTS_ID == 0)
+#define RTE_USART1_CTS_PORT             GPIOA
+#define RTE_USART1_CTS_BIT              11
+#else
+#error "Invalid USART1_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART1_RTS_ID == 0)
+#define RTE_USART1_RTS_PORT             GPIOA
+#define RTE_USART1_RTS_BIT              12
+#else
+#error "Invalid USART1_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <2=>2 <5=>5
+//       Selects DMA Stream (only Stream 2 or 5 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART1_RX_DMA               1
+#define RTE_USART1_RX_DMA_NUMBER        2
+#define RTE_USART1_RX_DMA_STREAM        2
+#define RTE_USART1_RX_DMA_CHANNEL       4
+#define RTE_USART1_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <7=>7
+//       Selects DMA Stream (only Stream 7 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART1_TX_DMA               1
+#define RTE_USART1_TX_DMA_NUMBER        2
+#define RTE_USART1_TX_DMA_STREAM        7
+#define RTE_USART1_TX_DMA_CHANNEL       4
+#define RTE_USART1_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_UART2]
+//  Configuration settings for Driver_UART2 in component ::Drivers:UART
+#define RTE_USART2                      0
+
+//    USART2_TX Pin <0=>PA2 <1=>PD5
+#define RTE_USART2_TX_ID                0
+#if    (RTE_USART2_TX_ID == 0)
+#define RTE_USART2_TX_PORT              GPIOA
+#define RTE_USART2_TX_BIT               2
+#elif  (RTE_USART2_TX_ID == 1)
+#define RTE_USART2_TX_PORT              GPIOD
+#define RTE_USART2_TX_BIT               5
+#else
+#error "Invalid USART2_TX Pin Configuration!"
+#endif
+
+//    USART2_RX Pin <0=>PA3 <1=>PD6
+#define RTE_USART2_RX_ID                0
+#if    (RTE_USART2_RX_ID == 0)
+#define RTE_USART2_RX_PORT              GPIOA
+#define RTE_USART2_RX_BIT               3
+#elif  (RTE_USART2_RX_ID == 1)
+#define RTE_USART2_RX_PORT              GPIOD
+#define RTE_USART2_RX_BIT               6
+#else
+#error "Invalid USART2_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART2_CK Pin <0=>PA4 <1=>PD7
+//     
+#define RTE_USART2_CK                   0
+#define RTE_USART2_CK_ID                0
+#if    (RTE_USART2_CK_ID == 0)
+#define RTE_USART2_CK_PORT              GPIOA
+#define RTE_USART2_CK_BIT               4
+#elif  (RTE_USART2_CK_ID == 1)
+#define RTE_USART2_CK_PORT              GPIOD
+#define RTE_USART2_CK_BIT               7
+#else
+#error "Invalid USART2_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART2_CTS Pin <0=>PA0 <1=>PD3
+//        USART2_RTS Pin <0=>PA1 <1=>PD4
+//        Manual CTS/RTS
+//     
+#define RTE_USART2_HW_FLOW              0
+#define RTE_USART2_CTS_ID               0
+#define RTE_USART2_RTS_ID               0
+#define RTE_USART2_MANUAL_FLOW          0
+#if    (RTE_USART2_CTS_ID == 0)
+#define RTE_USART2_CTS_PORT             GPIOA
+#define RTE_USART2_CTS_BIT              0
+#elif  (RTE_USART2_CTS_ID == 1)
+#define RTE_USART2_CTS_PORT             GPIOD
+#define RTE_USART2_CTS_BIT              3
+#else
+#error "Invalid USART2_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART2_RTS_ID == 0)
+#define RTE_USART2_RTS_PORT             GPIOA
+#define RTE_USART2_RTS_BIT              1
+#elif  (RTE_USART2_RTS_ID == 1)
+#define RTE_USART2_RTS_PORT             GPIOD
+#define RTE_USART2_RTS_BIT              4
+#else
+#error "Invalid USART2_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <5=>5
+//       Selects DMA Stream (only Stream 5 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART2_RX_DMA               1
+#define RTE_USART2_RX_DMA_NUMBER        1
+#define RTE_USART2_RX_DMA_STREAM        5
+#define RTE_USART2_RX_DMA_CHANNEL       4
+#define RTE_USART2_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <6=>6
+//       Selects DMA Stream (only Stream 6 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART2_TX_DMA               1
+#define RTE_USART2_TX_DMA_NUMBER        1
+#define RTE_USART2_TX_DMA_STREAM        6
+#define RTE_USART2_TX_DMA_CHANNEL       4
+#define RTE_USART2_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_UART3]
+//  Configuration settings for Driver_UART3 in component ::Drivers:UART
+#define RTE_USART3                      0
+
+//    USART3_TX Pin <0=>PB10 <1=>PC10 <2=>PD8
+#define RTE_USART3_TX_ID                0
+#if    (RTE_USART3_TX_ID == 0)
+#define RTE_USART3_TX_PORT              GPIOB
+#define RTE_USART3_TX_BIT               10
+#elif  (RTE_USART3_TX_ID == 1)
+#define RTE_USART3_TX_PORT              GPIOC
+#define RTE_USART3_TX_BIT               10
+#elif  (RTE_USART3_TX_ID == 2)
+#define RTE_USART3_TX_PORT              GPIOD
+#define RTE_USART3_TX_BIT               8
+#else
+#error "Invalid USART3_TX Pin Configuration!"
+#endif
+
+//    USART3_RX Pin <0=>PB11 <1=>PC11 <2=>PD9
+#define RTE_USART3_RX_ID                0
+#if    (RTE_USART3_RX_ID == 0)
+#define RTE_USART3_RX_PORT              GPIOB
+#define RTE_USART3_RX_BIT               11
+#elif  (RTE_USART3_RX_ID == 1)
+#define RTE_USART3_RX_PORT              GPIOC
+#define RTE_USART3_RX_BIT               11
+#elif  (RTE_USART3_RX_ID == 2)
+#define RTE_USART3_RX_PORT              GPIOD
+#define RTE_USART3_RX_BIT               9
+#else
+#error "Invalid USART3_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART3_CK Pin <0=>PB12 <1=>PC12 <2=>PD10
+//     
+#define RTE_USART3_CK                   0
+#define RTE_USART3_CK_ID                0
+#if    (RTE_USART3_CK_ID == 0)
+#define RTE_USART3_CK_PORT              GPIOB
+#define RTE_USART3_CK_BIT               12
+#elif  (RTE_USART3_CK_ID == 1)
+#define RTE_USART3_CK_PORT              GPIOC
+#define RTE_USART3_CK_BIT               12
+#elif  (RTE_USART3_CK_ID == 2)
+#define RTE_USART3_CK_PORT              GPIOD
+#define RTE_USART3_CK_BIT               10
+#else
+#error "Invalid USART3_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART3_CTS Pin <0=>PB13 <1=>PD11
+//        USART3_RTS Pin <0=>PB14 <1=>PD12
+//        Manual CTS/RTS
+//     
+#define RTE_USART3_HW_FLOW              0
+#define RTE_USART3_CTS_ID               0
+#define RTE_USART3_RTS_ID               0
+#define RTE_USART3_MANUAL_FLOW          0
+#if    (RTE_USART3_CTS_ID == 0)
+#define RTE_USART3_CTS_PORT             GPIOB
+#define RTE_USART3_CTS_BIT              13
+#elif  (RTE_USART3_CTS_ID == 1)
+#define RTE_USART3_CTS_PORT             GPIOD
+#define RTE_USART3_CTS_BIT              11
+#else
+#error "Invalid USART3_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART3_RTS_ID == 0)
+#define RTE_USART3_RTS_PORT             GPIOB
+#define RTE_USART3_RTS_BIT              14
+#elif  (RTE_USART3_RTS_ID == 1)
+#define RTE_USART3_RTS_PORT             GPIOD
+#define RTE_USART3_RTS_BIT              12
+#else
+#error "Invalid USART3_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <1=>1
+//       Selects DMA Stream (only Stream 1 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART3_RX_DMA               1
+#define RTE_USART3_RX_DMA_NUMBER        1
+#define RTE_USART3_RX_DMA_STREAM        1
+#define RTE_USART3_RX_DMA_CHANNEL       4
+#define RTE_USART3_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <3=>3
+//       Selects DMA Stream (only Stream 3 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART3_TX_DMA               1
+#define RTE_USART3_TX_DMA_NUMBER        1
+#define RTE_USART3_TX_DMA_STREAM        3
+#define RTE_USART3_TX_DMA_CHANNEL       4
+#define RTE_USART3_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  UART4 (Universal asynchronous receiver transmitter) [Driver_UART4]
+//  Configuration settings for Driver_UART4 in component ::Drivers:UART
+#define RTE_UART4                       0
+
+//    UART4_TX Pin <0=>PA0 <1=>PC10
+#define RTE_UART4_TX_ID                 0
+#if    (RTE_UART4_TX_ID == 0)
+#define RTE_UART4_TX_PORT               GPIOA
+#define RTE_UART4_TX_BIT                0
+#elif  (RTE_UART4_TX_ID == 1)
+#define RTE_UART4_TX_PORT               GPIOC
+#define RTE_UART4_TX_BIT                10
+#else
+#error "Invalid UART4_TX Pin Configuration!"
+#endif
+
+//    UART4_RX Pin <0=>PA1 <1=>PC11
+#define RTE_UART4_RX_ID                 0
+#if    (RTE_UART4_RX_ID == 0)
+#define RTE_UART4_RX_PORT               GPIOA
+#define RTE_UART4_RX_BIT                1
+#elif  (RTE_UART4_RX_ID == 1)
+#define RTE_UART4_RX_PORT               GPIOC
+#define RTE_UART4_RX_BIT                11
+#else
+#error "Invalid UART4_RX Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2
+//       Selects DMA Stream (only Stream 2 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART4_RX_DMA                1
+#define RTE_UART4_RX_DMA_NUMBER         1
+#define RTE_UART4_RX_DMA_STREAM         2
+#define RTE_UART4_RX_DMA_CHANNEL        4
+#define RTE_UART4_RX_DMA_PRIORITY       0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <4=>4
+//       Selects DMA Stream (only Stream 4 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART4_TX_DMA                1
+#define RTE_UART4_TX_DMA_NUMBER         1
+#define RTE_UART4_TX_DMA_STREAM         4
+#define RTE_UART4_TX_DMA_CHANNEL        4
+#define RTE_UART4_TX_DMA_PRIORITY       0
+
+// 
+
+
+//  UART5 (Universal asynchronous receiver transmitter) [Driver_UART5]
+//  Configuration settings for Driver_UART5 in component ::Drivers:UART
+#define RTE_UART5                       0
+
+//    UART5_TX Pin <0=>PC12
+#define RTE_UART5_TX_ID                 0
+#if    (RTE_UART5_TX_ID == 0)
+#define RTE_UART5_TX_PORT               GPIOC
+#define RTE_UART5_TX_BIT                12
+#else
+#error "Invalid UART5_TX Pin Configuration!"
+#endif
+
+//    UART5_RX Pin <0=>PD2
+#define RTE_UART5_RX_ID                 0
+#if    (RTE_UART5_RX_ID == 0)
+#define RTE_UART5_RX_PORT               GPIOD
+#define RTE_UART5_RX_BIT                2
+#else
+#error "Invalid UART5_RX Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <0=>0
+//       Selects DMA Stream (only Stream 0 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART5_RX_DMA                1
+#define RTE_UART5_RX_DMA_NUMBER         1
+#define RTE_UART5_RX_DMA_STREAM         0
+#define RTE_UART5_RX_DMA_CHANNEL        4
+#define RTE_UART5_RX_DMA_PRIORITY       0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <7=>7
+//       Selects DMA Stream (only Stream 7 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART5_TX_DMA                1
+#define RTE_UART5_TX_DMA_NUMBER         1
+#define RTE_UART5_TX_DMA_STREAM         7
+#define RTE_UART5_TX_DMA_CHANNEL        4
+#define RTE_UART5_TX_DMA_PRIORITY       0
+
+// 
+
+
+//  USART6 (Universal synchronous asynchronous receiver transmitter) [Driver_UART6]
+//  Configuration settings for Driver_UART6 in component ::Drivers:UART
+#define RTE_USART6                      0
+
+//    USART6_TX Pin <0=>PC6 <1=>PG14
+#define RTE_USART6_TX_ID                0
+#if    (RTE_USART6_TX_ID == 0)
+#define RTE_USART6_TX_PORT              GPIOC
+#define RTE_USART6_TX_BIT               6
+#elif  (RTE_USART6_TX_ID == 1)
+#define RTE_USART6_TX_PORT              GPIOG
+#define RTE_USART6_TX_BIT               14
+#else
+#error "Invalid USART6_TX Pin Configuration!"
+#endif
+
+//    USART6_RX Pin <0=>PC7 <1=>PG9
+#define RTE_USART6_RX_ID                0
+#if    (RTE_USART6_RX_ID == 0)
+#define RTE_USART6_RX_PORT              GPIOC
+#define RTE_USART6_RX_BIT               7
+#elif  (RTE_USART6_RX_ID == 1)
+#define RTE_USART6_RX_PORT              GPIOG
+#define RTE_USART6_RX_BIT               9
+#else
+#error "Invalid USART6_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART6_CK Pin <0=>PC8 <1=>PG7
+//     
+#define RTE_USART6_CK                   0
+#define RTE_USART6_CK_ID                0
+#if    (RTE_USART6_CK_ID == 0)
+#define RTE_USART6_CK_PORT              GPIOC
+#define RTE_USART6_CK_BIT               8
+#elif  (RTE_USART6_CK_ID == 1)
+#define RTE_USART6_CK_PORT              GPIOG
+#define RTE_USART6_CK_BIT               7
+#else
+#error "Invalid USART6_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART6_CTS Pin <0=>PG13 <1=>PG15
+//        USART6_RTS Pin <0=>PG8  <1=>PG12
+//        Manual CTS/RTS
+//     
+#define RTE_USART6_HW_FLOW              0
+#define RTE_USART6_CTS_ID               0
+#define RTE_USART6_RTS_ID               0
+#define RTE_USART6_MANUAL_FLOW          0
+#if    (RTE_USART6_CTS_ID == 0)
+#define RTE_USART6_CTS_PORT             GPIOG
+#define RTE_USART6_CTS_BIT              13
+#elif  (RTE_USART6_CTS_ID == 1)
+#define RTE_USART6_CTS_PORT             GPIOG
+#define RTE_USART6_CTS_BIT              15
+#else
+#error "Invalid USART6_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART6_RTS_ID == 0)
+#define RTE_USART6_RTS_PORT             GPIOG
+#define RTE_USART6_RTS_BIT              8
+#elif  (RTE_USART6_RTS_ID == 1)
+#define RTE_USART6_RTS_PORT             GPIOG
+#define RTE_USART6_RTS_BIT              12
+#else
+#error "Invalid USART6_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <1=>1 <2=>2
+//       Selects DMA Stream (only Stream 1 or 2 can be used)
+//      Channel <5=>5
+//       Selects DMA Channel (only Channel 5 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART6_RX_DMA               1
+#define RTE_USART6_RX_DMA_NUMBER        2
+#define RTE_USART6_RX_DMA_STREAM        1
+#define RTE_USART6_RX_DMA_CHANNEL       5
+#define RTE_USART6_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <6=>6 <7=>7
+//       Selects DMA Stream (only Stream 6 or 7 can be used)
+//      Channel <5=>5
+//       Selects DMA Channel (only Channel 5 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART6_TX_DMA               1
+#define RTE_USART6_TX_DMA_NUMBER        2
+#define RTE_USART6_TX_DMA_STREAM        6
+#define RTE_USART6_TX_DMA_CHANNEL       5
+#define RTE_USART6_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  I2C1 (Inter-integrated Circuit Interface 1) [Driver_I2C1]
+//  Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        0
+
+//    I2C1_SCL Pin <0=>PB6 <1=>PB8
+#define RTE_I2C1_SCL_PORT_ID            0
+#if    (RTE_I2C1_SCL_PORT_ID == 0)
+#define RTE_I2C1_SCL_PORT               GPIOB
+#define RTE_I2C1_SCL_BIT                6
+#elif  (RTE_I2C1_SCL_PORT_ID == 1)
+#define RTE_I2C1_SCL_PORT               GPIOB
+#define RTE_I2C1_SCL_BIT                8
+#else
+#error "Invalid I2C1_SCL Pin Configuration!"
+#endif
+
+//    I2C1_SDA Pin <0=>PB7 <1=>PB9
+#define RTE_I2C1_SDA_PORT_ID            0
+#if    (RTE_I2C1_SDA_PORT_ID == 0)
+#define RTE_I2C1_SDA_PORT               GPIOB
+#define RTE_I2C1_SDA_BIT                7
+#elif  (RTE_I2C1_SDA_PORT_ID == 1)
+#define RTE_I2C1_SDA_PORT               GPIOB
+#define RTE_I2C1_SDA_BIT                9
+#else
+#error "Invalid I2C1_SDA Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <0=>0 <5=>5
+//       Selects DMA Stream (only Stream 0 or 5 can be used)
+//      Channel <1=>1
+//       Selects DMA Channel (only Channel 1 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C1_RX_DMA                 1
+#define RTE_I2C1_RX_DMA_NUMBER          1
+#define RTE_I2C1_RX_DMA_STREAM          0
+#define RTE_I2C1_RX_DMA_CHANNEL         1
+#define RTE_I2C1_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <6=>6 <7=>7
+//       Selects DMA Stream (only Stream 6 or 7 can be used)
+//      Channel <1=>1
+//       Selects DMA Channel (only Channel 1 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C1_TX_DMA                 1
+#define RTE_I2C1_TX_DMA_NUMBER          1
+#define RTE_I2C1_TX_DMA_STREAM          6
+#define RTE_I2C1_TX_DMA_CHANNEL         1
+#define RTE_I2C1_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  I2C2 (Inter-integrated Circuit Interface 2) [Driver_I2C2]
+//  Configuration settings for Driver_I2C2 in component ::Drivers:I2C
+#define RTE_I2C2                        0
+
+//    I2C2_SCL Pin <0=>PF1 <1=>PH4 <2=>PB10
+#define RTE_I2C2_SCL_PORT_ID            0
+#if    (RTE_I2C2_SCL_PORT_ID == 0)
+#define RTE_I2C2_SCL_PORT               GPIOF
+#define RTE_I2C2_SCL_BIT                1
+#elif  (RTE_I2C2_SCL_PORT_ID == 1)
+#define RTE_I2C2_SCL_PORT               GPIOH
+#define RTE_I2C2_SCL_BIT                4
+#elif  (RTE_I2C2_SCL_PORT_ID == 2)
+#define RTE_I2C2_SCL_PORT               GPIOB
+#define RTE_I2C2_SCL_BIT                10
+#else
+#error "Invalid I2C2_SCL Pin Configuration!"
+#endif
+
+//    I2C2_SDA Pin <0=>PF0 <1=>PH5 <2=>PB11
+#define RTE_I2C2_SDA_PORT_ID            0
+#if    (RTE_I2C2_SDA_PORT_ID == 0)
+#define RTE_I2C2_SDA_PORT               GPIOF
+#define RTE_I2C2_SDA_BIT                0
+#elif  (RTE_I2C2_SDA_PORT_ID == 1)
+#define RTE_I2C2_SDA_PORT               GPIOH
+#define RTE_I2C2_SDA_BIT                5
+#elif  (RTE_I2C2_SDA_PORT_ID == 2)
+#define RTE_I2C2_SDA_PORT               GPIOB
+#define RTE_I2C2_SDA_BIT                11
+#else
+#error "Invalid I2C2_SCL Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2 <3=>3
+//       Selects DMA Stream (only Stream 2 or 3 can be used)
+//      Channel <7=>7
+//       Selects DMA Channel (only Channel 7 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C2_RX_DMA                 1
+#define RTE_I2C2_RX_DMA_NUMBER          1
+#define RTE_I2C2_RX_DMA_STREAM          2
+#define RTE_I2C2_RX_DMA_CHANNEL         7
+#define RTE_I2C2_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <7=>7
+//       Selects DMA Stream (only Stream 7 can be used)
+//      Channel <7=>7
+//       Selects DMA Channel (only Channel 1 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C2_TX_DMA                 1
+#define RTE_I2C2_TX_DMA_NUMBER          1
+#define RTE_I2C2_TX_DMA_STREAM          7
+#define RTE_I2C2_TX_DMA_CHANNEL         7
+#define RTE_I2C2_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  I2C3 (Inter-integrated Circuit Interface 3) [Driver_I2C3]
+//  Configuration settings for Driver_I2C3 in component ::Drivers:I2C
+#define RTE_I2C3                        0
+
+//    I2C3_SCL Pin <0=>PH7 <1=>PA8
+#define RTE_I2C3_SCL_PORT_ID            0
+#if    (RTE_I2C3_SCL_PORT_ID == 0)
+#define RTE_I2C3_SCL_PORT               GPIOH
+#define RTE_I2C3_SCL_BIT                7
+#elif  (RTE_I2C3_SCL_PORT_ID == 1)
+#define RTE_I2C3_SCL_PORT               GPIOA
+#define RTE_I2C3_SCL_BIT                8
+#else
+#error "Invalid I2C3_SCL Pin Configuration!"
+#endif
+
+//    I2C3_SDA Pin <0=>PH8 <1=>PC9
+#define RTE_I2C3_SDA_PORT_ID            0
+#if    (RTE_I2C3_SDA_PORT_ID == 0)
+#define RTE_I2C3_SDA_PORT               GPIOH
+#define RTE_I2C3_SDA_BIT                8
+#elif  (RTE_I2C3_SDA_PORT_ID == 1)
+#define RTE_I2C3_SDA_PORT               GPIOC
+#define RTE_I2C3_SDA_BIT                9
+#else
+#error "Invalid I2C3_SCL Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2
+//       Selects DMA Stream (only Stream 2 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C3_RX_DMA                 1
+#define RTE_I2C3_RX_DMA_NUMBER          1
+#define RTE_I2C3_RX_DMA_STREAM          2
+#define RTE_I2C3_RX_DMA_CHANNEL         3
+#define RTE_I2C3_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <4=>4
+//       Selects DMA Stream (only Stream 4 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C3_TX_DMA                 1
+#define RTE_I2C3_TX_DMA_NUMBER          1
+#define RTE_I2C3_TX_DMA_STREAM          4
+#define RTE_I2C3_TX_DMA_CHANNEL         3
+#define RTE_I2C3_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SPI1 (Serial Peripheral Interface 1) [Driver_SPI1]
+//  Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        0
+
+//    SPI1_NSS Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SPI1_NSS_PIN                1
+#define RTE_SPI1_NSS_PORT               GPIO_PORT(0)
+#define RTE_SPI1_NSS_BIT                4
+
+//    SPI1_SCK Pin <0=>PA5 <1=>PB3
+#define RTE_SPI1_SCL_PORT_ID            0
+#if    (RTE_SPI1_SCL_PORT_ID == 0)
+#define RTE_SPI1_SCL_PORT               GPIOA
+#define RTE_SPI1_SCL_BIT                5
+#elif  (RTE_SPI1_SCL_PORT_ID == 1)
+#define RTE_SPI1_SCL_PORT               GPIOB
+#define RTE_SPI1_SCL_BIT                3
+#else
+#error "Invalid SPI1_SCK Pin Configuration!"
+#endif
+
+//    SPI1_MISO Pin <0=>PA6 <1=>PB4
+#define RTE_SPI1_MISO_PORT_ID           0
+#if    (RTE_SPI1_MISO_PORT_ID == 0)
+#define RTE_SPI1_MISO_PORT              GPIOA
+#define RTE_SPI1_MISO_BIT               6
+#elif  (RTE_SPI1_MISO_PORT_ID == 1)
+#define RTE_SPI1_MISO_PORT              GPIOB
+#define RTE_SPI1_MISO_BIT               4
+#else
+#error "Invalid SPI1_MISO Pin Configuration!"
+#endif
+
+//    SPI1_MOSI Pin <0=>PA7 <1=>PB5
+#define RTE_SPI1_MOSI_PORT_ID           0
+#if    (RTE_SPI1_MOSI_PORT_ID == 0)
+#define RTE_SPI1_MOSI_PORT              GPIOA
+#define RTE_SPI1_MOSI_BIT               7
+#elif  (RTE_SPI1_MOSI_PORT_ID == 1)
+#define RTE_SPI1_MOSI_PORT              GPIOB
+#define RTE_SPI1_MOSI_BIT               5
+#else
+#error "Invalid SPI1_MISO Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <0=>0 <2=>2
+//       Selects DMA Stream (only Stream 0 or 2 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI1_RX_DMA                 1
+#define RTE_SPI1_RX_DMA_NUMBER          2
+#define RTE_SPI1_RX_DMA_STREAM          0
+#define RTE_SPI1_RX_DMA_CHANNEL         3
+#define RTE_SPI1_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <3=>3 <5=>5
+//       Selects DMA Stream (only Stream 3 or 5 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI1_TX_DMA                 1
+#define RTE_SPI1_TX_DMA_NUMBER          2
+#define RTE_SPI1_TX_DMA_STREAM          5
+#define RTE_SPI1_TX_DMA_CHANNEL         3
+#define RTE_SPI1_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SPI2 (Serial Peripheral Interface 2) [Driver_SPI2]
+//  Configuration settings for Driver_SPI2 in component ::Drivers:SPI
+#define RTE_SPI2                        0
+
+//    SPI2_NSS Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SPI2_NSS_PIN                1
+#define RTE_SPI2_NSS_PORT               GPIO_PORT(1)
+#define RTE_SPI2_NSS_BIT                12
+
+//    SPI2_SCK Pin <0=>PB10 <1=>PB13 <2=>PI1
+#define RTE_SPI2_SCL_PORT_ID            0
+#if    (RTE_SPI2_SCL_PORT_ID == 0)
+#define RTE_SPI2_SCL_PORT               GPIOB
+#define RTE_SPI2_SCL_BIT                10
+#elif  (RTE_SPI2_SCL_PORT_ID == 1)
+#define RTE_SPI2_SCL_PORT               GPIOB
+#define RTE_SPI2_SCL_BIT                13
+#elif  (RTE_SPI2_SCL_PORT_ID == 2)
+#define RTE_SPI2_SCL_PORT               GPIOI
+#define RTE_SPI2_SCL_BIT                1
+#else
+#error "Invalid SPI2_SCK Pin Configuration!"
+#endif
+
+//    SPI2_MISO Pin <0=>PB14 <1=>PC2 <2=>PI2
+#define RTE_SPI2_MISO_PORT_ID           0
+#if    (RTE_SPI2_MISO_PORT_ID == 0)
+#define RTE_SPI2_MISO_PORT              GPIOB
+#define RTE_SPI2_MISO_BIT               14
+#elif  (RTE_SPI2_MISO_PORT_ID == 1)
+#define RTE_SPI2_MISO_PORT              GPIOC
+#define RTE_SPI2_MISO_BIT               2
+#elif  (RTE_SPI2_MISO_PORT_ID == 2)
+#define RTE_SPI2_MISO_PORT              GPIOI
+#define RTE_SPI2_MISO_BIT               2
+#else
+#error "Invalid SPI2_MISO Pin Configuration!"
+#endif
+
+//    SPI2_MOSI Pin <0=>PB15 <1=>PC3 <2=>OI3
+#define RTE_SPI2_MOSI_PORT_ID           0
+#if    (RTE_SPI2_MOSI_PORT_ID == 0)
+#define RTE_SPI2_MOSI_PORT              GPIOB
+#define RTE_SPI2_MOSI_BIT               15
+#elif  (RTE_SPI2_MOSI_PORT_ID == 1)
+#define RTE_SPI2_MOSI_PORT              GPIOC
+#define RTE_SPI2_MOSI_BIT               3
+#elif  (RTE_SPI2_MOSI_PORT_ID == 2)
+#define RTE_SPI2_MOSI_PORT              GPIOI
+#define RTE_SPI2_MOSI_BIT               3
+#else
+#error "Invalid SPI2_MISO Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2
+//       Selects DMA Stream (only Stream 2 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI2_RX_DMA                 1
+#define RTE_SPI2_RX_DMA_NUMBER          1
+#define RTE_SPI2_RX_DMA_STREAM          2
+#define RTE_SPI2_RX_DMA_CHANNEL         0
+#define RTE_SPI2_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <3=>3
+//       Selects DMA Stream (only Stream 3 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI2_TX_DMA                 1
+#define RTE_SPI2_TX_DMA_NUMBER          1
+#define RTE_SPI2_TX_DMA_STREAM          3
+#define RTE_SPI2_TX_DMA_CHANNEL         0
+#define RTE_SPI2_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SPI3 (Serial Peripheral Interface 3) [Driver_SPI3]
+//  Configuration settings for Driver_SPI3 in component ::Drivers:SPI
+#define RTE_SPI3                        0
+
+//    SPI3_NSS Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SPI3_NSS_PIN                1
+#define RTE_SPI3_NSS_PORT               GPIO_PORT(0)
+#define RTE_SPI3_NSS_BIT                15
+
+//    SPI3_SCK Pin <0=>PB3 <1=>PC10
+#define RTE_SPI3_SCL_PORT_ID            0
+#if    (RTE_SPI3_SCL_PORT_ID == 0)
+#define RTE_SPI3_SCL_PORT               GPIOB
+#define RTE_SPI3_SCL_BIT                3
+#elif  (RTE_SPI3_SCL_PORT_ID == 1)
+#define RTE_SPI3_SCL_PORT               GPIOC
+#define RTE_SPI3_SCL_BIT                10
+#else
+#error "Invalid SPI3_SCK Pin Configuration!"
+#endif
+
+//    SPI3_MISO Pin <0=>PB4 <1=>PC11
+#define RTE_SPI3_MISO_PORT_ID           0
+#if    (RTE_SPI3_MISO_PORT_ID == 0)
+#define RTE_SPI3_MISO_PORT              GPIOB
+#define RTE_SPI3_MISO_BIT               4
+#elif  (RTE_SPI3_MISO_PORT_ID == 1)
+#define RTE_SPI3_MISO_PORT              GPIOC
+#define RTE_SPI3_MISO_BIT               11
+#else
+#error "Invalid SPI3_MISO Pin Configuration!"
+#endif
+
+//    SPI3_MOSI Pin <0=>PB5 <1=>PC12
+#define RTE_SPI3_MOSI_PORT_ID           0
+#if    (RTE_SPI3_MOSI_PORT_ID == 0)
+#define RTE_SPI3_MOSI_PORT              GPIOB
+#define RTE_SPI3_MOSI_BIT               5
+#elif  (RTE_SPI3_MOSI_PORT_ID == 1)
+#define RTE_SPI3_MOSI_PORT              GPIOC
+#define RTE_SPI3_MOSI_BIT               12
+#else
+#error "Invalid SPI3_MISO Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <0=>0 <2=>2
+//       Selects DMA Stream (only Stream 0 or 2 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI3_RX_DMA                 1
+#define RTE_SPI3_RX_DMA_NUMBER          1
+#define RTE_SPI3_RX_DMA_STREAM          0
+#define RTE_SPI3_RX_DMA_CHANNEL         0
+#define RTE_SPI3_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <5=>5 <7=>7
+//       Selects DMA Stream (only Stream 5 or 7 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI3_TX_DMA                 1
+#define RTE_SPI3_TX_DMA_NUMBER          1
+#define RTE_SPI3_TX_DMA_STREAM          5
+#define RTE_SPI3_TX_DMA_CHANNEL         0
+#define RTE_SPI3_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SDIO (Secure Digital Input/Output) [Driver_MCI0]
+//  Configuration settings for Driver_MCI0 in component ::Drivers:MCI
+#define RTE_SDIO                        1
+
+//    SDIO_CD (Card Detect) Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Active State <0=>Low <1=>High
+//       Selects Active State Logical Level
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SDIO_CD_PIN                 1
+#define RTE_SDIO_CD_ACTIVE              0
+#define RTE_SDIO_CD_PORT                GPIO_PORT(7)
+#define RTE_SDIO_CD_BIT                 15
+
+//    SDIO_WP (Write Protect) Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Active State <0=>Low <1=>High
+//       Selects Active State Logical Level
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SDIO_WP_PIN                 0
+#define RTE_SDIO_WP_ACTIVE              0
+#define RTE_SDIO_WP_PORT                GPIO_PORT(7)
+#define RTE_SDIO_WP_BIT                 16
+
+//    SDIO Bus
+//      SDIO_CK Pin <0=>PC12
+#define RTE_SDIO_CK_PORT_ID             0
+#if    (RTE_SDIO_CK_PORT_ID == 0)
+#define RTE_SDIO_CK_PORT                GPIOC
+#define RTE_SDIO_CK_PIN                 12
+#else
+#error "Invalid SDIO_CK Pin Configuration!"
+#endif
+//      SDIO_CMD Pin <0=>PD2
+#define RTE_SDIO_CMD_PORT_ID            0
+#if    (RTE_SDIO_CMD_PORT_ID == 0)
+#define RTE_SDIO_CMD_PORT               GPIOD
+#define RTE_SDIO_CMD_PIN                2
+#else
+#error "Invalid SDIO_CDM Pin Configuration!"
+#endif
+//      SDIO_D0 Pin <0=>PC8
+#define RTE_SDIO_D0_PORT_ID             0
+#if    (RTE_SDIO_D0_PORT_ID == 0)
+#define RTE_SDIO_D0_PORT                GPIOC
+#define RTE_SDIO_D0_PIN                 8
+#else
+#error "Invalid SDIO_D0 Pin Configuration!"
+#endif
+//      SDIO_D1 Pin <0=>PC9
+#define RTE_SDIO_D1_PORT_ID             0
+#if    (RTE_SDIO_D1_PORT_ID == 0)
+#define RTE_SDIO_D1_PORT                GPIOC
+#define RTE_SDIO_D1_PIN                 9
+#else
+#error "Invalid SDIO_D1 Pin Configuration!"
+#endif
+//      SDIO_D2 Pin <0=>PC10
+#define RTE_SDIO_D2_PORT_ID             0
+#if    (RTE_SDIO_D2_PORT_ID == 0)
+#define RTE_SDIO_D2_PORT                GPIOC
+#define RTE_SDIO_D2_PIN                 10
+#else
+#error "Invalid SDIO_D2 Pin Configuration!"
+#endif
+//      SDIO_D3 Pin <0=>PC11
+#define RTE_SDIO_D3_PORT_ID             0
+#if    (RTE_SDIO_D3_PORT_ID == 0)
+#define RTE_SDIO_D3_PORT                GPIOC
+#define RTE_SDIO_D3_PIN                 11
+#else
+#error "Invalid SDIO_D3 Pin Configuration!"
+#endif
+//      SDIO_D4 Pin <0=>PB8
+#define RTE_SDIO_D4_PORT_ID             0
+#if    (RTE_SDIO_D4_PORT_ID == 0)
+#define RTE_SDIO_D4_PORT                GPIOB
+#define RTE_SDIO_D4_PIN                 8
+#else
+#error "Invalid SDIO_D4 Pin Configuration!"
+#endif
+//      SDIO_D5 Pin <0=>PB9
+#define RTE_SDIO_D5_PORT_ID             0
+#if    (RTE_SDIO_D5_PORT_ID == 0)
+#define RTE_SDIO_D5_PORT                GPIOB
+#define RTE_SDIO_D5_PIN                 9
+#else
+#error "Invalid SDIO_D5 Pin Configuration!"
+#endif
+//      SDIO_D6 Pin <0=>PC6
+#define RTE_SDIO_D6_PORT_ID             0
+#if    (RTE_SDIO_D6_PORT_ID == 0)
+#define RTE_SDIO_D6_PORT                GPIOC
+#define RTE_SDIO_D6_PIN                 6
+#else
+#error "Invalid SDIO_D6 Pin Configuration!"
+#endif
+//      SDIO_D7 Pin <0=>PC7
+#define RTE_SDIO_D7_PORT_ID             0
+#if    (RTE_SDIO_D7_PORT_ID == 0)
+#define RTE_SDIO_D7_PORT                GPIOC
+#define RTE_SDIO_D7_PIN                 7
+#else
+#error "Invalid SDIO_D7 Pin Configuration!"
+#endif
+//   
+
+//    DMA
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <3=>3 <6=>6
+//       Selects DMA Stream (only Stream 3 or 6 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SDIO_DMA                    1
+#define RTE_SDIO_DMA_NUMBER             2
+#define RTE_SDIO_DMA_STREAM             3
+#define RTE_SDIO_DMA_CHANNEL            4
+#define RTE_SDIO_DMA_PRIORITY           0
+
+// 
+
+
+//  ETH (Ethernet Interface) [Driver_ETH_MAC0]
+//  Configuration settings for Driver_ETH_MAC0 in component ::Drivers:Ethernet MAC
+#define RTE_ETH                         1
+
+//    MII (Media Independent Interface)
+#define RTE_ETH_MII                     0
+
+//      ETH_MII_TX_CLK Pin <0=>PC3
+#define RTE_ETH_MII_TX_CLK_PORT_ID      0
+#if    (RTE_ETH_MII_TX_CLK_PORT_ID == 0)
+#define RTE_ETH_MII_TX_CLK_PORT         GPIOC
+#define RTE_ETH_MII_TX_CLK_PIN          3
+#else
+#error "Invalid ETH_MII_TX_CLK Pin Configuration!"
+#endif
+//      ETH_MII_TXD0 Pin <0=>PB12 <1=>PG13
+#define RTE_ETH_MII_TXD0_PORT_ID        0
+#if    (RTE_ETH_MII_TXD0_PORT_ID == 0)
+#define RTE_ETH_MII_TXD0_PORT           GPIOB
+#define RTE_ETH_MII_TXD0_PIN            12
+#elif  (RTE_ETH_MII_TXD0_PORT_ID == 1)
+#define RTE_ETH_MII_TXD0_PORT           GPIOG
+#define RTE_ETH_MII_TXD0_PIN            13
+#else
+#error "Invalid ETH_MII_TXD0 Pin Configuration!"
+#endif
+//      ETH_MII_TXD1 Pin <0=>PB13 <1=>PG14
+#define RTE_ETH_MII_TXD1_PORT_ID        0
+#if    (RTE_ETH_MII_TXD1_PORT_ID == 0)
+#define RTE_ETH_MII_TXD1_PORT           GPIOB
+#define RTE_ETH_MII_TXD1_PIN            13
+#elif  (RTE_ETH_MII_TXD1_PORT_ID == 1)
+#define RTE_ETH_MII_TXD1_PORT           GPIOG
+#define RTE_ETH_MII_TXD1_PIN            14
+#else
+#error "Invalid ETH_MII_TXD1 Pin Configuration!"
+#endif
+//      ETH_MII_TXD2 Pin <0=>PC2
+#define RTE_ETH_MII_TXD2_PORT_ID        0
+#if    (RTE_ETH_MII_TXD2_PORT_ID == 0)
+#define RTE_ETH_MII_TXD2_PORT           GPIOC
+#define RTE_ETH_MII_TXD2_PIN            2
+#else
+#error "Invalid ETH_MII_TXD2 Pin Configuration!"
+#endif
+//      ETH_MII_TXD3 Pin <0=>PB8 <1=>PE2
+#define RTE_ETH_MII_TXD3_PORT_ID        0
+#if    (RTE_ETH_MII_TXD3_PORT_ID == 0)
+#define RTE_ETH_MII_TXD3_PORT           GPIOB
+#define RTE_ETH_MII_TXD3_PIN            8
+#elif  (RTE_ETH_MII_TXD3_PORT_ID == 1)
+#define RTE_ETH_MII_TXD3_PORT           GPIOE
+#define RTE_ETH_MII_TXD3_PIN            2
+#else
+#error "Invalid ETH_MII_TXD3 Pin Configuration!"
+#endif
+//      ETH_MII_TX_EN Pin <0=>PB11 <1=>PG11
+#define RTE_ETH_MII_TX_EN_PORT_ID       0
+#if    (RTE_ETH_MII_TX_EN_PORT_ID == 0)
+#define RTE_ETH_MII_TX_EN_PORT          GPIOB
+#define RTE_ETH_MII_TX_EN_PIN           11
+#elif  (RTE_ETH_MII_TX_EN_PORT_ID == 1)
+#define RTE_ETH_MII_TX_EN_PORT          GPIOG
+#define RTE_ETH_MII_TX_EN_PIN           11
+#else
+#error "Invalid ETH_MII_TX_EN Pin Configuration!"
+#endif
+//      ETH_MII_RX_CLK Pin <0=>PA1
+#define RTE_ETH_MII_RX_CLK_PORT_ID        0
+#if    (RTE_ETH_MII_RX_CLK_PORT_ID == 0)
+#define RTE_ETH_MII_RX_CLK_PORT         GPIOA
+#define RTE_ETH_MII_RX_CLK_PIN          1
+#else
+#error "Invalid ETH_MII_RX_CLK Pin Configuration!"
+#endif
+//      ETH_MII_RXD0 Pin <0=>PC4
+#define RTE_ETH_MII_RXD0_PORT_ID        0
+#if    (RTE_ETH_MII_RXD0_PORT_ID == 0)
+#define RTE_ETH_MII_RXD0_PORT           GPIOC
+#define RTE_ETH_MII_RXD0_PIN            4
+#else
+#error "Invalid ETH_MII_RXD0 Pin Configuration!"
+#endif
+//      ETH_MII_RXD1 Pin <0=>PC5
+#define RTE_ETH_MII_RXD1_PORT_ID        0
+#if    (RTE_ETH_MII_RXD1_PORT_ID == 0)
+#define RTE_ETH_MII_RXD1_PORT           GPIOC
+#define RTE_ETH_MII_RXD1_PIN            5
+#else
+#error "Invalid ETH_MII_RXD1 Pin Configuration!"
+#endif
+//      ETH_MII_RXD2 Pin <0=>PB0 <1=>PH6
+#define RTE_ETH_MII_RXD2_PORT_ID        0
+#if    (RTE_ETH_MII_RXD2_PORT_ID == 0)
+#define RTE_ETH_MII_RXD2_PORT           GPIOB
+#define RTE_ETH_MII_RXD2_PIN            0
+#elif  (RTE_ETH_MII_RXD2_PORT_ID == 1)
+#define RTE_ETH_MII_RXD2_PORT           GPIOH
+#define RTE_ETH_MII_RXD2_PIN            6
+#else
+#error "Invalid ETH_MII_RXD2 Pin Configuration!"
+#endif
+//      ETH_MII_RXD3 Pin <0=>PB1 <1=>PH7
+#define RTE_ETH_MII_RXD3_PORT_ID        0
+#if    (RTE_ETH_MII_RXD3_PORT_ID == 0)
+#define RTE_ETH_MII_RXD3_PORT           GPIOB
+#define RTE_ETH_MII_RXD3_PIN            1
+#elif  (RTE_ETH_MII_RXD3_PORT_ID == 1)
+#define RTE_ETH_MII_RXD3_PORT           GPIOH
+#define RTE_ETH_MII_RXD3_PIN            7
+#else
+#error "Invalid ETH_MII_RXD3 Pin Configuration!"
+#endif
+//      ETH_MII_RX_DV Pin <0=>PA7
+#define RTE_ETH_MII_RX_DV_PORT_ID       0
+#if    (RTE_ETH_MII_RX_DV_PORT_ID == 0)
+#define RTE_ETH_MII_RX_DV_PORT          GPIOA
+#define RTE_ETH_MII_RX_DV_PIN           7
+#else
+#error "Invalid ETH_MII_RX_DV Pin Configuration!"
+#endif
+//      ETH_MII_RX_ER Pin <0=>PB10 <1=>PI10
+#define RTE_ETH_MII_RX_ER_PORT_ID       0
+#if    (RTE_ETH_MII_RX_ER_PORT_ID == 0)
+#define RTE_ETH_MII_RX_ER_PORT          GPIOB
+#define RTE_ETH_MII_RX_ER_PIN           10
+#elif  (RTE_ETH_MII_RXD3_PORT_ID == 1)
+#define RTE_ETH_MII_RX_ER_PORT          GPIOI
+#define RTE_ETH_MII_RX_ER_PIN           10
+#else
+#error "Invalid ETH_MII_RX_ER Pin Configuration!"
+#endif
+//      ETH_MII_CRS Pin <0=>PA0 <1=>PH2
+#define RTE_ETH_MII_CRS_PORT_ID       0
+#if    (RTE_ETH_MII_CRS_PORT_ID == 0)
+#define RTE_ETH_MII_CRS_PORT            GPIOA
+#define RTE_ETH_MII_CRS_PIN             0
+#elif  (RTE_ETH_MII_CRS_PORT_ID == 1)
+#define RTE_ETH_MII_CRS_PORT            GPIOH
+#define RTE_ETH_MII_CRS_PIN             2
+#else
+#error "Invalid ETH_MII_CRS Pin Configuration!"
+#endif
+//      ETH_MII_COL Pin <0=>PA3 <1=>PH3
+#define RTE_ETH_MII_COL_PORT_ID       0
+#if    (RTE_ETH_MII_COL_PORT_ID == 0)
+#define RTE_ETH_MII_COL_PORT            GPIOA
+#define RTE_ETH_MII_COL_PIN             3
+#elif  (RTE_ETH_MII_COL_PORT_ID == 1)
+#define RTE_ETH_MII_COL_PORT            GPIOH
+#define RTE_ETH_MII_COL_PIN             3
+#else
+#error "Invalid ETH_MII_COL Pin Configuration!"
+#endif
+
+//   
+
+//    RMII (Reduced Media Independent Interface)
+#define RTE_ETH_RMII                    1
+
+//      ETH_RMII_TXD0 Pin <0=>PB12 <1=>PG13
+#define RTE_ETH_RMII_TXD0_PORT_ID       1
+#if    (RTE_ETH_RMII_TXD0_PORT_ID == 0)
+#define RTE_ETH_RMII_TXD0_PORT          GPIOB
+#define RTE_ETH_RMII_TXD0_PIN           12
+#elif  (RTE_ETH_RMII_TXD0_PORT_ID == 1)
+#define RTE_ETH_RMII_TXD0_PORT          GPIOG
+#define RTE_ETH_RMII_TXD0_PIN           13
+#else
+#error "Invalid ETH_RMII_TXD0 Pin Configuration!"
+#endif
+//      ETH_RMII_TXD1 Pin <0=>PB13 <1=>PG14
+#define RTE_ETH_RMII_TXD1_PORT_ID       1
+#if    (RTE_ETH_RMII_TXD1_PORT_ID == 0)
+#define RTE_ETH_RMII_TXD1_PORT          GPIOB
+#define RTE_ETH_RMII_TXD1_PIN           13
+#elif  (RTE_ETH_RMII_TXD1_PORT_ID == 1)
+#define RTE_ETH_RMII_TXD1_PORT          GPIOG
+#define RTE_ETH_RMII_TXD1_PIN           14
+#else
+#error "Invalid ETH_RMII_TXD1 Pin Configuration!"
+#endif
+//      ETH_RMII_TX_EN Pin <0=>PB11 <1=>PG11
+#define RTE_ETH_RMII_TX_EN_PORT_ID      1
+#if    (RTE_ETH_RMII_TX_EN_PORT_ID == 0)
+#define RTE_ETH_RMII_TX_EN_PORT         GPIOB
+#define RTE_ETH_RMII_TX_EN_PIN          11
+#elif  (RTE_ETH_RMII_TX_EN_PORT_ID == 1)
+#define RTE_ETH_RMII_TX_EN_PORT         GPIOG
+#define RTE_ETH_RMII_TX_EN_PIN          11
+#else
+#error "Invalid ETH_RMII_TX_EN Pin Configuration!"
+#endif
+//      ETH_RMII_RXD0 Pin <0=>PC4
+#define RTE_ETH_RMII_RXD0_PORT_ID       0
+#if    (RTE_ETH_RMII_RXD0_PORT_ID == 0)
+#define RTE_ETH_RMII_RXD0_PORT          GPIOC
+#define RTE_ETH_RMII_RXD0_PIN           4
+#else
+#error "Invalid ETH_RMII_RXD0 Pin Configuration!"
+#endif
+//      ETH_RMII_RXD1 Pin <0=>PC5
+#define RTE_ETH_RMII_RXD1_PORT_ID       0
+#if    (RTE_ETH_RMII_RXD1_PORT_ID == 0)
+#define RTE_ETH_RMII_RXD1_PORT          GPIOC
+#define RTE_ETH_RMII_RXD1_PIN           5
+#else
+#error "Invalid ETH_RMII_RXD1 Pin Configuration!"
+#endif
+//      ETH_RMII_REF_CLK Pin <0=>PA1
+#define RTE_ETH_RMII_REF_CLK_PORT_ID    0
+#if    (RTE_ETH_RMII_REF_CLK_PORT_ID == 0)
+#define RTE_ETH_RMII_REF_CLK_PORT       GPIOA
+#define RTE_ETH_RMII_REF_CLK_PIN        1
+#else
+#error "Invalid ETH_RMII_REF_CLK Pin Configuration!"
+#endif
+//      ETH_RMII_CRS_DV Pin <0=>PA7
+#define RTE_ETH_RMII_CRS_DV_PORT_ID     0
+#if    (RTE_ETH_RMII_CRS_DV_PORT_ID == 0)
+#define RTE_ETH_RMII_CRS_DV_PORT        GPIOA
+#define RTE_ETH_RMII_CRS_DV_PIN         7
+#else
+#error "Invalid ETH_RMII_CRS_DV Pin Configuration!"
+#endif
+
+//   
+
+//    Management Data Interface
+//      ETH_MDC Pin <0=>PC1
+#define RTE_ETH_MDI_MDC_PORT_ID         0
+#if    (RTE_ETH_MDI_MDC_PORT_ID == 0)
+#define RTE_ETH_MDI_MDC_PORT            GPIOC
+#define RTE_ETH_MDI_MDC_PIN             1
+#else
+#error "Invalid ETH_MDC Pin Configuration!"
+#endif
+//      ETH_MDIO Pin <0=>PA2
+#define RTE_ETH_MDI_MDIO_PORT_ID        0
+#if    (RTE_ETH_MDI_MDIO_PORT_ID == 0)
+#define RTE_ETH_MDI_MDIO_PORT           GPIOA
+#define RTE_ETH_MDI_MDIO_PIN            2
+#else
+#error "Invalid ETH_MDIO Pin Configuration!"
+#endif
+//   
+
+//    Reference 25MHz/50MHz Clock generation
+#define RTE_ETH_REF_CLOCK               0
+
+//      MCO Pin <0=>PA2 <1=>PC9
+#define RTE_ETH_REF_CLOCK_PORT_ID       0
+#if    (RTE_ETH_REF_CLOCK_PORT_ID == 0)
+#define RTE_ETH_REF_CLOCK_PORT          GPIOA
+#define RTE_ETH_REF_CLOCK_PIN           8
+#elif  (RTE_ETH_REF_CLOCK_PORT_ID == 1)
+#define RTE_ETH_REF_CLOCK_PORT          GPIOC
+#define RTE_ETH_REF_CLOCK_PIN           9
+#else
+#error "Invalid MCO Pin Configuration!"
+#endif
+
+//   
+
+// 
+
+
+//  USB OTG Full-speed
+#define RTE_USB_OTG_FS                  0
+
+//    Device [Driver_USBD0]
+//    Configuration settings for Driver_USBD0 in component ::Drivers:USB Device
+#define RTE_USB_OTG_FS_DEV              1
+
+//      Endpoints
+//      Reduce memory requirements of Driver by disabling unused endpoints
+//        Endpoint 1
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 2
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 3
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//     
+#define RTE_USB_OTG_FS_DEV_EP           0x0000000F
+#define RTE_USB_OTG_FS_DEV_EP_BULK      0x000E000E
+#define RTE_USB_OTG_FS_DEV_EP_INT       0x000E000E
+#define RTE_USB_OTG_FS_DEV_EP_ISO       0x000E000E
+
+//   
+
+//    Host [Driver_USBH0]
+//    Configuration settings for Driver_USBH0 in component ::Drivers:USB Host
+
+#define RTE_USB_OTG_FS_HOST             1
+
+//      VBUS Power On/Off Pin
+//      Configure Pin for driving VBUS
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_FS_VBUS_PIN             1
+#define RTE_OTG_FS_VBUS_ACTIVE          0
+#define RTE_OTG_FS_VBUS_PORT            GPIO_PORT(7)
+#define RTE_OTG_FS_VBUS_BIT             5
+
+//      Overcurrent Detection Pin
+//      Configure Pin for overcurrent detection
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_FS_OC_PIN               1
+#define RTE_OTG_FS_OC_ACTIVE            0
+#define RTE_OTG_FS_OC_PORT              GPIO_PORT(5)
+#define RTE_OTG_FS_OC_BIT               11
+//   
+
+// 
+
+
+//  USB OTG High-speed
+#define RTE_USB_OTG_HS                  0
+
+//    PHY (Physical Layer)
+
+//      PHY Interface
+//       <0=>On-chip full-speed PHY
+//       <1=>External ULPI high-speed PHY
+#define RTE_USB_OTG_HS_PHY              1
+
+//      External ULPI Pins (UTMI+ Low Pin Interface)
+
+//        OTG_HS_ULPI_CK Pin <0=>PA5
+#define RTE_USB_OTG_HS_ULPI_CK_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_CK_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_CK_PORT     GPIOA
+#define RTE_USB_OTG_HS_ULPI_CK_PIN      5
+#else
+#error "Invalid OTG_HS_ULPI_CK Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_DIR Pin <0=>PI11 <1=>PC2
+#define RTE_USB_OTG_HS_ULPI_DIR_PORT_ID 0
+#if    (RTE_USB_OTG_HS_ULPI_DIR_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_DIR_PORT    GPIOI
+#define RTE_USB_OTG_HS_ULPI_DIR_PIN     11
+#elif  (RTE_USB_OTG_HS_ULPI_DIR_PORT_ID == 1)
+#define RTE_USB_OTG_HS_ULPI_DIR_PORT    GPIOC
+#define RTE_USB_OTG_HS_ULPI_DIR_PIN     2
+#else
+#error "Invalid OTG_HS_ULPI_DIR Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_STP Pin <0=>PC0
+#define RTE_USB_OTG_HS_ULPI_STP_PORT_ID 0
+#if    (RTE_USB_OTG_HS_ULPI_STP_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_STP_PORT    GPIOC
+#define RTE_USB_OTG_HS_ULPI_STP_PIN     0
+#else
+#error "Invalid OTG_HS_ULPI_STP Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_NXT Pin <0=>PC2 <1=>PH4
+#define RTE_USB_OTG_HS_ULPI_NXT_PORT_ID 1
+#if    (RTE_USB_OTG_HS_ULPI_NXT_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_NXT_PORT    GPIOC
+#define RTE_USB_OTG_HS_ULPI_NXT_PIN     2
+#elif  (RTE_USB_OTG_HS_ULPI_NXT_PORT_ID == 1)
+#define RTE_USB_OTG_HS_ULPI_NXT_PORT    GPIOH
+#define RTE_USB_OTG_HS_ULPI_NXT_PIN     4
+#else
+#error "Invalid OTG_HS_ULPI_NXT Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D0 Pin <0=>PA3
+#define RTE_USB_OTG_HS_ULPI_D0_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D0_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D0_PORT     GPIOA
+#define RTE_USB_OTG_HS_ULPI_D0_PIN      3
+#else
+#error "Invalid OTG_HS_ULPI_D0 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D1 Pin <0=>PB0
+#define RTE_USB_OTG_HS_ULPI_D1_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D1_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D1_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D1_PIN      0
+#else
+#error "Invalid OTG_HS_ULPI_D1 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D2 Pin <0=>PB1
+#define RTE_USB_OTG_HS_ULPI_D2_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D2_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D2_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D2_PIN      1
+#else
+#error "Invalid OTG_HS_ULPI_D2 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D3 Pin <0=>PB10
+#define RTE_USB_OTG_HS_ULPI_D3_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D3_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D3_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D3_PIN      10
+#else
+#error "Invalid OTG_HS_ULPI_D3 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D4 Pin <0=>PB11
+#define RTE_USB_OTG_HS_ULPI_D4_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D4_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D4_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D4_PIN      11
+#else
+#error "Invalid OTG_HS_ULPI_D4 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D5 Pin <0=>PB12
+#define RTE_USB_OTG_HS_ULPI_D5_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D5_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D5_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D5_PIN      12
+#else
+#error "Invalid OTG_HS_ULPI_D5 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D6 Pin <0=>PB13
+#define RTE_USB_OTG_HS_ULPI_D6_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D6_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D6_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D6_PIN      13
+#else
+#error "Invalid OTG_HS_ULPI_D6 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D7 Pin <0=>PB5
+#define RTE_USB_OTG_HS_ULPI_D7_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D7_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D7_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D7_PIN      5
+#else
+#error "Invalid OTG_HS_ULPI_D7 Pin Configuration!"
+#endif
+
+//     
+
+//   
+
+//    Device [Driver_USBD1]
+//    Configuration settings for Driver_USBD1 in component ::Drivers:USB Device
+#define RTE_USB_OTG_HS_DEV              1
+
+//      Endpoints
+//      Reduce memory requirements of Driver by disabling unused endpoints
+//        Endpoint 1
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 2
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 3
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 4
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 5
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//     
+#define RTE_USB_OTG_HS_DEV_EP           0x0000003F
+#define RTE_USB_OTG_HS_DEV_EP_BULK      0x003E003E
+#define RTE_USB_OTG_HS_DEV_EP_INT       0x003E003E
+#define RTE_USB_OTG_HS_DEV_EP_ISO       0x003E003E
+
+//   
+
+//    Host [Driver_USBH1]
+//    Configuration settings for Driver_USBH1 in component ::Drivers:USB Host
+#define RTE_USB_OTG_HS_HOST             1
+
+//      VBUS Power On/Off Pin
+//      Configure Pin for driving VBUS
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_HS_VBUS_PIN             1
+#define RTE_OTG_HS_VBUS_ACTIVE          0
+#define RTE_OTG_HS_VBUS_PORT            GPIO_PORT(2)
+#define RTE_OTG_HS_VBUS_BIT             2
+
+//      Overcurrent Detection Pin
+//      Configure Pin for overcurrent detection
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_HS_OC_PIN               1
+#define RTE_OTG_HS_OC_ACTIVE            0
+#define RTE_OTG_HS_OC_PORT              GPIO_PORT(5)
+#define RTE_OTG_HS_OC_BIT               12
+//   
+
+// 
+
+
+//  EXTI (External Interrupt/Event Controller)
+#define RTE_EXTI                        0
+
+//    EXTI0 Line
+#define RTE_EXTI0                       0
+//      Pin   <0=>PA0  <1=>PB0  <2=>PC0  <3=>PD0  <4=>PE0  <5=>PF0  <6=>PG0  <7=>PH0  <8=>PI0
+#define RTE_EXTI0_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI0_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI0_TRIGGER               0
+//   
+
+//    EXTI1 Line
+#define RTE_EXTI1                       0
+//      Pin   <0=>PA1  <1=>PB1  <2=>PC1  <3=>PD1  <4=>PE1  <5=>PF1  <6=>PG1  <7=>PH1  <8=>PI1
+#define RTE_EXTI1_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI1_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI1_TRIGGER               0
+//   
+
+//    EXTI2 Line
+#define RTE_EXTI2                       0
+//      Pin   <0=>PA2  <1=>PB2  <2=>PC2  <3=>PD2  <4=>PE2  <5=>PF2  <6=>PG2  <7=>PH2  <8=>PI2
+#define RTE_EXTI2_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI2_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI2_TRIGGER               0
+//   
+
+//    EXTI3 Line
+#define RTE_EXTI3                       0
+//      Pin   <0=>PA3  <1=>PB3  <2=>PC3  <3=>PD3  <4=>PE3  <5=>PF3  <6=>PG3  <7=>PH3  <8=>PI3
+#define RTE_EXTI3_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI3_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI3_TRIGGER               0
+//   
+
+//    EXTI4 Line
+#define RTE_EXTI4                       0
+//      Pin   <0=>PA4  <1=>PB4  <2=>PC4  <3=>PD4  <4=>PE4  <5=>PF4  <6=>PG4  <7=>PH4  <8=>PI4
+#define RTE_EXTI4_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI4_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI4_TRIGGER               0
+//   
+
+//    EXTI5 Line
+#define RTE_EXTI5                       0
+//      Pin   <0=>PA5  <1=>PB5  <2=>PC5  <3=>PD5  <4=>PE5  <5=>PF5  <6=>PG5  <7=>PH5  <8=>PI5
+#define RTE_EXTI5_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI5_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI5_TRIGGER               0
+//   
+
+//    EXTI6 Line
+#define RTE_EXTI6                       0
+//      Pin   <0=>PA6  <1=>PB6  <2=>PC6  <3=>PD6  <4=>PE6  <5=>PF6  <6=>PG6  <7=>PH6  <8=>PI6
+#define RTE_EXTI6_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI6_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI6_TRIGGER               0
+//   
+
+//    EXTI7 Line
+#define RTE_EXTI7                       0
+//      Pin   <0=>PA7  <1=>PB7  <2=>PC7  <3=>PD7  <4=>PE7  <5=>PF7  <6=>PG7  <7=>PH7  <8=>PI7
+#define RTE_EXTI7_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI7_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI7_TRIGGER               0
+//   
+
+//    EXTI8 Line
+#define RTE_EXTI8                       0
+//      Pin   <0=>PA8  <1=>PB8  <2=>PC8  <3=>PD8  <4=>PE8  <5=>PF8  <6=>PG8  <7=>PH8  <8=>PI8
+#define RTE_EXTI8_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI8_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI8_TRIGGER               0
+//   
+
+//    EXTI9 Line
+#define RTE_EXTI9                       0
+//      Pin   <0=>PA9  <1=>PB9  <2=>PC9  <3=>PD9  <4=>PE9  <5=>PF9  <6=>PG9  <7=>PH9  <8=>PI9
+#define RTE_EXTI9_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI9_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI9_TRIGGER               0
+//   
+
+//    EXTI10 Line
+#define RTE_EXTI10                      0
+//      Pin   <0=>PA10 <1=>PB10 <2=>PC10 <3=>PD10 <4=>PE10 <5=>PF10 <6=>PG10 <7=>PH10 <8=>PI10
+#define RTE_EXTI10_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI10_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI10_TRIGGER              0
+//   
+
+//    EXTI11 Line
+#define RTE_EXTI11                      0
+//      Pin   <0=>PA11 <1=>PB11 <2=>PC11 <3=>PD11 <4=>PE11 <5=>PF11 <6=>PG11 <7=>PH11 <8=>PI11
+#define RTE_EXTI11_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI11_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI11_TRIGGER              0
+//   
+
+//    EXTI12 Line
+#define RTE_EXTI12                      0
+//      Pin   <0=>PA12 <1=>PB12 <2=>PC12 <3=>PD12 <4=>PE12 <5=>PF12 <6=>PG12 <7=>PH12
+#define RTE_EXTI12_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI12_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI12_TRIGGER              0
+//   
+
+//    EXTI13 Line
+#define RTE_EXTI13                      0
+//      Pin   <0=>PA13 <1=>PB13 <2=>PC13 <3=>PD13 <4=>PE13 <5=>PF13 <6=>PG13 <7=>PH13
+#define RTE_EXTI13_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI13_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI13_TRIGGER              0
+//   
+
+//    EXTI14 Line
+#define RTE_EXTI14                      0
+//      Pin   <0=>PA14 <1=>PB14 <2=>PC14 <3=>PD14 <4=>PE14 <5=>PF14 <6=>PG14 <7=>PH14
+#define RTE_EXTI14_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI14_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI14_TRIGGER              0
+//   
+
+//    EXTI15 Line
+#define RTE_EXTI15                      0
+//      Pin   <0=>PA15 <1=>PB15 <2=>PC15 <3=>PD15 <4=>PE15 <5=>PF15 <6=>PG15 <7=>PH15
+#define RTE_EXTI15_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI15_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI15_TRIGGER              0
+//   
+
+//    EXTI16 Line: PVD Output
+#define RTE_EXTI16                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI16_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI16_TRIGGER              0
+//   
+
+//    EXTI17 Line: RTC Alarm
+#define RTE_EXTI17                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI17_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI17_TRIGGER              0
+//   
+
+//    EXTI18 Line: USB OTG FS Wakeup
+#define RTE_EXTI18                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI18_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI18_TRIGGER              0
+//   
+
+//    EXTI19 Line: Ethernet Wakeup
+#define RTE_EXTI19                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI19_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI19_TRIGGER              0
+//   
+
+//    EXTI20 Line: USB OTG HS Wakeup
+#define RTE_EXTI20                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI20_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI20_TRIGGER              0
+//   
+
+//    EXTI21 Line: RTC Tamper and TimeStamp
+#define RTE_EXTI21                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI21_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI21_TRIGGER              0
+//   
+
+//    EXTI22 Line: RTC Wakeup
+#define RTE_EXTI22                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI22_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI22_TRIGGER              0
+//   
+
+// 
+
+
+//  FSMC (Flexible Static Memory Controller)
+#define RTE_FSMC                        0
+
+//    Pin Configuration
+//    Configure Pins
+#define RTE_FSMC_PINS                   0
+
+//      Address Bus Pins
+//       <0=>A[17:16]
+//       <1=>A[10:0]   <2=>A[15:0]   <3=>A[16:0]   <4=>A[17:0]
+//       <5=>A[18:0]   <6=>A[19:0]   <7=>A[20:0]   <8=>A[21:0]
+//       <9=>A[22:0]  <10=>A[23:0]  <11=>A[24:0]  <12=>A[25:0]
+#define RTE_FSMC_ABUS_PINS              10
+//      Data Bus Pins  <0=>D[7:0] <1=>D[15:0]
+#define RTE_FSMC_DBUS_PINS              0
+//      FSMC_NOE Pin
+#define RTE_FSMC_NOE_PIN                0
+//      FSMC_NWE Pin
+#define RTE_FSMC_NWE_PIN                0
+//      FSMC_NBL0 Pin
+#define RTE_FSMC_NBL0_PIN               0
+//      FSMC_NBL1 Pin
+#define RTE_FSMC_NBL1_PIN               0
+//      FSMC_NL Pin
+#define RTE_FSMC_NL_PIN                 0
+//      FSMC_NWAIT Pin
+#define RTE_FSMC_NWAIT_PIN              0
+//      FSMC_CLK Pin
+#define RTE_FSMC_CLK_PIN                0
+//      FSMC_NE1/NCE2 Pin
+#define RTE_FSMC_NE1_PIN                0
+//      FSMC_NE2/NCE3 Pin
+#define RTE_FSMC_NE2_PIN                0
+//      FSMC_NE3/NCE4_1 Pin
+#define RTE_FSMC_NE3_PIN                0
+//      FSMC_NE4 Pin
+#define RTE_FSMC_NE4_PIN                0
+//      FSMC_NCE4_2 Pin
+#define RTE_FSMC_NCE42_PIN              0
+//      FSMC_INT2 Pin
+#define RTE_FSMC_INT2_PIN               0
+//      FSMC_INT3 Pin
+#define RTE_FSMC_INT3_PIN               0
+//      FSMC_INTR Pin
+#define RTE_FSMC_INTR_PIN               0
+//      FSMC_NIORD Pin
+#define RTE_FSMC_NIORD_PIN              0
+//      FSMC_NIOWR Pin
+#define RTE_FSMC_NIOWR_PIN              0
+//      FSMC_NREG Pin
+#define RTE_FSMC_NREG_PIN               0
+//      FSMC_CD Pin
+#define RTE_FSMC_CD_PIN                 0
+
+//   
+
+//    NOR Flash / PSRAM Controller
+
+//      FSMC_NE1 Chip Select
+//      Configure Device on Chip Select FSMC_NE1
+#define RTE_FSMC_NE1                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR1_CBURSTRW          0
+#define RTE_FSMC_BCR1_ASYNCWAIT         0
+#define RTE_FSMC_BCR1_EXTMOD            0
+#define RTE_FSMC_BCR1_WAITEN            1
+#define RTE_FSMC_BCR1_WREN              1
+#define RTE_FSMC_BCR1_WAITCFG           0
+#define RTE_FSMC_BCR1_WRAPMOD           0
+#define RTE_FSMC_BCR1_WAITPOL           0
+#define RTE_FSMC_BCR1_BURSTEN           0
+#define RTE_FSMC_BCR1_FACCEN            1
+#define RTE_FSMC_BCR1_MWID              1
+#define RTE_FSMC_BCR1_MTYP              2
+#define RTE_FSMC_BCR1_MUXEN             1
+#define RTE_FSMC_BCR1_MBKEN             1
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR1_ACCMOD            0
+#define RTE_FSMC_BTR1_DATLAT            15
+#define RTE_FSMC_BTR1_CLKDIV            15
+#define RTE_FSMC_BTR1_BUSTURN           15
+#define RTE_FSMC_BTR1_DATAST            255
+#define RTE_FSMC_BTR1_ADDHLD            15
+#define RTE_FSMC_BTR1_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR1_ACCMOD        0
+#define RTE_FSMC_BWTR1_DATLAT        15
+#define RTE_FSMC_BWTR1_CLKDIV        15
+#define RTE_FSMC_BWTR1_BUSTURN       15
+#define RTE_FSMC_BWTR1_DATAST        255
+#define RTE_FSMC_BWTR1_ADDHLD        15
+#define RTE_FSMC_BWTR1_ADDSET        15
+//       
+//     
+
+//      FSMC_NE2 Chip Select
+//      Configure Device on Chip Select FSMC_NE2
+#define RTE_FSMC_NE2                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR2_CBURSTRW          0
+#define RTE_FSMC_BCR2_ASYNCWAIT         0
+#define RTE_FSMC_BCR2_EXTMOD            0
+#define RTE_FSMC_BCR2_WAITEN            1
+#define RTE_FSMC_BCR2_WREN              1
+#define RTE_FSMC_BCR2_WAITCFG           0
+#define RTE_FSMC_BCR2_WRAPMOD           0
+#define RTE_FSMC_BCR2_WAITPOL           0
+#define RTE_FSMC_BCR2_BURSTEN           0
+#define RTE_FSMC_BCR2_FACCEN            1
+#define RTE_FSMC_BCR2_MWID              1
+#define RTE_FSMC_BCR2_MTYP              0
+#define RTE_FSMC_BCR2_MUXEN             1
+#define RTE_FSMC_BCR2_MBKEN             0
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR2_ACCMOD            0
+#define RTE_FSMC_BTR2_DATLAT            15
+#define RTE_FSMC_BTR2_CLKDIV            15
+#define RTE_FSMC_BTR2_BUSTURN           15
+#define RTE_FSMC_BTR2_DATAST            255
+#define RTE_FSMC_BTR2_ADDHLD            15
+#define RTE_FSMC_BTR2_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR2_ACCMOD        0
+#define RTE_FSMC_BWTR2_DATLAT        15
+#define RTE_FSMC_BWTR2_CLKDIV        15
+#define RTE_FSMC_BWTR2_BUSTURN       15
+#define RTE_FSMC_BWTR2_DATAST        255
+#define RTE_FSMC_BWTR2_ADDHLD        15
+#define RTE_FSMC_BWTR2_ADDSET        15
+//       
+//     
+
+//      FSMC_NE3 Chip Select
+//      Configure Device on Chip Select FSMC_NE3
+#define RTE_FSMC_NE3                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR3_CBURSTRW          0
+#define RTE_FSMC_BCR3_ASYNCWAIT         0
+#define RTE_FSMC_BCR3_EXTMOD            0
+#define RTE_FSMC_BCR3_WAITEN            1
+#define RTE_FSMC_BCR3_WREN              1
+#define RTE_FSMC_BCR3_WAITCFG           0
+#define RTE_FSMC_BCR3_WRAPMOD           0
+#define RTE_FSMC_BCR3_WAITPOL           0
+#define RTE_FSMC_BCR3_BURSTEN           0
+#define RTE_FSMC_BCR3_FACCEN            1
+#define RTE_FSMC_BCR3_MWID              1
+#define RTE_FSMC_BCR3_MTYP              0
+#define RTE_FSMC_BCR3_MUXEN             1
+#define RTE_FSMC_BCR3_MBKEN             0
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR3_ACCMOD            0
+#define RTE_FSMC_BTR3_DATLAT            15
+#define RTE_FSMC_BTR3_CLKDIV            15
+#define RTE_FSMC_BTR3_BUSTURN           15
+#define RTE_FSMC_BTR3_DATAST            255
+#define RTE_FSMC_BTR3_ADDHLD            15
+#define RTE_FSMC_BTR3_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR3_ACCMOD        0
+#define RTE_FSMC_BWTR3_DATLAT        15
+#define RTE_FSMC_BWTR3_CLKDIV        15
+#define RTE_FSMC_BWTR3_BUSTURN       15
+#define RTE_FSMC_BWTR3_DATAST        255
+#define RTE_FSMC_BWTR3_ADDHLD        15
+#define RTE_FSMC_BWTR3_ADDSET        15
+//       
+//     
+
+//      FSMC_NE4 Chip Select
+//      Configure Device on Chip Select FSMC_NE4
+#define RTE_FSMC_NE4                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR4_CBURSTRW          0
+#define RTE_FSMC_BCR4_ASYNCWAIT         0
+#define RTE_FSMC_BCR4_EXTMOD            0
+#define RTE_FSMC_BCR4_WAITEN            1
+#define RTE_FSMC_BCR4_WREN              1
+#define RTE_FSMC_BCR4_WAITCFG           0
+#define RTE_FSMC_BCR4_WRAPMOD           0
+#define RTE_FSMC_BCR4_WAITPOL           0
+#define RTE_FSMC_BCR4_BURSTEN           0
+#define RTE_FSMC_BCR4_FACCEN            1
+#define RTE_FSMC_BCR4_MWID              1
+#define RTE_FSMC_BCR4_MTYP              0
+#define RTE_FSMC_BCR4_MUXEN             1
+#define RTE_FSMC_BCR4_MBKEN             0
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR4_ACCMOD            0
+#define RTE_FSMC_BTR4_DATLAT            15
+#define RTE_FSMC_BTR4_CLKDIV            15
+#define RTE_FSMC_BTR4_BUSTURN           15
+#define RTE_FSMC_BTR4_DATAST            255
+#define RTE_FSMC_BTR4_ADDHLD            15
+#define RTE_FSMC_BTR4_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR4_ACCMOD        0
+#define RTE_FSMC_BWTR4_DATLAT        15
+#define RTE_FSMC_BWTR4_CLKDIV        15
+#define RTE_FSMC_BWTR4_BUSTURN       15
+#define RTE_FSMC_BWTR4_DATAST        255
+#define RTE_FSMC_BWTR4_ADDHLD        15
+#define RTE_FSMC_BWTR4_ADDSET        15
+//       
+//     
+
+//   
+
+//    NAND Flash Controller
+
+//      FSMC_NCE2 Chip Select
+//      Configure NAND Device on Chip Select FSMC_NCE2
+#define RTE_FSMC_NCE2                   0
+
+//        NAND Flash Control
+//          ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes
+//          Defines the page size for the extended ECC.
+//          TAR: ALE to RE delay <0-15>
+//          Sets time from ALE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          TCLR: CLE to RE delay <0-15>
+//          Sets time from CLE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          ECCEN: ECC computation logic enable 
+//         PWID: Databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width.
+//          PTYP: Memory type <1=>NAND Flash
+//          Defines the type of device attached to the corresponding memory bank.
+//          PBKEN: NAND Flash memory bank enable
+//          Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus.
+//          PWAITEN: Wait feature enable
+//          Enables the Wait feature for the PC Card/NAND Flash memory bank.
+#define RTE_FSMC_PCR2_ECCPS             0
+#define RTE_FSMC_PCR2_TAR               0
+#define RTE_FSMC_PCR2_TCLR              0
+#define RTE_FSMC_PCR2_ECCEN             0
+#define RTE_FSMC_PCR2_PWID              0
+#define RTE_FSMC_PCR2_PTYP              1
+#define RTE_FSMC_PCR2_PBKEN             0
+#define RTE_FSMC_PCR2_PWAITEN           0
+
+//       
+
+//        Interrupt configuration
+//         IFEN: Falling edge detection enable
+//         ILEN: High-level detection enable
+//         IREN: Rising edge detection enable
+#define RTE_FSMC_SR2_IFEN               0
+#define RTE_FSMC_SR2_ILEN               0
+#define RTE_FSMC_SR2_IREN               0
+
+//       
+
+//       Common memory space timing
+//          MEMHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access to. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset)
+//          MEMSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 2 HCLK cycles (for NAND Flash)
+//           1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset)
+#define RTE_FSMC_PMEM2_MEMHIZ           255
+#define RTE_FSMC_PMEM2_MEMHOLD          255
+#define RTE_FSMC_PMEM2_MEMWAIT          255
+#define RTE_FSMC_PMEM2_MEMSET           255
+
+//       
+
+//       Attribute memory space timing
+//          ATTHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT)
+//          ATTSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PATT2_ATTHIZ           255
+#define RTE_FSMC_PATT2_ATTHOLD          255
+#define RTE_FSMC_PATT2_ATTWAIT          255
+#define RTE_FSMC_PATT2_ATTSET           255
+
+//       
+
+//     
+
+//      FSMC_NCE3 Chip Select
+//      Configure NAND Device on Chip Select FSMC_NCE3
+#define RTE_FSMC_NCE3                   0
+
+//        NAND Flash Control
+//          ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes
+//          Defines the page size for the extended ECC.
+//          TAR: ALE to RE delay <0-15>
+//          Sets time from ALE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          TCLR: CLE to RE delay <0-15>
+//          Sets time from CLE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          ECCEN: ECC computation logic enable 
+//         PWID: Databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width.
+//          PTYP: Memory type <1=>NAND Flash
+//          Defines the type of device attached to the corresponding memory bank.
+//          PBKEN: NAND Flash memory bank enable
+//          Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus.
+//          PWAITEN: Wait feature enable
+//          Enables the Wait feature for the PC Card/NAND Flash memory bank.
+#define RTE_FSMC_PCR3_ECCPS             0
+#define RTE_FSMC_PCR3_TAR               0
+#define RTE_FSMC_PCR3_TCLR              0
+#define RTE_FSMC_PCR3_ECCEN             0
+#define RTE_FSMC_PCR3_PWID              0
+#define RTE_FSMC_PCR3_PTYP              1
+#define RTE_FSMC_PCR3_PBKEN             0
+#define RTE_FSMC_PCR3_PWAITEN           0
+
+//       
+
+//        Interrupt configuration
+//         IFEN: Falling edge detection enable
+//         ILEN: High-level detection enable
+//         IREN: Rising edge detection enable
+#define RTE_FSMC_SR3_IFEN               0
+#define RTE_FSMC_SR3_ILEN               0
+#define RTE_FSMC_SR3_IREN               0
+
+//       
+
+//       Common memory space timing
+//          MEMHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access to. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset)
+//          MEMSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 2 HCLK cycles (for NAND Flash)
+//           1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset)
+#define RTE_FSMC_PMEM3_MEMHIZ           255
+#define RTE_FSMC_PMEM3_MEMHOLD          255
+#define RTE_FSMC_PMEM3_MEMWAIT          255
+#define RTE_FSMC_PMEM3_MEMSET           255
+
+//       
+
+//       Attribute memory space timing
+//          ATTHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT)
+//          ATTSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PATT3_ATTHIZ           255
+#define RTE_FSMC_PATT3_ATTHOLD          255
+#define RTE_FSMC_PATT3_ATTWAIT          255
+#define RTE_FSMC_PATT3_ATTSET           255
+
+//       
+
+//     
+
+//   
+
+//    PC Card Controller
+
+//      FSMC_NCE4_x Chip Select
+//      Configure PC Card/CompactFlash Device on Chip Select FSMC_NCE4_1/FSMC_NCE4_2
+#define RTE_FSMC_NCE4              0
+
+//        PC Card Control
+//          ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes
+//          Defines the page size for the extended ECC.
+//          TAR: ALE to RE delay <0-15>
+//          Sets time from ALE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          TCLR: CLE to RE delay <0-15>
+//          Sets time from CLE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          ECCEN: ECC computation logic enable
+//         PWID: Databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width.
+//          PTYP: Memory type <0=>PC Card, CompactFlash, CF+ or PCMCIOA
+//          Defines the type of device attached to the corresponding memory bank.
+//          PBKEN: PC Card memory bank enable
+//          Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus.
+//          PWAITEN: Wait feature enable
+//          Enables the Wait feature for the PC Card/NAND Flash memory bank.
+#define RTE_FSMC_PCR4_ECCPS             0
+#define RTE_FSMC_PCR4_TAR               0
+#define RTE_FSMC_PCR4_TCLR              0
+#define RTE_FSMC_PCR4_ECCEN             0
+#define RTE_FSMC_PCR4_PWID              0
+#define RTE_FSMC_PCR4_PTYP              0
+#define RTE_FSMC_PCR4_PBKEN             0
+#define RTE_FSMC_PCR4_PWAITEN           0
+
+//       
+
+//        Interrupt configuration
+//         IFEN: Falling edge detection enable
+//         ILEN: High-level detection enable
+//         IREN: Rising edge detection enable
+#define RTE_FSMC_SR4_IFEN               0
+#define RTE_FSMC_SR4_ILEN               0
+#define RTE_FSMC_SR4_IREN               0
+
+//       
+
+//        Common memory space timing
+//          MEMHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access to. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset)
+//          MEMSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 2 HCLK cycles (for NAND Flash)
+//           1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset)
+#define RTE_FSMC_PMEM4_MEMHIZ           255
+#define RTE_FSMC_PMEM4_MEMHOLD          255
+#define RTE_FSMC_PMEM4_MEMWAIT          255
+#define RTE_FSMC_PMEM4_MEMSET           255
+
+//       
+
+//        Attribute memory space timing
+//          ATTHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT)
+//          ATTSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PATT4_ATTHIZ           255
+#define RTE_FSMC_PATT4_ATTHOLD          255
+#define RTE_FSMC_PATT4_ATTWAIT          255
+#define RTE_FSMC_PATT4_ATTSET           255
+
+//       
+
+//        I/O space timing
+//          IOHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a PC Card write access. Only valid for write transaction.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          IOHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for PC Card read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          IOWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (SMNWE,
+//           SMNOE), for PC Card read or write access. The duration for command assertion is
+//           extended if the wait signal (NWAIT) is active (low) at the end of the
+//           programmed value of HCLK.
+//           0000 0000: reserved, do not use this value
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles
+//          IOSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for PC Card read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PIO4_IOHIZ             255
+#define RTE_FSMC_PIO4_IOHOLD            255
+#define RTE_FSMC_PIO4_IOWAIT            255
+#define RTE_FSMC_PIO4_IOSET             255
+
+//       
+
+//     
+
+//   
+
+// 
+
+
+#endif  /* __RTE_DEVICE_H */
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Device/STM32F207IG/startup_stm32f2xx.s b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Device/STM32F207IG/startup_stm32f2xx.s
new file mode 100644
index 000000000..d398143ef
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Device/STM32F207IG/startup_stm32f2xx.s
@@ -0,0 +1,419 @@
+;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
+;* File Name          : startup_stm32f2xx.s
+;* Author             : MCD Application Team
+;* Version            : V1.0.0
+;* Date               : 18-April-2011
+;* Description        : STM32F2xx devices vector table for MDK-ARM toolchain. 
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the CortexM3 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>   
+;*******************************************************************************
+; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+;*******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+;  Stack Configuration
+;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; 
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+;  Heap Configuration
+;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; 
+
+Heap_Size       EQU     0x00007000
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog                                        
+                DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection                        
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line            
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line                       
+                DCD     FLASH_IRQHandler                  ; FLASH                                           
+                DCD     RCC_IRQHandler                    ; RCC                                             
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0                                             
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1                                             
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2                                             
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3                                             
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4                                             
+                DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0                                   
+                DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1                                   
+                DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2                                   
+                DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3                                   
+                DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4                                   
+                DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5                                   
+                DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6                                   
+                DCD     ADC_IRQHandler                    ; ADC1, ADC2 and ADC3s                            
+                DCD     CAN1_TX_IRQHandler                ; CAN1 TX                                                
+                DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0                                               
+                DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1                                               
+                DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE                                               
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s                                    
+                DCD     TIM1_BRK_TIM9_IRQHandler          ; TIM1 Break and TIM9                   
+                DCD     TIM1_UP_TIM10_IRQHandler          ; TIM1 Update and TIM10                 
+                DCD     TIM1_TRG_COM_TIM11_IRQHandler     ; TIM1 Trigger and Commutation and TIM11
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare                                   
+                DCD     TIM2_IRQHandler                   ; TIM2                                            
+                DCD     TIM3_IRQHandler                   ; TIM3                                            
+                DCD     TIM4_IRQHandler                   ; TIM4                                            
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event                                             
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error                                             
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event                                             
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error                                               
+                DCD     SPI1_IRQHandler                   ; SPI1                                            
+                DCD     SPI2_IRQHandler                   ; SPI2                                            
+                DCD     USART1_IRQHandler                 ; USART1                                          
+                DCD     USART2_IRQHandler                 ; USART2                                          
+                DCD     USART3_IRQHandler                 ; USART3                                          
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s                                  
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line                  
+                DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI line                        
+                DCD     TIM8_BRK_TIM12_IRQHandler         ; TIM8 Break and TIM12                  
+                DCD     TIM8_UP_TIM13_IRQHandler          ; TIM8 Update and TIM13                 
+                DCD     TIM8_TRG_COM_TIM14_IRQHandler     ; TIM8 Trigger and Commutation and TIM14
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare                                   
+                DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7                                           
+                DCD     FSMC_IRQHandler                   ; FSMC                                            
+                DCD     SDIO_IRQHandler                   ; SDIO                                            
+                DCD     TIM5_IRQHandler                   ; TIM5                                            
+                DCD     SPI3_IRQHandler                   ; SPI3                                            
+                DCD     UART4_IRQHandler                  ; UART4                                           
+                DCD     UART5_IRQHandler                  ; UART5                                           
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors                   
+                DCD     TIM7_IRQHandler                   ; TIM7                   
+                DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0                                   
+                DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1                                   
+                DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2                                   
+                DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3                                   
+                DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4                                   
+                DCD     ETH_IRQHandler                    ; Ethernet                                        
+                DCD     ETH_WKUP_IRQHandler               ; Ethernet Wakeup through EXTI line                      
+                DCD     CAN2_TX_IRQHandler                ; CAN2 TX                                                
+                DCD     CAN2_RX0_IRQHandler               ; CAN2 RX0                                               
+                DCD     CAN2_RX1_IRQHandler               ; CAN2 RX1                                               
+                DCD     CAN2_SCE_IRQHandler               ; CAN2 SCE                                               
+                DCD     OTG_FS_IRQHandler                 ; USB OTG FS                                      
+                DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5                                   
+                DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6                                   
+                DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7                                   
+                DCD     USART6_IRQHandler                 ; USART6                                           
+                DCD     I2C3_EV_IRQHandler                ; I2C3 event                                             
+                DCD     I2C3_ER_IRQHandler                ; I2C3 error                                             
+                DCD     OTG_HS_EP1_OUT_IRQHandler         ; USB OTG HS End Point 1 Out                      
+                DCD     OTG_HS_EP1_IN_IRQHandler          ; USB OTG HS End Point 1 In                       
+                DCD     OTG_HS_WKUP_IRQHandler            ; USB OTG HS Wakeup through EXTI                         
+                DCD     OTG_HS_IRQHandler                 ; USB OTG HS                                      
+                DCD     DCMI_IRQHandler                   ; DCMI                                            
+                DCD     CRYP_IRQHandler                   ; CRYP crypto                                     
+                DCD     HASH_RNG_IRQHandler               ; Hash and Rng 
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WWDG_IRQHandler                   [WEAK]                                        
+                EXPORT  PVD_IRQHandler                    [WEAK]                      
+                EXPORT  TAMP_STAMP_IRQHandler             [WEAK]         
+                EXPORT  RTC_WKUP_IRQHandler               [WEAK]                     
+                EXPORT  FLASH_IRQHandler                  [WEAK]                                         
+                EXPORT  RCC_IRQHandler                    [WEAK]                                            
+                EXPORT  EXTI0_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI1_IRQHandler                  [WEAK]                                             
+                EXPORT  EXTI2_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI3_IRQHandler                  [WEAK]                                           
+                EXPORT  EXTI4_IRQHandler                  [WEAK]                                            
+                EXPORT  DMA1_Stream0_IRQHandler           [WEAK]                                
+                EXPORT  DMA1_Stream1_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream2_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream3_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream4_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream5_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream6_IRQHandler           [WEAK]                                   
+                EXPORT  ADC_IRQHandler                    [WEAK]                         
+                EXPORT  CAN1_TX_IRQHandler                [WEAK]                                                
+                EXPORT  CAN1_RX0_IRQHandler               [WEAK]                                               
+                EXPORT  CAN1_RX1_IRQHandler               [WEAK]                                                
+                EXPORT  CAN1_SCE_IRQHandler               [WEAK]                                                
+                EXPORT  EXTI9_5_IRQHandler                [WEAK]                                    
+                EXPORT  TIM1_BRK_TIM9_IRQHandler          [WEAK]                  
+                EXPORT  TIM1_UP_TIM10_IRQHandler          [WEAK]                
+                EXPORT  TIM1_TRG_COM_TIM11_IRQHandler     [WEAK] 
+                EXPORT  TIM1_CC_IRQHandler                [WEAK]                                   
+                EXPORT  TIM2_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM3_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM4_IRQHandler                   [WEAK]                                            
+                EXPORT  I2C1_EV_IRQHandler                [WEAK]                                             
+                EXPORT  I2C1_ER_IRQHandler                [WEAK]                                             
+                EXPORT  I2C2_EV_IRQHandler                [WEAK]                                            
+                EXPORT  I2C2_ER_IRQHandler                [WEAK]                                               
+                EXPORT  SPI1_IRQHandler                   [WEAK]                                           
+                EXPORT  SPI2_IRQHandler                   [WEAK]                                            
+                EXPORT  USART1_IRQHandler                 [WEAK]                                          
+                EXPORT  USART2_IRQHandler                 [WEAK]                                          
+                EXPORT  USART3_IRQHandler                 [WEAK]                                         
+                EXPORT  EXTI15_10_IRQHandler              [WEAK]                                  
+                EXPORT  RTC_Alarm_IRQHandler              [WEAK]                  
+                EXPORT  OTG_FS_WKUP_IRQHandler            [WEAK]                        
+                EXPORT  TIM8_BRK_TIM12_IRQHandler         [WEAK]                 
+                EXPORT  TIM8_UP_TIM13_IRQHandler          [WEAK]                 
+                EXPORT  TIM8_TRG_COM_TIM14_IRQHandler     [WEAK] 
+                EXPORT  TIM8_CC_IRQHandler                [WEAK]                                   
+                EXPORT  DMA1_Stream7_IRQHandler           [WEAK]                                          
+                EXPORT  FSMC_IRQHandler                   [WEAK]                                             
+                EXPORT  SDIO_IRQHandler                   [WEAK]                                             
+                EXPORT  TIM5_IRQHandler                   [WEAK]                                             
+                EXPORT  SPI3_IRQHandler                   [WEAK]                                             
+                EXPORT  UART4_IRQHandler                  [WEAK]                                            
+                EXPORT  UART5_IRQHandler                  [WEAK]                                            
+                EXPORT  TIM6_DAC_IRQHandler               [WEAK]                   
+                EXPORT  TIM7_IRQHandler                   [WEAK]                    
+                EXPORT  DMA2_Stream0_IRQHandler           [WEAK]                                  
+                EXPORT  DMA2_Stream1_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream2_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream3_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream4_IRQHandler           [WEAK]                                 
+                EXPORT  ETH_IRQHandler                    [WEAK]                                         
+                EXPORT  ETH_WKUP_IRQHandler               [WEAK]                     
+                EXPORT  CAN2_TX_IRQHandler                [WEAK]                                               
+                EXPORT  CAN2_RX0_IRQHandler               [WEAK]                                               
+                EXPORT  CAN2_RX1_IRQHandler               [WEAK]                                               
+                EXPORT  CAN2_SCE_IRQHandler               [WEAK]                                               
+                EXPORT  OTG_FS_IRQHandler                 [WEAK]                                       
+                EXPORT  DMA2_Stream5_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream6_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream7_IRQHandler           [WEAK]                                   
+                EXPORT  USART6_IRQHandler                 [WEAK]                                           
+                EXPORT  I2C3_EV_IRQHandler                [WEAK]                                              
+                EXPORT  I2C3_ER_IRQHandler                [WEAK]                                              
+                EXPORT  OTG_HS_EP1_OUT_IRQHandler         [WEAK]                      
+                EXPORT  OTG_HS_EP1_IN_IRQHandler          [WEAK]                      
+                EXPORT  OTG_HS_WKUP_IRQHandler            [WEAK]                        
+                EXPORT  OTG_HS_IRQHandler                 [WEAK]                                      
+                EXPORT  DCMI_IRQHandler                   [WEAK]                                             
+                EXPORT  CRYP_IRQHandler                   [WEAK]                                     
+                EXPORT  HASH_RNG_IRQHandler               [WEAK]
+
+WWDG_IRQHandler                                                       
+PVD_IRQHandler                                      
+TAMP_STAMP_IRQHandler                  
+RTC_WKUP_IRQHandler                                
+FLASH_IRQHandler                                                       
+RCC_IRQHandler                                                            
+EXTI0_IRQHandler                                                          
+EXTI1_IRQHandler                                                           
+EXTI2_IRQHandler                                                          
+EXTI3_IRQHandler                                                         
+EXTI4_IRQHandler                                                          
+DMA1_Stream0_IRQHandler                                       
+DMA1_Stream1_IRQHandler                                          
+DMA1_Stream2_IRQHandler                                          
+DMA1_Stream3_IRQHandler                                          
+DMA1_Stream4_IRQHandler                                          
+DMA1_Stream5_IRQHandler                                          
+DMA1_Stream6_IRQHandler                                          
+ADC_IRQHandler                                         
+CAN1_TX_IRQHandler                                                            
+CAN1_RX0_IRQHandler                                                          
+CAN1_RX1_IRQHandler                                                           
+CAN1_SCE_IRQHandler                                                           
+EXTI9_5_IRQHandler                                                
+TIM1_BRK_TIM9_IRQHandler                        
+TIM1_UP_TIM10_IRQHandler                      
+TIM1_TRG_COM_TIM11_IRQHandler  
+TIM1_CC_IRQHandler                                               
+TIM2_IRQHandler                                                           
+TIM3_IRQHandler                                                           
+TIM4_IRQHandler                                                           
+I2C1_EV_IRQHandler                                                         
+I2C1_ER_IRQHandler                                                         
+I2C2_EV_IRQHandler                                                        
+I2C2_ER_IRQHandler                                                           
+SPI1_IRQHandler                                                          
+SPI2_IRQHandler                                                           
+USART1_IRQHandler                                                       
+USART2_IRQHandler                                                       
+USART3_IRQHandler                                                      
+EXTI15_10_IRQHandler                                            
+RTC_Alarm_IRQHandler                            
+OTG_FS_WKUP_IRQHandler                                
+TIM8_BRK_TIM12_IRQHandler                      
+TIM8_UP_TIM13_IRQHandler                       
+TIM8_TRG_COM_TIM14_IRQHandler  
+TIM8_CC_IRQHandler                                               
+DMA1_Stream7_IRQHandler                                                 
+FSMC_IRQHandler                                                            
+SDIO_IRQHandler                                                            
+TIM5_IRQHandler                                                            
+SPI3_IRQHandler                                                            
+UART4_IRQHandler                                                          
+UART5_IRQHandler                                                          
+TIM6_DAC_IRQHandler                            
+TIM7_IRQHandler                              
+DMA2_Stream0_IRQHandler                                         
+DMA2_Stream1_IRQHandler                                          
+DMA2_Stream2_IRQHandler                                           
+DMA2_Stream3_IRQHandler                                           
+DMA2_Stream4_IRQHandler                                        
+ETH_IRQHandler                                                         
+ETH_WKUP_IRQHandler                                
+CAN2_TX_IRQHandler                                                           
+CAN2_RX0_IRQHandler                                                          
+CAN2_RX1_IRQHandler                                                          
+CAN2_SCE_IRQHandler                                                          
+OTG_FS_IRQHandler                                                    
+DMA2_Stream5_IRQHandler                                          
+DMA2_Stream6_IRQHandler                                          
+DMA2_Stream7_IRQHandler                                          
+USART6_IRQHandler                                                        
+I2C3_EV_IRQHandler                                                          
+I2C3_ER_IRQHandler                                                          
+OTG_HS_EP1_OUT_IRQHandler                           
+OTG_HS_EP1_IN_IRQHandler                            
+OTG_HS_WKUP_IRQHandler                                
+OTG_HS_IRQHandler                                                   
+DCMI_IRQHandler                                                            
+CRYP_IRQHandler                                                    
+HASH_RNG_IRQHandler                                               
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+                
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+                
+                 ELSE
+                
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+                 
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Device/STM32F207IG/system_stm32f2xx.c b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Device/STM32F207IG/system_stm32f2xx.c
new file mode 100644
index 000000000..da0e189c8
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Device/STM32F207IG/system_stm32f2xx.c
@@ -0,0 +1,536 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32f2xx.c
+  * @author  MCD Application Team
+  * @version V1.0.0
+  * @date    18-April-2011
+  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
+  *          This file contains the system clock configuration for STM32F2xx devices,
+  *          and is generated by the clock configuration tool
+  *          "STM32f2xx_Clock_Configuration_V1.0.0.xls"
+  *             
+  * 1.  This file provides two functions and one global variable to be called from 
+  *     user application:
+  *      - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
+  *                      and Divider factors, AHB/APBx prescalers and Flash settings),
+  *                      depending on the configuration made in the clock xls tool. 
+  *                      This function is called at startup just after reset and 
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32f2xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick 
+  *                                  timer or configure other parameters.
+  *                                     
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  * 2. After each device reset the HSI (16 MHz) is used as system clock source.
+  *    Then SystemInit() function is called, in "startup_stm32f2xx.s" file, to
+  *    configure the system clock before to branch to main program.
+  *
+  * 3. If the system clock source selected by user fails to startup, the SystemInit()
+  *    function will do nothing and HSI still used as system clock source. User can 
+  *    add some code to deal with this issue inside the SetSysClock() function.
+  *
+  * 4. The default value of HSE crystal is set to 25MHz, refer to "HSE_VALUE" define
+  *    in "stm32f2xx.h" file. When HSE is used as system clock source, directly or
+  *    through PLL, and you are using different crystal you have to adapt the HSE
+  *    value to your own configuration.
+  *
+  * 5. This file configures the system clock as follows:
+  *=============================================================================
+  *=============================================================================
+  *        Supported STM32F2xx device revision    | Rev B and Y
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | PLL (HSE)
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 120000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 120000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 4
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 2
+  *-----------------------------------------------------------------------------
+  *        HSE Frequency(Hz)                      | 25000000
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 25
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 240
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 5
+  *-----------------------------------------------------------------------------
+  *        PLLI2S_N                               | NA
+  *-----------------------------------------------------------------------------
+  *        PLLI2S_R                               | NA
+  *-----------------------------------------------------------------------------
+  *        I2S input clock                        | NA
+  *-----------------------------------------------------------------------------
+  *        VDD(V)                                 | 3.3
+  *-----------------------------------------------------------------------------
+  *        Flash Latency(WS)                      | 3
+  *-----------------------------------------------------------------------------
+  *        Prefetch Buffer                        | ON
+  *-----------------------------------------------------------------------------
+  *        Instruction cache                      | ON
+  *-----------------------------------------------------------------------------
+  *        Data cache                             | ON
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for USB OTG FS,          | Enabled
+  *        SDIO and RNG clock                     |
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ****************************************************************************** 
+  * @attention
+  *
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * 
© COPYRIGHT 2011 STMicroelectronics

+  ******************************************************************************  
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f2xx_system
+  * @{
+  */  
+  
+/** @addtogroup STM32F2xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32f2xx.h"
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Defines
+  * @{
+  */
+
+/*!< Uncomment the following line if you need to use external SRAM mounted
+     on STM322xG_EVAL board as data memory  */
+/* #define DATA_IN_ExtSRAM */
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field. 
+                                   This value must be a multiple of 0x200. */
+
+
+/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
+#define PLL_M      25
+#define PLL_N      240
+
+/* SYSCLK = PLL_VCO / PLL_P */
+#define PLL_P      2
+
+/* USB OTG FS, SDIO and RNG Clock =  PLL_VCO / PLLQ */
+#define PLL_Q      5
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Variables
+  * @{
+  */
+
+  uint32_t SystemCoreClock = 120000000;
+
+  __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+static void SetSysClock(void);
+#ifdef DATA_IN_ExtSRAM
+  static void SystemInit_ExtMemCtl(void); 
+#endif /* DATA_IN_ExtSRAM */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system
+  *         Initialize the Embedded Flash Interface, the PLL and update the 
+  *         SystemFrequency variable.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+  /* Reset the RCC clock configuration to the default reset state ------------*/
+  /* Set HSION bit */
+  RCC->CR |= (uint32_t)0x00000001;
+
+  /* Reset CFGR register */
+  RCC->CFGR = 0x00000000;
+
+  /* Reset HSEON, CSSON and PLLON bits */
+  RCC->CR &= (uint32_t)0xFEF6FFFF;
+
+  /* Reset PLLCFGR register */
+  RCC->PLLCFGR = 0x24003010;
+
+  /* Reset HSEBYP bit */
+  RCC->CR &= (uint32_t)0xFFFBFFFF;
+
+  /* Disable all interrupts */
+  RCC->CIR = 0x00000000;
+
+#ifdef DATA_IN_ExtSRAM
+  SystemInit_ExtMemCtl(); 
+#endif /* DATA_IN_ExtSRAM */
+         
+  /* Configure the System clock source, PLL Multiplier and Divider factors, 
+     AHB/APBx prescalers and Flash settings ----------------------------------*/
+  SetSysClock();
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *           
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.         
+  *     
+  * @note   - The system frequency computed by this function is not the real 
+  *           frequency in the chip. It is calculated based on the predefined 
+  *           constant and the selected clock source:
+  *             
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *                                              
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+  *                          
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *         
+  *         (*) HSI_VALUE is a constant defined in stm32f2xx.h file (default value
+  *             16 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.   
+  *    
+  *         (**) HSE_VALUE is a constant defined in stm32f2xx.h file (default value
+  *              25 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *                
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *     
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+  
+  /* Get SYSCLK source -------------------------------------------------------*/
+  tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+  switch (tmp)
+  {
+    case 0x00:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+    case 0x04:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+    case 0x08:  /* PLL used as system clock source */
+
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+         SYSCLK = PLL_VCO / PLL_P
+         */    
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+      
+      if (pllsource != 0)
+      {
+        /* HSE used as PLL clock source */
+        pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+      else
+      {
+        /* HSI used as PLL clock source */
+        pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);      
+      }
+
+      pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+      SystemCoreClock = pllvco/pllp;
+      break;
+    default:
+      SystemCoreClock = HSI_VALUE;
+      break;
+  }
+  /* Compute HCLK frequency --------------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK frequency */
+  SystemCoreClock >>= tmp;
+}
+
+/**
+  * @brief  Configures the System clock source, PLL Multiplier and Divider factors, 
+  *         AHB/APBx prescalers and Flash settings
+  * @Note   This function should be called only once the RCC clock configuration  
+  *         is reset to the default reset state (done in SystemInit() function).   
+  * @param  None
+  * @retval None
+  */
+static void SetSysClock(void)
+{
+/******************************************************************************/
+/*            PLL (clocked by HSE) used as System clock source                */
+/******************************************************************************/
+  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
+  
+  /* Enable HSE */
+  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
+ 
+  /* Wait till HSE is ready and if Time out is reached exit */
+  do
+  {
+    HSEStatus = RCC->CR & RCC_CR_HSERDY;
+    StartUpCounter++;
+  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
+
+  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
+  {
+    HSEStatus = (uint32_t)0x01;
+  }
+  else
+  {
+    HSEStatus = (uint32_t)0x00;
+  }
+
+  if (HSEStatus == (uint32_t)0x01)
+  {
+    /* HCLK = SYSCLK / 1*/
+    RCC->CFGR |= RCC_CFGR_HPRE_DIV1;
+      
+    /* PCLK2 = HCLK / 2*/
+    RCC->CFGR |= RCC_CFGR_PPRE2_DIV2;
+    
+    /* PCLK1 = HCLK / 4*/
+    RCC->CFGR |= RCC_CFGR_PPRE1_DIV4;
+
+    /* Configure the main PLL */
+    RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) |
+                   (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);
+
+    /* Enable the main PLL */
+    RCC->CR |= RCC_CR_PLLON;
+
+    /* Wait till the main PLL is ready */
+    while((RCC->CR & RCC_CR_PLLRDY) == 0)
+    {
+    }
+   
+    /* Configure Flash prefetch, Instruction cache, Data cache and wait state */
+    FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_3WS;
+
+    /* Select the main PLL as system clock source */
+    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
+    RCC->CFGR |= RCC_CFGR_SW_PLL;
+
+    /* Wait till the main PLL is used as system clock source */
+    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
+    {
+    }
+  }
+  else
+  { /* If HSE fails to start-up, the application will have wrong clock
+         configuration. User can add here some code to deal with this error */
+  }
+
+}
+
+/**
+  * @brief  Setup the external memory controller. Called in startup_stm32f2xx.s
+  *         before jump to __main
+  * @param  None
+  * @retval None
+  */
+#ifdef DATA_IN_ExtSRAM
+/**
+  * @brief  Setup the external memory controller.
+  *         Called in startup_stm32f2xx.s before jump to main.
+  *         This function configures the external SRAM mounted on STM322xG_EVAL board
+  *         This SRAM will be used as program data memory (including heap and stack).
+  * @param  None
+  * @retval None
+  */
+void SystemInit_ExtMemCtl(void)
+{
+/*-- GPIOs Configuration -----------------------------------------------------*/
+/*
+ +-------------------+--------------------+------------------+------------------+
+ +                       SRAM pins assignment                                  +
+ +-------------------+--------------------+------------------+------------------+
+ | PD0  <-> FSMC_D2  | PE0  <-> FSMC_NBL0 | PF0  <-> FSMC_A0 | PG0 <-> FSMC_A10 |
+ | PD1  <-> FSMC_D3  | PE1  <-> FSMC_NBL1 | PF1  <-> FSMC_A1 | PG1 <-> FSMC_A11 |
+ | PD4  <-> FSMC_NOE | PE7  <-> FSMC_D4   | PF2  <-> FSMC_A2 | PG2 <-> FSMC_A12 |
+ | PD5  <-> FSMC_NWE | PE8  <-> FSMC_D5   | PF3  <-> FSMC_A3 | PG3 <-> FSMC_A13 |
+ | PD8  <-> FSMC_D13 | PE9  <-> FSMC_D6   | PF4  <-> FSMC_A4 | PG4 <-> FSMC_A14 |
+ | PD9  <-> FSMC_D14 | PE10 <-> FSMC_D7   | PF5  <-> FSMC_A5 | PG5 <-> FSMC_A15 |
+ | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8   | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 |
+ | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9   | PF13 <-> FSMC_A7 |------------------+
+ | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10  | PF14 <-> FSMC_A8 | 
+ | PD14 <-> FSMC_D0  | PE14 <-> FSMC_D11  | PF15 <-> FSMC_A9 | 
+ | PD15 <-> FSMC_D1  | PE15 <-> FSMC_D12  |------------------+
+ +-------------------+--------------------+
+*/
+   /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+  RCC->AHB1ENR   = 0x00000078;
+  
+  /* Connect PDx pins to FSMC Alternate function */
+  GPIOD->AFR[0]  = 0x00cc00cc;
+  GPIOD->AFR[1]  = 0xcc0ccccc;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xa2aa0a0a;
+  /* Configure PDx pins speed to 100 MHz */  
+  GPIOD->OSPEEDR = 0xf3ff0f0f;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FSMC Alternate function */
+  GPIOE->AFR[0]  = 0xc00000cc;
+  GPIOE->AFR[1]  = 0xcccccccc;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xaaaa800a;
+  /* Configure PEx pins speed to 100 MHz */ 
+  GPIOE->OSPEEDR = 0xffffc00f;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+
+  /* Connect PFx pins to FSMC Alternate function */
+  GPIOF->AFR[0]  = 0x00cccccc;
+  GPIOF->AFR[1]  = 0xcccc0000;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xaa000aaa;
+  /* Configure PFx pins speed to 100 MHz */ 
+  GPIOF->OSPEEDR = 0xff000fff;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FSMC Alternate function */
+  GPIOG->AFR[0]  = 0x00cccccc;
+  GPIOG->AFR[1]  = 0x000000c0;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0x00080aaa;
+  /* Configure PGx pins speed to 100 MHz */ 
+  GPIOG->OSPEEDR = 0x000c0fff;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+  
+/*-- FSMC Configuration ------------------------------------------------------*/
+  /* Enable the FSMC interface clock */
+  RCC->AHB3ENR         = 0x00000001;
+
+  /* Configure and enable Bank1_SRAM2 */
+  FSMC_Bank1->BTCR[2]  = 0x00001015;
+  FSMC_Bank1->BTCR[3]  = 0x00010400;
+  FSMC_Bank1E->BWTR[2] = 0x0fffffff;
+/*
+  Bank1_SRAM2 is configured as follow:
+
+  p.FSMC_AddressSetupTime = 0;
+  p.FSMC_AddressHoldTime = 0;
+  p.FSMC_DataSetupTime = 4;
+  p.FSMC_BusTurnAroundDuration = 1;
+  p.FSMC_CLKDivision = 0;
+  p.FSMC_DataLatency = 0;
+  p.FSMC_AccessMode = FSMC_AccessMode_A;
+
+  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
+  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
+  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
+  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;  
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
+  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
+  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
+  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
+*/
+  
+}
+#endif /* DATA_IN_ExtSRAM */
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+  
+/**
+  * @}
+  */
+/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/File_System/FS_Config.c b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/File_System/FS_Config.c
new file mode 100644
index 000000000..78564b080
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/File_System/FS_Config.c
@@ -0,0 +1,72 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::File System
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    FS_Config.c
+ * Purpose: File System Configuration
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// File System
+// Define File System global parameters
+
+//   Number of open files <4-16>
+//   Define number of files that can be
+//   opened at the same time.
+//   Default: 8
+#define NUM_FILES               8
+
+//   FAT Name Cache Size <0-1000000>
+//   Define number of cached FAT file or directory names.
+//   48 bytes of RAM is required for each cached name.
+#define FAT_NAME_CACHE_SIZE     0
+
+//   Relocate FAT Name Cache Buffer
+//   Locate Cache Buffer at a specific address.
+#define FAT_NAME_CACHE_RELOC    0
+
+//     Base address <0x0000-0xFFFFFE00:0x200>
+//     Define the Cache buffer base address.
+#define FAT_NAME_CACHE_ADDR     0x60000000
+
+//   
+
+// 
+
+#include "..\RTE_Components.h"
+
+#ifdef  RTE_FileSystem_Drive_RAM
+#include "FS_Config_RAM.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_NOR_0
+#include "FS_Config_NOR_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_NOR_1
+#include "FS_Config_NOR_1.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_NAND_0
+#include "FS_Config_NAND_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_NAND_1
+#include "FS_Config_NAND_1.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_MC_0
+#include "FS_Config_MC_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_MC_1
+#include "FS_Config_MC_1.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_USB_0
+#include "FS_Config_USB_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_USB_1
+#include "FS_Config_USB_1.h"
+#endif
+
+#include "fs_config.h"
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/File_System/FS_Config_MC_0.h b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/File_System/FS_Config_MC_0.h
new file mode 100644
index 000000000..0b1c6d3a7
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/File_System/FS_Config_MC_0.h
@@ -0,0 +1,57 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::File System:Drive
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    FS_Config_MC_0.h
+ * Purpose: File System Configuration for Memory Card Drive
+ * Rev.:    V5.01
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Memory Card Drive 0
+// Configuration for SD/SDHC/MMC Memory Card assigned to drive letter "M0:"
+#define MC0_ENABLE              1
+
+//   Connect to hardware via Driver_MCI# <0-255>
+//   Select driver control block for hardware interface
+#define MC0_MCI_DRIVER          0
+
+//   Connect to hardware via Driver_SPI# <0-255>
+//   Select driver control block for hardware interface when in SPI mode
+#define MC0_SPI_DRIVER          0
+
+//   Memory Card Interface Mode <0=>Native <1=>SPI
+//   Native uses a SD Bus with up to 8 data lines, CLK, and CMD
+//   SPI uses 2 data lines (MOSI and MISO), SCLK and CS
+//   When using SPI both Driver_SPI# and Driver_MCI# must be specified
+//   since the MCI driver provides the control interface lines.
+#define MC0_SPI                 0
+          
+//   Drive Cache Size <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
+//                       <8=>8 KB <16=>16 KB <32=>32 KB
+//   Drive Cache stores data sectors and may be increased to speed-up
+//   file read/write operations on this drive (default: 4 KB)
+#define MC0_CACHE_SIZE          4
+
+//   Locate Drive Cache and Drive Buffer
+//   Some microcontrollers support DMA only in specific memory areas and
+//   require to locate the drive buffers at a fixed address.
+#define MC0_CACHE_RELOC         0
+
+//     Base address <0x0000-0xFFFFFE00:0x200>
+//     Set buffer base address to RAM areas that support DMA with the drive.
+#define MC0_CACHE_ADDR          0x7FD00000
+
+//   
+
+//   Use FAT Journal
+//   Protect File Allocation Table and Directory Entries for
+//   fail-safe operation.
+#define MC0_FAT_JOURNAL         0
+
+//   Default Drive "M0:"
+//   Use this drive when no drive letter is specified.
+#define MC0_DEFAULT_DRIVE       1
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config.c b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config.c
new file mode 100644
index 000000000..6b9dc8e00
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config.c
@@ -0,0 +1,153 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config.c
+ * Purpose: Network Configuration
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// System Definitions
+//  Global Network System definitions
+//   Local Host Name
+//    This is the name under which embedded host can be
+//    accessed on a local area network.
+//    Default: "my_host"
+#define NET_HOST_NAME           "my_host"
+
+//   Memory Pool size <1536-262144:4><#/4>
+//    This is the size of a memory pool in bytes. Buffers for
+//    Network packets are allocated from this memory pool.
+//    Default: 12000 bytes
+#define NET_MEM_SIZE            3000
+
+// 
+
+#include "..\RTE_Components.h"
+
+#ifdef  RTE_Network_Interface_ETH_0
+#include "Net_Config_ETH_0.h"
+#endif
+#ifdef  RTE_Network_Interface_ETH_1
+#include "Net_Config_ETH_1.h"
+#endif
+
+#ifdef  RTE_Network_Interface_PPP_0
+#include "Net_Config_PPP_0.h"
+#endif
+#ifdef  RTE_Network_Interface_PPP_1
+#include "Net_Config_PPP_1.h"
+#endif
+
+#ifdef  RTE_Network_Interface_SLIP_0
+#include "Net_Config_SLIP_0.h"
+#endif
+#ifdef  RTE_Network_Interface_SLIP_1
+#include "Net_Config_SLIP_1.h"
+#endif
+
+#ifdef  RTE_Network_Socket_UDP
+#include "Net_Config_UDP.h"
+#endif
+#ifdef  RTE_Network_Socket_TCP
+#include "Net_Config_TCP.h"
+#endif
+#ifdef  RTE_Network_Socket_BSD
+#include "Net_Config_BSD.h"
+#endif
+
+#ifdef  RTE_Network_Web_Server_RO
+#include "Net_Config_HTTP_Server.h"
+#endif
+#ifdef  RTE_Network_Web_Server_FS
+#include "Net_Config_HTTP_Server.h"
+#endif
+
+#ifdef  RTE_Network_Telnet_Server
+#include "Net_Config_Telnet_Server.h"
+#endif
+
+#ifdef  RTE_Network_TFTP_Server
+#include "Net_Config_TFTP_Server.h"
+#endif
+#ifdef  RTE_Network_TFTP_Client
+#include "Net_Config_TFTP_Client.h"
+#endif
+
+#ifdef  RTE_Network_FTP_Server
+#include "Net_Config_FTP_Server.h"
+#endif
+#ifdef  RTE_Network_FTP_Client
+#include "Net_Config_FTP_Client.h"
+#endif
+
+#ifdef  RTE_Network_DNS_Client
+#include "Net_Config_DNS_Client.h"
+#endif
+
+#ifdef  RTE_Network_SMTP_Client
+#include "Net_Config_SMTP_Client.h"
+#endif
+
+#ifdef  RTE_Network_SNMP_Agent
+#include "Net_Config_SNMP_Agent.h"
+#endif
+
+#ifdef  RTE_Network_SNTP_Client
+#include "Net_Config_SNTP_Client.h"
+#endif
+
+#include "net_config.h"
+
+/**
+\addtogroup net_genFunc
+@{
+*/
+/**
+  \fn          void net_sys_error (ERROR_CODE error)
+  \ingroup     net_cores
+  \brief       Network system error handler.
+*/
+void net_sys_error (ERROR_CODE error) {
+  /* This function is called when a fatal error is encountered. */
+  /* The normal program execution is not possible anymore.      */
+
+  switch (error) {
+    case ERR_MEM_ALLOC:
+      /* Out of memory */
+      break;
+
+    case ERR_MEM_FREE:
+      /* Trying to release non existing memory block */
+      break;
+
+    case ERR_MEM_CORRUPT:
+      /* Memory Link pointer Corrupted */
+      /* More data written than the size of allocated mem block */
+      break;
+
+    case ERR_MEM_LOCK:
+      /* Locked Memory management function (alloc/free) re-entered */
+      break;
+
+    case ERR_UDP_ALLOC:
+      /* Out of UDP Sockets */
+      break;
+
+    case ERR_TCP_ALLOC:
+      /* Out of TCP Sockets */
+      break;
+
+    case ERR_TCP_STATE:
+      /* TCP State machine in undefined state */
+      break;
+  }
+
+  /* End-less loop */
+  while (1);
+}
+/**
+@}
+*/
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_BSD.h b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_BSD.h
new file mode 100644
index 000000000..d7e6a614a
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_BSD.h
@@ -0,0 +1,36 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Socket
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_BSD.h
+ * Purpose: Network Configuration BSD Sockets
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Berkley (BSD) Sockets
+#define BSD_ENABLE              1
+
+//   Number of BSD Sockets <1-20>
+//    Number of available Berkeley Sockets
+//    Default: 2
+#define BSD_NUM_SOCKS           7
+
+//   Number of Streaming Server Sockets <0-20>
+//    Defines a number of Streaming (TCP) Server sockets,
+//    that listen for an incoming connection from the client.
+//    Default: 1
+#define BSD_SERVER_SOCKS        1
+
+//   Receive Timeout in seconds <0-600>
+//    A timeout for socket receive in blocking mode.
+//    Timeout value of 0 means indefinite timeout.
+//    Default: 20
+#define BSD_RECEIVE_TOUT        20
+
+//   Hostname Resolver
+//    Enable or disable Berkeley style hostname resolver.
+#define BSD_HOSTNAME_ENABLE     0
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_DNS_Client.h b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_DNS_Client.h
new file mode 100644
index 000000000..d30b71807
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_DNS_Client.h
@@ -0,0 +1,20 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Service
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_DNS_Client.h
+ * Purpose: Network Configuration DNS Client
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// DNS Client
+#define DNS_CLIENT_ENABLE       1
+
+//     Cache Table size <5-100>
+//      Number of cached DNS host names/IP addresses
+//      Default: 20
+#define DNS_CLIENT_TAB_SIZE     20
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_ETH_0.h b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_ETH_0.h
new file mode 100644
index 000000000..7be57ad6d
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_ETH_0.h
@@ -0,0 +1,222 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Interface
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_ETH_0.h
+ * Purpose: Network Configuration ETH Interface
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Ethernet Network Interface 0
+#define ETH0_ENABLE             1
+
+//   Connect to hardware via Driver_ETH# <0-255>
+//   Select driver control block for MAC and PHY interface
+#define ETH0_DRIVER             1
+
+//   MAC Address
+//    Local Ethernet MAC Address
+//    Value FF:FF:FF:FF:FF:FF is not allowed.
+//    It is an ethernet Broadcast MAC address.
+//     Address byte 1 <0x00-0xff:2>
+//      LSB is an ethernet Multicast bit.
+//      Must be 0 for local MAC address.
+//      Default: 0x1E
+#define ETH0_MAC1               0x1E
+
+//     Address byte 2 <0x00-0xff>
+//      Default: 0x30
+#define ETH0_MAC2               0x30
+
+//     Address byte 3 <0x00-0xff>
+//      Default: 0x6C
+#define ETH0_MAC3               0x6C
+
+//     Address byte 4 <0x00-0xff>
+//      Default: 0xA2
+#define ETH0_MAC4               0xA2
+
+//     Address byte 5 <0x00-0xff>
+//      Default: 0x45
+#define ETH0_MAC5               0x45
+
+//     Address byte 6 <0x00-0xff>
+//      Default: 0x5E
+#define ETH0_MAC6               0x5E
+//   
+
+//   IP Address
+//    Local Static IP Address
+//    Value 255.255.255.255 is not allowed.
+//    It is a Broadcast IP address.
+//     Address byte 1 <0-255>
+//      Default: 192
+#define ETH0_IP1                192
+
+//     Address byte 2 <0-255>
+//      Default: 168
+#define ETH0_IP2                168
+
+//     Address byte 3 <0-255>
+//      Default: 0
+#define ETH0_IP3                0
+
+//     Address byte 4 <0-255>
+//      Default: 100
+#define ETH0_IP4                100
+//   
+
+//   Subnet mask
+//    Local Subnet mask
+//     Mask byte 1 <0-255>
+//      Default: 255
+#define ETH0_MASK1              255
+
+//     Mask byte 2 <0-255>
+//      Default: 255
+#define ETH0_MASK2              255
+
+//     Mask byte 3 <0-255>
+//      Default: 255
+#define ETH0_MASK3              255
+
+//     Mask byte 4 <0-255>
+//      Default: 0
+#define ETH0_MASK4              0
+//   
+
+//   Default Gateway
+//    Default Gateway IP Address
+//     Address byte 1 <0-255>
+//      Default: 192
+#define ETH0_GW1                192
+
+//     Address byte 2 <0-255>
+//      Default: 168
+#define ETH0_GW2                168
+
+//     Address byte 3 <0-255>
+//      Default: 0
+#define ETH0_GW3                0
+
+//     Address byte 4 <0-255>
+//      Default: 254
+#define ETH0_GW4                254
+//   
+
+//   Primary DNS Server
+//    Primary DNS Server IP Address
+//     Address byte 1 <0-255>
+//      Default: 194
+#define ETH0_PRI_DNS1           194
+
+//     Address byte 2 <0-255>
+//      Default: 25
+#define ETH0_PRI_DNS2           25
+
+//     Address byte 3 <0-255>
+//      Default: 2
+#define ETH0_PRI_DNS3           2
+
+//     Address byte 4 <0-255>
+//      Default: 129
+#define ETH0_PRI_DNS4           129
+//   
+
+//   Secondary DNS Server
+//    Secondary DNS Server IP Address
+//     Address byte 1 <0-255>
+//      Default: 194
+#define ETH0_SEC_DNS1           194
+
+//     Address byte 2 <0-255>
+//      Default: 25
+#define ETH0_SEC_DNS2           25
+
+//     Address byte 3 <0-255>
+//      Default: 2
+#define ETH0_SEC_DNS3           2
+
+//     Address byte 4 <0-255>
+//      Default: 130
+#define ETH0_SEC_DNS4           130
+//   
+
+//   ARP Definitions
+//    Address Resolution Protocol Definitions
+//     Cache Table size <5-100>
+//      Number of cached hardware/IP addresses
+//      Default: 10
+#define ETH0_ARP_TAB_SIZE       10
+
+//     Cache Timeout in seconds <5-255>
+//      A timeout for a cached hardware/IP addresses
+//      Default: 150
+#define ETH0_ARP_CACHE_TOUT     150
+
+//     Number of Retries <0-20>
+//      Number of Retries to resolve an IP address
+//      before ARP module gives up
+//      Default: 4
+#define ETH0_ARP_MAX_RETRY      4
+
+//     Resend Timeout in seconds <1-10>
+//      A timeout to resend the ARP Request
+//      Default: 2
+#define ETH0_ARP_RESEND_TOUT    2
+
+//     Send Notification on Address changes
+//      When this option is enabled, the embedded host
+//      will send a Gratuitous ARP notification at startup,
+//      or when the device IP address has changed.
+//      Default: Disabled
+#define ETH0_ARP_NOTIFY         0
+//   
+
+//   IGMP Group Management
+//    Enable or disable Internet Group Management Protocol
+#define ETH0_IGMP_ENABLE        0
+
+//     Membership Table size <2-50>
+//      Number of Groups this host can join
+//      Default: 5
+#define ETH0_IGMP_TAB_SIZE      5
+//   
+
+//   NetBIOS Name Service
+//    When this option is enabled, the embedded host can be
+//    accessed by his name on the local LAN using NBNS protocol.
+//    You need to modify also the number of UDP Sockets,
+//    because NBNS protocol uses one UDP socket to run.
+#define ETH0_NBNS_ENABLE        1
+
+//   Dynamic Host Configuration
+//    When this option is enabled, local IP address, Net Mask
+//    and Default Gateway are obtained automatically from
+//    the DHCP Server on local LAN.
+//    You need to modify also the number of UDP Sockets,
+//    because DHCP protocol uses one UDP socket to run.
+#define ETH0_DHCP_ENABLE        1
+
+//     Vendor Class Identifier
+//      This value is optional. If specified, it is added
+//      to DHCP request message, identifying vendor type.
+//      Default: ""
+#define ETH0_DHCP_VCID          ""
+
+//     Bootfile Name
+//      This value is optional. If enabled, the Bootfile Name
+//      (option 67) is also requested from DHCP server.
+//      Default: disabled
+#define ETH0_DHCP_BOOTFILE      0
+
+//     NTP Servers
+//      This value is optional. If enabled, a list of NTP Servers
+//      (option 42) is also requested from DHCP server.
+//      Default: disabled
+#define ETH0_DHCP_NTP_SERVERS   0
+//   
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_TCP.h b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_TCP.h
new file mode 100644
index 000000000..e659ce921
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_TCP.h
@@ -0,0 +1,61 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Socket
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_TCP.h
+ * Purpose: Network Configuration TCP Sockets
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// TCP Sockets
+#define TCP_ENABLE              1
+
+//   Number of TCP Sockets <1-20>
+//    Number of available TCP sockets
+//    Default: 5
+#define TCP_NUM_SOCKS           10
+
+//   Number of Retries <0-20>
+//    How many times TCP module will try to retransmit data
+//    before giving up. Increase this value for high-latency
+//    and low_throughput networks.
+//    Default: 5
+#define TCP_MAX_RETRY           5
+
+//   Retry Timeout in seconds <1-10>
+//    If data frame not acknowledged within this time frame,
+//    TCP module will try to resend the data again.
+//    Default: 4
+#define TCP_RETRY_TOUT          4
+
+//   Default Connect Timeout in seconds <1-600>
+//    Default TCP Socket Keep Alive timeout. When it expires
+//    with no TCP data frame send, TCP Connection is closed.
+//    Default: 120
+#define TCP_DEFAULT_TOUT        120
+
+//   Maximum Segment Size <536-1460>
+//    The Maximum Segment Size specifies the maximum
+//    number of bytes in the TCP segment's Data field.
+//    Default: 1460
+#define TCP_MAX_SEG_SIZE        1460
+
+//   Receive Window Size <536-65535>
+//    Receive Window Size specifies the size of data, 
+//    that the socket is able to buffer in flow-control mode.
+//    Default: 4380
+#define TCP_RECEIVE_WIN_SIZE    4380
+
+// 
+
+// TCP Initial Retransmit period in seconds
+#define TCP_INITIAL_RETRY_TOUT  1
+
+// TCP SYN frame retransmit period in seconds
+#define TCP_SYN_RETRY_TOUT      2
+
+// Number of retries to establish a connection
+#define TCP_CONNECT_RETRY       7
+
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_UDP.h b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_UDP.h
new file mode 100644
index 000000000..b7995c22d
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Config_UDP.h
@@ -0,0 +1,20 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Socket
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_UDP.h
+ * Purpose: Network Configuration UDP Sockets
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// UDP Sockets
+#define UDP_ENABLE              1
+
+//   Number of UDP Sockets <1-20>
+//    Number of available UDP sockets
+//    Default: 5
+#define UDP_NUM_SOCKS           10
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Debug.c b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Debug.c
new file mode 100644
index 000000000..735089a40
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/Network/Net_Debug.c
@@ -0,0 +1,125 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Debug.c
+ * Purpose: Network Debug Configuration
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Print Time Stamp
+//    Enable printing the time-info in debug messages
+#define DBG_TIME                1
+
+// TCPnet Debug Definitions
+//   Memory Management Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Dynamic Memory debug messages
+#define DBG_MEM                 1
+
+//   Ethernet Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Ethernet debug messages
+#define DBG_ETH                 0
+
+//   PPP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off PPP debug messages
+#define DBG_PPP                 0
+
+//   SLIP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off SLIP debug messages
+#define DBG_SLIP                0
+
+//   ARP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off ARP debug messages
+#define DBG_ARP                 0
+
+//   IP Debug    <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off IP debug messages
+#define DBG_IP                  1
+
+//   ICMP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off ICMP debug messages
+#define DBG_ICMP                1
+
+//   IGMP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off IGMP debug messages
+#define DBG_IGMP                1
+
+//   UDP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off UDP debug messages
+#define DBG_UDP                 1
+
+//   TCP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off TCP debug messages
+#define DBG_TCP                 1
+
+//   NBNS Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off NetBIOS Name Service debug messages
+#define DBG_NBNS                1
+
+//   DHCP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Dynamic Host Configuration debug messages
+#define DBG_DHCP                1
+
+//   DNS Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Domain Name Service debug messages
+#define DBG_DNS                 1
+
+//   SNMP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Simple Network Management debug messages
+#define DBG_SNMP                1
+
+//   SNTP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Simple Network Time debug messages
+#define DBG_SNTP                1
+
+//   BSD Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off BSD Interface debug messages
+#define DBG_BSD                 1
+// 
+
+// Application Debug Definitions
+//   HTTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Web Server debug messages
+#define DBG_HTTP_SERVER         1
+
+//   FTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off FTP Server debug messages
+#define DBG_FTP_SERVER          1
+
+//   FTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off FTP Client debug messages
+#define DBG_FTP_CLIENT          1
+
+//   Telnet Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Telnet Server debug messages
+#define DBG_TELNET_SERVER       1
+
+//   TFTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off TFTP Server debug messages
+#define DBG_TFTP_SERVER         1
+
+//   TFTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off TFTP Client debug messages
+#define DBG_TFTP_CLIENT         1
+
+//   SMTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off SMTP Client debug messages
+#define DBG_SMTP_CLIENT         1
+// 
+
+
+#include "net_debug.h"
+
+
+/**
+  \fn          void net_debug_init (void)
+  \brief       Initialize Network Debug Interface.
+*/
+void net_debug_init (void) {
+  /* Add your code to initialize the Debug output. This is usually the  */
+  /* serial interface. The function is called at TCPnet system startup. */
+  /* You may need to customize also the 'putchar()' function.           */
+
+}
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/RTE_Components.h b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/RTE_Components.h
new file mode 100644
index 000000000..938bd18ea
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/RTE_Components.h
@@ -0,0 +1,28 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ *      *** Do not modify ! ***
+ *
+ * Project: 'simpleClient' 
+ * Target:  'SimpleClient' 
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+#define RTE_DEVICE_STARTUP_STM32F2xx    /* Device Startup for STM32F2 */
+#define RTE_Drivers_ETH_MAC0            /* Driver ETH_MAC0 */
+#define RTE_Drivers_MCI0                /* Driver MCI0 */
+#define RTE_Drivers_PHY_ST802RT1        /* Driver PHY ST802RT1 */
+#define RTE_FileSystem_Core             /* File System Core */
+          #define RTE_FileSystem_LFN              /* File System with Long Filename support */
+#define RTE_FileSystem_Drive_MC_0       /* File System Memory Card Drive 0 */
+#define RTE_Network_Core                /* Network Core */
+          #define RTE_Network_Debug               /* Network Debug Version */
+#define RTE_Network_DNS_Client          /* Network DNS Client */
+#define RTE_Network_Interface_ETH_0     /* Network Interface ETH 0 */
+#define RTE_Network_Socket_BSD          /* Network Socket BSD */
+#define RTE_Network_Socket_TCP          /* Network Socket TCP */
+#define RTE_Network_Socket_UDP          /* Network Socket UDP */
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/STM32_SWO.ini b/IDE/MDK5-ARM/Projects/SimpleClient/STM32_SWO.ini
new file mode 100644
index 000000000..239abce37
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/STM32_SWO.ini
@@ -0,0 +1,36 @@
+/******************************************************************************/
+/* STM32_SWO.ini: STM32 Debugger Initialization File                           */
+/******************************************************************************/
+// <<< Use Configuration Wizard in Context Menu >>>                           // 
+/******************************************************************************/
+/* This file is part of the uVision/ARM development tools.                    */
+/* Copyright (c) 2004-2013 Keil Software. All rights reserved.                */
+/* This software may only be used under the terms of a valid, current,        */
+/* end user licence from KEIL for a compatible version of KEIL software       */
+/* development tools. Nothing else gives you the right to use this software.  */
+/******************************************************************************/
+
+
+FUNC void DebugSetup (void) {
+//  Debug MCU Configuration
+//       DBG_SLEEP      Debug Sleep Mode
+//       DBG_STOP       Debug Stop Mode
+//       DBG_STANDBY    Debug Standby Mode
+//       TRACE_IOEN     Trace I/O Enable 
+//    TRACE_MODE     Trace Mode
+//             <0=> Asynchronous
+//             <1=> Synchronous: TRACEDATA Size 1
+//             <2=> Synchronous: TRACEDATA Size 2
+//             <3=> Synchronous: TRACEDATA Size 4
+//       DBG_IWDG_STOP  Independant Watchdog Stopped when Core is halted
+//       DBG_WWDG_STOP  Window Watchdog Stopped when Core is halted
+//      DBG_TIM1_STOP  Timer 1 Stopped when Core is halted
+//      DBG_TIM2_STOP  Timer 2 Stopped when Core is halted
+//      DBG_TIM3_STOP  Timer 3 Stopped when Core is halted
+//      DBG_TIM4_STOP  Timer 4 Stopped when Core is halted
+//      DBG_CAN_STOP   CAN Stopped when Core is halted
+// 
+  _WDWORD(0xE0042004, 0x00000027);  // DBGMCU_CR
+}
+
+DebugSetup();                       // Debugger Setup
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/SimpleClient.uvoptx b/IDE/MDK5-ARM/Projects/SimpleClient/SimpleClient.uvoptx
new file mode 100644
index 000000000..93fced476
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/SimpleClient.uvoptx
@@ -0,0 +1,1422 @@
+
+
+
+  1.0
+
+  
### uVision Project, (C) Keil Software

+
+  
+    *.c
+    *.s*; *.src; *.a*
+    *.obj
+    *.lib
+    *.txt; *.h; *.inc
+    *.plm
+    *.cpp
+  
+
+  
+    0
+    0
+  
+
+  
+    SimpleClient
+    0x4
+    ARM-ADS
+    
+      120000000
+      
+        1
+        1
+        0
+        1
+      
+      
+        1
+        65535
+        0
+        0
+        0
+      
+      
+        79
+        66
+        8
+        .\Object\
+      
+      
+        1
+        1
+        1
+        0
+        1
+        1
+        0
+        1
+        0
+        0
+        0
+        0
+      
+      
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        0
+        0
+      
+      
+        1
+        0
+        1
+      
+      255
+      
+        SARMCM3.DLL
+        -REMAP -MPU
+        DCM.DLL
+        -pCM3
+        SARMCM3.DLL
+        -REMAP -MPU
+        TCM.DLL
+        -pCM3
+      
+      
+        0
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        0
+        1
+        1
+        0
+        0
+        8
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        .\STM32_SWO.ini
+        BIN\ULP2CM3.DLL
+      
+      
+        
+          0
+          DLGTARM
+          (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+        
+        
+          0
+          ARMDBGFLAGS
+          
+        
+        
+          0
+          ULP2CM3
+          -UP1135060 -O206 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO19 -TC120000000 -TP18 -TDX0 -TDD0 -TDS8000 -TDT0 -TDC1F -TIE1 -TIP1 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024.flm -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm)
+        
+        
+          0
+          DLGUARM
+          
+        
+        
+          0
+          UL2CM3
+          UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm))
+        
+      
+      
+      
+        
+          1
+          8
+          0x20000408
+        
+      
+      
+        
+          2
+          8
+          0x8004dc8
+        
+      
+      
+        0
+      
+      
+        0
+        0
+        1
+        0
+        0
+        0
+        0
+        1
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        1
+        0
+        0
+        0
+        0
+      
+      
+      
+    
+  
+
+  
+    Source
+    1
+    0
+    0
+    0
+    
+      1
+      1
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      .\main.c
+      main.c
+      0
+      0
+    
+    
+      1
+      2
+      1
+      0
+      0
+      3
+      0
+      0
+      0
+      0
+      .\client.c
+      client.c
+      0
+      0
+    
+  
+
+  
+    Configuration
+    1
+    0
+    0
+    0
+    
+      2
+      3
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      .\config-SimpleClient.h
+      config-SimpleClient.h
+      0
+      0
+    
+    
+      2
+      4
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      .\RTE\wolfSSL\config-CyaSSL.h
+      config-CyaSSL.h
+      0
+      0
+    
+    
+      2
+      5
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      .\RTE\wolfSSL\config-Crypt.h
+      config-Crypt.h
+      0
+      0
+    
+  
+
+  
+    Documentation
+    1
+    0
+    0
+    0
+    
+      3
+      6
+      5
+      0
+      0
+      0
+      0
+      1
+      1
+      0
+      .\Abstract.txt
+      Abstract.txt
+      0
+      0
+    
+  
+
+  
+    ::CMSIS
+    0
+    0
+    0
+    1
+    
+      4
+      7
+      4
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib
+      RTX_CM3.lib
+      1
+      0
+    
+    
+      4
+      8
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\CMSIS\RTX_Conf_CM.c
+      RTX_Conf_CM.c
+      1
+      0
+    
+  
+
+  
+    ::Device
+    0
+    0
+    0
+    1
+    
+      5
+      9
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c
+      DMA_STM32F2xx.c
+      1
+      0
+    
+    
+      5
+      10
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c
+      GPIO_STM32F2xx.c
+      1
+      0
+    
+    
+      5
+      11
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Device\STM32F207IG\RTE_Device.h
+      RTE_Device.h
+      1
+      0
+    
+    
+      5
+      12
+      2
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Device\STM32F207IG\startup_stm32f2xx.s
+      startup_stm32f2xx.s
+      1
+      0
+    
+    
+      5
+      13
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Device\STM32F207IG\system_stm32f2xx.c
+      system_stm32f2xx.c
+      1
+      0
+    
+  
+
+  
+    ::Drivers
+    0
+    0
+    0
+    1
+    
+      6
+      14
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Driver\PHY_ST802RT1.c
+      PHY_ST802RT1.c
+      1
+      0
+    
+    
+      6
+      15
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\EMAC_STM32F2xx.c
+      EMAC_STM32F2xx.c
+      1
+      0
+    
+    
+      6
+      16
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c
+      MCI_STM32F2xx.c
+      1
+      0
+    
+  
+
+  
+    ::File System
+    0
+    0
+    0
+    1
+    
+      7
+      17
+      4
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib
+      FS_LFN_CM3_L.lib
+      1
+      0
+    
+    
+      7
+      18
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\File_System\FS_Config.c
+      FS_Config.c
+      1
+      0
+    
+    
+      7
+      19
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\File_System\FS_Config_MC_0.h
+      FS_Config_MC_0.h
+      1
+      0
+    
+  
+
+  
+    ::Network
+    0
+    0
+    0
+    1
+    
+      8
+      20
+      4
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Lib\ARM\Net_Dbg_CM3_L.lib
+      Net_Dbg_CM3_L.lib
+      1
+      0
+    
+    
+      8
+      21
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config.c
+      Net_Config.c
+      1
+      0
+    
+    
+      8
+      22
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_BSD.h
+      Net_Config_BSD.h
+      1
+      0
+    
+    
+      8
+      23
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_DNS_Client.h
+      Net_Config_DNS_Client.h
+      1
+      0
+    
+    
+      8
+      24
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_ETH_0.h
+      Net_Config_ETH_0.h
+      1
+      0
+    
+    
+      8
+      25
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_TCP.h
+      Net_Config_TCP.h
+      1
+      0
+    
+    
+      8
+      26
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_UDP.h
+      Net_Config_UDP.h
+      1
+      0
+    
+    
+      8
+      27
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Debug.c
+      Net_Debug.c
+      1
+      0
+    
+  
+
+  
+    ::wolfSSL
+    0
+    0
+    0
+    1
+    
+      9
+      28
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
+      cyassl_MDK_ARM.c
+      1
+      0
+    
+    
+      9
+      29
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
+      time-STM32F2xx.c
+      1
+      0
+    
+    
+      9
+      30
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c
+      aes.c
+      1
+      0
+    
+    
+      9
+      31
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c
+      arc4.c
+      1
+      0
+    
+    
+      9
+      32
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c
+      asm.c
+      1
+      0
+    
+    
+      9
+      33
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c
+      asn.c
+      1
+      0
+    
+    
+      9
+      34
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c
+      blake2b.c
+      1
+      0
+    
+    
+      9
+      35
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c
+      camellia.c
+      1
+      0
+    
+    
+      9
+      36
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c
+      coding.c
+      1
+      0
+    
+    
+      9
+      37
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c
+      compress.c
+      1
+      0
+    
+    
+      9
+      38
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c
+      des3.c
+      1
+      0
+    
+    
+      9
+      39
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c
+      dh.c
+      1
+      0
+    
+    
+      9
+      40
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c
+      dsa.c
+      1
+      0
+    
+    
+      9
+      41
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c
+      ecc.c
+      1
+      0
+    
+    
+      9
+      42
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c
+      ecc_fp.c
+      1
+      0
+    
+    
+      9
+      43
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c
+      error.c
+      1
+      0
+    
+    
+      9
+      44
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c
+      hc128.c
+      1
+      0
+    
+    
+      9
+      45
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c
+      hmac.c
+      1
+      0
+    
+    
+      9
+      46
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c
+      integer.c
+      1
+      0
+    
+    
+      9
+      47
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c
+      logging.c
+      1
+      0
+    
+    
+      9
+      48
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c
+      md2.c
+      1
+      0
+    
+    
+      9
+      49
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c
+      md4.c
+      1
+      0
+    
+    
+      9
+      50
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c
+      md5.c
+      1
+      0
+    
+    
+      9
+      51
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c
+      memory.c
+      1
+      0
+    
+    
+      9
+      52
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c
+      misc.c
+      1
+      0
+    
+    
+      9
+      53
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c
+      pwdbased.c
+      1
+      0
+    
+    
+      9
+      54
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c
+      rabbit.c
+      1
+      0
+    
+    
+      9
+      55
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c
+      random.c
+      1
+      0
+    
+    
+      9
+      56
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c
+      ripemd.c
+      1
+      0
+    
+    
+      9
+      57
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c
+      rsa.c
+      1
+      0
+    
+    
+      9
+      58
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c
+      sha.c
+      1
+      0
+    
+    
+      9
+      59
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c
+      sha256.c
+      1
+      0
+    
+    
+      9
+      60
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c
+      sha512.c
+      1
+      0
+    
+    
+      9
+      61
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c
+      tfm.c
+      1
+      0
+    
+    
+      9
+      62
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\crl.c
+      crl.c
+      1
+      0
+    
+    
+      9
+      63
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\internal.c
+      internal.c
+      1
+      0
+    
+    
+      9
+      64
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\io.c
+      io.c
+      1
+      0
+    
+    
+      9
+      65
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\keys.c
+      keys.c
+      1
+      0
+    
+    
+      9
+      66
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ocsp.c
+      ocsp.c
+      1
+      0
+    
+    
+      9
+      67
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\sniffer.c
+      sniffer.c
+      1
+      0
+    
+    
+      9
+      68
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ssl.c
+      ssl.c
+      1
+      0
+    
+    
+      9
+      69
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\tls.c
+      tls.c
+      1
+      0
+    
+    
+      9
+      70
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\wolfSSL\config-Crypt.h
+      config-Crypt.h
+      1
+      0
+    
+    
+      9
+      71
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\wolfSSL\config-CyaSSL.h
+      config-CyaSSL.h
+      1
+      0
+    
+    
+      9
+      72
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\wolfSSL\config.h
+      config.h
+      1
+      0
+    
+  
+
+
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/client.c b/IDE/MDK5-ARM/Projects/SimpleClient/client.c
new file mode 100644
index 000000000..07cf20bea
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/client.c
@@ -0,0 +1,757 @@
+/* client.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+        #include 
+#endif
+ #define CYASSL_MDK_ARM
+#if defined(CYASSL_MDK_ARM)
+        #include 
+        #include 
+
+        #if defined(CYASSL_MDK5)
+            #include "cmsis_os.h"
+            #include "rl_fs.h" 
+            #include "rl_net.h" 
+        #else
+            #include "rtl.h"
+        #endif
+
+        #include "cyassl_MDK_ARM.h"
+#endif
+
+#include 
+
+#if !defined(CYASSL_TRACK_MEMORY) && !defined(NO_MAIN_DRIVER)
+    /* in case memory tracker wants stats */
+    #define CYASSL_TRACK_MEMORY
+#endif
+
+#include 
+#include 
+
+#include "examples/client/client.h"
+
+#define USE_CYASSL_MEMORY
+
+#ifdef CYASSL_CALLBACKS
+    int handShakeCB(HandShakeInfo*);
+    int timeoutCB(TimeoutInfo*);
+    Timeval timeout;
+#endif
+
+
+static void NonBlockingSSL_Connect(CYASSL* ssl)
+{
+#ifndef CYASSL_CALLBACKS
+    int ret = CyaSSL_connect(ssl);
+#else
+    int ret = CyaSSL_connect_ex(ssl, handShakeCB, timeoutCB, timeout);
+#endif
+    int error = CyaSSL_get_error(ssl, 0);
+    SOCKET_T sockfd = (SOCKET_T)CyaSSL_get_fd(ssl);
+    int select_ret;
+
+    while (ret != SSL_SUCCESS && (error == SSL_ERROR_WANT_READ ||
+                                  error == SSL_ERROR_WANT_WRITE)) {
+        int currTimeout = 1;
+
+        if (error == SSL_ERROR_WANT_READ)
+            printf("... client would read block\n");
+        else
+            printf("... client would write block\n");
+
+#ifdef CYASSL_DTLS
+        currTimeout = CyaSSL_dtls_get_current_timeout(ssl);
+#endif
+        select_ret = tcp_select(sockfd, currTimeout);
+
+        if ((select_ret == TEST_RECV_READY) ||
+                                        (select_ret == TEST_ERROR_READY)) {
+            #ifndef CYASSL_CALLBACKS
+                    ret = CyaSSL_connect(ssl);
+            #else
+                ret = CyaSSL_connect_ex(ssl,handShakeCB,timeoutCB,timeout);
+            #endif
+            error = CyaSSL_get_error(ssl, 0);
+        }
+        else if (select_ret == TEST_TIMEOUT && !CyaSSL_dtls(ssl)) {
+            error = SSL_ERROR_WANT_READ;
+        }
+#ifdef CYASSL_DTLS
+        else if (select_ret == TEST_TIMEOUT && CyaSSL_dtls(ssl) &&
+                                            CyaSSL_dtls_got_timeout(ssl) >= 0) {
+            error = SSL_ERROR_WANT_READ;
+        }
+#endif
+        else {
+            error = SSL_FATAL_ERROR;
+        }
+    }
+    if (ret != SSL_SUCCESS)
+        err_sys("SSL_connect failed");
+}
+
+
+static void Usage(void)
+{
+    printf("client "    LIBCYASSL_VERSION_STRING
+           " NOTE: All files relative to CyaSSL home dir\n");
+    printf("-?          Help, print this usage\n");
+    printf("-h    Host to connect to, default %s\n", yasslIP);
+    printf("-p     Port to connect on, not 0, default %d\n", yasslPort);
+    printf("-v     SSL version [0-3], SSLv3(0) - TLS1.2(3)), default %d\n",
+                                 CLIENT_DEFAULT_VERSION);
+    printf("-l     Cipher list\n");
+    printf("-c    Certificate file,           default %s\n", cliCert);
+    printf("-k    Key file,                   default %s\n", cliKey);
+    printf("-A    Certificate Authority file, default %s\n", caCert);
+    printf("-b     Benchmark  connections and print stats\n");
+    printf("-s          Use pre Shared keys\n");
+    printf("-t          Track CyaSSL memory use\n");
+    printf("-d          Disable peer checks\n");
+    printf("-g          Send server HTTP GET\n");
+    printf("-u          Use UDP DTLS,"
+           " add -v 2 for DTLSv1 (default), -v 3 for DTLSv1.2\n");
+    printf("-m          Match domain name in cert\n");
+    printf("-N          Use Non-blocking sockets\n");
+    printf("-r          Resume session\n");
+    printf("-f          Fewer packets/group messages\n");
+    printf("-x          Disable client cert/key loading\n");
+#ifdef SHOW_SIZES
+    printf("-z          Print structure sizes\n");
+#endif
+    printf("-S     Use Host Name Indication\n");
+}
+
+#ifdef CYASSL_MDK_SHELL
+#define exit(code) return(code)
+#endif
+
+#ifdef CYASSL_MDK_SHELL
+    #define exit(code) return(code)
+#endif
+
+
+THREAD_RETURN CYASSL_THREAD client_test(void* args)
+{
+    SOCKET_T sockfd = 0;
+
+    CYASSL_METHOD*  method  = 0;
+    CYASSL_CTX*     ctx     = 0;
+    CYASSL*         ssl     = 0;
+    
+    CYASSL*         sslResume = 0;
+    CYASSL_SESSION* session = 0;
+    char         resumeMsg[] = "resuming cyassl!";
+    int          resumeSz    = sizeof(resumeMsg);
+
+    char msg[32] = "hello cyassl!";   /* GET may make bigger */
+    char reply[80];
+    int  input;
+    int  msgSz = (int)strlen(msg);
+
+    int   port   = yasslPort;
+    char* host   = (char*)yasslIP;
+    char* domain = (char*)"www.yassl.com";
+
+    int    ch;
+    int    version = CLIENT_INVALID_VERSION;
+    int    usePsk   = 0;
+    int    sendGET  = 0;
+    int    benchmark = 0;
+    int    doDTLS    = 0;
+    int    matchName = 0;
+    int    doPeerCheck = 1;
+    int    nonBlocking = 0;
+    int    resumeSession = 0;
+    int    trackMemory   = 0;
+    int    useClientCert = 1;
+    int    fewerPackets  = 0;
+    char*  cipherList = NULL;
+    char*  verifyCert = (char*)caCert;
+    char*  ourCert    = (char*)cliCert;
+    char*  ourKey     = (char*)cliKey;
+
+#ifdef HAVE_SNI
+    char*  sniHostName = NULL;
+#endif
+
+    int     argc = ((func_args*)args)->argc;
+    char**  argv = ((func_args*)args)->argv;
+
+    ((func_args*)args)->return_code = -1; /* error state */
+
+#ifdef NO_RSA
+    verifyCert = (char*)eccCert;
+    ourCert    = (char*)cliEccCert;
+    ourKey     = (char*)cliEccKey;
+#endif
+    (void)resumeSz;
+    (void)session;
+    (void)sslResume;
+    (void)trackMemory;
+
+    while ((ch = mygetopt(argc, argv, "?gdusmNrtfxh:p:v:l:A:c:k:b:zS:")) != -1){
+        switch (ch) {
+            case '?' :
+                Usage();
+                exit(EXIT_SUCCESS);
+
+            case 'g' :
+                sendGET = 1;
+                break;
+
+            case 'd' :
+                doPeerCheck = 0;
+                break;
+
+            case 'u' :
+                doDTLS  = 1;
+                break;
+
+            case 's' :
+                usePsk = 1;
+                break;
+
+            case 't' :
+            #ifdef USE_CYASSL_MEMORY
+                trackMemory = 1;
+            #endif
+                break;
+
+            case 'm' :
+                matchName = 1;
+                break;
+
+            case 'x' :
+                useClientCert = 0;
+                break;
+
+            case 'f' :
+                fewerPackets = 1;
+                break;
+
+            case 'h' :
+                host   = myoptarg;
+                domain = myoptarg;
+                break;
+
+            case 'p' :
+                port = atoi(myoptarg);
+                #if !defined(NO_MAIN_DRIVER) || defined(USE_WINDOWS_API)
+                    if (port == 0)
+                        err_sys("port number cannot be 0");
+                #endif
+                break;
+
+            case 'v' :
+                version = atoi(myoptarg);
+                if (version < 0 || version > 3) {
+                    Usage();
+                    exit(MY_EX_USAGE);
+                }
+                break;
+
+            case 'l' :
+                cipherList = myoptarg;
+                break;
+
+            case 'A' :
+                verifyCert = myoptarg;
+                break;
+
+            case 'c' :
+                ourCert = myoptarg;
+                break;
+
+            case 'k' :
+                ourKey = myoptarg;
+                break;
+
+            case 'b' :
+                benchmark = atoi(myoptarg);
+                if (benchmark < 0 || benchmark > 1000000) {
+                    Usage();
+                    exit(MY_EX_USAGE);
+                }
+                break;
+
+            case 'N' :
+                nonBlocking = 1;
+                break;
+
+            case 'r' :
+                resumeSession = 1;
+                break;
+
+            case 'z' :
+                #ifndef CYASSL_LEANPSK
+                    CyaSSL_GetObjectSize();
+                #endif
+                break;
+
+            case 'S' :
+                #ifdef HAVE_SNI
+                    sniHostName = myoptarg;
+                #endif
+                break;
+
+            default:
+                Usage();
+                exit(MY_EX_USAGE);
+        }
+    }
+
+    myoptind = 0;      /* reset for test cases */
+
+    /* sort out DTLS versus TLS versions */
+    if (version == CLIENT_INVALID_VERSION) {
+        if (doDTLS)
+            version = CLIENT_DTLS_DEFAULT_VERSION;
+        else
+            version = CLIENT_DEFAULT_VERSION;
+    }
+    else {
+        if (doDTLS) {
+            if (version == 3)
+                version = -2;
+            else
+                version = -1;
+        }
+    }
+
+#ifdef USE_CYASSL_MEMORY
+    if (trackMemory)
+        InitMemoryTracker(); 
+#endif
+
+    switch (version) {
+#ifndef NO_OLD_TLS
+        case 0:
+            method = CyaSSLv3_client_method();
+            break;
+                
+                
+    #ifndef NO_TLS
+        case 1:
+            method = CyaTLSv1_client_method();
+            break;
+
+        case 2:
+            method = CyaTLSv1_1_client_method();
+            break;
+    #endif /* NO_TLS */
+                
+#endif  /* NO_OLD_TLS */
+                
+#ifndef NO_TLS
+        case 3:
+            method = CyaTLSv1_2_client_method();
+            break;
+#endif
+
+#ifdef CYASSL_DTLS
+        case -1:
+            method = CyaDTLSv1_client_method();
+            break;
+
+        case -2:
+            method = CyaDTLSv1_2_client_method();
+            break;
+#endif
+
+        default:
+            err_sys("Bad SSL version");
+            break;
+    }
+
+    if (method == NULL)
+        err_sys("unable to get method");
+
+    ctx = CyaSSL_CTX_new(method);
+    if (ctx == NULL)
+        err_sys("unable to get ctx");
+		
+    if (cipherList)
+        if (CyaSSL_CTX_set_cipher_list(ctx, cipherList) != SSL_SUCCESS)
+            err_sys("client can't set cipher list 1");
+
+#ifdef CYASSL_LEANPSK
+    usePsk = 1;
+#endif
+
+#if defined(NO_RSA) && !defined(HAVE_ECC)
+    usePsk = 1;
+#endif
+
+    if (fewerPackets)
+        CyaSSL_CTX_set_group_messages(ctx);
+
+    if (usePsk) {
+#ifndef NO_PSK
+        CyaSSL_CTX_set_psk_client_callback(ctx, my_psk_client_cb);
+        if (cipherList == NULL) {
+            const char *defaultCipherList;
+            #ifdef HAVE_NULL_CIPHER
+                defaultCipherList = "PSK-NULL-SHA256";
+            #else
+                defaultCipherList = "PSK-AES128-CBC-SHA256";
+            #endif
+            if (CyaSSL_CTX_set_cipher_list(ctx,defaultCipherList) !=SSL_SUCCESS)
+                err_sys("client can't set cipher list 2");
+        }
+#endif
+        useClientCert = 0;
+    }
+
+#ifdef OPENSSL_EXTRA
+    CyaSSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack);
+#endif
+
+#if defined(CYASSL_SNIFFER) && !defined(HAVE_NTRU) && !defined(HAVE_ECC)
+    if (cipherList == NULL) {
+        /* don't use EDH, can't sniff tmp keys */
+        if (CyaSSL_CTX_set_cipher_list(ctx, "AES256-SHA256") != SSL_SUCCESS) {
+            err_sys("client can't set cipher list 3");
+        }
+    }
+#endif
+
+#ifdef USER_CA_CB
+    CyaSSL_CTX_SetCACb(ctx, CaCb);
+#endif
+
+#ifdef VERIFY_CALLBACK
+    CyaSSL_CTX_set_verify(ctx, SSL_VERIFY_PEER, myVerify);
+#endif
+#if !defined(NO_FILESYSTEM) && !defined(NO_CERTS)
+    if (useClientCert){
+        if (CyaSSL_CTX_use_certificate_chain_file(ctx, ourCert) != SSL_SUCCESS)
+            err_sys("can't load client cert file, check file and run from"
+                    " CyaSSL home dir");
+
+        if (CyaSSL_CTX_use_PrivateKey_file(ctx, ourKey, SSL_FILETYPE_PEM)
+                                         != SSL_SUCCESS)
+            err_sys("can't load client private key file, check file and run "
+                    "from CyaSSL home dir");
+    }
+
+    if (!usePsk) {
+        if (CyaSSL_CTX_load_verify_locations(ctx, verifyCert, 0) != SSL_SUCCESS)
+                err_sys("can't load ca file, Please run from CyaSSL home dir");
+    }
+#endif
+#if !defined(NO_CERTS)
+    if (!usePsk && doPeerCheck == 0)
+        CyaSSL_CTX_set_verify(ctx, SSL_VERIFY_NONE, 0);
+#endif
+
+#ifdef HAVE_CAVIUM
+    CyaSSL_CTX_UseCavium(ctx, CAVIUM_DEV_ID);
+#endif
+
+#ifdef HAVE_SNI
+    if (sniHostName)
+        if (CyaSSL_CTX_UseSNI(ctx, 0, sniHostName, XSTRLEN(sniHostName)))
+            err_sys("UseSNI failed");
+#endif
+
+    if (benchmark) {
+        /* time passed in number of connects give average */
+        int times = benchmark;
+        int i = 0;
+
+        double start = current_time(), avg;
+
+        for (i = 0; i < times; i++) {
+            tcp_connect(&sockfd, host, port, doDTLS);
+
+            ssl = CyaSSL_new(ctx);
+            CyaSSL_set_fd(ssl, sockfd);
+            if (CyaSSL_connect(ssl) != SSL_SUCCESS)
+                err_sys("SSL_connect failed");
+
+            CyaSSL_shutdown(ssl);
+            CyaSSL_free(ssl);
+            CloseSocket(sockfd);
+        }
+        avg = current_time() - start;
+        avg /= times;
+        avg *= 1000;   /* milliseconds */
+        printf("CyaSSL_connect avg took: %8.3f milliseconds\n", avg);
+
+        CyaSSL_CTX_free(ctx);
+        ((func_args*)args)->return_code = 0;
+
+        exit(EXIT_SUCCESS);
+    }
+    
+    #if defined(CYASSL_MDK_ARM)
+    CyaSSL_CTX_set_verify(ctx, SSL_VERIFY_NONE, 0);
+    #endif
+    
+    ssl = CyaSSL_new(ctx);
+    if (ssl == NULL)
+        err_sys("unable to get SSL object");
+
+    CyaSSL_set_quiet_shutdown(ssl, 1) ;
+
+    if (doDTLS) {
+        SOCKADDR_IN_T addr;
+        build_addr(&addr, host, port, 1);
+        CyaSSL_dtls_set_peer(ssl, &addr, sizeof(addr));
+        tcp_socket(&sockfd, 1);
+    }
+    else {
+        tcp_connect(&sockfd, host, port, 0);
+    }
+    CyaSSL_set_fd(ssl, sockfd);
+#ifdef HAVE_CRL
+    if (CyaSSL_EnableCRL(ssl, CYASSL_CRL_CHECKALL) != SSL_SUCCESS)
+        err_sys("can't enable crl check");
+    if (CyaSSL_LoadCRL(ssl, crlPemDir, SSL_FILETYPE_PEM, 0) != SSL_SUCCESS)
+        err_sys("can't load crl, check crlfile and date validity");
+    if (CyaSSL_SetCRL_Cb(ssl, CRL_CallBack) != SSL_SUCCESS)
+        err_sys("can't set crl callback");
+#endif
+    if (matchName && doPeerCheck)
+        CyaSSL_check_domain_name(ssl, domain);
+#ifndef CYASSL_CALLBACKS
+    if (nonBlocking) {
+        CyaSSL_set_using_nonblock(ssl, 1);
+        tcp_set_nonblocking(&sockfd);
+        NonBlockingSSL_Connect(ssl);
+    }
+    else if (CyaSSL_connect(ssl) != SSL_SUCCESS) {
+        /* see note at top of README */
+        int  err = CyaSSL_get_error(ssl, 0);
+        char buffer[80];
+        printf("err = %d, %s\n", err,
+                                CyaSSL_ERR_error_string(err, buffer));
+        err_sys("SSL_connect failed");
+        /* if you're getting an error here  */
+    }
+#else
+    timeout.tv_sec  = 2;
+    timeout.tv_usec = 0;
+    NonBlockingSSL_Connect(ssl);  /* will keep retrying on timeout */
+#endif
+    showPeer(ssl);
+
+    if (sendGET) {
+        printf("SSL connect ok, sending GET...\n");
+        msgSz = 28;
+        strncpy(msg, "GET /index.html HTTP/1.0\r\n\r\n", msgSz);
+        msg[msgSz] = '\0';
+    }
+    if (CyaSSL_write(ssl, msg, msgSz) != msgSz)
+        err_sys("SSL_write failed");
+
+    input = CyaSSL_read(ssl, reply, sizeof(reply)-1);
+    if (input > 0) {
+        reply[input] = 0;
+        printf("Server response: %s", reply);
+
+        if (sendGET && (input == (sizeof(reply)-1))) {  /* get html */
+            while (1) {
+                input = CyaSSL_read(ssl, reply, sizeof(reply)-1);
+                if (input > 0) {
+                    reply[input] = 0;
+                    printf("%s", reply);
+                    if(input < sizeof(reply)-1)
+                        break ;
+                }
+                else
+                    break;
+            }
+        }
+        printf("\n");
+    }
+    else if (input < 0) {
+        int readErr = CyaSSL_get_error(ssl, 0);
+        if (readErr != SSL_ERROR_WANT_READ)
+            err_sys("CyaSSL_read failed");
+    }
+    
+#ifdef CYASSL_CMSIS_RTOS
+    osDelay(5000) ;
+#endif
+
+#ifndef NO_SESSION_CACHE
+    if (resumeSession) {
+        if (doDTLS) {
+            strncpy(msg, "break", 6);
+            msgSz = (int)strlen(msg);
+            /* try to send session close */
+            CyaSSL_write(ssl, msg, msgSz);
+        }
+        session   = CyaSSL_get_session(ssl);
+        sslResume = CyaSSL_new(ctx);
+    }
+#endif
+
+    if (doDTLS == 0)            /* don't send alert after "break" command */
+        CyaSSL_shutdown(ssl);  /* echoserver will interpret as new conn */
+    CyaSSL_free(ssl);
+    CloseSocket(sockfd);
+
+#ifndef NO_SESSION_CACHE
+    if (resumeSession) {
+        if (doDTLS) {
+            SOCKADDR_IN_T addr;
+            #ifdef USE_WINDOWS_API 
+                Sleep(500);
+            #else
+                sleep(1);
+            #endif
+            build_addr(&addr, host, port, 1);
+            CyaSSL_dtls_set_peer(sslResume, &addr, sizeof(addr));
+            tcp_socket(&sockfd, 1);
+        }
+        else {
+            tcp_connect(&sockfd, host, port, 0);
+        }
+        CyaSSL_set_fd(sslResume, sockfd);
+        CyaSSL_set_session(sslResume, session);
+       
+        showPeer(sslResume);
+#ifndef CYASSL_CALLBACKS
+        if (nonBlocking) {
+            CyaSSL_set_using_nonblock(sslResume, 1);
+            tcp_set_nonblocking(&sockfd);
+            NonBlockingSSL_Connect(sslResume);
+        }
+        else if (CyaSSL_connect(sslResume) != SSL_SUCCESS)
+            err_sys("SSL resume failed");
+#else
+        timeout.tv_sec  = 2;
+        timeout.tv_usec = 0;
+        NonBlockingSSL_Connect(ssl);  /* will keep retrying on timeout */
+#endif
+
+        if (CyaSSL_session_reused(sslResume))
+            printf("reused session id\n");
+        else
+            printf("didn't reuse session id!!!\n");
+
+        if (CyaSSL_write(sslResume, resumeMsg, resumeSz) != resumeSz)
+            err_sys("SSL_write failed");
+
+        if (nonBlocking) {
+            /* give server a chance to bounce a message back to client */
+            #ifdef USE_WINDOWS_API
+                Sleep(500);
+            #else
+                sleep(1);
+            #endif
+        }
+
+        input = CyaSSL_read(sslResume, reply, sizeof(reply)-1);
+        if (input > 0) {
+            reply[input] = 0;
+            printf("Server resume response: %s\n", reply);
+        }
+
+        /* try to send session break */
+        CyaSSL_write(sslResume, msg, msgSz); 
+
+        CyaSSL_shutdown(sslResume);
+        CyaSSL_free(sslResume);
+        CloseSocket(sockfd);
+    }
+#endif /* NO_SESSION_CACHE */
+
+    CyaSSL_CTX_free(ctx);
+
+    ((func_args*)args)->return_code = 0;
+
+#ifdef USE_CYASSL_MEMORY
+    if (trackMemory)
+        ShowMemoryTracker();
+#endif /* USE_CYASSL_MEMORY */
+
+    return 0;
+}
+
+
+/* so overall tests can pull in test function */
+#ifndef NO_MAIN_DRIVER
+
+    int main(int argc, char** argv)
+    {
+        func_args args;
+
+#ifdef HAVE_CAVIUM
+        int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID);
+        if (ret != 0)
+            err_sys("Cavium OpenNitroxDevice failed");
+#endif /* HAVE_CAVIUM */
+
+        StartTCP();
+
+        args.argc = argc;
+        args.argv = argv;
+
+        CyaSSL_Init();
+#if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL)
+        CyaSSL_Debugging_ON();
+#endif
+        if (CurrentDir("client") || CurrentDir("build"))
+            ChangeDirBack(2);
+  
+#ifdef HAVE_STACK_SIZE
+        StackSizeCheck(&args, client_test);
+#else 
+        client_test(&args);
+#endif
+        CyaSSL_Cleanup();
+
+#ifdef HAVE_CAVIUM
+        CspShutdown(CAVIUM_DEV_ID);
+#endif
+        return args.return_code;
+    }
+
+    int myoptind = 0;
+    char* myoptarg = NULL;
+
+#endif /* NO_MAIN_DRIVER */
+
+
+
+#ifdef CYASSL_CALLBACKS
+
+    int handShakeCB(HandShakeInfo* info)
+    {
+        (void)info;
+        return 0;
+    }
+
+
+    int timeoutCB(TimeoutInfo* info)
+    {
+        (void)info;
+        return 0;
+    }
+
+#endif
+
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/main.c b/IDE/MDK5-ARM/Projects/SimpleClient/main.c
new file mode 100644
index 000000000..7eda03912
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/main.c
@@ -0,0 +1,115 @@
+/* main.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+ 
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+#include 
+
+#include "cmsis_os.h"
+#include "rl_fs.h" 
+#include "rl_net.h" 
+#include 
+#include "cyassl_MDK_ARM.h"
+#include 
+
+/*-----------------------------------------------------------------------------
+ *        Initialize a Flash Memory Card
+ *----------------------------------------------------------------------------*/
+static void init_filesystem (void) {
+    int32_t retv;
+
+    retv = finit ("M0:");
+    if (retv == 0) {
+        retv = fmount ("M0:");
+        if (retv == 0) {
+            printf ("Drive M0 ready!\n");
+        }
+        else {
+          printf ("Drive M0 mount failed!\n");
+        }
+    } else {
+        printf ("Drive M0 initialization failed!\n");
+    }
+}
+
+/*-----------------------------------------------------------------------------
+ *        TCP/IP tasks
+ *----------------------------------------------------------------------------*/
+void tcp_poll (void const *arg)
+{
+    CYASSL_MSG("TCP polling started.\n") ;
+    while (1) {
+        net_main ();
+        osDelay(100) ;
+    }
+}
+
+typedef struct func_args {
+    int    argc;
+    char** argv;
+} func_args;
+
+extern void client_test(func_args * args) ;
+extern void init_time(void) ;
+
+    osThreadDef (tcp_poll, osPriorityHigh , 1, 0) ;
+/*-----------------------------------------------------------------------------
+ *       mian entry 
+ *----------------------------------------------------------------------------*/
+int myoptind = 0;
+char* myoptarg = NULL;
+
+#include "config-SimpleClient.h"
+
+int main() 
+{
+    static char *argv[] = 
+          {   "client",   "-h", CYASSL_CALLEE_IP, "-p", CYASSL_CALLEE_PORT, 
+                                   "-v",  CYASSL_SSL_VER,  CYASSL_HTTP_GET } ;
+    static   func_args args  = 
+          {  7 + CYASSL_HTTP_GET_COUNT, argv } ; 
+        
+    init_time() ;
+    init_filesystem ();
+    net_initialize() ;
+    osThreadCreate (osThread (tcp_poll), NULL); 
+    osDelay(50000) ;  /* wait for DHCP */
+    #if defined(DEBUG_CYASSL)
+         printf("Turning ON Debug message\n") ;
+         CyaSSL_Debugging_ON() ;
+    #endif
+        
+    if(args.argc == 7)
+        printf("Simple SSL/TLS, ") ;
+    else
+        printf("HTTP GET, ") ;
+
+    printf("Callee IP: %s, Port: %s, Version:%s\n", argv[2], argv[4], argv[6]) ; 
+
+    while(1) {
+          client_test(&args) ;
+          printf("Enter any key to iterate.\n") ;
+          getchar() ;
+    }
+}
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/simpleClient.uvprojx b/IDE/MDK5-ARM/Projects/SimpleClient/simpleClient.uvprojx
new file mode 100644
index 000000000..fb0174c76
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/simpleClient.uvprojx
@@ -0,0 +1,1106 @@
+
+
+
+  2.1
+
+  
### uVision Project, (C) Keil Software

+
+  
+    
+      SimpleClient
+      0x4
+      ARM-ADS
+      
+        
+          STM32F207IG
+          STMicroelectronics
+          IRAM(0x20000000,0x20000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M3") CLOCK(120000000) ELITTLE
+          
+          
+          UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm))
+          0
+          $$Device:STM32F207IG$Device\Include\stm32f2xx.h
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          $$Device:STM32F207IG$SVD\STM32F20x.svd
+          0
+          0
+          
+          
+          
+          
+          
+          
+            0
+            0
+            0
+            0
+            1
+          
+          .\Object\
+          SimpleClient
+          1
+          0
+          0
+          1
+          1
+          .\Object\
+          1
+          0
+          0
+          
+            0
+            0
+            
+            
+            0
+            0
+            0
+            0
+          
+          
+            0
+            0
+            
+            
+            0
+            0
+          
+          
+            0
+            0
+            
+            
+            0
+            0
+          
+          0
+          
+        
+        
+          0
+          0
+          0
+          0
+          0
+          1
+          0
+          0
+          0
+          0
+          3
+          
+          
+          1
+        
+        
+          SARMCM3.DLL
+          -REMAP -MPU
+          DCM.DLL
+          -pCM3
+          SARMCM3.DLL
+          -REMAP -MPU
+          TCM.DLL
+          -pCM3
+        
+        
+          
+            1
+            0
+            0
+            0
+            16
+          
+          
+            0
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+          
+          
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+            1
+            1
+          
+          0
+          8
+          
+            
+            
+            
+            
+            
+          
+          
+            
+            
+            
+            
+            .\STM32_SWO.ini
+            BIN\ULP2CM3.DLL
+          
+        
+        
+          
+            1
+            0
+            0
+            1
+            1
+            4100
+          
+          1
+          BIN\ULP2CM3.DLL
+          "" ()
+          
+          
+          
+          
+          0
+        
+        
+          
+            0
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+            1
+            1
+            0
+            1
+            1
+            0
+            0
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+            0
+            "Cortex-M3"
+            
+            0
+            0
+            0
+            1
+            1
+            0
+            0
+            0
+            0
+            0
+            8
+            0
+            0
+            0
+            3
+            3
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            1
+            0
+            0
+            0
+            0
+            1
+            0
+            
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x20000000
+                0x20000
+              
+              
+                1
+                0x8000000
+                0x100000
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                1
+                0x8000000
+                0x100000
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x20000000
+                0x20000
+              
+              
+                0
+                0x0
+                0x0
+              
+            
+            
+          
+          
+            1
+            4
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            
+              
+              HAVE_CONFIG_H  MDK_CONF_SimpleClient CYASSL_STM32F2xx
+              
+              
+            
+          
+          
+            1
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            
+              
+              
+              
+              
+            
+          
+          
+            1
+            0
+            0
+            0
+            1
+            0
+            0x08000000
+            0x20000000
+            
+            
+            
+            
+            
+            
+          
+        
+      
+      
+        
+          Source
+          
+            
+              main.c
+              1
+              .\main.c
+            
+            
+              client.c
+              1
+              .\client.c
+            
+          
+        
+        
+          Configuration
+          
+            
+              config-SimpleClient.h
+              5
+              .\config-SimpleClient.h
+            
+            
+              config-CyaSSL.h
+              5
+              .\RTE\wolfSSL\config-CyaSSL.h
+            
+            
+              config-Crypt.h
+              5
+              .\RTE\wolfSSL\config-Crypt.h
+            
+          
+        
+        
+          Documentation
+          
+            
+              Abstract.txt
+              5
+              .\Abstract.txt
+            
+          
+        
+        
+          ::CMSIS
+          
+            
+              RTX_CM3.lib
+              4
+              C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib
+            
+            
+              RTX_Conf_CM.c
+              1
+              RTE\CMSIS\RTX_Conf_CM.c
+            
+          
+        
+        
+          ::Device
+          
+            
+              DMA_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c
+            
+            
+              GPIO_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c
+            
+            
+              RTE_Device.h
+              5
+              RTE\Device\STM32F207IG\RTE_Device.h
+            
+            
+              startup_stm32f2xx.s
+              2
+              RTE\Device\STM32F207IG\startup_stm32f2xx.s
+            
+            
+              system_stm32f2xx.c
+              1
+              RTE\Device\STM32F207IG\system_stm32f2xx.c
+            
+          
+        
+        
+          ::Drivers
+          
+            
+              PHY_ST802RT1.c
+              1
+              C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Driver\PHY_ST802RT1.c
+            
+            
+              EMAC_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\EMAC_STM32F2xx.c
+            
+            
+              MCI_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c
+            
+          
+        
+        
+          ::File System
+          
+            
+              FS_LFN_CM3_L.lib
+              4
+              C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib
+            
+            
+              FS_Config.c
+              1
+              RTE\File_System\FS_Config.c
+            
+            
+              FS_Config_MC_0.h
+              5
+              RTE\File_System\FS_Config_MC_0.h
+            
+          
+        
+        
+          ::Network
+          
+            
+              Net_Dbg_CM3_L.lib
+              4
+              C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Lib\ARM\Net_Dbg_CM3_L.lib
+            
+            
+              Net_Config.c
+              1
+              RTE\Network\Net_Config.c
+            
+            
+              Net_Config_BSD.h
+              5
+              RTE\Network\Net_Config_BSD.h
+            
+            
+              Net_Config_DNS_Client.h
+              5
+              RTE\Network\Net_Config_DNS_Client.h
+            
+            
+              Net_Config_ETH_0.h
+              5
+              RTE\Network\Net_Config_ETH_0.h
+            
+            
+              Net_Config_TCP.h
+              5
+              RTE\Network\Net_Config_TCP.h
+            
+            
+              Net_Config_UDP.h
+              5
+              RTE\Network\Net_Config_UDP.h
+            
+            
+              Net_Debug.c
+              1
+              RTE\Network\Net_Debug.c
+            
+          
+        
+        
+          ::wolfSSL
+          
+            
+              cyassl_MDK_ARM.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
+            
+            
+              time-STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
+            
+            
+              aes.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c
+            
+            
+              arc4.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c
+            
+            
+              asm.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c
+            
+            
+              asn.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c
+            
+            
+              blake2b.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c
+            
+            
+              camellia.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c
+            
+            
+              coding.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c
+            
+            
+              compress.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c
+            
+            
+              des3.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c
+            
+            
+              dh.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c
+            
+            
+              dsa.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c
+            
+            
+              ecc.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c
+            
+            
+              ecc_fp.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c
+            
+            
+              error.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c
+            
+            
+              hc128.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c
+            
+            
+              hmac.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c
+            
+            
+              integer.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c
+            
+            
+              logging.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c
+            
+            
+              md2.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c
+            
+            
+              md4.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c
+            
+            
+              md5.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c
+            
+            
+              memory.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c
+            
+            
+              misc.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c
+            
+            
+              pwdbased.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c
+            
+            
+              rabbit.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c
+            
+            
+              random.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c
+            
+            
+              ripemd.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c
+            
+            
+              rsa.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c
+            
+            
+              sha.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c
+            
+            
+              sha256.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c
+            
+            
+              sha512.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c
+            
+            
+              tfm.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c
+            
+            
+              crl.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\crl.c
+            
+            
+              internal.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\internal.c
+            
+            
+              io.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\io.c
+            
+            
+              keys.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\keys.c
+            
+            
+              ocsp.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ocsp.c
+            
+            
+              sniffer.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\sniffer.c
+            
+            
+              ssl.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ssl.c
+            
+            
+              tls.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\tls.c
+            
+            
+              config-Crypt.h
+              5
+              RTE\wolfSSL\config-Crypt.h
+            
+            
+              config-CyaSSL.h
+              5
+              RTE\wolfSSL\config-CyaSSL.h
+            
+            
+              config.h
+              5
+              RTE\wolfSSL\config.h
+            
+          
+        
+      
+    
+  
+
+  
+    
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+    
+    
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+    
+    
+      
+        RTE\CMSIS\RTX_Conf_CM.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\Device\STM32F207IG\RTE_Device.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Device\STM32F207IG\startup_stm32f2xx.s
+        
+        
+        
+          
+        
+      
+      
+        RTE\Device\STM32F207IG\system_stm32f2xx.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\File_System\FS_Config.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\File_System\FS_Config_MC_0.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_BSD.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_DNS_Client.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_ETH_0.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_TCP.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_UDP.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Debug.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\Other\config-Crypt.h
+        
+        
+        
+      
+      
+        RTE\Other\config-CyaSSL.h
+        
+        
+        
+      
+      
+        RTE\Other\config-RTX-TCP-FS.h
+        
+        
+        
+      
+      
+        RTE\Other\config.h
+        
+        
+        
+      
+      
+        RTE\wolfSSL\config-Crypt.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\wolfSSL\config-CyaSSL.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\wolfSSL\config.h
+        
+        
+        
+          
+        
+      
+    
+  
+
+
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/Abstract.txt b/IDE/MDK5-ARM/Projects/SimpleServer/Abstract.txt
new file mode 100644
index 000000000..ea3ec6412
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/Abstract.txt
@@ -0,0 +1,23 @@
+This program is a simple server example with CyaSSL/wolfCrypt library.
+
+In order to run this program,
+Copy {PACK}\wolfSSL\CyaSSL\2.8.0\cyassl\certs folder and files to the SD memory.
+Set the server IP address in Net_Config_ETH_0.h
+The default server listning port is 11111, defined in test.h
+
+For further configuration, refer config-Crypt.h and config-CyaSSL.h.
+
+When testing this server, it is recommended to test against one of the standard 
+CyaSSL example applications running on a desktop machine.  The standard CyaSSL 
+example applications are located in the CyaSSL root directory under the 
+/examples directory.
+
+For the hardware crypt on config-Crypt.h, download 
+STSW-STM32062: STM32F2xx standard peripherals library at 
+http://www.st.com/. Copy Libraries\STM32F2xx_StdPeriph_Driver\{inc,src} to 
+ {PACK}\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib
+
+
+Support
+-------
+Please send questions or comments to support@wolfssl.com
\ No newline at end of file
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/CMSIS/RTX_Conf_CM.c b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/CMSIS/RTX_Conf_CM.c
new file mode 100644
index 000000000..2298f7ddb
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/CMSIS/RTX_Conf_CM.c
@@ -0,0 +1,276 @@
+/*----------------------------------------------------------------------------
+ *      RL-ARM - RTX
+ *----------------------------------------------------------------------------
+ *      Name:    RTX_Conf_CM.C
+ *      Purpose: Configuration of CMSIS RTX Kernel for Cortex-M
+ *      Rev.:    V4.70
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
+ * All rights reserved.
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *  - Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  - Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *  - Neither the name of ARM  nor the names of its contributors may be used 
+ *    to endorse or promote products derived from this software without 
+ *    specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *---------------------------------------------------------------------------*/
+
+#include "cmsis_os.h"
+
+
+/*----------------------------------------------------------------------------
+ *      RTX User configuration part BEGIN
+ *---------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
+//
+// Thread Configuration
+// =======================
+//
+//   Number of concurrent running threads <0-250>
+//    Defines max. number of threads that will run at the same time.
+//    Default: 6
+#ifndef OS_TASKCNT
+ #define OS_TASKCNT     5
+#endif
+
+//   Default Thread stack size [bytes] <64-4096:8><#/4>
+//    Defines default stack size for threads with osThreadDef stacksz = 0
+//    Default: 200
+#ifndef OS_STKSIZE
+ #define OS_STKSIZE     250
+#endif
+
+//   Main Thread stack size [bytes] <64-20000:8><#/4>
+//    Defines stack size for main thread.
+//    Default: 200
+#ifndef OS_MAINSTKSIZE
+ #define OS_MAINSTKSIZE 3000
+#endif
+
+//   Number of threads with user-provided stack size <0-250>
+//    Defines the number of threads with user-provided stack size.
+//    Default: 0
+#ifndef OS_PRIVCNT
+ #define OS_PRIVCNT     0
+#endif
+
+//   Total stack size [bytes] for threads with user-provided stack size <0-0x10000:8><#/4>
+//    Defines the combined stack size for threads with user-provided stack size.
+//    Default: 0
+#ifndef OS_PRIVSTKSIZE
+ #define OS_PRIVSTKSIZE 4500
+#endif
+
+// Check for stack overflow
+//  Includes the stack checking code for stack overflow.
+//  Note that additional code reduces the Kernel performance.
+#ifndef OS_STKCHECK
+ #define OS_STKCHECK    1
+#endif
+
+// Processor mode for thread execution 
+//   <0=> Unprivileged mode 
+//   <1=> Privileged mode
+//  Default: Privileged mode
+#ifndef OS_RUNPRIV
+ #define OS_RUNPRIV     1
+#endif
+
+// 
+
+// RTX Kernel Timer Tick Configuration
+// ======================================
+//  Use Cortex-M SysTick timer as RTX Kernel Timer
+//  Use the Cortex-M SysTick timer as a time-base for RTX.
+#ifndef OS_SYSTICK
+ #define OS_SYSTICK     1
+#endif
+//
+//   Timer clock value [Hz] <1-1000000000>
+//    Defines the timer clock value.
+//    Default: 12000000  (12MHz)
+#ifndef OS_CLOCK
+ #define OS_CLOCK       12000000
+#endif
+
+//   Timer tick value [us] <1-1000000>
+//    Defines the timer tick value.
+//    Default: 1000  (1ms)
+#ifndef OS_TICK
+ #define OS_TICK        1000
+#endif
+
+// 
+
+// System Configuration
+// =======================
+//
+// Round-Robin Thread switching
+// ===============================
+//
+//  Enables Round-Robin Thread switching.
+#ifndef OS_ROBIN
+ #define OS_ROBIN       1
+#endif
+
+//   Round-Robin Timeout [ticks] <1-1000>
+//    Defines how long a thread will execute before a thread switch.
+//    Default: 5
+#ifndef OS_ROBINTOUT
+ #define OS_ROBINTOUT   5
+#endif
+
+// 
+
+// User Timers
+// ==============
+//    Enables user Timers
+#ifndef OS_TIMERS
+ #define OS_TIMERS      1
+#endif
+
+//   Timer Thread Priority
+//                        <1=> Low
+//     <2=> Below Normal  <3=> Normal  <4=> Above Normal
+//                        <5=> High
+//                        <6=> Realtime (highest)
+//    Defines priority for Timer Thread
+//    Default: High
+#ifndef OS_TIMERPRIO
+ #define OS_TIMERPRIO   5
+#endif
+
+//   Timer Thread stack size [bytes] <64-64000:8><#/4>
+//    Defines stack size for Timer thread.
+//    Default: 200
+#ifndef OS_TIMERSTKSZ
+ #define OS_TIMERSTKSZ  50
+#endif
+
+//   Timer Callback Queue size <1-32>
+//    Number of concurrent active timer callback functions.
+//    Default: 4
+#ifndef OS_TIMERCBQS
+ #define OS_TIMERCBQS   4
+#endif
+
+// 
+
+//   ISR FIFO Queue size<4=>   4 entries  <8=>   8 entries
+//                         <12=> 12 entries  <16=> 16 entries
+//                         <24=> 24 entries  <32=> 32 entries
+//                         <48=> 48 entries  <64=> 64 entries
+//                         <96=> 96 entries
+//    ISR functions store requests to this buffer,
+//    when they are called from the interrupt handler.
+//    Default: 16 entries
+#ifndef OS_FIFOSZ
+ #define OS_FIFOSZ      16
+#endif
+
+// 
+
+//------------- <<< end of configuration section >>> -----------------------
+
+// Standard library system mutexes
+// ===============================
+//  Define max. number system mutexes that are used to protect 
+//  the arm standard runtime library. For microlib they are not used.
+#ifndef OS_MUTEXCNT
+ #define OS_MUTEXCNT    8
+#endif
+
+/*----------------------------------------------------------------------------
+ *      RTX User configuration part END
+ *---------------------------------------------------------------------------*/
+
+#define OS_TRV          ((uint32_t)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1)
+
+
+/*----------------------------------------------------------------------------
+ *      Global Functions
+ *---------------------------------------------------------------------------*/
+
+/*--------------------------- os_idle_demon ---------------------------------*/
+
+void os_idle_demon (void) {
+  /* The idle demon is a system thread, running when no other thread is      */
+  /* ready to run.                                                           */
+
+  for (;;) {
+    /* HERE: include optional user code to be executed when no thread runs.*/
+  }
+}
+
+#if (OS_SYSTICK == 0)   // Functions for alternative timer as RTX kernel timer
+
+/*--------------------------- os_tick_init ----------------------------------*/
+
+// Initialize alternative hardware timer as RTX kernel timer
+// Return: IRQ number of the alternative hardware timer
+int os_tick_init (void) {
+  return (-1);  /* Return IRQ number of timer (0..239) */
+}
+
+/*--------------------------- os_tick_val -----------------------------------*/
+
+// Get alternative hardware timer current value (0 .. OS_TRV)
+uint32_t os_tick_val (void) {
+  return (0);
+}
+
+/*--------------------------- os_tick_ovf -----------------------------------*/
+
+// Get alternative hardware timer overflow flag
+// Return: 1 - overflow, 0 - no overflow
+uint32_t os_tick_ovf (void) {
+  return (0);
+}
+
+/*--------------------------- os_tick_irqack --------------------------------*/
+
+// Acknowledge alternative hardware timer interrupt
+void os_tick_irqack (void) {
+  /* ... */
+}
+
+#endif   // (OS_SYSTICK == 0)
+
+/*--------------------------- os_error --------------------------------------*/
+
+void os_error (uint32_t err_code) {
+  /* This function is called when a runtime error is detected. Parameter */
+  /* 'err_code' holds the runtime error code (defined in RTL.H).         */
+
+  /* HERE: include optional code to be executed on runtime error. */
+  for (;;);
+}
+
+
+/*----------------------------------------------------------------------------
+ *      RTX Configuration Functions
+ *---------------------------------------------------------------------------*/
+
+#include "RTX_CM_lib.h"
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Device/STM32F207IG/RTE_Device.h b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Device/STM32F207IG/RTE_Device.h
new file mode 100644
index 000000000..4a09246f3
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Device/STM32F207IG/RTE_Device.h
@@ -0,0 +1,3127 @@
+/* -----------------------------------------------------------------------------
+ * Copyright (C) 2013 ARM Limited. All rights reserved.
+ *  
+ * $Date:        27. June 2013
+ * $Revision:    V1.01
+ *  
+ * Project:      RTE Device Configuration for ST STM32F2xx
+ * -------------------------------------------------------------------------- */
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+
+#define GPIO_PORT(num) \
+ ((num == 0) ? GPIOA : \
+  (num == 1) ? GPIOB : \
+  (num == 2) ? GPIOC : \
+  (num == 3) ? GPIOD : \
+  (num == 4) ? GPIOE : \
+  (num == 5) ? GPIOF : \
+  (num == 6) ? GPIOG : \
+  (num == 7) ? GPIOH : \
+  (num == 8) ? GPIOI : \
+  NULL)
+
+
+//  Clock Configuration
+//    High-speed Internal Clock <1-999999999>
+#define RTE_HSI                         16000000
+//    High-speed External Clock <1-999999999>
+#define RTE_HSE                         25000000
+//    System Clock <1-999999999>
+#define RTE_SYSCLK                      120000000
+//    AHB Clock    <1-999999999>
+#define RTE_HCLK                        120000000
+//    APB1 Clock   <1-999999999>
+#define RTE_PCLK1                       30000000
+//    APB2 Clock   <1-999999999>
+#define RTE_PCLK2                       60000000
+//       48MHz Clock
+#define RTE_PLL48CK                     48000000
+// 
+
+
+//  USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_UART1]
+//  Configuration settings for Driver_UART1 in component ::Drivers:UART
+#define RTE_USART1                      0
+
+//    USART1_TX Pin <0=>PA9 <1=>PB6
+#define RTE_USART1_TX_ID                0
+#if    (RTE_USART1_TX_ID == 0)
+#define RTE_USART1_TX_PORT              GPIOA
+#define RTE_USART1_TX_BIT               9
+#elif  (RTE_USART1_TX_ID == 1)
+#define RTE_USART1_TX_PORT              GPIOB
+#define RTE_USART1_TX_BIT               6
+#else
+#error "Invalid USART1_TX Pin Configuration!"
+#endif
+
+//    USART1_RX Pin <0=>PA10 <1=>PB7
+#define RTE_USART1_RX_ID                0
+#if    (RTE_USART1_RX_ID == 0)
+#define RTE_USART1_RX_PORT              GPIOA
+#define RTE_USART1_RX_BIT               10
+#elif  (RTE_USART1_RX_ID == 1)
+#define RTE_USART1_RX_PORT              GPIOB
+#define RTE_USART1_RX_BIT               7
+#else
+#error "Invalid USART1_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART1_CK Pin <0=>PA8
+//     
+#define RTE_USART1_CK                   0
+#define RTE_USART1_CK_ID                0
+#if    (RTE_USART1_CK_ID == 0)
+#define RTE_USART1_CK_PORT              GPIOA
+#define RTE_USART1_CK_BIT               8
+#else
+#error "Invalid USART1_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART1_CTS Pin <0=>PA11
+//        USART1_RTS Pin <0=>PA12
+//        Manual CTS/RTS
+//     
+#define RTE_USART1_HW_FLOW              0
+#define RTE_USART1_CTS_ID               0
+#define RTE_USART1_RTS_ID               0
+#define RTE_USART1_MANUAL_FLOW          0
+#if    (RTE_USART1_CTS_ID == 0)
+#define RTE_USART1_CTS_PORT             GPIOA
+#define RTE_USART1_CTS_BIT              11
+#else
+#error "Invalid USART1_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART1_RTS_ID == 0)
+#define RTE_USART1_RTS_PORT             GPIOA
+#define RTE_USART1_RTS_BIT              12
+#else
+#error "Invalid USART1_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <2=>2 <5=>5
+//       Selects DMA Stream (only Stream 2 or 5 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART1_RX_DMA               1
+#define RTE_USART1_RX_DMA_NUMBER        2
+#define RTE_USART1_RX_DMA_STREAM        2
+#define RTE_USART1_RX_DMA_CHANNEL       4
+#define RTE_USART1_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <7=>7
+//       Selects DMA Stream (only Stream 7 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART1_TX_DMA               1
+#define RTE_USART1_TX_DMA_NUMBER        2
+#define RTE_USART1_TX_DMA_STREAM        7
+#define RTE_USART1_TX_DMA_CHANNEL       4
+#define RTE_USART1_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_UART2]
+//  Configuration settings for Driver_UART2 in component ::Drivers:UART
+#define RTE_USART2                      0
+
+//    USART2_TX Pin <0=>PA2 <1=>PD5
+#define RTE_USART2_TX_ID                0
+#if    (RTE_USART2_TX_ID == 0)
+#define RTE_USART2_TX_PORT              GPIOA
+#define RTE_USART2_TX_BIT               2
+#elif  (RTE_USART2_TX_ID == 1)
+#define RTE_USART2_TX_PORT              GPIOD
+#define RTE_USART2_TX_BIT               5
+#else
+#error "Invalid USART2_TX Pin Configuration!"
+#endif
+
+//    USART2_RX Pin <0=>PA3 <1=>PD6
+#define RTE_USART2_RX_ID                0
+#if    (RTE_USART2_RX_ID == 0)
+#define RTE_USART2_RX_PORT              GPIOA
+#define RTE_USART2_RX_BIT               3
+#elif  (RTE_USART2_RX_ID == 1)
+#define RTE_USART2_RX_PORT              GPIOD
+#define RTE_USART2_RX_BIT               6
+#else
+#error "Invalid USART2_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART2_CK Pin <0=>PA4 <1=>PD7
+//     
+#define RTE_USART2_CK                   0
+#define RTE_USART2_CK_ID                0
+#if    (RTE_USART2_CK_ID == 0)
+#define RTE_USART2_CK_PORT              GPIOA
+#define RTE_USART2_CK_BIT               4
+#elif  (RTE_USART2_CK_ID == 1)
+#define RTE_USART2_CK_PORT              GPIOD
+#define RTE_USART2_CK_BIT               7
+#else
+#error "Invalid USART2_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART2_CTS Pin <0=>PA0 <1=>PD3
+//        USART2_RTS Pin <0=>PA1 <1=>PD4
+//        Manual CTS/RTS
+//     
+#define RTE_USART2_HW_FLOW              0
+#define RTE_USART2_CTS_ID               0
+#define RTE_USART2_RTS_ID               0
+#define RTE_USART2_MANUAL_FLOW          0
+#if    (RTE_USART2_CTS_ID == 0)
+#define RTE_USART2_CTS_PORT             GPIOA
+#define RTE_USART2_CTS_BIT              0
+#elif  (RTE_USART2_CTS_ID == 1)
+#define RTE_USART2_CTS_PORT             GPIOD
+#define RTE_USART2_CTS_BIT              3
+#else
+#error "Invalid USART2_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART2_RTS_ID == 0)
+#define RTE_USART2_RTS_PORT             GPIOA
+#define RTE_USART2_RTS_BIT              1
+#elif  (RTE_USART2_RTS_ID == 1)
+#define RTE_USART2_RTS_PORT             GPIOD
+#define RTE_USART2_RTS_BIT              4
+#else
+#error "Invalid USART2_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <5=>5
+//       Selects DMA Stream (only Stream 5 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART2_RX_DMA               1
+#define RTE_USART2_RX_DMA_NUMBER        1
+#define RTE_USART2_RX_DMA_STREAM        5
+#define RTE_USART2_RX_DMA_CHANNEL       4
+#define RTE_USART2_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <6=>6
+//       Selects DMA Stream (only Stream 6 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART2_TX_DMA               1
+#define RTE_USART2_TX_DMA_NUMBER        1
+#define RTE_USART2_TX_DMA_STREAM        6
+#define RTE_USART2_TX_DMA_CHANNEL       4
+#define RTE_USART2_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_UART3]
+//  Configuration settings for Driver_UART3 in component ::Drivers:UART
+#define RTE_USART3                      0
+
+//    USART3_TX Pin <0=>PB10 <1=>PC10 <2=>PD8
+#define RTE_USART3_TX_ID                0
+#if    (RTE_USART3_TX_ID == 0)
+#define RTE_USART3_TX_PORT              GPIOB
+#define RTE_USART3_TX_BIT               10
+#elif  (RTE_USART3_TX_ID == 1)
+#define RTE_USART3_TX_PORT              GPIOC
+#define RTE_USART3_TX_BIT               10
+#elif  (RTE_USART3_TX_ID == 2)
+#define RTE_USART3_TX_PORT              GPIOD
+#define RTE_USART3_TX_BIT               8
+#else
+#error "Invalid USART3_TX Pin Configuration!"
+#endif
+
+//    USART3_RX Pin <0=>PB11 <1=>PC11 <2=>PD9
+#define RTE_USART3_RX_ID                0
+#if    (RTE_USART3_RX_ID == 0)
+#define RTE_USART3_RX_PORT              GPIOB
+#define RTE_USART3_RX_BIT               11
+#elif  (RTE_USART3_RX_ID == 1)
+#define RTE_USART3_RX_PORT              GPIOC
+#define RTE_USART3_RX_BIT               11
+#elif  (RTE_USART3_RX_ID == 2)
+#define RTE_USART3_RX_PORT              GPIOD
+#define RTE_USART3_RX_BIT               9
+#else
+#error "Invalid USART3_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART3_CK Pin <0=>PB12 <1=>PC12 <2=>PD10
+//     
+#define RTE_USART3_CK                   0
+#define RTE_USART3_CK_ID                0
+#if    (RTE_USART3_CK_ID == 0)
+#define RTE_USART3_CK_PORT              GPIOB
+#define RTE_USART3_CK_BIT               12
+#elif  (RTE_USART3_CK_ID == 1)
+#define RTE_USART3_CK_PORT              GPIOC
+#define RTE_USART3_CK_BIT               12
+#elif  (RTE_USART3_CK_ID == 2)
+#define RTE_USART3_CK_PORT              GPIOD
+#define RTE_USART3_CK_BIT               10
+#else
+#error "Invalid USART3_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART3_CTS Pin <0=>PB13 <1=>PD11
+//        USART3_RTS Pin <0=>PB14 <1=>PD12
+//        Manual CTS/RTS
+//     
+#define RTE_USART3_HW_FLOW              0
+#define RTE_USART3_CTS_ID               0
+#define RTE_USART3_RTS_ID               0
+#define RTE_USART3_MANUAL_FLOW          0
+#if    (RTE_USART3_CTS_ID == 0)
+#define RTE_USART3_CTS_PORT             GPIOB
+#define RTE_USART3_CTS_BIT              13
+#elif  (RTE_USART3_CTS_ID == 1)
+#define RTE_USART3_CTS_PORT             GPIOD
+#define RTE_USART3_CTS_BIT              11
+#else
+#error "Invalid USART3_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART3_RTS_ID == 0)
+#define RTE_USART3_RTS_PORT             GPIOB
+#define RTE_USART3_RTS_BIT              14
+#elif  (RTE_USART3_RTS_ID == 1)
+#define RTE_USART3_RTS_PORT             GPIOD
+#define RTE_USART3_RTS_BIT              12
+#else
+#error "Invalid USART3_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <1=>1
+//       Selects DMA Stream (only Stream 1 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART3_RX_DMA               1
+#define RTE_USART3_RX_DMA_NUMBER        1
+#define RTE_USART3_RX_DMA_STREAM        1
+#define RTE_USART3_RX_DMA_CHANNEL       4
+#define RTE_USART3_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <3=>3
+//       Selects DMA Stream (only Stream 3 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART3_TX_DMA               1
+#define RTE_USART3_TX_DMA_NUMBER        1
+#define RTE_USART3_TX_DMA_STREAM        3
+#define RTE_USART3_TX_DMA_CHANNEL       4
+#define RTE_USART3_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  UART4 (Universal asynchronous receiver transmitter) [Driver_UART4]
+//  Configuration settings for Driver_UART4 in component ::Drivers:UART
+#define RTE_UART4                       0
+
+//    UART4_TX Pin <0=>PA0 <1=>PC10
+#define RTE_UART4_TX_ID                 0
+#if    (RTE_UART4_TX_ID == 0)
+#define RTE_UART4_TX_PORT               GPIOA
+#define RTE_UART4_TX_BIT                0
+#elif  (RTE_UART4_TX_ID == 1)
+#define RTE_UART4_TX_PORT               GPIOC
+#define RTE_UART4_TX_BIT                10
+#else
+#error "Invalid UART4_TX Pin Configuration!"
+#endif
+
+//    UART4_RX Pin <0=>PA1 <1=>PC11
+#define RTE_UART4_RX_ID                 0
+#if    (RTE_UART4_RX_ID == 0)
+#define RTE_UART4_RX_PORT               GPIOA
+#define RTE_UART4_RX_BIT                1
+#elif  (RTE_UART4_RX_ID == 1)
+#define RTE_UART4_RX_PORT               GPIOC
+#define RTE_UART4_RX_BIT                11
+#else
+#error "Invalid UART4_RX Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2
+//       Selects DMA Stream (only Stream 2 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART4_RX_DMA                1
+#define RTE_UART4_RX_DMA_NUMBER         1
+#define RTE_UART4_RX_DMA_STREAM         2
+#define RTE_UART4_RX_DMA_CHANNEL        4
+#define RTE_UART4_RX_DMA_PRIORITY       0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <4=>4
+//       Selects DMA Stream (only Stream 4 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART4_TX_DMA                1
+#define RTE_UART4_TX_DMA_NUMBER         1
+#define RTE_UART4_TX_DMA_STREAM         4
+#define RTE_UART4_TX_DMA_CHANNEL        4
+#define RTE_UART4_TX_DMA_PRIORITY       0
+
+// 
+
+
+//  UART5 (Universal asynchronous receiver transmitter) [Driver_UART5]
+//  Configuration settings for Driver_UART5 in component ::Drivers:UART
+#define RTE_UART5                       0
+
+//    UART5_TX Pin <0=>PC12
+#define RTE_UART5_TX_ID                 0
+#if    (RTE_UART5_TX_ID == 0)
+#define RTE_UART5_TX_PORT               GPIOC
+#define RTE_UART5_TX_BIT                12
+#else
+#error "Invalid UART5_TX Pin Configuration!"
+#endif
+
+//    UART5_RX Pin <0=>PD2
+#define RTE_UART5_RX_ID                 0
+#if    (RTE_UART5_RX_ID == 0)
+#define RTE_UART5_RX_PORT               GPIOD
+#define RTE_UART5_RX_BIT                2
+#else
+#error "Invalid UART5_RX Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <0=>0
+//       Selects DMA Stream (only Stream 0 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART5_RX_DMA                1
+#define RTE_UART5_RX_DMA_NUMBER         1
+#define RTE_UART5_RX_DMA_STREAM         0
+#define RTE_UART5_RX_DMA_CHANNEL        4
+#define RTE_UART5_RX_DMA_PRIORITY       0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <7=>7
+//       Selects DMA Stream (only Stream 7 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_UART5_TX_DMA                1
+#define RTE_UART5_TX_DMA_NUMBER         1
+#define RTE_UART5_TX_DMA_STREAM         7
+#define RTE_UART5_TX_DMA_CHANNEL        4
+#define RTE_UART5_TX_DMA_PRIORITY       0
+
+// 
+
+
+//  USART6 (Universal synchronous asynchronous receiver transmitter) [Driver_UART6]
+//  Configuration settings for Driver_UART6 in component ::Drivers:UART
+#define RTE_USART6                      0
+
+//    USART6_TX Pin <0=>PC6 <1=>PG14
+#define RTE_USART6_TX_ID                0
+#if    (RTE_USART6_TX_ID == 0)
+#define RTE_USART6_TX_PORT              GPIOC
+#define RTE_USART6_TX_BIT               6
+#elif  (RTE_USART6_TX_ID == 1)
+#define RTE_USART6_TX_PORT              GPIOG
+#define RTE_USART6_TX_BIT               14
+#else
+#error "Invalid USART6_TX Pin Configuration!"
+#endif
+
+//    USART6_RX Pin <0=>PC7 <1=>PG9
+#define RTE_USART6_RX_ID                0
+#if    (RTE_USART6_RX_ID == 0)
+#define RTE_USART6_RX_PORT              GPIOC
+#define RTE_USART6_RX_BIT               7
+#elif  (RTE_USART6_RX_ID == 1)
+#define RTE_USART6_RX_PORT              GPIOG
+#define RTE_USART6_RX_BIT               9
+#else
+#error "Invalid USART6_RX Pin Configuration!"
+#endif
+
+//      Synchronous
+//        USART6_CK Pin <0=>PC8 <1=>PG7
+//     
+#define RTE_USART6_CK                   0
+#define RTE_USART6_CK_ID                0
+#if    (RTE_USART6_CK_ID == 0)
+#define RTE_USART6_CK_PORT              GPIOC
+#define RTE_USART6_CK_BIT               8
+#elif  (RTE_USART6_CK_ID == 1)
+#define RTE_USART6_CK_PORT              GPIOG
+#define RTE_USART6_CK_BIT               7
+#else
+#error "Invalid USART6_CK Pin Configuration!"
+#endif
+
+//      Hardware flow control
+//        USART6_CTS Pin <0=>PG13 <1=>PG15
+//        USART6_RTS Pin <0=>PG8  <1=>PG12
+//        Manual CTS/RTS
+//     
+#define RTE_USART6_HW_FLOW              0
+#define RTE_USART6_CTS_ID               0
+#define RTE_USART6_RTS_ID               0
+#define RTE_USART6_MANUAL_FLOW          0
+#if    (RTE_USART6_CTS_ID == 0)
+#define RTE_USART6_CTS_PORT             GPIOG
+#define RTE_USART6_CTS_BIT              13
+#elif  (RTE_USART6_CTS_ID == 1)
+#define RTE_USART6_CTS_PORT             GPIOG
+#define RTE_USART6_CTS_BIT              15
+#else
+#error "Invalid USART6_CTS Pin Configuration!"
+#endif
+#if    (RTE_USART6_RTS_ID == 0)
+#define RTE_USART6_RTS_PORT             GPIOG
+#define RTE_USART6_RTS_BIT              8
+#elif  (RTE_USART6_RTS_ID == 1)
+#define RTE_USART6_RTS_PORT             GPIOG
+#define RTE_USART6_RTS_BIT              12
+#else
+#error "Invalid USART6_RTS Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <1=>1 <2=>2
+//       Selects DMA Stream (only Stream 1 or 2 can be used)
+//      Channel <5=>5
+//       Selects DMA Channel (only Channel 5 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART6_RX_DMA               1
+#define RTE_USART6_RX_DMA_NUMBER        2
+#define RTE_USART6_RX_DMA_STREAM        1
+#define RTE_USART6_RX_DMA_CHANNEL       5
+#define RTE_USART6_RX_DMA_PRIORITY      0
+
+//    DMA Tx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <6=>6 <7=>7
+//       Selects DMA Stream (only Stream 6 or 7 can be used)
+//      Channel <5=>5
+//       Selects DMA Channel (only Channel 5 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_USART6_TX_DMA               1
+#define RTE_USART6_TX_DMA_NUMBER        2
+#define RTE_USART6_TX_DMA_STREAM        6
+#define RTE_USART6_TX_DMA_CHANNEL       5
+#define RTE_USART6_TX_DMA_PRIORITY      0
+
+// 
+
+
+//  I2C1 (Inter-integrated Circuit Interface 1) [Driver_I2C1]
+//  Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        0
+
+//    I2C1_SCL Pin <0=>PB6 <1=>PB8
+#define RTE_I2C1_SCL_PORT_ID            0
+#if    (RTE_I2C1_SCL_PORT_ID == 0)
+#define RTE_I2C1_SCL_PORT               GPIOB
+#define RTE_I2C1_SCL_BIT                6
+#elif  (RTE_I2C1_SCL_PORT_ID == 1)
+#define RTE_I2C1_SCL_PORT               GPIOB
+#define RTE_I2C1_SCL_BIT                8
+#else
+#error "Invalid I2C1_SCL Pin Configuration!"
+#endif
+
+//    I2C1_SDA Pin <0=>PB7 <1=>PB9
+#define RTE_I2C1_SDA_PORT_ID            0
+#if    (RTE_I2C1_SDA_PORT_ID == 0)
+#define RTE_I2C1_SDA_PORT               GPIOB
+#define RTE_I2C1_SDA_BIT                7
+#elif  (RTE_I2C1_SDA_PORT_ID == 1)
+#define RTE_I2C1_SDA_PORT               GPIOB
+#define RTE_I2C1_SDA_BIT                9
+#else
+#error "Invalid I2C1_SDA Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <0=>0 <5=>5
+//       Selects DMA Stream (only Stream 0 or 5 can be used)
+//      Channel <1=>1
+//       Selects DMA Channel (only Channel 1 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C1_RX_DMA                 1
+#define RTE_I2C1_RX_DMA_NUMBER          1
+#define RTE_I2C1_RX_DMA_STREAM          0
+#define RTE_I2C1_RX_DMA_CHANNEL         1
+#define RTE_I2C1_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <6=>6 <7=>7
+//       Selects DMA Stream (only Stream 6 or 7 can be used)
+//      Channel <1=>1
+//       Selects DMA Channel (only Channel 1 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C1_TX_DMA                 1
+#define RTE_I2C1_TX_DMA_NUMBER          1
+#define RTE_I2C1_TX_DMA_STREAM          6
+#define RTE_I2C1_TX_DMA_CHANNEL         1
+#define RTE_I2C1_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  I2C2 (Inter-integrated Circuit Interface 2) [Driver_I2C2]
+//  Configuration settings for Driver_I2C2 in component ::Drivers:I2C
+#define RTE_I2C2                        0
+
+//    I2C2_SCL Pin <0=>PF1 <1=>PH4 <2=>PB10
+#define RTE_I2C2_SCL_PORT_ID            0
+#if    (RTE_I2C2_SCL_PORT_ID == 0)
+#define RTE_I2C2_SCL_PORT               GPIOF
+#define RTE_I2C2_SCL_BIT                1
+#elif  (RTE_I2C2_SCL_PORT_ID == 1)
+#define RTE_I2C2_SCL_PORT               GPIOH
+#define RTE_I2C2_SCL_BIT                4
+#elif  (RTE_I2C2_SCL_PORT_ID == 2)
+#define RTE_I2C2_SCL_PORT               GPIOB
+#define RTE_I2C2_SCL_BIT                10
+#else
+#error "Invalid I2C2_SCL Pin Configuration!"
+#endif
+
+//    I2C2_SDA Pin <0=>PF0 <1=>PH5 <2=>PB11
+#define RTE_I2C2_SDA_PORT_ID            0
+#if    (RTE_I2C2_SDA_PORT_ID == 0)
+#define RTE_I2C2_SDA_PORT               GPIOF
+#define RTE_I2C2_SDA_BIT                0
+#elif  (RTE_I2C2_SDA_PORT_ID == 1)
+#define RTE_I2C2_SDA_PORT               GPIOH
+#define RTE_I2C2_SDA_BIT                5
+#elif  (RTE_I2C2_SDA_PORT_ID == 2)
+#define RTE_I2C2_SDA_PORT               GPIOB
+#define RTE_I2C2_SDA_BIT                11
+#else
+#error "Invalid I2C2_SCL Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2 <3=>3
+//       Selects DMA Stream (only Stream 2 or 3 can be used)
+//      Channel <7=>7
+//       Selects DMA Channel (only Channel 7 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C2_RX_DMA                 1
+#define RTE_I2C2_RX_DMA_NUMBER          1
+#define RTE_I2C2_RX_DMA_STREAM          2
+#define RTE_I2C2_RX_DMA_CHANNEL         7
+#define RTE_I2C2_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <7=>7
+//       Selects DMA Stream (only Stream 7 can be used)
+//      Channel <7=>7
+//       Selects DMA Channel (only Channel 1 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C2_TX_DMA                 1
+#define RTE_I2C2_TX_DMA_NUMBER          1
+#define RTE_I2C2_TX_DMA_STREAM          7
+#define RTE_I2C2_TX_DMA_CHANNEL         7
+#define RTE_I2C2_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  I2C3 (Inter-integrated Circuit Interface 3) [Driver_I2C3]
+//  Configuration settings for Driver_I2C3 in component ::Drivers:I2C
+#define RTE_I2C3                        0
+
+//    I2C3_SCL Pin <0=>PH7 <1=>PA8
+#define RTE_I2C3_SCL_PORT_ID            0
+#if    (RTE_I2C3_SCL_PORT_ID == 0)
+#define RTE_I2C3_SCL_PORT               GPIOH
+#define RTE_I2C3_SCL_BIT                7
+#elif  (RTE_I2C3_SCL_PORT_ID == 1)
+#define RTE_I2C3_SCL_PORT               GPIOA
+#define RTE_I2C3_SCL_BIT                8
+#else
+#error "Invalid I2C3_SCL Pin Configuration!"
+#endif
+
+//    I2C3_SDA Pin <0=>PH8 <1=>PC9
+#define RTE_I2C3_SDA_PORT_ID            0
+#if    (RTE_I2C3_SDA_PORT_ID == 0)
+#define RTE_I2C3_SDA_PORT               GPIOH
+#define RTE_I2C3_SDA_BIT                8
+#elif  (RTE_I2C3_SDA_PORT_ID == 1)
+#define RTE_I2C3_SDA_PORT               GPIOC
+#define RTE_I2C3_SDA_BIT                9
+#else
+#error "Invalid I2C3_SCL Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2
+//       Selects DMA Stream (only Stream 2 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C3_RX_DMA                 1
+#define RTE_I2C3_RX_DMA_NUMBER          1
+#define RTE_I2C3_RX_DMA_STREAM          2
+#define RTE_I2C3_RX_DMA_CHANNEL         3
+#define RTE_I2C3_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <4=>4
+//       Selects DMA Stream (only Stream 4 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_I2C3_TX_DMA                 1
+#define RTE_I2C3_TX_DMA_NUMBER          1
+#define RTE_I2C3_TX_DMA_STREAM          4
+#define RTE_I2C3_TX_DMA_CHANNEL         3
+#define RTE_I2C3_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SPI1 (Serial Peripheral Interface 1) [Driver_SPI1]
+//  Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        0
+
+//    SPI1_NSS Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SPI1_NSS_PIN                1
+#define RTE_SPI1_NSS_PORT               GPIO_PORT(0)
+#define RTE_SPI1_NSS_BIT                4
+
+//    SPI1_SCK Pin <0=>PA5 <1=>PB3
+#define RTE_SPI1_SCL_PORT_ID            0
+#if    (RTE_SPI1_SCL_PORT_ID == 0)
+#define RTE_SPI1_SCL_PORT               GPIOA
+#define RTE_SPI1_SCL_BIT                5
+#elif  (RTE_SPI1_SCL_PORT_ID == 1)
+#define RTE_SPI1_SCL_PORT               GPIOB
+#define RTE_SPI1_SCL_BIT                3
+#else
+#error "Invalid SPI1_SCK Pin Configuration!"
+#endif
+
+//    SPI1_MISO Pin <0=>PA6 <1=>PB4
+#define RTE_SPI1_MISO_PORT_ID           0
+#if    (RTE_SPI1_MISO_PORT_ID == 0)
+#define RTE_SPI1_MISO_PORT              GPIOA
+#define RTE_SPI1_MISO_BIT               6
+#elif  (RTE_SPI1_MISO_PORT_ID == 1)
+#define RTE_SPI1_MISO_PORT              GPIOB
+#define RTE_SPI1_MISO_BIT               4
+#else
+#error "Invalid SPI1_MISO Pin Configuration!"
+#endif
+
+//    SPI1_MOSI Pin <0=>PA7 <1=>PB5
+#define RTE_SPI1_MOSI_PORT_ID           0
+#if    (RTE_SPI1_MOSI_PORT_ID == 0)
+#define RTE_SPI1_MOSI_PORT              GPIOA
+#define RTE_SPI1_MOSI_BIT               7
+#elif  (RTE_SPI1_MOSI_PORT_ID == 1)
+#define RTE_SPI1_MOSI_PORT              GPIOB
+#define RTE_SPI1_MOSI_BIT               5
+#else
+#error "Invalid SPI1_MISO Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <0=>0 <2=>2
+//       Selects DMA Stream (only Stream 0 or 2 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI1_RX_DMA                 1
+#define RTE_SPI1_RX_DMA_NUMBER          2
+#define RTE_SPI1_RX_DMA_STREAM          0
+#define RTE_SPI1_RX_DMA_CHANNEL         3
+#define RTE_SPI1_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <3=>3 <5=>5
+//       Selects DMA Stream (only Stream 3 or 5 can be used)
+//      Channel <3=>3
+//       Selects DMA Channel (only Channel 3 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI1_TX_DMA                 1
+#define RTE_SPI1_TX_DMA_NUMBER          2
+#define RTE_SPI1_TX_DMA_STREAM          5
+#define RTE_SPI1_TX_DMA_CHANNEL         3
+#define RTE_SPI1_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SPI2 (Serial Peripheral Interface 2) [Driver_SPI2]
+//  Configuration settings for Driver_SPI2 in component ::Drivers:SPI
+#define RTE_SPI2                        0
+
+//    SPI2_NSS Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SPI2_NSS_PIN                1
+#define RTE_SPI2_NSS_PORT               GPIO_PORT(1)
+#define RTE_SPI2_NSS_BIT                12
+
+//    SPI2_SCK Pin <0=>PB10 <1=>PB13 <2=>PI1
+#define RTE_SPI2_SCL_PORT_ID            0
+#if    (RTE_SPI2_SCL_PORT_ID == 0)
+#define RTE_SPI2_SCL_PORT               GPIOB
+#define RTE_SPI2_SCL_BIT                10
+#elif  (RTE_SPI2_SCL_PORT_ID == 1)
+#define RTE_SPI2_SCL_PORT               GPIOB
+#define RTE_SPI2_SCL_BIT                13
+#elif  (RTE_SPI2_SCL_PORT_ID == 2)
+#define RTE_SPI2_SCL_PORT               GPIOI
+#define RTE_SPI2_SCL_BIT                1
+#else
+#error "Invalid SPI2_SCK Pin Configuration!"
+#endif
+
+//    SPI2_MISO Pin <0=>PB14 <1=>PC2 <2=>PI2
+#define RTE_SPI2_MISO_PORT_ID           0
+#if    (RTE_SPI2_MISO_PORT_ID == 0)
+#define RTE_SPI2_MISO_PORT              GPIOB
+#define RTE_SPI2_MISO_BIT               14
+#elif  (RTE_SPI2_MISO_PORT_ID == 1)
+#define RTE_SPI2_MISO_PORT              GPIOC
+#define RTE_SPI2_MISO_BIT               2
+#elif  (RTE_SPI2_MISO_PORT_ID == 2)
+#define RTE_SPI2_MISO_PORT              GPIOI
+#define RTE_SPI2_MISO_BIT               2
+#else
+#error "Invalid SPI2_MISO Pin Configuration!"
+#endif
+
+//    SPI2_MOSI Pin <0=>PB15 <1=>PC3 <2=>OI3
+#define RTE_SPI2_MOSI_PORT_ID           0
+#if    (RTE_SPI2_MOSI_PORT_ID == 0)
+#define RTE_SPI2_MOSI_PORT              GPIOB
+#define RTE_SPI2_MOSI_BIT               15
+#elif  (RTE_SPI2_MOSI_PORT_ID == 1)
+#define RTE_SPI2_MOSI_PORT              GPIOC
+#define RTE_SPI2_MOSI_BIT               3
+#elif  (RTE_SPI2_MOSI_PORT_ID == 2)
+#define RTE_SPI2_MOSI_PORT              GPIOI
+#define RTE_SPI2_MOSI_BIT               3
+#else
+#error "Invalid SPI2_MISO Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <2=>2
+//       Selects DMA Stream (only Stream 2 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI2_RX_DMA                 1
+#define RTE_SPI2_RX_DMA_NUMBER          1
+#define RTE_SPI2_RX_DMA_STREAM          2
+#define RTE_SPI2_RX_DMA_CHANNEL         0
+#define RTE_SPI2_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <3=>3
+//       Selects DMA Stream (only Stream 3 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI2_TX_DMA                 1
+#define RTE_SPI2_TX_DMA_NUMBER          1
+#define RTE_SPI2_TX_DMA_STREAM          3
+#define RTE_SPI2_TX_DMA_CHANNEL         0
+#define RTE_SPI2_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SPI3 (Serial Peripheral Interface 3) [Driver_SPI3]
+//  Configuration settings for Driver_SPI3 in component ::Drivers:SPI
+#define RTE_SPI3                        0
+
+//    SPI3_NSS Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SPI3_NSS_PIN                1
+#define RTE_SPI3_NSS_PORT               GPIO_PORT(0)
+#define RTE_SPI3_NSS_BIT                15
+
+//    SPI3_SCK Pin <0=>PB3 <1=>PC10
+#define RTE_SPI3_SCL_PORT_ID            0
+#if    (RTE_SPI3_SCL_PORT_ID == 0)
+#define RTE_SPI3_SCL_PORT               GPIOB
+#define RTE_SPI3_SCL_BIT                3
+#elif  (RTE_SPI3_SCL_PORT_ID == 1)
+#define RTE_SPI3_SCL_PORT               GPIOC
+#define RTE_SPI3_SCL_BIT                10
+#else
+#error "Invalid SPI3_SCK Pin Configuration!"
+#endif
+
+//    SPI3_MISO Pin <0=>PB4 <1=>PC11
+#define RTE_SPI3_MISO_PORT_ID           0
+#if    (RTE_SPI3_MISO_PORT_ID == 0)
+#define RTE_SPI3_MISO_PORT              GPIOB
+#define RTE_SPI3_MISO_BIT               4
+#elif  (RTE_SPI3_MISO_PORT_ID == 1)
+#define RTE_SPI3_MISO_PORT              GPIOC
+#define RTE_SPI3_MISO_BIT               11
+#else
+#error "Invalid SPI3_MISO Pin Configuration!"
+#endif
+
+//    SPI3_MOSI Pin <0=>PB5 <1=>PC12
+#define RTE_SPI3_MOSI_PORT_ID           0
+#if    (RTE_SPI3_MOSI_PORT_ID == 0)
+#define RTE_SPI3_MOSI_PORT              GPIOB
+#define RTE_SPI3_MOSI_BIT               5
+#elif  (RTE_SPI3_MOSI_PORT_ID == 1)
+#define RTE_SPI3_MOSI_PORT              GPIOC
+#define RTE_SPI3_MOSI_BIT               12
+#else
+#error "Invalid SPI3_MISO Pin Configuration!"
+#endif
+
+//    DMA Rx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <0=>0 <2=>2
+//       Selects DMA Stream (only Stream 0 or 2 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI3_RX_DMA                 1
+#define RTE_SPI3_RX_DMA_NUMBER          1
+#define RTE_SPI3_RX_DMA_STREAM          0
+#define RTE_SPI3_RX_DMA_CHANNEL         0
+#define RTE_SPI3_RX_DMA_PRIORITY        0
+
+//    DMA Tx
+//      Number <1=>1
+//       Selects DMA Number (only DMA1 can be used)
+//      Stream <5=>5 <7=>7
+//       Selects DMA Stream (only Stream 5 or 7 can be used)
+//      Channel <0=>0
+//       Selects DMA Channel (only Channel 0 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SPI3_TX_DMA                 1
+#define RTE_SPI3_TX_DMA_NUMBER          1
+#define RTE_SPI3_TX_DMA_STREAM          5
+#define RTE_SPI3_TX_DMA_CHANNEL         0
+#define RTE_SPI3_TX_DMA_PRIORITY        0
+
+// 
+
+
+//  SDIO (Secure Digital Input/Output) [Driver_MCI0]
+//  Configuration settings for Driver_MCI0 in component ::Drivers:MCI
+#define RTE_SDIO                        1
+
+//    SDIO_CD (Card Detect) Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Active State <0=>Low <1=>High
+//       Selects Active State Logical Level
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SDIO_CD_PIN                 1
+#define RTE_SDIO_CD_ACTIVE              0
+#define RTE_SDIO_CD_PORT                GPIO_PORT(7)
+#define RTE_SDIO_CD_BIT                 15
+
+//    SDIO_WP (Write Protect) Pin
+//    Configure Pin if exists
+//    GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//      Active State <0=>Low <1=>High
+//       Selects Active State Logical Level
+//      Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//               <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//       Selects Port Name
+//      Bit <0-15>
+//       Selects Port Bit
+//   
+#define RTE_SDIO_WP_PIN                 0
+#define RTE_SDIO_WP_ACTIVE              0
+#define RTE_SDIO_WP_PORT                GPIO_PORT(7)
+#define RTE_SDIO_WP_BIT                 16
+
+//    SDIO Bus
+//      SDIO_CK Pin <0=>PC12
+#define RTE_SDIO_CK_PORT_ID             0
+#if    (RTE_SDIO_CK_PORT_ID == 0)
+#define RTE_SDIO_CK_PORT                GPIOC
+#define RTE_SDIO_CK_PIN                 12
+#else
+#error "Invalid SDIO_CK Pin Configuration!"
+#endif
+//      SDIO_CMD Pin <0=>PD2
+#define RTE_SDIO_CMD_PORT_ID            0
+#if    (RTE_SDIO_CMD_PORT_ID == 0)
+#define RTE_SDIO_CMD_PORT               GPIOD
+#define RTE_SDIO_CMD_PIN                2
+#else
+#error "Invalid SDIO_CDM Pin Configuration!"
+#endif
+//      SDIO_D0 Pin <0=>PC8
+#define RTE_SDIO_D0_PORT_ID             0
+#if    (RTE_SDIO_D0_PORT_ID == 0)
+#define RTE_SDIO_D0_PORT                GPIOC
+#define RTE_SDIO_D0_PIN                 8
+#else
+#error "Invalid SDIO_D0 Pin Configuration!"
+#endif
+//      SDIO_D1 Pin <0=>PC9
+#define RTE_SDIO_D1_PORT_ID             0
+#if    (RTE_SDIO_D1_PORT_ID == 0)
+#define RTE_SDIO_D1_PORT                GPIOC
+#define RTE_SDIO_D1_PIN                 9
+#else
+#error "Invalid SDIO_D1 Pin Configuration!"
+#endif
+//      SDIO_D2 Pin <0=>PC10
+#define RTE_SDIO_D2_PORT_ID             0
+#if    (RTE_SDIO_D2_PORT_ID == 0)
+#define RTE_SDIO_D2_PORT                GPIOC
+#define RTE_SDIO_D2_PIN                 10
+#else
+#error "Invalid SDIO_D2 Pin Configuration!"
+#endif
+//      SDIO_D3 Pin <0=>PC11
+#define RTE_SDIO_D3_PORT_ID             0
+#if    (RTE_SDIO_D3_PORT_ID == 0)
+#define RTE_SDIO_D3_PORT                GPIOC
+#define RTE_SDIO_D3_PIN                 11
+#else
+#error "Invalid SDIO_D3 Pin Configuration!"
+#endif
+//      SDIO_D4 Pin <0=>PB8
+#define RTE_SDIO_D4_PORT_ID             0
+#if    (RTE_SDIO_D4_PORT_ID == 0)
+#define RTE_SDIO_D4_PORT                GPIOB
+#define RTE_SDIO_D4_PIN                 8
+#else
+#error "Invalid SDIO_D4 Pin Configuration!"
+#endif
+//      SDIO_D5 Pin <0=>PB9
+#define RTE_SDIO_D5_PORT_ID             0
+#if    (RTE_SDIO_D5_PORT_ID == 0)
+#define RTE_SDIO_D5_PORT                GPIOB
+#define RTE_SDIO_D5_PIN                 9
+#else
+#error "Invalid SDIO_D5 Pin Configuration!"
+#endif
+//      SDIO_D6 Pin <0=>PC6
+#define RTE_SDIO_D6_PORT_ID             0
+#if    (RTE_SDIO_D6_PORT_ID == 0)
+#define RTE_SDIO_D6_PORT                GPIOC
+#define RTE_SDIO_D6_PIN                 6
+#else
+#error "Invalid SDIO_D6 Pin Configuration!"
+#endif
+//      SDIO_D7 Pin <0=>PC7
+#define RTE_SDIO_D7_PORT_ID             0
+#if    (RTE_SDIO_D7_PORT_ID == 0)
+#define RTE_SDIO_D7_PORT                GPIOC
+#define RTE_SDIO_D7_PIN                 7
+#else
+#error "Invalid SDIO_D7 Pin Configuration!"
+#endif
+//   
+
+//    DMA
+//      Number <2=>2
+//       Selects DMA Number (only DMA2 can be used)
+//      Stream <3=>3 <6=>6
+//       Selects DMA Stream (only Stream 3 or 6 can be used)
+//      Channel <4=>4
+//       Selects DMA Channel (only Channel 4 can be used)
+//      Priority <0=>Low <1=>Medium <2=>High <3=>Very High
+//       Selects DMA Priority
+//   
+#define RTE_SDIO_DMA                    1
+#define RTE_SDIO_DMA_NUMBER             2
+#define RTE_SDIO_DMA_STREAM             3
+#define RTE_SDIO_DMA_CHANNEL            4
+#define RTE_SDIO_DMA_PRIORITY           0
+
+// 
+
+
+//  ETH (Ethernet Interface) [Driver_ETH_MAC0]
+//  Configuration settings for Driver_ETH_MAC0 in component ::Drivers:Ethernet MAC
+#define RTE_ETH                         1
+
+//    MII (Media Independent Interface)
+#define RTE_ETH_MII                     0
+
+//      ETH_MII_TX_CLK Pin <0=>PC3
+#define RTE_ETH_MII_TX_CLK_PORT_ID      0
+#if    (RTE_ETH_MII_TX_CLK_PORT_ID == 0)
+#define RTE_ETH_MII_TX_CLK_PORT         GPIOC
+#define RTE_ETH_MII_TX_CLK_PIN          3
+#else
+#error "Invalid ETH_MII_TX_CLK Pin Configuration!"
+#endif
+//      ETH_MII_TXD0 Pin <0=>PB12 <1=>PG13
+#define RTE_ETH_MII_TXD0_PORT_ID        0
+#if    (RTE_ETH_MII_TXD0_PORT_ID == 0)
+#define RTE_ETH_MII_TXD0_PORT           GPIOB
+#define RTE_ETH_MII_TXD0_PIN            12
+#elif  (RTE_ETH_MII_TXD0_PORT_ID == 1)
+#define RTE_ETH_MII_TXD0_PORT           GPIOG
+#define RTE_ETH_MII_TXD0_PIN            13
+#else
+#error "Invalid ETH_MII_TXD0 Pin Configuration!"
+#endif
+//      ETH_MII_TXD1 Pin <0=>PB13 <1=>PG14
+#define RTE_ETH_MII_TXD1_PORT_ID        0
+#if    (RTE_ETH_MII_TXD1_PORT_ID == 0)
+#define RTE_ETH_MII_TXD1_PORT           GPIOB
+#define RTE_ETH_MII_TXD1_PIN            13
+#elif  (RTE_ETH_MII_TXD1_PORT_ID == 1)
+#define RTE_ETH_MII_TXD1_PORT           GPIOG
+#define RTE_ETH_MII_TXD1_PIN            14
+#else
+#error "Invalid ETH_MII_TXD1 Pin Configuration!"
+#endif
+//      ETH_MII_TXD2 Pin <0=>PC2
+#define RTE_ETH_MII_TXD2_PORT_ID        0
+#if    (RTE_ETH_MII_TXD2_PORT_ID == 0)
+#define RTE_ETH_MII_TXD2_PORT           GPIOC
+#define RTE_ETH_MII_TXD2_PIN            2
+#else
+#error "Invalid ETH_MII_TXD2 Pin Configuration!"
+#endif
+//      ETH_MII_TXD3 Pin <0=>PB8 <1=>PE2
+#define RTE_ETH_MII_TXD3_PORT_ID        0
+#if    (RTE_ETH_MII_TXD3_PORT_ID == 0)
+#define RTE_ETH_MII_TXD3_PORT           GPIOB
+#define RTE_ETH_MII_TXD3_PIN            8
+#elif  (RTE_ETH_MII_TXD3_PORT_ID == 1)
+#define RTE_ETH_MII_TXD3_PORT           GPIOE
+#define RTE_ETH_MII_TXD3_PIN            2
+#else
+#error "Invalid ETH_MII_TXD3 Pin Configuration!"
+#endif
+//      ETH_MII_TX_EN Pin <0=>PB11 <1=>PG11
+#define RTE_ETH_MII_TX_EN_PORT_ID       0
+#if    (RTE_ETH_MII_TX_EN_PORT_ID == 0)
+#define RTE_ETH_MII_TX_EN_PORT          GPIOB
+#define RTE_ETH_MII_TX_EN_PIN           11
+#elif  (RTE_ETH_MII_TX_EN_PORT_ID == 1)
+#define RTE_ETH_MII_TX_EN_PORT          GPIOG
+#define RTE_ETH_MII_TX_EN_PIN           11
+#else
+#error "Invalid ETH_MII_TX_EN Pin Configuration!"
+#endif
+//      ETH_MII_RX_CLK Pin <0=>PA1
+#define RTE_ETH_MII_RX_CLK_PORT_ID        0
+#if    (RTE_ETH_MII_RX_CLK_PORT_ID == 0)
+#define RTE_ETH_MII_RX_CLK_PORT         GPIOA
+#define RTE_ETH_MII_RX_CLK_PIN          1
+#else
+#error "Invalid ETH_MII_RX_CLK Pin Configuration!"
+#endif
+//      ETH_MII_RXD0 Pin <0=>PC4
+#define RTE_ETH_MII_RXD0_PORT_ID        0
+#if    (RTE_ETH_MII_RXD0_PORT_ID == 0)
+#define RTE_ETH_MII_RXD0_PORT           GPIOC
+#define RTE_ETH_MII_RXD0_PIN            4
+#else
+#error "Invalid ETH_MII_RXD0 Pin Configuration!"
+#endif
+//      ETH_MII_RXD1 Pin <0=>PC5
+#define RTE_ETH_MII_RXD1_PORT_ID        0
+#if    (RTE_ETH_MII_RXD1_PORT_ID == 0)
+#define RTE_ETH_MII_RXD1_PORT           GPIOC
+#define RTE_ETH_MII_RXD1_PIN            5
+#else
+#error "Invalid ETH_MII_RXD1 Pin Configuration!"
+#endif
+//      ETH_MII_RXD2 Pin <0=>PB0 <1=>PH6
+#define RTE_ETH_MII_RXD2_PORT_ID        0
+#if    (RTE_ETH_MII_RXD2_PORT_ID == 0)
+#define RTE_ETH_MII_RXD2_PORT           GPIOB
+#define RTE_ETH_MII_RXD2_PIN            0
+#elif  (RTE_ETH_MII_RXD2_PORT_ID == 1)
+#define RTE_ETH_MII_RXD2_PORT           GPIOH
+#define RTE_ETH_MII_RXD2_PIN            6
+#else
+#error "Invalid ETH_MII_RXD2 Pin Configuration!"
+#endif
+//      ETH_MII_RXD3 Pin <0=>PB1 <1=>PH7
+#define RTE_ETH_MII_RXD3_PORT_ID        0
+#if    (RTE_ETH_MII_RXD3_PORT_ID == 0)
+#define RTE_ETH_MII_RXD3_PORT           GPIOB
+#define RTE_ETH_MII_RXD3_PIN            1
+#elif  (RTE_ETH_MII_RXD3_PORT_ID == 1)
+#define RTE_ETH_MII_RXD3_PORT           GPIOH
+#define RTE_ETH_MII_RXD3_PIN            7
+#else
+#error "Invalid ETH_MII_RXD3 Pin Configuration!"
+#endif
+//      ETH_MII_RX_DV Pin <0=>PA7
+#define RTE_ETH_MII_RX_DV_PORT_ID       0
+#if    (RTE_ETH_MII_RX_DV_PORT_ID == 0)
+#define RTE_ETH_MII_RX_DV_PORT          GPIOA
+#define RTE_ETH_MII_RX_DV_PIN           7
+#else
+#error "Invalid ETH_MII_RX_DV Pin Configuration!"
+#endif
+//      ETH_MII_RX_ER Pin <0=>PB10 <1=>PI10
+#define RTE_ETH_MII_RX_ER_PORT_ID       0
+#if    (RTE_ETH_MII_RX_ER_PORT_ID == 0)
+#define RTE_ETH_MII_RX_ER_PORT          GPIOB
+#define RTE_ETH_MII_RX_ER_PIN           10
+#elif  (RTE_ETH_MII_RXD3_PORT_ID == 1)
+#define RTE_ETH_MII_RX_ER_PORT          GPIOI
+#define RTE_ETH_MII_RX_ER_PIN           10
+#else
+#error "Invalid ETH_MII_RX_ER Pin Configuration!"
+#endif
+//      ETH_MII_CRS Pin <0=>PA0 <1=>PH2
+#define RTE_ETH_MII_CRS_PORT_ID       0
+#if    (RTE_ETH_MII_CRS_PORT_ID == 0)
+#define RTE_ETH_MII_CRS_PORT            GPIOA
+#define RTE_ETH_MII_CRS_PIN             0
+#elif  (RTE_ETH_MII_CRS_PORT_ID == 1)
+#define RTE_ETH_MII_CRS_PORT            GPIOH
+#define RTE_ETH_MII_CRS_PIN             2
+#else
+#error "Invalid ETH_MII_CRS Pin Configuration!"
+#endif
+//      ETH_MII_COL Pin <0=>PA3 <1=>PH3
+#define RTE_ETH_MII_COL_PORT_ID       0
+#if    (RTE_ETH_MII_COL_PORT_ID == 0)
+#define RTE_ETH_MII_COL_PORT            GPIOA
+#define RTE_ETH_MII_COL_PIN             3
+#elif  (RTE_ETH_MII_COL_PORT_ID == 1)
+#define RTE_ETH_MII_COL_PORT            GPIOH
+#define RTE_ETH_MII_COL_PIN             3
+#else
+#error "Invalid ETH_MII_COL Pin Configuration!"
+#endif
+
+//   
+
+//    RMII (Reduced Media Independent Interface)
+#define RTE_ETH_RMII                    1
+
+//      ETH_RMII_TXD0 Pin <0=>PB12 <1=>PG13
+#define RTE_ETH_RMII_TXD0_PORT_ID       1
+#if    (RTE_ETH_RMII_TXD0_PORT_ID == 0)
+#define RTE_ETH_RMII_TXD0_PORT          GPIOB
+#define RTE_ETH_RMII_TXD0_PIN           12
+#elif  (RTE_ETH_RMII_TXD0_PORT_ID == 1)
+#define RTE_ETH_RMII_TXD0_PORT          GPIOG
+#define RTE_ETH_RMII_TXD0_PIN           13
+#else
+#error "Invalid ETH_RMII_TXD0 Pin Configuration!"
+#endif
+//      ETH_RMII_TXD1 Pin <0=>PB13 <1=>PG14
+#define RTE_ETH_RMII_TXD1_PORT_ID       1
+#if    (RTE_ETH_RMII_TXD1_PORT_ID == 0)
+#define RTE_ETH_RMII_TXD1_PORT          GPIOB
+#define RTE_ETH_RMII_TXD1_PIN           13
+#elif  (RTE_ETH_RMII_TXD1_PORT_ID == 1)
+#define RTE_ETH_RMII_TXD1_PORT          GPIOG
+#define RTE_ETH_RMII_TXD1_PIN           14
+#else
+#error "Invalid ETH_RMII_TXD1 Pin Configuration!"
+#endif
+//      ETH_RMII_TX_EN Pin <0=>PB11 <1=>PG11
+#define RTE_ETH_RMII_TX_EN_PORT_ID      1
+#if    (RTE_ETH_RMII_TX_EN_PORT_ID == 0)
+#define RTE_ETH_RMII_TX_EN_PORT         GPIOB
+#define RTE_ETH_RMII_TX_EN_PIN          11
+#elif  (RTE_ETH_RMII_TX_EN_PORT_ID == 1)
+#define RTE_ETH_RMII_TX_EN_PORT         GPIOG
+#define RTE_ETH_RMII_TX_EN_PIN          11
+#else
+#error "Invalid ETH_RMII_TX_EN Pin Configuration!"
+#endif
+//      ETH_RMII_RXD0 Pin <0=>PC4
+#define RTE_ETH_RMII_RXD0_PORT_ID       0
+#if    (RTE_ETH_RMII_RXD0_PORT_ID == 0)
+#define RTE_ETH_RMII_RXD0_PORT          GPIOC
+#define RTE_ETH_RMII_RXD0_PIN           4
+#else
+#error "Invalid ETH_RMII_RXD0 Pin Configuration!"
+#endif
+//      ETH_RMII_RXD1 Pin <0=>PC5
+#define RTE_ETH_RMII_RXD1_PORT_ID       0
+#if    (RTE_ETH_RMII_RXD1_PORT_ID == 0)
+#define RTE_ETH_RMII_RXD1_PORT          GPIOC
+#define RTE_ETH_RMII_RXD1_PIN           5
+#else
+#error "Invalid ETH_RMII_RXD1 Pin Configuration!"
+#endif
+//      ETH_RMII_REF_CLK Pin <0=>PA1
+#define RTE_ETH_RMII_REF_CLK_PORT_ID    0
+#if    (RTE_ETH_RMII_REF_CLK_PORT_ID == 0)
+#define RTE_ETH_RMII_REF_CLK_PORT       GPIOA
+#define RTE_ETH_RMII_REF_CLK_PIN        1
+#else
+#error "Invalid ETH_RMII_REF_CLK Pin Configuration!"
+#endif
+//      ETH_RMII_CRS_DV Pin <0=>PA7
+#define RTE_ETH_RMII_CRS_DV_PORT_ID     0
+#if    (RTE_ETH_RMII_CRS_DV_PORT_ID == 0)
+#define RTE_ETH_RMII_CRS_DV_PORT        GPIOA
+#define RTE_ETH_RMII_CRS_DV_PIN         7
+#else
+#error "Invalid ETH_RMII_CRS_DV Pin Configuration!"
+#endif
+
+//   
+
+//    Management Data Interface
+//      ETH_MDC Pin <0=>PC1
+#define RTE_ETH_MDI_MDC_PORT_ID         0
+#if    (RTE_ETH_MDI_MDC_PORT_ID == 0)
+#define RTE_ETH_MDI_MDC_PORT            GPIOC
+#define RTE_ETH_MDI_MDC_PIN             1
+#else
+#error "Invalid ETH_MDC Pin Configuration!"
+#endif
+//      ETH_MDIO Pin <0=>PA2
+#define RTE_ETH_MDI_MDIO_PORT_ID        0
+#if    (RTE_ETH_MDI_MDIO_PORT_ID == 0)
+#define RTE_ETH_MDI_MDIO_PORT           GPIOA
+#define RTE_ETH_MDI_MDIO_PIN            2
+#else
+#error "Invalid ETH_MDIO Pin Configuration!"
+#endif
+//   
+
+//    Reference 25MHz/50MHz Clock generation
+#define RTE_ETH_REF_CLOCK               0
+
+//      MCO Pin <0=>PA2 <1=>PC9
+#define RTE_ETH_REF_CLOCK_PORT_ID       0
+#if    (RTE_ETH_REF_CLOCK_PORT_ID == 0)
+#define RTE_ETH_REF_CLOCK_PORT          GPIOA
+#define RTE_ETH_REF_CLOCK_PIN           8
+#elif  (RTE_ETH_REF_CLOCK_PORT_ID == 1)
+#define RTE_ETH_REF_CLOCK_PORT          GPIOC
+#define RTE_ETH_REF_CLOCK_PIN           9
+#else
+#error "Invalid MCO Pin Configuration!"
+#endif
+
+//   
+
+// 
+
+
+//  USB OTG Full-speed
+#define RTE_USB_OTG_FS                  0
+
+//    Device [Driver_USBD0]
+//    Configuration settings for Driver_USBD0 in component ::Drivers:USB Device
+#define RTE_USB_OTG_FS_DEV              1
+
+//      Endpoints
+//      Reduce memory requirements of Driver by disabling unused endpoints
+//        Endpoint 1
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 2
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 3
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//     
+#define RTE_USB_OTG_FS_DEV_EP           0x0000000F
+#define RTE_USB_OTG_FS_DEV_EP_BULK      0x000E000E
+#define RTE_USB_OTG_FS_DEV_EP_INT       0x000E000E
+#define RTE_USB_OTG_FS_DEV_EP_ISO       0x000E000E
+
+//   
+
+//    Host [Driver_USBH0]
+//    Configuration settings for Driver_USBH0 in component ::Drivers:USB Host
+
+#define RTE_USB_OTG_FS_HOST             1
+
+//      VBUS Power On/Off Pin
+//      Configure Pin for driving VBUS
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_FS_VBUS_PIN             1
+#define RTE_OTG_FS_VBUS_ACTIVE          0
+#define RTE_OTG_FS_VBUS_PORT            GPIO_PORT(7)
+#define RTE_OTG_FS_VBUS_BIT             5
+
+//      Overcurrent Detection Pin
+//      Configure Pin for overcurrent detection
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_FS_OC_PIN               1
+#define RTE_OTG_FS_OC_ACTIVE            0
+#define RTE_OTG_FS_OC_PORT              GPIO_PORT(5)
+#define RTE_OTG_FS_OC_BIT               11
+//   
+
+// 
+
+
+//  USB OTG High-speed
+#define RTE_USB_OTG_HS                  0
+
+//    PHY (Physical Layer)
+
+//      PHY Interface
+//       <0=>On-chip full-speed PHY
+//       <1=>External ULPI high-speed PHY
+#define RTE_USB_OTG_HS_PHY              1
+
+//      External ULPI Pins (UTMI+ Low Pin Interface)
+
+//        OTG_HS_ULPI_CK Pin <0=>PA5
+#define RTE_USB_OTG_HS_ULPI_CK_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_CK_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_CK_PORT     GPIOA
+#define RTE_USB_OTG_HS_ULPI_CK_PIN      5
+#else
+#error "Invalid OTG_HS_ULPI_CK Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_DIR Pin <0=>PI11 <1=>PC2
+#define RTE_USB_OTG_HS_ULPI_DIR_PORT_ID 0
+#if    (RTE_USB_OTG_HS_ULPI_DIR_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_DIR_PORT    GPIOI
+#define RTE_USB_OTG_HS_ULPI_DIR_PIN     11
+#elif  (RTE_USB_OTG_HS_ULPI_DIR_PORT_ID == 1)
+#define RTE_USB_OTG_HS_ULPI_DIR_PORT    GPIOC
+#define RTE_USB_OTG_HS_ULPI_DIR_PIN     2
+#else
+#error "Invalid OTG_HS_ULPI_DIR Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_STP Pin <0=>PC0
+#define RTE_USB_OTG_HS_ULPI_STP_PORT_ID 0
+#if    (RTE_USB_OTG_HS_ULPI_STP_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_STP_PORT    GPIOC
+#define RTE_USB_OTG_HS_ULPI_STP_PIN     0
+#else
+#error "Invalid OTG_HS_ULPI_STP Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_NXT Pin <0=>PC2 <1=>PH4
+#define RTE_USB_OTG_HS_ULPI_NXT_PORT_ID 1
+#if    (RTE_USB_OTG_HS_ULPI_NXT_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_NXT_PORT    GPIOC
+#define RTE_USB_OTG_HS_ULPI_NXT_PIN     2
+#elif  (RTE_USB_OTG_HS_ULPI_NXT_PORT_ID == 1)
+#define RTE_USB_OTG_HS_ULPI_NXT_PORT    GPIOH
+#define RTE_USB_OTG_HS_ULPI_NXT_PIN     4
+#else
+#error "Invalid OTG_HS_ULPI_NXT Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D0 Pin <0=>PA3
+#define RTE_USB_OTG_HS_ULPI_D0_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D0_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D0_PORT     GPIOA
+#define RTE_USB_OTG_HS_ULPI_D0_PIN      3
+#else
+#error "Invalid OTG_HS_ULPI_D0 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D1 Pin <0=>PB0
+#define RTE_USB_OTG_HS_ULPI_D1_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D1_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D1_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D1_PIN      0
+#else
+#error "Invalid OTG_HS_ULPI_D1 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D2 Pin <0=>PB1
+#define RTE_USB_OTG_HS_ULPI_D2_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D2_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D2_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D2_PIN      1
+#else
+#error "Invalid OTG_HS_ULPI_D2 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D3 Pin <0=>PB10
+#define RTE_USB_OTG_HS_ULPI_D3_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D3_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D3_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D3_PIN      10
+#else
+#error "Invalid OTG_HS_ULPI_D3 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D4 Pin <0=>PB11
+#define RTE_USB_OTG_HS_ULPI_D4_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D4_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D4_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D4_PIN      11
+#else
+#error "Invalid OTG_HS_ULPI_D4 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D5 Pin <0=>PB12
+#define RTE_USB_OTG_HS_ULPI_D5_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D5_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D5_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D5_PIN      12
+#else
+#error "Invalid OTG_HS_ULPI_D5 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D6 Pin <0=>PB13
+#define RTE_USB_OTG_HS_ULPI_D6_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D6_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D6_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D6_PIN      13
+#else
+#error "Invalid OTG_HS_ULPI_D6 Pin Configuration!"
+#endif
+//        OTG_HS_ULPI_D7 Pin <0=>PB5
+#define RTE_USB_OTG_HS_ULPI_D7_PORT_ID  0
+#if    (RTE_USB_OTG_HS_ULPI_D7_PORT_ID == 0)
+#define RTE_USB_OTG_HS_ULPI_D7_PORT     GPIOB
+#define RTE_USB_OTG_HS_ULPI_D7_PIN      5
+#else
+#error "Invalid OTG_HS_ULPI_D7 Pin Configuration!"
+#endif
+
+//     
+
+//   
+
+//    Device [Driver_USBD1]
+//    Configuration settings for Driver_USBD1 in component ::Drivers:USB Device
+#define RTE_USB_OTG_HS_DEV              1
+
+//      Endpoints
+//      Reduce memory requirements of Driver by disabling unused endpoints
+//        Endpoint 1
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 2
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 3
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 4
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//        Endpoint 5
+//           Bulk OUT
+//          Bulk IN
+//           Interrupt OUT
+//          Interrupt IN
+//           Isochronous OUT
+//          Isochronous IN
+//       
+//     
+#define RTE_USB_OTG_HS_DEV_EP           0x0000003F
+#define RTE_USB_OTG_HS_DEV_EP_BULK      0x003E003E
+#define RTE_USB_OTG_HS_DEV_EP_INT       0x003E003E
+#define RTE_USB_OTG_HS_DEV_EP_ISO       0x003E003E
+
+//   
+
+//    Host [Driver_USBH1]
+//    Configuration settings for Driver_USBH1 in component ::Drivers:USB Host
+#define RTE_USB_OTG_HS_HOST             1
+
+//      VBUS Power On/Off Pin
+//      Configure Pin for driving VBUS
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_HS_VBUS_PIN             1
+#define RTE_OTG_HS_VBUS_ACTIVE          0
+#define RTE_OTG_HS_VBUS_PORT            GPIO_PORT(2)
+#define RTE_OTG_HS_VBUS_BIT             2
+
+//      Overcurrent Detection Pin
+//      Configure Pin for overcurrent detection
+//      GPIO Pxy (x = A..H, y = 0..15) or (x = I, y = 0..11)
+//        Active State <0=>Low <1=>High
+//         Selects Active State Logical Level
+//        Port <0=>GPIOA <1=>GPIOB <2=>GPIOC <3=>GPIOD
+//                 <4=>GPIOE <5=>GPIOF <6=>GPIOG <7=>GPIOH <8=>GPIOI
+//         Selects Port Name
+//        Bit <0-15>
+//         Selects Port Bit
+//     
+#define RTE_OTG_HS_OC_PIN               1
+#define RTE_OTG_HS_OC_ACTIVE            0
+#define RTE_OTG_HS_OC_PORT              GPIO_PORT(5)
+#define RTE_OTG_HS_OC_BIT               12
+//   
+
+// 
+
+
+//  EXTI (External Interrupt/Event Controller)
+#define RTE_EXTI                        0
+
+//    EXTI0 Line
+#define RTE_EXTI0                       0
+//      Pin   <0=>PA0  <1=>PB0  <2=>PC0  <3=>PD0  <4=>PE0  <5=>PF0  <6=>PG0  <7=>PH0  <8=>PI0
+#define RTE_EXTI0_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI0_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI0_TRIGGER               0
+//   
+
+//    EXTI1 Line
+#define RTE_EXTI1                       0
+//      Pin   <0=>PA1  <1=>PB1  <2=>PC1  <3=>PD1  <4=>PE1  <5=>PF1  <6=>PG1  <7=>PH1  <8=>PI1
+#define RTE_EXTI1_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI1_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI1_TRIGGER               0
+//   
+
+//    EXTI2 Line
+#define RTE_EXTI2                       0
+//      Pin   <0=>PA2  <1=>PB2  <2=>PC2  <3=>PD2  <4=>PE2  <5=>PF2  <6=>PG2  <7=>PH2  <8=>PI2
+#define RTE_EXTI2_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI2_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI2_TRIGGER               0
+//   
+
+//    EXTI3 Line
+#define RTE_EXTI3                       0
+//      Pin   <0=>PA3  <1=>PB3  <2=>PC3  <3=>PD3  <4=>PE3  <5=>PF3  <6=>PG3  <7=>PH3  <8=>PI3
+#define RTE_EXTI3_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI3_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI3_TRIGGER               0
+//   
+
+//    EXTI4 Line
+#define RTE_EXTI4                       0
+//      Pin   <0=>PA4  <1=>PB4  <2=>PC4  <3=>PD4  <4=>PE4  <5=>PF4  <6=>PG4  <7=>PH4  <8=>PI4
+#define RTE_EXTI4_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI4_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI4_TRIGGER               0
+//   
+
+//    EXTI5 Line
+#define RTE_EXTI5                       0
+//      Pin   <0=>PA5  <1=>PB5  <2=>PC5  <3=>PD5  <4=>PE5  <5=>PF5  <6=>PG5  <7=>PH5  <8=>PI5
+#define RTE_EXTI5_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI5_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI5_TRIGGER               0
+//   
+
+//    EXTI6 Line
+#define RTE_EXTI6                       0
+//      Pin   <0=>PA6  <1=>PB6  <2=>PC6  <3=>PD6  <4=>PE6  <5=>PF6  <6=>PG6  <7=>PH6  <8=>PI6
+#define RTE_EXTI6_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI6_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI6_TRIGGER               0
+//   
+
+//    EXTI7 Line
+#define RTE_EXTI7                       0
+//      Pin   <0=>PA7  <1=>PB7  <2=>PC7  <3=>PD7  <4=>PE7  <5=>PF7  <6=>PG7  <7=>PH7  <8=>PI7
+#define RTE_EXTI7_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI7_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI7_TRIGGER               0
+//   
+
+//    EXTI8 Line
+#define RTE_EXTI8                       0
+//      Pin   <0=>PA8  <1=>PB8  <2=>PC8  <3=>PD8  <4=>PE8  <5=>PF8  <6=>PG8  <7=>PH8  <8=>PI8
+#define RTE_EXTI8_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI8_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI8_TRIGGER               0
+//   
+
+//    EXTI9 Line
+#define RTE_EXTI9                       0
+//      Pin   <0=>PA9  <1=>PB9  <2=>PC9  <3=>PD9  <4=>PE9  <5=>PF9  <6=>PG9  <7=>PH9  <8=>PI9
+#define RTE_EXTI9_PIN                   0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI9_MODE                  0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI9_TRIGGER               0
+//   
+
+//    EXTI10 Line
+#define RTE_EXTI10                      0
+//      Pin   <0=>PA10 <1=>PB10 <2=>PC10 <3=>PD10 <4=>PE10 <5=>PF10 <6=>PG10 <7=>PH10 <8=>PI10
+#define RTE_EXTI10_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI10_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI10_TRIGGER              0
+//   
+
+//    EXTI11 Line
+#define RTE_EXTI11                      0
+//      Pin   <0=>PA11 <1=>PB11 <2=>PC11 <3=>PD11 <4=>PE11 <5=>PF11 <6=>PG11 <7=>PH11 <8=>PI11
+#define RTE_EXTI11_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI11_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI11_TRIGGER              0
+//   
+
+//    EXTI12 Line
+#define RTE_EXTI12                      0
+//      Pin   <0=>PA12 <1=>PB12 <2=>PC12 <3=>PD12 <4=>PE12 <5=>PF12 <6=>PG12 <7=>PH12
+#define RTE_EXTI12_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI12_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI12_TRIGGER              0
+//   
+
+//    EXTI13 Line
+#define RTE_EXTI13                      0
+//      Pin   <0=>PA13 <1=>PB13 <2=>PC13 <3=>PD13 <4=>PE13 <5=>PF13 <6=>PG13 <7=>PH13
+#define RTE_EXTI13_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI13_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI13_TRIGGER              0
+//   
+
+//    EXTI14 Line
+#define RTE_EXTI14                      0
+//      Pin   <0=>PA14 <1=>PB14 <2=>PC14 <3=>PD14 <4=>PE14 <5=>PF14 <6=>PG14 <7=>PH14
+#define RTE_EXTI14_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI14_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI14_TRIGGER              0
+//   
+
+//    EXTI15 Line
+#define RTE_EXTI15                      0
+//      Pin   <0=>PA15 <1=>PB15 <2=>PC15 <3=>PD15 <4=>PE15 <5=>PF15 <6=>PG15 <7=>PH15
+#define RTE_EXTI15_PIN                  0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI15_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI15_TRIGGER              0
+//   
+
+//    EXTI16 Line: PVD Output
+#define RTE_EXTI16                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI16_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI16_TRIGGER              0
+//   
+
+//    EXTI17 Line: RTC Alarm
+#define RTE_EXTI17                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI17_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI17_TRIGGER              0
+//   
+
+//    EXTI18 Line: USB OTG FS Wakeup
+#define RTE_EXTI18                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI18_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI18_TRIGGER              0
+//   
+
+//    EXTI19 Line: Ethernet Wakeup
+#define RTE_EXTI19                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI19_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI19_TRIGGER              0
+//   
+
+//    EXTI20 Line: USB OTG HS Wakeup
+#define RTE_EXTI20                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI20_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI20_TRIGGER              0
+//   
+
+//    EXTI21 Line: RTC Tamper and TimeStamp
+#define RTE_EXTI21                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI21_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI21_TRIGGER              0
+//   
+
+//    EXTI22 Line: RTC Wakeup
+#define RTE_EXTI22                      0
+//      Mode  <0=>Interrupt  <1=>Event
+#define RTE_EXTI22_MODE                 0
+//      Trigger  <0=>None  <1=>Raising edge <2=>Falling edge <3=>Any edge
+#define RTE_EXTI22_TRIGGER              0
+//   
+
+// 
+
+
+//  FSMC (Flexible Static Memory Controller)
+#define RTE_FSMC                        0
+
+//    Pin Configuration
+//    Configure Pins
+#define RTE_FSMC_PINS                   0
+
+//      Address Bus Pins
+//       <0=>A[17:16]
+//       <1=>A[10:0]   <2=>A[15:0]   <3=>A[16:0]   <4=>A[17:0]
+//       <5=>A[18:0]   <6=>A[19:0]   <7=>A[20:0]   <8=>A[21:0]
+//       <9=>A[22:0]  <10=>A[23:0]  <11=>A[24:0]  <12=>A[25:0]
+#define RTE_FSMC_ABUS_PINS              10
+//      Data Bus Pins  <0=>D[7:0] <1=>D[15:0]
+#define RTE_FSMC_DBUS_PINS              0
+//      FSMC_NOE Pin
+#define RTE_FSMC_NOE_PIN                0
+//      FSMC_NWE Pin
+#define RTE_FSMC_NWE_PIN                0
+//      FSMC_NBL0 Pin
+#define RTE_FSMC_NBL0_PIN               0
+//      FSMC_NBL1 Pin
+#define RTE_FSMC_NBL1_PIN               0
+//      FSMC_NL Pin
+#define RTE_FSMC_NL_PIN                 0
+//      FSMC_NWAIT Pin
+#define RTE_FSMC_NWAIT_PIN              0
+//      FSMC_CLK Pin
+#define RTE_FSMC_CLK_PIN                0
+//      FSMC_NE1/NCE2 Pin
+#define RTE_FSMC_NE1_PIN                0
+//      FSMC_NE2/NCE3 Pin
+#define RTE_FSMC_NE2_PIN                0
+//      FSMC_NE3/NCE4_1 Pin
+#define RTE_FSMC_NE3_PIN                0
+//      FSMC_NE4 Pin
+#define RTE_FSMC_NE4_PIN                0
+//      FSMC_NCE4_2 Pin
+#define RTE_FSMC_NCE42_PIN              0
+//      FSMC_INT2 Pin
+#define RTE_FSMC_INT2_PIN               0
+//      FSMC_INT3 Pin
+#define RTE_FSMC_INT3_PIN               0
+//      FSMC_INTR Pin
+#define RTE_FSMC_INTR_PIN               0
+//      FSMC_NIORD Pin
+#define RTE_FSMC_NIORD_PIN              0
+//      FSMC_NIOWR Pin
+#define RTE_FSMC_NIOWR_PIN              0
+//      FSMC_NREG Pin
+#define RTE_FSMC_NREG_PIN               0
+//      FSMC_CD Pin
+#define RTE_FSMC_CD_PIN                 0
+
+//   
+
+//    NOR Flash / PSRAM Controller
+
+//      FSMC_NE1 Chip Select
+//      Configure Device on Chip Select FSMC_NE1
+#define RTE_FSMC_NE1                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR1_CBURSTRW          0
+#define RTE_FSMC_BCR1_ASYNCWAIT         0
+#define RTE_FSMC_BCR1_EXTMOD            0
+#define RTE_FSMC_BCR1_WAITEN            1
+#define RTE_FSMC_BCR1_WREN              1
+#define RTE_FSMC_BCR1_WAITCFG           0
+#define RTE_FSMC_BCR1_WRAPMOD           0
+#define RTE_FSMC_BCR1_WAITPOL           0
+#define RTE_FSMC_BCR1_BURSTEN           0
+#define RTE_FSMC_BCR1_FACCEN            1
+#define RTE_FSMC_BCR1_MWID              1
+#define RTE_FSMC_BCR1_MTYP              2
+#define RTE_FSMC_BCR1_MUXEN             1
+#define RTE_FSMC_BCR1_MBKEN             1
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR1_ACCMOD            0
+#define RTE_FSMC_BTR1_DATLAT            15
+#define RTE_FSMC_BTR1_CLKDIV            15
+#define RTE_FSMC_BTR1_BUSTURN           15
+#define RTE_FSMC_BTR1_DATAST            255
+#define RTE_FSMC_BTR1_ADDHLD            15
+#define RTE_FSMC_BTR1_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR1_ACCMOD        0
+#define RTE_FSMC_BWTR1_DATLAT        15
+#define RTE_FSMC_BWTR1_CLKDIV        15
+#define RTE_FSMC_BWTR1_BUSTURN       15
+#define RTE_FSMC_BWTR1_DATAST        255
+#define RTE_FSMC_BWTR1_ADDHLD        15
+#define RTE_FSMC_BWTR1_ADDSET        15
+//       
+//     
+
+//      FSMC_NE2 Chip Select
+//      Configure Device on Chip Select FSMC_NE2
+#define RTE_FSMC_NE2                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR2_CBURSTRW          0
+#define RTE_FSMC_BCR2_ASYNCWAIT         0
+#define RTE_FSMC_BCR2_EXTMOD            0
+#define RTE_FSMC_BCR2_WAITEN            1
+#define RTE_FSMC_BCR2_WREN              1
+#define RTE_FSMC_BCR2_WAITCFG           0
+#define RTE_FSMC_BCR2_WRAPMOD           0
+#define RTE_FSMC_BCR2_WAITPOL           0
+#define RTE_FSMC_BCR2_BURSTEN           0
+#define RTE_FSMC_BCR2_FACCEN            1
+#define RTE_FSMC_BCR2_MWID              1
+#define RTE_FSMC_BCR2_MTYP              0
+#define RTE_FSMC_BCR2_MUXEN             1
+#define RTE_FSMC_BCR2_MBKEN             0
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR2_ACCMOD            0
+#define RTE_FSMC_BTR2_DATLAT            15
+#define RTE_FSMC_BTR2_CLKDIV            15
+#define RTE_FSMC_BTR2_BUSTURN           15
+#define RTE_FSMC_BTR2_DATAST            255
+#define RTE_FSMC_BTR2_ADDHLD            15
+#define RTE_FSMC_BTR2_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR2_ACCMOD        0
+#define RTE_FSMC_BWTR2_DATLAT        15
+#define RTE_FSMC_BWTR2_CLKDIV        15
+#define RTE_FSMC_BWTR2_BUSTURN       15
+#define RTE_FSMC_BWTR2_DATAST        255
+#define RTE_FSMC_BWTR2_ADDHLD        15
+#define RTE_FSMC_BWTR2_ADDSET        15
+//       
+//     
+
+//      FSMC_NE3 Chip Select
+//      Configure Device on Chip Select FSMC_NE3
+#define RTE_FSMC_NE3                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR3_CBURSTRW          0
+#define RTE_FSMC_BCR3_ASYNCWAIT         0
+#define RTE_FSMC_BCR3_EXTMOD            0
+#define RTE_FSMC_BCR3_WAITEN            1
+#define RTE_FSMC_BCR3_WREN              1
+#define RTE_FSMC_BCR3_WAITCFG           0
+#define RTE_FSMC_BCR3_WRAPMOD           0
+#define RTE_FSMC_BCR3_WAITPOL           0
+#define RTE_FSMC_BCR3_BURSTEN           0
+#define RTE_FSMC_BCR3_FACCEN            1
+#define RTE_FSMC_BCR3_MWID              1
+#define RTE_FSMC_BCR3_MTYP              0
+#define RTE_FSMC_BCR3_MUXEN             1
+#define RTE_FSMC_BCR3_MBKEN             0
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR3_ACCMOD            0
+#define RTE_FSMC_BTR3_DATLAT            15
+#define RTE_FSMC_BTR3_CLKDIV            15
+#define RTE_FSMC_BTR3_BUSTURN           15
+#define RTE_FSMC_BTR3_DATAST            255
+#define RTE_FSMC_BTR3_ADDHLD            15
+#define RTE_FSMC_BTR3_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR3_ACCMOD        0
+#define RTE_FSMC_BWTR3_DATLAT        15
+#define RTE_FSMC_BWTR3_CLKDIV        15
+#define RTE_FSMC_BWTR3_BUSTURN       15
+#define RTE_FSMC_BWTR3_DATAST        255
+#define RTE_FSMC_BWTR3_ADDHLD        15
+#define RTE_FSMC_BWTR3_ADDSET        15
+//       
+//     
+
+//      FSMC_NE4 Chip Select
+//      Configure Device on Chip Select FSMC_NE4
+#define RTE_FSMC_NE4                    0
+
+//        Chip-select control
+//          CBURSTRW: Write burst enable <0=>Asynchronous write <1=>Synchronous write
+//          For Cellular RAM, this enables synchronous burst protocol during write operations. For Flash
+//          memory access in burst mode, this enables/disables the wait state insertion via the NWAIT signal.
+//          ASYNCWAIT: Wait signal during asynchronous transfer
+//          Enables the FSMC to use the wait signal even during an asynchronous protocol.
+//          EXTMOD: Extended mode enable
+//          Enables the FSMC to program inside the write timing register, so it allows different timings for read and write.
+//          WAITEN: Wait enable
+//          For Flash memory access in burst mode, this enables/disables wait-state insertion via the NWAIT signal.
+//          WREN: Write enable
+//          Enable/disable write operations in the current bank by the FSMC
+//          WAITCFG: Wait timing configuration <0=> NWAIT active before wait state <1=>NWAIT active during wait state
+//          For memory access in burst mode, the NWAIT signal indicates whether the data from the memory
+//          are valid or if a wait state must be inserted. This configuration bit determines if NWAIT is asserted
+//          by the memory one clock cycle before the wait state or during the wait state
+//          WAITPOL: Wait signal polarity <0=>NWAIT active low <1=>NWAIT active high
+//          Defines the polarity of the wait signal from memory. Valid only when accessing the memory in burst mode.
+//          BURSTEN: Burst enable
+//          Enables the burst access mode for the memory. Valid only with synchronous burst memories.
+//          FACCEN: Flash access enable
+//          Enables NOR Flash memory access operations.
+//          MWID: Memory databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width, valid for all type of memories.
+//          MTYP: Memory type <0=>SRAM, ROM <1=>PSRAM (Cellular RAM: CRAM) <2=>NOR Flash/OneNAND Flash
+//          Defines the type of external memory attached to the corresponding memory bank.
+//          MUXEN: Address/data multiplexing enable
+//          When enabled, the address and data values are multiplexed on the databus, valid only with NOR and PSRAM memories.
+//          MBKEN: Memory bank enable
+//          Enables the memory bank. After reset Bank1 is enabled, all others are disabled. Accessing a
+//          disabled bank causes an ERROR on AHB bus.
+#define RTE_FSMC_BCR4_CBURSTRW          0
+#define RTE_FSMC_BCR4_ASYNCWAIT         0
+#define RTE_FSMC_BCR4_EXTMOD            0
+#define RTE_FSMC_BCR4_WAITEN            1
+#define RTE_FSMC_BCR4_WREN              1
+#define RTE_FSMC_BCR4_WAITCFG           0
+#define RTE_FSMC_BCR4_WRAPMOD           0
+#define RTE_FSMC_BCR4_WAITPOL           0
+#define RTE_FSMC_BCR4_BURSTEN           0
+#define RTE_FSMC_BCR4_FACCEN            1
+#define RTE_FSMC_BCR4_MWID              1
+#define RTE_FSMC_BCR4_MTYP              0
+#define RTE_FSMC_BCR4_MUXEN             1
+#define RTE_FSMC_BCR4_MBKEN             0
+//       
+
+//        Chip-select timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with synchronous burst mode enabled, defines the number of memory clock
+//          cycles (+2) to issue to the memory before getting the first data:
+//          0000: Data latency of 2 CLK clock cycles for first burst access
+//          1111: Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK)
+//          periods. In asynchronous NOR Flash, SRAM or ROM accesses, this value is don't care.
+//          In the case of CRAM, this field must be set to ‘0’.
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles:
+//          0000: Reserved
+//          0001: CLK period = 2 × HCLK periods
+//          0010: CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Define the bus turnaround delay after a read access only
+//          from multiplexed NOR Flash memory to avoid bus contention if the controller needs to drive
+//          addresses on the databus for the next side-by-side transaction. BUSTURN can be set to the
+//          minimum if the slowest memory does not take more than 6 HCLK clock cycles to put the
+//          databus in Hi-Z state.
+//          These bits are written by software to add a delay at the end of a write/read transaction. This
+//          delay allows to match the minimum time between consecutive transactions (tEHEL from NEx
+//          high to NEx low) and the maximum time needed by the memory to free the data bus after a
+//          read access (tEHQZ):
+//          (BUSTRUN + 1)HCLK period = tEHELmin and (BUSTRUN + 2)HCLK period = tEHQZmax if
+//          EXTMOD = ‘0’
+//          (BUSTRUN + 2)HCLK period = max (tEHELmin, tEHQZmax) if EXTMOD = ‘1’.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 × HCLK clock cycles (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Define the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Define the duration of the address hold phase used in mode D and multiplexed accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration =1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is not used, the address hold phase is always 1
+//          memory clock period duration.
+//          ADDSET: Address setup phase duration <0-15>
+//          Define the duration of the address setup phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 1615 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don’t care.
+#define RTE_FSMC_BTR4_ACCMOD            0
+#define RTE_FSMC_BTR4_DATLAT            15
+#define RTE_FSMC_BTR4_CLKDIV            15
+#define RTE_FSMC_BTR4_BUSTURN           15
+#define RTE_FSMC_BTR4_DATAST            255
+#define RTE_FSMC_BTR4_ADDHLD            15
+#define RTE_FSMC_BTR4_ADDSET            15
+//       
+
+//        Write timing
+//          ACCMOD: Access mode <0=>Mode A <1=>Mode B <2=>Mode C <3=>Mode D
+//          Specifies the asynchronous access modes. Access mode is taken into account only when
+//          Extended mode is enabled in the Chip-select control register.
+//          DATLAT: Data latency <0-15>
+//          For NOR Flash with Synchronous burst mode enabled, defines the number of memory clock cycles
+//          (+2) to issue to the memory before getting the first data.
+//          0000: (0x0) Data latency of 2 CLK clock cycles for first burst access
+//          ...
+//          1111: (0xF) Data latency of 17 CLK clock cycles for first burst access (default value after reset)
+//          Note: This timing parameter is not expressed in HCLK periods, but in Flash clock (CLK) periods. In
+//          asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care. In case of
+//          CRAM, this field must be set to 0
+//          CLKDIV: Clock divide ratio (for CLK signal) <1-15>
+//          Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
+//          0000: Reserved
+//          0001 CLK period = 2 × HCLK periods
+//          0010 CLK period = 3 × HCLK periods
+//          1111: CLK period = 16 × HCLK periods (default value after reset)
+//          In asynchronous NOR Flash, SRAM or ROM accesses, this value is don’t care.
+//          BUSTURN: Bus turnaround phase duration <0-15>
+//          Defines a delay at the end of a write transaction to match the minimum time between consecutive transactions (tEHEL from ENx high to ENx low).
+//          (BUSTRUN + 1) HCLK period = tEHELmin.
+//          0000: BUSTURN phase duration = 0 HCLK clock cycle added
+//          ...
+//          1111: BUSTURN phase duration = 15 HCLK clock cycles added (default value after reset)
+//          DATAST: Data phase duration <1-255>
+//          Defines the duration of the data phase used in SRAMs, ROMs and asynchronous NOR Flash accesses.
+//          0000 0000: Reserved
+//          0000 0001: DATAST phase duration = 1 × HCLK clock cycles
+//          0000 0010: DATAST phase duration = 2 × HCLK clock cycles
+//          ...
+//          1111 1111: DATAST phase duration = 255 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous accesses, this value is don't care.
+//          ADDHLD: Address hold phase duration <1-15>
+//          Defines the duration of the address hold phase used in SRAMs, ROMs and asynchronous multiplexed NOR Flash accesses.
+//          0000: Reserved
+//          0001: ADDHLD phase duration = 1 × HCLK clock cycle
+//          0010: ADDHLD phase duration = 2 × HCLK clock cycle
+//          ...
+//          1111: ADDHLD phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is not used, the address hold phase is always 1 Flash clock period duration.
+//          ADDSET: Address setup phase duration <1-15>
+//          Defines the duration of the address setup phase in HCLK cycles used in SRAMs, ROMs and asynchronous NOR Flash accessed.
+//          0000: ADDSET phase duration = 0 × HCLK clock cycle
+//          ...
+//          1111: ADDSET phase duration = 15 × HCLK clock cycles (default value after reset)
+//          Note: In synchronous NOR Flash accesses, this value is don’t care.
+#define RTE_FSMC_BWTR4_ACCMOD        0
+#define RTE_FSMC_BWTR4_DATLAT        15
+#define RTE_FSMC_BWTR4_CLKDIV        15
+#define RTE_FSMC_BWTR4_BUSTURN       15
+#define RTE_FSMC_BWTR4_DATAST        255
+#define RTE_FSMC_BWTR4_ADDHLD        15
+#define RTE_FSMC_BWTR4_ADDSET        15
+//       
+//     
+
+//   
+
+//    NAND Flash Controller
+
+//      FSMC_NCE2 Chip Select
+//      Configure NAND Device on Chip Select FSMC_NCE2
+#define RTE_FSMC_NCE2                   0
+
+//        NAND Flash Control
+//          ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes
+//          Defines the page size for the extended ECC.
+//          TAR: ALE to RE delay <0-15>
+//          Sets time from ALE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          TCLR: CLE to RE delay <0-15>
+//          Sets time from CLE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          ECCEN: ECC computation logic enable 
+//         PWID: Databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width.
+//          PTYP: Memory type <1=>NAND Flash
+//          Defines the type of device attached to the corresponding memory bank.
+//          PBKEN: NAND Flash memory bank enable
+//          Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus.
+//          PWAITEN: Wait feature enable
+//          Enables the Wait feature for the PC Card/NAND Flash memory bank.
+#define RTE_FSMC_PCR2_ECCPS             0
+#define RTE_FSMC_PCR2_TAR               0
+#define RTE_FSMC_PCR2_TCLR              0
+#define RTE_FSMC_PCR2_ECCEN             0
+#define RTE_FSMC_PCR2_PWID              0
+#define RTE_FSMC_PCR2_PTYP              1
+#define RTE_FSMC_PCR2_PBKEN             0
+#define RTE_FSMC_PCR2_PWAITEN           0
+
+//       
+
+//        Interrupt configuration
+//         IFEN: Falling edge detection enable
+//         ILEN: High-level detection enable
+//         IREN: Rising edge detection enable
+#define RTE_FSMC_SR2_IFEN               0
+#define RTE_FSMC_SR2_ILEN               0
+#define RTE_FSMC_SR2_IREN               0
+
+//       
+
+//       Common memory space timing
+//          MEMHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access to. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset)
+//          MEMSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 2 HCLK cycles (for NAND Flash)
+//           1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset)
+#define RTE_FSMC_PMEM2_MEMHIZ           255
+#define RTE_FSMC_PMEM2_MEMHOLD          255
+#define RTE_FSMC_PMEM2_MEMWAIT          255
+#define RTE_FSMC_PMEM2_MEMSET           255
+
+//       
+
+//       Attribute memory space timing
+//          ATTHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT)
+//          ATTSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PATT2_ATTHIZ           255
+#define RTE_FSMC_PATT2_ATTHOLD          255
+#define RTE_FSMC_PATT2_ATTWAIT          255
+#define RTE_FSMC_PATT2_ATTSET           255
+
+//       
+
+//     
+
+//      FSMC_NCE3 Chip Select
+//      Configure NAND Device on Chip Select FSMC_NCE3
+#define RTE_FSMC_NCE3                   0
+
+//        NAND Flash Control
+//          ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes
+//          Defines the page size for the extended ECC.
+//          TAR: ALE to RE delay <0-15>
+//          Sets time from ALE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          TCLR: CLE to RE delay <0-15>
+//          Sets time from CLE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          ECCEN: ECC computation logic enable 
+//         PWID: Databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width.
+//          PTYP: Memory type <1=>NAND Flash
+//          Defines the type of device attached to the corresponding memory bank.
+//          PBKEN: NAND Flash memory bank enable
+//          Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus.
+//          PWAITEN: Wait feature enable
+//          Enables the Wait feature for the PC Card/NAND Flash memory bank.
+#define RTE_FSMC_PCR3_ECCPS             0
+#define RTE_FSMC_PCR3_TAR               0
+#define RTE_FSMC_PCR3_TCLR              0
+#define RTE_FSMC_PCR3_ECCEN             0
+#define RTE_FSMC_PCR3_PWID              0
+#define RTE_FSMC_PCR3_PTYP              1
+#define RTE_FSMC_PCR3_PBKEN             0
+#define RTE_FSMC_PCR3_PWAITEN           0
+
+//       
+
+//        Interrupt configuration
+//         IFEN: Falling edge detection enable
+//         ILEN: High-level detection enable
+//         IREN: Rising edge detection enable
+#define RTE_FSMC_SR3_IFEN               0
+#define RTE_FSMC_SR3_ILEN               0
+#define RTE_FSMC_SR3_IREN               0
+
+//       
+
+//       Common memory space timing
+//          MEMHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access to. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset)
+//          MEMSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 2 HCLK cycles (for NAND Flash)
+//           1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset)
+#define RTE_FSMC_PMEM3_MEMHIZ           255
+#define RTE_FSMC_PMEM3_MEMHOLD          255
+#define RTE_FSMC_PMEM3_MEMWAIT          255
+#define RTE_FSMC_PMEM3_MEMSET           255
+
+//       
+
+//       Attribute memory space timing
+//          ATTHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT)
+//          ATTSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PATT3_ATTHIZ           255
+#define RTE_FSMC_PATT3_ATTHOLD          255
+#define RTE_FSMC_PATT3_ATTWAIT          255
+#define RTE_FSMC_PATT3_ATTSET           255
+
+//       
+
+//     
+
+//   
+
+//    PC Card Controller
+
+//      FSMC_NCE4_x Chip Select
+//      Configure PC Card/CompactFlash Device on Chip Select FSMC_NCE4_1/FSMC_NCE4_2
+#define RTE_FSMC_NCE4              0
+
+//        PC Card Control
+//          ECCPS: ECC page size <0=> 256 bytes <1=> 512 bytes <2=> 1024 bytes <3=> 2048 bytes <4=> 4096 bytes <5=> 8192 bytes
+//          Defines the page size for the extended ECC.
+//          TAR: ALE to RE delay <0-15>
+//          Sets time from ALE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is: t_ar = (TAR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          TCLR: CLE to RE delay <0-15>
+//          Sets time from CLE low to RE low in number of AHB clock cycles (HCLK).
+//          Time is t_clr = (TCLR + SET + 2) × THCLK where THCLK is the HCLK clock period
+//          0000: 1 HCLK cycle (default)
+//          1111: 16 HCLK cycles
+//          Note: SET is MEMSET or ATTSET according to the addressed space.
+//          ECCEN: ECC computation logic enable
+//         PWID: Databus width <0=>8 bits <1=>16 bits
+//          Defines the external memory device width.
+//          PTYP: Memory type <0=>PC Card, CompactFlash, CF+ or PCMCIOA
+//          Defines the type of device attached to the corresponding memory bank.
+//          PBKEN: PC Card memory bank enable
+//          Enables the memory bank. Accessing a disabled memory bank causes an ERROR on AHB bus.
+//          PWAITEN: Wait feature enable
+//          Enables the Wait feature for the PC Card/NAND Flash memory bank.
+#define RTE_FSMC_PCR4_ECCPS             0
+#define RTE_FSMC_PCR4_TAR               0
+#define RTE_FSMC_PCR4_TCLR              0
+#define RTE_FSMC_PCR4_ECCEN             0
+#define RTE_FSMC_PCR4_PWID              0
+#define RTE_FSMC_PCR4_PTYP              0
+#define RTE_FSMC_PCR4_PBKEN             0
+#define RTE_FSMC_PCR4_PWAITEN           0
+
+//       
+
+//        Interrupt configuration
+//         IFEN: Falling edge detection enable
+//         ILEN: High-level detection enable
+//         IREN: Rising edge detection enable
+#define RTE_FSMC_SR4_IFEN               0
+#define RTE_FSMC_SR4_ILEN               0
+#define RTE_FSMC_SR4_IREN               0
+
+//       
+
+//        Common memory space timing
+//          MEMHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          MEMWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access to. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deasserting NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the Card deasserting NWAIT) (default value after reset)
+//          MEMSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 2 HCLK cycles (for NAND Flash)
+//           1111 1111: 257 HCLK cycles (for NAND Flash) (default value after reset)
+#define RTE_FSMC_PMEM4_MEMHIZ           255
+#define RTE_FSMC_PMEM4_MEMHOLD          255
+#define RTE_FSMC_PMEM4_MEMWAIT          255
+#define RTE_FSMC_PMEM4_MEMSET           255
+
+//       
+
+//        Attribute memory space timing
+//          ATTHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a NAND Flash write access.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          ATTWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (NWE,
+//           NOE), for NAND Flash read or write access. The duration for command assertion
+//           is extended if the wait signal (NWAIT) is active (low) at the end of the programmed value.
+//           0000 0000: reserved
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles (+ wait cycle introduced by the card deasserting NWAIT)
+//          ATTSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up address before the command
+//           assertion (NWE, NOE), for NAND Flash read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PATT4_ATTHIZ           255
+#define RTE_FSMC_PATT4_ATTHOLD          255
+#define RTE_FSMC_PATT4_ATTWAIT          255
+#define RTE_FSMC_PATT4_ATTSET           255
+
+//       
+
+//        I/O space timing
+//          IOHIZ: Databus HiZ time <0-255>
+//           Defines the number of HCLK clock cycles during which the databus is kept in HiZ after the
+//           start of a PC Card write access. Only valid for write transaction.
+//           0000 0000: 0 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          IOHOLD: Hold time <1-255>
+//           Defines the number of HCLK clock cycles to hold address (and data for write access) after
+//           the command deassertion (NWE, NOE), for PC Card read or write access.
+//           0000 0000: reserved
+//           0000 0001: 1 HCLK cycle
+//           1111 1111: 255 HCLK cycles (default value after reset)
+//          IOWAIT: Wait time <1-255>
+//           Defines the minimum number of HCLK (+1) clock cycles to assert the command (SMNWE,
+//           SMNOE), for PC Card read or write access. The duration for command assertion is
+//           extended if the wait signal (NWAIT) is active (low) at the end of the
+//           programmed value of HCLK.
+//           0000 0000: reserved, do not use this value
+//           0000 0001: 2 HCLK cycles (+ wait cycle introduced by deassertion of NWAIT)
+//           1111 1111: 256 HCLK cycles
+//          IOSET: Setup time <0-255>
+//           Defines the number of HCLK (+1) clock cycles to set up the address before the command
+//           assertion (NWE, NOE), for PC Card read or write access.
+//           0000 0000: 1 HCLK cycle
+//           1111 1111: 256 HCLK cycles (default value after reset)
+#define RTE_FSMC_PIO4_IOHIZ             255
+#define RTE_FSMC_PIO4_IOHOLD            255
+#define RTE_FSMC_PIO4_IOWAIT            255
+#define RTE_FSMC_PIO4_IOSET             255
+
+//       
+
+//     
+
+//   
+
+// 
+
+
+#endif  /* __RTE_DEVICE_H */
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Device/STM32F207IG/startup_stm32f2xx.s b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Device/STM32F207IG/startup_stm32f2xx.s
new file mode 100644
index 000000000..b2a3fc40f
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Device/STM32F207IG/startup_stm32f2xx.s
@@ -0,0 +1,419 @@
+;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
+;* File Name          : startup_stm32f2xx.s
+;* Author             : MCD Application Team
+;* Version            : V1.0.0
+;* Date               : 18-April-2011
+;* Description        : STM32F2xx devices vector table for MDK-ARM toolchain. 
+;*                      This module performs:
+;*                      - Set the initial SP
+;*                      - Set the initial PC == Reset_Handler
+;*                      - Set the vector table entries with the exceptions ISR address
+;*                      - Branches to __main in the C library (which eventually
+;*                        calls main()).
+;*                      After Reset the CortexM3 processor is in Thread mode,
+;*                      priority is Privileged, and the Stack is set to Main.
+;* <<< Use Configuration Wizard in Context Menu >>>   
+;*******************************************************************************
+; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+;*******************************************************************************
+
+; Amount of memory (in bytes) allocated for Stack
+; Tailor this value to your application needs
+;  Stack Configuration
+;    Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; 
+
+Stack_Size      EQU     0x00004000
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+;  Heap Configuration
+;     Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; 
+
+Heap_Size       EQU     0x0000A000
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp               ; Top of Stack
+                DCD     Reset_Handler              ; Reset Handler
+                DCD     NMI_Handler                ; NMI Handler
+                DCD     HardFault_Handler          ; Hard Fault Handler
+                DCD     MemManage_Handler          ; MPU Fault Handler
+                DCD     BusFault_Handler           ; Bus Fault Handler
+                DCD     UsageFault_Handler         ; Usage Fault Handler
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     0                          ; Reserved
+                DCD     SVC_Handler                ; SVCall Handler
+                DCD     DebugMon_Handler           ; Debug Monitor Handler
+                DCD     0                          ; Reserved
+                DCD     PendSV_Handler             ; PendSV Handler
+                DCD     SysTick_Handler            ; SysTick Handler
+
+                ; External Interrupts
+                DCD     WWDG_IRQHandler                   ; Window WatchDog                                        
+                DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection                        
+                DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line            
+                DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line                       
+                DCD     FLASH_IRQHandler                  ; FLASH                                           
+                DCD     RCC_IRQHandler                    ; RCC                                             
+                DCD     EXTI0_IRQHandler                  ; EXTI Line0                                             
+                DCD     EXTI1_IRQHandler                  ; EXTI Line1                                             
+                DCD     EXTI2_IRQHandler                  ; EXTI Line2                                             
+                DCD     EXTI3_IRQHandler                  ; EXTI Line3                                             
+                DCD     EXTI4_IRQHandler                  ; EXTI Line4                                             
+                DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0                                   
+                DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1                                   
+                DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2                                   
+                DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3                                   
+                DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4                                   
+                DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5                                   
+                DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6                                   
+                DCD     ADC_IRQHandler                    ; ADC1, ADC2 and ADC3s                            
+                DCD     CAN1_TX_IRQHandler                ; CAN1 TX                                                
+                DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0                                               
+                DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1                                               
+                DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE                                               
+                DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s                                    
+                DCD     TIM1_BRK_TIM9_IRQHandler          ; TIM1 Break and TIM9                   
+                DCD     TIM1_UP_TIM10_IRQHandler          ; TIM1 Update and TIM10                 
+                DCD     TIM1_TRG_COM_TIM11_IRQHandler     ; TIM1 Trigger and Commutation and TIM11
+                DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare                                   
+                DCD     TIM2_IRQHandler                   ; TIM2                                            
+                DCD     TIM3_IRQHandler                   ; TIM3                                            
+                DCD     TIM4_IRQHandler                   ; TIM4                                            
+                DCD     I2C1_EV_IRQHandler                ; I2C1 Event                                             
+                DCD     I2C1_ER_IRQHandler                ; I2C1 Error                                             
+                DCD     I2C2_EV_IRQHandler                ; I2C2 Event                                             
+                DCD     I2C2_ER_IRQHandler                ; I2C2 Error                                               
+                DCD     SPI1_IRQHandler                   ; SPI1                                            
+                DCD     SPI2_IRQHandler                   ; SPI2                                            
+                DCD     USART1_IRQHandler                 ; USART1                                          
+                DCD     USART2_IRQHandler                 ; USART2                                          
+                DCD     USART3_IRQHandler                 ; USART3                                          
+                DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s                                  
+                DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line                  
+                DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI line                        
+                DCD     TIM8_BRK_TIM12_IRQHandler         ; TIM8 Break and TIM12                  
+                DCD     TIM8_UP_TIM13_IRQHandler          ; TIM8 Update and TIM13                 
+                DCD     TIM8_TRG_COM_TIM14_IRQHandler     ; TIM8 Trigger and Commutation and TIM14
+                DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare                                   
+                DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7                                           
+                DCD     FSMC_IRQHandler                   ; FSMC                                            
+                DCD     SDIO_IRQHandler                   ; SDIO                                            
+                DCD     TIM5_IRQHandler                   ; TIM5                                            
+                DCD     SPI3_IRQHandler                   ; SPI3                                            
+                DCD     UART4_IRQHandler                  ; UART4                                           
+                DCD     UART5_IRQHandler                  ; UART5                                           
+                DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors                   
+                DCD     TIM7_IRQHandler                   ; TIM7                   
+                DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0                                   
+                DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1                                   
+                DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2                                   
+                DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3                                   
+                DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4                                   
+                DCD     ETH_IRQHandler                    ; Ethernet                                        
+                DCD     ETH_WKUP_IRQHandler               ; Ethernet Wakeup through EXTI line                      
+                DCD     CAN2_TX_IRQHandler                ; CAN2 TX                                                
+                DCD     CAN2_RX0_IRQHandler               ; CAN2 RX0                                               
+                DCD     CAN2_RX1_IRQHandler               ; CAN2 RX1                                               
+                DCD     CAN2_SCE_IRQHandler               ; CAN2 SCE                                               
+                DCD     OTG_FS_IRQHandler                 ; USB OTG FS                                      
+                DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5                                   
+                DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6                                   
+                DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7                                   
+                DCD     USART6_IRQHandler                 ; USART6                                           
+                DCD     I2C3_EV_IRQHandler                ; I2C3 event                                             
+                DCD     I2C3_ER_IRQHandler                ; I2C3 error                                             
+                DCD     OTG_HS_EP1_OUT_IRQHandler         ; USB OTG HS End Point 1 Out                      
+                DCD     OTG_HS_EP1_IN_IRQHandler          ; USB OTG HS End Point 1 In                       
+                DCD     OTG_HS_WKUP_IRQHandler            ; USB OTG HS Wakeup through EXTI                         
+                DCD     OTG_HS_IRQHandler                 ; USB OTG HS                                      
+                DCD     DCMI_IRQHandler                   ; DCMI                                            
+                DCD     CRYP_IRQHandler                   ; CRYP crypto                                     
+                DCD     HASH_RNG_IRQHandler               ; Hash and Rng 
+__Vectors_End
+
+__Vectors_Size  EQU  __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset handler
+Reset_Handler    PROC
+                 EXPORT  Reset_Handler             [WEAK]
+        IMPORT  SystemInit
+        IMPORT  __main
+                 LDR     R0, =SystemInit
+                 BLX     R0
+                 LDR     R0, =__main
+                 BX      R0
+                 ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler          [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler          [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler           [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler         [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler           [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler             [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler            [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT  WWDG_IRQHandler                   [WEAK]                                        
+                EXPORT  PVD_IRQHandler                    [WEAK]                      
+                EXPORT  TAMP_STAMP_IRQHandler             [WEAK]         
+                EXPORT  RTC_WKUP_IRQHandler               [WEAK]                     
+                EXPORT  FLASH_IRQHandler                  [WEAK]                                         
+                EXPORT  RCC_IRQHandler                    [WEAK]                                            
+                EXPORT  EXTI0_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI1_IRQHandler                  [WEAK]                                             
+                EXPORT  EXTI2_IRQHandler                  [WEAK]                                            
+                EXPORT  EXTI3_IRQHandler                  [WEAK]                                           
+                EXPORT  EXTI4_IRQHandler                  [WEAK]                                            
+                EXPORT  DMA1_Stream0_IRQHandler           [WEAK]                                
+                EXPORT  DMA1_Stream1_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream2_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream3_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream4_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream5_IRQHandler           [WEAK]                                   
+                EXPORT  DMA1_Stream6_IRQHandler           [WEAK]                                   
+                EXPORT  ADC_IRQHandler                    [WEAK]                         
+                EXPORT  CAN1_TX_IRQHandler                [WEAK]                                                
+                EXPORT  CAN1_RX0_IRQHandler               [WEAK]                                               
+                EXPORT  CAN1_RX1_IRQHandler               [WEAK]                                                
+                EXPORT  CAN1_SCE_IRQHandler               [WEAK]                                                
+                EXPORT  EXTI9_5_IRQHandler                [WEAK]                                    
+                EXPORT  TIM1_BRK_TIM9_IRQHandler          [WEAK]                  
+                EXPORT  TIM1_UP_TIM10_IRQHandler          [WEAK]                
+                EXPORT  TIM1_TRG_COM_TIM11_IRQHandler     [WEAK] 
+                EXPORT  TIM1_CC_IRQHandler                [WEAK]                                   
+                EXPORT  TIM2_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM3_IRQHandler                   [WEAK]                                            
+                EXPORT  TIM4_IRQHandler                   [WEAK]                                            
+                EXPORT  I2C1_EV_IRQHandler                [WEAK]                                             
+                EXPORT  I2C1_ER_IRQHandler                [WEAK]                                             
+                EXPORT  I2C2_EV_IRQHandler                [WEAK]                                            
+                EXPORT  I2C2_ER_IRQHandler                [WEAK]                                               
+                EXPORT  SPI1_IRQHandler                   [WEAK]                                           
+                EXPORT  SPI2_IRQHandler                   [WEAK]                                            
+                EXPORT  USART1_IRQHandler                 [WEAK]                                          
+                EXPORT  USART2_IRQHandler                 [WEAK]                                          
+                EXPORT  USART3_IRQHandler                 [WEAK]                                         
+                EXPORT  EXTI15_10_IRQHandler              [WEAK]                                  
+                EXPORT  RTC_Alarm_IRQHandler              [WEAK]                  
+                EXPORT  OTG_FS_WKUP_IRQHandler            [WEAK]                        
+                EXPORT  TIM8_BRK_TIM12_IRQHandler         [WEAK]                 
+                EXPORT  TIM8_UP_TIM13_IRQHandler          [WEAK]                 
+                EXPORT  TIM8_TRG_COM_TIM14_IRQHandler     [WEAK] 
+                EXPORT  TIM8_CC_IRQHandler                [WEAK]                                   
+                EXPORT  DMA1_Stream7_IRQHandler           [WEAK]                                          
+                EXPORT  FSMC_IRQHandler                   [WEAK]                                             
+                EXPORT  SDIO_IRQHandler                   [WEAK]                                             
+                EXPORT  TIM5_IRQHandler                   [WEAK]                                             
+                EXPORT  SPI3_IRQHandler                   [WEAK]                                             
+                EXPORT  UART4_IRQHandler                  [WEAK]                                            
+                EXPORT  UART5_IRQHandler                  [WEAK]                                            
+                EXPORT  TIM6_DAC_IRQHandler               [WEAK]                   
+                EXPORT  TIM7_IRQHandler                   [WEAK]                    
+                EXPORT  DMA2_Stream0_IRQHandler           [WEAK]                                  
+                EXPORT  DMA2_Stream1_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream2_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream3_IRQHandler           [WEAK]                                    
+                EXPORT  DMA2_Stream4_IRQHandler           [WEAK]                                 
+                EXPORT  ETH_IRQHandler                    [WEAK]                                         
+                EXPORT  ETH_WKUP_IRQHandler               [WEAK]                     
+                EXPORT  CAN2_TX_IRQHandler                [WEAK]                                               
+                EXPORT  CAN2_RX0_IRQHandler               [WEAK]                                               
+                EXPORT  CAN2_RX1_IRQHandler               [WEAK]                                               
+                EXPORT  CAN2_SCE_IRQHandler               [WEAK]                                               
+                EXPORT  OTG_FS_IRQHandler                 [WEAK]                                       
+                EXPORT  DMA2_Stream5_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream6_IRQHandler           [WEAK]                                   
+                EXPORT  DMA2_Stream7_IRQHandler           [WEAK]                                   
+                EXPORT  USART6_IRQHandler                 [WEAK]                                           
+                EXPORT  I2C3_EV_IRQHandler                [WEAK]                                              
+                EXPORT  I2C3_ER_IRQHandler                [WEAK]                                              
+                EXPORT  OTG_HS_EP1_OUT_IRQHandler         [WEAK]                      
+                EXPORT  OTG_HS_EP1_IN_IRQHandler          [WEAK]                      
+                EXPORT  OTG_HS_WKUP_IRQHandler            [WEAK]                        
+                EXPORT  OTG_HS_IRQHandler                 [WEAK]                                      
+                EXPORT  DCMI_IRQHandler                   [WEAK]                                             
+                EXPORT  CRYP_IRQHandler                   [WEAK]                                     
+                EXPORT  HASH_RNG_IRQHandler               [WEAK]
+
+WWDG_IRQHandler                                                       
+PVD_IRQHandler                                      
+TAMP_STAMP_IRQHandler                  
+RTC_WKUP_IRQHandler                                
+FLASH_IRQHandler                                                       
+RCC_IRQHandler                                                            
+EXTI0_IRQHandler                                                          
+EXTI1_IRQHandler                                                           
+EXTI2_IRQHandler                                                          
+EXTI3_IRQHandler                                                         
+EXTI4_IRQHandler                                                          
+DMA1_Stream0_IRQHandler                                       
+DMA1_Stream1_IRQHandler                                          
+DMA1_Stream2_IRQHandler                                          
+DMA1_Stream3_IRQHandler                                          
+DMA1_Stream4_IRQHandler                                          
+DMA1_Stream5_IRQHandler                                          
+DMA1_Stream6_IRQHandler                                          
+ADC_IRQHandler                                         
+CAN1_TX_IRQHandler                                                            
+CAN1_RX0_IRQHandler                                                          
+CAN1_RX1_IRQHandler                                                           
+CAN1_SCE_IRQHandler                                                           
+EXTI9_5_IRQHandler                                                
+TIM1_BRK_TIM9_IRQHandler                        
+TIM1_UP_TIM10_IRQHandler                      
+TIM1_TRG_COM_TIM11_IRQHandler  
+TIM1_CC_IRQHandler                                               
+TIM2_IRQHandler                                                           
+TIM3_IRQHandler                                                           
+TIM4_IRQHandler                                                           
+I2C1_EV_IRQHandler                                                         
+I2C1_ER_IRQHandler                                                         
+I2C2_EV_IRQHandler                                                        
+I2C2_ER_IRQHandler                                                           
+SPI1_IRQHandler                                                          
+SPI2_IRQHandler                                                           
+USART1_IRQHandler                                                       
+USART2_IRQHandler                                                       
+USART3_IRQHandler                                                      
+EXTI15_10_IRQHandler                                            
+RTC_Alarm_IRQHandler                            
+OTG_FS_WKUP_IRQHandler                                
+TIM8_BRK_TIM12_IRQHandler                      
+TIM8_UP_TIM13_IRQHandler                       
+TIM8_TRG_COM_TIM14_IRQHandler  
+TIM8_CC_IRQHandler                                               
+DMA1_Stream7_IRQHandler                                                 
+FSMC_IRQHandler                                                            
+SDIO_IRQHandler                                                            
+TIM5_IRQHandler                                                            
+SPI3_IRQHandler                                                            
+UART4_IRQHandler                                                          
+UART5_IRQHandler                                                          
+TIM6_DAC_IRQHandler                            
+TIM7_IRQHandler                              
+DMA2_Stream0_IRQHandler                                         
+DMA2_Stream1_IRQHandler                                          
+DMA2_Stream2_IRQHandler                                           
+DMA2_Stream3_IRQHandler                                           
+DMA2_Stream4_IRQHandler                                        
+ETH_IRQHandler                                                         
+ETH_WKUP_IRQHandler                                
+CAN2_TX_IRQHandler                                                           
+CAN2_RX0_IRQHandler                                                          
+CAN2_RX1_IRQHandler                                                          
+CAN2_SCE_IRQHandler                                                          
+OTG_FS_IRQHandler                                                    
+DMA2_Stream5_IRQHandler                                          
+DMA2_Stream6_IRQHandler                                          
+DMA2_Stream7_IRQHandler                                          
+USART6_IRQHandler                                                        
+I2C3_EV_IRQHandler                                                          
+I2C3_ER_IRQHandler                                                          
+OTG_HS_EP1_OUT_IRQHandler                           
+OTG_HS_EP1_IN_IRQHandler                            
+OTG_HS_WKUP_IRQHandler                                
+OTG_HS_IRQHandler                                                   
+DCMI_IRQHandler                                                            
+CRYP_IRQHandler                                                    
+HASH_RNG_IRQHandler                                               
+
+                B       .
+
+                ENDP
+
+                ALIGN
+
+;*******************************************************************************
+; User Stack and Heap initialization
+;*******************************************************************************
+                 IF      :DEF:__MICROLIB
+                
+                 EXPORT  __initial_sp
+                 EXPORT  __heap_base
+                 EXPORT  __heap_limit
+                
+                 ELSE
+                
+                 IMPORT  __use_two_region_memory
+                 EXPORT  __user_initial_stackheap
+                 
+__user_initial_stackheap
+
+                 LDR     R0, =  Heap_Mem
+                 LDR     R1, =(Stack_Mem + Stack_Size)
+                 LDR     R2, = (Heap_Mem +  Heap_Size)
+                 LDR     R3, = Stack_Mem
+                 BX      LR
+
+                 ALIGN
+
+                 ENDIF
+
+                 END
+
+;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Device/STM32F207IG/system_stm32f2xx.c b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Device/STM32F207IG/system_stm32f2xx.c
new file mode 100644
index 000000000..da0e189c8
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Device/STM32F207IG/system_stm32f2xx.c
@@ -0,0 +1,536 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32f2xx.c
+  * @author  MCD Application Team
+  * @version V1.0.0
+  * @date    18-April-2011
+  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
+  *          This file contains the system clock configuration for STM32F2xx devices,
+  *          and is generated by the clock configuration tool
+  *          "STM32f2xx_Clock_Configuration_V1.0.0.xls"
+  *             
+  * 1.  This file provides two functions and one global variable to be called from 
+  *     user application:
+  *      - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
+  *                      and Divider factors, AHB/APBx prescalers and Flash settings),
+  *                      depending on the configuration made in the clock xls tool. 
+  *                      This function is called at startup just after reset and 
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32f2xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick 
+  *                                  timer or configure other parameters.
+  *                                     
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  * 2. After each device reset the HSI (16 MHz) is used as system clock source.
+  *    Then SystemInit() function is called, in "startup_stm32f2xx.s" file, to
+  *    configure the system clock before to branch to main program.
+  *
+  * 3. If the system clock source selected by user fails to startup, the SystemInit()
+  *    function will do nothing and HSI still used as system clock source. User can 
+  *    add some code to deal with this issue inside the SetSysClock() function.
+  *
+  * 4. The default value of HSE crystal is set to 25MHz, refer to "HSE_VALUE" define
+  *    in "stm32f2xx.h" file. When HSE is used as system clock source, directly or
+  *    through PLL, and you are using different crystal you have to adapt the HSE
+  *    value to your own configuration.
+  *
+  * 5. This file configures the system clock as follows:
+  *=============================================================================
+  *=============================================================================
+  *        Supported STM32F2xx device revision    | Rev B and Y
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | PLL (HSE)
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 120000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 120000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 4
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 2
+  *-----------------------------------------------------------------------------
+  *        HSE Frequency(Hz)                      | 25000000
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 25
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 240
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 5
+  *-----------------------------------------------------------------------------
+  *        PLLI2S_N                               | NA
+  *-----------------------------------------------------------------------------
+  *        PLLI2S_R                               | NA
+  *-----------------------------------------------------------------------------
+  *        I2S input clock                        | NA
+  *-----------------------------------------------------------------------------
+  *        VDD(V)                                 | 3.3
+  *-----------------------------------------------------------------------------
+  *        Flash Latency(WS)                      | 3
+  *-----------------------------------------------------------------------------
+  *        Prefetch Buffer                        | ON
+  *-----------------------------------------------------------------------------
+  *        Instruction cache                      | ON
+  *-----------------------------------------------------------------------------
+  *        Data cache                             | ON
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for USB OTG FS,          | Enabled
+  *        SDIO and RNG clock                     |
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ****************************************************************************** 
+  * @attention
+  *
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * 
© COPYRIGHT 2011 STMicroelectronics

+  ******************************************************************************  
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f2xx_system
+  * @{
+  */  
+  
+/** @addtogroup STM32F2xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32f2xx.h"
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Defines
+  * @{
+  */
+
+/*!< Uncomment the following line if you need to use external SRAM mounted
+     on STM322xG_EVAL board as data memory  */
+/* #define DATA_IN_ExtSRAM */
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field. 
+                                   This value must be a multiple of 0x200. */
+
+
+/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
+#define PLL_M      25
+#define PLL_N      240
+
+/* SYSCLK = PLL_VCO / PLL_P */
+#define PLL_P      2
+
+/* USB OTG FS, SDIO and RNG Clock =  PLL_VCO / PLLQ */
+#define PLL_Q      5
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Variables
+  * @{
+  */
+
+  uint32_t SystemCoreClock = 120000000;
+
+  __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+static void SetSysClock(void);
+#ifdef DATA_IN_ExtSRAM
+  static void SystemInit_ExtMemCtl(void); 
+#endif /* DATA_IN_ExtSRAM */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F2xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system
+  *         Initialize the Embedded Flash Interface, the PLL and update the 
+  *         SystemFrequency variable.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+  /* Reset the RCC clock configuration to the default reset state ------------*/
+  /* Set HSION bit */
+  RCC->CR |= (uint32_t)0x00000001;
+
+  /* Reset CFGR register */
+  RCC->CFGR = 0x00000000;
+
+  /* Reset HSEON, CSSON and PLLON bits */
+  RCC->CR &= (uint32_t)0xFEF6FFFF;
+
+  /* Reset PLLCFGR register */
+  RCC->PLLCFGR = 0x24003010;
+
+  /* Reset HSEBYP bit */
+  RCC->CR &= (uint32_t)0xFFFBFFFF;
+
+  /* Disable all interrupts */
+  RCC->CIR = 0x00000000;
+
+#ifdef DATA_IN_ExtSRAM
+  SystemInit_ExtMemCtl(); 
+#endif /* DATA_IN_ExtSRAM */
+         
+  /* Configure the System clock source, PLL Multiplier and Divider factors, 
+     AHB/APBx prescalers and Flash settings ----------------------------------*/
+  SetSysClock();
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *           
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.         
+  *     
+  * @note   - The system frequency computed by this function is not the real 
+  *           frequency in the chip. It is calculated based on the predefined 
+  *           constant and the selected clock source:
+  *             
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *                                              
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+  *                          
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *         
+  *         (*) HSI_VALUE is a constant defined in stm32f2xx.h file (default value
+  *             16 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.   
+  *    
+  *         (**) HSE_VALUE is a constant defined in stm32f2xx.h file (default value
+  *              25 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *                
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *     
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+  
+  /* Get SYSCLK source -------------------------------------------------------*/
+  tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+  switch (tmp)
+  {
+    case 0x00:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+    case 0x04:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+    case 0x08:  /* PLL used as system clock source */
+
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+         SYSCLK = PLL_VCO / PLL_P
+         */    
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+      
+      if (pllsource != 0)
+      {
+        /* HSE used as PLL clock source */
+        pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+      else
+      {
+        /* HSI used as PLL clock source */
+        pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);      
+      }
+
+      pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+      SystemCoreClock = pllvco/pllp;
+      break;
+    default:
+      SystemCoreClock = HSI_VALUE;
+      break;
+  }
+  /* Compute HCLK frequency --------------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK frequency */
+  SystemCoreClock >>= tmp;
+}
+
+/**
+  * @brief  Configures the System clock source, PLL Multiplier and Divider factors, 
+  *         AHB/APBx prescalers and Flash settings
+  * @Note   This function should be called only once the RCC clock configuration  
+  *         is reset to the default reset state (done in SystemInit() function).   
+  * @param  None
+  * @retval None
+  */
+static void SetSysClock(void)
+{
+/******************************************************************************/
+/*            PLL (clocked by HSE) used as System clock source                */
+/******************************************************************************/
+  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
+  
+  /* Enable HSE */
+  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
+ 
+  /* Wait till HSE is ready and if Time out is reached exit */
+  do
+  {
+    HSEStatus = RCC->CR & RCC_CR_HSERDY;
+    StartUpCounter++;
+  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
+
+  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
+  {
+    HSEStatus = (uint32_t)0x01;
+  }
+  else
+  {
+    HSEStatus = (uint32_t)0x00;
+  }
+
+  if (HSEStatus == (uint32_t)0x01)
+  {
+    /* HCLK = SYSCLK / 1*/
+    RCC->CFGR |= RCC_CFGR_HPRE_DIV1;
+      
+    /* PCLK2 = HCLK / 2*/
+    RCC->CFGR |= RCC_CFGR_PPRE2_DIV2;
+    
+    /* PCLK1 = HCLK / 4*/
+    RCC->CFGR |= RCC_CFGR_PPRE1_DIV4;
+
+    /* Configure the main PLL */
+    RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) |
+                   (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);
+
+    /* Enable the main PLL */
+    RCC->CR |= RCC_CR_PLLON;
+
+    /* Wait till the main PLL is ready */
+    while((RCC->CR & RCC_CR_PLLRDY) == 0)
+    {
+    }
+   
+    /* Configure Flash prefetch, Instruction cache, Data cache and wait state */
+    FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_3WS;
+
+    /* Select the main PLL as system clock source */
+    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
+    RCC->CFGR |= RCC_CFGR_SW_PLL;
+
+    /* Wait till the main PLL is used as system clock source */
+    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
+    {
+    }
+  }
+  else
+  { /* If HSE fails to start-up, the application will have wrong clock
+         configuration. User can add here some code to deal with this error */
+  }
+
+}
+
+/**
+  * @brief  Setup the external memory controller. Called in startup_stm32f2xx.s
+  *         before jump to __main
+  * @param  None
+  * @retval None
+  */
+#ifdef DATA_IN_ExtSRAM
+/**
+  * @brief  Setup the external memory controller.
+  *         Called in startup_stm32f2xx.s before jump to main.
+  *         This function configures the external SRAM mounted on STM322xG_EVAL board
+  *         This SRAM will be used as program data memory (including heap and stack).
+  * @param  None
+  * @retval None
+  */
+void SystemInit_ExtMemCtl(void)
+{
+/*-- GPIOs Configuration -----------------------------------------------------*/
+/*
+ +-------------------+--------------------+------------------+------------------+
+ +                       SRAM pins assignment                                  +
+ +-------------------+--------------------+------------------+------------------+
+ | PD0  <-> FSMC_D2  | PE0  <-> FSMC_NBL0 | PF0  <-> FSMC_A0 | PG0 <-> FSMC_A10 |
+ | PD1  <-> FSMC_D3  | PE1  <-> FSMC_NBL1 | PF1  <-> FSMC_A1 | PG1 <-> FSMC_A11 |
+ | PD4  <-> FSMC_NOE | PE7  <-> FSMC_D4   | PF2  <-> FSMC_A2 | PG2 <-> FSMC_A12 |
+ | PD5  <-> FSMC_NWE | PE8  <-> FSMC_D5   | PF3  <-> FSMC_A3 | PG3 <-> FSMC_A13 |
+ | PD8  <-> FSMC_D13 | PE9  <-> FSMC_D6   | PF4  <-> FSMC_A4 | PG4 <-> FSMC_A14 |
+ | PD9  <-> FSMC_D14 | PE10 <-> FSMC_D7   | PF5  <-> FSMC_A5 | PG5 <-> FSMC_A15 |
+ | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8   | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 |
+ | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9   | PF13 <-> FSMC_A7 |------------------+
+ | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10  | PF14 <-> FSMC_A8 | 
+ | PD14 <-> FSMC_D0  | PE14 <-> FSMC_D11  | PF15 <-> FSMC_A9 | 
+ | PD15 <-> FSMC_D1  | PE15 <-> FSMC_D12  |------------------+
+ +-------------------+--------------------+
+*/
+   /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+  RCC->AHB1ENR   = 0x00000078;
+  
+  /* Connect PDx pins to FSMC Alternate function */
+  GPIOD->AFR[0]  = 0x00cc00cc;
+  GPIOD->AFR[1]  = 0xcc0ccccc;
+  /* Configure PDx pins in Alternate function mode */  
+  GPIOD->MODER   = 0xa2aa0a0a;
+  /* Configure PDx pins speed to 100 MHz */  
+  GPIOD->OSPEEDR = 0xf3ff0f0f;
+  /* Configure PDx pins Output type to push-pull */  
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */ 
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FSMC Alternate function */
+  GPIOE->AFR[0]  = 0xc00000cc;
+  GPIOE->AFR[1]  = 0xcccccccc;
+  /* Configure PEx pins in Alternate function mode */ 
+  GPIOE->MODER   = 0xaaaa800a;
+  /* Configure PEx pins speed to 100 MHz */ 
+  GPIOE->OSPEEDR = 0xffffc00f;
+  /* Configure PEx pins Output type to push-pull */  
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */ 
+  GPIOE->PUPDR   = 0x00000000;
+
+  /* Connect PFx pins to FSMC Alternate function */
+  GPIOF->AFR[0]  = 0x00cccccc;
+  GPIOF->AFR[1]  = 0xcccc0000;
+  /* Configure PFx pins in Alternate function mode */   
+  GPIOF->MODER   = 0xaa000aaa;
+  /* Configure PFx pins speed to 100 MHz */ 
+  GPIOF->OSPEEDR = 0xff000fff;
+  /* Configure PFx pins Output type to push-pull */  
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */ 
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FSMC Alternate function */
+  GPIOG->AFR[0]  = 0x00cccccc;
+  GPIOG->AFR[1]  = 0x000000c0;
+  /* Configure PGx pins in Alternate function mode */ 
+  GPIOG->MODER   = 0x00080aaa;
+  /* Configure PGx pins speed to 100 MHz */ 
+  GPIOG->OSPEEDR = 0x000c0fff;
+  /* Configure PGx pins Output type to push-pull */  
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */ 
+  GPIOG->PUPDR   = 0x00000000;
+  
+/*-- FSMC Configuration ------------------------------------------------------*/
+  /* Enable the FSMC interface clock */
+  RCC->AHB3ENR         = 0x00000001;
+
+  /* Configure and enable Bank1_SRAM2 */
+  FSMC_Bank1->BTCR[2]  = 0x00001015;
+  FSMC_Bank1->BTCR[3]  = 0x00010400;
+  FSMC_Bank1E->BWTR[2] = 0x0fffffff;
+/*
+  Bank1_SRAM2 is configured as follow:
+
+  p.FSMC_AddressSetupTime = 0;
+  p.FSMC_AddressHoldTime = 0;
+  p.FSMC_DataSetupTime = 4;
+  p.FSMC_BusTurnAroundDuration = 1;
+  p.FSMC_CLKDivision = 0;
+  p.FSMC_DataLatency = 0;
+  p.FSMC_AccessMode = FSMC_AccessMode_A;
+
+  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
+  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
+  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
+  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;  
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
+  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
+  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
+  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
+*/
+  
+}
+#endif /* DATA_IN_ExtSRAM */
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+  
+/**
+  * @}
+  */
+/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/File_System/FS_Config.c b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/File_System/FS_Config.c
new file mode 100644
index 000000000..78564b080
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/File_System/FS_Config.c
@@ -0,0 +1,72 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::File System
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    FS_Config.c
+ * Purpose: File System Configuration
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// File System
+// Define File System global parameters
+
+//   Number of open files <4-16>
+//   Define number of files that can be
+//   opened at the same time.
+//   Default: 8
+#define NUM_FILES               8
+
+//   FAT Name Cache Size <0-1000000>
+//   Define number of cached FAT file or directory names.
+//   48 bytes of RAM is required for each cached name.
+#define FAT_NAME_CACHE_SIZE     0
+
+//   Relocate FAT Name Cache Buffer
+//   Locate Cache Buffer at a specific address.
+#define FAT_NAME_CACHE_RELOC    0
+
+//     Base address <0x0000-0xFFFFFE00:0x200>
+//     Define the Cache buffer base address.
+#define FAT_NAME_CACHE_ADDR     0x60000000
+
+//   
+
+// 
+
+#include "..\RTE_Components.h"
+
+#ifdef  RTE_FileSystem_Drive_RAM
+#include "FS_Config_RAM.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_NOR_0
+#include "FS_Config_NOR_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_NOR_1
+#include "FS_Config_NOR_1.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_NAND_0
+#include "FS_Config_NAND_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_NAND_1
+#include "FS_Config_NAND_1.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_MC_0
+#include "FS_Config_MC_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_MC_1
+#include "FS_Config_MC_1.h"
+#endif
+
+#ifdef  RTE_FileSystem_Drive_USB_0
+#include "FS_Config_USB_0.h"
+#endif
+#ifdef  RTE_FileSystem_Drive_USB_1
+#include "FS_Config_USB_1.h"
+#endif
+
+#include "fs_config.h"
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/File_System/FS_Config_MC_0.h b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/File_System/FS_Config_MC_0.h
new file mode 100644
index 000000000..0b1c6d3a7
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/File_System/FS_Config_MC_0.h
@@ -0,0 +1,57 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::File System:Drive
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    FS_Config_MC_0.h
+ * Purpose: File System Configuration for Memory Card Drive
+ * Rev.:    V5.01
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Memory Card Drive 0
+// Configuration for SD/SDHC/MMC Memory Card assigned to drive letter "M0:"
+#define MC0_ENABLE              1
+
+//   Connect to hardware via Driver_MCI# <0-255>
+//   Select driver control block for hardware interface
+#define MC0_MCI_DRIVER          0
+
+//   Connect to hardware via Driver_SPI# <0-255>
+//   Select driver control block for hardware interface when in SPI mode
+#define MC0_SPI_DRIVER          0
+
+//   Memory Card Interface Mode <0=>Native <1=>SPI
+//   Native uses a SD Bus with up to 8 data lines, CLK, and CMD
+//   SPI uses 2 data lines (MOSI and MISO), SCLK and CS
+//   When using SPI both Driver_SPI# and Driver_MCI# must be specified
+//   since the MCI driver provides the control interface lines.
+#define MC0_SPI                 0
+          
+//   Drive Cache Size <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
+//                       <8=>8 KB <16=>16 KB <32=>32 KB
+//   Drive Cache stores data sectors and may be increased to speed-up
+//   file read/write operations on this drive (default: 4 KB)
+#define MC0_CACHE_SIZE          4
+
+//   Locate Drive Cache and Drive Buffer
+//   Some microcontrollers support DMA only in specific memory areas and
+//   require to locate the drive buffers at a fixed address.
+#define MC0_CACHE_RELOC         0
+
+//     Base address <0x0000-0xFFFFFE00:0x200>
+//     Set buffer base address to RAM areas that support DMA with the drive.
+#define MC0_CACHE_ADDR          0x7FD00000
+
+//   
+
+//   Use FAT Journal
+//   Protect File Allocation Table and Directory Entries for
+//   fail-safe operation.
+#define MC0_FAT_JOURNAL         0
+
+//   Default Drive "M0:"
+//   Use this drive when no drive letter is specified.
+#define MC0_DEFAULT_DRIVE       1
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config.c b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config.c
new file mode 100644
index 000000000..6b9dc8e00
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config.c
@@ -0,0 +1,153 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config.c
+ * Purpose: Network Configuration
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// System Definitions
+//  Global Network System definitions
+//   Local Host Name
+//    This is the name under which embedded host can be
+//    accessed on a local area network.
+//    Default: "my_host"
+#define NET_HOST_NAME           "my_host"
+
+//   Memory Pool size <1536-262144:4><#/4>
+//    This is the size of a memory pool in bytes. Buffers for
+//    Network packets are allocated from this memory pool.
+//    Default: 12000 bytes
+#define NET_MEM_SIZE            3000
+
+// 
+
+#include "..\RTE_Components.h"
+
+#ifdef  RTE_Network_Interface_ETH_0
+#include "Net_Config_ETH_0.h"
+#endif
+#ifdef  RTE_Network_Interface_ETH_1
+#include "Net_Config_ETH_1.h"
+#endif
+
+#ifdef  RTE_Network_Interface_PPP_0
+#include "Net_Config_PPP_0.h"
+#endif
+#ifdef  RTE_Network_Interface_PPP_1
+#include "Net_Config_PPP_1.h"
+#endif
+
+#ifdef  RTE_Network_Interface_SLIP_0
+#include "Net_Config_SLIP_0.h"
+#endif
+#ifdef  RTE_Network_Interface_SLIP_1
+#include "Net_Config_SLIP_1.h"
+#endif
+
+#ifdef  RTE_Network_Socket_UDP
+#include "Net_Config_UDP.h"
+#endif
+#ifdef  RTE_Network_Socket_TCP
+#include "Net_Config_TCP.h"
+#endif
+#ifdef  RTE_Network_Socket_BSD
+#include "Net_Config_BSD.h"
+#endif
+
+#ifdef  RTE_Network_Web_Server_RO
+#include "Net_Config_HTTP_Server.h"
+#endif
+#ifdef  RTE_Network_Web_Server_FS
+#include "Net_Config_HTTP_Server.h"
+#endif
+
+#ifdef  RTE_Network_Telnet_Server
+#include "Net_Config_Telnet_Server.h"
+#endif
+
+#ifdef  RTE_Network_TFTP_Server
+#include "Net_Config_TFTP_Server.h"
+#endif
+#ifdef  RTE_Network_TFTP_Client
+#include "Net_Config_TFTP_Client.h"
+#endif
+
+#ifdef  RTE_Network_FTP_Server
+#include "Net_Config_FTP_Server.h"
+#endif
+#ifdef  RTE_Network_FTP_Client
+#include "Net_Config_FTP_Client.h"
+#endif
+
+#ifdef  RTE_Network_DNS_Client
+#include "Net_Config_DNS_Client.h"
+#endif
+
+#ifdef  RTE_Network_SMTP_Client
+#include "Net_Config_SMTP_Client.h"
+#endif
+
+#ifdef  RTE_Network_SNMP_Agent
+#include "Net_Config_SNMP_Agent.h"
+#endif
+
+#ifdef  RTE_Network_SNTP_Client
+#include "Net_Config_SNTP_Client.h"
+#endif
+
+#include "net_config.h"
+
+/**
+\addtogroup net_genFunc
+@{
+*/
+/**
+  \fn          void net_sys_error (ERROR_CODE error)
+  \ingroup     net_cores
+  \brief       Network system error handler.
+*/
+void net_sys_error (ERROR_CODE error) {
+  /* This function is called when a fatal error is encountered. */
+  /* The normal program execution is not possible anymore.      */
+
+  switch (error) {
+    case ERR_MEM_ALLOC:
+      /* Out of memory */
+      break;
+
+    case ERR_MEM_FREE:
+      /* Trying to release non existing memory block */
+      break;
+
+    case ERR_MEM_CORRUPT:
+      /* Memory Link pointer Corrupted */
+      /* More data written than the size of allocated mem block */
+      break;
+
+    case ERR_MEM_LOCK:
+      /* Locked Memory management function (alloc/free) re-entered */
+      break;
+
+    case ERR_UDP_ALLOC:
+      /* Out of UDP Sockets */
+      break;
+
+    case ERR_TCP_ALLOC:
+      /* Out of TCP Sockets */
+      break;
+
+    case ERR_TCP_STATE:
+      /* TCP State machine in undefined state */
+      break;
+  }
+
+  /* End-less loop */
+  while (1);
+}
+/**
+@}
+*/
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_BSD.h b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_BSD.h
new file mode 100644
index 000000000..4166a0a2d
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_BSD.h
@@ -0,0 +1,36 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Socket
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_BSD.h
+ * Purpose: Network Configuration BSD Sockets
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Berkley (BSD) Sockets
+#define BSD_ENABLE              1
+
+//   Number of BSD Sockets <1-20>
+//    Number of available Berkeley Sockets
+//    Default: 2
+#define BSD_NUM_SOCKS           15
+
+//   Number of Streaming Server Sockets <0-20>
+//    Defines a number of Streaming (TCP) Server sockets,
+//    that listen for an incoming connection from the client.
+//    Default: 1
+#define BSD_SERVER_SOCKS        1
+
+//   Receive Timeout in seconds <0-600>
+//    A timeout for socket receive in blocking mode.
+//    Timeout value of 0 means indefinite timeout.
+//    Default: 20
+#define BSD_RECEIVE_TOUT        20
+
+//   Hostname Resolver
+//    Enable or disable Berkeley style hostname resolver.
+#define BSD_HOSTNAME_ENABLE     0
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_DNS_Client.h b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_DNS_Client.h
new file mode 100644
index 000000000..d30b71807
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_DNS_Client.h
@@ -0,0 +1,20 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Service
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_DNS_Client.h
+ * Purpose: Network Configuration DNS Client
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// DNS Client
+#define DNS_CLIENT_ENABLE       1
+
+//     Cache Table size <5-100>
+//      Number of cached DNS host names/IP addresses
+//      Default: 20
+#define DNS_CLIENT_TAB_SIZE     20
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_ETH_0.h b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_ETH_0.h
new file mode 100644
index 000000000..9a49f3821
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_ETH_0.h
@@ -0,0 +1,222 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Interface
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_ETH_0.h
+ * Purpose: Network Configuration ETH Interface
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Ethernet Network Interface 0
+#define ETH0_ENABLE             1
+
+//   Connect to hardware via Driver_ETH# <0-255>
+//   Select driver control block for MAC and PHY interface
+#define ETH0_DRIVER             1
+
+//   MAC Address
+//    Local Ethernet MAC Address
+//    Value FF:FF:FF:FF:FF:FF is not allowed.
+//    It is an ethernet Broadcast MAC address.
+//     Address byte 1 <0x00-0xff:2>
+//      LSB is an ethernet Multicast bit.
+//      Must be 0 for local MAC address.
+//      Default: 0x1E
+#define ETH0_MAC1               0x1E
+
+//     Address byte 2 <0x00-0xff>
+//      Default: 0x30
+#define ETH0_MAC2               0x30
+
+//     Address byte 3 <0x00-0xff>
+//      Default: 0x6C
+#define ETH0_MAC3               0x6C
+
+//     Address byte 4 <0x00-0xff>
+//      Default: 0xA2
+#define ETH0_MAC4               0xA2
+
+//     Address byte 5 <0x00-0xff>
+//      Default: 0x45
+#define ETH0_MAC5               0x45
+
+//     Address byte 6 <0x00-0xff>
+//      Default: 0x5E
+#define ETH0_MAC6               0x5E
+//   
+
+//   IP Address
+//    Local Static IP Address
+//    Value 255.255.255.255 is not allowed.
+//    It is a Broadcast IP address.
+//     Address byte 1 <0-255>
+//      Default: 192
+#define ETH0_IP1                192
+
+//     Address byte 2 <0-255>
+//      Default: 168
+#define ETH0_IP2                168
+
+//     Address byte 3 <0-255>
+//      Default: 0
+#define ETH0_IP3                0
+
+//     Address byte 4 <0-255>
+//      Default: 100
+#define ETH0_IP4                100
+//   
+
+//   Subnet mask
+//    Local Subnet mask
+//     Mask byte 1 <0-255>
+//      Default: 255
+#define ETH0_MASK1              255
+
+//     Mask byte 2 <0-255>
+//      Default: 255
+#define ETH0_MASK2              255
+
+//     Mask byte 3 <0-255>
+//      Default: 255
+#define ETH0_MASK3              255
+
+//     Mask byte 4 <0-255>
+//      Default: 0
+#define ETH0_MASK4              0
+//   
+
+//   Default Gateway
+//    Default Gateway IP Address
+//     Address byte 1 <0-255>
+//      Default: 192
+#define ETH0_GW1                192
+
+//     Address byte 2 <0-255>
+//      Default: 168
+#define ETH0_GW2                168
+
+//     Address byte 3 <0-255>
+//      Default: 0
+#define ETH0_GW3                0
+
+//     Address byte 4 <0-255>
+//      Default: 254
+#define ETH0_GW4                254
+//   
+
+//   Primary DNS Server
+//    Primary DNS Server IP Address
+//     Address byte 1 <0-255>
+//      Default: 194
+#define ETH0_PRI_DNS1           194
+
+//     Address byte 2 <0-255>
+//      Default: 25
+#define ETH0_PRI_DNS2           25
+
+//     Address byte 3 <0-255>
+//      Default: 2
+#define ETH0_PRI_DNS3           2
+
+//     Address byte 4 <0-255>
+//      Default: 129
+#define ETH0_PRI_DNS4           129
+//   
+
+//   Secondary DNS Server
+//    Secondary DNS Server IP Address
+//     Address byte 1 <0-255>
+//      Default: 194
+#define ETH0_SEC_DNS1           194
+
+//     Address byte 2 <0-255>
+//      Default: 25
+#define ETH0_SEC_DNS2           25
+
+//     Address byte 3 <0-255>
+//      Default: 2
+#define ETH0_SEC_DNS3           2
+
+//     Address byte 4 <0-255>
+//      Default: 130
+#define ETH0_SEC_DNS4           130
+//   
+
+//   ARP Definitions
+//    Address Resolution Protocol Definitions
+//     Cache Table size <5-100>
+//      Number of cached hardware/IP addresses
+//      Default: 10
+#define ETH0_ARP_TAB_SIZE       10
+
+//     Cache Timeout in seconds <5-255>
+//      A timeout for a cached hardware/IP addresses
+//      Default: 150
+#define ETH0_ARP_CACHE_TOUT     150
+
+//     Number of Retries <0-20>
+//      Number of Retries to resolve an IP address
+//      before ARP module gives up
+//      Default: 4
+#define ETH0_ARP_MAX_RETRY      4
+
+//     Resend Timeout in seconds <1-10>
+//      A timeout to resend the ARP Request
+//      Default: 2
+#define ETH0_ARP_RESEND_TOUT    2
+
+//     Send Notification on Address changes
+//      When this option is enabled, the embedded host
+//      will send a Gratuitous ARP notification at startup,
+//      or when the device IP address has changed.
+//      Default: Disabled
+#define ETH0_ARP_NOTIFY         0
+//   
+
+//   IGMP Group Management
+//    Enable or disable Internet Group Management Protocol
+#define ETH0_IGMP_ENABLE        0
+
+//     Membership Table size <2-50>
+//      Number of Groups this host can join
+//      Default: 5
+#define ETH0_IGMP_TAB_SIZE      5
+//   
+
+//   NetBIOS Name Service
+//    When this option is enabled, the embedded host can be
+//    accessed by his name on the local LAN using NBNS protocol.
+//    You need to modify also the number of UDP Sockets,
+//    because NBNS protocol uses one UDP socket to run.
+#define ETH0_NBNS_ENABLE        1
+
+//   Dynamic Host Configuration
+//    When this option is enabled, local IP address, Net Mask
+//    and Default Gateway are obtained automatically from
+//    the DHCP Server on local LAN.
+//    You need to modify also the number of UDP Sockets,
+//    because DHCP protocol uses one UDP socket to run.
+#define ETH0_DHCP_ENABLE        0
+
+//     Vendor Class Identifier
+//      This value is optional. If specified, it is added
+//      to DHCP request message, identifying vendor type.
+//      Default: ""
+#define ETH0_DHCP_VCID          ""
+
+//     Bootfile Name
+//      This value is optional. If enabled, the Bootfile Name
+//      (option 67) is also requested from DHCP server.
+//      Default: disabled
+#define ETH0_DHCP_BOOTFILE      0
+
+//     NTP Servers
+//      This value is optional. If enabled, a list of NTP Servers
+//      (option 42) is also requested from DHCP server.
+//      Default: disabled
+#define ETH0_DHCP_NTP_SERVERS   0
+//   
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_TCP.h b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_TCP.h
new file mode 100644
index 000000000..9d5b419e4
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_TCP.h
@@ -0,0 +1,61 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Socket
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_TCP.h
+ * Purpose: Network Configuration TCP Sockets
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// TCP Sockets
+#define TCP_ENABLE              1
+
+//   Number of TCP Sockets <1-20>
+//    Number of available TCP sockets
+//    Default: 5
+#define TCP_NUM_SOCKS           15
+
+//   Number of Retries <0-20>
+//    How many times TCP module will try to retransmit data
+//    before giving up. Increase this value for high-latency
+//    and low_throughput networks.
+//    Default: 5
+#define TCP_MAX_RETRY           5
+
+//   Retry Timeout in seconds <1-10>
+//    If data frame not acknowledged within this time frame,
+//    TCP module will try to resend the data again.
+//    Default: 4
+#define TCP_RETRY_TOUT          4
+
+//   Default Connect Timeout in seconds <1-600>
+//    Default TCP Socket Keep Alive timeout. When it expires
+//    with no TCP data frame send, TCP Connection is closed.
+//    Default: 120
+#define TCP_DEFAULT_TOUT        120
+
+//   Maximum Segment Size <536-1460>
+//    The Maximum Segment Size specifies the maximum
+//    number of bytes in the TCP segment's Data field.
+//    Default: 1460
+#define TCP_MAX_SEG_SIZE        1460
+
+//   Receive Window Size <536-65535>
+//    Receive Window Size specifies the size of data, 
+//    that the socket is able to buffer in flow-control mode.
+//    Default: 4380
+#define TCP_RECEIVE_WIN_SIZE    4380
+
+// 
+
+// TCP Initial Retransmit period in seconds
+#define TCP_INITIAL_RETRY_TOUT  1
+
+// TCP SYN frame retransmit period in seconds
+#define TCP_SYN_RETRY_TOUT      2
+
+// Number of retries to establish a connection
+#define TCP_CONNECT_RETRY       7
+
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_UDP.h b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_UDP.h
new file mode 100644
index 000000000..113f314a9
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Config_UDP.h
@@ -0,0 +1,20 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network:Socket
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Config_UDP.h
+ * Purpose: Network Configuration UDP Sockets
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// UDP Sockets
+#define UDP_ENABLE              1
+
+//   Number of UDP Sockets <1-20>
+//    Number of available UDP sockets
+//    Default: 5
+#define UDP_NUM_SOCKS           20
+
+// 
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Debug.c b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Debug.c
new file mode 100644
index 000000000..735089a40
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/Network/Net_Debug.c
@@ -0,0 +1,125 @@
+/*------------------------------------------------------------------------------
+ * MDK Middleware - Component ::Network
+ * Copyright (c) 2004-2013 ARM Germany GmbH. All rights reserved.
+ *------------------------------------------------------------------------------
+ * Name:    Net_Debug.c
+ * Purpose: Network Debug Configuration
+ * Rev.:    V5.00
+ *----------------------------------------------------------------------------*/
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
+
+// Print Time Stamp
+//    Enable printing the time-info in debug messages
+#define DBG_TIME                1
+
+// TCPnet Debug Definitions
+//   Memory Management Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Dynamic Memory debug messages
+#define DBG_MEM                 1
+
+//   Ethernet Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Ethernet debug messages
+#define DBG_ETH                 0
+
+//   PPP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off PPP debug messages
+#define DBG_PPP                 0
+
+//   SLIP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off SLIP debug messages
+#define DBG_SLIP                0
+
+//   ARP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off ARP debug messages
+#define DBG_ARP                 0
+
+//   IP Debug    <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off IP debug messages
+#define DBG_IP                  1
+
+//   ICMP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off ICMP debug messages
+#define DBG_ICMP                1
+
+//   IGMP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off IGMP debug messages
+#define DBG_IGMP                1
+
+//   UDP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off UDP debug messages
+#define DBG_UDP                 1
+
+//   TCP Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off TCP debug messages
+#define DBG_TCP                 1
+
+//   NBNS Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off NetBIOS Name Service debug messages
+#define DBG_NBNS                1
+
+//   DHCP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Dynamic Host Configuration debug messages
+#define DBG_DHCP                1
+
+//   DNS Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Domain Name Service debug messages
+#define DBG_DNS                 1
+
+//   SNMP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Simple Network Management debug messages
+#define DBG_SNMP                1
+
+//   SNTP Debug  <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Simple Network Time debug messages
+#define DBG_SNTP                1
+
+//   BSD Debug   <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off BSD Interface debug messages
+#define DBG_BSD                 1
+// 
+
+// Application Debug Definitions
+//   HTTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Web Server debug messages
+#define DBG_HTTP_SERVER         1
+
+//   FTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off FTP Server debug messages
+#define DBG_FTP_SERVER          1
+
+//   FTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off FTP Client debug messages
+#define DBG_FTP_CLIENT          1
+
+//   Telnet Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off Telnet Server debug messages
+#define DBG_TELNET_SERVER       1
+
+//   TFTP Server Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off TFTP Server debug messages
+#define DBG_TFTP_SERVER         1
+
+//   TFTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off TFTP Client debug messages
+#define DBG_TFTP_CLIENT         1
+
+//   SMTP Client Debug <0=> Off <1=> Errors only <2=> Full debug
+//    Turn On/Off SMTP Client debug messages
+#define DBG_SMTP_CLIENT         1
+// 
+
+
+#include "net_debug.h"
+
+
+/**
+  \fn          void net_debug_init (void)
+  \brief       Initialize Network Debug Interface.
+*/
+void net_debug_init (void) {
+  /* Add your code to initialize the Debug output. This is usually the  */
+  /* serial interface. The function is called at TCPnet system startup. */
+  /* You may need to customize also the 'putchar()' function.           */
+
+}
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/RTE_Components.h b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/RTE_Components.h
new file mode 100644
index 000000000..dc29d6c59
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/RTE_Components.h
@@ -0,0 +1,28 @@
+
+/*
+ * Auto generated Run-Time-Environment Component Configuration File
+ *      *** Do not modify ! ***
+ *
+ * Project: 'SimpleServer' 
+ * Target:  'SimpleServer' 
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+#define RTE_DEVICE_STARTUP_STM32F2xx    /* Device Startup for STM32F2 */
+#define RTE_Drivers_ETH_MAC0            /* Driver ETH_MAC0 */
+#define RTE_Drivers_MCI0                /* Driver MCI0 */
+#define RTE_Drivers_PHY_ST802RT1        /* Driver PHY ST802RT1 */
+#define RTE_FileSystem_Core             /* File System Core */
+          #define RTE_FileSystem_LFN              /* File System with Long Filename support */
+#define RTE_FileSystem_Drive_MC_0       /* File System Memory Card Drive 0 */
+#define RTE_Network_Core                /* Network Core */
+          #define RTE_Network_Debug               /* Network Debug Version */
+#define RTE_Network_DNS_Client          /* Network DNS Client */
+#define RTE_Network_Interface_ETH_0     /* Network Interface ETH 0 */
+#define RTE_Network_Socket_BSD          /* Network Socket BSD */
+#define RTE_Network_Socket_TCP          /* Network Socket TCP */
+#define RTE_Network_Socket_UDP          /* Network Socket UDP */
+
+#endif /* RTE_COMPONENTS_H */
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/STM32_SWO.ini b/IDE/MDK5-ARM/Projects/SimpleServer/STM32_SWO.ini
new file mode 100644
index 000000000..239abce37
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/STM32_SWO.ini
@@ -0,0 +1,36 @@
+/******************************************************************************/
+/* STM32_SWO.ini: STM32 Debugger Initialization File                           */
+/******************************************************************************/
+// <<< Use Configuration Wizard in Context Menu >>>                           // 
+/******************************************************************************/
+/* This file is part of the uVision/ARM development tools.                    */
+/* Copyright (c) 2004-2013 Keil Software. All rights reserved.                */
+/* This software may only be used under the terms of a valid, current,        */
+/* end user licence from KEIL for a compatible version of KEIL software       */
+/* development tools. Nothing else gives you the right to use this software.  */
+/******************************************************************************/
+
+
+FUNC void DebugSetup (void) {
+//  Debug MCU Configuration
+//       DBG_SLEEP      Debug Sleep Mode
+//       DBG_STOP       Debug Stop Mode
+//       DBG_STANDBY    Debug Standby Mode
+//       TRACE_IOEN     Trace I/O Enable 
+//    TRACE_MODE     Trace Mode
+//             <0=> Asynchronous
+//             <1=> Synchronous: TRACEDATA Size 1
+//             <2=> Synchronous: TRACEDATA Size 2
+//             <3=> Synchronous: TRACEDATA Size 4
+//       DBG_IWDG_STOP  Independant Watchdog Stopped when Core is halted
+//       DBG_WWDG_STOP  Window Watchdog Stopped when Core is halted
+//      DBG_TIM1_STOP  Timer 1 Stopped when Core is halted
+//      DBG_TIM2_STOP  Timer 2 Stopped when Core is halted
+//      DBG_TIM3_STOP  Timer 3 Stopped when Core is halted
+//      DBG_TIM4_STOP  Timer 4 Stopped when Core is halted
+//      DBG_CAN_STOP   CAN Stopped when Core is halted
+// 
+  _WDWORD(0xE0042004, 0x00000027);  // DBGMCU_CR
+}
+
+DebugSetup();                       // Debugger Setup
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/SimpleServer.uvoptx b/IDE/MDK5-ARM/Projects/SimpleServer/SimpleServer.uvoptx
new file mode 100644
index 000000000..b3a8b8dbb
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/SimpleServer.uvoptx
@@ -0,0 +1,1406 @@
+
+
+
+  1.0
+
+  
### uVision Project, (C) Keil Software

+
+  
+    *.c
+    *.s*; *.src; *.a*
+    *.obj
+    *.lib
+    *.txt; *.h; *.inc
+    *.plm
+    *.cpp
+  
+
+  
+    0
+    0
+  
+
+  
+    SimpleServer
+    0x4
+    ARM-ADS
+    
+      120000000
+      
+        1
+        1
+        0
+        1
+      
+      
+        1
+        65535
+        0
+        0
+        0
+      
+      
+        79
+        66
+        8
+        .\Object\
+      
+      
+        1
+        1
+        1
+        0
+        1
+        1
+        0
+        1
+        0
+        0
+        0
+        0
+      
+      
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        0
+        0
+      
+      
+        1
+        0
+        1
+      
+      255
+      
+        SARMCM3.DLL
+        -REMAP -MPU
+        DCM.DLL
+        -pCM3
+        SARMCM3.DLL
+        -REMAP -MPU
+        TCM.DLL
+        -pCM3
+      
+      
+        0
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        1
+        0
+        1
+        1
+        0
+        0
+        8
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        .\STM32_SWO.ini
+        BIN\ULP2CM3.DLL
+      
+      
+        
+          0
+          DLGTARM
+          (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+        
+        
+          0
+          ARMDBGFLAGS
+          
+        
+        
+          0
+          ULP2CM3
+          -UP1135060 -O206 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO19 -TC120000000 -TP18 -TDX0 -TDD0 -TDS8000 -TDT0 -TDC1F -TIE1 -TIP1 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024.flm -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm)
+        
+        
+          0
+          DLGUARM
+          
+        
+        
+          0
+          UL2CM3
+          UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm))
+        
+      
+      
+      
+        
+          1
+          8
+          0x20000408
+        
+      
+      
+        
+          2
+          8
+          0x8004dc8
+        
+      
+      
+        0
+      
+      
+        0
+        0
+        1
+        0
+        0
+        0
+        0
+        1
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        0
+        1
+        0
+        0
+        0
+        0
+      
+      
+      
+    
+  
+
+  
+    Source
+    1
+    0
+    0
+    0
+    
+      1
+      1
+      1
+      0
+      0
+      4
+      0
+      0
+      0
+      0
+      .\main.c
+      main.c
+      0
+      0
+    
+    
+      1
+      2
+      1
+      0
+      0
+      4
+      0
+      0
+      0
+      0
+      .\server.c
+      server.c
+      0
+      0
+    
+  
+
+  
+    Configuration
+    1
+    0
+    0
+    0
+    
+      2
+      3
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      .\RTE\wolfSSL\config-CyaSSL.h
+      config-CyaSSL.h
+      0
+      0
+    
+    
+      2
+      4
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      .\RTE\wolfSSL\config-Crypt.h
+      config-Crypt.h
+      0
+      0
+    
+  
+
+  
+    Documentation
+    1
+    0
+    0
+    0
+    
+      3
+      5
+      5
+      0
+      0
+      0
+      0
+      1
+      1
+      0
+      .\Abstract.txt
+      Abstract.txt
+      0
+      0
+    
+  
+
+  
+    ::CMSIS
+    0
+    0
+    0
+    1
+    
+      4
+      6
+      4
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib
+      RTX_CM3.lib
+      1
+      0
+    
+    
+      4
+      7
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\CMSIS\RTX_Conf_CM.c
+      RTX_Conf_CM.c
+      1
+      0
+    
+  
+
+  
+    ::Device
+    0
+    0
+    0
+    1
+    
+      5
+      8
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c
+      DMA_STM32F2xx.c
+      1
+      0
+    
+    
+      5
+      9
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c
+      GPIO_STM32F2xx.c
+      1
+      0
+    
+    
+      5
+      10
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Device\STM32F207IG\RTE_Device.h
+      RTE_Device.h
+      1
+      0
+    
+    
+      5
+      11
+      2
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Device\STM32F207IG\startup_stm32f2xx.s
+      startup_stm32f2xx.s
+      1
+      0
+    
+    
+      5
+      12
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Device\STM32F207IG\system_stm32f2xx.c
+      system_stm32f2xx.c
+      1
+      0
+    
+  
+
+  
+    ::Drivers
+    0
+    0
+    0
+    1
+    
+      6
+      13
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Driver\PHY_ST802RT1.c
+      PHY_ST802RT1.c
+      1
+      0
+    
+    
+      6
+      14
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\EMAC_STM32F2xx.c
+      EMAC_STM32F2xx.c
+      1
+      0
+    
+    
+      6
+      15
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c
+      MCI_STM32F2xx.c
+      1
+      0
+    
+  
+
+  
+    ::File System
+    0
+    0
+    0
+    1
+    
+      7
+      16
+      4
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib
+      FS_LFN_CM3_L.lib
+      1
+      0
+    
+    
+      7
+      17
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\File_System\FS_Config.c
+      FS_Config.c
+      1
+      0
+    
+    
+      7
+      18
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\File_System\FS_Config_MC_0.h
+      FS_Config_MC_0.h
+      1
+      0
+    
+  
+
+  
+    ::Network
+    0
+    0
+    0
+    1
+    
+      8
+      19
+      4
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Lib\ARM\Net_Dbg_CM3_L.lib
+      Net_Dbg_CM3_L.lib
+      1
+      0
+    
+    
+      8
+      20
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config.c
+      Net_Config.c
+      1
+      0
+    
+    
+      8
+      21
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_BSD.h
+      Net_Config_BSD.h
+      1
+      0
+    
+    
+      8
+      22
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_DNS_Client.h
+      Net_Config_DNS_Client.h
+      1
+      0
+    
+    
+      8
+      23
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_ETH_0.h
+      Net_Config_ETH_0.h
+      1
+      0
+    
+    
+      8
+      24
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_TCP.h
+      Net_Config_TCP.h
+      1
+      0
+    
+    
+      8
+      25
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Config_UDP.h
+      Net_Config_UDP.h
+      1
+      0
+    
+    
+      8
+      26
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\Network\Net_Debug.c
+      Net_Debug.c
+      1
+      0
+    
+  
+
+  
+    ::wolfSSL
+    0
+    0
+    0
+    1
+    
+      9
+      27
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
+      cyassl_MDK_ARM.c
+      1
+      0
+    
+    
+      9
+      28
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
+      time-STM32F2xx.c
+      1
+      0
+    
+    
+      9
+      29
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c
+      aes.c
+      1
+      0
+    
+    
+      9
+      30
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c
+      arc4.c
+      1
+      0
+    
+    
+      9
+      31
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c
+      asm.c
+      1
+      0
+    
+    
+      9
+      32
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c
+      asn.c
+      1
+      0
+    
+    
+      9
+      33
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c
+      blake2b.c
+      1
+      0
+    
+    
+      9
+      34
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c
+      camellia.c
+      1
+      0
+    
+    
+      9
+      35
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c
+      coding.c
+      1
+      0
+    
+    
+      9
+      36
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c
+      compress.c
+      1
+      0
+    
+    
+      9
+      37
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c
+      des3.c
+      1
+      0
+    
+    
+      9
+      38
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c
+      dh.c
+      1
+      0
+    
+    
+      9
+      39
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c
+      dsa.c
+      1
+      0
+    
+    
+      9
+      40
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c
+      ecc.c
+      1
+      0
+    
+    
+      9
+      41
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c
+      ecc_fp.c
+      1
+      0
+    
+    
+      9
+      42
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c
+      error.c
+      1
+      0
+    
+    
+      9
+      43
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c
+      hc128.c
+      1
+      0
+    
+    
+      9
+      44
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c
+      hmac.c
+      1
+      0
+    
+    
+      9
+      45
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c
+      integer.c
+      1
+      0
+    
+    
+      9
+      46
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c
+      logging.c
+      1
+      0
+    
+    
+      9
+      47
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c
+      md2.c
+      1
+      0
+    
+    
+      9
+      48
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c
+      md4.c
+      1
+      0
+    
+    
+      9
+      49
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c
+      md5.c
+      1
+      0
+    
+    
+      9
+      50
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c
+      memory.c
+      1
+      0
+    
+    
+      9
+      51
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c
+      misc.c
+      1
+      0
+    
+    
+      9
+      52
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c
+      pwdbased.c
+      1
+      0
+    
+    
+      9
+      53
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c
+      rabbit.c
+      1
+      0
+    
+    
+      9
+      54
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c
+      random.c
+      1
+      0
+    
+    
+      9
+      55
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c
+      ripemd.c
+      1
+      0
+    
+    
+      9
+      56
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c
+      rsa.c
+      1
+      0
+    
+    
+      9
+      57
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c
+      sha.c
+      1
+      0
+    
+    
+      9
+      58
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c
+      sha256.c
+      1
+      0
+    
+    
+      9
+      59
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c
+      sha512.c
+      1
+      0
+    
+    
+      9
+      60
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c
+      tfm.c
+      1
+      0
+    
+    
+      9
+      61
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\crl.c
+      crl.c
+      1
+      0
+    
+    
+      9
+      62
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\internal.c
+      internal.c
+      1
+      0
+    
+    
+      9
+      63
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\io.c
+      io.c
+      1
+      0
+    
+    
+      9
+      64
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\keys.c
+      keys.c
+      1
+      0
+    
+    
+      9
+      65
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ocsp.c
+      ocsp.c
+      1
+      0
+    
+    
+      9
+      66
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\sniffer.c
+      sniffer.c
+      1
+      0
+    
+    
+      9
+      67
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ssl.c
+      ssl.c
+      1
+      0
+    
+    
+      9
+      68
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\tls.c
+      tls.c
+      1
+      0
+    
+    
+      9
+      69
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\wolfSSL\config-Crypt.h
+      config-Crypt.h
+      1
+      0
+    
+    
+      9
+      70
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\wolfSSL\config-CyaSSL.h
+      config-CyaSSL.h
+      1
+      0
+    
+    
+      9
+      71
+      5
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      RTE\wolfSSL\config.h
+      config.h
+      1
+      0
+    
+  
+
+
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/SimpleServer.uvprojx b/IDE/MDK5-ARM/Projects/SimpleServer/SimpleServer.uvprojx
new file mode 100644
index 000000000..d354efbe4
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/SimpleServer.uvprojx
@@ -0,0 +1,1101 @@
+
+
+
+  2.1
+
+  
### uVision Project, (C) Keil Software

+
+  
+    
+      SimpleServer
+      0x4
+      ARM-ADS
+      
+        
+          STM32F207IG
+          STMicroelectronics
+          IRAM(0x20000000,0x20000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M3") CLOCK(120000000) ELITTLE
+          
+          
+          UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm))
+          0
+          $$Device:STM32F207IG$Device\Include\stm32f2xx.h
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          $$Device:STM32F207IG$SVD\STM32F20x.svd
+          0
+          0
+          
+          
+          
+          
+          
+          
+            0
+            0
+            0
+            0
+            1
+          
+          .\Object\
+          SimpleServer
+          1
+          0
+          0
+          1
+          1
+          .\Object\
+          1
+          0
+          0
+          
+            0
+            0
+            
+            
+            0
+            0
+            0
+            0
+          
+          
+            0
+            0
+            
+            
+            0
+            0
+          
+          
+            0
+            0
+            
+            
+            0
+            0
+          
+          0
+          
+        
+        
+          0
+          0
+          0
+          0
+          0
+          1
+          0
+          0
+          0
+          0
+          3
+          
+          
+          1
+        
+        
+          SARMCM3.DLL
+          -REMAP -MPU
+          DCM.DLL
+          -pCM3
+          SARMCM3.DLL
+          -REMAP -MPU
+          TCM.DLL
+          -pCM3
+        
+        
+          
+            1
+            0
+            0
+            0
+            16
+          
+          
+            0
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+          
+          
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+            1
+            1
+          
+          0
+          8
+          
+            
+            
+            
+            
+            
+          
+          
+            
+            
+            
+            
+            .\STM32_SWO.ini
+            BIN\ULP2CM3.DLL
+          
+        
+        
+          
+            1
+            0
+            0
+            1
+            1
+            4100
+          
+          1
+          BIN\ULP2CM3.DLL
+          "" ()
+          
+          
+          
+          
+          0
+        
+        
+          
+            0
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+            1
+            1
+            0
+            1
+            1
+            0
+            0
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            1
+            0
+            0
+            "Cortex-M3"
+            
+            0
+            0
+            0
+            1
+            1
+            0
+            0
+            0
+            0
+            0
+            8
+            0
+            0
+            0
+            3
+            3
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            1
+            0
+            0
+            0
+            0
+            1
+            0
+            
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x20000000
+                0x20000
+              
+              
+                1
+                0x8000000
+                0x100000
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                1
+                0x8000000
+                0x100000
+              
+              
+                1
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x0
+                0x0
+              
+              
+                0
+                0x20000000
+                0x20000
+              
+              
+                0
+                0x0
+                0x0
+              
+            
+            
+          
+          
+            1
+            4
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            
+              
+              HAVE_CONFIG_H  MDK_CONF_SimpleServer  CYASSL_STM32F2xx
+              
+              
+            
+          
+          
+            1
+            0
+            0
+            0
+            0
+            0
+            0
+            0
+            
+              
+              
+              
+              
+            
+          
+          
+            1
+            0
+            0
+            0
+            1
+            0
+            0x08000000
+            0x20000000
+            
+            
+            
+            
+            
+            
+          
+        
+      
+      
+        
+          Source
+          
+            
+              main.c
+              1
+              .\main.c
+            
+            
+              server.c
+              1
+              .\server.c
+            
+          
+        
+        
+          Configuration
+          
+            
+              config-CyaSSL.h
+              5
+              .\RTE\wolfSSL\config-CyaSSL.h
+            
+            
+              config-Crypt.h
+              5
+              .\RTE\wolfSSL\config-Crypt.h
+            
+          
+        
+        
+          Documentation
+          
+            
+              Abstract.txt
+              5
+              .\Abstract.txt
+            
+          
+        
+        
+          ::CMSIS
+          
+            
+              RTX_CM3.lib
+              4
+              C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib
+            
+            
+              RTX_Conf_CM.c
+              1
+              RTE\CMSIS\RTX_Conf_CM.c
+            
+          
+        
+        
+          ::Device
+          
+            
+              DMA_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c
+            
+            
+              GPIO_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c
+            
+            
+              RTE_Device.h
+              5
+              RTE\Device\STM32F207IG\RTE_Device.h
+            
+            
+              startup_stm32f2xx.s
+              2
+              RTE\Device\STM32F207IG\startup_stm32f2xx.s
+            
+            
+              system_stm32f2xx.c
+              1
+              RTE\Device\STM32F207IG\system_stm32f2xx.c
+            
+          
+        
+        
+          ::Drivers
+          
+            
+              PHY_ST802RT1.c
+              1
+              C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Driver\PHY_ST802RT1.c
+            
+            
+              EMAC_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\EMAC_STM32F2xx.c
+            
+            
+              MCI_STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c
+            
+          
+        
+        
+          ::File System
+          
+            
+              FS_LFN_CM3_L.lib
+              4
+              C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib
+            
+            
+              FS_Config.c
+              1
+              RTE\File_System\FS_Config.c
+            
+            
+              FS_Config_MC_0.h
+              5
+              RTE\File_System\FS_Config_MC_0.h
+            
+          
+        
+        
+          ::Network
+          
+            
+              Net_Dbg_CM3_L.lib
+              4
+              C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Lib\ARM\Net_Dbg_CM3_L.lib
+            
+            
+              Net_Config.c
+              1
+              RTE\Network\Net_Config.c
+            
+            
+              Net_Config_BSD.h
+              5
+              RTE\Network\Net_Config_BSD.h
+            
+            
+              Net_Config_DNS_Client.h
+              5
+              RTE\Network\Net_Config_DNS_Client.h
+            
+            
+              Net_Config_ETH_0.h
+              5
+              RTE\Network\Net_Config_ETH_0.h
+            
+            
+              Net_Config_TCP.h
+              5
+              RTE\Network\Net_Config_TCP.h
+            
+            
+              Net_Config_UDP.h
+              5
+              RTE\Network\Net_Config_UDP.h
+            
+            
+              Net_Debug.c
+              1
+              RTE\Network\Net_Debug.c
+            
+          
+        
+        
+          ::wolfSSL
+          
+            
+              cyassl_MDK_ARM.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
+            
+            
+              time-STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
+            
+            
+              aes.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c
+            
+            
+              arc4.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c
+            
+            
+              asm.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c
+            
+            
+              asn.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c
+            
+            
+              blake2b.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c
+            
+            
+              camellia.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c
+            
+            
+              coding.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c
+            
+            
+              compress.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c
+            
+            
+              des3.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c
+            
+            
+              dh.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c
+            
+            
+              dsa.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c
+            
+            
+              ecc.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c
+            
+            
+              ecc_fp.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c
+            
+            
+              error.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c
+            
+            
+              hc128.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c
+            
+            
+              hmac.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c
+            
+            
+              integer.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c
+            
+            
+              logging.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c
+            
+            
+              md2.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c
+            
+            
+              md4.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c
+            
+            
+              md5.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c
+            
+            
+              memory.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c
+            
+            
+              misc.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c
+            
+            
+              pwdbased.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c
+            
+            
+              rabbit.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c
+            
+            
+              random.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c
+            
+            
+              ripemd.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c
+            
+            
+              rsa.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c
+            
+            
+              sha.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c
+            
+            
+              sha256.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c
+            
+            
+              sha512.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c
+            
+            
+              tfm.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c
+            
+            
+              crl.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\crl.c
+            
+            
+              internal.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\internal.c
+            
+            
+              io.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\io.c
+            
+            
+              keys.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\keys.c
+            
+            
+              ocsp.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ocsp.c
+            
+            
+              sniffer.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\sniffer.c
+            
+            
+              ssl.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ssl.c
+            
+            
+              tls.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\tls.c
+            
+            
+              config-Crypt.h
+              5
+              RTE\wolfSSL\config-Crypt.h
+            
+            
+              config-CyaSSL.h
+              5
+              RTE\wolfSSL\config-CyaSSL.h
+            
+            
+              config.h
+              5
+              RTE\wolfSSL\config.h
+            
+          
+        
+      
+    
+  
+
+  
+    
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+    
+    
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+      
+        
+        
+          
+        
+      
+    
+    
+      
+        RTE\CMSIS\RTX_Conf_CM.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\Device\STM32F207IG\RTE_Device.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Device\STM32F207IG\startup_stm32f2xx.s
+        
+        
+        
+          
+        
+      
+      
+        RTE\Device\STM32F207IG\system_stm32f2xx.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\File_System\FS_Config.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\File_System\FS_Config_MC_0.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_BSD.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_DNS_Client.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_ETH_0.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_TCP.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Config_UDP.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\Network\Net_Debug.c
+        
+        
+        
+          
+        
+      
+      
+        RTE\Other\config-Crypt.h
+        
+        
+        
+      
+      
+        RTE\Other\config-CyaSSL.h
+        
+        
+        
+      
+      
+        RTE\Other\config-RTX-TCP-FS.h
+        
+        
+        
+      
+      
+        RTE\Other\config.h
+        
+        
+        
+      
+      
+        RTE\wolfSSL\config-Crypt.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\wolfSSL\config-CyaSSL.h
+        
+        
+        
+          
+        
+      
+      
+        RTE\wolfSSL\config.h
+        
+        
+        
+          
+        
+      
+    
+  
+
+
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/main.c b/IDE/MDK5-ARM/Projects/SimpleServer/main.c
new file mode 100644
index 000000000..d42ef2f88
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/main.c
@@ -0,0 +1,104 @@
+/* main.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+ 
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+#include 
+
+#include "cmsis_os.h"
+#include "rl_fs.h" 
+#include "rl_net.h" 
+#include 
+#include "cyassl_MDK_ARM.h"
+#include 
+
+/*-----------------------------------------------------------------------------
+ *        Initialize a Flash Memory Card
+ *----------------------------------------------------------------------------*/
+static void init_filesystem (void) {
+    int32_t retv;
+
+    retv = finit ("M0:");
+    if (retv == 0) {
+        retv = fmount ("M0:");
+        if (retv == 0) {
+            printf ("Drive M0 ready!\n");
+        }
+        else {
+          printf ("Drive M0 mount failed!\n");
+        }
+    } else {
+        printf ("Drive M0 initialization failed!\n");
+    }
+}
+
+/*-----------------------------------------------------------------------------
+ *        TCP/IP tasks
+ *----------------------------------------------------------------------------*/
+void tcp_poll (void const *arg)
+{
+    CYASSL_MSG("TCP polling started.\n") ;
+    while (1) {
+        net_main ();
+        osDelay(1) ;
+    }
+}
+
+typedef struct func_args {
+    int    argc;
+    char** argv;
+} func_args;
+
+extern void server_test(func_args * args) ;
+extern void init_time(void) ;
+
+    osThreadDef (tcp_poll, osPriorityHigh , 1, 0) ;
+/*-----------------------------------------------------------------------------
+ *       mian entry 
+ *----------------------------------------------------------------------------*/
+int myoptind = 0;
+char* myoptarg = NULL;
+
+int main() 
+{
+    static char *argv[]    = {  "client",   ""} ;
+    static func_args args  = {  2, argv } ; 
+        
+    init_time() ;
+    init_filesystem ();
+    net_initialize() ;
+    osThreadCreate (osThread (tcp_poll), NULL); 
+    osDelay(10000) ;  /* wait for DHCP */
+    #if defined(DEBUG_CYASSL)
+         printf("Turning ON Debug message\n") ;
+         CyaSSL_Debugging_ON() ;
+    #endif
+        
+    printf("Simple Server: Started\n") ;
+    while(1) {
+       server_test(&args) ;
+       printf("Enter any key to iterate.\n") ;
+       getchar() ;
+   }
+}
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/server.c b/IDE/MDK5-ARM/Projects/SimpleServer/server.c
new file mode 100644
index 000000000..de53738e8
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/server.c
@@ -0,0 +1,560 @@
+/* server.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+
+#if !defined(CYASSL_TRACK_MEMORY) && !defined(NO_MAIN_DRIVER)
+    /* in case memory tracker wants stats */
+    #define CYASSL_TRACK_MEMORY
+#endif
+
+#if defined(CYASSL_MDK_ARM)
+    #include 
+    #include 
+    
+    #if defined(CYASSL_MDK5)
+        #include "cmsis_os.h"
+        #include "rl_fs.h" 
+        #include "rl_net.h" 
+    #else
+        #include "rtl.h"
+    #endif
+    
+    #include "cyassl_MDK_ARM.h"
+#endif
+
+#include 
+#include 
+
+#include "examples/server/server.h"
+
+
+#ifdef CYASSL_CALLBACKS
+    int srvHandShakeCB(HandShakeInfo*);
+    int srvTimeoutCB(TimeoutInfo*);
+    Timeval srvTo;
+#endif
+
+static void NonBlockingSSL_Accept(SSL* ssl)
+{
+#ifndef CYASSL_CALLBACKS
+    int ret = SSL_accept(ssl);
+#else
+    int ret = CyaSSL_accept_ex(ssl, srvHandShakeCB, srvTimeoutCB, srvTo);
+#endif
+    int error = SSL_get_error(ssl, 0);
+    SOCKET_T sockfd = (SOCKET_T)CyaSSL_get_fd(ssl);
+    int select_ret;
+
+    while (ret != SSL_SUCCESS && (error == SSL_ERROR_WANT_READ ||
+                                  error == SSL_ERROR_WANT_WRITE)) {
+        int currTimeout = 1;
+
+        if (error == SSL_ERROR_WANT_READ)
+            printf("... server would read block\n");
+        else
+            printf("... server would write block\n");
+
+#ifdef CYASSL_DTLS
+        currTimeout = CyaSSL_dtls_get_current_timeout(ssl);
+#endif
+        select_ret = tcp_select(sockfd, currTimeout);
+
+        if ((select_ret == TEST_RECV_READY) ||
+                                        (select_ret == TEST_ERROR_READY)) {
+            #ifndef CYASSL_CALLBACKS
+                ret = SSL_accept(ssl);
+            #else
+                ret = CyaSSL_accept_ex(ssl,
+                                    srvHandShakeCB, srvTimeoutCB, srvTo);
+            #endif
+            error = SSL_get_error(ssl, 0);
+        }
+        else if (select_ret == TEST_TIMEOUT && !CyaSSL_dtls(ssl)) {
+            error = SSL_ERROR_WANT_READ;
+        }
+#ifdef CYASSL_DTLS
+        else if (select_ret == TEST_TIMEOUT && CyaSSL_dtls(ssl) &&
+                                            CyaSSL_dtls_got_timeout(ssl) >= 0) {
+            error = SSL_ERROR_WANT_READ;
+        }
+#endif
+        else {
+            error = SSL_FATAL_ERROR;
+        }
+    }
+    if (ret != SSL_SUCCESS)
+        err_sys("SSL_accept failed");
+}
+
+
+static void Usage(void)
+{
+    printf("server "    LIBCYASSL_VERSION_STRING
+           " NOTE: All files relative to CyaSSL home dir\n");
+    printf("-?          Help, print this usage\n");
+    printf("-p     Port to listen on, not 0, default %d\n", yasslPort);
+    printf("-v     SSL version [0-3], SSLv3(0) - TLS1.2(3)), default %d\n",
+                                 SERVER_DEFAULT_VERSION);
+    printf("-l     Cipher list\n");
+    printf("-c    Certificate file,           default %s\n", svrCert);
+    printf("-k    Key file,                   default %s\n", svrKey);
+    printf("-A    Certificate Authority file, default %s\n", cliCert);
+    printf("-d          Disable client cert check\n");
+    printf("-b          Bind to any interface instead of localhost only\n");
+    printf("-s          Use pre Shared keys\n");
+    printf("-t          Track CyaSSL memory use\n");
+    printf("-u          Use UDP DTLS,"
+           " add -v 2 for DTLSv1 (default), -v 3 for DTLSv1.2\n");
+    printf("-f          Fewer packets/group messages\n");
+    printf("-N          Use Non-blocking sockets\n");
+    printf("-S     Use Host Name Indication\n");
+}
+
+#ifdef CYASSL_MDK_SHELL
+#define exit(code) return(code)
+#endif
+
+
+THREAD_RETURN CYASSL_THREAD server_test(void* args)
+{
+    SOCKET_T sockfd   = 0;
+    SOCKET_T clientfd = 0;
+
+    SSL_METHOD* method = 0;
+    SSL_CTX*    ctx    = 0;
+    SSL*        ssl    = 0;
+
+    char   msg[] = "I hear you fa shizzle!";
+    char   input[80];
+    int    idx;
+    int    ch;
+    int    version = SERVER_DEFAULT_VERSION;
+    int    doCliCertCheck = 1;
+    int    useAnyAddr = 0;
+    int    port = yasslPort;
+    int    usePsk = 0;
+    int    doDTLS = 0;
+    int    useNtruKey   = 0;
+    int    nonBlocking  = 0;
+    int    trackMemory  = 0;
+    int    fewerPackets = 0;
+    char*  cipherList = NULL;
+    char*  verifyCert = (char*)cliCert;
+    char*  ourCert    = (char*)svrCert;
+    char*  ourKey     = (char*)svrKey;
+    int    argc = ((func_args*)args)->argc;
+    char** argv = ((func_args*)args)->argv;
+
+#ifdef HAVE_SNI
+    char*  sniHostName = NULL;
+#endif
+
+    ((func_args*)args)->return_code = -1; /* error state */
+
+#ifdef NO_RSA
+    verifyCert = (char*)cliEccCert;
+    ourCert    = (char*)eccCert;
+    ourKey     = (char*)eccKey;
+#endif
+    (void)trackMemory;
+
+    while ((ch = mygetopt(argc, argv, "?dbstnNufp:v:l:A:c:k:S:")) != -1) {
+        switch (ch) {
+            case '?' :
+                Usage();
+                exit(EXIT_SUCCESS);
+
+            case 'd' :
+                doCliCertCheck = 0;
+                break;
+
+            case 'b' :
+                useAnyAddr = 1;
+                break;
+
+            case 's' :
+                usePsk = 1;
+                break;
+
+            case 't' :
+            #ifdef USE_CYASSL_MEMORY
+                trackMemory = 1;
+            #endif
+                break;
+
+            case 'n' :
+                useNtruKey = 1;
+                break;
+
+            case 'u' :
+                doDTLS  = 1;
+                break;
+
+            case 'f' :
+                fewerPackets = 1;
+                break;
+
+            case 'p' :
+                port = atoi(myoptarg);
+                #if !defined(NO_MAIN_DRIVER) || defined(USE_WINDOWS_API)
+                    if (port == 0)
+                        err_sys("port number cannot be 0");
+                #endif
+                break;
+
+            case 'v' :
+                version = atoi(myoptarg);
+                if (version < 0 || version > 3) {
+                    Usage();
+                    exit(MY_EX_USAGE);
+                }
+                break;
+
+            case 'l' :
+                cipherList = myoptarg;
+                break;
+
+            case 'A' :
+                verifyCert = myoptarg;
+                break;
+
+            case 'c' :
+                ourCert = myoptarg;
+                break;
+
+            case 'k' :
+                ourKey = myoptarg;
+                break;
+
+            case 'N':
+                nonBlocking = 1;
+                break;
+
+            case 'S' :
+                #ifdef HAVE_SNI
+                    sniHostName = myoptarg;
+                #endif
+                break;
+
+            default:
+                Usage();
+                exit(MY_EX_USAGE);
+        }
+    }
+
+    myoptind = 0;      /* reset for test cases */
+
+    /* sort out DTLS versus TLS versions */
+    if (version == CLIENT_INVALID_VERSION) {
+        if (doDTLS)
+            version = CLIENT_DTLS_DEFAULT_VERSION;
+        else
+            version = CLIENT_DEFAULT_VERSION;
+    }
+    else {
+        if (doDTLS) {
+            if (version == 3)
+                version = -2;
+            else
+                version = -1;
+        }
+    }
+
+#ifdef USE_CYASSL_MEMORY
+    if (trackMemory)
+        InitMemoryTracker(); 
+#endif
+
+    switch (version) {
+#ifndef NO_OLD_TLS
+        case 0:
+            method = SSLv3_server_method();
+            break;
+
+    #ifndef NO_TLS
+        case 1:
+            method = TLSv1_server_method();
+            break;
+
+
+        case 2:
+            method = TLSv1_1_server_method();
+            break;
+
+        #endif
+#endif
+
+#ifndef NO_TLS
+        case 3:
+            method = TLSv1_2_server_method();
+            break;
+#endif
+                
+#ifdef CYASSL_DTLS
+        case -1:
+            method = DTLSv1_server_method();
+            break;
+
+        case -2:
+            method = DTLSv1_2_server_method();
+            break;
+#endif
+
+        default:
+            err_sys("Bad SSL version");
+    }
+
+    if (method == NULL)
+        err_sys("unable to get method");
+
+    ctx = SSL_CTX_new(method);
+    if (ctx == NULL)
+        err_sys("unable to get ctx");
+
+    if (cipherList)
+        if (SSL_CTX_set_cipher_list(ctx, cipherList) != SSL_SUCCESS)
+            err_sys("server can't set cipher list 1");
+
+#ifdef CYASSL_LEANPSK
+    usePsk = 1;
+#endif
+
+#if defined(NO_RSA) && !defined(HAVE_ECC)
+    usePsk = 1;
+#endif
+
+    if (fewerPackets)
+        CyaSSL_CTX_set_group_messages(ctx);
+
+#if !defined(NO_FILESYSTEM) && !defined(NO_CERTS)
+    if (!usePsk) {
+        if (SSL_CTX_use_certificate_file(ctx, ourCert, SSL_FILETYPE_PEM)
+                                         != SSL_SUCCESS)
+            err_sys("can't load server cert file, check file and run from"
+                    " CyaSSL home dir");
+    }
+#endif
+
+#ifdef HAVE_NTRU
+    if (useNtruKey) {
+        if (CyaSSL_CTX_use_NTRUPrivateKey_file(ctx, ourKey)
+                                               != SSL_SUCCESS)
+            err_sys("can't load ntru key file, "
+                    "Please run from CyaSSL home dir");
+    }
+#endif
+
+#if !defined(NO_FILESYSTEM) && !defined(NO_CERTS)
+    if (!useNtruKey && !usePsk) {
+        if (SSL_CTX_use_PrivateKey_file(ctx, ourKey, SSL_FILETYPE_PEM)
+                                         != SSL_SUCCESS)
+            err_sys("can't load server cert file, check file and run from"
+                " CyaSSL home dir");
+    }
+#endif
+
+    if (usePsk) {
+#ifndef NO_PSK
+        SSL_CTX_set_psk_server_callback(ctx, my_psk_server_cb);
+        SSL_CTX_use_psk_identity_hint(ctx, "cyassl server");
+        if (cipherList == NULL) {
+            const char *defaultCipherList;
+            #ifdef HAVE_NULL_CIPHER
+                defaultCipherList = "PSK-NULL-SHA256";
+            #else
+                defaultCipherList = "PSK-AES128-CBC-SHA256";
+            #endif
+            if (SSL_CTX_set_cipher_list(ctx, defaultCipherList) != SSL_SUCCESS)
+                err_sys("server can't set cipher list 2");
+        }
+#endif
+    }
+
+#if !defined(NO_FILESYSTEM) && !defined(NO_CERTS)
+    /* if not using PSK, verify peer with certs */
+    if (doCliCertCheck && usePsk == 0) {
+        SSL_CTX_set_verify(ctx, SSL_VERIFY_PEER |
+                                SSL_VERIFY_FAIL_IF_NO_PEER_CERT,0);
+        if (SSL_CTX_load_verify_locations(ctx, verifyCert, 0) != SSL_SUCCESS)
+            err_sys("can't load ca file, Please run from CyaSSL home dir");
+    }
+#endif
+
+#ifdef OPENSSL_EXTRA
+    SSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack);
+#endif
+
+#if defined(CYASSL_SNIFFER) && !defined(HAVE_NTRU) && !defined(HAVE_ECC)
+    /* don't use EDH, can't sniff tmp keys */
+    if (cipherList == NULL) {
+        if (SSL_CTX_set_cipher_list(ctx, "AES256-SHA256") != SSL_SUCCESS)
+            err_sys("server can't set cipher list 3");
+    }
+#endif
+
+#ifdef HAVE_SNI
+    if (sniHostName) {
+        if (CyaSSL_CTX_UseSNI(ctx, CYASSL_SNI_HOST_NAME, sniHostName,
+                                                          XSTRLEN(sniHostName)))
+            err_sys("UseSNI failed");
+        else
+            CyaSSL_CTX_SNI_SetOptions(ctx, CYASSL_SNI_HOST_NAME,
+                                                  CYASSL_SNI_ABORT_ON_MISMATCH);
+    }
+#endif
+
+    ssl = SSL_new(ctx);
+    if (ssl == NULL)
+        err_sys("unable to get SSL");
+    CyaSSL_set_quiet_shutdown(ssl, 1) ;
+#ifdef HAVE_CRL
+    CyaSSL_EnableCRL(ssl, 0);
+    CyaSSL_LoadCRL(ssl, crlPemDir, SSL_FILETYPE_PEM, CYASSL_CRL_MONITOR |
+                                                     CYASSL_CRL_START_MON);
+    CyaSSL_SetCRL_Cb(ssl, CRL_CallBack);
+#endif
+        osDelay(5000) ;
+    tcp_accept(&sockfd, &clientfd, (func_args*)args, port, useAnyAddr, doDTLS);
+    if (!doDTLS) 
+        CloseSocket(sockfd);
+
+    SSL_set_fd(ssl, clientfd);
+    if (usePsk == 0) {
+        #if !defined(NO_FILESYSTEM) && defined(OPENSSL_EXTRA)
+            CyaSSL_SetTmpDH_file(ssl, dhParam, SSL_FILETYPE_PEM);
+        #elif !defined(NO_CERTS)
+            SetDH(ssl);  /* repick suites with DHE, higher priority than PSK */
+        #endif
+    }
+        osDelay(5000) ;
+#ifndef CYASSL_CALLBACKS
+    if (nonBlocking) {
+        CyaSSL_set_using_nonblock(ssl, 1);
+        tcp_set_nonblocking(&clientfd);
+        NonBlockingSSL_Accept(ssl);
+    } else if (SSL_accept(ssl) != SSL_SUCCESS) {
+        int err = SSL_get_error(ssl, 0);
+        char buffer[80];
+        printf("error = %d, %s\n", err, ERR_error_string(err, buffer));
+        err_sys("SSL_accept failed");
+    }
+#else
+    NonBlockingSSL_Accept(ssl);
+#endif
+    showPeer(ssl);
+        osDelay(5000) ;
+    idx = SSL_read(ssl, input, sizeof(input)-1);
+    if (idx > 0) {
+        input[idx] = 0;
+        printf("Client message: %s\n", input);
+
+    }
+    else if (idx < 0) {
+        int readErr = SSL_get_error(ssl, 0);
+        if (readErr != SSL_ERROR_WANT_READ)
+            err_sys("SSL_read failed");
+    }
+
+    if (SSL_write(ssl, msg, sizeof(msg)) != sizeof(msg))
+        err_sys("SSL_write failed");
+        
+    SSL_shutdown(ssl);
+    SSL_free(ssl);
+    SSL_CTX_free(ctx);
+    
+    CloseSocket(clientfd);
+    ((func_args*)args)->return_code = 0;
+
+#ifdef USE_CYASSL_MEMORY
+    if (trackMemory)
+        ShowMemoryTracker();
+#endif /* USE_CYASSL_MEMORY */
+
+    return 0;
+}
+
+
+/* so overall tests can pull in test function */
+#ifndef NO_MAIN_DRIVER
+
+    int main(int argc, char** argv)
+    {
+        func_args args;
+
+#ifdef HAVE_CAVIUM
+        int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID);
+        if (ret != 0)
+            err_sys("Cavium OpenNitroxDevice failed");
+#endif /* HAVE_CAVIUM */
+
+        StartTCP();
+
+        args.argc = argc;
+        args.argv = argv;
+
+        CyaSSL_Init();
+#if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL)
+        CyaSSL_Debugging_ON();
+#endif
+        if (CurrentDir("server") || CurrentDir("build"))
+            ChangeDirBack(2);
+   
+#ifdef HAVE_STACK_SIZE
+        StackSizeCheck(&args, server_test);
+#else 
+        server_test(&args);
+#endif
+        CyaSSL_Cleanup();
+
+#ifdef HAVE_CAVIUM
+        CspShutdown(CAVIUM_DEV_ID);
+#endif
+        return args.return_code;
+    }
+
+    int myoptind = 0;
+    char* myoptarg = NULL;
+
+#endif /* NO_MAIN_DRIVER */
+
+
+#ifdef CYASSL_CALLBACKS
+
+    int srvHandShakeCB(HandShakeInfo* info)
+    {
+        (void)info;
+        return 0;
+    }
+
+
+    int srvTimeoutCB(TimeoutInfo* info)
+    {
+        (void)info;
+        return 0;
+    }
+
+#endif
+
diff --git a/IDE/MDK5-ARM/STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c b/IDE/MDK5-ARM/STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c
new file mode 100644
index 000000000..37154d136
--- /dev/null
+++ b/IDE/MDK5-ARM/STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c
@@ -0,0 +1,299 @@
+/* main.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+ 
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include "time.h"
+
+#define PERIPH_BASE           ((uint32_t)0x40000000) 
+/*-----------------------------------------------------------------------------
+ *        initialize RTC 
+ *----------------------------------------------------------------------------*/
+#include "stm32f2xx.h"
+
+#define assert_param(a)
+
+#define RTC_RSF_MASK         ((uint32_t)0xFFFFFF5F)
+#define SYNCHRO_TIMEOUT      ((uint32_t) 0x00008000)
+#define Bcd2ToByte(v) \
+   ((((uint8_t)(v & (uint8_t)0xF0) >> (uint8_t)0x4) * 10) + (v & (uint8_t)0x0F))
+#define RTC_TR_RESERVED_MASK ((uint32_t)0x007F7F7F)
+#define RTC_TR_MNT           ((uint32_t)0x00007000)
+#define RTC_TR_MNU           ((uint32_t)0x00000F00)
+
+#define PWR_OFFSET           (PWR_BASE - PERIPH_BASE)
+#define CR_OFFSET            (PWR_OFFSET + 0x00)
+#define DBP_BitNumber        0x08
+#define CR_DBP_BB     (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
+#define RTC_INIT_MASK        ((uint32_t)0xFFFFFFFF)  
+#define INITMODE_TIMEOUT     ((uint32_t) 0x00010000)
+
+static void init_RTC() 
+{
+    __IO uint32_t initcounter =  0x00 ;
+    uint32_t initstatus = 0x00;    /* Enable the PWR clock : RCC_APB1Periph_PWR  */       
+    ((uint32_t *)RCC)[0x10] |= ((uint32_t)0x10000000) ;
+    
+    /* Allow access to RTC */
+    *(__IO uint32_t *) CR_DBP_BB = ENABLE ;
+      /* RCC_LSEConfig(RCC_LSE_ON) */
+    *(__IO uint8_t *) (RCC_BASE + 0x70) =  ((uint8_t)0x00);
+    /* Reset LSEBYP bit */
+    *(__IO uint8_t *) (RCC_BASE + 0x70) =  ((uint8_t)0x00);
+    *(__IO uint8_t *) (RCC_BASE + 0x70) =  ((uint8_t)0x01);
+    /* Wait till LSE is ready */  
+        while((RCC->BDCR << 0x2) == 0x0) { }
+      /* Select the RTC clock source: RCC_RTCCLKSource_LSE */
+    ((RCC_TypeDef *)RCC)->BDCR |= (uint32_t)0x00000100;
+
+    /* Enable the RTC Clock */
+    *(__IO uint32_t *)  (PERIPH_BB_BASE + (((RCC_BASE - PERIPH_BASE)+ 0x70) * 32) + (0x0F* 4)) = (uint32_t)ENABLE;
+
+    *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE; 
+    RTC->ISR = (uint32_t) RTC_INIT_MASK;
+    do {
+      initstatus = RTC->ISR & RTC_ISR_INITF;
+      initcounter++;  
+    } while((initcounter != INITMODE_TIMEOUT) && (initstatus == 0x00));
+    
+    /* Disable the write protection for RTC registers */
+    RTC->WPR = 0xCA;
+    RTC->WPR = 0x53;
+
+    RTC->CR &= ((uint32_t)~(RTC_CR_FMT));   /* Clear RTC CR FMT Bit */
+    /* Set RTC_CR register */
+    RTC->CR |=   ((uint32_t)0x00000000) ;   /* RTC_HourFormat_24 */
+
+    /* Configure the RTC PRER */
+    RTC->PRER = 0x7f ; 
+    RTC->PRER |= (uint32_t)(0xff << 16);
+
+    /* Exit Initialization mode */
+    RTC->ISR &= (uint32_t)~RTC_ISR_INIT; 
+
+    /* Enable the write protection for RTC registers */
+    RTC->WPR = 0xFF; 
+}
+
+/*-----------------------------------------------------------------------------
+ *        initialize TIM
+ *----------------------------------------------------------------------------*/
+#define RCC_APB1Periph_TIM2              ((uint32_t)0x00000001)
+
+static void init_TIM()
+{
+      uint16_t tmpcr1 = 0;
+
+    ((uint32_t *)RCC)[0x10] |= RCC_APB1Periph_TIM2 ;
+
+    tmpcr1 = TIM2->CR1 ;
+    tmpcr1 &=   (uint16_t) (~(((uint16_t)0x0010) | ((uint16_t)0x0060) )); 
+                                     /* CR1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS) */
+    tmpcr1 |= (uint16_t)0x0000  ;    /* CR1 |= TIM_CounterMode_Up */
+    TIM2->CR1=  tmpcr1 ;
+
+    TIM2->ARR = 0xffffffff ;         /* ARR= TIM_Period */
+    TIM2->PSC = 60 ;                 /* PSC = TIM_Prescaler */
+    TIM2->EGR = ((uint16_t)0x0001) ; /* EGR = TIM_PSCReloadMode_Immediate */      
+
+    *(uint16_t *)(PERIPH_BASE+0x0) |=((uint16_t)0x0001) ; 
+                                     /* TIM_Cmd(TIM2, ENABLE) ; */
+}
+
+void init_time(void) {
+      init_RTC() ;
+    init_TIM() ;
+}
+
+static void GetTime(uint8_t *h, uint8_t *m, uint8_t *s)
+{
+    uint32_t tmpreg = 0;
+    tmpreg = (uint32_t)(RTC->TR & RTC_TR_RESERVED_MASK); 
+    *h = (uint8_t)Bcd2ToByte((uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> 16));
+    *m = (uint8_t)Bcd2ToByte((uint8_t)((tmpreg & (RTC_TR_MNT | RTC_TR_MNU)) >>8));
+    *s = (uint8_t)Bcd2ToByte((tmpreg & (RTC_TR_ST | RTC_TR_SU))); 
+}
+
+static uint32_t ByteToBcd2(uint8_t Value)
+{
+  uint8_t bcdhigh = 0;
+  while (Value >= 10)  {
+    bcdhigh++;
+    Value -= 10;
+  }
+  return  ((uint8_t)(bcdhigh << 4) | Value);
+}
+
+static void SetTime(uint8_t h, uint8_t m, uint8_t s)
+{
+     __IO uint32_t synchrocounter = 0;
+     uint32_t synchrostatus = 0x00;
+     __IO uint32_t initcounter = 0;
+     uint32_t initstatus = 0x00;
+     uint32_t tmpreg ;  
+
+     tmpreg = ((ByteToBcd2(h) << 16) | (ByteToBcd2(m) << 8) |  ByteToBcd2(s)) ;
+     /* Disable the write protection for RTC registers */
+     RTC->WPR = 0xCA;
+     RTC->WPR = 0x53;
+     RTC->ISR &= (uint32_t)~RTC_ISR_INIT; 
+
+     RTC->ISR = (uint32_t)RTC_INIT_MASK;
+
+     /* Wait till RTC is in INIT state and if Time out is reached exit */
+     do {
+         initstatus = RTC->ISR & RTC_ISR_INITF;
+         initcounter++;  
+     } while((initcounter != INITMODE_TIMEOUT) && (initstatus == 0x00));
+    
+     RTC->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK);
+    
+     RTC->ISR &= (uint32_t)RTC_RSF_MASK;
+     /* Wait the registers to be synchronised */
+     do {
+         synchrostatus = RTC->ISR & RTC_ISR_RSF;
+         synchrocounter++;  
+     } while((synchrocounter != SYNCHRO_TIMEOUT) && (synchrostatus == 0x00));
+
+     RTC->WPR = 0xFF;
+}
+
+static void GetDate(uint8_t *y, uint8_t *m, uint8_t *d)
+{
+    uint32_t tmpreg = 0;
+    tmpreg = (uint32_t)(RTC->DR & RTC_TR_RESERVED_MASK); 
+    *y = (uint8_t)Bcd2ToByte((uint8_t)((tmpreg & (RTC_DR_YT|RTC_DR_YU)) >>16));
+    *m = (uint8_t)Bcd2ToByte((uint8_t)((tmpreg & (RTC_DR_MT|RTC_DR_MU)) >> 8));
+    *d = (uint8_t)Bcd2ToByte((uint8_t)(tmpreg & (RTC_DR_DT |RTC_DR_DU)));
+}
+
+static void SetDate(uint8_t y, uint8_t m, uint8_t d)
+{
+     __IO uint32_t synchrocounter = 0;
+     uint32_t synchrostatus = 0x00;
+     __IO uint32_t initcounter = 0;
+     uint32_t initstatus = 0x00;
+     uint32_t tmpreg = 0 ;  
+    
+    tmpreg = ((ByteToBcd2(y) << 16) | (ByteToBcd2(m) << 8) |  ByteToBcd2(d)) ;
+    /* Disable the write protection for RTC registers */
+    RTC->WPR = 0xCA;
+    RTC->WPR = 0x53;
+    RTC->ISR &= (uint32_t)~RTC_ISR_INIT; 
+
+    RTC->ISR = (uint32_t)RTC_INIT_MASK;
+
+    /* Wait till RTC is in INIT state and if Time out is reached exit */
+    do {
+        initstatus = RTC->ISR & RTC_ISR_INITF;
+        initcounter++;  
+    } while((initcounter != INITMODE_TIMEOUT) && (initstatus == 0x00));
+
+    RTC->DR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK);
+
+    RTC->ISR &= (uint32_t)RTC_RSF_MASK;
+    /* Wait the registers to be synchronised */
+    do {
+        synchrostatus = RTC->ISR & RTC_ISR_RSF;
+        synchrocounter++;  
+    } while((synchrocounter != SYNCHRO_TIMEOUT) && (synchrostatus == 0x00));
+
+    RTC->WPR = 0xFF;
+}
+
+
+#include 
+void CYASSL_MSG(const char *msg) ;
+
+struct tm *Cyassl_MDK_gmtime(const time_t *c) 
+{ 
+    uint8_t h, m, s ;
+    uint8_t y, mo, d ;
+    static struct tm date ; 
+
+    GetTime(&h, &m, &s) ;
+    GetDate(&y, &mo, &d) ;
+
+    date.tm_year = y + 100 ;
+    date.tm_mon = mo - 1 ;
+    date.tm_mday = d ;
+    date.tm_hour = h ;
+    date.tm_min = m ;
+    date.tm_sec = s ;
+
+    #if defined(DEBUG_CYASSL) 
+    {
+        char msg[100] ;
+        sprintf(msg, 
+        "Debug::Cyassl_KEIL_gmtime(DATE=/%2d/%02d/%04d TIME=%02d:%02d:%02d)\n",
+                d,  mo,  y+2000, h,  m,  s) ; 
+        CYASSL_MSG(msg) ;   
+    }
+    #endif
+    
+    return(&date) ;
+}
+
+double current_time() 
+{
+      return ((double)TIM2->CNT/1000000.0) ;
+}
+
+typedef struct func_args {
+    int    argc;
+    char** argv;
+    int    return_code;
+} func_args;
+
+void time_main(void *args) 
+{
+    char * datetime ;
+    uint8_t h, m, s ;
+    uint8_t y, mo, d ;
+    
+    if( args == NULL || ((func_args *)args)->argc == 1) {
+        GetTime(&h, &m, &s) ;
+        GetDate(&y, &mo, &d) ;
+        printf("Date: %d/%d/%d, Time: %02d:%02d:%02d\n", 
+             mo, d, y+2000, h, m, s) ;              
+    } else if(((func_args *)args)->argc == 3 && 
+              ((func_args *)args)->argv[1][0] == '-' && 
+              ((func_args *)args)->argv[1][1] == 'd' ) {
+        datetime = ((func_args *)args)->argv[2];
+        sscanf(datetime, "%d/%d/%d", (int *)&mo, (int *)&d, (int *) &y) ;
+        SetDate(y-2000, mo, d) ;        
+    } else if(((func_args *)args)->argc == 3 && 
+              ((func_args *)args)->argv[1][0] == '-' && 
+              ((func_args *)args)->argv[1][1] == 't' ) {
+        datetime = ((func_args *)args)->argv[2];
+        sscanf(datetime, "%d:%d:%d",            
+            (int *)&h, (int *)&m, (int *)&s) ;
+        SetTime(h, m, s) ;
+    } else printf("Invalid argument\n") ; 
+}
+
+
+/*******************************************************************
+      time()                                                                      
+********************************************************************/
+time_t time(time_t * t) { return 0 ; }
diff --git a/IDE/MDK5-ARM/wolfSSL.CyaSSL.pdsc b/IDE/MDK5-ARM/wolfSSL.CyaSSL.pdsc
new file mode 100644
index 000000000..75e59b9e2
--- /dev/null
+++ b/IDE/MDK5-ARM/wolfSSL.CyaSSL.pdsc
@@ -0,0 +1,280 @@
+
+    
+
+  CyaSSL                                                   
+  Light weight SSL/TLS and Crypt Library for Embedded Systems  
+  wolfSSL                                                  
+  http://www.wolfSSL.com/files/ide                              
+  
+  
+    wolfSSL: SSL/TLS and Crypt Library
+    CyaSSL: SSL/TLS Library
+    wolfCrypt: Crypt Library
+  
+
+                                                                  
+                                                   
+      Oct/7/2013, Initial release of CyaSSL pack
+    
+  
+  
+                                                                   
+    CyaSSL
+    wolfSSL
+    Security
+    Crypt
+    Cipher
+    SSL
+    TLS
+  
+
+  
+   
+    
+    
+      
+      The condition is true if the package is used with a Cortex-Mx based device
+      
+      
+      
+      
+    
+    
+      CMSIS Core with Cortex-M processor
+      
+      
+    
+    
+    
+      CMSIS Core with RTOS for Cortex-M processor
+      
+      
+      
+    
+    
+      File System on Memory Card
+      
+      
+    
+    
+      Network UDP/TCP and CORE component
+      
+      
+      
+      
+      
+    
+
+    
+      
+            
+          
+    
+    
+        
+          
+      
+      
+      
+    
+  
+
+  
+    
+      wolfSSL: SSL/TLS and Crypt Library
+      Docs/CyaSSLManual-TableofContents.htm
+      
+        CyaSSL, Light weight SSL/TLS library
+        
+        
+        
+          
+          
+          
+
+          
+          
+          
+          
+          
+          
+          
+          
+          
+        
+      
+      
+        wolfCrypt Core, Light weight Crypt/Cipher Library
+        
+        
+        
+          
+          
+          
+
+          
+          
+
+          
+
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+          
+        
+      
+      
+        Dummy file for Crypt alone use
+        
+        
+        
+          
+        
+      
+      
+        Device depend Timer functions
+        
+        
+        
+          
+        
+      
+    
+  
+
+  
+    
+      CyaSSL Demo, SSL/TLS Server/Client Examples, Simple test suites, Benchmark
+      
+      
+        
+      
+      
+        
+        Middleware
+        Security
+        SSL
+        TLS
+      
+    
+    
+      wolfCrypt Simple Test Suite
+      
+      
+        
+      
+      
+        
+        Middleware
+        Security
+        Crypt
+        Cipher
+      
+    
+    
+      wolfCrypt Benchmark Suite
+      
+      
+        
+      
+      
+        
+        Middleware
+        Security
+        Crypt
+        Cipher
+      
+    
+    
+      CyaSSL Simple Client Example
+      
+      
+        
+      
+      
+        
+        Middleware
+        Security
+        Crypt
+        Cipher
+      
+    
+    
+      CyaSSL Simple Server Example
+      
+      
+        
+      
+      
+        
+        Middleware
+        Security
+        Crypt
+        Cipher
+      
+    
+    
+      CyaSSL Echo Client Example
+      
+      
+        
+      
+      
+        
+        Middleware
+        Security
+        Crypt
+        Cipher
+      
+    
+    
+      CyaSSL Echo Server Example
+      
+      
+        
+      
+      
+        
+        Middleware
+        Security
+        Crypt
+        Cipher
+      
+    
+
+

From 558735c862c763a90bc532d82330c8fcfed94ba6 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Thu, 24 Oct 2013 20:33:36 +0900
Subject: [PATCH 05/43] port.[ch] for MDK5

---
 ctaocrypt/src/port.c    | 55 +++++++++++++++++++++++++++++++++++++++++
 cyassl/ctaocrypt/port.h |  6 ++++-
 2 files changed, 60 insertions(+), 1 deletion(-)

diff --git a/ctaocrypt/src/port.c b/ctaocrypt/src/port.c
index 92328408f..ea9b78d4b 100644
--- a/ctaocrypt/src/port.c
+++ b/ctaocrypt/src/port.c
@@ -353,6 +353,60 @@ int UnLockMutex(CyaSSL_Mutex *m)
         }
         
     #elif defined(CYASSL_MDK_ARM)
+    
+        #if defined(CYASSL_CMSIS_RTOS)
+            #include "cmsis_os.h"
+            #define CMSIS_NMUTEX 10
+            osMutexDef(CyaSSL_mt0) ;  osMutexDef(CyaSSL_mt1) ;  osMutexDef(CyaSSL_mt2) ;
+            osMutexDef(CyaSSL_mt3) ;  osMutexDef(CyaSSL_mt4) ;  osMutexDef(CyaSSL_mt5) ;  
+            osMutexDef(CyaSSL_mt6) ;  osMutexDef(CyaSSL_mt7) ;  osMutexDef(CyaSSL_mt8) ;  
+            osMutexDef(CyaSSL_mt9) ;  
+            
+            static const osMutexDef_t *CMSIS_mutex[] = { osMutex(CyaSSL_mt0),   
+                osMutex(CyaSSL_mt1),    osMutex(CyaSSL_mt2),   osMutex(CyaSSL_mt3),    
+                osMutex(CyaSSL_mt4),    osMutex(CyaSSL_mt5),   osMutex(CyaSSL_mt6),
+                osMutex(CyaSSL_mt7),    osMutex(CyaSSL_mt8),    osMutex(CyaSSL_mt9) } ;                 
+            
+            static osMutexId CMSIS_mutexID[CMSIS_NMUTEX] = {0} ;
+
+            int InitMutex(CyaSSL_Mutex* m)
+            {
+                int i ;
+                for (i=0; i
+    #if defined(CYASSL_MDK5)
+         #include "cmsis_os.h"
+    #else
+        #include 
+    #endif
 #else
     #ifndef SINGLE_THREADED
         #define CYASSL_PTHREADS

From b4a03de8ee2fb19ab914202e5444cb10728a0388 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Thu, 24 Oct 2013 20:55:21 +0900
Subject: [PATCH 06/43] port.h for MDK5

---
 cyassl/ctaocrypt/port.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/cyassl/ctaocrypt/port.h b/cyassl/ctaocrypt/port.h
index 95a432304..1591d4c8b 100644
--- a/cyassl/ctaocrypt/port.h
+++ b/cyassl/ctaocrypt/port.h
@@ -95,7 +95,11 @@
     #elif defined(FREESCALE_MQX)
         typedef MUTEX_STRUCT CyaSSL_Mutex;
     #elif defined(CYASSL_MDK_ARM)
-        typedef OS_MUT CyaSSL_Mutex;
+        #if defined(CYASSL_CMSIS_RTOS)
+            typedef osMutexId CyaSSL_Mutex;
+        #else
+            typedef OS_MUT CyaSSL_Mutex;
+        #endif
     #else
         #error Need a mutex type in multithreaded mode
     #endif /* USE_WINDOWS_API */

From 33ccf62ff57c6905c90f009a38e2d0cf54709df9 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Fri, 25 Oct 2013 15:49:39 +0900
Subject: [PATCH 07/43] MDK5 support

---
 IDE/MDK5-ARM/Docs/CyaSSL-Licnese.txt          | 107 ++++++++++
 IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h          |  61 ++++++
 .../CryptBenchmark/RTE/wolfSSL/config-Crypt.h | 185 ++++++++++++++++++
 .../CryptBenchmark/RTE/wolfSSL/config.h       |  61 ++++++
 .../CryptTest/RTE/wolfSSL/config-Crypt.h      | 185 ++++++++++++++++++
 .../Projects/CryptTest/RTE/wolfSSL/config.h   |  61 ++++++
 .../CyaSSL-Full/RTE/wolfSSL/config-Crypt.h    | 185 ++++++++++++++++++
 .../CyaSSL-Full/RTE/wolfSSL/config-CyaSSL.h   | 144 ++++++++++++++
 .../Projects/CyaSSL-Full/RTE/wolfSSL/config.h |  61 ++++++
 .../EchoClient/RTE/wolfSSL/config-Crypt.h     | 185 ++++++++++++++++++
 .../EchoClient/RTE/wolfSSL/config-CyaSSL.h    | 144 ++++++++++++++
 .../Projects/EchoClient/RTE/wolfSSL/config.h  |  61 ++++++
 .../Projects/EchoClient/config-EchoClient.h   |  50 +++++
 IDE/MDK5-ARM/Projects/EchoClient/main.c       |   2 +-
 .../EchoServer/RTE/wolfSSL/config-Crypt.h     | 185 ++++++++++++++++++
 .../EchoServer/RTE/wolfSSL/config-CyaSSL.h    | 144 ++++++++++++++
 .../Projects/EchoServer/RTE/wolfSSL/config.h  |  61 ++++++
 IDE/MDK5-ARM/Projects/EchoServer/main.c       |   2 +-
 .../SimpleClient/RTE/wolfSSL/config-Crypt.h   | 185 ++++++++++++++++++
 .../SimpleClient/RTE/wolfSSL/config-CyaSSL.h  | 144 ++++++++++++++
 .../SimpleClient/RTE/wolfSSL/config.h         |  61 ++++++
 .../SimpleClient/config-SimpleClient.h        |  70 +++++++
 .../SimpleServer/RTE/wolfSSL/config-Crypt.h   | 185 ++++++++++++++++++
 .../SimpleServer/RTE/wolfSSL/config-CyaSSL.h  | 144 ++++++++++++++
 .../SimpleServer/RTE/wolfSSL/config.h         |  61 ++++++
 IDE/MDK5-ARM/wolfSSL.CyaSSL.pdsc              |  13 +-
 ctaocrypt/src/integer.c                       |  24 ++-
 src/tls.c                                     |   2 -
 28 files changed, 2762 insertions(+), 11 deletions(-)
 create mode 100644 IDE/MDK5-ARM/Docs/CyaSSL-Licnese.txt
 create mode 100644 IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h
 create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config-Crypt.h
 create mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config.h
 create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config-Crypt.h
 create mode 100644 IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config.h
 create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-Crypt.h
 create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-CyaSSL.h
 create mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config.h
 create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-Crypt.h
 create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-CyaSSL.h
 create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config.h
 create mode 100644 IDE/MDK5-ARM/Projects/EchoClient/config-EchoClient.h
 create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-Crypt.h
 create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-CyaSSL.h
 create mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config.h
 create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-Crypt.h
 create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-CyaSSL.h
 create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config.h
 create mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/config-SimpleClient.h
 create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-Crypt.h
 create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-CyaSSL.h
 create mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config.h

diff --git a/IDE/MDK5-ARM/Docs/CyaSSL-Licnese.txt b/IDE/MDK5-ARM/Docs/CyaSSL-Licnese.txt
new file mode 100644
index 000000000..6262c57c2
--- /dev/null
+++ b/IDE/MDK5-ARM/Docs/CyaSSL-Licnese.txt
@@ -0,0 +1,107 @@
+LICENSE AGREEMENT
+
+The wolfSSL source code is subject to the U.S. Export Administration Regulations and other U.S. law, and may not be exported or re-exported to certain countries (currently Afghanistan, Cuba, Iran, Iraq, Libya, North Korea, Sudan and Syria) or to persons or entities prohibited from receiving U.S. exports (including Denied Parties, entities on the Bureau of Export Administration Entity List, and Specially Designated Nationals).
+
+---
+
+GNU GENERAL PUBLIC LICENSE
+Version 2, June 1991
+
+============================================================
+
+Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed.
+
+=========================================================
+
+Preamble
+
+The licenses for most software are designed to take away your freedom to share and change it.  By contrast, the GNU General Public License is intended to guarantee your freedom to share and change free software--to make sure the software is free for all its users.  This General Public License applies to most of the Free Software Foundation's software and to any other program whose authors commit to using it.  (Some other Free Software Foundation software is covered by the GNU Library General Public License instead.)  You can apply it to
+your programs, too.
+
+When we speak of free software, we are referring to freedom, not price.  Our General Public Licenses are designed to make sure that you have the freedom to distribute copies of free software (and charge for this service if you wish), that you receive source code or can get it if you want it, that you can change the software or use pieces of it in new free programs; and that you know you can do these things. 
+
+To protect your rights, we need to make restrictions that forbid anyone to deny you these rights or to ask you to surrender the rights. These restrictions translate to certain responsibilities for you if you distribute copies of the software, or if you modify it.
+
+For example, if you distribute copies of such a program, whether gratis or for a fee, you must give the recipients all the rights that you have.  You must make sure that they, too, receive or can get the source code.  And you must show them these terms so they know their rights.
+
+We protect your rights with two steps: (1) copyright the software, and (2) offer you this license which gives you legal permission to copy, distribute and/or modify the software.
+
+Also, for each author's protection and ours, we want to make certain that everyone understands that there is no warranty for this free software.  If the software is modified by someone else and passed on, we want its recipients to know that what they have is not the original, so that any problems introduced by others will not reflect on the original authors' reputations.
+
+Finally, any free program is threatened constantly by software patents.  We wish to avoid the danger that redistributors of a free program will individually obtain patent licenses, in effect making the program proprietary.  To prevent this, we have made it clear that any patent must be licensed for everyone's free use or not licensed at all.
+
+The precise terms and conditions for copying, distribution and modification follow.
+
+GNU GENERAL PUBLIC LICENSE
+
+TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License applies to any program or other work which contains a notice placed by the copyright holder saying it may be distributed under the terms of this General Public License.  The "Program", below, refers to any such program or work, and a "work based on the Program" means either the Program or any derivative work under copyright law: that is to say, a work containing the Program or a portion of it, either verbatim or with modifications and/or translated into another language.  (Hereinafter, translation is included without limitation in the term "modification".)  Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not covered by this License; they are outside its scope.  The act of running the Program is not restricted, and the output from the Program is covered only if its contents constitute a work based on the Program (independent of having been made by running the Program). 
+
+Whether that is true depends on what the Program does.
+
+  1. You may copy and distribute verbatim copies of the Program's source code as you receive it, in any medium, provided that you conspicuously and appropriately publish on each copy an appropriate copyright notice and disclaimer of warranty; keep intact all the notices that refer to this License and to the absence of any warranty; and give any other recipients of the Program a copy of this License along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and you may at your option offer warranty protection in exchange for a fee.
+
+  2. You may modify your copy or copies of the Program or any portion of it, thus forming a work based on the Program, and copy and distribute such modifications or work under the terms of Section 1 above, provided that you also meet all of these conditions:
+
+    a) You must cause the modified files to carry prominent notices stating that you changed the files and the date of any change.
+
+    b) You must cause any work that you distribute or publish, that in whole or in part contains or is derived from the Program or any part thereof, to be licensed as a whole at no charge to all third parties under the terms of this License.
+
+    c) If the modified program normally reads commands interactively when run, you must cause it, when started running for such interactive use in the most ordinary way, to print or display an announcement including an appropriate copyright notice and a notice that there is no warranty (or else, saying that you provide a warranty) and that users may redistribute the program under these conditions, and telling the user how to view a copy of this License.  (Exception: if the Program itself is interactive but does not normally print such an announcement, your work based on the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole.  If identifiable sections of that work are not derived from the Program, and can be reasonably considered independent and separate works in themselves, then this License, and its terms, do not apply to those sections when you distribute them as separate works.  But when you distribute the same sections as part of a whole which is a work based on the Program, the distribution of the whole must be on the terms of this License, whose permissions for other licensees extend to the entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest your rights to work written entirely by you; rather, the intent is to exercise the right to control the distribution of derivative or collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program with the Program (or with a work based on the Program) on a volume of a storage or distribution medium does not bring the other work under the scope of this License.
+
+  3. You may copy and distribute the Program (or a work based on it, under Section 2) in object code or executable form under the terms of Sections 1 and 2 above provided that you also do one of the following:
+
+    a) Accompany it with the complete corresponding machine-readable source code, which must be distributed under the terms of Sections 1 and 2 above on a medium customarily used for software interchange; or,
+
+    b) Accompany it with a written offer, valid for at least three years, to give any third party, for a charge no more than your cost of physically performing source distribution, a complete machine-readable copy of the corresponding source code, to be distributed under the terms of Sections 1 and 2 above on a medium customarily used for software interchange; or,
+
+    c) Accompany it with the information you received as to the offer to distribute corresponding source code.  (This alternative is allowed only for noncommercial distribution and only if you received the program in object code or executable form with such an offer, in accord with Subsection b above.)
+
+The source code for a work means the preferred form of the work for making modifications to it.  For an executable work, complete source code means all the source code for all modules it contains, plus any associated interface definition files, plus the scripts used to control compilation and installation of the executable.  However, as a special exception, the source code distributed need not include anything that is normally distributed (in either source or binary form) with the major components (compiler, kernel, and so on) of the operating system on which the executable runs, unless that component itself accompanies the executable.
+
+If distribution of executable or object code is made by offering access to copy from a designated place, then offering equivalent access to copy the source code from the same place counts as distribution of the source code, even though third parties are not compelled to copy the source along with the object code.
+
+  4. You may not copy, modify, sublicense, or distribute the Program except as expressly provided under this License.  Any attempt otherwise to copy, modify, sublicense or distribute the Program is void, and will automatically terminate your rights under this License. However, parties who have received copies, or rights, from you under this License will not have their licenses terminated so long as such parties remain in full compliance.
+
+  5. You are not required to accept this License, since you have not signed it.  However, nothing else grants you permission to modify or distribute the Program or its derivative works.  These actions are prohibited by law if you do not accept this License.  Therefore, by modifying or distributing the Program (or any work based on the Program), you indicate your acceptance of this License to do so, and all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+  6. Each time you redistribute the Program (or any work based on the Program), the recipient automatically receives a license from the original licensor to copy, distribute or modify the Program subject to these terms and conditions.  You may not impose any further restrictions on the recipients' exercise of the rights granted herein. You are not responsible for enforcing compliance by third parties to this License.
+
+  7. If, as a consequence of a court judgment or allegation of patent infringement or for any other reason (not limited to patent issues), conditions are imposed on you (whether by court order, agreement or otherwise) that contradict the conditions of this License, they do not excuse you from the conditions of this License.  If you cannot distribute so as to satisfy simultaneously your obligations under this License and any other pertinent obligations, then as a consequence you may not distribute the Program at all.  For example, if a patent license would not permit royalty-free redistribution of the Program by all those who receive copies directly or indirectly through you, then the only way you could satisfy both it and this License would be to refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under any particular circumstance, the balance of the section is intended to apply and the section as a whole is intended to apply in other circumstances.
+
+It is not the purpose of this section to induce you to infringe any patents or other property right claims or to contest validity of any such claims; this section has the sole purpose of protecting the integrity of the free software distribution system, which is implemented by public license practices.  Many people have made generous contributions to the wide range of software distributed through that system in reliance on consistent application of that system; it is up to the author/donor to decide if he or she is willing to distribute software through any other system and a licensee cannot impose that choice.
+
+This section is intended to make thoroughly clear what is believed to be a consequence of the rest of this License.
+
+  8. If the distribution and/or use of the Program is restricted in certain countries either by patents or by copyrighted interfaces, the original copyright holder who places the Program under this License may add an explicit geographical distribution limitation excluding those countries, so that distribution is permitted only in or among countries not thus excluded.  In such case, this License incorporates the limitation as if written in the body of this License.
+
+  9. The Free Software Foundation may publish revised and/or new versions of the General Public License from time to time.  Such new versions will be similar in spirit to the present version, but may differ in detail to address new problems or concerns.
+
+Each version is given a distinguishing version number.  If the Program specifies a version number of this License which applies to it and "any later version", you have the option of following the terms and conditions either of that version or of any later version published by the Free Software Foundation.  If the Program does not specify a version number of this License, you may choose any version ever published by the Free Software Foundation.
+
+  10. If you wish to incorporate parts of the Program into other free programs whose distribution conditions are different, write to the author to ask for permission.  For software which is copyrighted by the Free Software Foundation, write to the Free Software Foundation; we sometimes make exceptions for this.  Our decision will be guided by the two goals of preserving the free status of all derivatives of our free software and of promoting the sharing and reuse of software generally.
+
+NO WARRANTY
+
+  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
+
+  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+
+END OF TERMS AND CONDITIONS
\ No newline at end of file
diff --git a/IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h
new file mode 100644
index 000000000..4c8fcb01c
--- /dev/null
+++ b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h
@@ -0,0 +1,61 @@
+/* config.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define CYASSL_MDK5
+
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define BENCH_EMBEDDED
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+#define NO_MAIN_DRIVER
+
+#if  defined(MDK_CONF_CYASSL)
+#define CYASSL_MDK_SHELL
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_Benchmark)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+#elif  defined(MDK_CONF_CryptTest)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+
+#endif
+
+
diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config-Crypt.h b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config-Crypt.h
new file mode 100644
index 000000000..a11c3ef24
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config-Crypt.h
@@ -0,0 +1,185 @@
+/* config-FS.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+//  wolfCrypt Configuration
+
+//  Cert/Key Strage
+//        Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes)
+#define MDK_CONF_CERT_BUFF 0
+#if MDK_CONF_CERT_BUFF== 1
+#define USE_CERT_BUFFERS_1024
+#elif MDK_CONF_CERT_BUFF == 2
+#define USE_CERT_BUFFERS_2048
+#endif
+//
+
+//  Crypt Algrithm
+
+//       MD5, SHA, SHA-256, AES, RC4, ASN, RSA
+//        
+
+//      MD2
+#define MDK_CONF_MD2 0
+#if MDK_CONF_MD2 == 1
+#define CYASSL_MD2
+#endif
+//  
+//      MD4
+#define MDK_CONF_MD4 1
+#if MDK_CONF_MD4 == 0
+#define NO_MD4
+#endif
+//  
+//      SHA-384
+//          This has to be with SHA512
+#define MDK_CONF_SHA384 0
+#if MDK_CONF_SHA384 == 1
+#define CYASSL_SHA384
+#endif
+//  
+//      SHA-512          
+#define MDK_CONF_SHA512     0
+#if MDK_CONF_SHA512     == 1
+#define CYASSL_SHA512   
+#endif
+//  
+//      RIPEMD
+#define MDK_CONF_RIPEMD 0
+#if MDK_CONF_RIPEMD == 1
+#define CYASSL_RIPEMD
+#endif
+//  
+//      HMAC
+#define MDK_CONF_HMAC 1
+#if MDK_CONF_HMAC == 0
+#define NO_HMAC
+#endif
+//  
+//      HC128
+#define MDK_CONF_HC128 0
+#if MDK_CONF_HC128 == 1
+#define HAVE_HC128
+#endif
+//  
+//  RABBIT
+#define MDK_CONF_RABBIT 1
+#if MDK_CONF_RABBI == 0
+#define NO_RABBIT
+#endif
+//  
+
+//      AEAD     
+#define MDK_CONF_AEAD 0
+#if MDK_CONF_AEAD == 1
+#define HAVE_AEAD
+#endif
+//  
+//      DES3
+#define MDK_CONF_DES3 1
+#if MDK_CONF_DES3 == 0
+#define NO_DES3
+#endif
+//  
+//      CAMELLIA
+#define MDK_CONF_CAMELLIA 0
+#if MDK_CONF_CAMELLIA == 1
+#define HAVE_CAMELLIA
+#endif
+//  
+
+//      DH
+//              need this for CYASSL_SERVER, OPENSSL_EXTRA
+#define MDK_CONF_DH 1
+#if MDK_CONF_DH == 0
+#define NO_DH
+#endif
+//  
+//      DSA
+#define MDK_CONF_DSA 1 
+#if MDK_CONF_DSA == 0
+#define NO_DSA
+#endif
+//  
+//      PWDBASED
+#define MDK_CONF_PWDBASED 1
+#if MDK_CONF_PWDBASED == 0
+#define NO_PWDBASED
+#endif
+//  
+
+//      ECC
+#define MDK_CONF_ECC 0
+#if MDK_CONF_ECC == 1
+#define HAVE_ECC
+#endif
+//  
+//      PSK
+#define MDK_CONF_PSK 1
+#if MDK_CONF_PSK == 0
+#define NO_PSK
+#endif
+//  
+//      AESCCM (Turn off Hardware Crypt)
+#define MDK_CONF_AESCCM 0
+#if MDK_CONF_AESCCM == 1
+#define HAVE_AESCCM
+#endif
+//  
+//      AESGCM (Turn off Hardware Crypt)
+#define MDK_CONF_AESGCM 0
+#if MDK_CONF_AESGCM == 1
+#define HAVE_AESGCM
+#define BUILD_AESGCM
+#endif
+//  
+//      NTRU (need License, "crypto_ntru.h")
+#define MDK_CONF_NTRU 0
+#if MDK_CONF_NTRU == 1
+#define HAVE_NTRU
+#endif
+//  
+//  
+
+//  Hardware Crypt (See document for usage)
+//      Hardware RNG
+#define MDK_CONF_STM32F2_RNG 0
+#if MDK_CONF_STM32F2_RNG == 1
+#define STM32F2_RNG
+#else
+
+#endif
+//  
+//      Hardware Crypt
+#define MDK_CONF_STM32F2_CRYPTO 0
+#if MDK_CONF_STM32F2_CRYPTO == 1
+#define STM32F2_CRYPTO
+#endif
+//  
+
+// 
+
+
+
+//
+// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config.h
new file mode 100644
index 000000000..4c8fcb01c
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config.h
@@ -0,0 +1,61 @@
+/* config.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define CYASSL_MDK5
+
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define BENCH_EMBEDDED
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+#define NO_MAIN_DRIVER
+
+#if  defined(MDK_CONF_CYASSL)
+#define CYASSL_MDK_SHELL
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_Benchmark)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+#elif  defined(MDK_CONF_CryptTest)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+
+#endif
+
+
diff --git a/IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config-Crypt.h b/IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config-Crypt.h
new file mode 100644
index 000000000..a11c3ef24
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config-Crypt.h
@@ -0,0 +1,185 @@
+/* config-FS.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+//  wolfCrypt Configuration
+
+//  Cert/Key Strage
+//        Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes)
+#define MDK_CONF_CERT_BUFF 0
+#if MDK_CONF_CERT_BUFF== 1
+#define USE_CERT_BUFFERS_1024
+#elif MDK_CONF_CERT_BUFF == 2
+#define USE_CERT_BUFFERS_2048
+#endif
+//
+
+//  Crypt Algrithm
+
+//       MD5, SHA, SHA-256, AES, RC4, ASN, RSA
+//        
+
+//      MD2
+#define MDK_CONF_MD2 0
+#if MDK_CONF_MD2 == 1
+#define CYASSL_MD2
+#endif
+//  
+//      MD4
+#define MDK_CONF_MD4 1
+#if MDK_CONF_MD4 == 0
+#define NO_MD4
+#endif
+//  
+//      SHA-384
+//          This has to be with SHA512
+#define MDK_CONF_SHA384 0
+#if MDK_CONF_SHA384 == 1
+#define CYASSL_SHA384
+#endif
+//  
+//      SHA-512          
+#define MDK_CONF_SHA512     0
+#if MDK_CONF_SHA512     == 1
+#define CYASSL_SHA512   
+#endif
+//  
+//      RIPEMD
+#define MDK_CONF_RIPEMD 0
+#if MDK_CONF_RIPEMD == 1
+#define CYASSL_RIPEMD
+#endif
+//  
+//      HMAC
+#define MDK_CONF_HMAC 1
+#if MDK_CONF_HMAC == 0
+#define NO_HMAC
+#endif
+//  
+//      HC128
+#define MDK_CONF_HC128 0
+#if MDK_CONF_HC128 == 1
+#define HAVE_HC128
+#endif
+//  
+//  RABBIT
+#define MDK_CONF_RABBIT 1
+#if MDK_CONF_RABBI == 0
+#define NO_RABBIT
+#endif
+//  
+
+//      AEAD     
+#define MDK_CONF_AEAD 0
+#if MDK_CONF_AEAD == 1
+#define HAVE_AEAD
+#endif
+//  
+//      DES3
+#define MDK_CONF_DES3 1
+#if MDK_CONF_DES3 == 0
+#define NO_DES3
+#endif
+//  
+//      CAMELLIA
+#define MDK_CONF_CAMELLIA 0
+#if MDK_CONF_CAMELLIA == 1
+#define HAVE_CAMELLIA
+#endif
+//  
+
+//      DH
+//              need this for CYASSL_SERVER, OPENSSL_EXTRA
+#define MDK_CONF_DH 1
+#if MDK_CONF_DH == 0
+#define NO_DH
+#endif
+//  
+//      DSA
+#define MDK_CONF_DSA 1 
+#if MDK_CONF_DSA == 0
+#define NO_DSA
+#endif
+//  
+//      PWDBASED
+#define MDK_CONF_PWDBASED 1
+#if MDK_CONF_PWDBASED == 0
+#define NO_PWDBASED
+#endif
+//  
+
+//      ECC
+#define MDK_CONF_ECC 0
+#if MDK_CONF_ECC == 1
+#define HAVE_ECC
+#endif
+//  
+//      PSK
+#define MDK_CONF_PSK 1
+#if MDK_CONF_PSK == 0
+#define NO_PSK
+#endif
+//  
+//      AESCCM (Turn off Hardware Crypt)
+#define MDK_CONF_AESCCM 0
+#if MDK_CONF_AESCCM == 1
+#define HAVE_AESCCM
+#endif
+//  
+//      AESGCM (Turn off Hardware Crypt)
+#define MDK_CONF_AESGCM 0
+#if MDK_CONF_AESGCM == 1
+#define HAVE_AESGCM
+#define BUILD_AESGCM
+#endif
+//  
+//      NTRU (need License, "crypto_ntru.h")
+#define MDK_CONF_NTRU 0
+#if MDK_CONF_NTRU == 1
+#define HAVE_NTRU
+#endif
+//  
+//  
+
+//  Hardware Crypt (See document for usage)
+//      Hardware RNG
+#define MDK_CONF_STM32F2_RNG 0
+#if MDK_CONF_STM32F2_RNG == 1
+#define STM32F2_RNG
+#else
+
+#endif
+//  
+//      Hardware Crypt
+#define MDK_CONF_STM32F2_CRYPTO 0
+#if MDK_CONF_STM32F2_CRYPTO == 1
+#define STM32F2_CRYPTO
+#endif
+//  
+
+// 
+
+
+
+//
+// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config.h
new file mode 100644
index 000000000..4c8fcb01c
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config.h
@@ -0,0 +1,61 @@
+/* config.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define CYASSL_MDK5
+
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define BENCH_EMBEDDED
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+#define NO_MAIN_DRIVER
+
+#if  defined(MDK_CONF_CYASSL)
+#define CYASSL_MDK_SHELL
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_Benchmark)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+#elif  defined(MDK_CONF_CryptTest)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+
+#endif
+
+
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-Crypt.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-Crypt.h
new file mode 100644
index 000000000..a11c3ef24
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-Crypt.h
@@ -0,0 +1,185 @@
+/* config-FS.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+//  wolfCrypt Configuration
+
+//  Cert/Key Strage
+//        Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes)
+#define MDK_CONF_CERT_BUFF 0
+#if MDK_CONF_CERT_BUFF== 1
+#define USE_CERT_BUFFERS_1024
+#elif MDK_CONF_CERT_BUFF == 2
+#define USE_CERT_BUFFERS_2048
+#endif
+//
+
+//  Crypt Algrithm
+
+//       MD5, SHA, SHA-256, AES, RC4, ASN, RSA
+//        
+
+//      MD2
+#define MDK_CONF_MD2 0
+#if MDK_CONF_MD2 == 1
+#define CYASSL_MD2
+#endif
+//  
+//      MD4
+#define MDK_CONF_MD4 1
+#if MDK_CONF_MD4 == 0
+#define NO_MD4
+#endif
+//  
+//      SHA-384
+//          This has to be with SHA512
+#define MDK_CONF_SHA384 0
+#if MDK_CONF_SHA384 == 1
+#define CYASSL_SHA384
+#endif
+//  
+//      SHA-512          
+#define MDK_CONF_SHA512     0
+#if MDK_CONF_SHA512     == 1
+#define CYASSL_SHA512   
+#endif
+//  
+//      RIPEMD
+#define MDK_CONF_RIPEMD 0
+#if MDK_CONF_RIPEMD == 1
+#define CYASSL_RIPEMD
+#endif
+//  
+//      HMAC
+#define MDK_CONF_HMAC 1
+#if MDK_CONF_HMAC == 0
+#define NO_HMAC
+#endif
+//  
+//      HC128
+#define MDK_CONF_HC128 0
+#if MDK_CONF_HC128 == 1
+#define HAVE_HC128
+#endif
+//  
+//  RABBIT
+#define MDK_CONF_RABBIT 1
+#if MDK_CONF_RABBI == 0
+#define NO_RABBIT
+#endif
+//  
+
+//      AEAD     
+#define MDK_CONF_AEAD 0
+#if MDK_CONF_AEAD == 1
+#define HAVE_AEAD
+#endif
+//  
+//      DES3
+#define MDK_CONF_DES3 1
+#if MDK_CONF_DES3 == 0
+#define NO_DES3
+#endif
+//  
+//      CAMELLIA
+#define MDK_CONF_CAMELLIA 0
+#if MDK_CONF_CAMELLIA == 1
+#define HAVE_CAMELLIA
+#endif
+//  
+
+//      DH
+//              need this for CYASSL_SERVER, OPENSSL_EXTRA
+#define MDK_CONF_DH 1
+#if MDK_CONF_DH == 0
+#define NO_DH
+#endif
+//  
+//      DSA
+#define MDK_CONF_DSA 1 
+#if MDK_CONF_DSA == 0
+#define NO_DSA
+#endif
+//  
+//      PWDBASED
+#define MDK_CONF_PWDBASED 1
+#if MDK_CONF_PWDBASED == 0
+#define NO_PWDBASED
+#endif
+//  
+
+//      ECC
+#define MDK_CONF_ECC 0
+#if MDK_CONF_ECC == 1
+#define HAVE_ECC
+#endif
+//  
+//      PSK
+#define MDK_CONF_PSK 1
+#if MDK_CONF_PSK == 0
+#define NO_PSK
+#endif
+//  
+//      AESCCM (Turn off Hardware Crypt)
+#define MDK_CONF_AESCCM 0
+#if MDK_CONF_AESCCM == 1
+#define HAVE_AESCCM
+#endif
+//  
+//      AESGCM (Turn off Hardware Crypt)
+#define MDK_CONF_AESGCM 0
+#if MDK_CONF_AESGCM == 1
+#define HAVE_AESGCM
+#define BUILD_AESGCM
+#endif
+//  
+//      NTRU (need License, "crypto_ntru.h")
+#define MDK_CONF_NTRU 0
+#if MDK_CONF_NTRU == 1
+#define HAVE_NTRU
+#endif
+//  
+//  
+
+//  Hardware Crypt (See document for usage)
+//      Hardware RNG
+#define MDK_CONF_STM32F2_RNG 0
+#if MDK_CONF_STM32F2_RNG == 1
+#define STM32F2_RNG
+#else
+
+#endif
+//  
+//      Hardware Crypt
+#define MDK_CONF_STM32F2_CRYPTO 0
+#if MDK_CONF_STM32F2_CRYPTO == 1
+#define STM32F2_CRYPTO
+#endif
+//  
+
+// 
+
+
+
+//
+// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-CyaSSL.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-CyaSSL.h
new file mode 100644
index 000000000..02ba94bd4
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-CyaSSL.h
@@ -0,0 +1,144 @@
+/* config-RTX-TCP-FS.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+/**** CyaSSL for KEIL-RL Configuration ****/
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define NO_MAIN_DRIVER
+
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+
+#define HAVE_KEIL_RTX
+#define CYASSL_CMSIS_RTOS
+#define CYASSL_KEIL_TCP_NET
+
+
+// <<< Use Configuration Wizard in Context Menu >>>
+//  CyaSSL Configuration
+
+//     SSL (Included by default)
+//     
+
+//      TLS 
+#define MDK_CONF_TLS 1
+#if MDK_CONF_TLS == 0
+#define NO_TLS
+#endif
+//  
+
+//      CRL
+#define MDK_CONF_DER_LOAD 0
+#if MDK_CONF_DER_LOAD == 1
+#define CYASSL_DER_LOAD
+#endif
+//  
+//      OpenSSL Extra
+#define MDK_CONF_OPENSSL_EXTRA 1
+#if MDK_CONF_OPENSSL_EXTRA == 1
+#define OPENSSL_EXTRA
+#endif
+//  
+//
+
+//  Cert/Key Generation
+//      CertGen
+#define MDK_CONF_CERT_GEN 0
+#if MDK_CONF_CERT_GEN == 1
+#define CYASSL_CERT_GEN
+#endif
+//  
+//      KeyGen
+#define MDK_CONF_KEY_GEN 0
+#if MDK_CONF_KEY_GEN == 1
+#define CYASSL_KEY_GEN
+#endif
+//  
+//
+
+//  Others
+
+//      Inline
+#define MDK_CONF_INLINE 0
+#if MDK_CONF_INLINE == 0
+#define NO_INLINE
+#endif
+//  
+//      Debug
+//              Debug Message
+#define MDK_CONF_DebugMessage 0
+#if MDK_CONF_DebugMessage == 1
+#define DEBUG_CYASSL
+#endif
+//         
+//              Check malloc
+#define MDK_CONF_CheckMalloc 1
+#if MDK_CONF_CheckMalloc == 1
+#define CYASSL_MALLOC_CHECK
+#endif
+//         
+
+
+//  
+//      ErrNo.h
+#define MDK_CONF_ErrNo 0
+#if MDK_CONF_ErrNo == 1
+#define HAVE_ERRNO
+#endif
+//  
+//      Error Strings
+#define MDK_CONF_ErrorStrings 1
+#if MDK_CONF_ErrorStrings == 0
+#define NO_ERROR_STRINGS
+#endif
+//  
+//      zlib (need "zlib.h")
+#define MDK_CONF_LIBZ 0
+#if MDK_CONF_LIBZ == 1
+#define HAVE_LIBZ
+#endif
+//  
+//      CAVIUM (need CAVIUM headers)
+#define MDK_CONF_CAVIUM 0
+#if MDK_CONF_CAVIUM == 1
+#define HAVE_CAVIUM
+#endif
+//  
+//      Small Stack
+#define MDK_CONF_SmallStack 1
+#if MDK_CONF_SmallStack == 0
+#define NO_CYASSL_SMALL_STACK
+#endif
+//  
+//      Use Fast Math
+#define MDK_CONF_FASTMATH 0
+#if MDK_CONF_FASTMATH == 1
+#define USE_FAST_MATH
+#endif
+//  
+//  
+
+// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config.h
new file mode 100644
index 000000000..4c8fcb01c
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config.h
@@ -0,0 +1,61 @@
+/* config.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define CYASSL_MDK5
+
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define BENCH_EMBEDDED
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+#define NO_MAIN_DRIVER
+
+#if  defined(MDK_CONF_CYASSL)
+#define CYASSL_MDK_SHELL
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_Benchmark)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+#elif  defined(MDK_CONF_CryptTest)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+
+#endif
+
+
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-Crypt.h b/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-Crypt.h
new file mode 100644
index 000000000..a11c3ef24
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-Crypt.h
@@ -0,0 +1,185 @@
+/* config-FS.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+//  wolfCrypt Configuration
+
+//  Cert/Key Strage
+//        Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes)
+#define MDK_CONF_CERT_BUFF 0
+#if MDK_CONF_CERT_BUFF== 1
+#define USE_CERT_BUFFERS_1024
+#elif MDK_CONF_CERT_BUFF == 2
+#define USE_CERT_BUFFERS_2048
+#endif
+//
+
+//  Crypt Algrithm
+
+//       MD5, SHA, SHA-256, AES, RC4, ASN, RSA
+//        
+
+//      MD2
+#define MDK_CONF_MD2 0
+#if MDK_CONF_MD2 == 1
+#define CYASSL_MD2
+#endif
+//  
+//      MD4
+#define MDK_CONF_MD4 1
+#if MDK_CONF_MD4 == 0
+#define NO_MD4
+#endif
+//  
+//      SHA-384
+//          This has to be with SHA512
+#define MDK_CONF_SHA384 0
+#if MDK_CONF_SHA384 == 1
+#define CYASSL_SHA384
+#endif
+//  
+//      SHA-512          
+#define MDK_CONF_SHA512     0
+#if MDK_CONF_SHA512     == 1
+#define CYASSL_SHA512   
+#endif
+//  
+//      RIPEMD
+#define MDK_CONF_RIPEMD 0
+#if MDK_CONF_RIPEMD == 1
+#define CYASSL_RIPEMD
+#endif
+//  
+//      HMAC
+#define MDK_CONF_HMAC 1
+#if MDK_CONF_HMAC == 0
+#define NO_HMAC
+#endif
+//  
+//      HC128
+#define MDK_CONF_HC128 0
+#if MDK_CONF_HC128 == 1
+#define HAVE_HC128
+#endif
+//  
+//  RABBIT
+#define MDK_CONF_RABBIT 1
+#if MDK_CONF_RABBI == 0
+#define NO_RABBIT
+#endif
+//  
+
+//      AEAD     
+#define MDK_CONF_AEAD 0
+#if MDK_CONF_AEAD == 1
+#define HAVE_AEAD
+#endif
+//  
+//      DES3
+#define MDK_CONF_DES3 1
+#if MDK_CONF_DES3 == 0
+#define NO_DES3
+#endif
+//  
+//      CAMELLIA
+#define MDK_CONF_CAMELLIA 0
+#if MDK_CONF_CAMELLIA == 1
+#define HAVE_CAMELLIA
+#endif
+//  
+
+//      DH
+//              need this for CYASSL_SERVER, OPENSSL_EXTRA
+#define MDK_CONF_DH 1
+#if MDK_CONF_DH == 0
+#define NO_DH
+#endif
+//  
+//      DSA
+#define MDK_CONF_DSA 1 
+#if MDK_CONF_DSA == 0
+#define NO_DSA
+#endif
+//  
+//      PWDBASED
+#define MDK_CONF_PWDBASED 1
+#if MDK_CONF_PWDBASED == 0
+#define NO_PWDBASED
+#endif
+//  
+
+//      ECC
+#define MDK_CONF_ECC 0
+#if MDK_CONF_ECC == 1
+#define HAVE_ECC
+#endif
+//  
+//      PSK
+#define MDK_CONF_PSK 1
+#if MDK_CONF_PSK == 0
+#define NO_PSK
+#endif
+//  
+//      AESCCM (Turn off Hardware Crypt)
+#define MDK_CONF_AESCCM 0
+#if MDK_CONF_AESCCM == 1
+#define HAVE_AESCCM
+#endif
+//  
+//      AESGCM (Turn off Hardware Crypt)
+#define MDK_CONF_AESGCM 0
+#if MDK_CONF_AESGCM == 1
+#define HAVE_AESGCM
+#define BUILD_AESGCM
+#endif
+//  
+//      NTRU (need License, "crypto_ntru.h")
+#define MDK_CONF_NTRU 0
+#if MDK_CONF_NTRU == 1
+#define HAVE_NTRU
+#endif
+//  
+//  
+
+//  Hardware Crypt (See document for usage)
+//      Hardware RNG
+#define MDK_CONF_STM32F2_RNG 0
+#if MDK_CONF_STM32F2_RNG == 1
+#define STM32F2_RNG
+#else
+
+#endif
+//  
+//      Hardware Crypt
+#define MDK_CONF_STM32F2_CRYPTO 0
+#if MDK_CONF_STM32F2_CRYPTO == 1
+#define STM32F2_CRYPTO
+#endif
+//  
+
+// 
+
+
+
+//
+// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-CyaSSL.h b/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-CyaSSL.h
new file mode 100644
index 000000000..02ba94bd4
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-CyaSSL.h
@@ -0,0 +1,144 @@
+/* config-RTX-TCP-FS.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+/**** CyaSSL for KEIL-RL Configuration ****/
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define NO_MAIN_DRIVER
+
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+
+#define HAVE_KEIL_RTX
+#define CYASSL_CMSIS_RTOS
+#define CYASSL_KEIL_TCP_NET
+
+
+// <<< Use Configuration Wizard in Context Menu >>>
+//  CyaSSL Configuration
+
+//     SSL (Included by default)
+//     
+
+//      TLS 
+#define MDK_CONF_TLS 1
+#if MDK_CONF_TLS == 0
+#define NO_TLS
+#endif
+//  
+
+//      CRL
+#define MDK_CONF_DER_LOAD 0
+#if MDK_CONF_DER_LOAD == 1
+#define CYASSL_DER_LOAD
+#endif
+//  
+//      OpenSSL Extra
+#define MDK_CONF_OPENSSL_EXTRA 1
+#if MDK_CONF_OPENSSL_EXTRA == 1
+#define OPENSSL_EXTRA
+#endif
+//  
+//
+
+//  Cert/Key Generation
+//      CertGen
+#define MDK_CONF_CERT_GEN 0
+#if MDK_CONF_CERT_GEN == 1
+#define CYASSL_CERT_GEN
+#endif
+//  
+//      KeyGen
+#define MDK_CONF_KEY_GEN 0
+#if MDK_CONF_KEY_GEN == 1
+#define CYASSL_KEY_GEN
+#endif
+//  
+//
+
+//  Others
+
+//      Inline
+#define MDK_CONF_INLINE 0
+#if MDK_CONF_INLINE == 0
+#define NO_INLINE
+#endif
+//  
+//      Debug
+//              Debug Message
+#define MDK_CONF_DebugMessage 0
+#if MDK_CONF_DebugMessage == 1
+#define DEBUG_CYASSL
+#endif
+//         
+//              Check malloc
+#define MDK_CONF_CheckMalloc 1
+#if MDK_CONF_CheckMalloc == 1
+#define CYASSL_MALLOC_CHECK
+#endif
+//         
+
+
+//  
+//      ErrNo.h
+#define MDK_CONF_ErrNo 0
+#if MDK_CONF_ErrNo == 1
+#define HAVE_ERRNO
+#endif
+//  
+//      Error Strings
+#define MDK_CONF_ErrorStrings 1
+#if MDK_CONF_ErrorStrings == 0
+#define NO_ERROR_STRINGS
+#endif
+//  
+//      zlib (need "zlib.h")
+#define MDK_CONF_LIBZ 0
+#if MDK_CONF_LIBZ == 1
+#define HAVE_LIBZ
+#endif
+//  
+//      CAVIUM (need CAVIUM headers)
+#define MDK_CONF_CAVIUM 0
+#if MDK_CONF_CAVIUM == 1
+#define HAVE_CAVIUM
+#endif
+//  
+//      Small Stack
+#define MDK_CONF_SmallStack 1
+#if MDK_CONF_SmallStack == 0
+#define NO_CYASSL_SMALL_STACK
+#endif
+//  
+//      Use Fast Math
+#define MDK_CONF_FASTMATH 0
+#if MDK_CONF_FASTMATH == 1
+#define USE_FAST_MATH
+#endif
+//  
+//  
+
+// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config.h
new file mode 100644
index 000000000..4c8fcb01c
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config.h
@@ -0,0 +1,61 @@
+/* config.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define CYASSL_MDK5
+
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define BENCH_EMBEDDED
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+#define NO_MAIN_DRIVER
+
+#if  defined(MDK_CONF_CYASSL)
+#define CYASSL_MDK_SHELL
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_Benchmark)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+#elif  defined(MDK_CONF_CryptTest)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+
+#endif
+
+
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/config-EchoClient.h b/IDE/MDK5-ARM/Projects/EchoClient/config-EchoClient.h
new file mode 100644
index 000000000..b5520ecbe
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoClient/config-EchoClient.h
@@ -0,0 +1,50 @@
+/* config-RTX-TCP-FS.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+/**** CyaSSL for KEIL-RL Configuration ****/
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define NO_MAIN_DRIVER
+
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+
+#define HAVE_KEIL_RTX
+#define CYASSL_CMSIS_RTOS
+#define CYASSL_KEIL_TCP_NET
+
+
+// <<< Use Configuration Wizard in Context Menu >>>
+//  Build Target: Simple Client
+//   Callee IP Address
+//    Default: "192.168.1.100"
+#define CYASSL_CALLEE_IP           "192.168.2.101"
+//   Callee Port Number
+//    Default: "11111"
+#define CYASSL_CALLEE_PORT           11111
+
+//     
+// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/main.c b/IDE/MDK5-ARM/Projects/EchoClient/main.c
index 9fe4eec3e..6df113137 100644
--- a/IDE/MDK5-ARM/Projects/EchoClient/main.c
+++ b/IDE/MDK5-ARM/Projects/EchoClient/main.c
@@ -85,7 +85,7 @@ char* myoptarg = NULL;
 
 int main() 
 {
-    void *arg = NULL ;
+    void *args = NULL ;
     init_time() ;
     init_filesystem ();
     net_initialize() ;
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-Crypt.h b/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-Crypt.h
new file mode 100644
index 000000000..a11c3ef24
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-Crypt.h
@@ -0,0 +1,185 @@
+/* config-FS.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+//  wolfCrypt Configuration
+
+//  Cert/Key Strage
+//        Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes)
+#define MDK_CONF_CERT_BUFF 0
+#if MDK_CONF_CERT_BUFF== 1
+#define USE_CERT_BUFFERS_1024
+#elif MDK_CONF_CERT_BUFF == 2
+#define USE_CERT_BUFFERS_2048
+#endif
+//
+
+//  Crypt Algrithm
+
+//       MD5, SHA, SHA-256, AES, RC4, ASN, RSA
+//        
+
+//      MD2
+#define MDK_CONF_MD2 0
+#if MDK_CONF_MD2 == 1
+#define CYASSL_MD2
+#endif
+//  
+//      MD4
+#define MDK_CONF_MD4 1
+#if MDK_CONF_MD4 == 0
+#define NO_MD4
+#endif
+//  
+//      SHA-384
+//          This has to be with SHA512
+#define MDK_CONF_SHA384 0
+#if MDK_CONF_SHA384 == 1
+#define CYASSL_SHA384
+#endif
+//  
+//      SHA-512          
+#define MDK_CONF_SHA512     0
+#if MDK_CONF_SHA512     == 1
+#define CYASSL_SHA512   
+#endif
+//  
+//      RIPEMD
+#define MDK_CONF_RIPEMD 0
+#if MDK_CONF_RIPEMD == 1
+#define CYASSL_RIPEMD
+#endif
+//  
+//      HMAC
+#define MDK_CONF_HMAC 1
+#if MDK_CONF_HMAC == 0
+#define NO_HMAC
+#endif
+//  
+//      HC128
+#define MDK_CONF_HC128 0
+#if MDK_CONF_HC128 == 1
+#define HAVE_HC128
+#endif
+//  
+//  RABBIT
+#define MDK_CONF_RABBIT 1
+#if MDK_CONF_RABBI == 0
+#define NO_RABBIT
+#endif
+//  
+
+//      AEAD     
+#define MDK_CONF_AEAD 0
+#if MDK_CONF_AEAD == 1
+#define HAVE_AEAD
+#endif
+//  
+//      DES3
+#define MDK_CONF_DES3 1
+#if MDK_CONF_DES3 == 0
+#define NO_DES3
+#endif
+//  
+//      CAMELLIA
+#define MDK_CONF_CAMELLIA 0
+#if MDK_CONF_CAMELLIA == 1
+#define HAVE_CAMELLIA
+#endif
+//  
+
+//      DH
+//              need this for CYASSL_SERVER, OPENSSL_EXTRA
+#define MDK_CONF_DH 1
+#if MDK_CONF_DH == 0
+#define NO_DH
+#endif
+//  
+//      DSA
+#define MDK_CONF_DSA 1 
+#if MDK_CONF_DSA == 0
+#define NO_DSA
+#endif
+//  
+//      PWDBASED
+#define MDK_CONF_PWDBASED 1
+#if MDK_CONF_PWDBASED == 0
+#define NO_PWDBASED
+#endif
+//  
+
+//      ECC
+#define MDK_CONF_ECC 0
+#if MDK_CONF_ECC == 1
+#define HAVE_ECC
+#endif
+//  
+//      PSK
+#define MDK_CONF_PSK 1
+#if MDK_CONF_PSK == 0
+#define NO_PSK
+#endif
+//  
+//      AESCCM (Turn off Hardware Crypt)
+#define MDK_CONF_AESCCM 0
+#if MDK_CONF_AESCCM == 1
+#define HAVE_AESCCM
+#endif
+//  
+//      AESGCM (Turn off Hardware Crypt)
+#define MDK_CONF_AESGCM 0
+#if MDK_CONF_AESGCM == 1
+#define HAVE_AESGCM
+#define BUILD_AESGCM
+#endif
+//  
+//      NTRU (need License, "crypto_ntru.h")
+#define MDK_CONF_NTRU 0
+#if MDK_CONF_NTRU == 1
+#define HAVE_NTRU
+#endif
+//  
+//  
+
+//  Hardware Crypt (See document for usage)
+//      Hardware RNG
+#define MDK_CONF_STM32F2_RNG 0
+#if MDK_CONF_STM32F2_RNG == 1
+#define STM32F2_RNG
+#else
+
+#endif
+//  
+//      Hardware Crypt
+#define MDK_CONF_STM32F2_CRYPTO 0
+#if MDK_CONF_STM32F2_CRYPTO == 1
+#define STM32F2_CRYPTO
+#endif
+//  
+
+// 
+
+
+
+//
+// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-CyaSSL.h b/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-CyaSSL.h
new file mode 100644
index 000000000..02ba94bd4
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-CyaSSL.h
@@ -0,0 +1,144 @@
+/* config-RTX-TCP-FS.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+/**** CyaSSL for KEIL-RL Configuration ****/
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define NO_MAIN_DRIVER
+
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+
+#define HAVE_KEIL_RTX
+#define CYASSL_CMSIS_RTOS
+#define CYASSL_KEIL_TCP_NET
+
+
+// <<< Use Configuration Wizard in Context Menu >>>
+//  CyaSSL Configuration
+
+//     SSL (Included by default)
+//     
+
+//      TLS 
+#define MDK_CONF_TLS 1
+#if MDK_CONF_TLS == 0
+#define NO_TLS
+#endif
+//  
+
+//      CRL
+#define MDK_CONF_DER_LOAD 0
+#if MDK_CONF_DER_LOAD == 1
+#define CYASSL_DER_LOAD
+#endif
+//  
+//      OpenSSL Extra
+#define MDK_CONF_OPENSSL_EXTRA 1
+#if MDK_CONF_OPENSSL_EXTRA == 1
+#define OPENSSL_EXTRA
+#endif
+//  
+//
+
+//  Cert/Key Generation
+//      CertGen
+#define MDK_CONF_CERT_GEN 0
+#if MDK_CONF_CERT_GEN == 1
+#define CYASSL_CERT_GEN
+#endif
+//  
+//      KeyGen
+#define MDK_CONF_KEY_GEN 0
+#if MDK_CONF_KEY_GEN == 1
+#define CYASSL_KEY_GEN
+#endif
+//  
+//
+
+//  Others
+
+//      Inline
+#define MDK_CONF_INLINE 0
+#if MDK_CONF_INLINE == 0
+#define NO_INLINE
+#endif
+//  
+//      Debug
+//              Debug Message
+#define MDK_CONF_DebugMessage 0
+#if MDK_CONF_DebugMessage == 1
+#define DEBUG_CYASSL
+#endif
+//         
+//              Check malloc
+#define MDK_CONF_CheckMalloc 1
+#if MDK_CONF_CheckMalloc == 1
+#define CYASSL_MALLOC_CHECK
+#endif
+//         
+
+
+//  
+//      ErrNo.h
+#define MDK_CONF_ErrNo 0
+#if MDK_CONF_ErrNo == 1
+#define HAVE_ERRNO
+#endif
+//  
+//      Error Strings
+#define MDK_CONF_ErrorStrings 1
+#if MDK_CONF_ErrorStrings == 0
+#define NO_ERROR_STRINGS
+#endif
+//  
+//      zlib (need "zlib.h")
+#define MDK_CONF_LIBZ 0
+#if MDK_CONF_LIBZ == 1
+#define HAVE_LIBZ
+#endif
+//  
+//      CAVIUM (need CAVIUM headers)
+#define MDK_CONF_CAVIUM 0
+#if MDK_CONF_CAVIUM == 1
+#define HAVE_CAVIUM
+#endif
+//  
+//      Small Stack
+#define MDK_CONF_SmallStack 1
+#if MDK_CONF_SmallStack == 0
+#define NO_CYASSL_SMALL_STACK
+#endif
+//  
+//      Use Fast Math
+#define MDK_CONF_FASTMATH 0
+#if MDK_CONF_FASTMATH == 1
+#define USE_FAST_MATH
+#endif
+//  
+//  
+
+// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config.h
new file mode 100644
index 000000000..4c8fcb01c
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config.h
@@ -0,0 +1,61 @@
+/* config.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define CYASSL_MDK5
+
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define BENCH_EMBEDDED
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+#define NO_MAIN_DRIVER
+
+#if  defined(MDK_CONF_CYASSL)
+#define CYASSL_MDK_SHELL
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_Benchmark)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+#elif  defined(MDK_CONF_CryptTest)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+
+#endif
+
+
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/main.c b/IDE/MDK5-ARM/Projects/EchoServer/main.c
index b02b5cb47..09ff15d4a 100644
--- a/IDE/MDK5-ARM/Projects/EchoServer/main.c
+++ b/IDE/MDK5-ARM/Projects/EchoServer/main.c
@@ -82,7 +82,7 @@ char* myoptarg = NULL;
 
 int main() 
 {
-    void *arg = NULL ;
+    void *args = NULL ;
     init_time() ;
     init_filesystem ();
     net_initialize() ;
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-Crypt.h b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-Crypt.h
new file mode 100644
index 000000000..a11c3ef24
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-Crypt.h
@@ -0,0 +1,185 @@
+/* config-FS.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+//  wolfCrypt Configuration
+
+//  Cert/Key Strage
+//        Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes)
+#define MDK_CONF_CERT_BUFF 0
+#if MDK_CONF_CERT_BUFF== 1
+#define USE_CERT_BUFFERS_1024
+#elif MDK_CONF_CERT_BUFF == 2
+#define USE_CERT_BUFFERS_2048
+#endif
+//
+
+//  Crypt Algrithm
+
+//       MD5, SHA, SHA-256, AES, RC4, ASN, RSA
+//        
+
+//      MD2
+#define MDK_CONF_MD2 0
+#if MDK_CONF_MD2 == 1
+#define CYASSL_MD2
+#endif
+//  
+//      MD4
+#define MDK_CONF_MD4 1
+#if MDK_CONF_MD4 == 0
+#define NO_MD4
+#endif
+//  
+//      SHA-384
+//          This has to be with SHA512
+#define MDK_CONF_SHA384 0
+#if MDK_CONF_SHA384 == 1
+#define CYASSL_SHA384
+#endif
+//  
+//      SHA-512          
+#define MDK_CONF_SHA512     0
+#if MDK_CONF_SHA512     == 1
+#define CYASSL_SHA512   
+#endif
+//  
+//      RIPEMD
+#define MDK_CONF_RIPEMD 0
+#if MDK_CONF_RIPEMD == 1
+#define CYASSL_RIPEMD
+#endif
+//  
+//      HMAC
+#define MDK_CONF_HMAC 1
+#if MDK_CONF_HMAC == 0
+#define NO_HMAC
+#endif
+//  
+//      HC128
+#define MDK_CONF_HC128 0
+#if MDK_CONF_HC128 == 1
+#define HAVE_HC128
+#endif
+//  
+//  RABBIT
+#define MDK_CONF_RABBIT 1
+#if MDK_CONF_RABBI == 0
+#define NO_RABBIT
+#endif
+//  
+
+//      AEAD     
+#define MDK_CONF_AEAD 0
+#if MDK_CONF_AEAD == 1
+#define HAVE_AEAD
+#endif
+//  
+//      DES3
+#define MDK_CONF_DES3 1
+#if MDK_CONF_DES3 == 0
+#define NO_DES3
+#endif
+//  
+//      CAMELLIA
+#define MDK_CONF_CAMELLIA 0
+#if MDK_CONF_CAMELLIA == 1
+#define HAVE_CAMELLIA
+#endif
+//  
+
+//      DH
+//              need this for CYASSL_SERVER, OPENSSL_EXTRA
+#define MDK_CONF_DH 1
+#if MDK_CONF_DH == 0
+#define NO_DH
+#endif
+//  
+//      DSA
+#define MDK_CONF_DSA 1 
+#if MDK_CONF_DSA == 0
+#define NO_DSA
+#endif
+//  
+//      PWDBASED
+#define MDK_CONF_PWDBASED 1
+#if MDK_CONF_PWDBASED == 0
+#define NO_PWDBASED
+#endif
+//  
+
+//      ECC
+#define MDK_CONF_ECC 0
+#if MDK_CONF_ECC == 1
+#define HAVE_ECC
+#endif
+//  
+//      PSK
+#define MDK_CONF_PSK 1
+#if MDK_CONF_PSK == 0
+#define NO_PSK
+#endif
+//  
+//      AESCCM (Turn off Hardware Crypt)
+#define MDK_CONF_AESCCM 0
+#if MDK_CONF_AESCCM == 1
+#define HAVE_AESCCM
+#endif
+//  
+//      AESGCM (Turn off Hardware Crypt)
+#define MDK_CONF_AESGCM 0
+#if MDK_CONF_AESGCM == 1
+#define HAVE_AESGCM
+#define BUILD_AESGCM
+#endif
+//  
+//      NTRU (need License, "crypto_ntru.h")
+#define MDK_CONF_NTRU 0
+#if MDK_CONF_NTRU == 1
+#define HAVE_NTRU
+#endif
+//  
+//  
+
+//  Hardware Crypt (See document for usage)
+//      Hardware RNG
+#define MDK_CONF_STM32F2_RNG 0
+#if MDK_CONF_STM32F2_RNG == 1
+#define STM32F2_RNG
+#else
+
+#endif
+//  
+//      Hardware Crypt
+#define MDK_CONF_STM32F2_CRYPTO 0
+#if MDK_CONF_STM32F2_CRYPTO == 1
+#define STM32F2_CRYPTO
+#endif
+//  
+
+// 
+
+
+
+//
+// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-CyaSSL.h b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-CyaSSL.h
new file mode 100644
index 000000000..02ba94bd4
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-CyaSSL.h
@@ -0,0 +1,144 @@
+/* config-RTX-TCP-FS.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+/**** CyaSSL for KEIL-RL Configuration ****/
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define NO_MAIN_DRIVER
+
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+
+#define HAVE_KEIL_RTX
+#define CYASSL_CMSIS_RTOS
+#define CYASSL_KEIL_TCP_NET
+
+
+// <<< Use Configuration Wizard in Context Menu >>>
+//  CyaSSL Configuration
+
+//     SSL (Included by default)
+//     
+
+//      TLS 
+#define MDK_CONF_TLS 1
+#if MDK_CONF_TLS == 0
+#define NO_TLS
+#endif
+//  
+
+//      CRL
+#define MDK_CONF_DER_LOAD 0
+#if MDK_CONF_DER_LOAD == 1
+#define CYASSL_DER_LOAD
+#endif
+//  
+//      OpenSSL Extra
+#define MDK_CONF_OPENSSL_EXTRA 1
+#if MDK_CONF_OPENSSL_EXTRA == 1
+#define OPENSSL_EXTRA
+#endif
+//  
+//
+
+//  Cert/Key Generation
+//      CertGen
+#define MDK_CONF_CERT_GEN 0
+#if MDK_CONF_CERT_GEN == 1
+#define CYASSL_CERT_GEN
+#endif
+//  
+//      KeyGen
+#define MDK_CONF_KEY_GEN 0
+#if MDK_CONF_KEY_GEN == 1
+#define CYASSL_KEY_GEN
+#endif
+//  
+//
+
+//  Others
+
+//      Inline
+#define MDK_CONF_INLINE 0
+#if MDK_CONF_INLINE == 0
+#define NO_INLINE
+#endif
+//  
+//      Debug
+//              Debug Message
+#define MDK_CONF_DebugMessage 0
+#if MDK_CONF_DebugMessage == 1
+#define DEBUG_CYASSL
+#endif
+//         
+//              Check malloc
+#define MDK_CONF_CheckMalloc 1
+#if MDK_CONF_CheckMalloc == 1
+#define CYASSL_MALLOC_CHECK
+#endif
+//         
+
+
+//  
+//      ErrNo.h
+#define MDK_CONF_ErrNo 0
+#if MDK_CONF_ErrNo == 1
+#define HAVE_ERRNO
+#endif
+//  
+//      Error Strings
+#define MDK_CONF_ErrorStrings 1
+#if MDK_CONF_ErrorStrings == 0
+#define NO_ERROR_STRINGS
+#endif
+//  
+//      zlib (need "zlib.h")
+#define MDK_CONF_LIBZ 0
+#if MDK_CONF_LIBZ == 1
+#define HAVE_LIBZ
+#endif
+//  
+//      CAVIUM (need CAVIUM headers)
+#define MDK_CONF_CAVIUM 0
+#if MDK_CONF_CAVIUM == 1
+#define HAVE_CAVIUM
+#endif
+//  
+//      Small Stack
+#define MDK_CONF_SmallStack 1
+#if MDK_CONF_SmallStack == 0
+#define NO_CYASSL_SMALL_STACK
+#endif
+//  
+//      Use Fast Math
+#define MDK_CONF_FASTMATH 0
+#if MDK_CONF_FASTMATH == 1
+#define USE_FAST_MATH
+#endif
+//  
+//  
+
+// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config.h
new file mode 100644
index 000000000..4c8fcb01c
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config.h
@@ -0,0 +1,61 @@
+/* config.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define CYASSL_MDK5
+
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define BENCH_EMBEDDED
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+#define NO_MAIN_DRIVER
+
+#if  defined(MDK_CONF_CYASSL)
+#define CYASSL_MDK_SHELL
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_Benchmark)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+#elif  defined(MDK_CONF_CryptTest)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+
+#endif
+
+
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/config-SimpleClient.h b/IDE/MDK5-ARM/Projects/SimpleClient/config-SimpleClient.h
new file mode 100644
index 000000000..966c7fb66
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/config-SimpleClient.h
@@ -0,0 +1,70 @@
+/* config-RTX-TCP-FS.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+/**** CyaSSL for KEIL-RL Configuration ****/
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define NO_MAIN_DRIVER
+
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+
+#define HAVE_KEIL_RTX
+#define CYASSL_CMSIS_RTOS
+#define CYASSL_KEIL_TCP_NET
+
+
+// <<< Use Configuration Wizard in Context Menu >>>
+//  Build Target: Simple Client
+//   Callee IP Address
+//    Default: "192.168.1.100"
+#define CYASSL_CALLEE_IP           "192.168.2.101"
+//   Callee Port Number
+//    Default: "443"
+#define CYASSL_CALLEE_PORT           "443"
+//        HTTP GET Option <0=> HTTP Get <1=> SSL/TLS Message
+#define MDK_CONF_HTTP_GET 0
+#if MDK_CONF_HTTP_GET == 0
+    #define CYASSL_HTTP_GET "-g"
+		#define CYASSL_HTTP_GET_COUNT  1
+#elif MDK_CONF_HTTP_GET == 1
+    #define CYASSL_HTTP_GET ""
+		#define CYASSL_HTTP_GET_COUNT  0
+#endif
+//        SSL/TLS Version <0=> SSL3 <1=> TLS 1.0 <2=> TLS 1.1 <3=> TLS 1.2
+#define MDK_CONF_SSL_VERSION 0
+#if MDK_CONF_SSL_VERSION  == 0
+    #define CYASSL_SSL_VER  "0"
+#elif MDK_CONF_SSL_VERSION  == 1
+    #define CYASSL_SSL_VER  "1"
+#elif MDK_CONF_SSL_VERSION  == 2
+    #define CYASSL_SSL_VER  "2"
+#elif MDK_CONF_SSL_VERSION  == 3
+    #define CYASSL_SSL_VER  "3"
+#endif
+
+//     
+// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-Crypt.h b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-Crypt.h
new file mode 100644
index 000000000..a11c3ef24
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-Crypt.h
@@ -0,0 +1,185 @@
+/* config-FS.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+//  wolfCrypt Configuration
+
+//  Cert/Key Strage
+//        Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes)
+#define MDK_CONF_CERT_BUFF 0
+#if MDK_CONF_CERT_BUFF== 1
+#define USE_CERT_BUFFERS_1024
+#elif MDK_CONF_CERT_BUFF == 2
+#define USE_CERT_BUFFERS_2048
+#endif
+//
+
+//  Crypt Algrithm
+
+//       MD5, SHA, SHA-256, AES, RC4, ASN, RSA
+//        
+
+//      MD2
+#define MDK_CONF_MD2 0
+#if MDK_CONF_MD2 == 1
+#define CYASSL_MD2
+#endif
+//  
+//      MD4
+#define MDK_CONF_MD4 1
+#if MDK_CONF_MD4 == 0
+#define NO_MD4
+#endif
+//  
+//      SHA-384
+//          This has to be with SHA512
+#define MDK_CONF_SHA384 0
+#if MDK_CONF_SHA384 == 1
+#define CYASSL_SHA384
+#endif
+//  
+//      SHA-512          
+#define MDK_CONF_SHA512     0
+#if MDK_CONF_SHA512     == 1
+#define CYASSL_SHA512   
+#endif
+//  
+//      RIPEMD
+#define MDK_CONF_RIPEMD 0
+#if MDK_CONF_RIPEMD == 1
+#define CYASSL_RIPEMD
+#endif
+//  
+//      HMAC
+#define MDK_CONF_HMAC 1
+#if MDK_CONF_HMAC == 0
+#define NO_HMAC
+#endif
+//  
+//      HC128
+#define MDK_CONF_HC128 0
+#if MDK_CONF_HC128 == 1
+#define HAVE_HC128
+#endif
+//  
+//  RABBIT
+#define MDK_CONF_RABBIT 1
+#if MDK_CONF_RABBI == 0
+#define NO_RABBIT
+#endif
+//  
+
+//      AEAD     
+#define MDK_CONF_AEAD 0
+#if MDK_CONF_AEAD == 1
+#define HAVE_AEAD
+#endif
+//  
+//      DES3
+#define MDK_CONF_DES3 1
+#if MDK_CONF_DES3 == 0
+#define NO_DES3
+#endif
+//  
+//      CAMELLIA
+#define MDK_CONF_CAMELLIA 0
+#if MDK_CONF_CAMELLIA == 1
+#define HAVE_CAMELLIA
+#endif
+//  
+
+//      DH
+//              need this for CYASSL_SERVER, OPENSSL_EXTRA
+#define MDK_CONF_DH 1
+#if MDK_CONF_DH == 0
+#define NO_DH
+#endif
+//  
+//      DSA
+#define MDK_CONF_DSA 1 
+#if MDK_CONF_DSA == 0
+#define NO_DSA
+#endif
+//  
+//      PWDBASED
+#define MDK_CONF_PWDBASED 1
+#if MDK_CONF_PWDBASED == 0
+#define NO_PWDBASED
+#endif
+//  
+
+//      ECC
+#define MDK_CONF_ECC 0
+#if MDK_CONF_ECC == 1
+#define HAVE_ECC
+#endif
+//  
+//      PSK
+#define MDK_CONF_PSK 1
+#if MDK_CONF_PSK == 0
+#define NO_PSK
+#endif
+//  
+//      AESCCM (Turn off Hardware Crypt)
+#define MDK_CONF_AESCCM 0
+#if MDK_CONF_AESCCM == 1
+#define HAVE_AESCCM
+#endif
+//  
+//      AESGCM (Turn off Hardware Crypt)
+#define MDK_CONF_AESGCM 0
+#if MDK_CONF_AESGCM == 1
+#define HAVE_AESGCM
+#define BUILD_AESGCM
+#endif
+//  
+//      NTRU (need License, "crypto_ntru.h")
+#define MDK_CONF_NTRU 0
+#if MDK_CONF_NTRU == 1
+#define HAVE_NTRU
+#endif
+//  
+//  
+
+//  Hardware Crypt (See document for usage)
+//      Hardware RNG
+#define MDK_CONF_STM32F2_RNG 0
+#if MDK_CONF_STM32F2_RNG == 1
+#define STM32F2_RNG
+#else
+
+#endif
+//  
+//      Hardware Crypt
+#define MDK_CONF_STM32F2_CRYPTO 0
+#if MDK_CONF_STM32F2_CRYPTO == 1
+#define STM32F2_CRYPTO
+#endif
+//  
+
+// 
+
+
+
+//
+// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-CyaSSL.h b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-CyaSSL.h
new file mode 100644
index 000000000..02ba94bd4
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-CyaSSL.h
@@ -0,0 +1,144 @@
+/* config-RTX-TCP-FS.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+/**** CyaSSL for KEIL-RL Configuration ****/
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define NO_MAIN_DRIVER
+
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+
+#define HAVE_KEIL_RTX
+#define CYASSL_CMSIS_RTOS
+#define CYASSL_KEIL_TCP_NET
+
+
+// <<< Use Configuration Wizard in Context Menu >>>
+//  CyaSSL Configuration
+
+//     SSL (Included by default)
+//     
+
+//      TLS 
+#define MDK_CONF_TLS 1
+#if MDK_CONF_TLS == 0
+#define NO_TLS
+#endif
+//  
+
+//      CRL
+#define MDK_CONF_DER_LOAD 0
+#if MDK_CONF_DER_LOAD == 1
+#define CYASSL_DER_LOAD
+#endif
+//  
+//      OpenSSL Extra
+#define MDK_CONF_OPENSSL_EXTRA 1
+#if MDK_CONF_OPENSSL_EXTRA == 1
+#define OPENSSL_EXTRA
+#endif
+//  
+//
+
+//  Cert/Key Generation
+//      CertGen
+#define MDK_CONF_CERT_GEN 0
+#if MDK_CONF_CERT_GEN == 1
+#define CYASSL_CERT_GEN
+#endif
+//  
+//      KeyGen
+#define MDK_CONF_KEY_GEN 0
+#if MDK_CONF_KEY_GEN == 1
+#define CYASSL_KEY_GEN
+#endif
+//  
+//
+
+//  Others
+
+//      Inline
+#define MDK_CONF_INLINE 0
+#if MDK_CONF_INLINE == 0
+#define NO_INLINE
+#endif
+//  
+//      Debug
+//              Debug Message
+#define MDK_CONF_DebugMessage 0
+#if MDK_CONF_DebugMessage == 1
+#define DEBUG_CYASSL
+#endif
+//         
+//              Check malloc
+#define MDK_CONF_CheckMalloc 1
+#if MDK_CONF_CheckMalloc == 1
+#define CYASSL_MALLOC_CHECK
+#endif
+//         
+
+
+//  
+//      ErrNo.h
+#define MDK_CONF_ErrNo 0
+#if MDK_CONF_ErrNo == 1
+#define HAVE_ERRNO
+#endif
+//  
+//      Error Strings
+#define MDK_CONF_ErrorStrings 1
+#if MDK_CONF_ErrorStrings == 0
+#define NO_ERROR_STRINGS
+#endif
+//  
+//      zlib (need "zlib.h")
+#define MDK_CONF_LIBZ 0
+#if MDK_CONF_LIBZ == 1
+#define HAVE_LIBZ
+#endif
+//  
+//      CAVIUM (need CAVIUM headers)
+#define MDK_CONF_CAVIUM 0
+#if MDK_CONF_CAVIUM == 1
+#define HAVE_CAVIUM
+#endif
+//  
+//      Small Stack
+#define MDK_CONF_SmallStack 1
+#if MDK_CONF_SmallStack == 0
+#define NO_CYASSL_SMALL_STACK
+#endif
+//  
+//      Use Fast Math
+#define MDK_CONF_FASTMATH 0
+#if MDK_CONF_FASTMATH == 1
+#define USE_FAST_MATH
+#endif
+//  
+//  
+
+// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config.h
new file mode 100644
index 000000000..4c8fcb01c
--- /dev/null
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config.h
@@ -0,0 +1,61 @@
+/* config.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#define __CORTEX_M3__
+#define CYASSL_MDK_ARM
+#define CYASSL_MDK5
+
+#define NO_WRITEV
+#define NO_CYASSL_DIR
+#define BENCH_EMBEDDED
+
+#define CYASSL_DER_LOAD
+#define HAVE_NULL_CIPHER
+#define NO_MAIN_DRIVER
+
+#if  defined(MDK_CONF_CYASSL)
+#define CYASSL_MDK_SHELL
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_SimpleServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoClient)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_EchoServer)
+#include "config-Crypt.h"
+#include "config-CyaSSL.h"
+#elif  defined(MDK_CONF_Benchmark)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+#elif  defined(MDK_CONF_CryptTest)
+#define SINGLE_THREADED
+#define NO_INLINE
+#include "config-Crypt.h"
+
+#endif
+
+
diff --git a/IDE/MDK5-ARM/wolfSSL.CyaSSL.pdsc b/IDE/MDK5-ARM/wolfSSL.CyaSSL.pdsc
index 75e59b9e2..25a3dd8bb 100644
--- a/IDE/MDK5-ARM/wolfSSL.CyaSSL.pdsc
+++ b/IDE/MDK5-ARM/wolfSSL.CyaSSL.pdsc
@@ -5,7 +5,7 @@
   Light weight SSL/TLS and Crypt Library for Embedded Systems  
   wolfSSL                                                  
   http://www.wolfSSL.com/files/ide                              
-  
+  cyassl\IDE\MDK5-ARM\Docs\CyaSSL-Licnese.txt
   
     wolfSSL: SSL/TLS and Crypt Library
@@ -16,7 +16,7 @@
   
 
                                                                   
-                                                   
+                                                   
       Oct/7/2013, Initial release of CyaSSL pack
     
   
@@ -87,15 +87,15 @@
   
 
   
-    
+    
       wolfSSL: SSL/TLS and Crypt Library
-      Docs/CyaSSLManual-TableofContents.htm
+      cyassl\IDE\MDK5-ARM\Docs\CyaSSLManual-TableofContents.htm
       
         CyaSSL, Light weight SSL/TLS library
         
         
         
-          
+          
           
           
 
@@ -115,7 +115,7 @@
         
         
         
-          
+          
           
           
 
@@ -147,6 +147,7 @@
           
           
           
+          
           
           
           
diff --git a/ctaocrypt/src/integer.c b/ctaocrypt/src/integer.c
index 5c3315498..d3cb044b8 100644
--- a/ctaocrypt/src/integer.c
+++ b/ctaocrypt/src/integer.c
@@ -179,6 +179,28 @@ mp_count_bits (mp_int * a)
 }
 
 
+int mp_leading_bit (mp_int * a)
+{
+    int bit = 0;
+    mp_int t;
+
+    if (mp_init_copy(&t, a) != MP_OKAY)
+        return 0;
+
+    while (mp_iszero(&t) == 0) {
+#ifndef MP_8BIT
+        bit = (t.dp[0] & 0x80) != 0;
+#else
+        bit = (t.dp[0] | ((t.dp[1] & 0x01) << 7)) & 0x80 != 0;
+#endif
+        if (mp_div_2d (&t, 8, &t, NULL) != MP_OKAY)
+            break;
+    }
+    mp_clear(&t);
+    return bit;
+}
+
+
 /* store in unsigned [big endian] format */
 int mp_to_unsigned_bin (mp_int * a, unsigned char *b)
 {
@@ -3743,7 +3765,7 @@ int mp_sqrmod (mp_int * a, mp_int * b, mp_int * c)
 #endif
 
 
-#if defined(HAVE_ECC) || !defined(NO_PWDBASED)
+#if defined(HAVE_ECC) || !defined(NO_PWDBASED) || defined(CYASSL_SNIFFER)
 
 /* single digit addition */
 int mp_add_d (mp_int* a, mp_digit b, mp_int* c)
diff --git a/src/tls.c b/src/tls.c
index f71c440b7..878e2e003 100644
--- a/src/tls.c
+++ b/src/tls.c
@@ -452,14 +452,12 @@ int CyaSSL_GetHmacType(CYASSL* ssl)
         {
             return SHA;
         }
-        break;
         #endif
         #ifdef HAVE_BLAKE2 
         case blake2b_mac:
         {
             return BLAKE2B_ID; 
         }
-        break;
         #endif
         default:
         {

From 849bbdefaee4983c07c162b7afc77eec8c0bab05 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Sat, 26 Oct 2013 17:18:18 +0900
Subject: [PATCH 08/43] Updates for MDK4

---
 .gitignore                                    |   4 +-
 IDE/MDK-ARM/MDK-ARM/CyaSSL/Retarget.c         |   8 -
 IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt  | 290 +++++-----------
 IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj | 133 +------
 .../STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c  | 326 ++++++++++++------
 ctaocrypt/test/test.c                         |  49 +--
 6 files changed, 346 insertions(+), 464 deletions(-)

diff --git a/.gitignore b/.gitignore
index e4c4d2d48..d16360a27 100644
--- a/.gitignore
+++ b/.gitignore
@@ -81,11 +81,9 @@ cov-int
 cyassl.tgz
 *.log
 *.trs
-IDE\MDK-ARM\Projects/
-IDE\MDK-ARM\STM32F2xx_StdPeriph_Lib/inc
-IDE\MDK-ARM\STM32F2xx_StdPeriph_Lib/src
 IDE\MDK-ARM\LPC43xx\Drivers/
 IDE\MDK-ARM\LPC43xx\LPC43xx/
 *.gcno
 *.gcda
 *.gcov
+
diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/Retarget.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/Retarget.c
index 00aaef181..bb59c8ce1 100644
--- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/Retarget.c
+++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/Retarget.c
@@ -259,11 +259,3 @@ void _sys_exit (int return_code)
     
 }
 
-/*--------------------------- time -----------------------------------------*/
-long time(long *t) 
-{ 
-    return ((long) 0) ;       /** DUMMY TIME() **/
-}
-/*-----------------------------------------------------------------------------
- * end of file
- *----------------------------------------------------------------------------*/
diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt
index e93e9595f..eb6599f1e 100644
--- a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt
+++ b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt
@@ -532,10 +532,10 @@
       1
       0
       0
-      0
+      5
       0
-      0
-      0
+      19
+      32
       0
       ..\..\..\ctaocrypt\test\test.c
       test.c
@@ -642,122 +642,10 @@
 
   
     STM32F2xx_StdPeriph_Lib
-    0
+    1
     0
     0
     0
-    
-      2
-      10
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_cryp.c
-      stm32f2xx_cryp.c
-      0
-      0
-    
-    
-      2
-      11
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_hash.c
-      stm32f2xx_hash.c
-      0
-      0
-    
-    
-      2
-      12
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rcc.c
-      stm32f2xx_rcc.c
-      0
-      0
-    
-    
-      2
-      13
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rng.c
-      stm32f2xx_rng.c
-      0
-      0
-    
-    
-      2
-      14
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rtc.c
-      stm32f2xx_rtc.c
-      0
-      0
-    
-    
-      2
-      15
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_pwr.c
-      stm32f2xx_pwr.c
-      0
-      0
-    
-    
-      2
-      16
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_tim.c
-      stm32f2xx_tim.c
-      0
-      0
-    
   
 
   
@@ -768,7 +656,7 @@
     0
     
       3
-      17
+      10
       1
       0
       0
@@ -784,7 +672,7 @@
     
     
       3
-      18
+      11
       1
       0
       0
@@ -800,7 +688,7 @@
     
     
       3
-      19
+      12
       4
       0
       0
@@ -816,7 +704,7 @@
     
     
       3
-      20
+      13
       4
       0
       0
@@ -832,7 +720,7 @@
     
     
       3
-      21
+      14
       1
       0
       0
@@ -848,7 +736,7 @@
     
     
       3
-      22
+      15
       4
       0
       0
@@ -864,7 +752,7 @@
     
     
       3
-      23
+      16
       4
       0
       0
@@ -880,7 +768,7 @@
     
     
       3
-      24
+      17
       1
       0
       0
@@ -904,7 +792,7 @@
     0
     
       4
-      25
+      18
       1
       0
       0
@@ -920,7 +808,7 @@
     
     
       4
-      26
+      19
       1
       0
       0
@@ -936,7 +824,7 @@
     
     
       4
-      27
+      20
       1
       0
       0
@@ -952,7 +840,7 @@
     
     
       4
-      28
+      21
       1
       0
       0
@@ -968,7 +856,7 @@
     
     
       4
-      29
+      22
       1
       0
       0
@@ -984,7 +872,7 @@
     
     
       4
-      30
+      23
       1
       0
       0
@@ -1000,7 +888,7 @@
     
     
       4
-      31
+      24
       1
       0
       0
@@ -1016,7 +904,7 @@
     
     
       4
-      32
+      25
       1
       0
       0
@@ -1032,7 +920,7 @@
     
     
       4
-      33
+      26
       1
       0
       0
@@ -1056,7 +944,7 @@
     0
     
       5
-      34
+      27
       1
       0
       0
@@ -1072,7 +960,7 @@
     
     
       5
-      35
+      28
       1
       0
       0
@@ -1088,7 +976,7 @@
     
     
       5
-      36
+      29
       1
       0
       0
@@ -1104,7 +992,7 @@
     
     
       5
-      37
+      30
       1
       0
       0
@@ -1120,7 +1008,7 @@
     
     
       5
-      38
+      31
       1
       0
       0
@@ -1136,7 +1024,7 @@
     
     
       5
-      39
+      32
       1
       0
       0
@@ -1152,7 +1040,7 @@
     
     
       5
-      40
+      33
       1
       0
       0
@@ -1168,7 +1056,7 @@
     
     
       5
-      41
+      34
       1
       0
       0
@@ -1184,7 +1072,7 @@
     
     
       5
-      42
+      35
       1
       0
       0
@@ -1200,7 +1088,7 @@
     
     
       5
-      43
+      36
       1
       0
       0
@@ -1216,7 +1104,7 @@
     
     
       5
-      44
+      37
       1
       0
       0
@@ -1232,7 +1120,7 @@
     
     
       5
-      45
+      38
       1
       0
       0
@@ -1248,7 +1136,7 @@
     
     
       5
-      46
+      39
       1
       0
       0
@@ -1264,7 +1152,7 @@
     
     
       5
-      47
+      40
       1
       0
       0
@@ -1280,7 +1168,7 @@
     
     
       5
-      48
+      41
       1
       0
       0
@@ -1296,7 +1184,7 @@
     
     
       5
-      49
+      42
       1
       0
       0
@@ -1312,7 +1200,7 @@
     
     
       5
-      50
+      43
       1
       0
       0
@@ -1328,7 +1216,7 @@
     
     
       5
-      51
+      44
       1
       0
       0
@@ -1344,7 +1232,7 @@
     
     
       5
-      52
+      45
       1
       0
       0
@@ -1360,7 +1248,7 @@
     
     
       5
-      53
+      46
       1
       0
       0
@@ -1376,7 +1264,7 @@
     
     
       5
-      54
+      47
       1
       0
       0
@@ -1392,7 +1280,23 @@
     
     
       5
-      55
+      48
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      ..\..\..\ctaocrypt\src\port.c
+      port.c
+      0
+      0
+    
+    
+      5
+      49
       1
       0
       0
@@ -1408,7 +1312,7 @@
     
     
       5
-      56
+      50
       1
       0
       0
@@ -1424,7 +1328,7 @@
     
     
       5
-      57
+      51
       1
       0
       0
@@ -1440,7 +1344,7 @@
     
     
       5
-      58
+      52
       1
       0
       0
@@ -1456,7 +1360,7 @@
     
     
       5
-      59
+      53
       1
       0
       0
@@ -1472,7 +1376,7 @@
     
     
       5
-      60
+      54
       1
       0
       0
@@ -1488,7 +1392,7 @@
     
     
       5
-      61
+      55
       1
       0
       0
@@ -1504,7 +1408,7 @@
     
     
       5
-      62
+      56
       1
       0
       0
@@ -1520,7 +1424,7 @@
     
     
       5
-      63
+      57
       1
       0
       0
@@ -1534,22 +1438,6 @@
       0
       0
     
-    
-      5
-      64
-      1
-      0
-      0
-      9
-      0
-      0
-      0
-      0
-      ..\..\..\ctaocrypt\src\port.c
-      port.c
-      0
-      0
-    
   
 
   
@@ -1560,7 +1448,7 @@
     0
     
       6
-      65
+      58
       1
       0
       0
@@ -1576,7 +1464,7 @@
     
     
       6
-      66
+      59
       1
       0
       0
@@ -1592,7 +1480,7 @@
     
     
       6
-      67
+      60
       5
       0
       0
@@ -1608,7 +1496,7 @@
     
     
       6
-      68
+      61
       1
       0
       0
@@ -1624,7 +1512,7 @@
     
     
       6
-      69
+      62
       1
       0
       0
@@ -1640,7 +1528,7 @@
     
     
       6
-      70
+      63
       5
       0
       0
@@ -1656,7 +1544,7 @@
     
     
       6
-      71
+      64
       5
       0
       0
@@ -1672,7 +1560,7 @@
     
     
       6
-      72
+      65
       5
       0
       0
@@ -1688,14 +1576,14 @@
     
     
       6
-      73
+      66
       2
       0
       0
       0
       0
-      0
-      0
+      156
+      169
       0
       ..\MDK-ARM\config\startup_stm32f2xx.s
       startup_stm32f2xx.s
@@ -1712,14 +1600,14 @@
     0
     
       7
-      74
+      67
       1
       0
       0
       0
       0
-      0
-      0
+      1
+      1
       0
       ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
       cyassl_MDK_ARM.c
@@ -1728,14 +1616,14 @@
     
     
       7
-      75
+      68
       1
-      0
+      1
       0
       0
       0
-      0
-      0
+      194
+      262
       0
       ..\MDK-ARM\CyaSSL\Retarget.c
       Retarget.c
@@ -1744,14 +1632,14 @@
     
     
       7
-      76
+      69
       1
       0
       0
-      0
+      1
       0
-      0
-      0
+      36
+      52
       0
       ..\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
       time-STM32F2xx.c
diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj
index 7f2501b14..7d4f33359 100644
--- a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj
+++ b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj
@@ -349,7 +349,7 @@
             0
             
               
-              HAVE_CONFIG_H CYASSL_STM32F2xx __DBG_ITM __RTX USE_STDPERIPH_DRIVER MDK_CONF_RTX_TCP_FS
+              HAVE_CONFIG_H CYASSL_STM32F2xx __DBG_ITM __RTX MDK_CONF_RTX_TCP_FS
               
               ..\MDK-ARM\CyaSSL;C:..\STM32F2xx_StdPeriph_Lib\inc;..\..\..\
             
@@ -441,43 +441,6 @@
         
         
           STM32F2xx_StdPeriph_Lib
-          
-            
-              stm32f2xx_cryp.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_cryp.c
-            
-            
-              stm32f2xx_hash.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_hash.c
-            
-            
-              stm32f2xx_rcc.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rcc.c
-            
-            
-              stm32f2xx_rng.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rng.c
-            
-            
-              stm32f2xx_rtc.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rtc.c
-            
-            
-              stm32f2xx_pwr.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_pwr.c
-            
-            
-              stm32f2xx_tim.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_tim.c
-            
-          
         
         
           MDK-ARM
@@ -1539,43 +1502,6 @@
         
         
           STM32F2xx_StdPeriph_Lib
-          
-            
-              stm32f2xx_cryp.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_cryp.c
-            
-            
-              stm32f2xx_hash.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_hash.c
-            
-            
-              stm32f2xx_rcc.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rcc.c
-            
-            
-              stm32f2xx_rng.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rng.c
-            
-            
-              stm32f2xx_rtc.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rtc.c
-            
-            
-              stm32f2xx_pwr.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_pwr.c
-            
-            
-              stm32f2xx_tim.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_tim.c
-            
-          
         
         
           MDK-ARM
@@ -1914,6 +1840,11 @@
               1
               ..\..\..\ctaocrypt\src\misc.c
             
+            
+              port.c
+              1
+              ..\..\..\ctaocrypt\src\port.c
+            
             
               pwdbased.c
               1
@@ -1959,11 +1890,6 @@
               1
               ..\..\..\ctaocrypt\src\tfm.c
             
-            
-              port.c
-              1
-              ..\..\..\ctaocrypt\src\port.c
-            
           
         
         
@@ -2753,43 +2679,6 @@
         
         
           STM32F2xx_StdPeriph_Lib
-          
-            
-              stm32f2xx_cryp.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_cryp.c
-            
-            
-              stm32f2xx_hash.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_hash.c
-            
-            
-              stm32f2xx_rcc.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rcc.c
-            
-            
-              stm32f2xx_rng.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rng.c
-            
-            
-              stm32f2xx_rtc.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rtc.c
-            
-            
-              stm32f2xx_pwr.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_pwr.c
-            
-            
-              stm32f2xx_tim.c
-              1
-              ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_tim.c
-            
-          
         
         
           MDK-ARM
@@ -3266,6 +3155,11 @@
               1
               ..\..\..\ctaocrypt\src\misc.c
             
+            
+              port.c
+              1
+              ..\..\..\ctaocrypt\src\port.c
+            
             
               pwdbased.c
               1
@@ -3351,11 +3245,6 @@
                 
               
             
-            
-              port.c
-              1
-              ..\..\..\ctaocrypt\src\port.c
-            
           
         
         
diff --git a/IDE/MDK-ARM/STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c b/IDE/MDK-ARM/STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c
index 66940453a..37154d136 100644
--- a/IDE/MDK-ARM/STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c
+++ b/IDE/MDK-ARM/STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c
@@ -24,109 +24,229 @@
 #endif
 
 #include "time.h"
-#include "stm32f2xx_tim.h"
-#include "stm32f2xx_rcc.h"
-
 
+#define PERIPH_BASE           ((uint32_t)0x40000000) 
 /*-----------------------------------------------------------------------------
  *        initialize RTC 
  *----------------------------------------------------------------------------*/
-#include "stm32f2xx_rtc.h"
-#include "stm32f2xx_rcc.h"
-#include "stm32f2xx_pwr.h"
+#include "stm32f2xx.h"
 
-static init_RTC() 
+#define assert_param(a)
+
+#define RTC_RSF_MASK         ((uint32_t)0xFFFFFF5F)
+#define SYNCHRO_TIMEOUT      ((uint32_t) 0x00008000)
+#define Bcd2ToByte(v) \
+   ((((uint8_t)(v & (uint8_t)0xF0) >> (uint8_t)0x4) * 10) + (v & (uint8_t)0x0F))
+#define RTC_TR_RESERVED_MASK ((uint32_t)0x007F7F7F)
+#define RTC_TR_MNT           ((uint32_t)0x00007000)
+#define RTC_TR_MNU           ((uint32_t)0x00000F00)
+
+#define PWR_OFFSET           (PWR_BASE - PERIPH_BASE)
+#define CR_OFFSET            (PWR_OFFSET + 0x00)
+#define DBP_BitNumber        0x08
+#define CR_DBP_BB     (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
+#define RTC_INIT_MASK        ((uint32_t)0xFFFFFFFF)  
+#define INITMODE_TIMEOUT     ((uint32_t) 0x00010000)
+
+static void init_RTC() 
 {
-    RTC_InitTypeDef RTC_InitStruct ;
+    __IO uint32_t initcounter =  0x00 ;
+    uint32_t initstatus = 0x00;    /* Enable the PWR clock : RCC_APB1Periph_PWR  */       
+    ((uint32_t *)RCC)[0x10] |= ((uint32_t)0x10000000) ;
     
-    RTC_TimeTypeDef RTC_Time ;
-    RTC_DateTypeDef RTC_Date ;
-
-    
-    /* Enable the PWR clock */
-    RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
-
     /* Allow access to RTC */
-    PWR_BackupAccessCmd(ENABLE);
-
-/***Configures the External Low Speed oscillator (LSE)****/
-
-    RCC_LSEConfig(RCC_LSE_ON);
-
+    *(__IO uint32_t *) CR_DBP_BB = ENABLE ;
+      /* RCC_LSEConfig(RCC_LSE_ON) */
+    *(__IO uint8_t *) (RCC_BASE + 0x70) =  ((uint8_t)0x00);
+    /* Reset LSEBYP bit */
+    *(__IO uint8_t *) (RCC_BASE + 0x70) =  ((uint8_t)0x00);
+    *(__IO uint8_t *) (RCC_BASE + 0x70) =  ((uint8_t)0x01);
     /* Wait till LSE is ready */  
-    while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
-    {
-    }
+        while((RCC->BDCR << 0x2) == 0x0) { }
+      /* Select the RTC clock source: RCC_RTCCLKSource_LSE */
+    ((RCC_TypeDef *)RCC)->BDCR |= (uint32_t)0x00000100;
 
-    /* Select the RTC Clock Source */
-    RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
-   
     /* Enable the RTC Clock */
-    RCC_RTCCLKCmd(ENABLE);
+    *(__IO uint32_t *)  (PERIPH_BB_BASE + (((RCC_BASE - PERIPH_BASE)+ 0x70) * 32) + (0x0F* 4)) = (uint32_t)ENABLE;
 
-    /* Wait for RTC APB registers synchronisation */
-    RTC_WaitForSynchro();
+    *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE; 
+    RTC->ISR = (uint32_t) RTC_INIT_MASK;
+    do {
+      initstatus = RTC->ISR & RTC_ISR_INITF;
+      initcounter++;  
+    } while((initcounter != INITMODE_TIMEOUT) && (initstatus == 0x00));
+    
+    /* Disable the write protection for RTC registers */
+    RTC->WPR = 0xCA;
+    RTC->WPR = 0x53;
 
-    /* Calendar Configuration with LSI supposed at 32KHz */
-    RTC_InitStruct.RTC_AsynchPrediv = 0x7F;
-    RTC_InitStruct.RTC_SynchPrediv =  0xFF; 
-    RTC_InitStruct.RTC_HourFormat = RTC_HourFormat_24;
-    RTC_Init(&RTC_InitStruct);
+    RTC->CR &= ((uint32_t)~(RTC_CR_FMT));   /* Clear RTC CR FMT Bit */
+    /* Set RTC_CR register */
+    RTC->CR |=   ((uint32_t)0x00000000) ;   /* RTC_HourFormat_24 */
 
-    RTC_GetTime(RTC_Format_BIN, &RTC_Time) ;
-    RTC_GetDate(RTC_Format_BIN, &RTC_Date) ;
+    /* Configure the RTC PRER */
+    RTC->PRER = 0x7f ; 
+    RTC->PRER |= (uint32_t)(0xff << 16);
+
+    /* Exit Initialization mode */
+    RTC->ISR &= (uint32_t)~RTC_ISR_INIT; 
+
+    /* Enable the write protection for RTC registers */
+    RTC->WPR = 0xFF; 
 }
 
 /*-----------------------------------------------------------------------------
  *        initialize TIM
  *----------------------------------------------------------------------------*/
+#define RCC_APB1Periph_TIM2              ((uint32_t)0x00000001)
+
 static void init_TIM()
 {
-    TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure ;
+      uint16_t tmpcr1 = 0;
 
-    RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE) ;
+    ((uint32_t *)RCC)[0x10] |= RCC_APB1Periph_TIM2 ;
 
-    TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
-    TIM_TimeBaseStructure.TIM_Prescaler = 60;
-    TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
-    TIM_TimeBaseStructure.TIM_Period = 0xffffffff;
-    TIM_TimeBaseStructure.TIM_ClockDivision = 0;
-    TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
+    tmpcr1 = TIM2->CR1 ;
+    tmpcr1 &=   (uint16_t) (~(((uint16_t)0x0010) | ((uint16_t)0x0060) )); 
+                                     /* CR1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS) */
+    tmpcr1 |= (uint16_t)0x0000  ;    /* CR1 |= TIM_CounterMode_Up */
+    TIM2->CR1=  tmpcr1 ;
 
-    TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
+    TIM2->ARR = 0xffffffff ;         /* ARR= TIM_Period */
+    TIM2->PSC = 60 ;                 /* PSC = TIM_Prescaler */
+    TIM2->EGR = ((uint16_t)0x0001) ; /* EGR = TIM_PSCReloadMode_Immediate */      
 
-    TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure) ;
-    TIM_Cmd(TIM2, ENABLE) ;
+    *(uint16_t *)(PERIPH_BASE+0x0) |=((uint16_t)0x0001) ; 
+                                     /* TIM_Cmd(TIM2, ENABLE) ; */
 }
 
 void init_time(void) {
-	  init_RTC() ;
+      init_RTC() ;
     init_TIM() ;
 }
 
+static void GetTime(uint8_t *h, uint8_t *m, uint8_t *s)
+{
+    uint32_t tmpreg = 0;
+    tmpreg = (uint32_t)(RTC->TR & RTC_TR_RESERVED_MASK); 
+    *h = (uint8_t)Bcd2ToByte((uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> 16));
+    *m = (uint8_t)Bcd2ToByte((uint8_t)((tmpreg & (RTC_TR_MNT | RTC_TR_MNU)) >>8));
+    *s = (uint8_t)Bcd2ToByte((tmpreg & (RTC_TR_ST | RTC_TR_SU))); 
+}
+
+static uint32_t ByteToBcd2(uint8_t Value)
+{
+  uint8_t bcdhigh = 0;
+  while (Value >= 10)  {
+    bcdhigh++;
+    Value -= 10;
+  }
+  return  ((uint8_t)(bcdhigh << 4) | Value);
+}
+
+static void SetTime(uint8_t h, uint8_t m, uint8_t s)
+{
+     __IO uint32_t synchrocounter = 0;
+     uint32_t synchrostatus = 0x00;
+     __IO uint32_t initcounter = 0;
+     uint32_t initstatus = 0x00;
+     uint32_t tmpreg ;  
+
+     tmpreg = ((ByteToBcd2(h) << 16) | (ByteToBcd2(m) << 8) |  ByteToBcd2(s)) ;
+     /* Disable the write protection for RTC registers */
+     RTC->WPR = 0xCA;
+     RTC->WPR = 0x53;
+     RTC->ISR &= (uint32_t)~RTC_ISR_INIT; 
+
+     RTC->ISR = (uint32_t)RTC_INIT_MASK;
+
+     /* Wait till RTC is in INIT state and if Time out is reached exit */
+     do {
+         initstatus = RTC->ISR & RTC_ISR_INITF;
+         initcounter++;  
+     } while((initcounter != INITMODE_TIMEOUT) && (initstatus == 0x00));
+    
+     RTC->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK);
+    
+     RTC->ISR &= (uint32_t)RTC_RSF_MASK;
+     /* Wait the registers to be synchronised */
+     do {
+         synchrostatus = RTC->ISR & RTC_ISR_RSF;
+         synchrocounter++;  
+     } while((synchrocounter != SYNCHRO_TIMEOUT) && (synchrostatus == 0x00));
+
+     RTC->WPR = 0xFF;
+}
+
+static void GetDate(uint8_t *y, uint8_t *m, uint8_t *d)
+{
+    uint32_t tmpreg = 0;
+    tmpreg = (uint32_t)(RTC->DR & RTC_TR_RESERVED_MASK); 
+    *y = (uint8_t)Bcd2ToByte((uint8_t)((tmpreg & (RTC_DR_YT|RTC_DR_YU)) >>16));
+    *m = (uint8_t)Bcd2ToByte((uint8_t)((tmpreg & (RTC_DR_MT|RTC_DR_MU)) >> 8));
+    *d = (uint8_t)Bcd2ToByte((uint8_t)(tmpreg & (RTC_DR_DT |RTC_DR_DU)));
+}
+
+static void SetDate(uint8_t y, uint8_t m, uint8_t d)
+{
+     __IO uint32_t synchrocounter = 0;
+     uint32_t synchrostatus = 0x00;
+     __IO uint32_t initcounter = 0;
+     uint32_t initstatus = 0x00;
+     uint32_t tmpreg = 0 ;  
+    
+    tmpreg = ((ByteToBcd2(y) << 16) | (ByteToBcd2(m) << 8) |  ByteToBcd2(d)) ;
+    /* Disable the write protection for RTC registers */
+    RTC->WPR = 0xCA;
+    RTC->WPR = 0x53;
+    RTC->ISR &= (uint32_t)~RTC_ISR_INIT; 
+
+    RTC->ISR = (uint32_t)RTC_INIT_MASK;
+
+    /* Wait till RTC is in INIT state and if Time out is reached exit */
+    do {
+        initstatus = RTC->ISR & RTC_ISR_INITF;
+        initcounter++;  
+    } while((initcounter != INITMODE_TIMEOUT) && (initstatus == 0x00));
+
+    RTC->DR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK);
+
+    RTC->ISR &= (uint32_t)RTC_RSF_MASK;
+    /* Wait the registers to be synchronised */
+    do {
+        synchrostatus = RTC->ISR & RTC_ISR_RSF;
+        synchrocounter++;  
+    } while((synchrocounter != SYNCHRO_TIMEOUT) && (synchrostatus == 0x00));
+
+    RTC->WPR = 0xFF;
+}
+
+
+#include 
+void CYASSL_MSG(const char *msg) ;
+
 struct tm *Cyassl_MDK_gmtime(const time_t *c) 
 { 
-
-    RTC_TimeTypeDef RTC_Time ;
-    RTC_DateTypeDef RTC_Date ;
+    uint8_t h, m, s ;
+    uint8_t y, mo, d ;
     static struct tm date ; 
 
-    RTC_GetTime(RTC_Format_BIN, &RTC_Time) ;
-    RTC_GetDate(RTC_Format_BIN, &RTC_Date) ;
+    GetTime(&h, &m, &s) ;
+    GetDate(&y, &mo, &d) ;
 
-    date.tm_year = RTC_Date.RTC_Year + 100 ;
-    date.tm_mon = RTC_Date.RTC_Month - 1 ;
-    date.tm_mday = RTC_Date.RTC_Date ;
-    date.tm_hour = RTC_Time.RTC_Hours ;
-    date.tm_min = RTC_Time.RTC_Minutes ;
-    date.tm_sec = RTC_Time.RTC_Seconds ;
+    date.tm_year = y + 100 ;
+    date.tm_mon = mo - 1 ;
+    date.tm_mday = d ;
+    date.tm_hour = h ;
+    date.tm_min = m ;
+    date.tm_sec = s ;
 
     #if defined(DEBUG_CYASSL) 
     {
         char msg[100] ;
-        sprintf(msg, "Debug::Cyassl_KEIL_gmtime(DATE=/%4d/%02d/%02d TIME=%02d:%02d:%02d)\n",
-        RTC_Date.RTC_Year+2000,  RTC_Date.RTC_Month, RTC_Date.RTC_Date,
-        RTC_Time.RTC_Hours,  RTC_Time.RTC_Minutes,  RTC_Time.RTC_Seconds) ; 
+        sprintf(msg, 
+        "Debug::Cyassl_KEIL_gmtime(DATE=/%2d/%02d/%04d TIME=%02d:%02d:%02d)\n",
+                d,  mo,  y+2000, h,  m,  s) ; 
         CYASSL_MSG(msg) ;   
     }
     #endif
@@ -138,48 +258,42 @@ double current_time()
 {
       return ((double)TIM2->CNT/1000000.0) ;
 }
-
-typedef struct func_args {
-    int    argc;
-    char** argv;
-    int    return_code;
-} func_args;
-
-
-#include 
-
-void time_main(void *args) 
-{
-    char * datetime ;
-    RTC_TimeTypeDef RTC_Time ;
-    RTC_DateTypeDef RTC_Date ;
-    int year ;
-    if( args == NULL || ((func_args *)args)->argc == 1) {
-        RTC_GetTime(RTC_Format_BIN, &RTC_Time) ;
-        RTC_GetDate(RTC_Format_BIN, &RTC_Date) ;
-        printf("Date: %d/%d/%d, Time: %02d:%02d:%02d\n", 
-             RTC_Date.RTC_Month, RTC_Date.RTC_Date, RTC_Date.RTC_Year+2000,  
-             RTC_Time.RTC_Hours,  RTC_Time.RTC_Minutes,  RTC_Time.RTC_Seconds) ;              
-    } else if(((func_args *)args)->argc == 3 && 
-              ((func_args *)args)->argv[1][0] == '-' && 
-              ((func_args *)args)->argv[1][1] == 'd' ) {
-        datetime = ((func_args *)args)->argv[2];
-        sscanf(datetime, "%d/%d/%d", 
-             (int *)&RTC_Date.RTC_Month, (int *)&RTC_Date.RTC_Date, &year) ;
-        RTC_Date.RTC_Year = year - 2000 ;   
-        RTC_Date.RTC_WeekDay = 0 ;
-        RTC_SetDate(RTC_Format_BIN, &RTC_Date) ;        
-    } else if(((func_args *)args)->argc == 3 && 
-              ((func_args *)args)->argv[1][0] == '-' && 
-              ((func_args *)args)->argv[1][1] == 't' ) {
-        datetime = ((func_args *)args)->argv[2];
-        sscanf(datetime, "%d:%d:%d",            
-            (int *)&RTC_Time.RTC_Hours, 
-            (int *)&RTC_Time.RTC_Minutes, 
-            (int *)&RTC_Time.RTC_Seconds
-        ) ;
-        RTC_SetTime(RTC_Format_BIN, &RTC_Time) ;
-    } else printf("Invalid argument\n") ; 
-}
+
+typedef struct func_args {
+    int    argc;
+    char** argv;
+    int    return_code;
+} func_args;
+
+void time_main(void *args) 
+{
+    char * datetime ;
+    uint8_t h, m, s ;
+    uint8_t y, mo, d ;
+    
+    if( args == NULL || ((func_args *)args)->argc == 1) {
+        GetTime(&h, &m, &s) ;
+        GetDate(&y, &mo, &d) ;
+        printf("Date: %d/%d/%d, Time: %02d:%02d:%02d\n", 
+             mo, d, y+2000, h, m, s) ;              
+    } else if(((func_args *)args)->argc == 3 && 
+              ((func_args *)args)->argv[1][0] == '-' && 
+              ((func_args *)args)->argv[1][1] == 'd' ) {
+        datetime = ((func_args *)args)->argv[2];
+        sscanf(datetime, "%d/%d/%d", (int *)&mo, (int *)&d, (int *) &y) ;
+        SetDate(y-2000, mo, d) ;        
+    } else if(((func_args *)args)->argc == 3 && 
+              ((func_args *)args)->argv[1][0] == '-' && 
+              ((func_args *)args)->argv[1][1] == 't' ) {
+        datetime = ((func_args *)args)->argv[2];
+        sscanf(datetime, "%d:%d:%d",            
+            (int *)&h, (int *)&m, (int *)&s) ;
+        SetTime(h, m, s) ;
+    } else printf("Invalid argument\n") ; 
+}
 
 
+/*******************************************************************
+      time()                                                                      
+********************************************************************/
+time_t time(time_t * t) { return 0 ; }
diff --git a/ctaocrypt/test/test.c b/ctaocrypt/test/test.c
index 24e3caf7c..8147bf87f 100644
--- a/ctaocrypt/test/test.c
+++ b/ctaocrypt/test/test.c
@@ -74,12 +74,6 @@
     #include 
 #endif
 
-#if defined(CYASSL_MDK_ARM)
-        #include 
-        #include 
-    extern FILE * CyaSSL_fopen(const char *fname, const char *mode) ;
-    #define fopen CyaSSL_fopen
-#endif
 
 #if defined(USE_CERT_BUFFERS_1024) || defined(USE_CERT_BUFFERS_2048)
     /* include test cert and key buffers for use with NO_FILESYSTEM */
@@ -92,6 +86,12 @@
     #endif
 #endif
 
+#if defined(CYASSL_MDK_ARM)
+        #include 
+        #include 
+    extern FILE * CyaSSL_fopen(const char *fname, const char *mode) ;
+    #define fopen CyaSSL_fopen
+#endif
 
 #ifdef HAVE_NTRU
     #include "crypto_ntru.h"
@@ -2471,23 +2471,24 @@ byte GetEntropy(ENTROPY_CMD cmd, byte* out)
             static const char* caKeyFile  = "a:\\certs\\ca-key.der";
             static const char* caCertFile = "a:\\certs\\ca-cert.pem";
         #endif
-#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) && defined(CYASSL_MKD_SHELL) 
-    static char* clientKey = "certs/client-key.der";
-    static char* clientCert = "certs/client-cert.der";
-    void set_clientKey(char *key) {  clientKey = key ; }      /* set by shell command */
-    void set_clientCert(char *cert) {  clientCert = cert ; }  /* set by shell command */        
-    #ifdef CYASSL_CERT_GEN
-        static char* caKeyFile  = "certs/ca-key.der";
-        static char* caCertFile = "certs/ca-cert.pem";
-        void set_caKeyFile (char * key)  { caKeyFile   = key ; }     /* set by shell command */
-        void set_caCertFile(char * cert) { caCertFile = cert ; }     /* set by shell command */
-    #endif
-#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) 
-    static const char* clientKey  = "./certs/client-key.der";
-    static const char* clientCert = "./certs/client-cert.der";
-    #ifdef CYASSL_CERT_GEN
-        static const char* caKeyFile  = "./certs/ca-key.der";
-        static const char* caCertFile = "./certs/ca-cert.pem";
+    #elif defined(CYASSL_MKD_SHELL)
+        static char* clientKey = "certs/client-key.der";
+        static char* clientCert = "certs/client-cert.der";
+        void set_clientKey(char *key) {  clientKey = key ; }      /* set by shell command */
+        void set_clientCert(char *cert) {  clientCert = cert ; }  /* set by shell command */
+        #ifdef CYASSL_CERT_GEN
+            static char* caKeyFile  = "certs/ca-key.der";
+            static char* caCertFile = "certs/ca-cert.pem";
+            void set_caKeyFile (char * key)  { caKeyFile   = key ; }     /* set by shell command */
+            void set_caCertFile(char * cert) { caCertFile = cert ; }     /* set by shell command */
+        #endif
+    #else
+        static const char* clientKey  = "./certs/client-key.der";
+        static const char* clientCert = "./certs/client-cert.der";
+        #ifdef CYASSL_CERT_GEN
+            static const char* caKeyFile  = "./certs/ca-key.der";
+            static const char* caCertFile = "./certs/ca-cert.pem";
+        #endif
     #endif
 #endif
 
@@ -2728,7 +2729,7 @@ int rsa_test(void)
         int         pemSz;
         size_t      bytes3;
         word32      idx3 = 0;
-              FILE* file3 ;
+			  FILE* file3 ;
 #ifdef CYASSL_TEST_CERT
         DecodedCert decode;
 #endif

From 31891942b96467b2890d30ffa50cad0e47c37795 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Wed, 6 Nov 2013 10:14:15 +0900
Subject: [PATCH 09/43] default options for MDK5 pack

---
 IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt  |   41 +-
 IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj |  566 ++++++-
 IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h          |    3 +
 .../CryptBenchmark/CryptBenchmark.uvoptx      | 1128 +++++++-------
 .../CryptBenchmark/CryptBenchmark.uvprojx     |  382 +++--
 .../Projects/CyaSSL-Full/CyaSSL-Full.uvoptx   | 1364 ++++++++---------
 .../Projects/CyaSSL-Full/CyaSSL-Full.uvprojx  |  462 +++---
 .../Projects/CyaSSL-Full/RTE/wolfSSL/config.h |    3 +
 IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c    |    2 +-
 9 files changed, 2219 insertions(+), 1732 deletions(-)

diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt
index eb6599f1e..ddc1a5000 100644
--- a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt
+++ b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt
@@ -29,8 +29,8 @@
       
         1
         1
-        1
-        0
+        0
+        1
       
       
         1
@@ -73,7 +73,7 @@
       
         1
         0
-        1
+        0
       
       255
       
@@ -120,6 +120,11 @@
         BIN\ULP2CM3.DLL
       
       
+        
+          0
+          UL2CM3
+          UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F207IG$Flash\STM32F2xx_1024.flm))
+        
         
           0
           DLGTARM
@@ -229,7 +234,7 @@
       
         1
         0
-        0
+        1
       
       255
       
@@ -534,8 +539,8 @@
       0
       5
       0
-      19
-      32
+      0
+      0
       0
       ..\..\..\ctaocrypt\test\test.c
       test.c
@@ -614,8 +619,8 @@
       0
       0
       0
-      0
-      0
+      106
+      149
       0
       ..\MDK-ARM\CyaSSL\main.c
       main.c
@@ -1442,7 +1447,7 @@
 
   
     Configuration
-    0
+    1
     0
     0
     0
@@ -1534,8 +1539,8 @@
       0
       0
       0
-      0
-      0
+      1
+      1
       0
       ..\MDK-ARM\CyaSSL\config-FS.h
       config-FS.h
@@ -1582,7 +1587,7 @@
       0
       0
       0
-      156
+      152
       169
       0
       ..\MDK-ARM\config\startup_stm32f2xx.s
@@ -1606,8 +1611,8 @@
       0
       0
       0
-      1
-      1
+      182
+      222
       0
       ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
       cyassl_MDK_ARM.c
@@ -1622,8 +1627,8 @@
       0
       0
       0
-      194
-      262
+      0
+      0
       0
       ..\MDK-ARM\CyaSSL\Retarget.c
       Retarget.c
@@ -1638,8 +1643,8 @@
       0
       1
       0
-      36
-      52
+      0
+      0
       0
       ..\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
       time-STM32F2xx.c
diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj
index 7d4f33359..833dc0d1b 100644
--- a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj
+++ b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj
@@ -165,7 +165,7 @@
             1
             4100
           
-          0
+          1
           BIN\ULP2CM3.DLL
           "" ()
           
@@ -1250,7 +1250,7 @@
             0
             
               
-              HAVE_CONFIG_H  CYASSL_STM32F2xx __DBG_ITM USE_STDPERIPH_DRIVER  MDK_CONF_FS
+              HAVE_CONFIG_H  CYASSL_STM32F2xx __DBG_ITM MDK_CONF_FS
               
               ..\MDK-ARM\CyaSSL;..\MDK-ARM\inc;..\STM32F2xx_StdPeriph_Lib\inc;..\POSIX\..\..\..\
             
@@ -1649,46 +1649,6 @@
               crl.c
               1
               ..\..\..\src\crl.c
-            
-            
-              internal.c
-              1
-              ..\..\..\src\internal.c
-            
-            
-              io.c
-              1
-              ..\..\..\src\io.c
-            
-            
-              keys.c
-              1
-              ..\..\..\src\keys.c
-            
-            
-              ocsp.c
-              1
-              ..\..\..\src\ocsp.c
-            
-            
-              sniffer.c
-              1
-              ..\..\..\src\sniffer.c
-            
-            
-              ssl.c
-              1
-              ..\..\..\src\ssl.c
-            
-            
-              tls.c
-              1
-              ..\..\..\src\tls.c
-            
-            
-              ssl-dummy.c
-              1
-              ..\MDK-ARM\CyaSSL\ssl-dummy.c
               
                 
                   2
@@ -1730,6 +1690,326 @@
                 
               
             
+            
+              internal.c
+              1
+              ..\..\..\src\internal.c
+              
+                
+                  2
+                  0
+                  0
+                  0
+                  0
+                  0
+                  2
+                  2
+                  2
+                  2
+                  11
+                  
+                  
+                
+                
+                  
+                    2
+                    0
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    0
+                    2
+                    2
+                    
+                      
+                      
+                      
+                      
+                    
+                  
+                
+              
+            
+            
+              io.c
+              1
+              ..\..\..\src\io.c
+              
+                
+                  2
+                  0
+                  0
+                  0
+                  0
+                  0
+                  2
+                  2
+                  2
+                  2
+                  11
+                  
+                  
+                
+                
+                  
+                    2
+                    0
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    0
+                    2
+                    2
+                    
+                      
+                      
+                      
+                      
+                    
+                  
+                
+              
+            
+            
+              keys.c
+              1
+              ..\..\..\src\keys.c
+              
+                
+                  2
+                  0
+                  0
+                  0
+                  0
+                  0
+                  2
+                  2
+                  2
+                  2
+                  11
+                  
+                  
+                
+                
+                  
+                    2
+                    0
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    0
+                    2
+                    2
+                    
+                      
+                      
+                      
+                      
+                    
+                  
+                
+              
+            
+            
+              ocsp.c
+              1
+              ..\..\..\src\ocsp.c
+              
+                
+                  2
+                  0
+                  0
+                  0
+                  0
+                  0
+                  2
+                  2
+                  2
+                  2
+                  11
+                  
+                  
+                
+                
+                  
+                    2
+                    0
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    0
+                    2
+                    2
+                    
+                      
+                      
+                      
+                      
+                    
+                  
+                
+              
+            
+            
+              sniffer.c
+              1
+              ..\..\..\src\sniffer.c
+              
+                
+                  2
+                  0
+                  0
+                  0
+                  0
+                  0
+                  2
+                  2
+                  2
+                  2
+                  11
+                  
+                  
+                
+                
+                  
+                    2
+                    0
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    0
+                    2
+                    2
+                    
+                      
+                      
+                      
+                      
+                    
+                  
+                
+              
+            
+            
+              ssl.c
+              1
+              ..\..\..\src\ssl.c
+              
+                
+                  2
+                  0
+                  0
+                  0
+                  0
+                  0
+                  2
+                  2
+                  2
+                  2
+                  11
+                  
+                  
+                
+                
+                  
+                    2
+                    0
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    0
+                    2
+                    2
+                    
+                      
+                      
+                      
+                      
+                    
+                  
+                
+              
+            
+            
+              tls.c
+              1
+              ..\..\..\src\tls.c
+              
+                
+                  2
+                  0
+                  0
+                  0
+                  0
+                  0
+                  2
+                  2
+                  2
+                  2
+                  11
+                  
+                  
+                
+                
+                  
+                    2
+                    0
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    0
+                    2
+                    2
+                    
+                      
+                      
+                      
+                      
+                    
+                  
+                
+              
+            
+            
+              ssl-dummy.c
+              1
+              ..\MDK-ARM\CyaSSL\ssl-dummy.c
+            
           
         
         
@@ -2427,7 +2707,7 @@
             0
             
               
-              HAVE_CONFIG_H  CYASSL_STM32F2xx  __DBG_ITM USE_STDPERIPH_DRIVER MDK_CONF_BARE_METAL
+              HAVE_CONFIG_H  CYASSL_STM32F2xx  __DBG_ITM MDK_CONF_BARE_METAL
               
               ..\MDK-ARM\CyaSSL;..\MDK-ARM\inc;..\STM32F2xx_StdPeriph_Lib\inc;..\POSIX;..\..\..\
             
@@ -2884,6 +3164,46 @@
               crl.c
               1
               ..\..\..\src\crl.c
+              
+                
+                  2
+                  0
+                  0
+                  0
+                  0
+                  0
+                  2
+                  2
+                  2
+                  2
+                  11
+                  
+                  
+                
+                
+                  
+                    2
+                    0
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    0
+                    2
+                    2
+                    
+                      
+                      
+                      
+                      
+                    
+                  
+                
+              
             
             
               internal.c
@@ -2934,21 +3254,181 @@
               io.c
               1
               ..\..\..\src\io.c
+              
+                
+                  2
+                  0
+                  0
+                  0
+                  0
+                  0
+                  2
+                  2
+                  2
+                  2
+                  11
+                  
+                  
+                
+                
+                  
+                    2
+                    0
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    0
+                    2
+                    2
+                    
+                      
+                      
+                      
+                      
+                    
+                  
+                
+              
             
             
               keys.c
               1
               ..\..\..\src\keys.c
+              
+                
+                  2
+                  0
+                  0
+                  0
+                  0
+                  0
+                  2
+                  2
+                  2
+                  2
+                  11
+                  
+                  
+                
+                
+                  
+                    2
+                    0
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    0
+                    2
+                    2
+                    
+                      
+                      
+                      
+                      
+                    
+                  
+                
+              
             
             
               ocsp.c
               1
               ..\..\..\src\ocsp.c
+              
+                
+                  2
+                  0
+                  0
+                  0
+                  0
+                  0
+                  2
+                  2
+                  2
+                  2
+                  11
+                  
+                  
+                
+                
+                  
+                    2
+                    0
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    0
+                    2
+                    2
+                    
+                      
+                      
+                      
+                      
+                    
+                  
+                
+              
             
             
               sniffer.c
               1
               ..\..\..\src\sniffer.c
+              
+                
+                  2
+                  0
+                  0
+                  0
+                  0
+                  0
+                  2
+                  2
+                  2
+                  2
+                  11
+                  
+                  
+                
+                
+                  
+                    2
+                    0
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    2
+                    0
+                    2
+                    2
+                    
+                      
+                      
+                      
+                      
+                    
+                  
+                
+              
             
             
               ssl.c
diff --git a/IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h
index 4c8fcb01c..5115b2d1a 100644
--- a/IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h
+++ b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h
@@ -22,6 +22,7 @@
 #define __CORTEX_M3__
 #define CYASSL_MDK_ARM
 #define CYASSL_MDK5
+#define CYASSL_CMSIS_RTOS
 
 #define NO_WRITEV
 #define NO_CYASSL_DIR
@@ -31,6 +32,8 @@
 #define HAVE_NULL_CIPHER
 #define NO_MAIN_DRIVER
 
+#define CYASSL_STM32F2xx
+
 #if  defined(MDK_CONF_CYASSL)
 #define CYASSL_MDK_SHELL
 #include "config-Crypt.h"
diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvoptx b/IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvoptx
index 6feae1d74..888271586 100644
--- a/IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvoptx
+++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvoptx
@@ -500,566 +500,6 @@
     
       8
       16
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
-      cyassl_MDK_ARM.c
-      1
-      0
-    
-    
-      8
-      17
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\ssl-dummy.c
-      ssl-dummy.c
-      1
-      0
-    
-    
-      8
-      18
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
-      time-STM32F2xx.c
-      1
-      0
-    
-    
-      8
-      19
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c
-      aes.c
-      1
-      0
-    
-    
-      8
-      20
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c
-      arc4.c
-      1
-      0
-    
-    
-      8
-      21
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c
-      asm.c
-      1
-      0
-    
-    
-      8
-      22
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c
-      asn.c
-      1
-      0
-    
-    
-      8
-      23
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c
-      blake2b.c
-      1
-      0
-    
-    
-      8
-      24
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c
-      camellia.c
-      1
-      0
-    
-    
-      8
-      25
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c
-      coding.c
-      1
-      0
-    
-    
-      8
-      26
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c
-      compress.c
-      1
-      0
-    
-    
-      8
-      27
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c
-      des3.c
-      1
-      0
-    
-    
-      8
-      28
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c
-      dh.c
-      1
-      0
-    
-    
-      8
-      29
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c
-      dsa.c
-      1
-      0
-    
-    
-      8
-      30
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c
-      ecc.c
-      1
-      0
-    
-    
-      8
-      31
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c
-      ecc_fp.c
-      1
-      0
-    
-    
-      8
-      32
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c
-      error.c
-      1
-      0
-    
-    
-      8
-      33
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c
-      hc128.c
-      1
-      0
-    
-    
-      8
-      34
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c
-      hmac.c
-      1
-      0
-    
-    
-      8
-      35
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c
-      integer.c
-      1
-      0
-    
-    
-      8
-      36
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c
-      logging.c
-      1
-      0
-    
-    
-      8
-      37
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c
-      md2.c
-      1
-      0
-    
-    
-      8
-      38
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c
-      md4.c
-      1
-      0
-    
-    
-      8
-      39
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c
-      md5.c
-      1
-      0
-    
-    
-      8
-      40
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c
-      memory.c
-      1
-      0
-    
-    
-      8
-      41
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c
-      misc.c
-      1
-      0
-    
-    
-      8
-      42
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c
-      pwdbased.c
-      1
-      0
-    
-    
-      8
-      43
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c
-      rabbit.c
-      1
-      0
-    
-    
-      8
-      44
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c
-      random.c
-      1
-      0
-    
-    
-      8
-      45
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c
-      ripemd.c
-      1
-      0
-    
-    
-      8
-      46
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c
-      rsa.c
-      1
-      0
-    
-    
-      8
-      47
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c
-      sha.c
-      1
-      0
-    
-    
-      8
-      48
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c
-      sha256.c
-      1
-      0
-    
-    
-      8
-      49
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c
-      sha512.c
-      1
-      0
-    
-    
-      8
-      50
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c
-      tfm.c
-      1
-      0
-    
-    
-      8
-      51
       5
       0
       0
@@ -1075,8 +515,8 @@
     
     
       8
-      52
-      5
+      17
+      1
       0
       0
       0
@@ -1084,8 +524,568 @@
       0
       0
       0
-      RTE\wolfSSL\config.h
-      config.h
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
+      cyassl_MDK_ARM.c
+      1
+      0
+    
+    
+      8
+      18
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\ssl-dummy.c
+      ssl-dummy.c
+      1
+      0
+    
+    
+      8
+      19
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
+      time-STM32F2xx.c
+      1
+      0
+    
+    
+      8
+      20
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\aes.c
+      aes.c
+      1
+      0
+    
+    
+      8
+      21
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\arc4.c
+      arc4.c
+      1
+      0
+    
+    
+      8
+      22
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\asm.c
+      asm.c
+      1
+      0
+    
+    
+      8
+      23
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\asn.c
+      asn.c
+      1
+      0
+    
+    
+      8
+      24
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\blake2b.c
+      blake2b.c
+      1
+      0
+    
+    
+      8
+      25
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\camellia.c
+      camellia.c
+      1
+      0
+    
+    
+      8
+      26
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\coding.c
+      coding.c
+      1
+      0
+    
+    
+      8
+      27
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\compress.c
+      compress.c
+      1
+      0
+    
+    
+      8
+      28
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\des3.c
+      des3.c
+      1
+      0
+    
+    
+      8
+      29
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\dh.c
+      dh.c
+      1
+      0
+    
+    
+      8
+      30
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\dsa.c
+      dsa.c
+      1
+      0
+    
+    
+      8
+      31
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\ecc.c
+      ecc.c
+      1
+      0
+    
+    
+      8
+      32
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\ecc_fp.c
+      ecc_fp.c
+      1
+      0
+    
+    
+      8
+      33
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\error.c
+      error.c
+      1
+      0
+    
+    
+      8
+      34
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\hc128.c
+      hc128.c
+      1
+      0
+    
+    
+      8
+      35
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\hmac.c
+      hmac.c
+      1
+      0
+    
+    
+      8
+      36
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\integer.c
+      integer.c
+      1
+      0
+    
+    
+      8
+      37
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\logging.c
+      logging.c
+      1
+      0
+    
+    
+      8
+      38
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\md2.c
+      md2.c
+      1
+      0
+    
+    
+      8
+      39
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\md4.c
+      md4.c
+      1
+      0
+    
+    
+      8
+      40
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\md5.c
+      md5.c
+      1
+      0
+    
+    
+      8
+      41
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\memory.c
+      memory.c
+      1
+      0
+    
+    
+      8
+      42
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\misc.c
+      misc.c
+      1
+      0
+    
+    
+      8
+      43
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\port.c
+      port.c
+      1
+      0
+    
+    
+      8
+      44
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\pwdbased.c
+      pwdbased.c
+      1
+      0
+    
+    
+      8
+      45
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\rabbit.c
+      rabbit.c
+      1
+      0
+    
+    
+      8
+      46
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\random.c
+      random.c
+      1
+      0
+    
+    
+      8
+      47
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\ripemd.c
+      ripemd.c
+      1
+      0
+    
+    
+      8
+      48
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\rsa.c
+      rsa.c
+      1
+      0
+    
+    
+      8
+      49
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\sha.c
+      sha.c
+      1
+      0
+    
+    
+      8
+      50
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\sha256.c
+      sha256.c
+      1
+      0
+    
+    
+      8
+      51
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\sha512.c
+      sha512.c
+      1
+      0
+    
+    
+      8
+      52
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\tfm.c
+      tfm.c
       1
       0
     
diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvprojx b/IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvprojx
index d100a9f3c..180a81f8d 100644
--- a/IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvprojx
+++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/CryptBenchmark.uvprojx
@@ -508,190 +508,190 @@
         
           ::wolfSSL
           
-            
-              cyassl_MDK_ARM.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
-            
-            
-              ssl-dummy.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\ssl-dummy.c
-            
-            
-              time-STM32F2xx.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
-            
-            
-              aes.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c
-            
-            
-              arc4.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c
-            
-            
-              asm.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c
-            
-            
-              asn.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c
-            
-            
-              blake2b.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c
-            
-            
-              camellia.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c
-            
-            
-              coding.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c
-            
-            
-              compress.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c
-            
-            
-              des3.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c
-            
-            
-              dh.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c
-            
-            
-              dsa.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c
-            
-            
-              ecc.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c
-            
-            
-              ecc_fp.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c
-            
-            
-              error.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c
-            
-            
-              hc128.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c
-            
-            
-              hmac.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c
-            
-            
-              integer.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c
-            
-            
-              logging.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c
-            
-            
-              md2.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c
-            
-            
-              md4.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c
-            
-            
-              md5.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c
-            
-            
-              memory.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c
-            
-            
-              misc.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c
-            
-            
-              pwdbased.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c
-            
-            
-              rabbit.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c
-            
-            
-              random.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c
-            
-            
-              ripemd.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c
-            
-            
-              rsa.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c
-            
-            
-              sha.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c
-            
-            
-              sha256.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c
-            
-            
-              sha512.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c
-            
-            
-              tfm.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c
-            
             
               config-Crypt.h
               5
               RTE\wolfSSL\config-Crypt.h
             
             
-              config.h
-              5
-              RTE\wolfSSL\config.h
+              cyassl_MDK_ARM.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
+            
+            
+              ssl-dummy.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\ssl-dummy.c
+            
+            
+              time-STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
+            
+            
+              aes.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\aes.c
+            
+            
+              arc4.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\arc4.c
+            
+            
+              asm.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\asm.c
+            
+            
+              asn.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\asn.c
+            
+            
+              blake2b.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\blake2b.c
+            
+            
+              camellia.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\camellia.c
+            
+            
+              coding.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\coding.c
+            
+            
+              compress.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\compress.c
+            
+            
+              des3.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\des3.c
+            
+            
+              dh.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\dh.c
+            
+            
+              dsa.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\dsa.c
+            
+            
+              ecc.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\ecc.c
+            
+            
+              ecc_fp.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\ecc_fp.c
+            
+            
+              error.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\error.c
+            
+            
+              hc128.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\hc128.c
+            
+            
+              hmac.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\hmac.c
+            
+            
+              integer.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\integer.c
+            
+            
+              logging.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\logging.c
+            
+            
+              md2.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\md2.c
+            
+            
+              md4.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\md4.c
+            
+            
+              md5.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\md5.c
+            
+            
+              memory.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\memory.c
+            
+            
+              misc.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\misc.c
+            
+            
+              port.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\port.c
+            
+            
+              pwdbased.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\pwdbased.c
+            
+            
+              rabbit.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\rabbit.c
+            
+            
+              random.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\random.c
+            
+            
+              ripemd.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\ripemd.c
+            
+            
+              rsa.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\rsa.c
+            
+            
+              sha.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\sha.c
+            
+            
+              sha256.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\sha256.c
+            
+            
+              sha512.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\sha512.c
+            
+            
+              tfm.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\tfm.c
             
           
         
@@ -701,13 +701,13 @@
 
   
     
-      
+      
         
         
           
         
       
-      
+      
         
         
           
@@ -763,20 +763,20 @@
           
         
       
-      
-        
+      
+        
         
           
         
       
-      
-        
+      
+        
         
           
         
       
-      
-        
+      
+        
         
           
         
@@ -899,19 +899,17 @@
       
       
         RTE\wolfSSL\config-Crypt.h
-        
-        
+        
+        
         
           
         
       
       
-        RTE\wolfSSL\config.h
+        RTE\wolfSSL\config.h
         
         
-        
-          
-        
+        
       
     
   
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvoptx b/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvoptx
index 5df758980..4084d9ab1 100644
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvoptx
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvoptx
@@ -221,8 +221,8 @@
       0
       0
       0
-      0
-      0
+      57
+      80
       0
       .\main.c
       main.c
@@ -525,8 +525,8 @@
       0
       0
       0
-      0
-      0
+      163
+      169
       0
       RTE\Device\STM32F207IG\startup_stm32f2xx.s
       startup_stm32f2xx.s
@@ -801,685 +801,13 @@
 
   
     ::wolfSSL
-    0
+    1
     0
     0
     1
     
       9
       34
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
-      cyassl_MDK_ARM.c
-      1
-      0
-    
-    
-      9
-      35
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
-      time-STM32F2xx.c
-      1
-      0
-    
-    
-      9
-      36
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c
-      aes.c
-      1
-      0
-    
-    
-      9
-      37
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c
-      arc4.c
-      1
-      0
-    
-    
-      9
-      38
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c
-      asm.c
-      1
-      0
-    
-    
-      9
-      39
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c
-      asn.c
-      1
-      0
-    
-    
-      9
-      40
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c
-      blake2b.c
-      1
-      0
-    
-    
-      9
-      41
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c
-      camellia.c
-      1
-      0
-    
-    
-      9
-      42
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c
-      coding.c
-      1
-      0
-    
-    
-      9
-      43
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c
-      compress.c
-      1
-      0
-    
-    
-      9
-      44
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c
-      des3.c
-      1
-      0
-    
-    
-      9
-      45
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c
-      dh.c
-      1
-      0
-    
-    
-      9
-      46
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c
-      dsa.c
-      1
-      0
-    
-    
-      9
-      47
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c
-      ecc.c
-      1
-      0
-    
-    
-      9
-      48
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c
-      ecc_fp.c
-      1
-      0
-    
-    
-      9
-      49
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c
-      error.c
-      1
-      0
-    
-    
-      9
-      50
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c
-      hc128.c
-      1
-      0
-    
-    
-      9
-      51
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c
-      hmac.c
-      1
-      0
-    
-    
-      9
-      52
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c
-      integer.c
-      1
-      0
-    
-    
-      9
-      53
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c
-      logging.c
-      1
-      0
-    
-    
-      9
-      54
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c
-      md2.c
-      1
-      0
-    
-    
-      9
-      55
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c
-      md4.c
-      1
-      0
-    
-    
-      9
-      56
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c
-      md5.c
-      1
-      0
-    
-    
-      9
-      57
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c
-      memory.c
-      1
-      0
-    
-    
-      9
-      58
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c
-      misc.c
-      1
-      0
-    
-    
-      9
-      59
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c
-      pwdbased.c
-      1
-      0
-    
-    
-      9
-      60
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c
-      rabbit.c
-      1
-      0
-    
-    
-      9
-      61
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c
-      random.c
-      1
-      0
-    
-    
-      9
-      62
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c
-      ripemd.c
-      1
-      0
-    
-    
-      9
-      63
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c
-      rsa.c
-      1
-      0
-    
-    
-      9
-      64
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c
-      sha.c
-      1
-      0
-    
-    
-      9
-      65
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c
-      sha256.c
-      1
-      0
-    
-    
-      9
-      66
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c
-      sha512.c
-      1
-      0
-    
-    
-      9
-      67
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c
-      tfm.c
-      1
-      0
-    
-    
-      9
-      68
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\crl.c
-      crl.c
-      1
-      0
-    
-    
-      9
-      69
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\internal.c
-      internal.c
-      1
-      0
-    
-    
-      9
-      70
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\io.c
-      io.c
-      1
-      0
-    
-    
-      9
-      71
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\keys.c
-      keys.c
-      1
-      0
-    
-    
-      9
-      72
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ocsp.c
-      ocsp.c
-      1
-      0
-    
-    
-      9
-      73
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\sniffer.c
-      sniffer.c
-      1
-      0
-    
-    
-      9
-      74
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ssl.c
-      ssl.c
-      1
-      0
-    
-    
-      9
-      75
-      1
-      0
-      0
-      0
-      0
-      0
-      0
-      0
-      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\tls.c
-      tls.c
-      1
-      0
-    
-    
-      9
-      76
       5
       0
       0
@@ -1495,7 +823,7 @@
     
     
       9
-      77
+      35
       5
       0
       0
@@ -1511,8 +839,8 @@
     
     
       9
-      78
-      5
+      36
+      1
       0
       0
       0
@@ -1520,8 +848,680 @@
       0
       0
       0
-      RTE\wolfSSL\config.h
-      config.h
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
+      cyassl_MDK_ARM.c
+      1
+      0
+    
+    
+      9
+      37
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
+      time-STM32F2xx.c
+      1
+      0
+    
+    
+      9
+      38
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\aes.c
+      aes.c
+      1
+      0
+    
+    
+      9
+      39
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\arc4.c
+      arc4.c
+      1
+      0
+    
+    
+      9
+      40
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\asm.c
+      asm.c
+      1
+      0
+    
+    
+      9
+      41
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\asn.c
+      asn.c
+      1
+      0
+    
+    
+      9
+      42
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\blake2b.c
+      blake2b.c
+      1
+      0
+    
+    
+      9
+      43
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\camellia.c
+      camellia.c
+      1
+      0
+    
+    
+      9
+      44
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\coding.c
+      coding.c
+      1
+      0
+    
+    
+      9
+      45
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\compress.c
+      compress.c
+      1
+      0
+    
+    
+      9
+      46
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\des3.c
+      des3.c
+      1
+      0
+    
+    
+      9
+      47
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\dh.c
+      dh.c
+      1
+      0
+    
+    
+      9
+      48
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\dsa.c
+      dsa.c
+      1
+      0
+    
+    
+      9
+      49
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\ecc.c
+      ecc.c
+      1
+      0
+    
+    
+      9
+      50
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\ecc_fp.c
+      ecc_fp.c
+      1
+      0
+    
+    
+      9
+      51
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\error.c
+      error.c
+      1
+      0
+    
+    
+      9
+      52
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\hc128.c
+      hc128.c
+      1
+      0
+    
+    
+      9
+      53
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\hmac.c
+      hmac.c
+      1
+      0
+    
+    
+      9
+      54
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\integer.c
+      integer.c
+      1
+      0
+    
+    
+      9
+      55
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\logging.c
+      logging.c
+      1
+      0
+    
+    
+      9
+      56
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\md2.c
+      md2.c
+      1
+      0
+    
+    
+      9
+      57
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\md4.c
+      md4.c
+      1
+      0
+    
+    
+      9
+      58
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\md5.c
+      md5.c
+      1
+      0
+    
+    
+      9
+      59
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\memory.c
+      memory.c
+      1
+      0
+    
+    
+      9
+      60
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\misc.c
+      misc.c
+      1
+      0
+    
+    
+      9
+      61
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\port.c
+      port.c
+      1
+      0
+    
+    
+      9
+      62
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\pwdbased.c
+      pwdbased.c
+      1
+      0
+    
+    
+      9
+      63
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\rabbit.c
+      rabbit.c
+      1
+      0
+    
+    
+      9
+      64
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\random.c
+      random.c
+      1
+      0
+    
+    
+      9
+      65
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\ripemd.c
+      ripemd.c
+      1
+      0
+    
+    
+      9
+      66
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\rsa.c
+      rsa.c
+      1
+      0
+    
+    
+      9
+      67
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\sha.c
+      sha.c
+      1
+      0
+    
+    
+      9
+      68
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\sha256.c
+      sha256.c
+      1
+      0
+    
+    
+      9
+      69
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\sha512.c
+      sha512.c
+      1
+      0
+    
+    
+      9
+      70
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\tfm.c
+      tfm.c
+      1
+      0
+    
+    
+      9
+      71
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\crl.c
+      crl.c
+      1
+      0
+    
+    
+      9
+      72
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\internal.c
+      internal.c
+      1
+      0
+    
+    
+      9
+      73
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\io.c
+      io.c
+      1
+      0
+    
+    
+      9
+      74
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\keys.c
+      keys.c
+      1
+      0
+    
+    
+      9
+      75
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\ocsp.c
+      ocsp.c
+      1
+      0
+    
+    
+      9
+      76
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\sniffer.c
+      sniffer.c
+      1
+      0
+    
+    
+      9
+      77
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\ssl.c
+      ssl.c
+      1
+      0
+    
+    
+      9
+      78
+      1
+      0
+      0
+      0
+      0
+      0
+      0
+      0
+      C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\tls.c
+      tls.c
       1
       0
     
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvprojx b/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvprojx
index d45fdec8a..05a58e1ec 100644
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvprojx
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvprojx
@@ -355,7 +355,7 @@
             0
             
               
-              HAVE_CONFIG_H  __DBG_ITM   __RTX MDK_CONF_CYASSL  CYASSL_STM32F2xx
+              HAVE_CONFIG_H  MDK_CONF_CYASSL
               
               
             
@@ -603,216 +603,6 @@
         
           ::wolfSSL
           
-            
-              cyassl_MDK_ARM.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
-            
-            
-              time-STM32F2xx.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
-            
-            
-              aes.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c
-            
-            
-              arc4.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c
-            
-            
-              asm.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c
-            
-            
-              asn.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c
-            
-            
-              blake2b.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c
-            
-            
-              camellia.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c
-            
-            
-              coding.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c
-            
-            
-              compress.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c
-            
-            
-              des3.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c
-            
-            
-              dh.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c
-            
-            
-              dsa.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c
-            
-            
-              ecc.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c
-            
-            
-              ecc_fp.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c
-            
-            
-              error.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c
-            
-            
-              hc128.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c
-            
-            
-              hmac.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c
-            
-            
-              integer.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c
-            
-            
-              logging.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c
-            
-            
-              md2.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c
-            
-            
-              md4.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c
-            
-            
-              md5.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c
-            
-            
-              memory.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c
-            
-            
-              misc.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c
-            
-            
-              pwdbased.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c
-            
-            
-              rabbit.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c
-            
-            
-              random.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c
-            
-            
-              ripemd.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c
-            
-            
-              rsa.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c
-            
-            
-              sha.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c
-            
-            
-              sha256.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c
-            
-            
-              sha512.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c
-            
-            
-              tfm.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c
-            
-            
-              crl.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\crl.c
-            
-            
-              internal.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\internal.c
-            
-            
-              io.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\io.c
-            
-            
-              keys.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\keys.c
-            
-            
-              ocsp.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ocsp.c
-            
-            
-              sniffer.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\sniffer.c
-            
-            
-              ssl.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ssl.c
-            
-            
-              tls.c
-              1
-              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\tls.c
-            
             
               config-Crypt.h
               5
@@ -824,9 +614,219 @@
               RTE\wolfSSL\config-CyaSSL.h
             
             
-              config.h
-              5
-              RTE\wolfSSL\config.h
+              cyassl_MDK_ARM.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c
+            
+            
+              time-STM32F2xx.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c
+            
+            
+              aes.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\aes.c
+            
+            
+              arc4.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\arc4.c
+            
+            
+              asm.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\asm.c
+            
+            
+              asn.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\asn.c
+            
+            
+              blake2b.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\blake2b.c
+            
+            
+              camellia.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\camellia.c
+            
+            
+              coding.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\coding.c
+            
+            
+              compress.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\compress.c
+            
+            
+              des3.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\des3.c
+            
+            
+              dh.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\dh.c
+            
+            
+              dsa.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\dsa.c
+            
+            
+              ecc.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\ecc.c
+            
+            
+              ecc_fp.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\ecc_fp.c
+            
+            
+              error.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\error.c
+            
+            
+              hc128.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\hc128.c
+            
+            
+              hmac.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\hmac.c
+            
+            
+              integer.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\integer.c
+            
+            
+              logging.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\logging.c
+            
+            
+              md2.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\md2.c
+            
+            
+              md4.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\md4.c
+            
+            
+              md5.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\md5.c
+            
+            
+              memory.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\memory.c
+            
+            
+              misc.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\misc.c
+            
+            
+              port.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\port.c
+            
+            
+              pwdbased.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\pwdbased.c
+            
+            
+              rabbit.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\rabbit.c
+            
+            
+              random.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\random.c
+            
+            
+              ripemd.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\ripemd.c
+            
+            
+              rsa.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\rsa.c
+            
+            
+              sha.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\sha.c
+            
+            
+              sha256.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\sha256.c
+            
+            
+              sha512.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\sha512.c
+            
+            
+              tfm.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\ctaocrypt\src\tfm.c
+            
+            
+              crl.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\crl.c
+            
+            
+              internal.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\internal.c
+            
+            
+              io.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\io.c
+            
+            
+              keys.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\keys.c
+            
+            
+              ocsp.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\ocsp.c
+            
+            
+              sniffer.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\sniffer.c
+            
+            
+              ssl.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\ssl.c
+            
+            
+              tls.c
+              1
+              C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.1\cyassl\src\tls.c
             
           
         
@@ -836,25 +836,25 @@
 
   
     
-      
+      
         
         
           
         
       
-      
+      
         
         
           
         
       
-      
+      
         
         
           
         
       
-      
+      
         
         
           
@@ -958,20 +958,20 @@
           
         
       
-      
-        
+      
+        
         
           
         
       
-      
-        
+      
+        
         
           
         
       
-      
-        
+      
+        
         
           
         
@@ -1096,27 +1096,25 @@
       
       
         RTE\wolfSSL\config-Crypt.h
-        
-        
+        
+        
         
           
         
       
       
         RTE\wolfSSL\config-CyaSSL.h
-        
-        
+        
+        
         
           
         
       
       
-        RTE\wolfSSL\config.h
+        RTE\wolfSSL\config.h
         
         
-        
-          
-        
+        
       
     
   
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config.h
index 4c8fcb01c..5115b2d1a 100644
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config.h
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config.h
@@ -22,6 +22,7 @@
 #define __CORTEX_M3__
 #define CYASSL_MDK_ARM
 #define CYASSL_MDK5
+#define CYASSL_CMSIS_RTOS
 
 #define NO_WRITEV
 #define NO_CYASSL_DIR
@@ -31,6 +32,8 @@
 #define HAVE_NULL_CIPHER
 #define NO_MAIN_DRIVER
 
+#define CYASSL_STM32F2xx
+
 #if  defined(MDK_CONF_CYASSL)
 #define CYASSL_MDK_SHELL
 #include "config-Crypt.h"
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c
index fb3efe6cc..2fd81fe2a 100644
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c
@@ -558,7 +558,7 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
     if (sendGET) {
         printf("SSL connect ok, sending GET...\n");
         msgSz = 28;
-        strncpy(msg, "GET /index.html HTTP/1.0\r\n\r\n", msgSz);
+        strncpy(msg, "GET / HTTP/1.0\r\n\r\n", msgSz);
         msg[msgSz] = '\0';
     }
     if (CyaSSL_write(ssl, msg, msgSz) != msgSz)

From 25e2117a84dfd552965aceebce19a218085604f6 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Wed, 6 Nov 2013 11:26:26 +0900
Subject: [PATCH 10/43] NL code fix

---
 IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c             |  16 +-
 IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c        |  10 +-
 IDE/MDK-ARM/MDK-ARM/config/File_Config.c      | 802 +++++++++---------
 .../Projects/CryptBenchmark/benchmark.c       |  74 +-
 IDE/MDK5-ARM/Projects/CryptTest/test.c        | 421 +++++++--
 5 files changed, 842 insertions(+), 481 deletions(-)

diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c
index 7a39b51f4..4979473ee 100644
--- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c
+++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c
@@ -122,7 +122,7 @@ void main_task (void)
     /************************************/
     /*** USER APPLICATION HERE        ***/
     /************************************/
-    printf("USER LOGIC STARTED\n") ;
+    printf("USER LOGIC STARTED\n") ;
 	
     #endif 
 
@@ -143,18 +143,18 @@ void main_task (void)
 
 
 /*** main entry ***/
-extern void init_time(void) ;
-extern void 	SystemInit(void);
-
+extern void init_time(void) ;
+extern void 	SystemInit(void);
+
 int main() {
-
-  	SystemInit();  
+
+  	SystemInit();  
 	  SER_Init() ;
     #if !defined(NO_FILESYSTEM)
     init_card () ;                                    /* initializing SD card */
     #endif
-
-    init_time() ;
+
+    init_time() ;
 
     
     #if defined(DEBUG_CYASSL)
diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c
index 024d10373..2d407b134 100644
--- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c
+++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c
@@ -45,9 +45,9 @@ int CyaSSL_get_using_nonblock(CYASSL* ssl)
     CYASSL_LEAVE("CyaSSL_get_using_nonblock", ssl->options.usingNonblock);
     return ssl->options.usingNonblock;
 }
-
-Signer* GetCAByName(void* vp, byte* hash)
-{
-		Signer * ca ;
-    return(ca) ;
+
+Signer* GetCAByName(void* vp, byte* hash)
+{
+		Signer * ca ;
+    return(ca) ;
 }
diff --git a/IDE/MDK-ARM/MDK-ARM/config/File_Config.c b/IDE/MDK-ARM/MDK-ARM/config/File_Config.c
index 96b6dada2..9a162ba88 100644
--- a/IDE/MDK-ARM/MDK-ARM/config/File_Config.c
+++ b/IDE/MDK-ARM/MDK-ARM/config/File_Config.c
@@ -1,401 +1,401 @@
-/*----------------------------------------------------------------------------
- *      RL-ARM - FlashFS
- *----------------------------------------------------------------------------
- *      Name:    FILE_CONFIG.C
- *      Purpose: Configuration of RL FlashFS by user
- *      Rev.:    V4.70
- *----------------------------------------------------------------------------
- *      This code is part of the RealView Run-Time Library.
- *      Copyright (c) 2004-2013 KEIL - An ARM Company. All rights reserved.
- *---------------------------------------------------------------------------*/
- 
-#include 
-
-//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
-//
-// File System
-// ==============
-//  Define File System global parameters
-
-//   Number of open files <4-16>
-//   Define number of files that can be
-//   opened at the same time.
-//   Default: 8
-#define N_FILES     6
-
-//   FAT Name Cache Size <0-1000000>
-//   Define number of cached FAT file or directory names.
-//   48 bytes of RAM is required for each cached name.
-#define FAT_NAME_CACNT   0
-
-//   Relocate FAT Name Cache Buffer
-//   Locate Cache Buffer at a specific address.
-#define FAT_NAME_RELOC   0
-
-//   Base address <0x0000-0xFFFFFE00:0x200>
-//   Define the Cache buffer base address.
-#define FAT_NAME_CADR    0x60000000
-
-//   
-//   CPU Clock Frequency [Hz]<0-1000000000>
-//   Define the CPU Clock frequency used for
-//   flash programming and erasing.
-#define CPU_CLK     180000000
-
-// 
-// Flash Drive
-// ==============
-// Enable Embedded Flash Drive [F:]
-#define FL0_EN      0
-
-//   Base address <0x0-0xFFFFF000:0x1000>
-//   Define the target device Base address
-//   Default: 0x80000000
-#define FL0_BADR    0x80000000
-
-//   Device Size <0x4000-0xFFFFF000:0x4000>
-//   Define the size of Flash device in bytes
-//   Default: 0x100000 (1MB)
-#define FL0_SIZE    0x0200000
-
-//   Content of Erased Memory <0=>0x00 <0xFF=>0xFF
-//   Define the initial value for erased Flash data
-//   Default: 0xFF
-#define FL0_INITV   0xFF
-
-//   Device Description file
-//   Specify a file name with a relative path
-//   Default: FS_FlashDev.h
-#define FL0_HFILE   "FS_FlashDev.h"
-
-//   Default Drive [F:]
-//   Used when Drive letter not specified
-#define FL0_DEF     1
-
-// 
-// SPI Flash Drive
-// ==================
-// Enable SPI Flash Drive [S:]
-#define SF0_EN      0
-
-//   Device Size <0x10000-0xFFFFF000:0x8000>
-//   Define the size of SPI Flash device in bytes
-//   Default: 0x100000 (1MB)
-#define SF0_SIZE    0x0200000
-
-//   Content of Erased Memory <0=>0x00 <0xFF=>0xFF
-//   Define the initial value for erased Flash data
-//   Default: 0xFF
-#define SF0_INITV   0xFF
-
-//   Device Description file
-//   Specify a file name with a relative path
-//   Default: FS_SPI_FlashDev.h
-#define SF0_HFILE   "FS_SPI_FlashDev.h"
-
-//   Default Drive [S:]
-//   Used when Drive letter not specified
-#define SF0_DEF     0
-
-// 
-// RAM Drive
-// ============
-// Enable Embedded RAM Drive  [R:]
-#define RAM0_EN     0
-
-//   Device Size <0x4000-0xFFFFF000:0x4000>
-//   Define the size of RAM device in bytes
-//   Default: 0x40000
-#define RAM0_SIZE   0x004000
-
-//   Number of Sectors <8=>8 <16=>16 <32=>32 <64=>64 <128=>128
-//   Define number of virtual sectors for RAM device
-//   Default: 32
-#define RAM0_NSECT  64
-
-//   Relocate Device Buffer
-//   Locate RAM Device Buffer at a specific address.
-//   If not enabled, the linker selects base address.
-#define RAM0_RELOC  1
-
-//   Base address <0x0-0xFFFFF000:0x1000>
-//   Define the target device Base address.
-//   Default: 0x81000000
-#define RAM0_BADR   0x81010000
-
-//   
-//   Default Drive [R:]
-//   Used when Drive letter not specified
-#define RAM0_DEF    0
-
-// 
-// Memory Card Drive 0
-// ======================
-// Enable Memory Card Drive  [M0:]
-#define MC0_EN      1
-
-//   Bus Mode <0=>SD-Native <1=>SPI
-//   Define Memory Card bus interface mode.
-//   SD-Native mode needs MCI peripheral.
-//   SPI mode uses SD Card in SPI mode.
-#define MC0_SPI     0
-          
-//   File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
-//                        <8=>8 KB <16=>16 KB <32=>32 KB
-//   Define System Cache buffer size for file IO. 
-//   Increase this number for faster r/w access.
-//   Default: 4 kB
-#define MC0_CASZ    4
-
-//   Relocate Cache Buffer
-//   Locate Cache Buffer at a specific address.
-//   Some devices like NXP LPC23xx require a Cache buffer
-//   for DMA transfer located at specific address.
-#define MC0_RELOC   0
-
-//   Base address <0x0000-0xFFFFFE00:0x200>
-//   Define the Cache buffer base address.
-//   For LPC23xx/24xx devices this is USB RAM
-//   starting at 0x7FD00000.
-#define MC0_CADR    0x7FD00000
-
-//   
-//   FAT Journal
-//   Enable FAT Journal in order to guarantee
-//   fail-safe FAT file system operation.
-#define MC0_FSJ     0
-
-//   Default Drive [M0:]
-//   Used when Drive letter not specified
-#define MC0_DEF     1
-
-// 
-// Memory Card Drive 1
-// ======================
-// Enable Memory Card Drive  [M1:]
-#define MC1_EN      0
-
-//   Bus Mode <0=>SD-Native <1=>SPI
-//   Define Memory Card bus interface mode.
-//   SD-Native mode needs MCI peripheral.
-//   SPI mode uses SD Card in SPI mode.
-#define MC1_SPI     1
-          
-//   File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
-//                        <8=>8 KB <16=>16 KB <32=>32 KB
-//   Define System Cache buffer size for file IO. 
-//   Increase this number for faster r/w access.
-//   Default: 4 kB
-#define MC1_CASZ    0
-
-//   Relocate Cache Buffer
-//   Locate Cache Buffer at a specific address.
-//   Some devices like NXP LPC23xx require a Cache buffer
-//   for DMA transfer located at specific address.
-#define MC1_RELOC   0
-
-//   Base address <0x0000-0xFFFFFE00:0x200>
-//   Define the Cache buffer base address.
-//   For LPC23xx/24xx devices this is USB RAM
-//   starting at 0x7FD00000.
-#define MC1_CADR    0x7FD00000
-
-//   
-//   FAT Journal
-//   Enable FAT Journal in order to guarantee
-//   fail-safe FAT file system operation.
-#define MC1_FSJ     0
-
-//   Default Drive [M1:]
-//   Used when Drive letter not specified
-#define MC1_DEF     0
-
-// 
-// USB Flash Drive 0
-// ====================
-// Enable USB Flash Drive  [U0:]
-#define USB0_EN     0
-
-//   File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
-//                        <8=>8 KB <16=>16 KB <32=>32 KB
-//   Define System Cache buffer size for file IO. 
-//   Increase this number for faster r/w access.
-//   Default: 4 kB
-#define USB0_CASZ   8
-
-//   FAT Journal
-//   Enable FAT Journal in order to guarantee
-//   fail-safe FAT file system operation.
-#define USB0_FSJ    0
-
-//   Default Drive [U0:]
-//   Used when Drive letter not specified
-#define USB0_DEF    0
-
-// 
-// USB Flash Drive 1
-// ====================
-// Enable USB Flash Drive  [U1:]
-#define USB1_EN     0
-
-//   File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
-//                        <8=>8 KB <16=>16 KB <32=>32 KB
-//   Define System Cache buffer size for file IO. 
-//   Increase this number for faster r/w access.
-//   Default: 4 kB
-#define USB1_CASZ   8
-
-//   FAT Journal
-//   Enable FAT Journal in order to guarantee
-//   fail-safe FAT file system operation.
-#define USB1_FSJ    0
-
-//   Default Drive [U1:]
-//   Used when Drive letter not specified
-#define USB1_DEF    0
-
-// 
-// NAND Flash Drive 0
-// ===================
-// Enable NAND Flash Drive  [N0:]
-#define NAND0_EN    0
-
-//   Page size  <528=> 512 + 16 bytes
-//                 <2112=>2048 + 64 bytes
-//                 <4224=>4096 + 128 bytes
-//                 <8448=>8192 + 256 bytes
-//   Define program Page size in bytes (User + Spare area).
-#define NAND0_PGSZ  2112
-
-//   Block Size <8=>8 pages <16=>16 pages <32=>32 pages
-//                 <64=>64 pages <128=>128 pages <256=>256 pages
-//   Define number of pages in a block.
-#define NAND0_PGCNT 64
-
-//   Device Size [blocks] <512-32768>
-//   Define number of blocks in NAND Flash device.
-#define NAND0_BLCNT 4096
-
-//   Page Caching <0=>OFF <1=>1 page <2=>2 pages <4=>4 pages
-//                   <8=>8 pages <16=>16 pages <32=>32 pages
-//   Define number of cached Pages.
-//   Default: 4 pages
-#define NAND0_CAPG  2
-
-//   Block Indexing <0=>OFF <1=>1 block <2=>2 blocks <4=>4 blocks
-//                     <8=>8 blocks <16=>16 blocks <32=>32 blocks
-//                     <64=>64 blocks <128=>128 blocks <256=>256 blocks
-//   Define number of indexed Flash Blocks.
-//   Increase this number for better performance.
-//   Default: 16 blocks
-#define NAND0_CABL  16
-
-//   Software ECC <0=>None <1=>Hamming (SLC)
-//   Enable software ECC calculation only,
-//   if not supported by hardware.
-#define NAND0_SWECC 1
-
-//   File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
-//                        <8=>8 KB <16=>16 KB <32=>32 KB
-//   Define System Cache buffer size for file IO. 
-//   Increase this number for faster r/w access.
-//   Default: 4 kB
-#define NAND0_CASZ  4
-
-//   Relocate Cache Buffers
-//   Use this option to locate Cache buffers 
-//   at specific address in RAM or SDRAM.
-#define NAND0_RELOC 0
-
-//     Base address <0x0000-0xFFFFFE00:0x200>
-//     Define base address for Cache Buffers.
-#define NAND0_CADR  0x80000000
-
-//   
-//   FAT Journal
-//   Enable FAT Journal in order to guarantee
-//   fail-safe FAT file system operation.
-#define NAND0_FSJ     0
-
-//   Default Drive [N0:]
-//   Used when Drive letter not specified
-#define NAND0_DEF   0
-
-// 
-// NAND Flash Drive 1
-// ===================
-// Enable NAND Flash Drive  [N1:]
-#define NAND1_EN    0
-
-//   Page size  <528=> 512 + 16 bytes
-//                 <2112=>2048 + 64 bytes
-//                 <4224=>4096 + 128 bytes
-//                 <8448=>8192 + 256 bytes
-//   Define program Page size in bytes (User + Spare area).
-#define NAND1_PGSZ  2112
-
-//   Block Size <8=>8 pages <16=>16 pages <32=>32 pages
-//                 <64=>64 pages <128=>128 pages <256=>256 pages
-//   Define number of pages in a block.
-#define NAND1_PGCNT 32
-
-//   Device Size [blocks] <512-32768>
-//   Define number of blocks in NAND Flash device.
-#define NAND1_BLCNT 512
-
-//   Page Caching <0=>OFF <1=>1 page <2=>2 pages <4=>4 pages
-//                   <8=>8 pages <16=>16 pages <32=>32 pages
-//   Define number of cached Pages.
-//   Default: 4 pages
-#define NAND1_CAPG  4
-
-//   Block Indexing <0=>OFF <1=>1 block <2=>2 blocks <4=>4 blocks
-//                     <8=>8 blocks <16=>16 blocks <32=>32 blocks
-//                     <64=>64 blocks <128=>128 blocks <256=>256 blocks
-//   Define number of indexed Flash Blocks.
-//   Increase this number for better performance.
-//   Default: 16 blocks
-#define NAND1_CABL  16
-
-//   Software ECC <0=>None <1=>Hamming (SLC)
-//   Enable software ECC calculation only,
-//   if not supported by hardware.
-#define NAND1_SWECC 0
-
-//   File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
-//                        <8=>8 KB <16=>16 KB <32=>32 KB
-//   Define System Cache buffer size for file IO.
-//   Increase this number for faster r/w access.
-//   Default: 4 kB
-#define NAND1_CASZ  4
-
-//   Relocate Cache Buffers
-//   Use this option to locate Cache buffers
-//   at specific address in RAM or SDRAM.
-#define NAND1_RELOC 0
-
-//     Base address <0x0000-0xFFFFFE00:0x200>
-//     Define base address for Cache Buffers.
-#define NAND1_CADR  0x80000000
-
-//   
-//   FAT Journal
-//   Enable FAT Journal in order to guarantee
-//   fail-safe FAT file system operation.
-#define NAND1_FSJ     0
-
-//   Default Drive [N1:]
-//   Used when Drive letter not specified
-#define NAND1_DEF   0
-
-// 
-
-//------------- <<< end of configuration section >>> -----------------------
-
-#ifndef  __NO_FILE_LIB_C
-#include 
-#endif
-
-/*----------------------------------------------------------------------------
- * end of file
- *---------------------------------------------------------------------------*/
+/*----------------------------------------------------------------------------
+ *      RL-ARM - FlashFS
+ *----------------------------------------------------------------------------
+ *      Name:    FILE_CONFIG.C
+ *      Purpose: Configuration of RL FlashFS by user
+ *      Rev.:    V4.70
+ *----------------------------------------------------------------------------
+ *      This code is part of the RealView Run-Time Library.
+ *      Copyright (c) 2004-2013 KEIL - An ARM Company. All rights reserved.
+ *---------------------------------------------------------------------------*/
+ 
+#include 
+
+//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
+//
+// File System
+// ==============
+//  Define File System global parameters
+
+//   Number of open files <4-16>
+//   Define number of files that can be
+//   opened at the same time.
+//   Default: 8
+#define N_FILES     6
+
+//   FAT Name Cache Size <0-1000000>
+//   Define number of cached FAT file or directory names.
+//   48 bytes of RAM is required for each cached name.
+#define FAT_NAME_CACNT   0
+
+//   Relocate FAT Name Cache Buffer
+//   Locate Cache Buffer at a specific address.
+#define FAT_NAME_RELOC   0
+
+//   Base address <0x0000-0xFFFFFE00:0x200>
+//   Define the Cache buffer base address.
+#define FAT_NAME_CADR    0x60000000
+
+//   
+//   CPU Clock Frequency [Hz]<0-1000000000>
+//   Define the CPU Clock frequency used for
+//   flash programming and erasing.
+#define CPU_CLK     180000000
+
+// 
+// Flash Drive
+// ==============
+// Enable Embedded Flash Drive [F:]
+#define FL0_EN      0
+
+//   Base address <0x0-0xFFFFF000:0x1000>
+//   Define the target device Base address
+//   Default: 0x80000000
+#define FL0_BADR    0x80000000
+
+//   Device Size <0x4000-0xFFFFF000:0x4000>
+//   Define the size of Flash device in bytes
+//   Default: 0x100000 (1MB)
+#define FL0_SIZE    0x0200000
+
+//   Content of Erased Memory <0=>0x00 <0xFF=>0xFF
+//   Define the initial value for erased Flash data
+//   Default: 0xFF
+#define FL0_INITV   0xFF
+
+//   Device Description file
+//   Specify a file name with a relative path
+//   Default: FS_FlashDev.h
+#define FL0_HFILE   "FS_FlashDev.h"
+
+//   Default Drive [F:]
+//   Used when Drive letter not specified
+#define FL0_DEF     1
+
+// 
+// SPI Flash Drive
+// ==================
+// Enable SPI Flash Drive [S:]
+#define SF0_EN      0
+
+//   Device Size <0x10000-0xFFFFF000:0x8000>
+//   Define the size of SPI Flash device in bytes
+//   Default: 0x100000 (1MB)
+#define SF0_SIZE    0x0200000
+
+//   Content of Erased Memory <0=>0x00 <0xFF=>0xFF
+//   Define the initial value for erased Flash data
+//   Default: 0xFF
+#define SF0_INITV   0xFF
+
+//   Device Description file
+//   Specify a file name with a relative path
+//   Default: FS_SPI_FlashDev.h
+#define SF0_HFILE   "FS_SPI_FlashDev.h"
+
+//   Default Drive [S:]
+//   Used when Drive letter not specified
+#define SF0_DEF     0
+
+// 
+// RAM Drive
+// ============
+// Enable Embedded RAM Drive  [R:]
+#define RAM0_EN     0
+
+//   Device Size <0x4000-0xFFFFF000:0x4000>
+//   Define the size of RAM device in bytes
+//   Default: 0x40000
+#define RAM0_SIZE   0x004000
+
+//   Number of Sectors <8=>8 <16=>16 <32=>32 <64=>64 <128=>128
+//   Define number of virtual sectors for RAM device
+//   Default: 32
+#define RAM0_NSECT  64
+
+//   Relocate Device Buffer
+//   Locate RAM Device Buffer at a specific address.
+//   If not enabled, the linker selects base address.
+#define RAM0_RELOC  1
+
+//   Base address <0x0-0xFFFFF000:0x1000>
+//   Define the target device Base address.
+//   Default: 0x81000000
+#define RAM0_BADR   0x81010000
+
+//   
+//   Default Drive [R:]
+//   Used when Drive letter not specified
+#define RAM0_DEF    0
+
+// 
+// Memory Card Drive 0
+// ======================
+// Enable Memory Card Drive  [M0:]
+#define MC0_EN      1
+
+//   Bus Mode <0=>SD-Native <1=>SPI
+//   Define Memory Card bus interface mode.
+//   SD-Native mode needs MCI peripheral.
+//   SPI mode uses SD Card in SPI mode.
+#define MC0_SPI     0
+          
+//   File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
+//                        <8=>8 KB <16=>16 KB <32=>32 KB
+//   Define System Cache buffer size for file IO. 
+//   Increase this number for faster r/w access.
+//   Default: 4 kB
+#define MC0_CASZ    4
+
+//   Relocate Cache Buffer
+//   Locate Cache Buffer at a specific address.
+//   Some devices like NXP LPC23xx require a Cache buffer
+//   for DMA transfer located at specific address.
+#define MC0_RELOC   0
+
+//   Base address <0x0000-0xFFFFFE00:0x200>
+//   Define the Cache buffer base address.
+//   For LPC23xx/24xx devices this is USB RAM
+//   starting at 0x7FD00000.
+#define MC0_CADR    0x7FD00000
+
+//   
+//   FAT Journal
+//   Enable FAT Journal in order to guarantee
+//   fail-safe FAT file system operation.
+#define MC0_FSJ     0
+
+//   Default Drive [M0:]
+//   Used when Drive letter not specified
+#define MC0_DEF     1
+
+// 
+// Memory Card Drive 1
+// ======================
+// Enable Memory Card Drive  [M1:]
+#define MC1_EN      0
+
+//   Bus Mode <0=>SD-Native <1=>SPI
+//   Define Memory Card bus interface mode.
+//   SD-Native mode needs MCI peripheral.
+//   SPI mode uses SD Card in SPI mode.
+#define MC1_SPI     1
+          
+//   File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
+//                        <8=>8 KB <16=>16 KB <32=>32 KB
+//   Define System Cache buffer size for file IO. 
+//   Increase this number for faster r/w access.
+//   Default: 4 kB
+#define MC1_CASZ    0
+
+//   Relocate Cache Buffer
+//   Locate Cache Buffer at a specific address.
+//   Some devices like NXP LPC23xx require a Cache buffer
+//   for DMA transfer located at specific address.
+#define MC1_RELOC   0
+
+//   Base address <0x0000-0xFFFFFE00:0x200>
+//   Define the Cache buffer base address.
+//   For LPC23xx/24xx devices this is USB RAM
+//   starting at 0x7FD00000.
+#define MC1_CADR    0x7FD00000
+
+//   
+//   FAT Journal
+//   Enable FAT Journal in order to guarantee
+//   fail-safe FAT file system operation.
+#define MC1_FSJ     0
+
+//   Default Drive [M1:]
+//   Used when Drive letter not specified
+#define MC1_DEF     0
+
+// 
+// USB Flash Drive 0
+// ====================
+// Enable USB Flash Drive  [U0:]
+#define USB0_EN     0
+
+//   File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
+//                        <8=>8 KB <16=>16 KB <32=>32 KB
+//   Define System Cache buffer size for file IO. 
+//   Increase this number for faster r/w access.
+//   Default: 4 kB
+#define USB0_CASZ   8
+
+//   FAT Journal
+//   Enable FAT Journal in order to guarantee
+//   fail-safe FAT file system operation.
+#define USB0_FSJ    0
+
+//   Default Drive [U0:]
+//   Used when Drive letter not specified
+#define USB0_DEF    0
+
+// 
+// USB Flash Drive 1
+// ====================
+// Enable USB Flash Drive  [U1:]
+#define USB1_EN     0
+
+//   File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
+//                        <8=>8 KB <16=>16 KB <32=>32 KB
+//   Define System Cache buffer size for file IO. 
+//   Increase this number for faster r/w access.
+//   Default: 4 kB
+#define USB1_CASZ   8
+
+//   FAT Journal
+//   Enable FAT Journal in order to guarantee
+//   fail-safe FAT file system operation.
+#define USB1_FSJ    0
+
+//   Default Drive [U1:]
+//   Used when Drive letter not specified
+#define USB1_DEF    0
+
+// 
+// NAND Flash Drive 0
+// ===================
+// Enable NAND Flash Drive  [N0:]
+#define NAND0_EN    0
+
+//   Page size  <528=> 512 + 16 bytes
+//                 <2112=>2048 + 64 bytes
+//                 <4224=>4096 + 128 bytes
+//                 <8448=>8192 + 256 bytes
+//   Define program Page size in bytes (User + Spare area).
+#define NAND0_PGSZ  2112
+
+//   Block Size <8=>8 pages <16=>16 pages <32=>32 pages
+//                 <64=>64 pages <128=>128 pages <256=>256 pages
+//   Define number of pages in a block.
+#define NAND0_PGCNT 64
+
+//   Device Size [blocks] <512-32768>
+//   Define number of blocks in NAND Flash device.
+#define NAND0_BLCNT 4096
+
+//   Page Caching <0=>OFF <1=>1 page <2=>2 pages <4=>4 pages
+//                   <8=>8 pages <16=>16 pages <32=>32 pages
+//   Define number of cached Pages.
+//   Default: 4 pages
+#define NAND0_CAPG  2
+
+//   Block Indexing <0=>OFF <1=>1 block <2=>2 blocks <4=>4 blocks
+//                     <8=>8 blocks <16=>16 blocks <32=>32 blocks
+//                     <64=>64 blocks <128=>128 blocks <256=>256 blocks
+//   Define number of indexed Flash Blocks.
+//   Increase this number for better performance.
+//   Default: 16 blocks
+#define NAND0_CABL  16
+
+//   Software ECC <0=>None <1=>Hamming (SLC)
+//   Enable software ECC calculation only,
+//   if not supported by hardware.
+#define NAND0_SWECC 1
+
+//   File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
+//                        <8=>8 KB <16=>16 KB <32=>32 KB
+//   Define System Cache buffer size for file IO. 
+//   Increase this number for faster r/w access.
+//   Default: 4 kB
+#define NAND0_CASZ  4
+
+//   Relocate Cache Buffers
+//   Use this option to locate Cache buffers 
+//   at specific address in RAM or SDRAM.
+#define NAND0_RELOC 0
+
+//     Base address <0x0000-0xFFFFFE00:0x200>
+//     Define base address for Cache Buffers.
+#define NAND0_CADR  0x80000000
+
+//   
+//   FAT Journal
+//   Enable FAT Journal in order to guarantee
+//   fail-safe FAT file system operation.
+#define NAND0_FSJ     0
+
+//   Default Drive [N0:]
+//   Used when Drive letter not specified
+#define NAND0_DEF   0
+
+// 
+// NAND Flash Drive 1
+// ===================
+// Enable NAND Flash Drive  [N1:]
+#define NAND1_EN    0
+
+//   Page size  <528=> 512 + 16 bytes
+//                 <2112=>2048 + 64 bytes
+//                 <4224=>4096 + 128 bytes
+//                 <8448=>8192 + 256 bytes
+//   Define program Page size in bytes (User + Spare area).
+#define NAND1_PGSZ  2112
+
+//   Block Size <8=>8 pages <16=>16 pages <32=>32 pages
+//                 <64=>64 pages <128=>128 pages <256=>256 pages
+//   Define number of pages in a block.
+#define NAND1_PGCNT 32
+
+//   Device Size [blocks] <512-32768>
+//   Define number of blocks in NAND Flash device.
+#define NAND1_BLCNT 512
+
+//   Page Caching <0=>OFF <1=>1 page <2=>2 pages <4=>4 pages
+//                   <8=>8 pages <16=>16 pages <32=>32 pages
+//   Define number of cached Pages.
+//   Default: 4 pages
+#define NAND1_CAPG  4
+
+//   Block Indexing <0=>OFF <1=>1 block <2=>2 blocks <4=>4 blocks
+//                     <8=>8 blocks <16=>16 blocks <32=>32 blocks
+//                     <64=>64 blocks <128=>128 blocks <256=>256 blocks
+//   Define number of indexed Flash Blocks.
+//   Increase this number for better performance.
+//   Default: 16 blocks
+#define NAND1_CABL  16
+
+//   Software ECC <0=>None <1=>Hamming (SLC)
+//   Enable software ECC calculation only,
+//   if not supported by hardware.
+#define NAND1_SWECC 0
+
+//   File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB
+//                        <8=>8 KB <16=>16 KB <32=>32 KB
+//   Define System Cache buffer size for file IO.
+//   Increase this number for faster r/w access.
+//   Default: 4 kB
+#define NAND1_CASZ  4
+
+//   Relocate Cache Buffers
+//   Use this option to locate Cache buffers
+//   at specific address in RAM or SDRAM.
+#define NAND1_RELOC 0
+
+//     Base address <0x0000-0xFFFFFE00:0x200>
+//     Define base address for Cache Buffers.
+#define NAND1_CADR  0x80000000
+
+//   
+//   FAT Journal
+//   Enable FAT Journal in order to guarantee
+//   fail-safe FAT file system operation.
+#define NAND1_FSJ     0
+
+//   Default Drive [N1:]
+//   Used when Drive letter not specified
+#define NAND1_DEF   0
+
+// 
+
+//------------- <<< end of configuration section >>> -----------------------
+
+#ifndef  __NO_FILE_LIB_C
+#include 
+#endif
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/benchmark.c b/IDE/MDK5-ARM/Projects/CryptBenchmark/benchmark.c
index 277e808fa..d0f9fbd38 100644
--- a/IDE/MDK5-ARM/Projects/CryptBenchmark/benchmark.c
+++ b/IDE/MDK5-ARM/Projects/CryptBenchmark/benchmark.c
@@ -51,9 +51,15 @@
     #include "cavium_common.h"
     #include "cavium_ioctl.h"
 #endif
+
+#if defined(CYASSL_MDK_ARM)
+    extern FILE * CyaSSL_fopen(const char *fname, const char *mode) ;
+    #define fopen CyaSSL_fopen
+#endif
+
 #if defined(USE_CERT_BUFFERS_1024) || defined(USE_CERT_BUFFERS_2048)
     /* include test cert and key buffers for use with NO_FILESYSTEM */
-    #if defined(CYASSL_MDK_ARM) && !defined(SINGLE_THREADED)
+    #if defined(CYASSL_MDK_ARM)
         #include "cert_data.h" /* use certs_test.c for initial data, 
                                       so other commands can share the data. */
     #else
@@ -61,11 +67,6 @@
     #endif
 #endif
 
-#if defined(CYASSL_MDK_ARM)
-    #include 
-    extern FILE * CyaSSL_fopen(const char *fname, const char *mode) ;
-    #define fopen CyaSSL_fopen
-#endif
 
 #ifdef HAVE_BLAKE2
     #include 
@@ -140,7 +141,7 @@ int benchmark_test(void *args)
 {
 #endif
 
-    #ifdef HAVE_CAVIUM
+	#ifdef HAVE_CAVIUM
     int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID);
     if (ret != 0) {
         printf("Cavium OpenNitroxDevice failed\n");
@@ -722,7 +723,7 @@ void bench_rsa(void)
     fclose(file);
 #endif /* USE_CERT_BUFFERS */
 
-        
+		
 #ifdef HAVE_CAVIUM
     if (RsaInitCavium(&rsaKey, CAVIUM_DEV_ID) != 0)
         printf("RSA init cavium failed\n");
@@ -790,7 +791,7 @@ static const char *certDHname = "certs/dh2048.der" ;
 
 void bench_dh(void)
 {
-    int    i;
+    int    i, ret;
     byte   tmp[1024];
     size_t bytes;
     word32 idx = 0, pubSz, privSz, pubSz2, privSz2, agreeSz;
@@ -805,7 +806,7 @@ void bench_dh(void)
     DhKey  dhKey;
     int    dhKeySz = 2048; /* used in printf */
 
-    
+	
 #ifdef USE_CERT_BUFFERS_1024
     XMEMCPY(tmp, dh_key_der_1024, sizeof_dh_key_der_1024);
     bytes = sizeof_dh_key_der_1024;
@@ -821,10 +822,15 @@ void bench_dh(void)
         return;
     }
 
+    ret = InitRng(&rng);
+    if (ret < 0) {
+        printf("InitRNG failed\n");
+        return;
+    }
     bytes = fread(tmp, 1, sizeof(tmp), file);
 #endif /* USE_CERT_BUFFERS */
 
-        
+		
     InitDhKey(&dhKey);
     bytes = DhKeyDecode(tmp, &idx, &dhKey, (word32)bytes);
     if (bytes != 0) {
@@ -913,9 +919,14 @@ void bench_eccKeyGen(void)
 {
     ecc_key genKey;
     double start, total, each, milliEach;
-    int    i;
+    int    i, ret;
     const int genTimes = 5;
   
+    ret = InitRng(&rng);
+    if (ret < 0) {
+        printf("InitRNG failed\n");
+        return;
+    }
     /* 256 bit */ 
     start = current_time(1);
 
@@ -947,6 +958,12 @@ void bench_eccKeyAgree(void)
     ecc_init(&genKey);
     ecc_init(&genKey2);
 
+    ret = InitRng(&rng);
+    if (ret < 0) {
+        printf("InitRNG failed\n");
+        return;
+    }
+
     ret = ecc_make_key(&rng, 32, &genKey);
     if (ret != 0) {
         printf("ecc_make_key failed\n");
@@ -963,7 +980,11 @@ void bench_eccKeyAgree(void)
 
     for(i = 0; i < agreeTimes; i++) {
         x = sizeof(shared);
-        ecc_shared_secret(&genKey, &genKey2, shared, &x);
+        ret = ecc_shared_secret(&genKey, &genKey2, shared, &x);
+        if (ret != 0) {
+            printf("ecc_shared_secret failed\n");
+            return; 
+        }
     }
 
     total = current_time(0) - start;
@@ -981,13 +1002,34 @@ void bench_eccKeyAgree(void)
 
     for(i = 0; i < agreeTimes; i++) {
         x = sizeof(sig);
-        ecc_sign_hash(digest, sizeof(digest), sig, &x, &rng, &genKey);
+        ret = ecc_sign_hash(digest, sizeof(digest), sig, &x, &rng, &genKey);
+        if (ret != 0) {
+            printf("ecc_sign_hash failed\n");
+            return; 
+        }
     }
 
     total = current_time(0) - start;
     each  = total / agreeTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
-    printf("EC-DSA   sign time       %6.2f milliseconds, avg over %d" 
+    printf("EC-DSA   sign   time     %6.2f milliseconds, avg over %d" 
+           " iterations\n", milliEach, agreeTimes);
+
+    start = current_time(1);
+
+    for(i = 0; i < agreeTimes; i++) {
+        int verify = 0;
+        ret = ecc_verify_hash(sig, x, digest, sizeof(digest), &verify, &genKey);
+        if (ret != 0) {
+            printf("ecc_verify_hash failed\n");
+            return; 
+        }
+    }
+
+    total = current_time(0) - start;
+    each  = total / agreeTimes;  /* per second  */
+    milliEach = each * 1000;     /* millisconds */
+    printf("EC-DSA   verify time     %6.2f milliseconds, avg over %d" 
            " iterations\n", milliEach, agreeTimes);
 
     ecc_free(&genKey2);
@@ -1043,7 +1085,7 @@ void bench_eccKeyAgree(void)
         /* return seconds as a double */
         return ( ns / 1000000000.0 );
     }
-        
+		
 #elif defined CYASSL_MDK_ARM
     extern double current_time(int reset) ;
 #else
diff --git a/IDE/MDK5-ARM/Projects/CryptTest/test.c b/IDE/MDK5-ARM/Projects/CryptTest/test.c
index 6165cee31..7ba1b0b39 100644
--- a/IDE/MDK5-ARM/Projects/CryptTest/test.c
+++ b/IDE/MDK5-ARM/Projects/CryptTest/test.c
@@ -74,16 +74,10 @@
     #include 
 #endif
 
-#if defined(CYASSL_MDK_ARM)
-        #include 
-        #include 
-    extern FILE * CyaSSL_fopen(const char *fname, const char *mode) ;
-    #define fopen CyaSSL_fopen
-#endif
 
 #if defined(USE_CERT_BUFFERS_1024) || defined(USE_CERT_BUFFERS_2048)
     /* include test cert and key buffers for use with NO_FILESYSTEM */
-    #if defined(CYASSL_MDK_ARM) && !defined(SINGLE_THREADED)
+    #if defined(CYASSL_MDK_ARM)
         #include "cert_data.h" 
                         /* use certs_test.c for initial data, so other 
                                                commands can share the data. */
@@ -92,6 +86,13 @@
     #endif
 #endif
 
+#if defined(CYASSL_MDK_ARM)
+        #include 
+        #include 
+    extern FILE * CyaSSL_fopen(const char *fname, const char *mode) ;
+    #define fopen CyaSSL_fopen
+#endif
+
 #ifdef HAVE_NTRU
     #include "crypto_ntru.h"
 #endif
@@ -104,6 +105,7 @@
 #ifdef FREESCALE_MQX
     #include 
     #include 
+    #include 
 #else
     #include 
 #endif
@@ -138,6 +140,8 @@ int  hmac_sha_test(void);
 int  hmac_sha256_test(void);
 int  hmac_sha384_test(void);
 int  hmac_sha512_test(void);
+int  hmac_blake2b_test(void);
+int  hkdf_test(void);
 int  arc4_test(void);
 int  hc128_test(void);
 int  rabbit_test(void);
@@ -145,6 +149,7 @@ int  des_test(void);
 int  des3_test(void);
 int  aes_test(void);
 int  aesgcm_test(void);
+int  gmac_test(void);
 int  aesccm_test(void);
 int  camellia_test(void);
 int  rsa_test(void);
@@ -173,7 +178,7 @@ static void err_sys(const char* msg, int es)
 {
     printf("%s error = %d\n", msg, es);
     #if !defined(THREADX) && !defined(CYASSL_MDK_ARM)
-    if (msg)
+  	if (msg)
         exit(es);
     #endif
     return;
@@ -304,6 +309,27 @@ void ctaocrypt_test(void* args)
             printf( "HMAC-SHA512 test passed!\n");
     #endif
 
+    #ifdef HAVE_BLAKE2 
+        if ( (ret = hmac_blake2b_test()) != 0) 
+            err_sys("HMAC-BLAKE2 test failed!\n", ret);
+        else
+            printf( "HMAC-BLAKE2 test passed!\n");
+    #endif
+
+    #ifdef HAVE_HKDF
+        if ( (ret = hkdf_test()) != 0) 
+            err_sys("HMAC-KDF    test failed!\n", ret);
+        else
+            printf( "HMAC-KDF    test passed!\n");
+    #endif
+
+#endif
+
+#ifdef HAVE_AESGCM
+    if ( (ret = gmac_test()) != 0)
+        err_sys("GMAC     test passed!\n", ret);
+    else
+        printf( "GMAC     test passed!\n");
 #endif
 
 #ifndef NO_RC4
@@ -313,7 +339,7 @@ void ctaocrypt_test(void* args)
         printf( "ARC4     test passed!\n");
 #endif
 
-#ifndef HAVE_HC128
+#ifndef NO_HC128
     if ( (ret = hc128_test()) != 0)
         err_sys("HC-128   test failed!\n", ret);
     else
@@ -459,7 +485,7 @@ static int OpenNitroxDevice(int dma_mode,int dev_id)
 
         func_args args;
 
-            
+			
 #ifdef HAVE_CAVIUM
         int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID);
         if (ret != 0)
@@ -474,7 +500,7 @@ static int OpenNitroxDevice(int dma_mode,int dev_id)
 #ifdef HAVE_CAVIUM
         CspShutdown(CAVIUM_DEV_ID);
 #endif
-                
+				
         return args.return_code;
     }
 
@@ -1219,6 +1245,78 @@ int hmac_sha256_test(void)
 #endif
 
 
+#if !defined(NO_HMAC) && defined(HAVE_BLAKE2)
+int hmac_blake2b_test(void)
+{
+    Hmac hmac;
+    byte hash[BLAKE2B_256];
+
+    const char* keys[]=
+    {
+        "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b"
+                                                                "\x0b\x0b\x0b",
+        "Jefe",
+        "\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA"
+                                                                "\xAA\xAA\xAA"
+    };
+
+    testVector a, b, c;
+    testVector test_hmac[3];
+
+    int times = sizeof(test_hmac) / sizeof(testVector), i;
+
+    a.input  = "Hi There";
+    a.output = "\x72\x93\x0d\xdd\xf5\xf7\xe1\x78\x38\x07\x44\x18\x0b\x3f\x51"
+               "\x37\x25\xb5\x82\xc2\x08\x83\x2f\x1c\x99\xfd\x03\xa0\x16\x75"
+               "\xac\xfd";
+    a.inLen  = strlen(a.input);
+    a.outLen = BLAKE2B_256;
+
+    b.input  = "what do ya want for nothing?";
+    b.output = "\x3d\x20\x50\x71\x05\xc0\x8c\x0c\x38\x44\x1e\xf7\xf9\xd1\x67"
+               "\x21\xff\x64\xf5\x94\x00\xcf\xf9\x75\x41\xda\x88\x61\x9d\x7c"
+               "\xda\x2b";
+    b.inLen  = strlen(b.input);
+    b.outLen = BLAKE2B_256;
+
+    c.input  = "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD"
+               "\xDD\xDD\xDD\xDD\xDD\xDD";
+    c.output = "\xda\xfe\x2a\x24\xfc\xe7\xea\x36\x34\xbe\x41\x92\xc7\x11\xa7"
+               "\x00\xae\x53\x9c\x11\x9c\x80\x74\x55\x22\x25\x4a\xb9\x55\xd3"
+               "\x0f\x87";
+    c.inLen  = strlen(c.input);
+    c.outLen = BLAKE2B_256;
+
+    test_hmac[0] = a;
+    test_hmac[1] = b;
+    test_hmac[2] = c;
+
+    for (i = 0; i < times; ++i) {
+#ifdef HAVE_CAVIUM
+        if (i == 1)
+            continue; /* driver can't handle keys <= bytes */
+        if (HmacInitCavium(&hmac, CAVIUM_DEV_ID) != 0)
+            return -20011; 
+#endif
+        HmacSetKey(&hmac, BLAKE2B_ID, (byte*)keys[i], (word32)strlen(keys[i]));
+        HmacUpdate(&hmac, (byte*)test_hmac[i].input,
+                   (word32)test_hmac[i].inLen);
+        HmacFinal(&hmac, hash);
+
+        if (memcmp(hash, test_hmac[i].output, BLAKE2B_256) != 0)
+            return -20 - i;
+#ifdef HAVE_CAVIUM
+        HmacFreeCavium(&hmac);
+#endif
+    }
+
+    return 0;
+}
+#endif
+
+
 #if !defined(NO_HMAC) && defined(CYASSL_SHA384)
 int hmac_sha384_test(void)
 {
@@ -1553,7 +1651,7 @@ int rabbit_test(void)
     b.outLen = 8;
 
     c.input  = "\x00\x00\x00\x00\x00\x00\x00\x00";
-    c.output = "\x9C\x51\xE2\x87\x84\xC3\x7F\xE9";
+    c.output = "\x04\xCE\xCA\x7A\x1A\x86\x6E\x77";
     c.inLen  = 8;
     c.outLen = 8;
 
@@ -1805,6 +1903,42 @@ int aes_test(void)
     }
 #endif /* CYASSL_AES_COUNTER */
 
+#if defined(CYASSL_AESNI) && defined(CYASSL_AES_DIRECT)
+    {
+        const byte niPlain[] =
+        {
+            0x6b,0xc1,0xbe,0xe2,0x2e,0x40,0x9f,0x96,
+            0xe9,0x3d,0x7e,0x11,0x73,0x93,0x17,0x2a
+        };
+
+        const byte niCipher[] =
+        {
+            0xf3,0xee,0xd1,0xbd,0xb5,0xd2,0xa0,0x3c,
+            0x06,0x4b,0x5a,0x7e,0x3d,0xb1,0x81,0xf8 
+        };
+
+        const byte niKey[] =
+        {
+            0x60,0x3d,0xeb,0x10,0x15,0xca,0x71,0xbe,
+            0x2b,0x73,0xae,0xf0,0x85,0x7d,0x77,0x81,
+            0x1f,0x35,0x2c,0x07,0x3b,0x61,0x08,0xd7,
+            0x2d,0x98,0x10,0xa3,0x09,0x14,0xdf,0xf4 
+        };
+
+        XMEMSET(cipher, 0, AES_BLOCK_SIZE);
+        AesSetKey(&enc, niKey, sizeof(niKey), cipher, AES_ENCRYPTION);
+        AesEncryptDirect(&enc, cipher, niPlain);
+        if (XMEMCMP(cipher, niCipher, AES_BLOCK_SIZE) != 0)
+            return -20006;
+
+        XMEMSET(plain, 0, AES_BLOCK_SIZE);
+        AesSetKey(&dec, niKey, sizeof(niKey), plain, AES_DECRYPTION);
+        AesDecryptDirect(&dec, plain, niCipher);
+        if (XMEMCMP(plain, niPlain, AES_BLOCK_SIZE) != 0)
+            return -20007;
+    }
+#endif /* CYASSL_AESNI && CYASSL_AES_DIRECT */
+
     return 0;
 }
 
@@ -1897,6 +2031,95 @@ int aesgcm_test(void)
 
     return 0;
 }
+
+int gmac_test(void)
+{
+    Gmac gmac;
+
+    const byte k1[] =
+    {
+        0x89, 0xc9, 0x49, 0xe9, 0xc8, 0x04, 0xaf, 0x01,
+        0x4d, 0x56, 0x04, 0xb3, 0x94, 0x59, 0xf2, 0xc8
+    };
+    const byte iv1[] =
+    {
+        0xd1, 0xb1, 0x04, 0xc8, 0x15, 0xbf, 0x1e, 0x94,
+        0xe2, 0x8c, 0x8f, 0x16
+    };
+    const byte a1[] =
+    {
+       0x82, 0xad, 0xcd, 0x63, 0x8d, 0x3f, 0xa9, 0xd9,
+       0xf3, 0xe8, 0x41, 0x00, 0xd6, 0x1e, 0x07, 0x77
+    };
+    const byte t1[] =
+    {
+        0x88, 0xdb, 0x9d, 0x62, 0x17, 0x2e, 0xd0, 0x43,
+        0xaa, 0x10, 0xf1, 0x6d, 0x22, 0x7d, 0xc4, 0x1b
+    };
+
+    const byte k2[] =
+    {
+        0x40, 0xf7, 0xec, 0xb2, 0x52, 0x6d, 0xaa, 0xd4,
+        0x74, 0x25, 0x1d, 0xf4, 0x88, 0x9e, 0xf6, 0x5b
+    };
+    const byte iv2[] =
+    {
+        0xee, 0x9c, 0x6e, 0x06, 0x15, 0x45, 0x45, 0x03,
+        0x1a, 0x60, 0x24, 0xa7
+    };
+    const byte a2[] =
+    {
+        0x94, 0x81, 0x2c, 0x87, 0x07, 0x4e, 0x15, 0x18,
+        0x34, 0xb8, 0x35, 0xaf, 0x1c, 0xa5, 0x7e, 0x56
+    };
+    const byte t2[] =
+    {
+        0xc6, 0x81, 0x79, 0x8e, 0x3d, 0xda, 0xb0, 0x9f,
+        0x8d, 0x83, 0xb0, 0xbb, 0x14, 0xb6, 0x91
+    };
+
+    const byte k3[] =
+    {
+        0xb8, 0xe4, 0x9a, 0x5e, 0x37, 0xf9, 0x98, 0x2b,
+        0xb9, 0x6d, 0xd0, 0xc9, 0xb6, 0xab, 0x26, 0xac
+    };
+    const byte iv3[] =
+    {
+        0xe4, 0x4a, 0x42, 0x18, 0x8c, 0xae, 0x94, 0x92,
+        0x6a, 0x9c, 0x26, 0xb0
+    };
+    const byte a3[] =
+    {
+        0x9d, 0xb9, 0x61, 0x68, 0xa6, 0x76, 0x7a, 0x31,
+        0xf8, 0x29, 0xe4, 0x72, 0x61, 0x68, 0x3f, 0x8a
+    };
+    const byte t3[] =
+    {
+        0x23, 0xe2, 0x9f, 0x66, 0xe4, 0xc6, 0x52, 0x48
+    };
+
+    byte tag[16];
+
+    memset(tag, 0, sizeof(tag));
+    GmacSetKey(&gmac, k1, sizeof(k1));
+    GmacUpdate(&gmac, iv1, sizeof(iv1), a1, sizeof(a1), tag, sizeof(t1));
+    if (memcmp(t1, tag, sizeof(t1)) != 0)
+        return -126;
+
+    memset(tag, 0, sizeof(tag));
+    GmacSetKey(&gmac, k2, sizeof(k2));
+    GmacUpdate(&gmac, iv2, sizeof(iv2), a2, sizeof(a2), tag, sizeof(t2));
+    if (memcmp(t2, tag, sizeof(t2)) != 0)
+        return -127;
+
+    memset(tag, 0, sizeof(tag));
+    GmacSetKey(&gmac, k3, sizeof(k3));
+    GmacUpdate(&gmac, iv3, sizeof(iv3), a3, sizeof(a3), tag, sizeof(t3));
+    if (memcmp(t3, tag, sizeof(t3)) != 0)
+        return -128;
+
+    return 0;
+}
 #endif /* HAVE_AESGCM */
 
 #ifdef HAVE_AESCCM
@@ -2171,7 +2394,7 @@ int camellia_test(void)
     if (XMEMCMP(cam.reg, ivc, CAMELLIA_BLOCK_SIZE))
         return -1;
 
-    /* Setting the IV to NULL should leave the IV unchanged */
+    /* Setting the IV to NULL should be same as all zeros IV */
     if (CamelliaSetIV(&cam, NULL) != 0 ||
                                     XMEMCMP(cam.reg, ive, CAMELLIA_BLOCK_SIZE))
         return -1;
@@ -2180,6 +2403,10 @@ int camellia_test(void)
     if (CamelliaSetIV(NULL, NULL) == 0)
         return -1;
 
+    /* First parameter should never be null, check it fails */
+    if (CamelliaSetKey(NULL, k1, sizeof(k1), NULL) == 0)
+        return -1;
+
     /* Key should have a size of 16, 24, or 32 */
     if (CamelliaSetKey(&cam, k1, 0, NULL) == 0)
         return -1;
@@ -2244,30 +2471,32 @@ byte GetEntropy(ENTROPY_CMD cmd, byte* out)
 
 #ifndef NO_RSA
 
-#ifdef FREESCALE_MQX
-    static const char* clientKey  = "a:\\certs\\client-key.der";
-    static const char* clientCert = "a:\\certs\\client-cert.der";
-    #ifdef CYASSL_CERT_GEN
-        static const char* caKeyFile  = "a:\\certs\\ca-key.der";
-        static const char* caCertFile = "a:\\certs\\ca-cert.pem";
-    #endif
-#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) && defined(CYASSL_MKD_SHELL) 
-    static char* clientKey = "certs/client-key.der";
-    static char* clientCert = "certs/client-cert.der";
-    void set_clientKey(char *key) {  clientKey = key ; }      /* set by shell command */
-    void set_clientCert(char *cert) {  clientCert = cert ; }  /* set by shell command */        
-    #ifdef CYASSL_CERT_GEN
-        static char* caKeyFile  = "certs/ca-key.der";
-        static char* caCertFile = "certs/ca-cert.pem";
-        void set_caKeyFile (char * key)  { caKeyFile   = key ; }     /* set by shell command */
-        void set_caCertFile(char * cert) { caCertFile = cert ; }     /* set by shell command */
-    #endif
-#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) 
-    static const char* clientKey  = "./certs/client-key.der";
-    static const char* clientCert = "./certs/client-cert.der";
-    #ifdef CYASSL_CERT_GEN
-        static const char* caKeyFile  = "./certs/ca-key.der";
-        static const char* caCertFile = "./certs/ca-cert.pem";
+#if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048)
+    #ifdef FREESCALE_MQX
+        static const char* clientKey  = "a:\\certs\\client-key.der";
+        static const char* clientCert = "a:\\certs\\client-cert.der";
+        #ifdef CYASSL_CERT_GEN
+            static const char* caKeyFile  = "a:\\certs\\ca-key.der";
+            static const char* caCertFile = "a:\\certs\\ca-cert.pem";
+        #endif
+    #elif defined(CYASSL_MKD_SHELL)
+        static char* clientKey = "certs/client-key.der";
+        static char* clientCert = "certs/client-cert.der";
+        void set_clientKey(char *key) {  clientKey = key ; }      /* set by shell command */
+        void set_clientCert(char *cert) {  clientCert = cert ; }  /* set by shell command */
+        #ifdef CYASSL_CERT_GEN
+            static char* caKeyFile  = "certs/ca-key.der";
+            static char* caCertFile = "certs/ca-cert.pem";
+            void set_caKeyFile (char * key)  { caKeyFile   = key ; }     /* set by shell command */
+            void set_caCertFile(char * cert) { caCertFile = cert ; }     /* set by shell command */
+        #endif
+    #else
+        static const char* clientKey  = "./certs/client-key.der";
+        static const char* clientCert = "./certs/client-cert.der";
+        #ifdef CYASSL_CERT_GEN
+            static const char* caKeyFile  = "./certs/ca-key.der";
+            static const char* caCertFile = "./certs/ca-cert.pem";
+        #endif
     #endif
 #endif
 
@@ -2362,8 +2591,8 @@ int rsa_test(void)
 #endif
 
 #ifdef sizeof
-        #undef sizeof
-#endif      
+		#undef sizeof
+#endif		
 
 #ifdef CYASSL_TEST_CERT
     InitDecodedCert(&cert, tmp, (word32)bytes, 0);
@@ -2508,7 +2737,7 @@ int rsa_test(void)
         int         pemSz;
         size_t      bytes3;
         word32      idx3 = 0;
-              FILE* file3 ;
+			  FILE* file3 ;
 #ifdef CYASSL_TEST_CERT
         DecodedCert decode;
 #endif
@@ -2716,10 +2945,12 @@ int rsa_test(void)
 
 #ifndef NO_DH
 
-#ifdef FREESCALE_MQX
-    static const char* dhKey = "a:\certs\\dh2048.der";
-#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048)
-    static const char* dhKey = "./certs/dh2048.der";
+#if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048)
+    #ifdef FREESCALE_MQX
+        static const char* dhKey = "a:\certs\\dh2048.der";
+    #else
+        static const char* dhKey = "./certs/dh2048.der";
+    #endif
 #endif
 
 int dh_test(void)
@@ -2737,8 +2968,8 @@ int dh_test(void)
     DhKey  key;
     DhKey  key2;
     RNG    rng;
-    
-        
+	
+		
 #ifdef USE_CERT_BUFFERS_1024
     XMEMCPY(tmp, dh_key_der_1024, sizeof_dh_key_der_1024);
     bytes = sizeof_dh_key_der_1024;
@@ -2794,10 +3025,12 @@ int dh_test(void)
 
 #ifndef NO_DSA
 
-#ifdef FREESCALE_MQX
-    static const char* dsaKey = "a:\\certs\\dsa2048.der";
-#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048)
-    static const char* dsaKey = "./certs/dsa2048.der";
+#if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048)
+    #ifdef FREESCALE_MQX
+        static const char* dsaKey = "a:\\certs\\dsa2048.der";
+    #else
+        static const char* dsaKey = "./certs/dsa2048.der";
+    #endif
 #endif
 
 int dsa_test(void)
@@ -2812,7 +3045,7 @@ int dsa_test(void)
     byte   hash[SHA_DIGEST_SIZE];
     byte   signature[40];
 
-        
+		
 #ifdef USE_CERT_BUFFERS_1024
     XMEMCPY(tmp, dsa_key_der_1024, sizeof_dsa_key_der_1024);
     bytes = sizeof_dsa_key_der_1024;
@@ -3184,6 +3417,87 @@ int pwdbased_test(void)
 
 #endif /* NO_PWDBASED */
 
+#if defined(HAVE_HKDF) && (!defined(NO_SHA) || !defined(NO_SHA256))
+
+int hkdf_test(void)
+{
+    int ret;
+    int L = 42;
+    byte okm1[42];
+    byte ikm1[22] = { 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b,
+                      0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b,
+                      0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b };
+    byte salt1[13] ={ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+                      0x08, 0x09, 0x0a, 0x0b, 0x0c };
+    byte info1[10] ={ 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
+                      0xf8, 0xf9 };
+    byte res1[42] = { 0x0a, 0xc1, 0xaf, 0x70, 0x02, 0xb3, 0xd7, 0x61,
+                      0xd1, 0xe5, 0x52, 0x98, 0xda, 0x9d, 0x05, 0x06,
+                      0xb9, 0xae, 0x52, 0x05, 0x72, 0x20, 0xa3, 0x06,
+                      0xe0, 0x7b, 0x6b, 0x87, 0xe8, 0xdf, 0x21, 0xd0,
+                      0xea, 0x00, 0x03, 0x3d, 0xe0, 0x39, 0x84, 0xd3,
+                      0x49, 0x18 };
+    byte res2[42] = { 0x08, 0x5a, 0x01, 0xea, 0x1b, 0x10, 0xf3, 0x69,
+                      0x33, 0x06, 0x8b, 0x56, 0xef, 0xa5, 0xad, 0x81,
+                      0xa4, 0xf1, 0x4b, 0x82, 0x2f, 0x5b, 0x09, 0x15,
+                      0x68, 0xa9, 0xcd, 0xd4, 0xf1, 0x55, 0xfd, 0xa2,
+                      0xc2, 0x2e, 0x42, 0x24, 0x78, 0xd3, 0x05, 0xf3,
+                      0xf8, 0x96 };
+    byte res3[42] = { 0x8d, 0xa4, 0xe7, 0x75, 0xa5, 0x63, 0xc1, 0x8f,
+                      0x71, 0x5f, 0x80, 0x2a, 0x06, 0x3c, 0x5a, 0x31,
+                      0xb8, 0xa1, 0x1f, 0x5c, 0x5e, 0xe1, 0x87, 0x9e,
+                      0xc3, 0x45, 0x4e, 0x5f, 0x3c, 0x73, 0x8d, 0x2d,
+                      0x9d, 0x20, 0x13, 0x95, 0xfa, 0xa4, 0xb6, 0x1a,
+                      0x96, 0xc8 };
+    byte res4[42] = { 0x3c, 0xb2, 0x5f, 0x25, 0xfa, 0xac, 0xd5, 0x7a,
+                      0x90, 0x43, 0x4f, 0x64, 0xd0, 0x36, 0x2f, 0x2a,
+                      0x2d, 0x2d, 0x0a, 0x90, 0xcf, 0x1a, 0x5a, 0x4c,
+                      0x5d, 0xb0, 0x2d, 0x56, 0xec, 0xc4, 0xc5, 0xbf,
+                      0x34, 0x00, 0x72, 0x08, 0xd5, 0xb8, 0x87, 0x18,
+                      0x58, 0x65 };
+
+    (void)res1;
+    (void)res2;
+    (void)res3;
+    (void)res4;
+
+#ifndef NO_SHA
+    ret = HKDF(SHA, ikm1, 22, NULL, 0, NULL, 0, okm1, L);
+    if (ret != 0)
+        return -2001;
+
+    if (memcmp(okm1, res1, L) != 0)
+        return -2002;
+   
+    ret = HKDF(SHA, ikm1, 11, salt1, 13, info1, 10, okm1, L);
+    if (ret != 0)
+        return -2003;
+
+    if (memcmp(okm1, res2, L) != 0)
+        return -2004;
+#endif /* NO_SHA */
+
+#ifndef NO_SHA256
+    ret = HKDF(SHA256, ikm1, 22, NULL, 0, NULL, 0, okm1, L);
+    if (ret != 0)
+        return -2005;
+
+    if (memcmp(okm1, res3, L) != 0)
+        return -2006;
+
+    ret = HKDF(SHA256, ikm1, 22, salt1, 13, info1, 10, okm1, L);
+    if (ret != 0)
+        return -2007;
+
+    if (memcmp(okm1, res4, L) != 0)
+        return -2007;
+#endif /* NO_SHA256 */
+
+    return 0;
+}
+
+#endif /* HAVE_HKDF */
+
 
 #ifdef HAVE_ECC
 
@@ -3263,6 +3577,11 @@ int ecc_test(void)
     if (verify != 1)
         return -1012;
 
+    x = sizeof(exportBuf);
+    ret = ecc_export_private_only(&userA, exportBuf, &x);
+    if (ret != 0)
+        return -1013;
+
     ecc_free(&pubKey);
     ecc_free(&userB);
     ecc_free(&userA);

From a4e61cbdbbfd296a796f7bfc9ea569685f5fc5d8 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Sun, 10 Nov 2013 20:42:21 +0900
Subject: [PATCH 11/43] For PIC32MZ

---
 ctaocrypt/benchmark/benchmark.c               | 19 +++---
 ctaocrypt/src/random.c                        |  8 ++-
 cyassl/ssl.h                                  |  2 +
 mcapi/PIC32MZ-serial.h                        | 28 +++++++++
 .../nbproject/configurations.xml              | 60 ++++++++++++++++++-
 mcapi/ctaocrypt_mcapi.X/nbproject/project.xml |  3 +-
 .../nbproject/configurations.xml              | 35 ++++++++++-
 mcapi/ctaocrypt_test.X/nbproject/project.xml  |  3 +-
 mcapi/cyassl.X/nbproject/configurations.xml   | 10 +++-
 mcapi/cyassl.X/nbproject/project.xml          |  3 +-
 mcapi/{test.c => mcapi_test.c}                | 23 ++++---
 mcapi/zlib.X/nbproject/configurations.xml     |  8 ++-
 mcapi/zlib.X/nbproject/project.xml            |  3 +-
 mplabx/PIC32MZ-Putc.c                         | 10 ++++
 mplabx/PIC32MZ-serial.h                       | 28 +++++++++
 .../main.c => benchmark_main.c}               | 35 +++++++----
 .../nbproject/configurations.xml              | 20 ++++---
 .../nbproject/project.xml                     |  3 +-
 .../nbproject/configurations.xml              | 20 ++++---
 mplabx/ctaocrypt_test.X/nbproject/project.xml |  3 +-
 mplabx/cyassl.X/nbproject/configurations.xml  | 15 +++--
 mplabx/cyassl.X/nbproject/project.xml         |  3 +-
 .../{ctaocrypt_test.X/main.c => test_main.c}  | 29 ++++++---
 23 files changed, 288 insertions(+), 83 deletions(-)
 create mode 100644 mcapi/PIC32MZ-serial.h
 rename mcapi/{test.c => mcapi_test.c} (98%)
 create mode 100644 mplabx/PIC32MZ-Putc.c
 create mode 100644 mplabx/PIC32MZ-serial.h
 rename mplabx/{ctaocrypt_benchmark.X/main.c => benchmark_main.c} (74%)
 rename mplabx/{ctaocrypt_test.X/main.c => test_main.c} (66%)

diff --git a/ctaocrypt/benchmark/benchmark.c b/ctaocrypt/benchmark/benchmark.c
index d0f9fbd38..4ad39833e 100644
--- a/ctaocrypt/benchmark/benchmark.c
+++ b/ctaocrypt/benchmark/benchmark.c
@@ -1063,29 +1063,28 @@ void bench_eccKeyAgree(void)
     }
 
 #elif defined MICROCHIP_PIC32
-
-    #include 
+    #if defined(CYASSL_MICROCHIP_PIC32MZ)
+        #define CLOCK 8000000.0
+    #else
+        #include 
+        #define CLOCK 4000000.0
+    #endif
 
     double current_time(int reset)
     {
-        /* NOTE: core timer tick rate = 40 Mhz, 1 tick = 25 ns */
-
         unsigned int ns;
 
-        /* should we reset our timer back to zero? Helps prevent timer
-           rollover */
-
         if (reset) {
             WriteCoreTimer(0);
         }
 
         /* get timer in ns */
-        ns = ReadCoreTimer() * 25;
+        ns = ReadCoreTimer();
 
         /* return seconds as a double */
-        return ( ns / 1000000000.0 );
+        return ( ns / CLOCK * 2.0);
     }
-		
+
 #elif defined CYASSL_MDK_ARM
     extern double current_time(int reset) ;
 #else
diff --git a/ctaocrypt/src/random.c b/ctaocrypt/src/random.c
index 0cb566404..c81380d18 100644
--- a/ctaocrypt/src/random.c
+++ b/ctaocrypt/src/random.c
@@ -23,6 +23,8 @@
     #include 
 #endif
 
+#include 
+
 /* on HPUX 11 you may need to install /dev/random see
    http://h20293.www2.hp.com/portal/swdepot/displayProductInfo.do?productNumber=KRNG11I
 
@@ -460,8 +462,10 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
 
 #ifdef MICROCHIP_MPLAB_HARMONY
     #define PIC32_SEED_COUNT _CP0_GET_COUNT
-#else
-    #include 
+#else    
+    #if !defined(CYASSL_MICROCHIP_PIC32MZ)
+        #include 
+    #endif
     #define PIC32_SEED_COUNT ReadCoreTimer
 #endif
 
diff --git a/cyassl/ssl.h b/cyassl/ssl.h
index 245cdebf4..1fd697712 100644
--- a/cyassl/ssl.h
+++ b/cyassl/ssl.h
@@ -805,8 +805,10 @@ CYASSL_API char* CyaSSL_X509_get_next_altname(CYASSL_X509*);
 
 CYASSL_API CYASSL_X509*
     CyaSSL_X509_d2i(CYASSL_X509** x509, const unsigned char* in, int len);
+#ifndef NO_FILESYSTEM
 CYASSL_API CYASSL_X509*
     CyaSSL_X509_d2i_fp(CYASSL_X509** x509, FILE* file);
+#endif
 CYASSL_API CYASSL_X509*
     CyaSSL_X509_load_certificate_file(const char* fname, int format);
 
diff --git a/mcapi/PIC32MZ-serial.h b/mcapi/PIC32MZ-serial.h
new file mode 100644
index 000000000..323de525b
--- /dev/null
+++ b/mcapi/PIC32MZ-serial.h
@@ -0,0 +1,28 @@
+void _mon_putc(char c);
+
+static void init_serial() {
+    #ifdef MICROCHIP_PIC32
+#if defined (__32MZ2048ECH144__) || (__32MZ2048ECM144__)
+    /* Set up PB2 divisor for UART2 */
+    SYSKEY = 0x00000000;
+    SYSKEY = 0xAA996655;
+    SYSKEY = 0x556699AA;
+    PB2DIV = 0x00008018;
+    SYSKEY = 0x33333333;
+ 
+    /* UART2 Init */
+//    U2BRG = 0x0C;
+    U2BRG = 0x7;
+    ANSELBCLR = 0x4000;
+    ANSELGCLR = 0x0040;
+    RPB14R = 0x02;
+    U2RXR = 0x01;
+    U2MODE = 0x8000;
+    U2STA = 0x400;
+#elif defined __PIC32MX__
+    SYSTEMConfigPerformance(80000000);
+    DBINIT();
+#endif
+ 
+#endif
+}
diff --git a/mcapi/ctaocrypt_mcapi.X/nbproject/configurations.xml b/mcapi/ctaocrypt_mcapi.X/nbproject/configurations.xml
index 0c1e4c6cf..54eef5bf8 100644
--- a/mcapi/ctaocrypt_mcapi.X/nbproject/configurations.xml
+++ b/mcapi/ctaocrypt_mcapi.X/nbproject/configurations.xml
@@ -12,7 +12,7 @@
     
-      ../../mcapi/test.c
+      ../mcapi_test.c
     
     Makefile
     
   
+  
+    ..
+  
   Makefile
   
     
@@ -30,8 +33,8 @@
         
         SKDEPIC32PlatformTool
         XC32
-        1.10
-        4
+        1.30
+        3
       
       
         
@@ -106,6 +109,7 @@
         
         
         
+        
         
       
       
@@ -123,6 +127,7 @@
         
         
         
+        
         
         
         
@@ -133,10 +138,59 @@
         
       
       
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
       
       
+        
+        
+        
       
+      
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
       
+        
       
     
   
diff --git a/mcapi/ctaocrypt_mcapi.X/nbproject/project.xml b/mcapi/ctaocrypt_mcapi.X/nbproject/project.xml
index ba9477e80..ee5e120b0 100644
--- a/mcapi/ctaocrypt_mcapi.X/nbproject/project.xml
+++ b/mcapi/ctaocrypt_mcapi.X/nbproject/project.xml
@@ -1,5 +1,4 @@
-
-
+
     com.microchip.mplab.nbide.embedded.makeproject
     
         
diff --git a/mcapi/ctaocrypt_test.X/nbproject/configurations.xml b/mcapi/ctaocrypt_test.X/nbproject/configurations.xml
index 83cc5d002..e0ee5463e 100644
--- a/mcapi/ctaocrypt_test.X/nbproject/configurations.xml
+++ b/mcapi/ctaocrypt_test.X/nbproject/configurations.xml
@@ -13,8 +13,8 @@
     
-      main.c
       ../../ctaocrypt/test/test.c
+      ../../mplabx/test_main.c
     
     Makefile
     
   
+  
+    ../../mplabx
+  
   Makefile
   
     
@@ -32,8 +35,8 @@
         
         SKDEPIC32PlatformTool
         XC32
-        1.10
-        4
+        1.30
+        3
       
       
         
@@ -108,6 +111,7 @@
         
         
         
+        
         
       
       
@@ -141,6 +145,7 @@
         
         
         
+        
         
         
         
@@ -176,7 +181,31 @@
       
       
         
+        
+        
       
+      
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
       
         
       
diff --git a/mcapi/ctaocrypt_test.X/nbproject/project.xml b/mcapi/ctaocrypt_test.X/nbproject/project.xml
index 0edce97de..d60fdcdb0 100644
--- a/mcapi/ctaocrypt_test.X/nbproject/project.xml
+++ b/mcapi/ctaocrypt_test.X/nbproject/project.xml
@@ -1,5 +1,4 @@
-
-
+
     com.microchip.mplab.nbide.embedded.makeproject
     
         
diff --git a/mcapi/cyassl.X/nbproject/configurations.xml b/mcapi/cyassl.X/nbproject/configurations.xml
index f98818350..7837eed08 100644
--- a/mcapi/cyassl.X/nbproject/configurations.xml
+++ b/mcapi/cyassl.X/nbproject/configurations.xml
@@ -52,6 +52,7 @@
       ../../mcapi/crypto.c
       ../../ctaocrypt/src/compress.c
       ../../ctaocrypt/src/camellia.c
+      ../../ctaocrypt/src/port.c
     
     
   
     ..
+    ../../ctaocrypt/src
   
   Makefile
   
@@ -72,8 +74,8 @@
         
         SKDEPIC32PlatformTool
         XC32
-        1.10
-        4
+        1.30
+        3
       
       
         
@@ -109,6 +111,7 @@
         
         
         
+        
         
       
       
@@ -142,6 +145,7 @@
         
         
         
+        
         
         
         
@@ -177,6 +181,8 @@
       
       
         
+        
+        
       
       
         
diff --git a/mcapi/cyassl.X/nbproject/project.xml b/mcapi/cyassl.X/nbproject/project.xml
index 831eae925..c7604d711 100644
--- a/mcapi/cyassl.X/nbproject/project.xml
+++ b/mcapi/cyassl.X/nbproject/project.xml
@@ -1,5 +1,4 @@
-
-
+
     com.microchip.mplab.nbide.embedded.makeproject
     
         
diff --git a/mcapi/test.c b/mcapi/mcapi_test.c
similarity index 98%
rename from mcapi/test.c
rename to mcapi/mcapi_test.c
index 40de58bc0..c22618772 100644
--- a/mcapi/test.c
+++ b/mcapi/mcapi_test.c
@@ -44,16 +44,24 @@
 #define USE_CERT_BUFFERS_1024
 #include 
 
-/* c stdlib headers */
-#include 
-
-/* pic32 specific */
-#ifdef MICROCHIP_PIC32
+#if defined(CYASSL_MICROCHIP_PIC32MZ)
+    #define MICROCHIP_PIC32
+    #include 
+    #pragma config ICESEL = ICS_PGx2
+            /* ICE/ICD Comm Channel Select (Communicate on PGEC2/PGED2) */
+    #include 
+    #include 
+    #include "PIC32MZ-serial.h"
+    #define  SYSTEMConfigPerformance /* void out SYSTEMConfigPerformance(); */
+#else
     #define PIC32_STARTER_KIT
+    #include 
+    #include 
     #include 
     #include 
+    #include 
+    #define init_serial()  /* void out init_serial() */
 #endif
-
 #define OUR_DATA_SIZE 1024
 static byte ourData[OUR_DATA_SIZE];
 static byte* key = NULL;
@@ -85,10 +93,9 @@ int main(int argc, char** argv)
     (void)argc;
     (void)argv;
 
-#ifdef MICROCHIP_PIC32
+    init_serial() ;  /* initialize PIC32MZ serial I/O */
     SYSTEMConfigPerformance(80000000);
     DBINIT();
-#endif
 
     /* align key, iv pointers */
     key = (byte*)XMALLOC(32, NULL, DYNAMIC_TYPE_KEY);
diff --git a/mcapi/zlib.X/nbproject/configurations.xml b/mcapi/zlib.X/nbproject/configurations.xml
index bdf84a38d..cea50b3f1 100644
--- a/mcapi/zlib.X/nbproject/configurations.xml
+++ b/mcapi/zlib.X/nbproject/configurations.xml
@@ -44,8 +44,8 @@
         
         SKDEPIC32PlatformTool
         XC32
-        1.10
-        4
+        1.30
+        3
       
       
         
@@ -80,6 +80,7 @@
         
         
         
+        
         
       
       
@@ -113,6 +114,7 @@
         
         
         
+        
         
         
         
@@ -148,6 +150,8 @@
       
       
         
+        
+        
       
       
         
diff --git a/mcapi/zlib.X/nbproject/project.xml b/mcapi/zlib.X/nbproject/project.xml
index 060627700..b0da527da 100644
--- a/mcapi/zlib.X/nbproject/project.xml
+++ b/mcapi/zlib.X/nbproject/project.xml
@@ -1,5 +1,4 @@
-
-
+
     com.microchip.mplab.nbide.embedded.makeproject
     
         
diff --git a/mplabx/PIC32MZ-Putc.c b/mplabx/PIC32MZ-Putc.c
new file mode 100644
index 000000000..d77c4794d
--- /dev/null
+++ b/mplabx/PIC32MZ-Putc.c
@@ -0,0 +1,10 @@
+
+#ifdef MICROCHIP_PIC32
+#if defined (__32MZ2048ECH144__) || defined (__32MZ2048ECM144__)
+void _mon_putc (char c)
+{
+    while (U2STAbits.UTXBF);
+    U2TXREG = c;
+}
+#endif
+#endif
\ No newline at end of file
diff --git a/mplabx/PIC32MZ-serial.h b/mplabx/PIC32MZ-serial.h
new file mode 100644
index 000000000..323de525b
--- /dev/null
+++ b/mplabx/PIC32MZ-serial.h
@@ -0,0 +1,28 @@
+void _mon_putc(char c);
+
+static void init_serial() {
+    #ifdef MICROCHIP_PIC32
+#if defined (__32MZ2048ECH144__) || (__32MZ2048ECM144__)
+    /* Set up PB2 divisor for UART2 */
+    SYSKEY = 0x00000000;
+    SYSKEY = 0xAA996655;
+    SYSKEY = 0x556699AA;
+    PB2DIV = 0x00008018;
+    SYSKEY = 0x33333333;
+ 
+    /* UART2 Init */
+//    U2BRG = 0x0C;
+    U2BRG = 0x7;
+    ANSELBCLR = 0x4000;
+    ANSELGCLR = 0x0040;
+    RPB14R = 0x02;
+    U2RXR = 0x01;
+    U2MODE = 0x8000;
+    U2STA = 0x400;
+#elif defined __PIC32MX__
+    SYSTEMConfigPerformance(80000000);
+    DBINIT();
+#endif
+ 
+#endif
+}
diff --git a/mplabx/ctaocrypt_benchmark.X/main.c b/mplabx/benchmark_main.c
similarity index 74%
rename from mplabx/ctaocrypt_benchmark.X/main.c
rename to mplabx/benchmark_main.c
index 587eae1e2..f9c0bdaef 100644
--- a/mplabx/ctaocrypt_benchmark.X/main.c
+++ b/mplabx/benchmark_main.c
@@ -1,4 +1,4 @@
-/* main.c
+/* benchmark_main.c
  *
  * Copyright (C) 2006-2013 wolfSSL Inc.
  *
@@ -18,12 +18,20 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-
-#define PIC32_STARTER_KIT
-
-#include 
-#include 
-#include 
+#if defined(CYASSL_MICROCHIP_PIC32MZ)
+    #define MICROCHIP_PIC32
+    #include 
+    #pragma config ICESEL = ICS_PGx2
+        /* ICE/ICD Comm Channel Select (Communicate on PGEC2/PGED2) */
+    #include "PIC32MZ-serial.h"
+    #define SYSTEMConfigPerformance /* void out SYSTEMConfigPerformance(); */
+#else
+    #define PIC32_STARTER_KIT
+    #include 
+    #include 
+    #include 
+    #define init_serial() /* void out init_serial() ; */
+#endif
 
 void bench_des(void);
 void bench_arc4(void);
@@ -50,11 +58,14 @@ void bench_eccKeyAgree(void);
  * Main driver for CTaoCrypt benchmarks.
  */
 int main(int argc, char** argv) {
-
-    SYSTEMConfigPerformance(80000000); 
-
+    volatile int i ;
+    int j ;
+    
+    init_serial() ;  /* initialize PIC32MZ serial I/O */
+    SYSTEMConfigPerformance(80000000);
     DBINIT();
-    printf("CTaoCrypt Benchmark:\n");
+
+    printf("wolfCrypt Benchmark:\n");
 
 #ifndef NO_AES
     bench_aes(0);
@@ -110,7 +121,7 @@ int main(int argc, char** argv) {
     bench_eccKeyGen();
     bench_eccKeyAgree();
 #endif
-
+    printf("End of wolfCrypt Benchmark:\n");
     return 0;
 }
 
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml b/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
index 8617c2123..1b9409815 100644
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
@@ -12,8 +12,8 @@
     
-      main.c
       ../../ctaocrypt/benchmark/benchmark.c
+      ../benchmark_main.c
     
     Makefile
     
   
+  
+    ..
+  
   Makefile
   
     
@@ -31,8 +34,8 @@
         
         SKDEPIC32PlatformTool
         XC32
-        1.10
-        4
+        1.30
+        3
       
       
         
@@ -44,8 +47,8 @@
                             AC="true"
                             BL="true"
                             WD="../cyassl.X"
-                            BC="${MAKE}  -f Makefile CONF=default"
-                            DBC="${MAKE}  -f Makefile CONF=default TYPE_IMAGE=DEBUG_RUN"
+                            BC="${MAKE} MAKE_OPTIONS="" -f Makefile CONF=default"
+                            DBC="${MAKE} MAKE_OPTIONS="" -f Makefile CONF=default TYPE_IMAGE=DEBUG_RUN"
                             CC="rm -rf "build/default" "dist/default""
                             OP="dist/default/production/cyassl.X.a"
                             DOP="dist/default/debug/cyassl.X.a"
@@ -81,7 +84,7 @@
         
         
         
-        
+        
         
         
         
@@ -90,6 +93,7 @@
         
         
         
+        
         
       
       
@@ -123,6 +127,7 @@
         
         
         
+        
         
         
         
@@ -158,9 +163,10 @@
       
       
         
+        
+        
       
       
-        
       
     
   
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/project.xml b/mplabx/ctaocrypt_benchmark.X/nbproject/project.xml
index 9ec9516cc..e87963a96 100644
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/project.xml
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/project.xml
@@ -1,5 +1,4 @@
-
-
+
     com.microchip.mplab.nbide.embedded.makeproject
     
         
diff --git a/mplabx/ctaocrypt_test.X/nbproject/configurations.xml b/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
index bd3e33e66..de0a4cde1 100644
--- a/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
+++ b/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
@@ -13,8 +13,8 @@
     
-      main.c
       ../../ctaocrypt/test/test.c
+      ../test_main.c
     
     Makefile
     
   
+  
+    ..
+  
   Makefile
   
     
@@ -32,8 +35,8 @@
         
         SKDEPIC32PlatformTool
         XC32
-        1.10
-        4
+        1.30
+        3
       
       
         
@@ -45,8 +48,8 @@
                             AC="true"
                             BL="true"
                             WD="../cyassl.X"
-                            BC="${MAKE}  -f Makefile CONF=default"
-                            DBC="${MAKE}  -f Makefile CONF=default TYPE_IMAGE=DEBUG_RUN"
+                            BC="${MAKE} MAKE_OPTIONS="" -f Makefile CONF=default"
+                            DBC="${MAKE} MAKE_OPTIONS="" -f Makefile CONF=default TYPE_IMAGE=DEBUG_RUN"
                             CC="rm -rf "build/default" "dist/default""
                             OP="dist/default/production/cyassl.X.a"
                             DOP="dist/default/debug/cyassl.X.a"
@@ -82,7 +85,7 @@
         
         
         
-        
+        
         
         
         
@@ -91,6 +94,7 @@
         
         
         
+        
         
       
       
@@ -124,6 +128,7 @@
         
         
         
+        
         
         
         
@@ -159,9 +164,10 @@
       
       
         
+        
+        
       
       
-        
       
     
   
diff --git a/mplabx/ctaocrypt_test.X/nbproject/project.xml b/mplabx/ctaocrypt_test.X/nbproject/project.xml
index 3567a51b8..82180e826 100644
--- a/mplabx/ctaocrypt_test.X/nbproject/project.xml
+++ b/mplabx/ctaocrypt_test.X/nbproject/project.xml
@@ -1,5 +1,4 @@
-
-
+
     com.microchip.mplab.nbide.embedded.makeproject
     
         
diff --git a/mplabx/cyassl.X/nbproject/configurations.xml b/mplabx/cyassl.X/nbproject/configurations.xml
index cf2aebe06..e12a2e988 100644
--- a/mplabx/cyassl.X/nbproject/configurations.xml
+++ b/mplabx/cyassl.X/nbproject/configurations.xml
@@ -49,6 +49,7 @@
       ../../ctaocrypt/src/sha256.c
       ../../ctaocrypt/src/sha512.c
       ../../ctaocrypt/src/tfm.c
+      ../../ctaocrypt/src/port.c
     
     
   
     ..
+    ../../cyassl/ctaocrypt
+    ../../ctaocrypt/src
   
   Makefile
   
@@ -69,8 +72,8 @@
         
         SKDEPIC32PlatformTool
         XC32
-        1.10
-        4
+        1.30
+        3
       
       
         
@@ -92,11 +95,11 @@
         
         
         
-        
+        
         
         
         
-        
+        
         
         
         
@@ -105,6 +108,7 @@
         
         
         
+        
         
       
       
@@ -138,6 +142,7 @@
         
         
         
+        
         
         
         
@@ -173,6 +178,8 @@
       
       
         
+        
+        
       
       
         
diff --git a/mplabx/cyassl.X/nbproject/project.xml b/mplabx/cyassl.X/nbproject/project.xml
index 831eae925..c7604d711 100644
--- a/mplabx/cyassl.X/nbproject/project.xml
+++ b/mplabx/cyassl.X/nbproject/project.xml
@@ -1,5 +1,4 @@
-
-
+
     com.microchip.mplab.nbide.embedded.makeproject
     
         
diff --git a/mplabx/ctaocrypt_test.X/main.c b/mplabx/test_main.c
similarity index 66%
rename from mplabx/ctaocrypt_test.X/main.c
rename to mplabx/test_main.c
index 5edccecad..cc9992da3 100644
--- a/mplabx/ctaocrypt_test.X/main.c
+++ b/mplabx/test_main.c
@@ -19,13 +19,24 @@
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 
-#define PIC32_STARTER_KIT
-
-#include 
-#include 
-#include 
-#include 
-#include 
+#if defined(CYASSL_MICROCHIP_PIC32MZ)
+    #define MICROCHIP_PIC32
+    #include 
+    #pragma config ICESEL = ICS_PGx2        
+            /* ICE/ICD Comm Channel Select (Communicate on PGEC2/PGED2) */
+    #include 
+    #include 
+    #include "PIC32MZ-serial.h"
+    #define  SYSTEMConfigPerformance /* void out SYSTEMConfigPerformance(); */
+#else
+    #define PIC32_STARTER_KIT
+    #include 
+    #include 
+    #include 
+    #include 
+    #include 
+    #define init_serial()  /* void out init_serial() */
+#endif
 
 /* func_args from test.h, so don't have to pull in other junk */
 typedef struct func_args {
@@ -38,12 +49,12 @@ typedef struct func_args {
  * Main driver for CTaoCrypt tests.
  */
 int main(int argc, char** argv) {
+    int i ;
 
+    init_serial() ;  /* initialize PIC32MZ serial I/O */
     SYSTEMConfigPerformance(80000000);
-
     DBINIT();
     printf("CTaoCrypt Test:\n");
-
     func_args args;
 
     args.argc = argc;

From 240565cdba7f1f39f9caa50ebb7245ae335fef0f Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Sun, 10 Nov 2013 20:52:12 +0900
Subject: [PATCH 12/43] README for MZ

---
 mcapi/README  | 7 +++++++
 mplabx/README | 8 ++++++++
 2 files changed, 15 insertions(+)

diff --git a/mcapi/README b/mcapi/README
index c75b79f4a..154294c46 100644
--- a/mcapi/README
+++ b/mcapi/README
@@ -59,6 +59,13 @@ Included Project Files
 
     /zlib-1.2.7
 
+PIC32MX/PIC32MZ
+---------------
+
+The projects are set for PIC32MX by default. For PIC32MZ, change project
+properties->Devices and add "CYASSL_MICROCHIP_PIC32M" to 
+XC32-gcc->Preprocessing and messages-> Preprocessor macros.
+
 MIPS16 and MIPS32 Support
 -------------------------
 
diff --git a/mplabx/README b/mplabx/README
index dcc7a1be8..715c227bf 100644
--- a/mplabx/README
+++ b/mplabx/README
@@ -34,6 +34,14 @@ Included Project Files
     
     This project builds the CTaoCrypt benchmark application.
 
+PIC32MX/PIC32MZ
+---------------
+
+The projects are set for PIC32MX by default. For PIC32MZ, change project
+properties->Devices and add "CYASSL_MICROCHIP_PIC32M" to 
+XC32-gcc->Preprocessing and messages-> Preprocessor macros.
+
+
 MIPS16 and MIPS32 Support
 -------------------------
 

From 23cada35badf6ab7472dae21dbd0e1911b534c67 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Sun, 10 Nov 2013 21:06:34 +0900
Subject: [PATCH 13/43] Catch up master

---
 IDE/MDK-ARM/LPC43xx/time-LCP43xx.c            |   4 -
 IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c             |  19 +-
 IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c        |   2 +-
 IDE/MDK5-ARM/Projects/CryptTest/main.c        |   2 -
 .../Projects/CyaSSL-Full/echoclient.c         |   1 -
 IDE/MDK5-ARM/Projects/CyaSSL-Full/shell.c     |   1 -
 ctaocrypt/benchmark/benchmark.c               |  11 +-
 ctaocrypt/src/ecc.c                           | 270 +++++++++++++++++-
 ctaocrypt/test/test.c                         |  59 ++++
 cyassl/ctaocrypt/ecc.h                        |  47 +++
 cyassl/internal.h                             |   3 +
 cyassl/ssl.h                                  |   2 +
 src/internal.c                                |  14 +
 src/ssl.c                                     |  33 ++-
 14 files changed, 442 insertions(+), 26 deletions(-)

diff --git a/IDE/MDK-ARM/LPC43xx/time-LCP43xx.c b/IDE/MDK-ARM/LPC43xx/time-LCP43xx.c
index 3c9863254..bf32ef2dd 100644
--- a/IDE/MDK-ARM/LPC43xx/time-LCP43xx.c
+++ b/IDE/MDK-ARM/LPC43xx/time-LCP43xx.c
@@ -60,10 +60,6 @@ static void init_RTC()
  *----------------------------------------------------------------------------*/
  
 #include "lpc43xx_timer.h"
-//#include "lpc43xx_cgu.h"
-//#include "lpc43xx_scu.h"
-//#include "lpc43xx_libcfg.h"
-//#include "debug_frmwrk.h"
 
 static void init_TIM()
 {
diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c
index 4979473ee..8883a88dd 100644
--- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c
+++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c
@@ -108,7 +108,7 @@ void main_task (void)
     init_TcpNet ();
 
     os_tsk_create (tcp_tick, 2);
-    os_tsk_create (tcp_poll, 1);    
+    os_tsk_create (tcp_poll, 1);
     #endif
     
     #ifdef CYASSL_MDK_SHELL 
@@ -137,8 +137,8 @@ void main_task (void)
     int myoptind = 0;
     char* myoptarg = NULL;
 
-    #if defined(DEBUG_CYASSL)
-                extern void CyaSSL_Debugging_ON(void) ;
+#if defined(DEBUG_CYASSL)
+    extern void CyaSSL_Debugging_ON(void) ;
 #endif
 
 
@@ -148,26 +148,25 @@ extern void 	SystemInit(void);
 
 int main() {
 
-  	SystemInit();  
-	  SER_Init() ;
+    SystemInit();  
+    SER_Init() ;
     #if !defined(NO_FILESYSTEM)
-    init_card () ;                                    /* initializing SD card */
+    init_card () ;     /* initializing SD card */
     #endif
 
     init_time() ;
 
-    
     #if defined(DEBUG_CYASSL)
          printf("Turning ON Debug message\n") ;
          CyaSSL_Debugging_ON() ;
     #endif
     
     #ifdef   HAVE_KEIL_RTX
-         os_sys_init (main_task) ;
+        os_sys_init (main_task) ;
     #else
-         main_task() ;
+        main_task() ;
     #endif
-    
+
     return 0 ; /* There should be no return here */
 
 }
diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c
index 2d407b134..261fa2edc 100644
--- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c
+++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c
@@ -48,6 +48,6 @@ int CyaSSL_get_using_nonblock(CYASSL* ssl)
 
 Signer* GetCAByName(void* vp, byte* hash)
 {
-		Signer * ca ;
+    Signer * ca ;
     return(ca) ;
 }
diff --git a/IDE/MDK5-ARM/Projects/CryptTest/main.c b/IDE/MDK5-ARM/Projects/CryptTest/main.c
index c9054ae89..a0dd1aa3f 100644
--- a/IDE/MDK5-ARM/Projects/CryptTest/main.c
+++ b/IDE/MDK5-ARM/Projects/CryptTest/main.c
@@ -57,8 +57,6 @@ extern void init_time(void) ;
 /*-----------------------------------------------------------------------------
  *       mian entry 
  *----------------------------------------------------------------------------*/
-//int myoptind = 0;
-//char* myoptarg = NULL;
 
 int main() 
 {
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/echoclient.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/echoclient.c
index 0d6b2a706..bc7e26310 100644
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/echoclient.c
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/echoclient.c
@@ -35,7 +35,6 @@
         #include "cmsis_os.h"
         #include "rl_fs.h" 
         #include "rl_net.h" 
-//              #include "config-EchoClient.h"
     #else
         #include "rtl.h"
     #endif
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/shell.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/shell.c
index 9e8e484f0..c79f276ff 100644
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/shell.c
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/shell.c
@@ -609,7 +609,6 @@ void shell_main(void *arg) {
     
     printf("Starting Shell\n") ;
     while(1) {
-              //while(1) ;
         if(getline(line,  LINESIZE, &args, &bf_flg) > 0) {
         for(i=0; commandTable[i].func != NULL; i++) {
             if(strcmp(commandTable[i].command, args.argv[0]) == 0) {
diff --git a/ctaocrypt/benchmark/benchmark.c b/ctaocrypt/benchmark/benchmark.c
index 4ad39833e..a6143139e 100644
--- a/ctaocrypt/benchmark/benchmark.c
+++ b/ctaocrypt/benchmark/benchmark.c
@@ -221,11 +221,15 @@ int benchmark_test(void *args)
 #ifdef BENCH_EMBEDDED
 const int numBlocks = 25;       /* how many kB/megs to test (en/de)cryption */
 const char blockType[] = "kB";  /* used in printf output */
-const int times     = 1;        /* public key iterations */
+const int times      = 1;        /* public key iterations */
+const int genTimes   = 5;
+const int agreeTimes = 5;
 #else
 const int numBlocks = 5;
 const char blockType[] = "megs";
-const int times     = 100;
+const int times      = 100;
+const int genTimes   = 100;
+const int agreeTimes = 100;
 #endif
 
 const byte key[] = 
@@ -879,7 +883,6 @@ void bench_rsaKeyGen(void)
     RsaKey genKey;
     double start, total, each, milliEach;
     int    i;
-    const int genTimes = 5;
   
     /* 1024 bit */ 
     start = current_time(1);
@@ -1093,7 +1096,7 @@ void bench_eccKeyAgree(void)
 
     double current_time(int reset)
     {
-        (void) reset;
+        (void)reset;
 
         struct timeval tv;
         gettimeofday(&tv, 0);
diff --git a/ctaocrypt/src/ecc.c b/ctaocrypt/src/ecc.c
index e67679aef..0a87e00cb 100644
--- a/ctaocrypt/src/ecc.c
+++ b/ctaocrypt/src/ecc.c
@@ -33,6 +33,11 @@
 #include 
 #include 
 
+#ifdef HAVE_ECC_ENCRYPT
+    #include 
+    #include 
+#endif
+
 
 /* map
 
@@ -3484,6 +3489,269 @@ void ecc_fp_free(void)
 }
 
 
-
 #endif /* FP_ECC */
+
+#ifdef HAVE_ECC_ENCRYPT
+
+/* init and set defaults, just holders */
+void ecc_encrypt_init_options(ecEncOptions* options)
+{
+    if (options) {
+        XMEMSET(options, 0, sizeof(ecEncOptions));
+
+        options->encAlgo = ecAES_128_CBC;
+        options->kdfAlgo = ecHKDF_SHA256;
+        options->macAlgo = ecHMAC_SHA256;
+    }
+}
+
+
+/* free any resources, clear any keys */
+void ecc_encrypt_free_options(ecEncOptions* options)
+{
+    if (options) {
+        XMEMSET(options, 0, sizeof(ecEncOptions));
+    }
+}
+
+
+static int ecc_get_key_sizes(ecEncOptions* options, int* encKeySz, int* ivSz,
+                             int* keysLen, word32* digestSz, word32* blockSz)
+{
+    if (options) {
+        switch (options->encAlgo) {
+            case ecAES_128_CBC:
+                *encKeySz = KEY_SIZE_128;
+                *ivSz     = IV_SIZE_64;
+                *blockSz  = AES_BLOCK_SIZE;
+                break;
+            default:
+                return BAD_FUNC_ARG;
+        }
+
+        switch (options->macAlgo) {
+            case ecHMAC_SHA256:
+                *digestSz = SHA256_DIGEST_SIZE;
+                break;
+            default:
+                return BAD_FUNC_ARG;
+        }
+    } else
+        return BAD_FUNC_ARG;
+
+    *keysLen  = *encKeySz + *ivSz + *digestSz;
+
+    return 0;
+}
+
+
+/* ecc encrypt with shared secret run through kdf
+   options holds non default algos and inputs
+   msgSz should be the right size for encAlgo, i.e., already padded 
+   return 0 on success */
+int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
+                word32 msgSz, byte* out, word32* outSz, ecEncOptions* opts)
+{
+    int          ret;
+    word32       blockSz;
+    word32       digestSz;
+    ecEncOptions options;
+    byte         sharedSecret[ECC_MAXSIZE];  /* 521 max size */
+    byte         keys[ECC_BUFSIZE];         /* max size */
+    word32       sharedSz = sizeof(sharedSecret);
+    int          keysLen;
+    int          encKeySz;
+    int          ivSz;
+    byte*        encKey;
+    byte*        encIv;
+    byte*        macKey;
+
+    if (privKey == NULL || pubKey == NULL || msg == NULL || out == NULL ||
+                           outSz  == NULL)
+        return BAD_FUNC_ARG;
+
+    if (opts)
+        options = *opts;
+    else  {
+        ecc_encrypt_init_options(&options); /* defaults */
+    }
+        
+    ret = ecc_get_key_sizes(&options, &encKeySz, &ivSz, &keysLen, &digestSz,
+                            &blockSz);
+    if (ret != 0)
+        return ret;
+        
+    if ( (msgSz%blockSz) != 0)
+        return BAD_FUNC_ARG;
+
+    if (*outSz < (msgSz + digestSz))
+        return BUFFER_E;
+
+    ret = ecc_shared_secret(privKey, pubKey, sharedSecret, &sharedSz); 
+    if (ret != 0)
+        return ret;
+
+    switch (options.kdfAlgo) {
+        case ecHKDF_SHA256 :
+                ret = HKDF(SHA256, sharedSecret, sharedSz, options.kdfSalt,
+                           options.kdfSaltSz, options.kdfInfo,
+                           options.kdfInfoSz, keys, keysLen);
+                if (ret != 0)
+                    return ret;
+            break;
+
+        default:
+            return BAD_FUNC_ARG;
+    }
+
+    encKey = keys;
+    encIv  = encKey + encKeySz;
+    macKey = encKey + encKeySz + ivSz;
+
+    switch (options.encAlgo) {
+        case ecAES_128_CBC:
+            {
+                Aes aes;
+                ret = AesSetKey(&aes, encKey,KEY_SIZE_128,encIv,AES_ENCRYPTION);
+                if (ret != 0)
+                    return ret;
+                ret = AesCbcEncrypt(&aes, out, msg, msgSz);
+                if (ret != 0)
+                    return ret;
+            }
+            break;
+
+        default:
+            return BAD_FUNC_ARG;
+    }
+
+    switch (options.macAlgo) {
+        case ecHMAC_SHA256:
+            {
+                Hmac hmac;
+                ret = HmacSetKey(&hmac, SHA256, macKey, SHA256_DIGEST_SIZE);
+                if (ret != 0)
+                    return ret;
+                HmacUpdate(&hmac, out, msgSz);
+                HmacUpdate(&hmac, options.macSalt, options.macSaltSz);
+                HmacFinal(&hmac, out+msgSz);
+            }
+            break;
+
+        default:
+            return BAD_FUNC_ARG;
+    }
+
+    *outSz = msgSz + digestSz;
+
+    return 0;
+}
+
+
+int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
+                word32 msgSz, byte* out, word32* outSz, ecEncOptions* opts)
+{
+    int          ret;
+    word32       blockSz;
+    word32       digestSz;
+    ecEncOptions options;
+    byte         sharedSecret[ECC_MAXSIZE];  /* 521 max size */
+    byte         keys[ECC_BUFSIZE];         /* max size */
+    word32       sharedSz = sizeof(sharedSecret);
+    int          keysLen;
+    int          encKeySz;
+    int          ivSz;
+    byte*        encKey;
+    byte*        encIv;
+    byte*        macKey;
+
+    if (privKey == NULL || pubKey == NULL || msg == NULL || out == NULL ||
+                           outSz  == NULL)
+        return BAD_FUNC_ARG;
+
+    if (opts)
+        options = *opts;
+    else  {
+        ecc_encrypt_init_options(&options); /* defaults */
+    }
+
+    ret = ecc_get_key_sizes(&options, &encKeySz, &ivSz, &keysLen, &digestSz,
+                            &blockSz);
+    if (ret != 0)
+        return ret;
+        
+    if ( ((msgSz-digestSz) % blockSz) != 0)
+        return BAD_FUNC_ARG;
+
+    if (*outSz < (msgSz - digestSz))
+        return BUFFER_E;
+
+    ret = ecc_shared_secret(privKey, pubKey, sharedSecret, &sharedSz); 
+    if (ret != 0)
+        return ret;
+
+    switch (options.kdfAlgo) {
+        case ecHKDF_SHA256 :
+                ret = HKDF(SHA256, sharedSecret, sharedSz, options.kdfSalt,
+                           options.kdfSaltSz, options.kdfInfo,
+                           options.kdfInfoSz, keys, keysLen);
+                if (ret != 0)
+                    return ret;
+            break;
+
+        default:
+            return BAD_FUNC_ARG;
+    }
+
+    encKey = keys;
+    encIv  = encKey + encKeySz;
+    macKey = encKey + encKeySz + ivSz;
+
+    switch (options.macAlgo) {
+        case ecHMAC_SHA256:
+            {
+                byte verify[SHA256_DIGEST_SIZE];
+                Hmac hmac;
+                ret = HmacSetKey(&hmac, SHA256, macKey, SHA256_DIGEST_SIZE);
+                if (ret != 0)
+                    return ret;
+                HmacUpdate(&hmac, msg, msgSz-digestSz);
+                HmacUpdate(&hmac, options.macSalt, options.macSaltSz);
+                HmacFinal(&hmac, verify);
+
+                if (memcmp(verify, msg + msgSz - digestSz, digestSz) != 0) {
+                    return -1;
+                }
+            }
+            break;
+
+        default:
+            return BAD_FUNC_ARG;
+    }
+
+    switch (options.encAlgo) {
+        case ecAES_128_CBC:
+            {
+                Aes aes;
+                ret = AesSetKey(&aes, encKey,KEY_SIZE_128,encIv,AES_DECRYPTION);
+                if (ret != 0)
+                    return ret;
+                ret = AesCbcDecrypt(&aes, out, msg, msgSz-digestSz);
+                if (ret != 0)
+                    return ret;
+            }
+            break;
+
+        default:
+            return BAD_FUNC_ARG;
+    }
+
+    *outSz = msgSz - digestSz;
+
+    return 0;
+}
+
+
+#endif /* HAVE_ECC_ENCRYPT */
+
 #endif /* HAVE_ECC */
diff --git a/ctaocrypt/test/test.c b/ctaocrypt/test/test.c
index 7ba1b0b39..5ba050838 100644
--- a/ctaocrypt/test/test.c
+++ b/ctaocrypt/test/test.c
@@ -164,6 +164,9 @@ int pkcs12_test(void);
 int pbkdf2_test(void);
 #ifdef HAVE_ECC
     int  ecc_test(void);
+    #ifdef HAVE_ECC_ENCRYPT
+        int  ecc_encrypt_test(void);
+    #endif
 #endif
 #ifdef HAVE_BLAKE2
     int  blake2b_test(void);
@@ -440,6 +443,12 @@ void ctaocrypt_test(void* args)
         err_sys("ECC      test failed!\n", ret);
     else
         printf( "ECC      test passed!\n");
+    #ifdef HAVE_ECC_ENCRYPT
+        if ( (ret = ecc_encrypt_test()) != 0) 
+            err_sys("ECC Enc  test failed!\n", ret);
+        else
+            printf( "ECC Enc  test passed!\n");
+    #endif
 #endif
 
 #ifdef HAVE_LIBZ
@@ -3589,6 +3598,56 @@ int ecc_test(void)
     return 0;
 }
 
+#ifdef HAVE_ECC_ENCRYPT
+
+int ecc_encrypt_test(void)
+{
+    RNG     rng;
+    int     ret;
+    ecc_key userA, userB;
+    byte    msg[48];
+    byte    plain[48];
+    byte    out[80];
+    word32  outSz   = sizeof(out);
+    word32  plainSz = sizeof(plain);
+    int     i;
+
+    ret = InitRng(&rng);
+    if (ret != 0)
+        return -3001;
+
+    ecc_init(&userA);
+    ecc_init(&userB);
+
+    ret  = ecc_make_key(&rng, 32, &userA);
+    ret += ecc_make_key(&rng, 32, &userB);
+
+    if (ret != 0)
+        return -3002;
+
+    for (i = 0; i < 48; i++)
+        msg[i] = i;
+
+    /* send encrypted msg to B */
+    ret = ecc_encrypt(&userA, &userB, msg, sizeof(msg), out, &outSz, NULL);
+    if (ret != 0)
+        return -3003;
+
+    /* decrypted msg to B */
+    ret = ecc_decrypt(&userB, &userA, out, outSz, plain, &plainSz, NULL);
+    if (ret != 0)
+        return -3004;
+
+    if (memcmp(plain, msg, sizeof(msg)) != 0)
+        return -3005;
+
+    ecc_free(&userB);
+    ecc_free(&userA);
+
+    return 0;
+}
+
+#endif /* HAVE_ECC_ENCRYPT */
 #endif /* HAVE_ECC */
 
 #ifdef HAVE_LIBZ
diff --git a/cyassl/ctaocrypt/ecc.h b/cyassl/ctaocrypt/ecc.h
index e88c10ab4..683429fec 100644
--- a/cyassl/ctaocrypt/ecc.h
+++ b/cyassl/ctaocrypt/ecc.h
@@ -119,6 +119,53 @@ CYASSL_API
 int ecc_sig_size(ecc_key* key);
 
 
+/* ecc encrypt */
+
+enum ecEncAlgo {
+    ecAES_128_CBC = 1,  /* default */
+    ecAES_256_CBC = 2
+};
+
+enum ecKdfAlgo {
+    ecHKDF_SHA256 = 1,  /* default */
+    ecHKDF_SHA1   = 2
+};
+
+enum ecMacAlgo {
+    ecHMAC_SHA256 = 1,  /* default */
+    ecHMAC_SHA1   = 2
+};
+
+enum {
+    KEY_SIZE_128 = 16,   
+    KEY_SIZE_256 = 32,   
+    IV_SIZE_64   =  8   
+};
+
+typedef struct ecEncOptions {
+    byte      encAlgo;     /* which encryption type */
+    byte      kdfAlgo;     /* which key derivation function type */
+    byte      macAlgo;     /* which mac function type */
+    byte*     kdfSalt;     /* optional salt for kdf */
+    byte*     kdfInfo;     /* optional info for kdf */
+    byte*     macSalt;     /* optional salt for mac */
+    word32    kdfSaltSz;   /* size of kdfSalt */
+    word32    kdfInfoSz;   /* size of kdfInfo */
+    word32    macSaltSz;   /* size of macSalt */
+} ecEncOptions;
+
+CYASSL_API
+void ecc_encrypt_init_options(ecEncOptions*); /* init and set to defaults */
+CYASSL_API
+void ecc_encrypt_free_options(ecEncOptions*); /* release/clear options */
+
+CYASSL_API
+int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
+                word32 msgSz, byte* out, word32* outSz, ecEncOptions* options);
+CYASSL_API
+int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
+                word32 msgSz, byte* out, word32* outSz, ecEncOptions* options);
+
 #ifdef __cplusplus
     }    /* extern "C" */    
 #endif
diff --git a/cyassl/internal.h b/cyassl/internal.h
index 950900446..32b8964bf 100644
--- a/cyassl/internal.h
+++ b/cyassl/internal.h
@@ -1666,6 +1666,9 @@ struct CYASSL_X509 {
     byte             notBefore[MAX_DATE_SZ];
     int              notAfterSz;
     byte             notAfter[MAX_DATE_SZ];
+    int              sigOID;
+    buffer           sig;
+    int              pubKeyOID;
     buffer           pubKey;
     buffer           derCert;                        /* may need  */
     DNS_entry*       altNames;                       /* alt names list */
diff --git a/cyassl/ssl.h b/cyassl/ssl.h
index 1fd697712..bd5f25c38 100644
--- a/cyassl/ssl.h
+++ b/cyassl/ssl.h
@@ -418,6 +418,8 @@ CYASSL_API int CyaSSL_X509_NAME_get_text_by_NID(
                                             CYASSL_X509_NAME*, int, char*, int);
 CYASSL_API int         CyaSSL_X509_verify_cert(CYASSL_X509_STORE_CTX*);
 CYASSL_API const char* CyaSSL_X509_verify_cert_error_string(long);
+CYASSL_API int CyaSSL_X509_get_signature_type(CYASSL_X509*);
+CYASSL_API int CyaSSL_X509_get_signature(CYASSL_X509*, unsigned char*, int*);
 
 CYASSL_API int CyaSSL_X509_LOOKUP_add_dir(CYASSL_X509_LOOKUP*,const char*,long);
 CYASSL_API int CyaSSL_X509_LOOKUP_load_file(CYASSL_X509_LOOKUP*, const char*,
diff --git a/src/internal.c b/src/internal.c
index 4344b4723..92194f5de 100644
--- a/src/internal.c
+++ b/src/internal.c
@@ -1266,6 +1266,7 @@ void InitX509(CYASSL_X509* x509, int dynamicFlag)
     InitX509Name(&x509->subject, 0);
     x509->version        = 0;
     x509->pubKey.buffer  = NULL;
+    x509->sig.buffer     = NULL;
     x509->derCert.buffer = NULL;
     x509->altNames       = NULL;
     x509->altNamesNext   = NULL;
@@ -1284,6 +1285,7 @@ void FreeX509(CYASSL_X509* x509)
     if (x509->pubKey.buffer)
         XFREE(x509->pubKey.buffer, NULL, DYNAMIC_TYPE_PUBLIC_KEY);
     XFREE(x509->derCert.buffer, NULL, DYNAMIC_TYPE_SUBJECT_CN);
+    XFREE(x509->sig.buffer, NULL, 0);
     if (x509->altNames)
         FreeAltNames(x509->altNames, NULL);
     if (x509->dynamicMemory)
@@ -3121,6 +3123,7 @@ int CopyDecodedToX509(CYASSL_X509* x509, DecodedCert* dCert)
         x509->pubKey.buffer = (byte*)XMALLOC(
                               dCert->pubKeySize, NULL, DYNAMIC_TYPE_PUBLIC_KEY);
         if (x509->pubKey.buffer != NULL) {
+            x509->pubKeyOID = dCert->keyOID;
             x509->pubKey.length = dCert->pubKeySize;
             XMEMCPY(x509->pubKey.buffer, dCert->publicKey, dCert->pubKeySize);
         }
@@ -3128,6 +3131,17 @@ int CopyDecodedToX509(CYASSL_X509* x509, DecodedCert* dCert)
             ret = MEMORY_E;
     }
 
+    x509->sig.buffer = (byte*)XMALLOC(dCert->sigLength, NULL, 0);
+    if (x509->sig.buffer == NULL) {
+        ret = MEMORY_E;
+    }
+    else {
+        XMEMCPY(x509->sig.buffer,
+                             &dCert->source[dCert->sigIndex], dCert->sigLength);
+        x509->sig.length = dCert->sigLength;
+        x509->sigOID = dCert->signatureOID;
+    }
+
     /* store cert for potential retrieval */
     x509->derCert.buffer = (byte*)XMALLOC(dCert->maxIdx, NULL,
                                           DYNAMIC_TYPE_CERT);
diff --git a/src/ssl.c b/src/ssl.c
index ff71f277c..f17449376 100644
--- a/src/ssl.c
+++ b/src/ssl.c
@@ -7143,13 +7143,42 @@ int CyaSSL_set_compression(CYASSL* ssl)
     }
 
 
+    int CyaSSL_X509_get_signature_type(CYASSL_X509* x509)
+    {
+        int type = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_get_signature_type");
+
+        if (x509 != NULL)
+            type = x509->sigOID;
+
+        return type;
+    }
+
+
+    int CyaSSL_X509_get_signature(CYASSL_X509* x509,
+                                                 unsigned char* buf, int* bufSz)
+    {
+        CYASSL_ENTER("CyaSSL_X509_get_signature");
+        if (x509 == NULL || bufSz == NULL || *bufSz < (int)x509->sig.length)
+            return SSL_FATAL_ERROR;
+
+        if (buf != NULL)
+            XMEMCPY(buf, x509->sig.buffer, x509->sig.length);
+        *bufSz = x509->sig.length;
+
+        return SSL_SUCCESS;
+    }
+
+
     /* write X509 serial number in unsigned binary to buffer 
        buffer needs to be at least EXTERNAL_SERIAL_SIZE (32) for all cases
        return SSL_SUCCESS on success */
     int CyaSSL_X509_get_serial_number(CYASSL_X509* x509, byte* in, int* inOutSz)
     {
         CYASSL_ENTER("CyaSSL_X509_get_serial_number");
-        if (x509 == NULL || in == NULL || *inOutSz < x509->serialSz)
+        if (x509 == NULL || in == NULL ||
+                                   inOutSz == NULL || *inOutSz < x509->serialSz)
             return BAD_FUNC_ARG;
 
         XMEMCPY(in, x509->serial, x509->serialSz);
@@ -8289,7 +8318,7 @@ CYASSL_X509* CyaSSL_X509_load_certificate_file(const char* fname, int format)
             key = (CYASSL_EVP_PKEY*)XMALLOC(
                         sizeof(CYASSL_EVP_PKEY), NULL, DYNAMIC_TYPE_PUBLIC_KEY);
             if (key != NULL) {
-                key->type = 0;
+                key->type = x509->pubKeyOID;
                 key->save_type = 0;
                 key->pkey.ptr = (char*)XMALLOC(
                             x509->pubKey.length, NULL, DYNAMIC_TYPE_PUBLIC_KEY);

From 0048c20fe501544d1bd3c121fbf070d5afb595f2 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Mon, 11 Nov 2013 12:15:19 +0900
Subject: [PATCH 14/43] PIC32MZ RNG

---
 ctaocrypt/src/random.c | 87 +++++++++++++++++++++++++++++++++---------
 1 file changed, 68 insertions(+), 19 deletions(-)

diff --git a/ctaocrypt/src/random.c b/ctaocrypt/src/random.c
index c81380d18..1032897b4 100644
--- a/ctaocrypt/src/random.c
+++ b/ctaocrypt/src/random.c
@@ -460,29 +460,78 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
 
 #elif defined(MICROCHIP_PIC32)
 
-#ifdef MICROCHIP_MPLAB_HARMONY
-    #define PIC32_SEED_COUNT _CP0_GET_COUNT
-#else    
-    #if !defined(CYASSL_MICROCHIP_PIC32MZ)
-        #include 
+    #ifdef MICROCHIP_MPLAB_HARMONY
+        #define PIC32_SEED_COUNT _CP0_GET_COUNT
+    #else    
+        #if !defined(CYASSL_MICROCHIP_PIC32MZ)
+            #include 
+        #endif
+        #define PIC32_SEED_COUNT ReadCoreTimer
     #endif
-    #define PIC32_SEED_COUNT ReadCoreTimer
+
+    #ifdef CYASSL_MIC32MZ_RNG
+        #include "xc.h"
+        int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
+        {
+            int i ;
+            byte rnd[8] ;
+            word32 *rnd32 = (word32 *)rnd ;
+            word32 size = sz ;
+            byte* op = output ;
+
+            RNGNUMGEN1 = ReadCoreTimer();
+            RNGPOLY1 = 0x01020304;
+            RNGPOLY2 = 0x05060709;
+            RNGNUMGEN2 = ReadCoreTimer();
+#ifdef DEBUG_CYASSL
+            printf("GenerateSeed::Seed=%08x, %08x\n", RNGNUMGEN1, RNGNUMGEN2) ;
 #endif
+            RNGCONbits.PLEN = 0x40;
+            RNGCONbits.PRNGEN = 1;
+            for(i=0; i<3; i++) { /* wait for RNGNUMGEN ready */
+                volatile int x ;
+                x = RNGNUMGEN1 ;
+                x = RNGNUMGEN2 ;
+            }
+            do {
+                rnd32[0] = RNGNUMGEN1;
+                rnd32[1] = RNGNUMGEN2;
 
-/* uses the core timer, in nanoseconds to seed srand */
-int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
-{
-    int i;
-    srand(PIC32_SEED_COUNT() * 25);
+                for(i=0; i<8; i++, op++) {
+                    *op = rnd[i] ;
+                    size -- ;
+                    if(size==0)break ;
+                }
+            } while(size) ;
 
-    for (i = 0; i < sz; i++ ) {
-        output[i] = rand() % 256;
-        if ( (i % 8) == 7)
+#ifdef DEBUG_CYASSL
+            printf("\nReturn=") ;
+            for(i=0; i
Date: Thu, 28 Nov 2013 00:16:49 +0900
Subject: [PATCH 15/43] Eliminate unused files

---
 ctaocrypt/src/random.c                        |    4 +-
 cyassl/ctaocrypt/des3.h                       |    4 +
 .../nbproject/Makefile-default.mk             |    0
 .../nbproject/Makefile-genesis.properties     |    8 -
 .../nbproject/Makefile-impl.mk                |   69 -
 .../nbproject/Makefile-local-default.mk       |    0
 .../nbproject/Makefile-variables.mk           |   13 -
 .../nbproject/Package-default.bash            |   73 -
 .../nbproject/private/private.xml             |    3 -
 .../nbproject/Makefile-default.mk             |  164 --
 .../nbproject/Makefile-genesis.properties     |    8 -
 .../nbproject/Makefile-impl.mk                |   69 -
 .../nbproject/Makefile-local-default.mk       |   37 -
 .../nbproject/Makefile-variables.mk           |   13 -
 .../nbproject/Package-default.bash            |   73 -
 .../nbproject/private/private.xml             |    8 -
 mcapi/cyassl.X/nbproject/Makefile-default.mk  |  626 --------
 .../nbproject/Makefile-genesis.properties     |    8 -
 mcapi/cyassl.X/nbproject/Makefile-impl.mk     |   69 -
 .../nbproject/Makefile-local-default.mk       |   37 -
 .../cyassl.X/nbproject/Makefile-variables.mk  |   13 -
 mcapi/cyassl.X/nbproject/Package-default.bash |   73 -
 mcapi/cyassl.X/nbproject/private/private.xml  |    6 -
 mcapi/test.c                                  | 1361 -----------------
 mcapi/zlib.X/nbproject/Makefile-default.mk    |  314 ----
 .../nbproject/Makefile-genesis.properties     |    8 -
 mcapi/zlib.X/nbproject/Makefile-impl.mk       |   69 -
 .../nbproject/Makefile-local-default.mk       |   37 -
 mcapi/zlib.X/nbproject/Makefile-variables.mk  |   13 -
 mcapi/zlib.X/nbproject/Package-default.bash   |   73 -
 mplabx/PIC32MZ-Putc.c                         |   10 -
 mplabx/benchmark_main_save.c                  |  133 --
 mplabx/crypto.h                               |   82 -
 mplabx/cryptoregs.h                           |   91 --
 mplabx/cryptoregs.s                           |   21 -
 mplabx/ctaocrypt_benchmark.X/main.c           |  116 --
 .../nbproject/Makefile-default.mk             |  162 --
 .../nbproject/Makefile-genesis.properties     |    8 -
 .../nbproject/Makefile-impl.mk                |   69 -
 .../nbproject/Makefile-local-default.mk       |   37 -
 .../nbproject/Makefile-variables.mk           |   13 -
 .../nbproject/configurations.xml              |    1 +
 .../nbproject/private/private.xml             |    3 -
 .../nbproject/Makefile-default.mk             |  170 --
 .../nbproject/Makefile-genesis.properties     |    8 -
 .../nbproject/Makefile-impl.mk                |   69 -
 .../nbproject/Makefile-local-default.mk       |   37 -
 .../nbproject/Makefile-variables.mk           |   13 -
 .../nbproject/configurations.xml              |   10 +-
 .../SuppressibleMessageMemo.properties        |    3 -
 .../nbproject/private/private.xml             |    3 -
 mplabx/cyassl.X/nbproject/Makefile-default.mk |  590 -------
 .../nbproject/Makefile-genesis.properties     |    8 -
 mplabx/cyassl.X/nbproject/Makefile-impl.mk    |   69 -
 .../nbproject/Makefile-local-default.mk       |   37 -
 .../cyassl.X/nbproject/Makefile-variables.mk  |   13 -
 mplabx/cyassl.X/nbproject/configurations.xml  |   29 +-
 mplabx/cyassl.X/nbproject/private/private.xml |    3 -
 58 files changed, 19 insertions(+), 5042 deletions(-)
 delete mode 100644 mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-default.mk
 delete mode 100644 mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-genesis.properties
 delete mode 100644 mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-impl.mk
 delete mode 100644 mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-local-default.mk
 delete mode 100644 mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-variables.mk
 delete mode 100644 mcapi/ctaocrypt_mcapi.X/nbproject/Package-default.bash
 delete mode 100644 mcapi/ctaocrypt_mcapi.X/nbproject/private/private.xml
 delete mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-default.mk
 delete mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
 delete mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-impl.mk
 delete mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
 delete mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-variables.mk
 delete mode 100644 mcapi/ctaocrypt_test.X/nbproject/Package-default.bash
 delete mode 100644 mcapi/ctaocrypt_test.X/nbproject/private/private.xml
 delete mode 100644 mcapi/cyassl.X/nbproject/Makefile-default.mk
 delete mode 100644 mcapi/cyassl.X/nbproject/Makefile-genesis.properties
 delete mode 100644 mcapi/cyassl.X/nbproject/Makefile-impl.mk
 delete mode 100644 mcapi/cyassl.X/nbproject/Makefile-local-default.mk
 delete mode 100644 mcapi/cyassl.X/nbproject/Makefile-variables.mk
 delete mode 100644 mcapi/cyassl.X/nbproject/Package-default.bash
 delete mode 100644 mcapi/cyassl.X/nbproject/private/private.xml
 delete mode 100644 mcapi/test.c
 delete mode 100644 mcapi/zlib.X/nbproject/Makefile-default.mk
 delete mode 100644 mcapi/zlib.X/nbproject/Makefile-genesis.properties
 delete mode 100644 mcapi/zlib.X/nbproject/Makefile-impl.mk
 delete mode 100644 mcapi/zlib.X/nbproject/Makefile-local-default.mk
 delete mode 100644 mcapi/zlib.X/nbproject/Makefile-variables.mk
 delete mode 100644 mcapi/zlib.X/nbproject/Package-default.bash
 delete mode 100644 mplabx/PIC32MZ-Putc.c
 delete mode 100644 mplabx/benchmark_main_save.c
 delete mode 100644 mplabx/crypto.h
 delete mode 100644 mplabx/cryptoregs.h
 delete mode 100644 mplabx/cryptoregs.s
 delete mode 100644 mplabx/ctaocrypt_benchmark.X/main.c
 delete mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-default.mk
 delete mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-genesis.properties
 delete mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-impl.mk
 delete mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-local-default.mk
 delete mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-variables.mk
 delete mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/private/private.xml
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-default.mk
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-impl.mk
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-variables.mk
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/private/SuppressibleMessageMemo.properties
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/private/private.xml
 delete mode 100644 mplabx/cyassl.X/nbproject/Makefile-default.mk
 delete mode 100644 mplabx/cyassl.X/nbproject/Makefile-genesis.properties
 delete mode 100644 mplabx/cyassl.X/nbproject/Makefile-impl.mk
 delete mode 100644 mplabx/cyassl.X/nbproject/Makefile-local-default.mk
 delete mode 100644 mplabx/cyassl.X/nbproject/Makefile-variables.mk
 delete mode 100644 mplabx/cyassl.X/nbproject/private/private.xml

diff --git a/ctaocrypt/src/random.c b/ctaocrypt/src/random.c
index 33bd75db8..03dd75553 100644
--- a/ctaocrypt/src/random.c
+++ b/ctaocrypt/src/random.c
@@ -463,7 +463,9 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
 #ifdef MICROCHIP_MPLAB_HARMONY
     #define PIC32_SEED_COUNT _CP0_GET_COUNT
 #else
-    #include 
+    #if !defined(CYASSL_MICROCHIP_PIC32MZ)
+        #include 
+    #endif
     #define PIC32_SEED_COUNT ReadCoreTimer
 #endif
 
diff --git a/cyassl/ctaocrypt/des3.h b/cyassl/ctaocrypt/des3.h
index 3d249c7ab..219fa3ed9 100644
--- a/cyassl/ctaocrypt/des3.h
+++ b/cyassl/ctaocrypt/des3.h
@@ -63,18 +63,22 @@ enum {
 typedef struct Des {
     word32 reg[DES_BLOCK_SIZE / sizeof(word32)];      /* for CBC mode */
     word32 tmp[DES_BLOCK_SIZE / sizeof(word32)];      /* same         */
+    #ifdef COLDFIRE_SEC
     byte keylen ;        /* for Coldfire SEC   */
     byte ivlen ;         /* for Coldfire SEC   */
     byte iv[DES3_IVLEN]; /* for Coldfire SEC   */
+    #endif
     word32 key[DES_KS_SIZE];
 } Des;
 
 
 /* DES3 encryption and decryption */
 typedef struct Des3 {
+    #ifdef COLDFIRE_SEC
     byte keylen ;        /* for Coldfire SEC   */
     byte ivlen ;         /* for Coldfire SEC   */
     byte iv[DES3_IVLEN]; /* for Coldfire SEC   */
+    #endif
     word32 key[3][DES_KS_SIZE];
     word32 reg[DES_BLOCK_SIZE / sizeof(word32)];      /* for CBC mode */
     word32 tmp[DES_BLOCK_SIZE / sizeof(word32)];      /* same         */
diff --git a/mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-default.mk b/mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-default.mk
deleted file mode 100644
index e69de29bb..000000000
diff --git a/mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-genesis.properties b/mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-genesis.properties
deleted file mode 100644
index 8aa7bfafe..000000000
--- a/mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-genesis.properties
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-#Mon Nov 11 09:26:29 JST 2013
-default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
-default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30\\bin
-com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
-default.languagetoolchain.version=1.30
-host.platform=windows
-conf.ids=default
diff --git a/mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-impl.mk b/mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-impl.mk
deleted file mode 100644
index 1078c9622..000000000
--- a/mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-impl.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a pre- and a post- target defined where you can add customization code.
-#
-# This makefile implements macros and targets common to all configurations.
-#
-# NOCDDL
-
-
-# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
-# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
-# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
-# and .clean-reqprojects-conf unless SUB has the value 'no'
-SUB_no=NO
-SUBPROJECTS=${SUB_${SUB}}
-BUILD_SUBPROJECTS_=.build-subprojects
-BUILD_SUBPROJECTS_NO=
-BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
-CLEAN_SUBPROJECTS_=.clean-subprojects
-CLEAN_SUBPROJECTS_NO=
-CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
-
-
-# Project Name
-PROJECTNAME=ctaocrypt_mcapi.X
-
-# Active Configuration
-DEFAULTCONF=default
-CONF=${DEFAULTCONF}
-
-# All Configurations
-ALLCONFS=default 
-
-
-# build
-.build-impl: .build-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
-
-
-# clean
-.clean-impl: .clean-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
-
-# clobber
-.clobber-impl: .clobber-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
-
-
-
-# all
-.all-impl: .all-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
-
-
-
-# dependency checking support
-.depcheck-impl:
-#	@echo "# This code depends on make tool being used" >.dep.inc
-#	@if [ -n "${MAKE_VERSION}" ]; then \
-#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
-#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
-#	    echo "include \$${DEPFILES}" >>.dep.inc; \
-#	    echo "endif" >>.dep.inc; \
-#	else \
-#	    echo ".KEEP_STATE:" >>.dep.inc; \
-#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
-#	fi
diff --git a/mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-local-default.mk b/mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-local-default.mk
deleted file mode 100644
index e69de29bb..000000000
diff --git a/mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-variables.mk b/mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-variables.mk
deleted file mode 100644
index d31702c8e..000000000
--- a/mcapi/ctaocrypt_mcapi.X/nbproject/Makefile-variables.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Generated - do not edit!
-#
-# NOCDDL
-#
-CND_BASEDIR=`pwd`
-# default configuration
-CND_ARTIFACT_DIR_default=dist/default/production
-CND_ARTIFACT_NAME_default=ctaocrypt_mcapi.X.production.hex
-CND_ARTIFACT_PATH_default=dist/default/production/ctaocrypt_mcapi.X.production.hex
-CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
-CND_PACKAGE_NAME_default=ctaocryptmcapi.x.tar
-CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/ctaocryptmcapi.x.tar
diff --git a/mcapi/ctaocrypt_mcapi.X/nbproject/Package-default.bash b/mcapi/ctaocrypt_mcapi.X/nbproject/Package-default.bash
deleted file mode 100644
index 26a502830..000000000
--- a/mcapi/ctaocrypt_mcapi.X/nbproject/Package-default.bash
+++ /dev/null
@@ -1,73 +0,0 @@
-#!/bin/bash -x
-
-#
-# Generated - do not edit!
-#
-
-# Macros
-TOP=`pwd`
-CND_CONF=default
-CND_DISTDIR=dist
-TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
-TMPDIRNAME=tmp-packaging
-OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_mcapi.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-OUTPUT_BASENAME=ctaocrypt_mcapi.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-PACKAGE_TOP_DIR=ctaocryptmcapi.x/
-
-# Functions
-function checkReturnCode
-{
-    rc=$?
-    if [ $rc != 0 ]
-    then
-        exit $rc
-    fi
-}
-function makeDirectory
-# $1 directory path
-# $2 permission (optional)
-{
-    mkdir -p "$1"
-    checkReturnCode
-    if [ "$2" != "" ]
-    then
-      chmod $2 "$1"
-      checkReturnCode
-    fi
-}
-function copyFileToTmpDir
-# $1 from-file path
-# $2 to-file path
-# $3 permission
-{
-    cp "$1" "$2"
-    checkReturnCode
-    if [ "$3" != "" ]
-    then
-        chmod $3 "$2"
-        checkReturnCode
-    fi
-}
-
-# Setup
-cd "${TOP}"
-mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
-rm -rf ${TMPDIR}
-mkdir -p ${TMPDIR}
-
-# Copy files and create directories and links
-cd "${TOP}"
-makeDirectory ${TMPDIR}/ctaocryptmcapi.x/bin
-copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}bin/${OUTPUT_BASENAME}" 0755
-
-
-# Generate tar file
-cd "${TOP}"
-rm -f ${CND_DISTDIR}/${CND_CONF}/package/ctaocryptmcapi.x.tar
-cd ${TMPDIR}
-tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/ctaocryptmcapi.x.tar *
-checkReturnCode
-
-# Cleanup
-cd "${TOP}"
-rm -rf ${TMPDIR}
diff --git a/mcapi/ctaocrypt_mcapi.X/nbproject/private/private.xml b/mcapi/ctaocrypt_mcapi.X/nbproject/private/private.xml
deleted file mode 100644
index e39667075..000000000
--- a/mcapi/ctaocrypt_mcapi.X/nbproject/private/private.xml
+++ /dev/null
@@ -1,3 +0,0 @@
-
-    
-
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-default.mk b/mcapi/ctaocrypt_test.X/nbproject/Makefile-default.mk
deleted file mode 100644
index df588914c..000000000
--- a/mcapi/ctaocrypt_test.X/nbproject/Makefile-default.mk
+++ /dev/null
@@ -1,164 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a -pre and a -post target defined where you can add customized code.
-#
-# This makefile implements configuration specific macros and targets.
-
-
-# Include project Makefile
-ifeq "${IGNORE_LOCAL}" "TRUE"
-# do not include local makefile. User is passing all local related variables already
-else
-include Makefile
-# Include makefile containing local settings
-ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
-include nbproject/Makefile-local-default.mk
-endif
-endif
-
-# Environment
-MKDIR=gnumkdir -p
-RM=rm -f 
-MV=mv 
-CP=cp 
-
-# Macros
-CND_CONF=default
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-IMAGE_TYPE=debug
-OUTPUT_SUFFIX=elf
-DEBUGGABLE_SUFFIX=elf
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-else
-IMAGE_TYPE=production
-OUTPUT_SUFFIX=hex
-DEBUGGABLE_SUFFIX=elf
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-endif
-
-# Object Directory
-OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
-
-# Distribution Directory
-DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
-
-# Source Files Quoted if spaced
-SOURCEFILES_QUOTED_IF_SPACED=../../ctaocrypt/test/test.c ../../mplabx/test_main.c
-
-# Object Files Quoted if spaced
-OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/1679622190/test.o ${OBJECTDIR}/_ext/1042050482/test_main.o
-POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/1679622190/test.o.d ${OBJECTDIR}/_ext/1042050482/test_main.o.d
-
-# Object Files
-OBJECTFILES=${OBJECTDIR}/_ext/1679622190/test.o ${OBJECTDIR}/_ext/1042050482/test_main.o
-
-# Source Files
-SOURCEFILES=../../ctaocrypt/test/test.c ../../mplabx/test_main.c
-
-
-CFLAGS=
-ASFLAGS=
-LDLIBSOPTIONS=
-
-############# Tool locations ##########################################
-# If you copy a project from one host to another, the path where the  #
-# compiler is installed may be different.                             #
-# If you open this project with MPLAB X in the new host, this         #
-# makefile will be regenerated and the paths will be corrected.       #
-#######################################################################
-# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
-FIXDEPS=fixDeps
-
-.build-conf:  ${BUILD_SUBPROJECTS}
-	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-
-MP_PROCESSOR_OPTION=32MZ2048ECM144
-MP_LINKER_FILE_OPTION=
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assemble
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assembleWithPreprocess
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compile
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-${OBJECTDIR}/_ext/1679622190/test.o: ../../ctaocrypt/test/test.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1679622190 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1679622190/test.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1679622190/test.o.d" -o ${OBJECTDIR}/_ext/1679622190/test.o ../../ctaocrypt/test/test.c   
-	
-${OBJECTDIR}/_ext/1042050482/test_main.o: ../../mplabx/test_main.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1042050482 
-	@${RM} ${OBJECTDIR}/_ext/1042050482/test_main.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1042050482/test_main.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1042050482/test_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1042050482/test_main.o.d" -o ${OBJECTDIR}/_ext/1042050482/test_main.o ../../mplabx/test_main.c   
-	
-else
-${OBJECTDIR}/_ext/1679622190/test.o: ../../ctaocrypt/test/test.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1679622190 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1679622190/test.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1679622190/test.o.d" -o ${OBJECTDIR}/_ext/1679622190/test.o ../../ctaocrypt/test/test.c   
-	
-${OBJECTDIR}/_ext/1042050482/test_main.o: ../../mplabx/test_main.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1042050482 
-	@${RM} ${OBJECTDIR}/_ext/1042050482/test_main.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1042050482/test_main.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1042050482/test_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1042050482/test_main.o.d" -o ${OBJECTDIR}/_ext/1042050482/test_main.o ../../mplabx/test_main.c   
-	
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compileCPP
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: link
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/debug/cyassl.X.a ../zlib.X/dist/default/debug/zlib.X.a  
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_CC} $(MP_EXTRA_LD_PRE)  -mdebugger -D__MPLAB_DEBUGGER_PK3=1 -mprocessor=$(MP_PROCESSOR_OPTION) -Os -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\debug\cyassl.X.a ..\zlib.X\dist\default\debug\zlib.X.a       -mreserve=data@0x0:0x27F   -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=__MPLAB_DEBUG=1,--defsym=__DEBUG=1,--defsym=__MPLAB_DEBUGGER_PK3=1,--defsym=_min_heap_size=32768,--defsym=_min_stack_size=1024,--gc-sections
-	
-else
-dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/production/cyassl.X.a ../zlib.X/dist/default/production/zlib.X.a 
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_CC} $(MP_EXTRA_LD_PRE)  -mprocessor=$(MP_PROCESSOR_OPTION) -Os -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\production\cyassl.X.a ..\zlib.X\dist\default\production\zlib.X.a      -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=_min_heap_size=32768,--defsym=_min_stack_size=1024,--gc-sections
-	${MP_CC_DIR}\\xc32-bin2hex dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} 
-endif
-
-
-# Subprojects
-.build-subprojects:
-	cd /D ../cyassl.X && ${MAKE}  -f Makefile CONF=default
-	cd /D ../zlib.X && ${MAKE}  -f Makefile CONF=default
-
-
-# Subprojects
-.clean-subprojects:
-	cd /D ../cyassl.X && rm -rf "build/default" "dist/default"
-	cd /D ../zlib.X && rm -rf "build/default" "dist/default"
-
-# Clean Targets
-.clean-conf: ${CLEAN_SUBPROJECTS}
-	${RM} -r build/default
-	${RM} -r dist/default
-
-# Enable dependency checking
-.dep.inc: .depcheck-impl
-
-DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
-ifneq (${DEPFILES},)
-include ${DEPFILES}
-endif
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-genesis.properties b/mcapi/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
deleted file mode 100644
index 26bb35fe2..000000000
--- a/mcapi/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-#Mon Nov 11 09:26:21 JST 2013
-default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
-default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30\\bin
-com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
-default.languagetoolchain.version=1.30
-host.platform=windows
-conf.ids=default
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-impl.mk b/mcapi/ctaocrypt_test.X/nbproject/Makefile-impl.mk
deleted file mode 100644
index 32630f76c..000000000
--- a/mcapi/ctaocrypt_test.X/nbproject/Makefile-impl.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a pre- and a post- target defined where you can add customization code.
-#
-# This makefile implements macros and targets common to all configurations.
-#
-# NOCDDL
-
-
-# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
-# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
-# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
-# and .clean-reqprojects-conf unless SUB has the value 'no'
-SUB_no=NO
-SUBPROJECTS=${SUB_${SUB}}
-BUILD_SUBPROJECTS_=.build-subprojects
-BUILD_SUBPROJECTS_NO=
-BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
-CLEAN_SUBPROJECTS_=.clean-subprojects
-CLEAN_SUBPROJECTS_NO=
-CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
-
-
-# Project Name
-PROJECTNAME=ctaocrypt_test.X
-
-# Active Configuration
-DEFAULTCONF=default
-CONF=${DEFAULTCONF}
-
-# All Configurations
-ALLCONFS=default 
-
-
-# build
-.build-impl: .build-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
-
-
-# clean
-.clean-impl: .clean-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
-
-# clobber
-.clobber-impl: .clobber-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
-
-
-
-# all
-.all-impl: .all-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
-
-
-
-# dependency checking support
-.depcheck-impl:
-#	@echo "# This code depends on make tool being used" >.dep.inc
-#	@if [ -n "${MAKE_VERSION}" ]; then \
-#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
-#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
-#	    echo "include \$${DEPFILES}" >>.dep.inc; \
-#	    echo "endif" >>.dep.inc; \
-#	else \
-#	    echo ".KEEP_STATE:" >>.dep.inc; \
-#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
-#	fi
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-local-default.mk b/mcapi/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
deleted file mode 100644
index 3350f874d..000000000
--- a/mcapi/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-#
-# This file contains information about the location of compilers and other tools.
-# If you commmit this file into your revision control server, you will be able to 
-# to checkout the project and build it from the command line with make. However,
-# if more than one person works on the same project, then this file might show
-# conflicts since different users are bound to have compilers in different places.
-# In that case you might choose to not commit this file and let MPLAB X recreate this file
-# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
-# least once so the file gets created and the project can be built. Finally, you can also
-# avoid using this file at all if you are only building from the command line with make.
-# You can invoke make with the values of the macros:
-# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
-#
-SHELL=cmd.exe
-PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
-# Adding MPLAB X bin directory to path.
-PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
-# Path to java used to run MPLAB X when this makefile was created
-MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
-OS_CURRENT="$(shell uname -s)"
-MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-gcc.exe"
-MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-g++.exe"
-# MP_BC is not defined
-MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-as.exe"
-MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ld.exe"
-MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ar.exe"
-DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
-MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
-MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-variables.mk b/mcapi/ctaocrypt_test.X/nbproject/Makefile-variables.mk
deleted file mode 100644
index 09fbeab2d..000000000
--- a/mcapi/ctaocrypt_test.X/nbproject/Makefile-variables.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Generated - do not edit!
-#
-# NOCDDL
-#
-CND_BASEDIR=`pwd`
-# default configuration
-CND_ARTIFACT_DIR_default=dist/default/production
-CND_ARTIFACT_NAME_default=ctaocrypt_test.X.production.hex
-CND_ARTIFACT_PATH_default=dist/default/production/ctaocrypt_test.X.production.hex
-CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
-CND_PACKAGE_NAME_default=ctaocrypttest.x.tar
-CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/ctaocrypttest.x.tar
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Package-default.bash b/mcapi/ctaocrypt_test.X/nbproject/Package-default.bash
deleted file mode 100644
index 24387c9d2..000000000
--- a/mcapi/ctaocrypt_test.X/nbproject/Package-default.bash
+++ /dev/null
@@ -1,73 +0,0 @@
-#!/bin/bash -x
-
-#
-# Generated - do not edit!
-#
-
-# Macros
-TOP=`pwd`
-CND_CONF=default
-CND_DISTDIR=dist
-TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
-TMPDIRNAME=tmp-packaging
-OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-OUTPUT_BASENAME=ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-PACKAGE_TOP_DIR=ctaocrypttest.x/
-
-# Functions
-function checkReturnCode
-{
-    rc=$?
-    if [ $rc != 0 ]
-    then
-        exit $rc
-    fi
-}
-function makeDirectory
-# $1 directory path
-# $2 permission (optional)
-{
-    mkdir -p "$1"
-    checkReturnCode
-    if [ "$2" != "" ]
-    then
-      chmod $2 "$1"
-      checkReturnCode
-    fi
-}
-function copyFileToTmpDir
-# $1 from-file path
-# $2 to-file path
-# $3 permission
-{
-    cp "$1" "$2"
-    checkReturnCode
-    if [ "$3" != "" ]
-    then
-        chmod $3 "$2"
-        checkReturnCode
-    fi
-}
-
-# Setup
-cd "${TOP}"
-mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
-rm -rf ${TMPDIR}
-mkdir -p ${TMPDIR}
-
-# Copy files and create directories and links
-cd "${TOP}"
-makeDirectory ${TMPDIR}/ctaocrypttest.x/bin
-copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}bin/${OUTPUT_BASENAME}" 0755
-
-
-# Generate tar file
-cd "${TOP}"
-rm -f ${CND_DISTDIR}/${CND_CONF}/package/ctaocrypttest.x.tar
-cd ${TMPDIR}
-tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/ctaocrypttest.x.tar *
-checkReturnCode
-
-# Cleanup
-cd "${TOP}"
-rm -rf ${TMPDIR}
diff --git a/mcapi/ctaocrypt_test.X/nbproject/private/private.xml b/mcapi/ctaocrypt_test.X/nbproject/private/private.xml
deleted file mode 100644
index 7015ffd51..000000000
--- a/mcapi/ctaocrypt_test.X/nbproject/private/private.xml
+++ /dev/null
@@ -1,8 +0,0 @@
-
-    
-    
-        file:/C:/ROOT/CyaSSL-Release/PIC32MZ/cyassl/mplabx/test_main.c
-        file:/C:/ROOT/CyaSSL-Release/PIC32MZ/cyassl/mplabx/benchmark_main.c
-        file:/C:/ROOT/CyaSSL-Release/PIC32MZ/cyassl/ctaocrypt/test/test.c
-    
-
diff --git a/mcapi/cyassl.X/nbproject/Makefile-default.mk b/mcapi/cyassl.X/nbproject/Makefile-default.mk
deleted file mode 100644
index cb552df92..000000000
--- a/mcapi/cyassl.X/nbproject/Makefile-default.mk
+++ /dev/null
@@ -1,626 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a -pre and a -post target defined where you can add customized code.
-#
-# This makefile implements configuration specific macros and targets.
-
-
-# Include project Makefile
-ifeq "${IGNORE_LOCAL}" "TRUE"
-# do not include local makefile. User is passing all local related variables already
-else
-include Makefile
-# Include makefile containing local settings
-ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
-include nbproject/Makefile-local-default.mk
-endif
-endif
-
-# Environment
-MKDIR=gnumkdir -p
-RM=rm -f 
-MV=mv 
-CP=cp 
-
-# Macros
-CND_CONF=default
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-IMAGE_TYPE=debug
-OUTPUT_SUFFIX=a
-DEBUGGABLE_SUFFIX=
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-else
-IMAGE_TYPE=production
-OUTPUT_SUFFIX=a
-DEBUGGABLE_SUFFIX=
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-endif
-
-# Object Directory
-OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
-
-# Distribution Directory
-DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
-
-# Source Files Quoted if spaced
-SOURCEFILES_QUOTED_IF_SPACED=../../src/crl.c ../../src/internal.c ../../src/io.c ../../src/keys.c ../../src/ocsp.c ../../src/sniffer.c ../../src/ssl.c ../../src/tls.c ../../ctaocrypt/src/aes.c ../../ctaocrypt/src/arc4.c ../../ctaocrypt/src/asm.c ../../ctaocrypt/src/asn.c ../../ctaocrypt/src/coding.c ../../ctaocrypt/src/des3.c ../../ctaocrypt/src/dh.c ../../ctaocrypt/src/dsa.c ../../ctaocrypt/src/ecc.c ../../ctaocrypt/src/ecc_fp.c ../../ctaocrypt/src/error.c ../../ctaocrypt/src/hc128.c ../../ctaocrypt/src/hmac.c ../../ctaocrypt/src/integer.c ../../ctaocrypt/src/logging.c ../../ctaocrypt/src/md2.c ../../ctaocrypt/src/md4.c ../../ctaocrypt/src/md5.c ../../ctaocrypt/src/memory.c ../../ctaocrypt/src/misc.c ../../ctaocrypt/src/pwdbased.c ../../ctaocrypt/src/rabbit.c ../../ctaocrypt/src/random.c ../../ctaocrypt/src/ripemd.c ../../ctaocrypt/src/rsa.c ../../ctaocrypt/src/sha.c ../../ctaocrypt/src/sha256.c ../../ctaocrypt/src/sha512.c ../../ctaocrypt/src/tfm.c ../../mcapi/crypto.c ../../ctaocrypt/src/compress.c ../../ctaocrypt/src/camellia.c ../../ctaocrypt/src/port.c
-
-# Object Files Quoted if spaced
-OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/1445274692/crl.o ${OBJECTDIR}/_ext/1445274692/internal.o ${OBJECTDIR}/_ext/1445274692/io.o ${OBJECTDIR}/_ext/1445274692/keys.o ${OBJECTDIR}/_ext/1445274692/ocsp.o ${OBJECTDIR}/_ext/1445274692/sniffer.o ${OBJECTDIR}/_ext/1445274692/ssl.o ${OBJECTDIR}/_ext/1445274692/tls.o ${OBJECTDIR}/_ext/1439655260/aes.o ${OBJECTDIR}/_ext/1439655260/arc4.o ${OBJECTDIR}/_ext/1439655260/asm.o ${OBJECTDIR}/_ext/1439655260/asn.o ${OBJECTDIR}/_ext/1439655260/coding.o ${OBJECTDIR}/_ext/1439655260/des3.o ${OBJECTDIR}/_ext/1439655260/dh.o ${OBJECTDIR}/_ext/1439655260/dsa.o ${OBJECTDIR}/_ext/1439655260/ecc.o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ${OBJECTDIR}/_ext/1439655260/error.o ${OBJECTDIR}/_ext/1439655260/hc128.o ${OBJECTDIR}/_ext/1439655260/hmac.o ${OBJECTDIR}/_ext/1439655260/integer.o ${OBJECTDIR}/_ext/1439655260/logging.o ${OBJECTDIR}/_ext/1439655260/md2.o ${OBJECTDIR}/_ext/1439655260/md4.o ${OBJECTDIR}/_ext/1439655260/md5.o ${OBJECTDIR}/_ext/1439655260/memory.o ${OBJECTDIR}/_ext/1439655260/misc.o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ${OBJECTDIR}/_ext/1439655260/rabbit.o ${OBJECTDIR}/_ext/1439655260/random.o ${OBJECTDIR}/_ext/1439655260/ripemd.o ${OBJECTDIR}/_ext/1439655260/rsa.o ${OBJECTDIR}/_ext/1439655260/sha.o ${OBJECTDIR}/_ext/1439655260/sha256.o ${OBJECTDIR}/_ext/1439655260/sha512.o ${OBJECTDIR}/_ext/1439655260/tfm.o ${OBJECTDIR}/_ext/1628556068/crypto.o ${OBJECTDIR}/_ext/1439655260/compress.o ${OBJECTDIR}/_ext/1439655260/camellia.o ${OBJECTDIR}/_ext/1439655260/port.o
-POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/1445274692/crl.o.d ${OBJECTDIR}/_ext/1445274692/internal.o.d ${OBJECTDIR}/_ext/1445274692/io.o.d ${OBJECTDIR}/_ext/1445274692/keys.o.d ${OBJECTDIR}/_ext/1445274692/ocsp.o.d ${OBJECTDIR}/_ext/1445274692/sniffer.o.d ${OBJECTDIR}/_ext/1445274692/ssl.o.d ${OBJECTDIR}/_ext/1445274692/tls.o.d ${OBJECTDIR}/_ext/1439655260/aes.o.d ${OBJECTDIR}/_ext/1439655260/arc4.o.d ${OBJECTDIR}/_ext/1439655260/asm.o.d ${OBJECTDIR}/_ext/1439655260/asn.o.d ${OBJECTDIR}/_ext/1439655260/coding.o.d ${OBJECTDIR}/_ext/1439655260/des3.o.d ${OBJECTDIR}/_ext/1439655260/dh.o.d ${OBJECTDIR}/_ext/1439655260/dsa.o.d ${OBJECTDIR}/_ext/1439655260/ecc.o.d ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d ${OBJECTDIR}/_ext/1439655260/error.o.d ${OBJECTDIR}/_ext/1439655260/hc128.o.d ${OBJECTDIR}/_ext/1439655260/hmac.o.d ${OBJECTDIR}/_ext/1439655260/integer.o.d ${OBJECTDIR}/_ext/1439655260/logging.o.d ${OBJECTDIR}/_ext/1439655260/md2.o.d ${OBJECTDIR}/_ext/1439655260/md4.o.d ${OBJECTDIR}/_ext/1439655260/md5.o.d ${OBJECTDIR}/_ext/1439655260/memory.o.d ${OBJECTDIR}/_ext/1439655260/misc.o.d ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d ${OBJECTDIR}/_ext/1439655260/rabbit.o.d ${OBJECTDIR}/_ext/1439655260/random.o.d ${OBJECTDIR}/_ext/1439655260/ripemd.o.d ${OBJECTDIR}/_ext/1439655260/rsa.o.d ${OBJECTDIR}/_ext/1439655260/sha.o.d ${OBJECTDIR}/_ext/1439655260/sha256.o.d ${OBJECTDIR}/_ext/1439655260/sha512.o.d ${OBJECTDIR}/_ext/1439655260/tfm.o.d ${OBJECTDIR}/_ext/1628556068/crypto.o.d ${OBJECTDIR}/_ext/1439655260/compress.o.d ${OBJECTDIR}/_ext/1439655260/camellia.o.d ${OBJECTDIR}/_ext/1439655260/port.o.d
-
-# Object Files
-OBJECTFILES=${OBJECTDIR}/_ext/1445274692/crl.o ${OBJECTDIR}/_ext/1445274692/internal.o ${OBJECTDIR}/_ext/1445274692/io.o ${OBJECTDIR}/_ext/1445274692/keys.o ${OBJECTDIR}/_ext/1445274692/ocsp.o ${OBJECTDIR}/_ext/1445274692/sniffer.o ${OBJECTDIR}/_ext/1445274692/ssl.o ${OBJECTDIR}/_ext/1445274692/tls.o ${OBJECTDIR}/_ext/1439655260/aes.o ${OBJECTDIR}/_ext/1439655260/arc4.o ${OBJECTDIR}/_ext/1439655260/asm.o ${OBJECTDIR}/_ext/1439655260/asn.o ${OBJECTDIR}/_ext/1439655260/coding.o ${OBJECTDIR}/_ext/1439655260/des3.o ${OBJECTDIR}/_ext/1439655260/dh.o ${OBJECTDIR}/_ext/1439655260/dsa.o ${OBJECTDIR}/_ext/1439655260/ecc.o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ${OBJECTDIR}/_ext/1439655260/error.o ${OBJECTDIR}/_ext/1439655260/hc128.o ${OBJECTDIR}/_ext/1439655260/hmac.o ${OBJECTDIR}/_ext/1439655260/integer.o ${OBJECTDIR}/_ext/1439655260/logging.o ${OBJECTDIR}/_ext/1439655260/md2.o ${OBJECTDIR}/_ext/1439655260/md4.o ${OBJECTDIR}/_ext/1439655260/md5.o ${OBJECTDIR}/_ext/1439655260/memory.o ${OBJECTDIR}/_ext/1439655260/misc.o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ${OBJECTDIR}/_ext/1439655260/rabbit.o ${OBJECTDIR}/_ext/1439655260/random.o ${OBJECTDIR}/_ext/1439655260/ripemd.o ${OBJECTDIR}/_ext/1439655260/rsa.o ${OBJECTDIR}/_ext/1439655260/sha.o ${OBJECTDIR}/_ext/1439655260/sha256.o ${OBJECTDIR}/_ext/1439655260/sha512.o ${OBJECTDIR}/_ext/1439655260/tfm.o ${OBJECTDIR}/_ext/1628556068/crypto.o ${OBJECTDIR}/_ext/1439655260/compress.o ${OBJECTDIR}/_ext/1439655260/camellia.o ${OBJECTDIR}/_ext/1439655260/port.o
-
-# Source Files
-SOURCEFILES=../../src/crl.c ../../src/internal.c ../../src/io.c ../../src/keys.c ../../src/ocsp.c ../../src/sniffer.c ../../src/ssl.c ../../src/tls.c ../../ctaocrypt/src/aes.c ../../ctaocrypt/src/arc4.c ../../ctaocrypt/src/asm.c ../../ctaocrypt/src/asn.c ../../ctaocrypt/src/coding.c ../../ctaocrypt/src/des3.c ../../ctaocrypt/src/dh.c ../../ctaocrypt/src/dsa.c ../../ctaocrypt/src/ecc.c ../../ctaocrypt/src/ecc_fp.c ../../ctaocrypt/src/error.c ../../ctaocrypt/src/hc128.c ../../ctaocrypt/src/hmac.c ../../ctaocrypt/src/integer.c ../../ctaocrypt/src/logging.c ../../ctaocrypt/src/md2.c ../../ctaocrypt/src/md4.c ../../ctaocrypt/src/md5.c ../../ctaocrypt/src/memory.c ../../ctaocrypt/src/misc.c ../../ctaocrypt/src/pwdbased.c ../../ctaocrypt/src/rabbit.c ../../ctaocrypt/src/random.c ../../ctaocrypt/src/ripemd.c ../../ctaocrypt/src/rsa.c ../../ctaocrypt/src/sha.c ../../ctaocrypt/src/sha256.c ../../ctaocrypt/src/sha512.c ../../ctaocrypt/src/tfm.c ../../mcapi/crypto.c ../../ctaocrypt/src/compress.c ../../ctaocrypt/src/camellia.c ../../ctaocrypt/src/port.c
-
-
-CFLAGS=
-ASFLAGS=
-LDLIBSOPTIONS=
-
-############# Tool locations ##########################################
-# If you copy a project from one host to another, the path where the  #
-# compiler is installed may be different.                             #
-# If you open this project with MPLAB X in the new host, this         #
-# makefile will be regenerated and the paths will be corrected.       #
-#######################################################################
-# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
-FIXDEPS=fixDeps
-
-.build-conf:  ${BUILD_SUBPROJECTS}
-	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-
-MP_PROCESSOR_OPTION=32MZ2048ECM144
-MP_LINKER_FILE_OPTION=
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assemble
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assembleWithPreprocess
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compile
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-${OBJECTDIR}/_ext/1445274692/crl.o: ../../src/crl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/crl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/crl.o.d" -o ${OBJECTDIR}/_ext/1445274692/crl.o ../../src/crl.c   
-	
-${OBJECTDIR}/_ext/1445274692/internal.o: ../../src/internal.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/internal.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/internal.o.d" -o ${OBJECTDIR}/_ext/1445274692/internal.o ../../src/internal.c   
-	
-${OBJECTDIR}/_ext/1445274692/io.o: ../../src/io.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/io.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/io.o.d" -o ${OBJECTDIR}/_ext/1445274692/io.o ../../src/io.c   
-	
-${OBJECTDIR}/_ext/1445274692/keys.o: ../../src/keys.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/keys.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/keys.o.d" -o ${OBJECTDIR}/_ext/1445274692/keys.o ../../src/keys.c   
-	
-${OBJECTDIR}/_ext/1445274692/ocsp.o: ../../src/ocsp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" -o ${OBJECTDIR}/_ext/1445274692/ocsp.o ../../src/ocsp.c   
-	
-${OBJECTDIR}/_ext/1445274692/sniffer.o: ../../src/sniffer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" -o ${OBJECTDIR}/_ext/1445274692/sniffer.o ../../src/sniffer.c   
-	
-${OBJECTDIR}/_ext/1445274692/ssl.o: ../../src/ssl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ssl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ssl.o.d" -o ${OBJECTDIR}/_ext/1445274692/ssl.o ../../src/ssl.c   
-	
-${OBJECTDIR}/_ext/1445274692/tls.o: ../../src/tls.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/tls.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/tls.o.d" -o ${OBJECTDIR}/_ext/1445274692/tls.o ../../src/tls.c   
-	
-${OBJECTDIR}/_ext/1439655260/aes.o: ../../ctaocrypt/src/aes.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/aes.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/aes.o.d" -o ${OBJECTDIR}/_ext/1439655260/aes.o ../../ctaocrypt/src/aes.c   
-	
-${OBJECTDIR}/_ext/1439655260/arc4.o: ../../ctaocrypt/src/arc4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/arc4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/arc4.o.d" -o ${OBJECTDIR}/_ext/1439655260/arc4.o ../../ctaocrypt/src/arc4.c   
-	
-${OBJECTDIR}/_ext/1439655260/asm.o: ../../ctaocrypt/src/asm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asm.o.d" -o ${OBJECTDIR}/_ext/1439655260/asm.o ../../ctaocrypt/src/asm.c   
-	
-${OBJECTDIR}/_ext/1439655260/asn.o: ../../ctaocrypt/src/asn.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asn.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asn.o.d" -o ${OBJECTDIR}/_ext/1439655260/asn.o ../../ctaocrypt/src/asn.c   
-	
-${OBJECTDIR}/_ext/1439655260/coding.o: ../../ctaocrypt/src/coding.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/coding.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/coding.o.d" -o ${OBJECTDIR}/_ext/1439655260/coding.o ../../ctaocrypt/src/coding.c   
-	
-${OBJECTDIR}/_ext/1439655260/des3.o: ../../ctaocrypt/src/des3.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/des3.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/des3.o.d" -o ${OBJECTDIR}/_ext/1439655260/des3.o ../../ctaocrypt/src/des3.c   
-	
-${OBJECTDIR}/_ext/1439655260/dh.o: ../../ctaocrypt/src/dh.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dh.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dh.o.d" -o ${OBJECTDIR}/_ext/1439655260/dh.o ../../ctaocrypt/src/dh.c   
-	
-${OBJECTDIR}/_ext/1439655260/dsa.o: ../../ctaocrypt/src/dsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/dsa.o ../../ctaocrypt/src/dsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc.o: ../../ctaocrypt/src/ecc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc.o ../../ctaocrypt/src/ecc.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc_fp.o: ../../ctaocrypt/src/ecc_fp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ../../ctaocrypt/src/ecc_fp.c   
-	
-${OBJECTDIR}/_ext/1439655260/error.o: ../../ctaocrypt/src/error.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/error.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/error.o.d" -o ${OBJECTDIR}/_ext/1439655260/error.o ../../ctaocrypt/src/error.c   
-	
-${OBJECTDIR}/_ext/1439655260/hc128.o: ../../ctaocrypt/src/hc128.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hc128.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hc128.o.d" -o ${OBJECTDIR}/_ext/1439655260/hc128.o ../../ctaocrypt/src/hc128.c   
-	
-${OBJECTDIR}/_ext/1439655260/hmac.o: ../../ctaocrypt/src/hmac.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hmac.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hmac.o.d" -o ${OBJECTDIR}/_ext/1439655260/hmac.o ../../ctaocrypt/src/hmac.c   
-	
-${OBJECTDIR}/_ext/1439655260/integer.o: ../../ctaocrypt/src/integer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/integer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/integer.o.d" -o ${OBJECTDIR}/_ext/1439655260/integer.o ../../ctaocrypt/src/integer.c   
-	
-${OBJECTDIR}/_ext/1439655260/logging.o: ../../ctaocrypt/src/logging.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/logging.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/logging.o.d" -o ${OBJECTDIR}/_ext/1439655260/logging.o ../../ctaocrypt/src/logging.c   
-	
-${OBJECTDIR}/_ext/1439655260/md2.o: ../../ctaocrypt/src/md2.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md2.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md2.o.d" -o ${OBJECTDIR}/_ext/1439655260/md2.o ../../ctaocrypt/src/md2.c   
-	
-${OBJECTDIR}/_ext/1439655260/md4.o: ../../ctaocrypt/src/md4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md4.o.d" -o ${OBJECTDIR}/_ext/1439655260/md4.o ../../ctaocrypt/src/md4.c   
-	
-${OBJECTDIR}/_ext/1439655260/md5.o: ../../ctaocrypt/src/md5.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md5.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md5.o.d" -o ${OBJECTDIR}/_ext/1439655260/md5.o ../../ctaocrypt/src/md5.c   
-	
-${OBJECTDIR}/_ext/1439655260/memory.o: ../../ctaocrypt/src/memory.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/memory.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/memory.o.d" -o ${OBJECTDIR}/_ext/1439655260/memory.o ../../ctaocrypt/src/memory.c   
-	
-${OBJECTDIR}/_ext/1439655260/misc.o: ../../ctaocrypt/src/misc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/misc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/misc.o.d" -o ${OBJECTDIR}/_ext/1439655260/misc.o ../../ctaocrypt/src/misc.c   
-	
-${OBJECTDIR}/_ext/1439655260/pwdbased.o: ../../ctaocrypt/src/pwdbased.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" -o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ../../ctaocrypt/src/pwdbased.c   
-	
-${OBJECTDIR}/_ext/1439655260/rabbit.o: ../../ctaocrypt/src/rabbit.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" -o ${OBJECTDIR}/_ext/1439655260/rabbit.o ../../ctaocrypt/src/rabbit.c   
-	
-${OBJECTDIR}/_ext/1439655260/random.o: ../../ctaocrypt/src/random.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/random.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/random.o.d" -o ${OBJECTDIR}/_ext/1439655260/random.o ../../ctaocrypt/src/random.c   
-	
-${OBJECTDIR}/_ext/1439655260/ripemd.o: ../../ctaocrypt/src/ripemd.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" -o ${OBJECTDIR}/_ext/1439655260/ripemd.o ../../ctaocrypt/src/ripemd.c   
-	
-${OBJECTDIR}/_ext/1439655260/rsa.o: ../../ctaocrypt/src/rsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/rsa.o ../../ctaocrypt/src/rsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha.o: ../../ctaocrypt/src/sha.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha.o ../../ctaocrypt/src/sha.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha256.o: ../../ctaocrypt/src/sha256.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha256.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha256.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha256.o ../../ctaocrypt/src/sha256.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha512.o: ../../ctaocrypt/src/sha512.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha512.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha512.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha512.o ../../ctaocrypt/src/sha512.c   
-	
-${OBJECTDIR}/_ext/1439655260/tfm.o: ../../ctaocrypt/src/tfm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/tfm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/tfm.o.d" -o ${OBJECTDIR}/_ext/1439655260/tfm.o ../../ctaocrypt/src/tfm.c   
-	
-${OBJECTDIR}/_ext/1628556068/crypto.o: ../../mcapi/crypto.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1628556068 
-	@${RM} ${OBJECTDIR}/_ext/1628556068/crypto.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1628556068/crypto.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1628556068/crypto.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1628556068/crypto.o.d" -o ${OBJECTDIR}/_ext/1628556068/crypto.o ../../mcapi/crypto.c   
-	
-${OBJECTDIR}/_ext/1439655260/compress.o: ../../ctaocrypt/src/compress.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/compress.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/compress.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/compress.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/compress.o.d" -o ${OBJECTDIR}/_ext/1439655260/compress.o ../../ctaocrypt/src/compress.c   
-	
-${OBJECTDIR}/_ext/1439655260/camellia.o: ../../ctaocrypt/src/camellia.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/camellia.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/camellia.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/camellia.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/camellia.o.d" -o ${OBJECTDIR}/_ext/1439655260/camellia.o ../../ctaocrypt/src/camellia.c   
-	
-${OBJECTDIR}/_ext/1439655260/port.o: ../../ctaocrypt/src/port.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/port.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/port.o.d" -o ${OBJECTDIR}/_ext/1439655260/port.o ../../ctaocrypt/src/port.c   
-	
-else
-${OBJECTDIR}/_ext/1445274692/crl.o: ../../src/crl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/crl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/crl.o.d" -o ${OBJECTDIR}/_ext/1445274692/crl.o ../../src/crl.c   
-	
-${OBJECTDIR}/_ext/1445274692/internal.o: ../../src/internal.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/internal.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/internal.o.d" -o ${OBJECTDIR}/_ext/1445274692/internal.o ../../src/internal.c   
-	
-${OBJECTDIR}/_ext/1445274692/io.o: ../../src/io.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/io.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/io.o.d" -o ${OBJECTDIR}/_ext/1445274692/io.o ../../src/io.c   
-	
-${OBJECTDIR}/_ext/1445274692/keys.o: ../../src/keys.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/keys.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/keys.o.d" -o ${OBJECTDIR}/_ext/1445274692/keys.o ../../src/keys.c   
-	
-${OBJECTDIR}/_ext/1445274692/ocsp.o: ../../src/ocsp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" -o ${OBJECTDIR}/_ext/1445274692/ocsp.o ../../src/ocsp.c   
-	
-${OBJECTDIR}/_ext/1445274692/sniffer.o: ../../src/sniffer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" -o ${OBJECTDIR}/_ext/1445274692/sniffer.o ../../src/sniffer.c   
-	
-${OBJECTDIR}/_ext/1445274692/ssl.o: ../../src/ssl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ssl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ssl.o.d" -o ${OBJECTDIR}/_ext/1445274692/ssl.o ../../src/ssl.c   
-	
-${OBJECTDIR}/_ext/1445274692/tls.o: ../../src/tls.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/tls.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/tls.o.d" -o ${OBJECTDIR}/_ext/1445274692/tls.o ../../src/tls.c   
-	
-${OBJECTDIR}/_ext/1439655260/aes.o: ../../ctaocrypt/src/aes.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/aes.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/aes.o.d" -o ${OBJECTDIR}/_ext/1439655260/aes.o ../../ctaocrypt/src/aes.c   
-	
-${OBJECTDIR}/_ext/1439655260/arc4.o: ../../ctaocrypt/src/arc4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/arc4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/arc4.o.d" -o ${OBJECTDIR}/_ext/1439655260/arc4.o ../../ctaocrypt/src/arc4.c   
-	
-${OBJECTDIR}/_ext/1439655260/asm.o: ../../ctaocrypt/src/asm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asm.o.d" -o ${OBJECTDIR}/_ext/1439655260/asm.o ../../ctaocrypt/src/asm.c   
-	
-${OBJECTDIR}/_ext/1439655260/asn.o: ../../ctaocrypt/src/asn.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asn.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asn.o.d" -o ${OBJECTDIR}/_ext/1439655260/asn.o ../../ctaocrypt/src/asn.c   
-	
-${OBJECTDIR}/_ext/1439655260/coding.o: ../../ctaocrypt/src/coding.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/coding.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/coding.o.d" -o ${OBJECTDIR}/_ext/1439655260/coding.o ../../ctaocrypt/src/coding.c   
-	
-${OBJECTDIR}/_ext/1439655260/des3.o: ../../ctaocrypt/src/des3.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/des3.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/des3.o.d" -o ${OBJECTDIR}/_ext/1439655260/des3.o ../../ctaocrypt/src/des3.c   
-	
-${OBJECTDIR}/_ext/1439655260/dh.o: ../../ctaocrypt/src/dh.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dh.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dh.o.d" -o ${OBJECTDIR}/_ext/1439655260/dh.o ../../ctaocrypt/src/dh.c   
-	
-${OBJECTDIR}/_ext/1439655260/dsa.o: ../../ctaocrypt/src/dsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/dsa.o ../../ctaocrypt/src/dsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc.o: ../../ctaocrypt/src/ecc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc.o ../../ctaocrypt/src/ecc.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc_fp.o: ../../ctaocrypt/src/ecc_fp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ../../ctaocrypt/src/ecc_fp.c   
-	
-${OBJECTDIR}/_ext/1439655260/error.o: ../../ctaocrypt/src/error.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/error.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/error.o.d" -o ${OBJECTDIR}/_ext/1439655260/error.o ../../ctaocrypt/src/error.c   
-	
-${OBJECTDIR}/_ext/1439655260/hc128.o: ../../ctaocrypt/src/hc128.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hc128.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hc128.o.d" -o ${OBJECTDIR}/_ext/1439655260/hc128.o ../../ctaocrypt/src/hc128.c   
-	
-${OBJECTDIR}/_ext/1439655260/hmac.o: ../../ctaocrypt/src/hmac.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hmac.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hmac.o.d" -o ${OBJECTDIR}/_ext/1439655260/hmac.o ../../ctaocrypt/src/hmac.c   
-	
-${OBJECTDIR}/_ext/1439655260/integer.o: ../../ctaocrypt/src/integer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/integer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/integer.o.d" -o ${OBJECTDIR}/_ext/1439655260/integer.o ../../ctaocrypt/src/integer.c   
-	
-${OBJECTDIR}/_ext/1439655260/logging.o: ../../ctaocrypt/src/logging.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/logging.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/logging.o.d" -o ${OBJECTDIR}/_ext/1439655260/logging.o ../../ctaocrypt/src/logging.c   
-	
-${OBJECTDIR}/_ext/1439655260/md2.o: ../../ctaocrypt/src/md2.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md2.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md2.o.d" -o ${OBJECTDIR}/_ext/1439655260/md2.o ../../ctaocrypt/src/md2.c   
-	
-${OBJECTDIR}/_ext/1439655260/md4.o: ../../ctaocrypt/src/md4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md4.o.d" -o ${OBJECTDIR}/_ext/1439655260/md4.o ../../ctaocrypt/src/md4.c   
-	
-${OBJECTDIR}/_ext/1439655260/md5.o: ../../ctaocrypt/src/md5.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md5.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md5.o.d" -o ${OBJECTDIR}/_ext/1439655260/md5.o ../../ctaocrypt/src/md5.c   
-	
-${OBJECTDIR}/_ext/1439655260/memory.o: ../../ctaocrypt/src/memory.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/memory.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/memory.o.d" -o ${OBJECTDIR}/_ext/1439655260/memory.o ../../ctaocrypt/src/memory.c   
-	
-${OBJECTDIR}/_ext/1439655260/misc.o: ../../ctaocrypt/src/misc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/misc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/misc.o.d" -o ${OBJECTDIR}/_ext/1439655260/misc.o ../../ctaocrypt/src/misc.c   
-	
-${OBJECTDIR}/_ext/1439655260/pwdbased.o: ../../ctaocrypt/src/pwdbased.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" -o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ../../ctaocrypt/src/pwdbased.c   
-	
-${OBJECTDIR}/_ext/1439655260/rabbit.o: ../../ctaocrypt/src/rabbit.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" -o ${OBJECTDIR}/_ext/1439655260/rabbit.o ../../ctaocrypt/src/rabbit.c   
-	
-${OBJECTDIR}/_ext/1439655260/random.o: ../../ctaocrypt/src/random.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/random.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/random.o.d" -o ${OBJECTDIR}/_ext/1439655260/random.o ../../ctaocrypt/src/random.c   
-	
-${OBJECTDIR}/_ext/1439655260/ripemd.o: ../../ctaocrypt/src/ripemd.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" -o ${OBJECTDIR}/_ext/1439655260/ripemd.o ../../ctaocrypt/src/ripemd.c   
-	
-${OBJECTDIR}/_ext/1439655260/rsa.o: ../../ctaocrypt/src/rsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/rsa.o ../../ctaocrypt/src/rsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha.o: ../../ctaocrypt/src/sha.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha.o ../../ctaocrypt/src/sha.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha256.o: ../../ctaocrypt/src/sha256.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha256.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha256.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha256.o ../../ctaocrypt/src/sha256.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha512.o: ../../ctaocrypt/src/sha512.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha512.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha512.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha512.o ../../ctaocrypt/src/sha512.c   
-	
-${OBJECTDIR}/_ext/1439655260/tfm.o: ../../ctaocrypt/src/tfm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/tfm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/tfm.o.d" -o ${OBJECTDIR}/_ext/1439655260/tfm.o ../../ctaocrypt/src/tfm.c   
-	
-${OBJECTDIR}/_ext/1628556068/crypto.o: ../../mcapi/crypto.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1628556068 
-	@${RM} ${OBJECTDIR}/_ext/1628556068/crypto.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1628556068/crypto.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1628556068/crypto.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1628556068/crypto.o.d" -o ${OBJECTDIR}/_ext/1628556068/crypto.o ../../mcapi/crypto.c   
-	
-${OBJECTDIR}/_ext/1439655260/compress.o: ../../ctaocrypt/src/compress.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/compress.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/compress.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/compress.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/compress.o.d" -o ${OBJECTDIR}/_ext/1439655260/compress.o ../../ctaocrypt/src/compress.c   
-	
-${OBJECTDIR}/_ext/1439655260/camellia.o: ../../ctaocrypt/src/camellia.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/camellia.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/camellia.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/camellia.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/camellia.o.d" -o ${OBJECTDIR}/_ext/1439655260/camellia.o ../../ctaocrypt/src/camellia.c   
-	
-${OBJECTDIR}/_ext/1439655260/port.o: ../../ctaocrypt/src/port.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/port.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/port.o.d" -o ${OBJECTDIR}/_ext/1439655260/port.o ../../ctaocrypt/src/port.c   
-	
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compileCPP
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: archive
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk    
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
-else
-dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk   
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
-endif
-
-
-# Subprojects
-.build-subprojects:
-
-
-# Subprojects
-.clean-subprojects:
-
-# Clean Targets
-.clean-conf: ${CLEAN_SUBPROJECTS}
-	${RM} -r build/default
-	${RM} -r dist/default
-
-# Enable dependency checking
-.dep.inc: .depcheck-impl
-
-DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
-ifneq (${DEPFILES},)
-include ${DEPFILES}
-endif
diff --git a/mcapi/cyassl.X/nbproject/Makefile-genesis.properties b/mcapi/cyassl.X/nbproject/Makefile-genesis.properties
deleted file mode 100644
index 028a18887..000000000
--- a/mcapi/cyassl.X/nbproject/Makefile-genesis.properties
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-#Mon Nov 11 09:26:33 JST 2013
-default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
-default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30\\bin
-com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
-default.languagetoolchain.version=1.30
-host.platform=windows
-conf.ids=default
diff --git a/mcapi/cyassl.X/nbproject/Makefile-impl.mk b/mcapi/cyassl.X/nbproject/Makefile-impl.mk
deleted file mode 100644
index 6f20c0abd..000000000
--- a/mcapi/cyassl.X/nbproject/Makefile-impl.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a pre- and a post- target defined where you can add customization code.
-#
-# This makefile implements macros and targets common to all configurations.
-#
-# NOCDDL
-
-
-# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
-# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
-# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
-# and .clean-reqprojects-conf unless SUB has the value 'no'
-SUB_no=NO
-SUBPROJECTS=${SUB_${SUB}}
-BUILD_SUBPROJECTS_=.build-subprojects
-BUILD_SUBPROJECTS_NO=
-BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
-CLEAN_SUBPROJECTS_=.clean-subprojects
-CLEAN_SUBPROJECTS_NO=
-CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
-
-
-# Project Name
-PROJECTNAME=cyassl.X
-
-# Active Configuration
-DEFAULTCONF=default
-CONF=${DEFAULTCONF}
-
-# All Configurations
-ALLCONFS=default 
-
-
-# build
-.build-impl: .build-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
-
-
-# clean
-.clean-impl: .clean-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
-
-# clobber
-.clobber-impl: .clobber-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
-
-
-
-# all
-.all-impl: .all-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
-
-
-
-# dependency checking support
-.depcheck-impl:
-#	@echo "# This code depends on make tool being used" >.dep.inc
-#	@if [ -n "${MAKE_VERSION}" ]; then \
-#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
-#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
-#	    echo "include \$${DEPFILES}" >>.dep.inc; \
-#	    echo "endif" >>.dep.inc; \
-#	else \
-#	    echo ".KEEP_STATE:" >>.dep.inc; \
-#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
-#	fi
diff --git a/mcapi/cyassl.X/nbproject/Makefile-local-default.mk b/mcapi/cyassl.X/nbproject/Makefile-local-default.mk
deleted file mode 100644
index 3350f874d..000000000
--- a/mcapi/cyassl.X/nbproject/Makefile-local-default.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-#
-# This file contains information about the location of compilers and other tools.
-# If you commmit this file into your revision control server, you will be able to 
-# to checkout the project and build it from the command line with make. However,
-# if more than one person works on the same project, then this file might show
-# conflicts since different users are bound to have compilers in different places.
-# In that case you might choose to not commit this file and let MPLAB X recreate this file
-# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
-# least once so the file gets created and the project can be built. Finally, you can also
-# avoid using this file at all if you are only building from the command line with make.
-# You can invoke make with the values of the macros:
-# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
-#
-SHELL=cmd.exe
-PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
-# Adding MPLAB X bin directory to path.
-PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
-# Path to java used to run MPLAB X when this makefile was created
-MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
-OS_CURRENT="$(shell uname -s)"
-MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-gcc.exe"
-MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-g++.exe"
-# MP_BC is not defined
-MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-as.exe"
-MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ld.exe"
-MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ar.exe"
-DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
-MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
-MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
diff --git a/mcapi/cyassl.X/nbproject/Makefile-variables.mk b/mcapi/cyassl.X/nbproject/Makefile-variables.mk
deleted file mode 100644
index b480b107d..000000000
--- a/mcapi/cyassl.X/nbproject/Makefile-variables.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Generated - do not edit!
-#
-# NOCDDL
-#
-CND_BASEDIR=`pwd`
-# default configuration
-CND_ARTIFACT_DIR_default=dist/default/production
-CND_ARTIFACT_NAME_default=cyassl.X.a
-CND_ARTIFACT_PATH_default=dist/default/production/cyassl.X.a
-CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
-CND_PACKAGE_NAME_default=cyassl.X.tar
-CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/cyassl.X.tar
diff --git a/mcapi/cyassl.X/nbproject/Package-default.bash b/mcapi/cyassl.X/nbproject/Package-default.bash
deleted file mode 100644
index baae5e998..000000000
--- a/mcapi/cyassl.X/nbproject/Package-default.bash
+++ /dev/null
@@ -1,73 +0,0 @@
-#!/bin/bash -x
-
-#
-# Generated - do not edit!
-#
-
-# Macros
-TOP=`pwd`
-CND_CONF=default
-CND_DISTDIR=dist
-TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
-TMPDIRNAME=tmp-packaging
-OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-OUTPUT_BASENAME=cyassl.X.${OUTPUT_SUFFIX}
-PACKAGE_TOP_DIR=cyassl.X/
-
-# Functions
-function checkReturnCode
-{
-    rc=$?
-    if [ $rc != 0 ]
-    then
-        exit $rc
-    fi
-}
-function makeDirectory
-# $1 directory path
-# $2 permission (optional)
-{
-    mkdir -p "$1"
-    checkReturnCode
-    if [ "$2" != "" ]
-    then
-      chmod $2 "$1"
-      checkReturnCode
-    fi
-}
-function copyFileToTmpDir
-# $1 from-file path
-# $2 to-file path
-# $3 permission
-{
-    cp "$1" "$2"
-    checkReturnCode
-    if [ "$3" != "" ]
-    then
-        chmod $3 "$2"
-        checkReturnCode
-    fi
-}
-
-# Setup
-cd "${TOP}"
-mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
-rm -rf ${TMPDIR}
-mkdir -p ${TMPDIR}
-
-# Copy files and create directories and links
-cd "${TOP}"
-makeDirectory ${TMPDIR}/cyassl.X/lib
-copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}lib/${OUTPUT_BASENAME}" 0644
-
-
-# Generate tar file
-cd "${TOP}"
-rm -f ${CND_DISTDIR}/${CND_CONF}/package/cyassl.X.tar
-cd ${TMPDIR}
-tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/cyassl.X.tar *
-checkReturnCode
-
-# Cleanup
-cd "${TOP}"
-rm -rf ${TMPDIR}
diff --git a/mcapi/cyassl.X/nbproject/private/private.xml b/mcapi/cyassl.X/nbproject/private/private.xml
deleted file mode 100644
index 29311904a..000000000
--- a/mcapi/cyassl.X/nbproject/private/private.xml
+++ /dev/null
@@ -1,6 +0,0 @@
-
-    
-        file:/C:/ROOT/CyaSSL-Release/PIC32MZ/cyassl/ctaocrypt/src/sha256.c
-        file:/C:/ROOT/CyaSSL-Release/PIC32MZ/cyassl/ctaocrypt/src/tfm.c
-    
-
diff --git a/mcapi/test.c b/mcapi/test.c
deleted file mode 100644
index 40de58bc0..000000000
--- a/mcapi/test.c
+++ /dev/null
@@ -1,1361 +0,0 @@
-/* test.c
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-/* Tests Microchip CRYPTO API layer */
-
-
-
-/* mc api header */
-#include "crypto.h"
-
-#include 
-
-/* sanity test against our default implementation, cyassl headers  */
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#define USE_CERT_BUFFERS_1024
-#include 
-
-/* c stdlib headers */
-#include 
-
-/* pic32 specific */
-#ifdef MICROCHIP_PIC32
-    #define PIC32_STARTER_KIT
-    #include 
-    #include 
-#endif
-
-#define OUR_DATA_SIZE 1024
-static byte ourData[OUR_DATA_SIZE];
-static byte* key = NULL;
-static byte* iv  = NULL;
-static CRYPT_RNG_CTX mcRng;
-static RNG           defRng;
-
-static int check_md5(void);
-static int check_sha(void);
-static int check_sha256(void);
-static int check_sha384(void);
-static int check_sha512(void);
-static int check_hmac(void);
-static int check_compress(void);
-static int check_rng(void);
-static int check_des3(void);
-static int check_aescbc(void);
-static int check_aesctr(void);
-static int check_aesdirect(void);
-static int check_rsa(void);
-static int check_ecc(void);
-
-
-int main(int argc, char** argv)
-{
-    int ret;
-    int i;
-
-    (void)argc;
-    (void)argv;
-
-#ifdef MICROCHIP_PIC32
-    SYSTEMConfigPerformance(80000000);
-    DBINIT();
-#endif
-
-    /* align key, iv pointers */
-    key = (byte*)XMALLOC(32, NULL, DYNAMIC_TYPE_KEY);
-    if (key == NULL) {
-        printf("mcapi key alloc failed\n");
-        return -1;
-    }
-
-    iv = (byte*)XMALLOC(16, NULL, DYNAMIC_TYPE_KEY);
-    if (iv == NULL) {
-        printf("mcapi iv alloc failed\n");
-        return -1;
-    }
-
-    for (i = 0; i < OUR_DATA_SIZE; i++)
-        ourData[i] = (byte)i;
-
-    ret = check_md5();
-    if (ret != 0) {
-        printf("mcapi check_md5 failed\n");
-        return -1;
-    }
-
-    ret = check_sha();
-    if (ret != 0) {
-        printf("mcapi check_sha failed\n");
-        return -1;
-    }
-
-    ret = check_sha256();
-    if (ret != 0) {
-        printf("mcapi check_sha256 failed\n");
-        return -1;
-    }
-
-    ret = check_sha384();
-    if (ret != 0) {
-        printf("mcapi check_sha384 failed\n");
-        return -1;
-    }
-
-    ret = check_sha512();
-    if (ret != 0) {
-        printf("mcapi check_sha512 failed\n");
-        return -1;
-    }
-
-    ret = check_hmac();
-    if (ret != 0) {
-        printf("mcapi check_hmac failed\n");
-        return -1;
-    }
-
-    ret = check_compress();
-    if (ret != 0) {
-        printf("mcapi check_compress failed\n");
-        return -1;
-    }
-
-    ret = check_rng();
-    if (ret != 0) {
-        printf("mcapi check_rng failed\n");
-        return -1;
-    }
-
-    ret = check_des3();
-    if (ret != 0) {
-        printf("mcapi check_des3 failed\n");
-        return -1;
-    }
-
-    ret = check_aescbc();
-    if (ret != 0) {
-        printf("mcapi check_aes cbc failed\n");
-        return -1;
-    }
-
-    ret = check_aesctr();
-    if (ret != 0) {
-        printf("mcapi check_aes ctr failed\n");
-        return -1;
-    }
-
-    ret = check_aesdirect();
-    if (ret != 0) {
-        printf("mcapi check_aes direct failed\n");
-        return -1;
-    }
-
-    ret = check_rsa();
-    if (ret != 0) {
-        printf("mcapi check_rsa failed\n");
-        return -1;
-    }
-
-    ret = check_ecc();
-    if (ret != 0) {
-        printf("mcapi check_ecc failed\n");
-        return -1;
-    }
-
-    XFREE(iv,  NULL, DYNAMIC_TYPE_KEY);
-    XFREE(key, NULL, DYNAMIC_TYPE_KEY);
-
-    return 0;
-}
-
-
-/* check mcapi md5 against internal */
-static int check_md5(void)
-{
-    CRYPT_MD5_CTX mcMd5;
-    Md5           defMd5;
-    byte          mcDigest[CRYPT_MD5_DIGEST_SIZE];
-    byte          defDigest[MD5_DIGEST_SIZE];
-
-    CRYPT_MD5_Initialize(&mcMd5);
-    InitMd5(&defMd5);
-
-    CRYPT_MD5_DataAdd(&mcMd5, ourData, OUR_DATA_SIZE);
-    Md5Update(&defMd5, ourData, OUR_DATA_SIZE);
-
-    CRYPT_MD5_Finalize(&mcMd5, mcDigest);
-    Md5Final(&defMd5, defDigest);
-
-    if (memcmp(mcDigest, defDigest, CRYPT_MD5_DIGEST_SIZE) != 0) {
-        printf("md5 final memcmp fialed\n");
-        return -1;
-    } 
-    printf("md5         mcapi test passed\n");
-
-    return 0;
-}
-
-
-/* check mcapi sha against internal */
-static int check_sha(void)
-{
-    CRYPT_SHA_CTX mcSha;
-    Sha           defSha;
-    byte          mcDigest[CRYPT_SHA_DIGEST_SIZE];
-    byte          defDigest[SHA_DIGEST_SIZE];
-
-    CRYPT_SHA_Initialize(&mcSha);
-    InitSha(&defSha);
-
-    CRYPT_SHA_DataAdd(&mcSha, ourData, OUR_DATA_SIZE);
-    ShaUpdate(&defSha, ourData, OUR_DATA_SIZE);
-
-    CRYPT_SHA_Finalize(&mcSha, mcDigest);
-    ShaFinal(&defSha, defDigest);
-
-    if (memcmp(mcDigest, defDigest, CRYPT_SHA_DIGEST_SIZE) != 0) {
-        printf("sha final memcmp fialed\n");
-        return -1;
-    } 
-    printf("sha         mcapi test passed\n");
-
-    return 0;
-}
-
-
-/* check mcapi sha256 against internal */
-static int check_sha256(void)
-{
-    CRYPT_SHA256_CTX mcSha256;
-    Sha256           defSha256;
-    byte             mcDigest[CRYPT_SHA256_DIGEST_SIZE];
-    byte             defDigest[SHA256_DIGEST_SIZE];
-
-    CRYPT_SHA256_Initialize(&mcSha256);
-    InitSha256(&defSha256);
-
-    CRYPT_SHA256_DataAdd(&mcSha256, ourData, OUR_DATA_SIZE);
-    Sha256Update(&defSha256, ourData, OUR_DATA_SIZE);
-
-    CRYPT_SHA256_Finalize(&mcSha256, mcDigest);
-    Sha256Final(&defSha256, defDigest);
-
-    if (memcmp(mcDigest, defDigest, CRYPT_SHA256_DIGEST_SIZE) != 0) {
-        printf("sha256 final memcmp fialed\n");
-        return -1;
-    } 
-    printf("sha256      mcapi test passed\n");
-
-    return 0;
-}
-
-
-/* check mcapi sha384 against internal */
-static int check_sha384(void)
-{
-    CRYPT_SHA384_CTX mcSha384;
-    Sha384           defSha384;
-    byte             mcDigest[CRYPT_SHA384_DIGEST_SIZE];
-    byte             defDigest[SHA384_DIGEST_SIZE];
-
-    CRYPT_SHA384_Initialize(&mcSha384);
-    InitSha384(&defSha384);
-
-    CRYPT_SHA384_DataAdd(&mcSha384, ourData, OUR_DATA_SIZE);
-    Sha384Update(&defSha384, ourData, OUR_DATA_SIZE);
-
-    CRYPT_SHA384_Finalize(&mcSha384, mcDigest);
-    Sha384Final(&defSha384, defDigest);
-
-    if (memcmp(mcDigest, defDigest, CRYPT_SHA384_DIGEST_SIZE) != 0) {
-        printf("sha384 final memcmp fialed\n");
-        return -1;
-    } 
-    printf("sha384      mcapi test passed\n");
-
-    return 0;
-}
-
-
-/* check mcapi sha512 against internal */
-static int check_sha512(void)
-{
-    CRYPT_SHA512_CTX mcSha512;
-    Sha512           defSha512;
-    byte             mcDigest[CRYPT_SHA512_DIGEST_SIZE];
-    byte             defDigest[SHA512_DIGEST_SIZE];
-
-    CRYPT_SHA512_Initialize(&mcSha512);
-    InitSha512(&defSha512);
-
-    CRYPT_SHA512_DataAdd(&mcSha512, ourData, OUR_DATA_SIZE);
-    Sha512Update(&defSha512, ourData, OUR_DATA_SIZE);
-
-    CRYPT_SHA512_Finalize(&mcSha512, mcDigest);
-    Sha512Final(&defSha512, defDigest);
-
-    if (memcmp(mcDigest, defDigest, CRYPT_SHA512_DIGEST_SIZE) != 0) {
-        printf("sha512 final memcmp fialed\n");
-        return -1;
-    } 
-    printf("sha512      mcapi test passed\n");
-
-    return 0;
-}
-
-
-/* check mcapi hmac against internal */
-static int check_hmac(void)
-{
-    CRYPT_HMAC_CTX mcHmac;
-    Hmac           defHmac;
-    byte           mcDigest[CRYPT_SHA512_DIGEST_SIZE];
-    byte           defDigest[SHA512_DIGEST_SIZE];
-
-    strncpy((char*)key, "Jefe", 4);
-
-    /* SHA1 */
-    CRYPT_HMAC_SetKey(&mcHmac, CRYPT_HMAC_SHA, key, 4);
-    HmacSetKey(&defHmac, SHA, key, 4);
-
-    CRYPT_HMAC_DataAdd(&mcHmac, ourData, OUR_DATA_SIZE);
-    HmacUpdate(&defHmac, ourData, OUR_DATA_SIZE);
-
-    CRYPT_HMAC_Finalize(&mcHmac, mcDigest);
-    HmacFinal(&defHmac, defDigest);
-
-    if (memcmp(mcDigest, defDigest, CRYPT_SHA_DIGEST_SIZE) != 0) {
-        printf("hmac sha final memcmp fialed\n");
-        return -1;
-    } 
-    printf("hmac sha    mcapi test passed\n");
-
-    /* SHA-256 */
-    CRYPT_HMAC_SetKey(&mcHmac, CRYPT_HMAC_SHA256, key, 4);
-    HmacSetKey(&defHmac, SHA256, key, 4);
-
-    CRYPT_HMAC_DataAdd(&mcHmac, ourData, OUR_DATA_SIZE);
-    HmacUpdate(&defHmac, ourData, OUR_DATA_SIZE);
-
-    CRYPT_HMAC_Finalize(&mcHmac, mcDigest);
-    HmacFinal(&defHmac, defDigest);
-
-    if (memcmp(mcDigest, defDigest, CRYPT_SHA256_DIGEST_SIZE) != 0) {
-        printf("hmac sha256 final memcmp fialed\n");
-        return -1;
-    } 
-    printf("hmac sha256 mcapi test passed\n");
-
-    /* SHA-384 */
-    CRYPT_HMAC_SetKey(&mcHmac, CRYPT_HMAC_SHA384, key, 4);
-    HmacSetKey(&defHmac, SHA384, key, 4);
-
-    CRYPT_HMAC_DataAdd(&mcHmac, ourData, OUR_DATA_SIZE);
-    HmacUpdate(&defHmac, ourData, OUR_DATA_SIZE);
-
-    CRYPT_HMAC_Finalize(&mcHmac, mcDigest);
-    HmacFinal(&defHmac, defDigest);
-
-    if (memcmp(mcDigest, defDigest, CRYPT_SHA384_DIGEST_SIZE) != 0) {
-        printf("hmac sha384 final memcmp fialed\n");
-        return -1;
-    } 
-    printf("hmac sha384 mcapi test passed\n");
-
-    /* SHA-512 */
-    CRYPT_HMAC_SetKey(&mcHmac, CRYPT_HMAC_SHA512, key, 4);
-    HmacSetKey(&defHmac, SHA512, key, 4);
-
-    CRYPT_HMAC_DataAdd(&mcHmac, ourData, OUR_DATA_SIZE);
-    HmacUpdate(&defHmac, ourData, OUR_DATA_SIZE);
-
-    CRYPT_HMAC_Finalize(&mcHmac, mcDigest);
-    HmacFinal(&defHmac, defDigest);
-
-    if (memcmp(mcDigest, defDigest, CRYPT_SHA512_DIGEST_SIZE) != 0) {
-        printf("hmac sha512 final memcmp fialed\n");
-        return -1;
-    } 
-    printf("hmac sha512 mcapi test passed\n");
-
-    return 0;
-}
-
-
-/* check mcapi compress against internal */
-static int check_compress(void)
-{
-    const unsigned char text[] =
-    "Biodiesel cupidatat marfa, cliche aute put a bird on it incididunt elit\n"
-    "polaroid. Sunt tattooed bespoke reprehenderit. Sint twee organic id\n"
-    "marfa. Commodo veniam ad esse gastropub. 3 wolf moon sartorial vero,\n"
-    "plaid delectus biodiesel squid +1 vice. Post-ironic keffiyeh leggings\n"
-    "selfies cray fap hoodie, forage anim. Carles cupidatat shoreditch, VHS\n"
-    "small batch meggings kogi dolore food truck bespoke gastropub.\n"
-    "\n"
-    "Terry richardson adipisicing actually typewriter tumblr, twee whatever\n"
-    "four loko you probably haven't heard of them high life. Messenger bag\n"
-    "whatever tattooed deep v mlkshk. Brooklyn pinterest assumenda chillwave\n"
-    "et, banksy ullamco messenger bag umami pariatur direct trade forage.\n"
-    "Typewriter culpa try-hard, pariatur sint brooklyn meggings. Gentrify\n"
-    "food truck next level, tousled irony non semiotics PBR ethical anim cred\n"
-    "readymade. Mumblecore brunch lomo odd future, portland organic terry\n"
-    "four loko whatever street art yr farm-to-table.\n";
-
-    unsigned int inSz  = sizeof(text);
-    unsigned int outSz;
-    unsigned char cBuffer[1024];
-    unsigned char dBuffer[1024];
-
-    int ret1, ret2;
-
-    /* dynamic */
-    ret1 = CRYPT_HUFFMAN_Compress(cBuffer, sizeof(cBuffer), text, inSz, 0);
-    ret2 = Compress(dBuffer, sizeof(dBuffer), text, inSz, 0);
-
-    if (ret1 != ret2 || ret1 < 0) {
-        printf("compress dynamic ret failed\n");
-        return -1;
-    }
-
-    if (memcmp(cBuffer, dBuffer, ret1) != 0) {
-        printf("compress dynamic cmp failed\n");
-        return -1;
-    }
-
-    outSz = ret1;
-
-    ret1 = CRYPT_HUFFMAN_DeCompress(dBuffer, sizeof(dBuffer), cBuffer, outSz);
-
-    if (memcmp(dBuffer, text, inSz) != 0) {
-        printf("mcapi decompress dynamic cmp failed\n");
-        return -1;
-    }
-
-    memset(dBuffer, 0, sizeof(dBuffer));
-
-    ret1 = DeCompress(dBuffer, sizeof(dBuffer), cBuffer, outSz);
-
-    if (memcmp(dBuffer, text, inSz) != 0) {
-        printf("decompress dynamic cmp failed\n");
-        return -1;
-    }
-
-    memset(cBuffer, 0, sizeof(cBuffer));
-    memset(dBuffer, 0, sizeof(dBuffer));
-
-    /* static */
-    ret1 = CRYPT_HUFFMAN_Compress(cBuffer, sizeof(cBuffer), text, inSz, 1);
-    ret2 = Compress(dBuffer, sizeof(dBuffer), text, inSz, 1);
-
-    if (ret1 != ret2 || ret1 < 0) {
-        printf("compress static ret failed\n");
-        return -1;
-    }
-
-    if (memcmp(cBuffer, dBuffer, ret1) != 0) {
-        printf("compress static cmp failed\n");
-        return -1;
-    }
-
-    outSz = ret1;
-
-    ret1 = CRYPT_HUFFMAN_DeCompress(dBuffer, sizeof(dBuffer), cBuffer, outSz);
-
-    if (memcmp(dBuffer, text, inSz) != 0) {
-        printf("mcapi decompress static cmp failed\n");
-        return -1;
-    }
-
-    memset(dBuffer, 0, sizeof(dBuffer));
-
-    ret1 = DeCompress(dBuffer, sizeof(dBuffer), cBuffer, outSz);
-
-    if (memcmp(dBuffer, text, inSz) != 0) {
-        printf("decompress static cmp failed\n");
-        return -1;
-    }
-
-    printf("huffman     mcapi test passed\n");
-
-    return 0;
-}
-
-
-#define RANDOM_BYTE_SZ 32
-
-/* check mcapi rng */
-static int check_rng(void)
-{
-    int           ret;
-    int           i; 
-    byte          in[RANDOM_BYTE_SZ];
-    byte          out[RANDOM_BYTE_SZ];
-
-    for (i = 0; i < RANDOM_BYTE_SZ; i++)
-        in[i] = (byte)i;
-
-    for (i = 0; i < RANDOM_BYTE_SZ; i++)
-        out[i] = (byte)i;
-
-    ret = InitRng(&defRng);
-    if (ret != 0) {
-        printf("default rng init failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_RNG_Initialize(&mcRng);
-    if (ret != 0) {
-        printf("mcapi rng init failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_RNG_Get(&mcRng, &out[0]);
-    if (ret != 0) {
-        printf("mcapi rng get failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_RNG_BlockGenerate(&mcRng, out, RANDOM_BYTE_SZ);
-    if (ret != 0) {
-        printf("mcapi rng block gen failed\n");
-        return -1;
-    }
-
-    if (memcmp(in, out, RANDOM_BYTE_SZ) == 0) {
-        printf("mcapi rng block gen output failed\n");
-        return -1;
-    }
-
-    printf("rng         mcapi test passed\n");
-
-    return 0;
-}
-
-
-#define TDES_TEST_SIZE 32
-
-/* check mcapi des3 */
-static int check_des3(void)
-{
-    CRYPT_TDES_CTX mcDes3;
-    Des3           defDes3;
-    int            ret;
-    byte           out1[TDES_TEST_SIZE];
-    byte           out2[TDES_TEST_SIZE];
-
-    strncpy((char*)key, "1234567890abcdefghijklmn", 24);
-    strncpy((char*)iv,  "12345678", 8);
-
-    /* cbc encrypt */
-    ret = CRYPT_TDES_KeySet(&mcDes3, key, iv, CRYPT_TDES_ENCRYPTION);
-    if (ret != 0) {
-        printf("mcapi tdes key set failed\n");
-        return -1;
-    }
-    Des3_SetKey(&defDes3, key, iv, DES_ENCRYPTION);
-
-    ret = CRYPT_TDES_CBC_Encrypt(&mcDes3, out1, ourData, TDES_TEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi tdes cbc encrypt failed\n");
-        return -1;
-    }
-    Des3_CbcEncrypt(&defDes3, out2, ourData, TDES_TEST_SIZE);
-
-    if (memcmp(out1, out2, TDES_TEST_SIZE) != 0) {
-        printf("mcapi tdes cbc encrypt cmp failed\n");
-        return -1;
-    }
-
-    /* cbc decrypt */
-    ret = CRYPT_TDES_KeySet(&mcDes3, key, iv, CRYPT_TDES_DECRYPTION);
-    if (ret != 0) {
-        printf("mcapi tdes key set failed\n");
-        return -1;
-    }
-    Des3_SetKey(&defDes3, key, iv, DES_DECRYPTION);
-
-    ret = CRYPT_TDES_CBC_Decrypt(&mcDes3, out2, out1, TDES_TEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi tdes cbc decrypt failed\n");
-        return -1;
-    }
-    Des3_CbcDecrypt(&defDes3, out1, out1, TDES_TEST_SIZE);
-
-    if (memcmp(out1, out2, TDES_TEST_SIZE) != 0) {
-        printf("mcapi tdes cbc decrypt cmp failed\n");
-        return -1;
-    }
-
-    if (memcmp(out1, ourData, TDES_TEST_SIZE) != 0) {
-        printf("mcapi tdes cbc decrypt orig cmp failed\n");
-        return -1;
-    }
-
-    printf("tdes        mcapi test passed\n");
-
-    return 0;
-}
-
-
-#define AES_TEST_SIZE 32
-
-/* check mcapi aes cbc */
-static int check_aescbc(void)
-{
-    CRYPT_AES_CTX mcAes;
-    Aes           defAes;
-    int           ret;
-    byte          out1[AES_TEST_SIZE];
-    byte          out2[AES_TEST_SIZE];
-
-    strncpy((char*)key, "1234567890abcdefghijklmnopqrstuv", 32);
-    strncpy((char*)iv,  "1234567890abcdef", 16);
-
-    /* 128 cbc encrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 16, iv, CRYPT_AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-128 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 16, iv, AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("default aes-128 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_CBC_Encrypt(&mcAes, out1, ourData, AES_TEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi aes-128 cbc encrypt failed\n");
-        return -1;
-    }
-    AesCbcEncrypt(&defAes, out2, ourData, AES_TEST_SIZE);
-
-    if (memcmp(out1, out2, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-128 cbc encrypt cmp failed\n");
-        return -1;
-    }
-
-    /* 128 cbc decrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 16, iv, CRYPT_AES_DECRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-128 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 16, iv, DES_DECRYPTION);
-    if (ret != 0) {
-        printf("default aes-128 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_CBC_Decrypt(&mcAes, out2, out1, AES_TEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi aes-128 cbc decrypt failed\n");
-        return -1;
-    }
-    AesCbcDecrypt(&defAes, out1, out1, AES_TEST_SIZE);
-
-    if (memcmp(out1, out2, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-128 cbc decrypt cmp failed\n");
-        return -1;
-    }
-
-    if (memcmp(out1, ourData, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-128 cbc decrypt orig cmp failed\n");
-        return -1;
-    }
-
-    /* 192 cbc encrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 24, iv, CRYPT_AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-192 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 24, iv, AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("default aes-192 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_CBC_Encrypt(&mcAes, out1, ourData, AES_TEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi aes-192 cbc encrypt failed\n");
-        return -1;
-    }
-    AesCbcEncrypt(&defAes, out2, ourData, AES_TEST_SIZE);
-
-    if (memcmp(out1, out2, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-192 cbc encrypt cmp failed\n");
-        return -1;
-    }
-
-    /* 192 cbc decrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 24, iv, CRYPT_AES_DECRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-192 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 24, iv, AES_DECRYPTION);
-    if (ret != 0) {
-        printf("default aes-192 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_CBC_Decrypt(&mcAes, out2, out1, AES_TEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi aes-192 cbc decrypt failed\n");
-        return -1;
-    }
-    AesCbcDecrypt(&defAes, out1, out1, AES_TEST_SIZE);
-
-    if (memcmp(out1, out2, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-192 cbc decrypt cmp failed\n");
-        return -1;
-    }
-
-    if (memcmp(out1, ourData, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-192 cbc decrypt orig cmp failed\n");
-        return -1;
-    }
-
-    /* 256 cbc encrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 32, iv, CRYPT_AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-256 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 32, iv, AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("default aes-256 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_CBC_Encrypt(&mcAes, out1, ourData, AES_TEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi aes-256 cbc encrypt failed\n");
-        return -1;
-    }
-    AesCbcEncrypt(&defAes, out2, ourData, AES_TEST_SIZE);
-
-    if (memcmp(out1, out2, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-256 cbc encrypt cmp failed\n");
-        return -1;
-    }
-
-    /* 256 cbc decrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 32, iv, CRYPT_AES_DECRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-256 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 32, iv, AES_DECRYPTION);
-    if (ret != 0) {
-        printf("default aes-256 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_CBC_Decrypt(&mcAes, out2, out1, AES_TEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi aes-256 cbc decrypt failed\n");
-        return -1;
-    }
-    AesCbcDecrypt(&defAes, out1, out1, AES_TEST_SIZE);
-
-    if (memcmp(out1, out2, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-256 cbc decrypt cmp failed\n");
-        return -1;
-    }
-
-    if (memcmp(out1, ourData, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-256 cbc decrypt orig cmp failed\n");
-        return -1;
-    }
-
-    printf("aes-cbc     mcapi test passed\n");
-
-    return 0;
-}
-
-
-/* check mcapi aes ctr */
-static int check_aesctr(void)
-{
-    CRYPT_AES_CTX mcAes;
-    Aes           defAes;
-    int           ret;
-    byte          out1[AES_TEST_SIZE];
-    byte          out2[AES_TEST_SIZE];
-
-    strncpy((char*)key, "1234567890abcdefghijklmnopqrstuv", 32);
-    strncpy((char*)iv,  "1234567890abcdef", 16);
-
-    /* 128 ctr encrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 16, iv, CRYPT_AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-128 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 16, iv, AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("default aes-128 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_CTR_Encrypt(&mcAes, out1, ourData, AES_TEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi aes-128 ctr encrypt failed\n");
-        return -1;
-    }
-    AesCtrEncrypt(&defAes, out2, ourData, AES_TEST_SIZE);
-
-    if (memcmp(out1, out2, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-128 ctr encrypt cmp failed\n");
-        return -1;
-    }
-
-    /* 128 ctr decrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 16, iv, CRYPT_AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-128 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 16, iv, AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("default aes-128 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_CTR_Encrypt(&mcAes, out2, out1, AES_TEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi aes-128 ctr decrypt failed\n");
-        return -1;
-    }
-
-    if (memcmp(out2, ourData, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-128 ctr decrypt orig cmp failed\n");
-        return -1;
-    }
-
-    /* 192 ctr encrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 24, iv, CRYPT_AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-192 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 24, iv, AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("default aes-192 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_CTR_Encrypt(&mcAes, out1, ourData, AES_TEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi aes-192 ctr encrypt failed\n");
-        return -1;
-    }
-    AesCtrEncrypt(&defAes, out2, ourData, AES_TEST_SIZE);
-
-    if (memcmp(out1, out2, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-192 ctr encrypt cmp failed\n");
-        return -1;
-    }
-
-    /* 192 ctr decrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 24, iv, CRYPT_AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-192 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 24, iv, AES_DECRYPTION);
-    if (ret != 0) {
-        printf("default aes-192 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_CTR_Encrypt(&mcAes, out2, out1, AES_TEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi aes-192 ctr decrypt failed\n");
-        return -1;
-    }
-
-    if (memcmp(out2, ourData, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-192 ctr decrypt orig cmp failed\n");
-        return -1;
-    }
-
-    /* 256 ctr encrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 32, iv, CRYPT_AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-256 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 32, iv, AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("default aes-256 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_CTR_Encrypt(&mcAes, out1, ourData, AES_TEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi aes-256 ctr encrypt failed\n");
-        return -1;
-    }
-    AesCtrEncrypt(&defAes, out2, ourData, AES_TEST_SIZE);
-
-    if (memcmp(out1, out2, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-256 ctr encrypt cmp failed\n");
-        return -1;
-    }
-
-    /* 256 ctr decrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 32, iv, CRYPT_AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-256 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 32, iv, AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("default aes-256 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_CTR_Encrypt(&mcAes, out2, out1, AES_TEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi aes-256 ctr decrypt failed\n");
-        return -1;
-    }
-
-    if (memcmp(out2, ourData, AES_TEST_SIZE) != 0) {
-        printf("mcapi aes-256 ctr decrypt orig cmp failed\n");
-        return -1;
-    }
-
-    printf("aes-ctr     mcapi test passed\n");
-
-    return 0;
-}
-
-
-/* check mcapi aes direct */
-static int check_aesdirect(void)
-{
-    CRYPT_AES_CTX mcAes;
-    Aes           defAes;
-    int           ret;
-    byte          out1[CRYPT_AES_BLOCK_SIZE];
-    byte          out2[16];  /* one block at a time */
-
-    strncpy((char*)key, "1234567890abcdefghijklmnopqrstuv", 32);
-    strncpy((char*)iv,  "1234567890abcdef", 16);
-
-    /* 128 direct encrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 16, iv, CRYPT_AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-128 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 16, iv, AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("default aes-128 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_DIRECT_Encrypt(&mcAes, out1, ourData);
-    if (ret != 0) {
-        printf("mcapi aes-128 direct encrypt failed\n");
-        return -1;
-    }
-    AesEncryptDirect(&defAes, out2, ourData);
-
-    if (memcmp(out1, out2, CRYPT_AES_BLOCK_SIZE) != 0) {
-        printf("mcapi aes-128 direct encrypt cmp failed\n");
-        return -1;
-    }
-
-    /* 128 direct decrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 16, iv, CRYPT_AES_DECRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-128 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 16, iv, DES_DECRYPTION);
-    if (ret != 0) {
-        printf("default aes-128 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_DIRECT_Decrypt(&mcAes, out2, out1);
-    if (ret != 0) {
-        printf("mcapi aes-128 direct decrypt failed\n");
-        return -1;
-    }
-    AesDecryptDirect(&defAes, out1, out1);
-
-    if (memcmp(out1, out2, CRYPT_AES_BLOCK_SIZE) != 0) {
-        printf("mcapi aes-128 direct decrypt cmp failed\n");
-        return -1;
-    }
-
-    if (memcmp(out1, ourData, CRYPT_AES_BLOCK_SIZE) != 0) {
-        printf("mcapi aes-128 direct decrypt orig cmp failed\n");
-        return -1;
-    }
-
-    /* 192 direct encrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 24, iv, CRYPT_AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-192 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 24, iv, AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("default aes-192 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_DIRECT_Encrypt(&mcAes, out1, ourData);
-    if (ret != 0) {
-        printf("mcapi aes-192 direct encrypt failed\n");
-        return -1;
-    }
-    AesEncryptDirect(&defAes, out2, ourData);
-
-    if (memcmp(out1, out2, CRYPT_AES_BLOCK_SIZE) != 0) {
-        printf("mcapi aes-192 direct encrypt cmp failed\n");
-        return -1;
-    }
-
-    /* 192 direct decrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 24, iv, CRYPT_AES_DECRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-192 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 24, iv, AES_DECRYPTION);
-    if (ret != 0) {
-        printf("default aes-192 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_DIRECT_Decrypt(&mcAes, out2, out1);
-    if (ret != 0) {
-        printf("mcapi aes-192 direct decrypt failed\n");
-        return -1;
-    }
-    AesDecryptDirect(&defAes, out1, out1);
-
-    if (memcmp(out1, out2, CRYPT_AES_BLOCK_SIZE) != 0) {
-        printf("mcapi aes-192 direct decrypt cmp failed\n");
-        return -1;
-    }
-
-    if (memcmp(out1, ourData, CRYPT_AES_BLOCK_SIZE) != 0) {
-        printf("mcapi aes-192 direct decrypt orig cmp failed\n");
-        return -1;
-    }
-
-    /* 256 direct encrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 32, iv, CRYPT_AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-256 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 32, iv, AES_ENCRYPTION);
-    if (ret != 0) {
-        printf("default aes-256 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_DIRECT_Encrypt(&mcAes, out1, ourData);
-    if (ret != 0) {
-        printf("mcapi aes-256 direct encrypt failed\n");
-        return -1;
-    }
-    AesEncryptDirect(&defAes, out2, ourData);
-
-    if (memcmp(out1, out2, CRYPT_AES_BLOCK_SIZE) != 0) {
-        printf("mcapi aes-256 direct encrypt cmp failed\n");
-        return -1;
-    }
-
-    /* 256 direct decrypt */
-    ret = CRYPT_AES_KeySet(&mcAes, key, 32, iv, CRYPT_AES_DECRYPTION);
-    if (ret != 0) {
-        printf("mcapi aes-256 key set failed\n");
-        return -1;
-    }
-    ret = AesSetKey(&defAes, key, 32, iv, AES_DECRYPTION);
-    if (ret != 0) {
-        printf("default aes-256 key set failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_AES_DIRECT_Decrypt(&mcAes, out2, out1);
-    if (ret != 0) {
-        printf("mcapi aes-256 direct decrypt failed\n");
-        return -1;
-    }
-    AesDecryptDirect(&defAes, out1, out1);
-
-    if (memcmp(out1, out2, CRYPT_AES_BLOCK_SIZE) != 0) {
-        printf("mcapi aes-256 direct decrypt cmp failed\n");
-        return -1;
-    }
-
-    if (memcmp(out1, ourData, CRYPT_AES_BLOCK_SIZE) != 0) {
-        printf("mcapi aes-256 direct decrypt orig cmp failed\n");
-        return -1;
-    }
-
-    printf("aes-direct  mcapi test passed\n");
-
-    return 0;
-}
-
-
-#define RSA_TEST_SIZE 64
-
-/* check mcapi rsa */
-static int check_rsa(void)
-{
-    CRYPT_RSA_CTX mcRsa;
-    RsaKey        defRsa;
-    int           ret;
-    int           ret2;
-    unsigned int  keySz = (unsigned int)sizeof(client_key_der_1024);
-    unsigned int  idx   = 0;
-    byte          out1[256];
-    byte          out2[256];
-
-    InitRsaKey(&defRsa, NULL);
-    ret = CRYPT_RSA_Initialize(&mcRsa);
-    if (ret != 0) {
-        printf("mcapi rsa init failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_RSA_PrivateKeyDecode(&mcRsa, client_key_der_1024, keySz);
-    if (ret != 0) {
-        printf("mcapi rsa private key decode failed\n");
-        return -1;
-    }
-
-    ret = RsaPrivateKeyDecode(client_key_der_1024, &idx, &defRsa, keySz);
-    if (ret != 0) {
-        printf("default rsa private key decode failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_RSA_PublicEncrypt(&mcRsa, out1, sizeof(out1), ourData,
-                                  RSA_TEST_SIZE, &mcRng);
-    if (ret < 0) {
-        printf("mcapi rsa public encrypt failed\n");
-        return -1;
-    }
-
-    ret2 = RsaPublicEncrypt(ourData, RSA_TEST_SIZE, out2, sizeof(out2),
-                            &defRsa, &defRng);
-    if (ret2 < 0) {
-        printf("default rsa public encrypt failed\n");
-        return -1;
-    }
-
-    if (ret != ret2) {
-        printf("default rsa public encrypt sz != mcapi sz\n");
-        return -1;
-    }
-
-    if (ret != CRYPT_RSA_EncryptSizeGet(&mcRsa)) {
-        printf("mcapi encrypt sz get != mcapi sz\n");
-        return -1;
-    }
-
-    ret = CRYPT_RSA_PrivateDecrypt(&mcRsa, out2, sizeof(out2), out1, ret); 
-    if (ret < 0) {
-        printf("mcapi rsa private derypt failed\n");
-        return -1;
-    }
-
-    if (ret != RSA_TEST_SIZE) {
-        printf("mcapi rsa private derypt plain size wrong\n");
-        return -1;
-    }
-
-    if (memcmp(out2, ourData, ret) != 0) {
-        printf("mcapi rsa private derypt plain text bad\n");
-        return -1;
-    }
-
-    FreeRsaKey(&defRsa);
-    ret = CRYPT_RSA_Free(&mcRsa);
-    if (ret != 0) {
-        printf("mcapi rsa free failed\n");
-        return -1;
-    }
-    
-    printf("rsa         mcapi test passed\n");
-
-    return 0;
-}
-
-
-/* check mcapi ecc */
-static int check_ecc(void)
-{
-    CRYPT_ECC_CTX userA; 
-    CRYPT_ECC_CTX userB;
-    int           ret;
-    byte          sharedA[100];
-    byte          sharedB[100];
-    byte          sig[100];
-    unsigned int  aSz   = (unsigned int)sizeof(sharedA);
-    unsigned int  bSz   = (unsigned int)sizeof(sharedB);
-    unsigned int  sigSz = (unsigned int)sizeof(sig);
-    unsigned int  usedA = 0;
-    unsigned int  usedB = 0;
-    int verifyStatus = 0;
-
-    /* init */
-    ret = CRYPT_ECC_Initialize(&userA);
-    if (ret != 0) {
-        printf("mcapi ecc init failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_ECC_Initialize(&userB);
-    if (ret != 0) {
-        printf("mcapi ecc init b failed\n");
-        return -1;
-    }
-
-    /* dhe + helpers */
-    ret = CRYPT_ECC_DHE_KeyMake(&userA, &mcRng, 32);
-    if (ret != 0) {
-        printf("mcapi ecc make key failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_ECC_DHE_KeyMake(&userB, &mcRng, 32);
-    if (ret != 0) {
-        printf("mcapi ecc make key b failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_ECC_KeySizeGet(&userA);
-    if (ret <= 0) {
-        printf("mcapi ecc key size get failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_ECC_SignatureSizeGet(&userA);
-    if (ret <= 0) {
-        printf("mcapi ecc signature size get failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_ECC_DHE_SharedSecretMake(&userA, &userB, sharedA, aSz, &usedA);
-    if (ret != 0) {
-        printf("mcapi ecc make shared secret failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_ECC_DHE_SharedSecretMake(&userB, &userA, sharedB, bSz, &usedB);
-    if (ret != 0) {
-        printf("mcapi ecc make shared secret failed\n");
-        return -1;
-    }
-
-    if (usedA != usedB || usedA <= 0) {
-        printf("mcapi ecc make shared secret output size match failed\n");
-        return -1;
-    }
-
-    if (memcmp(sharedA, sharedB, usedA) != 0) {
-        printf("mcapi ecc make shared secret output match cmp failed\n");
-        return -1;
-    }
-
-    /* dsa */
-    ret = CRYPT_ECC_DSA_HashSign(&userA, &mcRng, sig, sigSz, &usedA, ourData,
-                                 CRYPT_SHA_DIGEST_SIZE);
-    if (ret != 0) {
-        printf("mcapi ecc sign hash failed\n");
-        return -1;
-    }
-
-    sigSz = usedA;
-    if (sigSz <= 0) {
-        printf("mcapi ecc sign hash bad sig size\n");
-        return -1;
-    }
-
-    ret = CRYPT_ECC_DSA_HashVerify(&userA, sig, sigSz, ourData,
-                                   CRYPT_SHA_DIGEST_SIZE, &verifyStatus);
-    if (ret != 0) {
-        printf("mcapi ecc verify hash failed\n");
-        return -1;
-    }
-    if (verifyStatus != 1) {
-        printf("mcapi ecc verify hash status failed\n");
-        return -1;
-    }
-
-    /* import / export */
-    usedA = 0;
-    ret = CRYPT_ECC_PublicExport(&userA, sharedA, aSz, &usedA);
-    if (ret != 0) {
-        printf("mcapi ecc public export failed\n");
-        return -1;
-    }
-  
-    ret = CRYPT_ECC_PublicImport(&userB, sharedA, usedA);
-    if (ret != 0) {
-        printf("mcapi ecc public import failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_ECC_Free(&userA);
-    if (ret != 0) {
-        printf("mcapi ecc free failed\n");
-        return -1;
-    }
-
-    ret = CRYPT_ECC_Free(&userB);
-    if (ret != 0) {
-        printf("mcapi ecc free b failed\n");
-        return -1;
-    }
-
-    printf("ecc         mcapi test passed\n");
-
-    return 0;
-}
-
diff --git a/mcapi/zlib.X/nbproject/Makefile-default.mk b/mcapi/zlib.X/nbproject/Makefile-default.mk
deleted file mode 100644
index 8ca615867..000000000
--- a/mcapi/zlib.X/nbproject/Makefile-default.mk
+++ /dev/null
@@ -1,314 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a -pre and a -post target defined where you can add customized code.
-#
-# This makefile implements configuration specific macros and targets.
-
-
-# Include project Makefile
-ifeq "${IGNORE_LOCAL}" "TRUE"
-# do not include local makefile. User is passing all local related variables already
-else
-include Makefile
-# Include makefile containing local settings
-ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
-include nbproject/Makefile-local-default.mk
-endif
-endif
-
-# Environment
-MKDIR=gnumkdir -p
-RM=rm -f 
-MV=mv 
-CP=cp 
-
-# Macros
-CND_CONF=default
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-IMAGE_TYPE=debug
-OUTPUT_SUFFIX=a
-DEBUGGABLE_SUFFIX=
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}
-else
-IMAGE_TYPE=production
-OUTPUT_SUFFIX=a
-DEBUGGABLE_SUFFIX=
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}
-endif
-
-# Object Directory
-OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
-
-# Distribution Directory
-DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
-
-# Source Files Quoted if spaced
-SOURCEFILES_QUOTED_IF_SPACED=../../zlib-1.2.7/adler32.c ../../zlib-1.2.7/compress.c ../../zlib-1.2.7/crc32.c ../../zlib-1.2.7/deflate.c ../../zlib-1.2.7/gzclose.c ../../zlib-1.2.7/gzlib.c ../../zlib-1.2.7/gzread.c ../../zlib-1.2.7/gzwrite.c ../../zlib-1.2.7/infback.c ../../zlib-1.2.7/inffast.c ../../zlib-1.2.7/inflate.c ../../zlib-1.2.7/inftrees.c ../../zlib-1.2.7/trees.c ../../zlib-1.2.7/uncompr.c ../../zlib-1.2.7/zutil.c
-
-# Object Files Quoted if spaced
-OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/608321700/adler32.o ${OBJECTDIR}/_ext/608321700/compress.o ${OBJECTDIR}/_ext/608321700/crc32.o ${OBJECTDIR}/_ext/608321700/deflate.o ${OBJECTDIR}/_ext/608321700/gzclose.o ${OBJECTDIR}/_ext/608321700/gzlib.o ${OBJECTDIR}/_ext/608321700/gzread.o ${OBJECTDIR}/_ext/608321700/gzwrite.o ${OBJECTDIR}/_ext/608321700/infback.o ${OBJECTDIR}/_ext/608321700/inffast.o ${OBJECTDIR}/_ext/608321700/inflate.o ${OBJECTDIR}/_ext/608321700/inftrees.o ${OBJECTDIR}/_ext/608321700/trees.o ${OBJECTDIR}/_ext/608321700/uncompr.o ${OBJECTDIR}/_ext/608321700/zutil.o
-POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/608321700/adler32.o.d ${OBJECTDIR}/_ext/608321700/compress.o.d ${OBJECTDIR}/_ext/608321700/crc32.o.d ${OBJECTDIR}/_ext/608321700/deflate.o.d ${OBJECTDIR}/_ext/608321700/gzclose.o.d ${OBJECTDIR}/_ext/608321700/gzlib.o.d ${OBJECTDIR}/_ext/608321700/gzread.o.d ${OBJECTDIR}/_ext/608321700/gzwrite.o.d ${OBJECTDIR}/_ext/608321700/infback.o.d ${OBJECTDIR}/_ext/608321700/inffast.o.d ${OBJECTDIR}/_ext/608321700/inflate.o.d ${OBJECTDIR}/_ext/608321700/inftrees.o.d ${OBJECTDIR}/_ext/608321700/trees.o.d ${OBJECTDIR}/_ext/608321700/uncompr.o.d ${OBJECTDIR}/_ext/608321700/zutil.o.d
-
-# Object Files
-OBJECTFILES=${OBJECTDIR}/_ext/608321700/adler32.o ${OBJECTDIR}/_ext/608321700/compress.o ${OBJECTDIR}/_ext/608321700/crc32.o ${OBJECTDIR}/_ext/608321700/deflate.o ${OBJECTDIR}/_ext/608321700/gzclose.o ${OBJECTDIR}/_ext/608321700/gzlib.o ${OBJECTDIR}/_ext/608321700/gzread.o ${OBJECTDIR}/_ext/608321700/gzwrite.o ${OBJECTDIR}/_ext/608321700/infback.o ${OBJECTDIR}/_ext/608321700/inffast.o ${OBJECTDIR}/_ext/608321700/inflate.o ${OBJECTDIR}/_ext/608321700/inftrees.o ${OBJECTDIR}/_ext/608321700/trees.o ${OBJECTDIR}/_ext/608321700/uncompr.o ${OBJECTDIR}/_ext/608321700/zutil.o
-
-# Source Files
-SOURCEFILES=../../zlib-1.2.7/adler32.c ../../zlib-1.2.7/compress.c ../../zlib-1.2.7/crc32.c ../../zlib-1.2.7/deflate.c ../../zlib-1.2.7/gzclose.c ../../zlib-1.2.7/gzlib.c ../../zlib-1.2.7/gzread.c ../../zlib-1.2.7/gzwrite.c ../../zlib-1.2.7/infback.c ../../zlib-1.2.7/inffast.c ../../zlib-1.2.7/inflate.c ../../zlib-1.2.7/inftrees.c ../../zlib-1.2.7/trees.c ../../zlib-1.2.7/uncompr.c ../../zlib-1.2.7/zutil.c
-
-
-CFLAGS=
-ASFLAGS=
-LDLIBSOPTIONS=
-
-############# Tool locations ##########################################
-# If you copy a project from one host to another, the path where the  #
-# compiler is installed may be different.                             #
-# If you open this project with MPLAB X in the new host, this         #
-# makefile will be regenerated and the paths will be corrected.       #
-#######################################################################
-# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
-FIXDEPS=fixDeps
-
-.build-conf:  ${BUILD_SUBPROJECTS}
-	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}
-
-MP_PROCESSOR_OPTION=32MZ2048ECM144
-MP_LINKER_FILE_OPTION=
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assemble
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assembleWithPreprocess
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compile
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-${OBJECTDIR}/_ext/608321700/adler32.o: ../../zlib-1.2.7/adler32.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/adler32.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/adler32.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/adler32.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/adler32.o.d" -o ${OBJECTDIR}/_ext/608321700/adler32.o ../../zlib-1.2.7/adler32.c   
-	
-${OBJECTDIR}/_ext/608321700/compress.o: ../../zlib-1.2.7/compress.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/compress.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/compress.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/compress.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/compress.o.d" -o ${OBJECTDIR}/_ext/608321700/compress.o ../../zlib-1.2.7/compress.c   
-	
-${OBJECTDIR}/_ext/608321700/crc32.o: ../../zlib-1.2.7/crc32.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/crc32.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/crc32.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/crc32.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/crc32.o.d" -o ${OBJECTDIR}/_ext/608321700/crc32.o ../../zlib-1.2.7/crc32.c   
-	
-${OBJECTDIR}/_ext/608321700/deflate.o: ../../zlib-1.2.7/deflate.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/deflate.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/deflate.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/deflate.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/deflate.o.d" -o ${OBJECTDIR}/_ext/608321700/deflate.o ../../zlib-1.2.7/deflate.c   
-	
-${OBJECTDIR}/_ext/608321700/gzclose.o: ../../zlib-1.2.7/gzclose.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzclose.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzclose.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzclose.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzclose.o.d" -o ${OBJECTDIR}/_ext/608321700/gzclose.o ../../zlib-1.2.7/gzclose.c   
-	
-${OBJECTDIR}/_ext/608321700/gzlib.o: ../../zlib-1.2.7/gzlib.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzlib.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzlib.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzlib.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzlib.o.d" -o ${OBJECTDIR}/_ext/608321700/gzlib.o ../../zlib-1.2.7/gzlib.c   
-	
-${OBJECTDIR}/_ext/608321700/gzread.o: ../../zlib-1.2.7/gzread.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzread.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzread.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzread.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzread.o.d" -o ${OBJECTDIR}/_ext/608321700/gzread.o ../../zlib-1.2.7/gzread.c   
-	
-${OBJECTDIR}/_ext/608321700/gzwrite.o: ../../zlib-1.2.7/gzwrite.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzwrite.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzwrite.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzwrite.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzwrite.o.d" -o ${OBJECTDIR}/_ext/608321700/gzwrite.o ../../zlib-1.2.7/gzwrite.c   
-	
-${OBJECTDIR}/_ext/608321700/infback.o: ../../zlib-1.2.7/infback.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/infback.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/infback.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/infback.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/infback.o.d" -o ${OBJECTDIR}/_ext/608321700/infback.o ../../zlib-1.2.7/infback.c   
-	
-${OBJECTDIR}/_ext/608321700/inffast.o: ../../zlib-1.2.7/inffast.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inffast.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inffast.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inffast.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inffast.o.d" -o ${OBJECTDIR}/_ext/608321700/inffast.o ../../zlib-1.2.7/inffast.c   
-	
-${OBJECTDIR}/_ext/608321700/inflate.o: ../../zlib-1.2.7/inflate.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inflate.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inflate.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inflate.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inflate.o.d" -o ${OBJECTDIR}/_ext/608321700/inflate.o ../../zlib-1.2.7/inflate.c   
-	
-${OBJECTDIR}/_ext/608321700/inftrees.o: ../../zlib-1.2.7/inftrees.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inftrees.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inftrees.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inftrees.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inftrees.o.d" -o ${OBJECTDIR}/_ext/608321700/inftrees.o ../../zlib-1.2.7/inftrees.c   
-	
-${OBJECTDIR}/_ext/608321700/trees.o: ../../zlib-1.2.7/trees.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/trees.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/trees.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/trees.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/trees.o.d" -o ${OBJECTDIR}/_ext/608321700/trees.o ../../zlib-1.2.7/trees.c   
-	
-${OBJECTDIR}/_ext/608321700/uncompr.o: ../../zlib-1.2.7/uncompr.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/uncompr.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/uncompr.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/uncompr.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/uncompr.o.d" -o ${OBJECTDIR}/_ext/608321700/uncompr.o ../../zlib-1.2.7/uncompr.c   
-	
-${OBJECTDIR}/_ext/608321700/zutil.o: ../../zlib-1.2.7/zutil.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/zutil.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/zutil.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/zutil.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/zutil.o.d" -o ${OBJECTDIR}/_ext/608321700/zutil.o ../../zlib-1.2.7/zutil.c   
-	
-else
-${OBJECTDIR}/_ext/608321700/adler32.o: ../../zlib-1.2.7/adler32.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/adler32.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/adler32.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/adler32.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/adler32.o.d" -o ${OBJECTDIR}/_ext/608321700/adler32.o ../../zlib-1.2.7/adler32.c   
-	
-${OBJECTDIR}/_ext/608321700/compress.o: ../../zlib-1.2.7/compress.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/compress.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/compress.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/compress.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/compress.o.d" -o ${OBJECTDIR}/_ext/608321700/compress.o ../../zlib-1.2.7/compress.c   
-	
-${OBJECTDIR}/_ext/608321700/crc32.o: ../../zlib-1.2.7/crc32.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/crc32.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/crc32.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/crc32.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/crc32.o.d" -o ${OBJECTDIR}/_ext/608321700/crc32.o ../../zlib-1.2.7/crc32.c   
-	
-${OBJECTDIR}/_ext/608321700/deflate.o: ../../zlib-1.2.7/deflate.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/deflate.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/deflate.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/deflate.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/deflate.o.d" -o ${OBJECTDIR}/_ext/608321700/deflate.o ../../zlib-1.2.7/deflate.c   
-	
-${OBJECTDIR}/_ext/608321700/gzclose.o: ../../zlib-1.2.7/gzclose.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzclose.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzclose.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzclose.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzclose.o.d" -o ${OBJECTDIR}/_ext/608321700/gzclose.o ../../zlib-1.2.7/gzclose.c   
-	
-${OBJECTDIR}/_ext/608321700/gzlib.o: ../../zlib-1.2.7/gzlib.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzlib.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzlib.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzlib.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzlib.o.d" -o ${OBJECTDIR}/_ext/608321700/gzlib.o ../../zlib-1.2.7/gzlib.c   
-	
-${OBJECTDIR}/_ext/608321700/gzread.o: ../../zlib-1.2.7/gzread.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzread.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzread.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzread.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzread.o.d" -o ${OBJECTDIR}/_ext/608321700/gzread.o ../../zlib-1.2.7/gzread.c   
-	
-${OBJECTDIR}/_ext/608321700/gzwrite.o: ../../zlib-1.2.7/gzwrite.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzwrite.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzwrite.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzwrite.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzwrite.o.d" -o ${OBJECTDIR}/_ext/608321700/gzwrite.o ../../zlib-1.2.7/gzwrite.c   
-	
-${OBJECTDIR}/_ext/608321700/infback.o: ../../zlib-1.2.7/infback.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/infback.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/infback.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/infback.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/infback.o.d" -o ${OBJECTDIR}/_ext/608321700/infback.o ../../zlib-1.2.7/infback.c   
-	
-${OBJECTDIR}/_ext/608321700/inffast.o: ../../zlib-1.2.7/inffast.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inffast.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inffast.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inffast.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inffast.o.d" -o ${OBJECTDIR}/_ext/608321700/inffast.o ../../zlib-1.2.7/inffast.c   
-	
-${OBJECTDIR}/_ext/608321700/inflate.o: ../../zlib-1.2.7/inflate.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inflate.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inflate.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inflate.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inflate.o.d" -o ${OBJECTDIR}/_ext/608321700/inflate.o ../../zlib-1.2.7/inflate.c   
-	
-${OBJECTDIR}/_ext/608321700/inftrees.o: ../../zlib-1.2.7/inftrees.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inftrees.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inftrees.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inftrees.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inftrees.o.d" -o ${OBJECTDIR}/_ext/608321700/inftrees.o ../../zlib-1.2.7/inftrees.c   
-	
-${OBJECTDIR}/_ext/608321700/trees.o: ../../zlib-1.2.7/trees.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/trees.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/trees.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/trees.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/trees.o.d" -o ${OBJECTDIR}/_ext/608321700/trees.o ../../zlib-1.2.7/trees.c   
-	
-${OBJECTDIR}/_ext/608321700/uncompr.o: ../../zlib-1.2.7/uncompr.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/uncompr.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/uncompr.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/uncompr.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/uncompr.o.d" -o ${OBJECTDIR}/_ext/608321700/uncompr.o ../../zlib-1.2.7/uncompr.c   
-	
-${OBJECTDIR}/_ext/608321700/zutil.o: ../../zlib-1.2.7/zutil.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/zutil.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/zutil.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/zutil.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -DCYASSL_MICROCHIP_PIC32MZ -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/zutil.o.d" -o ${OBJECTDIR}/_ext/608321700/zutil.o ../../zlib-1.2.7/zutil.c   
-	
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compileCPP
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: archive
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk    
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
-else
-dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk   
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
-endif
-
-
-# Subprojects
-.build-subprojects:
-
-
-# Subprojects
-.clean-subprojects:
-
-# Clean Targets
-.clean-conf: ${CLEAN_SUBPROJECTS}
-	${RM} -r build/default
-	${RM} -r dist/default
-
-# Enable dependency checking
-.dep.inc: .depcheck-impl
-
-DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
-ifneq (${DEPFILES},)
-include ${DEPFILES}
-endif
diff --git a/mcapi/zlib.X/nbproject/Makefile-genesis.properties b/mcapi/zlib.X/nbproject/Makefile-genesis.properties
deleted file mode 100644
index fb29557a2..000000000
--- a/mcapi/zlib.X/nbproject/Makefile-genesis.properties
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-#Mon Nov 11 09:26:35 JST 2013
-default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
-default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30\\bin
-com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
-default.languagetoolchain.version=1.30
-host.platform=windows
-conf.ids=default
diff --git a/mcapi/zlib.X/nbproject/Makefile-impl.mk b/mcapi/zlib.X/nbproject/Makefile-impl.mk
deleted file mode 100644
index df37d06fb..000000000
--- a/mcapi/zlib.X/nbproject/Makefile-impl.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a pre- and a post- target defined where you can add customization code.
-#
-# This makefile implements macros and targets common to all configurations.
-#
-# NOCDDL
-
-
-# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
-# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
-# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
-# and .clean-reqprojects-conf unless SUB has the value 'no'
-SUB_no=NO
-SUBPROJECTS=${SUB_${SUB}}
-BUILD_SUBPROJECTS_=.build-subprojects
-BUILD_SUBPROJECTS_NO=
-BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
-CLEAN_SUBPROJECTS_=.clean-subprojects
-CLEAN_SUBPROJECTS_NO=
-CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
-
-
-# Project Name
-PROJECTNAME=zlib.X
-
-# Active Configuration
-DEFAULTCONF=default
-CONF=${DEFAULTCONF}
-
-# All Configurations
-ALLCONFS=default 
-
-
-# build
-.build-impl: .build-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
-
-
-# clean
-.clean-impl: .clean-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
-
-# clobber
-.clobber-impl: .clobber-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
-
-
-
-# all
-.all-impl: .all-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
-
-
-
-# dependency checking support
-.depcheck-impl:
-#	@echo "# This code depends on make tool being used" >.dep.inc
-#	@if [ -n "${MAKE_VERSION}" ]; then \
-#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
-#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
-#	    echo "include \$${DEPFILES}" >>.dep.inc; \
-#	    echo "endif" >>.dep.inc; \
-#	else \
-#	    echo ".KEEP_STATE:" >>.dep.inc; \
-#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
-#	fi
diff --git a/mcapi/zlib.X/nbproject/Makefile-local-default.mk b/mcapi/zlib.X/nbproject/Makefile-local-default.mk
deleted file mode 100644
index 3350f874d..000000000
--- a/mcapi/zlib.X/nbproject/Makefile-local-default.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-#
-# This file contains information about the location of compilers and other tools.
-# If you commmit this file into your revision control server, you will be able to 
-# to checkout the project and build it from the command line with make. However,
-# if more than one person works on the same project, then this file might show
-# conflicts since different users are bound to have compilers in different places.
-# In that case you might choose to not commit this file and let MPLAB X recreate this file
-# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
-# least once so the file gets created and the project can be built. Finally, you can also
-# avoid using this file at all if you are only building from the command line with make.
-# You can invoke make with the values of the macros:
-# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
-#
-SHELL=cmd.exe
-PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
-# Adding MPLAB X bin directory to path.
-PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
-# Path to java used to run MPLAB X when this makefile was created
-MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
-OS_CURRENT="$(shell uname -s)"
-MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-gcc.exe"
-MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-g++.exe"
-# MP_BC is not defined
-MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-as.exe"
-MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ld.exe"
-MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ar.exe"
-DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
-MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
-MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
diff --git a/mcapi/zlib.X/nbproject/Makefile-variables.mk b/mcapi/zlib.X/nbproject/Makefile-variables.mk
deleted file mode 100644
index 6d21f14b9..000000000
--- a/mcapi/zlib.X/nbproject/Makefile-variables.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Generated - do not edit!
-#
-# NOCDDL
-#
-CND_BASEDIR=`pwd`
-# default configuration
-CND_ARTIFACT_DIR_default=dist/default/production
-CND_ARTIFACT_NAME_default=zlib.X.a
-CND_ARTIFACT_PATH_default=dist/default/production/zlib.X.a
-CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
-CND_PACKAGE_NAME_default=zlib.X.tar
-CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/zlib.X.tar
diff --git a/mcapi/zlib.X/nbproject/Package-default.bash b/mcapi/zlib.X/nbproject/Package-default.bash
deleted file mode 100644
index 66c5b0bd9..000000000
--- a/mcapi/zlib.X/nbproject/Package-default.bash
+++ /dev/null
@@ -1,73 +0,0 @@
-#!/bin/bash -x
-
-#
-# Generated - do not edit!
-#
-
-# Macros
-TOP=`pwd`
-CND_CONF=default
-CND_DISTDIR=dist
-TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
-TMPDIRNAME=tmp-packaging
-OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}
-OUTPUT_BASENAME=zlib.X.${OUTPUT_SUFFIX}
-PACKAGE_TOP_DIR=zlib.X/
-
-# Functions
-function checkReturnCode
-{
-    rc=$?
-    if [ $rc != 0 ]
-    then
-        exit $rc
-    fi
-}
-function makeDirectory
-# $1 directory path
-# $2 permission (optional)
-{
-    mkdir -p "$1"
-    checkReturnCode
-    if [ "$2" != "" ]
-    then
-      chmod $2 "$1"
-      checkReturnCode
-    fi
-}
-function copyFileToTmpDir
-# $1 from-file path
-# $2 to-file path
-# $3 permission
-{
-    cp "$1" "$2"
-    checkReturnCode
-    if [ "$3" != "" ]
-    then
-        chmod $3 "$2"
-        checkReturnCode
-    fi
-}
-
-# Setup
-cd "${TOP}"
-mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
-rm -rf ${TMPDIR}
-mkdir -p ${TMPDIR}
-
-# Copy files and create directories and links
-cd "${TOP}"
-makeDirectory ${TMPDIR}/zlib.X/lib
-copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}lib/${OUTPUT_BASENAME}" 0644
-
-
-# Generate tar file
-cd "${TOP}"
-rm -f ${CND_DISTDIR}/${CND_CONF}/package/zlib.X.tar
-cd ${TMPDIR}
-tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/zlib.X.tar *
-checkReturnCode
-
-# Cleanup
-cd "${TOP}"
-rm -rf ${TMPDIR}
diff --git a/mplabx/PIC32MZ-Putc.c b/mplabx/PIC32MZ-Putc.c
deleted file mode 100644
index d77c4794d..000000000
--- a/mplabx/PIC32MZ-Putc.c
+++ /dev/null
@@ -1,10 +0,0 @@
-
-#ifdef MICROCHIP_PIC32
-#if defined (__32MZ2048ECH144__) || defined (__32MZ2048ECM144__)
-void _mon_putc (char c)
-{
-    while (U2STAbits.UTXBF);
-    U2TXREG = c;
-}
-#endif
-#endif
\ No newline at end of file
diff --git a/mplabx/benchmark_main_save.c b/mplabx/benchmark_main_save.c
deleted file mode 100644
index 9918e56c4..000000000
--- a/mplabx/benchmark_main_save.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/* benchmark_main.c
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-#if defined(CYASSL_MICROCHIP_PIC32MZ)
-    #define MICROCHIP_PIC32
-    #include 
-    #pragma config ICESEL = ICS_PGx2
-        /* ICE/ICD Comm Channel Select (Communicate on PGEC2/PGED2) */
-    #include "PIC32MZ-serial.h"
-    #define SYSTEMConfigPerformance /* void out SYSTEMConfigPerformance(); */
-#else
-    #define PIC32_STARTER_KIT
-    #include 
-    #include 
-    #include 
-    #define init_serial() /* void out init_serial() ; */
-#endif
-
-void bench_des(void);
-void bench_arc4(void);
-void bench_hc128(void);
-void bench_rabbit(void);
-void bench_aes(int);
-void bench_aesgcm(void);
-
-void bench_md5(void);
-void bench_sha(void);
-void bench_sha256(void);
-void bench_sha512(void);
-void bench_ripemd(void);
-
-void bench_rsa(void);
-void bench_rsaKeyGen(void);
-void bench_dh(void);
-#ifdef HAVE_ECC
-void bench_eccKeyGen(void);
-void bench_eccKeyAgree(void);
-#endif
-
-/*
- * Main driver for CTaoCrypt benchmarks.
- */
-int main(int argc, char** argv) {
-    volatile int i ;
-    int j ;
-    
-    init_serial() ;  /* initialize PIC32MZ serial I/O */
-    SYSTEMConfigPerformance(80000000);
-    DBINIT();
-    
-    current_time(1) ;
-    for(j=0; j<100; j++) {
-        for(i=0; i<100000; i++) ;
-        printf("%f\n", current_time(0)) ;
-    }
-
-    printf("wolfCrypt Benchmark:\n");
-
-#ifndef NO_AES
-    bench_aes(0);
-    bench_aes(1);
-#endif
-#ifdef HAVE_AESGCM
-    bench_aesgcm();
-#endif
-#ifndef NO_RC4
-    bench_arc4();
-#endif
-#ifdef HAVE_HC128
-    bench_hc128();
-#endif
-#ifndef NO_RABBIT
-    bench_rabbit();
-#endif
-#ifndef NO_DES3
-    bench_des();
-#endif
-
-    printf("\n");
-
-#ifndef NO_MD5
-    bench_md5();
-#endif
-    bench_sha();
-#ifndef NO_SHA256
-    bench_sha256();
-#endif
-#ifdef CYASSL_SHA512
-    bench_sha512();
-#endif
-#ifdef CYASSL_RIPEMD
-    bench_ripemd();
-#endif
-
-    printf("\n");
-
-#ifndef NO_RSA
-    bench_rsa();
-#endif
-
-#ifndef NO_DH
-    bench_dh();
-#endif
-
-#if defined(CYASSL_KEY_GEN) && !defined(NO_RSA)
-    bench_rsaKeyGen();
-#endif
-
-#ifdef HAVE_ECC
-    bench_eccKeyGen();
-    bench_eccKeyAgree();
-#endif
-    printf("End of wolfCrypt Benchmark:\n");
-    return 0;
-}
-
diff --git a/mplabx/crypto.h b/mplabx/crypto.h
deleted file mode 100644
index 76dccadff..000000000
--- a/mplabx/crypto.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * File:   crypto.h
- * Author: C15009
- *
- * Created on July 23, 2013, 12:26 PM
- */
-
-#ifndef CRYPTO_H
-#define	CRYPTO_H
-
-#ifdef	__cplusplus
-extern "C" {
-#endif
-
-    typedef struct saCtrl {
-        unsigned int CRYPTOALGO : 4;
-        unsigned int MULTITASK : 3;
-        unsigned int KEYSIZE : 2;
-        unsigned int ENCTYPE : 1;
-        unsigned int ALGO : 7;
-        unsigned int : 3;
-        unsigned int FLAGS : 1;
-        unsigned int FB : 1;
-        unsigned int LOADIV : 1;
-        unsigned int LNC : 1;
-        unsigned int IRFLAG : 1;
-        unsigned int ICVONLY : 1;
-        unsigned int OR_EN : 1;
-        unsigned int NO_RX : 1;
-        unsigned int : 1;
-        unsigned int VERIFY : 1;
-        unsigned int : 2;
-    } saCtrl;
-
-    typedef struct securityAssociation {
-        saCtrl SA_CTRL;
-        unsigned int SA_AUTHKEY[8];
-        unsigned int SA_ENCKEY[8];
-        unsigned int SA_AUTHIV[8];
-        unsigned int SA_ENCIV[4];
-    } securityAssociation;
-
-    typedef struct bdCtrl {
-        unsigned int BUFLEN : 16;
-        unsigned int CBD_INT_EN : 1;
-        unsigned int PKT_INT_EN : 1;
-        unsigned int LIFM : 1;
-        unsigned int LAST_BD: 1;
-        unsigned int : 2;
-        unsigned int SA_FETCH_EN : 1;
-        unsigned int : 4;
-        unsigned int CRY_MODE: 3;
-        unsigned int : 1;
-        unsigned int DESC_EN : 1;
-        /* Naveen did this
-        unsigned int CRDMA_EN: 1;
-        unsigned int UPD_RES : 1;
-        unsigned int SA_FETCH_EN : 1;
-        unsigned int SEC_CODE : 1;
-        unsigned int : 7;
-        unsigned int DESC_EN : 1; */
-    } bdCtrl;
-
-    typedef struct bufferDescriptor {
-        bdCtrl BD_CTRL;
-//        unsigned int BD_CTRL;
-        unsigned int SA_ADDR;
-        unsigned int SRCADDR;
-        unsigned int DSTADDR;
-        unsigned int NXTPTR;
-        unsigned int UPDPTR;
-        unsigned int MSGLEN;
-        unsigned int ENCOFF;
-    } bufferDescriptor;
-
-
-#ifdef	__cplusplus
-}
-#endif
-
-#endif	/* CRYPTO_H */
-
diff --git a/mplabx/cryptoregs.h b/mplabx/cryptoregs.h
deleted file mode 100644
index 2f551f257..000000000
--- a/mplabx/cryptoregs.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/* 
- * File:   cryptoregs.h
- * Author: C15009
- *
- * Created on August 14, 2013, 9:44 AM
- */
-
-#ifndef CRYPTOREGS_H
-#define	CRYPTOREGS_H
-
-#ifdef	__cplusplus
-extern "C" {
-#endif
-
-extern volatile unsigned int        CEVER __attribute__((section("sfrs")));
-typedef struct {
-  unsigned ID:16;
-  unsigned VERSION:8;
-  unsigned REVISION:8;
-} __CEVERbits_t;
-extern volatile __CEVERbits_t CEVERbits __asm__ ("CEVER") __attribute__((section("sfrs")));
-extern volatile unsigned int        CECON __attribute__((section("sfrs")));
-typedef struct {
-  unsigned DMAEN:1;
-  unsigned BDPPLEN:1;
-  unsigned BDPCHST:1;
-  unsigned :2;
-  unsigned SWAPEN:1;
-  unsigned SWRST:1;
-} __CECONbits_t;
-extern volatile __CECONbits_t CECONbits __asm__ ("CECON") __attribute__((section("sfrs")));
-extern volatile unsigned int        CEBDADDR __attribute__((section("sfrs")));
-typedef struct {
-  unsigned BDPADDR:32;
-} __CEBDADDRbits_t;
-extern volatile __CEBDADDRbits_t CEBDADDRbits __asm__ ("CEBDADDR") __attribute__((section("sfrs")));
-extern volatile unsigned int        CEBDPADDR __attribute__((section("sfrs")));
-typedef struct {
-  unsigned BASEADDR:32;
-} __CEBDPADDRbits_t;
-extern volatile __CEBDPADDRbits_t CEBDPADDRbits __asm__ ("CEBDPADDR") __attribute__((section("sfrs")));
-extern volatile unsigned int        CESTAT __attribute__((section("sfrs")));
-typedef struct {
-  unsigned BDCTRL:16;
-  unsigned ACTIVE:1;
-  unsigned START:1;
-  unsigned BDSTATE:4;
-  unsigned :2;
-  unsigned ERRPHASE:2;
-  unsigned ERROP:3;
-  unsigned ERRMODE:3;
-} __CESTATbits_t;
-extern volatile __CESTATbits_t CESTATbits __asm__ ("CESTAT") __attribute__((section("sfrs")));
-extern volatile unsigned int        CEINTSRC __attribute__((section("sfrs")));
-typedef struct {
-  unsigned PENDIF:1;
-  unsigned CBDIF:1;
-  unsigned PKTIF:1;
-  unsigned AREIF:1;
-} __CEINTSRCbits_t;
-extern volatile __CEINTSRCbits_t CEINTSRCbits __asm__ ("CEINTSRC") __attribute__((section("sfrs")));
-extern volatile unsigned int        CEINTEN __attribute__((section("sfrs")));
-typedef struct {
-  unsigned PENDIE:1;
-  unsigned CBDIE:1;
-  unsigned PKTIE:1;
-  unsigned AREIE:1;
-} __CEINTENbits_t;
-extern volatile __CEINTENbits_t CEINTENbits __asm__ ("CEINTEN") __attribute__((section("sfrs")));
-extern volatile unsigned int        CEPOLLCON __attribute__((section("sfrs")));
-typedef struct {
-  unsigned BDPPLCON:16;
-} __CEPOLLCONbits_t;
-extern volatile __CEPOLLCONbits_t CEPOLLCONbits __asm__ ("CEPOLLCON") __attribute__((section("sfrs")));
-extern volatile unsigned int        CEHDLEN __attribute__((section("sfrs")));
-typedef struct {
-  unsigned HDRLEN:8;
-} __CEHDLENbits_t;
-extern volatile __CEHDLENbits_t CEHDLENbits __asm__ ("CEHDLEN") __attribute__((section("sfrs")));
-extern volatile unsigned int        CETRLLEN __attribute__((section("sfrs")));
-typedef struct {
-  unsigned TRLRLEN:8;
-} __CETRLLENbits_t;
-extern volatile __CETRLLENbits_t CETRLLENbits __asm__ ("CETRLLEN") __attribute__((section("sfrs")));
-
-#ifdef	__cplusplus
-}
-#endif
-
-#endif	/* CRYPTOREGS_H */
-
diff --git a/mplabx/cryptoregs.s b/mplabx/cryptoregs.s
deleted file mode 100644
index 6bec06ac9..000000000
--- a/mplabx/cryptoregs.s
+++ /dev/null
@@ -1,21 +0,0 @@
-CECON = 0xBF8E5004
-  .global CECON
-CEBDADDR = 0xBF8E5008
-  .global CEBDADDR
-CEBDPADDR = 0xBF8E500C
-  .global CEBDPADDR
-CESTAT = 0xBF8E5010
-  .global CESTAT
-CEINTSRC = 0xBF8E5014
-  .global CEINTSRC
-CEINTEN = 0xBF8E5018
-  .global CEINTEN
-CEPOLLCON = 0xBF8E501C
-  .global CEPOLLCON
-CEHDLEN = 0xBF8E5020
-  .global CEHDLEN
-CETRLLEN = 0xBF8E5024
-  .global CETRLLEN
-
-
-
diff --git a/mplabx/ctaocrypt_benchmark.X/main.c b/mplabx/ctaocrypt_benchmark.X/main.c
deleted file mode 100644
index 587eae1e2..000000000
--- a/mplabx/ctaocrypt_benchmark.X/main.c
+++ /dev/null
@@ -1,116 +0,0 @@
-/* main.c
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#define PIC32_STARTER_KIT
-
-#include 
-#include 
-#include 
-
-void bench_des(void);
-void bench_arc4(void);
-void bench_hc128(void);
-void bench_rabbit(void);
-void bench_aes(int);
-void bench_aesgcm(void);
-
-void bench_md5(void);
-void bench_sha(void);
-void bench_sha256(void);
-void bench_sha512(void);
-void bench_ripemd(void);
-
-void bench_rsa(void);
-void bench_rsaKeyGen(void);
-void bench_dh(void);
-#ifdef HAVE_ECC
-void bench_eccKeyGen(void);
-void bench_eccKeyAgree(void);
-#endif
-
-/*
- * Main driver for CTaoCrypt benchmarks.
- */
-int main(int argc, char** argv) {
-
-    SYSTEMConfigPerformance(80000000); 
-
-    DBINIT();
-    printf("CTaoCrypt Benchmark:\n");
-
-#ifndef NO_AES
-    bench_aes(0);
-    bench_aes(1);
-#endif
-#ifdef HAVE_AESGCM
-    bench_aesgcm();
-#endif
-#ifndef NO_RC4
-    bench_arc4();
-#endif
-#ifdef HAVE_HC128
-    bench_hc128();
-#endif
-#ifndef NO_RABBIT
-    bench_rabbit();
-#endif
-#ifndef NO_DES3
-    bench_des();
-#endif
-
-    printf("\n");
-
-#ifndef NO_MD5
-    bench_md5();
-#endif
-    bench_sha();
-#ifndef NO_SHA256
-    bench_sha256();
-#endif
-#ifdef CYASSL_SHA512
-    bench_sha512();
-#endif
-#ifdef CYASSL_RIPEMD
-    bench_ripemd();
-#endif
-
-    printf("\n");
-
-#ifndef NO_RSA
-    bench_rsa();
-#endif
-
-#ifndef NO_DH
-    bench_dh();
-#endif
-
-#if defined(CYASSL_KEY_GEN) && !defined(NO_RSA)
-    bench_rsaKeyGen();
-#endif
-
-#ifdef HAVE_ECC
-    bench_eccKeyGen();
-    bench_eccKeyAgree();
-#endif
-
-    return 0;
-}
-
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-default.mk b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-default.mk
deleted file mode 100644
index cc62c8fb1..000000000
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-default.mk
+++ /dev/null
@@ -1,162 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a -pre and a -post target defined where you can add customized code.
-#
-# This makefile implements configuration specific macros and targets.
-
-
-# Include project Makefile
-ifeq "${IGNORE_LOCAL}" "TRUE"
-# do not include local makefile. User is passing all local related variables already
-else
-include Makefile
-# Include makefile containing local settings
-ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
-include nbproject/Makefile-local-default.mk
-endif
-endif
-
-# Environment
-MKDIR=gnumkdir -p
-RM=rm -f 
-MV=mv 
-CP=cp 
-
-# Macros
-CND_CONF=default
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-IMAGE_TYPE=debug
-OUTPUT_SUFFIX=elf
-DEBUGGABLE_SUFFIX=elf
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-else
-IMAGE_TYPE=production
-OUTPUT_SUFFIX=hex
-DEBUGGABLE_SUFFIX=elf
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-endif
-
-# Object Directory
-OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
-
-# Distribution Directory
-DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
-
-# Source Files Quoted if spaced
-SOURCEFILES_QUOTED_IF_SPACED=../../ctaocrypt/benchmark/benchmark.c ../benchmark_main.c
-
-# Object Files Quoted if spaced
-OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/2132364733/benchmark.o ${OBJECTDIR}/_ext/1472/benchmark_main.o
-POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/2132364733/benchmark.o.d ${OBJECTDIR}/_ext/1472/benchmark_main.o.d
-
-# Object Files
-OBJECTFILES=${OBJECTDIR}/_ext/2132364733/benchmark.o ${OBJECTDIR}/_ext/1472/benchmark_main.o
-
-# Source Files
-SOURCEFILES=../../ctaocrypt/benchmark/benchmark.c ../benchmark_main.c
-
-
-CFLAGS=
-ASFLAGS=
-LDLIBSOPTIONS=
-
-############# Tool locations ##########################################
-# If you copy a project from one host to another, the path where the  #
-# compiler is installed may be different.                             #
-# If you open this project with MPLAB X in the new host, this         #
-# makefile will be regenerated and the paths will be corrected.       #
-#######################################################################
-# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
-FIXDEPS=fixDeps
-
-.build-conf:  ${BUILD_SUBPROJECTS}
-	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-
-MP_PROCESSOR_OPTION=32MX795F512L
-MP_LINKER_FILE_OPTION=
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assemble
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assembleWithPreprocess
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compile
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-${OBJECTDIR}/_ext/2132364733/benchmark.o: ../../ctaocrypt/benchmark/benchmark.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/2132364733 
-	@${RM} ${OBJECTDIR}/_ext/2132364733/benchmark.o.d 
-	@${RM} ${OBJECTDIR}/_ext/2132364733/benchmark.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/2132364733/benchmark.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O1 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DBENCH_EMBEDDED -DHAVE_ECC -DCYASSL_SHA512 -I"../../" -MMD -MF "${OBJECTDIR}/_ext/2132364733/benchmark.o.d" -o ${OBJECTDIR}/_ext/2132364733/benchmark.o ../../ctaocrypt/benchmark/benchmark.c   
-	
-${OBJECTDIR}/_ext/1472/benchmark_main.o: ../benchmark_main.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1472 
-	@${RM} ${OBJECTDIR}/_ext/1472/benchmark_main.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1472/benchmark_main.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1472/benchmark_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O1 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DBENCH_EMBEDDED -DHAVE_ECC -DCYASSL_SHA512 -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1472/benchmark_main.o.d" -o ${OBJECTDIR}/_ext/1472/benchmark_main.o ../benchmark_main.c   
-	
-else
-${OBJECTDIR}/_ext/2132364733/benchmark.o: ../../ctaocrypt/benchmark/benchmark.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/2132364733 
-	@${RM} ${OBJECTDIR}/_ext/2132364733/benchmark.o.d 
-	@${RM} ${OBJECTDIR}/_ext/2132364733/benchmark.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/2132364733/benchmark.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O1 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DBENCH_EMBEDDED -DHAVE_ECC -DCYASSL_SHA512 -I"../../" -MMD -MF "${OBJECTDIR}/_ext/2132364733/benchmark.o.d" -o ${OBJECTDIR}/_ext/2132364733/benchmark.o ../../ctaocrypt/benchmark/benchmark.c   
-	
-${OBJECTDIR}/_ext/1472/benchmark_main.o: ../benchmark_main.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1472 
-	@${RM} ${OBJECTDIR}/_ext/1472/benchmark_main.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1472/benchmark_main.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1472/benchmark_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O1 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DBENCH_EMBEDDED -DHAVE_ECC -DCYASSL_SHA512 -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1472/benchmark_main.o.d" -o ${OBJECTDIR}/_ext/1472/benchmark_main.o ../benchmark_main.c   
-	
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compileCPP
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: link
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/debug/cyassl.X.a  
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_CC} $(MP_EXTRA_LD_PRE)  -mdebugger -D__MPLAB_DEBUGGER_PIC32MXSK=1 -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\debug\cyassl.X.a          -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=__MPLAB_DEBUG=1,--defsym=__DEBUG=1,--defsym=__MPLAB_DEBUGGER_PIC32MXSK=1,--defsym=_min_heap_size=20480,--defsym=_min_stack_size=20480
-	
-else
-dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/production/cyassl.X.a 
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_CC} $(MP_EXTRA_LD_PRE)  -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\production\cyassl.X.a      -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=_min_heap_size=20480,--defsym=_min_stack_size=20480
-	${MP_CC_DIR}\\xc32-bin2hex dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} 
-endif
-
-
-# Subprojects
-.build-subprojects:
-	cd /D ../cyassl.X && ${MAKE} MAKE_OPTIONS="" -f Makefile CONF=default
-
-
-# Subprojects
-.clean-subprojects:
-	cd /D ../cyassl.X && rm -rf "build/default" "dist/default"
-
-# Clean Targets
-.clean-conf: ${CLEAN_SUBPROJECTS}
-	${RM} -r build/default
-	${RM} -r dist/default
-
-# Enable dependency checking
-.dep.inc: .depcheck-impl
-
-DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
-ifneq (${DEPFILES},)
-include ${DEPFILES}
-endif
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-genesis.properties b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-genesis.properties
deleted file mode 100644
index ceff47910..000000000
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-genesis.properties
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-#Mon Nov 11 18:40:37 JST 2013
-default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
-default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30\\bin
-com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
-default.languagetoolchain.version=1.30
-host.platform=windows
-conf.ids=default
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-impl.mk b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-impl.mk
deleted file mode 100644
index 3d6aa0df3..000000000
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-impl.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a pre- and a post- target defined where you can add customization code.
-#
-# This makefile implements macros and targets common to all configurations.
-#
-# NOCDDL
-
-
-# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
-# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
-# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
-# and .clean-reqprojects-conf unless SUB has the value 'no'
-SUB_no=NO
-SUBPROJECTS=${SUB_${SUB}}
-BUILD_SUBPROJECTS_=.build-subprojects
-BUILD_SUBPROJECTS_NO=
-BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
-CLEAN_SUBPROJECTS_=.clean-subprojects
-CLEAN_SUBPROJECTS_NO=
-CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
-
-
-# Project Name
-PROJECTNAME=ctaocrypt_benchmark.X
-
-# Active Configuration
-DEFAULTCONF=default
-CONF=${DEFAULTCONF}
-
-# All Configurations
-ALLCONFS=default 
-
-
-# build
-.build-impl: .build-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
-
-
-# clean
-.clean-impl: .clean-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
-
-# clobber
-.clobber-impl: .clobber-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
-
-
-
-# all
-.all-impl: .all-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
-
-
-
-# dependency checking support
-.depcheck-impl:
-#	@echo "# This code depends on make tool being used" >.dep.inc
-#	@if [ -n "${MAKE_VERSION}" ]; then \
-#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
-#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
-#	    echo "include \$${DEPFILES}" >>.dep.inc; \
-#	    echo "endif" >>.dep.inc; \
-#	else \
-#	    echo ".KEEP_STATE:" >>.dep.inc; \
-#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
-#	fi
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-local-default.mk b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-local-default.mk
deleted file mode 100644
index 3350f874d..000000000
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-local-default.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-#
-# This file contains information about the location of compilers and other tools.
-# If you commmit this file into your revision control server, you will be able to 
-# to checkout the project and build it from the command line with make. However,
-# if more than one person works on the same project, then this file might show
-# conflicts since different users are bound to have compilers in different places.
-# In that case you might choose to not commit this file and let MPLAB X recreate this file
-# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
-# least once so the file gets created and the project can be built. Finally, you can also
-# avoid using this file at all if you are only building from the command line with make.
-# You can invoke make with the values of the macros:
-# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
-#
-SHELL=cmd.exe
-PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
-# Adding MPLAB X bin directory to path.
-PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
-# Path to java used to run MPLAB X when this makefile was created
-MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
-OS_CURRENT="$(shell uname -s)"
-MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-gcc.exe"
-MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-g++.exe"
-# MP_BC is not defined
-MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-as.exe"
-MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ld.exe"
-MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ar.exe"
-DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
-MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
-MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-variables.mk b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-variables.mk
deleted file mode 100644
index 479dfc45e..000000000
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-variables.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Generated - do not edit!
-#
-# NOCDDL
-#
-CND_BASEDIR=`pwd`
-# default configuration
-CND_ARTIFACT_DIR_default=dist/default/production
-CND_ARTIFACT_NAME_default=ctaocrypt_benchmark.X.production.hex
-CND_ARTIFACT_PATH_default=dist/default/production/ctaocrypt_benchmark.X.production.hex
-CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
-CND_PACKAGE_NAME_default=ctaocryptbenchmark.x.tar
-CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/ctaocryptbenchmark.x.tar
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml b/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
index 1b9409815..d1facedfd 100644
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
@@ -167,6 +167,7 @@
         
       
       
+        
       
     
   
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/private/private.xml b/mplabx/ctaocrypt_benchmark.X/nbproject/private/private.xml
deleted file mode 100644
index e39667075..000000000
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/private/private.xml
+++ /dev/null
@@ -1,3 +0,0 @@
-
-    
-
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-default.mk b/mplabx/ctaocrypt_test.X/nbproject/Makefile-default.mk
deleted file mode 100644
index 185657fc1..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/Makefile-default.mk
+++ /dev/null
@@ -1,170 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a -pre and a -post target defined where you can add customized code.
-#
-# This makefile implements configuration specific macros and targets.
-
-
-# Include project Makefile
-ifeq "${IGNORE_LOCAL}" "TRUE"
-# do not include local makefile. User is passing all local related variables already
-else
-include Makefile
-# Include makefile containing local settings
-ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
-include nbproject/Makefile-local-default.mk
-endif
-endif
-
-# Environment
-MKDIR=gnumkdir -p
-RM=rm -f 
-MV=mv 
-CP=cp 
-
-# Macros
-CND_CONF=default
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-IMAGE_TYPE=debug
-OUTPUT_SUFFIX=elf
-DEBUGGABLE_SUFFIX=elf
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-else
-IMAGE_TYPE=production
-OUTPUT_SUFFIX=hex
-DEBUGGABLE_SUFFIX=elf
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-endif
-
-# Object Directory
-OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
-
-# Distribution Directory
-DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
-
-# Source Files Quoted if spaced
-SOURCEFILES_QUOTED_IF_SPACED=../../ctaocrypt/test/test.c ../test_main.c ../cryptoregs.s
-
-# Object Files Quoted if spaced
-OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/1679622190/test.o ${OBJECTDIR}/_ext/1472/test_main.o ${OBJECTDIR}/_ext/1472/cryptoregs.o
-POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/1679622190/test.o.d ${OBJECTDIR}/_ext/1472/test_main.o.d ${OBJECTDIR}/_ext/1472/cryptoregs.o.d
-
-# Object Files
-OBJECTFILES=${OBJECTDIR}/_ext/1679622190/test.o ${OBJECTDIR}/_ext/1472/test_main.o ${OBJECTDIR}/_ext/1472/cryptoregs.o
-
-# Source Files
-SOURCEFILES=../../ctaocrypt/test/test.c ../test_main.c ../cryptoregs.s
-
-
-CFLAGS=
-ASFLAGS=
-LDLIBSOPTIONS=
-
-############# Tool locations ##########################################
-# If you copy a project from one host to another, the path where the  #
-# compiler is installed may be different.                             #
-# If you open this project with MPLAB X in the new host, this         #
-# makefile will be regenerated and the paths will be corrected.       #
-#######################################################################
-# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
-FIXDEPS=fixDeps
-
-.build-conf:  ${BUILD_SUBPROJECTS}
-	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-
-MP_PROCESSOR_OPTION=32MZ2048ECM144
-MP_LINKER_FILE_OPTION=
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assemble
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-${OBJECTDIR}/_ext/1472/cryptoregs.o: ../cryptoregs.s  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1472 
-	@${RM} ${OBJECTDIR}/_ext/1472/cryptoregs.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1472/cryptoregs.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC} $(MP_EXTRA_AS_PRE)  -D__DEBUG  -D__MPLAB_DEBUGGER_PK3=1 -c -mprocessor=$(MP_PROCESSOR_OPTION)  -o ${OBJECTDIR}/_ext/1472/cryptoregs.o ../cryptoregs.s  -Wa,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_AS_POST),--defsym=__ICD2RAM=1,--defsym=__MPLAB_DEBUG=1,--defsym=__DEBUG=1,--defsym=__MPLAB_DEBUGGER_PK3=1,--gdwarf-2,-MD="${OBJECTDIR}/_ext/1472/cryptoregs.o.d"
-else
-${OBJECTDIR}/_ext/1472/cryptoregs.o: ../cryptoregs.s  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1472 
-	@${RM} ${OBJECTDIR}/_ext/1472/cryptoregs.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1472/cryptoregs.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC} $(MP_EXTRA_AS_PRE)  -c -mprocessor=$(MP_PROCESSOR_OPTION)  -o ${OBJECTDIR}/_ext/1472/cryptoregs.o ../cryptoregs.s  -Wa,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_AS_POST),--gdwarf-2,-MD="${OBJECTDIR}/_ext/1472/cryptoregs.o.d"
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assembleWithPreprocess
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compile
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-${OBJECTDIR}/_ext/1679622190/test.o: ../../ctaocrypt/test/test.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1679622190 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1679622190/test.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1679622190/test.o.d" -o ${OBJECTDIR}/_ext/1679622190/test.o ../../ctaocrypt/test/test.c   
-	
-${OBJECTDIR}/_ext/1472/test_main.o: ../test_main.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1472 
-	@${RM} ${OBJECTDIR}/_ext/1472/test_main.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1472/test_main.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1472/test_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1472/test_main.o.d" -o ${OBJECTDIR}/_ext/1472/test_main.o ../test_main.c   
-	
-else
-${OBJECTDIR}/_ext/1679622190/test.o: ../../ctaocrypt/test/test.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1679622190 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1679622190/test.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1679622190/test.o.d" -o ${OBJECTDIR}/_ext/1679622190/test.o ../../ctaocrypt/test/test.c   
-	
-${OBJECTDIR}/_ext/1472/test_main.o: ../test_main.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1472 
-	@${RM} ${OBJECTDIR}/_ext/1472/test_main.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1472/test_main.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1472/test_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1472/test_main.o.d" -o ${OBJECTDIR}/_ext/1472/test_main.o ../test_main.c   
-	
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compileCPP
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: link
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/debug/cyassl.X.a  
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_CC} $(MP_EXTRA_LD_PRE)  -mdebugger -D__MPLAB_DEBUGGER_PK3=1 -mprocessor=$(MP_PROCESSOR_OPTION) -Os -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\debug\cyassl.X.a       -mreserve=data@0x0:0x27F   -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=__MPLAB_DEBUG=1,--defsym=__DEBUG=1,--defsym=__MPLAB_DEBUGGER_PK3=1,--defsym=_min_heap_size=20480,--gc-sections
-	
-else
-dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/production/cyassl.X.a 
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_CC} $(MP_EXTRA_LD_PRE)  -mprocessor=$(MP_PROCESSOR_OPTION) -Os -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\production\cyassl.X.a      -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=_min_heap_size=20480,--gc-sections
-	${MP_CC_DIR}\\xc32-bin2hex dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} 
-endif
-
-
-# Subprojects
-.build-subprojects:
-	cd /D ../cyassl.X && ${MAKE} MAKE_OPTIONS="" -f Makefile CONF=default
-
-
-# Subprojects
-.clean-subprojects:
-	cd /D ../cyassl.X && rm -rf "build/default" "dist/default"
-
-# Clean Targets
-.clean-conf: ${CLEAN_SUBPROJECTS}
-	${RM} -r build/default
-	${RM} -r dist/default
-
-# Enable dependency checking
-.dep.inc: .depcheck-impl
-
-DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
-ifneq (${DEPFILES},)
-include ${DEPFILES}
-endif
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-genesis.properties b/mplabx/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
deleted file mode 100644
index 9e23a4ab2..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-#Mon Nov 11 18:57:04 JST 2013
-default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
-default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30\\bin
-com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
-default.languagetoolchain.version=1.30
-host.platform=windows
-conf.ids=default
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-impl.mk b/mplabx/ctaocrypt_test.X/nbproject/Makefile-impl.mk
deleted file mode 100644
index 32630f76c..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/Makefile-impl.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a pre- and a post- target defined where you can add customization code.
-#
-# This makefile implements macros and targets common to all configurations.
-#
-# NOCDDL
-
-
-# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
-# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
-# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
-# and .clean-reqprojects-conf unless SUB has the value 'no'
-SUB_no=NO
-SUBPROJECTS=${SUB_${SUB}}
-BUILD_SUBPROJECTS_=.build-subprojects
-BUILD_SUBPROJECTS_NO=
-BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
-CLEAN_SUBPROJECTS_=.clean-subprojects
-CLEAN_SUBPROJECTS_NO=
-CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
-
-
-# Project Name
-PROJECTNAME=ctaocrypt_test.X
-
-# Active Configuration
-DEFAULTCONF=default
-CONF=${DEFAULTCONF}
-
-# All Configurations
-ALLCONFS=default 
-
-
-# build
-.build-impl: .build-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
-
-
-# clean
-.clean-impl: .clean-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
-
-# clobber
-.clobber-impl: .clobber-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
-
-
-
-# all
-.all-impl: .all-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
-
-
-
-# dependency checking support
-.depcheck-impl:
-#	@echo "# This code depends on make tool being used" >.dep.inc
-#	@if [ -n "${MAKE_VERSION}" ]; then \
-#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
-#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
-#	    echo "include \$${DEPFILES}" >>.dep.inc; \
-#	    echo "endif" >>.dep.inc; \
-#	else \
-#	    echo ".KEEP_STATE:" >>.dep.inc; \
-#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
-#	fi
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-local-default.mk b/mplabx/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
deleted file mode 100644
index 3350f874d..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-#
-# This file contains information about the location of compilers and other tools.
-# If you commmit this file into your revision control server, you will be able to 
-# to checkout the project and build it from the command line with make. However,
-# if more than one person works on the same project, then this file might show
-# conflicts since different users are bound to have compilers in different places.
-# In that case you might choose to not commit this file and let MPLAB X recreate this file
-# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
-# least once so the file gets created and the project can be built. Finally, you can also
-# avoid using this file at all if you are only building from the command line with make.
-# You can invoke make with the values of the macros:
-# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
-#
-SHELL=cmd.exe
-PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
-# Adding MPLAB X bin directory to path.
-PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
-# Path to java used to run MPLAB X when this makefile was created
-MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
-OS_CURRENT="$(shell uname -s)"
-MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-gcc.exe"
-MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-g++.exe"
-# MP_BC is not defined
-MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-as.exe"
-MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ld.exe"
-MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ar.exe"
-DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
-MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
-MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-variables.mk b/mplabx/ctaocrypt_test.X/nbproject/Makefile-variables.mk
deleted file mode 100644
index 09fbeab2d..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/Makefile-variables.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Generated - do not edit!
-#
-# NOCDDL
-#
-CND_BASEDIR=`pwd`
-# default configuration
-CND_ARTIFACT_DIR_default=dist/default/production
-CND_ARTIFACT_NAME_default=ctaocrypt_test.X.production.hex
-CND_ARTIFACT_PATH_default=dist/default/production/ctaocrypt_test.X.production.hex
-CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
-CND_PACKAGE_NAME_default=ctaocrypttest.x.tar
-CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/ctaocrypttest.x.tar
diff --git a/mplabx/ctaocrypt_test.X/nbproject/configurations.xml b/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
index 09e567cbd..1aa064df0 100644
--- a/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
+++ b/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
@@ -15,7 +15,6 @@
                    projectFiles="true">
       ../../ctaocrypt/test/test.c
       ../test_main.c
-      ../cryptoregs.s
     
     
       
         localhost
-        PIC32MZ2048ECM144
+        PIC32MX795F512L
         
         
-        PKOBSKDEPlatformTool
+        SKDEPIC32PlatformTool
         XC32
         1.30
         3
@@ -91,7 +90,7 @@
         
         
         
+                  value="NO_MAIN_DRIVER;USE_CERT_BUFFERS_1024;CYASSL_SHA384;CYASSL_SHA512;HAVE_ECC"/>
         
         
         
@@ -190,6 +189,9 @@
         
         
       
+      
+        
+      
     
   
 
diff --git a/mplabx/ctaocrypt_test.X/nbproject/private/SuppressibleMessageMemo.properties b/mplabx/ctaocrypt_test.X/nbproject/private/SuppressibleMessageMemo.properties
deleted file mode 100644
index c9b1335ab..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/private/SuppressibleMessageMemo.properties
+++ /dev/null
@@ -1,3 +0,0 @@
-#
-#Wed Nov 06 20:25:39 JST 2013
-pkobskde/DEVID_MISMATCH=true
diff --git a/mplabx/ctaocrypt_test.X/nbproject/private/private.xml b/mplabx/ctaocrypt_test.X/nbproject/private/private.xml
deleted file mode 100644
index e39667075..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/private/private.xml
+++ /dev/null
@@ -1,3 +0,0 @@
-
-    
-
diff --git a/mplabx/cyassl.X/nbproject/Makefile-default.mk b/mplabx/cyassl.X/nbproject/Makefile-default.mk
deleted file mode 100644
index 30b4f2914..000000000
--- a/mplabx/cyassl.X/nbproject/Makefile-default.mk
+++ /dev/null
@@ -1,590 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a -pre and a -post target defined where you can add customized code.
-#
-# This makefile implements configuration specific macros and targets.
-
-
-# Include project Makefile
-ifeq "${IGNORE_LOCAL}" "TRUE"
-# do not include local makefile. User is passing all local related variables already
-else
-include Makefile
-# Include makefile containing local settings
-ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
-include nbproject/Makefile-local-default.mk
-endif
-endif
-
-# Environment
-MKDIR=gnumkdir -p
-RM=rm -f 
-MV=mv 
-CP=cp 
-
-# Macros
-CND_CONF=default
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-IMAGE_TYPE=debug
-OUTPUT_SUFFIX=a
-DEBUGGABLE_SUFFIX=
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-else
-IMAGE_TYPE=production
-OUTPUT_SUFFIX=a
-DEBUGGABLE_SUFFIX=
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-endif
-
-# Object Directory
-OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
-
-# Distribution Directory
-DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
-
-# Source Files Quoted if spaced
-SOURCEFILES_QUOTED_IF_SPACED=../../src/crl.c ../../src/internal.c ../../src/io.c ../../src/keys.c ../../src/ocsp.c ../../src/sniffer.c ../../src/ssl.c ../../src/tls.c ../../ctaocrypt/src/aes.c ../../ctaocrypt/src/arc4.c ../../ctaocrypt/src/asm.c ../../ctaocrypt/src/asn.c ../../ctaocrypt/src/coding.c ../../ctaocrypt/src/des3.c ../../ctaocrypt/src/dh.c ../../ctaocrypt/src/dsa.c ../../ctaocrypt/src/ecc.c ../../ctaocrypt/src/ecc_fp.c ../../ctaocrypt/src/error.c ../../ctaocrypt/src/hc128.c ../../ctaocrypt/src/hmac.c ../../ctaocrypt/src/integer.c ../../ctaocrypt/src/logging.c ../../ctaocrypt/src/md2.c ../../ctaocrypt/src/md4.c ../../ctaocrypt/src/md5.c ../../ctaocrypt/src/memory.c ../../ctaocrypt/src/misc.c ../../ctaocrypt/src/pwdbased.c ../../ctaocrypt/src/rabbit.c ../../ctaocrypt/src/random.c ../../ctaocrypt/src/ripemd.c ../../ctaocrypt/src/rsa.c ../../ctaocrypt/src/sha.c ../../ctaocrypt/src/sha256.c ../../ctaocrypt/src/sha512.c ../../ctaocrypt/src/tfm.c ../../ctaocrypt/src/port.c
-
-# Object Files Quoted if spaced
-OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/1445274692/crl.o ${OBJECTDIR}/_ext/1445274692/internal.o ${OBJECTDIR}/_ext/1445274692/io.o ${OBJECTDIR}/_ext/1445274692/keys.o ${OBJECTDIR}/_ext/1445274692/ocsp.o ${OBJECTDIR}/_ext/1445274692/sniffer.o ${OBJECTDIR}/_ext/1445274692/ssl.o ${OBJECTDIR}/_ext/1445274692/tls.o ${OBJECTDIR}/_ext/1439655260/aes.o ${OBJECTDIR}/_ext/1439655260/arc4.o ${OBJECTDIR}/_ext/1439655260/asm.o ${OBJECTDIR}/_ext/1439655260/asn.o ${OBJECTDIR}/_ext/1439655260/coding.o ${OBJECTDIR}/_ext/1439655260/des3.o ${OBJECTDIR}/_ext/1439655260/dh.o ${OBJECTDIR}/_ext/1439655260/dsa.o ${OBJECTDIR}/_ext/1439655260/ecc.o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ${OBJECTDIR}/_ext/1439655260/error.o ${OBJECTDIR}/_ext/1439655260/hc128.o ${OBJECTDIR}/_ext/1439655260/hmac.o ${OBJECTDIR}/_ext/1439655260/integer.o ${OBJECTDIR}/_ext/1439655260/logging.o ${OBJECTDIR}/_ext/1439655260/md2.o ${OBJECTDIR}/_ext/1439655260/md4.o ${OBJECTDIR}/_ext/1439655260/md5.o ${OBJECTDIR}/_ext/1439655260/memory.o ${OBJECTDIR}/_ext/1439655260/misc.o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ${OBJECTDIR}/_ext/1439655260/rabbit.o ${OBJECTDIR}/_ext/1439655260/random.o ${OBJECTDIR}/_ext/1439655260/ripemd.o ${OBJECTDIR}/_ext/1439655260/rsa.o ${OBJECTDIR}/_ext/1439655260/sha.o ${OBJECTDIR}/_ext/1439655260/sha256.o ${OBJECTDIR}/_ext/1439655260/sha512.o ${OBJECTDIR}/_ext/1439655260/tfm.o ${OBJECTDIR}/_ext/1439655260/port.o
-POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/1445274692/crl.o.d ${OBJECTDIR}/_ext/1445274692/internal.o.d ${OBJECTDIR}/_ext/1445274692/io.o.d ${OBJECTDIR}/_ext/1445274692/keys.o.d ${OBJECTDIR}/_ext/1445274692/ocsp.o.d ${OBJECTDIR}/_ext/1445274692/sniffer.o.d ${OBJECTDIR}/_ext/1445274692/ssl.o.d ${OBJECTDIR}/_ext/1445274692/tls.o.d ${OBJECTDIR}/_ext/1439655260/aes.o.d ${OBJECTDIR}/_ext/1439655260/arc4.o.d ${OBJECTDIR}/_ext/1439655260/asm.o.d ${OBJECTDIR}/_ext/1439655260/asn.o.d ${OBJECTDIR}/_ext/1439655260/coding.o.d ${OBJECTDIR}/_ext/1439655260/des3.o.d ${OBJECTDIR}/_ext/1439655260/dh.o.d ${OBJECTDIR}/_ext/1439655260/dsa.o.d ${OBJECTDIR}/_ext/1439655260/ecc.o.d ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d ${OBJECTDIR}/_ext/1439655260/error.o.d ${OBJECTDIR}/_ext/1439655260/hc128.o.d ${OBJECTDIR}/_ext/1439655260/hmac.o.d ${OBJECTDIR}/_ext/1439655260/integer.o.d ${OBJECTDIR}/_ext/1439655260/logging.o.d ${OBJECTDIR}/_ext/1439655260/md2.o.d ${OBJECTDIR}/_ext/1439655260/md4.o.d ${OBJECTDIR}/_ext/1439655260/md5.o.d ${OBJECTDIR}/_ext/1439655260/memory.o.d ${OBJECTDIR}/_ext/1439655260/misc.o.d ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d ${OBJECTDIR}/_ext/1439655260/rabbit.o.d ${OBJECTDIR}/_ext/1439655260/random.o.d ${OBJECTDIR}/_ext/1439655260/ripemd.o.d ${OBJECTDIR}/_ext/1439655260/rsa.o.d ${OBJECTDIR}/_ext/1439655260/sha.o.d ${OBJECTDIR}/_ext/1439655260/sha256.o.d ${OBJECTDIR}/_ext/1439655260/sha512.o.d ${OBJECTDIR}/_ext/1439655260/tfm.o.d ${OBJECTDIR}/_ext/1439655260/port.o.d
-
-# Object Files
-OBJECTFILES=${OBJECTDIR}/_ext/1445274692/crl.o ${OBJECTDIR}/_ext/1445274692/internal.o ${OBJECTDIR}/_ext/1445274692/io.o ${OBJECTDIR}/_ext/1445274692/keys.o ${OBJECTDIR}/_ext/1445274692/ocsp.o ${OBJECTDIR}/_ext/1445274692/sniffer.o ${OBJECTDIR}/_ext/1445274692/ssl.o ${OBJECTDIR}/_ext/1445274692/tls.o ${OBJECTDIR}/_ext/1439655260/aes.o ${OBJECTDIR}/_ext/1439655260/arc4.o ${OBJECTDIR}/_ext/1439655260/asm.o ${OBJECTDIR}/_ext/1439655260/asn.o ${OBJECTDIR}/_ext/1439655260/coding.o ${OBJECTDIR}/_ext/1439655260/des3.o ${OBJECTDIR}/_ext/1439655260/dh.o ${OBJECTDIR}/_ext/1439655260/dsa.o ${OBJECTDIR}/_ext/1439655260/ecc.o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ${OBJECTDIR}/_ext/1439655260/error.o ${OBJECTDIR}/_ext/1439655260/hc128.o ${OBJECTDIR}/_ext/1439655260/hmac.o ${OBJECTDIR}/_ext/1439655260/integer.o ${OBJECTDIR}/_ext/1439655260/logging.o ${OBJECTDIR}/_ext/1439655260/md2.o ${OBJECTDIR}/_ext/1439655260/md4.o ${OBJECTDIR}/_ext/1439655260/md5.o ${OBJECTDIR}/_ext/1439655260/memory.o ${OBJECTDIR}/_ext/1439655260/misc.o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ${OBJECTDIR}/_ext/1439655260/rabbit.o ${OBJECTDIR}/_ext/1439655260/random.o ${OBJECTDIR}/_ext/1439655260/ripemd.o ${OBJECTDIR}/_ext/1439655260/rsa.o ${OBJECTDIR}/_ext/1439655260/sha.o ${OBJECTDIR}/_ext/1439655260/sha256.o ${OBJECTDIR}/_ext/1439655260/sha512.o ${OBJECTDIR}/_ext/1439655260/tfm.o ${OBJECTDIR}/_ext/1439655260/port.o
-
-# Source Files
-SOURCEFILES=../../src/crl.c ../../src/internal.c ../../src/io.c ../../src/keys.c ../../src/ocsp.c ../../src/sniffer.c ../../src/ssl.c ../../src/tls.c ../../ctaocrypt/src/aes.c ../../ctaocrypt/src/arc4.c ../../ctaocrypt/src/asm.c ../../ctaocrypt/src/asn.c ../../ctaocrypt/src/coding.c ../../ctaocrypt/src/des3.c ../../ctaocrypt/src/dh.c ../../ctaocrypt/src/dsa.c ../../ctaocrypt/src/ecc.c ../../ctaocrypt/src/ecc_fp.c ../../ctaocrypt/src/error.c ../../ctaocrypt/src/hc128.c ../../ctaocrypt/src/hmac.c ../../ctaocrypt/src/integer.c ../../ctaocrypt/src/logging.c ../../ctaocrypt/src/md2.c ../../ctaocrypt/src/md4.c ../../ctaocrypt/src/md5.c ../../ctaocrypt/src/memory.c ../../ctaocrypt/src/misc.c ../../ctaocrypt/src/pwdbased.c ../../ctaocrypt/src/rabbit.c ../../ctaocrypt/src/random.c ../../ctaocrypt/src/ripemd.c ../../ctaocrypt/src/rsa.c ../../ctaocrypt/src/sha.c ../../ctaocrypt/src/sha256.c ../../ctaocrypt/src/sha512.c ../../ctaocrypt/src/tfm.c ../../ctaocrypt/src/port.c
-
-
-CFLAGS=
-ASFLAGS=
-LDLIBSOPTIONS=
-
-############# Tool locations ##########################################
-# If you copy a project from one host to another, the path where the  #
-# compiler is installed may be different.                             #
-# If you open this project with MPLAB X in the new host, this         #
-# makefile will be regenerated and the paths will be corrected.       #
-#######################################################################
-# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
-FIXDEPS=fixDeps
-
-.build-conf:  ${BUILD_SUBPROJECTS}
-	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-
-MP_PROCESSOR_OPTION=32MZ2048ECM144
-MP_LINKER_FILE_OPTION=
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assemble
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assembleWithPreprocess
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compile
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-${OBJECTDIR}/_ext/1445274692/crl.o: ../../src/crl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/crl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/crl.o.d" -o ${OBJECTDIR}/_ext/1445274692/crl.o ../../src/crl.c   
-	
-${OBJECTDIR}/_ext/1445274692/internal.o: ../../src/internal.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/internal.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/internal.o.d" -o ${OBJECTDIR}/_ext/1445274692/internal.o ../../src/internal.c   
-	
-${OBJECTDIR}/_ext/1445274692/io.o: ../../src/io.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/io.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/io.o.d" -o ${OBJECTDIR}/_ext/1445274692/io.o ../../src/io.c   
-	
-${OBJECTDIR}/_ext/1445274692/keys.o: ../../src/keys.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/keys.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/keys.o.d" -o ${OBJECTDIR}/_ext/1445274692/keys.o ../../src/keys.c   
-	
-${OBJECTDIR}/_ext/1445274692/ocsp.o: ../../src/ocsp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" -o ${OBJECTDIR}/_ext/1445274692/ocsp.o ../../src/ocsp.c   
-	
-${OBJECTDIR}/_ext/1445274692/sniffer.o: ../../src/sniffer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" -o ${OBJECTDIR}/_ext/1445274692/sniffer.o ../../src/sniffer.c   
-	
-${OBJECTDIR}/_ext/1445274692/ssl.o: ../../src/ssl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ssl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ssl.o.d" -o ${OBJECTDIR}/_ext/1445274692/ssl.o ../../src/ssl.c   
-	
-${OBJECTDIR}/_ext/1445274692/tls.o: ../../src/tls.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/tls.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/tls.o.d" -o ${OBJECTDIR}/_ext/1445274692/tls.o ../../src/tls.c   
-	
-${OBJECTDIR}/_ext/1439655260/aes.o: ../../ctaocrypt/src/aes.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/aes.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/aes.o.d" -o ${OBJECTDIR}/_ext/1439655260/aes.o ../../ctaocrypt/src/aes.c   
-	
-${OBJECTDIR}/_ext/1439655260/arc4.o: ../../ctaocrypt/src/arc4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/arc4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/arc4.o.d" -o ${OBJECTDIR}/_ext/1439655260/arc4.o ../../ctaocrypt/src/arc4.c   
-	
-${OBJECTDIR}/_ext/1439655260/asm.o: ../../ctaocrypt/src/asm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asm.o.d" -o ${OBJECTDIR}/_ext/1439655260/asm.o ../../ctaocrypt/src/asm.c   
-	
-${OBJECTDIR}/_ext/1439655260/asn.o: ../../ctaocrypt/src/asn.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asn.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asn.o.d" -o ${OBJECTDIR}/_ext/1439655260/asn.o ../../ctaocrypt/src/asn.c   
-	
-${OBJECTDIR}/_ext/1439655260/coding.o: ../../ctaocrypt/src/coding.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/coding.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/coding.o.d" -o ${OBJECTDIR}/_ext/1439655260/coding.o ../../ctaocrypt/src/coding.c   
-	
-${OBJECTDIR}/_ext/1439655260/des3.o: ../../ctaocrypt/src/des3.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/des3.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/des3.o.d" -o ${OBJECTDIR}/_ext/1439655260/des3.o ../../ctaocrypt/src/des3.c   
-	
-${OBJECTDIR}/_ext/1439655260/dh.o: ../../ctaocrypt/src/dh.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dh.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dh.o.d" -o ${OBJECTDIR}/_ext/1439655260/dh.o ../../ctaocrypt/src/dh.c   
-	
-${OBJECTDIR}/_ext/1439655260/dsa.o: ../../ctaocrypt/src/dsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/dsa.o ../../ctaocrypt/src/dsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc.o: ../../ctaocrypt/src/ecc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc.o ../../ctaocrypt/src/ecc.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc_fp.o: ../../ctaocrypt/src/ecc_fp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ../../ctaocrypt/src/ecc_fp.c   
-	
-${OBJECTDIR}/_ext/1439655260/error.o: ../../ctaocrypt/src/error.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/error.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/error.o.d" -o ${OBJECTDIR}/_ext/1439655260/error.o ../../ctaocrypt/src/error.c   
-	
-${OBJECTDIR}/_ext/1439655260/hc128.o: ../../ctaocrypt/src/hc128.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hc128.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hc128.o.d" -o ${OBJECTDIR}/_ext/1439655260/hc128.o ../../ctaocrypt/src/hc128.c   
-	
-${OBJECTDIR}/_ext/1439655260/hmac.o: ../../ctaocrypt/src/hmac.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hmac.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hmac.o.d" -o ${OBJECTDIR}/_ext/1439655260/hmac.o ../../ctaocrypt/src/hmac.c   
-	
-${OBJECTDIR}/_ext/1439655260/integer.o: ../../ctaocrypt/src/integer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/integer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/integer.o.d" -o ${OBJECTDIR}/_ext/1439655260/integer.o ../../ctaocrypt/src/integer.c   
-	
-${OBJECTDIR}/_ext/1439655260/logging.o: ../../ctaocrypt/src/logging.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/logging.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/logging.o.d" -o ${OBJECTDIR}/_ext/1439655260/logging.o ../../ctaocrypt/src/logging.c   
-	
-${OBJECTDIR}/_ext/1439655260/md2.o: ../../ctaocrypt/src/md2.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md2.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md2.o.d" -o ${OBJECTDIR}/_ext/1439655260/md2.o ../../ctaocrypt/src/md2.c   
-	
-${OBJECTDIR}/_ext/1439655260/md4.o: ../../ctaocrypt/src/md4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md4.o.d" -o ${OBJECTDIR}/_ext/1439655260/md4.o ../../ctaocrypt/src/md4.c   
-	
-${OBJECTDIR}/_ext/1439655260/md5.o: ../../ctaocrypt/src/md5.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md5.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md5.o.d" -o ${OBJECTDIR}/_ext/1439655260/md5.o ../../ctaocrypt/src/md5.c   
-	
-${OBJECTDIR}/_ext/1439655260/memory.o: ../../ctaocrypt/src/memory.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/memory.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/memory.o.d" -o ${OBJECTDIR}/_ext/1439655260/memory.o ../../ctaocrypt/src/memory.c   
-	
-${OBJECTDIR}/_ext/1439655260/misc.o: ../../ctaocrypt/src/misc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/misc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/misc.o.d" -o ${OBJECTDIR}/_ext/1439655260/misc.o ../../ctaocrypt/src/misc.c   
-	
-${OBJECTDIR}/_ext/1439655260/pwdbased.o: ../../ctaocrypt/src/pwdbased.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" -o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ../../ctaocrypt/src/pwdbased.c   
-	
-${OBJECTDIR}/_ext/1439655260/rabbit.o: ../../ctaocrypt/src/rabbit.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" -o ${OBJECTDIR}/_ext/1439655260/rabbit.o ../../ctaocrypt/src/rabbit.c   
-	
-${OBJECTDIR}/_ext/1439655260/random.o: ../../ctaocrypt/src/random.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/random.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/random.o.d" -o ${OBJECTDIR}/_ext/1439655260/random.o ../../ctaocrypt/src/random.c   
-	
-${OBJECTDIR}/_ext/1439655260/ripemd.o: ../../ctaocrypt/src/ripemd.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" -o ${OBJECTDIR}/_ext/1439655260/ripemd.o ../../ctaocrypt/src/ripemd.c   
-	
-${OBJECTDIR}/_ext/1439655260/rsa.o: ../../ctaocrypt/src/rsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/rsa.o ../../ctaocrypt/src/rsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha.o: ../../ctaocrypt/src/sha.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha.o ../../ctaocrypt/src/sha.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha256.o: ../../ctaocrypt/src/sha256.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha256.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha256.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha256.o ../../ctaocrypt/src/sha256.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha512.o: ../../ctaocrypt/src/sha512.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha512.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha512.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha512.o ../../ctaocrypt/src/sha512.c   
-	
-${OBJECTDIR}/_ext/1439655260/tfm.o: ../../ctaocrypt/src/tfm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/tfm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/tfm.o.d" -o ${OBJECTDIR}/_ext/1439655260/tfm.o ../../ctaocrypt/src/tfm.c   
-	
-${OBJECTDIR}/_ext/1439655260/port.o: ../../ctaocrypt/src/port.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/port.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/port.o.d" -o ${OBJECTDIR}/_ext/1439655260/port.o ../../ctaocrypt/src/port.c   
-	
-else
-${OBJECTDIR}/_ext/1445274692/crl.o: ../../src/crl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/crl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/crl.o.d" -o ${OBJECTDIR}/_ext/1445274692/crl.o ../../src/crl.c   
-	
-${OBJECTDIR}/_ext/1445274692/internal.o: ../../src/internal.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/internal.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/internal.o.d" -o ${OBJECTDIR}/_ext/1445274692/internal.o ../../src/internal.c   
-	
-${OBJECTDIR}/_ext/1445274692/io.o: ../../src/io.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/io.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/io.o.d" -o ${OBJECTDIR}/_ext/1445274692/io.o ../../src/io.c   
-	
-${OBJECTDIR}/_ext/1445274692/keys.o: ../../src/keys.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/keys.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/keys.o.d" -o ${OBJECTDIR}/_ext/1445274692/keys.o ../../src/keys.c   
-	
-${OBJECTDIR}/_ext/1445274692/ocsp.o: ../../src/ocsp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" -o ${OBJECTDIR}/_ext/1445274692/ocsp.o ../../src/ocsp.c   
-	
-${OBJECTDIR}/_ext/1445274692/sniffer.o: ../../src/sniffer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" -o ${OBJECTDIR}/_ext/1445274692/sniffer.o ../../src/sniffer.c   
-	
-${OBJECTDIR}/_ext/1445274692/ssl.o: ../../src/ssl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ssl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ssl.o.d" -o ${OBJECTDIR}/_ext/1445274692/ssl.o ../../src/ssl.c   
-	
-${OBJECTDIR}/_ext/1445274692/tls.o: ../../src/tls.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/tls.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/tls.o.d" -o ${OBJECTDIR}/_ext/1445274692/tls.o ../../src/tls.c   
-	
-${OBJECTDIR}/_ext/1439655260/aes.o: ../../ctaocrypt/src/aes.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/aes.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/aes.o.d" -o ${OBJECTDIR}/_ext/1439655260/aes.o ../../ctaocrypt/src/aes.c   
-	
-${OBJECTDIR}/_ext/1439655260/arc4.o: ../../ctaocrypt/src/arc4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/arc4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/arc4.o.d" -o ${OBJECTDIR}/_ext/1439655260/arc4.o ../../ctaocrypt/src/arc4.c   
-	
-${OBJECTDIR}/_ext/1439655260/asm.o: ../../ctaocrypt/src/asm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asm.o.d" -o ${OBJECTDIR}/_ext/1439655260/asm.o ../../ctaocrypt/src/asm.c   
-	
-${OBJECTDIR}/_ext/1439655260/asn.o: ../../ctaocrypt/src/asn.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asn.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asn.o.d" -o ${OBJECTDIR}/_ext/1439655260/asn.o ../../ctaocrypt/src/asn.c   
-	
-${OBJECTDIR}/_ext/1439655260/coding.o: ../../ctaocrypt/src/coding.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/coding.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/coding.o.d" -o ${OBJECTDIR}/_ext/1439655260/coding.o ../../ctaocrypt/src/coding.c   
-	
-${OBJECTDIR}/_ext/1439655260/des3.o: ../../ctaocrypt/src/des3.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/des3.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/des3.o.d" -o ${OBJECTDIR}/_ext/1439655260/des3.o ../../ctaocrypt/src/des3.c   
-	
-${OBJECTDIR}/_ext/1439655260/dh.o: ../../ctaocrypt/src/dh.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dh.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dh.o.d" -o ${OBJECTDIR}/_ext/1439655260/dh.o ../../ctaocrypt/src/dh.c   
-	
-${OBJECTDIR}/_ext/1439655260/dsa.o: ../../ctaocrypt/src/dsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/dsa.o ../../ctaocrypt/src/dsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc.o: ../../ctaocrypt/src/ecc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc.o ../../ctaocrypt/src/ecc.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc_fp.o: ../../ctaocrypt/src/ecc_fp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ../../ctaocrypt/src/ecc_fp.c   
-	
-${OBJECTDIR}/_ext/1439655260/error.o: ../../ctaocrypt/src/error.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/error.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/error.o.d" -o ${OBJECTDIR}/_ext/1439655260/error.o ../../ctaocrypt/src/error.c   
-	
-${OBJECTDIR}/_ext/1439655260/hc128.o: ../../ctaocrypt/src/hc128.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hc128.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hc128.o.d" -o ${OBJECTDIR}/_ext/1439655260/hc128.o ../../ctaocrypt/src/hc128.c   
-	
-${OBJECTDIR}/_ext/1439655260/hmac.o: ../../ctaocrypt/src/hmac.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hmac.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hmac.o.d" -o ${OBJECTDIR}/_ext/1439655260/hmac.o ../../ctaocrypt/src/hmac.c   
-	
-${OBJECTDIR}/_ext/1439655260/integer.o: ../../ctaocrypt/src/integer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/integer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/integer.o.d" -o ${OBJECTDIR}/_ext/1439655260/integer.o ../../ctaocrypt/src/integer.c   
-	
-${OBJECTDIR}/_ext/1439655260/logging.o: ../../ctaocrypt/src/logging.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/logging.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/logging.o.d" -o ${OBJECTDIR}/_ext/1439655260/logging.o ../../ctaocrypt/src/logging.c   
-	
-${OBJECTDIR}/_ext/1439655260/md2.o: ../../ctaocrypt/src/md2.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md2.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md2.o.d" -o ${OBJECTDIR}/_ext/1439655260/md2.o ../../ctaocrypt/src/md2.c   
-	
-${OBJECTDIR}/_ext/1439655260/md4.o: ../../ctaocrypt/src/md4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md4.o.d" -o ${OBJECTDIR}/_ext/1439655260/md4.o ../../ctaocrypt/src/md4.c   
-	
-${OBJECTDIR}/_ext/1439655260/md5.o: ../../ctaocrypt/src/md5.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md5.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md5.o.d" -o ${OBJECTDIR}/_ext/1439655260/md5.o ../../ctaocrypt/src/md5.c   
-	
-${OBJECTDIR}/_ext/1439655260/memory.o: ../../ctaocrypt/src/memory.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/memory.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/memory.o.d" -o ${OBJECTDIR}/_ext/1439655260/memory.o ../../ctaocrypt/src/memory.c   
-	
-${OBJECTDIR}/_ext/1439655260/misc.o: ../../ctaocrypt/src/misc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/misc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/misc.o.d" -o ${OBJECTDIR}/_ext/1439655260/misc.o ../../ctaocrypt/src/misc.c   
-	
-${OBJECTDIR}/_ext/1439655260/pwdbased.o: ../../ctaocrypt/src/pwdbased.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" -o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ../../ctaocrypt/src/pwdbased.c   
-	
-${OBJECTDIR}/_ext/1439655260/rabbit.o: ../../ctaocrypt/src/rabbit.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" -o ${OBJECTDIR}/_ext/1439655260/rabbit.o ../../ctaocrypt/src/rabbit.c   
-	
-${OBJECTDIR}/_ext/1439655260/random.o: ../../ctaocrypt/src/random.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/random.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/random.o.d" -o ${OBJECTDIR}/_ext/1439655260/random.o ../../ctaocrypt/src/random.c   
-	
-${OBJECTDIR}/_ext/1439655260/ripemd.o: ../../ctaocrypt/src/ripemd.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" -o ${OBJECTDIR}/_ext/1439655260/ripemd.o ../../ctaocrypt/src/ripemd.c   
-	
-${OBJECTDIR}/_ext/1439655260/rsa.o: ../../ctaocrypt/src/rsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/rsa.o ../../ctaocrypt/src/rsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha.o: ../../ctaocrypt/src/sha.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha.o ../../ctaocrypt/src/sha.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha256.o: ../../ctaocrypt/src/sha256.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha256.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha256.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha256.o ../../ctaocrypt/src/sha256.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha512.o: ../../ctaocrypt/src/sha512.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha512.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha512.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha512.o ../../ctaocrypt/src/sha512.c   
-	
-${OBJECTDIR}/_ext/1439655260/tfm.o: ../../ctaocrypt/src/tfm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/tfm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/tfm.o.d" -o ${OBJECTDIR}/_ext/1439655260/tfm.o ../../ctaocrypt/src/tfm.c   
-	
-${OBJECTDIR}/_ext/1439655260/port.o: ../../ctaocrypt/src/port.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/port.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -DCYASSL_PIC32MZ_CRYPT -DCYASSL_MICROCHIP_PIC32MZ -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/port.o.d" -o ${OBJECTDIR}/_ext/1439655260/port.o ../../ctaocrypt/src/port.c   
-	
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compileCPP
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: archive
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk    
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
-else
-dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk   
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
-endif
-
-
-# Subprojects
-.build-subprojects:
-
-
-# Subprojects
-.clean-subprojects:
-
-# Clean Targets
-.clean-conf: ${CLEAN_SUBPROJECTS}
-	${RM} -r build/default
-	${RM} -r dist/default
-
-# Enable dependency checking
-.dep.inc: .depcheck-impl
-
-DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
-ifneq (${DEPFILES},)
-include ${DEPFILES}
-endif
diff --git a/mplabx/cyassl.X/nbproject/Makefile-genesis.properties b/mplabx/cyassl.X/nbproject/Makefile-genesis.properties
deleted file mode 100644
index 354a175b5..000000000
--- a/mplabx/cyassl.X/nbproject/Makefile-genesis.properties
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-#Mon Nov 11 18:57:05 JST 2013
-default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
-default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30\\bin
-com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
-default.languagetoolchain.version=1.30
-host.platform=windows
-conf.ids=default
diff --git a/mplabx/cyassl.X/nbproject/Makefile-impl.mk b/mplabx/cyassl.X/nbproject/Makefile-impl.mk
deleted file mode 100644
index 6f20c0abd..000000000
--- a/mplabx/cyassl.X/nbproject/Makefile-impl.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a pre- and a post- target defined where you can add customization code.
-#
-# This makefile implements macros and targets common to all configurations.
-#
-# NOCDDL
-
-
-# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
-# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
-# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
-# and .clean-reqprojects-conf unless SUB has the value 'no'
-SUB_no=NO
-SUBPROJECTS=${SUB_${SUB}}
-BUILD_SUBPROJECTS_=.build-subprojects
-BUILD_SUBPROJECTS_NO=
-BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
-CLEAN_SUBPROJECTS_=.clean-subprojects
-CLEAN_SUBPROJECTS_NO=
-CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
-
-
-# Project Name
-PROJECTNAME=cyassl.X
-
-# Active Configuration
-DEFAULTCONF=default
-CONF=${DEFAULTCONF}
-
-# All Configurations
-ALLCONFS=default 
-
-
-# build
-.build-impl: .build-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
-
-
-# clean
-.clean-impl: .clean-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
-
-# clobber
-.clobber-impl: .clobber-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
-
-
-
-# all
-.all-impl: .all-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
-
-
-
-# dependency checking support
-.depcheck-impl:
-#	@echo "# This code depends on make tool being used" >.dep.inc
-#	@if [ -n "${MAKE_VERSION}" ]; then \
-#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
-#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
-#	    echo "include \$${DEPFILES}" >>.dep.inc; \
-#	    echo "endif" >>.dep.inc; \
-#	else \
-#	    echo ".KEEP_STATE:" >>.dep.inc; \
-#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
-#	fi
diff --git a/mplabx/cyassl.X/nbproject/Makefile-local-default.mk b/mplabx/cyassl.X/nbproject/Makefile-local-default.mk
deleted file mode 100644
index 3350f874d..000000000
--- a/mplabx/cyassl.X/nbproject/Makefile-local-default.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-#
-# This file contains information about the location of compilers and other tools.
-# If you commmit this file into your revision control server, you will be able to 
-# to checkout the project and build it from the command line with make. However,
-# if more than one person works on the same project, then this file might show
-# conflicts since different users are bound to have compilers in different places.
-# In that case you might choose to not commit this file and let MPLAB X recreate this file
-# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
-# least once so the file gets created and the project can be built. Finally, you can also
-# avoid using this file at all if you are only building from the command line with make.
-# You can invoke make with the values of the macros:
-# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
-#
-SHELL=cmd.exe
-PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
-# Adding MPLAB X bin directory to path.
-PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
-# Path to java used to run MPLAB X when this makefile was created
-MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
-OS_CURRENT="$(shell uname -s)"
-MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-gcc.exe"
-MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-g++.exe"
-# MP_BC is not defined
-MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-as.exe"
-MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ld.exe"
-MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ar.exe"
-DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
-MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
-MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
diff --git a/mplabx/cyassl.X/nbproject/Makefile-variables.mk b/mplabx/cyassl.X/nbproject/Makefile-variables.mk
deleted file mode 100644
index b480b107d..000000000
--- a/mplabx/cyassl.X/nbproject/Makefile-variables.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Generated - do not edit!
-#
-# NOCDDL
-#
-CND_BASEDIR=`pwd`
-# default configuration
-CND_ARTIFACT_DIR_default=dist/default/production
-CND_ARTIFACT_NAME_default=cyassl.X.a
-CND_ARTIFACT_PATH_default=dist/default/production/cyassl.X.a
-CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
-CND_PACKAGE_NAME_default=cyassl.X.tar
-CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/cyassl.X.tar
diff --git a/mplabx/cyassl.X/nbproject/configurations.xml b/mplabx/cyassl.X/nbproject/configurations.xml
index d65a4df0e..1482f8f65 100644
--- a/mplabx/cyassl.X/nbproject/configurations.xml
+++ b/mplabx/cyassl.X/nbproject/configurations.xml
@@ -67,10 +67,10 @@
     
       
         localhost
-        PIC32MZ2048ECM144
+        PIC32MX795F512L
         
         
-        PKOBSKDEPlatformTool
+        SKDEPIC32PlatformTool
         XC32
         1.30
         3
@@ -181,28 +181,9 @@
         
         
       
-      
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
+      
+        
+      
     
   
 
diff --git a/mplabx/cyassl.X/nbproject/private/private.xml b/mplabx/cyassl.X/nbproject/private/private.xml
deleted file mode 100644
index e39667075..000000000
--- a/mplabx/cyassl.X/nbproject/private/private.xml
+++ /dev/null
@@ -1,3 +0,0 @@
-
-    
-

From e28d25619767f3578625f553e2ee84c0e47b5646 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Fri, 31 Jan 2014 08:44:42 +0900
Subject: [PATCH 16/43] CyaSSL master, 2.8.6

---
 .gitignore                                    |    7 +
 IDE/IAR-EWARM/CyaSSL/HTTPS-main.h             |   34 +
 IDE/MDK5-ARM/Projects/CryptTest/test.c        |    6 +-
 IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c    |    8 +-
 IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c      |    6 +-
 Makefile.am                                   |    1 +
 README                                        |    9 +
 configure.ac                                  |  112 +-
 ctaocrypt/benchmark/benchmark.c               |   43 +-
 ctaocrypt/src/aes.c                           |  128 +-
 ctaocrypt/src/asm.c                           |   12 +-
 ctaocrypt/src/asn.c                           |  927 +++++--
 ctaocrypt/src/coding.c                        |  154 +-
 ctaocrypt/src/des3.c                          |  181 ++
 ctaocrypt/src/ecc.c                           |  337 ++-
 ctaocrypt/src/error.c                         |   20 +
 ctaocrypt/src/fp_sqr_comba_12.i               |    4 +-
 ctaocrypt/src/fp_sqr_comba_17.i               |    3 +
 ctaocrypt/src/fp_sqr_comba_3.i                |    3 +
 ctaocrypt/src/fp_sqr_comba_4.i                |    3 +
 ctaocrypt/src/fp_sqr_comba_6.i                |    3 +
 ctaocrypt/src/fp_sqr_comba_7.i                |    3 +
 ctaocrypt/src/fp_sqr_comba_8.i                |    3 +
 ctaocrypt/src/fp_sqr_comba_9.i                |    3 +
 ctaocrypt/src/integer.c                       |    2 +-
 ctaocrypt/src/md5.c                           |   24 +-
 ctaocrypt/src/pkcs7.c                         | 1348 +++++++++++
 ctaocrypt/src/sha.c                           |   45 +-
 ctaocrypt/src/sha256.c                        |   51 +-
 ctaocrypt/src/sha512.c                        |   26 +-
 ctaocrypt/test/test.c                         |  575 ++++-
 cyassl-ntru.vcproj                            |   20 +
 cyassl.vcproj                                 |   20 +
 cyassl/ctaocrypt/aes.h                        |    3 +
 cyassl/ctaocrypt/asn.h                        |   99 +-
 cyassl/ctaocrypt/asn_public.h                 |   27 +-
 cyassl/ctaocrypt/coding.h                     |    3 +
 cyassl/ctaocrypt/des3.h                       |    8 +-
 cyassl/ctaocrypt/ecc.h                        |   44 +-
 cyassl/ctaocrypt/error.h                      |    8 +
 cyassl/ctaocrypt/include.am                   |    1 +
 cyassl/ctaocrypt/integer.h                    |    5 +-
 cyassl/ctaocrypt/pkcs7.h                      |  123 +
 cyassl/ctaocrypt/settings.h                   |   54 +-
 cyassl/ctaocrypt/tfm.h                        |   68 +-
 cyassl/ctaocrypt/types.h                      |   20 +-
 cyassl/include.am                             |    5 +-
 cyassl/internal.h                             |  101 +-
 cyassl/internal.h.orig                        | 2121 +++++++++++++++++
 cyassl/ocsp.h                                 |    8 +-
 cyassl/ssl.h                                  |   66 +-
 cyassl/version.h                              |    4 +-
 examples/client/client.c                      |   15 +-
 examples/echoclient/echoclient.c              |    4 +-
 examples/echoserver/echoserver.c              |    4 +-
 examples/server/server.c                      |   23 +-
 m4/ax_debug.m4                                |    1 -
 m4/ax_tls.m4                                  |   76 +
 .../nbproject/configurations.xml              |   22 -
 .../nbproject/configurations.xml              |   22 -
 mcapi/ctaocrypt_test.X/nbproject/include.am   |    3 +-
 mcapi/cyassl.X/nbproject/include.am           |    1 -
 mcapi/include.am                              |    7 +-
 mcapi/mcapi_test.c                            |    6 +-
 .../nbproject/configurations.xml              |   27 +-
 .../nbproject/include.am                      |    3 +-
 .../nbproject/configurations.xml              |    5 +-
 mplabx/ctaocrypt_test.X/nbproject/include.am  |    3 +-
 mplabx/cyassl.X/nbproject/configurations.xml  |   29 +-
 mplabx/cyassl.X/nbproject/include.am          |    1 -
 mplabx/include.am                             |   10 +
 src/include.am                                |    4 +
 src/internal.c                                |  273 ++-
 src/io.c                                      |  129 +-
 src/ocsp.c                                    |  121 +-
 src/sniffer.c                                 |    7 +
 src/ssl.c                                     |  692 +++++-
 src/tls.c                                     |  146 +-
 sslSniffer/sslSnifferTest/include.am          |    2 +-
 sslSniffer/sslSnifferTest/snifftest.c         |   24 +-
 tests/api.c                                   |   88 +
 tests/unit.c                                  |    6 +-
 testsuite/testsuite.c                         |   23 +-
 83 files changed, 7807 insertions(+), 859 deletions(-)
 create mode 100644 IDE/IAR-EWARM/CyaSSL/HTTPS-main.h
 create mode 100644 ctaocrypt/src/pkcs7.c
 create mode 100644 cyassl/ctaocrypt/pkcs7.h
 create mode 100644 cyassl/internal.h.orig
 create mode 100644 m4/ax_tls.m4
 create mode 100644 mplabx/include.am

diff --git a/.gitignore b/.gitignore
index e4c4d2d48..ee2053048 100644
--- a/.gitignore
+++ b/.gitignore
@@ -46,10 +46,17 @@ testsuite/*.pem
 testsuite/*.raw
 cert.der
 cert.pem
+certecc.der
+certecc.pem
 othercert.der
 othercert.pem
 key.der
 key.pem
+certreq.der
+certreq.pem
+pkcs7cert.der
+pkcs7signedData.der
+pkcs7envelopedData.der
 diff
 sslSniffer/sslSnifferTest/tracefile.txt
 *.gz
diff --git a/IDE/IAR-EWARM/CyaSSL/HTTPS-main.h b/IDE/IAR-EWARM/CyaSSL/HTTPS-main.h
new file mode 100644
index 000000000..4cd54ab74
--- /dev/null
+++ b/IDE/IAR-EWARM/CyaSSL/HTTPS-main.h
@@ -0,0 +1,34 @@
+/* HTTPS-main.h
+ *
+ * Copyright (C) 2006-2014 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifndef __HTTPS_MAIN_H__
+#define __HTTPS_MAIN_H__
+
+extern CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_1 ;
+extern CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_2 ;
+extern CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_3 ;
+extern CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_4 ;
+extern CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_5 ;
+
+extern void HTTPS_Clinet_main_init(void) ;
+extern void HTTPS_Clinet_main(void) ;
+
+#endif
diff --git a/IDE/MDK5-ARM/Projects/CryptTest/test.c b/IDE/MDK5-ARM/Projects/CryptTest/test.c
index 7ba1b0b39..086032ab7 100644
--- a/IDE/MDK5-ARM/Projects/CryptTest/test.c
+++ b/IDE/MDK5-ARM/Projects/CryptTest/test.c
@@ -2779,7 +2779,8 @@ int rsa_test(void)
         if (certSz < 0)
             return -407;
 
-        certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng);
+        certSz = SignCert(myCert.bodySz, myCert.sigType, derCert, FOURK_BUF,
+                          &caKey, &rng);
         if (certSz < 0)
             return -408;
 
@@ -2891,7 +2892,8 @@ int rsa_test(void)
         if (certSz < 0)
             return -456;
 
-        certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng);
+        certSz = SignCert(myCert.bodySz, myCert.sigType, derCert, FOURK_BUF,
+                          &caKey, &rng);
         if (certSz < 0)
             return -457;
 
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c
index 8e155f30a..88a6064b4 100644
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c
@@ -347,6 +347,10 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
     usePsk = 1;
 #endif
 
+#ifdef OPENSSL_EXTRA
+    SSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack);
+#endif
+
     if (fewerPackets)
         CyaSSL_CTX_set_group_messages(ctx);
 
@@ -404,10 +408,6 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
     }
 #endif
 
-#ifdef OPENSSL_EXTRA
-    SSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack);
-#endif
-
 #if defined(CYASSL_SNIFFER) && !defined(HAVE_NTRU) && !defined(HAVE_ECC)
     /* don't use EDH, can't sniff tmp keys */
     if (cipherList == NULL) {
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c
index 6165cee31..22b4070eb 100644
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c
@@ -2550,7 +2550,8 @@ int rsa_test(void)
         if (certSz < 0)
             return -407;
 
-        certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng);
+        certSz = SignCert(myCert.bodySz, myCert.sigType, derCert, FOURK_BUF,
+                          &caKey, &rng);
         if (certSz < 0)
             return -408;
 
@@ -2662,7 +2663,8 @@ int rsa_test(void)
         if (certSz < 0)
             return -456;
 
-        certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng);
+        certSz = SignCert(myCert.bodySz, myCert.sigType, derCert, FOURK_BUF,
+                          &caKey, &rng);
         if (certSz < 0)
             return -457;
 
diff --git a/Makefile.am b/Makefile.am
index 651b60afb..02fea25cc 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -62,6 +62,7 @@ include mqx/ctaocrypt_test/Sources/include.am
 include mqx/cyassl/include.am
 include mqx/cyassl_client/Sources/include.am
 include mqx/util_lib/Sources/include.am
+include mplabx/include.am
 include mplabx/ctaocrypt_benchmark.X/nbproject/include.am
 include mplabx/ctaocrypt_test.X/nbproject/include.am
 include mplabx/cyassl.X/nbproject/include.am
diff --git a/README b/README
index 98a59480d..f0c02b584 100644
--- a/README
+++ b/README
@@ -37,10 +37,19 @@ before calling SSL_new();  Though it's not recommended.
 
 CyaSSL Release 2.9.0 (X/XX/XXXX)
 
+Release 2.9.0 CyaSSL has bug fixes and new features including:
+- Freescale Kinetis RNGB support
+- Freescale Kinetis mmCAU support
+
 The Freescale Kinetis K53 RNGB documentation can be found in Chapter 33 of the
 K53 Sub-Family Reference Manual:
 http://cache.freescale.com/files/32bit/doc/ref_manual/K53P144M100SF2RM.pdf
 
+Freescale Kinetis K60 mmCAU (AES, DES, 3DES, MD5, SHA, SHA256) documentation
+can be found in the "ColdFire/ColdFire+ CAU and Kinetis mmCAU Software Library
+User Guide":
+http://cache.freescale.com/files/32bit/doc/user_guide/CAUAPIUG.pdf
+
 
 *****************CyaSSL Release 2.8.0 (8/30/2013)
 
diff --git a/configure.ac b/configure.ac
index 55169de1b..eda0bd416 100644
--- a/configure.ac
+++ b/configure.ac
@@ -6,7 +6,7 @@
 #
 #
 
-AC_INIT([cyassl],[2.8.3],[https://github.com/cyassl/cyassl/issues],[cyassl],[http://www.yassl.com])
+AC_INIT([cyassl],[2.8.6],[https://github.com/cyassl/cyassl/issues],[cyassl],[http://www.yassl.com])
 
 AC_CONFIG_AUX_DIR([build-aux])
 
@@ -103,6 +103,8 @@ OPTIMIZE_FAST_CFLAGS="-O2 -fomit-frame-pointer"
 OPTIMIZE_HUGE_CFLAGS="-funroll-loops -DTFM_SMALL_SET -DTFM_HUGE_SET"
 DEBUG_CFLAGS="-g -DDEBUG -DDEBUG_CYASSL"
 
+# Thread local storage
+AX_TLS([AM_CFLAGS="$AM_CFLAGS -DHAVE_THREAD_LS"])
 
 # DEBUG
 AX_DEBUG
@@ -308,17 +310,20 @@ fi
 
 
 # SNIFFER
+ENABLED_SNIFFTEST=no
 AC_ARG_ENABLE([sniffer],
-              [AS_HELP_STRING([--enable-sniffer],[ Enable CyaSSL sniffer support (default: disabled) ])],[
-               AS_IF([ test "x$enableval" = "xyes" ],[ AC_CHECK_HEADERS([pcap/pcap.h],[ 
-                      ENABLED_SNIFFER=yes 
-                      AM_CFLAGS="$AM_CFLAGS -DCYASSL_SNIFFER -DOPENSSL_EXTRA"
-                      ],[ ENABLED_SNIFFER=no ]) ])
-               ],[
-                  ENABLED_SNIFFER=no
-                  ])
+   [AS_HELP_STRING([--enable-sniffer],[ Enable CyaSSL sniffer support (default: disabled) ])],[
+       ENABLED_SNIFFER=yes 
+       AM_CFLAGS="$AM_CFLAGS -DCYASSL_SNIFFER -DOPENSSL_EXTRA"
+       AS_IF([ test "x$enableval" = "xyes" ],[ AC_CHECK_HEADERS([pcap/pcap.h],[ 
+           ENABLED_SNIFFTEST=yes 
+   ],[ AC_MSG_WARN([cannot enable sniffer test without having libpcap available.]) ]) ])
+   ],[
+       ENABLED_SNIFFER=no
+   ])
 
-AM_CONDITIONAL([BUILD_SNIFFER], [ test "x$ENABLED_SNIFFER" = "xyes" ])
+AM_CONDITIONAL([BUILD_SNIFFER],   [ test "x$ENABLED_SNIFFER"   = "xyes" ])
+AM_CONDITIONAL([BUILD_SNIFFTEST], [ test "x$ENABLED_SNIFFTEST" = "xyes" ])
 
 # AES-GCM
 AC_ARG_ENABLE([aesgcm],
@@ -526,6 +531,23 @@ then
 fi
 
 
+# CERT REQUEST GENERATION
+AC_ARG_ENABLE([certreq],
+    [  --enable-certreq        Enable cert request generation (default: disabled)],
+    [ ENABLED_CERTREQ=$enableval ],
+    [ ENABLED_CERTREQ=no ]
+    )
+
+if test "$ENABLED_CERTREQ" = "yes"
+then
+    if test "$ENABLED_CERTGEN" = "no"
+    then
+        AC_MSG_ERROR([cannot enable certreq without enabling certgen.])
+    fi
+    AM_CFLAGS="$AM_CFLAGS -DCYASSL_CERT_REQ"
+fi
+
+
 # SEP
 AC_ARG_ENABLE([sep],
     [  --enable-sep            Enable sep extensions (default: disabled)],
@@ -1178,6 +1200,18 @@ then
     AM_CFLAGS="$AM_CFLAGS -DHAVE_TLS_EXTENSIONS -DHAVE_TRUNCATED_HMAC"
 fi
 
+# Renegotiation Indication
+AC_ARG_ENABLE([renegotiation-indication],
+    [  --enable-renegotiation-indication  Enable Renegotiation Indication (default: disabled)],
+    [ ENABLED_RENEGOTIATION_INDICATION=$enableval ],
+    [ ENABLED_RENEGOTIATION_INDICATION=no ]
+    )
+
+if test "x$ENABLED_RENEGOTIATION_INDICATION" = "xyes"
+then
+    AM_CFLAGS="$AM_CFLAGS -DHAVE_TLS_EXTENSIONS -DHAVE_RENEGOTIATION_INDICATION"
+fi
+
 # TLS Extensions
 AC_ARG_ENABLE([tlsx],
     [  --enable-tlsx           Enable all TLS Extensions (default: disabled)],
@@ -1189,9 +1223,60 @@ if test "x$ENABLED_TLSX" = "xyes"
 then
 	ENABLED_SNI=yes
 	ENABLED_MAX_FRAGMENT=yes
-    AM_CFLAGS="$AM_CFLAGS -DHAVE_TLS_EXTENSIONS -DHAVE_SNI -DHAVE_MAX_FRAGMENT"
+	ENABLED_TRUNCATED_HMAC=yes
+	ENABLED_RENEGOTIATION_INDICATION=yes
+    AM_CFLAGS="$AM_CFLAGS -DHAVE_TLS_EXTENSIONS -DHAVE_SNI -DHAVE_MAX_FRAGMENT -DHAVE_TRUNCATED_HMAC -DHAVE_RENEGOTIATION_INDICATION"
 fi
 
+# PKCS7
+AC_ARG_ENABLE([pkcs7],
+    [  --enable-pkcs7          Enable PKCS7 (default: disabled)],
+    [ ENABLED_PKCS7=$enableval ],
+    [ ENABLED_PKCS7=no ],
+    )
+
+if test "$ENABLED_PKCS7" = "yes"
+then
+    AM_CFLAGS="$AM_CFLAGS -DHAVE_PKCS7"
+fi
+
+AM_CONDITIONAL([BUILD_PKCS7], [test "x$ENABLED_PKCS7" = "xyes"])
+
+
+# Simple Certificate Enrollment Protocol (SCEP)
+AC_ARG_ENABLE([scep],
+    [  --enable-scep           Enable wolfSCEP (default: disabled)],
+    [ ENABLED_WOLFSCEP=$enableval ],
+    [ ENABLED_WOLFSCEP=no ]
+    )
+if test "$ENABLED_WOLFSCEP" = "yes"
+then
+    # Enable prereqs if not already enabled
+    if test "x$ENABLED_KEYGEN" = "xno"
+    then
+        ENABLED_KEYGEN="yes"
+        AM_CFLAGS="$AM_CFLAGS -DCYASSL_KEY_GEN"
+    fi
+    if test "x$ENABLED_CERTGEN" = "xno"
+    then
+        ENABLED_CERTGEN="yes"
+        AM_CFLAGS="$AM_CFLAGS -DCYASSL_CERT_GEN"
+    fi
+    if test "x$ENABLED_CERTREQ" = "xno"
+    then
+        ENABLED_CERTREQ="yes"
+        AM_CFLAGS="$AM_CFLAGS -DCYASSL_CERT_REQ"
+    fi
+    if test "x$ENABLED_PKCS7" = "xno"
+    then
+        ENABLED_PKCS7="yes"
+        AM_CFLAGS="$AM_CFLAGS -DHAVE_PKCS7"
+        AM_CONDITIONAL([BUILD_PKCS7], [test "x$ENABLED_PKCS7" = "xyes"])
+    fi
+    AM_CFLAGS="$AM_CFLAGS -DCYASSL_HAVE_WOLFSCEP"
+fi
+
+
 #valgrind
 AC_ARG_ENABLE([valgrind],
     [  --enable-valgrind       Enable valgrind for unit tests (default: disabled)],
@@ -1529,6 +1614,7 @@ echo "   * Filesystem:                $ENABLED_FILESYSTEM"
 echo "   * OpenSSL Extra API:         $ENABLED_OPENSSLEXTRA"
 echo "   * fastmath:                  $ENABLED_FASTMATH"
 echo "   * sniffer:                   $ENABLED_SNIFFER"
+echo "   * snifftest:                 $ENABLED_SNIFFTEST"
 echo "   * ARC4:                      $ENABLED_ARC4"
 echo "   * AES:                       $ENABLED_AES"
 echo "   * AES-NI:                    $ENABLED_AESNI"
@@ -1544,6 +1630,7 @@ echo "   * SHA-512:                   $ENABLED_SHA512"
 echo "   * BLAKE2:                    $ENABLED_BLAKE2"
 echo "   * keygen:                    $ENABLED_KEYGEN"
 echo "   * certgen:                   $ENABLED_CERTGEN"
+echo "   * certreq:                   $ENABLED_CERTREQ"
 echo "   * HC-128:                    $ENABLED_HC128"
 echo "   * RABBIT:                    $ENABLED_RABBIT"
 echo "   * PWDBASED:                  $ENABLED_PWDBASED"
@@ -1574,7 +1661,10 @@ echo "   * NTRU:                      $ENABLED_NTRU"
 echo "   * SNI:                       $ENABLED_SNI"
 echo "   * Maximum Fragment Length:   $ENABLED_MAX_FRAGMENT"
 echo "   * Truncated HMAC:            $ENABLED_TRUNCATED_HMAC"
+echo "   * Renegotiation Indication:  $ENABLED_RENEGOTIATION_INDICATION"
 echo "   * All TLS Extensions:        $ENABLED_TLSX"
+echo "   * PKCS#7                     $ENABLED_PKCS7"
+echo "   * wolfSCEP                   $ENABLED_WOLFSCEP"
 echo "   * valgrind unit tests:       $ENABLED_VALGRIND"
 echo "   * LIBZ:                      $ENABLED_LIBZ"
 echo "   * Examples:                  $ENABLED_EXAMPLES"
diff --git a/ctaocrypt/benchmark/benchmark.c b/ctaocrypt/benchmark/benchmark.c
index f1264a7c7..2086aaf10 100644
--- a/ctaocrypt/benchmark/benchmark.c
+++ b/ctaocrypt/benchmark/benchmark.c
@@ -221,13 +221,13 @@ int benchmark_test(void *args)
 #ifdef BENCH_EMBEDDED
 const int numBlocks = 25;       /* how many kB/megs to test (en/de)cryption */
 const char blockType[] = "kB";  /* used in printf output */
-const int times      = 1;        /* public key iterations */
+const int ntimes      = 1;        /* public key iterations */
 const int genTimes   = 5;
 const int agreeTimes = 5;
 #else
 const int numBlocks = 5;
 const char blockType[] = "megs";
-const int times      = 100;
+const int ntimes      = 100;
 const int genTimes   = 100;
 const int agreeTimes = 100;
 #endif
@@ -742,15 +742,15 @@ void bench_rsa(void)
     
     start = current_time(1);
 
-    for (i = 0; i < times; i++)
+    for (i = 0; i < ntimes; i++)
         ret = RsaPublicEncrypt(message,len,enc,sizeof(enc), &rsaKey, &rng);
 
     total = current_time(0) - start;
-    each  = total / times;   /* per second   */
+    each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
     printf("RSA %d encryption took %6.2f milliseconds, avg over %d" 
-           " iterations\n", rsaKeySz, milliEach, times);
+           " iterations\n", rsaKeySz, milliEach, ntimes);
 
     if (ret < 0) {
         printf("Rsa Public Encrypt failed\n");
@@ -759,17 +759,17 @@ void bench_rsa(void)
 
     start = current_time(1);
 
-    for (i = 0; i < times; i++) {
+    for (i = 0; i < ntimes; i++) {
          byte  out[512];  /* for up to 4096 bit */
          RsaPrivateDecrypt(enc, (word32)ret, out, sizeof(out), &rsaKey);
     }
 
     total = current_time(0) - start;
-    each  = total / times;   /* per second   */
+    each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
     printf("RSA %d decryption took %6.2f milliseconds, avg over %d" 
-           " iterations\n", rsaKeySz, milliEach, times);
+           " iterations\n", rsaKeySz, milliEach, ntimes);
 
     FreeRsaKey(&rsaKey);
 #ifdef HAVE_CAVIUM
@@ -847,28 +847,28 @@ void bench_dh(void)
 
     start = current_time(1);
 
-    for (i = 0; i < times; i++)
+    for (i = 0; i < ntimes; i++)
         DhGenerateKeyPair(&dhKey, &rng, priv, &privSz, pub, &pubSz);
 
     total = current_time(0) - start;
-    each  = total / times;   /* per second   */
+    each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
     printf("DH  %d key generation  %6.2f milliseconds, avg over %d" 
-           " iterations\n", dhKeySz, milliEach, times);
+           " iterations\n", dhKeySz, milliEach, ntimes);
 
     DhGenerateKeyPair(&dhKey, &rng, priv2, &privSz2, pub2, &pubSz2);
     start = current_time(1);
 
-    for (i = 0; i < times; i++)
+    for (i = 0; i < ntimes; i++)
         DhAgree(&dhKey, agree, &agreeSz, priv, privSz, pub2, pubSz2);
 
     total = current_time(0) - start;
-    each  = total / times;   /* per second   */
+    each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
     printf("DH  %d key agreement   %6.2f milliseconds, avg over %d" 
-           " iterations\n", dhKeySz, milliEach, times);
+           " iterations\n", dhKeySz, milliEach, ntimes);
 
 #if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048)
     fclose(file);
@@ -1087,7 +1087,22 @@ void bench_eccKeyAgree(void)
     }
 
 #elif defined CYASSL_MDK_ARM
+
     extern double current_time(int reset) ;
+
+#elif defined FREERTOS
+
+    double current_time(int reset)
+    {
+        (void) reset;
+
+        portTickType tickCount;
+
+        /* tick count == ms, if configTICK_RATE_HZ is set to 1000 */
+        tickCount = xTaskGetTickCount();
+        return (double)tickCount / 1000;
+    }
+
 #else
 
     #include 
diff --git a/ctaocrypt/src/aes.c b/ctaocrypt/src/aes.c
index 8f5e357d7..4cb723d31 100644
--- a/ctaocrypt/src/aes.c
+++ b/ctaocrypt/src/aes.c
@@ -62,8 +62,8 @@
      * document (See note in README).
      */
     #include "stm32f2xx.h"
-		#include "stm32f2xx_cryp.h"
-		
+    #include "stm32f2xx_cryp.h"
+
     int AesSetKey(Aes* aes, const byte* userKey, word32 keylen, const byte* iv,
                   int dir)
     {
@@ -553,6 +553,96 @@ int AesSetKey(Aes* aes, const byte* userKey, word32 keylen, const byte* iv,
     return 0;
 }
 
+#elif defined FREESCALE_MMCAU
+    /*
+     * Freescale mmCAU hardware AES support through the CAU/mmCAU library.
+     * Documentation located in ColdFire/ColdFire+ CAU and Kinetis mmCAU
+     * Software Library User Guide (See note in README).
+     */
+    #include "cau_api.h"
+
+    int AesSetKey(Aes* aes, const byte* userKey, word32 keylen, const byte* iv,
+                  int dir)
+    {
+        byte *rk = (byte*)aes->key;
+
+        if (!((keylen == 16) || (keylen == 24) || (keylen == 32)))
+            return BAD_FUNC_ARG;
+
+        if (rk == NULL)
+            return BAD_FUNC_ARG;
+
+        aes->rounds = keylen/4 + 6;
+        cau_aes_set_key(userKey, keylen*8, rk);
+
+        return AesSetIV(aes, iv);
+    }
+
+    int AesCbcEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
+    {
+        int i;
+        int offset = 0;
+        int len = sz;
+
+        byte *iv, *enc_key;
+        byte temp_block[AES_BLOCK_SIZE];
+
+        iv      = (byte*)aes->reg;
+        enc_key = (byte*)aes->key;
+
+        while (len > 0)
+        {
+            XMEMCPY(temp_block, in + offset, AES_BLOCK_SIZE);
+
+            /* XOR block with IV for CBC */
+            for (i = 0; i < AES_BLOCK_SIZE; i++)
+                temp_block[i] ^= iv[i];
+
+            cau_aes_encrypt(temp_block, enc_key, aes->rounds, out + offset);
+
+            len    -= AES_BLOCK_SIZE;
+            offset += AES_BLOCK_SIZE;
+
+            /* store IV for next block */
+            XMEMCPY(iv, out + offset - AES_BLOCK_SIZE, AES_BLOCK_SIZE);
+        }
+
+        return 0;
+    }
+
+    int AesCbcDecrypt(Aes* aes, byte* out, const byte* in, word32 sz)
+    {
+        int i;
+        int offset = 0;
+        int len = sz;
+
+        byte* iv, *dec_key;
+        byte temp_block[AES_BLOCK_SIZE];
+
+        iv      = (byte*)aes->reg;
+        dec_key = (byte*)aes->key;
+
+        while (len > 0)
+        {
+            XMEMCPY(temp_block, in + offset, AES_BLOCK_SIZE);
+
+            cau_aes_decrypt(in + offset, dec_key, aes->rounds, out + offset);
+
+            /* XOR block with IV for CBC */
+            for (i = 0; i < AES_BLOCK_SIZE; i++)
+                (out + offset)[i] ^= iv[i];
+
+            /* store IV for next block */
+            XMEMCPY(iv, temp_block, AES_BLOCK_SIZE);
+
+            len    -= AES_BLOCK_SIZE;
+            offset += AES_BLOCK_SIZE;
+        }
+
+        return 0;
+    }
+
+
 #else /* CTaoCrypt software implementation */
 
 static const word32 rcon[] = {
@@ -1386,6 +1476,10 @@ static int AesSetKeyLocal(Aes* aes, const byte* userKey, word32 keylen,
     #ifdef CYASSL_AESNI
         aes->use_aesni = 0;
     #endif /* CYASSL_AESNI */
+    #ifdef CYASSL_AES_COUNTER
+        aes->left = 0;
+    #endif /* CYASSL_AES_COUNTER */
+
     aes->rounds = keylen/4 + 6;
 
     XMEMCPY(rk, userKey, keylen);
@@ -2039,15 +2133,39 @@ static INLINE void IncrementAesCounter(byte* inOutCtr)
 
 void AesCtrEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
 {
-    word32 blocks = sz / AES_BLOCK_SIZE;
+    byte* tmp = (byte*)aes->tmp + AES_BLOCK_SIZE - aes->left;
 
-    while (blocks--) {
+    /* consume any unused bytes left in aes->tmp */
+    while (aes->left && sz) {
+       *(out++) = *(in++) ^ *(tmp++);
+       aes->left--;
+       sz--;
+    }
+
+    /* do as many block size ops as possible */
+    while (sz >= AES_BLOCK_SIZE) {
         AesEncrypt(aes, (byte*)aes->reg, out);
         IncrementAesCounter((byte*)aes->reg);
         xorbuf(out, in, AES_BLOCK_SIZE);
 
         out += AES_BLOCK_SIZE;
-        in  += AES_BLOCK_SIZE; 
+        in  += AES_BLOCK_SIZE;
+        sz  -= AES_BLOCK_SIZE;
+        aes->left = 0;
+    }
+
+    /* handle non block size remaining and sotre unused byte count in left */
+    if (sz) {
+        AesEncrypt(aes, (byte*)aes->reg, (byte*)aes->tmp);
+        IncrementAesCounter((byte*)aes->reg);
+
+        aes->left = AES_BLOCK_SIZE;
+        tmp = (byte*)aes->tmp;
+
+        while (sz--) {
+            *(out++) = *(in++) ^ *(tmp++);
+            aes->left--;
+        }
     }
 }
 
diff --git a/ctaocrypt/src/asm.c b/ctaocrypt/src/asm.c
index e19410e8a..941478a42 100644
--- a/ctaocrypt/src/asm.c
+++ b/ctaocrypt/src/asm.c
@@ -1004,15 +1004,17 @@ __asm__(                              \
 
 #define SQRADDAC(i, j)                                                         \
    do { fp_word t;                                                             \
-   t = sc0 + ((fp_word)i) * ((fp_word)j);  sc0 = t;                            \
-   t = sc1 + (t >> DIGIT_BIT);             sc1 = t; sc2 += t >> DIGIT_BIT;     \
+   t = sc0 + ((fp_word)i) * ((fp_word)j);  sc0 =  (fp_digit)t;                 \
+   t = sc1 + (t >> DIGIT_BIT);             sc1 =  (fp_digit)t;                 \
+                                           sc2 += (fp_digit)(t >> DIGIT_BIT);  \
    } while (0);
 
 #define SQRADDDB                                                               \
    do { fp_word t;                                                             \
-   t = ((fp_word)sc0) + ((fp_word)sc0) + c0; c0 = t;                                                 \
-   t = ((fp_word)sc1) + ((fp_word)sc1) + c1 + (t >> DIGIT_BIT); c1 = t;                              \
-   c2 = c2 + ((fp_word)sc2) + ((fp_word)sc2) + (t >> DIGIT_BIT);                                     \
+   t = ((fp_word)sc0) + ((fp_word)sc0) + c0; c0 = (fp_digit)t;                 \
+   t = ((fp_word)sc1) + ((fp_word)sc1) + c1 + (t >> DIGIT_BIT);                \
+                                             c1 = (fp_digit)t;                 \
+   c2 = c2 + (fp_digit)(((fp_word)sc2) + ((fp_word)sc2) + (t >> DIGIT_BIT));   \
    } while (0);
 
 #endif
diff --git a/ctaocrypt/src/asn.c b/ctaocrypt/src/asn.c
index 65ff0a660..d1c82f8e1 100644
--- a/ctaocrypt/src/asn.c
+++ b/ctaocrypt/src/asn.c
@@ -398,8 +398,8 @@ CPU_INT32S NetSecure_ValidateDateHandler(CPU_INT08U *date, CPU_INT08U format,
 #endif /* MICRIUM */
 
 
-static int GetLength(const byte* input, word32* inOutIdx, int* len,
-                     word32 maxIdx)
+CYASSL_LOCAL int GetLength(const byte* input, word32* inOutIdx, int* len,
+                           word32 maxIdx)
 {
     int     length = 0;
     word32  i = *inOutIdx;
@@ -439,8 +439,8 @@ static int GetLength(const byte* input, word32* inOutIdx, int* len,
 }
 
 
-static int GetSequence(const byte* input, word32* inOutIdx, int* len,
-                       word32 maxIdx)
+CYASSL_LOCAL int GetSequence(const byte* input, word32* inOutIdx, int* len,
+                           word32 maxIdx)
 {
     int    length = -1;
     word32 idx    = *inOutIdx;
@@ -456,7 +456,8 @@ static int GetSequence(const byte* input, word32* inOutIdx, int* len,
 }
 
 
-static int GetSet(const byte* input, word32* inOutIdx, int* len, word32 maxIdx)
+CYASSL_LOCAL int GetSet(const byte* input, word32* inOutIdx, int* len,
+                        word32 maxIdx)
 {
     int    length = -1;
     word32 idx    = *inOutIdx;
@@ -473,7 +474,7 @@ static int GetSet(const byte* input, word32* inOutIdx, int* len, word32 maxIdx)
 
 
 /* winodws header clash for WinCE using GetVersion */
-static int GetMyVersion(const byte* input, word32* inOutIdx, int* version)
+CYASSL_LOCAL int GetMyVersion(const byte* input, word32* inOutIdx, int* version)
 {
     word32 idx = *inOutIdx;
 
@@ -537,7 +538,7 @@ static int GetExplicitVersion(const byte* input, word32* inOutIdx, int* version)
 }
 
 
-static int GetInt(mp_int* mpi, const byte* input, word32* inOutIdx,
+CYASSL_LOCAL int GetInt(mp_int* mpi, const byte* input, word32* inOutIdx,
                   word32 maxIdx)
 {
     word32 i = *inOutIdx;
@@ -593,7 +594,7 @@ static int GetObjectId(const byte* input, word32* inOutIdx, word32* oid,
 }
 
 
-static int GetAlgoId(const byte* input, word32* inOutIdx, word32* oid,
+CYASSL_LOCAL int GetAlgoId(const byte* input, word32* inOutIdx, word32* oid,
                      word32 maxIdx)
 {
     int    length;
@@ -764,7 +765,7 @@ int ToTraditional(byte* input, word32 sz)
     
     XMEMMOVE(input, input + inOutIdx, length);
 
-    return 0;
+    return length;
 }
 
 
@@ -1280,6 +1281,10 @@ void InitDecodedCert(DecodedCert* cert, byte* source, word32 inSz, void* heap)
     XMEMSET(cert->extAuthKeyId, 0, SHA_SIZE);
     cert->extAuthKeyIdSet = 0;
     cert->isCA            = 0;
+#ifdef HAVE_PKCS7
+    cert->issuerRaw       = NULL;
+    cert->issuerRawLen    = 0;
+#endif
 #ifdef CYASSL_CERT_GEN
     cert->subjectSN       = 0;
     cert->subjectSNLen    = 0;
@@ -1303,6 +1308,24 @@ void InitDecodedCert(DecodedCert* cert, byte* source, word32 inSz, void* heap)
 #ifdef OPENSSL_EXTRA
     XMEMSET(&cert->issuerName, 0, sizeof(DecodedName));
     XMEMSET(&cert->subjectName, 0, sizeof(DecodedName));
+    cert->extBasicConstSet = 0;
+    cert->extBasicConstCrit = 0;
+    cert->extBasicConstPlSet = 0;
+    cert->pathLength = 0;
+    cert->extSubjAltNameSet = 0;
+    cert->extSubjAltNameCrit = 0;
+    cert->extAuthKeyIdCrit = 0;
+    cert->extSubjKeyIdCrit = 0;
+    cert->extKeyUsageSet = 0;
+    cert->extKeyUsageCrit = 0;
+    cert->extKeyUsage = 0;
+    cert->extAuthKeyIdSrc = NULL;
+    cert->extAuthKeyIdSz = 0;
+    cert->extSubjKeyIdSrc = NULL;
+    cert->extSubjKeyIdSz = 0;
+    #ifdef HAVE_ECC
+        cert->pkCurveOID = 0;
+    #endif /* HAVE_ECC */
 #endif /* OPENSSL_EXTRA */
 #ifdef CYASSL_SEP
     cert->deviceTypeSz = 0;
@@ -1311,6 +1334,10 @@ void InitDecodedCert(DecodedCert* cert, byte* source, word32 inSz, void* heap)
     cert->hwType = NULL;
     cert->hwSerialNumSz = 0;
     cert->hwSerialNum = NULL;
+    #ifdef OPENSSL_EXTRA
+        cert->extCertPolicySet = 0;
+        cert->extCertPolicyCrit = 0;
+    #endif /* OPENSSL_EXTRA */
 #endif /* CYASSL_SEP */
 }
 
@@ -1434,7 +1461,7 @@ static int GetKey(DecodedCert* cert)
 
     if (GetSequence(cert->source, &cert->srcIdx, &length, cert->maxIdx) < 0)
         return ASN_PARSE_E;
-    
+   
     if (GetAlgoId(cert->source, &cert->srcIdx, &cert->keyOID, cert->maxIdx) < 0)
         return ASN_PARSE_E;
 
@@ -1509,6 +1536,9 @@ static int GetKey(DecodedCert* cert)
                 oid += cert->source[cert->srcIdx++];
             if (CheckCurve(oid) < 0)
                 return ECC_CURVE_OID_E;
+            #ifdef OPENSSL_EXTRA
+                cert->pkCurveOID = oid;
+            #endif /* OPENSSL_EXTRA */
 
             /* key header */
             b = cert->source[cert->srcIdx++];
@@ -1586,6 +1616,14 @@ static int GetName(DecodedCert* cert, int nameType)
     length += cert->srcIdx;
     idx = 0;
 
+#ifdef HAVE_PKCS7
+    /* store pointer to raw issuer */
+    if (nameType == ISSUER) {
+        cert->issuerRaw = &cert->source[cert->srcIdx];
+        cert->issuerRawLen = length - cert->srcIdx;
+    }
+#endif
+
     while (cert->srcIdx < (word32)length) {
         byte   b;
         byte   joint[2];
@@ -2128,10 +2166,14 @@ int DecodeToKey(DecodedCert* cert, int verify)
     if ( (ret = GetCertHeader(cert)) < 0)
         return ret;
 
+    CYASSL_MSG("Got Cert Header");
+
     if ( (ret = GetAlgoId(cert->source, &cert->srcIdx, &cert->signatureOID,
                           cert->maxIdx)) < 0)
         return ret;
 
+    CYASSL_MSG("Got Algo ID");
+
     if ( (ret = GetName(cert, ISSUER)) < 0)
         return ret;
 
@@ -2141,9 +2183,13 @@ int DecodeToKey(DecodedCert* cert, int verify)
     if ( (ret = GetName(cert, SUBJECT)) < 0)
         return ret;
 
+    CYASSL_MSG("Got Subject Name");
+
     if ( (ret = GetKey(cert)) < 0)
         return ret;
 
+    CYASSL_MSG("Got Key");
+
     if (badDate != 0)
         return badDate;
 
@@ -2197,7 +2243,7 @@ static word32 BytePrecision(word32 value)
 }
 
 
-static word32 SetLength(word32 length, byte* output)
+CYASSL_LOCAL word32 SetLength(word32 length, byte* output)
 {
     word32 i = 0, j;
 
@@ -2216,14 +2262,114 @@ static word32 SetLength(word32 length, byte* output)
 }
 
 
-static word32 SetSequence(word32 len, byte* output)
+CYASSL_LOCAL word32 SetSequence(word32 len, byte* output)
 {
     output[0] = ASN_SEQUENCE | ASN_CONSTRUCTED;
     return SetLength(len, output + 1) + 1;
 }
 
+CYASSL_LOCAL word32 SetOctetString(word32 len, byte* output)
+{
+    output[0] = ASN_OCTET_STRING;
+    return SetLength(len, output + 1) + 1;
+}
 
-static word32 SetAlgoID(int algoOID, byte* output, int type)
+/* Write a set header to output */
+CYASSL_LOCAL word32 SetSet(word32 len, byte* output)
+{
+    output[0] = ASN_SET | ASN_CONSTRUCTED;
+    return SetLength(len, output + 1) + 1;
+}
+
+CYASSL_LOCAL word32 SetImplicit(byte tag, byte number, word32 len, byte* output)
+{
+
+    output[0] = ((tag == ASN_SEQUENCE || tag == ASN_SET) ? ASN_CONSTRUCTED : 0)
+                    | ASN_CONTEXT_SPECIFIC | number;
+    return SetLength(len, output + 1) + 1;
+}
+
+CYASSL_LOCAL word32 SetExplicit(byte number, word32 len, byte* output)
+{
+    output[0] = ASN_CONSTRUCTED | ASN_CONTEXT_SPECIFIC | number;
+    return SetLength(len, output + 1) + 1;
+}
+
+
+#if defined(HAVE_ECC) && defined(CYASSL_CERT_GEN)
+
+static word32 SetCurve(ecc_key* key, byte* output)
+{
+
+    /* curve types */
+    static const byte ECC_192v1_AlgoID[] = { 0x2a, 0x86, 0x48, 0xCE, 0x3d,
+                                             0x03, 0x01, 0x01};
+    static const byte ECC_256v1_AlgoID[] = { 0x2a, 0x86, 0x48, 0xCE, 0x3d,
+                                            0x03, 0x01, 0x07};
+    static const byte ECC_160r1_AlgoID[] = { 0x2b, 0x81, 0x04, 0x00,
+                                             0x02};
+    static const byte ECC_224r1_AlgoID[] = { 0x2b, 0x81, 0x04, 0x00,
+                                             0x21};
+    static const byte ECC_384r1_AlgoID[] = { 0x2b, 0x81, 0x04, 0x00,
+                                             0x22};
+    static const byte ECC_521r1_AlgoID[] = { 0x2b, 0x81, 0x04, 0x00,
+                                             0x23};
+
+    int    oidSz = 0;
+    int    idx = 0;
+    int    lenSz = 0;
+    const  byte* oid = 0;
+
+    output[0] = ASN_OBJECT_ID;
+    idx++;
+
+    switch (key->dp->size) {
+        case 20:
+            oidSz = sizeof(ECC_160r1_AlgoID);
+            oid   =        ECC_160r1_AlgoID;
+            break;
+
+        case 24:
+            oidSz = sizeof(ECC_192v1_AlgoID);
+            oid   =        ECC_192v1_AlgoID;
+            break;
+
+        case 28:
+            oidSz = sizeof(ECC_224r1_AlgoID);
+            oid   =        ECC_224r1_AlgoID;
+            break;
+
+        case 32:
+            oidSz = sizeof(ECC_256v1_AlgoID);
+            oid   =        ECC_256v1_AlgoID;
+            break;
+
+        case 48:
+            oidSz = sizeof(ECC_384r1_AlgoID);
+            oid   =        ECC_384r1_AlgoID;
+            break;
+
+        case 66:
+            oidSz = sizeof(ECC_521r1_AlgoID);
+            oid   =        ECC_521r1_AlgoID;
+            break;
+
+        default:
+            return ASN_UNKNOWN_OID_E;
+    }
+    lenSz = SetLength(oidSz, output+idx);
+    idx += lenSz;
+
+    XMEMCPY(output+idx, oid, oidSz);
+    idx += oidSz;
+
+    return idx;
+}
+
+#endif /* HAVE_ECC && CYASSL_CERT_GEN */
+
+
+CYASSL_LOCAL word32 SetAlgoID(int algoOID, byte* output, int type, int curveSz)
 {
     /* adding TAG_NULL and 0 to end */
     
@@ -2241,7 +2387,12 @@ static word32 SetAlgoID(int algoOID, byte* output, int type)
     static const byte md2AlgoID[]    = { 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d,
                                          0x02, 0x02, 0x05, 0x00};
 
-    /* sigTypes */
+    /* blkTypes, no NULL tags because IV is there instead */
+    static const byte desCbcAlgoID[]  = { 0x2B, 0x0E, 0x03, 0x02, 0x07 };
+    static const byte des3CbcAlgoID[] = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                          0x0D, 0x03, 0x07 };
+
+    /* RSA sigTypes */
     #ifndef NO_RSA
         static const byte md5wRSA_AlgoID[] = { 0x2a, 0x86, 0x48, 0x86, 0xf7,
                                             0x0d, 0x01, 0x01, 0x04, 0x05, 0x00};
@@ -2255,13 +2406,33 @@ static word32 SetAlgoID(int algoOID, byte* output, int type)
                                             0x0d, 0x01, 0x01, 0x0d, 0x05, 0x00};
     #endif /* NO_RSA */
  
-    /* keyTypes */
+    /* ECDSA sigTypes */
+    #ifdef HAVE_ECC 
+        static const byte shawECDSA_AlgoID[] = { 0x2a, 0x86, 0x48, 0xCE, 0x3d,
+                                                 0x04, 0x01, 0x05, 0x00};
+        static const byte sha256wECDSA_AlgoID[] = { 0x2a, 0x86, 0x48, 0xCE,0x3d,
+                                                 0x04, 0x03, 0x02, 0x05, 0x00};
+        static const byte sha384wECDSA_AlgoID[] = { 0x2a, 0x86, 0x48, 0xCE,0x3d,
+                                                 0x04, 0x03, 0x03, 0x05, 0x00};
+        static const byte sha512wECDSA_AlgoID[] = { 0x2a, 0x86, 0x48, 0xCE,0x3d,
+                                                 0x04, 0x03, 0x04, 0x05, 0x00};
+    #endif /* HAVE_ECC */
+ 
+    /* RSA keyType */
     #ifndef NO_RSA
         static const byte RSA_AlgoID[] = { 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d,
                                             0x01, 0x01, 0x01, 0x05, 0x00};
     #endif /* NO_RSA */
 
+    #ifdef HAVE_ECC 
+        /* ECC keyType */
+        /* no tags, so set tagSz smaller later */
+        static const byte ECC_AlgoID[] = { 0x2a, 0x86, 0x48, 0xCE, 0x3d,
+                                           0x02, 0x01};
+    #endif /* HAVE_ECC */
+
     int    algoSz = 0;
+    int    tagSz  = 2;   /* tag null and terminator */
     word32 idSz, seqSz;
     const  byte* algoName = 0;
     byte ID_Length[MAX_LENGTH_SZ];
@@ -2304,6 +2475,23 @@ static word32 SetAlgoID(int algoOID, byte* output, int type)
             return 0;  /* UNKOWN_HASH_E; */
         }
     }
+    else if (type == blkType) {
+        switch (algoOID) {
+        case DESb:
+            algoSz = sizeof(desCbcAlgoID);
+            algoName = desCbcAlgoID;
+            tagSz = 0;
+            break;
+        case DES3b:
+            algoSz = sizeof(des3CbcAlgoID);
+            algoName = des3CbcAlgoID;
+            tagSz = 0;
+            break;
+        default:
+            CYASSL_MSG("Unknown Block Algo");
+            return 0;
+        }
+    }
     else if (type == sigType) {    /* sigType */
         switch (algoOID) {
         #ifndef NO_RSA
@@ -2332,6 +2520,27 @@ static word32 SetAlgoID(int algoOID, byte* output, int type)
                 algoName = sha512wRSA_AlgoID;
                 break;
         #endif /* NO_RSA */
+        #ifdef HAVE_ECC 
+            case CTC_SHAwECDSA:
+                algoSz = sizeof(shawECDSA_AlgoID);
+                algoName = shawECDSA_AlgoID;
+                break;
+
+            case CTC_SHA256wECDSA:
+                algoSz = sizeof(sha256wECDSA_AlgoID);
+                algoName = sha256wECDSA_AlgoID;
+                break;
+
+            case CTC_SHA384wECDSA:
+                algoSz = sizeof(sha384wECDSA_AlgoID);
+                algoName = sha384wECDSA_AlgoID;
+                break;
+
+            case CTC_SHA512wECDSA:
+                algoSz = sizeof(sha512wECDSA_AlgoID);
+                algoName = sha512wECDSA_AlgoID;
+                break;
+        #endif /* HAVE_ECC */
         default:
             CYASSL_MSG("Unknown Signature Algo");
             return 0;
@@ -2345,6 +2554,13 @@ static word32 SetAlgoID(int algoOID, byte* output, int type)
                 algoName = RSA_AlgoID;
                 break;
         #endif /* NO_RSA */
+        #ifdef HAVE_ECC 
+            case ECDSAk:
+                algoSz = sizeof(ECC_AlgoID);
+                algoName = ECC_AlgoID;
+                tagSz = 0;
+                break;
+        #endif /* HAVE_ECC */
         default:
             CYASSL_MSG("Unknown Key Algo");
             return 0;
@@ -2355,8 +2571,9 @@ static word32 SetAlgoID(int algoOID, byte* output, int type)
         return 0;
     }
 
-    idSz  = SetLength(algoSz - 2, ID_Length); /* don't include TAG_NULL/0 */
-    seqSz = SetSequence(idSz + algoSz + 1, seqArray);
+    idSz  = SetLength(algoSz - tagSz, ID_Length); /* don't include tags */
+    seqSz = SetSequence(idSz + algoSz + 1 + curveSz, seqArray); 
+                 /* +1 for object id, curveID of curveSz follows for ecc */
     seqArray[seqSz++] = ASN_OBJECT_ID;
 
     XMEMCPY(output, seqArray, seqSz);
@@ -2376,7 +2593,7 @@ word32 EncodeSignature(byte* out, const byte* digest, word32 digSz, int hashOID)
     word32 encDigSz, algoSz, seqSz; 
 
     encDigSz = SetDigest(digest, digSz, digArray);
-    algoSz   = SetAlgoID(hashOID, algoArray, hashType);
+    algoSz   = SetAlgoID(hashOID, algoArray, hashType, 0);
     seqSz    = SetSequence(encDigSz + algoSz, seqArray);
 
     XMEMCPY(out, seqArray, seqSz);
@@ -2491,6 +2708,7 @@ static int ConfirmSignature(const byte* buf, word32 bufSz,
             CYASSL_MSG("Verify Signautre has unsupported type");
             return 0;
     }
+    (void)typeH;  /* some builds won't read */
 
     switch (keyOID) {
     #ifndef NO_RSA
@@ -2752,8 +2970,28 @@ static void DecodeBasicCaConstraint(byte* input, int sz, DecodedCert* cert)
         return;
     }
 
-    if (input[idx])
+    if (input[idx++])
         cert->isCA = 1;
+
+    #ifdef OPENSSL_EXTRA
+        /* If there isn't any more data, return. */
+        if (idx >= (word32)sz)
+            return;
+
+        /* Anything left should be the optional pathlength */
+        if (input[idx++] != ASN_INTEGER) {
+            CYASSL_MSG("\tfail: pathlen not INTEGER");
+            return;
+        }
+
+        if (input[idx++] != 1) {
+            CYASSL_MSG("\tfail: pathlen too long");
+            return;
+        }
+
+        cert->pathLength = input[idx];
+        cert->extBasicConstPlSet = 1;
+    #endif /* OPENSSL_EXTRA */
 }
 
 
@@ -2906,6 +3144,11 @@ static void DecodeAuthKeyId(byte* input, int sz, DecodedCert* cert)
         return;
     }
 
+    #ifdef OPENSSL_EXTRA
+        cert->extAuthKeyIdSrc = &input[idx];
+        cert->extAuthKeyIdSz = length;
+    #endif /* OPENSSL_EXTRA */
+
     if (length == SHA_SIZE) {
         XMEMCPY(cert->extAuthKeyId, input + idx, length);
     }
@@ -2915,7 +3158,6 @@ static void DecodeAuthKeyId(byte* input, int sz, DecodedCert* cert)
         ShaUpdate(&sha, input + idx, length);
         ShaFinal(&sha, cert->extAuthKeyId);
     }
-    cert->extAuthKeyIdSet = 1;
 
     return;
 }
@@ -2938,6 +3180,11 @@ static void DecodeSubjKeyId(byte* input, int sz, DecodedCert* cert)
         return;
     }
 
+    #ifdef OPENSSL_EXTRA
+        cert->extSubjKeyIdSrc = &input[idx];
+        cert->extSubjKeyIdSz = length;
+    #endif /* OPENSSL_EXTRA */
+
     if (length == SIGNER_DIGEST_SIZE) {
         XMEMCPY(cert->extSubjKeyId, input + idx, length);
     }
@@ -2947,12 +3194,44 @@ static void DecodeSubjKeyId(byte* input, int sz, DecodedCert* cert)
         ShaUpdate(&sha, input + idx, length);
         ShaFinal(&sha, cert->extSubjKeyId);
     }
-    cert->extSubjKeyIdSet = 1;
 
     return;
 }
 
 
+#ifdef OPENSSL_EXTRA
+    static void DecodeKeyUsage(byte* input, int sz, DecodedCert* cert)
+    {
+        word32 idx = 0;
+        int length;
+        byte unusedBits;
+        CYASSL_ENTER("DecodeKeyUsage");
+
+        if (input[idx++] != ASN_BIT_STRING) {
+            CYASSL_MSG("\tfail: key usage expected bit string");
+            return;
+        }
+
+        if (GetLength(input, &idx, &length, sz) < 0) {
+            CYASSL_MSG("\tfail: key usage bad length");
+            return;
+        }
+
+        unusedBits = input[idx++];
+        length--;
+
+        if (length == 2) {
+            cert->extKeyUsage = (input[idx] << 8) | input[idx+1];
+            cert->extKeyUsage >>= unusedBits;
+        }
+        else if (length == 1)
+            cert->extKeyUsage = (input[idx] << 1);
+
+        return;
+    }
+#endif /* OPENSSL_EXTRA */
+
+
 #ifdef CYASSL_SEP
     static void DecodeCertPolicy(byte* input, int sz, DecodedCert* cert)
     {
@@ -3008,6 +3287,9 @@ static void DecodeCertExtensions(DecodedCert* cert)
     byte* input = cert->extensions;
     int length;
     word32 oid;
+    byte critical;
+
+    (void)critical;
 
     CYASSL_ENTER("DecodeCertExtensions");
 
@@ -3032,9 +3314,16 @@ static void DecodeCertExtensions(DecodedCert* cert)
         }
 
         /* check for critical flag */
+        critical = 0;
         if (input[idx] == ASN_BOOLEAN) {
-            CYASSL_MSG("\tfound optional critical flag, moving past");
-            idx += (ASN_BOOL_SIZE + 1);
+            int boolLength = 0;
+            idx++;
+            if (GetLength(input, &idx, &boolLength, sz) < 0) {
+                CYASSL_MSG("\tfail: critical boolean length");
+                return;
+            }
+            if (input[idx++])
+                critical = 1;
         }
 
         /* process the extension based on the OID */
@@ -3050,6 +3339,10 @@ static void DecodeCertExtensions(DecodedCert* cert)
 
         switch (oid) {
             case BASIC_CA_OID:
+                #ifdef OPENSSL_EXTRA
+                    cert->extBasicConstSet = 1;
+                    cert->extBasicConstCrit = critical;
+                #endif
                 DecodeBasicCaConstraint(&input[idx], length, cert);
                 break;
 
@@ -3062,29 +3355,54 @@ static void DecodeCertExtensions(DecodedCert* cert)
                 break;
 
             case ALT_NAMES_OID:
+                #ifdef OPENSSL_EXTRA
+                    cert->extSubjAltNameSet = 1;
+                    cert->extSubjAltNameCrit = critical;
+                #endif
                 DecodeAltNames(&input[idx], length, cert);
                 break;
 
             case AUTH_KEY_OID:
+                cert->extAuthKeyIdSet = 1;
+                #ifdef OPENSSL_EXTRA
+                    cert->extAuthKeyIdCrit = critical;
+                #endif
                 DecodeAuthKeyId(&input[idx], length, cert);
                 break;
 
             case SUBJ_KEY_OID:
+                cert->extSubjKeyIdSet = 1;
+                #ifdef OPENSSL_EXTRA
+                    cert->extSubjKeyIdCrit = critical;
+                #endif
                 DecodeSubjKeyId(&input[idx], length, cert);
                 break;
 
             #ifdef CYASSL_SEP
             case CERT_POLICY_OID:
+                #ifdef OPENSSL_EXTRA
+                    cert->extCertPolicySet = 1;
+                    cert->extCertPolicyCrit = critical;
+                #endif
                 DecodeCertPolicy(&input[idx], length, cert);
                 break;
             #endif
 
+            #ifdef OPENSSL_EXTRA
+            case KEY_USAGE_OID:
+                cert->extKeyUsageSet = 1;
+                cert->extKeyUsageCrit = critical;
+                DecodeKeyUsage(&input[idx], length, cert);
+                break;
+            #endif
+
             default:
                 CYASSL_MSG("\tExtension type not handled, skipping");
                 break;
         }
         idx += length;
     }
+    (void)critical;
 
     CYASSL_LEAVE("DecodeCertExtensions", 0);
     return;
@@ -3151,6 +3469,8 @@ int ParseCertRelative(DecodedCert* cert, int type, int verify, void* cm)
             return ret;
     }
 
+    CYASSL_MSG("Parsed Past Key");
+
     if (cert->srcIdx != cert->sigIndex) {
         if (cert->srcIdx < cert->sigIndex) {
             /* save extensions */
@@ -3180,7 +3500,6 @@ int ParseCertRelative(DecodedCert* cert, int type, int verify, void* cm)
             InitSha(&sha);
             ShaUpdate(&sha, cert->publicKey, cert->pubKeySize);
             ShaFinal(&sha, cert->extSubjKeyId);
-            cert->extSubjKeyIdSet = 1;
         }
     #endif
 
@@ -3277,9 +3596,7 @@ void FreeSignerTable(Signer** table, int rows, void* heap)
 }
 
 
-#if defined(CYASSL_KEY_GEN) || defined(CYASSL_CERT_GEN)
-
-static int SetMyVersion(word32 version, byte* output, int header)
+CYASSL_LOCAL int SetMyVersion(word32 version, byte* output, int header)
 {
     int i = 0;
 
@@ -3295,6 +3612,39 @@ static int SetMyVersion(word32 version, byte* output, int header)
 }
 
 
+CYASSL_LOCAL int SetSerialNumber(const byte* sn, word32 snSz, byte* output)
+{
+    int result = 0;
+
+    CYASSL_ENTER("SetSerialNumber");
+
+    if (snSz <= EXTERNAL_SERIAL_SIZE) {
+        output[0] = ASN_INTEGER;
+        /* The serial number is always positive. When encoding the
+         * INTEGER, if the MSB is 1, add a padding zero to keep the
+         * number positive. */
+        if (sn[0] & 0x80) {
+            output[1] = (byte)snSz + 1;
+            output[2] = 0;
+            XMEMCPY(&output[3], sn, snSz);
+            result = snSz + 3;
+        }
+        else {
+            output[1] = (byte)snSz;
+            XMEMCPY(&output[2], sn, snSz);
+            result = snSz + 2;
+        }
+    }
+    return result;
+}
+
+
+
+
+#if defined(CYASSL_KEY_GEN) || defined(CYASSL_CERT_GEN)
+
+/* convert der buffer to pem into output, can't do inplace, der and output
+   need to be different */
 int DerToPem(const byte* der, word32 derSz, byte* output, word32 outSz,
              int type)
 {
@@ -3307,6 +3657,9 @@ int DerToPem(const byte* der, word32 derSz, byte* output, word32 outSz,
     int err;
     int outLen;   /* return length or error */
 
+    if (der == output)      /* no in place conversion */
+        return BAD_FUNC_ARG;
+
     if (type == CERT_TYPE) {
         XSTRNCPY(header, "-----BEGIN CERTIFICATE-----\n", sizeof(header));
         XSTRNCPY(footer, "-----END CERTIFICATE-----\n", sizeof(footer));
@@ -3321,6 +3674,14 @@ int DerToPem(const byte* der, word32 derSz, byte* output, word32 outSz,
         XSTRNCPY(footer, "-----END EC PRIVATE KEY-----\n", sizeof(footer));
     }
     #endif
+    #ifdef CYASSL_CERT_REQ
+    else if (type == CERTREQ_TYPE)
+    {
+        XSTRNCPY(header,
+                       "-----BEGIN CERTIFICATE REQUEST-----\n", sizeof(header));
+        XSTRNCPY(footer, "-----END CERTIFICATE REQUEST-----\n", sizeof(footer));
+    }
+    #endif
     else
         return BAD_FUNC_ARG;
 
@@ -3532,6 +3893,10 @@ void InitCert(Cert* cert)
     cert->subject.unit[0] = '\0';
     cert->subject.commonName[0] = '\0';
     cert->subject.email[0] = '\0';
+
+#ifdef CYASSL_CERT_REQ
+    cert->challengePw[0] ='\0';
+#endif
 }
 
 
@@ -3547,6 +3912,9 @@ typedef struct DerCert {
     byte publicKey[MAX_PUBLIC_KEY_SZ]; /* rsa / ntru public key encoded */
     byte ca[MAX_CA_SZ];                /* basic constraint CA true size */
     byte extensions[MAX_EXTENSIONS_SZ];  /* all extensions */
+#ifdef CYASSL_CERT_REQ
+    byte attrib[MAX_ATTRIB_SZ];        /* Cert req attributes encoded */
+#endif
     int  sizeSz;                       /* encoded size length */
     int  versionSz;                    /* encoded version length */
     int  serialSz;                     /* encoded serial length */
@@ -3558,16 +3926,23 @@ typedef struct DerCert {
     int  caSz;                         /* encoded CA extension length */
     int  extensionsSz;                 /* encoded extensions total length */
     int  total;                        /* total encoded lengths */
+#ifdef CYASSL_CERT_REQ
+    int  attribSz;
+#endif
 } DerCert;
 
 
+#ifdef CYASSL_CERT_REQ
+
 /* Write a set header to output */
-static word32 SetSet(word32 len, byte* output)
+static word32 SetUTF8String(word32 len, byte* output)
 {
-    output[0] = ASN_SET | ASN_CONSTRUCTED;
+    output[0] = ASN_UTF8STRING;
     return SetLength(len, output + 1) + 1;
 }
 
+#endif /* CYASSL_CERT_REQ */
+
 
 /* Write a serial number to output */
 static int SetSerial(const byte* serial, byte* output)
@@ -3582,8 +3957,59 @@ static int SetSerial(const byte* serial, byte* output)
 }
 
 
+#ifdef HAVE_ECC 
+
+/* Write a public ECC key to output */
+static int SetEccPublicKey(byte* output, ecc_key* key)
+{
+    byte algo[MAX_ALGO_SZ];
+    byte curve[MAX_ALGO_SZ];
+    byte len[MAX_LENGTH_SZ + 1];  /* trailing 0 */
+    byte pub[ECC_BUFSIZE];
+    int  algoSz;
+    int  curveSz;
+    int  lenSz;
+    int  idx;
+    word32 pubSz = sizeof(pub);
+
+    int ret = ecc_export_x963(key, pub, &pubSz);
+    if (ret != 0) return ret;
+
+    /* headers */
+    curveSz = SetCurve(key, curve);
+    if (curveSz <= 0) return curveSz;
+
+    algoSz  = SetAlgoID(ECDSAk, algo, keyType, curveSz);
+    lenSz   = SetLength(pubSz + 1, len);
+    len[lenSz++] = 0;   /* trailing 0 */
+
+    /* write */
+    idx = SetSequence(pubSz + curveSz + lenSz + 1 + algoSz, output);
+        /* 1 is for ASN_BIT_STRING */
+    /* algo */
+    XMEMCPY(output + idx, algo, algoSz);
+    idx += algoSz;
+    /* curve */
+    XMEMCPY(output + idx, curve, curveSz);
+    idx += curveSz;
+    /* bit string */
+    output[idx++] = ASN_BIT_STRING;
+    /* length */
+    XMEMCPY(output + idx, len, lenSz);
+    idx += lenSz;
+    /* pub */
+    XMEMCPY(output + idx, pub, pubSz);
+    idx += pubSz;
+
+    return idx;
+}
+
+
+#endif /* HAVE_ECC */
+
+
 /* Write a public RSA key to output */
-static int SetPublicKey(byte* output, RsaKey* key)
+static int SetRsaPublicKey(byte* output, RsaKey* key)
 {
     byte n[MAX_RSA_INT_SZ];
     byte e[MAX_RSA_E_SZ];
@@ -3597,14 +4023,19 @@ static int SetPublicKey(byte* output, RsaKey* key)
     int  lenSz;
     int  idx;
     int  rawLen;
+    int  leadingBit;
+    int  err;
 
     /* n */
-    rawLen = mp_unsigned_bin_size(&key->n);
+    leadingBit = mp_leading_bit(&key->n);
+    rawLen = mp_unsigned_bin_size(&key->n) + leadingBit;
     n[0] = ASN_INTEGER;
     nSz  = SetLength(rawLen, n + 1) + 1;  /* int tag */
 
     if ( (nSz + rawLen) < (int)sizeof(n)) {
-        int err = mp_to_unsigned_bin(&key->n, n + nSz);
+        if (leadingBit)
+            n[nSz] = 0;
+        err = mp_to_unsigned_bin(&key->n, n + nSz + leadingBit);
         if (err == MP_OKAY)
             nSz += rawLen;
         else
@@ -3614,12 +4045,15 @@ static int SetPublicKey(byte* output, RsaKey* key)
         return BUFFER_E;
 
     /* e */
-    rawLen = mp_unsigned_bin_size(&key->e);
+    leadingBit = mp_leading_bit(&key->e);
+    rawLen = mp_unsigned_bin_size(&key->e) + leadingBit;
     e[0] = ASN_INTEGER;
     eSz  = SetLength(rawLen, e + 1) + 1;  /* int tag */
 
     if ( (eSz + rawLen) < (int)sizeof(e)) {
-        int err = mp_to_unsigned_bin(&key->e, e + eSz);
+        if (leadingBit)
+            e[eSz] = 0;
+        err = mp_to_unsigned_bin(&key->e, e + eSz + leadingBit);
         if (err == MP_OKAY)
             eSz += rawLen;
         else
@@ -3629,7 +4063,7 @@ static int SetPublicKey(byte* output, RsaKey* key)
         return BUFFER_E;
 
     /* headers */
-    algoSz = SetAlgoID(RSAk, algo, keyType);
+    algoSz = SetAlgoID(RSAk, algo, keyType, 0);
     seqSz  = SetSequence(nSz + eSz, seq);
     lenSz  = SetLength(seqSz + nSz + eSz + 1, len);
     len[lenSz++] = 0;   /* trailing 0 */
@@ -3852,19 +4286,21 @@ static byte GetNameId(int idx)
 
 
 /* encode all extensions, return total bytes written */
-static int SetExtensions(byte* output, const byte* ext, int extSz)
+static int SetExtensions(byte* output, const byte* ext, int extSz, int header)
 {
     byte sequence[MAX_SEQ_SZ];
     byte len[MAX_LENGTH_SZ];
 
     int sz = 0;
     int seqSz = SetSequence(extSz, sequence);
-    int lenSz = SetLength(seqSz + extSz, len);
 
-    output[0] = ASN_EXTENSIONS; /* extensions id */
-    sz++;
-    XMEMCPY(&output[sz], len, lenSz);  /* length */
-    sz += lenSz; 
+    if (header) {
+        int lenSz = SetLength(seqSz + extSz, len);
+        output[0] = ASN_EXTENSIONS; /* extensions id */
+        sz++;
+        XMEMCPY(&output[sz], len, lenSz);  /* length */
+        sz += lenSz;
+    }
     XMEMCPY(&output[sz], sequence, seqSz);  /* sequence */
     sz += seqSz;
     XMEMCPY(&output[sz], ext, extSz);  /* extensions */
@@ -3957,12 +4393,16 @@ static int SetName(byte* output, CertName* name)
             }
             else {
                 /* joint id */
+                byte bType = GetNameId(i);
                 names[i].encoded[idx++] = 0x55;
                 names[i].encoded[idx++] = 0x04;
                 /* id type */
-                names[i].encoded[idx++] = GetNameId(i);
+                names[i].encoded[idx++] = bType; 
                 /* str type */
-                names[i].encoded[idx++] = 0x13;
+                if (bType == ASN_COUNTRY_NAME)
+                    names[i].encoded[idx++] = 0x13;   /* printable */
+                else
+                    names[i].encoded[idx++] = 0x0c;   /* utf8 */
             }
             /* second length */
             XMEMCPY(names[i].encoded + idx, secondLen, secondSz);
@@ -3994,15 +4434,11 @@ static int SetName(byte* output, CertName* name)
     return totalBytes;
 }
 
-/* encode info from cert into DER enocder format */
-static int EncodeCert(
-Cert* cert, 
-DerCert* der, 
-RsaKey* rsaKey, 
-RNG* rng,
-                      const byte* ntruKey, 
-word16 ntruSz)
+/* encode info from cert into DER encoded format */
+static int EncodeCert(Cert* cert, DerCert* der, RsaKey* rsaKey, ecc_key* eccKey,
+                      RNG* rng, const byte* ntruKey, word16 ntruSz)
 {
+    (void)eccKey;
     (void)ntruKey;
     (void)ntruSz;
 
@@ -4018,18 +4454,31 @@ word16 ntruSz)
     der->serialSz  = SetSerial(cert->serial, der->serial);
 
     /* signature algo */
-    der->sigAlgoSz = SetAlgoID(cert->sigType, der->sigAlgo, sigType);
+    der->sigAlgoSz = SetAlgoID(cert->sigType, der->sigAlgo, sigType, 0);
     if (der->sigAlgoSz == 0)
         return ALGO_ID_E;
 
     /* public key */
     if (cert->keyType == RSA_KEY) {
-        der->publicKeySz = SetPublicKey(der->publicKey, rsaKey);
-        if (der->publicKeySz == 0)
+        if (rsaKey == NULL)
+            return PUBLIC_KEY_E;
+        der->publicKeySz = SetRsaPublicKey(der->publicKey, rsaKey);
+        if (der->publicKeySz <= 0)
             return PUBLIC_KEY_E;
     }
-    else {
+
+#ifdef HAVE_ECC
+    if (cert->keyType == ECC_KEY) {
+        if (eccKey == NULL)
+            return PUBLIC_KEY_E;
+        der->publicKeySz = SetEccPublicKey(der->publicKey, eccKey);
+        if (der->publicKeySz <= 0)
+            return PUBLIC_KEY_E;
+    }
+#endif /* HAVE_ECC */
+
 #ifdef HAVE_NTRU
+    if (cert->keyType == NTRU_KEY) {
         word32 rc;
         word16 encodedSz;
 
@@ -4046,8 +4495,8 @@ word16 ntruSz)
             return PUBLIC_KEY_E;
 
         der->publicKeySz = encodedSz;
-#endif
     }
+#endif /* HAVE_NTRU */
 
     der->validitySz = 0;
 #ifdef CYASSL_ALT_NAMES
@@ -4088,7 +4537,8 @@ word16 ntruSz)
 
     /* extensions, just CA now */
     if (cert->isCA) {
-        der->extensionsSz = SetExtensions(der->extensions, der->ca, der->caSz);
+        der->extensionsSz = SetExtensions(der->extensions,
+                                          der->ca, der->caSz, TRUE);
         if (der->extensionsSz == 0)
             return EXTENSIONS_E;
     }
@@ -4098,7 +4548,7 @@ word16 ntruSz)
 #ifdef CYASSL_ALT_NAMES
     if (der->extensionsSz == 0 && cert->altNamesSz) {
         der->extensionsSz = SetExtensions(der->extensions, cert->altNames,
-                                          cert->altNamesSz);
+                                          cert->altNamesSz, TRUE);
         if (der->extensionsSz == 0)
             return EXTENSIONS_E;
     }
@@ -4153,12 +4603,15 @@ static int WriteCertBody(DerCert* der, byte* buffer)
 
 /* Make RSA signature from buffer (sz), write to sig (sigSz) */
 static int MakeSignature(const byte* buffer, int sz, byte* sig, int sigSz,
-                         RsaKey* key, RNG* rng, int sigAlgoType)
+                         RsaKey* rsaKey, ecc_key* eccKey, RNG* rng,
+                         int sigAlgoType)
 {
     byte    digest[SHA256_DIGEST_SIZE];     /* max size */
     byte    encSig[MAX_ENCODED_DIG_SZ + MAX_ALGO_SZ + MAX_SEQ_SZ];
     int     encSigSz, digestSz, typeH;
 
+    (void)eccKey;
+
     if (sigAlgoType == CTC_MD5wRSA) {
         Md5     md5;
         InitMd5(&md5);
@@ -4167,7 +4620,7 @@ static int MakeSignature(const byte* buffer, int sz, byte* sig, int sigSz,
         digestSz = MD5_DIGEST_SIZE;
         typeH    = MD5h;
     }
-    else if (sigAlgoType == CTC_SHAwRSA) {
+    else if (sigAlgoType == CTC_SHAwRSA || sigAlgoType == CTC_SHAwECDSA) {
         Sha     sha;
         InitSha(&sha);
         ShaUpdate(&sha, buffer, sz);
@@ -4175,7 +4628,7 @@ static int MakeSignature(const byte* buffer, int sz, byte* sig, int sigSz,
         digestSz = SHA_DIGEST_SIZE;
         typeH    = SHAh;
     }
-    else if (sigAlgoType == CTC_SHA256wRSA) {
+    else if (sigAlgoType == CTC_SHA256wRSA || sigAlgoType == CTC_SHA256wECDSA) {
         Sha256     sha256;
         InitSha256(&sha256);
         Sha256Update(&sha256, buffer, sz);
@@ -4186,9 +4639,23 @@ static int MakeSignature(const byte* buffer, int sz, byte* sig, int sigSz,
     else
         return ALGO_ID_E;
 
-    /* signature */
-    encSigSz = EncodeSignature(encSig, digest, digestSz, typeH);
-    return RsaSSL_Sign(encSig, encSigSz, sig, sigSz, key, rng);
+    if (rsaKey) {
+        /* signature */
+        encSigSz = EncodeSignature(encSig, digest, digestSz, typeH);
+        return RsaSSL_Sign(encSig, encSigSz, sig, sigSz, rsaKey, rng);
+    }
+#ifdef HAVE_ECC
+    else if (eccKey) {
+        word32 outSz = sigSz;
+        int ret = ecc_sign_hash(digest, digestSz, sig, &outSz, rng, eccKey);
+
+        if (ret != 0)
+            return ret;
+        return outSz;
+    }
+#endif /* HAVE_ECC */
+
+    return ALGO_ID_E;
 }
 
 
@@ -4201,7 +4668,7 @@ static int AddSignature(byte* buffer, int bodySz, const byte* sig, int sigSz,
     int  idx = bodySz, seqSz;
 
     /* algo */
-    idx += SetAlgoID(sigAlgoType, buffer + idx, sigType);
+    idx += SetAlgoID(sigAlgoType, buffer + idx, sigType, 0);
     /* bit string */
     buffer[idx++] = ASN_BIT_STRING;
     /* length */
@@ -4222,13 +4689,17 @@ static int AddSignature(byte* buffer, int bodySz, const byte* sig, int sigSz,
 
 /* Make an x509 Certificate v3 any key type from cert input, write to buffer */
 static int MakeAnyCert(Cert* cert, byte* derBuffer, word32 derSz,
-                   RsaKey* rsaKey, RNG* rng, const byte* ntruKey, word16 ntruSz)
+                       RsaKey* rsaKey, ecc_key* eccKey, RNG* rng,
+                       const byte* ntruKey, word16 ntruSz)
 {
     DerCert der;
     int     ret;
 
-    cert->keyType = rsaKey ? RSA_KEY : NTRU_KEY;
-    ret = EncodeCert(cert, &der, rsaKey, rng, ntruKey, ntruSz);
+    if (eccKey)
+        cert->keyType = ECC_KEY;
+    else
+        cert->keyType = rsaKey ? RSA_KEY : NTRU_KEY;
+    ret = EncodeCert(cert, &der, rsaKey, eccKey, rng, ntruKey, ntruSz);
     if (ret != 0)
         return ret;
 
@@ -4239,10 +4710,11 @@ static int MakeAnyCert(Cert* cert, byte* derBuffer, word32 derSz,
 }
 
 
-/* Make an x509 Certificate v3 RSA from cert input, write to buffer */
-int MakeCert(Cert* cert, byte* derBuffer, word32 derSz, RsaKey* rsaKey,RNG* rng)
+/* Make an x509 Certificate v3 RSA or ECC from cert input, write to buffer */
+int MakeCert(Cert* cert, byte* derBuffer, word32 derSz, RsaKey* rsaKey,
+             ecc_key* eccKey, RNG* rng)
 {
-    return MakeAnyCert(cert, derBuffer, derSz, rsaKey, rng, NULL, 0);
+    return MakeAnyCert(cert, derBuffer, derSz, rsaKey, eccKey, rng, NULL, 0);
 }
 
 
@@ -4251,41 +4723,231 @@ int MakeCert(Cert* cert, byte* derBuffer, word32 derSz, RsaKey* rsaKey,RNG* rng)
 int  MakeNtruCert(Cert* cert, byte* derBuffer, word32 derSz,
                   const byte* ntruKey, word16 keySz, RNG* rng)
 {
-    return MakeAnyCert(cert, derBuffer, derSz, NULL, rng, ntruKey, keySz);
+    return MakeAnyCert(cert, derBuffer, derSz, NULL, NULL, rng, ntruKey, keySz);
 }
 
 #endif /* HAVE_NTRU */
 
 
-int SignCert(Cert* cert, byte* buffer, word32 buffSz, RsaKey* key, RNG* rng)
+#ifdef CYASSL_CERT_REQ
+
+static int SetReqAttrib(byte* output, char* pw, int extSz)
+{
+    static const byte cpOid[] =
+        { ASN_OBJECT_ID, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01,
+                         0x09, 0x07 };
+    static const byte erOid[] =
+        { ASN_OBJECT_ID, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01,
+                         0x09, 0x0e };
+
+    int sz      = 0; /* overall size */
+    int cpSz    = 0; /* Challenge Password section size */
+    int cpSeqSz = 0;
+    int cpSetSz = 0;
+    int cpStrSz = 0;
+    int pwSz    = 0;
+    int erSz    = 0; /* Extension Request section size */
+    int erSeqSz = 0;
+    int erSetSz = 0;
+    byte cpSeq[MAX_SEQ_SZ];
+    byte cpSet[MAX_SET_SZ];
+    byte cpStr[MAX_PRSTR_SZ];
+    byte erSeq[MAX_SEQ_SZ];
+    byte erSet[MAX_SET_SZ];
+
+    output[0] = 0xa0;
+    sz++;
+
+    if (pw && pw[0]) {
+        pwSz = (int)XSTRLEN(pw);
+        cpStrSz = SetUTF8String(pwSz, cpStr);
+        cpSetSz = SetSet(cpStrSz + pwSz, cpSet);
+        cpSeqSz = SetSequence(sizeof(cpOid) + cpSetSz + cpStrSz + pwSz, cpSeq);
+        cpSz = cpSeqSz + sizeof(cpOid) + cpSetSz + cpStrSz + pwSz;
+    }
+
+    if (extSz) {
+        erSetSz = SetSet(extSz, erSet);
+        erSeqSz = SetSequence(erSetSz + sizeof(erOid) + extSz, erSeq);
+        erSz = extSz + erSetSz + erSeqSz + sizeof(erOid);
+    }
+
+    /* Put the pieces together. */
+    sz += SetLength(cpSz + erSz, &output[sz]);
+
+    if (cpSz) {
+        XMEMCPY(&output[sz], cpSeq, cpSeqSz);
+        sz += cpSeqSz;
+        XMEMCPY(&output[sz], cpOid, sizeof(cpOid));
+        sz += sizeof(cpOid);
+        XMEMCPY(&output[sz], cpSet, cpSetSz);
+        sz += cpSetSz;
+        XMEMCPY(&output[sz], cpStr, cpStrSz);
+        sz += cpStrSz;
+        XMEMCPY(&output[sz], pw, pwSz);
+        sz += pwSz;
+    }
+
+    if (erSz) {
+        XMEMCPY(&output[sz], erSeq, erSeqSz);
+        sz += erSeqSz;
+        XMEMCPY(&output[sz], erOid, sizeof(erOid));
+        sz += sizeof(erOid);
+        XMEMCPY(&output[sz], erSet, erSetSz);
+        sz += erSetSz;
+        /* The actual extension data will be tacked onto the output later. */
+    }
+
+    return sz;
+}
+
+
+/* encode info from cert into DER encoded format */
+static int EncodeCertReq(Cert* cert, DerCert* der,
+                         RsaKey* rsaKey, ecc_key* eccKey)
+{
+    (void)eccKey;
+
+    /* init */
+    XMEMSET(der, 0, sizeof(DerCert));
+
+    /* version */
+    der->versionSz = SetMyVersion(cert->version, der->version, FALSE);
+
+    /* subject name */
+    der->subjectSz = SetName(der->subject, &cert->subject);
+    if (der->subjectSz == 0)
+        return SUBJECT_E;
+
+    /* public key */
+    if (cert->keyType == RSA_KEY) {
+        if (rsaKey == NULL)
+            return PUBLIC_KEY_E;
+        der->publicKeySz = SetRsaPublicKey(der->publicKey, rsaKey);
+        if (der->publicKeySz <= 0)
+            return PUBLIC_KEY_E;
+    }
+
+#ifdef HAVE_ECC
+    if (cert->keyType == ECC_KEY) {
+        if (eccKey == NULL)
+            return PUBLIC_KEY_E;
+        der->publicKeySz = SetEccPublicKey(der->publicKey, eccKey);
+        if (der->publicKeySz <= 0)
+            return PUBLIC_KEY_E;
+    }
+#endif /* HAVE_ECC */
+
+    /* CA */
+    if (cert->isCA) {
+        der->caSz = SetCa(der->ca);
+        if (der->caSz == 0)
+            return CA_TRUE_E;
+    }
+    else
+        der->caSz = 0;
+
+    /* extensions, just CA now */
+    if (cert->isCA) {
+        der->extensionsSz = SetExtensions(der->extensions,
+                                          der->ca, der->caSz, FALSE);
+        if (der->extensionsSz == 0)
+            return EXTENSIONS_E;
+    }
+    else
+        der->extensionsSz = 0;
+
+    der->attribSz = SetReqAttrib(der->attrib,
+                                 cert->challengePw, der->extensionsSz);
+    if (der->attribSz == 0)
+        return REQ_ATTRIBUTE_E;
+
+    der->total = der->versionSz + der->subjectSz + der->publicKeySz +
+        der->extensionsSz + der->attribSz;
+
+    return 0;
+}
+
+
+/* write DER encoded cert req to buffer, size already checked */
+static int WriteCertReqBody(DerCert* der, byte* buffer)
+{
+    int idx;
+
+    /* signed part header */
+    idx = SetSequence(der->total, buffer);
+    /* version */
+    XMEMCPY(buffer + idx, der->version, der->versionSz);
+    idx += der->versionSz;
+    /* subject */
+    XMEMCPY(buffer + idx, der->subject, der->subjectSz);
+    idx += der->subjectSz;
+    /* public key */
+    XMEMCPY(buffer + idx, der->publicKey, der->publicKeySz);
+    idx += der->publicKeySz;
+    /* attributes */
+    XMEMCPY(buffer + idx, der->attrib, der->attribSz);
+    idx += der->attribSz;
+    /* extensions */
+    if (der->extensionsSz) {
+        XMEMCPY(buffer + idx, der->extensions, min(der->extensionsSz,
+                                                   sizeof(der->extensions)));
+        idx += der->extensionsSz;
+    }
+
+    return idx;
+}
+
+
+int MakeCertReq(Cert* cert, byte* derBuffer, word32 derSz,
+                RsaKey* rsaKey, ecc_key* eccKey)
+{
+    DerCert der;
+    int     ret;
+
+    cert->keyType = (eccKey != NULL) ? ECC_KEY : RSA_KEY;
+    ret = EncodeCertReq(cert, &der, rsaKey, eccKey);
+    if (ret != 0)
+        return ret;
+
+    if (der.total + MAX_SEQ_SZ * 2 > (int)derSz)
+        return BUFFER_E;
+
+    return cert->bodySz = WriteCertReqBody(&der, derBuffer);
+}
+
+#endif /* CYASSL_CERT_REQ */
+
+
+int SignCert(int requestSz, int sType, byte* buffer, word32 buffSz,
+             RsaKey* rsaKey, ecc_key* eccKey, RNG* rng)
 {
     byte    sig[MAX_ENCODED_SIG_SZ];
     int     sigSz;
-    int     bodySz = cert->bodySz;
 
-    if (bodySz < 0)
-        return bodySz;
+    if (requestSz < 0)
+        return requestSz;
 
-    sigSz  = MakeSignature(buffer, bodySz, sig, sizeof(sig), key, rng,
-                           cert->sigType);
+    sigSz = MakeSignature(buffer, requestSz, sig, sizeof(sig), rsaKey, eccKey,
+                          rng, sType);
     if (sigSz < 0)
         return sigSz; 
 
-    if (bodySz + MAX_SEQ_SZ * 2 + sigSz > (int)buffSz)
+    if (requestSz + MAX_SEQ_SZ * 2 + sigSz > (int)buffSz)
         return BUFFER_E; 
 
-    return AddSignature(buffer, bodySz, sig, sigSz, cert->sigType);
+    return AddSignature(buffer, requestSz, sig, sigSz, sType);
 }
 
 
 int MakeSelfCert(Cert* cert, byte* buffer, word32 buffSz, RsaKey* key, RNG* rng)
 {
-    int ret = MakeCert(cert, buffer, buffSz, key, rng);
+    int ret = MakeCert(cert, buffer, buffSz, key, NULL, rng);
 
     if (ret < 0)
         return ret;
 
-    return SignCert(cert, buffer, buffSz, key, rng);
+    return SignCert(cert->bodySz, cert->sigType, buffer, buffSz, key, NULL,rng);
 }
 
 
@@ -4611,7 +5273,8 @@ int StoreECC_DSA_Sig(byte* out, word32* outLen, mp_int* r, mp_int* s)
     int sLen = mp_unsigned_bin_size(s);
     int err;
 
-    if (*outLen < (rLen + sLen + headerSz + 2))  /* SEQ_TAG + LEN(ENUM) */
+    if (*outLen < (rLen + rLeadingZero + sLen + sLeadingZero +
+                   headerSz + 2))  /* SEQ_TAG + LEN(ENUM) */
         return BAD_FUNC_ARG;
 
     idx = SetSequence(rLen+rLeadingZero+sLen+sLeadingZero+headerSz, out);
@@ -5215,33 +5878,6 @@ int OcspResponseDecode(OcspResponse* resp)
 }
 
 
-static int SetSerialNumber(const byte* sn, word32 snSz, byte* output)
-{
-    int result = 0;
-
-    CYASSL_ENTER("SetSerialNumber");
-
-    if (snSz <= EXTERNAL_SERIAL_SIZE) {
-        output[0] = ASN_INTEGER;
-        /* The serial number is always positive. When encoding the
-         * INTEGER, if the MSB is 1, add a padding zero to keep the
-         * number positive. */
-        if (sn[0] & 0x80) {
-            output[1] = (byte)snSz + 1;
-            output[2] = 0;
-            XMEMCPY(&output[3], sn, snSz);
-            result = snSz + 3;
-        }
-        else {
-            output[1] = (byte)snSz;
-            XMEMCPY(&output[2], sn, snSz);
-            result = snSz + 2;
-        }
-    }
-    return result;
-}
-
-
 static word32 SetOcspReqExtensions(word32 extSz, byte* output,
                                             const byte* nonce, word32 nonceSz)
 {
@@ -5310,7 +5946,7 @@ int EncodeOcspRequest(OcspRequest* req)
 
     CYASSL_ENTER("EncodeOcspRequest");
 
-    algoSz = SetAlgoID(SHAh, algoArray, hashType);
+    algoSz = SetAlgoID(SHAh, algoArray, hashType, 0);
 
     req->issuerHash = req->cert->issuerHash;
     issuerSz = SetDigest(req->cert->issuerHash, SHA_SIZE, issuerArray);
@@ -5398,7 +6034,9 @@ int CompareOcspReqResp(OcspRequest* req, OcspResponse* resp)
         return 1;
     }
 
-    if (req->useNonce) {
+    /* Nonces are not critical. The responder may not necessarily add
+     * the nonce to the response. */
+    if (req->useNonce && resp->nonceSz != 0) {
         cmp = req->nonceSz - resp->nonceSz;
         if (cmp != 0)
         {
@@ -5448,39 +6086,9 @@ int CompareOcspReqResp(OcspRequest* req, OcspResponse* resp)
 #endif
 
 
-#ifdef HAVE_CRL
-
-/* initialize decoded CRL */
-void InitDecodedCRL(DecodedCRL* dcrl)
-{
-    CYASSL_MSG("InitDecodedCRL");
-
-    dcrl->certBegin    = 0;
-    dcrl->sigIndex     = 0;
-    dcrl->sigLength    = 0;
-    dcrl->signatureOID = 0;
-    dcrl->certs        = NULL;
-    dcrl->totalCerts   = 0;
-}
-
-
-/* free decoded CRL resources */
-void FreeDecodedCRL(DecodedCRL* dcrl)
-{
-    RevokedCert* tmp = dcrl->certs;
-
-    CYASSL_MSG("FreeDecodedCRL");
-
-    while(tmp) {
-        RevokedCert* next = tmp->next;
-        XFREE(tmp, NULL, DYNAMIC_TYPE_REVOKED);
-        tmp = next;
-    }
-}
-
-
 /* store SHA1 hash of NAME */
-static int GetNameHash(const byte* source, word32* idx, byte* hash, int maxIdx)
+CYASSL_LOCAL int GetNameHash(const byte* source, word32* idx, byte* hash,
+                             int maxIdx)
 {
     Sha    sha;
     int    length;  /* length of all distinguished names */
@@ -5515,6 +6123,37 @@ static int GetNameHash(const byte* source, word32* idx, byte* hash, int maxIdx)
 }
 
 
+#ifdef HAVE_CRL
+
+/* initialize decoded CRL */
+void InitDecodedCRL(DecodedCRL* dcrl)
+{
+    CYASSL_MSG("InitDecodedCRL");
+
+    dcrl->certBegin    = 0;
+    dcrl->sigIndex     = 0;
+    dcrl->sigLength    = 0;
+    dcrl->signatureOID = 0;
+    dcrl->certs        = NULL;
+    dcrl->totalCerts   = 0;
+}
+
+
+/* free decoded CRL resources */
+void FreeDecodedCRL(DecodedCRL* dcrl)
+{
+    RevokedCert* tmp = dcrl->certs;
+
+    CYASSL_MSG("FreeDecodedCRL");
+
+    while(tmp) {
+        RevokedCert* next = tmp->next;
+        XFREE(tmp, NULL, DYNAMIC_TYPE_REVOKED);
+        tmp = next;
+    }
+}
+
+
 /* Get Revoked Cert list, 0 on success */
 static int GetRevoked(const byte* buff, word32* idx, DecodedCRL* dcrl,
                       int maxIdx)
diff --git a/ctaocrypt/src/coding.c b/ctaocrypt/src/coding.c
index 78286faae..8add2d59a 100644
--- a/ctaocrypt/src/coding.c
+++ b/ctaocrypt/src/coding.c
@@ -147,16 +147,101 @@ const byte base64Encode[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J',
                             };
 
 
-/* porting assistance from yaSSL by Raphael HUCK */
-int Base64_Encode(const byte* in, word32 inLen, byte* out, word32* outLen)
+/* make sure *i (idx) won't exceed max, store and possibly escape to out,
+ * raw means use e w/o decode,  0 on success */
+static int CEscape(int escaped, byte e, byte* out, word32* i, word32 max,
+                  int raw)
 {
+    int    doEscape = 0;
+    word32 needed = 1;
+    word32 idx = *i;
+
+    byte basic;
+    byte plus    = 0;
+    byte equals  = 0;
+    byte newline = 0;
+
+    if (raw)
+        basic = e;
+    else
+        basic = base64Encode[e];
+
+    /* check whether to escape */
+    if (escaped) {
+        switch ((char)basic) {
+            case '+' :
+                plus     = 1;
+                doEscape = 1;
+                needed  += 2;
+                break;
+            case '=' :
+                equals   = 1;
+                doEscape = 1;
+                needed  += 2;
+                break;
+            case '\n' :
+                newline  = 1;
+                doEscape = 1;
+                needed  += 2;
+                break;
+            default:
+                /* do nothing */
+                break;
+        }
+    }
+
+    /* check size */
+    if ( (idx+needed) > max) {
+        CYASSL_MSG("Escape buffer max too small");
+        return BUFFER_E;
+    }
+
+    /* store it */
+    if (doEscape == 0) {
+        out[idx++] = basic;
+    }
+    else {
+        out[idx++] = '%';  /* start escape */
+
+        if (plus) {
+            out[idx++] = '2';
+            out[idx++] = 'B';
+        }
+        else if (equals) {
+            out[idx++] = '3';
+            out[idx++] = 'D';
+        }
+        else if (newline) {
+            out[idx++] = '0';
+            out[idx++] = 'A';
+        }
+
+    }
+    *i = idx;
+
+    return 0;
+}
+
+
+/* internal worker, handles both escaped and normal line endings */
+static int DoBase64_Encode(const byte* in, word32 inLen, byte* out,
+                           word32* outLen, int escaped)
+{
+    int    ret = 0;
     word32 i = 0,
            j = 0,
            n = 0;   /* new line counter */
 
     word32 outSz = (inLen + 3 - 1) / 3 * 4;
-    outSz += (outSz + PEM_LINE_SZ - 1) / PEM_LINE_SZ;  /* new lines */
+    word32 addSz = (outSz + PEM_LINE_SZ - 1) / PEM_LINE_SZ;  /* new lines */
 
+    if (escaped)
+        addSz *= 3;   /* instead of just \n, we're doing %0A triplet */
+
+    outSz += addSz;
+
+    /* if escaped we can't predetermine size for one pass encoding, but
+     * make sure we have enough if no escapes are in input */
     if (outSz > *outLen) return BAD_FUNC_ARG;
     
     while (inLen > 2) {
@@ -171,19 +256,25 @@ int Base64_Encode(const byte* in, word32 inLen, byte* out, word32* outLen)
         byte e4 = b3 & 0x3F;
 
         /* store */
-        out[i++] = base64Encode[e1];
-        out[i++] = base64Encode[e2];
-        out[i++] = base64Encode[e3];
-        out[i++] = base64Encode[e4];
+        ret = CEscape(escaped, e1, out, &i, *outLen, 0);
+        if (ret != 0) break;
+        ret = CEscape(escaped, e2, out, &i, *outLen, 0);
+        if (ret != 0) break;
+        ret = CEscape(escaped, e3, out, &i, *outLen, 0);
+        if (ret != 0) break;
+        ret = CEscape(escaped, e4, out, &i, *outLen, 0);
+        if (ret != 0) break;
 
         inLen -= 3;
 
-        if ((++n % (PEM_LINE_SZ / 4)) == 0 && inLen)
-            out[i++] = '\n';
+        if ((++n % (PEM_LINE_SZ / 4)) == 0 && inLen) {
+            ret = CEscape(escaped, '\n', out, &i, *outLen, 1);
+            if (ret != 0) break;
+        }
     }
 
     /* last integral */
-    if (inLen) {
+    if (inLen && ret == 0) {
         int twoBytes = (inLen == 2);
 
         byte b1 = in[j++];
@@ -193,18 +284,43 @@ int Base64_Encode(const byte* in, word32 inLen, byte* out, word32* outLen)
         byte e2 = ((b1 & 0x3) << 4) | (b2 >> 4);
         byte e3 =  (b2 & 0xF) << 2;
 
-        out[i++] = base64Encode[e1];
-        out[i++] = base64Encode[e2];
-        out[i++] = (twoBytes) ? base64Encode[e3] : PAD;
-        out[i++] = PAD;
+        ret = CEscape(escaped, e1, out, &i, *outLen, 0);
+        if (ret == 0) 
+            ret = CEscape(escaped, e2, out, &i, *outLen, 0);
+        if (ret == 0) {
+            /* third */
+            if (twoBytes)
+                ret = CEscape(escaped, e3, out, &i, *outLen, 0);
+            else 
+                ret = CEscape(escaped, '=', out, &i, *outLen, 1);
+        }
+        /* fourth always pad */
+        if (ret == 0)
+            ret = CEscape(escaped, '=', out, &i, *outLen, 1);
     } 
 
-    out[i++] = '\n';
-    if (i != outSz)
-        return ASN_INPUT_E; 
-    *outLen = outSz;
+    if (ret == 0) 
+        ret = CEscape(escaped, '\n', out, &i, *outLen, 1);
 
-    return 0; 
+    if (i != outSz && escaped == 0 && ret == 0)
+        return ASN_INPUT_E; 
+
+    *outLen = i;
+    return ret; 
+}
+
+
+/* Base64 Encode, PEM style, with \n line endings */
+int Base64_Encode(const byte* in, word32 inLen, byte* out, word32* outLen)
+{
+    return DoBase64_Encode(in, inLen, out, outLen, 0);
+}
+
+
+/* Base64 Encode, with %0A esacped line endings instead of \n */
+int Base64_EncodeEsc(const byte* in, word32 inLen, byte* out, word32* outLen)
+{
+    return DoBase64_Encode(in, inLen, out, outLen, 1);
 }
 
 
diff --git a/ctaocrypt/src/des3.c b/ctaocrypt/src/des3.c
index c5e7ef580..cdccaaaea 100644
--- a/ctaocrypt/src/des3.c
+++ b/ctaocrypt/src/des3.c
@@ -413,6 +413,187 @@ void Des3_SetKey(Des3* des3, const byte* key, const byte* iv, int dir)
     }
 }
 
+#elif defined FREESCALE_MMCAU
+    /*
+     * Freescale mmCAU hardware DES/3DES support through the CAU/mmCAU library.
+     * Documentation located in ColdFire/ColdFire+ CAU and Kinetis mmCAU
+     * Software Library User Guide (See note in README).
+     */
+    #include "cau_api.h"
+
+    const unsigned char parityLookup[128] =
+    {
+        1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,
+        0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,
+        0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,
+        1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0
+     };
+
+    void Des_SetKey(Des* des, const byte* key, const byte* iv, int dir)
+    {
+        int i = 0;
+        byte* dkey = (byte*)des->key;
+
+        XMEMCPY(dkey, key, 8);
+
+        Des_SetIV(des, iv);
+
+        /* fix key parity, if needed */
+        for (i = 0; i < 8; i++) {
+            dkey[i] = ((dkey[i] & 0xFE) | parityLookup[dkey[i] >> 1]);
+        }
+    }
+
+    void Des3_SetKey(Des3* des, const byte* key, const byte* iv, int dir)
+    {
+        int i = 0;
+        byte* dkey1 = (byte*)des->key[0];
+        byte* dkey2 = (byte*)des->key[1];
+        byte* dkey3 = (byte*)des->key[2];
+
+        XMEMCPY(dkey1, key, 8);         /* set key 1 */
+        XMEMCPY(dkey2, key + 8, 8);     /* set key 2 */
+        XMEMCPY(dkey3, key + 16, 8);    /* set key 3 */
+
+        Des3_SetIV(des, iv);
+
+        /* fix key parity if needed */
+        for (i = 0; i < 8; i++)
+           dkey1[i] = ((dkey1[i] & 0xFE) | parityLookup[dkey1[i] >> 1]);
+
+        for (i = 0; i < 8; i++)
+           dkey2[i] = ((dkey2[i] & 0xFE) | parityLookup[dkey2[i] >> 1]);
+
+        for (i = 0; i < 8; i++)
+           dkey3[i] = ((dkey3[i] & 0xFE) | parityLookup[dkey3[i] >> 1]);
+    }
+
+    void Des_CbcEncrypt(Des* des, byte* out, const byte* in, word32 sz)
+    {
+        int i;
+        int offset = 0;
+        int len = sz;
+        byte *iv;
+        byte temp_block[DES_BLOCK_SIZE];
+
+        iv = (byte*)des->reg;
+
+        while (len > 0)
+        {
+            XMEMCPY(temp_block, in + offset, DES_BLOCK_SIZE);
+
+            /* XOR block with IV for CBC */
+            for (i = 0; i < DES_BLOCK_SIZE; i++)
+                temp_block[i] ^= iv[i];
+
+            cau_des_encrypt(temp_block, (byte*)des->key, out + offset);
+
+            len    -= DES_BLOCK_SIZE;
+            offset += DES_BLOCK_SIZE;
+
+            /* store IV for next block */
+            XMEMCPY(iv, out + offset - DES_BLOCK_SIZE, DES_BLOCK_SIZE);
+        }
+
+        return;
+    }
+
+    void Des_CbcDecrypt(Des* des, byte* out, const byte* in, word32 sz)
+    {
+        int i;
+        int offset = 0;
+        int len = sz;
+        byte* iv;
+        byte temp_block[DES_BLOCK_SIZE];
+
+        iv = (byte*)des->reg;
+
+        while (len > 0)
+        {
+            XMEMCPY(temp_block, in + offset, DES_BLOCK_SIZE);
+
+            cau_des_decrypt(in + offset, (byte*)des->key, out + offset);
+
+            /* XOR block with IV for CBC */
+            for (i = 0; i < DES_BLOCK_SIZE; i++)
+                (out + offset)[i] ^= iv[i];
+
+            /* store IV for next block */
+            XMEMCPY(iv, temp_block, DES_BLOCK_SIZE);
+
+            len     -= DES_BLOCK_SIZE;
+            offset += DES_BLOCK_SIZE;
+        }
+
+        return;
+    }
+
+    void Des3_CbcEncrypt(Des3* des, byte* out, const byte* in, word32 sz)
+    {
+        int i;
+        int offset = 0;
+        int len = sz;
+
+        byte *iv;
+        byte temp_block[DES_BLOCK_SIZE];
+
+        iv = (byte*)des->reg;
+
+        while (len > 0)
+        {
+            XMEMCPY(temp_block, in + offset, DES_BLOCK_SIZE);
+
+            /* XOR block with IV for CBC */
+            for (i = 0; i < DES_BLOCK_SIZE; i++)
+                temp_block[i] ^= iv[i];
+
+            cau_des_encrypt(temp_block  , (byte*)des->key[0], out + offset);
+            cau_des_decrypt(out + offset, (byte*)des->key[1], out + offset);
+            cau_des_encrypt(out + offset, (byte*)des->key[2], out + offset);
+
+            len    -= DES_BLOCK_SIZE;
+            offset += DES_BLOCK_SIZE;
+
+            /* store IV for next block */
+            XMEMCPY(iv, out + offset - DES_BLOCK_SIZE, DES_BLOCK_SIZE);
+        }
+
+        return;
+    }
+
+    void Des3_CbcDecrypt(Des3* des, byte* out, const byte* in, word32 sz)
+    {
+        int i;
+        int offset = 0;
+        int len = sz;
+
+        byte* iv;
+        byte temp_block[DES_BLOCK_SIZE];
+
+        iv = (byte*)des->reg;
+
+        while (len > 0)
+        {
+            XMEMCPY(temp_block, in + offset, DES_BLOCK_SIZE);
+
+            cau_des_decrypt(in + offset , (byte*)des->key[2], out + offset);
+            cau_des_encrypt(out + offset, (byte*)des->key[1], out + offset);
+            cau_des_decrypt(out + offset, (byte*)des->key[0], out + offset);
+
+            /* XOR block with IV for CBC */
+            for (i = 0; i < DES_BLOCK_SIZE; i++)
+                (out + offset)[i] ^= iv[i];
+
+            /* store IV for next block */
+            XMEMCPY(iv, temp_block, DES_BLOCK_SIZE);
+
+            len    -= DES_BLOCK_SIZE;
+            offset += DES_BLOCK_SIZE;
+        }
+
+        return;
+    }
+
 #else /* CTaoCrypt software implementation */
 
 /* permuted choice table (key) */
diff --git a/ctaocrypt/src/ecc.c b/ctaocrypt/src/ecc.c
index 0a87e00cb..609a386f8 100644
--- a/ctaocrypt/src/ecc.c
+++ b/ctaocrypt/src/ecc.c
@@ -1997,7 +1997,6 @@ int ecc_export_x963(ecc_key* key, byte* out, word32* outLen)
 int ecc_import_x963(const byte* in, word32 inLen, ecc_key* key)
 {
    int x, err;
-
    
    if (in == NULL || key == NULL)
        return ECC_BAD_ARG_E;
@@ -2144,17 +2143,22 @@ int ecc_sig_size(ecc_key* key)
 
 
 /** Our FP cache */
-static struct {
+typedef struct {
    ecc_point* g;               /* cached COPY of base point */
    ecc_point* LUT[1U<encAlgo = ecAES_128_CBC;
-        options->kdfAlgo = ecHKDF_SHA256;
-        options->macAlgo = ecHMAC_SHA256;
+enum ecCliState {
+    ecCLI_INIT      = 1,    
+    ecCLI_SALT_GET  = 2,    
+    ecCLI_SALT_SET  = 3,    
+    ecCLI_SENT_REQ  = 4,    
+    ecCLI_RECV_RESP = 5,    
+    ecCLI_BAD_STATE = 99    
+};
+
+enum ecSrvState {
+    ecSRV_INIT      = 1,    
+    ecSRV_SALT_GET  = 2,    
+    ecSRV_SALT_SET  = 3,    
+    ecSRV_RECV_REQ  = 4,    
+    ecSRV_SENT_RESP = 5,    
+    ecSRV_BAD_STATE = 99    
+};
+
+
+struct ecEncCtx {
+    byte*     kdfSalt;     /* optional salt for kdf */
+    byte*     kdfInfo;     /* optional info for kdf */
+    byte*     macSalt;     /* optional salt for mac */
+    word32    kdfSaltSz;   /* size of kdfSalt */
+    word32    kdfInfoSz;   /* size of kdfInfo */
+    word32    macSaltSz;   /* size of macSalt */
+    byte      clientSalt[EXCHANGE_SALT_SZ];  /* for msg exchange */
+    byte      serverSalt[EXCHANGE_SALT_SZ];  /* for msg exchange */
+    byte      encAlgo;     /* which encryption type */
+    byte      kdfAlgo;     /* which key derivation function type */
+    byte      macAlgo;     /* which mac function type */
+    byte      protocol;    /* are we REQ_RESP client or server ? */
+    byte      cliSt;       /* protocol state, for sanity checks */
+    byte      srvSt;       /* protocol state, for sanity checks */
+};
+
+
+const byte* ecc_ctx_get_own_salt(ecEncCtx* ctx)
+{
+    if (ctx == NULL || ctx->protocol == 0)
+        return NULL;
+
+    if (ctx->protocol == REQ_RESP_CLIENT) {
+        if (ctx->cliSt == ecCLI_INIT) {
+            ctx->cliSt =  ecCLI_SALT_GET;
+            return ctx->clientSalt;
+        }
+        else {
+            ctx->cliSt = ecCLI_BAD_STATE;
+            return NULL;
+        }
     }
+    else if (ctx->protocol == REQ_RESP_SERVER) {
+        if (ctx->srvSt == ecSRV_INIT) {
+            ctx->srvSt =  ecSRV_SALT_GET;
+            return ctx->serverSalt;
+        }
+        else {
+            ctx->srvSt = ecSRV_BAD_STATE;
+            return NULL;
+        }
+    }
+
+    return NULL;
+}
+
+
+static const char* exchange_info = "Secure Message Exchange";
+
+int ecc_ctx_set_peer_salt(ecEncCtx* ctx, const byte* salt)
+{
+    byte tmp[EXCHANGE_SALT_SZ/2];
+    int  halfSz = EXCHANGE_SALT_SZ/2;
+
+    if (ctx == NULL || ctx->protocol == 0 || salt == NULL)
+        return BAD_FUNC_ARG;
+
+    if (ctx->protocol == REQ_RESP_CLIENT) {
+        XMEMCPY(ctx->serverSalt, salt, EXCHANGE_SALT_SZ);
+        if (ctx->cliSt == ecCLI_SALT_GET)
+            ctx->cliSt =  ecCLI_SALT_SET;
+        else {
+            ctx->cliSt =  ecCLI_BAD_STATE;
+            return BAD_ENC_STATE_E;
+        }
+    }
+    else {
+        XMEMCPY(ctx->clientSalt, salt, EXCHANGE_SALT_SZ);
+        if (ctx->srvSt == ecSRV_SALT_GET)
+            ctx->srvSt =  ecSRV_SALT_SET;
+        else {
+            ctx->srvSt =  ecSRV_BAD_STATE;
+            return BAD_ENC_STATE_E;
+        }
+    }
+
+    /* mix half and half */
+    /* tmp stores 2nd half of client before overwrite */
+    XMEMCPY(tmp, ctx->clientSalt + halfSz, halfSz);
+    XMEMCPY(ctx->clientSalt + halfSz, ctx->serverSalt, halfSz);
+    XMEMCPY(ctx->serverSalt, tmp, halfSz);
+
+    ctx->kdfSalt   = ctx->clientSalt;
+    ctx->kdfSaltSz = EXCHANGE_SALT_SZ;
+
+    ctx->macSalt   = ctx->serverSalt;
+    ctx->macSaltSz = EXCHANGE_SALT_SZ;
+
+    ctx->kdfInfo   = (byte*)exchange_info;
+    ctx->kdfInfoSz = EXCHANGE_INFO_SZ;
+
+    return 0;
+}
+
+
+static int ecc_ctx_set_salt(ecEncCtx* ctx, int flags, RNG* rng)
+{
+    byte* saltBuffer = NULL;
+
+    if (ctx == NULL || rng == NULL || flags == 0) 
+        return BAD_FUNC_ARG;
+
+    saltBuffer = (flags == REQ_RESP_CLIENT) ? ctx->clientSalt : ctx->serverSalt;
+    RNG_GenerateBlock(rng, saltBuffer, EXCHANGE_SALT_SZ);
+
+    return 0;
+}
+
+
+static void ecc_ctx_init(ecEncCtx* ctx, int flags)
+{
+    if (ctx) {
+        XMEMSET(ctx, 0, sizeof(ecEncCtx));
+
+        ctx->encAlgo  = ecAES_128_CBC;
+        ctx->kdfAlgo  = ecHKDF_SHA256;
+        ctx->macAlgo  = ecHMAC_SHA256;
+        ctx->protocol = (byte)flags;
+
+        if (flags == REQ_RESP_CLIENT)
+            ctx->cliSt = ecCLI_INIT;
+        if (flags == REQ_RESP_SERVER)
+            ctx->srvSt = ecSRV_INIT;
+    }
+}
+
+
+/* alloc/init and set defaults, return new Context  */
+ecEncCtx* ecc_ctx_new(int flags, RNG* rng)
+{
+    int       ret = 0;
+    ecEncCtx* ctx = (ecEncCtx*)XMALLOC(sizeof(ecEncCtx), 0, DYNAMIC_TYPE_ECC);
+
+    ecc_ctx_init(ctx, flags);
+
+    if (ctx && flags)
+        ret = ecc_ctx_set_salt(ctx, flags, rng);
+
+    if (ret != 0) {
+        ecc_ctx_free(ctx);
+        ctx = NULL;
+    }
+
+    return ctx;
 }
 
 
 /* free any resources, clear any keys */
-void ecc_encrypt_free_options(ecEncOptions* options)
+void ecc_ctx_free(ecEncCtx* ctx)
 {
-    if (options) {
-        XMEMSET(options, 0, sizeof(ecEncOptions));
+    if (ctx) {
+        XMEMSET(ctx, 0, sizeof(ecEncCtx));
+        XFREE(ctx, 0, DYNAMIC_TYPE_ECC);
     }
 }
 
 
-static int ecc_get_key_sizes(ecEncOptions* options, int* encKeySz, int* ivSz,
+static int ecc_get_key_sizes(ecEncCtx* ctx, int* encKeySz, int* ivSz,
                              int* keysLen, word32* digestSz, word32* blockSz)
 {
-    if (options) {
-        switch (options->encAlgo) {
+    if (ctx) {
+        switch (ctx->encAlgo) {
             case ecAES_128_CBC:
                 *encKeySz = KEY_SIZE_128;
                 *ivSz     = IV_SIZE_64;
@@ -3529,7 +3701,7 @@ static int ecc_get_key_sizes(ecEncOptions* options, int* encKeySz, int* ivSz,
                 return BAD_FUNC_ARG;
         }
 
-        switch (options->macAlgo) {
+        switch (ctx->macAlgo) {
             case ecHMAC_SHA256:
                 *digestSz = SHA256_DIGEST_SIZE;
                 break;
@@ -3546,22 +3718,23 @@ static int ecc_get_key_sizes(ecEncOptions* options, int* encKeySz, int* ivSz,
 
 
 /* ecc encrypt with shared secret run through kdf
-   options holds non default algos and inputs
+   ctx holds non default algos and inputs
    msgSz should be the right size for encAlgo, i.e., already padded 
    return 0 on success */
 int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
-                word32 msgSz, byte* out, word32* outSz, ecEncOptions* opts)
+                word32 msgSz, byte* out, word32* outSz, ecEncCtx* ctx)
 {
     int          ret;
     word32       blockSz;
     word32       digestSz;
-    ecEncOptions options;
+    ecEncCtx     localCtx;
     byte         sharedSecret[ECC_MAXSIZE];  /* 521 max size */
     byte         keys[ECC_BUFSIZE];         /* max size */
     word32       sharedSz = sizeof(sharedSecret);
     int          keysLen;
     int          encKeySz;
     int          ivSz;
+    int          offset = 0;         /* keys offset if doing msg exchange */
     byte*        encKey;
     byte*        encIv;
     byte*        macKey;
@@ -3570,19 +3743,37 @@ int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
                            outSz  == NULL)
         return BAD_FUNC_ARG;
 
-    if (opts)
-        options = *opts;
-    else  {
-        ecc_encrypt_init_options(&options); /* defaults */
+    if (ctx == NULL) {  /* use defaults */
+        ecc_ctx_init(&localCtx, 0);
+        ctx = &localCtx;  
     }
         
-    ret = ecc_get_key_sizes(&options, &encKeySz, &ivSz, &keysLen, &digestSz,
+    ret = ecc_get_key_sizes(ctx, &encKeySz, &ivSz, &keysLen, &digestSz,
                             &blockSz);
     if (ret != 0)
         return ret;
+
+    if (ctx->protocol == REQ_RESP_SERVER) {
+        offset = keysLen;
+        keysLen *= 2;
+
+        if (ctx->srvSt != ecSRV_RECV_REQ)
+            return BAD_ENC_STATE_E;
+
+        ctx->srvSt = ecSRV_BAD_STATE; /* we're done no more ops allowed */
+    }
+    else if (ctx->protocol == REQ_RESP_CLIENT) {
+        if (ctx->cliSt != ecCLI_SALT_SET)
+            return BAD_ENC_STATE_E;
+
+        ctx->cliSt = ecCLI_SENT_REQ; /* only do this once */
+    }
+        
+    if (keysLen > (int)sizeof(keys))
+        return BUFFER_E;
         
     if ( (msgSz%blockSz) != 0)
-        return BAD_FUNC_ARG;
+        return BAD_PADDING_E;
 
     if (*outSz < (msgSz + digestSz))
         return BUFFER_E;
@@ -3591,11 +3782,11 @@ int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
     if (ret != 0)
         return ret;
 
-    switch (options.kdfAlgo) {
+    switch (ctx->kdfAlgo) {
         case ecHKDF_SHA256 :
-                ret = HKDF(SHA256, sharedSecret, sharedSz, options.kdfSalt,
-                           options.kdfSaltSz, options.kdfInfo,
-                           options.kdfInfoSz, keys, keysLen);
+                ret = HKDF(SHA256, sharedSecret, sharedSz, ctx->kdfSalt,
+                           ctx->kdfSaltSz, ctx->kdfInfo,
+                           ctx->kdfInfoSz, keys, keysLen);
                 if (ret != 0)
                     return ret;
             break;
@@ -3604,11 +3795,11 @@ int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
             return BAD_FUNC_ARG;
     }
 
-    encKey = keys;
+    encKey = keys + offset;
     encIv  = encKey + encKeySz;
     macKey = encKey + encKeySz + ivSz;
 
-    switch (options.encAlgo) {
+    switch (ctx->encAlgo) {
         case ecAES_128_CBC:
             {
                 Aes aes;
@@ -3625,7 +3816,7 @@ int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
             return BAD_FUNC_ARG;
     }
 
-    switch (options.macAlgo) {
+    switch (ctx->macAlgo) {
         case ecHMAC_SHA256:
             {
                 Hmac hmac;
@@ -3633,7 +3824,7 @@ int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
                 if (ret != 0)
                     return ret;
                 HmacUpdate(&hmac, out, msgSz);
-                HmacUpdate(&hmac, options.macSalt, options.macSaltSz);
+                HmacUpdate(&hmac, ctx->macSalt, ctx->macSaltSz);
                 HmacFinal(&hmac, out+msgSz);
             }
             break;
@@ -3648,19 +3839,23 @@ int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
 }
 
 
+/* ecc decrypt with shared secret run through kdf
+   ctx holds non default algos and inputs
+   return 0 on success */
 int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
-                word32 msgSz, byte* out, word32* outSz, ecEncOptions* opts)
+                word32 msgSz, byte* out, word32* outSz, ecEncCtx* ctx)
 {
     int          ret;
     word32       blockSz;
     word32       digestSz;
-    ecEncOptions options;
+    ecEncCtx     localCtx;
     byte         sharedSecret[ECC_MAXSIZE];  /* 521 max size */
     byte         keys[ECC_BUFSIZE];         /* max size */
     word32       sharedSz = sizeof(sharedSecret);
     int          keysLen;
     int          encKeySz;
     int          ivSz;
+    int          offset = 0;       /* in case using msg exchange */
     byte*        encKey;
     byte*        encIv;
     byte*        macKey;
@@ -3669,19 +3864,37 @@ int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
                            outSz  == NULL)
         return BAD_FUNC_ARG;
 
-    if (opts)
-        options = *opts;
-    else  {
-        ecc_encrypt_init_options(&options); /* defaults */
+    if (ctx == NULL) {  /* use defaults */
+        ecc_ctx_init(&localCtx, 0);
+        ctx = &localCtx;  
     }
-
-    ret = ecc_get_key_sizes(&options, &encKeySz, &ivSz, &keysLen, &digestSz,
+        
+    ret = ecc_get_key_sizes(ctx, &encKeySz, &ivSz, &keysLen, &digestSz,
                             &blockSz);
     if (ret != 0)
         return ret;
         
+    if (ctx->protocol == REQ_RESP_CLIENT) {
+        offset = keysLen;
+        keysLen *= 2;
+
+        if (ctx->cliSt != ecCLI_SENT_REQ)
+            return BAD_ENC_STATE_E;
+
+        ctx->cliSt = ecSRV_BAD_STATE; /* we're done no more ops allowed */
+    }
+    else if (ctx->protocol == REQ_RESP_SERVER) {
+        if (ctx->srvSt != ecSRV_SALT_SET)
+            return BAD_ENC_STATE_E;
+
+        ctx->srvSt = ecSRV_RECV_REQ; /* only do this once */
+    }
+        
+    if (keysLen > (int)sizeof(keys))
+        return BUFFER_E;
+        
     if ( ((msgSz-digestSz) % blockSz) != 0)
-        return BAD_FUNC_ARG;
+        return BAD_PADDING_E;
 
     if (*outSz < (msgSz - digestSz))
         return BUFFER_E;
@@ -3690,11 +3903,11 @@ int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
     if (ret != 0)
         return ret;
 
-    switch (options.kdfAlgo) {
+    switch (ctx->kdfAlgo) {
         case ecHKDF_SHA256 :
-                ret = HKDF(SHA256, sharedSecret, sharedSz, options.kdfSalt,
-                           options.kdfSaltSz, options.kdfInfo,
-                           options.kdfInfoSz, keys, keysLen);
+                ret = HKDF(SHA256, sharedSecret, sharedSz, ctx->kdfSalt,
+                           ctx->kdfSaltSz, ctx->kdfInfo,
+                           ctx->kdfInfoSz, keys, keysLen);
                 if (ret != 0)
                     return ret;
             break;
@@ -3703,11 +3916,11 @@ int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
             return BAD_FUNC_ARG;
     }
 
-    encKey = keys;
+    encKey = keys + offset;
     encIv  = encKey + encKeySz;
     macKey = encKey + encKeySz + ivSz;
 
-    switch (options.macAlgo) {
+    switch (ctx->macAlgo) {
         case ecHMAC_SHA256:
             {
                 byte verify[SHA256_DIGEST_SIZE];
@@ -3716,7 +3929,7 @@ int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
                 if (ret != 0)
                     return ret;
                 HmacUpdate(&hmac, msg, msgSz-digestSz);
-                HmacUpdate(&hmac, options.macSalt, options.macSaltSz);
+                HmacUpdate(&hmac, ctx->macSalt, ctx->macSaltSz);
                 HmacFinal(&hmac, verify);
 
                 if (memcmp(verify, msg + msgSz - digestSz, digestSz) != 0) {
@@ -3729,7 +3942,7 @@ int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
             return BAD_FUNC_ARG;
     }
 
-    switch (options.encAlgo) {
+    switch (ctx->encAlgo) {
         case ecAES_128_CBC:
             {
                 Aes aes;
diff --git a/ctaocrypt/src/error.c b/ctaocrypt/src/error.c
index e6b4eaf3b..d7ed45194 100644
--- a/ctaocrypt/src/error.c
+++ b/ctaocrypt/src/error.c
@@ -323,6 +323,26 @@ void CTaoCryptErrorString(int error, char* buffer)
         XSTRNCPY(buffer, "ASN OCSP sig error, confirm failure", max);
         break;
 
+    case BAD_ENC_STATE_E:
+        XSTRNCPY(buffer, "Bad ecc encrypt state operation", max);
+        break;
+
+    case BAD_PADDING_E:
+        XSTRNCPY(buffer, "Bad padding, message wrong length", max);
+        break;
+
+    case REQ_ATTRIBUTE_E:
+        XSTRNCPY(buffer, "Setting cert request attributes error", max);
+        break;
+
+    case PKCS7_OID_E:
+        XSTRNCPY(buffer, "PKCS#7 error: mismatched OID value", max);
+        break;
+
+    case PKCS7_RECIP_E:
+        XSTRNCPY(buffer, "PKCS#7 error: no matching recipient found", max);
+        break;
+
     default:
         XSTRNCPY(buffer, "unknown error number", max);
 
diff --git a/ctaocrypt/src/fp_sqr_comba_12.i b/ctaocrypt/src/fp_sqr_comba_12.i
index 7ecb7c9e1..2f068c7d9 100644
--- a/ctaocrypt/src/fp_sqr_comba_12.i
+++ b/ctaocrypt/src/fp_sqr_comba_12.i
@@ -24,7 +24,9 @@
 void fp_sqr_comba12(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[24], c0, c1, c2, sc0, sc1, sc2;
-
+#ifdef TFM_ISO
+   fp_word tt;
+#endif
    a = A->dp;
    COMBA_START; 
 
diff --git a/ctaocrypt/src/fp_sqr_comba_17.i b/ctaocrypt/src/fp_sqr_comba_17.i
index fcd4daa5e..db34b1a78 100644
--- a/ctaocrypt/src/fp_sqr_comba_17.i
+++ b/ctaocrypt/src/fp_sqr_comba_17.i
@@ -24,6 +24,9 @@
 void fp_sqr_comba17(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[34], c0, c1, c2, sc0, sc1, sc2;
+#ifdef TFM_ISO
+   fp_word tt;
+#endif
 
    a = A->dp;
    COMBA_START; 
diff --git a/ctaocrypt/src/fp_sqr_comba_3.i b/ctaocrypt/src/fp_sqr_comba_3.i
index 6cf7faf1a..fea21d183 100644
--- a/ctaocrypt/src/fp_sqr_comba_3.i
+++ b/ctaocrypt/src/fp_sqr_comba_3.i
@@ -24,6 +24,9 @@
 void fp_sqr_comba3(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[6], c0, c1, c2;
+#ifdef TFM_ISO
+   fp_word tt;
+#endif
 
    a = A->dp;
    COMBA_START; 
diff --git a/ctaocrypt/src/fp_sqr_comba_4.i b/ctaocrypt/src/fp_sqr_comba_4.i
index 71c3c87af..7b7eefa6f 100644
--- a/ctaocrypt/src/fp_sqr_comba_4.i
+++ b/ctaocrypt/src/fp_sqr_comba_4.i
@@ -24,6 +24,9 @@
 void fp_sqr_comba4(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[8], c0, c1, c2;
+#ifdef TFM_ISO
+   fp_word tt;
+#endif
 
    a = A->dp;
    COMBA_START; 
diff --git a/ctaocrypt/src/fp_sqr_comba_6.i b/ctaocrypt/src/fp_sqr_comba_6.i
index 189f339a4..dc7028138 100644
--- a/ctaocrypt/src/fp_sqr_comba_6.i
+++ b/ctaocrypt/src/fp_sqr_comba_6.i
@@ -24,6 +24,9 @@
 void fp_sqr_comba6(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[12], c0, c1, c2, sc0, sc1, sc2;
+#ifdef TFM_ISO
+   fp_word tt;
+#endif
 
    a = A->dp;
    COMBA_START; 
diff --git a/ctaocrypt/src/fp_sqr_comba_7.i b/ctaocrypt/src/fp_sqr_comba_7.i
index 1a0cd2c19..7ba664e2f 100644
--- a/ctaocrypt/src/fp_sqr_comba_7.i
+++ b/ctaocrypt/src/fp_sqr_comba_7.i
@@ -24,6 +24,9 @@
 void fp_sqr_comba7(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[14], c0, c1, c2, sc0, sc1, sc2;
+#ifdef TFM_ISO
+   fp_word tt;
+#endif
 
    a = A->dp;
    COMBA_START; 
diff --git a/ctaocrypt/src/fp_sqr_comba_8.i b/ctaocrypt/src/fp_sqr_comba_8.i
index b71feae3b..24efa52cb 100644
--- a/ctaocrypt/src/fp_sqr_comba_8.i
+++ b/ctaocrypt/src/fp_sqr_comba_8.i
@@ -24,6 +24,9 @@
 void fp_sqr_comba8(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[16], c0, c1, c2, sc0, sc1, sc2;
+#ifdef TFM_ISO
+   fp_word   tt;   
+#endif   
 
    a = A->dp;
    COMBA_START; 
diff --git a/ctaocrypt/src/fp_sqr_comba_9.i b/ctaocrypt/src/fp_sqr_comba_9.i
index 1db06de22..e9cc21665 100644
--- a/ctaocrypt/src/fp_sqr_comba_9.i
+++ b/ctaocrypt/src/fp_sqr_comba_9.i
@@ -24,6 +24,9 @@
 void fp_sqr_comba9(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[18], c0, c1, c2, sc0, sc1, sc2;
+#ifdef TFM_ISO
+   fp_word tt;
+#endif
 
    a = A->dp;
    COMBA_START; 
diff --git a/ctaocrypt/src/integer.c b/ctaocrypt/src/integer.c
index d3cb044b8..88e16d57c 100644
--- a/ctaocrypt/src/integer.c
+++ b/ctaocrypt/src/integer.c
@@ -3765,7 +3765,7 @@ int mp_sqrmod (mp_int * a, mp_int * b, mp_int * c)
 #endif
 
 
-#if defined(HAVE_ECC) || !defined(NO_PWDBASED) || defined(CYASSL_SNIFFER)
+#if defined(HAVE_ECC) || !defined(NO_PWDBASED) || defined(CYASSL_SNIFFER) || defined(CYASSL_HAVE_WOLFSCEP)
 
 /* single digit addition */
 int mp_add_d (mp_int* a, mp_digit b, mp_int* c)
diff --git a/ctaocrypt/src/md5.c b/ctaocrypt/src/md5.c
index 176bf44cd..7d2fe1429 100644
--- a/ctaocrypt/src/md5.c
+++ b/ctaocrypt/src/md5.c
@@ -36,6 +36,13 @@
     #include 
 #endif
 
+#ifdef FREESCALE_MMCAU
+    #include "cau_api.h"
+    #define XTRANSFORM(S,B)  cau_md5_hash_n((B), 1, (unsigned char*)(S)->digest)
+#else
+    #define XTRANSFORM(S,B)  Transform((S))
+#endif
+
 
 #ifdef STM32F2_HASH
     /*
@@ -174,6 +181,7 @@ void InitMd5(Md5* md5)
     md5->hiLen   = 0;
 }
 
+#ifndef FREESCALE_MMCAU
 
 static void Transform(Md5* md5)
 {
@@ -266,6 +274,8 @@ static void Transform(Md5* md5)
     md5->digest[3] += d;
 }
 
+#endif /* FREESCALE_MMCAU */
+
 
 static INLINE void AddLength(Md5* md5, word32 len)
 {
@@ -289,10 +299,10 @@ void Md5Update(Md5* md5, const byte* data, word32 len)
         len          -= add;
 
         if (md5->buffLen == MD5_BLOCK_SIZE) {
-            #ifdef BIG_ENDIAN_ORDER
+            #if defined(BIG_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
                 ByteReverseBytes(local, local, MD5_BLOCK_SIZE);
             #endif
-            Transform(md5);
+            XTRANSFORM(md5, local);
             AddLength(md5, MD5_BLOCK_SIZE);
             md5->buffLen = 0;
         }
@@ -304,7 +314,7 @@ void Md5Final(Md5* md5, byte* hash)
 {
     byte* local = (byte*)md5->buffer;
 
-    AddLength(md5, md5->buffLen);               /* before adding pads */
+    AddLength(md5, md5->buffLen);  /* before adding pads */
 
     local[md5->buffLen++] = 0x80;  /* add 1 */
 
@@ -313,10 +323,10 @@ void Md5Final(Md5* md5, byte* hash)
         XMEMSET(&local[md5->buffLen], 0, MD5_BLOCK_SIZE - md5->buffLen);
         md5->buffLen += MD5_BLOCK_SIZE - md5->buffLen;
 
-        #ifdef BIG_ENDIAN_ORDER
+        #if defined(BIG_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
             ByteReverseBytes(local, local, MD5_BLOCK_SIZE);
         #endif
-        Transform(md5);
+        XTRANSFORM(md5, local);
         md5->buffLen = 0;
     }
     XMEMSET(&local[md5->buffLen], 0, MD5_PAD_SIZE - md5->buffLen);
@@ -327,14 +337,14 @@ void Md5Final(Md5* md5, byte* hash)
     md5->loLen = md5->loLen << 3;
 
     /* store lengths */
-    #ifdef BIG_ENDIAN_ORDER
+    #if defined(BIG_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
         ByteReverseBytes(local, local, MD5_BLOCK_SIZE);
     #endif
     /* ! length ordering dependent on digest endian type ! */
     XMEMCPY(&local[MD5_PAD_SIZE], &md5->loLen, sizeof(word32));
     XMEMCPY(&local[MD5_PAD_SIZE + sizeof(word32)], &md5->hiLen, sizeof(word32));
 
-    Transform(md5);
+    XTRANSFORM(md5, local);
     #ifdef BIG_ENDIAN_ORDER
         ByteReverseWords(md5->digest, md5->digest, MD5_DIGEST_SIZE);
     #endif
diff --git a/ctaocrypt/src/pkcs7.c b/ctaocrypt/src/pkcs7.c
new file mode 100644
index 000000000..d1f79eefb
--- /dev/null
+++ b/ctaocrypt/src/pkcs7.c
@@ -0,0 +1,1348 @@
+/* pkcs7.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+
+#ifdef HAVE_PKCS7
+
+#include 
+#include 
+#include 
+
+#ifndef min
+    static INLINE word32 min(word32 a, word32 b)
+    {
+        return a > b ? b : a;
+    }
+#endif
+
+
+/* placed ASN.1 contentType OID into *output, return idx on success,
+ * 0 upon failure */
+CYASSL_LOCAL int SetContentType(int pkcs7TypeOID, byte* output)
+{
+    /* PKCS#7 content types, RFC 2315, section 14 */
+    static const byte pkcs7[]              = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                               0x0D, 0x01, 0x07 };
+    static const byte data[]               = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                               0x0D, 0x01, 0x07, 0x01 };
+    static const byte signedData[]         = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                               0x0D, 0x01, 0x07, 0x02};
+    static const byte envelopedData[]      = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                               0x0D, 0x01, 0x07, 0x03 };
+    static const byte signedAndEnveloped[] = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                               0x0D, 0x01, 0x07, 0x04 };
+    static const byte digestedData[]       = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                               0x0D, 0x01, 0x07, 0x05 };
+    static const byte encryptedData[]      = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                               0x0D, 0x01, 0x07, 0x06 };
+
+    int idSz;
+    int typeSz = 0, idx = 0;
+    const byte* typeName = 0;
+    byte ID_Length[MAX_LENGTH_SZ];
+
+    switch (pkcs7TypeOID) {
+        case PKCS7_MSG:
+            typeSz = sizeof(pkcs7);
+            typeName = pkcs7;
+            break;
+
+        case DATA:
+            typeSz = sizeof(data);
+            typeName = data;
+            break;
+
+        case SIGNED_DATA:
+            typeSz = sizeof(signedData);
+            typeName = signedData;
+            break;
+        
+        case ENVELOPED_DATA:
+            typeSz = sizeof(envelopedData);
+            typeName = envelopedData;
+            break;
+
+        case SIGNED_AND_ENVELOPED_DATA:
+            typeSz = sizeof(signedAndEnveloped);
+            typeName = signedAndEnveloped;
+            break;
+
+        case DIGESTED_DATA:
+            typeSz = sizeof(digestedData);
+            typeName = digestedData;
+            break;
+
+        case ENCRYPTED_DATA:
+            typeSz = sizeof(encryptedData);
+            typeName = encryptedData;
+            break;
+
+        default:
+            CYASSL_MSG("Unknown PKCS#7 Type");
+            return 0;
+    };
+
+    idSz  = SetLength(typeSz, ID_Length);
+    output[idx++] = ASN_OBJECT_ID;
+    XMEMCPY(output + idx, ID_Length, idSz);
+    idx += idSz;
+    XMEMCPY(output + idx, typeName, typeSz);
+    idx += typeSz;
+
+    return idx;
+
+}
+
+
+/* get ASN.1 contentType OID sum, return 0 on success, <0 on failure */
+int GetContentType(const byte* input, word32* inOutIdx, word32* oid,
+                   word32 maxIdx)
+{
+    int length;
+    word32 i = *inOutIdx;
+    byte b;
+    *oid = 0;
+
+    CYASSL_ENTER("GetContentType");
+
+    b = input[i++];
+    if (b != ASN_OBJECT_ID)
+        return ASN_OBJECT_ID_E;
+
+    if (GetLength(input, &i, &length, maxIdx) < 0)
+        return ASN_PARSE_E;
+
+    while(length--) {
+        *oid += input[i];
+        i++;
+    }
+
+    *inOutIdx = i;
+
+    return 0;
+}
+
+
+/* init PKCS7 struct with recipient cert, decode into DecodedCert */
+int PKCS7_InitWithCert(PKCS7* pkcs7, byte* cert, word32 certSz)
+{
+    int ret = 0;
+
+    XMEMSET(pkcs7, 0, sizeof(PKCS7));
+    if (cert != NULL && certSz > 0) {
+        DecodedCert dCert;
+
+        pkcs7->singleCert = cert;
+        pkcs7->singleCertSz = certSz;
+        InitDecodedCert(&dCert, cert, certSz, 0);
+
+        ret = ParseCert(&dCert, CA_TYPE, NO_VERIFY, 0);
+        if (ret < 0) {
+            FreeDecodedCert(&dCert);
+            return ret;
+        }
+        XMEMCPY(pkcs7->publicKey, dCert.publicKey, dCert.pubKeySize);
+        pkcs7->publicKeySz = dCert.pubKeySize;
+        XMEMCPY(pkcs7->issuerHash, dCert.issuerHash, SHA_SIZE);
+        pkcs7->issuer = dCert.issuerRaw;
+        pkcs7->issuerSz = dCert.issuerRawLen;
+        XMEMCPY(pkcs7->issuerSn, dCert.serial, dCert.serialSz);
+        pkcs7->issuerSnSz = dCert.serialSz;
+        FreeDecodedCert(&dCert);
+    }
+
+    return ret;
+}
+
+
+/* releases any memory allocated by a PKCS7 initializer */
+void PKCS7_Free(PKCS7* pkcs7)
+{
+    (void)pkcs7;
+}
+
+
+/* build PKCS#7 data content type */
+int PKCS7_EncodeData(PKCS7* pkcs7, byte* output, word32 outputSz)
+{
+    static const byte oid[] =
+        { ASN_OBJECT_ID, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01,
+                         0x07, 0x01 };
+    byte seq[MAX_SEQ_SZ];
+    byte octetStr[MAX_OCTET_STR_SZ];
+    word32 seqSz;
+    word32 octetStrSz;
+    word32 oidSz = (word32)sizeof(oid);
+    int idx = 0;
+
+    octetStrSz = SetOctetString(pkcs7->contentSz, octetStr);
+    seqSz = SetSequence(pkcs7->contentSz + octetStrSz + oidSz, seq);
+
+    if (outputSz < pkcs7->contentSz + octetStrSz + oidSz + seqSz)
+        return BUFFER_E;
+
+    XMEMCPY(output, seq, seqSz);
+    idx += seqSz;
+    XMEMCPY(output + idx, oid, oidSz);
+    idx += oidSz;
+    XMEMCPY(output + idx, octetStr, octetStrSz);
+    idx += octetStrSz;
+    XMEMCPY(output + idx, pkcs7->content, pkcs7->contentSz);
+    idx += pkcs7->contentSz;
+
+    return idx;
+}
+
+
+typedef struct EncodedAttrib {
+    byte valueSeq[MAX_SEQ_SZ];
+        const byte* oid;
+        byte valueSet[MAX_SET_SZ];
+        const byte* value;
+    word32 valueSeqSz, oidSz, idSz, valueSetSz, valueSz, totalSz;
+} EncodedAttrib;
+
+
+typedef struct ESD {
+    Sha sha;
+    byte contentDigest[SHA_DIGEST_SIZE + 2]; /* content only + ASN.1 heading */
+    byte contentAttribsDigest[SHA_DIGEST_SIZE];
+    byte encContentDigest[512];
+
+    byte outerSeq[MAX_SEQ_SZ];
+        byte outerContent[MAX_EXP_SZ];
+            byte innerSeq[MAX_SEQ_SZ];
+                byte version[MAX_VERSION_SZ];
+                byte digAlgoIdSet[MAX_SET_SZ];
+                    byte singleDigAlgoId[MAX_ALGO_SZ];
+
+                byte contentInfoSeq[MAX_SEQ_SZ];
+                    byte innerContSeq[MAX_EXP_SZ];
+                        byte innerOctets[MAX_OCTET_STR_SZ];
+
+                byte certsSet[MAX_SET_SZ];
+
+                byte signerInfoSet[MAX_SET_SZ];
+                    byte signerInfoSeq[MAX_SEQ_SZ];
+                        byte signerVersion[MAX_VERSION_SZ];
+                        byte issuerSnSeq[MAX_SEQ_SZ];
+                            byte issuerName[MAX_SEQ_SZ];
+                            byte issuerSn[MAX_SN_SZ];
+                        byte signerDigAlgoId[MAX_ALGO_SZ];
+                        byte digEncAlgoId[MAX_ALGO_SZ];
+                        byte signedAttribSet[MAX_SET_SZ];
+                            EncodedAttrib signedAttribs[6];
+                        byte signerDigest[MAX_OCTET_STR_SZ];
+    word32 innerOctetsSz, innerContSeqSz, contentInfoSeqSz;
+    word32 outerSeqSz, outerContentSz, innerSeqSz, versionSz, digAlgoIdSetSz,
+           singleDigAlgoIdSz, certsSetSz;
+    word32 signerInfoSetSz, signerInfoSeqSz, signerVersionSz,
+           issuerSnSeqSz, issuerNameSz, issuerSnSz,
+           signerDigAlgoIdSz, digEncAlgoIdSz, signerDigestSz;
+    word32 encContentDigestSz, signedAttribsSz, signedAttribsCount,
+           signedAttribSetSz;
+} ESD;
+
+
+static int EncodeAttributes(EncodedAttrib* ea, int eaSz,
+                                            PKCS7Attrib* attribs, int attribsSz)
+{
+    int i;
+    int maxSz = min(eaSz, attribsSz);
+    int allAttribsSz = 0;
+
+    for (i = 0; i < maxSz; i++)
+    {
+        int attribSz = 0;
+
+        ea[i].value = attribs[i].value;
+        ea[i].valueSz = attribs[i].valueSz;
+        attribSz += ea[i].valueSz;
+        ea[i].valueSetSz = SetSet(attribSz, ea[i].valueSet);
+        attribSz += ea[i].valueSetSz;
+        ea[i].oid = attribs[i].oid;
+        ea[i].oidSz = attribs[i].oidSz;
+        attribSz += ea[i].oidSz;
+        ea[i].valueSeqSz = SetSequence(attribSz, ea[i].valueSeq);
+        attribSz += ea[i].valueSeqSz;
+        ea[i].totalSz = attribSz;
+
+        allAttribsSz += attribSz;
+    }
+    return allAttribsSz;
+}
+
+
+static int FlattenAttributes(byte* output, EncodedAttrib* ea, int eaSz)
+{
+    int i, idx;
+
+    idx = 0;
+    for (i = 0; i < eaSz; i++) {
+        XMEMCPY(output + idx, ea[i].valueSeq, ea[i].valueSeqSz);
+        idx += ea[i].valueSeqSz;
+        XMEMCPY(output + idx, ea[i].oid, ea[i].oidSz);
+        idx += ea[i].oidSz;
+        XMEMCPY(output + idx, ea[i].valueSet, ea[i].valueSetSz);
+        idx += ea[i].valueSetSz;
+        XMEMCPY(output + idx, ea[i].value, ea[i].valueSz);
+        idx += ea[i].valueSz;
+    }
+    return 0;
+}
+
+
+/* build PKCS#7 signedData content type */
+int PKCS7_EncodeSignedData(PKCS7* pkcs7, byte* output, word32 outputSz)
+{
+    static const byte outerOid[] =
+        { ASN_OBJECT_ID, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01,
+                         0x07, 0x02 };
+    static const byte innerOid[] =
+        { ASN_OBJECT_ID, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01,
+                         0x07, 0x01 };
+
+    ESD esd;
+    word32 signerInfoSz = 0;
+    word32 totalSz = 0;
+    int idx = 0;
+    byte* flatSignedAttribs = NULL;
+    word32 flatSignedAttribsSz = 0;
+    word32 innerOidSz = sizeof(innerOid);
+    word32 outerOidSz = sizeof(outerOid);
+
+    if (pkcs7 == NULL || pkcs7->content == NULL || pkcs7->contentSz == 0 ||
+        pkcs7->encryptOID == 0 || pkcs7->hashOID == 0 || pkcs7->rng == 0 ||
+        pkcs7->singleCert == NULL || pkcs7->singleCertSz == 0 ||
+        pkcs7->privateKey == NULL || pkcs7->privateKeySz == 0 ||
+        output == NULL || outputSz == 0)
+        return BAD_FUNC_ARG;
+
+    XMEMSET(&esd, 0, sizeof(esd));
+    InitSha(&esd.sha);
+
+    if (pkcs7->contentSz != 0)
+    {
+        ShaUpdate(&esd.sha, pkcs7->content, pkcs7->contentSz);
+        esd.contentDigest[0] = ASN_OCTET_STRING;
+        esd.contentDigest[1] = SHA_DIGEST_SIZE;
+        ShaFinal(&esd.sha, &esd.contentDigest[2]);
+    }
+
+    esd.innerOctetsSz = SetOctetString(pkcs7->contentSz, esd.innerOctets);
+    esd.innerContSeqSz = SetExplicit(0, esd.innerOctetsSz + pkcs7->contentSz,
+                                esd.innerContSeq);
+    esd.contentInfoSeqSz = SetSequence(pkcs7->contentSz + esd.innerOctetsSz +
+                                    innerOidSz + esd.innerContSeqSz,
+                                    esd.contentInfoSeq);
+
+    esd.issuerSnSz = SetSerialNumber(pkcs7->issuerSn, pkcs7->issuerSnSz,
+                                     esd.issuerSn);
+    signerInfoSz += esd.issuerSnSz;
+    esd.issuerNameSz = SetSequence(pkcs7->issuerSz, esd.issuerName);
+    signerInfoSz += esd.issuerNameSz + pkcs7->issuerSz;
+    esd.issuerSnSeqSz = SetSequence(signerInfoSz, esd.issuerSnSeq);
+    signerInfoSz += esd.issuerSnSeqSz;
+    esd.signerVersionSz = SetMyVersion(1, esd.signerVersion, 0);
+    signerInfoSz += esd.signerVersionSz;
+    esd.signerDigAlgoIdSz = SetAlgoID(pkcs7->hashOID, esd.signerDigAlgoId,
+                                      hashType, 0);
+    signerInfoSz += esd.signerDigAlgoIdSz;
+    esd.digEncAlgoIdSz = SetAlgoID(pkcs7->encryptOID, esd.digEncAlgoId,
+                                   keyType, 0);
+    signerInfoSz += esd.digEncAlgoIdSz;
+
+    if (pkcs7->signedAttribsSz != 0) {
+        byte contentTypeOid[] =
+                { ASN_OBJECT_ID, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xF7, 0x0d, 0x01,
+                                 0x09, 0x03 };
+        byte contentType[] =
+                { ASN_OBJECT_ID, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01,
+                                 0x07, 0x01 };
+        byte messageDigestOid[] =
+                { ASN_OBJECT_ID, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01,
+                                 0x09, 0x04 };
+
+        PKCS7Attrib cannedAttribs[2] =
+        {
+            { contentTypeOid, sizeof(contentTypeOid),
+                             contentType, sizeof(contentType) },
+            { messageDigestOid, sizeof(messageDigestOid),
+                             esd.contentDigest, sizeof(esd.contentDigest) }
+        };
+        word32 cannedAttribsCount = sizeof(cannedAttribs)/sizeof(PKCS7Attrib);
+
+        esd.signedAttribsCount += cannedAttribsCount;
+        esd.signedAttribsSz += EncodeAttributes(&esd.signedAttribs[0], 2,
+                                             cannedAttribs, cannedAttribsCount);
+
+        esd.signedAttribsCount += pkcs7->signedAttribsSz;
+        esd.signedAttribsSz += EncodeAttributes(&esd.signedAttribs[2], 4,
+                                  pkcs7->signedAttribs, pkcs7->signedAttribsSz);
+
+        flatSignedAttribs = (byte*)XMALLOC(esd.signedAttribsSz, 0, NULL);
+        flatSignedAttribsSz = esd.signedAttribsSz;
+        if (flatSignedAttribs == NULL)
+            return MEMORY_E;
+        FlattenAttributes(flatSignedAttribs,
+                                     esd.signedAttribs, esd.signedAttribsCount);
+        esd.signedAttribSetSz = SetImplicit(ASN_SET, 0, esd.signedAttribsSz,
+                                                           esd.signedAttribSet);
+    }
+    /* Calculate the final hash and encrypt it. */
+    {
+        RsaKey privKey;
+        int result;
+        word32 scratch = 0;
+
+        byte digestInfo[MAX_SEQ_SZ + MAX_ALGO_SZ +
+                        MAX_OCTET_STR_SZ + SHA_DIGEST_SIZE];
+        byte digestInfoSeq[MAX_SEQ_SZ];
+        byte digestStr[MAX_OCTET_STR_SZ];
+        word32 digestInfoSeqSz, digestStrSz;
+        int digIdx = 0;
+
+        if (pkcs7->signedAttribsSz != 0) {
+            byte attribSet[MAX_SET_SZ];
+            word32 attribSetSz;
+
+            attribSetSz = SetSet(flatSignedAttribsSz, attribSet);
+
+            InitSha(&esd.sha);
+            ShaUpdate(&esd.sha, attribSet, attribSetSz);
+            ShaUpdate(&esd.sha, flatSignedAttribs, flatSignedAttribsSz);
+        }
+        ShaFinal(&esd.sha, esd.contentAttribsDigest);
+
+        digestStrSz = SetOctetString(SHA_DIGEST_SIZE, digestStr);
+        digestInfoSeqSz = SetSequence(esd.signerDigAlgoIdSz +
+                                      digestStrSz + SHA_DIGEST_SIZE,
+                                      digestInfoSeq);
+
+        XMEMCPY(digestInfo + digIdx, digestInfoSeq, digestInfoSeqSz);
+        digIdx += digestInfoSeqSz;
+        XMEMCPY(digestInfo + digIdx,
+                                    esd.signerDigAlgoId, esd.signerDigAlgoIdSz);
+        digIdx += esd.signerDigAlgoIdSz;
+        XMEMCPY(digestInfo + digIdx, digestStr, digestStrSz);
+        digIdx += digestStrSz;
+        XMEMCPY(digestInfo + digIdx, esd.contentAttribsDigest, SHA_DIGEST_SIZE);
+        digIdx += SHA_DIGEST_SIZE;
+
+        InitRsaKey(&privKey, NULL);
+        result = RsaPrivateKeyDecode(pkcs7->privateKey, &scratch, &privKey,
+                               pkcs7->privateKeySz);
+        if (result < 0) {
+            XFREE(flatSignedAttribs, 0, NULL);
+            return PUBLIC_KEY_E;
+        }
+        result = RsaSSL_Sign(digestInfo, digIdx,
+                             esd.encContentDigest, sizeof(esd.encContentDigest),
+                             &privKey, pkcs7->rng);
+        FreeRsaKey(&privKey);
+        if (result < 0) {
+            XFREE(flatSignedAttribs, 0, NULL);
+            return result;
+        }
+        esd.encContentDigestSz = (word32)result;
+    }
+    signerInfoSz += flatSignedAttribsSz + esd.signedAttribSetSz;
+
+    esd.signerDigestSz = SetOctetString(esd.encContentDigestSz,
+                                                              esd.signerDigest);
+    signerInfoSz += esd.signerDigestSz + esd.encContentDigestSz;
+
+    esd.signerInfoSeqSz = SetSequence(signerInfoSz, esd.signerInfoSeq);
+    signerInfoSz += esd.signerInfoSeqSz;
+    esd.signerInfoSetSz = SetSet(signerInfoSz, esd.signerInfoSet);
+    signerInfoSz += esd.signerInfoSetSz;
+
+    esd.certsSetSz = SetImplicit(ASN_SET, 0, pkcs7->singleCertSz, esd.certsSet);
+
+    esd.singleDigAlgoIdSz = SetAlgoID(pkcs7->hashOID, esd.singleDigAlgoId,
+                                      hashType, 0);
+    esd.digAlgoIdSetSz = SetSet(esd.singleDigAlgoIdSz, esd.digAlgoIdSet);
+
+
+    esd.versionSz = SetMyVersion(1, esd.version, 0);
+
+    totalSz = esd.versionSz + esd.singleDigAlgoIdSz + esd.digAlgoIdSetSz +
+              esd.contentInfoSeqSz + esd.certsSetSz + pkcs7->singleCertSz +
+              esd.innerOctetsSz + esd.innerContSeqSz +
+              innerOidSz + pkcs7->contentSz +
+              signerInfoSz;
+    esd.innerSeqSz = SetSequence(totalSz, esd.innerSeq);
+    totalSz += esd.innerSeqSz;
+    esd.outerContentSz = SetExplicit(0, totalSz, esd.outerContent);
+    totalSz += esd.outerContentSz + outerOidSz;
+    esd.outerSeqSz = SetSequence(totalSz, esd.outerSeq);
+    totalSz += esd.outerSeqSz;
+
+    if (outputSz < totalSz)
+        return BUFFER_E;
+
+    idx = 0;
+    XMEMCPY(output + idx, esd.outerSeq, esd.outerSeqSz);
+    idx += esd.outerSeqSz;
+    XMEMCPY(output + idx, outerOid, outerOidSz);
+    idx += outerOidSz;
+    XMEMCPY(output + idx, esd.outerContent, esd.outerContentSz);
+    idx += esd.outerContentSz;
+    XMEMCPY(output + idx, esd.innerSeq, esd.innerSeqSz);
+    idx += esd.innerSeqSz;
+    XMEMCPY(output + idx, esd.version, esd.versionSz);
+    idx += esd.versionSz;
+    XMEMCPY(output + idx, esd.digAlgoIdSet, esd.digAlgoIdSetSz);
+    idx += esd.digAlgoIdSetSz;
+    XMEMCPY(output + idx, esd.singleDigAlgoId, esd.singleDigAlgoIdSz);
+    idx += esd.singleDigAlgoIdSz;
+    XMEMCPY(output + idx, esd.contentInfoSeq, esd.contentInfoSeqSz);
+    idx += esd.contentInfoSeqSz;
+    XMEMCPY(output + idx, innerOid, innerOidSz);
+    idx += innerOidSz;
+    XMEMCPY(output + idx, esd.innerContSeq, esd.innerContSeqSz);
+    idx += esd.innerContSeqSz;
+    XMEMCPY(output + idx, esd.innerOctets, esd.innerOctetsSz);
+    idx += esd.innerOctetsSz;
+    XMEMCPY(output + idx, pkcs7->content, pkcs7->contentSz);
+    idx += pkcs7->contentSz;
+    XMEMCPY(output + idx, esd.certsSet, esd.certsSetSz);
+    idx += esd.certsSetSz;
+    XMEMCPY(output + idx, pkcs7->singleCert, pkcs7->singleCertSz);
+    idx += pkcs7->singleCertSz;
+    XMEMCPY(output + idx, esd.signerInfoSet, esd.signerInfoSetSz);
+    idx += esd.signerInfoSetSz;
+    XMEMCPY(output + idx, esd.signerInfoSeq, esd.signerInfoSeqSz);
+    idx += esd.signerInfoSeqSz;
+    XMEMCPY(output + idx, esd.signerVersion, esd.signerVersionSz);
+    idx += esd.signerVersionSz;
+    XMEMCPY(output + idx, esd.issuerSnSeq, esd.issuerSnSeqSz);
+    idx += esd.issuerSnSeqSz;
+    XMEMCPY(output + idx, esd.issuerName, esd.issuerNameSz);
+    idx += esd.issuerNameSz;
+    XMEMCPY(output + idx, pkcs7->issuer, pkcs7->issuerSz);
+    idx += pkcs7->issuerSz;
+    XMEMCPY(output + idx, esd.issuerSn, esd.issuerSnSz);
+    idx += esd.issuerSnSz;
+    XMEMCPY(output + idx, esd.signerDigAlgoId, esd.signerDigAlgoIdSz);
+    idx += esd.signerDigAlgoIdSz;
+
+    /* SignerInfo:Attributes */
+    if (pkcs7->signedAttribsSz != 0) {
+        XMEMCPY(output + idx, esd.signedAttribSet, esd.signedAttribSetSz);
+        idx += esd.signedAttribSetSz;
+        XMEMCPY(output + idx, flatSignedAttribs, flatSignedAttribsSz);
+        idx += flatSignedAttribsSz;
+        XFREE(flatSignedAttribs, 0, NULL);
+    }
+
+    XMEMCPY(output + idx, esd.digEncAlgoId, esd.digEncAlgoIdSz);
+    idx += esd.digEncAlgoIdSz;
+    XMEMCPY(output + idx, esd.signerDigest, esd.signerDigestSz);
+    idx += esd.signerDigestSz;
+    XMEMCPY(output + idx, esd.encContentDigest, esd.encContentDigestSz);
+    idx += esd.encContentDigestSz;
+
+    return idx;
+}
+
+
+/* Finds the certificates in the message and saves it. */
+int PKCS7_VerifySignedData(PKCS7* pkcs7, byte* pkiMsg, word32 pkiMsgSz)
+{
+    word32 idx, contentType;
+    int length, version;
+    byte* content = NULL;
+    byte* sig = NULL;
+    byte* cert = NULL;
+    byte* signedAttr = NULL;
+    int contentSz = 0, sigSz = 0, certSz = 0, signedAttrSz = 0;
+
+    (void)signedAttr;    /* not used yet, just set */
+    (void)signedAttrSz;
+
+    if (pkcs7 == NULL || pkiMsg == NULL || pkiMsgSz == 0)
+        return BAD_FUNC_ARG;
+
+    idx = 0;
+
+    /* Get the contentInfo sequence */
+    if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* Get the contentInfo contentType */
+    if (GetContentType(pkiMsg, &idx, &contentType, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (contentType != SIGNED_DATA) {
+        CYASSL_MSG("PKCS#7 input not of type SignedData");
+        return PKCS7_OID_E;
+    }
+
+    /* get the ContentInfo content */
+    if (pkiMsg[idx++] != (ASN_CONSTRUCTED | ASN_CONTEXT_SPECIFIC | 0))
+        return ASN_PARSE_E;
+
+    if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* Get the signedData sequence */
+    if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* Get the version */
+    if (GetMyVersion(pkiMsg, &idx, &version) < 0)
+        return ASN_PARSE_E;
+
+    if (version != 1) {
+        CYASSL_MSG("PKCS#7 signedData needs to be of version 1");
+        return ASN_VERSION_E;
+    }
+
+    /* Get the set of DigestAlgorithmIdentifiers */
+    if (GetSet(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* Skip the set. */
+    idx += length;
+
+    /* Get the inner ContentInfo sequence */
+    if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* Get the inner ContentInfo contentType */
+    if (GetContentType(pkiMsg, &idx, &contentType, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (contentType != DATA) {
+        CYASSL_MSG("PKCS#7 inner input not of type Data");
+        return PKCS7_OID_E;
+    }
+
+    if (pkiMsg[idx++] != (ASN_CONSTRUCTED | ASN_CONTEXT_SPECIFIC | 0))
+        return ASN_PARSE_E;
+
+    if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (pkiMsg[idx++] != ASN_OCTET_STRING)
+        return ASN_PARSE_E;
+
+    if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* Save the inner data as the content. */
+    if (length > 0) {
+        /* Local pointer for calculating hashes later */
+        pkcs7->content = content = &pkiMsg[idx];
+        pkcs7->contentSz = contentSz = length;
+        idx += length;
+    }
+
+    /* Get the implicit[0] set of certificates */
+    if (pkiMsg[idx] == (ASN_CONSTRUCTED | ASN_CONTEXT_SPECIFIC | 0)) {
+        idx++;
+        if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        if (length > 0) {
+            /* At this point, idx is at the first certificate in
+             * a set of certificates. There may be more than one,
+             * or none, or they may be a PKCS 6 extended
+             * certificate. We want to save the first cert if it
+             * is X.509. */
+
+            word32 certIdx = idx;
+
+            if (pkiMsg[certIdx++] == (ASN_CONSTRUCTED | ASN_SEQUENCE)) {
+                if (GetLength(pkiMsg, &certIdx, &certSz, pkiMsgSz) < 0)
+                    return ASN_PARSE_E;
+
+                cert = &pkiMsg[idx];
+                certSz += (certIdx - idx);
+            }
+            PKCS7_InitWithCert(pkcs7, cert, certSz);
+        }
+        idx += length;
+    }
+
+    /* Get the implicit[1] set of crls */
+    if (pkiMsg[idx] == (ASN_CONSTRUCTED | ASN_CONTEXT_SPECIFIC | 1)) {
+        idx++;
+        if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        /* Skip the set */
+        idx += length;
+    }
+
+    /* Get the set of signerInfos */
+    if (GetSet(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (length > 0) {
+        RsaKey key;
+        word32 scratch = 0;
+        int plainSz = 0;
+        byte digest[MAX_SEQ_SZ+MAX_ALGO_SZ+MAX_OCTET_STR_SZ+SHA_DIGEST_SIZE];
+
+        /* Get the sequence of the first signerInfo */
+        if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        /* Get the version */
+        if (GetMyVersion(pkiMsg, &idx, &version) < 0)
+            return ASN_PARSE_E;
+
+        if (version != 1) {
+            CYASSL_MSG("PKCS#7 signerInfo needs to be of version 1");
+            return ASN_VERSION_E;
+        }
+
+        /* Get the sequence of IssuerAndSerialNumber */
+        if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        /* Skip it */
+        idx += length;
+
+        /* Get the sequence of digestAlgorithm */
+        if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        /* Skip it */
+        idx += length;
+
+        /* Get the IMPLICIT[0] SET OF signedAttributes */
+        if (pkiMsg[idx] == (ASN_CONSTRUCTED | ASN_CONTEXT_SPECIFIC | 0)) {
+            idx++;
+
+            if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+                return ASN_PARSE_E;
+
+            /* save pointer and length */
+            signedAttr = &pkiMsg[idx];
+            signedAttrSz = length;
+
+            idx += length;
+        }
+
+        /* Get the sequence of digestEncryptionAlgorithm */
+        if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        /* Skip it */
+        idx += length;
+
+        /* Get the signature */
+        if (pkiMsg[idx] == ASN_OCTET_STRING) {
+            idx++;
+
+            if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+                return ASN_PARSE_E;
+
+            /* save pointer and length */
+            sig = &pkiMsg[idx];
+            sigSz = length;
+
+            idx += length;
+        }
+
+        XMEMSET(digest, 0, sizeof(digest));
+        pkcs7->content = content;
+        pkcs7->contentSz = contentSz;
+
+        InitRsaKey(&key, NULL);
+        if (RsaPublicKeyDecode(pkcs7->publicKey, &scratch, &key,
+                               pkcs7->publicKeySz) < 0) {
+            CYASSL_MSG("ASN RSA key decode error");
+            return PUBLIC_KEY_E;
+        }
+        plainSz = RsaSSL_Verify(sig, sigSz, digest, sizeof(digest), &key);
+        FreeRsaKey(&key);
+        if (plainSz < 0)
+            return plainSz;
+    }
+
+    return 0;
+}
+
+
+/* create ASN.1 fomatted RecipientInfo structure, returns sequence size */
+CYASSL_LOCAL int CreateRecipientInfo(const byte* cert, word32 certSz,
+                                     int keyEncAlgo, int blockKeySz,
+                                     RNG* rng, byte* contentKeyPlain,
+                                     byte* contentKeyEnc,
+                                     int* keyEncSz, byte* out, word32 outSz)
+{
+    word32 idx = 0;
+    int ret = 0, totalSz = 0;
+    int verSz, issuerSz, snSz, keyEncAlgSz;
+    int issuerSeqSz, recipSeqSz, issuerSerialSeqSz;
+    int encKeyOctetStrSz;
+
+    byte ver[MAX_VERSION_SZ];
+    byte serial[MAX_SN_SZ];
+    byte issuerSerialSeq[MAX_SEQ_SZ];
+    byte recipSeq[MAX_SEQ_SZ];
+    byte issuerSeq[MAX_SEQ_SZ];
+    byte keyAlgArray[MAX_ALGO_SZ];
+    byte encKeyOctetStr[MAX_OCTET_STR_SZ];
+
+    RsaKey pubKey;
+    DecodedCert decoded;
+
+    InitDecodedCert(&decoded, (byte*)cert, certSz, 0);
+    ret = ParseCert(&decoded, CA_TYPE, NO_VERIFY, 0);
+    if (ret < 0) {
+        FreeDecodedCert(&decoded);
+        return ret;
+    }
+
+    /* version */
+    verSz = SetMyVersion(0, ver, 0);
+
+    /* IssuerAndSerialNumber */
+    if (decoded.issuerRaw == NULL || decoded.issuerRawLen == 0) {
+        CYASSL_MSG("DecodedCert lacks raw issuer pointer and length");
+        FreeDecodedCert(&decoded);
+        return -1;
+    }
+    issuerSz    = decoded.issuerRawLen;
+    issuerSeqSz = SetSequence(issuerSz, issuerSeq);
+
+    if (decoded.serial == NULL || decoded.serialSz == 0) {
+        CYASSL_MSG("DecodedCert missing serial number");
+        FreeDecodedCert(&decoded);
+        return -1;
+    }
+    snSz = SetSerialNumber(decoded.serial, decoded.serialSz, serial);
+
+    issuerSerialSeqSz = SetSequence(issuerSeqSz + issuerSz + snSz,
+                                    issuerSerialSeq);
+
+    /* KeyEncryptionAlgorithmIdentifier, only support RSA now */
+    if (keyEncAlgo != RSAk)
+        return ALGO_ID_E;
+
+    keyEncAlgSz = SetAlgoID(keyEncAlgo, keyAlgArray, keyType, 0);
+    if (keyEncAlgSz == 0)
+        return BAD_FUNC_ARG;
+
+    /* EncryptedKey */
+    InitRsaKey(&pubKey, 0);
+    if (RsaPublicKeyDecode(decoded.publicKey, &idx, &pubKey,
+                           decoded.pubKeySize) < 0) {
+        CYASSL_MSG("ASN RSA key decode error");
+        return PUBLIC_KEY_E;
+    }
+
+    *keyEncSz = RsaPublicEncrypt(contentKeyPlain, blockKeySz, contentKeyEnc,
+                                 MAX_ENCRYPTED_KEY_SZ, &pubKey, rng);
+    FreeRsaKey(&pubKey);
+    if (*keyEncSz < 0) {
+        CYASSL_MSG("RSA Public Encrypt failed");
+        return *keyEncSz;
+    }
+
+    encKeyOctetStrSz = SetOctetString(*keyEncSz, encKeyOctetStr);
+
+    /* RecipientInfo */
+    recipSeqSz = SetSequence(verSz + issuerSerialSeqSz + issuerSeqSz +
+                             issuerSz + snSz + keyEncAlgSz + encKeyOctetStrSz +
+                             *keyEncSz, recipSeq);
+
+    if (recipSeqSz + verSz + issuerSerialSeqSz + issuerSeqSz + snSz +
+        keyEncAlgSz + encKeyOctetStrSz + *keyEncSz > (int)outSz) {
+        CYASSL_MSG("RecipientInfo output buffer too small");
+        return BUFFER_E;
+    }
+
+    XMEMCPY(out + totalSz, recipSeq, recipSeqSz);
+    totalSz += recipSeqSz;
+    XMEMCPY(out + totalSz, ver, verSz);
+    totalSz += verSz;
+    XMEMCPY(out + totalSz, issuerSerialSeq, issuerSerialSeqSz);
+    totalSz += issuerSerialSeqSz;
+    XMEMCPY(out + totalSz, issuerSeq, issuerSeqSz);
+    totalSz += issuerSeqSz;
+    XMEMCPY(out + totalSz, decoded.issuerRaw, issuerSz);
+    totalSz += issuerSz;
+    XMEMCPY(out + totalSz, serial, snSz);
+    totalSz += snSz;
+    XMEMCPY(out + totalSz, keyAlgArray, keyEncAlgSz);
+    totalSz += keyEncAlgSz;
+    XMEMCPY(out + totalSz, encKeyOctetStr, encKeyOctetStrSz);
+    totalSz += encKeyOctetStrSz;
+    XMEMCPY(out + totalSz, contentKeyEnc, *keyEncSz);
+    totalSz += *keyEncSz;
+
+    FreeDecodedCert(&decoded);
+
+    return totalSz;
+}
+
+
+/* build PKCS#7 envelopedData content type, return enveloped size */
+int PKCS7_EncodeEnvelopedData(PKCS7* pkcs7, byte* output, word32 outputSz)
+{
+    int i, idx = 0;
+    int totalSz = 0, padSz = 0, desOutSz = 0;
+
+    int contentInfoSeqSz, outerContentTypeSz, outerContentSz;
+    byte contentInfoSeq[MAX_SEQ_SZ];
+    byte outerContentType[MAX_ALGO_SZ];
+    byte outerContent[MAX_SEQ_SZ];
+
+    int envDataSeqSz, verSz;
+    byte envDataSeq[MAX_SEQ_SZ];
+    byte ver[MAX_VERSION_SZ];
+
+    RNG rng;
+    int contentKeyEncSz, blockKeySz;
+    int dynamicFlag = 0;
+    byte contentKeyPlain[MAX_CONTENT_KEY_LEN];
+    byte contentKeyEnc[MAX_ENCRYPTED_KEY_SZ];
+    byte* plain;
+    byte* encryptedContent;
+
+    int recipSz, recipSetSz;
+    byte recip[MAX_RECIP_SZ];
+    byte recipSet[MAX_SET_SZ];
+
+    int encContentOctetSz, encContentSeqSz, contentTypeSz;
+    int contentEncAlgoSz, ivOctetStringSz;
+    byte encContentSeq[MAX_SEQ_SZ];
+    byte contentType[MAX_ALGO_SZ];
+    byte contentEncAlgo[MAX_ALGO_SZ];
+    byte tmpIv[DES_BLOCK_SIZE];
+    byte ivOctetString[MAX_OCTET_STR_SZ];
+    byte encContentOctet[MAX_OCTET_STR_SZ];
+
+    if (pkcs7 == NULL || pkcs7->content == NULL || pkcs7->contentSz == 0 ||
+        pkcs7->encryptOID == 0 || pkcs7->singleCert == NULL)
+        return BAD_FUNC_ARG;
+
+    if (output == NULL || outputSz == 0)
+        return BAD_FUNC_ARG;
+
+    /* PKCS#7 only supports DES, 3DES for now */
+    switch (pkcs7->encryptOID) {
+        case DESb:
+            blockKeySz = DES_KEYLEN;
+            break;
+
+        case DES3b:
+            blockKeySz = DES3_KEYLEN;
+            break;
+
+        default:
+            CYASSL_MSG("Unsupported content cipher type");
+            return ALGO_ID_E;
+    };
+
+    /* outer content type */
+    outerContentTypeSz = SetContentType(ENVELOPED_DATA, outerContentType);
+
+    /* version, defined as 0 in RFC 2315 */
+    verSz = SetMyVersion(0, ver, 0);
+
+    /* generate random content encryption key */
+    InitRng(&rng);
+    RNG_GenerateBlock(&rng, contentKeyPlain, blockKeySz);
+
+    /* build RecipientInfo, only handle 1 for now */
+    recipSz = CreateRecipientInfo(pkcs7->singleCert, pkcs7->singleCertSz, RSAk,
+                                  blockKeySz, &rng, contentKeyPlain,
+                                  contentKeyEnc, &contentKeyEncSz, recip,
+                                  MAX_RECIP_SZ);
+
+    if (recipSz < 0) {
+        CYASSL_MSG("Failed to create RecipientInfo");
+        return recipSz;
+    }
+    recipSetSz = SetSet(recipSz, recipSet);
+
+    /* EncryptedContentInfo */
+    contentTypeSz = SetContentType(pkcs7->contentOID, contentType);
+    if (contentTypeSz == 0)
+        return BAD_FUNC_ARG;
+
+    /* allocate encrypted content buffer, pad if necessary, PKCS#7 padding */
+    padSz = DES_BLOCK_SIZE - (pkcs7->contentSz % DES_BLOCK_SIZE);
+    desOutSz = pkcs7->contentSz + padSz;
+
+    if (padSz != 0) {
+        plain = XMALLOC(desOutSz, NULL, DYNAMIC_TYPE_TMP_BUFFER);
+        if (plain == NULL) {
+            return MEMORY_E;
+        }
+        XMEMCPY(plain, pkcs7->content, pkcs7->contentSz);
+        dynamicFlag = 1;
+
+        for (i = 0; i < padSz; i++) {
+            plain[pkcs7->contentSz + i] = padSz;
+        }
+
+    } else {
+        plain = pkcs7->content;
+        desOutSz = pkcs7->contentSz;
+    }
+
+    encryptedContent = XMALLOC(desOutSz, NULL, DYNAMIC_TYPE_TMP_BUFFER);
+    if (encryptedContent == NULL) {
+        if (dynamicFlag)
+            XFREE(plain, NULL, DYNAMIC_TYPE_TMP_BUFFER);
+        return MEMORY_E;
+    }
+
+    /* generate IV for block cipher */
+    RNG_GenerateBlock(&rng, tmpIv, DES_BLOCK_SIZE);
+
+    /* put together IV OCTET STRING */
+    ivOctetStringSz = SetOctetString(DES_BLOCK_SIZE, ivOctetString);
+
+    /* build up our ContentEncryptionAlgorithmIdentifier sequence,
+     * adding (ivOctetStringSz + DES_BLOCK_SIZE) for IV OCTET STRING */
+    contentEncAlgoSz = SetAlgoID(pkcs7->encryptOID, contentEncAlgo,
+                                 blkType, ivOctetStringSz + DES_BLOCK_SIZE);
+    if (contentEncAlgoSz == 0)
+        return BAD_FUNC_ARG;
+
+    /* encrypt content */
+    if (pkcs7->encryptOID == DESb) {
+        Des des;
+        Des_SetKey(&des, contentKeyPlain, tmpIv, DES_ENCRYPTION);
+        Des_CbcEncrypt(&des, encryptedContent, plain, desOutSz);
+
+    } else if (pkcs7->encryptOID == DES3b) {
+        Des3 des3;
+        Des3_SetKey(&des3, contentKeyPlain, tmpIv, DES_ENCRYPTION);
+        Des3_CbcEncrypt(&des3, encryptedContent, plain, desOutSz);
+    }
+
+    encContentOctetSz = SetImplicit(ASN_OCTET_STRING, 0,
+                                    desOutSz, encContentOctet);
+
+    encContentSeqSz = SetSequence(contentTypeSz + contentEncAlgoSz +
+                                  ivOctetStringSz + DES_BLOCK_SIZE +
+                                  encContentOctetSz + desOutSz, encContentSeq);
+
+    /* keep track of sizes for outer wrapper layering */
+    totalSz = verSz + recipSetSz + recipSz + encContentSeqSz + contentTypeSz +
+              contentEncAlgoSz + ivOctetStringSz + DES_BLOCK_SIZE +
+              encContentOctetSz + desOutSz;
+
+    /* EnvelopedData */
+    envDataSeqSz = SetSequence(totalSz, envDataSeq);
+    totalSz += envDataSeqSz;
+
+    /* outer content */
+    outerContentSz = SetExplicit(0, totalSz, outerContent);
+    totalSz += outerContentTypeSz;
+    totalSz += outerContentSz;
+
+    /* ContentInfo */
+    contentInfoSeqSz = SetSequence(totalSz, contentInfoSeq);
+    totalSz += contentInfoSeqSz;
+
+    if (totalSz > (int)outputSz) {
+        CYASSL_MSG("Pkcs7_encrypt output buffer too small");
+        XFREE(encryptedContent, NULL, DYNAMIC_TYPE_TMP_BUFFER);
+        if (dynamicFlag)
+            XFREE(plain, NULL, DYNAMIC_TYPE_TMP_BUFFER);
+        return BUFFER_E;
+    }
+
+    XMEMCPY(output + idx, contentInfoSeq, contentInfoSeqSz);
+    idx += contentInfoSeqSz;
+    XMEMCPY(output + idx, outerContentType, outerContentTypeSz);
+    idx += outerContentTypeSz;
+    XMEMCPY(output + idx, outerContent, outerContentSz);
+    idx += outerContentSz;
+    XMEMCPY(output + idx, envDataSeq, envDataSeqSz);
+    idx += envDataSeqSz;
+    XMEMCPY(output + idx, ver, verSz);
+    idx += verSz;
+    XMEMCPY(output + idx, recipSet, recipSetSz);
+    idx += recipSetSz;
+    XMEMCPY(output + idx, recip, recipSz);
+    idx += recipSz;
+    XMEMCPY(output + idx, encContentSeq, encContentSeqSz);
+    idx += encContentSeqSz;
+    XMEMCPY(output + idx, contentType, contentTypeSz);
+    idx += contentTypeSz;
+    XMEMCPY(output + idx, contentEncAlgo, contentEncAlgoSz);
+    idx += contentEncAlgoSz;
+    XMEMCPY(output + idx, ivOctetString, ivOctetStringSz);
+    idx += ivOctetStringSz;
+    XMEMCPY(output + idx, tmpIv, DES_BLOCK_SIZE);
+    idx += DES_BLOCK_SIZE;
+    XMEMCPY(output + idx, encContentOctet, encContentOctetSz);
+    idx += encContentOctetSz;
+    XMEMCPY(output + idx, encryptedContent, desOutSz);
+    idx += desOutSz;
+
+#ifdef NO_RC4
+    FreeRng(&rng);
+#endif
+
+    XMEMSET(contentKeyPlain, 0, MAX_CONTENT_KEY_LEN);
+    XMEMSET(contentKeyEnc,   0, MAX_ENCRYPTED_KEY_SZ);
+
+    if (dynamicFlag)
+        XFREE(plain, NULL, DYNAMMIC_TYPE_TMP_BUFFER);
+    XFREE(encryptedContent, NULL, DYNAMIC_TYPE_TMP_BUFFER);
+
+    return idx;
+}
+
+/* unwrap and decrypt PKCS#7 envelopedData object, return decoded size */
+CYASSL_API int PKCS7_DecodeEnvelopedData(PKCS7* pkcs7, byte* pkiMsg,
+                                         word32 pkiMsgSz, byte* output,
+                                         word32 outputSz)
+{
+    int recipFound = 0;
+    int ret, version, length;
+    word32 savedIdx = 0, idx = 0;
+    word32 contentType, encOID;
+    byte   issuerHash[SHA_DIGEST_SIZE];
+    mp_int serialNum;
+
+    int encryptedKeySz, keySz;
+    byte tmpIv[DES_BLOCK_SIZE];
+    byte encryptedKey[MAX_ENCRYPTED_KEY_SZ];
+    byte* decryptedKey = NULL;
+
+    RsaKey privKey;
+    int encryptedContentSz;
+    byte padLen;
+    byte* encryptedContent = NULL;
+
+    if (pkcs7 == NULL || pkcs7->singleCert == NULL ||
+        pkcs7->singleCertSz == 0 || pkcs7->privateKey == NULL ||
+        pkcs7->privateKeySz == 0)
+        return BAD_FUNC_ARG;
+
+    if (pkiMsg == NULL || pkiMsgSz == 0 ||
+        output == NULL || outputSz == 0)
+        return BAD_FUNC_ARG;
+
+    /* load private key */
+    InitRsaKey(&privKey, 0);
+    ret = RsaPrivateKeyDecode(pkcs7->privateKey, &idx, &privKey,
+                              pkcs7->privateKeySz);
+    if (ret != 0) {
+        CYASSL_MSG("Failed to decode RSA private key");
+        return ret;
+    }
+
+    idx = 0;
+
+    /* read past ContentInfo, verify type is envelopedData */
+    if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (GetContentType(pkiMsg, &idx, &contentType, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (contentType != ENVELOPED_DATA) {
+        CYASSL_MSG("PKCS#7 input not of type EnvelopedData");
+        return PKCS7_OID_E;
+    }
+
+    if (pkiMsg[idx++] != (ASN_CONSTRUCTED | ASN_CONTEXT_SPECIFIC | 0))
+        return ASN_PARSE_E;
+
+    if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* remove EnvelopedData and version */
+    if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (GetMyVersion(pkiMsg, &idx, &version) < 0)
+        return ASN_PARSE_E;
+
+    if (version != 0) {
+        CYASSL_MSG("PKCS#7 envelopedData needs to be of version 0");
+        return ASN_VERSION_E;
+    }
+
+    /* walk through RecipientInfo set, find correct recipient */
+    if (GetSet(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    savedIdx = idx;
+    recipFound = 0;
+
+    /* when looking for next recipient, use first sequence and version to
+     * indicate there is another, if not, move on */
+    while(recipFound == 0) {
+
+        /* remove RecipientInfo, if we don't have a SEQUENCE, back up idx to
+         * last good saved one */
+        if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0) {
+            idx = savedIdx;
+            break;
+        }
+
+        if (GetMyVersion(pkiMsg, &idx, &version) < 0) {
+            idx = savedIdx;
+            break;
+        }
+
+        if (version != 0)
+            return ASN_VERSION_E;
+
+        /* remove IssuerAndSerialNumber */
+        if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        if (GetNameHash(pkiMsg, &idx, issuerHash, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        /* if we found correct recipient, issuer hashes will match */
+        if (XMEMCMP(issuerHash, pkcs7->issuerHash, SHA_DIGEST_SIZE) == 0) {
+            recipFound = 1;
+        }
+
+        if (GetInt(&serialNum, pkiMsg, &idx, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+        mp_clear(&serialNum);
+
+        if (GetAlgoId(pkiMsg, &idx, &encOID, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        /* key encryption algorithm must be RSA for now */
+        if (encOID != RSAk)
+            return ALGO_ID_E;
+
+        /* read encryptedKey */
+        if (pkiMsg[idx++] != ASN_OCTET_STRING)
+            return ASN_PARSE_E;
+
+        if (GetLength(pkiMsg, &idx, &encryptedKeySz, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        if (recipFound == 1)
+            XMEMCPY(encryptedKey, &pkiMsg[idx], encryptedKeySz);
+        idx += encryptedKeySz;
+
+        /* update good idx */
+        savedIdx = idx;
+    }
+
+    if (recipFound == 0) {
+        CYASSL_MSG("No recipient found in envelopedData that matches input");
+        return PKCS7_RECIP_E;
+    }
+
+    /* remove EncryptedContentInfo */
+    if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (GetContentType(pkiMsg, &idx, &contentType, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (GetAlgoId(pkiMsg, &idx, &encOID, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* get block cipher IV, stored in OPTIONAL parameter of AlgoID */
+    if (pkiMsg[idx++] != ASN_OCTET_STRING)
+        return ASN_PARSE_E;
+
+    if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (length != DES_BLOCK_SIZE) {
+        CYASSL_MSG("Incorrect IV length, must be of DES_BLOCK_SIZE");
+        return ASN_PARSE_E;
+    }
+
+    XMEMCPY(tmpIv, &pkiMsg[idx], length);
+    idx += length;
+
+    /* read encryptedContent, cont[0] */
+    if (pkiMsg[idx++] != (ASN_CONTEXT_SPECIFIC | 0))
+        return ASN_PARSE_E;
+
+    if (GetLength(pkiMsg, &idx, &encryptedContentSz, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    encryptedContent = XMALLOC(encryptedContentSz, NULL,
+                               DYNAMIC_TYPE_TMP_BUFFER);
+
+    XMEMCPY(encryptedContent, &pkiMsg[idx], encryptedContentSz);
+
+    /* decrypt encryptedKey */
+    keySz = RsaPrivateDecryptInline(encryptedKey, encryptedKeySz,
+                                    &decryptedKey, &privKey);
+    FreeRsaKey(&privKey);
+    if (keySz <= 0)
+        return keySz;
+
+    /* decrypt encryptedContent */
+    if (encOID == DESb) {
+        Des des;
+        Des_SetKey(&des, decryptedKey, tmpIv, DES_DECRYPTION);
+        Des_CbcDecrypt(&des, encryptedContent, encryptedContent,
+                       encryptedContentSz);
+    } else if (encOID == DES3b) {
+        Des3 des;
+        Des3_SetKey(&des, decryptedKey, tmpIv, DES_DECRYPTION);
+        Des3_CbcDecrypt(&des, encryptedContent, encryptedContent,
+                       encryptedContentSz);
+    } else {
+        CYASSL_MSG("Unsupported content encryption OID type");
+        return ALGO_ID_E;
+    }
+
+    padLen = encryptedContent[encryptedContentSz-1];
+
+    /* copy plaintext to output */
+    XMEMCPY(output, encryptedContent, encryptedContentSz - padLen);
+
+    /* free memory, zero out keys */
+    XMEMSET(encryptedKey, 0, MAX_ENCRYPTED_KEY_SZ);
+    XMEMSET(encryptedContent, 0, encryptedContentSz);
+    XFREE(encryptedContent, NULL, DYNAMIC_TYPE_TMP_BUFFER);
+
+    return encryptedContentSz - padLen;
+}
+
+
+#else  /* HAVE_PKCS7 */
+
+
+#ifdef _MSC_VER
+    /* 4206 warning for blank file */
+    #pragma warning(disable: 4206)
+#endif
+
+
+#endif /* HAVE_PKCS7 */
+
diff --git a/ctaocrypt/src/sha.c b/ctaocrypt/src/sha.c
index 20d2261f5..30b669341 100644
--- a/ctaocrypt/src/sha.c
+++ b/ctaocrypt/src/sha.c
@@ -35,6 +35,13 @@
     #include 
 #endif
 
+#ifdef FREESCALE_MMCAU
+    #include "cau_api.h"
+    #define XTRANSFORM(S,B)  cau_sha1_hash_n((B), 1, ((S))->digest)
+#else
+    #define XTRANSFORM(S,B)  Transform((S))
+#endif
+
 
 #ifdef STM32F2_HASH
     /*
@@ -164,17 +171,23 @@
 
 void InitSha(Sha* sha)
 {
-    sha->digest[0] = 0x67452301L;
-    sha->digest[1] = 0xEFCDAB89L;
-    sha->digest[2] = 0x98BADCFEL;
-    sha->digest[3] = 0x10325476L;
-    sha->digest[4] = 0xC3D2E1F0L;
+    #ifdef FREESCALE_MMCAU
+        cau_sha1_initialize_output(sha->digest);
+    #else
+        sha->digest[0] = 0x67452301L;
+        sha->digest[1] = 0xEFCDAB89L;
+        sha->digest[2] = 0x98BADCFEL;
+        sha->digest[3] = 0x10325476L;
+        sha->digest[4] = 0xC3D2E1F0L;
+    #endif
 
     sha->buffLen = 0;
     sha->loLen   = 0;
     sha->hiLen   = 0;
 }
 
+#ifndef FREESCALE_MMCAU
+
 #define blk0(i) (W[i] = sha->buffer[i])
 #define blk1(i) (W[i&15] = \
                    rotlFixed(W[(i+13)&15]^W[(i+8)&15]^W[(i+2)&15]^W[i&15],1))
@@ -272,6 +285,8 @@ static void Transform(Sha* sha)
     sha->digest[4] += e;
 }
 
+#endif /* FREESCALE_MMCAU */
+
 
 static INLINE void AddLength(Sha* sha, word32 len)
 {
@@ -295,10 +310,10 @@ void ShaUpdate(Sha* sha, const byte* data, word32 len)
         len          -= add;
 
         if (sha->buffLen == SHA_BLOCK_SIZE) {
-            #ifdef LITTLE_ENDIAN_ORDER
+            #if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
                 ByteReverseBytes(local, local, SHA_BLOCK_SIZE);
             #endif
-            Transform(sha);
+            XTRANSFORM(sha, local);
             AddLength(sha, SHA_BLOCK_SIZE);
             sha->buffLen = 0;
         }
@@ -310,7 +325,7 @@ void ShaFinal(Sha* sha, byte* hash)
 {
     byte* local = (byte*)sha->buffer;
 
-    AddLength(sha, sha->buffLen);               /* before adding pads */
+    AddLength(sha, sha->buffLen);  /* before adding pads */
 
     local[sha->buffLen++] = 0x80;  /* add 1 */
 
@@ -319,10 +334,10 @@ void ShaFinal(Sha* sha, byte* hash)
         XMEMSET(&local[sha->buffLen], 0, SHA_BLOCK_SIZE - sha->buffLen);
         sha->buffLen += SHA_BLOCK_SIZE - sha->buffLen;
 
-        #ifdef LITTLE_ENDIAN_ORDER
+        #if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
             ByteReverseBytes(local, local, SHA_BLOCK_SIZE);
         #endif
-        Transform(sha);
+        XTRANSFORM(sha, local);
         sha->buffLen = 0;
     }
     XMEMSET(&local[sha->buffLen], 0, SHA_PAD_SIZE - sha->buffLen);
@@ -333,14 +348,20 @@ void ShaFinal(Sha* sha, byte* hash)
     sha->loLen = sha->loLen << 3;
 
     /* store lengths */
-    #ifdef LITTLE_ENDIAN_ORDER
+    #if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
         ByteReverseBytes(local, local, SHA_BLOCK_SIZE);
     #endif
     /* ! length ordering dependent on digest endian type ! */
     XMEMCPY(&local[SHA_PAD_SIZE], &sha->hiLen, sizeof(word32));
     XMEMCPY(&local[SHA_PAD_SIZE + sizeof(word32)], &sha->loLen, sizeof(word32));
 
-    Transform(sha);
+    #ifdef FREESCALE_MMCAU
+        /* Kinetis requires only these bytes reversed */
+        ByteReverseBytes(&local[SHA_PAD_SIZE], &local[SHA_PAD_SIZE],
+                2 * sizeof(word32));
+    #endif
+
+    XTRANSFORM(sha, local);
     #ifdef LITTLE_ENDIAN_ORDER
         ByteReverseWords(sha->digest, sha->digest, SHA_DIGEST_SIZE);
     #endif
diff --git a/ctaocrypt/src/sha256.c b/ctaocrypt/src/sha256.c
index baa379059..97f64a3ca 100644
--- a/ctaocrypt/src/sha256.c
+++ b/ctaocrypt/src/sha256.c
@@ -37,6 +37,13 @@
     #include 
 #endif
 
+#ifdef FREESCALE_MMCAU
+    #include "cau_api.h"
+    #define XTRANSFORM(S,B)  cau_sha256_hash_n((B), 1, ((S))->digest)
+#else
+    #define XTRANSFORM(S,B)  Transform((S))
+#endif
+
 
 #ifndef min
 
@@ -50,20 +57,26 @@
 
 void InitSha256(Sha256* sha256)
 {
-    sha256->digest[0] = 0x6A09E667L;
-    sha256->digest[1] = 0xBB67AE85L;
-    sha256->digest[2] = 0x3C6EF372L;
-    sha256->digest[3] = 0xA54FF53AL;
-    sha256->digest[4] = 0x510E527FL;
-    sha256->digest[5] = 0x9B05688CL;
-    sha256->digest[6] = 0x1F83D9ABL;
-    sha256->digest[7] = 0x5BE0CD19L;
+    #ifdef FREESCALE_MMCAU
+        cau_sha256_initialize_output(sha256->digest);
+    #else
+        sha256->digest[0] = 0x6A09E667L;
+        sha256->digest[1] = 0xBB67AE85L;
+        sha256->digest[2] = 0x3C6EF372L;
+        sha256->digest[3] = 0xA54FF53AL;
+        sha256->digest[4] = 0x510E527FL;
+        sha256->digest[5] = 0x9B05688CL;
+        sha256->digest[6] = 0x1F83D9ABL;
+        sha256->digest[7] = 0x5BE0CD19L;
+    #endif
 
     sha256->buffLen = 0;
     sha256->loLen   = 0;
     sha256->hiLen   = 0;
 }
 
+#ifndef FREESCALE_MMCAU
+
 static const word32 K[64] = {
     0x428A2F98L, 0x71374491L, 0xB5C0FBCFL, 0xE9B5DBA5L, 0x3956C25BL,
     0x59F111F1L, 0x923F82A4L, 0xAB1C5ED5L, 0xD807AA98L, 0x12835B01L,
@@ -128,6 +141,8 @@ static void Transform(Sha256* sha256)
     }
 }
 
+#endif /* FREESCALE_MMCAU */
+
 
 static INLINE void AddLength(Sha256* sha256, word32 len)
 {
@@ -151,10 +166,10 @@ void Sha256Update(Sha256* sha256, const byte* data, word32 len)
         len             -= add;
 
         if (sha256->buffLen == SHA256_BLOCK_SIZE) {
-            #ifdef LITTLE_ENDIAN_ORDER
+            #if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
                 ByteReverseBytes(local, local, SHA256_BLOCK_SIZE);
             #endif
-            Transform(sha256);
+            XTRANSFORM(sha256, local);
             AddLength(sha256, SHA256_BLOCK_SIZE);
             sha256->buffLen = 0;
         }
@@ -168,17 +183,17 @@ void Sha256Final(Sha256* sha256, byte* hash)
 
     AddLength(sha256, sha256->buffLen);  /* before adding pads */
 
-    local[sha256->buffLen++] = 0x80;  /* add 1 */
+    local[sha256->buffLen++] = 0x80;     /* add 1 */
 
     /* pad with zeros */
     if (sha256->buffLen > SHA256_PAD_SIZE) {
         XMEMSET(&local[sha256->buffLen], 0, SHA256_BLOCK_SIZE - sha256->buffLen);
         sha256->buffLen += SHA256_BLOCK_SIZE - sha256->buffLen;
 
-        #ifdef LITTLE_ENDIAN_ORDER
+        #if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
             ByteReverseBytes(local, local, SHA256_BLOCK_SIZE);
         #endif
-        Transform(sha256);
+        XTRANSFORM(sha256, local);
         sha256->buffLen = 0;
     }
     XMEMSET(&local[sha256->buffLen], 0, SHA256_PAD_SIZE - sha256->buffLen);
@@ -189,7 +204,7 @@ void Sha256Final(Sha256* sha256, byte* hash)
     sha256->loLen = sha256->loLen << 3;
 
     /* store lengths */
-    #ifdef LITTLE_ENDIAN_ORDER
+    #if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
         ByteReverseBytes(local, local, SHA256_BLOCK_SIZE);
     #endif
     /* ! length ordering dependent on digest endian type ! */
@@ -197,7 +212,13 @@ void Sha256Final(Sha256* sha256, byte* hash)
     XMEMCPY(&local[SHA256_PAD_SIZE + sizeof(word32)], &sha256->loLen,
             sizeof(word32));
 
-    Transform(sha256);
+    #ifdef FREESCALE_MMCAU
+        /* Kinetis requires only these bytes reversed */
+        ByteReverseBytes(&local[SHA256_PAD_SIZE], &local[SHA256_PAD_SIZE],
+                2 * sizeof(word32));
+    #endif
+
+    XTRANSFORM(sha256, local);
     #ifdef LITTLE_ENDIAN_ORDER
         ByteReverseWords(sha256->digest, sha256->digest, SHA256_DIGEST_SIZE);
     #endif
diff --git a/ctaocrypt/src/sha512.c b/ctaocrypt/src/sha512.c
index b8d57085f..2766f0a0a 100644
--- a/ctaocrypt/src/sha512.c
+++ b/ctaocrypt/src/sha512.c
@@ -146,13 +146,24 @@ static void Transform(Sha512* sha512)
     /* Copy digest to working vars */
     XMEMCPY(T, sha512->digest, sizeof(T));
 
-    /* 64 operations, partially loop unrolled */
+#ifdef USE_SLOW_SHA2
+    /* over twice as small, but 50% slower */
+    /* 80 operations, not unrolled */
+    for (j = 0; j < 80; j += 16) {
+        int m; 
+        for (m = 0; m < 16; m++) { /* braces needed here for macros {} */
+            R(m);
+        }
+    }
+#else
+    /* 80 operations, partially loop unrolled */
     for (j = 0; j < 80; j += 16) {
         R( 0); R( 1); R( 2); R( 3);
         R( 4); R( 5); R( 6); R( 7);
         R( 8); R( 9); R(10); R(11);
         R(12); R(13); R(14); R(15);
     }
+#endif /* USE_SLOW_SHA2 */
 
     /* Add the working vars back into digest */
 
@@ -280,13 +291,24 @@ static void Transform384(Sha384* sha384)
     /* Copy digest to working vars */
     XMEMCPY(T, sha384->digest, sizeof(T));
 
-    /* 64 operations, partially loop unrolled */
+#ifdef USE_SLOW_SHA2
+    /* over twice as small, but 50% slower */
+    /* 80 operations, not unrolled */
+    for (j = 0; j < 80; j += 16) {
+        int m;
+        for (m = 0; m < 16; m++) {  /* braces needed for macros {} */
+            R2(m);
+        }
+    }
+#else
+    /* 80 operations, partially loop unrolled */
     for (j = 0; j < 80; j += 16) {
         R2( 0); R2( 1); R2( 2); R2( 3);
         R2( 4); R2( 5); R2( 6); R2( 7);
         R2( 8); R2( 9); R2(10); R2(11);
         R2(12); R2(13); R2(14); R2(15);
     }
+#endif /* USE_SLOW_SHA2 */
 
     /* Add the working vars back into digest */
 
diff --git a/ctaocrypt/test/test.c b/ctaocrypt/test/test.c
index 5ba050838..293879c03 100644
--- a/ctaocrypt/test/test.c
+++ b/ctaocrypt/test/test.c
@@ -61,6 +61,9 @@
 #ifdef HAVE_LIBZ
     #include 
 #endif
+#ifdef HAVE_PKCS7
+    #include 
+#endif
 
 #ifdef _MSC_VER
     /* 4996 warning to use MS extensions e.g., strcpy_s instead of strncpy */
@@ -174,6 +177,10 @@ int pbkdf2_test(void);
 #ifdef HAVE_LIBZ
     int compress_test(void);
 #endif
+#ifdef HAVE_PKCS7
+    int pkcs7enveloped_test(void);
+    int pkcs7signed_test(void);
+#endif
 
 
 
@@ -458,6 +465,18 @@ void ctaocrypt_test(void* args)
         printf( "COMPRESS test passed!\n");
 #endif
 
+#ifdef HAVE_PKCS7
+    if ( (ret = pkcs7enveloped_test()) != 0)
+        err_sys("PKCS7enveloped test failed!\n", ret);
+    else
+        printf( "PKCS7enveloped test passed!\n");
+
+    if ( (ret = pkcs7signed_test()) != 0)
+        err_sys("PKCS7signed    test failed!\n", ret);
+    else
+        printf( "PKCS7signed    test passed!\n");
+#endif
+
     ((func_args*)args)->return_code = ret;
 }
 
@@ -1897,6 +1916,12 @@ int aes_test(void)
             0x79,0x21,0x70,0xa0,0xf3,0x00,0x9c,0xee
         };
 
+        const byte oddCipher[] =
+        {
+            0xb9,0xd7,0xcb,0x08,0xb0,0xe1,0x7b,0xa0,
+            0xc2
+        };
+
         AesSetKeyDirect(&enc, ctrKey, AES_BLOCK_SIZE, ctrIv, AES_ENCRYPTION);
         /* Ctr only uses encrypt, even on key setup */
         AesSetKeyDirect(&dec, ctrKey, AES_BLOCK_SIZE, ctrIv, AES_ENCRYPTION);
@@ -1909,6 +1934,30 @@ int aes_test(void)
 
         if (memcmp(cipher, ctrCipher, AES_BLOCK_SIZE*4))
             return -67;
+
+        /* let's try with just 9 bytes, non block size test */
+        AesSetKeyDirect(&enc, ctrKey, AES_BLOCK_SIZE, ctrIv, AES_ENCRYPTION);
+        /* Ctr only uses encrypt, even on key setup */
+        AesSetKeyDirect(&dec, ctrKey, AES_BLOCK_SIZE, ctrIv, AES_ENCRYPTION);
+
+        AesCtrEncrypt(&enc, cipher, ctrPlain, 9);
+        AesCtrEncrypt(&dec, plain, cipher, 9);
+
+        if (memcmp(plain, ctrPlain, 9))
+            return -68;
+
+        if (memcmp(cipher, ctrCipher, 9))
+            return -69;
+
+        /* and an additional 9 bytes to reuse tmp left buffer */
+        AesCtrEncrypt(&enc, cipher, ctrPlain, 9);
+        AesCtrEncrypt(&dec, plain, cipher, 9);
+
+        if (memcmp(plain, ctrPlain, 9))
+            return -70;
+
+        if (memcmp(cipher, oddCipher, 9))
+            return -71;
     }
 #endif /* CYASSL_AES_COUNTER */
 
@@ -2487,17 +2536,27 @@ byte GetEntropy(ENTROPY_CMD cmd, byte* out)
         #ifdef CYASSL_CERT_GEN
             static const char* caKeyFile  = "a:\\certs\\ca-key.der";
             static const char* caCertFile = "a:\\certs\\ca-cert.pem";
+            #ifdef HAVE_ECC
+                static const char* eccCaKeyFile  = "a:\\certs\\ecc-key.der";
+                static const char* eccCaCertFile = "a:\\certs\\server-ecc.pem";
+            #endif 
         #endif
     #elif defined(CYASSL_MKD_SHELL)
         static char* clientKey = "certs/client-key.der";
         static char* clientCert = "certs/client-cert.der";
-        void set_clientKey(char *key) {  clientKey = key ; }      /* set by shell command */
-        void set_clientCert(char *cert) {  clientCert = cert ; }  /* set by shell command */
+        void set_clientKey(char *key) {  clientKey = key ; }
+        void set_clientCert(char *cert) {  clientCert = cert ; }
         #ifdef CYASSL_CERT_GEN
             static char* caKeyFile  = "certs/ca-key.der";
             static char* caCertFile = "certs/ca-cert.pem";
-            void set_caKeyFile (char * key)  { caKeyFile   = key ; }     /* set by shell command */
-            void set_caCertFile(char * cert) { caCertFile = cert ; }     /* set by shell command */
+            void set_caKeyFile (char * key)  { caKeyFile   = key ; }
+            void set_caCertFile(char * cert) { caCertFile = cert ; }
+            #ifdef HAVE_ECC
+                static const char* eccCaKeyFile  = "certs/ecc-key.der";
+                static const char* eccCaCertFile = "certs/server-ecc.pem";
+                void set_eccCaKeyFile (char * key)  { eccCaKeyFile  = key ; }
+                void set_eccCaCertFile(char * cert) { eccCaCertFile = cert ; }
+            #endif 
         #endif
     #else
         static const char* clientKey  = "./certs/client-key.der";
@@ -2505,6 +2564,10 @@ byte GetEntropy(ENTROPY_CMD cmd, byte* out)
         #ifdef CYASSL_CERT_GEN
             static const char* caKeyFile  = "./certs/ca-key.der";
             static const char* caCertFile = "./certs/ca-cert.pem";
+            #ifdef HAVE_ECC
+                static const char* eccCaKeyFile  = "./certs/ecc-key.der";
+                static const char* eccCaCertFile = "./certs/server-ecc.pem";
+            #endif 
         #endif
     #endif
 #endif
@@ -2784,11 +2847,12 @@ int rsa_test(void)
         if (ret < 0)
             return -405;
 
-        certSz = MakeCert(&myCert, derCert, FOURK_BUF, &key, &rng); 
+        certSz = MakeCert(&myCert, derCert, FOURK_BUF, &key, NULL, &rng); 
         if (certSz < 0)
             return -407;
 
-        certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng);
+        certSz = SignCert(myCert.bodySz, myCert.sigType, derCert, FOURK_BUF,
+                          &caKey, NULL, &rng);
         if (certSz < 0)
             return -408;
 
@@ -2820,6 +2884,95 @@ int rsa_test(void)
         free(derCert);
         FreeRsaKey(&caKey);
     }
+#ifdef HAVE_ECC
+    /* ECC CA style */
+    {
+        ecc_key     caKey;
+        Cert        myCert;
+        byte*       derCert;
+        byte*       pem;
+        FILE*       derFile;
+        FILE*       pemFile;
+        int         certSz;
+        int         pemSz;
+        size_t      bytes3;
+        word32      idx3 = 0;
+			  FILE* file3 ;
+#ifdef CYASSL_TEST_CERT
+        DecodedCert decode;
+#endif
+
+        derCert = (byte*)malloc(FOURK_BUF);
+        if (derCert == NULL)
+            return -5311;
+        pem = (byte*)malloc(FOURK_BUF);
+        if (pem == NULL)
+            return -5312;
+
+        file3 = fopen(eccCaKeyFile, "rb");
+
+        if (!file3)
+            return -5412;
+
+        bytes3 = fread(tmp, 1, FOURK_BUF, file3);
+        fclose(file3);
+  
+        ecc_init(&caKey);  
+        ret = EccPrivateKeyDecode(tmp, &idx3, &caKey, (word32)bytes3);
+        if (ret != 0) return -5413;
+
+        InitCert(&myCert);
+        myCert.sigType = CTC_SHA256wECDSA; 
+
+        strncpy(myCert.subject.country, "US", CTC_NAME_SIZE);
+        strncpy(myCert.subject.state, "OR", CTC_NAME_SIZE);
+        strncpy(myCert.subject.locality, "Portland", CTC_NAME_SIZE);
+        strncpy(myCert.subject.org, "wolfSSL", CTC_NAME_SIZE);
+        strncpy(myCert.subject.unit, "Development", CTC_NAME_SIZE);
+        strncpy(myCert.subject.commonName, "www.wolfssl.com", CTC_NAME_SIZE);
+        strncpy(myCert.subject.email, "info@wolfssl.com", CTC_NAME_SIZE);
+
+        ret = SetIssuer(&myCert, eccCaCertFile);
+        if (ret < 0)
+            return -5405;
+
+        certSz = MakeCert(&myCert, derCert, FOURK_BUF, NULL, &caKey, &rng); 
+        if (certSz < 0)
+            return -5407;
+
+        certSz = SignCert(myCert.bodySz, myCert.sigType, derCert, FOURK_BUF,
+                          NULL, &caKey, &rng);
+        if (certSz < 0)
+            return -5408;
+
+#ifdef CYASSL_TEST_CERT
+        InitDecodedCert(&decode, derCert, certSz, 0);
+        ret = ParseCert(&decode, CERT_TYPE, NO_VERIFY, 0);
+        if (ret != 0)
+            return -5409;
+        FreeDecodedCert(&decode);
+#endif
+
+        derFile = fopen("./certecc.der", "wb");
+        if (!derFile)
+            return -5410;
+        ret = (int)fwrite(derCert, certSz, 1, derFile);
+        fclose(derFile);
+
+        pemSz = DerToPem(derCert, certSz, pem, FOURK_BUF, CERT_TYPE);
+        if (pemSz < 0)
+            return -5411;
+
+        pemFile = fopen("./certecc.pem", "wb");
+        if (!pemFile)
+            return -5412;
+        ret = (int)fwrite(pem, pemSz, 1, pemFile);
+        fclose(pemFile);
+        free(pem);
+        free(derCert);
+        ecc_free(&caKey);
+    }
+#endif /* HAVE_ECC */
 #ifdef HAVE_NTRU
     {
         RsaKey      caKey;
@@ -2900,7 +3053,8 @@ int rsa_test(void)
         if (certSz < 0)
             return -456;
 
-        certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng);
+        certSz = SignCert(myCert.bodySz, myCert.sigType, derCert, FOURK_BUF,
+                          &caKey, NULL, &rng);
         if (certSz < 0)
             return -457;
 
@@ -2938,6 +3092,66 @@ int rsa_test(void)
         FreeRsaKey(&caKey);
     }
 #endif /* HAVE_NTRU */
+#ifdef CYASSL_CERT_REQ
+    {
+        Cert        req;
+        byte*       der;
+        byte*       pem;
+        int         derSz;
+        int         pemSz;
+        FILE*       reqFile;
+
+        der = (byte*)malloc(FOURK_BUF);
+        if (der == NULL)
+            return -463;
+        pem = (byte*)malloc(FOURK_BUF);
+        if (pem == NULL)
+            return -464;
+
+        InitCert(&req);
+
+        req.version = 0;
+        req.isCA    = 1;
+        strncpy(req.challengePw, "yassl123", CTC_NAME_SIZE);
+        strncpy(req.subject.country, "US", CTC_NAME_SIZE);
+        strncpy(req.subject.state, "OR", CTC_NAME_SIZE);
+        strncpy(req.subject.locality, "Portland", CTC_NAME_SIZE);
+        strncpy(req.subject.org, "yaSSL", CTC_NAME_SIZE);
+        strncpy(req.subject.unit, "Development", CTC_NAME_SIZE);
+        strncpy(req.subject.commonName, "www.yassl.com", CTC_NAME_SIZE);
+        strncpy(req.subject.email, "info@yassl.com", CTC_NAME_SIZE);
+        req.sigType = CTC_SHA256wRSA;
+
+        derSz = MakeCertReq(&req, der, FOURK_BUF, &key, NULL);
+        if (derSz < 0)
+            return -465;
+
+        derSz = SignCert(req.bodySz, req.sigType, der, FOURK_BUF,
+                          &key, NULL, &rng);
+        if (derSz < 0)
+            return -466;
+
+        pemSz = DerToPem(der, derSz, pem, FOURK_BUF, CERTREQ_TYPE);
+        if (pemSz < 0)
+            return -467;
+
+        reqFile = fopen("./certreq.der", "wb");
+        if (!reqFile)
+            return -468;
+
+        ret = (int)fwrite(der, derSz, 1, reqFile);
+        fclose(reqFile);
+
+        reqFile = fopen("./certreq.pem", "wb");
+        if (!reqFile)
+            return -469;
+        ret = (int)fwrite(pem, pemSz, 1, reqFile);
+        fclose(reqFile);
+
+        free(pem);
+        free(der);
+    }
+#endif /* CYASSL_CERT_REQ */
 #endif /* CYASSL_CERT_GEN */
 
     FreeRsaKey(&key);
@@ -3628,12 +3842,12 @@ int ecc_encrypt_test(void)
     for (i = 0; i < 48; i++)
         msg[i] = i;
 
-    /* send encrypted msg to B */
+    /* encrypt msg to B */
     ret = ecc_encrypt(&userA, &userB, msg, sizeof(msg), out, &outSz, NULL);
     if (ret != 0)
         return -3003;
 
-    /* decrypted msg to B */
+    /* decrypt msg from A */
     ret = ecc_decrypt(&userB, &userA, out, outSz, plain, &plainSz, NULL);
     if (ret != 0)
         return -3004;
@@ -3641,6 +3855,84 @@ int ecc_encrypt_test(void)
     if (memcmp(plain, msg, sizeof(msg)) != 0)
         return -3005;
 
+    
+    {  /* let's verify message exchange works, A is client, B is server */
+        ecEncCtx* cliCtx = ecc_ctx_new(REQ_RESP_CLIENT, &rng);
+        ecEncCtx* srvCtx = ecc_ctx_new(REQ_RESP_SERVER, &rng);
+
+        byte cliSalt[EXCHANGE_SALT_SZ];
+        byte srvSalt[EXCHANGE_SALT_SZ];
+        const byte* tmpSalt;
+
+        if (cliCtx == NULL || srvCtx == NULL)
+            return -3006;
+
+        /* get salt to send to peer */
+        tmpSalt = ecc_ctx_get_own_salt(cliCtx);
+        if (tmpSalt == NULL)
+            return -3007;
+        memcpy(cliSalt, tmpSalt, EXCHANGE_SALT_SZ);
+
+        tmpSalt = ecc_ctx_get_own_salt(srvCtx);
+        if (tmpSalt == NULL)
+            return -3007;
+        memcpy(srvSalt, tmpSalt, EXCHANGE_SALT_SZ);
+
+        /* in actual use, we'd get the peer's salt over the transport */
+        ret  = ecc_ctx_set_peer_salt(cliCtx, srvSalt);
+        ret += ecc_ctx_set_peer_salt(srvCtx, cliSalt);
+
+        if (ret != 0)
+            return -3008;
+
+        /* get encrypted msg (request) to send to B */
+        outSz  = sizeof(out);
+        ret = ecc_encrypt(&userA, &userB, msg, sizeof(msg), out, &outSz,cliCtx);
+        if (ret != 0)
+            return -3009;
+
+        /* B decrypts msg (request) from A */
+        plainSz = sizeof(plain);
+        ret = ecc_decrypt(&userB, &userA, out, outSz, plain, &plainSz, srvCtx);
+        if (ret != 0)
+            return -3010;
+
+        if (memcmp(plain, msg, sizeof(msg)) != 0)
+            return -3011;
+
+        {
+            /* msg2 (response) from B to A */
+            byte    msg2[48];
+            byte    plain2[48];
+            byte    out2[80];
+            word32  outSz2   = sizeof(out2);
+            word32  plainSz2 = sizeof(plain2);
+
+            for (i = 0; i < 48; i++)
+                msg2[i] = i+48;
+
+            /* get encrypted msg (response) to send to B */
+            ret = ecc_encrypt(&userB, &userA, msg2, sizeof(msg2), out2,
+                              &outSz2, srvCtx);
+            if (ret != 0)
+                return -3012;
+
+            /* A decrypts msg (response) from B */
+            ret = ecc_decrypt(&userA, &userB, out2, outSz2, plain2, &plainSz2,
+                             cliCtx);
+            if (ret != 0)
+                return -3013;
+
+            if (memcmp(plain2, msg2, sizeof(msg2)) != 0)
+                return -3014;
+        }
+
+        /* cleanup */
+        ecc_ctx_free(srvCtx);
+        ecc_ctx_free(cliCtx);
+    }
+
+    /* cleanup */
     ecc_free(&userB);
     ecc_free(&userA);
 
@@ -3766,4 +4058,269 @@ int compress_test(void)
 
 #endif /* HAVE_LIBZ */
 
+#ifdef HAVE_PKCS7
+
+int pkcs7enveloped_test(void)
+{
+    int ret = 0;
+
+    int cipher = DES3b;
+    int envelopedSz, decodedSz;
+    PKCS7 pkcs7;
+    byte* cert;
+    byte* privKey;
+    byte  enveloped[2048];
+    byte  decoded[2048];
+
+    size_t certSz;
+    size_t privKeySz;
+    FILE*  certFile;
+    FILE*  keyFile;
+    FILE*  pkcs7File;
+    const char* pkcs7OutFile = "pkcs7envelopedData.der";
+
+    const byte data[] = { /* Hello World */
+        0x48,0x65,0x6c,0x6c,0x6f,0x20,0x57,0x6f,
+        0x72,0x6c,0x64
+    };
+
+    /* read client cert and key in DER format */
+    cert = (byte*)malloc(FOURK_BUF);
+    if (cert == NULL)
+        return -201;
+
+    privKey = (byte*)malloc(FOURK_BUF);
+    if (privKey == NULL)
+        return -202;
+
+    certFile = fopen(clientCert, "rb");
+    if (!certFile)
+        err_sys("can't open ./certs/client-cert.der, "
+                "Please run from CyaSSL home dir", -42);
+
+    certSz = fread(cert, 1, FOURK_BUF, certFile);
+    fclose(certFile);
+
+    keyFile = fopen(clientKey, "rb");
+    if (!keyFile)
+        err_sys("can't open ./certs/client-key.der, "
+                "Please run from CyaSSL home dir", -43);
+
+    privKeySz = fread(privKey, 1, FOURK_BUF, keyFile);
+    fclose(keyFile);
+
+    PKCS7_InitWithCert(&pkcs7, cert, (word32)certSz);
+    pkcs7.content     = (byte*)data;
+    pkcs7.contentSz   = (word32)sizeof(data);
+    pkcs7.contentOID  = DATA;
+    pkcs7.encryptOID  = cipher;
+    pkcs7.privateKey  = privKey;
+    pkcs7.privateKeySz = (word32)privKeySz;
+
+    /* encode envelopedData */
+    envelopedSz = PKCS7_EncodeEnvelopedData(&pkcs7, enveloped,
+                                            sizeof(enveloped));
+    if (envelopedSz <= 0)
+        return -203;
+
+    /* decode envelopedData */
+    decodedSz = PKCS7_DecodeEnvelopedData(&pkcs7, enveloped, envelopedSz,
+                                          decoded, sizeof(decoded));
+    if (decodedSz <= 0)
+        return -204;
+
+    /* test decode result */
+    if (memcmp(decoded, data, sizeof(data)) != 0) {
+        return -205;
+    }
+
+    /* output pkcs7 envelopedData for external testing */
+    pkcs7File = fopen(pkcs7OutFile, "wb");
+    if (!pkcs7File)
+        return -206;
+
+    ret = (int)fwrite(enveloped, envelopedSz, 1, pkcs7File);
+    fclose(pkcs7File);
+
+    free(cert);
+    free(privKey);
+    PKCS7_Free(&pkcs7);
+
+    if (ret > 0)
+        return 0;
+
+    return ret;
+}
+
+int pkcs7signed_test(void)
+{
+    int ret = 0;
+
+    FILE* file;
+    byte* certDer;
+    byte* keyDer;
+    byte* out;
+    char data[] = "Hello World";
+    word32 dataSz, outSz, certDerSz, keyDerSz;
+    PKCS7 msg;
+    RNG rng;
+
+    byte transIdOid[] =
+               { 0x06, 0x0a, 0x60, 0x86, 0x48, 0x01, 0x86, 0xF8, 0x45, 0x01,
+                 0x09, 0x07 };
+    byte messageTypeOid[] =
+               { 0x06, 0x0a, 0x60, 0x86, 0x48, 0x01, 0x86, 0xF8, 0x45, 0x01,
+                 0x09, 0x02 };
+    byte senderNonceOid[] =
+               { 0x06, 0x0a, 0x60, 0x86, 0x48, 0x01, 0x86, 0xF8, 0x45, 0x01,
+                 0x09, 0x05 };
+    byte transId[(SHA_DIGEST_SIZE + 1) * 2 + 1];
+    byte messageType[] = { 0x13, 2, '1', '9' };
+    byte senderNonce[PKCS7_NONCE_SZ + 2];
+
+    PKCS7Attrib attribs[] =
+    {
+        { transIdOid, sizeof(transIdOid),
+                     transId, sizeof(transId) - 1 }, /* take off the null */
+        { messageTypeOid, sizeof(messageTypeOid),
+                     messageType, sizeof(messageType) },
+        { senderNonceOid, sizeof(senderNonceOid),
+                     senderNonce, sizeof(senderNonce) }
+    };
+
+    dataSz = (word32) strlen(data);
+    outSz = FOURK_BUF;
+
+    certDer = (byte*)malloc(FOURK_BUF);
+    keyDer = (byte*)malloc(FOURK_BUF);
+    out = (byte*)malloc(FOURK_BUF);
+
+    if (certDer == NULL)
+        return -207;
+    if (keyDer == NULL)
+        return -208;
+    if (out == NULL)
+        return -209;
+
+    /* read in DER cert of recipient, into cert of size certSz */
+    file = fopen(clientCert, "rb");
+    if (!file) {
+        free(certDer);
+        free(keyDer);
+        free(out);
+        err_sys("can't open ./certs/client-cert.der, "
+                "Please run from CyaSSL home dir", -44);
+    }
+    certDerSz = (word32)fread(certDer, 1, FOURK_BUF, file);
+    fclose(file);
+
+    file = fopen(clientKey, "rb");
+    if (!file) {
+        free(certDer);
+        free(keyDer);
+        free(out);
+        err_sys("can't open ./certs/client-key.der, "
+                "Please run from CyaSSL home dir", -45);
+    }
+    keyDerSz = (word32)fread(keyDer, 1, FOURK_BUF, file);
+    fclose(file);
+
+    ret = InitRng(&rng);
+    senderNonce[0] = 0x04;
+    senderNonce[1] = PKCS7_NONCE_SZ;
+    RNG_GenerateBlock(&rng, &senderNonce[2], PKCS7_NONCE_SZ);
+
+    PKCS7_InitWithCert(&msg, certDer, certDerSz);
+    msg.privateKey = keyDer;
+    msg.privateKeySz = keyDerSz;
+    msg.content = (byte*)data;
+    msg.contentSz = dataSz;
+    msg.hashOID = SHAh;
+    msg.encryptOID = RSAk;
+    msg.signedAttribs = attribs;
+    msg.signedAttribsSz = sizeof(attribs)/sizeof(PKCS7Attrib);
+    msg.rng = &rng;
+    {
+        Sha sha;
+        byte digest[SHA_DIGEST_SIZE];
+        int i,j;
+
+        transId[0] = 0x13;
+        transId[1] = SHA_DIGEST_SIZE * 2;
+
+        InitSha(&sha);
+        ShaUpdate(&sha, msg.publicKey, msg.publicKeySz);
+        ShaFinal(&sha, digest);
+
+        for (i = 0, j = 2; i < SHA_DIGEST_SIZE; i++, j += 2) {
+            snprintf((char*)&transId[j], 3, "%02x", digest[i]);
+        }
+    }
+    ret = PKCS7_EncodeSignedData(&msg, out, outSz);
+    if (ret < 0) {
+        free(certDer);
+        free(keyDer);
+        free(out);
+        PKCS7_Free(&msg);
+        return -210;
+    }
+    else
+        outSz = ret;
+
+    /* write PKCS#7 to output file for more testing */
+    file = fopen("./pkcs7signedData.der", "wb");
+    if (!file) {
+        free(certDer);
+        free(keyDer);
+        free(out);
+        PKCS7_Free(&msg);
+        return -211;
+    }
+    ret = (int)fwrite(out, 1, outSz, file);
+    fclose(file);
+
+    PKCS7_Free(&msg);
+    PKCS7_InitWithCert(&msg, NULL, 0);
+
+    ret = PKCS7_VerifySignedData(&msg, out, outSz);
+    if (ret < 0) {
+        free(certDer);
+        free(keyDer);
+        free(out);
+        PKCS7_Free(&msg);
+        return -212;
+    }
+
+    if (msg.singleCert == NULL || msg.singleCertSz == 0) {
+        free(certDer);
+        free(keyDer);
+        free(out);
+        PKCS7_Free(&msg);
+        return -213;
+    }
+
+    file = fopen("./pkcs7cert.der", "wb");
+    if (!file) {
+        free(certDer);
+        free(keyDer);
+        free(out);
+        PKCS7_Free(&msg);
+        return -214;
+    }
+    ret = (int)fwrite(msg.singleCert, 1, msg.singleCertSz, file);
+    fclose(file);
+
+    free(certDer);
+    free(keyDer);
+    free(out);
+    PKCS7_Free(&msg);
+
+    if (ret > 0)
+        return 0;
+
+    return ret;
+}
+
+#endif /* HAVE_PKCS7 */
+
 #endif /* NO_CRYPT_TEST */
diff --git a/cyassl-ntru.vcproj b/cyassl-ntru.vcproj
index 57720a52d..0813acdc7 100755
--- a/cyassl-ntru.vcproj
+++ b/cyassl-ntru.vcproj
@@ -166,10 +166,22 @@
 				RelativePath=".\ctaocrypt\src\asn.c"
 				>
 			
+			
+			
+			
+			
 			
 			
+			
+			
 			
@@ -182,6 +194,10 @@
 				RelativePath=".\ctaocrypt\src\dsa.c"
 				>
 			
+			
+			
 			
@@ -230,6 +246,10 @@
 				RelativePath=".\ctaocrypt\src\misc.c"
 				>
 			
+			
+			
 			
diff --git a/cyassl.vcproj b/cyassl.vcproj
index 958f3ab61..82f919d25 100755
--- a/cyassl.vcproj
+++ b/cyassl.vcproj
@@ -162,10 +162,22 @@
 				RelativePath=".\ctaocrypt\src\asn.c"
 				>
 			
+			
+			
+			
+			
 			
 			
+			
+			
 			
@@ -178,6 +190,10 @@
 				RelativePath=".\ctaocrypt\src\dsa.c"
 				>
 			
+			
+			
 			
@@ -222,6 +238,10 @@
 				RelativePath=".\ctaocrypt\src\memory.c"
 				>
 			
+			
+			
 			
diff --git a/cyassl/ctaocrypt/aes.h b/cyassl/ctaocrypt/aes.h
index 37861903e..e280e006b 100644
--- a/cyassl/ctaocrypt/aes.h
+++ b/cyassl/ctaocrypt/aes.h
@@ -92,6 +92,9 @@ typedef struct Aes {
     word32  magic;           /* using cavium magic */
     word64  contextHandle;   /* nitrox context memory handle */
 #endif
+#ifdef CYASSL_AES_COUNTER
+    word32  left;            /* unsued bytes left from last call */
+#endif 
 } Aes;
 
 
diff --git a/cyassl/ctaocrypt/asn.h b/cyassl/ctaocrypt/asn.h
index 70dbfbe09..90ba8c7a1 100644
--- a/cyassl/ctaocrypt/asn.h
+++ b/cyassl/ctaocrypt/asn.h
@@ -59,6 +59,7 @@ enum ASN_Tags {
     ASN_TAG_NULL          = 0x05,
     ASN_OBJECT_ID         = 0x06,
     ASN_ENUMERATED        = 0x0a,
+    ASN_UTF8STRING        = 0x0c,
     ASN_SEQUENCE          = 0x10,
     ASN_SET               = 0x11,
     ASN_UTC_TIME          = 0x17,
@@ -125,6 +126,9 @@ enum Misc_ASN {
     MAX_ALGO_SZ         =  20,
     MAX_SEQ_SZ          =   5,     /* enum(seq | con) + length(4) */  
     MAX_SET_SZ          =   5,     /* enum(set | con) + length(4) */  
+    MAX_OCTET_STR_SZ    =   5,     /* enum(set | con) + length(4) */
+    MAX_EXP_SZ          =   5,     /* enum(contextspec|con|exp) + length(4) */
+    MAX_PRSTR_SZ        =   5,     /* enum(prstr) + length(4) */
     MAX_VERSION_SZ      =   5,     /* enum + id + version(byte) + (header(2))*/
     MAX_ENCODED_DIG_SZ  =  73,     /* sha512 + enum(bit or octet) + legnth(4) */
     MAX_RSA_INT_SZ      = 517,     /* RSA raw sz 4096 for bits + tag + len(4) */
@@ -135,6 +139,11 @@ enum Misc_ASN {
     MAX_CA_SZ           =  32,     /* Max encoded CA basic constraint length */
     MAX_SN_SZ           =  35,     /* Max encoded serial number (INT) length */
 #ifdef CYASSL_CERT_GEN
+    #ifdef CYASSL_CERT_REQ
+                          /* Max encoded cert req attributes length */
+        MAX_ATTRIB_SZ   = MAX_SEQ_SZ * 3 + (11 + MAX_SEQ_SZ) * 2 +
+                          MAX_PRSTR_SZ + CTC_NAME_SIZE, /* 11 is the OID size */
+    #endif
     #ifdef CYASSL_ALT_NAMES
         MAX_EXTENSIONS_SZ   = 1 + MAX_LENGTH_SZ + CTC_MAX_ALT_SIZE,
     #else
@@ -151,9 +160,11 @@ enum Misc_ASN {
 
 
 enum Oid_Types {
-    hashType = 0,
-    sigType  = 1,
-    keyType  = 2
+    hashType  = 0,
+    sigType   = 1,
+    keyType   = 2,
+    curveType = 3,
+    blkType   = 4
 };
 
 
@@ -167,6 +178,12 @@ enum Hash_Sum  {
 };
 
 
+enum Block_Sum {
+    DESb  = 69,
+    DES3b = 652
+};
+
+
 enum Key_Sum {
     DSAk   = 515,
     RSAk   = 645,
@@ -198,7 +215,8 @@ enum Extensions_Sum {
     CA_ISSUER_OID   = 117,
     AUTH_KEY_OID    = 149,
     SUBJ_KEY_OID    = 128,
-    CERT_POLICY_OID = 146
+    CERT_POLICY_OID = 146,
+    KEY_USAGE_OID   = 129  /* 2.5.29.15 */
 };
 
 enum CertificatePolicy_Sum {
@@ -216,6 +234,18 @@ enum VerifyType {
 };
 
 
+/* Key usage extension bits */
+#define KEYUSE_DIGITAL_SIG    0x0100
+#define KEYUSE_CONTENT_COMMIT 0x0080
+#define KEYUSE_KEY_ENCIPHER   0x0040
+#define KEYUSE_DATA_ENCIPHER  0x0020
+#define KEYUSE_KEY_AGREE      0x0010
+#define KEYUSE_KEY_CERT_SIGN  0x0008
+#define KEYUSE_CRL_SIGN       0x0004
+#define KEYUSE_ENCIPHER_ONLY  0x0002
+#define KEYUSE_DECIPHER_ONLY  0x0001
+
+
 typedef struct DNS_entry   DNS_entry;
 
 struct DNS_entry {
@@ -296,11 +326,35 @@ struct DecodedCert {
     byte    extSubjKeyIdSet;         /* Set when the SKID was read from cert */
     byte    extAuthKeyId[SHA_SIZE];  /* Authority Key ID                 */
     byte    extAuthKeyIdSet;         /* Set when the AKID was read from cert */
-    byte    isCA;                    /* CA basic constraint true */
+    byte    isCA;                    /* CA basic constraint true         */
+#ifdef OPENSSL_EXTRA
+    byte    extBasicConstSet;
+    byte    extBasicConstCrit;
+    byte    extBasicConstPlSet;
+    word32  pathLength;              /* CA basic constraint path length, opt */
+    byte    extSubjAltNameSet;
+    byte    extSubjAltNameCrit;
+    byte    extAuthKeyIdCrit;
+    byte    extSubjKeyIdCrit;
+    byte    extKeyUsageSet;
+    byte    extKeyUsageCrit;
+    word16  extKeyUsage;             /* Key usage bitfield               */
+    byte*   extAuthKeyIdSrc;
+    word32  extAuthKeyIdSz;
+    byte*   extSubjKeyIdSrc;
+    word32  extSubjKeyIdSz;
+    #ifdef HAVE_ECC
+        word32 pkCurveOID;           /* Public Key's curve OID */
+    #endif /* HAVE_ECC */
+#endif
     byte*   beforeDate;
     int     beforeDateLen;
     byte*   afterDate;
     int     afterDateLen;
+#ifdef HAVE_PKCS7
+    byte*   issuerRaw;               /* pointer to issuer inside source */
+    int     issuerRawLen;
+#endif
 #if defined(CYASSL_CERT_GEN)
     /* easy access to subject info for other sign */
     char*   subjectSN;
@@ -329,6 +383,10 @@ struct DecodedCert {
     byte*   hwType;
     int     hwSerialNumSz;
     byte*   hwSerialNum;
+    #ifdef OPENSSL_EXTRA
+        byte    extCertPolicySet;
+        byte    extCertPolicyCrit;
+    #endif /* OPENSSL_EXTRA */
 #endif /* CYASSL_SEP */
 };
 
@@ -385,15 +443,37 @@ CYASSL_LOCAL int ToTraditionalEnc(byte* buffer, word32 length,const char*, int);
 
 CYASSL_LOCAL int ValidateDate(const byte* date, byte format, int dateType);
 
+/* ASN.1 helper functions */
+CYASSL_LOCAL int GetLength(const byte* input, word32* inOutIdx, int* len,
+                           word32 maxIdx);
+CYASSL_LOCAL int GetSequence(const byte* input, word32* inOutIdx, int* len,
+                             word32 maxIdx);
+CYASSL_LOCAL int GetSet(const byte* input, word32* inOutIdx, int* len,
+                        word32 maxIdx);
+CYASSL_LOCAL int GetMyVersion(const byte* input, word32* inOutIdx,
+                              int* version);
+CYASSL_LOCAL int GetInt(mp_int* mpi, const byte* input, word32* inOutIdx,
+                        word32 maxIdx);
+CYASSL_LOCAL int GetAlgoId(const byte* input, word32* inOutIdx, word32* oid,
+                           word32 maxIdx);
+CYASSL_LOCAL word32 SetLength(word32 length, byte* output);
+CYASSL_LOCAL word32 SetSequence(word32 len, byte* output);
+CYASSL_LOCAL word32 SetOctetString(word32 len, byte* output);
+CYASSL_LOCAL word32 SetImplicit(byte tag, byte number, word32 len,byte* output);
+CYASSL_LOCAL word32 SetExplicit(byte number, word32 len, byte* output);
+CYASSL_LOCAL word32 SetSet(word32 len, byte* output);
+CYASSL_LOCAL word32 SetAlgoID(int algoOID, byte* output, int type, int curveSz);
+CYASSL_LOCAL int SetMyVersion(word32 version, byte* output, int header);
+CYASSL_LOCAL int SetSerialNumber(const byte* sn, word32 snSz, byte* output);
+CYASSL_LOCAL int GetNameHash(const byte* source, word32* idx, byte* hash,
+                             int maxIdx);
+
 #ifdef HAVE_ECC
     /* ASN sig helpers */
     CYASSL_LOCAL int StoreECC_DSA_Sig(byte* out, word32* outLen, mp_int* r,
                                       mp_int* s);
     CYASSL_LOCAL int DecodeECC_DSA_Sig(const byte* sig, word32 sigLen,
                                        mp_int* r, mp_int* s);
-    /* private key helpers */
-    CYASSL_API int EccPrivateKeyDecode(const byte* input,word32* inOutIdx,
-                                         ecc_key*,word32);
 #endif
 
 #ifdef CYASSL_CERT_GEN
@@ -403,7 +483,8 @@ enum cert_enums {
     JOINT_LEN       =  2,
     EMAIL_JOINT_LEN =  9,
     RSA_KEY         = 10,
-    NTRU_KEY        = 11
+    NTRU_KEY        = 11,
+    ECC_KEY         = 12
 };
 
 
diff --git a/cyassl/ctaocrypt/asn_public.h b/cyassl/ctaocrypt/asn_public.h
index f824fbb36..24c6a79e5 100644
--- a/cyassl/ctaocrypt/asn_public.h
+++ b/cyassl/ctaocrypt/asn_public.h
@@ -24,6 +24,7 @@
 #define CTAO_CRYPT_ASN_PUBLIC_H
 
 #include 
+#include 
 #ifdef CYASSL_CERT_GEN
     #include 
 #endif
@@ -41,7 +42,8 @@ enum CertType {
     DH_PARAM_TYPE,
     CRL_TYPE,
     CA_TYPE,
-    ECC_PRIVATEKEY_TYPE
+    ECC_PRIVATEKEY_TYPE,
+    CERTREQ_TYPE
 };
 
 
@@ -63,6 +65,10 @@ enum Ctc_SigType {
 
 #ifdef CYASSL_CERT_GEN
 
+#ifndef HAVE_ECC
+    typedef struct ecc_key ecc_key;
+#endif
+
 enum Ctc_Misc {
     CTC_NAME_SIZE    =   64,
     CTC_DATE_SIZE    =   32,
@@ -103,6 +109,9 @@ typedef struct Cert {
     byte     afterDate[CTC_DATE_SIZE];   /* after date copy */
     int      afterDateSz;                /* size of copy */
 #endif
+#ifdef CYASSL_CERT_REQ
+    char     challengePw[CTC_NAME_SIZE];
+#endif
 } Cert;
 
 
@@ -120,8 +129,14 @@ typedef struct Cert {
    keyType    = RSA_KEY (default)
 */
 CYASSL_API void InitCert(Cert*);
-CYASSL_API int  MakeCert(Cert*, byte* derBuffer, word32 derSz, RsaKey*, RNG*);
-CYASSL_API int  SignCert(Cert*, byte* derBuffer, word32 derSz, RsaKey*, RNG*);
+CYASSL_API int  MakeCert(Cert*, byte* derBuffer, word32 derSz, RsaKey*,
+                         ecc_key*, RNG*);
+#ifdef CYASSL_CERT_REQ
+    CYASSL_API int  MakeCertReq(Cert*, byte* derBuffer, word32 derSz, RsaKey*,
+                                ecc_key*);
+#endif
+CYASSL_API int  SignCert(int requestSz, int sigType, byte* derBuffer,
+                         word32 derSz, RsaKey*, ecc_key*, RNG*);
 CYASSL_API int  MakeSelfCert(Cert*, byte* derBuffer, word32 derSz, RsaKey*,
                              RNG*);
 CYASSL_API int  SetIssuer(Cert*, const char*);
@@ -147,6 +162,12 @@ CYASSL_API int  SetDatesBuffer(Cert*, const byte*, int);
                             word32 outputSz, int type);
 #endif
 
+#ifdef HAVE_ECC
+    /* private key helpers */
+    CYASSL_API int EccPrivateKeyDecode(const byte* input,word32* inOutIdx,
+                                         ecc_key*,word32);
+#endif
+
 
 #ifdef __cplusplus
     } /* extern "C" */
diff --git a/cyassl/ctaocrypt/coding.h b/cyassl/ctaocrypt/coding.h
index a22cd3801..911163794 100644
--- a/cyassl/ctaocrypt/coding.h
+++ b/cyassl/ctaocrypt/coding.h
@@ -39,6 +39,9 @@ CYASSL_LOCAL int Base64_Decode(const byte* in, word32 inLen, byte* out,
     CYASSL_API
     int Base64_Encode(const byte* in, word32 inLen, byte* out,
                                   word32* outLen);
+    CYASSL_API
+    int Base64_EncodeEsc(const byte* in, word32 inLen, byte* out,
+                                  word32* outLen);
     CYASSL_LOCAL 
     int Base16_Decode(const byte* in, word32 inLen, byte* out, word32* outLen);
 #endif
diff --git a/cyassl/ctaocrypt/des3.h b/cyassl/ctaocrypt/des3.h
index 219fa3ed9..fe931960e 100644
--- a/cyassl/ctaocrypt/des3.h
+++ b/cyassl/ctaocrypt/des3.h
@@ -63,22 +63,22 @@ enum {
 typedef struct Des {
     word32 reg[DES_BLOCK_SIZE / sizeof(word32)];      /* for CBC mode */
     word32 tmp[DES_BLOCK_SIZE / sizeof(word32)];      /* same         */
-    #ifdef COLDFIRE_SEC
+#ifdef HAVE_COLDFIRE_SEC
     byte keylen ;        /* for Coldfire SEC   */
     byte ivlen ;         /* for Coldfire SEC   */
     byte iv[DES3_IVLEN]; /* for Coldfire SEC   */
-    #endif
+#endif
     word32 key[DES_KS_SIZE];
 } Des;
 
 
 /* DES3 encryption and decryption */
 typedef struct Des3 {
-    #ifdef COLDFIRE_SEC
+#ifdef HAVE_COLDFIRE_SEC
     byte keylen ;        /* for Coldfire SEC   */
     byte ivlen ;         /* for Coldfire SEC   */
     byte iv[DES3_IVLEN]; /* for Coldfire SEC   */
-    #endif
+#endif
     word32 key[3][DES_KS_SIZE];
     word32 reg[DES_BLOCK_SIZE / sizeof(word32)];      /* for CBC mode */
     word32 tmp[DES_BLOCK_SIZE / sizeof(word32)];      /* same         */
diff --git a/cyassl/ctaocrypt/ecc.h b/cyassl/ctaocrypt/ecc.h
index 683429fec..2434a6844 100644
--- a/cyassl/ctaocrypt/ecc.h
+++ b/cyassl/ctaocrypt/ecc.h
@@ -49,7 +49,7 @@ typedef struct {
     int size;       /* The size of the curve in octets */
     const char* name;     /* name of this curve */
     const char* prime;    /* prime that defines the field, curve is in (hex) */
-    const char* B;        /* fields B param (hex) */
+    const char* Bf;       /* fields B param (hex) */
     const char* order;    /* order of the curve (hex) */
     const char* Gx;       /* x coordinate of the base point on curve (hex) */
     const char* Gy;       /* y coordinate of the base point on curve (hex) */
@@ -119,6 +119,7 @@ CYASSL_API
 int ecc_sig_size(ecc_key* key);
 
 
+#ifdef HAVE_ECC_ENCRYPT
 /* ecc encrypt */
 
 enum ecEncAlgo {
@@ -137,34 +138,39 @@ enum ecMacAlgo {
 };
 
 enum {
-    KEY_SIZE_128 = 16,   
-    KEY_SIZE_256 = 32,   
-    IV_SIZE_64   =  8   
+    KEY_SIZE_128     = 16,   
+    KEY_SIZE_256     = 32,   
+    IV_SIZE_64       =  8,
+    EXCHANGE_SALT_SZ = 16,  
+    EXCHANGE_INFO_SZ = 23  
 };
 
-typedef struct ecEncOptions {
-    byte      encAlgo;     /* which encryption type */
-    byte      kdfAlgo;     /* which key derivation function type */
-    byte      macAlgo;     /* which mac function type */
-    byte*     kdfSalt;     /* optional salt for kdf */
-    byte*     kdfInfo;     /* optional info for kdf */
-    byte*     macSalt;     /* optional salt for mac */
-    word32    kdfSaltSz;   /* size of kdfSalt */
-    word32    kdfInfoSz;   /* size of kdfInfo */
-    word32    macSaltSz;   /* size of macSalt */
-} ecEncOptions;
+enum ecFlags {
+    REQ_RESP_CLIENT = 1,
+    REQ_RESP_SERVER = 2
+};
+
+
+typedef struct ecEncCtx ecEncCtx;
 
 CYASSL_API
-void ecc_encrypt_init_options(ecEncOptions*); /* init and set to defaults */
+ecEncCtx* ecc_ctx_new(int flags, RNG* rng);
 CYASSL_API
-void ecc_encrypt_free_options(ecEncOptions*); /* release/clear options */
+void ecc_ctx_free(ecEncCtx*);
+
+CYASSL_API
+const byte* ecc_ctx_get_own_salt(ecEncCtx*);
+CYASSL_API
+int ecc_ctx_set_peer_salt(ecEncCtx*, const byte* salt);
 
 CYASSL_API
 int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
-                word32 msgSz, byte* out, word32* outSz, ecEncOptions* options);
+                word32 msgSz, byte* out, word32* outSz, ecEncCtx* ctx);
 CYASSL_API
 int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
-                word32 msgSz, byte* out, word32* outSz, ecEncOptions* options);
+                word32 msgSz, byte* out, word32* outSz, ecEncCtx* ctx);
+
+#endif /* HAVE_ECC_ENCRYPT */
 
 #ifdef __cplusplus
     }    /* extern "C" */    
diff --git a/cyassl/ctaocrypt/error.h b/cyassl/ctaocrypt/error.h
index 7bb7960c3..af4d8e9c8 100644
--- a/cyassl/ctaocrypt/error.h
+++ b/cyassl/ctaocrypt/error.h
@@ -114,6 +114,14 @@ enum {
     ASN_CRL_NO_SIGNER_E = -190,  /* ASN CRL no signer to confirm failure */
     ASN_OCSP_CONFIRM_E  = -191,  /* ASN OCSP signature confirm failure */
 
+    BAD_ENC_STATE_E     = -192,  /* Bad ecc enc state operation */
+    BAD_PADDING_E       = -193,  /* Bad padding, msg not correct length  */
+
+    REQ_ATTRIBUTE_E     = -194,  /* setting cert request attributes error */
+
+    PKCS7_OID_E         = -195,  /* PKCS#7, mismatched OID error */
+    PKCS7_RECIP_E       = -196,  /* PKCS#7, recipient error */
+
     MIN_CODE_E         = -200   /* errors -101 - -199 */
 };
 
diff --git a/cyassl/ctaocrypt/include.am b/cyassl/ctaocrypt/include.am
index 8be43c5e1..5c38659ef 100644
--- a/cyassl/ctaocrypt/include.am
+++ b/cyassl/ctaocrypt/include.am
@@ -21,6 +21,7 @@ nobase_include_HEADERS+= \
                          cyassl/ctaocrypt/md4.h \
                          cyassl/ctaocrypt/md5.h \
                          cyassl/ctaocrypt/misc.h \
+                         cyassl/ctaocrypt/pkcs7.h \
                          cyassl/ctaocrypt/port.h \
                          cyassl/ctaocrypt/pwdbased.h \
                          cyassl/ctaocrypt/rabbit.h \
diff --git a/cyassl/ctaocrypt/integer.h b/cyassl/ctaocrypt/integer.h
index 2f7ab84fa..707eff7bf 100644
--- a/cyassl/ctaocrypt/integer.h
+++ b/cyassl/ctaocrypt/integer.h
@@ -286,6 +286,7 @@ int  mp_2expt (mp_int * a, int b);
 int  mp_reduce_2k_setup(mp_int *a, mp_digit *d);
 int  mp_add_d (mp_int* a, mp_digit b, mp_int* c);
 int mp_set_int (mp_int * a, unsigned long b);
+int mp_sub_d (mp_int * a, mp_digit b, mp_int * c);
 /* end support added functions */
 
 /* added */
@@ -305,10 +306,6 @@ int mp_init_multi(mp_int* a, mp_int* b, mp_int* c, mp_int* d, mp_int* e,
     int mp_lcm (mp_int * a, mp_int * b, mp_int * c);
 #endif
 
-#if defined(HAVE_ECC) || !defined(NO_PWDBASED) || defined(CYASSL_SNIFFER)
-    int mp_sub_d (mp_int * a, mp_digit b, mp_int * c);
-#endif
-
 #ifdef __cplusplus
    }
 #endif
diff --git a/cyassl/ctaocrypt/pkcs7.h b/cyassl/ctaocrypt/pkcs7.h
new file mode 100644
index 000000000..b4313f399
--- /dev/null
+++ b/cyassl/ctaocrypt/pkcs7.h
@@ -0,0 +1,123 @@
+/* pkcs7.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful, 
+ * * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+#ifdef HAVE_PKCS7
+
+#ifndef CTAO_CRYPT_PKCS7_H
+#define CTAO_CRYPT_PKCS7_H
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef __cplusplus
+    extern "C" {
+#endif
+
+/* PKCS#7 content types, ref RFC 2315 (Section 14) */
+enum PKCS7_TYPES {
+    PKCS7_MSG                 = 650,   /* 1.2.840.113549.1.7   */
+    DATA                      = 651,   /* 1.2.840.113549.1.7.1 */
+    SIGNED_DATA               = 652,   /* 1.2.840.113549.1.7.2 */
+    ENVELOPED_DATA            = 653,   /* 1.2.840.113549.1.7.3 */
+    SIGNED_AND_ENVELOPED_DATA = 654,   /* 1.2.840.113549.1.7.4 */
+    DIGESTED_DATA             = 655,   /* 1.2.840.113549.1.7.5 */
+    ENCRYPTED_DATA            = 656    /* 1.2.840.113549.1.7.6 */
+};
+
+enum Pkcs7_Misc {
+    PKCS7_NONCE_SZ       = 16,
+    MAX_ENCRYPTED_KEY_SZ = 512,           /* max enc. key size, RSA <= 4096 */
+    MAX_CONTENT_KEY_LEN  = DES3_KEYLEN,   /* highest current cipher is 3DES */
+    MAX_RECIP_SZ         = MAX_VERSION_SZ +
+                           MAX_SEQ_SZ + ASN_NAME_MAX + MAX_SN_SZ +
+                           MAX_SEQ_SZ + MAX_ALGO_SZ + 1 + MAX_ENCRYPTED_KEY_SZ
+};
+
+
+typedef struct PKCS7Attrib {
+    byte* oid;
+    word32 oidSz;
+    byte* value;
+    word32 valueSz;
+} PKCS7Attrib;
+
+
+typedef struct PKCS7 {
+    byte* content;                /* inner content, not owner             */
+    word32 contentSz;             /* content size                         */
+    int contentOID;               /* PKCS#7 content type OID sum          */
+
+    RNG* rng;
+
+    int hashOID;
+    int encryptOID;               /* key encryption algorithm OID         */
+
+    byte*  singleCert;            /* recipient cert, DER, not owner       */
+    word32 singleCertSz;          /* size of recipient cert buffer, bytes */
+    byte issuerHash[SHA_SIZE];    /* hash of all alt Names                */
+    byte*  issuer;                /* issuer name of singleCert            */
+    word32 issuerSz;              /* length of issuer name                */
+    byte issuerSn[MAX_SN_SZ];     /* singleCert's serial number           */
+    word32 issuerSnSz;            /* length of serial number              */
+    byte publicKey[512];
+    word32 publicKeySz;
+    byte*  privateKey;            /* private key, DER, not owner          */
+    word32 privateKeySz;          /* size of private key buffer, bytes    */
+    
+    PKCS7Attrib* signedAttribs;
+    word32 signedAttribsSz;
+} PKCS7;
+
+
+CYASSL_LOCAL int SetContentType(int pkcs7TypeOID, byte* output);
+CYASSL_LOCAL int GetContentType(const byte* input, word32* inOutIdx,
+                                word32* oid, word32 maxIdx);
+CYASSL_LOCAL int CreateRecipientInfo(const byte* cert, word32 certSz,
+                                     int keyEncAlgo, int blockKeySz,
+                                     RNG* rng, byte* contentKeyPlain,
+                                     byte* contentKeyEnc,
+                                     int* keyEncSz, byte* out, word32 outSz);
+
+CYASSL_API int  PKCS7_InitWithCert(PKCS7* pkcs7, byte* cert, word32 certSz);
+CYASSL_API void PKCS7_Free(PKCS7* pkcs7);
+CYASSL_API int  PKCS7_EncodeData(PKCS7* pkcs7, byte* output, word32 outputSz);
+CYASSL_API int  PKCS7_EncodeSignedData(PKCS7* pkcs7,
+                                       byte* output, word32 outputSz);
+CYASSL_API int  PKCS7_VerifySignedData(PKCS7* pkcs7,
+                                       byte* pkiMsg, word32 pkiMsgSz);
+CYASSL_API int  PKCS7_EncodeEnvelopedData(PKCS7* pkcs7,
+                                          byte* output, word32 outputSz);
+CYASSL_API int  PKCS7_DecodeEnvelopedData(PKCS7* pkcs7, byte* pkiMsg,
+                                          word32 pkiMsgSz, byte* output,
+                                          word32 outputSz);
+
+#ifdef __cplusplus
+    } /* extern "C" */
+#endif
+
+#endif /* CTAO_CRYPT_PKCS7_H */
+
+#endif /* HAVE_PKCS7 */
+
diff --git a/cyassl/ctaocrypt/settings.h b/cyassl/ctaocrypt/settings.h
index d61c5484a..22dea06d0 100644
--- a/cyassl/ctaocrypt/settings.h
+++ b/cyassl/ctaocrypt/settings.h
@@ -78,6 +78,9 @@
 /* Uncomment next line if using Comverge settings */
 /* #define COMVERGE */
 
+/* Uncomment next line if using QL SEP settings */
+/* #define CYASSL_QL */
+
 
 #include 
 
@@ -149,10 +152,26 @@
 #endif /* MBED */
 
 #ifdef CYASSL_TYTO
+    #include "rand.h"
     #define FREERTOS
     #define NO_FILESYSTEM
     #define CYASSL_USER_IO
     #define NO_DEV_RANDOM
+    #define HAVE_ECC
+    #define HAVE_ECC_ENCRYPT
+    #define ECC_SHAMIR
+    #define HAVE_HKDF
+    #define USE_FAST_MATH
+    #define TFM_TIMING_RESISTANT
+    #define FP_MAX_BITS 512
+    #define NO_OLD_TLS
+    #define NO_MD4
+    #define NO_RABBIT
+    #define NO_HC128
+    #define NO_RSA
+    #define NO_DSA
+    #define NO_PWDBASED
+    #define NO_PSK
 #endif
 
 #ifdef FREERTOS_WINSIM
@@ -313,8 +332,8 @@
         #include "mutex.h"
     #endif
 
-    #define XMALLOC(s, h, type) (void *)_mem_alloc_system((s))
-    #define XFREE(p, h, type)   _mem_free(p)
+    #define XMALLOC(s, h, t)    (void *)_mem_alloc_system((s))
+    #define XFREE(p, h, t)      {void* xp = (p); if ((xp)) _mem_free((xp));}
     /* Note: MQX has no realloc, using fastmath above */
 #endif
 
@@ -524,6 +543,37 @@
 #endif /* MICRIUM */
 
 
+#ifdef CYASSL_QL
+    #ifndef CYASSL_SEP
+        #define CYASSL_SEP
+    #endif
+    #ifndef OPENSSL_EXTRA
+        #define OPENSSL_EXTRA
+    #endif
+    #ifndef SESSION_CERTS
+        #define SESSION_CERTS
+    #endif
+    #ifndef HAVE_AESCCM
+        #define HAVE_AESCCM
+    #endif
+    #ifndef ATOMIC_USER
+        #define ATOMIC_USER
+    #endif
+    #ifndef CYASSL_DER_LOAD
+        #define CYASSL_DER_LOAD
+    #endif
+    #ifndef KEEP_PEER_CERT
+        #define KEEP_PEER_CERT
+    #endif
+    #ifndef HAVE_ECC
+        #define HAVE_ECC
+    #endif
+    #ifndef SESSION_INDEX
+        #define SESSION_INDEX
+    #endif
+#endif /* CYASSL_QL */
+
+
 #if !defined(XMALLOC_USER) && !defined(MICRIUM_MALLOC) && \
     !defined(CYASSL_LEANPSK) && !defined(NO_CYASSL_MEMORY)
     #define USE_CYASSL_MEMORY
diff --git a/cyassl/ctaocrypt/tfm.h b/cyassl/ctaocrypt/tfm.h
index 2495f67ab..e1b16e2d3 100644
--- a/cyassl/ctaocrypt/tfm.h
+++ b/cyassl/ctaocrypt/tfm.h
@@ -510,104 +510,104 @@ void s_fp_add(fp_int *a, fp_int *b, fp_int *c);
 void s_fp_sub(fp_int *a, fp_int *b, fp_int *c);
 void fp_reverse(unsigned char *s, int len);
 
-void fp_mul_comba(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba(fp_int *a, fp_int *b, fp_int *c);
 
 #ifdef TFM_SMALL_SET
-void fp_mul_comba_small(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba_small(fp_int *a, fp_int *b, fp_int *c);
 #endif
 
 #ifdef TFM_MUL3
-void fp_mul_comba3(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba3(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL4
-void fp_mul_comba4(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba4(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL6
-void fp_mul_comba6(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba6(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL7
-void fp_mul_comba7(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba7(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL8
-void fp_mul_comba8(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba8(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL9
-void fp_mul_comba9(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba9(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL12
-void fp_mul_comba12(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba12(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL17
-void fp_mul_comba17(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba17(fp_int *a, fp_int *b, fp_int *c);
 #endif
 
 #ifdef TFM_MUL20
-void fp_mul_comba20(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba20(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL24
-void fp_mul_comba24(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba24(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL28
-void fp_mul_comba28(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba28(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL32
-void fp_mul_comba32(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba32(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL48
-void fp_mul_comba48(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba48(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL64
-void fp_mul_comba64(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba64(fp_int *a, fp_int *b, fp_int *c);
 #endif
 
-void fp_sqr_comba(fp_int *A, fp_int *B);
+void fp_sqr_comba(fp_int *a, fp_int *b);
 
 #ifdef TFM_SMALL_SET
-void fp_sqr_comba_small(fp_int *A, fp_int *B);
+void fp_sqr_comba_small(fp_int *a, fp_int *b);
 #endif
 
 #ifdef TFM_SQR3
-void fp_sqr_comba3(fp_int *A, fp_int *B);
+void fp_sqr_comba3(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR4
-void fp_sqr_comba4(fp_int *A, fp_int *B);
+void fp_sqr_comba4(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR6
-void fp_sqr_comba6(fp_int *A, fp_int *B);
+void fp_sqr_comba6(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR7
-void fp_sqr_comba7(fp_int *A, fp_int *B);
+void fp_sqr_comba7(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR8
-void fp_sqr_comba8(fp_int *A, fp_int *B);
+void fp_sqr_comba8(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR9
-void fp_sqr_comba9(fp_int *A, fp_int *B);
+void fp_sqr_comba9(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR12
-void fp_sqr_comba12(fp_int *A, fp_int *B);
+void fp_sqr_comba12(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR17
-void fp_sqr_comba17(fp_int *A, fp_int *B);
+void fp_sqr_comba17(fp_int *a, fp_int *b);
 #endif
 
 #ifdef TFM_SQR20
-void fp_sqr_comba20(fp_int *A, fp_int *B);
+void fp_sqr_comba20(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR24
-void fp_sqr_comba24(fp_int *A, fp_int *B);
+void fp_sqr_comba24(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR28
-void fp_sqr_comba28(fp_int *A, fp_int *B);
+void fp_sqr_comba28(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR32
-void fp_sqr_comba32(fp_int *A, fp_int *B);
+void fp_sqr_comba32(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR48
-void fp_sqr_comba48(fp_int *A, fp_int *B);
+void fp_sqr_comba48(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR64
-void fp_sqr_comba64(fp_int *A, fp_int *B);
+void fp_sqr_comba64(fp_int *a, fp_int *b);
 #endif
 /*extern const char *fp_s_rmap;*/
 
@@ -642,7 +642,7 @@ int  mp_mul (mp_int * a, mp_int * b, mp_int * c);
 int  mp_mulmod (mp_int * a, mp_int * b, mp_int * c, mp_int * d);
 int  mp_mod(mp_int *a, mp_int *b, mp_int *c);
 int  mp_invmod(mp_int *a, mp_int *b, mp_int *c);
-int  mp_exptmod (mp_int * G, mp_int * X, mp_int * P, mp_int * Y);
+int  mp_exptmod (mp_int * g, mp_int * x, mp_int * p, mp_int * y);
 
 int  mp_cmp(mp_int *a, mp_int *b);
 int  mp_cmp_d(mp_int *a, mp_digit b);
@@ -663,7 +663,7 @@ void mp_rshb(mp_int *a, int x);
 #ifdef HAVE_ECC
     int mp_read_radix(mp_int* a, const char* str, int radix);
     int mp_set(fp_int *a, fp_digit b);
-    int mp_sqr(fp_int *A, fp_int *B);
+    int mp_sqr(fp_int *a, fp_int *b);
     int mp_montgomery_reduce(fp_int *a, fp_int *m, fp_digit mp);
     int mp_montgomery_setup(fp_int *a, fp_digit *rho);
     int mp_div_2(fp_int * a, fp_int * b);
diff --git a/cyassl/ctaocrypt/types.h b/cyassl/ctaocrypt/types.h
index 8c44bb89f..ea9cf8c11 100644
--- a/cyassl/ctaocrypt/types.h
+++ b/cyassl/ctaocrypt/types.h
@@ -139,6 +139,18 @@ enum {
 #endif
 
 
+/* set up thread local storage if available */
+#ifdef HAVE_THREAD_LS
+    #if defined(_MSC_VER)
+        #define THREAD_LS_T __declspec(thread)
+    #else
+        #define THREAD_LS_T __thread
+    #endif
+#else
+    #define THREAD_LS_T
+#endif
+
+
 /* Micrium will use Visual Studio for compilation but not the Win32 API */
 #if defined(_WIN32) && !defined(MICRIUM) && !defined(FREERTOS) \
         && !defined(EBSNET)
@@ -205,6 +217,11 @@ enum {
         #define XISALPHA(c)     isalpha((c))
     #endif
     /* needed by CyaSSL_check_domain_name() */
+    #ifdef __CYGWIN__
+        /* Cygwin uses a macro version of tolower() by default, use the
+         * function version. */
+        #undef tolower
+    #endif
     #define XTOLOWER(c)      tolower((c))
 #endif
 
@@ -253,7 +270,8 @@ enum {
     DYNAMIC_TYPE_CAVIUM_TMP   = 40,
     DYNAMIC_TYPE_CAVIUM_RSA   = 41,
     DYNAMIC_TYPE_X509         = 42,
-    DYNAMIC_TYPE_TLSX         = 43
+    DYNAMIC_TYPE_TLSX         = 43,
+    DYNAMIC_TYPE_OCSP         = 44
 };
 
 /* max error buffer string size */
diff --git a/cyassl/include.am b/cyassl/include.am
index 0cd892a37..9784ab249 100644
--- a/cyassl/include.am
+++ b/cyassl/include.am
@@ -9,7 +9,6 @@ EXTRA_DIST+= cyassl/sniffer_error.rc
 
 nobase_include_HEADERS+= \
                          cyassl/error.h \
-                         cyassl/internal.h \
                          cyassl/ssl.h \
                          cyassl/sniffer_error.h \
                          cyassl/sniffer.h \
@@ -20,3 +19,7 @@ nobase_include_HEADERS+= \
                          cyassl/options.h \
                          cyassl/ocsp.h \
                          cyassl/crl.h
+
+noinst_HEADERS+= \
+                         cyassl/internal.h
+
diff --git a/cyassl/internal.h b/cyassl/internal.h
index 32b8964bf..085d2a393 100644
--- a/cyassl/internal.h
+++ b/cyassl/internal.h
@@ -483,7 +483,6 @@ enum {
     TLS_RSA_WITH_AES_256_CBC_B2B256   = 0xF9,
     TLS_RSA_WITH_HC_128_B2B256        = 0xFA,   /* eSTREAM too */
 
-
     /* CyaSSL extension - NTRU */
     TLS_NTRU_RSA_WITH_RC4_128_SHA      = 0xe5,
     TLS_NTRU_RSA_WITH_3DES_EDE_CBC_SHA = 0xe6,
@@ -533,8 +532,10 @@ enum {
     TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA    = 0x45,
     TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA    = 0x88,
     TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 = 0xbe,
-    TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 = 0xc4
+    TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 = 0xc4,
 
+    /* Renegotiation Indication Extension Special Suite */
+    TLS_EMPTY_RENEGOTIATION_INFO_SCSV        = 0xff
 };
 
 
@@ -608,6 +609,7 @@ enum Misc {
     CERT_HEADER_SZ        = 3,  /* always 3 bytes          */
     REQ_HEADER_SZ         = 2,  /* cert request header sz  */
     HINT_LEN_SZ           = 2,  /* length of hint size field */
+    TRUNCATED_HMAC_SZ     = 10, /* length of hmac w/ truncated hmac extension */
     HELLO_EXT_TYPE_SZ     = 2,  /* length of a hello extension type */
     HELLO_EXT_SZ          = 8,  /* total length of the lazy hello extensions */
     HELLO_EXT_LEN         = 6,  /* length of the lazy hello extensions */
@@ -981,24 +983,22 @@ typedef struct OCSP_Entry OCSP_Entry;
 #endif
 
 struct OCSP_Entry {
-    OCSP_Entry* next;                       /* next entry             */
+    OCSP_Entry* next;                        /* next entry             */
     byte    issuerHash[OCSP_DIGEST_SIZE];    /* issuer hash            */ 
     byte    issuerKeyHash[OCSP_DIGEST_SIZE]; /* issuer public key hash */
-    CertStatus* status;                     /* OCSP response list     */
-    int         totalStatus;                /* number on list         */
+    CertStatus* status;                      /* OCSP response list     */
+    int         totalStatus;                 /* number on list         */
 };
 
 
+#ifndef HAVE_OCSP
+    typedef struct CYASSL_OCSP CYASSL_OCSP;
+#endif
+
 /* CyaSSL OCSP controller */
 struct CYASSL_OCSP {
-    byte enabled;
-    byte useOverrideUrl;
-    byte useNonce;
-    char overrideUrl[80];
-    OCSP_Entry* ocspList;
-    void* IOCB_OcspCtx;
-    CallbackIOOcsp CBIOOcsp;
-    CallbackIOOcspRespFree CBIOOcspRespFree;
+    CYASSL_CERT_MANAGER* cm;            /* pointer back to cert manager */
+    OCSP_Entry*          ocspList;      /* OCSP response list */
 };
 
 #ifndef MAX_DATE_SIZE
@@ -1076,6 +1076,14 @@ struct CYASSL_CERT_MANAGER {
     byte            crlEnabled;         /* is CRL on ? */
     byte            crlCheckAll;        /* always leaf, but all ? */
     CbMissingCRL    cbMissingCRL;       /* notify through cb of missing crl */
+    CYASSL_OCSP*    ocsp;               /* OCSP checker */
+    byte            ocspEnabled;        /* is OCSP on ? */
+    byte            ocspSendNonce;      /* send the OCSP nonce ? */
+    byte            ocspUseOverrideURL; /* ignore cert's responder, override */
+    char*           ocspOverrideURL;    /* use this responder */
+    void*           ocspIOCtx;          /* I/O callback CTX */
+    CbOCSPIO        ocspIOCb;           /* I/O callback for OCSP lookup */
+    CbOCSPRespFree  ocspRespFreeCb;     /* Frees OCSP Response from IO Cb */
 };
 
 CYASSL_LOCAL int CM_SaveCertCache(CYASSL_CERT_MANAGER*, const char*);
@@ -1153,6 +1161,8 @@ CYASSL_LOCAL void   TLSX_SNI_SetOptions(TLSX* extensions, byte type,
 CYASSL_LOCAL byte   TLSX_SNI_Status(TLSX* extensions, byte type);
 CYASSL_LOCAL word16 TLSX_SNI_GetRequest(TLSX* extensions, byte type,
                                                                    void** data);
+CYASSL_LOCAL int    TLSX_SNI_GetFromBuffer(const byte* buffer, word32 bufferSz,
+                                         byte type, byte* sni, word32* inOutSz);
 #endif
 
 #endif /* HAVE_SNI */
@@ -1166,8 +1176,6 @@ CYASSL_LOCAL int TLSX_UseMaxFragment(TLSX** extensions, byte mfl);
 
 #ifdef HAVE_TRUNCATED_HMAC
 
-#define TRUNCATED_HMAC_SIZE 10
-
 CYASSL_LOCAL int TLSX_UseTruncatedHMAC(TLSX** extensions);
 
 #endif /* HAVE_TRUNCATED_HMAC */
@@ -1360,6 +1368,30 @@ enum ClientCertificateType {
 enum CipherType { stream, block, aead };
 
 
+#ifdef CYASSL_DTLS
+
+    #ifdef WORD64_AVAILABLE
+        typedef word64 DtlsSeq;
+    #else
+        typedef word32 DtlsSeq;
+    #endif
+    #define DTLS_SEQ_BITS (sizeof(DtlsSeq) * CHAR_BIT)
+
+    typedef struct DtlsState {
+        DtlsSeq window;     /* Sliding window for current epoch    */
+        word16 nextEpoch;   /* Expected epoch in next record       */
+        word32 nextSeq;     /* Expected sequence in next record    */
+
+        word16 curEpoch;    /* Received epoch in current record    */
+        word32 curSeq;      /* Received sequence in current record */
+
+        DtlsSeq prevWindow; /* Sliding window for old epoch        */
+        word32 prevSeq;     /* Next sequence in allowed old epoch  */
+    } DtlsState;
+
+#endif /* CYASSL_DTLS */
+
+
 /* keys and secrets */
 typedef struct Keys {
     byte client_write_MAC_secret[MAX_DIGEST_SIZE];   /* max sizes */
@@ -1378,15 +1410,13 @@ typedef struct Keys {
     word32 sequence_number;
     
 #ifdef CYASSL_DTLS
-    word32 dtls_sequence_number;
-    word32 dtls_peer_sequence_number;
-    word32 dtls_expected_peer_sequence_number;
-    word16 dtls_handshake_number;
+    DtlsState dtls_state;                       /* Peer's state */
     word16 dtls_peer_handshake_number;
     word16 dtls_expected_peer_handshake_number;
-    word16 dtls_epoch;
-    word16 dtls_peer_epoch;
-    word16 dtls_expected_peer_epoch;
+
+    word16 dtls_epoch;                          /* Current tx epoch    */
+    word32 dtls_sequence_number;                /* Current tx sequence */
+    word16 dtls_handshake_number;               /* Current tx handshake seq */
 #endif
 
     word32 encryptSz;             /* last size of encrypted data   */
@@ -1661,6 +1691,10 @@ struct CYASSL_X509 {
     byte             hwType[EXTERNAL_SERIAL_SIZE];
     int              hwSerialNumSz;
     byte             hwSerialNum[EXTERNAL_SERIAL_SIZE];
+    #ifdef OPENSSL_EXTRA
+        byte             certPolicySet;
+        byte             certPolicyCrit;
+    #endif /* OPENSSL_EXTRA */
 #endif
     int              notBeforeSz;
     byte             notBefore[MAX_DATE_SZ];
@@ -1670,10 +1704,33 @@ struct CYASSL_X509 {
     buffer           sig;
     int              pubKeyOID;
     buffer           pubKey;
+    #ifdef HAVE_ECC
+        word32       pkCurveOID;
+    #endif /* HAVE_ECC */
     buffer           derCert;                        /* may need  */
     DNS_entry*       altNames;                       /* alt names list */
     DNS_entry*       altNamesNext;                   /* hint for retrieval */
     byte             dynamicMemory;                  /* dynamic memory flag */
+    byte             isCa;
+#ifdef OPENSSL_EXTRA
+    word32           pathLength;
+    word16           keyUsage;
+    byte             basicConstSet;
+    byte             basicConstCrit;
+    byte             basicConstPlSet;
+    byte             subjAltNameSet;
+    byte             subjAltNameCrit;
+    byte             authKeyIdSet;
+    byte             authKeyIdCrit;
+    byte*            authKeyId;
+    word32           authKeyIdSz;
+    byte             subjKeyIdSet;
+    byte             subjKeyIdCrit;
+    byte*            subjKeyId;
+    word32           subjKeyIdSz;
+    byte             keyUsageSet;
+    byte             keyUsageCrit;
+#endif /* OPENSSL_EXTRA */
 };
 
 
diff --git a/cyassl/internal.h.orig b/cyassl/internal.h.orig
new file mode 100644
index 000000000..085d2a393
--- /dev/null
+++ b/cyassl/internal.h.orig
@@ -0,0 +1,2121 @@
+/* internal.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+#ifndef CYASSL_INT_H
+#define CYASSL_INT_H
+
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#ifndef NO_RC4
+    #include 
+#endif
+#ifdef HAVE_ECC
+    #include 
+#endif
+#ifndef NO_SHA256
+    #include 
+#endif
+#ifdef HAVE_OCSP
+    #include 
+#endif
+#ifdef CYASSL_SHA512
+    #include 
+#endif
+
+#ifdef HAVE_AESGCM
+    #include 
+#endif
+
+#ifdef CYASSL_RIPEMD
+    #include 
+#endif
+
+#ifdef CYASSL_CALLBACKS
+    #include 
+    #include 
+#endif
+
+#ifdef USE_WINDOWS_API 
+    #ifdef CYASSL_GAME_BUILD
+        #include "system/xtl.h"
+    #else
+        #if defined(_WIN32_WCE) || defined(WIN32_LEAN_AND_MEAN)
+            /* On WinCE winsock2.h must be included before windows.h */
+            #include 
+        #endif
+        #include 
+    #endif
+#elif defined(THREADX)
+    #ifndef SINGLE_THREADED
+        #include "tx_api.h"
+    #endif
+#elif defined(MICRIUM)
+    /* do nothing, just don't pick Unix */
+#elif defined(FREERTOS) || defined(CYASSL_SAFERTOS)
+    /* do nothing */
+#elif defined(EBSNET)
+    /* do nothing */
+#elif defined(FREESCALE_MQX)
+    /* do nothing */
+#elif defined(CYASSL_MDK_ARM)
+    #if defined(CYASSL_MDK5)
+         #include "cmsis_os.h"
+    #else
+        #include 
+    #endif
+#else
+    #ifndef SINGLE_THREADED
+        #define CYASSL_PTHREADS
+        #include 
+    #endif
+    #if defined(OPENSSL_EXTRA) || defined(GOAHEAD_WS)
+        #include       /* for close of BIO */
+    #endif
+#endif
+
+
+#ifdef HAVE_LIBZ
+    #include "zlib.h"
+#endif
+
+#ifdef _MSC_VER
+    /* 4996 warning to use MS extensions e.g., strcpy_s instead of strncpy */
+    #pragma warning(disable: 4996)
+#endif
+
+#ifdef NO_AES
+    #if !defined (ALIGN16)
+        #define ALIGN16
+    #endif
+#endif
+
+#ifdef NO_SHA
+    #define SHA_DIGEST_SIZE 20 
+#endif
+
+#ifdef NO_SHA256
+    #define SHA256_DIGEST_SIZE 32 
+#endif
+
+
+#ifdef __cplusplus
+    extern "C" {
+#endif
+
+
+#ifdef USE_WINDOWS_API 
+    typedef unsigned int SOCKET_T;
+#else
+    typedef int SOCKET_T;
+#endif
+
+
+typedef byte word24[3];
+
+/* used by ssl.c and cyassl_int.c */
+void c32to24(word32 in, word24 out);
+
+/* Define or comment out the cipher suites you'd like to be compiled in
+   make sure to use at least one BUILD_SSL_xxx or BUILD_TLS_xxx is defined
+
+   When adding cipher suites, add name to cipher_names, idx to cipher_name_idx
+*/
+#if !defined(NO_RSA) && !defined(NO_RC4)
+  #if !defined(NO_SHA)
+    #define BUILD_SSL_RSA_WITH_RC4_128_SHA
+  #endif
+    #if !defined(NO_MD5)
+        #define BUILD_SSL_RSA_WITH_RC4_128_MD5
+    #endif
+    #if !defined(NO_TLS) && defined(HAVE_NTRU) && !defined(NO_SHA)
+        #define BUILD_TLS_NTRU_RSA_WITH_RC4_128_SHA
+    #endif
+#endif
+
+#if !defined(NO_RSA) && !defined(NO_DES3)
+  #if !defined(NO_SHA)
+    #define BUILD_SSL_RSA_WITH_3DES_EDE_CBC_SHA
+    #if !defined(NO_TLS) && defined(HAVE_NTRU)
+        #define BUILD_TLS_NTRU_RSA_WITH_3DES_EDE_CBC_SHA
+    #endif
+  #endif
+#endif
+
+#if !defined(NO_RSA) && !defined(NO_AES) && !defined(NO_TLS)
+  #if !defined(NO_SHA)
+    #define BUILD_TLS_RSA_WITH_AES_128_CBC_SHA
+    #define BUILD_TLS_RSA_WITH_AES_256_CBC_SHA
+    #if defined(HAVE_NTRU)
+        #define BUILD_TLS_NTRU_RSA_WITH_AES_128_CBC_SHA
+        #define BUILD_TLS_NTRU_RSA_WITH_AES_256_CBC_SHA
+    #endif
+  #endif
+    #if !defined (NO_SHA256)
+        #define BUILD_TLS_RSA_WITH_AES_128_CBC_SHA256
+        #define BUILD_TLS_RSA_WITH_AES_256_CBC_SHA256
+    #endif
+    #if defined (HAVE_AESGCM)
+        #define BUILD_TLS_RSA_WITH_AES_128_GCM_SHA256
+        #if defined (CYASSL_SHA384)
+            #define BUILD_TLS_RSA_WITH_AES_256_GCM_SHA384
+        #endif
+    #endif
+    #if defined (HAVE_AESCCM)
+        #define BUILD_TLS_RSA_WITH_AES_128_CCM_8
+        #define BUILD_TLS_RSA_WITH_AES_256_CCM_8
+    #endif
+    #if defined(HAVE_BLAKE2)
+        #define BUILD_TLS_RSA_WITH_AES_128_CBC_B2B256
+        #define BUILD_TLS_RSA_WITH_AES_256_CBC_B2B256
+    #endif
+#endif
+
+#if defined(HAVE_CAMELLIA) && !defined(NO_TLS)
+    #ifndef NO_RSA
+      #if !defined(NO_SHA)
+        #define BUILD_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+        #define BUILD_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+      #endif
+        #ifndef NO_SHA256
+            #define BUILD_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+            #define BUILD_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+        #endif
+        #if !defined(NO_DH) && defined(OPENSSL_EXTRA)
+          #if !defined(NO_SHA)
+            #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+            #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+          #endif
+            #ifndef NO_SHA256
+                #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+                #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+            #endif
+        #endif
+    #endif
+#endif
+
+#if !defined(NO_PSK) && !defined(NO_AES) && !defined(NO_TLS)
+  #if !defined(NO_SHA)
+    #define BUILD_TLS_PSK_WITH_AES_128_CBC_SHA
+    #define BUILD_TLS_PSK_WITH_AES_256_CBC_SHA
+  #endif
+    #ifndef NO_SHA256
+        #define BUILD_TLS_PSK_WITH_AES_128_CBC_SHA256
+        #ifdef HAVE_AESCCM
+            #define BUILD_TLS_PSK_WITH_AES_128_CCM_8
+            #define BUILD_TLS_PSK_WITH_AES_256_CCM_8
+        #endif
+    #endif
+#endif
+
+#if !defined(NO_TLS) && defined(HAVE_NULL_CIPHER)
+    #if !defined(NO_RSA)
+      #if !defined(NO_SHA)
+        #define BUILD_TLS_RSA_WITH_NULL_SHA
+      #endif
+      #ifndef NO_SHA256
+        #define BUILD_TLS_RSA_WITH_NULL_SHA256
+      #endif
+    #endif
+    #if !defined(NO_PSK)
+      #if !defined(NO_SHA)
+        #define BUILD_TLS_PSK_WITH_NULL_SHA
+      #endif
+        #ifndef NO_SHA256
+            #define BUILD_TLS_PSK_WITH_NULL_SHA256
+        #endif
+    #endif
+#endif
+
+#if !defined(NO_HC128) && !defined(NO_RSA) && !defined(NO_TLS)
+    #define BUILD_TLS_RSA_WITH_HC_128_MD5
+  #if !defined(NO_SHA)
+    #define BUILD_TLS_RSA_WITH_HC_128_SHA
+  #endif
+  #if defined(HAVE_BLAKE2)
+    #define BUILD_TLS_RSA_WITH_HC_128_B2B256
+  #endif
+#endif
+
+#if !defined(NO_RABBIT) && !defined(NO_TLS) && !defined(NO_RSA)
+  #if !defined(NO_SHA)
+    #define BUILD_TLS_RSA_WITH_RABBIT_SHA
+  #endif
+#endif
+
+#if !defined(NO_DH) && !defined(NO_AES) && !defined(NO_TLS) && \
+    !defined(NO_RSA) && defined(OPENSSL_EXTRA)
+  #if !defined(NO_SHA)
+    #define BUILD_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+    #define BUILD_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+  #endif
+    #if !defined (NO_SHA256)
+        #define BUILD_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+        #define BUILD_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+        #if defined (HAVE_AESGCM)
+            #define BUILD_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+            #if defined (CYASSL_SHA384)
+                #define BUILD_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+            #endif
+        #endif
+    #endif
+#endif
+
+#if defined(HAVE_ECC) && !defined(NO_TLS)
+    #if !defined(NO_AES)
+        #if !defined(NO_SHA)
+            #if !defined(NO_RSA)
+                #define BUILD_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+                #define BUILD_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+                #define BUILD_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+                #define BUILD_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+            #endif
+    
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+    
+            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+        #endif /* NO_SHA */
+        #ifndef NO_SHA256
+            #if !defined(NO_RSA)
+                #define BUILD_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+                #define BUILD_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+            #endif
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+        #endif
+
+        #ifdef CYASSL_SHA384
+            #if !defined(NO_RSA)
+                #define BUILD_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+                #define BUILD_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+            #endif
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+        #endif
+
+        #if defined (HAVE_AESGCM)
+            #if !defined(NO_RSA)
+                #define BUILD_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+                #define BUILD_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+                #if defined(CYASSL_SHA384)
+                    #define BUILD_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+                    #define BUILD_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+                #endif
+            #endif
+
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+            
+            #if defined(CYASS_SHA384)
+                #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+                #define BUILD_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+            #endif
+        #endif
+        #if defined (HAVE_AESCCM)
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8
+        #endif
+    #endif /* NO_AES */
+    #if !defined(NO_RC4)
+        #if !defined(NO_SHA)
+            #if !defined(NO_RSA)
+                #define BUILD_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+                #define BUILD_TLS_ECDH_RSA_WITH_RC4_128_SHA
+            #endif
+
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+            #define BUILD_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+        #endif
+    #endif
+    #if !defined(NO_DES3)
+        #if !defined(NO_RSA)
+            #define BUILD_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+            #define BUILD_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+        #endif
+
+        #define BUILD_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+        #define BUILD_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+    #endif
+#endif
+
+
+#if defined(BUILD_SSL_RSA_WITH_RC4_128_SHA) || \
+    defined(BUILD_SSL_RSA_WITH_RC4_128_MD5)
+    #define BUILD_ARC4
+#endif
+
+#if defined(BUILD_SSL_RSA_WITH_3DES_EDE_CBC_SHA)
+    #define BUILD_DES3
+#endif
+
+#if defined(BUILD_TLS_RSA_WITH_AES_128_CBC_SHA) || \
+    defined(BUILD_TLS_RSA_WITH_AES_256_CBC_SHA) || \
+    defined(BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256)
+    #undef  BUILD_AES
+    #define BUILD_AES
+#endif
+
+#if defined(BUILD_TLS_RSA_WITH_AES_128_GCM_SHA256) || \
+    defined(BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256)
+    #define BUILD_AESGCM
+#endif
+
+#if defined(BUILD_TLS_RSA_WITH_HC_128_SHA) || \
+    defined(BUILD_TLS_RSA_WITH_HC_128_MD5) || \
+    defined(BUILD_TLS_RSA_WITH_HC_128_B2B256)
+    #define BUILD_HC128
+#endif
+
+#if defined(BUILD_TLS_RSA_WITH_RABBIT_SHA)
+    #define BUILD_RABBIT
+#endif
+
+#ifdef NO_DES3
+    #define DES_BLOCK_SIZE 8
+#else
+    #undef  BUILD_DES3
+    #define BUILD_DES3
+#endif
+
+#ifdef NO_AES
+    #define AES_BLOCK_SIZE 16
+#else
+    #undef  BUILD_AES
+    #define BUILD_AES
+#endif
+
+#ifndef NO_RC4
+    #undef  BUILD_ARC4
+    #define BUILD_ARC4
+#endif
+
+
+
+#if defined(BUILD_AESGCM) || defined(HAVE_AESCCM)
+    #define HAVE_AEAD
+#endif
+
+
+/* actual cipher values, 2nd byte */
+enum {
+    TLS_DHE_RSA_WITH_AES_256_CBC_SHA  = 0x39,
+    TLS_DHE_RSA_WITH_AES_128_CBC_SHA  = 0x33,
+    TLS_RSA_WITH_AES_256_CBC_SHA      = 0x35,
+    TLS_RSA_WITH_AES_128_CBC_SHA      = 0x2F,
+    TLS_RSA_WITH_NULL_SHA             = 0x02,
+    TLS_PSK_WITH_AES_256_CBC_SHA      = 0x8d,
+    TLS_PSK_WITH_AES_128_CBC_SHA256   = 0xae,
+    TLS_PSK_WITH_AES_128_CBC_SHA      = 0x8c,
+    TLS_PSK_WITH_NULL_SHA256          = 0xb0,
+    TLS_PSK_WITH_NULL_SHA             = 0x2c,
+    SSL_RSA_WITH_RC4_128_SHA          = 0x05,
+    SSL_RSA_WITH_RC4_128_MD5          = 0x04,
+    SSL_RSA_WITH_3DES_EDE_CBC_SHA     = 0x0A,
+
+    /* ECC suites, first byte is 0xC0 (ECC_BYTE) */
+    TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA    = 0x14,
+    TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA    = 0x13,
+    TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA  = 0x0A,
+    TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA  = 0x09,
+    TLS_ECDHE_RSA_WITH_RC4_128_SHA        = 0x11,
+    TLS_ECDHE_ECDSA_WITH_RC4_128_SHA      = 0x07,
+    TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA   = 0x12,
+    TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA = 0x08,
+    TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256   = 0x27,
+    TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 = 0x23,
+    TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384   = 0x28,
+    TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 = 0x24,
+
+    /* static ECDH, first byte is 0xC0 (ECC_BYTE) */
+    TLS_ECDH_RSA_WITH_AES_256_CBC_SHA    = 0x0F,
+    TLS_ECDH_RSA_WITH_AES_128_CBC_SHA    = 0x0E,
+    TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA  = 0x05,
+    TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA  = 0x04,
+    TLS_ECDH_RSA_WITH_RC4_128_SHA        = 0x0C,
+    TLS_ECDH_ECDSA_WITH_RC4_128_SHA      = 0x02,
+    TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA   = 0x0D,
+    TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA = 0x03,
+    TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256   = 0x29,
+    TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 = 0x25,
+    TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384   = 0x2A,
+    TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 = 0x26,
+
+    /* CyaSSL extension - eSTREAM */
+    TLS_RSA_WITH_HC_128_MD5       = 0xFB,
+    TLS_RSA_WITH_HC_128_SHA       = 0xFC,
+    TLS_RSA_WITH_RABBIT_SHA       = 0xFD,
+
+    /* CyaSSL extension - Blake2b 256 */
+    TLS_RSA_WITH_AES_128_CBC_B2B256   = 0xF8,
+    TLS_RSA_WITH_AES_256_CBC_B2B256   = 0xF9,
+    TLS_RSA_WITH_HC_128_B2B256        = 0xFA,   /* eSTREAM too */
+
+    /* CyaSSL extension - NTRU */
+    TLS_NTRU_RSA_WITH_RC4_128_SHA      = 0xe5,
+    TLS_NTRU_RSA_WITH_3DES_EDE_CBC_SHA = 0xe6,
+    TLS_NTRU_RSA_WITH_AES_128_CBC_SHA  = 0xe7,  /* clases w/ official SHA-256 */
+    TLS_NTRU_RSA_WITH_AES_256_CBC_SHA  = 0xe8,
+
+    /* SHA256 */
+    TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 = 0x6b,
+    TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 = 0x67,
+    TLS_RSA_WITH_AES_256_CBC_SHA256     = 0x3d,
+    TLS_RSA_WITH_AES_128_CBC_SHA256     = 0x3c,
+    TLS_RSA_WITH_NULL_SHA256            = 0x3b,
+
+    /* AES-GCM */
+    TLS_RSA_WITH_AES_128_GCM_SHA256          = 0x9c,
+    TLS_RSA_WITH_AES_256_GCM_SHA384          = 0x9d,
+    TLS_DHE_RSA_WITH_AES_128_GCM_SHA256      = 0x9e,
+    TLS_DHE_RSA_WITH_AES_256_GCM_SHA384      = 0x9f,
+
+    /* ECC AES-GCM, first byte is 0xC0 (ECC_BYTE) */
+    TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256  = 0x2b,
+    TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384  = 0x2c,
+    TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256   = 0x2d,
+    TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384   = 0x2e,
+    TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256    = 0x2f,
+    TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384    = 0x30,
+    TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256     = 0x31,
+    TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384     = 0x32,
+
+    /* AES-CCM, first byte is 0xC0 but isn't ECC,
+     * also, in some of the other AES-CCM suites
+     * there will be second byte number conflicts
+     * with non-ECC AES-GCM */
+    TLS_RSA_WITH_AES_128_CCM_8         = 0xa0,
+    TLS_RSA_WITH_AES_256_CCM_8         = 0xa1,
+    TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8 = 0xc6, /* Still TBD, made up */
+    TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8 = 0xc7, /* Still TBD, made up */
+    TLS_PSK_WITH_AES_128_CCM           = 0xa4,
+    TLS_PSK_WITH_AES_256_CCM           = 0xa5,
+    TLS_PSK_WITH_AES_128_CCM_8         = 0xa8,
+    TLS_PSK_WITH_AES_256_CCM_8         = 0xa9,
+
+    TLS_RSA_WITH_CAMELLIA_128_CBC_SHA        = 0x41,
+    TLS_RSA_WITH_CAMELLIA_256_CBC_SHA        = 0x84,
+    TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256     = 0xba,
+    TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256     = 0xc0,
+    TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA    = 0x45,
+    TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA    = 0x88,
+    TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 = 0xbe,
+    TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 = 0xc4,
+
+    /* Renegotiation Indication Extension Special Suite */
+    TLS_EMPTY_RENEGOTIATION_INFO_SCSV        = 0xff
+};
+
+
+enum Misc {
+    ECC_BYTE =  0xC0,           /* ECC first cipher suite byte */
+
+    SEND_CERT       = 1,
+    SEND_BLANK_CERT = 2,
+
+    DTLS_MAJOR      = 0xfe,     /* DTLS major version number */
+    DTLS_MINOR      = 0xff,     /* DTLS minor version number */
+    DTLSv1_2_MINOR  = 0xfd,     /* DTLS minor version number */
+    SSLv3_MAJOR     = 3,        /* SSLv3 and TLSv1+  major version number */
+    SSLv3_MINOR     = 0,        /* TLSv1   minor version number */
+    TLSv1_MINOR     = 1,        /* TLSv1   minor version number */
+    TLSv1_1_MINOR   = 2,        /* TLSv1_1 minor version number */
+    TLSv1_2_MINOR   = 3,        /* TLSv1_2 minor version number */
+    INVALID_BYTE    = 0xff,     /* Used to initialize cipher specs values */
+    NO_COMPRESSION  =  0,
+    ZLIB_COMPRESSION = 221,     /* CyaSSL zlib compression */
+    HELLO_EXT_SIG_ALGO = 13,    /* ID for the sig_algo hello extension */
+    SECRET_LEN      = 48,       /* pre RSA and all master */
+    ENCRYPT_LEN     = 512,      /* allow 4096 bit static buffer */
+    SIZEOF_SENDER   =  4,       /* clnt or srvr           */
+    FINISHED_SZ     = 36,       /* MD5_DIGEST_SIZE + SHA_DIGEST_SIZE */
+    MAX_RECORD_SIZE = 16384,    /* 2^14, max size by standard */
+    MAX_MSG_EXTRA   = 38 + MAX_DIGEST_SIZE,
+                                /* max added to msg, mac + pad  from */
+                                /* RECORD_HEADER_SZ + BLOCK_SZ (pad) + Max
+                                   digest sz + BLOC_SZ (iv) + pad byte (1) */
+    MAX_COMP_EXTRA  = 1024,     /* max compression extra */
+    MAX_MTU         = 1500,     /* max expected MTU */
+    MAX_UDP_SIZE    = 8192 - 100, /* was MAX_MTU - 100 */
+    MAX_DH_SZ       = 612,      /* 2240 p, pub, g + 2 byte size for each */
+    MAX_STR_VERSION = 8,        /* string rep of protocol version */
+
+    PAD_MD5        = 48,       /* pad length for finished */
+    PAD_SHA        = 40,       /* pad length for finished */
+    MAX_PAD_SIZE   = 256,      /* maximum length of padding */
+    COMPRESS_DUMMY_SIZE = 64,  /* compression dummy round size */
+    COMPRESS_CONSTANT   = 13,  /* compression calc constant */
+    COMPRESS_UPPER      = 55,  /* compression calc numerator */
+    COMPRESS_LOWER      = 64,  /* compression calc denominator */
+
+    PEM_LINE_LEN   = 80,       /* PEM line max + fudge */
+    LENGTH_SZ      =  2,       /* length field for HMAC, data only */
+    VERSION_SZ     =  2,       /* length of proctocol version */
+    SEQ_SZ         =  8,       /* 64 bit sequence number  */
+    BYTE3_LEN      =  3,       /* up to 24 bit byte lengths */
+    ALERT_SIZE     =  2,       /* level + description     */
+    REQUEST_HEADER =  2,       /* always use 2 bytes      */
+    VERIFY_HEADER  =  2,       /* always use 2 bytes      */
+    EXT_ID_SZ      =  2,       /* always use 2 bytes      */
+    MAX_DH_SIZE    = 513,      /* 4096 bit plus possible leading 0 */
+
+    MAX_SUITE_SZ = 200,        /* 100 suites for now! */
+    RAN_LEN      = 32,         /* random length           */
+    SEED_LEN     = RAN_LEN * 2, /* tls prf seed length    */
+    ID_LEN       = 32,         /* session id length       */
+    MAX_COOKIE_LEN = 32,       /* max dtls cookie size    */
+    COOKIE_SZ    = 20,         /* use a 20 byte cookie    */
+    SUITE_LEN    =  2,         /* cipher suite sz length  */
+    ENUM_LEN     =  1,         /* always a byte           */
+    OPAQUE16_LEN =  2,         /* always 2 bytes          */
+    COMP_LEN     =  1,         /* compression length      */
+    CURVE_LEN    =  2,         /* ecc named curve length  */
+    SERVER_ID_LEN = 20,        /* server session id length  */
+    
+    HANDSHAKE_HEADER_SZ   = 4,  /* type + length(3)        */
+    RECORD_HEADER_SZ      = 5,  /* type + version + len(2) */
+    CERT_HEADER_SZ        = 3,  /* always 3 bytes          */
+    REQ_HEADER_SZ         = 2,  /* cert request header sz  */
+    HINT_LEN_SZ           = 2,  /* length of hint size field */
+    TRUNCATED_HMAC_SZ     = 10, /* length of hmac w/ truncated hmac extension */
+    HELLO_EXT_TYPE_SZ     = 2,  /* length of a hello extension type */
+    HELLO_EXT_SZ          = 8,  /* total length of the lazy hello extensions */
+    HELLO_EXT_LEN         = 6,  /* length of the lazy hello extensions */
+    HELLO_EXT_SIGALGO_SZ  = 2,  /* length of signature algo extension  */
+    HELLO_EXT_SIGALGO_MAX = 32, /* number of items in the signature algo list */
+
+    DTLS_HANDSHAKE_HEADER_SZ = 12, /* normal + seq(2) + offset(3) + length(3) */
+    DTLS_RECORD_HEADER_SZ    = 13, /* normal + epoch(2) + seq_num(6) */
+    DTLS_HANDSHAKE_EXTRA     = 8,  /* diff from normal */
+    DTLS_RECORD_EXTRA        = 8,  /* diff from normal */
+    DTLS_HANDSHAKE_SEQ_SZ    = 2,  /* handshake header sequence number */
+    DTLS_HANDSHAKE_FRAG_SZ   = 3,  /* fragment offset and length are 24 bit */
+    DTLS_POOL_SZ             = 5,  /* buffers to hold in the retry pool */
+
+    FINISHED_LABEL_SZ   = 15,  /* TLS finished label size */
+    TLS_FINISHED_SZ     = 12,  /* TLS has a shorter size  */
+    MASTER_LABEL_SZ     = 13,  /* TLS master secret label sz */
+    KEY_LABEL_SZ        = 13,  /* TLS key block expansion sz */
+    MAX_PRF_HALF        = 128, /* Maximum half secret len */
+    MAX_PRF_LABSEED     = 128, /* Maximum label + seed len */
+    MAX_PRF_DIG         = 224, /* Maximum digest len      */
+    MAX_REQUEST_SZ      = 256, /* Maximum cert req len (no auth yet */
+    SESSION_FLUSH_COUNT = 256, /* Flush session cache unless user turns off */ 
+
+    RC4_KEY_SIZE        = 16,  /* always 128bit           */
+    DES_KEY_SIZE        =  8,  /* des                     */
+    DES3_KEY_SIZE       = 24,  /* 3 des ede               */
+    DES_IV_SIZE         = DES_BLOCK_SIZE,
+    AES_256_KEY_SIZE    = 32,  /* for 256 bit             */
+    AES_192_KEY_SIZE    = 24,  /* for 192 bit             */
+    AES_IV_SIZE         = 16,  /* always block size       */
+    AES_128_KEY_SIZE    = 16,  /* for 128 bit             */
+
+    AEAD_SEQ_OFFSET     = 4,        /* Auth Data: Sequence number */
+    AEAD_TYPE_OFFSET    = 8,        /* Auth Data: Type            */
+    AEAD_VMAJ_OFFSET    = 9,        /* Auth Data: Major Version   */
+    AEAD_VMIN_OFFSET    = 10,       /* Auth Data: Minor Version   */
+    AEAD_LEN_OFFSET     = 11,       /* Auth Data: Length          */
+    AEAD_AUTH_DATA_SZ   = 13,       /* Size of the data to authenticate */
+    AEAD_IMP_IV_SZ      = 4,        /* Size of the implicit IV     */
+    AEAD_EXP_IV_SZ      = 8,        /* Size of the explicit IV     */
+    AEAD_NONCE_SZ       = AEAD_EXP_IV_SZ + AEAD_IMP_IV_SZ,
+
+    AES_GCM_AUTH_SZ     = 16, /* AES-GCM Auth Tag length    */
+    AES_CCM_16_AUTH_SZ  = 16, /* AES-CCM-16 Auth Tag length */
+    AES_CCM_8_AUTH_SZ   = 8,  /* AES-CCM-8 Auth Tag Length  */
+
+    CAMELLIA_128_KEY_SIZE = 16, /* for 128 bit */
+    CAMELLIA_192_KEY_SIZE = 24, /* for 192 bit */
+    CAMELLIA_256_KEY_SIZE = 32, /* for 256 bit */
+    CAMELLIA_IV_SIZE      = 16, /* always block size */
+
+    HC_128_KEY_SIZE     = 16,  /* 128 bits                */
+    HC_128_IV_SIZE      = 16,  /* also 128 bits           */
+
+    RABBIT_KEY_SIZE     = 16,  /* 128 bits                */
+    RABBIT_IV_SIZE      =  8,  /* 64 bits for iv          */
+
+    EVP_SALT_SIZE       =  8,  /* evp salt size 64 bits   */
+
+    ECDHE_SIZE          = 32,  /* ECHDE server size defaults to 256 bit */
+    MAX_EXPORT_ECC_SZ   = 256, /* Export ANS X9.62 max future size */
+
+    MAX_HELLO_SZ       = 128,  /* max client or server hello */
+    MAX_CERT_VERIFY_SZ = 1024, /* max   */
+    CLIENT_HELLO_FIRST =  35,  /* Protocol + RAN_LEN + sizeof(id_len) */
+    MAX_SUITE_NAME     =  48,  /* maximum length of cipher suite string */
+    DEFAULT_TIMEOUT    = 500,  /* default resumption timeout in seconds */
+
+    DTLS_TIMEOUT_INIT       =  1, /* default timeout init for DTLS receive  */
+    DTLS_TIMEOUT_MAX        = 64, /* default max timeout for DTLS receive */
+    DTLS_TIMEOUT_MULTIPLIER =  2, /* default timeout multiplier for DTLS recv */
+
+    MAX_PSK_ID_LEN     = 128,  /* max psk identity/hint supported */
+    MAX_PSK_KEY_LEN    =  64,  /* max psk key supported */
+
+    MAX_CYASSL_FILE_SIZE = 1024 * 1024 * 4,  /* 4 mb file size alloc limit */
+
+#ifdef FORTRESS
+    MAX_EX_DATA        =   3,  /* allow for three items of ex_data */
+#endif
+
+    MAX_X509_SIZE      = 2048, /* max static x509 buffer size */
+    CERT_MIN_SIZE      =  256, /* min PEM cert size with header/footer */
+    MAX_FILENAME_SZ    =  256, /* max file name length */
+    FILE_BUFFER_SIZE   = 1024, /* default static file buffer size for input,
+                                  will use dynamic buffer if not big enough */
+
+    MAX_NTRU_PUB_KEY_SZ = 1027, /* NTRU max for now */
+    MAX_NTRU_ENCRYPT_SZ = 1027, /* NTRU max for now */
+    MAX_NTRU_BITS       =  256, /* max symmetric bit strength */
+    NO_SNIFF           =   0,  /* not sniffing */
+    SNIFF              =   1,  /* currently sniffing */
+
+    HASH_SIG_SIZE      =   2,  /* default SHA1 RSA */
+
+    NO_CAVIUM_DEVICE   =  -2,  /* invalid cavium device id */
+
+    NO_COPY            =   0,  /* should we copy static buffer for write */
+    COPY               =   1   /* should we copy static buffer for write */
+};
+
+
+#ifdef SESSION_INDEX
+/* Shift values for making a session index */
+#define SESSIDX_ROW_SHIFT 4
+#define SESSIDX_IDX_MASK  0x0F
+#endif
+
+
+/* max cert chain peer depth */
+#ifndef MAX_CHAIN_DEPTH
+    #define MAX_CHAIN_DEPTH 9
+#endif
+
+
+/* don't use extra 3/4k stack space unless need to */
+#ifdef HAVE_NTRU
+    #define MAX_ENCRYPT_SZ MAX_NTRU_ENCRYPT_SZ
+#else
+    #define MAX_ENCRYPT_SZ ENCRYPT_LEN
+#endif
+
+
+/* states */
+enum states {
+    NULL_STATE = 0,
+
+    SERVER_HELLOVERIFYREQUEST_COMPLETE,
+    SERVER_HELLO_COMPLETE,
+    SERVER_CERT_COMPLETE,
+    SERVER_KEYEXCHANGE_COMPLETE,
+    SERVER_HELLODONE_COMPLETE,
+    SERVER_FINISHED_COMPLETE,
+
+    CLIENT_HELLO_COMPLETE,
+    CLIENT_KEYEXCHANGE_COMPLETE,
+    CLIENT_FINISHED_COMPLETE,
+
+    HANDSHAKE_DONE
+};
+
+
+#if defined(__GNUC__)
+    #define CYASSL_PACK __attribute__ ((packed))
+#else
+    #define CYASSL_PACK
+#endif
+
+/* SSL Version */
+typedef struct ProtocolVersion {
+    byte major;
+    byte minor;
+} CYASSL_PACK ProtocolVersion;
+
+
+CYASSL_LOCAL ProtocolVersion MakeSSLv3(void);
+CYASSL_LOCAL ProtocolVersion MakeTLSv1(void);
+CYASSL_LOCAL ProtocolVersion MakeTLSv1_1(void);
+CYASSL_LOCAL ProtocolVersion MakeTLSv1_2(void);
+
+#ifdef CYASSL_DTLS
+    CYASSL_LOCAL ProtocolVersion MakeDTLSv1(void);
+    CYASSL_LOCAL ProtocolVersion MakeDTLSv1_2(void);
+#endif
+
+
+enum BIO_TYPE {
+    BIO_BUFFER = 1,
+    BIO_SOCKET = 2,
+    BIO_SSL    = 3,
+    BIO_MEMORY = 4
+};
+
+
+/* CyaSSL BIO_METHOD type */
+struct CYASSL_BIO_METHOD {
+    byte type;               /* method type */
+};
+
+
+/* CyaSSL BIO type */
+struct CYASSL_BIO {
+    byte        type;          /* method type */
+    byte        close;         /* close flag */
+    byte        eof;           /* eof flag */
+    CYASSL*     ssl;           /* possible associated ssl */
+    byte*       mem;           /* memory buffer */
+    int         memLen;        /* memory buffer length */
+    int         fd;            /* possible file descriptor */
+    CYASSL_BIO* prev;          /* previous in chain */
+    CYASSL_BIO* next;          /* next in chain */
+};
+
+
+/* CyaSSL method type */
+struct CYASSL_METHOD {
+    ProtocolVersion version;
+    byte            side;         /* connection side, server or client */
+    byte            downgrade;    /* whether to downgrade version, default no */
+};
+
+
+/* defautls to client */
+CYASSL_LOCAL void InitSSL_Method(CYASSL_METHOD*, ProtocolVersion);
+
+/* for sniffer */
+CYASSL_LOCAL int DoFinished(CYASSL* ssl, const byte* input, word32* inOutIdx,
+                            int sniff);
+CYASSL_LOCAL int DoApplicationData(CYASSL* ssl, byte* input, word32* inOutIdx);
+
+
+/* CyaSSL buffer type */
+typedef struct buffer {
+    word32 length;
+    byte*  buffer;
+} buffer;
+
+
+enum {
+    FORCED_FREE = 1,
+    NO_FORCED_FREE = 0
+};
+
+
+/* only use compression extra if using compression */
+#ifdef HAVE_LIBZ
+    #define COMP_EXTRA MAX_COMP_EXTRA
+#else
+    #define COMP_EXTRA 0
+#endif
+
+/* only the sniffer needs space in the buffer for extra MTU record(s) */
+#ifdef CYASSL_SNIFFER
+    #define MTU_EXTRA MAX_MTU * 3 
+#else
+    #define MTU_EXTRA 0
+#endif
+
+
+/* embedded callbacks require large static buffers, make sure on */
+#ifdef CYASSL_CALLBACKS
+    #undef  LARGE_STATIC_BUFFERS
+    #define LARGE_STATIC_BUFFERS
+#endif
+
+
+/* give user option to use 16K static buffers */
+#if defined(LARGE_STATIC_BUFFERS)
+    #define RECORD_SIZE MAX_RECORD_SIZE
+#else
+    #ifdef CYASSL_DTLS
+        #define RECORD_SIZE MAX_MTU 
+    #else
+        #define RECORD_SIZE 128 
+    #endif
+#endif
+
+
+/* user option to turn off 16K output option */
+/* if using small static buffers (default) and SSL_write tries to write data
+   larger than the record we have, dynamically get it, unless user says only
+   write in static buffer chuncks  */
+#ifndef STATIC_CHUNKS_ONLY
+    #define OUTPUT_RECORD_SIZE MAX_RECORD_SIZE
+#else
+    #define OUTPUT_RECORD_SIZE RECORD_SIZE
+#endif
+
+/* CyaSSL input buffer
+
+   RFC 2246:
+
+   length
+       The length (in bytes) of the following TLSPlaintext.fragment.
+       The length should not exceed 2^14.
+*/
+#if defined(LARGE_STATIC_BUFFERS)
+    #define STATIC_BUFFER_LEN RECORD_HEADER_SZ + RECORD_SIZE + COMP_EXTRA + \
+             MTU_EXTRA + MAX_MSG_EXTRA
+#else
+    /* zero length arrays may not be supported */
+    #define STATIC_BUFFER_LEN 1
+#endif
+
+typedef struct {
+    word32 length;       /* total buffer length used */
+    word32 idx;          /* idx to part of length already consumed */
+    byte*  buffer;       /* place holder for static or dynamic buffer */
+    word32 bufferSize;   /* current buffer size */
+    ALIGN16 byte staticBuffer[STATIC_BUFFER_LEN];
+    byte   dynamicFlag;  /* dynamic memory currently in use */
+    byte   offset;       /* alignment offset attempt */
+} bufferStatic;
+
+/* Cipher Suites holder */
+typedef struct Suites {
+    int    setSuites;               /* user set suites from default */
+    byte   suites[MAX_SUITE_SZ];  
+    word16 suiteSz;                 /* suite length in bytes        */
+    byte   hashSigAlgo[HELLO_EXT_SIGALGO_MAX]; /* sig/algo to offer */
+    word16 hashSigAlgoSz;           /* SigAlgo extension length in bytes */
+    byte   hashAlgo;                /* selected hash algorithm */
+    byte   sigAlgo;                 /* selected sig algorithm */
+} Suites;
+
+
+CYASSL_LOCAL
+void InitSuites(Suites*, ProtocolVersion,
+                                     byte, byte, byte, byte, byte, byte, int);
+CYASSL_LOCAL
+int  SetCipherList(Suites*, const char* list);
+
+#ifndef PSK_TYPES_DEFINED
+    typedef unsigned int (*psk_client_callback)(CYASSL*, const char*, char*,
+                          unsigned int, unsigned char*, unsigned int);
+    typedef unsigned int (*psk_server_callback)(CYASSL*, const char*,
+                          unsigned char*, unsigned int);
+#endif /* PSK_TYPES_DEFINED */
+
+
+#ifndef CYASSL_USER_IO
+    /* default IO callbacks */
+    CYASSL_LOCAL
+    int EmbedReceive(CYASSL *ssl, char *buf, int sz, void *ctx);
+    CYASSL_LOCAL 
+    int EmbedSend(CYASSL *ssl, char *buf, int sz, void *ctx);
+
+    #ifdef HAVE_OCSP
+        CYASSL_LOCAL
+        int EmbedOcspLookup(void*, const char*, int, byte*, int, byte**);
+        CYASSL_LOCAL
+        void EmbedOcspRespFree(void*, byte*);
+    #endif
+
+    #ifdef CYASSL_DTLS
+        CYASSL_LOCAL
+        int EmbedReceiveFrom(CYASSL *ssl, char *buf, int sz, void *ctx);
+        CYASSL_LOCAL 
+        int EmbedSendTo(CYASSL *ssl, char *buf, int sz, void *ctx);
+        CYASSL_LOCAL
+        int EmbedGenerateCookie(CYASSL* ssl, byte *buf, int sz, void *ctx);
+        CYASSL_LOCAL
+        int IsUDP(void*);
+    #endif /* CYASSL_DTLS */
+#endif /* CYASSL_USER_IO */
+
+#ifdef HAVE_NETX
+    CYASSL_LOCAL int NetX_Receive(CYASSL *ssl, char *buf, int sz, void *ctx);
+    CYASSL_LOCAL int NetX_Send(CYASSL *ssl, char *buf, int sz, void *ctx);
+#endif /* HAVE_NETX */
+
+
+/* CyaSSL Cipher type just points back to SSL */
+struct CYASSL_CIPHER {
+    CYASSL* ssl;
+};
+
+
+typedef struct OCSP_Entry OCSP_Entry;
+
+#ifdef SHA_DIGEST_SIZE
+    #define OCSP_DIGEST_SIZE SHA_DIGEST_SIZE
+#else
+    #define OCSP_DIGEST_SIZE 160
+#endif
+
+#ifdef NO_ASN 
+    /* no_asn won't have */
+    typedef struct CertStatus CertStatus;
+#endif
+
+struct OCSP_Entry {
+    OCSP_Entry* next;                        /* next entry             */
+    byte    issuerHash[OCSP_DIGEST_SIZE];    /* issuer hash            */ 
+    byte    issuerKeyHash[OCSP_DIGEST_SIZE]; /* issuer public key hash */
+    CertStatus* status;                      /* OCSP response list     */
+    int         totalStatus;                 /* number on list         */
+};
+
+
+#ifndef HAVE_OCSP
+    typedef struct CYASSL_OCSP CYASSL_OCSP;
+#endif
+
+/* CyaSSL OCSP controller */
+struct CYASSL_OCSP {
+    CYASSL_CERT_MANAGER* cm;            /* pointer back to cert manager */
+    OCSP_Entry*          ocspList;      /* OCSP response list */
+};
+
+#ifndef MAX_DATE_SIZE
+#define MAX_DATE_SIZE 32
+#endif
+
+typedef struct CRL_Entry CRL_Entry;
+
+#ifdef SHA_DIGEST_SIZE
+    #define CRL_DIGEST_SIZE SHA_DIGEST_SIZE
+#else
+    #define CRL_DIGEST_SIZE 160
+#endif
+
+#ifdef NO_ASN 
+    typedef struct RevokedCert RevokedCert;
+#endif
+
+/* Complete CRL */
+struct CRL_Entry {
+    CRL_Entry* next;                      /* next entry */
+    byte    issuerHash[CRL_DIGEST_SIZE];  /* issuer hash                 */ 
+    /* byte    crlHash[CRL_DIGEST_SIZE];      raw crl data hash           */ 
+    /* restore the hash here if needed for optimized comparisons */
+    byte    lastDate[MAX_DATE_SIZE]; /* last date updated  */
+    byte    nextDate[MAX_DATE_SIZE]; /* next update date   */
+    byte    lastDateFormat;          /* last date format */
+    byte    nextDateFormat;          /* next date format */
+    RevokedCert* certs;              /* revoked cert list  */
+    int          totalCerts;         /* number on list     */
+};
+
+
+typedef struct CRL_Monitor CRL_Monitor;
+
+/* CRL directory monitor */
+struct CRL_Monitor {
+    char* path;      /* full dir path, if valid pointer we're using */
+    int   type;      /* PEM or ASN1 type */
+};
+
+
+#ifndef HAVE_CRL
+    typedef struct CYASSL_CRL CYASSL_CRL;
+#endif
+
+/* CyaSSL CRL controller */
+struct CYASSL_CRL {
+    CYASSL_CERT_MANAGER* cm;            /* pointer back to cert manager */
+    CRL_Entry*           crlList;       /* our CRL list */
+    CyaSSL_Mutex         crlLock;       /* CRL list lock */
+    CRL_Monitor          monitors[2];   /* PEM and DER possible */
+#ifdef HAVE_CRL_MONITOR
+    pthread_t            tid;           /* monitoring thread */
+#endif
+};
+
+
+#ifdef NO_ASN 
+    typedef struct Signer Signer;
+#endif
+
+
+#ifndef CA_TABLE_SIZE
+    #define CA_TABLE_SIZE 11
+#endif
+
+/* CyaSSL Certificate Manager */
+struct CYASSL_CERT_MANAGER {
+    Signer*         caTable[CA_TABLE_SIZE]; /* the CA signer table */
+    CyaSSL_Mutex    caLock;             /* CA list lock */
+    CallbackCACache caCacheCallback;    /* CA cache addition callback */
+    void*           heap;               /* heap helper */
+    CYASSL_CRL*     crl;                /* CRL checker */
+    byte            crlEnabled;         /* is CRL on ? */
+    byte            crlCheckAll;        /* always leaf, but all ? */
+    CbMissingCRL    cbMissingCRL;       /* notify through cb of missing crl */
+    CYASSL_OCSP*    ocsp;               /* OCSP checker */
+    byte            ocspEnabled;        /* is OCSP on ? */
+    byte            ocspSendNonce;      /* send the OCSP nonce ? */
+    byte            ocspUseOverrideURL; /* ignore cert's responder, override */
+    char*           ocspOverrideURL;    /* use this responder */
+    void*           ocspIOCtx;          /* I/O callback CTX */
+    CbOCSPIO        ocspIOCb;           /* I/O callback for OCSP lookup */
+    CbOCSPRespFree  ocspRespFreeCb;     /* Frees OCSP Response from IO Cb */
+};
+
+CYASSL_LOCAL int CM_SaveCertCache(CYASSL_CERT_MANAGER*, const char*);
+CYASSL_LOCAL int CM_RestoreCertCache(CYASSL_CERT_MANAGER*, const char*);
+CYASSL_LOCAL int CM_MemSaveCertCache(CYASSL_CERT_MANAGER*, void*, int, int*);
+CYASSL_LOCAL int CM_MemRestoreCertCache(CYASSL_CERT_MANAGER*, const void*, int);
+CYASSL_LOCAL int CM_GetCertCacheMemSize(CYASSL_CERT_MANAGER*);
+
+/* CyaSSL Sock Addr */
+struct CYASSL_SOCKADDR {
+    unsigned int sz; /* sockaddr size */
+    void*        sa; /* pointer to the sockaddr_in or sockaddr_in6 */
+};
+
+typedef struct CYASSL_DTLS_CTX {
+    CYASSL_SOCKADDR peer;
+    int fd;
+} CYASSL_DTLS_CTX;
+
+/* RFC 6066 TLS Extensions */
+#ifdef HAVE_TLS_EXTENSIONS
+
+typedef enum {
+    SERVER_NAME_INDICATION =  0,
+    MAX_FRAGMENT_LENGTH    =  1,
+  /*CLIENT_CERTIFICATE_URL =  2,
+    TRUSTED_CA_KEYS        =  3,*/
+    TRUNCATED_HMAC         =  4,
+  /*STATUS_REQUEST         =  5,
+    SIGNATURE_ALGORITHMS   = 13,*/
+} TLSX_Type;
+
+typedef struct TLSX {
+    TLSX_Type    type; /* Extension Type  */
+    void*        data; /* Extension Data  */
+    byte         resp; /* IsResponse Flag */
+    struct TLSX* next; /* List Behavior   */
+} TLSX;
+
+CYASSL_LOCAL TLSX* TLSX_Find(TLSX* list, TLSX_Type type);
+CYASSL_LOCAL void TLSX_FreeAll(TLSX* list);
+
+#ifndef NO_CYASSL_CLIENT
+CYASSL_LOCAL word16 TLSX_GetRequestSize(CYASSL* ssl);
+CYASSL_LOCAL word16 TLSX_WriteRequest(CYASSL* ssl, byte* output);
+#endif
+
+#ifndef NO_CYASSL_SERVER
+CYASSL_LOCAL word16 TLSX_GetResponseSize(CYASSL* ssl);
+CYASSL_LOCAL word16 TLSX_WriteResponse(CYASSL* ssl, byte* output);
+#endif
+
+CYASSL_LOCAL int    TLSX_Parse(CYASSL* ssl, byte* input, word16 length,
+                                                byte isRequest, Suites *suites);
+
+/* Server Name Indication */
+#ifdef HAVE_SNI
+
+typedef struct SNI {
+    byte                       type;    /* SNI Type          */
+    union { char* host_name; } data;    /* SNI Data          */
+    struct SNI*                next;    /* List Behavior     */
+#ifndef NO_CYASSL_SERVER
+    byte                       options; /* Behaviour options */
+    byte                       status;  /* Matching result   */
+#endif
+} SNI;
+
+CYASSL_LOCAL int TLSX_UseSNI(TLSX** extensions, byte type, const void* data,
+                                                                   word16 size);
+
+#ifndef NO_CYASSL_SERVER
+CYASSL_LOCAL void   TLSX_SNI_SetOptions(TLSX* extensions, byte type,
+                                                                  byte options);
+CYASSL_LOCAL byte   TLSX_SNI_Status(TLSX* extensions, byte type);
+CYASSL_LOCAL word16 TLSX_SNI_GetRequest(TLSX* extensions, byte type,
+                                                                   void** data);
+CYASSL_LOCAL int    TLSX_SNI_GetFromBuffer(const byte* buffer, word32 bufferSz,
+                                         byte type, byte* sni, word32* inOutSz);
+#endif
+
+#endif /* HAVE_SNI */
+
+/* Maximum Fragment Length */
+#ifdef HAVE_MAX_FRAGMENT
+
+CYASSL_LOCAL int TLSX_UseMaxFragment(TLSX** extensions, byte mfl);
+
+#endif /* HAVE_MAX_FRAGMENT */
+
+#ifdef HAVE_TRUNCATED_HMAC
+
+CYASSL_LOCAL int TLSX_UseTruncatedHMAC(TLSX** extensions);
+
+#endif /* HAVE_TRUNCATED_HMAC */
+
+#endif /* HAVE_TLS_EXTENSIONS */
+
+/* CyaSSL context type */
+struct CYASSL_CTX {
+    CYASSL_METHOD* method;
+    CyaSSL_Mutex   countMutex;    /* reference count mutex */
+    int         refCount;         /* reference count */
+#ifndef NO_CERTS
+    buffer      certificate;
+    buffer      certChain;
+                 /* chain after self, in DER, with leading size for each cert */
+    buffer      privateKey;
+    buffer      serverDH_P;
+    buffer      serverDH_G;
+    CYASSL_CERT_MANAGER* cm;      /* our cert manager, ctx owns SSL will use */
+#endif
+    Suites      suites;
+    void*       heap;             /* for user memory overrides */
+    byte        verifyPeer;
+    byte        verifyNone;
+    byte        failNoCert;
+    byte        sessionCacheOff;
+    byte        sessionCacheFlushOff;
+    byte        sendVerify;       /* for client side */
+    byte        haveRSA;          /* RSA available */
+    byte        haveDH;           /* server DH parms set by user */
+    byte        haveNTRU;         /* server private NTRU  key loaded */
+    byte        haveECDSAsig;     /* server cert signed w/ ECDSA */
+    byte        haveStaticECC;    /* static server ECC private key */
+    byte        partialWrite;     /* only one msg per write call */
+    byte        quietShutdown;    /* don't send close notify */
+    byte        groupMessages;    /* group handshake messages before sending */
+    CallbackIORecv CBIORecv;
+    CallbackIOSend CBIOSend;
+#ifdef CYASSL_DTLS
+    CallbackGenCookie CBIOCookie;       /* gen cookie callback */
+#endif
+    VerifyCallback  verifyCallback;     /* cert verification callback */
+    word32          timeout;            /* session timeout */
+#ifdef HAVE_ECC
+    word16          eccTempKeySz;       /* in octets 20 - 66 */
+#endif
+#ifndef NO_PSK
+    byte        havePSK;                /* psk key set by user */
+    psk_client_callback client_psk_cb;  /* client callback */
+    psk_server_callback server_psk_cb;  /* server callback */
+    char        server_hint[MAX_PSK_ID_LEN];
+#endif /* NO_PSK */
+#if defined(OPENSSL_EXTRA) || defined(HAVE_WEBSERVER)
+    pem_password_cb passwd_cb;
+    void*            userdata;
+#endif /* OPENSSL_EXTRA */
+#ifdef HAVE_OCSP
+    CYASSL_OCSP      ocsp;
+#endif
+#ifdef HAVE_CAVIUM
+    int              devId;            /* cavium device id to use */
+#endif
+#ifdef HAVE_TLS_EXTENSIONS
+    TLSX* extensions;                  /* RFC 6066 TLS Extensions data */
+#endif
+#ifdef ATOMIC_USER
+    CallbackMacEncrypt    MacEncryptCb;    /* Atomic User Mac/Encrypt Cb */
+    CallbackDecryptVerify DecryptVerifyCb; /* Atomic User Decrypt/Verify Cb */
+#endif
+#ifdef HAVE_PK_CALLBACKS
+    #ifdef HAVE_ECC
+        CallbackEccSign   EccSignCb;    /* User EccSign   Callback handler */
+        CallbackEccVerify EccVerifyCb;  /* User EccVerify Callback handler */
+    #endif /* HAVE_ECC */
+    #ifndef NO_RSA 
+        CallbackRsaSign   RsaSignCb;    /* User RsaSign   Callback handler */
+        CallbackRsaVerify RsaVerifyCb;  /* User RsaVerify Callback handler */
+        CallbackRsaEnc    RsaEncCb;     /* User Rsa Public Encrypt  handler */
+        CallbackRsaDec    RsaDecCb;     /* User Rsa Private Decrypt handler */
+    #endif /* NO_RSA */
+#endif /* HAVE_PK_CALLBACKS */
+};
+
+
+CYASSL_LOCAL
+int InitSSL_Ctx(CYASSL_CTX*, CYASSL_METHOD*);
+CYASSL_LOCAL
+void FreeSSL_Ctx(CYASSL_CTX*);
+CYASSL_LOCAL
+void SSL_CtxResourceFree(CYASSL_CTX*);
+
+CYASSL_LOCAL
+int DeriveTlsKeys(CYASSL* ssl);
+CYASSL_LOCAL
+int ProcessOldClientHello(CYASSL* ssl, const byte* input, word32* inOutIdx,
+                          word32 inSz, word16 sz);
+#ifndef NO_CERTS
+    CYASSL_LOCAL
+    int AddCA(CYASSL_CERT_MANAGER* ctx, buffer der, int type, int verify);
+    CYASSL_LOCAL
+    int AlreadySigner(CYASSL_CERT_MANAGER* cm, byte* hash);
+#endif
+
+/* All cipher suite related info */
+typedef struct CipherSpecs {
+    byte bulk_cipher_algorithm;
+    byte cipher_type;               /* block, stream, or aead */
+    byte mac_algorithm;
+    byte kea;                       /* key exchange algo */
+    byte sig_algo;
+    byte hash_size;
+    byte pad_size;
+    byte static_ecdh;
+    word16 key_size;
+    word16 iv_size;
+    word16 block_size;
+    word16 aead_mac_size;
+} CipherSpecs;
+
+
+void InitCipherSpecs(CipherSpecs* cs);
+
+
+/* Supported Message Authentication Codes from page 43 */
+enum MACAlgorithm { 
+    no_mac,
+    md5_mac,
+    sha_mac,
+    sha224_mac,
+    sha256_mac,
+    sha384_mac,
+    sha512_mac,
+    rmd_mac,
+    blake2b_mac
+};
+
+
+/* Supported Key Exchange Protocols */
+enum KeyExchangeAlgorithm { 
+    no_kea,
+    rsa_kea, 
+    diffie_hellman_kea, 
+    fortezza_kea,
+    psk_kea,
+    ntru_kea,
+    ecc_diffie_hellman_kea,
+    ecc_static_diffie_hellman_kea       /* for verify suite only */
+};
+
+
+/* Supported Authentication Schemes */
+enum SignatureAlgorithm {
+    anonymous_sa_algo,
+    rsa_sa_algo,
+    dsa_sa_algo,
+    ecc_dsa_sa_algo
+};
+
+
+/* Supprted ECC Curve Types */
+enum EccCurves {
+    named_curve = 3
+};
+
+
+/* Supprted ECC Named Curves */
+enum EccNamedCurves {
+    secp256r1 = 0x17,         /* default, OpenSSL also calls it prime256v1 */
+    secp384r1 = 0x18,
+    secp521r1 = 0x19,
+
+    secp160r1 = 0x10,
+    secp192r1 = 0x13,        /*           Openssl also call it prime192v1 */
+    secp224r1 = 0x15
+};
+
+
+/* Valid client certificate request types from page 27 */
+enum ClientCertificateType {    
+    rsa_sign            = 1, 
+    dss_sign            = 2,
+    rsa_fixed_dh        = 3,
+    dss_fixed_dh        = 4,
+    rsa_ephemeral_dh    = 5,
+    dss_ephemeral_dh    = 6,
+    fortezza_kea_cert   = 20
+};
+
+
+enum CipherType { stream, block, aead };
+
+
+#ifdef CYASSL_DTLS
+
+    #ifdef WORD64_AVAILABLE
+        typedef word64 DtlsSeq;
+    #else
+        typedef word32 DtlsSeq;
+    #endif
+    #define DTLS_SEQ_BITS (sizeof(DtlsSeq) * CHAR_BIT)
+
+    typedef struct DtlsState {
+        DtlsSeq window;     /* Sliding window for current epoch    */
+        word16 nextEpoch;   /* Expected epoch in next record       */
+        word32 nextSeq;     /* Expected sequence in next record    */
+
+        word16 curEpoch;    /* Received epoch in current record    */
+        word32 curSeq;      /* Received sequence in current record */
+
+        DtlsSeq prevWindow; /* Sliding window for old epoch        */
+        word32 prevSeq;     /* Next sequence in allowed old epoch  */
+    } DtlsState;
+
+#endif /* CYASSL_DTLS */
+
+
+/* keys and secrets */
+typedef struct Keys {
+    byte client_write_MAC_secret[MAX_DIGEST_SIZE];   /* max sizes */
+    byte server_write_MAC_secret[MAX_DIGEST_SIZE]; 
+    byte client_write_key[AES_256_KEY_SIZE];         /* max sizes */
+    byte server_write_key[AES_256_KEY_SIZE]; 
+    byte client_write_IV[AES_IV_SIZE];               /* max sizes */
+    byte server_write_IV[AES_IV_SIZE];
+#ifdef HAVE_AEAD
+    byte aead_exp_IV[AEAD_EXP_IV_SZ];
+    byte aead_enc_imp_IV[AEAD_IMP_IV_SZ];
+    byte aead_dec_imp_IV[AEAD_IMP_IV_SZ];
+#endif
+
+    word32 peer_sequence_number;
+    word32 sequence_number;
+    
+#ifdef CYASSL_DTLS
+    DtlsState dtls_state;                       /* Peer's state */
+    word16 dtls_peer_handshake_number;
+    word16 dtls_expected_peer_handshake_number;
+
+    word16 dtls_epoch;                          /* Current tx epoch    */
+    word32 dtls_sequence_number;                /* Current tx sequence */
+    word16 dtls_handshake_number;               /* Current tx handshake seq */
+#endif
+
+    word32 encryptSz;             /* last size of encrypted data   */
+    word32 padSz;                 /* how much to advance after decrypt part */
+    byte   encryptionOn;          /* true after change cipher spec */
+    byte   decryptedCur;          /* only decrypt current record once */
+} Keys;
+
+
+/* cipher for now */
+typedef struct Ciphers {
+#ifdef BUILD_ARC4
+    Arc4*   arc4;
+#endif
+#ifdef BUILD_DES3
+    Des3*   des3;
+#endif
+#if defined(BUILD_AES) || defined(BUILD_AESGCM)
+    Aes*    aes;
+#endif
+#ifdef HAVE_CAMELLIA
+    Camellia* cam;
+#endif
+#ifdef HAVE_HC128
+    HC128*  hc128;
+#endif
+#ifdef BUILD_RABBIT
+    Rabbit* rabbit;
+#endif
+    byte    setup;       /* have we set it up flag for detection */
+} Ciphers;
+
+
+CYASSL_LOCAL void InitCiphers(CYASSL* ssl);
+CYASSL_LOCAL void FreeCiphers(CYASSL* ssl);
+
+
+/* hashes type */
+typedef struct Hashes {
+    #ifndef NO_OLD_TLS
+        byte md5[MD5_DIGEST_SIZE];
+    #endif
+    byte sha[SHA_DIGEST_SIZE];
+    #ifndef NO_SHA256
+        byte sha256[SHA256_DIGEST_SIZE];
+    #endif
+    #ifdef CYASSL_SHA384
+        byte sha384[SHA384_DIGEST_SIZE];
+    #endif
+} Hashes;
+
+
+/* Static x509 buffer */
+typedef struct x509_buffer {
+    int  length;                  /* actual size */
+    byte buffer[MAX_X509_SIZE];   /* max static cert size */
+} x509_buffer;
+
+
+/* CyaSSL X509_CHAIN, for no dynamic memory SESSION_CACHE */
+struct CYASSL_X509_CHAIN {
+    int         count;                    /* total number in chain */
+    x509_buffer certs[MAX_CHAIN_DEPTH];   /* only allow max depth 4 for now */
+};
+
+
+/* CyaSSL session type */
+struct CYASSL_SESSION {
+    byte         sessionID[ID_LEN];             /* id for protocol */
+    byte         masterSecret[SECRET_LEN];      /* stored secret */
+    word32       bornOn;                        /* create time in seconds   */
+    word32       timeout;                       /* timeout in seconds       */
+#ifdef SESSION_CERTS
+    CYASSL_X509_CHAIN chain;                    /* peer cert chain, static  */
+    ProtocolVersion version;                    /* which version was used */
+    byte            cipherSuite0;               /* first byte, normally 0 */
+    byte            cipherSuite;                /* 2nd byte, actual suite */
+#endif
+#ifndef NO_CLIENT_CACHE
+    byte         serverID[SERVER_ID_LEN];       /* for easier client lookup */
+    word16       idLen;                         /* serverID length */
+#endif
+};
+
+
+CYASSL_LOCAL
+CYASSL_SESSION* GetSession(CYASSL*, byte*);
+CYASSL_LOCAL
+int          SetSession(CYASSL*, CYASSL_SESSION*);
+
+typedef void (*hmacfp) (CYASSL*, byte*, const byte*, word32, int, int);
+
+#ifndef NO_CLIENT_CACHE
+    CYASSL_SESSION* GetSessionClient(CYASSL*, const byte*, int);
+#endif
+
+/* client connect state for nonblocking restart */
+enum ConnectState {
+    CONNECT_BEGIN = 0,
+    CLIENT_HELLO_SENT,
+    HELLO_AGAIN,               /* HELLO_AGAIN s for DTLS case */
+    HELLO_AGAIN_REPLY,
+    FIRST_REPLY_DONE,
+    FIRST_REPLY_FIRST,
+    FIRST_REPLY_SECOND,
+    FIRST_REPLY_THIRD,
+    FIRST_REPLY_FOURTH,
+    FINISHED_DONE,
+    SECOND_REPLY_DONE
+};
+
+
+/* server accept state for nonblocking restart */
+enum AcceptState {
+    ACCEPT_BEGIN = 0,
+    ACCEPT_CLIENT_HELLO_DONE,
+    HELLO_VERIFY_SENT,
+    ACCEPT_FIRST_REPLY_DONE,
+    SERVER_HELLO_SENT,
+    CERT_SENT,
+    KEY_EXCHANGE_SENT,
+    CERT_REQ_SENT,
+    SERVER_HELLO_DONE,
+    ACCEPT_SECOND_REPLY_DONE,
+    CHANGE_CIPHER_SENT,
+    ACCEPT_FINISHED_DONE,
+    ACCEPT_THIRD_REPLY_DONE
+};
+
+
+typedef struct Buffers {
+#ifndef NO_CERTS
+    buffer          certificate;            /* CYASSL_CTX owns, unless we own */
+    buffer          key;                    /* CYASSL_CTX owns, unless we own */
+    buffer          certChain;              /* CYASSL_CTX owns */
+                 /* chain after self, in DER, with leading size for each cert */
+    buffer          serverDH_P;             /* CYASSL_CTX owns, unless we own */
+    buffer          serverDH_G;             /* CYASSL_CTX owns, unless we own */
+    buffer          serverDH_Pub;
+    buffer          serverDH_Priv;
+#endif
+    buffer          domainName;             /* for client check */
+    bufferStatic    inputBuffer;
+    bufferStatic    outputBuffer;
+    buffer          clearOutputBuffer;
+    int             prevSent;              /* previous plain text bytes sent
+                                              when got WANT_WRITE            */
+    int             plainSz;               /* plain text bytes in buffer to send
+                                              when got WANT_WRITE            */
+    byte            weOwnCert;             /* SSL own cert flag */
+    byte            weOwnKey;              /* SSL own key  flag */
+    byte            weOwnDH;               /* SSL own dh (p,g)  flag */
+#ifdef CYASSL_DTLS
+    CYASSL_DTLS_CTX dtlsCtx;               /* DTLS connection context */
+#endif
+#ifdef HAVE_PK_CALLBACKS
+    #ifdef HAVE_ECC
+        buffer peerEccDsaKey;              /* we own for Ecc Verify Callbacks */
+    #endif /* HAVE_ECC */
+    #ifndef NO_RSA
+        buffer peerRsaKey;                 /* we own for Rsa Verify Callbacks */
+    #endif /* NO_RSA */
+#endif /* HAVE_PK_CALLBACKS */
+} Buffers;
+
+typedef struct Options {
+    byte            sessionCacheOff;
+    byte            sessionCacheFlushOff;
+    byte            cipherSuite0;           /* first byte, normally 0 */
+    byte            cipherSuite;            /* second byte, actual suite */
+    byte            serverState;
+    byte            clientState;
+    byte            handShakeState;
+    byte            side;               /* client or server end */
+    byte            verifyPeer;
+    byte            verifyNone;
+    byte            failNoCert;
+    byte            downgrade;          /* allow downgrade of versions */
+    byte            sendVerify;         /* false = 0, true = 1, sendBlank = 2 */
+    byte            resuming;
+    byte            haveSessionId;      /* server may not send */
+    byte            tls;                /* using TLS ? */
+    byte            tls1_1;             /* using TLSv1.1+ ? */
+    byte            dtls;               /* using datagrams ? */
+    byte            connReset;          /* has the peer reset */
+    byte            isClosed;           /* if we consider conn closed */
+    byte            closeNotify;        /* we've recieved a close notify */
+    byte            sentNotify;         /* we've sent a close notify */
+    byte            connectState;       /* nonblocking resume */
+    byte            acceptState;        /* nonblocking resume */
+    byte            usingCompression;   /* are we using compression */
+    byte            haveRSA;            /* RSA available */
+    byte            haveDH;             /* server DH parms set by user */
+    byte            haveNTRU;           /* server NTRU  private key loaded */
+    byte            haveECDSAsig;       /* server ECDSA signed cert */
+    byte            haveStaticECC;      /* static server ECC private key */
+    byte            havePeerCert;       /* do we have peer's cert */
+    byte            havePeerVerify;     /* and peer's cert verify */
+    byte            usingPSK_cipher;    /* whether we're using psk as cipher */
+    byte            sendAlertState;     /* nonblocking resume */ 
+    byte            processReply;       /* nonblocking resume */
+    byte            partialWrite;       /* only one msg per write call */
+    byte            quietShutdown;      /* don't send close notify */
+    byte            certOnly;           /* stop once we get cert */
+    byte            groupMessages;      /* group handshake messages */
+    byte            usingNonblock;      /* set when using nonblocking socket */
+    byte            saveArrays;         /* save array Memory for user get keys
+                                           or psk */
+#ifndef NO_PSK
+    byte            havePSK;            /* psk key set by user */
+    psk_client_callback client_psk_cb;
+    psk_server_callback server_psk_cb;
+#endif /* NO_PSK */
+} Options;
+
+typedef struct Arrays {
+    byte            clientRandom[RAN_LEN];
+    byte            serverRandom[RAN_LEN];
+    byte            sessionID[ID_LEN];
+    byte            preMasterSecret[ENCRYPT_LEN];
+    byte            masterSecret[SECRET_LEN];
+#ifdef CYASSL_DTLS
+    byte            cookie[MAX_COOKIE_LEN];
+    byte            cookieSz;
+#endif
+#ifndef NO_PSK
+    char            client_identity[MAX_PSK_ID_LEN];
+    char            server_hint[MAX_PSK_ID_LEN];
+    byte            psk_key[MAX_PSK_KEY_LEN];
+    word32          psk_keySz;          /* acutal size */
+#endif
+    word32          preMasterSz;        /* differs for DH, actual size */
+} Arrays;
+
+#ifndef ASN_NAME_MAX
+#define ASN_NAME_MAX 256
+#endif
+
+#ifndef MAX_DATE_SZ
+#define MAX_DATE_SZ 32
+#endif
+
+struct CYASSL_X509_NAME {
+    char  *name;
+    char  staticName[ASN_NAME_MAX];
+    int   dynamicName;
+    int   sz;
+#ifdef OPENSSL_EXTRA
+    DecodedName fullName;
+#endif /* OPENSSL_EXTRA */
+};
+
+#ifndef EXTERNAL_SERIAL_SIZE
+    #define EXTERNAL_SERIAL_SIZE 32
+#endif
+
+#ifdef NO_ASN 
+    typedef struct DNS_entry DNS_entry;
+#endif
+
+struct CYASSL_X509 {
+    int              version;
+    CYASSL_X509_NAME issuer;
+    CYASSL_X509_NAME subject;
+    int              serialSz;
+    byte             serial[EXTERNAL_SERIAL_SIZE];
+    char             subjectCN[ASN_NAME_MAX];        /* common name short cut */
+#ifdef CYASSL_SEP
+    int              deviceTypeSz;
+    byte             deviceType[EXTERNAL_SERIAL_SIZE];
+    int              hwTypeSz;
+    byte             hwType[EXTERNAL_SERIAL_SIZE];
+    int              hwSerialNumSz;
+    byte             hwSerialNum[EXTERNAL_SERIAL_SIZE];
+    #ifdef OPENSSL_EXTRA
+        byte             certPolicySet;
+        byte             certPolicyCrit;
+    #endif /* OPENSSL_EXTRA */
+#endif
+    int              notBeforeSz;
+    byte             notBefore[MAX_DATE_SZ];
+    int              notAfterSz;
+    byte             notAfter[MAX_DATE_SZ];
+    int              sigOID;
+    buffer           sig;
+    int              pubKeyOID;
+    buffer           pubKey;
+    #ifdef HAVE_ECC
+        word32       pkCurveOID;
+    #endif /* HAVE_ECC */
+    buffer           derCert;                        /* may need  */
+    DNS_entry*       altNames;                       /* alt names list */
+    DNS_entry*       altNamesNext;                   /* hint for retrieval */
+    byte             dynamicMemory;                  /* dynamic memory flag */
+    byte             isCa;
+#ifdef OPENSSL_EXTRA
+    word32           pathLength;
+    word16           keyUsage;
+    byte             basicConstSet;
+    byte             basicConstCrit;
+    byte             basicConstPlSet;
+    byte             subjAltNameSet;
+    byte             subjAltNameCrit;
+    byte             authKeyIdSet;
+    byte             authKeyIdCrit;
+    byte*            authKeyId;
+    word32           authKeyIdSz;
+    byte             subjKeyIdSet;
+    byte             subjKeyIdCrit;
+    byte*            subjKeyId;
+    word32           subjKeyIdSz;
+    byte             keyUsageSet;
+    byte             keyUsageCrit;
+#endif /* OPENSSL_EXTRA */
+};
+
+
+/* record layer header for PlainText, Compressed, and CipherText */
+typedef struct RecordLayerHeader {
+    byte            type;
+    byte            pvMajor;
+    byte            pvMinor;
+    byte            length[2];
+} RecordLayerHeader;
+
+
+/* record layer header for DTLS PlainText, Compressed, and CipherText */
+typedef struct DtlsRecordLayerHeader {
+    byte            type;
+    byte            pvMajor;
+    byte            pvMinor;
+    byte            epoch[2];             /* increment on cipher state change */
+    byte            sequence_number[6];   /* per record */
+    byte            length[2];
+} DtlsRecordLayerHeader;
+
+
+typedef struct DtlsPool {
+    buffer          buf[DTLS_POOL_SZ];
+    int             used;
+} DtlsPool;
+
+typedef struct DtlsMsg {
+    struct DtlsMsg* next;
+    word32          seq;       /* Handshake sequence number    */
+    word32          sz;        /* Length of whole mesage       */
+    word32          fragSz;    /* Length of fragments received */
+    byte            type;
+    byte*           buf;
+    byte*           msg;
+} DtlsMsg;
+
+
+#ifdef HAVE_NETX
+
+    /* NETX I/O Callback default */
+    typedef struct NetX_Ctx {
+        NX_TCP_SOCKET* nxSocket;    /* send/recv socket handle */
+        NX_PACKET*     nxPacket;    /* incoming packet handle for short reads */
+        ULONG          nxOffset;    /* offset already read from nxPacket */
+        ULONG          nxWait;      /* wait option flag */
+    } NetX_Ctx;
+
+#endif
+
+
+/* CyaSSL ssl type */
+struct CYASSL {
+    CYASSL_CTX*     ctx;
+    int             error;
+    ProtocolVersion version;            /* negotiated version */
+    ProtocolVersion chVersion;          /* client hello version */
+    Suites*         suites;             /* only need during handshake */
+    Ciphers         encrypt;
+    Ciphers         decrypt;
+    CipherSpecs     specs;
+    Keys            keys;
+    int             rfd;                /* read  file descriptor */
+    int             wfd;                /* write file descriptor */
+    int             rflags;             /* user read  flags */
+    int             wflags;             /* user write flags */
+    CYASSL_BIO*     biord;              /* socket bio read  to free/close */
+    CYASSL_BIO*     biowr;              /* socket bio write to free/close */
+    void*           IOCB_ReadCtx;
+    void*           IOCB_WriteCtx;
+    RNG*            rng;
+#ifndef NO_OLD_TLS
+#ifndef NO_SHA
+    Sha             hashSha;            /* sha hash of handshake msgs */
+#endif
+#ifndef NO_MD5
+    Md5             hashMd5;            /* md5 hash of handshake msgs */
+#endif
+#endif
+#ifndef NO_SHA256
+    Sha256          hashSha256;         /* sha256 hash of handshake msgs */
+#endif
+#ifdef CYASSL_SHA384
+    Sha384          hashSha384;         /* sha384 hash of handshake msgs */
+#endif
+    Hashes          verifyHashes;
+    Hashes          certHashes;         /* for cert verify */
+    Buffers         buffers;
+    Options         options;
+    Arrays*         arrays;
+    CYASSL_SESSION  session;
+    VerifyCallback  verifyCallback;      /* cert verification callback */
+    void*           verifyCbCtx;         /* cert verify callback user ctx*/
+#ifndef NO_RSA
+    RsaKey*         peerRsaKey;
+    byte            peerRsaKeyPresent;
+#endif
+#ifdef HAVE_NTRU
+    word16          peerNtruKeyLen;
+    byte            peerNtruKey[MAX_NTRU_PUB_KEY_SZ];
+    byte            peerNtruKeyPresent;
+#endif
+#ifdef HAVE_ECC
+    ecc_key*        peerEccKey;              /* peer's  ECDHE key */
+    ecc_key*        peerEccDsaKey;           /* peer's  ECDSA key */
+    ecc_key*        eccTempKey;              /* private ECDHE key */
+    ecc_key*        eccDsaKey;               /* private ECDSA key */
+    word16          eccTempKeySz;            /* in octets 20 - 66 */
+    byte            peerEccKeyPresent;
+    byte            peerEccDsaKeyPresent;
+    byte            eccTempKeyPresent;
+    byte            eccDsaKeyPresent;
+#endif
+    hmacfp          hmac;
+    void*           heap;               /* for user overrides */
+    RecordLayerHeader curRL;
+    word16            curSize;
+    word32          timeout;            /* session timeout */
+    CYASSL_CIPHER   cipher;
+#ifdef HAVE_LIBZ
+    z_stream        c_stream;           /* compression   stream */
+    z_stream        d_stream;           /* decompression stream */
+    byte            didStreamInit;      /* for stream init and end */
+#endif
+#ifdef CYASSL_DTLS
+    int             dtls_timeout_init;  /* starting timeout vaule */
+    int             dtls_timeout_max;   /* maximum timeout value */
+    int             dtls_timeout;       /* current timeout value, changes */
+    DtlsPool*       dtls_pool;
+    DtlsMsg*        dtls_msg_list;
+    void*           IOCB_CookieCtx;     /* gen cookie ctx */
+    word32          dtls_expected_rx;
+#endif
+#ifdef CYASSL_CALLBACKS
+    HandShakeInfo   handShakeInfo;      /* info saved during handshake */
+    TimeoutInfo     timeoutInfo;        /* info saved during handshake */
+    byte            hsInfoOn;           /* track handshake info        */
+    byte            toInfoOn;           /* track timeout   info        */
+#endif
+#ifdef KEEP_PEER_CERT
+    CYASSL_X509     peerCert;           /* X509 peer cert */
+#endif
+#ifdef FORTRESS
+    void*           ex_data[MAX_EX_DATA]; /* external data, for Fortress */
+#endif
+#ifdef HAVE_CAVIUM
+    int              devId;            /* cavium device id to use */
+#endif
+#ifdef HAVE_TLS_EXTENSIONS
+    TLSX* extensions;                  /* RFC 6066 TLS Extensions data */
+#ifdef HAVE_MAX_FRAGMENT
+    word16 max_fragment;
+#endif
+#ifdef HAVE_TRUNCATED_HMAC
+    byte truncated_hmac;
+#endif
+#endif
+#ifdef HAVE_NETX
+    NetX_Ctx        nxCtx;             /* NetX IO Context */
+#endif
+#ifdef SESSION_INDEX
+    int sessionIndex;                  /* Session's location in the cache. */
+#endif
+    CYASSL_ALERT_HISTORY alert_history;
+#ifdef ATOMIC_USER
+    void*    MacEncryptCtx;    /* Atomic User Mac/Encrypt Callback Context */
+    void*    DecryptVerifyCtx; /* Atomic User Decrypt/Verify Callback Context */
+#endif
+#ifdef HAVE_PK_CALLBACKS
+    #ifdef HAVE_ECC
+        void* EccSignCtx;     /* Ecc Sign   Callback Context */
+        void* EccVerifyCtx;   /* Ecc Verify Callback Context */
+    #endif /* HAVE_ECC */
+    #ifndef NO_RSA 
+        void* RsaSignCtx;     /* Rsa Sign   Callback Context */
+        void* RsaVerifyCtx;   /* Rsa Verify Callback Context */
+        void* RsaEncCtx;      /* Rsa Public  Encrypt   Callback Context */
+        void* RsaDecCtx;      /* Rsa Private Decrypt   Callback Context */
+    #endif /* NO_RSA */
+#endif /* HAVE_PK_CALLBACKS */
+};
+
+
+CYASSL_LOCAL
+int  InitSSL(CYASSL*, CYASSL_CTX*);
+CYASSL_LOCAL
+void FreeSSL(CYASSL*);
+CYASSL_API void SSL_ResourceFree(CYASSL*);   /* Micrium uses */
+
+
+enum {
+    IV_SZ   = 32,          /* max iv sz */
+    NAME_SZ = 80          /* max one line */
+};
+
+
+typedef struct EncryptedInfo {
+    char     name[NAME_SZ];    /* encryption name */
+    byte     iv[IV_SZ];        /* encrypted IV */
+    word32   ivSz;             /* encrypted IV size */
+    long     consumed;         /* tracks PEM bytes consumed */
+    byte     set;              /* if encryption set */
+    CYASSL_CTX* ctx;              /* CTX owner */
+} EncryptedInfo;
+
+
+#ifndef NO_CERTS
+    CYASSL_LOCAL int PemToDer(const unsigned char* buff, long sz, int type,
+                              buffer* der, void* heap, EncryptedInfo* info,
+                              int* eccKey);
+
+    CYASSL_LOCAL int ProcessFile(CYASSL_CTX* ctx, const char* fname, int format,
+                                 int type, CYASSL* ssl, int userChain,
+                                CYASSL_CRL* crl);
+#endif
+
+
+#ifdef CYASSL_CALLBACKS
+    CYASSL_LOCAL
+    void InitHandShakeInfo(HandShakeInfo*);
+    CYASSL_LOCAL 
+    void FinishHandShakeInfo(HandShakeInfo*, const CYASSL*);
+    CYASSL_LOCAL 
+    void AddPacketName(const char*, HandShakeInfo*);
+
+    CYASSL_LOCAL
+    void InitTimeoutInfo(TimeoutInfo*);
+    CYASSL_LOCAL 
+    void FreeTimeoutInfo(TimeoutInfo*, void*);
+    CYASSL_LOCAL 
+    void AddPacketInfo(const char*, TimeoutInfo*, const byte*, int, void*);
+    CYASSL_LOCAL 
+    void AddLateName(const char*, TimeoutInfo*);
+    CYASSL_LOCAL 
+    void AddLateRecordHeader(const RecordLayerHeader* rl, TimeoutInfo* info);
+#endif
+
+
+/* Record Layer Header identifier from page 12 */
+enum ContentType {
+    no_type            = 0,
+    change_cipher_spec = 20, 
+    alert              = 21, 
+    handshake          = 22, 
+    application_data   = 23 
+};
+
+
+/* handshake header, same for each message type, pgs 20/21 */
+typedef struct HandShakeHeader {
+    byte            type;
+    word24          length;
+} HandShakeHeader;
+
+
+/* DTLS handshake header, same for each message type */
+typedef struct DtlsHandShakeHeader {
+    byte            type;
+    word24          length;
+    byte            message_seq[2];    /* start at 0, restransmit gets same # */
+    word24          fragment_offset;   /* bytes in previous fragments */
+    word24          fragment_length;   /* length of this fragment */
+} DtlsHandShakeHeader;
+
+
+enum HandShakeType {
+    no_shake            = -1,
+    hello_request       = 0, 
+    client_hello        = 1, 
+    server_hello        = 2,
+    hello_verify_request = 3,       /* DTLS addition */
+    session_ticket      =  4,
+    certificate         = 11, 
+    server_key_exchange = 12,
+    certificate_request = 13, 
+    server_hello_done   = 14,
+    certificate_verify  = 15, 
+    client_key_exchange = 16,
+    finished            = 20
+};
+
+
+static const byte client[SIZEOF_SENDER] = { 0x43, 0x4C, 0x4E, 0x54 };
+static const byte server[SIZEOF_SENDER] = { 0x53, 0x52, 0x56, 0x52 };
+
+static const byte tls_client[FINISHED_LABEL_SZ + 1] = "client finished";
+static const byte tls_server[FINISHED_LABEL_SZ + 1] = "server finished";
+
+
+/* internal functions */
+CYASSL_LOCAL int SendChangeCipher(CYASSL*);
+CYASSL_LOCAL int SendData(CYASSL*, const void*, int);
+CYASSL_LOCAL int SendCertificate(CYASSL*);
+CYASSL_LOCAL int SendCertificateRequest(CYASSL*);
+CYASSL_LOCAL int SendServerKeyExchange(CYASSL*);
+CYASSL_LOCAL int SendBuffered(CYASSL*);
+CYASSL_LOCAL int ReceiveData(CYASSL*, byte*, int, int);
+CYASSL_LOCAL int SendFinished(CYASSL*);
+CYASSL_LOCAL int SendAlert(CYASSL*, int, int);
+CYASSL_LOCAL int ProcessReply(CYASSL*);
+
+CYASSL_LOCAL int SetCipherSpecs(CYASSL*);
+CYASSL_LOCAL int MakeMasterSecret(CYASSL*);
+
+CYASSL_LOCAL int  AddSession(CYASSL*);
+CYASSL_LOCAL int  DeriveKeys(CYASSL* ssl);
+CYASSL_LOCAL int  StoreKeys(CYASSL* ssl, const byte* keyData);
+
+CYASSL_LOCAL int IsTLS(const CYASSL* ssl);
+CYASSL_LOCAL int IsAtLeastTLSv1_2(const CYASSL* ssl);
+
+CYASSL_LOCAL void FreeHandshakeResources(CYASSL* ssl);
+CYASSL_LOCAL void ShrinkInputBuffer(CYASSL* ssl, int forcedFree);
+CYASSL_LOCAL void ShrinkOutputBuffer(CYASSL* ssl);
+#ifndef NO_CERTS
+    CYASSL_LOCAL Signer* GetCA(void* cm, byte* hash);
+    #ifndef NO_SKID
+        CYASSL_LOCAL Signer* GetCAByName(void* cm, byte* hash);
+    #endif
+#endif
+CYASSL_LOCAL void BuildTlsFinished(CYASSL* ssl, Hashes* hashes,
+                                   const byte* sender);
+CYASSL_LOCAL void FreeArrays(CYASSL* ssl, int keep);
+CYASSL_LOCAL  int CheckAvailableSize(CYASSL *ssl, int size);
+CYASSL_LOCAL  int GrowInputBuffer(CYASSL* ssl, int size, int usedLength);
+
+#ifndef NO_TLS
+    CYASSL_LOCAL int  MakeTlsMasterSecret(CYASSL*);
+    CYASSL_LOCAL void TLS_hmac(CYASSL* ssl, byte* digest, const byte* in,
+                               word32 sz, int content, int verify);
+#endif
+
+#ifndef NO_CYASSL_CLIENT
+    CYASSL_LOCAL int SendClientHello(CYASSL*);
+    CYASSL_LOCAL int SendClientKeyExchange(CYASSL*);
+    CYASSL_LOCAL int SendCertificateVerify(CYASSL*);
+#endif /* NO_CYASSL_CLIENT */
+
+#ifndef NO_CYASSL_SERVER
+    CYASSL_LOCAL int SendServerHello(CYASSL*);
+    CYASSL_LOCAL int SendServerHelloDone(CYASSL*);
+    #ifdef CYASSL_DTLS
+        CYASSL_LOCAL int SendHelloVerifyRequest(CYASSL*);
+    #endif
+#endif /* NO_CYASSL_SERVER */
+
+#ifdef CYASSL_DTLS
+    CYASSL_LOCAL int  DtlsPoolInit(CYASSL*);
+    CYASSL_LOCAL int  DtlsPoolSave(CYASSL*, const byte*, int);
+    CYASSL_LOCAL int  DtlsPoolTimeout(CYASSL*);
+    CYASSL_LOCAL int  DtlsPoolSend(CYASSL*);
+    CYASSL_LOCAL void DtlsPoolReset(CYASSL*);
+
+    CYASSL_LOCAL DtlsMsg* DtlsMsgNew(word32, void*);
+    CYASSL_LOCAL void DtlsMsgDelete(DtlsMsg*, void*);
+    CYASSL_LOCAL void DtlsMsgListDelete(DtlsMsg*, void*);
+    CYASSL_LOCAL void DtlsMsgSet(DtlsMsg*, word32, const byte*, byte,
+                                                             word32, word32);
+    CYASSL_LOCAL DtlsMsg* DtlsMsgFind(DtlsMsg*, word32);
+    CYASSL_LOCAL DtlsMsg* DtlsMsgStore(DtlsMsg*, word32, const byte*, word32,
+                                                byte, word32, word32, void*);
+    CYASSL_LOCAL DtlsMsg* DtlsMsgInsert(DtlsMsg*, DtlsMsg*);
+#endif /* CYASSL_DTLS */
+
+#ifndef NO_TLS
+    
+
+#endif /* NO_TLS */
+
+
+CYASSL_LOCAL word32  LowResTimer(void);
+
+CYASSL_LOCAL void InitX509Name(CYASSL_X509_NAME*, int);
+CYASSL_LOCAL void FreeX509Name(CYASSL_X509_NAME* name);
+CYASSL_LOCAL void InitX509(CYASSL_X509*, int);
+CYASSL_LOCAL void FreeX509(CYASSL_X509*);
+#ifndef NO_CERTS
+    CYASSL_LOCAL int  CopyDecodedToX509(CYASSL_X509*, DecodedCert*);
+#endif
+
+
+#ifdef __cplusplus
+    }  /* extern "C" */
+#endif
+
+#endif /* CyaSSL_INT_H */
+
diff --git a/cyassl/ocsp.h b/cyassl/ocsp.h
index f47f671b1..f6931bd98 100644
--- a/cyassl/ocsp.h
+++ b/cyassl/ocsp.h
@@ -36,12 +36,10 @@
 
 typedef struct CYASSL_OCSP CYASSL_OCSP;
 
-CYASSL_LOCAL int  CyaSSL_OCSP_Init(CYASSL_OCSP*);
-CYASSL_LOCAL void CyaSSL_OCSP_Cleanup(CYASSL_OCSP*);
-
-CYASSL_LOCAL int  CyaSSL_OCSP_set_override_url(CYASSL_OCSP*, const char*);
-CYASSL_LOCAL int  CyaSSL_OCSP_Lookup_Cert(CYASSL_OCSP*, DecodedCert*);
+CYASSL_LOCAL int  InitOCSP(CYASSL_OCSP*, CYASSL_CERT_MANAGER*);
+CYASSL_LOCAL void FreeOCSP(CYASSL_OCSP*, int dynamic);
 
+CYASSL_LOCAL int  CheckCertOCSP(CYASSL_OCSP*, DecodedCert*);
 
 #ifdef __cplusplus
     }  /* extern "C" */
diff --git a/cyassl/ssl.h b/cyassl/ssl.h
index bd5f25c38..049e0d5eb 100644
--- a/cyassl/ssl.h
+++ b/cyassl/ssl.h
@@ -99,6 +99,9 @@ typedef struct CYASSL_EVP_PKEY {
     union {
         char* ptr;
     } pkey;
+    #ifdef HAVE_ECC
+        int pkey_curve;
+    #endif
 } CYASSL_EVP_PKEY;
 
 typedef struct CYASSL_MD4_CTX {
@@ -413,6 +416,16 @@ CYASSL_API int   CyaSSL_X509_STORE_CTX_get_error_depth(CYASSL_X509_STORE_CTX*);
 CYASSL_API char*       CyaSSL_X509_NAME_oneline(CYASSL_X509_NAME*, char*, int);
 CYASSL_API CYASSL_X509_NAME*  CyaSSL_X509_get_issuer_name(CYASSL_X509*);
 CYASSL_API CYASSL_X509_NAME*  CyaSSL_X509_get_subject_name(CYASSL_X509*);
+CYASSL_API int  CyaSSL_X509_ext_isSet_by_NID(CYASSL_X509*, int);
+CYASSL_API int  CyaSSL_X509_ext_get_critical_by_NID(CYASSL_X509*, int);
+CYASSL_API int  CyaSSL_X509_get_isCA(CYASSL_X509*);
+CYASSL_API int  CyaSSL_X509_get_isSet_pathLength(CYASSL_X509*);
+CYASSL_API unsigned int CyaSSL_X509_get_pathLength(CYASSL_X509*);
+CYASSL_API unsigned int CyaSSL_X509_get_keyUsage(CYASSL_X509*);
+CYASSL_API unsigned char* CyaSSL_X509_get_authorityKeyID(
+                                            CYASSL_X509*, unsigned char*, int*);
+CYASSL_API unsigned char* CyaSSL_X509_get_subjectKeyID(
+                                            CYASSL_X509*, unsigned char*, int*);
 CYASSL_API int CyaSSL_X509_NAME_entry_count(CYASSL_X509_NAME*);
 CYASSL_API int CyaSSL_X509_NAME_get_text_by_NID(
                                             CYASSL_X509_NAME*, int, char*, int);
@@ -530,6 +543,9 @@ enum {
     OCSP_RESPONSE = 8,
     OCSP_BASICRESP = 16,
 
+    CYASSL_OCSP_URL_OVERRIDE = 1,
+    CYASSL_OCSP_NO_NONCE     = 2,
+
     CYASSL_CRL_CHECKALL = 1,
 
     ASN1_GENERALIZEDTIME = 4,
@@ -810,9 +826,9 @@ CYASSL_API CYASSL_X509*
 #ifndef NO_FILESYSTEM
 CYASSL_API CYASSL_X509*
     CyaSSL_X509_d2i_fp(CYASSL_X509** x509, FILE* file);
-#endif
 CYASSL_API CYASSL_X509*
     CyaSSL_X509_load_certificate_file(const char* fname, int format);
+#endif
 
 #ifdef CYASSL_SEP
     CYASSL_API unsigned char*
@@ -930,15 +946,6 @@ CYASSL_API void  CyaSSL_CTX_SetGenCookie(CYASSL_CTX*, CallbackGenCookie);
 CYASSL_API void  CyaSSL_SetCookieCtx(CYASSL* ssl, void *ctx);
 CYASSL_API void* CyaSSL_GetCookieCtx(CYASSL* ssl);
 
-typedef int (*CallbackIOOcsp)(void*, const char*, int,
-                                         unsigned char*, int, unsigned char**);
-typedef void (*CallbackIOOcspRespFree)(void*,unsigned char*); 
-#ifdef HAVE_OCSP 
-CYASSL_API void CyaSSL_SetIOOcsp(CYASSL_CTX *ocsp, CallbackIOOcsp cb);
-CYASSL_API void CyaSSL_SetIOOcspRespFree(CYASSL_CTX *ocsp,
-                                                    CallbackIOOcspRespFree cb);
-CYASSL_API void CyaSSL_SetIOOcspCtx(CYASSL_CTX *ocsp, void *octx);
-#endif
 
 /* I/O Callback default errors */
 enum IOerrors {
@@ -966,9 +973,14 @@ CYASSL_API int CyaSSL_GetObjectSize(void);  /* object size based on build */
 CYASSL_API int CyaSSL_SetVersion(CYASSL* ssl, int version);
 CYASSL_API int CyaSSL_KeyPemToDer(const unsigned char*, int sz, unsigned char*,
                                   int, const char*);
+CYASSL_API int CyaSSL_CertPemToDer(const unsigned char*, int sz, unsigned char*,
+                                   int, int);
 
 typedef void (*CallbackCACache)(unsigned char* der, int sz, int type);
 typedef void (*CbMissingCRL)(const char* url);
+typedef int  (*CbOCSPIO)(void*, const char*, int,
+                                         unsigned char*, int, unsigned char**);
+typedef void (*CbOCSPRespFree)(void*,unsigned char*);
 
 /* User Atomic Record Layer CallBacks */
 typedef int (*CallbackMacEncrypt)(CYASSL* ssl, unsigned char* macOut, 
@@ -994,6 +1006,7 @@ CYASSL_API const unsigned char* CyaSSL_GetClientWriteIV(CYASSL*);
 CYASSL_API const unsigned char* CyaSSL_GetServerWriteKey(CYASSL*);
 CYASSL_API const unsigned char* CyaSSL_GetServerWriteIV(CYASSL*);
 CYASSL_API int                  CyaSSL_GetKeySize(CYASSL*);
+CYASSL_API int                  CyaSSL_GetIVSize(CYASSL*);
 CYASSL_API int                  CyaSSL_GetSide(CYASSL*);
 CYASSL_API int                  CyaSSL_IsTLSv1_1(CYASSL*);
 CYASSL_API int                  CyaSSL_GetBulkCipher(CYASSL*);
@@ -1113,16 +1126,34 @@ CYASSL_API void* CyaSSL_GetRsaDecCtx(CYASSL* ssl);
                                                                       int, int);
     CYASSL_API int CyaSSL_CertManagerSetCRL_Cb(CYASSL_CERT_MANAGER*,
                                                                   CbMissingCRL);
+    CYASSL_API int CyaSSL_CertManagerCheckOCSP(CYASSL_CERT_MANAGER*,
+                                                        unsigned char*, int sz);
+    CYASSL_API int CyaSSL_CertManagerEnableOCSP(CYASSL_CERT_MANAGER*,
+                                                                   int options);
+    CYASSL_API int CyaSSL_CertManagerDisableOCSP(CYASSL_CERT_MANAGER*);
+    CYASSL_API int CyaSSL_CertManagerSetOCSPOverrideURL(CYASSL_CERT_MANAGER*,
+                                                                   const char*);
+    CYASSL_API int CyaSSL_CertManagerSetOCSP_Cb(CYASSL_CERT_MANAGER*,
+                                               CbOCSPIO, CbOCSPRespFree, void*);
 
     CYASSL_API int CyaSSL_EnableCRL(CYASSL* ssl, int options);
     CYASSL_API int CyaSSL_DisableCRL(CYASSL* ssl);
     CYASSL_API int CyaSSL_LoadCRL(CYASSL*, const char*, int, int);
     CYASSL_API int CyaSSL_SetCRL_Cb(CYASSL*, CbMissingCRL);
+    CYASSL_API int CyaSSL_EnableOCSP(CYASSL*, int options);
+    CYASSL_API int CyaSSL_DisableOCSP(CYASSL*);
+    CYASSL_API int CyaSSL_SetOCSP_OverrideURL(CYASSL*, const char*);
+    CYASSL_API int CyaSSL_SetOCSP_Cb(CYASSL*, CbOCSPIO, CbOCSPRespFree, void*);
 
     CYASSL_API int CyaSSL_CTX_EnableCRL(CYASSL_CTX* ctx, int options);
     CYASSL_API int CyaSSL_CTX_DisableCRL(CYASSL_CTX* ctx);
     CYASSL_API int CyaSSL_CTX_LoadCRL(CYASSL_CTX*, const char*, int, int);
     CYASSL_API int CyaSSL_CTX_SetCRL_Cb(CYASSL_CTX*, CbMissingCRL);
+    CYASSL_API int CyaSSL_CTX_EnableOCSP(CYASSL_CTX*, int options);
+    CYASSL_API int CyaSSL_CTX_DisableOCSP(CYASSL_CTX*);
+    CYASSL_API int CyaSSL_CTX_SetOCSP_OverrideURL(CYASSL_CTX*, const char*);
+    CYASSL_API int CyaSSL_CTX_SetOCSP_Cb(CYASSL_CTX*,
+                                               CbOCSPIO, CbOCSPRespFree, void*);
 #endif /* !NO_CERTS */
 
 /* end of handshake frees temporary arrays, if user needs for get_keys or
@@ -1174,6 +1205,10 @@ CYASSL_API unsigned char CyaSSL_SNI_Status(CYASSL* ssl, unsigned char type);
 CYASSL_API unsigned short CyaSSL_SNI_GetRequest(CYASSL *ssl, unsigned char type,
                                                                    void** data);
 
+CYASSL_API int CyaSSL_SNI_GetFromBuffer(
+                 const unsigned char* clientHello, unsigned int helloSz,
+                 unsigned char type, unsigned char* sni, unsigned int* inOutSz);
+
 #endif /* NO_CYASSL_SERVER */
 #endif /* HAVE_SNI */
 
@@ -1227,14 +1262,9 @@ CYASSL_API int CyaSSL_accept_ex(CYASSL*, HandShakeCallBack, TimeoutCallBack,
 #endif /* CYASSL_CALLBACKS */
 
 
-CYASSL_API int  CyaSSL_CTX_OCSP_set_options(CYASSL_CTX*, int);
-CYASSL_API int  CyaSSL_CTX_OCSP_set_override_url(CYASSL_CTX*, const char*);
-
-/* OCSP Options */
-#define CYASSL_OCSP_ENABLE       0x0001 /* Enable OCSP lookups */
-#define CYASSL_OCSP_URL_OVERRIDE 0x0002 /* Use the override URL instead of URL
-                                         * in certificate */
-#define CYASSL_OCSP_NO_NONCE     0x0004 /* Disables the request nonce. */
+#ifdef CYASSL_HAVE_WOLFSCEP
+CYASSL_API void CyaSSL_wolfSCEP(void);
+#endif /* CYASSL_HAVE_WOLFSCEP */
 
 
 #ifdef __cplusplus
diff --git a/cyassl/version.h b/cyassl/version.h
index e66d54a0d..192ff9874 100644
--- a/cyassl/version.h
+++ b/cyassl/version.h
@@ -26,8 +26,8 @@
 extern "C" {
 #endif
 
-#define LIBCYASSL_VERSION_STRING "2.8.3"
-#define LIBCYASSL_VERSION_HEX 0x02008003
+#define LIBCYASSL_VERSION_STRING "2.8.6"
+#define LIBCYASSL_VERSION_HEX 0x02008006
 
 #ifdef __cplusplus
 }
diff --git a/examples/client/client.c b/examples/client/client.c
index 6c82d627c..ff0e9848f 100644
--- a/examples/client/client.c
+++ b/examples/client/client.c
@@ -505,10 +505,13 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
 
 #ifdef HAVE_OCSP
     if (useOcsp) {
-        CyaSSL_CTX_OCSP_set_options(ctx,
-                                    CYASSL_OCSP_ENABLE | CYASSL_OCSP_NO_NONCE);
-        if (ocspUrl != NULL)
-            CyaSSL_CTX_OCSP_set_override_url(ctx, ocspUrl);
+        if (ocspUrl != NULL) {
+            CyaSSL_CTX_SetOCSP_OverrideURL(ctx, ocspUrl);
+            CyaSSL_CTX_EnableOCSP(ctx, CYASSL_OCSP_NO_NONCE
+                                                    | CYASSL_OCSP_URL_OVERRIDE);
+        }
+        else
+            CyaSSL_CTX_EnableOCSP(ctx, CYASSL_OCSP_NO_NONCE);
     }
 #endif
 
@@ -803,8 +806,10 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
 #if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL) && !defined(STACK_TRAP)
         CyaSSL_Debugging_ON();
 #endif
-        if (CurrentDir("client") || CurrentDir("build"))
+        if (CurrentDir("client"))
             ChangeDirBack(2);
+        else if (CurrentDir("Debug") || CurrentDir("Release"))
+            ChangeDirBack(3);
   
 #ifdef HAVE_STACK_SIZE
         StackSizeCheck(&args, client_test);
diff --git a/examples/echoclient/echoclient.c b/examples/echoclient/echoclient.c
index 0c444a2a2..ee654d481 100644
--- a/examples/echoclient/echoclient.c
+++ b/examples/echoclient/echoclient.c
@@ -255,8 +255,10 @@ void echoclient_test(void* args)
         CyaSSL_Debugging_ON();
 #endif
 
-        if (CurrentDir("echoclient") || CurrentDir("build"))
+        if (CurrentDir("echoclient"))
             ChangeDirBack(2);
+        else if (CurrentDir("Debug") || CurrentDir("Release"))
+            ChangeDirBack(3);
         echoclient_test(&args);
 
         CyaSSL_Cleanup();
diff --git a/examples/echoserver/echoserver.c b/examples/echoserver/echoserver.c
index cc4ed7200..1eac9b5a9 100644
--- a/examples/echoserver/echoserver.c
+++ b/examples/echoserver/echoserver.c
@@ -339,8 +339,10 @@ THREAD_RETURN CYASSL_THREAD echoserver_test(void* args)
 #if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL)
         CyaSSL_Debugging_ON();
 #endif
-        if (CurrentDir("echoserver") || CurrentDir("build"))
+        if (CurrentDir("echoserver"))
             ChangeDirBack(2);
+        else if (CurrentDir("Debug") || CurrentDir("Release"))
+            ChangeDirBack(3);
         echoserver_test(&args);
         CyaSSL_Cleanup();
 
diff --git a/examples/server/server.c b/examples/server/server.c
index 9be9c4802..365418d5d 100644
--- a/examples/server/server.c
+++ b/examples/server/server.c
@@ -374,6 +374,10 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
     if (fewerPackets)
         CyaSSL_CTX_set_group_messages(ctx);
 
+#ifdef OPENSSL_EXTRA
+    SSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack);
+#endif
+
 #if !defined(NO_FILESYSTEM) && !defined(NO_CERTS)
     if (!usePsk) {
         if (SSL_CTX_use_certificate_file(ctx, ourCert, SSL_FILETYPE_PEM)
@@ -428,10 +432,6 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
     }
 #endif
 
-#ifdef OPENSSL_EXTRA
-    SSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack);
-#endif
-
 #if defined(CYASSL_SNIFFER) && !defined(HAVE_NTRU) && !defined(HAVE_ECC)
     /* don't use EDH, can't sniff tmp keys */
     if (cipherList == NULL) {
@@ -459,10 +459,13 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
 #endif
 #ifdef HAVE_OCSP
     if (useOcsp) {
-        CyaSSL_CTX_OCSP_set_options(ctx,
-                                    CYASSL_OCSP_ENABLE | CYASSL_OCSP_NO_NONCE);
-        if (ocspUrl != NULL)
-            CyaSSL_CTX_OCSP_set_override_url(ctx, ocspUrl);
+        if (ocspUrl != NULL) {
+            CyaSSL_CTX_SetOCSP_OverrideURL(ctx, ocspUrl);
+            CyaSSL_CTX_EnableOCSP(ctx, CYASSL_OCSP_NO_NONCE
+                                                    | CYASSL_OCSP_URL_OVERRIDE);
+        }
+        else
+            CyaSSL_CTX_EnableOCSP(ctx, CYASSL_OCSP_NO_NONCE);
     }
 #endif
 #ifdef HAVE_PK_CALLBACKS
@@ -556,8 +559,10 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
 #if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL)
         CyaSSL_Debugging_ON();
 #endif
-        if (CurrentDir("server") || CurrentDir("build"))
+        if (CurrentDir("server"))
             ChangeDirBack(2);
+        else if (CurrentDir("Debug") || CurrentDir("Release"))
+            ChangeDirBack(3);
    
 #ifdef HAVE_STACK_SIZE
         StackSizeCheck(&args, server_test);
diff --git a/m4/ax_debug.m4 b/m4/ax_debug.m4
index 5522d7215..5ea3c3594 100644
--- a/m4/ax_debug.m4
+++ b/m4/ax_debug.m4
@@ -52,7 +52,6 @@ AC_DEFUN([AX_DEBUG],
         [Add debug code/turns off optimizations (yes|no) @<:@default=no@:>@])],
       [ax_enable_debug=yes
       AC_DEFINE([DEBUG],[1],[Define to 1 to enable debugging code.])
-      AX_CHECK_LIBRARY([MCHECK],[mcheck.h],[mcheck],[AX_APPEND_LINK_FLAGS([-lmcheck])])
       AX_ADD_AM_MACRO([--debug],[AM_YFLAGS])
       AX_ADD_AM_MACRO([-D_GLIBCXX_DEBUG],[AM_CPPFLAGS])],
       [ax_enable_debug=no
diff --git a/m4/ax_tls.m4 b/m4/ax_tls.m4
new file mode 100644
index 000000000..033e3b135
--- /dev/null
+++ b/m4/ax_tls.m4
@@ -0,0 +1,76 @@
+# ===========================================================================
+#          http://www.gnu.org/software/autoconf-archive/ax_tls.html
+# ===========================================================================
+#
+# SYNOPSIS
+#
+#   AX_TLS([action-if-found], [action-if-not-found])
+#
+# DESCRIPTION
+#
+#   Provides a test for the compiler support of thread local storage (TLS)
+#   extensions. Defines TLS if it is found. Currently knows about GCC/ICC
+#   and MSVC. I think SunPro uses the same as GCC, and Borland apparently
+#   supports either.
+#
+# LICENSE
+#
+#   Copyright (c) 2008 Alan Woodland 
+#   Copyright (c) 2010 Diego Elio Petteno` 
+#
+#   This program is free software: you can redistribute it and/or modify it
+#   under the terms of the GNU General Public License as published by the
+#   Free Software Foundation, either version 3 of the License, or (at your
+#   option) any later version.
+#
+#   This program is distributed in the hope that it will be useful, but
+#   WITHOUT ANY WARRANTY; without even the implied warranty of
+#   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
+#   Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License along
+#   with this program. If not, see .
+#
+#   As a special exception, the respective Autoconf Macro's copyright owner
+#   gives unlimited permission to copy, distribute and modify the configure
+#   scripts that are the output of Autoconf when processing the Macro. You
+#   need not follow the terms of the GNU General Public License when using
+#   or distributing such scripts, even though portions of the text of the
+#   Macro appear in them. The GNU General Public License (GPL) does govern
+#   all other use of the material that constitutes the Autoconf Macro.
+#
+#   This special exception to the GPL applies to versions of the Autoconf
+#   Macro released by the Autoconf Archive. When you make and distribute a
+#   modified version of the Autoconf Macro, you may extend this special
+#   exception to the GPL to apply to your modified version as well.
+
+#serial 10
+
+AC_DEFUN([AX_TLS], [
+  AC_MSG_CHECKING(for thread local storage (TLS) class)
+  AC_CACHE_VAL(ac_cv_tls, [
+    ax_tls_keywords="__thread __declspec(thread) none"
+    for ax_tls_keyword in $ax_tls_keywords; do
+       AS_CASE([$ax_tls_keyword],
+          [none], [ac_cv_tls=none ; break],
+          [AC_TRY_COMPILE(
+              [#include 
+               static void
+               foo(void) {
+               static ] $ax_tls_keyword [ int bar;
+               exit(1);
+               }],
+               [],
+               [ac_cv_tls=$ax_tls_keyword ; break],
+               ac_cv_tls=none
+           )])
+    done
+  ])
+  AC_MSG_RESULT($ac_cv_tls)
+
+  AS_IF([test "$ac_cv_tls" != "none"],
+    AC_DEFINE_UNQUOTED([TLS], $ac_cv_tls, [If the compiler supports a TLS storage class define it to that here])
+      m4_ifnblank([$1], [$1]),
+    m4_ifnblank([$2], [$2])
+  )
+])
diff --git a/mcapi/ctaocrypt_mcapi.X/nbproject/configurations.xml b/mcapi/ctaocrypt_mcapi.X/nbproject/configurations.xml
index 54eef5bf8..e9792ab63 100644
--- a/mcapi/ctaocrypt_mcapi.X/nbproject/configurations.xml
+++ b/mcapi/ctaocrypt_mcapi.X/nbproject/configurations.xml
@@ -167,28 +167,6 @@
         
         
       
-      
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
       
         
       
diff --git a/mcapi/ctaocrypt_test.X/nbproject/configurations.xml b/mcapi/ctaocrypt_test.X/nbproject/configurations.xml
index e0ee5463e..d5b8d3e85 100644
--- a/mcapi/ctaocrypt_test.X/nbproject/configurations.xml
+++ b/mcapi/ctaocrypt_test.X/nbproject/configurations.xml
@@ -184,28 +184,6 @@
         
         
       
-      
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
       
         
       
diff --git a/mcapi/ctaocrypt_test.X/nbproject/include.am b/mcapi/ctaocrypt_test.X/nbproject/include.am
index ec09b769e..dc3d2f9a2 100644
--- a/mcapi/ctaocrypt_test.X/nbproject/include.am
+++ b/mcapi/ctaocrypt_test.X/nbproject/include.am
@@ -3,8 +3,7 @@
 #
 
 EXTRA_DIST += \
-         mcapi/ctaocrypt_test.X/Makefile \
-         mcapi/ctaocrypt_test.X/main.c
+         mcapi/ctaocrypt_test.X/Makefile
 
 EXTRA_DIST += \
          mcapi/ctaocrypt_test.X/nbproject/configurations.xml \
diff --git a/mcapi/cyassl.X/nbproject/include.am b/mcapi/cyassl.X/nbproject/include.am
index 163090026..fc7e8d972 100644
--- a/mcapi/cyassl.X/nbproject/include.am
+++ b/mcapi/cyassl.X/nbproject/include.am
@@ -3,7 +3,6 @@
 #
 
 EXTRA_DIST += \
-         mcapi/README \
          mcapi/cyassl.X/Makefile
 
 EXTRA_DIST += \
diff --git a/mcapi/include.am b/mcapi/include.am
index 7486c0fd5..993ba29c0 100644
--- a/mcapi/include.am
+++ b/mcapi/include.am
@@ -6,9 +6,14 @@ if BUILD_MCAPI
 check_PROGRAMS += mcapi/test
 noinst_PROGRAMS += mcapi/test 
 mcapi_test_SOURCES = mcapi/crypto.c \
-                     mcapi/test.c
+                     mcapi/mcapi_test.c
 mcapi_test_LDADD        = src/libcyassl.la 
 mcapi_test_DEPENDENCIES = src/libcyassl.la
 endif
 
 noinst_HEADERS += mcapi/crypto.h
+
+EXTRA_DIST += \
+         mcapi/README \
+		 mcapi/PIC32MZ-serial.h
+
diff --git a/mcapi/mcapi_test.c b/mcapi/mcapi_test.c
index c22618772..24e69174d 100644
--- a/mcapi/mcapi_test.c
+++ b/mcapi/mcapi_test.c
@@ -53,7 +53,7 @@
     #include 
     #include "PIC32MZ-serial.h"
     #define  SYSTEMConfigPerformance /* void out SYSTEMConfigPerformance(); */
-#else
+#elif defined(MICROCHIP_PIC32)
     #define PIC32_STARTER_KIT
     #include 
     #include 
@@ -61,6 +61,8 @@
     #include 
     #include 
     #define init_serial()  /* void out init_serial() */
+#else
+    #include   /* order matters above ? */
 #endif
 #define OUR_DATA_SIZE 1024
 static byte ourData[OUR_DATA_SIZE];
@@ -93,9 +95,11 @@ int main(int argc, char** argv)
     (void)argc;
     (void)argv;
 
+#if defined(MICROCHIP_PIC32)
     init_serial() ;  /* initialize PIC32MZ serial I/O */
     SYSTEMConfigPerformance(80000000);
     DBINIT();
+#endif
 
     /* align key, iv pointers */
     key = (byte*)XMALLOC(32, NULL, DYNAMIC_TYPE_KEY);
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml b/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
index d1facedfd..13faa6bc4 100644
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
@@ -32,7 +32,7 @@
         PIC32MX795F512L
         
         
-        SKDEPIC32PlatformTool
+        PKOBSKDEPlatformTool
         XC32
         1.30
         3
@@ -166,9 +166,28 @@
         
         
       
-      
-        
-      
+      
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
     
   
 
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/include.am b/mplabx/ctaocrypt_benchmark.X/nbproject/include.am
index 567fbba38..9af74c3b8 100644
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/include.am
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/include.am
@@ -3,8 +3,7 @@
 #
 
 EXTRA_DIST += \
-         mplabx/ctaocrypt_benchmark.X/Makefile \
-         mplabx/ctaocrypt_benchmark.X/main.c
+         mplabx/ctaocrypt_benchmark.X/Makefile
 
 EXTRA_DIST += \
          mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml \
diff --git a/mplabx/ctaocrypt_test.X/nbproject/configurations.xml b/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
index 1aa064df0..7ffe44c26 100644
--- a/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
+++ b/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
@@ -33,7 +33,7 @@
         PIC32MX795F512L
         
         
-        SKDEPIC32PlatformTool
+        PKOBSKDEPlatformTool
         XC32
         1.30
         3
@@ -189,9 +189,6 @@
         
         
       
-      
-        
-      
     
   
 
diff --git a/mplabx/ctaocrypt_test.X/nbproject/include.am b/mplabx/ctaocrypt_test.X/nbproject/include.am
index e7d868de8..ea0df611c 100644
--- a/mplabx/ctaocrypt_test.X/nbproject/include.am
+++ b/mplabx/ctaocrypt_test.X/nbproject/include.am
@@ -3,8 +3,7 @@
 #
 
 EXTRA_DIST += \
-         mplabx/ctaocrypt_test.X/Makefile \
-         mplabx/ctaocrypt_test.X/main.c
+         mplabx/ctaocrypt_test.X/Makefile
 
 EXTRA_DIST += \
          mplabx/ctaocrypt_test.X/nbproject/configurations.xml \
diff --git a/mplabx/cyassl.X/nbproject/configurations.xml b/mplabx/cyassl.X/nbproject/configurations.xml
index 1482f8f65..1a141bb22 100644
--- a/mplabx/cyassl.X/nbproject/configurations.xml
+++ b/mplabx/cyassl.X/nbproject/configurations.xml
@@ -70,7 +70,7 @@
         PIC32MX795F512L
         
         
-        SKDEPIC32PlatformTool
+        PKOBSKDEPlatformTool
         XC32
         1.30
         3
@@ -104,7 +104,7 @@
         
         
         
+                  value="CYASSL_SHA512;CYASSL_SHA384;HAVE_ECC"/>
         
         
         
@@ -181,9 +181,28 @@
         
         
       
-      
-        
-      
+      
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
     
   
 
diff --git a/mplabx/cyassl.X/nbproject/include.am b/mplabx/cyassl.X/nbproject/include.am
index 4db3841b2..7d0b98793 100644
--- a/mplabx/cyassl.X/nbproject/include.am
+++ b/mplabx/cyassl.X/nbproject/include.am
@@ -3,7 +3,6 @@
 #
 
 EXTRA_DIST += \
-         mplabx/README \
          mplabx/cyassl.X/Makefile
 
 EXTRA_DIST += \
diff --git a/mplabx/include.am b/mplabx/include.am
new file mode 100644
index 000000000..b63cdecaa
--- /dev/null
+++ b/mplabx/include.am
@@ -0,0 +1,10 @@
+# vim:ft=automake
+# All paths should be given relative to the root
+#
+
+EXTRA_DIST += \
+         mplabx/PIC32MZ-serial.h \
+		 mplabx/README \
+		 mplabx/benchmark_main.c \
+		 mplabx/test_main.c
+
diff --git a/src/include.am b/src/include.am
index d187ab0d6..e57f0f6fc 100644
--- a/src/include.am
+++ b/src/include.am
@@ -136,3 +136,7 @@ if BUILD_LIBZ
 src_libcyassl_la_SOURCES += ctaocrypt/src/compress.c
 endif
 
+if BUILD_PKCS7
+src_libcyassl_la_SOURCES += ctaocrypt/src/pkcs7.c
+endif
+
diff --git a/src/internal.c b/src/internal.c
index 53e0645ec..0f438dd1b 100644
--- a/src/internal.c
+++ b/src/internal.c
@@ -87,6 +87,13 @@ CYASSL_CALLBACKS needs LARGE_STATIC_BUFFERS, please add LARGE_STATIC_BUFFERS
     #endif
 #endif
 
+
+#ifdef CYASSL_DTLS
+    static INLINE int DtlsCheckWindow(DtlsState* state);
+    static INLINE int DtlsUpdateWindow(DtlsState* state);
+#endif
+
+
 typedef enum {
     doProcessInit = 0,
 #ifndef NO_CYASSL_SERVER
@@ -419,9 +426,6 @@ int InitSSL_Ctx(CYASSL_CTX* ctx, CYASSL_METHOD* method)
     ctx->sendVerify = 0;
     ctx->quietShutdown = 0;
     ctx->groupMessages = 0;
-#ifdef HAVE_OCSP
-    CyaSSL_OCSP_Init(&ctx->ocsp);
-#endif
 #ifdef HAVE_CAVIUM
     ctx->devId = NO_CAVIUM_DEVICE; 
 #endif
@@ -472,9 +476,6 @@ void SSL_CtxResourceFree(CYASSL_CTX* ctx)
     XFREE(ctx->certChain.buffer, ctx->heap, DYNAMIC_TYPE_CERT);
     CyaSSL_CertManagerFree(ctx->cm);
 #endif
-#ifdef HAVE_OCSP
-    CyaSSL_OCSP_Cleanup(&ctx->ocsp);
-#endif
 #ifdef HAVE_TLS_EXTENSIONS
     TLSX_FreeAll(ctx->extensions);
 #endif
@@ -628,8 +629,10 @@ void InitSuites(Suites* suites, ProtocolVersion pv, byte haveRSA, byte havePSK,
     if (suites->setSuites)
         return;      /* trust user settings, don't override */
 
-    if (side == CYASSL_SERVER_END && haveStaticECC)
+    if (side == CYASSL_SERVER_END && haveStaticECC) {
         haveRSA = 0;   /* can't do RSA with ECDSA key */
+        (void)haveRSA; /* some builds won't read */
+    }
 
     if (side == CYASSL_SERVER_END && haveECDSAsig) {
         haveRSAsig = 0;     /* can't have RSA sig if signed by ECDSA */
@@ -643,6 +646,13 @@ void InitSuites(Suites* suites, ProtocolVersion pv, byte haveRSA, byte havePSK,
     }
 #endif
 
+#ifdef HAVE_RENEGOTIATION_INDICATION
+    if (side == CYASSL_CLIENT_END) {
+        suites->suites[idx++] = 0;
+        suites->suites[idx++] = TLS_EMPTY_RENEGOTIATION_INFO_SCSV;
+    }
+#endif
+
 #ifdef BUILD_TLS_NTRU_RSA_WITH_AES_256_CBC_SHA
     if (tls && haveNTRU && haveRSA) {
         suites->suites[idx++] = 0; 
@@ -1271,6 +1281,33 @@ void InitX509(CYASSL_X509* x509, int dynamicFlag)
     x509->altNames       = NULL;
     x509->altNamesNext   = NULL;
     x509->dynamicMemory  = (byte)dynamicFlag;
+    x509->isCa           = 0;
+#ifdef OPENSSL_EXTRA
+    x509->pathLength     = 0;
+    x509->basicConstSet  = 0;
+    x509->basicConstCrit = 0;
+    x509->basicConstPlSet = 0;
+    x509->subjAltNameSet = 0;
+    x509->subjAltNameCrit = 0;
+    x509->authKeyIdSet   = 0;
+    x509->authKeyIdCrit  = 0;
+    x509->authKeyId      = NULL;
+    x509->authKeyIdSz    = 0;
+    x509->subjKeyIdSet   = 0;
+    x509->subjKeyIdCrit  = 0;
+    x509->subjKeyId      = NULL;
+    x509->subjKeyIdSz    = 0;
+    x509->keyUsageSet    = 0;
+    x509->keyUsageCrit   = 0;
+    x509->keyUsage       = 0;
+    #ifdef HAVE_ECC
+        x509->pkCurveOID = 0;
+    #endif /* HAVE_ECC */
+    #ifdef CYASSL_SEP
+        x509->certPolicySet  = 0;
+        x509->certPolicyCrit = 0;
+    #endif /* CYASSL_SEP */
+#endif /* OPENSSL_EXTRA */
 }
 
 
@@ -1286,6 +1323,10 @@ void FreeX509(CYASSL_X509* x509)
         XFREE(x509->pubKey.buffer, NULL, DYNAMIC_TYPE_PUBLIC_KEY);
     XFREE(x509->derCert.buffer, NULL, DYNAMIC_TYPE_SUBJECT_CN);
     XFREE(x509->sig.buffer, NULL, 0);
+    #ifdef OPENSSL_EXTRA
+        XFREE(x509->authKeyId, NULL, 0);
+        XFREE(x509->subjKeyId, NULL, 0);
+    #endif /* OPENSSL_EXTRA */
     if (x509->altNames)
         FreeAltNames(x509->altNames, NULL);
     if (x509->dynamicMemory)
@@ -1390,6 +1431,9 @@ int InitSSL(CYASSL* ssl, CYASSL_CTX* ctx)
 #ifdef CYASSL_DTLS
     ssl->IOCB_CookieCtx = NULL;      /* we don't use for default cb */
     ssl->dtls_expected_rx = MAX_MTU;
+    ssl->keys.dtls_state.window = 0;
+    ssl->keys.dtls_state.nextEpoch = 0;
+    ssl->keys.dtls_state.nextSeq = 0;
 #endif
 
 #ifndef NO_OLD_TLS
@@ -1447,13 +1491,13 @@ int InitSSL(CYASSL* ssl, CYASSL_CTX* ctx)
 
 #ifdef CYASSL_DTLS
     ssl->keys.dtls_sequence_number      = 0;
-    ssl->keys.dtls_peer_sequence_number = 0;
-    ssl->keys.dtls_expected_peer_sequence_number = 0;
+    ssl->keys.dtls_state.curSeq         = 0;
+    ssl->keys.dtls_state.nextSeq        = 0;
     ssl->keys.dtls_handshake_number     = 0;
     ssl->keys.dtls_expected_peer_handshake_number = 0;
     ssl->keys.dtls_epoch                = 0;
-    ssl->keys.dtls_peer_epoch           = 0;
-    ssl->keys.dtls_expected_peer_epoch  = 0;
+    ssl->keys.dtls_state.curEpoch       = 0;
+    ssl->keys.dtls_state.nextEpoch      = 0;
     ssl->dtls_timeout_init              = DTLS_TIMEOUT_INIT;
     ssl->dtls_timeout_max               = DTLS_TIMEOUT_MAX;
     ssl->dtls_timeout                   = ssl->dtls_timeout_init;
@@ -1595,6 +1639,7 @@ int InitSSL(CYASSL* ssl, CYASSL_CTX* ctx)
         CYASSL_MSG("Arrays Memory error");
         return MEMORY_E;
     }
+    XMEMSET(ssl->arrays, 0, sizeof(Arrays));
 
 #ifndef NO_PSK
     ssl->arrays->client_identity[0] = 0;
@@ -2731,9 +2776,9 @@ static int GetRecordHeader(CYASSL* ssl, const byte* input, word32* inOutIdx,
         /* type and version in same sport */
         XMEMCPY(rh, input + *inOutIdx, ENUM_LEN + VERSION_SZ);
         *inOutIdx += ENUM_LEN + VERSION_SZ;
-        ato16(input + *inOutIdx, &ssl->keys.dtls_peer_epoch);
+        ato16(input + *inOutIdx, &ssl->keys.dtls_state.curEpoch);
         *inOutIdx += 4; /* advance past epoch, skip first 2 seq bytes for now */
-        ato32(input + *inOutIdx, &ssl->keys.dtls_peer_sequence_number);
+        ato32(input + *inOutIdx, &ssl->keys.dtls_state.curSeq);
         *inOutIdx += 4;  /* advance past rest of seq */
         ato16(input + *inOutIdx, size);
         *inOutIdx += LENGTH_SZ;
@@ -2754,27 +2799,14 @@ static int GetRecordHeader(CYASSL* ssl, const byte* input, word32* inOutIdx,
             return VERSION_ERROR;              /* only use requested version */
         }
     }
-#if 0
-    /* Instead of this, check the datagram against the sliding window of
-     * received datagram goodness. */
+
 #ifdef CYASSL_DTLS
-    /* If DTLS, check the sequence number against expected. If out of
-     * order, drop the record. Allows newer records in and resets the
-     * expected to the next record. */
     if (ssl->options.dtls) {
-        if ((ssl->keys.dtls_expected_peer_epoch ==
-                                        ssl->keys.dtls_peer_epoch) &&
-                (ssl->keys.dtls_peer_sequence_number >=
-                                ssl->keys.dtls_expected_peer_sequence_number)) {
-            ssl->keys.dtls_expected_peer_sequence_number =
-                            ssl->keys.dtls_peer_sequence_number + 1;
-        }
-        else {
+        if (DtlsCheckWindow(&ssl->keys.dtls_state) != 1)
             return SEQUENCE_ERROR;
-        }
     }
 #endif
-#endif
+
     /* record layer length check */
 #ifdef HAVE_MAX_FRAGMENT
     if (*size > (ssl->max_fragment + MAX_COMP_EXTRA + MAX_MSG_EXTRA))
@@ -3156,6 +3188,51 @@ int CopyDecodedToX509(CYASSL_X509* x509, DecodedCert* dCert)
     dCert->altNames    = NULL;     /* takes ownership */
     x509->altNamesNext = x509->altNames;  /* index hint */
 
+    x509->isCa = dCert->isCA;
+#ifdef OPENSSL_EXTRA
+    x509->pathLength = dCert->pathLength;
+    x509->keyUsage = dCert->extKeyUsage;
+
+    x509->basicConstSet = dCert->extBasicConstSet;
+    x509->basicConstCrit = dCert->extBasicConstCrit;
+    x509->basicConstPlSet = dCert->extBasicConstPlSet;
+    x509->subjAltNameSet = dCert->extSubjAltNameSet;
+    x509->subjAltNameCrit = dCert->extSubjAltNameCrit;
+    x509->authKeyIdSet = dCert->extAuthKeyIdSet;
+    x509->authKeyIdCrit = dCert->extAuthKeyIdCrit;
+    if (dCert->extAuthKeyIdSrc != NULL && dCert->extAuthKeyIdSz != 0) {
+        x509->authKeyId = (byte*)XMALLOC(dCert->extAuthKeyIdSz, NULL, 0);
+        if (x509->authKeyId != NULL) {
+            XMEMCPY(x509->authKeyId,
+                                 dCert->extAuthKeyIdSrc, dCert->extAuthKeyIdSz);
+            x509->authKeyIdSz = dCert->extAuthKeyIdSz;
+        }
+        else
+            ret = MEMORY_E;
+    }
+    x509->subjKeyIdSet = dCert->extSubjKeyIdSet;
+    x509->subjKeyIdCrit = dCert->extSubjKeyIdCrit;
+    if (dCert->extSubjKeyIdSrc != NULL && dCert->extSubjKeyIdSz != 0) {
+        x509->subjKeyId = (byte*)XMALLOC(dCert->extSubjKeyIdSz, NULL, 0);
+        if (x509->subjKeyId != NULL) {
+            XMEMCPY(x509->subjKeyId,
+                                 dCert->extSubjKeyIdSrc, dCert->extSubjKeyIdSz);
+            x509->subjKeyIdSz = dCert->extSubjKeyIdSz;
+        }
+        else
+            ret = MEMORY_E;
+    }
+    x509->keyUsageSet = dCert->extKeyUsageSet;
+    x509->keyUsageCrit = dCert->extKeyUsageCrit;
+    #ifdef HAVE_ECC
+        x509->pkCurveOID = dCert->pkCurveOID;
+    #endif /* HAVE_ECC */
+    #ifdef CYASSL_SEP
+        x509->certPolicySet = dCert->extCertPolicySet;
+        x509->certPolicyCrit = dCert->extCertPolicyCrit;
+    #endif /* CYASSL_SEP */
+#endif /* OPENSSL_EXTRA */
+
     return ret;
 }
 
@@ -3317,8 +3394,8 @@ static int DoCertificate(CYASSL* ssl, byte* input, word32* inOutIdx)
         }
 
 #ifdef HAVE_OCSP
-        if (fatal == 0) {
-            ret = CyaSSL_OCSP_Lookup_Cert(&ssl->ctx->ocsp, &dCert);
+        if (fatal == 0 && ssl->ctx->cm->ocspEnabled) {
+            ret = CheckCertOCSP(ssl->ctx->cm->ocsp, &dCert);
             if (ret != 0) {
                 CYASSL_MSG("\tOCSP Lookup not ok");
                 fatal = 0;
@@ -3331,7 +3408,7 @@ static int DoCertificate(CYASSL* ssl, byte* input, word32* inOutIdx)
             int doCrlLookup = 1;
 
             #ifdef HAVE_OCSP
-            if (ssl->ctx->ocsp.enabled) {
+            if (ssl->ctx->cm->ocspEnabled) {
                 doCrlLookup = (ret == OCSP_CERT_UNKNOWN);
             }
             #endif /* HAVE_OCSP */
@@ -3792,6 +3869,68 @@ static int DoHandShakeMsg(CYASSL* ssl, byte* input, word32* inOutIdx,
 
 
 #ifdef CYASSL_DTLS
+
+static INLINE int DtlsCheckWindow(DtlsState* state)
+{
+    word32 cur;
+    word32 next;
+    DtlsSeq window;
+
+    if (state->curEpoch == state->nextEpoch) {
+        next = state->nextSeq;
+        window = state->window;
+    }
+    else if (state->curEpoch < state->nextEpoch) {
+        next = state->prevSeq;
+        window = state->prevWindow;
+    }
+    else {
+        return 0;
+    }
+
+    cur = state->curSeq;
+
+    if ((next > DTLS_SEQ_BITS) && (cur < next - DTLS_SEQ_BITS)) {
+        return 0;
+    }
+    else if ((cur < next) && (window & (1 << (next - cur - 1)))) {
+        return 0;
+    }
+
+    return 1;
+}
+
+
+static INLINE int DtlsUpdateWindow(DtlsState* state)
+{
+    word32 cur;
+    word32* next;
+    DtlsSeq* window;
+
+    if (state->curEpoch == state->nextEpoch) {
+        next = &state->nextSeq;
+        window = &state->window;
+    }
+    else {
+        next = &state->prevSeq;
+        window = &state->prevWindow;
+    }
+
+    cur = state->curSeq;
+
+    if (cur < *next) {
+        *window |= (1 << (*next - cur - 1));
+    }
+    else {
+        *window <<= (1 + cur - *next);
+        *window |= 1;
+        *next = cur + 1;
+    }
+
+    return 1;
+}
+
+
 static int DtlsMsgDrain(CYASSL* ssl)
 {
     DtlsMsg* item = ssl->dtls_msg_list;
@@ -4191,23 +4330,27 @@ static INLINE int Decrypt(CYASSL* ssl, byte* plain, const byte* input,
 /* check cipher text size for sanity */
 static int SanityCheckCipherText(CYASSL* ssl, word32 encryptSz)
 {
-    word32 minLength = 0;
+#ifdef HAVE_TRUNCATED_HMAC
+    word32 minLength = ssl->truncated_hmac ? TRUNCATED_HMAC_SZ
+                                           : ssl->specs.hash_size;
+#else
+    word32 minLength = ssl->specs.hash_size; /* covers stream */
+#endif
 
     if (ssl->specs.cipher_type == block) {
         if (encryptSz % ssl->specs.block_size) {
             CYASSL_MSG("Block ciphertext not block size");
             return SANITY_CIPHER_E;
         }
-        minLength = ssl->specs.hash_size + 1;  /* pad byte */
+
+        minLength++;  /* pad byte */
+
         if (ssl->specs.block_size > minLength)
             minLength = ssl->specs.block_size;
 
         if (ssl->options.tls1_1)
             minLength += ssl->specs.block_size;  /* explicit IV */
     }
-    else if (ssl->specs.cipher_type == stream) {
-        minLength = ssl->specs.hash_size;
-    }
     else if (ssl->specs.cipher_type == aead) {
         minLength = ssl->specs.block_size; /* explicit IV + implicit IV + CTR */
     }
@@ -4651,7 +4794,12 @@ static INLINE int VerifyMac(CYASSL* ssl, const byte* input, word32 msgSz,
     int    ret;
     word32 pad     = 0;
     word32 padByte = 0;
+#ifdef HAVE_TRUNCATED_HMAC
+    word32 digestSz = ssl->truncated_hmac ? TRUNCATED_HMAC_SZ
+                                          : ssl->specs.hash_size;
+#else
     word32 digestSz = ssl->specs.hash_size;
+#endif
     byte   verify[MAX_DIGEST_SIZE];
 
     if (ssl->specs.cipher_type == block) {
@@ -4803,8 +4951,6 @@ int ProcessReply(CYASSL* ssl)
                                        &ssl->curRL, &ssl->curSize);
 #ifdef CYASSL_DTLS
             if (ssl->options.dtls && ret == SEQUENCE_ERROR) {
-                /* This message is out of order. If we are handshaking, save
-                 *it for later. Otherwise go ahead and process it. */
                 ssl->options.processReply = doProcessInit;
                 ssl->buffers.inputBuffer.length = 0;
                 ssl->buffers.inputBuffer.idx = 0;
@@ -4840,7 +4986,14 @@ int ProcessReply(CYASSL* ssl)
         /* the record layer is here */
         case runProcessingOneMessage:
 
-            if (ssl->keys.encryptionOn && ssl->keys.decryptedCur == 0) {
+            #ifdef CYASSL_DTLS
+            if (ssl->options.dtls &&
+                ssl->keys.dtls_state.curEpoch < ssl->keys.dtls_state.nextEpoch)
+                ssl->keys.decryptedCur = 1;
+            #endif
+
+            if (ssl->keys.encryptionOn && ssl->keys.decryptedCur == 0)
+            {
                 ret = SanityCheckCipherText(ssl, ssl->curSize);
                 if (ret < 0)
                     return ret;
@@ -4890,6 +5043,12 @@ int ProcessReply(CYASSL* ssl)
                 ssl->keys.decryptedCur = 1;
             }
 
+            if (ssl->options.dtls) {
+            #ifdef CYASSL_DTLS
+                DtlsUpdateWindow(&ssl->keys.dtls_state);
+            #endif /* CYASSL_DTLS */
+            }
+
             CYASSL_MSG("received record layer msg");
 
             switch (ssl->curRL.type) {
@@ -4949,8 +5108,8 @@ int ProcessReply(CYASSL* ssl)
                     #ifdef CYASSL_DTLS
                         if (ssl->options.dtls) {
                             DtlsPoolReset(ssl);
-                            ssl->keys.dtls_expected_peer_epoch++;
-                            ssl->keys.dtls_expected_peer_sequence_number = 0;
+                            ssl->keys.dtls_state.nextEpoch++;
+                            ssl->keys.dtls_state.nextSeq = 0;
                         }
                     #endif
 
@@ -5236,7 +5395,12 @@ static void BuildCertHashes(CYASSL* ssl, Hashes* hashes)
 static int BuildMessage(CYASSL* ssl, byte* output, const byte* input, int inSz,
                         int type)
 {
+#ifdef HAVE_TRUNCATED_HMAC
+    word32 digestSz = min(ssl->specs.hash_size,
+                ssl->truncated_hmac ? TRUNCATED_HMAC_SZ : ssl->specs.hash_size);
+#else
     word32 digestSz = ssl->specs.hash_size;
+#endif
     word32 sz = RECORD_HEADER_SZ + inSz + digestSz;                
     word32 pad  = 0, i;
     word32 idx  = RECORD_HEADER_SZ;
@@ -5312,8 +5476,19 @@ static int BuildMessage(CYASSL* ssl, byte* output, const byte* input, int inSz,
 #endif
     }
     else {  
-        if (ssl->specs.cipher_type != aead)
-            ssl->hmac(ssl, output+idx, output + headerSz + ivSz, inSz, type, 0);
+        if (ssl->specs.cipher_type != aead) {
+#ifdef HAVE_TRUNCATED_HMAC
+            if (ssl->truncated_hmac && ssl->specs.hash_size > digestSz) {
+                byte hmac[MAX_DIGEST_SIZE];
+
+                ssl->hmac(ssl, hmac, output + headerSz + ivSz, inSz, type, 0);
+
+                XMEMCPY(output + idx, hmac, digestSz);
+            } else
+#endif
+                ssl->hmac(ssl, output+idx, output + headerSz + ivSz, inSz,
+                                                                       type, 0);
+        }
 
         if ( (ret = Encrypt(ssl, output + headerSz, output+headerSz,size)) != 0)
             return ret;
@@ -7946,7 +8121,7 @@ static void PickHashSigAlgo(CYASSL* ssl,
             case ecc_diffie_hellman_kea:
                 {
                     ecc_key  myKey;
-                    ecc_key* peerKey = &myKey;
+                    ecc_key* peerKey = NULL;
                     word32   size = sizeof(encSecret);
 
                     if (ssl->specs.static_ecdh) {
@@ -7961,6 +8136,9 @@ static void PickHashSigAlgo(CYASSL* ssl,
                         peerKey = ssl->peerEccKey;
                     }
 
+                    if (peerKey == NULL)
+                        return NO_PEER_KEY;
+
                     ecc_init(&myKey);
                     ret = ecc_make_key(ssl->rng, peerKey->dp->size, &myKey);
                     if (ret != 0)
@@ -9130,7 +9308,7 @@ static void PickHashSigAlgo(CYASSL* ssl,
                 return 1;
             break;
 
-#ifndef NO_3DES
+#ifndef NO_DES3
         case TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA :
             if (requirement == REQUIRES_RSA)
                 return 1;
@@ -9159,7 +9337,7 @@ static void PickHashSigAlgo(CYASSL* ssl,
 #endif
 #endif /* NO_RSA */
 
-#ifndef NO_3DES
+#ifndef NO_DES3
         case TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA :
             if (requirement == REQUIRES_ECC_DSA)
                 return 1;
@@ -9715,6 +9893,7 @@ static void PickHashSigAlgo(CYASSL* ssl,
 
         if (clSuites.suiteSz > MAX_SUITE_SZ)
             return BUFFER_ERROR;
+        clSuites.hashSigAlgoSz = 0;
 
         /* session size */
         ato16(&input[idx], &sessionSz);
diff --git a/src/io.c b/src/io.c
index ca620d4ad..55f28eed3 100644
--- a/src/io.c
+++ b/src/io.c
@@ -352,7 +352,7 @@ int EmbedReceiveFrom(CYASSL *ssl, char *buf, int sz, void *ctx)
     int err;
     int sd = dtlsCtx->fd;
     int dtls_timeout = CyaSSL_dtls_get_current_timeout(ssl);
-    struct sockaddr_in6 peer;
+    struct sockaddr_storage peer;
     XSOCKLENT peerSz = sizeof(peer);
 
     CYASSL_ENTER("EmbedReceiveFrom()");
@@ -471,34 +471,21 @@ int EmbedSendTo(CYASSL* ssl, char *buf, int sz, void *ctx)
 int EmbedGenerateCookie(CYASSL* ssl, byte *buf, int sz, void *ctx)
 {
     int sd = ssl->wfd;
-    struct sockaddr_in6 peer;
+    struct sockaddr_storage peer;
     XSOCKLENT peerSz = sizeof(peer);
     Sha sha;
     byte digest[SHA_DIGEST_SIZE];
 
     (void)ctx;
 
+    XMEMSET(&peer, 0, sizeof(peer));
     if (getpeername(sd, (struct sockaddr*)&peer, &peerSz) != 0) {
         CYASSL_MSG("getpeername failed in EmbedGenerateCookie");
         return GEN_COOKIE_E;
     }
     
     InitSha(&sha);
-
-    if (peer.sin6_family == AF_INET6) {
-        ShaUpdate(&sha, (byte*)&peer.sin6_port, sizeof(peer.sin6_port));
-        ShaUpdate(&sha, (byte*)&peer.sin6_addr, sizeof(peer.sin6_addr));
-    }
-    else if (peer.sin6_family == AF_INET) {
-        struct sockaddr_in *s = (struct sockaddr_in*)&peer;
-        ShaUpdate(&sha, (byte*)&s->sin_port, sizeof(s->sin_port));
-        ShaUpdate(&sha, (byte*)&s->sin_addr, sizeof(s->sin_addr));
-    }
-    else {
-        CYASSL_MSG("peer sin_family unknown type in EmbedGenerateCookie");
-        return GEN_COOKIE_E;
-    }
-
+    ShaUpdate(&sha, (byte*)&peer, peerSz);
     ShaFinal(&sha, digest);
 
     if (sz > SHA_DIGEST_SIZE)
@@ -512,52 +499,62 @@ int EmbedGenerateCookie(CYASSL* ssl, byte *buf, int sz, void *ctx)
 
 #ifdef HAVE_OCSP
 
-#ifdef TEST_IPV6
-    typedef struct sockaddr_in6 SOCKADDR_IN_T;
-    #define AF_INET_V    AF_INET6
-#else
-    typedef struct sockaddr_in  SOCKADDR_IN_T;
-    #define AF_INET_V    AF_INET
-#endif
 
-
-static INLINE int tcp_connect(SOCKET_T* sockfd, const char* ip, word16 port)
+static int tcp_connect(SOCKET_T* sockfd, const char* ip, word16 port)
 {
-    SOCKADDR_IN_T addr;
-    const char* host = ip;
+    struct sockaddr_storage addr;
+    int sockaddr_len = sizeof(struct sockaddr_in);
+    XMEMSET(&addr, 0, sizeof(addr));
 
-    /* peer could be in human readable form */
-    if (ip != INADDR_ANY && isalpha(ip[0])) {
+    #ifdef HAVE_GETADDRINFO
+    {
+        struct addrinfo hints;
+        struct addrinfo* answer = NULL;
+        char strPort[8];
+
+        XMEMSET(&hints, 0, sizeof(hints));
+        hints.ai_family = AF_UNSPEC;
+        hints.ai_socktype = SOCK_STREAM;
+        hints.ai_protocol = IPPROTO_TCP;
+
+        XSNPRINTF(strPort, sizeof(strPort), "%d", port);
+        strPort[7] = '\0';
+
+        if (getaddrinfo(ip, strPort, &hints, &answer) < 0 || answer == NULL) {
+            CYASSL_MSG("no addr info for OCSP responder");
+            return -1;
+        }
+
+        sockaddr_len = answer->ai_addrlen;
+        XMEMCPY(&addr, answer->ai_addr, sockaddr_len);
+        freeaddrinfo(answer);
+
+    }
+    #else /* HAVE_GETADDRINFO */
+    {
         struct hostent* entry = gethostbyname(ip);
+        struct sockaddr_in *sin = (struct sockaddr_in *)&addr;
 
         if (entry) {
-            struct sockaddr_in tmp;
-            XMEMSET(&tmp, 0, sizeof(struct sockaddr_in));
-            XMEMCPY(&tmp.sin_addr.s_addr, entry->h_addr_list[0],
-                   entry->h_length);
-            host = inet_ntoa(tmp.sin_addr);
+            sin->sin_family = AF_INET;
+            sin->sin_port = htons(port);
+            XMEMCPY(&sin->sin_addr.s_addr, entry->h_addr_list[0],
+                                                               entry->h_length);
         }
         else {
-            CYASSL_MSG("no addr entry for OCSP responder");
+            CYASSL_MSG("no addr info for OCSP responder");
             return -1;
         }
     }
+    #endif /* HAVE_GETADDRINFO */
 
-    *sockfd = socket(AF_INET_V, SOCK_STREAM, 0);
+    *sockfd = socket(addr.ss_family, SOCK_STREAM, 0);
     if (*sockfd < 0) {
         CYASSL_MSG("bad socket fd, out of fds?");
         return -1;
     }
-    XMEMSET(&addr, 0, sizeof(SOCKADDR_IN_T));
 
-    addr.sin_family = AF_INET_V;
-    addr.sin_port = htons(port);
-    if (host == INADDR_ANY)
-        addr.sin_addr.s_addr = INADDR_ANY;
-    else
-        addr.sin_addr.s_addr = inet_addr(host);
-
-    if (connect(*sockfd, (const struct sockaddr*)&addr, sizeof(addr)) != 0) {
+    if (connect(*sockfd, (struct sockaddr *)&addr, sockaddr_len) != 0) {
         CYASSL_MSG("OCSP responder tcp connect failed");
         return -1;
     }
@@ -597,15 +594,26 @@ static int decode_url(const char* url, int urlSz,
             int i, cur;
     
             /* need to break the url down into scheme, address, and port */
-            /* "http://example.com:8080/" */
+            /*     "http://example.com:8080/" */
+            /*     "http://[::1]:443/"        */
             if (XSTRNCMP(url, "http://", 7) == 0) {
                 cur = 7;
             } else cur = 0;
     
             i = 0;
-            while (url[cur] != 0 && url[cur] != ':' &&
+            if (url[cur] == '[') {
+                cur++;
+                /* copy until ']' */
+                while (url[cur] != 0 && url[cur] != ']' && cur < urlSz) {
+                    outName[i++] = url[cur++];
+                }
+                cur++; /* skip ']' */
+            }
+            else {
+                while (url[cur] != 0 && url[cur] != ':' &&
                                                url[cur] != '/' && cur < urlSz) {
-                outName[i++] = url[cur++];
+                    outName[i++] = url[cur++];
+                }
             }
             outName[i] = 0;
             /* Need to pick out the path after the domain name */
@@ -670,7 +678,7 @@ static int process_http_response(int sfd, byte** respBuf,
             if (result > 0) {
                 len += result;
                 start = (char*)httpBuf;
-                start[len+1] = 0;
+                start[len] = 0;
             }
             else {
                 CYASSL_MSG("process_http_response recv http from peer failed");
@@ -929,27 +937,6 @@ CYASSL_API void* CyaSSL_GetCookieCtx(CYASSL* ssl)
 #endif /* CYASSL_DTLS */
 
 
-#ifdef HAVE_OCSP
-
-CYASSL_API void CyaSSL_SetIOOcsp(CYASSL_CTX* ctx, CallbackIOOcsp cb)
-{
-    ctx->ocsp.CBIOOcsp = cb;
-}
-
-CYASSL_API void CyaSSL_SetIOOcspRespFree(CYASSL_CTX* ctx,
-                                                     CallbackIOOcspRespFree cb)
-{
-    ctx->ocsp.CBIOOcspRespFree = cb;
-}
-
-CYASSL_API void CyaSSL_SetIOOcspCtx(CYASSL_CTX* ctx, void *octx)
-{
-    ctx->ocsp.IOCB_OcspCtx = octx;
-}
-
-#endif
-
-
 #ifdef HAVE_NETX
 
 /* The NetX receive callback
diff --git a/src/ocsp.c b/src/ocsp.c
index 6933e9748..f24fc48b5 100644
--- a/src/ocsp.c
+++ b/src/ocsp.c
@@ -27,55 +27,32 @@
 
 #ifdef HAVE_OCSP
 
-#ifdef EBSNET
-    #include "rtip.h"
-    #include "socket.h"
-#endif
-
 #include 
 #include 
 #include 
-#include 
-
-#include 
-
-#ifndef EBSNET
-    #include 
-    #include 
-    #include 
-    #include 
-    #include 
-    #include 
-    #include 
-    #include 
-    #include 
-#endif
 
 
-CYASSL_API int ocsp_test(unsigned char* buf, int sz);
-#define CYASSL_OCSP_ENABLE       0x0001 /* Enable OCSP lookups */
-#define CYASSL_OCSP_URL_OVERRIDE 0x0002 /* Use the override URL instead of URL
-                                         * in certificate */
-#define CYASSL_OCSP_NO_NONCE     0x0004 /* Disables the request nonce */
-
-typedef struct sockaddr_in  SOCKADDR_IN_T;
-#define AF_INET_V    AF_INET
-#define SOCKET_T unsigned int
-   
-
-int CyaSSL_OCSP_Init(CYASSL_OCSP* ocsp)
+int InitOCSP(CYASSL_OCSP* ocsp, CYASSL_CERT_MANAGER* cm)
 {
-    if (ocsp != NULL) {
-        XMEMSET(ocsp, 0, sizeof(*ocsp));
-        ocsp->useNonce = 1;
-        #ifndef CYASSL_USER_IO
-            ocsp->CBIOOcsp = EmbedOcspLookup;
-            ocsp->CBIOOcspRespFree = EmbedOcspRespFree;
-        #endif
-        return 0;
-    }
+    CYASSL_ENTER("InitOCSP");
+    XMEMSET(ocsp, 0, sizeof(*ocsp));
+    ocsp->cm = cm;
 
-    return -1;
+    return 0;
+}
+
+
+static int InitOCSP_Entry(OCSP_Entry* ocspe, DecodedCert* cert)
+{
+    CYASSL_ENTER("InitOCSP_Entry");
+
+    ocspe->next = NULL;
+    XMEMCPY(ocspe->issuerHash, cert->issuerHash, SHA_DIGEST_SIZE);
+    XMEMCPY(ocspe->issuerKeyHash, cert->issuerKeyHash, SHA_DIGEST_SIZE);
+    ocspe->status = NULL;
+    ocspe->totalStatus = 0;
+
+    return 0;
 }
 
 
@@ -93,45 +70,21 @@ static void FreeOCSP_Entry(OCSP_Entry* ocspe)
 }
 
 
-void CyaSSL_OCSP_Cleanup(CYASSL_OCSP* ocsp)
+void FreeOCSP(CYASSL_OCSP* ocsp, int dynamic)
 {
     OCSP_Entry* tmp = ocsp->ocspList;
 
-    ocsp->enabled = 0;
+    CYASSL_ENTER("FreeOCSP");
+
     while (tmp) {
         OCSP_Entry* next = tmp->next;
         FreeOCSP_Entry(tmp);
         XFREE(tmp, NULL, DYNAMIC_TYPE_OCSP_ENTRY);
         tmp = next;
     }
-}
 
-
-int CyaSSL_OCSP_set_override_url(CYASSL_OCSP* ocsp, const char* url)
-{
-    if (ocsp != NULL) {
-        int urlSz = (int)XSTRLEN(url);
-        if (urlSz < (int)sizeof(ocsp->overrideUrl)) {
-            XSTRNCPY(ocsp->overrideUrl, url, urlSz);
-            return 1;
-        }
-    }
-
-    return 0;
-}
-
-
-static int InitOCSP_Entry(OCSP_Entry* ocspe, DecodedCert* cert)
-{
-    CYASSL_ENTER("InitOCSP_Entry");
-
-    ocspe->next = NULL;
-    XMEMCPY(ocspe->issuerHash, cert->issuerHash, SHA_DIGEST_SIZE);
-    XMEMCPY(ocspe->issuerKeyHash, cert->issuerKeyHash, SHA_DIGEST_SIZE);
-    ocspe->status = NULL;
-    ocspe->totalStatus = 0;
-
-    return 0;
+    if (dynamic)
+        XFREE(ocsp, NULL, DYNAMIC_TYPE_OCSP);
 }
 
 
@@ -224,7 +177,7 @@ static int xstat2err(int stat)
 }
 
 
-int CyaSSL_OCSP_Lookup_Cert(CYASSL_OCSP* ocsp, DecodedCert* cert)
+int CheckCertOCSP(CYASSL_OCSP* ocsp, DecodedCert* cert)
 {
     byte* ocspReqBuf = NULL;
     int ocspReqSz = 2048;
@@ -237,11 +190,7 @@ int CyaSSL_OCSP_Lookup_Cert(CYASSL_OCSP* ocsp, DecodedCert* cert)
     const char *url;
     int urlSz;
 
-    /* If OCSP lookups are disabled, return success. */
-    if (!ocsp->enabled) {
-        CYASSL_MSG("OCSP lookup disabled, assuming CERT_GOOD");
-        return 0;
-    }
+    CYASSL_ENTER("CheckCertOCSP");
 
     ocspe = find_ocsp_entry(ocsp, cert);
     if (ocspe == NULL) {
@@ -275,11 +224,10 @@ int CyaSSL_OCSP_Lookup_Cert(CYASSL_OCSP* ocsp, DecodedCert* cert)
         }
     }
 
-    if (ocsp->useOverrideUrl) {
-        if (ocsp->overrideUrl[0] != '\0') {
-            url = ocsp->overrideUrl;
+    if (ocsp->cm->ocspUseOverrideURL) {
+        url = ocsp->cm->ocspOverrideURL;
+        if (url != NULL && url[0] != '\0')
             urlSz = (int)XSTRLEN(url);
-        }
         else
             return OCSP_NEED_URL;
     }
@@ -297,11 +245,12 @@ int CyaSSL_OCSP_Lookup_Cert(CYASSL_OCSP* ocsp, DecodedCert* cert)
         CYASSL_MSG("\talloc OCSP request buffer failed");
         return MEMORY_ERROR;
     }
-    InitOcspRequest(&ocspRequest, cert, ocsp->useNonce, ocspReqBuf, ocspReqSz);
+    InitOcspRequest(&ocspRequest, cert, ocsp->cm->ocspSendNonce,
+                                                         ocspReqBuf, ocspReqSz);
     ocspReqSz = EncodeOcspRequest(&ocspRequest);
     
-    if (ocsp->CBIOOcsp) {
-        result = ocsp->CBIOOcsp(ocsp->IOCB_OcspCtx, url, urlSz,
+    if (ocsp->cm->ocspIOCb) {
+        result = ocsp->cm->ocspIOCb(ocsp->cm->ocspIOCtx, url, urlSz,
                                           ocspReqBuf, ocspReqSz, &ocspRespBuf);
     }
 
@@ -331,8 +280,8 @@ int CyaSSL_OCSP_Lookup_Cert(CYASSL_OCSP* ocsp, DecodedCert* cert)
     if (ocspReqBuf != NULL) {
         XFREE(ocspReqBuf, NULL, DYNAMIC_TYPE_IN_BUFFER);
     }
-    if (ocspRespBuf != NULL && ocsp->CBIOOcspRespFree) {
-        ocsp->CBIOOcspRespFree(ocsp->IOCB_OcspCtx, ocspRespBuf);
+    if (ocspRespBuf != NULL && ocsp->cm->ocspRespFreeCb) {
+        ocsp->cm->ocspRespFreeCb(ocsp->cm->ocspIOCtx, ocspRespBuf);
     }
 
     return result;
diff --git a/src/sniffer.c b/src/sniffer.c
index 7eb272f87..8e0bff995 100644
--- a/src/sniffer.c
+++ b/src/sniffer.c
@@ -417,6 +417,13 @@ void ssl_FreeSniffer(void)
 
     FreeMutex(&SessionMutex);
     FreeMutex(&ServerListMutex);
+
+    if (TraceFile) {
+        TraceOn = 0;
+        fclose(TraceFile);
+        TraceFile = NULL;
+    }
+
     CyaSSL_Cleanup();
 }
 
diff --git a/src/ssl.c b/src/ssl.c
index f17449376..e12e66f9e 100644
--- a/src/ssl.c
+++ b/src/ssl.c
@@ -568,6 +568,15 @@ word16 CyaSSL_SNI_GetRequest(CYASSL* ssl, byte type, void** data)
     return 0;
 }
 
+int CyaSSL_SNI_GetFromBuffer(const byte* clientHello, word32 helloSz, byte type,
+                                                     byte* sni, word32* inOutSz)
+{
+    if (clientHello && helloSz > 0 && sni && inOutSz && *inOutSz > 0)
+        return TLSX_SNI_GetFromBuffer(clientHello, helloSz, type, sni, inOutSz);
+
+    return BAD_FUNC_ARG;
+}
+
 #endif /* NO_CYASSL_SERVER */
 
 #endif /* HAVE_SNI */
@@ -901,6 +910,15 @@ int CyaSSL_GetKeySize(CYASSL* ssl)
 }
 
 
+int CyaSSL_GetIVSize(CYASSL* ssl)
+{
+    if (ssl)
+        return ssl->specs.iv_size;
+
+    return BAD_FUNC_ARG;
+}
+
+
 int CyaSSL_GetBulkCipher(CYASSL* ssl)
 {
     if (ssl)
@@ -967,8 +985,9 @@ int CyaSSL_GetSide(CYASSL* ssl)
 
 int CyaSSL_GetHmacSize(CYASSL* ssl)
 {
+    /* AEAD ciphers don't have HMAC keys */
     if (ssl)
-        return ssl->specs.hash_size;
+        return (ssl->specs.cipher_type != aead) ? ssl->specs.hash_size : 0;
 
     return BAD_FUNC_ARG;
 }
@@ -986,16 +1005,7 @@ CYASSL_CERT_MANAGER* CyaSSL_CertManagerNew(void)
     cm = (CYASSL_CERT_MANAGER*) XMALLOC(sizeof(CYASSL_CERT_MANAGER), 0,
                                         DYNAMIC_TYPE_CERT_MANAGER);
     if (cm) {
-        int i;
-
-        for (i = 0; i < CA_TABLE_SIZE; i++)
-            cm->caTable[i]  = NULL;
-        cm->heap            = NULL;
-        cm->caCacheCallback = NULL;
-        cm->crl             = NULL;
-        cm->crlEnabled      = 0;
-        cm->crlCheckAll     = 0;
-        cm->cbMissingCRL    = NULL;
+        XMEMSET(cm, 0, sizeof(CYASSL_CERT_MANAGER));
 
         if (InitMutex(&cm->caLock) != 0) {
             CYASSL_MSG("Bad mutex init");
@@ -1017,6 +1027,10 @@ void CyaSSL_CertManagerFree(CYASSL_CERT_MANAGER* cm)
             if (cm->crl) 
                 FreeCRL(cm->crl, 1);
         #endif
+        #ifdef HAVE_OCSP
+            if (cm->ocsp)
+                FreeOCSP(cm->ocsp, 1);
+        #endif
         FreeSignerTable(cm->caTable, CA_TABLE_SIZE, NULL);
         FreeMutex(&cm->caLock);
         XFREE(cm, NULL, DYNAMIC_TYPE_CERT_MANAGER);
@@ -1045,6 +1059,124 @@ int CyaSSL_CertManagerUnloadCAs(CYASSL_CERT_MANAGER* cm)
 }
 
 
+/* Return bytes written to buff or < 0 for error */
+int CyaSSL_CertPemToDer(const unsigned char* pem, int pemSz,
+                        unsigned char* buff, int buffSz,
+                        int type)
+{
+    EncryptedInfo info;
+    int           eccKey = 0;
+    int           ret;
+    buffer        der;
+
+    CYASSL_ENTER("CyaSSL_CertPemToDer");
+
+    if (pem == NULL || buff == NULL || buffSz <= 0) {
+        CYASSL_MSG("Bad pem der args"); 
+        return BAD_FUNC_ARG;
+    }
+
+    if (type != CERT_TYPE && type != CA_TYPE && type != CERTREQ_TYPE) {
+        CYASSL_MSG("Bad cert type"); 
+        return BAD_FUNC_ARG;
+    }
+
+    info.set       = 0;
+    info.ctx      = NULL;
+    info.consumed = 0;
+    der.buffer    = NULL;
+
+    ret = PemToDer(pem, pemSz, type, &der, NULL, &info, &eccKey);
+    if (ret < 0) {
+        CYASSL_MSG("Bad Pem To Der"); 
+    }
+    else {
+        if (der.length <= (word32)buffSz) {
+            XMEMCPY(buff, der.buffer, der.length);
+            ret = der.length;
+        }
+        else {
+            CYASSL_MSG("Bad der length");
+            ret = BAD_FUNC_ARG;
+        }
+    }
+
+    XFREE(der.buffer, NULL, DYNAMIC_TYPE_KEY);
+
+    return ret;
+}
+
+
+/* our KeyPemToDer password callback, password in userData */
+static INLINE int OurPasswordCb(char* passwd, int sz, int rw, void* userdata)
+{
+    (void)rw;
+
+    if (userdata == NULL)
+        return 0;
+
+    XSTRNCPY(passwd, (char*)userdata, sz);
+    return min((word32)sz, (word32)XSTRLEN((char*)userdata));
+}
+
+
+/* Return bytes written to buff or < 0 for error */
+int CyaSSL_KeyPemToDer(const unsigned char* pem, int pemSz, unsigned char* buff,
+                       int buffSz, const char* pass)
+{
+    EncryptedInfo info;
+    int           eccKey = 0;
+    int           ret;
+    buffer        der;
+
+    (void)pass;
+
+    CYASSL_ENTER("CyaSSL_KeyPemToDer");
+
+    if (pem == NULL || buff == NULL || buffSz <= 0) {
+        CYASSL_MSG("Bad pem der args"); 
+        return BAD_FUNC_ARG;
+    }
+
+    info.set       = 0;
+    info.ctx      = NULL;
+    info.consumed = 0;
+    der.buffer    = NULL;
+
+#ifdef OPENSSL_EXTRA
+    if (pass) {
+        info.ctx = CyaSSL_CTX_new(CyaSSLv23_client_method());
+        if (info.ctx == NULL)
+            return MEMORY_E;
+        CyaSSL_CTX_set_default_passwd_cb(info.ctx, OurPasswordCb);
+        CyaSSL_CTX_set_default_passwd_cb_userdata(info.ctx, (void*)pass);
+    }
+#endif
+
+    ret = PemToDer(pem, pemSz, PRIVATEKEY_TYPE, &der, NULL, &info, &eccKey);
+    if (ret < 0) {
+        CYASSL_MSG("Bad Pem To Der"); 
+    }
+    else {
+        if (der.length <= (word32)buffSz) {
+            XMEMCPY(buff, der.buffer, der.length);
+            ret = der.length;
+        }
+        else {
+            CYASSL_MSG("Bad der length");
+            ret = BAD_FUNC_ARG;
+        }
+    }
+
+    XFREE(der.buffer, NULL, DYNAMIC_TYPE_KEY);
+
+    if (info.ctx)
+        CyaSSL_CTX_free(info.ctx);
+
+    return ret;
+}
+
+
 #endif /* !NO_CERTS */
 
 
@@ -1484,6 +1616,7 @@ int CyaSSL_Init(void)
         char* consumedEnd;
         char* bufferEnd = (char*)(buff + longSz);
         long  neededSz;
+        int   ret      = 0;
         int   pkcs8    = 0;
         int   pkcs8Enc = 0;
         int   dynamicType = 0;
@@ -1497,6 +1630,12 @@ int CyaSSL_Init(void)
             XSTRNCPY(footer, "-----END CERTIFICATE-----", sizeof(footer));
             dynamicType = (type == CA_TYPE) ? DYNAMIC_TYPE_CA :
                                               DYNAMIC_TYPE_CERT;
+        } else if (type == CERTREQ_TYPE) {
+            XSTRNCPY(header, "-----BEGIN CERTIFICATE REQUEST-----",
+                     sizeof(header));
+            XSTRNCPY(footer, "-----END CERTIFICATE REQUEST-----",
+                     sizeof(footer));
+            dynamicType = DYNAMIC_TYPE_KEY;
         } else if (type == DH_PARAM_TYPE) {
             XSTRNCPY(header, "-----BEGIN DH PARAMETERS-----", sizeof(header));
             XSTRNCPY(footer, "-----END DH PARAMETERS-----", sizeof(footer));
@@ -1635,8 +1774,15 @@ int CyaSSL_Init(void)
                           &der->length) < 0)
             return SSL_BAD_FILE;
 
-        if (pkcs8)
-            return ToTraditional(der->buffer, der->length);
+        if (pkcs8) {
+            /* convert and adjust length */
+            if ( (ret = ToTraditional(der->buffer, der->length)) < 0 ) {
+                return ret;
+            } else {
+                der->length = ret;
+                return 0;
+            }
+        }
 
 #if defined(OPENSSL_EXTRA) && !defined(NO_PWDBASED)
          if (pkcs8Enc) {
@@ -1647,8 +1793,14 @@ int CyaSSL_Init(void)
                 return SSL_BAD_FILE;  /* no callback error */
             passwordSz = info->ctx->passwd_cb(password, sizeof(password), 0,
                                               info->ctx->userdata);
-            return ToTraditionalEnc(der->buffer, der->length, password,
-                                    passwordSz);
+            /* convert and adjust length */
+            if ( (ret = ToTraditionalEnc(der->buffer, der->length, password,
+                                         passwordSz)) < 0 ) {
+                return ret;
+            } else {
+                der->length = ret;
+                return 0;
+            }
          }
 #endif
 
@@ -1677,6 +1829,7 @@ int CyaSSL_Init(void)
         der.buffer    = 0;
 
         (void)dynamicType;
+        (void)rsaKey;
 
         if (used)
             *used = sz;     /* used bytes default to sz, PEM chain may shorten*/
@@ -1927,7 +2080,8 @@ int CyaSSL_Init(void)
                 }
                 ecc_free(&key);
                 eccKey = 1;
-                ctx->haveStaticECC = 1;
+                if (ctx)
+                    ctx->haveStaticECC = 1;
                 if (ssl)
                     ssl->options.haveStaticECC = 1;
             }
@@ -2399,6 +2553,62 @@ int CyaSSL_CertManagerDisableCRL(CYASSL_CERT_MANAGER* cm)
 }
 
 
+/* turn on OCSP if off and compiled in, set options */
+int CyaSSL_CertManagerEnableOCSP(CYASSL_CERT_MANAGER* cm, int options)
+{
+    int ret = SSL_SUCCESS;
+
+    (void)options;
+
+    CYASSL_ENTER("CyaSSL_CertManagerEnableOCSP");
+    if (cm == NULL)
+        return BAD_FUNC_ARG;
+
+    #ifdef HAVE_OCSP
+        if (cm->ocsp == NULL) {
+            cm->ocsp = (CYASSL_OCSP*)XMALLOC(sizeof(CYASSL_OCSP), cm->heap,
+                                                             DYNAMIC_TYPE_OCSP);
+            if (cm->ocsp == NULL)
+                return MEMORY_E;
+
+            if (InitOCSP(cm->ocsp, cm) != 0) {
+                CYASSL_MSG("Init OCSP failed");
+                FreeOCSP(cm->ocsp, 1);
+                cm->ocsp = NULL;
+                return SSL_FAILURE;
+            }
+        }
+        cm->ocspEnabled = 1;
+        if (options & CYASSL_OCSP_URL_OVERRIDE)
+            cm->ocspUseOverrideURL = 1;
+        if (options & CYASSL_OCSP_NO_NONCE)
+            cm->ocspSendNonce = 0;
+        else
+            cm->ocspSendNonce = 1;
+        #ifndef CYASSL_USER_IO
+            cm->ocspIOCb = EmbedOcspLookup;
+            cm->ocspRespFreeCb = EmbedOcspRespFree;
+        #endif /* CYASSL_USER_IO */
+    #else
+        ret = NOT_COMPILED_IN;
+    #endif
+
+    return ret;
+}
+
+
+int CyaSSL_CertManagerDisableOCSP(CYASSL_CERT_MANAGER* cm)
+{
+    CYASSL_ENTER("CyaSSL_CertManagerDisableOCSP");
+    if (cm == NULL)
+        return BAD_FUNC_ARG;
+
+    cm->ocspEnabled = 0;
+
+    return SSL_SUCCESS;
+}
+
+
 int CyaSSL_CTX_check_private_key(CYASSL_CTX* ctx)
 {
     /* TODO: check private against public for RSA match */
@@ -2561,6 +2771,171 @@ int CyaSSL_CTX_SetCRL_Cb(CYASSL_CTX* ctx, CbMissingCRL cb)
 #endif /* HAVE_CRL */
 
 
+#ifdef HAVE_OCSP
+
+
+/* check CRL if enabled, SSL_SUCCESS  */
+int CyaSSL_CertManagerCheckOCSP(CYASSL_CERT_MANAGER* cm, byte* der, int sz)
+{
+    int         ret;
+    DecodedCert cert;
+
+    CYASSL_ENTER("CyaSSL_CertManagerCheckOCSP");
+
+    if (cm == NULL)
+        return BAD_FUNC_ARG;
+
+    if (cm->ocspEnabled == 0)
+        return SSL_SUCCESS;
+
+    InitDecodedCert(&cert, der, sz, NULL);
+
+    ret = ParseCertRelative(&cert, CERT_TYPE, NO_VERIFY, cm);
+    if (ret != 0) {
+        CYASSL_MSG("ParseCert failed");
+        return ret;
+    }
+    else {
+        ret = CheckCertOCSP(cm->ocsp, &cert);
+        if (ret != 0) {
+            CYASSL_MSG("CheckCertOCSP failed");
+        }
+    }
+
+    FreeDecodedCert(&cert);
+
+    if (ret == 0)
+        return SSL_SUCCESS;  /* convert */
+
+    return ret;
+}
+
+
+int CyaSSL_CertManagerSetOCSPOverrideURL(CYASSL_CERT_MANAGER* cm,
+                                                                const char* url)
+{
+    CYASSL_ENTER("CyaSSL_CertManagerSetOCSPOverrideURL");
+    if (cm == NULL)
+        return BAD_FUNC_ARG;
+
+    XFREE(cm->ocspOverrideURL, cm->heap, 0);
+    if (url != NULL) {
+        int urlSz = (int)XSTRLEN(url) + 1;
+        cm->ocspOverrideURL = (char*)XMALLOC(urlSz, cm->heap, 0);
+        if (cm->ocspOverrideURL != NULL) {
+            XMEMCPY(cm->ocspOverrideURL, url, urlSz);
+        }
+        else
+            return MEMORY_E;
+    }
+    else
+        cm->ocspOverrideURL = NULL;
+
+    return SSL_SUCCESS;
+}
+
+
+int CyaSSL_CertManagerSetOCSP_Cb(CYASSL_CERT_MANAGER* cm,
+                        CbOCSPIO ioCb, CbOCSPRespFree respFreeCb, void* ioCbCtx)
+{
+    CYASSL_ENTER("CyaSSL_CertManagerSetOCSP_Cb");
+    if (cm == NULL)
+        return BAD_FUNC_ARG;
+
+    cm->ocspIOCb = ioCb;
+    cm->ocspRespFreeCb = respFreeCb;
+    cm->ocspIOCtx = ioCbCtx;
+
+    return SSL_SUCCESS;
+}
+
+
+int CyaSSL_EnableOCSP(CYASSL* ssl, int options)
+{
+    CYASSL_ENTER("CyaSSL_EnableOCSP");
+    if (ssl)
+        return CyaSSL_CertManagerEnableOCSP(ssl->ctx->cm, options);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+int CyaSSL_DisableOCSP(CYASSL* ssl)
+{
+    CYASSL_ENTER("CyaSSL_DisableOCSP");
+    if (ssl)
+        return CyaSSL_CertManagerDisableOCSP(ssl->ctx->cm);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+int CyaSSL_SetOCSP_OverrideURL(CYASSL* ssl, const char* url)
+{
+    CYASSL_ENTER("CyaSSL_SetOCSP_OverrideURL");
+    if (ssl)
+        return CyaSSL_CertManagerSetOCSPOverrideURL(ssl->ctx->cm, url);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+int CyaSSL_SetOCSP_Cb(CYASSL* ssl,
+                        CbOCSPIO ioCb, CbOCSPRespFree respFreeCb, void* ioCbCtx)
+{
+    CYASSL_ENTER("CyaSSL_SetOCSP_Cb");
+    if (ssl)
+        return CyaSSL_CertManagerSetOCSP_Cb(ssl->ctx->cm,
+                                                     ioCb, respFreeCb, ioCbCtx);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+int CyaSSL_CTX_EnableOCSP(CYASSL_CTX* ctx, int options)
+{
+    CYASSL_ENTER("CyaSSL_CTX_EnableOCSP");
+    if (ctx)
+        return CyaSSL_CertManagerEnableOCSP(ctx->cm, options);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+int CyaSSL_CTX_DisableOCSP(CYASSL_CTX* ctx)
+{
+    CYASSL_ENTER("CyaSSL_CTX_DisableOCSP");
+    if (ctx)
+        return CyaSSL_CertManagerDisableOCSP(ctx->cm);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+int CyaSSL_CTX_SetOCSP_OverrideURL(CYASSL_CTX* ctx, const char* url)
+{
+    CYASSL_ENTER("CyaSSL_SetOCSP_OverrideURL");
+    if (ctx)
+        return CyaSSL_CertManagerSetOCSPOverrideURL(ctx->cm, url);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+int CyaSSL_CTX_SetOCSP_Cb(CYASSL_CTX* ctx,
+                        CbOCSPIO ioCb, CbOCSPRespFree respFreeCb, void* ioCbCtx)
+{
+    CYASSL_ENTER("CyaSSL_CTX_SetOCSP_Cb");
+    if (ctx)
+        return CyaSSL_CertManagerSetOCSP_Cb(ctx->cm, ioCb, respFreeCb, ioCbCtx);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+#endif /* HAVE_OCSP */
+
+
 #ifdef CYASSL_DER_LOAD
 
 /* Add format parameter to allow DER load of CA files */
@@ -7048,28 +7423,170 @@ int CyaSSL_set_compression(CYASSL* ssl)
     }
 
 
-    /* copy name into in buffer, at most sz bytes, if buffer is null will
-       malloc buffer, call responsible for freeing                     */
-    char* CyaSSL_X509_NAME_oneline(CYASSL_X509_NAME* name, char* in, int sz)
+    int CyaSSL_X509_get_isCA(CYASSL_X509* x509)
     {
-        int copySz = min(sz, name->sz);
+        int isCA = 0;
 
-        CYASSL_ENTER("CyaSSL_X509_NAME_oneline");
-        if (!name->sz) return in;
+        CYASSL_ENTER("CyaSSL_X509_get_isCA");
 
-        if (!in) {
-            in = (char*)XMALLOC(name->sz, 0, DYNAMIC_TYPE_OPENSSL);
-            if (!in ) return in;
-            copySz = name->sz;
+        if (x509 != NULL)
+            isCA = x509->isCa;
+
+        CYASSL_LEAVE("CyaSSL_X509_get_isCA", isCA);
+
+        return isCA;
+    }
+
+
+#ifdef OPENSSL_EXTRA
+    int CyaSSL_X509_ext_isSet_by_NID(CYASSL_X509* x509, int nid)
+    {
+        int isSet = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_ext_isSet_by_NID");
+
+        if (x509 != NULL) {
+            switch (nid) {
+                case BASIC_CA_OID: isSet = x509->basicConstSet; break;
+                case ALT_NAMES_OID: isSet = x509->subjAltNameSet; break;
+                case AUTH_KEY_OID: isSet = x509->authKeyIdSet; break;
+                case SUBJ_KEY_OID: isSet = x509->subjKeyIdSet; break;
+                case KEY_USAGE_OID: isSet = x509->keyUsageSet; break;
+                #ifdef CYASSL_SEP
+                    case CERT_POLICY_OID: isSet = x509->certPolicySet; break;
+                #endif /* CYASSL_SEP */
+            }
         }
 
-        if (copySz == 0)
-            return in;
+        CYASSL_LEAVE("CyaSSL_X509_ext_isSet_by_NID", isSet);
 
-        XMEMCPY(in, name->name, copySz - 1);
-        in[copySz - 1] = 0;
+        return isSet;
+    }
 
-        return in;
+
+    int CyaSSL_X509_ext_get_critical_by_NID(CYASSL_X509* x509, int nid)
+    {
+        int crit = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_ext_get_critical_by_NID");
+
+        if (x509 != NULL) {
+            switch (nid) {
+                case BASIC_CA_OID: crit = x509->basicConstCrit; break;
+                case ALT_NAMES_OID: crit = x509->subjAltNameCrit; break;
+                case AUTH_KEY_OID: crit = x509->authKeyIdCrit; break;
+                case SUBJ_KEY_OID: crit = x509->subjKeyIdCrit; break;
+                case KEY_USAGE_OID: crit = x509->keyUsageCrit; break;
+                #ifdef CYASSL_SEP
+                    case CERT_POLICY_OID: crit = x509->certPolicyCrit; break;
+                #endif /* CYASSL_SEP */
+            }
+        }
+
+        CYASSL_LEAVE("CyaSSL_X509_ext_get_critical_by_NID", crit);
+
+        return crit;
+    }
+
+
+    int CyaSSL_X509_get_isSet_pathLength(CYASSL_X509* x509)
+    {
+        int isSet = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_get_isSet_pathLength");
+
+        if (x509 != NULL)
+            isSet = x509->basicConstPlSet;
+
+        CYASSL_LEAVE("CyaSSL_X509_get_isSet_pathLength", isSet);
+
+        return isSet;
+    }
+
+
+    word32 CyaSSL_X509_get_pathLength(CYASSL_X509* x509)
+    {
+        word32 pathLength = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_get_pathLength");
+
+        if (x509 != NULL)
+            pathLength = x509->pathLength;
+
+        CYASSL_LEAVE("CyaSSL_X509_get_pathLength", pathLength);
+
+        return pathLength;
+    }
+
+
+    unsigned int CyaSSL_X509_get_keyUsage(CYASSL_X509* x509)
+    {
+        word16 usage = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_get_keyUsage");
+
+        if (x509 != NULL)
+            usage = x509->keyUsage;
+
+        CYASSL_LEAVE("CyaSSL_X509_get_keyUsage", usage);
+
+        return usage;
+    }
+
+
+    byte* CyaSSL_X509_get_authorityKeyID(
+                                      CYASSL_X509* x509, byte* dst, int* dstLen)
+    {
+        byte *id = NULL;
+        int copySz = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_get_authorityKeyID");
+
+        if (x509 != NULL) {
+            if (x509->authKeyIdSet) {
+                copySz = min(dstLen != NULL ? *dstLen : 0,
+                                                        (int)x509->authKeyIdSz);
+                id = x509->authKeyId;
+            }
+
+            if (dst != NULL && dstLen != NULL && id != NULL && copySz > 0) {
+                XMEMCPY(dst, id, copySz);
+                id = dst;
+                *dstLen = copySz;
+            }
+        }
+
+        CYASSL_LEAVE("CyaSSL_X509_get_authorityKeyID", copySz);
+
+        return id;
+    }
+
+
+    byte* CyaSSL_X509_get_subjectKeyID(
+                                      CYASSL_X509* x509, byte* dst, int* dstLen)
+    {
+        byte *id = NULL;
+        int copySz = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_get_subjectKeyID");
+
+        if (x509 != NULL) {
+            if (x509->subjKeyIdSet) {
+                copySz = min(dstLen != NULL ? *dstLen : 0,
+                                                        (int)x509->subjKeyIdSz);
+                id = x509->subjKeyId;
+            }
+
+            if (dst != NULL && dstLen != NULL && id != NULL && copySz > 0) {
+                XMEMCPY(dst, id, copySz);
+                id = dst;
+                *dstLen = copySz;
+            }
+        }
+
+        CYASSL_LEAVE("CyaSSL_X509_get_subjectKeyID", copySz);
+
+        return id;
     }
 
 
@@ -7141,6 +7658,32 @@ int CyaSSL_set_compression(CYASSL* ssl)
         CYASSL_LEAVE("CyaSSL_X509_NAME_get_text_by_NID", textSz);
         return textSz;
     }
+#endif
+
+
+    /* copy name into in buffer, at most sz bytes, if buffer is null will
+       malloc buffer, call responsible for freeing                     */
+    char* CyaSSL_X509_NAME_oneline(CYASSL_X509_NAME* name, char* in, int sz)
+    {
+        int copySz = min(sz, name->sz);
+
+        CYASSL_ENTER("CyaSSL_X509_NAME_oneline");
+        if (!name->sz) return in;
+
+        if (!in) {
+            in = (char*)XMALLOC(name->sz, 0, DYNAMIC_TYPE_OPENSSL);
+            if (!in ) return in;
+            copySz = name->sz;
+        }
+
+        if (copySz == 0)
+            return in;
+
+        XMEMCPY(in, name->name, copySz - 1);
+        in[copySz - 1] = 0;
+
+        return in;
+    }
 
 
     int CyaSSL_X509_get_signature_type(CYASSL_X509* x509)
@@ -7340,6 +7883,8 @@ CYASSL_X509* CyaSSL_X509_d2i(CYASSL_X509** x509, const byte* in, int len)
 }
 
 
+#ifndef NO_FILESYSTEM
+
 CYASSL_X509* CyaSSL_X509_d2i_fp(CYASSL_X509** x509, XFILE file)
 {
     CYASSL_X509* newX509 = NULL;
@@ -7463,6 +8008,7 @@ CYASSL_X509* CyaSSL_X509_load_certificate_file(const char* fname, int format)
     return x509;
 }
 
+#endif /* NO_FILESYSTEM */
 
 #endif /* KEEP_PEER_CERT || SESSION_CERTS */
 
@@ -8329,6 +8875,9 @@ CYASSL_X509* CyaSSL_X509_load_certificate_file(const char* fname, int format)
                 XMEMCPY(key->pkey.ptr,
                                       x509->pubKey.buffer, x509->pubKey.length);
                 key->pkey_sz = x509->pubKey.length;
+                #ifdef HAVE_ECC
+                    key->pkey_curve = (int)x509->pkCurveOID;
+                #endif /* HAVE_ECC */
             }
         }
         return key;
@@ -10430,49 +10979,6 @@ static int initGlobalRNG = 0;
 
 
 
-/* Return bytes written to buff or < 0 for error */
-int CyaSSL_KeyPemToDer(const unsigned char* pem, int pemSz, unsigned char* buff,
-                       int buffSz, const char* pass)
-{
-    EncryptedInfo info;
-    int           eccKey = 0;
-    int           ret;
-    buffer        der;
-
-    (void)pass;
-
-    CYASSL_ENTER("CyaSSL_KeyPemToDer");
-
-    if (pem == NULL || buff == NULL || buffSz <= 0) {
-        CYASSL_MSG("Bad pem der args"); 
-        return BAD_FUNC_ARG;
-    }
-
-    info.set       = 0;
-    info.ctx      = NULL;
-    info.consumed = 0;
-    der.buffer    = NULL;
-
-    ret = PemToDer(pem, pemSz, PRIVATEKEY_TYPE, &der, NULL, &info, &eccKey);
-    if (ret < 0) {
-        CYASSL_MSG("Bad Pem To Der"); 
-    }
-    else {
-        if (der.length <= (word32)buffSz) {
-            XMEMCPY(buff, der.buffer, der.length);
-            ret = der.length;
-        }
-        else {
-            CYASSL_MSG("Bad der length");
-            ret = BAD_FUNC_ARG;
-        }
-    }
-
-    XFREE(der.buffer, NULL, DYNAMIC_TYPE_KEY);
-
-    return ret;
-}
-
 
 /* Load RSA from Der, SSL_SUCCESS on success < 0 on error */
 int CyaSSL_RSA_LoadDer(CYASSL_RSA* rsa, const unsigned char* der,  int derSz)
@@ -10685,38 +11191,6 @@ const byte* CyaSSL_get_sessionID(const CYASSL_SESSION* session)
 #endif /* SESSION_CERTS */
 
 
-int CyaSSL_CTX_OCSP_set_options(CYASSL_CTX* ctx, int options)
-{
-    CYASSL_ENTER("CyaSSL_CTX_OCSP_set_options");
-#ifdef HAVE_OCSP
-    if (ctx != NULL) {
-        ctx->ocsp.enabled = (options & CYASSL_OCSP_ENABLE) != 0;
-        ctx->ocsp.useOverrideUrl = (options & CYASSL_OCSP_URL_OVERRIDE) != 0;
-        ctx->ocsp.useNonce = (options & CYASSL_OCSP_NO_NONCE) == 0;
-        return SSL_SUCCESS;
-    }
-    return SSL_FAILURE;
-#else
-    (void)ctx;
-    (void)options;
-    return NOT_COMPILED_IN;
-#endif
-}
-
-
-int CyaSSL_CTX_OCSP_set_override_url(CYASSL_CTX* ctx, const char* url)
-{
-    CYASSL_ENTER("CyaSSL_CTX_OCSP_set_override_url");
-#ifdef HAVE_OCSP
-    return CyaSSL_OCSP_set_override_url(&ctx->ocsp, url);
-#else
-    (void)ctx;
-    (void)url;
-    return NOT_COMPILED_IN;
-#endif
-}
-
-
 #ifndef NO_CERTS
 #ifdef  HAVE_PK_CALLBACKS
 
@@ -10866,3 +11340,9 @@ void* CyaSSL_GetRsaDecCtx(CYASSL* ssl)
 #endif /* HAVE_PK_CALLBACKS */
 #endif /* NO_CERTS */
 
+
+#ifdef CYASSL_HAVE_WOLFSCEP
+    /* Used by autoconf to see if wolfSCEP is available */
+    void CyaSSL_wolfSCEP(void) {}
+#endif
+
diff --git a/src/tls.c b/src/tls.c
index 878e2e003..482271ba6 100644
--- a/src/tls.c
+++ b/src/tls.c
@@ -376,6 +376,14 @@ static INLINE void ato16(const byte* c, word16* u16)
 {
     *u16 = (c[0] << 8) | (c[1]);
 }
+
+#ifdef HAVE_SNI
+/* convert a 24 bit integer into a 32 bit one */
+static INLINE void c24to32(const word24 u24, word32* u32)
+{
+    *u32 = (u24[0] << 16) | (u24[1] << 8) | u24[2];
+}
+#endif
 #endif
 
 /* convert 32 bit integer to opaque */
@@ -393,7 +401,7 @@ static INLINE word32 GetSEQIncrement(CYASSL* ssl, int verify)
 #ifdef CYASSL_DTLS
     if (ssl->options.dtls) {
         if (verify)
-            return ssl->keys.dtls_peer_sequence_number; /* explicit from peer */
+            return ssl->keys.dtls_state.curSeq; /* explicit from peer */
         else
             return ssl->keys.dtls_sequence_number - 1; /* already incremented */
     }
@@ -410,9 +418,9 @@ static INLINE word32 GetSEQIncrement(CYASSL* ssl, int verify)
 static INLINE word32 GetEpoch(CYASSL* ssl, int verify)
 {
     if (verify)
-        return ssl->keys.dtls_peer_epoch; 
+        return ssl->keys.dtls_state.curEpoch;
     else
-        return ssl->keys.dtls_epoch; 
+        return ssl->keys.dtls_epoch;
 }
 
 #endif /* CYASSL_DTLS */
@@ -854,6 +862,135 @@ void TLSX_SNI_SetOptions(TLSX* extensions, byte type, byte options)
     if (sni)
         sni->options = options;
 }
+
+int TLSX_SNI_GetFromBuffer(const byte* clientHello, word32 helloSz,
+                           byte type, byte* sni, word32* inOutSz)
+{
+    word32 offset = 0;
+    word32 len32  = 0;
+    word16 len16  = 0;
+
+    if (helloSz < RECORD_HEADER_SZ + HANDSHAKE_HEADER_SZ + CLIENT_HELLO_FIRST)
+        return INCOMPLETE_DATA;
+
+    /* TLS record header */
+    if ((enum ContentType) clientHello[offset++] != handshake)
+        return BUFFER_ERROR;
+
+    if (clientHello[offset++] != SSLv3_MAJOR)
+        return BUFFER_ERROR;
+
+    if (clientHello[offset++] < TLSv1_MINOR)
+        return BUFFER_ERROR;
+
+    ato16(clientHello + offset, &len16);
+    offset += OPAQUE16_LEN;
+
+    if (offset + len16 > helloSz)
+        return INCOMPLETE_DATA;
+
+    /* Handshake header */
+    if ((enum HandShakeType) clientHello[offset] != client_hello)
+        return BUFFER_ERROR;
+
+    c24to32(clientHello + offset + 1, &len32);
+    offset += HANDSHAKE_HEADER_SZ;
+
+    if (offset + len32 > helloSz)
+        return INCOMPLETE_DATA;
+
+    /* client hello */
+    offset += VERSION_SZ + RAN_LEN; /* version, random */
+
+    if (helloSz < offset + clientHello[offset])
+        return INCOMPLETE_DATA;
+
+    offset += ENUM_LEN + clientHello[offset]; /* skip session id */
+
+    /* cypher suites */
+    if (helloSz < offset + OPAQUE16_LEN)
+        return INCOMPLETE_DATA;
+
+    ato16(clientHello + offset, &len16);
+    offset += OPAQUE16_LEN;
+
+    if (helloSz < offset + len16)
+        return INCOMPLETE_DATA;
+
+    offset += len16; /* skip cypher suites */
+
+    /* compression methods */
+    if (helloSz < offset + 1)
+        return INCOMPLETE_DATA;
+
+    if (helloSz < offset + clientHello[offset])
+        return INCOMPLETE_DATA;
+
+    offset += ENUM_LEN + clientHello[offset]; /* skip compression methods */
+
+    /* extensions */
+    if (helloSz < offset + OPAQUE16_LEN)
+        return 0; /* no extensions in client hello. */
+
+    ato16(clientHello + offset, &len16);
+    offset += OPAQUE16_LEN;
+
+    if (helloSz < offset + len16)
+        return INCOMPLETE_DATA;
+
+    while (len16 > OPAQUE16_LEN + OPAQUE16_LEN) {
+        word16 extType;
+        word16 extLen;
+
+        ato16(clientHello + offset, &extType);
+        offset += OPAQUE16_LEN;
+
+        ato16(clientHello + offset, &extLen);
+        offset += OPAQUE16_LEN;
+
+        if (helloSz < offset + extLen)
+            return INCOMPLETE_DATA;
+
+        if (extType != SERVER_NAME_INDICATION) {
+            offset += extLen; /* skip extension */
+        } else {
+            word16 listLen;
+
+            ato16(clientHello + offset, &listLen);
+            offset += OPAQUE16_LEN;
+
+            if (helloSz < offset + listLen)
+                return INCOMPLETE_DATA;
+
+            while (listLen > ENUM_LEN + OPAQUE16_LEN) {
+                byte   sniType = clientHello[offset++];
+                word16 sniLen;
+
+                ato16(clientHello + offset, &sniLen);
+                offset += OPAQUE16_LEN;
+
+                if (helloSz < offset + sniLen)
+                    return INCOMPLETE_DATA;
+
+                if (sniType != type) {
+                    offset  += sniLen;
+                    listLen -= min(ENUM_LEN + OPAQUE16_LEN + sniLen, listLen);
+                    continue;
+                }
+
+                *inOutSz = min(sniLen, *inOutSz);
+                XMEMCPY(sni, clientHello + offset, *inOutSz);
+
+                return SSL_SUCCESS;
+            }
+        }
+
+        len16 -= min(2 * OPAQUE16_LEN + extLen, len16);
+    }
+
+    return len16 ? BUFFER_ERROR : SSL_SUCCESS;
+}
+
 #endif
 
 #define SNI_FREE_ALL TLSX_SNI_FreeAll
@@ -1004,9 +1141,6 @@ static int TLSX_THM_Parse(CYASSL* ssl, byte* input, word16 length,
 
     ssl->truncated_hmac = 1;
 
-#error "TRUNCATED HMAC IS NOT FINISHED YET \
-(contact moises@wolfssl.com for more info)"
-
     return 0;
 }
 
diff --git a/sslSniffer/sslSnifferTest/include.am b/sslSniffer/sslSnifferTest/include.am
index 44349f976..d4c90accc 100644
--- a/sslSniffer/sslSnifferTest/include.am
+++ b/sslSniffer/sslSnifferTest/include.am
@@ -2,7 +2,7 @@
 # included from Top Level Makefile.am
 # All paths should be given relative to the root
 
-if BUILD_SNIFFER
+if BUILD_SNIFFTEST
 noinst_PROGRAMS += sslSniffer/sslSnifferTest/snifftest
 sslSniffer_sslSnifferTest_snifftest_SOURCES = sslSniffer/sslSnifferTest/snifftest.c
 sslSniffer_sslSnifferTest_snifftest_LDADD        = src/libcyassl.la -lpcap
diff --git a/sslSniffer/sslSnifferTest/snifftest.c b/sslSniffer/sslSnifferTest/snifftest.c
index 7d5a7561e..2570a65bc 100755
--- a/sslSniffer/sslSnifferTest/snifftest.c
+++ b/sslSniffer/sslSnifferTest/snifftest.c
@@ -69,18 +69,25 @@ enum {
 };
 
 
-pcap_t* pcap = 0;
-pcap_if_t *alldevs;
+pcap_t* pcap = NULL;
+pcap_if_t* alldevs = NULL;
+
+
+static void FreeAll(void)
+{
+    if (pcap)
+        pcap_close(pcap);
+    if (alldevs)
+        pcap_freealldevs(alldevs);
+#ifndef _WIN32
+    ssl_FreeSniffer();
+#endif
+}
 
 static void sig_handler(const int sig) 
 {
     printf("SIGINT handled = %d.\n", sig);
-    if (pcap)
-        pcap_close(pcap);
-	pcap_freealldevs(alldevs);
-#ifndef _WIN32
-    ssl_FreeSniffer();
-#endif
+    FreeAll();
     if (sig)
         exit(EXIT_SUCCESS);
 }
@@ -286,6 +293,7 @@ int main(int argc, char** argv)
         else if (saveFile)
             break;      /* we're done reading file */
     }
+    FreeAll();
 
     return EXIT_SUCCESS;
 }
diff --git a/tests/api.c b/tests/api.c
index ecd89a5ba..3dadad7a1 100644
--- a/tests/api.c
+++ b/tests/api.c
@@ -332,6 +332,88 @@ static void verify_SNI_fake_matching(CYASSL* ssl)
     AssertStrEQ(name, request);
 }
 
+static void test_CyaSSL_SNI_GetFromBuffer(void)
+{
+    byte buffer[] = { /* www.paypal.com */
+        0x00, 0x00, 0x00, 0x00, 0xff, 0x01, 0x00, 0x00, 0x60, 0x03, 0x03, 0x5c,
+        0xc4, 0xb3, 0x8c, 0x87, 0xef, 0xa4, 0x09, 0xe0, 0x02, 0xab, 0x86, 0xca,
+        0x76, 0xf0, 0x9e, 0x01, 0x65, 0xf6, 0xa6, 0x06, 0x13, 0x1d, 0x0f, 0xa5,
+        0x79, 0xb0, 0xd4, 0x77, 0x22, 0xeb, 0x1a, 0x00, 0x00, 0x16, 0x00, 0x6b,
+        0x00, 0x67, 0x00, 0x39, 0x00, 0x33, 0x00, 0x3d, 0x00, 0x3c, 0x00, 0x35,
+        0x00, 0x2f, 0x00, 0x05, 0x00, 0x04, 0x00, 0x0a, 0x01, 0x00, 0x00, 0x21,
+        0x00, 0x00, 0x00, 0x13, 0x00, 0x11, 0x00, 0x00, 0x0e, 0x77, 0x77, 0x77,
+        0x2e, 0x70, 0x61, 0x79, 0x70, 0x61, 0x6c, 0x2e, 0x63, 0x6f, 0x6d, 0x00,
+        0x0d, 0x00, 0x06, 0x00, 0x04, 0x04, 0x01, 0x02, 0x01
+    };
+
+    byte buffer2[] = { /* api.textmate.org */
+        0x16, 0x03, 0x01, 0x00, 0xc6, 0x01, 0x00, 0x00, 0xc2, 0x03, 0x03, 0x52,
+        0x8b, 0x7b, 0xca, 0x69, 0xec, 0x97, 0xd5, 0x08, 0x03, 0x50, 0xfe, 0x3b,
+        0x99, 0xc3, 0x20, 0xce, 0xa5, 0xf6, 0x99, 0xa5, 0x71, 0xf9, 0x57, 0x7f,
+        0x04, 0x38, 0xf6, 0x11, 0x0b, 0xb8, 0xd3, 0x00, 0x00, 0x5e, 0x00, 0xff,
+        0xc0, 0x24, 0xc0, 0x23, 0xc0, 0x0a, 0xc0, 0x09, 0xc0, 0x07, 0xc0, 0x08,
+        0xc0, 0x28, 0xc0, 0x27, 0xc0, 0x14, 0xc0, 0x13, 0xc0, 0x11, 0xc0, 0x12,
+        0xc0, 0x26, 0xc0, 0x25, 0xc0, 0x2a, 0xc0, 0x29, 0xc0, 0x05, 0xc0, 0x04,
+        0xc0, 0x02, 0xc0, 0x03, 0xc0, 0x0f, 0xc0, 0x0e, 0xc0, 0x0c, 0xc0, 0x0d,
+        0x00, 0x3d, 0x00, 0x3c, 0x00, 0x2f, 0x00, 0x05, 0x00, 0x04, 0x00, 0x35,
+        0x00, 0x0a, 0x00, 0x67, 0x00, 0x6b, 0x00, 0x33, 0x00, 0x39, 0x00, 0x16,
+        0x00, 0xaf, 0x00, 0xae, 0x00, 0x8d, 0x00, 0x8c, 0x00, 0x8a, 0x00, 0x8b,
+        0x00, 0xb1, 0x00, 0xb0, 0x00, 0x2c, 0x00, 0x3b, 0x01, 0x00, 0x00, 0x3b,
+        0x00, 0x00, 0x00, 0x15, 0x00, 0x13, 0x00, 0x00, 0x10, 0x61, 0x70, 0x69,
+        0x2e, 0x74, 0x65, 0x78, 0x74, 0x6d, 0x61, 0x74, 0x65, 0x2e, 0x6f, 0x72,
+        0x67, 0x00, 0x0a, 0x00, 0x08, 0x00, 0x06, 0x00, 0x17, 0x00, 0x18, 0x00,
+        0x19, 0x00, 0x0b, 0x00, 0x02, 0x01, 0x00, 0x00, 0x0d, 0x00, 0x0c, 0x00,
+        0x0a, 0x05, 0x01, 0x04, 0x01, 0x02, 0x01, 0x04, 0x03, 0x02, 0x03
+    };
+
+    byte buffer3[] = { /* no sni extension */
+        0x16, 0x03, 0x03, 0x00, 0x4d, 0x01, 0x00, 0x00, 0x49, 0x03, 0x03, 0xea,
+        0xa1, 0x9f, 0x60, 0xdd, 0x52, 0x12, 0x13, 0xbd, 0x84, 0x34, 0xd5, 0x1c,
+        0x38, 0x25, 0xa8, 0x97, 0xd2, 0xd5, 0xc6, 0x45, 0xaf, 0x1b, 0x08, 0xe4,
+        0x1e, 0xbb, 0xdf, 0x9d, 0x39, 0xf0, 0x65, 0x00, 0x00, 0x16, 0x00, 0x6b,
+        0x00, 0x67, 0x00, 0x39, 0x00, 0x33, 0x00, 0x3d, 0x00, 0x3c, 0x00, 0x35,
+        0x00, 0x2f, 0x00, 0x05, 0x00, 0x04, 0x00, 0x0a, 0x01, 0x00, 0x00, 0x0a,
+        0x00, 0x0d, 0x00, 0x06, 0x00, 0x04, 0x04, 0x01, 0x02, 0x01
+    };
+
+    byte result[32] = {0};
+    word32 length   = 32;
+
+    AssertIntEQ(SSL_SUCCESS, CyaSSL_SNI_GetFromBuffer(buffer3, sizeof(buffer3),
+                                                           0, result, &length));
+
+    AssertIntEQ(SSL_SUCCESS, CyaSSL_SNI_GetFromBuffer(buffer2, sizeof(buffer2),
+                                                           1, result, &length));
+
+    AssertIntEQ(-228, CyaSSL_SNI_GetFromBuffer(buffer, sizeof(buffer), 0,
+                                                              result, &length));
+    buffer[0] = 0x16;
+
+    AssertIntEQ(-228, CyaSSL_SNI_GetFromBuffer(buffer, sizeof(buffer), 0,
+                                                              result, &length));
+    buffer[1] = 0x03;
+
+    AssertIntEQ(-228, CyaSSL_SNI_GetFromBuffer(buffer, sizeof(buffer), 0,
+                                                              result, &length));
+    buffer[2] = 0x03;
+
+    AssertIntEQ(-210, CyaSSL_SNI_GetFromBuffer(buffer, sizeof(buffer), 0,
+                                                              result, &length));
+    buffer[4] = 0x64;
+
+    AssertIntEQ(1, CyaSSL_SNI_GetFromBuffer(buffer, sizeof(buffer), 0,
+                                                              result, &length));
+    result[length] = 0;
+    AssertStrEQ("www.paypal.com", (const char*) result);
+
+    length = 32;
+
+    AssertIntEQ(1, CyaSSL_SNI_GetFromBuffer(buffer2, sizeof(buffer2), 0,
+                                                              result, &length));
+    result[length] = 0;
+    AssertStrEQ("api.textmate.org", (const char*) result);
+}
+
 void test_CyaSSL_UseSNI(void)
 {
     callback_functions client_callbacks = {CyaSSLv23_client_method, 0, 0, 0};
@@ -358,6 +440,8 @@ void test_CyaSSL_UseSNI(void)
     CyaSSL_free(ssl);
     CyaSSL_CTX_free(ctx);
 
+#if !defined(NO_FILESYSTEM) && !defined(NO_CERTS)
+
     /* Testing success case at ctx */
     client_callbacks.ctx_ready = server_callbacks.ctx_ready = use_SNI_at_ctx;
     server_callbacks.on_result = verify_SNI_real_matching;
@@ -390,6 +474,10 @@ void test_CyaSSL_UseSNI(void)
     server_callbacks.on_result = verify_SNI_fake_matching;
 
     test_CyaSSL_client_server(&client_callbacks, &server_callbacks);
+
+#endif
+
+    test_CyaSSL_SNI_GetFromBuffer();
 }
 #endif /* HAVE_SNI */
 
diff --git a/tests/unit.c b/tests/unit.c
index 72f14ff68..f1926f2e9 100644
--- a/tests/unit.c
+++ b/tests/unit.c
@@ -27,10 +27,10 @@ int main(int argc, char** argv)
         err_sys("Cavium OpenNitroxDevice failed");
 #endif /* HAVE_CAVIUM */
 
-    if (CurrentDir("tests"))
+    if (CurrentDir("tests") || CurrentDir("_build"))
         ChangeDirBack(1);
-    else if (CurrentDir("build"))
-        ChangeDirBack(2);
+    else if (CurrentDir("Debug") || CurrentDir("Release"))
+        ChangeDirBack(3);
 
     if ( (ret = ApiTest()) != 0) {
         printf("api test failed with %d\n", ret);
diff --git a/testsuite/testsuite.c b/testsuite/testsuite.c
index 351a7471f..6d6cc8921 100644
--- a/testsuite/testsuite.c
+++ b/testsuite/testsuite.c
@@ -51,11 +51,16 @@ enum {
     NUMARGS = 3
 };
 
+#ifndef USE_WINDOWS_API
+    const char outputName[] = "/tmp/output";
+#else
+    const char outputName[] = "output";
+#endif
+
 
 int myoptind = 0;
 char* myoptarg = NULL;
 
-
 int main(int argc, char** argv)
 {
     func_args server_args;
@@ -79,11 +84,13 @@ int main(int argc, char** argv)
     CyaSSL_Debugging_ON();
 #endif
 
-    if (CurrentDir("testsuite"))
+    if (CurrentDir("testsuite") || CurrentDir("_build"))
         ChangeDirBack(1);
-    else if (CurrentDir("build"))  /* Xcode->Preferences->Locations->Build */
-        ChangeDirBack(2);          /* Location "Place build product in locations
-                                      specified by targets", uses build/Debug */
+    else if (CurrentDir("Debug") || CurrentDir("Release"))
+        ChangeDirBack(3);          /* Xcode->Preferences->Locations->Locations*/
+                                   /* Derived Data Advanced -> Custom  */
+                                   /* Relative to Workspace, Build/Products */
+                                   /* Debug or Release */
     server_args.signal = &ready;
     InitTcpReady(&ready);
 
@@ -115,8 +122,8 @@ int main(int argc, char** argv)
    
         strcpy(echo_args.argv[0], "echoclient");
         strcpy(echo_args.argv[1], "input");
-        strcpy(echo_args.argv[2], "output");
-        remove("output");
+        strcpy(echo_args.argv[2], outputName);
+        remove(outputName);
 
         /* Share the signal, it has the new port number in it. */
         echo_args.signal = server_args.signal;
@@ -144,7 +151,7 @@ int main(int argc, char** argv)
         byte output[SHA256_DIGEST_SIZE];
 
         file_test("input",  input);
-        file_test("output", output);
+        file_test(outputName, output);
         if (memcmp(input, output, sizeof(input)) != 0)
             return EXIT_FAILURE;
     }

From 07af9913c3c615201a2fe411186626525cf081cc Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Fri, 31 Jan 2014 08:49:39 +0900
Subject: [PATCH 17/43] LwIP native TCP

---
 IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c               |  283 ++
 IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h               |   68 +
 IDE/IAR-EWARM/CyaSSL/HTTPS-maic.c             |   96 +
 IDE/IAR-EWARM/CyaSSL/SSL-NB.c                 |  210 ++
 IDE/IAR-EWARM/CyaSSL/SSL-NB.h                 |   68 +
 .../Projects/CyaSSL-Lib/CyaSSL-Lib.dep        | 1175 ++++++++
 .../Projects/CyaSSL-Lib/CyaSSL-Lib.ewd        | 2601 +++++++++++++++++
 .../Projects/CyaSSL-Lib/CyaSSL-Lib.ewp        | 2015 +++++++++++++
 .../Projects/CyaSSL-Lib/CyaSSL-Lib.eww        |   10 +
 ctaocrypt/src/random.c                        |    6 +-
 cyassl/ctaocrypt/settings.h                   |   10 +
 cyassl/internal.h                             |   10 +-
 cyassl/ssl.h                                  |    5 +-
 src/internal.c                                |    5 +
 src/io.c                                      |  108 +
 15 files changed, 6664 insertions(+), 6 deletions(-)
 create mode 100644 IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
 create mode 100644 IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h
 create mode 100644 IDE/IAR-EWARM/CyaSSL/HTTPS-maic.c
 create mode 100644 IDE/IAR-EWARM/CyaSSL/SSL-NB.c
 create mode 100644 IDE/IAR-EWARM/CyaSSL/SSL-NB.h
 create mode 100644 IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.dep
 create mode 100644 IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewd
 create mode 100644 IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
 create mode 100644 IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.eww

diff --git a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
new file mode 100644
index 000000000..b39a22a2e
--- /dev/null
+++ b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
@@ -0,0 +1,283 @@
+/* HTTPS-NB.c
+ *
+ * Copyright (C) 2006-2014 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+ 
+#include 
+ 
+#if defined(CYASSL_MDK_ARM)
+      #include 
+        #include 
+        #include 
+        #include "cyassl_MDK_ARM.h"
+#endif
+
+#if defined(CYASSL_IAR_ARM)
+    #include 
+    #include 
+#endif
+
+#if defined(CYASSL_LWIP)
+#include "lwip/tcp.h"
+#include "lwip/sockets.h"
+#endif
+
+#include 
+#include 
+#include 
+#include "SSL-NB.h"
+#include "HTTPS-NB.h"
+
+#if 0
+/*Enable debug*/
+#include 
+#define DBG_PRINTF(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
+#else
+/*Disable debug*/
+#define DBG_PRINTF(x, ...)
+#endif
+
+#define ERR_PRINTF(x, ...) printf("[HTTPSClient:ERROR]"x"\r\n", ##__VA_ARGS__);
+
+static unsigned long localPort = 0 ;
+static unsigned long getPort(void) {
+      return (localPort++ + 0x200) & 0x7fff ;
+}
+
+
+static err_t DataConnectedCallback (void *arg, struct tcp_pcb *pcb, s8_t err)
+{
+    *(enum HTTPS_Stat *)arg = TCP_CONNECTED ;
+    return ERR_OK;
+}
+
+static err_t DataSentCallback (void *arg, struct tcp_pcb *pcb, u16_t err)
+{
+    DBG_PRINTF("LwIPtest: Data Sent(SentCallBack1)\n") ;
+    return ERR_OK;
+}
+
+static err_t DataReceiveCallback(void *cb, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
+{
+    struct pbuf *next ;
+    CYASSL_NB *ssl_nb ;
+    ssl_nb = (CYASSL_NB *)cb ;
+    
+    DBG_PRINTF("LwIPtest: Data Received(DataReceiveCallback), pbuf->len=%d, err=%d\n", p->tot_len , err) ;
+    
+    if(p==0) { /* throw away */
+        return ERR_OK ;
+    }
+    if(*(enum HTTPS_Stat *)(ssl_nb->arg) == WAITING) {
+        *(enum HTTPS_Stat *)(ssl_nb->arg) = HTTP_RECEIVE ;
+    } else { 
+        CyaSSL_PbufFree(p) ;
+        tcp_recved(pcb,p->tot_len) ;
+        return ERR_OK ;
+    }
+    /* put it into the queue */
+    if(ssl_nb->pbuf) {
+        next = ssl_nb->pbuf ;
+        while(1) {
+            DBG_PRINTF("pbuf=%x, pbuf->next=%x, ",ssl_nb->pbuf, next) ;
+            if(next->next)
+                next = next->next ;
+            else break ;
+        }
+        next->next = p ;
+        ssl_nb->pbuf->tot_len += p->tot_len ;
+    } else {
+        ssl_nb->pbuf = p ;
+    }
+    ssl_nb->pulled = 0 ;
+
+    if(ssl_nb->wait < 0)
+        ssl_nb->wait = 1000 ;
+    ssl_nb->pulled = 0 ;
+    return ERR_OK;
+}
+
+static int count = 0 ;
+
+void CyaSSL_HTTPS_Client_NB_init(void *nb, 
+     struct ip_addr svIP, unsigned long svPort, char *host, char *path)
+{
+    CYASSL_HTTPS_NB *https_nb ;
+    https_nb = (CYASSL_HTTPS_NB *)nb ;
+    
+    https_nb->serverIP_em = svIP ;
+    https_nb->serverPort = svPort ;
+    https_nb->hostname = host ;
+    https_nb->path = path ;
+    
+    https_nb->stat = BEGIN ;
+    
+}
+
+int CyaSSL_HTTPS_Client_NB(void *nb)
+{
+    char *p ;
+    int ret ;
+    CYASSL_HTTPS_NB *https_nb ;
+    CYASSL_NB       *ssl_nb ;
+    
+    https_nb = (CYASSL_HTTPS_NB *)nb ;
+    ssl_nb   = (CYASSL_NB       *)&(https_nb->ssl_nb) ;
+    
+    /*CyaSSL_Debugging_ON() ; */
+
+    switch(https_nb->stat) {
+    case BEGIN:
+        printf("======= LwIP: HTTPS Client Test(%x): %d =========\n", nb, count ++) ;
+        
+        p = (char *)malloc(1) ;
+        printf("Warter mark: %x\n", p) ;
+        free(p) ;
+        /*** Assuming LwIP has been initialized ***/
+        https_nb->stat = INITIALIZED ; 
+    case INITIALIZED:
+        https_nb->pcb = tcp_new();
+        if(https_nb->pcb) {
+    	        tcp_arg(https_nb->pcb, (void *)&(https_nb->stat)) ;    
+                DBG_PRINTF("LwIPtest: New PCB(tcp_new=%x), &https->stat=%x\n", https_nb->pcb, &https_nb->stat) ;
+        } else {
+    	    ERR_PRINTF("tcp_new, ret=%d\n", https_nb->pcb) ;
+            https_nb->stat = IDLE ;
+    	    return !ERR_OK ;
+        }
+         
+        tcp_arg(https_nb->pcb, (void *)&https_nb->stat) ;
+
+        https_nb->localPort = getPort() ;
+        printf("local Port=%d\n", https_nb->localPort) ;
+        ret = tcp_bind (https_nb->pcb, &(https_nb->localIP_em),
+                        https_nb->localPort) ;
+        if(ret == ERR_OK) {
+            https_nb->stat = TCP_CONNECT ;
+            return ERR_OK;
+        } else {
+    	    ERR_PRINTF("tcp_bind, ret=%d\n", ret) ;
+            https_nb->stat = INITIALIZED ;
+            return !ERR_OK ;
+        }
+
+    case TCP_CONNECT:
+        DBG_PRINTF("LwIPtest: TCP_CONNECT\n") ;
+        DBG_PRINTF("LwIPtest: Server IP Addrress(%d.%d.%d.%d)\n", 
+              (*(unsigned long *)&https_nb->serverIP_em&0xff),
+              (*(unsigned long *)&https_nb->serverIP_em>>8)&0xff, 
+              (*(unsigned long *)&https_nb->serverIP_em>>16)&0xff, 
+              (*(unsigned long *)&https_nb->serverIP_em>>24)&0xff) ;
+
+        if(CyaSSL_cb_mutex)return ERR_OK ;
+        else CyaSSL_cb_mutex = 1 ;
+        ret = tcp_connect(https_nb->pcb, &(https_nb->serverIP_em),
+                          https_nb->serverPort, DataConnectedCallback); 
+ 
+        if(ret == ERR_OK) {
+    	     https_nb->stat = WAITING ;
+             return ERR_OK;
+        } else {
+    	    ERR_PRINTF("tcp_connect, ret=%d\n", ret) ;
+            https_nb->stat = TCP_CLOSE ;
+    	    return !ERR_OK;
+        }
+        
+    case TCP_CONNECTED:
+        printf("LwIPtest: TCP CONNECTED\n") ;
+        CyaSSL_cb_mutex = 0 ; 
+        ret = CyaSSL_init_NB(&(https_nb->ssl_nb), https_nb->pcb) ;
+        if(ret != ERR_OK) {
+            https_nb->stat = TCP_CLOSE ;
+            return !ERR_OK ;
+        }
+        https_nb->stat = SSL_CONN ;
+        
+    case SSL_CONN: /* handshaking */
+        ret = CyaSSL_connecting_NB(&(https_nb->ssl_nb)) ;
+        if(ret == SSL_NB_ERROR) {
+             ERR_PRINTF("CyaSSL_connecting, ret=%d\n", ret) ;
+             https_nb->stat = SSL_CLOSE ; 
+             return !ERR_OK ;
+        } else if(ret == SSL_NB_CONNECTED)
+             https_nb->stat = HTTP_SEND ;
+        else return ERR_OK;
+        
+    case HTTP_SEND: 
+      {
+        #define SEND_BUFF_SIZE 100
+        char sendBuff[SEND_BUFF_SIZE] ;    
+        int size ;
+        printf("LwIPtest: SSL CONNECTED\n") ;
+        CyaSSL_NB_setCallbackArg(ssl_nb, &(https_nb->stat)) ;
+        tcp_sent(https_nb->pcb, DataSentCallback); 
+        tcp_recv(https_nb->pcb, DataReceiveCallback); 
+
+        DBG_PRINTF("LwIPtest: HTTPS GET\n") ;
+        sprintf(sendBuff,
+                "GET %s HTTP/1.0\r\nHost: %s\r\nConnection: close\r\n\r\n", 
+                https_nb->path, https_nb->hostname) ;
+        size = strlen((char const *)sendBuff) ;
+        
+        if(CyaSSL_cb_mutex)return ERR_OK ;
+        else CyaSSL_cb_mutex = 1 ; /* lock */
+        CyaSSL_write(ssl_nb->ssl, sendBuff, size) ;
+
+        https_nb->stat = WAITING ;
+        return ERR_OK;
+      }
+      
+    case HTTP_RECEIVE: 
+      {
+        #define HTTP_BUFF_SIZE 2048
+        char httpbuff[HTTP_BUFF_SIZE] ;
+        
+        memset(httpbuff, '\0', HTTP_BUFF_SIZE) ;
+        ret = CyaSSL_read(ssl_nb->ssl, httpbuff, HTTP_BUFF_SIZE) ;
+        printf("LwIPtest: HTTPS GET, Received(%d)\n",strlen(httpbuff)) ;
+        CyaSSL_cb_mutex = 0 ; 
+        /* puts(httpbuff) ;*/ 
+        puts("===================\n") ; 
+      }
+      case SSL_CLOSE:        
+        CyaSSL_close_NB(ssl_nb) ;
+        
+        https_nb->stat = TCP_CLOSE ;
+
+        return ERR_OK ;
+      
+      case TCP_CLOSE:
+        tcp_close(https_nb->pcb) ;
+        https_nb->idle = 0 ;
+        https_nb->stat = IDLE ;
+
+    
+      case IDLE:
+          https_nb->idle ++ ;
+          if(https_nb->idle > 50000)
+              https_nb->stat = BEGIN ;
+        case WAITING:
+        default:
+            return ERR_OK;
+    }
+}
diff --git a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h
new file mode 100644
index 000000000..1f88b2abe
--- /dev/null
+++ b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h
@@ -0,0 +1,68 @@
+/* HTTPS-NB.h
+ *
+ * Copyright (C) 2006-2014 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+extern int CyaSSL_GetDataFromPbuf(char *buff, struct pbuf *p, int size) ;
+
+#define IP4_LONG_2_ADDR(ipaddr, iplong) \
+        (ipaddr)->addr = htonl(((u32_t)(iplong) & 0xFF000000) | \
+                               ((u32_t)(iplong) & 0xFF0000)   | \
+                               ((u32_t)(iplong) & 0xFF00)     | \
+                                (u32_t)(iplong) & 0xFF)
+
+#define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
+
+enum HTTPS_Stat {
+    BEGIN,
+    GET_MYIP,
+    INITIALIZED,
+    TCP_CONNECT,
+    TCP_CONNECTED,
+    SSL_INIT,
+    SSL_CONN,
+    HTTP_SEND,
+    HTTP_RECEIVE,
+    HTTP_DONE,
+    SSL_CLOSE,
+    TCP_CLOSE,
+    WAITING,
+    IDLE
+} ;
+
+
+#define HTTPS_PORT 443
+
+typedef struct {
+    CYASSL_NB ssl_nb ;
+    enum HTTPS_Stat stat ;
+    struct tcp_pcb * pcb ;
+    unsigned long ipaddress ;
+    struct ip_addr localIP_em;
+    unsigned long localPort ;
+    struct ip_addr serverIP_em ;
+    unsigned long serverPort ;
+    char   *hostname ;
+    char   *path ;
+    int    idle ;
+} CYASSL_HTTPS_NB ;
+
+extern void CyaSSL_HTTPS_Client_NB_init(void *nb, 
+     struct ip_addr svIP, unsigned long svPort, char *host, char *path) ;
+extern int CyaSSL_HTTPS_Client_NB(void *nb) ;
\ No newline at end of file
diff --git a/IDE/IAR-EWARM/CyaSSL/HTTPS-maic.c b/IDE/IAR-EWARM/CyaSSL/HTTPS-maic.c
new file mode 100644
index 000000000..45bcd31f6
--- /dev/null
+++ b/IDE/IAR-EWARM/CyaSSL/HTTPS-maic.c
@@ -0,0 +1,96 @@
+/* HTTPS-MAIN.c
+ *
+ * Copyright (C) 2006-2014 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+*/
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include "lwip/tcp.h"
+#include "lwip/sockets.h"
+
+#include 
+#include 
+#include 
+#include "SSL-NB.h"
+#include "HTTPS-NB.h"
+#include "HTTPS-main.h"
+
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_1 ;
+void *CyaSSL_HTTPS_ClientP_1 = (void *)&CyaSSL_HTTPS_Client_1 ;
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_2 ;
+void *CyaSSL_HTTPS_ClientP_2 = (void *)&CyaSSL_HTTPS_Client_2 ;
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_3 ;
+void *CyaSSL_HTTPS_ClientP_3 = (void *)&CyaSSL_HTTPS_Client_3 ;
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_4 ;
+void *CyaSSL_HTTPS_ClientP_4 = (void *)&CyaSSL_HTTPS_Client_4 ;
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_5 ;
+void *CyaSSL_HTTPS_ClientP_5 = (void *)&CyaSSL_HTTPS_Client_5 ;
+
+
+extern  void CyaSSL_HTTPS_Client_NB_init(void *nb, 
+           struct ip_addr svIP, unsigned long svPort, char *host, char *path) ;
+  
+#define HTTPS_PORT   443
+#define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
+static struct ip_addr server_em = { IP_ADDR(192,168,11,9) } ;
+
+static int i = 0 ;
+
+void HTTPSClient_main_init() {
+
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_1, 
+                           server_em, HTTPS_PORT, "xxx.com", "/") ;
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_2, 
+                              server_em, HTTPS_PORT, "xxx.com", "/") ;
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_3, 
+                              server_em, HTTPS_PORT, "xxx.com", "/") ;
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_4, 
+                              server_em, HTTPS_PORT, "xxx.com", "/") ;
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_5, 
+                              server_em, HTTPS_PORT, "xxx.com", "/") ;  
+}
+
+void HTTPSClient_main(void)
+{
+
+    if(i++ < 10000)return ;
+    
+    if((i % 1) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_1) ;
+    }
+
+    if((i % 2) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_2) ;
+    }
+
+    if((i % 3) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_3) ;
+    }
+
+    if((i % 4) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_4) ;
+    }
+#if 0
+    if((i % 5) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_5) ;
+    }
+#endif
+}
\ No newline at end of file
diff --git a/IDE/IAR-EWARM/CyaSSL/SSL-NB.c b/IDE/IAR-EWARM/CyaSSL/SSL-NB.c
new file mode 100644
index 000000000..36de4d908
--- /dev/null
+++ b/IDE/IAR-EWARM/CyaSSL/SSL-NB.c
@@ -0,0 +1,210 @@
+/* SSL-NB.c
+ *
+ * Copyright (C) 2006-2014 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+
+#if defined(CYASSL_MDK_ARM)
+      #include 
+        #include 
+        #include 
+        #include "cyassl_MDK_ARM.h"
+#endif
+
+#if defined(CYASSL_IAR_ARM)
+    #include 
+    #include 
+#endif
+
+#if defined(CYASSL_LWIP)
+#include "lwip/tcp.h"
+#include "lwip/pbuf.h"
+#include "lwip/sockets.h"
+#endif
+
+#include 
+#include 
+#include 
+#include 
+
+#if 0
+/*Enable debug*/
+#include 
+#define DBG_PRINTF(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
+#else
+/*Disable debug*/
+#define DBG_PRINTF(x, ...)
+#endif
+#define ERR_PRINTF(x, ...) printf("[SSLClient:ERROR]"x"\r\n", ##__VA_ARGS__);
+
+#if 0
+/*Enable debug*/
+#define DBG_PRINTF_CB(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
+#else
+/*Disable debug*/
+#define DBG_PRINTF_CB(x, ...)
+#endif
+
+CyaSSL_CALLBACK_MUTEX CyaSSL_cb_mutex = 0 ;
+
+static err_t CyaSSL_connectCallback(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t err)
+{
+    struct pbuf *next ;
+    CYASSL_NB *ssl_nb ;
+    ssl_nb = (CYASSL_NB *)cb ;
+    
+    if((cb == NULL)||(pcb == NULL))
+        ERR_PRINTF("CyaSSL_connectCallBack, cb=%x, pcb=%d\n", cb, pcb) ;
+    if(p && (err == 0)) {
+        printf("pbuf=%x\n", p) ;
+        DBG_PRINTF_CB("LwIPtest: CyaSSL connect, started(CyaSSL_connectCallBack1), pbuf=%x, err=%d, tot_len=%d\n", p, err, p->tot_len) ;
+    }else {
+        ERR_PRINTF("CyaSSL_connectCallBack, pbuf=%x, err=%d\n", p, err) ;
+        return ERR_OK; /* don't go to SSL_CONN */
+    }
+
+    if(ssl_nb->pbuf) {
+        next = ssl_nb->pbuf ;
+        while(1) {
+            if(next->next)
+                next = next->next ;
+            else break ;
+        }
+        next->next = p ;
+        ssl_nb->pbuf->tot_len += p->tot_len ;
+    } else {
+        ssl_nb->pbuf = p ;
+    }
+    ssl_nb->pulled = 0 ;
+    if(ssl_nb->wait < 0)
+        ssl_nb->wait = 10000 ;
+    return ERR_OK; 
+}
+
+static err_t DataSentCallback (void *arg, struct tcp_pcb *pcb, u16_t err)
+{
+    DBG_PRINTF_CB("LwIPtest: Data Sent(SentCallBack1), err=%d\n", err) ;
+    return ERR_OK;
+}
+
+int CyaSSL_init_NB(CYASSL_NB *nb, struct tcp_pcb * pcb)
+{
+    CYASSL_NB *ssl_nb ; 
+    ssl_nb = nb ;
+    
+    /*CyaSSLv3_client_method()
+      CyaTLSv1_client_method()
+      CyaTLSv1_1_client_method()
+      CyaTLSv1_2_client_method() */
+    ssl_nb->ctx = CyaSSL_CTX_new(CyaTLSv1_2_client_method());
+    if (ssl_nb->ctx == NULL) {
+        ERR_PRINTF("CyaSSL_CTX_new: unable to get ctx");
+        return !ERR_OK ;
+    }
+    
+    CyaSSL_CTX_set_verify(ssl_nb->ctx, SSL_VERIFY_NONE, 0);
+
+    ssl_nb->ssl = CyaSSL_new(ssl_nb->ctx);
+    if (ssl_nb->ssl == NULL) {
+        ERR_PRINTF("CyaSSL_new: unable to get SSL object");
+        return !ERR_OK ;
+    }
+    
+    ssl_nb->pcb = pcb ;
+    ssl_nb->pbuf = NULL ;
+    ssl_nb->pulled = 0 ;
+    ssl_nb->stat = SSL_NB_CONN ;
+    
+    /* set up callbacks */
+    CyaSSL_SetIOReadCtx (ssl_nb->ssl, (void *)ssl_nb) ;
+    CyaSSL_SetIOWriteCtx(ssl_nb->ssl, (void *)ssl_nb) ;
+    tcp_recv(ssl_nb->pcb, CyaSSL_connectCallback);
+    tcp_sent(ssl_nb->pcb, DataSentCallback); 
+    tcp_arg(ssl_nb->pcb, (void *)ssl_nb) ;
+    
+    CyaSSL_SetVersion(ssl_nb->ssl, CYASSL_TLSV1_2) ;
+    CyaSSL_set_using_nonblock(ssl_nb->ssl, (0==0)) ;
+                                         /* Non-blocking CyaSSL_connect */
+    DBG_PRINTF("Return CyaSSL_init_NB = %x\n", ssl_nb) ;
+    return ERR_OK ;
+}
+
+/*** Non-Bloking Cyassl_connect, ... */
+/* to be called in infinit loop ***/
+int CyaSSL_connecting_NB(CYASSL_NB *ssl_nb)
+{
+    int ret ;
+    
+    switch(ssl_nb->stat) {
+    case SSL_NB_CONN:
+        if(CyaSSL_cb_mutex)return SSL_NB_WAITING ;
+        ret = CyaSSL_connect(ssl_nb->ssl); 
+        DBG_PRINTF("LwIPtest: SSL Connecting(CyaSSL_connect), ret = %d\n", ret) ;
+
+        if(ret == SSL_CONNECT_WAITING) {
+            if(CyaSSL_cb_mutex)
+                return SSL_NB_WAITING ;
+            else CyaSSL_cb_mutex = 1 ; /* lock */
+            ssl_nb->wait = -1 ; /* wait until first callback */
+            ssl_nb->stat = SSL_NB_WAITING ;
+            return SSL_NB_CONNECTING ;
+        } else if(ret == SSL_CONNECTING) {
+            return SSL_NB_CONNECTING ;
+        } else if(ret == SSL_SUCCESS) {
+            ssl_nb->stat = SSL_NB_WAITING ;
+            DBG_PRINTF("LwIPtest: SSL Connected\n") ;
+            return SSL_NB_CONNECTED ;
+        } else {
+            ret = CyaSSL_get_error(ssl_nb->ssl, NULL) ;
+              ssl_nb->stat = SSL_NB_WAITING ;
+            return SSL_NB_CONNECTING ;
+        }
+        
+    case SSL_NB_WAITING:
+      if(ssl_nb->wait-- == 0) { /* counting down after the callback 
+                   for multiple callbacks */
+            ssl_nb->stat = SSL_NB_CONN ;
+            CyaSSL_cb_mutex = 0 ; 
+      }
+      return SSL_NB_CONNECTING ;
+    default:
+        return SSL_NB_ERROR ;
+    }
+}
+
+/** disconnect */
+int CyaSSL_close_NB(CYASSL_NB *ssl_nb)
+{
+    CyaSSL_shutdown(ssl_nb->ssl);
+    CyaSSL_free(ssl_nb->ssl);
+    CyaSSL_CTX_free(ssl_nb->ctx);
+    ssl_nb->stat = SSL_NB_BEGIN ;
+
+    return ERR_OK ;
+}
+
+void CyaSSL_NB_setCallbackArg(CYASSL_NB *ssl_nb, void *arg)
+{
+    ssl_nb->arg = arg ; 
+}
\ No newline at end of file
diff --git a/IDE/IAR-EWARM/CyaSSL/SSL-NB.h b/IDE/IAR-EWARM/CyaSSL/SSL-NB.h
new file mode 100644
index 000000000..e0b468fa7
--- /dev/null
+++ b/IDE/IAR-EWARM/CyaSSL/SSL-NB.h
@@ -0,0 +1,68 @@
+/* SSLcon-NB.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifndef __SSLCONN_NB_H__
+#define __SSLCONN_NB_H__
+
+#define mem_malloc malloc
+#define mem_free   free
+
+enum SSL_Stat {
+    SSL_NB_BEGIN,
+    SSL_NB_WAITING,
+    SSL_NB_CONN,
+}  ;
+
+enum SSL_NB_Ret {
+    SSL_NB_ERROR,
+    SSL_NB_CONNECTING,
+    SSL_NB_CONNECTED,
+}  ;
+
+typedef struct CyaSSL_nb {
+    CYASSL *ssl ;
+    CYASSL_CTX *ctx ;
+    struct tcp_pcb * pcb ;
+    int    pulled  ; 
+    struct pbuf *pbuf ;
+    enum   SSL_Stat stat ;
+    int    wait ;
+    void * arg ;   /* arg for application */
+    int    idle_count ;
+} CYASSL_NB ;
+
+extern int CyaSSL_init_NB(CYASSL_NB *nb, struct tcp_pcb * pcb) ;
+extern int CyaSSL_connecting_NB(CYASSL_NB *ssl_nb) ;
+extern int CyaSSL_close_NB(CYASSL_NB *ssl_nb) ;
+extern void CyaSSL_NB_setCallbackArg(CYASSL_NB *ssl_nb, void *arg) ; 
+                         /* Set it to CYASSL_NB.arg for callback arg */
+
+extern int CyaSSL_write(struct CYASSL *pcbSSL, const void *buffer, int len) ;
+extern int CyaSSL_recv(struct CYASSL *pcbSSL, void *buffer, int len, int flg) ;
+extern int CyaSSL_read(struct CYASSL *pcbSSL, void *buffer, int len) ;
+
+extern void CyaSSL_PbufFree(struct pbuf * p) ;
+
+typedef int CyaSSL_CALLBACK_MUTEX ;
+
+extern  CyaSSL_CALLBACK_MUTEX CyaSSL_cb_mutex ;
+
+#endif
diff --git a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.dep b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.dep
new file mode 100644
index 000000000..e6feba691
--- /dev/null
+++ b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.dep
@@ -0,0 +1,1175 @@
+
+
+
+  2
+  1657308038
+  
+    Debug
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rsa.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha256.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha512.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\tfm.c
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\tcp.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\opt.h
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ripemd.c
+      $TOOLKIT_DIR$\inc\c\stdio.h
+      $PROJ_DIR$\Debug\Obj\tls.o
+      $PROJ_DIR$\Debug\Obj\ecc.o
+      $PROJ_DIR$\Debug\Obj\dsa.o
+      $PROJ_DIR$\Debug\Obj\asm.o
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\port\arch\cc.h
+      $PROJ_DIR$\Debug\Obj\io.o
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\debug.h
+      $PROJ_DIR$\Debug\Obj\md2.o
+      $PROJ_DIR$\Debug\Obj\arc4.o
+      $PROJ_DIR$\Debug\Obj\SSL-NB.o
+      $PROJ_DIR$\Debug\Obj\compress.o
+      $PROJ_DIR$\Debug\Obj\camellia.o
+      $PROJ_DIR$\Debug\Obj\dh.o
+      $PROJ_DIR$\Debug\Obj\ecc_fp.o
+      $PROJ_DIR$\Debug\Obj\internal.o
+      $PROJ_DIR$\Debug\Obj\hmac.o
+      $PROJ_DIR$\Debug\Obj\blake2b.o
+      $PROJ_DIR$\Debug\Obj\des3.o
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\arch.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\fm3_adaption\lwipopts.h
+      $PROJ_DIR$\Debug\Obj\integer.o
+      $PROJ_DIR$\Debug\Obj\logging.o
+      $PROJ_DIR$\Debug\Obj\HTTPS-NB.o
+      $PROJ_DIR$\Debug\Obj\hc128.o
+      $PROJ_DIR$\Debug\Obj\aes.o
+      $PROJ_DIR$\Debug\Obj\coding.o
+      $PROJ_DIR$\Debug\Obj\ssl.o
+      $PROJ_DIR$\Debug\Obj\error.o
+      $PROJ_DIR$\Debug\Obj\asn.o
+      $PROJ_DIR$\Debug\Obj\md4.o
+      $PROJ_DIR$\Debug\Obj\md5.o
+      $PROJ_DIR$\Debug\Obj\blake2b.pbi
+      $PROJ_DIR$\Debug\Obj\sha.o
+      $PROJ_DIR$\Debug\Obj\ripemd.o
+      $PROJ_DIR$\Debug\Obj\tfm.o
+      $PROJ_DIR$\Debug\Obj\SSL-NB.pbi
+      $PROJ_DIR$\Debug\Obj\arc4.pbi
+      $PROJ_DIR$\Debug\Obj\compress.pbi
+      $PROJ_DIR$\Debug\Obj\random.o
+      $PROJ_DIR$\Debug\Obj\camellia.pbi
+      $PROJ_DIR$\Debug\Obj\aes.pbi
+      $PROJ_DIR$\Debug\Obj\port.o
+      $PROJ_DIR$\Debug\Obj\keys.pbi
+      $PROJ_DIR$\Debug\Obj\asn.pbi
+      $PROJ_DIR$\Debug\Obj\internal.pbi
+      $PROJ_DIR$\Debug\Obj\des3.pbi
+      $PROJ_DIR$\Debug\Obj\ssl.pbi
+      $PROJ_DIR$\Debug\Obj\HTTPS-maic.pbi
+      $PROJ_DIR$\Debug\Obj\coding.pbi
+      $PROJ_DIR$\Debug\Obj\asm.pbi
+      $PROJ_DIR$\Debug\Obj\pwdbased.o
+      $PROJ_DIR$\Debug\Obj\dh.pbi
+      $PROJ_DIR$\Debug\Obj\keys.o
+      $PROJ_DIR$\Debug\Obj\sha256.o
+      $PROJ_DIR$\Debug\Obj\HTTPS-maic.o
+      $PROJ_DIR$\Debug\Obj\rabbit.o
+      $PROJ_DIR$\Debug\Obj\tls.pbi
+      $PROJ_DIR$\Debug\Obj\memory.o
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dsa.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\error.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\logging.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\des3.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md2.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\pwdbased.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rabbit.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hmac.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hc128.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md5.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asm.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\blake2b.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\camellia.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\integer.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md4.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\random.c
+      $PROJ_DIR$\..\..\..\..\src\tls.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dh.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\aes.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory-orig.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\compress.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\misc.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\port.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\arc4.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asn.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\coding.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc_fp.c
+      $PROJ_DIR$\..\..\CyaSSL\SSL-NB.c
+      $PROJ_DIR$\..\..\..\..\src\internal.c
+      $PROJ_DIR$\..\..\CyaSSL\HTTPS-NB.c
+      $PROJ_DIR$\..\..\..\..\src\io.c
+      $PROJ_DIR$\Debug\Obj\CyaSSL-Lib.pbd
+      $PROJ_DIR$\..\..\..\..\src\ssl.c
+      $PROJ_DIR$\..\..\..\..\src\keys.c
+      $PROJ_DIR$\..\..\CyaSSL\HTTPS-maic.c
+      $PROJ_DIR$\Debug\Obj\tfm.pbi
+      $PROJ_DIR$\Debug\Exe\CyaSSL-Lib.a
+      $TOOLKIT_DIR$\inc\c\ycheck.h
+      $TOOLKIT_DIR$\inc\c\yvals.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\port\arch\bpstruct.h
+      $PROJ_DIR$\Debug\Obj\memory.pbi
+      $PROJ_DIR$\Debug\Obj\logging.pbi
+      $PROJ_DIR$\Debug\Obj\pwdbased.pbi
+      $PROJ_DIR$\Debug\Obj\md5.pbi
+      $PROJ_DIR$\Debug\Obj\rsa.o
+      $PROJ_DIR$\Debug\Obj\sha256.pbi
+      $PROJ_DIR$\Debug\Obj\io.pbi
+      $PROJ_DIR$\Debug\Obj\rsa.pbi
+      $PROJ_DIR$\Debug\Obj\random.pbi
+      $PROJ_DIR$\Debug\Obj\md2.pbi
+      $PROJ_DIR$\Debug\Obj\error.pbi
+      $PROJ_DIR$\Debug\Obj\ecc_fp.pbi
+      $PROJ_DIR$\Debug\Obj\hmac.pbi
+      $PROJ_DIR$\Debug\Obj\md4.pbi
+      $PROJ_DIR$\Debug\Obj\integer.pbi
+      $PROJ_DIR$\Debug\Obj\sha512.o
+      $PROJ_DIR$\Debug\Obj\misc.pbi
+      $PROJ_DIR$\Debug\Obj\misc.o
+      $PROJ_DIR$\Debug\Obj\rabbit.pbi
+      $PROJ_DIR$\Debug\Obj\dsa.pbi
+      $PROJ_DIR$\Debug\Obj\ripemd.pbi
+      $PROJ_DIR$\Debug\Obj\ecc.pbi
+      $PROJ_DIR$\Debug\Obj\port.pbi
+      $PROJ_DIR$\Debug\Obj\hc128.pbi
+      $PROJ_DIR$\Debug\Obj\sha512.pbi
+      $PROJ_DIR$\Debug\Obj\HTTPS-NB.pbi
+      $PROJ_DIR$\Debug\Obj\sha.pbi
+      $TOOLKIT_DIR$\inc\c\ysizet.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ssl.h
+      $TOOLKIT_DIR$\inc\c\DLib_Threads.h
+      $TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\port\arch\epstruct.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\visibility.h
+      $PROJ_DIR$\..\..\CyaSSL\HTTPS-main.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\settings.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\ipv4\lwip\ip.h
+      $PROJ_DIR$\..\..\CyaSSL\SSL-NB.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\sys.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\netif.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\mem.h
+      $TOOLKIT_DIR$\inc\c\DLib_Defaults.h
+      $TOOLKIT_DIR$\inc\c\stdint.h
+      $TOOLKIT_DIR$\inc\c\ystdio.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\err.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\pbuf.h
+      $TOOLKIT_DIR$\inc\c\xencoding_limits.h
+      $TOOLKIT_DIR$\inc\c\DLib_Product.h
+      $TOOLKIT_DIR$\inc\c\inttypes.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\sockets.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\def.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\ipv4\lwip\icmp.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\ipv4\lwip\ip_addr.h
+      $TOOLKIT_DIR$\inc\c\DLib_Product_string.h
+      $PROJ_DIR$\..\..\..\..\cyassl\version.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\arc4.h
+      $TOOLKIT_DIR$\inc\c\stdlib.h
+      $TOOLKIT_DIR$\inc\c\xtls.h
+      $TOOLKIT_DIR$\inc\c\xmtx.h
+      $TOOLKIT_DIR$\inc\c\xlocale_c.h
+      $TOOLKIT_DIR$\inc\c\wchar.h
+      $TOOLKIT_DIR$\inc\c\xtgmath.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\des3.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\hc128.h
+      $TOOLKIT_DIR$\inc\c\xlocale.h
+      $TOOLKIT_DIR$\inc\c\xlocaleuse.h
+      $PROJ_DIR$\..\..\CyaSSL\HTTPS-NB.h
+      $PROJ_DIR$\..\..\..\..\cyassl\crl.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\integer.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\asn_public.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\memory.h
+      $TOOLKIT_DIR$\inc\c\math.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\md4.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\types.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\random.h
+      $TOOLKIT_DIR$\inc\c\ctype.h
+      $PROJ_DIR$\..\..\..\..\cyassl\internal.h
+      $TOOLKIT_DIR$\inc\c\limits.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\port.h
+      $TOOLKIT_DIR$\inc\c\ymath.h
+      $TOOLKIT_DIR$\inc\c\string.h
+      $TOOLKIT_DIR$\inc\c\time.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\error.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\mpi_class.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\dsa.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\mpi_superclass.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\sha.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\hmac.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\dh.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\camellia.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\coding.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\md2.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\misc.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\sha512.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\rabbit.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\pwdbased.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\logging.h
+      $PROJ_DIR$\..\..\..\..\cyassl\error.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\aes.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\rsa.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\sha256.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\md5.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\ecc.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\asn.h
+    
+    
+      [ROOT_NODE]
+      
+        
+          IARCHIVE
+           105
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rsa.c
+      
+        
+          ICCARM
+           113
+        
+        
+          BICOMP
+           116
+        
+      
+      
+        
+          ICCARM
+           143 141 207 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 176 185 191 193 182 163 190 204
+        
+        
+          BICOMP
+           143 141 207 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 176 185 191 193 182 163 190 204
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha.c
+      
+        
+          ICCARM
+           41
+        
+        
+          BICOMP
+           135
+        
+      
+      
+        
+          ICCARM
+           143 141 194 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
+        
+        
+          BICOMP
+           143 141 194 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha256.c
+      
+        
+          ICCARM
+           62
+        
+        
+          BICOMP
+           114
+        
+      
+      
+        
+          ICCARM
+           143 141 208 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
+        
+        
+          BICOMP
+           143 141 208 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha512.c
+      
+        
+          ICCARM
+           124
+        
+        
+          BICOMP
+           133
+        
+      
+      
+        
+          ICCARM
+           143 141
+        
+        
+          BICOMP
+           143 141
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\tfm.c
+      
+        
+          ICCARM
+           43
+        
+        
+          BICOMP
+           104
+        
+      
+      
+        
+          ICCARM
+           143 141
+        
+        
+          BICOMP
+           143 141
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ripemd.c
+      
+        
+          ICCARM
+           42
+        
+        
+          BICOMP
+           129
+        
+      
+      
+        
+          ICCARM
+           143 141
+        
+        
+          BICOMP
+           143 141
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dsa.c
+      
+        
+          ICCARM
+           11
+        
+        
+          BICOMP
+           128
+        
+      
+      
+        
+          ICCARM
+           143 141 192 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 176 185 191 193 182 163 194 190
+        
+        
+          BICOMP
+           143 141 192 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 176 185 191 193 182 163 194 190
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\error.c
+      
+        
+          ICCARM
+           36
+        
+        
+          BICOMP
+           119
+        
+      
+      
+        
+          ICCARM
+           143 141 190 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
+        
+        
+          BICOMP
+           143 141 190 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\logging.c
+      
+        
+          ICCARM
+           30
+        
+        
+          BICOMP
+           110
+        
+      
+      
+        
+          ICCARM
+           143 141 204 190 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
+        
+        
+          BICOMP
+           143 141 204 190 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\des3.c
+      
+        
+          ICCARM
+           26
+        
+        
+          BICOMP
+           54
+        
+      
+      
+        
+          ICCARM
+           143 141 170 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
+        
+        
+          BICOMP
+           143 141 170 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md2.c
+      
+        
+          ICCARM
+           16
+        
+        
+          BICOMP
+           118
+        
+      
+      
+        
+          ICCARM
+           143 141
+        
+        
+          BICOMP
+           143 141
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\pwdbased.c
+      
+        
+          ICCARM
+           59
+        
+        
+          BICOMP
+           111
+        
+      
+      
+        
+          ICCARM
+           143 141 203 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 209 194 195 208 176 185 191 193 190 90 200
+        
+        
+          BICOMP
+           143 141 203 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 209 194 195 208 176 185 191 193 190 90 200
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rabbit.c
+      
+        
+          ICCARM
+           64
+        
+        
+          BICOMP
+           127
+        
+      
+      
+        
+          ICCARM
+           143 141 202 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190 204 90 200
+        
+        
+          BICOMP
+           143 141 202 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190 204 90 200
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hmac.c
+      
+        
+          ICCARM
+           24
+        
+        
+          BICOMP
+           121
+        
+      
+      
+        
+          ICCARM
+           143 141 195 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 209 194 208 190
+        
+        
+          BICOMP
+           143 141 195 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 209 194 208 190
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc.c
+      
+        
+          ICCARM
+           10
+        
+        
+          BICOMP
+           130
+        
+      
+      
+        
+          ICCARM
+           143 141
+        
+        
+          BICOMP
+           143 141
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hc128.c
+      
+        
+          ICCARM
+           32
+        
+        
+          BICOMP
+           132
+        
+      
+      
+        
+          ICCARM
+           143 141
+        
+        
+          BICOMP
+           143 141
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md5.c
+      
+        
+          ICCARM
+           39
+        
+        
+          BICOMP
+           112
+        
+      
+      
+        
+          ICCARM
+           143 141 209 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
+        
+        
+          BICOMP
+           143 141 209 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asm.c
+      
+        
+          ICCARM
+           12
+        
+        
+          BICOMP
+           58
+        
+      
+      
+        
+          ICCARM
+           143 141
+        
+        
+          BICOMP
+           143 141
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\blake2b.c
+      
+        
+          ICCARM
+           25
+        
+        
+          BICOMP
+           40
+        
+      
+      
+        
+          ICCARM
+           143 141
+        
+        
+          BICOMP
+           143 141
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\camellia.c
+      
+        
+          ICCARM
+           20
+        
+        
+          BICOMP
+           48
+        
+      
+      
+        
+          ICCARM
+           143 141
+        
+        
+          BICOMP
+           143 141
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\integer.c
+      
+        
+          ICCARM
+           29
+        
+        
+          BICOMP
+           123
+        
+      
+      
+        
+          ICCARM
+           143 141 176 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 185 191 193
+        
+        
+          BICOMP
+           143 141 176 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 185 191 193
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md4.c
+      
+        
+          ICCARM
+           38
+        
+        
+          BICOMP
+           122
+        
+      
+      
+        
+          ICCARM
+           143 141 180 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
+        
+        
+          BICOMP
+           143 141 180 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\random.c
+      
+        
+          ICCARM
+           47
+        
+        
+          BICOMP
+           117
+        
+      
+      
+        
+          ICCARM
+           143 141 182 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 163 190
+        
+        
+          BICOMP
+           143 141 182 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 163 190
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\src\tls.c
+      
+        
+          ICCARM
+           9
+        
+        
+          BICOMP
+           65
+        
+      
+      
+        
+          ICCARM
+           143 141 137 162 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190
+        
+        
+          BICOMP
+           143 141 137 162 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory.c
+      
+        
+          ICCARM
+           66
+        
+        
+          BICOMP
+           109
+        
+      
+      
+        
+          ICCARM
+           143 141 178 164 106 107 149 139 155 154 138 136 190 181 186 188 161 183 172 165 166 173 167 168
+        
+        
+          BICOMP
+           143 141 178 164 106 107 149 139 155 154 138 136 190 181 186 188 161 183 172 165 166 173 167 168
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dh.c
+      
+        
+          ICCARM
+           21
+        
+        
+          BICOMP
+           60
+        
+      
+      
+        
+          ICCARM
+           143 141 196 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 176 185 191 193 182 163 190 179 187 169
+        
+        
+          BICOMP
+           143 141 196 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 176 185 191 193 182 163 190 179 187 169
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\aes.c
+      
+        
+          ICCARM
+           33
+        
+        
+          BICOMP
+           49
+        
+      
+      
+        
+          ICCARM
+           143 141 206 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190 204 90 200
+        
+        
+          BICOMP
+           143 141 206 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190 204 90 200
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\compress.c
+      
+        
+          ICCARM
+           19
+        
+        
+          BICOMP
+           46
+        
+      
+      
+        
+          ICCARM
+           143 141
+        
+        
+          BICOMP
+           143 141
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\misc.c
+      
+        
+          ICCARM
+           126
+        
+        
+          BICOMP
+           125
+        
+      
+      
+        
+          ICCARM
+           143 141 200 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
+        
+        
+          BICOMP
+           143 141 200 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\port.c
+      
+        
+          ICCARM
+           50
+        
+        
+          BICOMP
+           131
+        
+      
+      
+        
+          ICCARM
+           143 141 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190
+        
+        
+          BICOMP
+           143 141 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\arc4.c
+      
+        
+          ICCARM
+           17
+        
+        
+          BICOMP
+           45
+        
+      
+      
+        
+          ICCARM
+           143 141 163 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
+        
+        
+          BICOMP
+           143 141 163 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asn.c
+      
+        
+          ICCARM
+           37
+        
+        
+          BICOMP
+           52
+        
+      
+      
+        
+          ICCARM
+           143 141 176 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 185 191 193 211 207 182 163 196 192 194 209 177 210 198 199 190 203 170 208 201 204 189
+        
+        
+          BICOMP
+           143 141 176 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 185 191 193 211 207 182 163 196 192 194 209 177 210 198 199 190 203 170 208 201 204 189
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\coding.c
+      
+        
+          ICCARM
+           34
+        
+        
+          BICOMP
+           57
+        
+      
+      
+        
+          ICCARM
+           143 141 198 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190 204
+        
+        
+          BICOMP
+           143 141 198 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190 204
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc_fp.c
+      
+        
+          ICCARM
+           22
+        
+        
+          BICOMP
+           120
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\CyaSSL\SSL-NB.c
+      
+        
+          ICCARM
+           18
+        
+        
+          BICOMP
+           44
+        
+      
+      
+        
+          ICCARM
+           143 141 8 106 107 149 139 155 154 138 136 151 188 161 5 6 28 15 27 13 156 150 146 148 153 152 144 158 160 108 140 147 159 157 137 162 184 181 186 178 164 183 172 165 166 173 167 168 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 145
+        
+        
+          BICOMP
+           143 141 8 106 107 149 139 155 154 138 136 151 188 161 5 6 28 15 27 13 156 150 146 148 153 152 144 158 160 108 140 147 159 157 137 162 184 181 186 178 164 183 172 165 166 173 167 168 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 145
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\src\internal.c
+      
+        
+          ICCARM
+           23
+        
+        
+          BICOMP
+           53
+        
+      
+      
+        
+          ICCARM
+           143 141 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 137 162 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190 189
+        
+        
+          BICOMP
+           143 141 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 137 162 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190 189
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\CyaSSL\HTTPS-NB.c
+      
+        
+          ICCARM
+           31
+        
+        
+          BICOMP
+           134
+        
+      
+      
+        
+          ICCARM
+           143 141 8 106 107 149 139 155 154 138 136 151 188 161 5 6 28 15 27 13 156 150 146 148 153 152 144 158 160 108 140 147 159 157 137 162 178 164 145 174
+        
+        
+          BICOMP
+           143 141 8 106 107 149 139 155 154 138 136 151 188 161 5 6 28 15 27 13 156 150 146 148 153 152 144 158 160 108 140 147 159 157 137 162 178 164 145 174
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\src\io.c
+      
+        
+          ICCARM
+           14
+        
+        
+          BICOMP
+           115
+        
+      
+      
+        
+          ICCARM
+           143 141 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 137 162 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190 5 6 28 15 27 13 8 151 156 150 146 148 153 152 144 158 160 108 140 147 159 157 145
+        
+        
+          BICOMP
+           143 141 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 137 162 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190 5 6 28 15 27 13 8 151 156 150 146 148 153 152 144 158 160 108 140 147 159 157 145
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\src\ssl.c
+      
+        
+          ICCARM
+           35
+        
+        
+          BICOMP
+           55
+        
+      
+      
+        
+          ICCARM
+           143 141 137 162 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190 198
+        
+        
+          BICOMP
+           143 141 137 162 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190 198
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\src\keys.c
+      
+        
+          ICCARM
+           61
+        
+        
+          BICOMP
+           51
+        
+      
+      
+        
+          ICCARM
+           143 141 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 137 162 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190
+        
+        
+          BICOMP
+           143 141 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 137 162 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\CyaSSL\HTTPS-maic.c
+      
+        
+          ICCARM
+           63
+        
+        
+          BICOMP
+           56
+        
+      
+      
+        
+          ICCARM
+           5 6 28 15 27 13 8 106 107 149 139 155 154 138 136 151 156 150 146 148 153 152 144 158 160 108 140 147 159 157 143 141 137 162 178 164 145 174 142
+        
+        
+          BICOMP
+           5 6 28 15 27 13 8 106 107 149 139 155 154 138 136 151 156 150 146 148 153 152 144 158 160 108 140 147 159 157 143 141 137 162 178 164 145 174 142
+        
+      
+    
+  
+  
+    Release
+    
+    
+      [MULTI_TOOL]
+      ILINK
+    
+  
+
+
+
diff --git a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewd b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewd
new file mode 100644
index 000000000..258cae677
--- /dev/null
+++ b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewd
@@ -0,0 +1,2601 @@
+
+
+
+  2
+  
+    Debug
+    
+      ARM
+    
+    1
+    
+      C-SPY
+      2
+      
+        25
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      ARMSIM_ID
+      2
+      
+        1
+        1
+        1
+        
+        
+        
+        
+      
+    
+    
+      ANGEL_ID
+      2
+      
+        0
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      CMSISDAP_ID
+      2
+      
+        0
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      GDBSERVER_ID
+      2
+      
+        0
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      IARROM_ID
+      2
+      
+        1
+        1
+        1
+        
+        
+        
+        
+        
+      
+    
+    
+      IJET_ID
+      2
+      
+        2
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      JLINK_ID
+      2
+      
+        15
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      LMIFTDI_ID
+      2
+      
+        2
+        1
+        1
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      MACRAIGOR_ID
+      2
+      
+        3
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      PEMICRO_ID
+      2
+      
+        1
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      RDI_ID
+      2
+      
+        2
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      STLINK_ID
+      2
+      
+        2
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      THIRDPARTY_ID
+      2
+      
+        0
+        1
+        1
+        
+        
+        
+        
+      
+    
+    
+      XDS100_ID
+      2
+      
+        2
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      
+        $TOOLKIT_DIR$\plugins\middleware\HCCWare\HCCWare.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\AVIX\AVIX.ENU.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\MQX\MQXRtosPlugin.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB6_Plugin.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+        0
+      
+      
+        $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+        1
+      
+      
+        $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+        0
+      
+      
+        $EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin
+        1
+      
+      
+        $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+        0
+      
+    
+  
+  
+    Release
+    
+      ARM
+    
+    0
+    
+      C-SPY
+      2
+      
+        25
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      ARMSIM_ID
+      2
+      
+        1
+        1
+        0
+        
+        
+        
+        
+      
+    
+    
+      ANGEL_ID
+      2
+      
+        0
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      CMSISDAP_ID
+      2
+      
+        0
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      GDBSERVER_ID
+      2
+      
+        0
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      IARROM_ID
+      2
+      
+        1
+        1
+        0
+        
+        
+        
+        
+        
+      
+    
+    
+      IJET_ID
+      2
+      
+        2
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      JLINK_ID
+      2
+      
+        15
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      LMIFTDI_ID
+      2
+      
+        2
+        1
+        0
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      MACRAIGOR_ID
+      2
+      
+        3
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      PEMICRO_ID
+      2
+      
+        1
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      RDI_ID
+      2
+      
+        2
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      STLINK_ID
+      2
+      
+        2
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      THIRDPARTY_ID
+      2
+      
+        0
+        1
+        0
+        
+        
+        
+        
+      
+    
+    
+      XDS100_ID
+      2
+      
+        2
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      
+        $TOOLKIT_DIR$\plugins\middleware\HCCWare\HCCWare.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\AVIX\AVIX.ENU.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\MQX\MQXRtosPlugin.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB6_Plugin.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin
+        0
+      
+      
+        $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin
+        0
+      
+      
+        $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin
+        1
+      
+      
+        $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin
+        0
+      
+      
+        $EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin
+        1
+      
+      
+        $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin
+        0
+      
+    
+  
+
+
+
diff --git a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
new file mode 100644
index 000000000..6ab3883f3
--- /dev/null
+++ b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
@@ -0,0 +1,2015 @@
+
+
+
+  2
+  
+    Debug
+    
+      ARM
+    
+    1
+    
+      General
+      3
+      
+        22
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      ICCARM
+      2
+      
+        29
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      AARM
+      2
+      
+        9
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      OBJCOPY
+      0
+      
+        1
+        1
+        1
+        
+        
+        
+        
+        
+      
+    
+    
+      CUSTOM
+      3
+      
+        
+        
+      
+    
+    
+      BICOMP
+      0
+      
+    
+    
+      BUILDACTION
+      1
+      
+        
+        
+      
+    
+    
+      ILINK
+      0
+      
+        16
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      IARCHIVE
+      0
+      
+        0
+        1
+        1
+        
+        
+        
+      
+    
+    
+      BILINK
+      0
+      
+    
+  
+  
+    Release
+    
+      ARM
+    
+    0
+    
+      General
+      3
+      
+        22
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      ICCARM
+      2
+      
+        29
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      AARM
+      2
+      
+        9
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      OBJCOPY
+      0
+      
+        1
+        1
+        0
+        
+        
+        
+        
+        
+      
+    
+    
+      CUSTOM
+      3
+      
+        
+        
+      
+    
+    
+      BICOMP
+      0
+      
+    
+    
+      BUILDACTION
+      1
+      
+        
+        
+      
+    
+    
+      ILINK
+      0
+      
+        16
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      IARCHIVE
+      0
+      
+        0
+        1
+        0
+        
+        
+        
+      
+    
+    
+      BILINK
+      0
+      
+    
+  
+  
+    Apps
+    
+      $PROJ_DIR$\..\..\CyaSSL\HTTPS-maic.c
+    
+    
+      $PROJ_DIR$\..\..\CyaSSL\HTTPS-NB.c
+    
+    
+      $PROJ_DIR$\..\..\CyaSSL\SSL-NB.c
+    
+  
+  
+    CyaSSL
+    
+      $PROJ_DIR$\..\..\..\..\src\internal.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\src\io.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\src\keys.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\src\ssl.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\src\tls.c
+    
+  
+  
+    wolfCrypt
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\aes.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\arc4.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asm.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asn.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\blake2b.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\camellia.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\coding.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\compress.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\des3.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dh.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dsa.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc_fp.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\error.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hc128.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hmac.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\integer.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\logging.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md2.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md4.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md5.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory-orig.c
+      
+        Debug
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\misc.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\port.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\pwdbased.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rabbit.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\random.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ripemd.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rsa.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha256.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha512.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\tfm.c
+    
+  
+
+
+
diff --git a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.eww b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.eww
new file mode 100644
index 000000000..17ce82d66
--- /dev/null
+++ b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.eww
@@ -0,0 +1,10 @@
+
+
+
+  
+    $WS_DIR$\CyaSSL-Lib.ewp
+  
+  
+
+
+
diff --git a/ctaocrypt/src/random.c b/ctaocrypt/src/random.c
index 03dd75553..f88aab83b 100644
--- a/ctaocrypt/src/random.c
+++ b/ctaocrypt/src/random.c
@@ -51,7 +51,8 @@
     #include 
     #include 
 #else
-    #if !defined(NO_DEV_RANDOM) && !defined(CYASSL_MDK_ARM) 
+    #if !defined(NO_DEV_RANDOM) && !defined(CYASSL_MDK_ARM) \
+                                && !defined(CYASSL_IAR_ARM)
             #include 
         #ifndef EBSNET
             #include 
@@ -484,7 +485,8 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
     return 0;
 }
 
-#elif defined(CYASSL_SAFERTOS) || defined(CYASSL_LEANPSK)
+#elif defined(CYASSL_SAFERTOS) || defined(CYASSL_LEANPSK) \
+   || defined(CYASSL_IAR_ARM)                               
 
 #warning "write a real random seed!!!!, just for testing now"
 
diff --git a/cyassl/ctaocrypt/settings.h b/cyassl/ctaocrypt/settings.h
index 22dea06d0..07926942b 100644
--- a/cyassl/ctaocrypt/settings.h
+++ b/cyassl/ctaocrypt/settings.h
@@ -81,6 +81,8 @@
 /* Uncomment next line if using QL SEP settings */
 /* #define CYASSL_QL */
 
+/* Uncomment next line if using LwIP native TCP socket settings */
+/* #define HAVE_LWIP_NATIVE */
 
 #include 
 
@@ -114,6 +116,14 @@
     #include "nx_api.h"
 #endif
 
+#if defined(HAVE_LWIP_NATIVE) /* using LwIP native TCP socket */
+    #define CYASSL_LWIP
+    #define NO_WRITEV
+    #define SINGLE_THREADED
+    #define CYASSL_USER_IO
+    #define NO_FILESYSTEM
+#endif 
+
 #ifdef MICROCHIP_PIC32
     #define SIZEOF_LONG_LONG 8
     #define SINGLE_THREADED
diff --git a/cyassl/internal.h b/cyassl/internal.h
index 085d2a393..44f6cd347 100644
--- a/cyassl/internal.h
+++ b/cyassl/internal.h
@@ -960,8 +960,11 @@ int  SetCipherList(Suites*, const char* list);
 #ifdef HAVE_NETX
     CYASSL_LOCAL int NetX_Receive(CYASSL *ssl, char *buf, int sz, void *ctx);
     CYASSL_LOCAL int NetX_Send(CYASSL *ssl, char *buf, int sz, void *ctx);
-#endif /* HAVE_NETX */
-
+#endif
+#ifdef HAVE_LWIP_NATIVE
+    CYASSL_LOCAL int CyaSSL_LwIP_Send(CYASSL* ssl, char *buf, int sz, void *cb);
+    CYASSL_LOCAL int CyaSSL_LwIP_Receive(CYASSL* ssl, char *buf, int sz, void *cb);
+#endif /* HAVE_{tcp stack} */
 
 /* CyaSSL Cipher type just points back to SSL */
 struct CYASSL_CIPHER {
@@ -1515,7 +1518,8 @@ typedef void (*hmacfp) (CYASSL*, byte*, const byte*, word32, int, int);
 
 /* client connect state for nonblocking restart */
 enum ConnectState {
-    CONNECT_BEGIN = 0,
+    CONNECT_INITIAL = 0,
+    CONNECT_BEGIN,
     CLIENT_HELLO_SENT,
     HELLO_AGAIN,               /* HELLO_AGAIN s for DTLS case */
     HELLO_AGAIN_REPLY,
diff --git a/cyassl/ssl.h b/cyassl/ssl.h
index 049e0d5eb..6f98483b8 100644
--- a/cyassl/ssl.h
+++ b/cyassl/ssl.h
@@ -675,7 +675,10 @@ enum { /* ssl Constants */
     SSL_R_SSLV3_ALERT_CERTIFICATE_UNKNOWN = 103,
     SSL_R_SSLV3_ALERT_BAD_CERTIFICATE     = 104,
 
-    PEM_BUFSIZE = 1024
+    PEM_BUFSIZE = 1024,
+    /* for non-blocking CyaSSL_connect */
+    SSL_CONNECTING = 201,      /* Ready for the next step */
+    SSL_CONNECT_WAITING = 202 /* Waiting for the response */
 };
 
 
diff --git a/src/internal.c b/src/internal.c
index 0f438dd1b..28e6b85b3 100644
--- a/src/internal.c
+++ b/src/internal.c
@@ -397,6 +397,11 @@ int InitSSL_Ctx(CYASSL_CTX* ctx, CYASSL_METHOD* method)
     ctx->CBIORecv = NetX_Receive;
     ctx->CBIOSend = NetX_Send;
 #endif
+#ifdef HAVE_LWIP_NATIVE
+    ctx->CBIORecv = CyaSSL_LwIP_Receive ;
+    ctx->CBIOSend = CyaSSL_LwIP_Send ;
+#endif
+
     ctx->partialWrite   = 0;
     ctx->verifyCallback = 0;
 
diff --git a/src/io.c b/src/io.c
index 55f28eed3..bb4bb1ec2 100644
--- a/src/io.c
+++ b/src/io.c
@@ -1045,3 +1045,111 @@ void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxSocket, ULONG waitOption)
 
 #endif /* HAVE_NETX */
 
+#ifdef HAVE_LWIP_NATIVE
+
+#include "lwip/tcp.h"
+#include "lwip/pbuf.h"
+#include "lwip/sockets.h"
+#include "SSL-NB.h"
+
+#if 0
+/*Enable debug*/
+#define DBG_PRINTF_CB(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
+#else
+/*Disable debug*/
+#define DBG_PRINTF_CB(x, ...)
+#endif
+
+void CyaSSL_PbufFree(struct pbuf *p)
+{
+    struct pbuf * next;
+    while(p->next != NULL)
+    {
+        next = p->next;
+        pbuf_free(p);   
+        p = next;
+    }    
+    pbuf_free(p);
+}
+
+static int CyaSSL_GetDataFromPbuf(char *buff, CYASSL_NB *ssl_nb, int size)
+{
+    struct pbuf *p ;
+    struct pbuf *p_next ;
+    int totalLen ;
+    int skipLen = 0 ;
+
+    p = ssl_nb->pbuf ;
+    if(p->tot_len < (ssl_nb->pulled + size))
+        return 0 ;
+    
+    while(p) { /* skip the part pulled before */
+        if(p->len && p->len > (ssl_nb->pulled - skipLen) ){ 
+            skipLen = (ssl_nb->pulled - skipLen) ;
+            break ;
+        } else {
+            skipLen += p->len ;
+            if(p->next)
+                p = p->next ;
+            else return 0 ;
+        }
+    } 
+    
+    totalLen = 0 ;
+    while(p){
+        if(p->len) {
+          if((p->len - skipLen) > (size - totalLen)) { /* buffer full */
+                memcpy(&buff[totalLen], (const char *)&(((char *)(p->payload))[skipLen]), size-totalLen) ;
+                totalLen = size  ;
+                break ;
+          } else {
+                memcpy(&buff[totalLen], (const char *)&(((char *)(p->payload))[skipLen]), p->len - skipLen) ;
+                totalLen += (p->len-skipLen) ;
+                skipLen = 0 ;
+          }
+        }
+        if(p->next){
+            p_next = p->next ;
+            p = p_next ;
+        } else break ;
+    }
+    ssl_nb->pulled += totalLen ;
+    if(ssl_nb->pbuf->tot_len <= ssl_nb->pulled) {
+        CyaSSL_PbufFree(ssl_nb->pbuf) ;
+        ssl_nb->pbuf = NULL ;
+        tcp_recved(ssl_nb->pcb,ssl_nb->pbuf->tot_len) ;
+    }
+    return totalLen;
+}
+
+int CyaSSL_LwIP_Receive(CYASSL* ssl, char *buf, int sz, void *cb)
+{
+    int ret ;
+    CYASSL_NB *ssl_nb ;
+    ssl_nb = (CYASSL_NB *)cb ;
+    DBG_PRINTF_CB("CyaSSL_LwIP_Receive: ssl_nb = %x\n", ssl_nb) ;  
+
+    if(ssl_nb->pbuf) {
+        DBG_PRINTF_CB("Received Len=%d, Want Len= %d\n", ssl_nb->pbuf->tot_len, sz) ;
+        ret = CyaSSL_GetDataFromPbuf(buf, ssl_nb, sz) ;
+        if(ret == 0)
+             ret = CYASSL_CBIO_ERR_WANT_READ ;
+    } else {
+        DBG_PRINTF_CB("No Received Data\n") ;
+        ret = CYASSL_CBIO_ERR_WANT_READ ;
+    }
+    return ret ;
+}
+
+int CyaSSL_LwIP_Send(CYASSL* ssl, char *buf, int sz, void *cb)
+{
+    CYASSL_NB *ssl_nb ;
+    ssl_nb = (CYASSL_NB *)cb ;
+    DBG_PRINTF_CB("CyaSSL_LwIP_Send: ssl_nb = %x\n", ssl_nb) ;
+    DBG_PRINTF_CB("Send buf[0,1,2,3]=%x,%x,%x,%x, sz=%d\n", buf[0], buf[1], buf[2], buf[3], sz) ;
+    tcp_write(ssl_nb->pcb, buf, sz, TCP_WRITE_FLAG_COPY) ;
+    return sz ;
+}
+#endif /* HAVE_LWIP_NATIVE */
+
+

From 168985ed9ff78971c8a1cdefafcae844b124c157 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Sun, 2 Feb 2014 18:09:25 +0900
Subject: [PATCH 18/43] LwIP native TCP Socket

---
 IDE/IAR-EWARM/CyaSSL/https-nb.c               |  385 ++++
 IDE/IAR-EWARM/CyaSSL/https-nb.h               |   71 +
 .../Projects/CyaSSL-Lib/CyaSSL-Lib.ewp        | 2012 +++++++++++++++++
 .../Projects/CyaSSL-Lib/CyaSSL-Lib.eww        |   10 +
 ctaocrypt/src/random.c                        |    6 +-
 cyassl/ctaocrypt/settings.h                   |   10 +
 cyassl/internal.h                             |   23 +-
 cyassl/ssl.h                                  |    4 +-
 src/internal.c                                |    9 +
 src/io.c                                      |  179 ++
 10 files changed, 2704 insertions(+), 5 deletions(-)
 create mode 100644 IDE/IAR-EWARM/CyaSSL/https-nb.c
 create mode 100644 IDE/IAR-EWARM/CyaSSL/https-nb.h
 create mode 100644 IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
 create mode 100644 IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.eww

diff --git a/IDE/IAR-EWARM/CyaSSL/https-nb.c b/IDE/IAR-EWARM/CyaSSL/https-nb.c
new file mode 100644
index 000000000..6f4da3de7
--- /dev/null
+++ b/IDE/IAR-EWARM/CyaSSL/https-nb.c
@@ -0,0 +1,385 @@
+/* HTTPS-NB.c
+ *
+ * Copyright (C) 2006-2014 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+ 
+#include 
+ 
+#if defined(CYASSL_MDK_ARM)
+      #include 
+        #include 
+        #include 
+        #include "cyassl_MDK_ARM.h"
+#endif
+
+#if defined(CYASSL_IAR_ARM)
+    #include 
+    #include 
+#endif
+
+#if defined(CYASSL_LWIP)
+#include "lwip/tcp.h"
+#include "lwip/sockets.h"
+#endif
+
+#include 
+#include 
+#include 
+#include 
+#include "https-nb.h"
+
+#if 0
+/*Enable debug*/
+#include 
+#define DBG_PRINTF(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
+#else
+/*Disable debug*/
+#define DBG_PRINTF(x, ...)
+#endif
+
+#define ERR_PRINTF(x, ...) printf("[HTTPSClient:ERROR]"x"\r\n", ##__VA_ARGS__);
+ 
+static int CyaSSL_cb_mutex = 0 ; 
+
+static unsigned long localPort = 0 ;
+static unsigned long getPort(void) {
+      return (localPort++ + 0x200) & 0x7fff ;
+}
+
+static err_t DataConnectedCallback (void *arg, struct tcp_pcb *pcb, s8_t err)
+{
+    DBG_PRINTF("DataConnectedCallback(arg=%x, pcb=%x, err=%x)\n", arg, pcb, err) ;
+    *(enum HTTPS_Stat *)arg = TCP_CONNECTED ;
+    return ERR_OK;
+}
+
+static err_t DataSentCallback (void *arg, struct tcp_pcb *pcb, u16_t err)
+{
+    DBG_PRINTF("LwIPtest: Data Sent(SentCallBack1)\n") ;
+    return ERR_OK;
+}
+
+static err_t DataReceiveCallback(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
+{
+    struct pbuf *next ;
+    CYASSL *ssl ;
+    ssl = (CYASSL *)arg ;
+    
+    DBG_PRINTF("LwIPtest: Data Received(DataReceiveCallback), pbuf->len=%d, err=%d\n", p->tot_len , err) ;
+    
+    if(p==0) { /* throw away */
+        return ERR_OK ;
+    }
+    if(*(enum HTTPS_Stat *)(ssl->lwipCtx.arg) == WAITING) {
+        *(enum HTTPS_Stat *)(ssl->lwipCtx.arg) = HTTP_RECEIVE ;
+    } else { 
+        CyaSSL_PbufFree(p) ;
+        tcp_recved(pcb,p->tot_len) ;
+        return ERR_OK ;
+    }
+    /* put it into the queue */
+    if(ssl->lwipCtx.pbuf) {
+        next = ssl->lwipCtx.pbuf ;
+        while(1) {
+            DBG_PRINTF("pbuf=%x, pbuf->next=%x, ",ssl->lwipCtx.pbuf, next) ;
+            if(next->next)
+                next = next->next ;
+            else break ;
+        }
+        next->next = p ;
+        ssl->lwipCtx.pbuf->tot_len += p->tot_len ;
+    } else {
+        ssl->lwipCtx.pbuf = p ;
+    }
+    ssl->lwipCtx.pulled = 0 ;
+
+    if(ssl->lwipCtx.wait < 0)
+        ssl->lwipCtx.wait = 1000 ;
+    ssl->lwipCtx.pulled = 0 ;
+    return ERR_OK;
+}
+
+static int count = 0 ;
+
+void CyaSSL_HTTPS_Client_NB_init(void *nb, 
+     struct ip_addr svIP, unsigned long svPort, char *host, char *path)
+{
+    CYASSL_HTTPS_NB *https_nb ;
+    https_nb = (CYASSL_HTTPS_NB *)nb ;
+    
+    https_nb->serverIP_em = svIP ;
+    https_nb->serverPort = svPort ;
+    https_nb->hostname = host ;
+    https_nb->path = path ;
+    https_nb->stat = BEGIN ;
+}
+
+int CyaSSL_HTTPS_Client_NB(void *nb)
+{
+    int ret ;
+    CYASSL_HTTPS_NB *https_nb ;
+    
+    https_nb = (CYASSL_HTTPS_NB *)nb ;
+    
+    CyaSSL_Debugging_ON() ; 
+
+    switch(https_nb->stat) {
+    case BEGIN:
+        printf("======= LwIP: HTTPS Client Test(%x): %d =========\n", nb, count ++) ;
+        {
+             void * p ;
+             p = (void *)malloc(1) ;
+             printf("Watermark=%x\n", p) ;
+             free(p) ;
+        }
+        /*** Assuming LwIP has been initialized ***/
+        https_nb->stat = INITIALIZED ; 
+    case INITIALIZED:
+        https_nb->pcb = tcp_new();
+        if(https_nb->pcb) {
+    	        tcp_arg(https_nb->pcb, (void *)&(https_nb->stat)) ;    
+                DBG_PRINTF("LwIPtest: New PCB(tcp_new=%x), &https->stat=%x\n", https_nb->pcb, &https_nb->stat) ;
+        } else {
+    	    ERR_PRINTF("tcp_new, ret=%d\n", https_nb->pcb) ;
+            https_nb->stat = IDLE ;
+    	    return !ERR_OK ;
+        }
+
+        tcp_arg(https_nb->pcb, (void *)&https_nb->stat) ;
+
+        https_nb->localPort = getPort() ;
+        DBG_PRINTF("local Port=%d\n", https_nb->localPort) ;
+        ret = tcp_bind (https_nb->pcb, &(https_nb->localIP_em),
+                        https_nb->localPort) ;
+        if(ret == ERR_OK) {
+            https_nb->stat = TCP_CONNECT ;
+            return ERR_OK;
+        } else {
+    	    ERR_PRINTF("tcp_bind, ret=%d\n", ret) ;
+            https_nb->stat = INITIALIZED ;
+            return !ERR_OK ;
+        }
+
+    case TCP_CONNECT:
+        if(CyaSSL_cb_mutex)return ERR_OK ;
+        else CyaSSL_cb_mutex = 1 ;
+        DBG_PRINTF("LwIPtest: TCP_CONNECT(%x)\n", https_nb) ;
+        DBG_PRINTF("LwIPtest: Server IP Addrress(%d.%d.%d.%d)\n", 
+              (*(unsigned long *)&https_nb->serverIP_em&0xff),
+              (*(unsigned long *)&https_nb->serverIP_em>>8)&0xff, 
+              (*(unsigned long *)&https_nb->serverIP_em>>16)&0xff, 
+              (*(unsigned long *)&https_nb->serverIP_em>>24)&0xff) ;
+        ret = tcp_connect(https_nb->pcb, &(https_nb->serverIP_em),
+                          https_nb->serverPort, DataConnectedCallback); 
+ 
+        if(ret == ERR_OK) {
+    	     https_nb->stat = WAITING ;
+             return ERR_OK;
+        } else {
+    	    ERR_PRINTF("tcp_connect, ret=%d\n", ret) ;
+            https_nb->stat = TCP_CLOSE ;
+    	    return !ERR_OK;
+        }
+        
+    case TCP_CONNECTED:
+        printf("LwIPtest: TCP CONNECTED(%x)\n", https_nb) ;
+        CyaSSL_cb_mutex = 0 ; 
+
+        /*CyaSSLv3_client_method()
+        CyaTLSv1_client_method()
+        CyaTLSv1_1_client_method()
+        CyaTLSv1_2_client_method() */
+        https_nb->ctx = CyaSSL_CTX_new(CyaTLSv1_2_client_method());
+        if (https_nb->ctx == NULL) {
+            ERR_PRINTF("CyaSSL_CTX_new: unable to get ctx");
+            return !ERR_OK ;
+        }
+    
+        CyaSSL_CTX_set_verify(https_nb->ctx, SSL_VERIFY_NONE, 0);
+
+        https_nb->ssl = CyaSSL_new(https_nb->ctx);
+        if (https_nb->ssl == NULL) {
+            ERR_PRINTF("CyaSSL_new: unable to get SSL object");
+            return !ERR_OK ;
+        }
+        
+        CyaSSL_SetIO_LwIP(https_nb->ssl, https_nb->pcb);
+        CyaSSL_SetVersion(https_nb->ssl, CYASSL_TLSV1_2) ;
+        https_nb->stat = SSL_CONN ;      
+        
+    case SSL_CONN: /* handshaking */
+
+        if(CyaSSL_cb_mutex) return ERR_OK ;
+        ret = CyaSSL_connect(https_nb->ssl); 
+        DBG_PRINTF("LwIPtest: SSL Connecting(CyaSSL_connect), ret = %d\n", ret) ;
+        if(ret == SSL_SUCCESS) {
+            https_nb->stat = SSL_CONN_WAITING ;
+            DBG_PRINTF("LwIPtest: SSL Connected\n") ;
+            https_nb->stat = HTTP_SEND ;
+        } else {
+            ret = CyaSSL_get_error(https_nb->ssl, NULL) ;
+            if(ret == SSL_ERROR_WANT_READ) {
+                https_nb->ssl->lwipCtx.wait = -1 ;
+                https_nb->stat = SSL_CONN_WAITING ;
+                return ERR_OK ;
+            } else {
+                ERR_PRINTF("CyaSSL_connecting_NB:ssl=%x, ret=%d\n", https_nb->ssl, ret) ;   
+                return !ERR_OK ;
+            }
+        }
+        return ERR_OK ;
+        
+    case SSL_CONN_WAITING:
+        if(https_nb->ssl->lwipCtx.wait-- == 0) { /* counting down after the callback 
+               for multiple callbacks */
+            https_nb->stat = SSL_CONN ;
+            CyaSSL_cb_mutex = 0 ; 
+        }
+        return ERR_OK ;
+    
+    case HTTP_SEND: 
+    {
+        #define SEND_BUFF_SIZE 100
+        char sendBuff[SEND_BUFF_SIZE] ;    
+        int size ;
+        if(CyaSSL_cb_mutex)return ERR_OK ;
+        else CyaSSL_cb_mutex = 1 ; /* lock */
+        printf("LwIPtest: SSL CONNECTED(%x)\n", https_nb) ;
+        CyaSSL_NB_setCallbackArg(https_nb->ssl, &(https_nb->stat)) ;
+        tcp_sent(https_nb->pcb, DataSentCallback); 
+        tcp_recv(https_nb->pcb, DataReceiveCallback); 
+
+        DBG_PRINTF("LwIPtest: HTTPS GET(%x)\n", https_nb) ;
+        sprintf(sendBuff,
+                "GET %s HTTP/1.0\r\nHost: %s\r\nConnection: close\r\n\r\n", 
+                https_nb->path, https_nb->hostname) ;
+        size = strlen((char const *)sendBuff) ;
+        
+        CyaSSL_write(https_nb->ssl, sendBuff, size) ;
+
+        https_nb->stat = WAITING ;
+        return ERR_OK;
+    }
+      
+    case HTTP_RECEIVE: 
+    {
+        #define HTTP_BUFF_SIZE 2048
+        char httpbuff[HTTP_BUFF_SIZE] ;
+        
+        CyaSSL_cb_mutex = 0 ;
+        memset(httpbuff, '\0', HTTP_BUFF_SIZE) ;
+        ret = CyaSSL_read(https_nb->ssl, httpbuff, HTTP_BUFF_SIZE) ;
+        printf("LwIPtest: HTTPS GET(%x), Received(%d)\n",https_nb, strlen(httpbuff)) ;
+        /* puts(httpbuff) ;*/ 
+        puts("===================\n") ; 
+    }
+    case SSL_CLOSE:  
+    {
+        CYASSL_CTX *ctx ; ;
+    
+        ctx = https_nb->ssl->ctx ;
+        DBG_PRINTF("CyaSSL_close(%x)", https_nb->ssl) ;
+        CyaSSL_shutdown(https_nb->ssl);
+        CyaSSL_free(https_nb->ssl);
+        CyaSSL_CTX_free(ctx); ;
+        https_nb->stat = TCP_CLOSE ;
+    }
+    case TCP_CLOSE:
+        tcp_close(https_nb->pcb) ;
+ 
+        https_nb->idle = 0 ;
+        https_nb->stat = IDLE ;
+
+    case IDLE:
+        https_nb->idle ++ ;
+        if(https_nb->idle > 50000)
+            https_nb->stat = BEGIN ;
+    case WAITING:
+    default:
+        return ERR_OK;
+    }
+}
+
+/*********************************************************************/
+/*
+    Usage Example:
+        CyaSSL_HTTPS_Client_NB_init
+        CyaSSL_HTTPS_Client_NB
+                                                                     */
+/*********************************************************************/
+
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_1 ;
+void *CyaSSL_HTTPS_ClientP_1 = (void *)&CyaSSL_HTTPS_Client_1 ;
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_2 ;
+void *CyaSSL_HTTPS_ClientP_2 = (void *)&CyaSSL_HTTPS_Client_2 ;
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_3 ;
+void *CyaSSL_HTTPS_ClientP_3 = (void *)&CyaSSL_HTTPS_Client_3 ;
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_4 ;
+void *CyaSSL_HTTPS_ClientP_4 = (void *)&CyaSSL_HTTPS_Client_4 ;
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_5 ;
+void *CyaSSL_HTTPS_ClientP_5 = (void *)&CyaSSL_HTTPS_Client_5 ;
+
+
+#define HTTPS_PORT   443
+#define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
+static struct ip_addr server_em = { IP_ADDR(192,168,11,9) } ;
+
+
+void HTTPSClient_main_init() {
+
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_1, 
+                           server_em, HTTPS_PORT, "xxx.com", "/") ;
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_2, 
+                              server_em, HTTPS_PORT, "xxx.com", "/") ;
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_3, 
+                              server_em, HTTPS_PORT, "xxx.com", "/") ;
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_4, 
+                              server_em, HTTPS_PORT, "xxx.com", "/") ;
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_5, 
+                              server_em, HTTPS_PORT, "xxx.com", "/") ;  
+}
+ 
+void HTTPSClient_main(int i)
+{
+   
+    if((i % 1) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_1) ;
+    }
+
+    if((i % 2) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_2) ;
+    }
+
+    if((i % 3) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_3) ;
+    }
+
+    if((i % 4) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_4) ;
+    }
+
+    if((i % 5) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_5) ;
+    }
+
+}
\ No newline at end of file
diff --git a/IDE/IAR-EWARM/CyaSSL/https-nb.h b/IDE/IAR-EWARM/CyaSSL/https-nb.h
new file mode 100644
index 000000000..978ccb028
--- /dev/null
+++ b/IDE/IAR-EWARM/CyaSSL/https-nb.h
@@ -0,0 +1,71 @@
+/* HTTPS-NB.h
+ *
+ * Copyright (C) 2006-2014 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+extern int CyaSSL_GetDataFromPbuf(char *buff, struct pbuf *p, int size) ;
+
+#define IP4_LONG_2_ADDR(ipaddr, iplong) \
+        (ipaddr)->addr = htonl(((u32_t)(iplong) & 0xFF000000) | \
+                               ((u32_t)(iplong) & 0xFF0000)   | \
+                               ((u32_t)(iplong) & 0xFF00)     | \
+                                (u32_t)(iplong) & 0xFF)
+
+#define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
+
+enum HTTPS_Stat {
+    BEGIN,
+    GET_MYIP,
+    INITIALIZED,
+    TCP_CONNECT,
+    TCP_CONNECTED,
+    SSL_INIT,
+    SSL_CONN,
+    SSL_CONN_WAITING,
+    HTTP_SEND,
+    HTTP_RECEIVE,
+    HTTP_DONE,
+    SSL_CLOSE,
+    TCP_CLOSE,
+    WAITING,
+    IDLE
+} ;
+
+
+#define HTTPS_PORT 443
+
+typedef struct {
+    CYASSL *ssl ;
+    CYASSL_CTX *ctx ;
+    enum HTTPS_Stat stat ;
+    struct tcp_pcb * pcb ;
+    unsigned long ipaddress ;
+    struct ip_addr localIP_em;
+    unsigned long localPort ;
+    struct ip_addr serverIP_em ;
+    unsigned long serverPort ;
+    char   *hostname ;
+    char   *path ;
+    int    idle ;
+    int    wait_cnt ; /* wait tick counter */
+} CYASSL_HTTPS_NB ;
+
+extern void CyaSSL_HTTPS_Client_NB_init(void *nb, 
+     struct ip_addr svIP, unsigned long svPort, char *host, char *path) ;
+extern int CyaSSL_HTTPS_Client_NB(void *nb) ;
\ No newline at end of file
diff --git a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
new file mode 100644
index 000000000..c9d8e1473
--- /dev/null
+++ b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
@@ -0,0 +1,2012 @@
+
+
+
+  2
+  
+    Debug
+    
+      ARM
+    
+    1
+    
+      General
+      3
+      
+        22
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      ICCARM
+      2
+      
+        29
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      AARM
+      2
+      
+        9
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      OBJCOPY
+      0
+      
+        1
+        1
+        1
+        
+        
+        
+        
+        
+      
+    
+    
+      CUSTOM
+      3
+      
+        
+        
+      
+    
+    
+      BICOMP
+      0
+      
+    
+    
+      BUILDACTION
+      1
+      
+        
+        
+      
+    
+    
+      ILINK
+      0
+      
+        16
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      IARCHIVE
+      0
+      
+        0
+        1
+        1
+        
+        
+        
+      
+    
+    
+      BILINK
+      0
+      
+    
+  
+  
+    Release
+    
+      ARM
+    
+    0
+    
+      General
+      3
+      
+        22
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      ICCARM
+      2
+      
+        29
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      AARM
+      2
+      
+        9
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      OBJCOPY
+      0
+      
+        1
+        1
+        0
+        
+        
+        
+        
+        
+      
+    
+    
+      CUSTOM
+      3
+      
+        
+        
+      
+    
+    
+      BICOMP
+      0
+      
+    
+    
+      BUILDACTION
+      1
+      
+        
+        
+      
+    
+    
+      ILINK
+      0
+      
+        16
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      IARCHIVE
+      0
+      
+        0
+        1
+        0
+        
+        
+        
+      
+    
+    
+      BILINK
+      0
+      
+    
+  
+  
+    Apps
+    
+      $PROJ_DIR$\..\..\CyaSSL\https-maic.c
+    
+    
+      $PROJ_DIR$\..\..\CyaSSL\https-nb.c
+    
+  
+  
+    CyaSSL
+    
+      $PROJ_DIR$\..\..\..\..\src\internal.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\src\io.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\src\keys.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\src\ssl.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\src\tls.c
+    
+  
+  
+    wolfCrypt
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\aes.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\arc4.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asm.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asn.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\blake2b.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\camellia.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\coding.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\compress.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\des3.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dh.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dsa.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc_fp.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\error.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hc128.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hmac.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\integer.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\logging.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md2.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md4.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md5.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory-orig.c
+      
+        Debug
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\misc.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\port.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\pwdbased.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rabbit.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\random.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ripemd.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rsa.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha256.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha512.c
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\tfm.c
+    
+  
+
+
+
diff --git a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.eww b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.eww
new file mode 100644
index 000000000..17ce82d66
--- /dev/null
+++ b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.eww
@@ -0,0 +1,10 @@
+
+
+
+  
+    $WS_DIR$\CyaSSL-Lib.ewp
+  
+  
+
+
+
diff --git a/ctaocrypt/src/random.c b/ctaocrypt/src/random.c
index 03dd75553..f88aab83b 100644
--- a/ctaocrypt/src/random.c
+++ b/ctaocrypt/src/random.c
@@ -51,7 +51,8 @@
     #include 
     #include 
 #else
-    #if !defined(NO_DEV_RANDOM) && !defined(CYASSL_MDK_ARM) 
+    #if !defined(NO_DEV_RANDOM) && !defined(CYASSL_MDK_ARM) \
+                                && !defined(CYASSL_IAR_ARM)
             #include 
         #ifndef EBSNET
             #include 
@@ -484,7 +485,8 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
     return 0;
 }
 
-#elif defined(CYASSL_SAFERTOS) || defined(CYASSL_LEANPSK)
+#elif defined(CYASSL_SAFERTOS) || defined(CYASSL_LEANPSK) \
+   || defined(CYASSL_IAR_ARM)                               
 
 #warning "write a real random seed!!!!, just for testing now"
 
diff --git a/cyassl/ctaocrypt/settings.h b/cyassl/ctaocrypt/settings.h
index 22dea06d0..07926942b 100644
--- a/cyassl/ctaocrypt/settings.h
+++ b/cyassl/ctaocrypt/settings.h
@@ -81,6 +81,8 @@
 /* Uncomment next line if using QL SEP settings */
 /* #define CYASSL_QL */
 
+/* Uncomment next line if using LwIP native TCP socket settings */
+/* #define HAVE_LWIP_NATIVE */
 
 #include 
 
@@ -114,6 +116,14 @@
     #include "nx_api.h"
 #endif
 
+#if defined(HAVE_LWIP_NATIVE) /* using LwIP native TCP socket */
+    #define CYASSL_LWIP
+    #define NO_WRITEV
+    #define SINGLE_THREADED
+    #define CYASSL_USER_IO
+    #define NO_FILESYSTEM
+#endif 
+
 #ifdef MICROCHIP_PIC32
     #define SIZEOF_LONG_LONG 8
     #define SINGLE_THREADED
diff --git a/cyassl/internal.h b/cyassl/internal.h
index 104a9c1cd..9c903814a 100644
--- a/cyassl/internal.h
+++ b/cyassl/internal.h
@@ -960,8 +960,13 @@ int  SetCipherList(Suites*, const char* list);
 #ifdef HAVE_NETX
     CYASSL_LOCAL int NetX_Receive(CYASSL *ssl, char *buf, int sz, void *ctx);
     CYASSL_LOCAL int NetX_Send(CYASSL *ssl, char *buf, int sz, void *ctx);
-#endif /* HAVE_NETX */
-
+#endif
+#ifdef HAVE_LWIP_NATIVE
+    CYASSL_LOCAL int CyaSSL_LwIP_Send(CYASSL* ssl, char *buf, int sz, void *cb);
+    CYASSL_LOCAL int CyaSSL_LwIP_Receive(CYASSL* ssl, char *buf, int sz, void *cb);
+    CYASSL_LOCAL void CyaSSL_NB_setCallbackArg(CYASSL *ssl, void *arg) ;
+    CYASSL_LOCAL void CyaSSL_PbufFree(void *p);
+#endif /* HAVE_{tcp stack} */
 
 /* CyaSSL Cipher type just points back to SSL */
 struct CYASSL_CIPHER {
@@ -1797,6 +1802,17 @@ typedef struct DtlsMsg {
 
 #endif
 
+#ifdef HAVE_LWIP_NATIVE
+    /* LwIP native tpc socket context */
+    typedef struct LwIP_native_Ctx {
+        struct tcp_pcb * pcb ;
+        int    pulled  ; 
+        struct pbuf *pbuf ;
+        int    wait ;
+        void * arg ;   /* arg for application */
+        int    idle_count ;
+    } LwIP_native_Ctx ;    
+#endif
 
 /* CyaSSL ssl type */
 struct CYASSL {
@@ -1908,6 +1924,9 @@ struct CYASSL {
 #ifdef HAVE_NETX
     NetX_Ctx        nxCtx;             /* NetX IO Context */
 #endif
+#ifdef HAVE_LWIP_NATIVE
+    LwIP_native_Ctx        lwipCtx;             /* NetX IO Context */
+#endif
 #ifdef SESSION_INDEX
     int sessionIndex;                  /* Session's location in the cache. */
 #endif
diff --git a/cyassl/ssl.h b/cyassl/ssl.h
index aa7056246..b791c2a49 100644
--- a/cyassl/ssl.h
+++ b/cyassl/ssl.h
@@ -939,7 +939,9 @@ CYASSL_API void CyaSSL_SetIOWriteFlags(CYASSL* ssl, int flags);
     CYASSL_API void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxsocket,
                                       ULONG waitoption);
 #endif
-
+#ifdef HAVE_LWIP_NATIVE
+    CYASSL_API int CyaSSL_SetIO_LwIP(CYASSL* ssl, void *pcb);
+#endif
 typedef int (*CallbackGenCookie)(CYASSL* ssl, unsigned char* buf, int sz,
                                  void* ctx);
 CYASSL_API void  CyaSSL_CTX_SetGenCookie(CYASSL_CTX*, CallbackGenCookie);
diff --git a/src/internal.c b/src/internal.c
index d797d75cc..964f7af6a 100644
--- a/src/internal.c
+++ b/src/internal.c
@@ -397,6 +397,11 @@ int InitSSL_Ctx(CYASSL_CTX* ctx, CYASSL_METHOD* method)
     ctx->CBIORecv = NetX_Receive;
     ctx->CBIOSend = NetX_Send;
 #endif
+#ifdef HAVE_LWIP_NATIVE
+    ctx->CBIORecv = CyaSSL_LwIP_Receive ;
+    ctx->CBIOSend = CyaSSL_LwIP_Send ;
+#endif
+
     ctx->partialWrite   = 0;
     ctx->verifyCallback = 0;
 
@@ -1429,6 +1434,10 @@ int InitSSL(CYASSL* ssl, CYASSL_CTX* ctx)
     ssl->IOCB_ReadCtx  = &ssl->nxCtx;  /* default NetX IO ctx, same for read */
     ssl->IOCB_WriteCtx = &ssl->nxCtx;  /* and write */
 #endif
+#ifdef HAVE_LWIP_NATIVE
+    ssl->lwipCtx.pbuf = NULL ;
+    ssl->lwipCtx.pulled = 0 ;
+#endif
 #ifdef CYASSL_DTLS
     ssl->IOCB_CookieCtx = NULL;      /* we don't use for default cb */
     ssl->dtls_expected_rx = MAX_MTU;
diff --git a/src/io.c b/src/io.c
index 55f28eed3..02ff56803 100644
--- a/src/io.c
+++ b/src/io.c
@@ -1045,3 +1045,182 @@ void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxSocket, ULONG waitOption)
 
 #endif /* HAVE_NETX */
 
+#ifdef HAVE_LWIP_NATIVE
+
+#include "lwip/tcp.h"
+#include "lwip/pbuf.h"
+#include "lwip/sockets.h"
+
+#if 0
+/*Enable debug*/
+#include 
+#define DBG_PRINTF(x, ...) printf("[SSLClient : DBG]"x"\r\n", ##__VA_ARGS__);
+#else
+/*Disable debug*/
+#define DBG_PRINTF(x, ...)
+#endif
+
+#if 0
+/*Enable debug*/
+#define DBG_PRINTF_CB(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
+#else
+/*Disable debug*/
+#define DBG_PRINTF_CB(x, ...)
+#endif
+
+#define ERR_PRINTF(x, ...) printf("[SSLClient:ERROR]"x"\r\n", ##__VA_ARGS__);
+
+void CyaSSL_PbufFree(void *vp)
+{
+    struct pbuf *p ;
+    struct pbuf * next;
+    p = (struct pbuf *) vp ;
+    while(p->next != NULL)
+    {
+        next = p->next;
+        pbuf_free(p);   
+        p = next;
+    }    
+    pbuf_free(p);
+}
+
+static int CyaSSL_GetDataFromPbuf(char *buff, CYASSL *ssl, int size)
+{
+    struct pbuf *p ;
+    struct pbuf *p_next ;
+    int totalLen ;
+    int skipLen = 0 ;
+
+    p = ssl->lwipCtx.pbuf ;
+    if(p->tot_len < (ssl->lwipCtx.pulled + size))
+        return 0 ;
+    
+    while(p) { /* skip the part pulled before */
+        if(p->len && p->len > (ssl->lwipCtx.pulled - skipLen) ){ 
+            skipLen = (ssl->lwipCtx.pulled - skipLen) ;
+            break ;
+        } else {
+            skipLen += p->len ;
+            if(p->next)
+                p = p->next ;
+            else return 0 ;
+        }
+    } 
+    
+    totalLen = 0 ;
+    while(p){
+        if(p->len) {
+          if((p->len - skipLen) > (size - totalLen)) { /* buffer full */
+                memcpy(&buff[totalLen], (const char *)&(((char *)(p->payload))[skipLen]), size-totalLen) ;
+                totalLen = size  ;
+                break ;
+          } else {
+                memcpy(&buff[totalLen], (const char *)&(((char *)(p->payload))[skipLen]), p->len - skipLen) ;
+                totalLen += (p->len-skipLen) ;
+                skipLen = 0 ;
+          }
+        }
+        if(p->next){
+            p_next = p->next ;
+            p = p_next ;
+        } else break ;
+    }
+    ssl->lwipCtx.pulled += totalLen ;
+    if(ssl->lwipCtx.pbuf->tot_len <= ssl->lwipCtx.pulled) {
+        CyaSSL_PbufFree(ssl->lwipCtx.pbuf) ;
+        ssl->lwipCtx.pbuf = NULL ;
+        tcp_recved(ssl->lwipCtx.pcb,ssl->lwipCtx.pbuf->tot_len) ;
+    }
+    return totalLen;
+}
+
+err_t CyaSSL_connectCallback(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t err)
+{
+    struct pbuf *next ;
+    CYASSL *ssl ;
+    ssl = (CYASSL *)cb ;
+    
+    if((cb == NULL)||(pcb == NULL))
+        ERR_PRINTF("CyaSSL_connectCallBack, cb=%x, pcb=%d\n", cb, pcb) ;
+    if(p && (err == 0)) {
+        DBG_PRINTF_CB("CyaSSL_connectCallBack, pbuf=%x, err=%d, tot_len=%d\n", p, err, p->tot_len) ;
+    }else {
+        ERR_PRINTF("CyaSSL_connectCallBack, pbuf=%x, err=%d\n", p, err) ;
+        return ERR_OK; /* don't go to SSL_CONN */
+    }
+
+    if(ssl->lwipCtx.pbuf) {
+        next = ssl->lwipCtx.pbuf ;
+        while(1) {
+            if(next->next)
+                next = next->next ;
+            else break ;
+        }
+        next->next = p ;
+        ssl->lwipCtx.pbuf->tot_len += p->tot_len ;
+    } else {
+        ssl->lwipCtx.pbuf = p ;
+    }
+    ssl->lwipCtx.pulled = 0 ;
+    if(ssl->lwipCtx.wait < 0)
+        ssl->lwipCtx.wait = 10000 ;
+    return ERR_OK; 
+}
+
+err_t DataSentCallback (void *arg, struct tcp_pcb *pcb, u16_t err)
+{
+    DBG_PRINTF_CB("LwIPtest: Data Sent(SentCallBack1), err=%d\n", err) ;
+    return ERR_OK;
+}
+
+int CyaSSL_LwIP_Receive(CYASSL* ssl, char *buf, int sz, void *cb)
+{
+    int ret ;
+    DBG_PRINTF_CB("CyaSSL_LwIP_Receive: ssl_nb = %x\n", ssl) ;  
+
+    if(ssl->lwipCtx.pbuf) {
+        DBG_PRINTF_CB("Received Len=%d, Want Len= %d\n", ssl->lwipCtx.pbuf->tot_len, sz) ;
+        ret = CyaSSL_GetDataFromPbuf(buf, ssl, sz) ;
+        if(ret == 0)
+             ret = CYASSL_CBIO_ERR_WANT_READ ;
+    } else {
+        DBG_PRINTF_CB("No Received Data\n") ;
+        ret = CYASSL_CBIO_ERR_WANT_READ ;
+    }
+    return ret ;
+}
+
+int CyaSSL_LwIP_Send(CYASSL* ssl, char *buf, int sz, void *cb)
+{
+    err_t ret ;
+    
+    DBG_PRINTF_CB("CyaSSL_LwIP_Send: ssl = %x\n", ssl) ;
+    DBG_PRINTF_CB("Send buf[0,1,2,3]=%x,%x,%x,%x, sz=%d\n", buf[0], buf[1], buf[2], buf[3], sz) ;
+    ret = tcp_write(ssl->lwipCtx.pcb, buf, sz, TCP_WRITE_FLAG_COPY) ;
+    if(ret == ERR_OK)
+        return sz ;
+    else {
+        ERR_PRINTF("Send ssl=%x, ret=%d\n", ssl, ret) ;
+        return -1 ;
+    }
+}
+
+void CyaSSL_NB_setCallbackArg(CYASSL *ssl, void *arg)
+{
+    ssl->lwipCtx.arg = arg ; 
+}
+
+int CyaSSL_SetIO_LwIP(CYASSL* ssl, void* pcb)
+{
+    if (ssl && pcb) {
+        ssl->lwipCtx.pcb = (struct tcp_pcb *)pcb ;
+        tcp_recv(pcb, CyaSSL_connectCallback);
+        tcp_sent(pcb, DataSentCallback); 
+        tcp_arg (pcb, (void *)ssl) ;
+    } else return BAD_FUNC_ARG ;
+    return ERR_OK ;
+}
+
+#endif /* HAVE_LWIP_NATIVE */
+
+

From e39308f0596079542958f223c1949916572bb797 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Mon, 3 Feb 2014 09:18:48 +0900
Subject: [PATCH 19/43] Take LwIP native TCP socket into io.c

---
 IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c               |  267 ++-
 IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h               |   12 +-
 IDE/IAR-EWARM/CyaSSL/HTTPS-maic.c             |   96 -
 IDE/IAR-EWARM/CyaSSL/HTTPS-main.h             |   34 -
 IDE/IAR-EWARM/CyaSSL/SSL-NB.c                 |  210 --
 IDE/IAR-EWARM/CyaSSL/SSL-NB.h                 |   68 -
 .../Projects/CyaSSL-Lib/CyaSSL-Lib.dep        | 2048 ++++++++--------
 .../Projects/CyaSSL-Lib/CyaSSL-Lib.ewp        |   10 +-
 cyassl/internal.h                             |   19 +-
 cyassl/internal.h.orig                        | 2121 -----------------
 cyassl/ssl.h                                  |    9 +-
 src/internal.c                                |    4 +
 src/io.c                                      |  117 +-
 13 files changed, 1323 insertions(+), 3692 deletions(-)
 delete mode 100644 IDE/IAR-EWARM/CyaSSL/HTTPS-maic.c
 delete mode 100644 IDE/IAR-EWARM/CyaSSL/HTTPS-main.h
 delete mode 100644 IDE/IAR-EWARM/CyaSSL/SSL-NB.c
 delete mode 100644 IDE/IAR-EWARM/CyaSSL/SSL-NB.h
 delete mode 100644 cyassl/internal.h.orig

diff --git a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
index b39a22a2e..bd0e005a6 100644
--- a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
+++ b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
@@ -24,29 +24,22 @@
 #endif
  
 #include 
- 
-#if defined(CYASSL_MDK_ARM)
-      #include 
-        #include 
-        #include 
-        #include "cyassl_MDK_ARM.h"
-#endif
+
+#if defined(HAVE_LWIP_NATIVE)
 
 #if defined(CYASSL_IAR_ARM)
     #include 
     #include 
 #endif
 
-#if defined(CYASSL_LWIP)
 #include "lwip/tcp.h"
 #include "lwip/sockets.h"
-#endif
 
 #include 
 #include 
+#include 
 #include 
-#include "SSL-NB.h"
-#include "HTTPS-NB.h"
+#include "https-nb.h"
 
 #if 0
 /*Enable debug*/
@@ -58,65 +51,69 @@
 #endif
 
 #define ERR_PRINTF(x, ...) printf("[HTTPSClient:ERROR]"x"\r\n", ##__VA_ARGS__);
+ 
+static int LwIP_cb_mutex = 0 ; 
 
 static unsigned long localPort = 0 ;
 static unsigned long getPort(void) {
       return (localPort++ + 0x200) & 0x7fff ;
 }
 
-
 static err_t DataConnectedCallback (void *arg, struct tcp_pcb *pcb, s8_t err)
 {
+    DBG_PRINTF("DataConnectedCallback(arg=%x, pcb=%x, err=%x)\n", arg, pcb, err) ;
     *(enum HTTPS_Stat *)arg = TCP_CONNECTED ;
     return ERR_OK;
 }
 
+
 static err_t DataSentCallback (void *arg, struct tcp_pcb *pcb, u16_t err)
 {
     DBG_PRINTF("LwIPtest: Data Sent(SentCallBack1)\n") ;
     return ERR_OK;
 }
 
-static err_t DataReceiveCallback(void *cb, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
+static err_t DataReceiveCallback(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
 {
     struct pbuf *next ;
-    CYASSL_NB *ssl_nb ;
-    ssl_nb = (CYASSL_NB *)cb ;
+    CYASSL *ssl ;
+    ssl = (CYASSL *)arg ;
     
     DBG_PRINTF("LwIPtest: Data Received(DataReceiveCallback), pbuf->len=%d, err=%d\n", p->tot_len , err) ;
     
     if(p==0) { /* throw away */
         return ERR_OK ;
     }
-    if(*(enum HTTPS_Stat *)(ssl_nb->arg) == WAITING) {
-        *(enum HTTPS_Stat *)(ssl_nb->arg) = HTTP_RECEIVE ;
+    if(*(enum HTTPS_Stat *)(ssl->lwipCtx.arg) == WAITING) {
+        *(enum HTTPS_Stat *)(ssl->lwipCtx.arg) = HTTP_RECEIVE ;
     } else { 
         CyaSSL_PbufFree(p) ;
         tcp_recved(pcb,p->tot_len) ;
         return ERR_OK ;
     }
     /* put it into the queue */
-    if(ssl_nb->pbuf) {
-        next = ssl_nb->pbuf ;
+    if(ssl->lwipCtx.pbuf) {
+        next = ssl->lwipCtx.pbuf ;
         while(1) {
-            DBG_PRINTF("pbuf=%x, pbuf->next=%x, ",ssl_nb->pbuf, next) ;
+            DBG_PRINTF("pbuf=%x, pbuf->next=%x, ",ssl->lwipCtx.pbuf, next) ;
             if(next->next)
                 next = next->next ;
             else break ;
         }
         next->next = p ;
-        ssl_nb->pbuf->tot_len += p->tot_len ;
+        ssl->lwipCtx.pbuf->tot_len += p->tot_len ;
     } else {
-        ssl_nb->pbuf = p ;
+        ssl->lwipCtx.pbuf = p ;
     }
-    ssl_nb->pulled = 0 ;
+    ssl->lwipCtx.pulled = 0 ;
 
-    if(ssl_nb->wait < 0)
-        ssl_nb->wait = 1000 ;
-    ssl_nb->pulled = 0 ;
+    if(ssl->lwipCtx.wait < 0)
+        ssl->lwipCtx.wait = 1000 ;
+    ssl->lwipCtx.pulled = 0 ;
     return ERR_OK;
 }
 
+
 static int count = 0 ;
 
 void CyaSSL_HTTPS_Client_NB_init(void *nb, 
@@ -129,30 +126,27 @@ void CyaSSL_HTTPS_Client_NB_init(void *nb,
     https_nb->serverPort = svPort ;
     https_nb->hostname = host ;
     https_nb->path = path ;
-    
     https_nb->stat = BEGIN ;
-    
 }
 
 int CyaSSL_HTTPS_Client_NB(void *nb)
 {
-    char *p ;
     int ret ;
     CYASSL_HTTPS_NB *https_nb ;
-    CYASSL_NB       *ssl_nb ;
     
     https_nb = (CYASSL_HTTPS_NB *)nb ;
-    ssl_nb   = (CYASSL_NB       *)&(https_nb->ssl_nb) ;
     
-    /*CyaSSL_Debugging_ON() ; */
+    CyaSSL_Debugging_ON() ; 
 
     switch(https_nb->stat) {
     case BEGIN:
         printf("======= LwIP: HTTPS Client Test(%x): %d =========\n", nb, count ++) ;
-        
-        p = (char *)malloc(1) ;
-        printf("Warter mark: %x\n", p) ;
-        free(p) ;
+        {
+             void * p ;
+             p = (void *)malloc(1) ;
+             printf("Watermark=%x\n", p) ;
+             free(p) ;
+        }
         /*** Assuming LwIP has been initialized ***/
         https_nb->stat = INITIALIZED ; 
     case INITIALIZED:
@@ -165,11 +159,11 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
             https_nb->stat = IDLE ;
     	    return !ERR_OK ;
         }
-         
+
         tcp_arg(https_nb->pcb, (void *)&https_nb->stat) ;
 
         https_nb->localPort = getPort() ;
-        printf("local Port=%d\n", https_nb->localPort) ;
+        DBG_PRINTF("local Port=%d\n", https_nb->localPort) ;
         ret = tcp_bind (https_nb->pcb, &(https_nb->localIP_em),
                         https_nb->localPort) ;
         if(ret == ERR_OK) {
@@ -182,15 +176,14 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         }
 
     case TCP_CONNECT:
-        DBG_PRINTF("LwIPtest: TCP_CONNECT\n") ;
+        if(LwIP_cb_mutex)return ERR_OK ;
+        else LwIP_cb_mutex = 1 ;
+        DBG_PRINTF("LwIPtest: TCP_CONNECT(%x)\n", https_nb) ;
         DBG_PRINTF("LwIPtest: Server IP Addrress(%d.%d.%d.%d)\n", 
               (*(unsigned long *)&https_nb->serverIP_em&0xff),
               (*(unsigned long *)&https_nb->serverIP_em>>8)&0xff, 
               (*(unsigned long *)&https_nb->serverIP_em>>16)&0xff, 
               (*(unsigned long *)&https_nb->serverIP_em>>24)&0xff) ;
-
-        if(CyaSSL_cb_mutex)return ERR_OK ;
-        else CyaSSL_cb_mutex = 1 ;
         ret = tcp_connect(https_nb->pcb, &(https_nb->serverIP_em),
                           https_nb->serverPort, DataConnectedCallback); 
  
@@ -204,80 +197,186 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         }
         
     case TCP_CONNECTED:
-        printf("LwIPtest: TCP CONNECTED\n") ;
-        CyaSSL_cb_mutex = 0 ; 
-        ret = CyaSSL_init_NB(&(https_nb->ssl_nb), https_nb->pcb) ;
-        if(ret != ERR_OK) {
-            https_nb->stat = TCP_CLOSE ;
+        printf("LwIPtest: TCP CONNECTED(%x)\n", https_nb) ;
+        LwIP_cb_mutex = 0 ; 
+
+        /*CyaSSLv3_client_method()
+        CyaTLSv1_client_method()
+        CyaTLSv1_1_client_method()
+        CyaTLSv1_2_client_method() */
+        https_nb->ctx = CyaSSL_CTX_new(CyaTLSv1_2_client_method());
+        if (https_nb->ctx == NULL) {
+            ERR_PRINTF("CyaSSL_CTX_new: unable to get ctx");
             return !ERR_OK ;
         }
-        https_nb->stat = SSL_CONN ;
+    
+        CyaSSL_CTX_set_verify(https_nb->ctx, SSL_VERIFY_NONE, 0);
+
+        https_nb->ssl = CyaSSL_new(https_nb->ctx);
+        if (https_nb->ssl == NULL) {
+            ERR_PRINTF("CyaSSL_new: unable to get SSL object");
+            return !ERR_OK ;
+        }
+        
+        CyaSSL_SetIO_LwIP(https_nb->ssl, https_nb->pcb);
+        CyaSSL_SetVersion(https_nb->ssl, CYASSL_TLSV1_2) ;
+        https_nb->stat = SSL_CONN ;      
         
     case SSL_CONN: /* handshaking */
-        ret = CyaSSL_connecting_NB(&(https_nb->ssl_nb)) ;
-        if(ret == SSL_NB_ERROR) {
-             ERR_PRINTF("CyaSSL_connecting, ret=%d\n", ret) ;
-             https_nb->stat = SSL_CLOSE ; 
-             return !ERR_OK ;
-        } else if(ret == SSL_NB_CONNECTED)
-             https_nb->stat = HTTP_SEND ;
-        else return ERR_OK;
+
+        if(LwIP_cb_mutex) return ERR_OK ;
+        ret = CyaSSL_connect(https_nb->ssl); 
+        DBG_PRINTF("LwIPtest: SSL Connecting(CyaSSL_connect), ret = %d\n", ret) ;
+        if(ret == SSL_SUCCESS) {
+            https_nb->stat = SSL_CONN_WAITING ;
+            DBG_PRINTF("LwIPtest: SSL Connected\n") ;
+            https_nb->stat = HTTP_SEND ;
+        } else {
+            ret = CyaSSL_get_error(https_nb->ssl, NULL) ;
+            if(ret == SSL_ERROR_WANT_READ) {
+                https_nb->ssl->lwipCtx.wait = -1 ;
+                https_nb->stat = SSL_CONN_WAITING ;
+                return ERR_OK ;
+            } else {
+                ERR_PRINTF("CyaSSL_connecting_NB:ssl=%x, ret=%d\n", https_nb->ssl, ret) ;   
+                return !ERR_OK ;
+            }
+        }
+        return ERR_OK ;
         
+    case SSL_CONN_WAITING:
+        if(https_nb->ssl->lwipCtx.wait-- == 0) { /* counting down after the callback 
+               for multiple callbacks */
+            https_nb->stat = SSL_CONN ;
+            LwIP_cb_mutex = 0 ; 
+        }
+        return ERR_OK ;
+    
     case HTTP_SEND: 
-      {
+    {
         #define SEND_BUFF_SIZE 100
         char sendBuff[SEND_BUFF_SIZE] ;    
         int size ;
-        printf("LwIPtest: SSL CONNECTED\n") ;
-        CyaSSL_NB_setCallbackArg(ssl_nb, &(https_nb->stat)) ;
+        if(LwIP_cb_mutex)return ERR_OK ;
+        else LwIP_cb_mutex = 1 ; /* lock */
+        printf("LwIPtest: SSL CONNECTED(%x)\n", https_nb) ;
+        CyaSSL_NB_setCallbackArg(https_nb->ssl, &(https_nb->stat)) ;
         tcp_sent(https_nb->pcb, DataSentCallback); 
         tcp_recv(https_nb->pcb, DataReceiveCallback); 
 
-        DBG_PRINTF("LwIPtest: HTTPS GET\n") ;
+        DBG_PRINTF("LwIPtest: HTTPS GET(%x)\n", https_nb) ;
         sprintf(sendBuff,
                 "GET %s HTTP/1.0\r\nHost: %s\r\nConnection: close\r\n\r\n", 
                 https_nb->path, https_nb->hostname) ;
         size = strlen((char const *)sendBuff) ;
         
-        if(CyaSSL_cb_mutex)return ERR_OK ;
-        else CyaSSL_cb_mutex = 1 ; /* lock */
-        CyaSSL_write(ssl_nb->ssl, sendBuff, size) ;
+        CyaSSL_write(https_nb->ssl, sendBuff, size) ;
 
         https_nb->stat = WAITING ;
         return ERR_OK;
-      }
+    }
       
     case HTTP_RECEIVE: 
-      {
+    {
         #define HTTP_BUFF_SIZE 2048
         char httpbuff[HTTP_BUFF_SIZE] ;
         
+        LwIP_cb_mutex = 0 ;
         memset(httpbuff, '\0', HTTP_BUFF_SIZE) ;
-        ret = CyaSSL_read(ssl_nb->ssl, httpbuff, HTTP_BUFF_SIZE) ;
-        printf("LwIPtest: HTTPS GET, Received(%d)\n",strlen(httpbuff)) ;
-        CyaSSL_cb_mutex = 0 ; 
+        ret = CyaSSL_read(https_nb->ssl, httpbuff, HTTP_BUFF_SIZE) ;
+        printf("LwIPtest: HTTPS GET(%x), Received(%d)\n",https_nb, strlen(httpbuff)) ;
         /* puts(httpbuff) ;*/ 
         puts("===================\n") ; 
-      }
-      case SSL_CLOSE:        
-        CyaSSL_close_NB(ssl_nb) ;
-        
+    }
+    case SSL_CLOSE:  
+    {
+        CYASSL_CTX *ctx ; ;
+    
+        ctx = https_nb->ssl->ctx ;
+        DBG_PRINTF("CyaSSL_close(%x)", https_nb->ssl) ;
+        CyaSSL_shutdown(https_nb->ssl);
+        CyaSSL_free(https_nb->ssl);
+        CyaSSL_CTX_free(ctx); ;
         https_nb->stat = TCP_CLOSE ;
-
-        return ERR_OK ;
-      
-      case TCP_CLOSE:
+    }
+    case TCP_CLOSE:
         tcp_close(https_nb->pcb) ;
+ 
         https_nb->idle = 0 ;
         https_nb->stat = IDLE ;
 
-    
-      case IDLE:
-          https_nb->idle ++ ;
-          if(https_nb->idle > 50000)
-              https_nb->stat = BEGIN ;
-        case WAITING:
-        default:
-            return ERR_OK;
+    case IDLE:
+        https_nb->idle ++ ;
+        if(https_nb->idle > 50000)
+            https_nb->stat = BEGIN ;
+    case WAITING:
+    default:
+        return ERR_OK;
     }
 }
+
+/*********************************************************************/
+/*
+    Usage Example:
+        CyaSSL_HTTPS_Client_NB_init
+        CyaSSL_HTTPS_Client_NB
+                                                                     */
+/*********************************************************************/
+#ifndef NO_MAIN_DRIVER
+
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_1 ;
+void *CyaSSL_HTTPS_ClientP_1 = (void *)&CyaSSL_HTTPS_Client_1 ;
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_2 ;
+void *CyaSSL_HTTPS_ClientP_2 = (void *)&CyaSSL_HTTPS_Client_2 ;
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_3 ;
+void *CyaSSL_HTTPS_ClientP_3 = (void *)&CyaSSL_HTTPS_Client_3 ;
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_4 ;
+void *CyaSSL_HTTPS_ClientP_4 = (void *)&CyaSSL_HTTPS_Client_4 ;
+CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_5 ;
+void *CyaSSL_HTTPS_ClientP_5 = (void *)&CyaSSL_HTTPS_Client_5 ;
+
+
+#define HTTPS_PORT   443
+#define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
+static struct ip_addr server_em = { IP_ADDR(192,168,11,9) } ;
+
+void HTTPSClient_main_init() {
+
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_1, 
+                           server_em, HTTPS_PORT, "xxx.com", "/") ;
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_2, 
+                              server_em, HTTPS_PORT, "xxx.com", "/") ;
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_3, 
+                              server_em, HTTPS_PORT, "xxx.com", "/") ;
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_4, 
+                              server_em, HTTPS_PORT, "xxx.com", "/") ;
+  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_5, 
+                              server_em, HTTPS_PORT, "xxx.com", "/") ;  
+}
+ 
+void HTTPSClient_main(int i)
+{
+    if((i % 1) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_1) ;
+    }
+
+    if((i % 2) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_2) ;
+    }
+
+    if((i % 3) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_3) ;
+    }
+
+    if((i % 4) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_4) ;
+    }
+
+    if((i % 5) == 0) { /* wait for initializing TCP/IP, DHCP */
+        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_5) ;
+    }
+
+}
+
+#endif /* NO_MAIN_DRIVER  */
+#endif /* HAVE_LWIP_NATIVE */
diff --git a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h
index 1f88b2abe..6cac23155 100644
--- a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h
+++ b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h
@@ -18,6 +18,9 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
+ 
+#ifndef HTTPS_NB_H
+#define HTTPS_NB_H
 
 extern int CyaSSL_GetDataFromPbuf(char *buff, struct pbuf *p, int size) ;
 
@@ -37,6 +40,7 @@ enum HTTPS_Stat {
     TCP_CONNECTED,
     SSL_INIT,
     SSL_CONN,
+    SSL_CONN_WAITING,
     HTTP_SEND,
     HTTP_RECEIVE,
     HTTP_DONE,
@@ -50,7 +54,8 @@ enum HTTPS_Stat {
 #define HTTPS_PORT 443
 
 typedef struct {
-    CYASSL_NB ssl_nb ;
+    CYASSL *ssl ;
+    CYASSL_CTX *ctx ;
     enum HTTPS_Stat stat ;
     struct tcp_pcb * pcb ;
     unsigned long ipaddress ;
@@ -61,8 +66,11 @@ typedef struct {
     char   *hostname ;
     char   *path ;
     int    idle ;
+    int    wait_cnt ; /* wait tick counter */
 } CYASSL_HTTPS_NB ;
 
 extern void CyaSSL_HTTPS_Client_NB_init(void *nb, 
      struct ip_addr svIP, unsigned long svPort, char *host, char *path) ;
-extern int CyaSSL_HTTPS_Client_NB(void *nb) ;
\ No newline at end of file
+extern int CyaSSL_HTTPS_Client_NB(void *nb) ;
+
+#endif
diff --git a/IDE/IAR-EWARM/CyaSSL/HTTPS-maic.c b/IDE/IAR-EWARM/CyaSSL/HTTPS-maic.c
deleted file mode 100644
index 45bcd31f6..000000000
--- a/IDE/IAR-EWARM/CyaSSL/HTTPS-maic.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/* HTTPS-MAIN.c
- *
- * Copyright (C) 2006-2014 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
-*/
-
-#ifdef HAVE_CONFIG_H
-    #include 
-#endif
-
-#include "lwip/tcp.h"
-#include "lwip/sockets.h"
-
-#include 
-#include 
-#include 
-#include "SSL-NB.h"
-#include "HTTPS-NB.h"
-#include "HTTPS-main.h"
-
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_1 ;
-void *CyaSSL_HTTPS_ClientP_1 = (void *)&CyaSSL_HTTPS_Client_1 ;
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_2 ;
-void *CyaSSL_HTTPS_ClientP_2 = (void *)&CyaSSL_HTTPS_Client_2 ;
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_3 ;
-void *CyaSSL_HTTPS_ClientP_3 = (void *)&CyaSSL_HTTPS_Client_3 ;
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_4 ;
-void *CyaSSL_HTTPS_ClientP_4 = (void *)&CyaSSL_HTTPS_Client_4 ;
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_5 ;
-void *CyaSSL_HTTPS_ClientP_5 = (void *)&CyaSSL_HTTPS_Client_5 ;
-
-
-extern  void CyaSSL_HTTPS_Client_NB_init(void *nb, 
-           struct ip_addr svIP, unsigned long svPort, char *host, char *path) ;
-  
-#define HTTPS_PORT   443
-#define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
-static struct ip_addr server_em = { IP_ADDR(192,168,11,9) } ;
-
-static int i = 0 ;
-
-void HTTPSClient_main_init() {
-
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_1, 
-                           server_em, HTTPS_PORT, "xxx.com", "/") ;
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_2, 
-                              server_em, HTTPS_PORT, "xxx.com", "/") ;
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_3, 
-                              server_em, HTTPS_PORT, "xxx.com", "/") ;
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_4, 
-                              server_em, HTTPS_PORT, "xxx.com", "/") ;
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_5, 
-                              server_em, HTTPS_PORT, "xxx.com", "/") ;  
-}
-
-void HTTPSClient_main(void)
-{
-
-    if(i++ < 10000)return ;
-    
-    if((i % 1) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_1) ;
-    }
-
-    if((i % 2) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_2) ;
-    }
-
-    if((i % 3) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_3) ;
-    }
-
-    if((i % 4) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_4) ;
-    }
-#if 0
-    if((i % 5) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_5) ;
-    }
-#endif
-}
\ No newline at end of file
diff --git a/IDE/IAR-EWARM/CyaSSL/HTTPS-main.h b/IDE/IAR-EWARM/CyaSSL/HTTPS-main.h
deleted file mode 100644
index 4cd54ab74..000000000
--- a/IDE/IAR-EWARM/CyaSSL/HTTPS-main.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/* HTTPS-main.h
- *
- * Copyright (C) 2006-2014 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#ifndef __HTTPS_MAIN_H__
-#define __HTTPS_MAIN_H__
-
-extern CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_1 ;
-extern CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_2 ;
-extern CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_3 ;
-extern CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_4 ;
-extern CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_5 ;
-
-extern void HTTPS_Clinet_main_init(void) ;
-extern void HTTPS_Clinet_main(void) ;
-
-#endif
diff --git a/IDE/IAR-EWARM/CyaSSL/SSL-NB.c b/IDE/IAR-EWARM/CyaSSL/SSL-NB.c
deleted file mode 100644
index 36de4d908..000000000
--- a/IDE/IAR-EWARM/CyaSSL/SSL-NB.c
+++ /dev/null
@@ -1,210 +0,0 @@
-/* SSL-NB.c
- *
- * Copyright (C) 2006-2014 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#ifdef HAVE_CONFIG_H
-    #include 
-#endif
-
-#include 
-
-#if defined(CYASSL_MDK_ARM)
-      #include 
-        #include 
-        #include 
-        #include "cyassl_MDK_ARM.h"
-#endif
-
-#if defined(CYASSL_IAR_ARM)
-    #include 
-    #include 
-#endif
-
-#if defined(CYASSL_LWIP)
-#include "lwip/tcp.h"
-#include "lwip/pbuf.h"
-#include "lwip/sockets.h"
-#endif
-
-#include 
-#include 
-#include 
-#include 
-
-#if 0
-/*Enable debug*/
-#include 
-#define DBG_PRINTF(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
-#else
-/*Disable debug*/
-#define DBG_PRINTF(x, ...)
-#endif
-#define ERR_PRINTF(x, ...) printf("[SSLClient:ERROR]"x"\r\n", ##__VA_ARGS__);
-
-#if 0
-/*Enable debug*/
-#define DBG_PRINTF_CB(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
-#else
-/*Disable debug*/
-#define DBG_PRINTF_CB(x, ...)
-#endif
-
-CyaSSL_CALLBACK_MUTEX CyaSSL_cb_mutex = 0 ;
-
-static err_t CyaSSL_connectCallback(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t err)
-{
-    struct pbuf *next ;
-    CYASSL_NB *ssl_nb ;
-    ssl_nb = (CYASSL_NB *)cb ;
-    
-    if((cb == NULL)||(pcb == NULL))
-        ERR_PRINTF("CyaSSL_connectCallBack, cb=%x, pcb=%d\n", cb, pcb) ;
-    if(p && (err == 0)) {
-        printf("pbuf=%x\n", p) ;
-        DBG_PRINTF_CB("LwIPtest: CyaSSL connect, started(CyaSSL_connectCallBack1), pbuf=%x, err=%d, tot_len=%d\n", p, err, p->tot_len) ;
-    }else {
-        ERR_PRINTF("CyaSSL_connectCallBack, pbuf=%x, err=%d\n", p, err) ;
-        return ERR_OK; /* don't go to SSL_CONN */
-    }
-
-    if(ssl_nb->pbuf) {
-        next = ssl_nb->pbuf ;
-        while(1) {
-            if(next->next)
-                next = next->next ;
-            else break ;
-        }
-        next->next = p ;
-        ssl_nb->pbuf->tot_len += p->tot_len ;
-    } else {
-        ssl_nb->pbuf = p ;
-    }
-    ssl_nb->pulled = 0 ;
-    if(ssl_nb->wait < 0)
-        ssl_nb->wait = 10000 ;
-    return ERR_OK; 
-}
-
-static err_t DataSentCallback (void *arg, struct tcp_pcb *pcb, u16_t err)
-{
-    DBG_PRINTF_CB("LwIPtest: Data Sent(SentCallBack1), err=%d\n", err) ;
-    return ERR_OK;
-}
-
-int CyaSSL_init_NB(CYASSL_NB *nb, struct tcp_pcb * pcb)
-{
-    CYASSL_NB *ssl_nb ; 
-    ssl_nb = nb ;
-    
-    /*CyaSSLv3_client_method()
-      CyaTLSv1_client_method()
-      CyaTLSv1_1_client_method()
-      CyaTLSv1_2_client_method() */
-    ssl_nb->ctx = CyaSSL_CTX_new(CyaTLSv1_2_client_method());
-    if (ssl_nb->ctx == NULL) {
-        ERR_PRINTF("CyaSSL_CTX_new: unable to get ctx");
-        return !ERR_OK ;
-    }
-    
-    CyaSSL_CTX_set_verify(ssl_nb->ctx, SSL_VERIFY_NONE, 0);
-
-    ssl_nb->ssl = CyaSSL_new(ssl_nb->ctx);
-    if (ssl_nb->ssl == NULL) {
-        ERR_PRINTF("CyaSSL_new: unable to get SSL object");
-        return !ERR_OK ;
-    }
-    
-    ssl_nb->pcb = pcb ;
-    ssl_nb->pbuf = NULL ;
-    ssl_nb->pulled = 0 ;
-    ssl_nb->stat = SSL_NB_CONN ;
-    
-    /* set up callbacks */
-    CyaSSL_SetIOReadCtx (ssl_nb->ssl, (void *)ssl_nb) ;
-    CyaSSL_SetIOWriteCtx(ssl_nb->ssl, (void *)ssl_nb) ;
-    tcp_recv(ssl_nb->pcb, CyaSSL_connectCallback);
-    tcp_sent(ssl_nb->pcb, DataSentCallback); 
-    tcp_arg(ssl_nb->pcb, (void *)ssl_nb) ;
-    
-    CyaSSL_SetVersion(ssl_nb->ssl, CYASSL_TLSV1_2) ;
-    CyaSSL_set_using_nonblock(ssl_nb->ssl, (0==0)) ;
-                                         /* Non-blocking CyaSSL_connect */
-    DBG_PRINTF("Return CyaSSL_init_NB = %x\n", ssl_nb) ;
-    return ERR_OK ;
-}
-
-/*** Non-Bloking Cyassl_connect, ... */
-/* to be called in infinit loop ***/
-int CyaSSL_connecting_NB(CYASSL_NB *ssl_nb)
-{
-    int ret ;
-    
-    switch(ssl_nb->stat) {
-    case SSL_NB_CONN:
-        if(CyaSSL_cb_mutex)return SSL_NB_WAITING ;
-        ret = CyaSSL_connect(ssl_nb->ssl); 
-        DBG_PRINTF("LwIPtest: SSL Connecting(CyaSSL_connect), ret = %d\n", ret) ;
-
-        if(ret == SSL_CONNECT_WAITING) {
-            if(CyaSSL_cb_mutex)
-                return SSL_NB_WAITING ;
-            else CyaSSL_cb_mutex = 1 ; /* lock */
-            ssl_nb->wait = -1 ; /* wait until first callback */
-            ssl_nb->stat = SSL_NB_WAITING ;
-            return SSL_NB_CONNECTING ;
-        } else if(ret == SSL_CONNECTING) {
-            return SSL_NB_CONNECTING ;
-        } else if(ret == SSL_SUCCESS) {
-            ssl_nb->stat = SSL_NB_WAITING ;
-            DBG_PRINTF("LwIPtest: SSL Connected\n") ;
-            return SSL_NB_CONNECTED ;
-        } else {
-            ret = CyaSSL_get_error(ssl_nb->ssl, NULL) ;
-              ssl_nb->stat = SSL_NB_WAITING ;
-            return SSL_NB_CONNECTING ;
-        }
-        
-    case SSL_NB_WAITING:
-      if(ssl_nb->wait-- == 0) { /* counting down after the callback 
-                   for multiple callbacks */
-            ssl_nb->stat = SSL_NB_CONN ;
-            CyaSSL_cb_mutex = 0 ; 
-      }
-      return SSL_NB_CONNECTING ;
-    default:
-        return SSL_NB_ERROR ;
-    }
-}
-
-/** disconnect */
-int CyaSSL_close_NB(CYASSL_NB *ssl_nb)
-{
-    CyaSSL_shutdown(ssl_nb->ssl);
-    CyaSSL_free(ssl_nb->ssl);
-    CyaSSL_CTX_free(ssl_nb->ctx);
-    ssl_nb->stat = SSL_NB_BEGIN ;
-
-    return ERR_OK ;
-}
-
-void CyaSSL_NB_setCallbackArg(CYASSL_NB *ssl_nb, void *arg)
-{
-    ssl_nb->arg = arg ; 
-}
\ No newline at end of file
diff --git a/IDE/IAR-EWARM/CyaSSL/SSL-NB.h b/IDE/IAR-EWARM/CyaSSL/SSL-NB.h
deleted file mode 100644
index e0b468fa7..000000000
--- a/IDE/IAR-EWARM/CyaSSL/SSL-NB.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/* SSLcon-NB.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#ifndef __SSLCONN_NB_H__
-#define __SSLCONN_NB_H__
-
-#define mem_malloc malloc
-#define mem_free   free
-
-enum SSL_Stat {
-    SSL_NB_BEGIN,
-    SSL_NB_WAITING,
-    SSL_NB_CONN,
-}  ;
-
-enum SSL_NB_Ret {
-    SSL_NB_ERROR,
-    SSL_NB_CONNECTING,
-    SSL_NB_CONNECTED,
-}  ;
-
-typedef struct CyaSSL_nb {
-    CYASSL *ssl ;
-    CYASSL_CTX *ctx ;
-    struct tcp_pcb * pcb ;
-    int    pulled  ; 
-    struct pbuf *pbuf ;
-    enum   SSL_Stat stat ;
-    int    wait ;
-    void * arg ;   /* arg for application */
-    int    idle_count ;
-} CYASSL_NB ;
-
-extern int CyaSSL_init_NB(CYASSL_NB *nb, struct tcp_pcb * pcb) ;
-extern int CyaSSL_connecting_NB(CYASSL_NB *ssl_nb) ;
-extern int CyaSSL_close_NB(CYASSL_NB *ssl_nb) ;
-extern void CyaSSL_NB_setCallbackArg(CYASSL_NB *ssl_nb, void *arg) ; 
-                         /* Set it to CYASSL_NB.arg for callback arg */
-
-extern int CyaSSL_write(struct CYASSL *pcbSSL, const void *buffer, int len) ;
-extern int CyaSSL_recv(struct CYASSL *pcbSSL, void *buffer, int len, int flg) ;
-extern int CyaSSL_read(struct CYASSL *pcbSSL, void *buffer, int len) ;
-
-extern void CyaSSL_PbufFree(struct pbuf * p) ;
-
-typedef int CyaSSL_CALLBACK_MUTEX ;
-
-extern  CyaSSL_CALLBACK_MUTEX CyaSSL_cb_mutex ;
-
-#endif
diff --git a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.dep b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.dep
index e6feba691..cddff700e 100644
--- a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.dep
+++ b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.dep
@@ -2,1057 +2,255 @@
 
 
   2
-  1657308038
+  3669433724
   
     Debug
     
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rsa.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha256.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha512.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\tfm.c
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\tcp.h
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\opt.h
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ripemd.c
-      $TOOLKIT_DIR$\inc\c\stdio.h
-      $PROJ_DIR$\Debug\Obj\tls.o
-      $PROJ_DIR$\Debug\Obj\ecc.o
-      $PROJ_DIR$\Debug\Obj\dsa.o
-      $PROJ_DIR$\Debug\Obj\asm.o
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\port\arch\cc.h
-      $PROJ_DIR$\Debug\Obj\io.o
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\debug.h
-      $PROJ_DIR$\Debug\Obj\md2.o
-      $PROJ_DIR$\Debug\Obj\arc4.o
-      $PROJ_DIR$\Debug\Obj\SSL-NB.o
-      $PROJ_DIR$\Debug\Obj\compress.o
-      $PROJ_DIR$\Debug\Obj\camellia.o
-      $PROJ_DIR$\Debug\Obj\dh.o
-      $PROJ_DIR$\Debug\Obj\ecc_fp.o
-      $PROJ_DIR$\Debug\Obj\internal.o
-      $PROJ_DIR$\Debug\Obj\hmac.o
-      $PROJ_DIR$\Debug\Obj\blake2b.o
-      $PROJ_DIR$\Debug\Obj\des3.o
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\arch.h
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\fm3_adaption\lwipopts.h
-      $PROJ_DIR$\Debug\Obj\integer.o
-      $PROJ_DIR$\Debug\Obj\logging.o
-      $PROJ_DIR$\Debug\Obj\HTTPS-NB.o
-      $PROJ_DIR$\Debug\Obj\hc128.o
-      $PROJ_DIR$\Debug\Obj\aes.o
-      $PROJ_DIR$\Debug\Obj\coding.o
-      $PROJ_DIR$\Debug\Obj\ssl.o
-      $PROJ_DIR$\Debug\Obj\error.o
-      $PROJ_DIR$\Debug\Obj\asn.o
-      $PROJ_DIR$\Debug\Obj\md4.o
-      $PROJ_DIR$\Debug\Obj\md5.o
-      $PROJ_DIR$\Debug\Obj\blake2b.pbi
-      $PROJ_DIR$\Debug\Obj\sha.o
-      $PROJ_DIR$\Debug\Obj\ripemd.o
-      $PROJ_DIR$\Debug\Obj\tfm.o
-      $PROJ_DIR$\Debug\Obj\SSL-NB.pbi
-      $PROJ_DIR$\Debug\Obj\arc4.pbi
-      $PROJ_DIR$\Debug\Obj\compress.pbi
-      $PROJ_DIR$\Debug\Obj\random.o
-      $PROJ_DIR$\Debug\Obj\camellia.pbi
-      $PROJ_DIR$\Debug\Obj\aes.pbi
-      $PROJ_DIR$\Debug\Obj\port.o
-      $PROJ_DIR$\Debug\Obj\keys.pbi
-      $PROJ_DIR$\Debug\Obj\asn.pbi
-      $PROJ_DIR$\Debug\Obj\internal.pbi
-      $PROJ_DIR$\Debug\Obj\des3.pbi
-      $PROJ_DIR$\Debug\Obj\ssl.pbi
-      $PROJ_DIR$\Debug\Obj\HTTPS-maic.pbi
-      $PROJ_DIR$\Debug\Obj\coding.pbi
-      $PROJ_DIR$\Debug\Obj\asm.pbi
-      $PROJ_DIR$\Debug\Obj\pwdbased.o
-      $PROJ_DIR$\Debug\Obj\dh.pbi
-      $PROJ_DIR$\Debug\Obj\keys.o
-      $PROJ_DIR$\Debug\Obj\sha256.o
-      $PROJ_DIR$\Debug\Obj\HTTPS-maic.o
-      $PROJ_DIR$\Debug\Obj\rabbit.o
-      $PROJ_DIR$\Debug\Obj\tls.pbi
-      $PROJ_DIR$\Debug\Obj\memory.o
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dsa.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\error.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\logging.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\des3.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md2.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\pwdbased.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rabbit.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hmac.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hc128.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md5.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asm.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\blake2b.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\camellia.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\integer.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md4.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\random.c
-      $PROJ_DIR$\..\..\..\..\src\tls.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dh.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\aes.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory-orig.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\compress.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\misc.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\port.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\arc4.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asn.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\coding.c
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc_fp.c
-      $PROJ_DIR$\..\..\CyaSSL\SSL-NB.c
-      $PROJ_DIR$\..\..\..\..\src\internal.c
-      $PROJ_DIR$\..\..\CyaSSL\HTTPS-NB.c
-      $PROJ_DIR$\..\..\..\..\src\io.c
-      $PROJ_DIR$\Debug\Obj\CyaSSL-Lib.pbd
-      $PROJ_DIR$\..\..\..\..\src\ssl.c
-      $PROJ_DIR$\..\..\..\..\src\keys.c
-      $PROJ_DIR$\..\..\CyaSSL\HTTPS-maic.c
-      $PROJ_DIR$\Debug\Obj\tfm.pbi
       $PROJ_DIR$\Debug\Exe\CyaSSL-Lib.a
-      $TOOLKIT_DIR$\inc\c\ycheck.h
-      $TOOLKIT_DIR$\inc\c\yvals.h
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\port\arch\bpstruct.h
+      $PROJ_DIR$\Debug\Obj\md5.pbi
+      $TOOLKIT_DIR$\inc\c\xtgmath.h
+      $PROJ_DIR$\Debug\Obj\error.pbi
+      $TOOLKIT_DIR$\inc\c\limits.h
+      $PROJ_DIR$\Debug\Obj\memory.o
       $PROJ_DIR$\Debug\Obj\memory.pbi
       $PROJ_DIR$\Debug\Obj\logging.pbi
       $PROJ_DIR$\Debug\Obj\pwdbased.pbi
-      $PROJ_DIR$\Debug\Obj\md5.pbi
-      $PROJ_DIR$\Debug\Obj\rsa.o
-      $PROJ_DIR$\Debug\Obj\sha256.pbi
-      $PROJ_DIR$\Debug\Obj\io.pbi
-      $PROJ_DIR$\Debug\Obj\rsa.pbi
-      $PROJ_DIR$\Debug\Obj\random.pbi
-      $PROJ_DIR$\Debug\Obj\md2.pbi
-      $PROJ_DIR$\Debug\Obj\error.pbi
-      $PROJ_DIR$\Debug\Obj\ecc_fp.pbi
-      $PROJ_DIR$\Debug\Obj\hmac.pbi
-      $PROJ_DIR$\Debug\Obj\md4.pbi
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\ipv4\lwip\icmp.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\types.h
+      $TOOLKIT_DIR$\inc\c\xlocale.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\random.h
+      $PROJ_DIR$\..\..\..\..\cyassl\crl.h
       $PROJ_DIR$\Debug\Obj\integer.pbi
       $PROJ_DIR$\Debug\Obj\sha512.o
-      $PROJ_DIR$\Debug\Obj\misc.pbi
-      $PROJ_DIR$\Debug\Obj\misc.o
+      $TOOLKIT_DIR$\inc\c\xlocaleuse.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\memory.h
+      $TOOLKIT_DIR$\inc\c\math.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\hc128.h
+      $PROJ_DIR$\Debug\Obj\md2.pbi
+      $PROJ_DIR$\Debug\Obj\md4.pbi
       $PROJ_DIR$\Debug\Obj\rabbit.pbi
-      $PROJ_DIR$\Debug\Obj\dsa.pbi
-      $PROJ_DIR$\Debug\Obj\ripemd.pbi
-      $PROJ_DIR$\Debug\Obj\ecc.pbi
-      $PROJ_DIR$\Debug\Obj\port.pbi
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\md4.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\integer.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\asn_public.h
+      $TOOLKIT_DIR$\inc\c\ctype.h
+      $TOOLKIT_DIR$\inc\c\DLib_Product_string.h
+      $TOOLKIT_DIR$\inc\c\wchar.h
+      $PROJ_DIR$\..\..\..\..\cyassl\internal.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\sha512.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\md5.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\ipv4\lwip\ip_addr.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\arc4.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\port.h
+      $TOOLKIT_DIR$\inc\c\string.h
+      $TOOLKIT_DIR$\inc\c\ymath.h
+      $TOOLKIT_DIR$\inc\c\xlocale_c.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\des3.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\dsa.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\rabbit.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\misc.h
+      $PROJ_DIR$\..\..\..\..\cyassl\error.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\camellia.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\aes.h
+      $TOOLKIT_DIR$\inc\c\xmtx.h
+      $TOOLKIT_DIR$\inc\c\time.h
+      $TOOLKIT_DIR$\inc\c\xtls.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\sha.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\ecc.h
+      $PROJ_DIR$\..\..\CyaSSL\https-nb.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\mpi_class.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\rsa.h
+      $TOOLKIT_DIR$\inc\c\stdlib.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\logging.h
+      $PROJ_DIR$\..\..\..\..\cyassl\version.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\dh.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\asn.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\md2.h
+      $PROJ_DIR$\..\..\CyaSSL\https-nb.c
+      $PROJ_DIR$\..\..\..\..\src\ssl.c
+      $PROJ_DIR$\..\..\..\..\src\internal.c
+      $PROJ_DIR$\..\..\..\..\src\keys.c
+      $PROJ_DIR$\..\..\..\..\src\tls.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\aes.c
+      $PROJ_DIR$\..\..\CyaSSL\https-maic.c
+      $PROJ_DIR$\..\..\..\..\src\io.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\compress.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\camellia.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\error.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md2.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\port.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dh.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\pwdbased.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rsa.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md4.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ripemd.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asm.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dsa.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc_fp.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\arc4.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\logging.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rabbit.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asn.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\blake2b.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\coding.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hmac.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\integer.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory-orig.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\misc.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\random.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\des3.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hc128.c
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md5.c
+      $PROJ_DIR$\Debug\Obj\hc128.o
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\tfm.c
+      $PROJ_DIR$\Debug\Obj\logging.o
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\debug.h
+      $PROJ_DIR$\Debug\Obj\blake2b.o
+      $PROJ_DIR$\Debug\Obj\error.o
+      $PROJ_DIR$\Debug\Obj\io.o
+      $PROJ_DIR$\Debug\Obj\ssl.o
+      $PROJ_DIR$\Debug\Obj\aes.o
+      $PROJ_DIR$\Debug\Obj\camellia.o
+      $PROJ_DIR$\Debug\Obj\hmac.o
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha512.c
+      $PROJ_DIR$\Debug\Obj\md4.o
+      $PROJ_DIR$\Debug\Obj\ecc_fp.o
+      $PROJ_DIR$\Debug\Obj\compress.o
+      $PROJ_DIR$\Debug\Obj\arc4.o
+      $PROJ_DIR$\Debug\Obj\des3.o
+      $PROJ_DIR$\Debug\Obj\asn.o
+      $PROJ_DIR$\Debug\Obj\https-nb.o
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\fm3_adaption\lwipopts.h
+      $PROJ_DIR$\Debug\Obj\coding.o
+      $PROJ_DIR$\Debug\Obj\integer.o
+      $PROJ_DIR$\Debug\Obj\tls.o
+      $PROJ_DIR$\Debug\Obj\dsa.o
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha256.c
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\tcp.h
+      $PROJ_DIR$\Debug\Obj\dh.o
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\arch.h
+      $PROJ_DIR$\Debug\Obj\md2.o
+      $PROJ_DIR$\Debug\Obj\internal.o
+      $PROJ_DIR$\Debug\Obj\asm.o
+      $PROJ_DIR$\Debug\Obj\ecc.o
+      $PROJ_DIR$\Debug\Obj\blake2b.pbi
+      $PROJ_DIR$\Debug\Obj\internal.pbi
+      $PROJ_DIR$\Debug\Obj\tls.pbi
+      $PROJ_DIR$\Debug\Obj\md5.o
+      $PROJ_DIR$\Debug\Obj\ripemd.o
+      $PROJ_DIR$\Debug\Obj\ssl.pbi
+      $PROJ_DIR$\Debug\Obj\keys.o
+      $TOOLKIT_DIR$\inc\c\stdio.h
+      $PROJ_DIR$\Debug\Obj\dh.pbi
+      $PROJ_DIR$\Debug\Obj\sha256.o
+      $PROJ_DIR$\Debug\Obj\port.o
+      $PROJ_DIR$\Debug\Obj\rabbit.o
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\opt.h
+      $PROJ_DIR$\Debug\Obj\sha.o
+      $PROJ_DIR$\Debug\Obj\coding.pbi
+      $PROJ_DIR$\Debug\Obj\pwdbased.o
+      $PROJ_DIR$\Debug\Obj\camellia.pbi
+      $PROJ_DIR$\Debug\Obj\aes.pbi
+      $PROJ_DIR$\Debug\Obj\asm.pbi
+      $PROJ_DIR$\Debug\Obj\asn.pbi
+      $PROJ_DIR$\Debug\Obj\compress.pbi
+      $PROJ_DIR$\Debug\Obj\https-maic.o
+      $PROJ_DIR$\Debug\Obj\https-maic.pbi
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\port\arch\cc.h
+      $PROJ_DIR$\Debug\Obj\des3.pbi
+      $PROJ_DIR$\Debug\Obj\random.o
+      $PROJ_DIR$\Debug\Obj\tfm.o
+      $PROJ_DIR$\Debug\Obj\arc4.pbi
+      $PROJ_DIR$\Debug\Obj\keys.pbi
+      $PROJ_DIR$\..\..\CyaSSL\https-main.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\def.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\ipv4\lwip\ip.h
       $PROJ_DIR$\Debug\Obj\hc128.pbi
       $PROJ_DIR$\Debug\Obj\sha512.pbi
-      $PROJ_DIR$\Debug\Obj\HTTPS-NB.pbi
-      $PROJ_DIR$\Debug\Obj\sha.pbi
-      $TOOLKIT_DIR$\inc\c\ysizet.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ssl.h
-      $TOOLKIT_DIR$\inc\c\DLib_Threads.h
-      $TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\port\arch\epstruct.h
       $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\visibility.h
-      $PROJ_DIR$\..\..\CyaSSL\HTTPS-main.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\settings.h
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\ipv4\lwip\ip.h
-      $PROJ_DIR$\..\..\CyaSSL\SSL-NB.h
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\sys.h
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\netif.h
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\mem.h
+      $PROJ_DIR$\Debug\Obj\sha.pbi
+      $PROJ_DIR$\..\..\..\..\cyassl\ssl.h
       $TOOLKIT_DIR$\inc\c\DLib_Defaults.h
-      $TOOLKIT_DIR$\inc\c\stdint.h
-      $TOOLKIT_DIR$\inc\c\ystdio.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\sys.h
+      $TOOLKIT_DIR$\inc\c\ysizet.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\port\arch\epstruct.h
+      $TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h
+      $PROJ_DIR$\Debug\Obj\https-nb.pbi
       $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\err.h
+      $TOOLKIT_DIR$\inc\c\ystdio.h
+      $PROJ_DIR$\Debug\Obj\port.pbi
+      $PROJ_DIR$\Debug\Obj\ecc.pbi
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\netif.h
+      $TOOLKIT_DIR$\inc\c\stdint.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\settings.h
       $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\pbuf.h
       $TOOLKIT_DIR$\inc\c\xencoding_limits.h
       $TOOLKIT_DIR$\inc\c\DLib_Product.h
-      $TOOLKIT_DIR$\inc\c\inttypes.h
+      $PROJ_DIR$\Debug\Obj\ripemd.pbi
+      $TOOLKIT_DIR$\inc\c\DLib_Threads.h
       $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\sockets.h
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\def.h
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\ipv4\lwip\icmp.h
-      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\ipv4\lwip\ip_addr.h
-      $TOOLKIT_DIR$\inc\c\DLib_Product_string.h
-      $PROJ_DIR$\..\..\..\..\cyassl\version.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\arc4.h
-      $TOOLKIT_DIR$\inc\c\stdlib.h
-      $TOOLKIT_DIR$\inc\c\xtls.h
-      $TOOLKIT_DIR$\inc\c\xmtx.h
-      $TOOLKIT_DIR$\inc\c\xlocale_c.h
-      $TOOLKIT_DIR$\inc\c\wchar.h
-      $TOOLKIT_DIR$\inc\c\xtgmath.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\des3.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\hc128.h
-      $TOOLKIT_DIR$\inc\c\xlocale.h
-      $TOOLKIT_DIR$\inc\c\xlocaleuse.h
-      $PROJ_DIR$\..\..\CyaSSL\HTTPS-NB.h
-      $PROJ_DIR$\..\..\..\..\cyassl\crl.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\integer.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\asn_public.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\memory.h
-      $TOOLKIT_DIR$\inc\c\math.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\md4.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\types.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\random.h
-      $TOOLKIT_DIR$\inc\c\ctype.h
-      $PROJ_DIR$\..\..\..\..\cyassl\internal.h
-      $TOOLKIT_DIR$\inc\c\limits.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\port.h
-      $TOOLKIT_DIR$\inc\c\ymath.h
-      $TOOLKIT_DIR$\inc\c\string.h
-      $TOOLKIT_DIR$\inc\c\time.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\error.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\mpi_class.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\dsa.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\mpi_superclass.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\sha.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\hmac.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\dh.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\camellia.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\coding.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\md2.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\misc.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\sha512.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\rabbit.h
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\src\include\lwip\mem.h
+      $PROJ_DIR$\Debug\Obj\misc.pbi
+      $PROJ_DIR$\Debug\Obj\rsa.pbi
+      $PROJ_DIR$\Debug\Obj\rsa.o
+      $PROJ_DIR$\..\..\..\..\..\mb9bf61xt_ethernet_lwip_v12\example\source\lwip1_4_0\port\arch\bpstruct.h
+      $PROJ_DIR$\Debug\Obj\ecc_fp.pbi
+      $PROJ_DIR$\Debug\Obj\CyaSSL-Lib.pbd
+      $TOOLKIT_DIR$\inc\c\yvals.h
+      $PROJ_DIR$\Debug\Obj\random.pbi
+      $TOOLKIT_DIR$\inc\c\inttypes.h
+      $PROJ_DIR$\Debug\Obj\sha256.pbi
+      $TOOLKIT_DIR$\inc\c\ycheck.h
+      $PROJ_DIR$\Debug\Obj\tfm.pbi
+      $PROJ_DIR$\Debug\Obj\dsa.pbi
+      $PROJ_DIR$\Debug\Obj\io.pbi
+      $PROJ_DIR$\Debug\Obj\hmac.pbi
+      $PROJ_DIR$\Debug\Obj\misc.o
+      $TOOLKIT_DIR$\inc\c\stddef.h
       $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\pwdbased.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\logging.h
-      $PROJ_DIR$\..\..\..\..\cyassl\error.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\aes.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\rsa.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\hmac.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\error.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\mpi_superclass.h
+      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\coding.h
       $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\sha256.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\md5.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\ecc.h
-      $PROJ_DIR$\..\..\..\..\cyassl\ctaocrypt\asn.h
     
     
       [ROOT_NODE]
       
         
           IARCHIVE
-           105
+           0
         
       
     
     
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rsa.c
+      $PROJ_DIR$\..\..\CyaSSL\https-nb.c
       
-        
-          ICCARM
-           113
-        
         
           BICOMP
-           116
+           171
         
       
       
         
           ICCARM
-           143 141 207 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 176 185 191 193 182 163 190 204
+           178 163 136 196 192 166 170 181 180 183 168 173 35 27 122 141 116 100 124 152 194 177 167 185 202 179 172 160 159 32 189 169 176 9 184 165 55 29 10 34 17 53 26 11 47 45 16 37 28 13 12 33 38 19 40 57 52 24 4 51 206 56 39 48 31 25 49 44 43 54 204 208 50
         
         
           BICOMP
-           143 141 207 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 176 185 191 193 182 163 190 204
+           178 163 136 196 192 166 170 181 180 183 168 173 35 27 122 141 116 100 124 152 194 177 167 185 202 179 172 160 159 32 189 169 176 9 184 165 55 29 10 34 17 53 26 11 47 45 16 37 28 13 12 33 38 19 40 57 52 24 4 51 206 56 39 48 31 25 49 44 43 54 204 208 50
         
       
     
     
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha.c
+      $PROJ_DIR$\..\..\..\..\src\ssl.c
       
         
           ICCARM
-           41
-        
-        
-          BICOMP
-           135
-        
-      
-      
-        
-          ICCARM
-           143 141 194 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
-        
-        
-          BICOMP
-           143 141 194 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha256.c
-      
-        
-          ICCARM
-           62
-        
-        
-          BICOMP
-           114
-        
-      
-      
-        
-          ICCARM
-           143 141 208 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
-        
-        
-          BICOMP
-           143 141 208 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha512.c
-      
-        
-          ICCARM
-           124
-        
-        
-          BICOMP
-           133
-        
-      
-      
-        
-          ICCARM
-           143 141
-        
-        
-          BICOMP
-           143 141
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\tfm.c
-      
-        
-          ICCARM
-           43
-        
-        
-          BICOMP
            104
         
-      
-      
-        
-          ICCARM
-           143 141
-        
-        
-          BICOMP
-           143 141
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ripemd.c
-      
-        
-          ICCARM
-           42
-        
-        
-          BICOMP
-           129
-        
-      
-      
-        
-          ICCARM
-           143 141
-        
-        
-          BICOMP
-           143 141
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dsa.c
-      
-        
-          ICCARM
-           11
-        
-        
-          BICOMP
-           128
-        
-      
-      
-        
-          ICCARM
-           143 141 192 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 176 185 191 193 182 163 194 190
-        
-        
-          BICOMP
-           143 141 192 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 176 185 191 193 182 163 194 190
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\error.c
-      
-        
-          ICCARM
-           36
-        
-        
-          BICOMP
-           119
-        
-      
-      
-        
-          ICCARM
-           143 141 190 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
-        
-        
-          BICOMP
-           143 141 190 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\logging.c
-      
-        
-          ICCARM
-           30
-        
-        
-          BICOMP
-           110
-        
-      
-      
-        
-          ICCARM
-           143 141 204 190 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
-        
-        
-          BICOMP
-           143 141 204 190 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\des3.c
-      
-        
-          ICCARM
-           26
-        
-        
-          BICOMP
-           54
-        
-      
-      
-        
-          ICCARM
-           143 141 170 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
-        
-        
-          BICOMP
-           143 141 170 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md2.c
-      
-        
-          ICCARM
-           16
-        
-        
-          BICOMP
-           118
-        
-      
-      
-        
-          ICCARM
-           143 141
-        
-        
-          BICOMP
-           143 141
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\pwdbased.c
-      
-        
-          ICCARM
-           59
-        
-        
-          BICOMP
-           111
-        
-      
-      
-        
-          ICCARM
-           143 141 203 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 209 194 195 208 176 185 191 193 190 90 200
-        
-        
-          BICOMP
-           143 141 203 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 209 194 195 208 176 185 191 193 190 90 200
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rabbit.c
-      
-        
-          ICCARM
-           64
-        
-        
-          BICOMP
-           127
-        
-      
-      
-        
-          ICCARM
-           143 141 202 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190 204 90 200
-        
-        
-          BICOMP
-           143 141 202 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190 204 90 200
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hmac.c
-      
-        
-          ICCARM
-           24
-        
-        
-          BICOMP
-           121
-        
-      
-      
-        
-          ICCARM
-           143 141 195 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 209 194 208 190
-        
-        
-          BICOMP
-           143 141 195 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 209 194 208 190
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc.c
-      
-        
-          ICCARM
-           10
-        
-        
-          BICOMP
-           130
-        
-      
-      
-        
-          ICCARM
-           143 141
-        
-        
-          BICOMP
-           143 141
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hc128.c
-      
-        
-          ICCARM
-           32
-        
-        
-          BICOMP
-           132
-        
-      
-      
-        
-          ICCARM
-           143 141
-        
-        
-          BICOMP
-           143 141
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md5.c
-      
-        
-          ICCARM
-           39
-        
-        
-          BICOMP
-           112
-        
-      
-      
-        
-          ICCARM
-           143 141 209 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
-        
-        
-          BICOMP
-           143 141 209 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asm.c
-      
-        
-          ICCARM
-           12
-        
-        
-          BICOMP
-           58
-        
-      
-      
-        
-          ICCARM
-           143 141
-        
-        
-          BICOMP
-           143 141
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\blake2b.c
-      
-        
-          ICCARM
-           25
-        
-        
-          BICOMP
-           40
-        
-      
-      
-        
-          ICCARM
-           143 141
-        
-        
-          BICOMP
-           143 141
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\camellia.c
-      
-        
-          ICCARM
-           20
-        
-        
-          BICOMP
-           48
-        
-      
-      
-        
-          ICCARM
-           143 141
-        
-        
-          BICOMP
-           143 141
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\integer.c
-      
-        
-          ICCARM
-           29
-        
-        
-          BICOMP
-           123
-        
-      
-      
-        
-          ICCARM
-           143 141 176 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 185 191 193
-        
-        
-          BICOMP
-           143 141 176 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 185 191 193
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md4.c
-      
-        
-          ICCARM
-           38
-        
-        
-          BICOMP
-           122
-        
-      
-      
-        
-          ICCARM
-           143 141 180 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
-        
-        
-          BICOMP
-           143 141 180 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 90 200
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\random.c
-      
-        
-          ICCARM
-           47
-        
-        
-          BICOMP
-           117
-        
-      
-      
-        
-          ICCARM
-           143 141 182 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 163 190
-        
-        
-          BICOMP
-           143 141 182 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 163 190
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\src\tls.c
-      
-        
-          ICCARM
-           9
-        
-        
-          BICOMP
-           65
-        
-      
-      
-        
-          ICCARM
-           143 141 137 162 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190
-        
-        
-          BICOMP
-           143 141 137 162 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory.c
-      
-        
-          ICCARM
-           66
-        
-        
-          BICOMP
-           109
-        
-      
-      
-        
-          ICCARM
-           143 141 178 164 106 107 149 139 155 154 138 136 190 181 186 188 161 183 172 165 166 173 167 168
-        
-        
-          BICOMP
-           143 141 178 164 106 107 149 139 155 154 138 136 190 181 186 188 161 183 172 165 166 173 167 168
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dh.c
-      
-        
-          ICCARM
-           21
-        
-        
-          BICOMP
-           60
-        
-      
-      
-        
-          ICCARM
-           143 141 196 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 176 185 191 193 182 163 190 179 187 169
-        
-        
-          BICOMP
-           143 141 196 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 176 185 191 193 182 163 190 179 187 169
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\aes.c
-      
-        
-          ICCARM
-           33
-        
-        
-          BICOMP
-           49
-        
-      
-      
-        
-          ICCARM
-           143 141 206 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190 204 90 200
-        
-        
-          BICOMP
-           143 141 206 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190 204 90 200
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\compress.c
-      
-        
-          ICCARM
-           19
-        
-        
-          BICOMP
-           46
-        
-      
-      
-        
-          ICCARM
-           143 141
-        
-        
-          BICOMP
-           143 141
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\misc.c
-      
-        
-          ICCARM
-           126
-        
-        
-          BICOMP
-           125
-        
-      
-      
-        
-          ICCARM
-           143 141 200 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
-        
-        
-          BICOMP
-           143 141 200 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\port.c
-      
-        
-          ICCARM
-           50
-        
-        
-          BICOMP
-           131
-        
-      
-      
-        
-          ICCARM
-           143 141 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190
-        
-        
-          BICOMP
-           143 141 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\arc4.c
-      
-        
-          ICCARM
-           17
-        
-        
-          BICOMP
-           45
-        
-      
-      
-        
-          ICCARM
-           143 141 163 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
-        
-        
-          BICOMP
-           143 141 163 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asn.c
-      
-        
-          ICCARM
-           37
-        
-        
-          BICOMP
-           52
-        
-      
-      
-        
-          ICCARM
-           143 141 176 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 185 191 193 211 207 182 163 196 192 194 209 177 210 198 199 190 203 170 208 201 204 189
-        
-        
-          BICOMP
-           143 141 176 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 185 191 193 211 207 182 163 196 192 194 209 177 210 198 199 190 203 170 208 201 204 189
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\coding.c
-      
-        
-          ICCARM
-           34
-        
-        
-          BICOMP
-           57
-        
-      
-      
-        
-          ICCARM
-           143 141 198 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190 204
-        
-        
-          BICOMP
-           143 141 198 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 190 204
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc_fp.c
-      
-        
-          ICCARM
-           22
-        
-        
-          BICOMP
-           120
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\CyaSSL\SSL-NB.c
-      
-        
-          ICCARM
-           18
-        
-        
-          BICOMP
-           44
-        
-      
-      
-        
-          ICCARM
-           143 141 8 106 107 149 139 155 154 138 136 151 188 161 5 6 28 15 27 13 156 150 146 148 153 152 144 158 160 108 140 147 159 157 137 162 184 181 186 178 164 183 172 165 166 173 167 168 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 145
-        
-        
-          BICOMP
-           143 141 8 106 107 149 139 155 154 138 136 151 188 161 5 6 28 15 27 13 156 150 146 148 153 152 144 158 160 108 140 147 159 157 137 162 184 181 186 178 164 183 172 165 166 173 167 168 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 145
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\src\internal.c
-      
-        
-          ICCARM
-           23
-        
-        
-          BICOMP
-           53
-        
-      
-      
-        
-          ICCARM
-           143 141 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 137 162 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190 189
-        
-        
-          BICOMP
-           143 141 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 137 162 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190 189
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\CyaSSL\HTTPS-NB.c
-      
-        
-          ICCARM
-           31
-        
         
           BICOMP
            134
@@ -1061,57 +259,34 @@
       
         
           ICCARM
-           143 141 8 106 107 149 139 155 154 138 136 151 188 161 5 6 28 15 27 13 156 150 146 148 153 152 144 158 160 108 140 147 159 157 137 162 178 164 145 174
+           178 163 165 55 29 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 13 12 33 38 19 40 57 52 24 4 51 206 56 39 48 31 25 49 44 43 54 204 208 42 205 207
         
         
           BICOMP
-           143 141 8 106 107 149 139 155 154 138 136 151 188 161 5 6 28 15 27 13 156 150 146 148 153 152 144 158 160 108 140 147 159 157 137 162 178 164 145 174
+           178 163 165 55 29 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 13 12 33 38 19 40 57 52 24 4 51 206 56 39 48 31 25 49 44 43 54 204 208 42 205 207
         
       
     
     
-      $PROJ_DIR$\..\..\..\..\src\io.c
+      $PROJ_DIR$\..\..\..\..\src\internal.c
       
         
           ICCARM
-           14
+           126
         
         
           BICOMP
-           115
+           130
         
       
       
         
           ICCARM
-           143 141 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 137 162 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190 5 6 28 15 27 13 8 151 156 150 146 148 153 152 144 158 160 108 140 147 159 157 145
+           178 163 29 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 165 55 13 12 33 38 19 40 57 52 24 4 51 206 56 39 48 31 25 49 44 43 54 204 208 42 205 46
         
         
           BICOMP
-           143 141 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 137 162 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190 5 6 28 15 27 13 8 151 156 150 146 148 153 152 144 158 160 108 140 147 159 157 145
-        
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\src\ssl.c
-      
-        
-          ICCARM
-           35
-        
-        
-          BICOMP
-           55
-        
-      
-      
-        
-          ICCARM
-           143 141 137 162 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190 198
-        
-        
-          BICOMP
-           143 141 137 162 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190 198
+           178 163 29 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 165 55 13 12 33 38 19 40 57 52 24 4 51 206 56 39 48 31 25 49 44 43 54 204 208 42 205 46
         
       
     
@@ -1120,44 +295,839 @@
       
         
           ICCARM
-           61
+           135
         
         
           BICOMP
-           51
+           157
         
       
       
         
           ICCARM
-           143 141 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 137 162 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190
+           178 163 29 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 165 55 13 12 33 38 19 40 57 52 24 4 51 206 56 39 48 31 25 49 44 43 54 204 208 42 205
         
         
           BICOMP
-           143 141 184 181 186 178 164 106 107 149 139 155 154 138 136 188 161 183 172 165 166 173 167 168 137 162 175 182 163 170 171 202 211 207 176 185 191 193 196 192 194 209 177 210 206 197 204 195 208 205 190
+           178 163 29 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 165 55 13 12 33 38 19 40 57 52 24 4 51 206 56 39 48 31 25 49 44 43 54 204 208 42 205
         
       
     
     
-      $PROJ_DIR$\..\..\CyaSSL\HTTPS-maic.c
+      $PROJ_DIR$\..\..\..\..\src\tls.c
       
         
           ICCARM
-           63
+           119
         
         
           BICOMP
-           56
+           131
         
       
       
         
           ICCARM
-           5 6 28 15 27 13 8 106 107 149 139 155 154 138 136 151 156 150 146 148 153 152 144 158 160 108 140 147 159 157 143 141 137 162 178 164 145 174 142
+           178 163 165 55 29 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 13 12 33 38 19 40 57 52 24 4 51 206 56 39 48 31 25 49 44 43 54 204 208 42 205
         
         
           BICOMP
-           5 6 28 15 27 13 8 106 107 149 139 155 154 138 136 151 156 150 146 148 153 152 144 158 160 108 140 147 159 157 143 141 137 162 178 164 145 174 142
+           178 163 165 55 29 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 13 12 33 38 19 40 57 52 24 4 51 206 56 39 48 31 25 49 44 43 54 204 208 42 205
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\aes.c
+      
+        
+          ICCARM
+           105
+        
+        
+          BICOMP
+           146
+        
+      
+      
+        
+          ICCARM
+           178 163 44 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 205 54 92 41
+        
+        
+          BICOMP
+           178 163 44 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 205 54 92 41
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\CyaSSL\https-maic.c
+      
+        
+          ICCARM
+           150
+        
+        
+          BICOMP
+           151
+        
+      
+      
+        
+          ICCARM
+           122 141 116 100 124 152 136 196 192 166 170 181 180 183 168 173 194 177 167 185 202 179 172 160 159 32 189 169 176 9 184 178 163 165 55 29 10 34 17 53 35 27 26 11 47 45 16 37 28 13 12 33 38 19 40 57 52 24 4 51 206 56 39 48 31 25 49 44 43 54 204 208 50 158
+        
+        
+          BICOMP
+           122 141 116 100 124 152 136 196 192 166 170 181 180 183 168 173 194 177 167 185 202 179 172 160 159 32 189 169 176 9 184 178 163 165 55 29 10 34 17 53 35 27 26 11 47 45 16 37 28 13 12 33 38 19 40 57 52 24 4 51 206 56 39 48 31 25 49 44 43 54 204 208 50 158
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\src\io.c
+      
+        
+          ICCARM
+           103
+        
+        
+          BICOMP
+           199
+        
+      
+      
+        
+          ICCARM
+           178 163 29 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 165 55 13 12 33 38 19 40 57 52 24 4 51 206 56 39 48 31 25 49 44 43 54 204 208 42 205 122 141 116 100 124 152 136 173 194 177 167 185 202 179 172 160 159 32 189 169 176 9 184
+        
+        
+          BICOMP
+           178 163 29 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 165 55 13 12 33 38 19 40 57 52 24 4 51 206 56 39 48 31 25 49 44 43 54 204 208 42 205 122 141 116 100 124 152 136 173 194 177 167 185 202 179 172 160 159 32 189 169 176 9 184
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\compress.c
+      
+        
+          ICCARM
+           111
+        
+        
+          BICOMP
+           149
+        
+      
+      
+        
+          ICCARM
+           178 163
+        
+        
+          BICOMP
+           178 163
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\camellia.c
+      
+        
+          ICCARM
+           106
+        
+        
+          BICOMP
+           145
+        
+      
+      
+        
+          ICCARM
+           178 163
+        
+        
+          BICOMP
+           178 163
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\error.c
+      
+        
+          ICCARM
+           102
+        
+        
+          BICOMP
+           3
+        
+      
+      
+        
+          ICCARM
+           178 163 205 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28
+        
+        
+          BICOMP
+           178 163 205 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md2.c
+      
+        
+          ICCARM
+           125
+        
+        
+          BICOMP
+           20
+        
+      
+      
+        
+          ICCARM
+           178 163
+        
+        
+          BICOMP
+           178 163
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\port.c
+      
+        
+          ICCARM
+           139
+        
+        
+          BICOMP
+           174
+        
+      
+      
+        
+          ICCARM
+           178 163 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 205
+        
+        
+          BICOMP
+           178 163 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 205
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dh.c
+      
+        
+          ICCARM
+           123
+        
+        
+          BICOMP
+           137
+        
+      
+      
+        
+          ICCARM
+           178 163 56 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 24 4 51 206 12 33 205 18 36 2
+        
+        
+          BICOMP
+           178 163 56 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 24 4 51 206 12 33 205 18 36 2
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\pwdbased.c
+      
+        
+          ICCARM
+           144
+        
+        
+          BICOMP
+           8
+        
+      
+      
+        
+          ICCARM
+           178 163 203 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 31 48 204 208 24 4 51 206 205 92 41
+        
+        
+          BICOMP
+           178 163 203 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 31 48 204 208 24 4 51 206 205 92 41
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rsa.c
+      
+        
+          ICCARM
+           188
+        
+        
+          BICOMP
+           187
+        
+      
+      
+        
+          ICCARM
+           178 163 52 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 24 4 51 206 12 33 205 54
+        
+        
+          BICOMP
+           178 163 52 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 24 4 51 206 12 33 205 54
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha.c
+      
+        
+          ICCARM
+           142
+        
+        
+          BICOMP
+           164
+        
+      
+      
+        
+          ICCARM
+           178 163 48 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 92 41
+        
+        
+          BICOMP
+           178 163 48 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 92 41
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md4.c
+      
+        
+          ICCARM
+           109
+        
+        
+          BICOMP
+           21
+        
+      
+      
+        
+          ICCARM
+           178 163 23 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 92 41
+        
+        
+          BICOMP
+           178 163 23 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 92 41
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ripemd.c
+      
+        
+          ICCARM
+           133
+        
+        
+          BICOMP
+           182
+        
+      
+      
+        
+          ICCARM
+           178 163
+        
+        
+          BICOMP
+           178 163
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asm.c
+      
+        
+          ICCARM
+           127
+        
+        
+          BICOMP
+           147
+        
+      
+      
+        
+          ICCARM
+           178 163
+        
+        
+          BICOMP
+           178 163
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dsa.c
+      
+        
+          ICCARM
+           120
+        
+        
+          BICOMP
+           198
+        
+      
+      
+        
+          ICCARM
+           178 163 39 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 24 4 51 206 12 33 48 205
+        
+        
+          BICOMP
+           178 163 39 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 24 4 51 206 12 33 48 205
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc_fp.c
+      
+        
+          ICCARM
+           110
+        
+        
+          BICOMP
+           190
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\arc4.c
+      
+        
+          ICCARM
+           112
+        
+        
+          BICOMP
+           156
+        
+      
+      
+        
+          ICCARM
+           178 163 33 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28
+        
+        
+          BICOMP
+           178 163 33 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\logging.c
+      
+        
+          ICCARM
+           99
+        
+        
+          BICOMP
+           7
+        
+      
+      
+        
+          ICCARM
+           178 163 54 205 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28
+        
+        
+          BICOMP
+           178 163 54 205 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rabbit.c
+      
+        
+          ICCARM
+           140
+        
+        
+          BICOMP
+           22
+        
+      
+      
+        
+          ICCARM
+           178 163 40 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 205 54 92 41
+        
+        
+          BICOMP
+           178 163 40 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 205 54 92 41
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asn.c
+      
+        
+          ICCARM
+           114
+        
+        
+          BICOMP
+           148
+        
+      
+      
+        
+          ICCARM
+           178 163 24 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 4 51 206 57 52 12 33 56 39 48 31 25 49 207 58 205 203 38 208 30 54 46
+        
+        
+          BICOMP
+           178 163 24 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 4 51 206 57 52 12 33 56 39 48 31 25 49 207 58 205 203 38 208 30 54 46
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\blake2b.c
+      
+        
+          ICCARM
+           101
+        
+        
+          BICOMP
+           129
+        
+      
+      
+        
+          ICCARM
+           178 163
+        
+        
+          BICOMP
+           178 163
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\coding.c
+      
+        
+          ICCARM
+           117
+        
+        
+          BICOMP
+           143
+        
+      
+      
+        
+          ICCARM
+           178 163 207 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 205 54
+        
+        
+          BICOMP
+           178 163 207 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 205 54
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc.c
+      
+        
+          ICCARM
+           128
+        
+        
+          BICOMP
+           175
+        
+      
+      
+        
+          ICCARM
+           178 163
+        
+        
+          BICOMP
+           178 163
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hmac.c
+      
+        
+          ICCARM
+           107
+        
+        
+          BICOMP
+           200
+        
+      
+      
+        
+          ICCARM
+           178 163 204 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 31 48 208 205
+        
+        
+          BICOMP
+           178 163 204 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 31 48 208 205
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\integer.c
+      
+        
+          ICCARM
+           118
+        
+        
+          BICOMP
+           14
+        
+      
+      
+        
+          ICCARM
+           178 163 24 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 4 51 206
+        
+        
+          BICOMP
+           178 163 24 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 4 51 206
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory.c
+      
+        
+          ICCARM
+           5
+        
+        
+          BICOMP
+           6
+        
+      
+      
+        
+          ICCARM
+           178 163 17 53 196 192 166 170 181 180 183 168 205 10 34 35 27 26 11 47 45 16 37 28
+        
+        
+          BICOMP
+           178 163 17 53 196 192 166 170 181 180 183 168 205 10 34 35 27 26 11 47 45 16 37 28
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\misc.c
+      
+        
+          ICCARM
+           201
+        
+        
+          BICOMP
+           186
+        
+      
+      
+        
+          ICCARM
+           178 163 41 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28
+        
+        
+          BICOMP
+           178 163 41 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\random.c
+      
+        
+          ICCARM
+           154
+        
+        
+          BICOMP
+           193
+        
+      
+      
+        
+          ICCARM
+           178 163 12 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 33 205
+        
+        
+          BICOMP
+           178 163 12 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 33 205
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\des3.c
+      
+        
+          ICCARM
+           113
+        
+        
+          BICOMP
+           153
+        
+      
+      
+        
+          ICCARM
+           178 163 38 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 92 41
+        
+        
+          BICOMP
+           178 163 38 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 92 41
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hc128.c
+      
+        
+          ICCARM
+           97
+        
+        
+          BICOMP
+           161
+        
+      
+      
+        
+          ICCARM
+           178 163
+        
+        
+          BICOMP
+           178 163
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md5.c
+      
+        
+          ICCARM
+           132
+        
+        
+          BICOMP
+           1
+        
+      
+      
+        
+          ICCARM
+           178 163 31 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 92 41
+        
+        
+          BICOMP
+           178 163 31 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 92 41
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\tfm.c
+      
+        
+          ICCARM
+           155
+        
+        
+          BICOMP
+           197
+        
+      
+      
+        
+          ICCARM
+           178 163
+        
+        
+          BICOMP
+           178 163
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha512.c
+      
+        
+          ICCARM
+           15
+        
+        
+          BICOMP
+           162
+        
+      
+      
+        
+          ICCARM
+           178 163
+        
+        
+          BICOMP
+           178 163
+        
+      
+    
+    
+      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha256.c
+      
+        
+          ICCARM
+           138
+        
+        
+          BICOMP
+           195
+        
+      
+      
+        
+          ICCARM
+           178 163 208 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 92 41
+        
+        
+          BICOMP
+           178 163 208 10 34 17 53 196 192 166 170 181 180 183 168 35 27 26 11 47 45 16 37 28 92 41
         
       
     
diff --git a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
index 6ab3883f3..e35c88a81 100644
--- a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
+++ b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
@@ -930,7 +930,7 @@
         
         
       
     
@@ -1875,13 +1875,7 @@
   
     Apps
     
-      $PROJ_DIR$\..\..\CyaSSL\HTTPS-maic.c
-    
-    
-      $PROJ_DIR$\..\..\CyaSSL\HTTPS-NB.c
-    
-    
-      $PROJ_DIR$\..\..\CyaSSL\SSL-NB.c
+      $PROJ_DIR$\..\..\CyaSSL\https-nb.c
     
   
   
diff --git a/cyassl/internal.h b/cyassl/internal.h
index cd14d72c0..9c903814a 100644
--- a/cyassl/internal.h
+++ b/cyassl/internal.h
@@ -964,6 +964,8 @@ int  SetCipherList(Suites*, const char* list);
 #ifdef HAVE_LWIP_NATIVE
     CYASSL_LOCAL int CyaSSL_LwIP_Send(CYASSL* ssl, char *buf, int sz, void *cb);
     CYASSL_LOCAL int CyaSSL_LwIP_Receive(CYASSL* ssl, char *buf, int sz, void *cb);
+    CYASSL_LOCAL void CyaSSL_NB_setCallbackArg(CYASSL *ssl, void *arg) ;
+    CYASSL_LOCAL void CyaSSL_PbufFree(void *p);
 #endif /* HAVE_{tcp stack} */
 
 /* CyaSSL Cipher type just points back to SSL */
@@ -1533,8 +1535,7 @@ typedef void (*hmacfp) (CYASSL*, byte*, const byte*, word32, int, int);
 
 /* client connect state for nonblocking restart */
 enum ConnectState {
-    CONNECT_INITIAL = 0,
-    CONNECT_BEGIN,
+    CONNECT_BEGIN = 0,
     CLIENT_HELLO_SENT,
     HELLO_AGAIN,               /* HELLO_AGAIN s for DTLS case */
     HELLO_AGAIN_REPLY,
@@ -1801,6 +1802,17 @@ typedef struct DtlsMsg {
 
 #endif
 
+#ifdef HAVE_LWIP_NATIVE
+    /* LwIP native tpc socket context */
+    typedef struct LwIP_native_Ctx {
+        struct tcp_pcb * pcb ;
+        int    pulled  ; 
+        struct pbuf *pbuf ;
+        int    wait ;
+        void * arg ;   /* arg for application */
+        int    idle_count ;
+    } LwIP_native_Ctx ;    
+#endif
 
 /* CyaSSL ssl type */
 struct CYASSL {
@@ -1912,6 +1924,9 @@ struct CYASSL {
 #ifdef HAVE_NETX
     NetX_Ctx        nxCtx;             /* NetX IO Context */
 #endif
+#ifdef HAVE_LWIP_NATIVE
+    LwIP_native_Ctx        lwipCtx;             /* NetX IO Context */
+#endif
 #ifdef SESSION_INDEX
     int sessionIndex;                  /* Session's location in the cache. */
 #endif
diff --git a/cyassl/internal.h.orig b/cyassl/internal.h.orig
deleted file mode 100644
index 085d2a393..000000000
--- a/cyassl/internal.h.orig
+++ /dev/null
@@ -1,2121 +0,0 @@
-/* internal.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-#ifndef CYASSL_INT_H
-#define CYASSL_INT_H
-
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#ifndef NO_RC4
-    #include 
-#endif
-#ifdef HAVE_ECC
-    #include 
-#endif
-#ifndef NO_SHA256
-    #include 
-#endif
-#ifdef HAVE_OCSP
-    #include 
-#endif
-#ifdef CYASSL_SHA512
-    #include 
-#endif
-
-#ifdef HAVE_AESGCM
-    #include 
-#endif
-
-#ifdef CYASSL_RIPEMD
-    #include 
-#endif
-
-#ifdef CYASSL_CALLBACKS
-    #include 
-    #include 
-#endif
-
-#ifdef USE_WINDOWS_API 
-    #ifdef CYASSL_GAME_BUILD
-        #include "system/xtl.h"
-    #else
-        #if defined(_WIN32_WCE) || defined(WIN32_LEAN_AND_MEAN)
-            /* On WinCE winsock2.h must be included before windows.h */
-            #include 
-        #endif
-        #include 
-    #endif
-#elif defined(THREADX)
-    #ifndef SINGLE_THREADED
-        #include "tx_api.h"
-    #endif
-#elif defined(MICRIUM)
-    /* do nothing, just don't pick Unix */
-#elif defined(FREERTOS) || defined(CYASSL_SAFERTOS)
-    /* do nothing */
-#elif defined(EBSNET)
-    /* do nothing */
-#elif defined(FREESCALE_MQX)
-    /* do nothing */
-#elif defined(CYASSL_MDK_ARM)
-    #if defined(CYASSL_MDK5)
-         #include "cmsis_os.h"
-    #else
-        #include 
-    #endif
-#else
-    #ifndef SINGLE_THREADED
-        #define CYASSL_PTHREADS
-        #include 
-    #endif
-    #if defined(OPENSSL_EXTRA) || defined(GOAHEAD_WS)
-        #include       /* for close of BIO */
-    #endif
-#endif
-
-
-#ifdef HAVE_LIBZ
-    #include "zlib.h"
-#endif
-
-#ifdef _MSC_VER
-    /* 4996 warning to use MS extensions e.g., strcpy_s instead of strncpy */
-    #pragma warning(disable: 4996)
-#endif
-
-#ifdef NO_AES
-    #if !defined (ALIGN16)
-        #define ALIGN16
-    #endif
-#endif
-
-#ifdef NO_SHA
-    #define SHA_DIGEST_SIZE 20 
-#endif
-
-#ifdef NO_SHA256
-    #define SHA256_DIGEST_SIZE 32 
-#endif
-
-
-#ifdef __cplusplus
-    extern "C" {
-#endif
-
-
-#ifdef USE_WINDOWS_API 
-    typedef unsigned int SOCKET_T;
-#else
-    typedef int SOCKET_T;
-#endif
-
-
-typedef byte word24[3];
-
-/* used by ssl.c and cyassl_int.c */
-void c32to24(word32 in, word24 out);
-
-/* Define or comment out the cipher suites you'd like to be compiled in
-   make sure to use at least one BUILD_SSL_xxx or BUILD_TLS_xxx is defined
-
-   When adding cipher suites, add name to cipher_names, idx to cipher_name_idx
-*/
-#if !defined(NO_RSA) && !defined(NO_RC4)
-  #if !defined(NO_SHA)
-    #define BUILD_SSL_RSA_WITH_RC4_128_SHA
-  #endif
-    #if !defined(NO_MD5)
-        #define BUILD_SSL_RSA_WITH_RC4_128_MD5
-    #endif
-    #if !defined(NO_TLS) && defined(HAVE_NTRU) && !defined(NO_SHA)
-        #define BUILD_TLS_NTRU_RSA_WITH_RC4_128_SHA
-    #endif
-#endif
-
-#if !defined(NO_RSA) && !defined(NO_DES3)
-  #if !defined(NO_SHA)
-    #define BUILD_SSL_RSA_WITH_3DES_EDE_CBC_SHA
-    #if !defined(NO_TLS) && defined(HAVE_NTRU)
-        #define BUILD_TLS_NTRU_RSA_WITH_3DES_EDE_CBC_SHA
-    #endif
-  #endif
-#endif
-
-#if !defined(NO_RSA) && !defined(NO_AES) && !defined(NO_TLS)
-  #if !defined(NO_SHA)
-    #define BUILD_TLS_RSA_WITH_AES_128_CBC_SHA
-    #define BUILD_TLS_RSA_WITH_AES_256_CBC_SHA
-    #if defined(HAVE_NTRU)
-        #define BUILD_TLS_NTRU_RSA_WITH_AES_128_CBC_SHA
-        #define BUILD_TLS_NTRU_RSA_WITH_AES_256_CBC_SHA
-    #endif
-  #endif
-    #if !defined (NO_SHA256)
-        #define BUILD_TLS_RSA_WITH_AES_128_CBC_SHA256
-        #define BUILD_TLS_RSA_WITH_AES_256_CBC_SHA256
-    #endif
-    #if defined (HAVE_AESGCM)
-        #define BUILD_TLS_RSA_WITH_AES_128_GCM_SHA256
-        #if defined (CYASSL_SHA384)
-            #define BUILD_TLS_RSA_WITH_AES_256_GCM_SHA384
-        #endif
-    #endif
-    #if defined (HAVE_AESCCM)
-        #define BUILD_TLS_RSA_WITH_AES_128_CCM_8
-        #define BUILD_TLS_RSA_WITH_AES_256_CCM_8
-    #endif
-    #if defined(HAVE_BLAKE2)
-        #define BUILD_TLS_RSA_WITH_AES_128_CBC_B2B256
-        #define BUILD_TLS_RSA_WITH_AES_256_CBC_B2B256
-    #endif
-#endif
-
-#if defined(HAVE_CAMELLIA) && !defined(NO_TLS)
-    #ifndef NO_RSA
-      #if !defined(NO_SHA)
-        #define BUILD_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
-        #define BUILD_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
-      #endif
-        #ifndef NO_SHA256
-            #define BUILD_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
-            #define BUILD_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
-        #endif
-        #if !defined(NO_DH) && defined(OPENSSL_EXTRA)
-          #if !defined(NO_SHA)
-            #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
-            #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
-          #endif
-            #ifndef NO_SHA256
-                #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
-                #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
-            #endif
-        #endif
-    #endif
-#endif
-
-#if !defined(NO_PSK) && !defined(NO_AES) && !defined(NO_TLS)
-  #if !defined(NO_SHA)
-    #define BUILD_TLS_PSK_WITH_AES_128_CBC_SHA
-    #define BUILD_TLS_PSK_WITH_AES_256_CBC_SHA
-  #endif
-    #ifndef NO_SHA256
-        #define BUILD_TLS_PSK_WITH_AES_128_CBC_SHA256
-        #ifdef HAVE_AESCCM
-            #define BUILD_TLS_PSK_WITH_AES_128_CCM_8
-            #define BUILD_TLS_PSK_WITH_AES_256_CCM_8
-        #endif
-    #endif
-#endif
-
-#if !defined(NO_TLS) && defined(HAVE_NULL_CIPHER)
-    #if !defined(NO_RSA)
-      #if !defined(NO_SHA)
-        #define BUILD_TLS_RSA_WITH_NULL_SHA
-      #endif
-      #ifndef NO_SHA256
-        #define BUILD_TLS_RSA_WITH_NULL_SHA256
-      #endif
-    #endif
-    #if !defined(NO_PSK)
-      #if !defined(NO_SHA)
-        #define BUILD_TLS_PSK_WITH_NULL_SHA
-      #endif
-        #ifndef NO_SHA256
-            #define BUILD_TLS_PSK_WITH_NULL_SHA256
-        #endif
-    #endif
-#endif
-
-#if !defined(NO_HC128) && !defined(NO_RSA) && !defined(NO_TLS)
-    #define BUILD_TLS_RSA_WITH_HC_128_MD5
-  #if !defined(NO_SHA)
-    #define BUILD_TLS_RSA_WITH_HC_128_SHA
-  #endif
-  #if defined(HAVE_BLAKE2)
-    #define BUILD_TLS_RSA_WITH_HC_128_B2B256
-  #endif
-#endif
-
-#if !defined(NO_RABBIT) && !defined(NO_TLS) && !defined(NO_RSA)
-  #if !defined(NO_SHA)
-    #define BUILD_TLS_RSA_WITH_RABBIT_SHA
-  #endif
-#endif
-
-#if !defined(NO_DH) && !defined(NO_AES) && !defined(NO_TLS) && \
-    !defined(NO_RSA) && defined(OPENSSL_EXTRA)
-  #if !defined(NO_SHA)
-    #define BUILD_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
-    #define BUILD_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
-  #endif
-    #if !defined (NO_SHA256)
-        #define BUILD_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
-        #define BUILD_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
-        #if defined (HAVE_AESGCM)
-            #define BUILD_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
-            #if defined (CYASSL_SHA384)
-                #define BUILD_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
-            #endif
-        #endif
-    #endif
-#endif
-
-#if defined(HAVE_ECC) && !defined(NO_TLS)
-    #if !defined(NO_AES)
-        #if !defined(NO_SHA)
-            #if !defined(NO_RSA)
-                #define BUILD_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
-                #define BUILD_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
-                #define BUILD_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
-                #define BUILD_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
-            #endif
-    
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
-    
-            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
-            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
-        #endif /* NO_SHA */
-        #ifndef NO_SHA256
-            #if !defined(NO_RSA)
-                #define BUILD_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
-                #define BUILD_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
-            #endif
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
-            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
-        #endif
-
-        #ifdef CYASSL_SHA384
-            #if !defined(NO_RSA)
-                #define BUILD_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
-                #define BUILD_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
-            #endif
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
-            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
-        #endif
-
-        #if defined (HAVE_AESGCM)
-            #if !defined(NO_RSA)
-                #define BUILD_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
-                #define BUILD_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
-                #if defined(CYASSL_SHA384)
-                    #define BUILD_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
-                    #define BUILD_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
-                #endif
-            #endif
-
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
-            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
-            
-            #if defined(CYASS_SHA384)
-                #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
-                #define BUILD_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
-            #endif
-        #endif
-        #if defined (HAVE_AESCCM)
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8
-        #endif
-    #endif /* NO_AES */
-    #if !defined(NO_RC4)
-        #if !defined(NO_SHA)
-            #if !defined(NO_RSA)
-                #define BUILD_TLS_ECDHE_RSA_WITH_RC4_128_SHA
-                #define BUILD_TLS_ECDH_RSA_WITH_RC4_128_SHA
-            #endif
-
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
-            #define BUILD_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
-        #endif
-    #endif
-    #if !defined(NO_DES3)
-        #if !defined(NO_RSA)
-            #define BUILD_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
-            #define BUILD_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
-        #endif
-
-        #define BUILD_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
-        #define BUILD_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
-    #endif
-#endif
-
-
-#if defined(BUILD_SSL_RSA_WITH_RC4_128_SHA) || \
-    defined(BUILD_SSL_RSA_WITH_RC4_128_MD5)
-    #define BUILD_ARC4
-#endif
-
-#if defined(BUILD_SSL_RSA_WITH_3DES_EDE_CBC_SHA)
-    #define BUILD_DES3
-#endif
-
-#if defined(BUILD_TLS_RSA_WITH_AES_128_CBC_SHA) || \
-    defined(BUILD_TLS_RSA_WITH_AES_256_CBC_SHA) || \
-    defined(BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256)
-    #undef  BUILD_AES
-    #define BUILD_AES
-#endif
-
-#if defined(BUILD_TLS_RSA_WITH_AES_128_GCM_SHA256) || \
-    defined(BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256)
-    #define BUILD_AESGCM
-#endif
-
-#if defined(BUILD_TLS_RSA_WITH_HC_128_SHA) || \
-    defined(BUILD_TLS_RSA_WITH_HC_128_MD5) || \
-    defined(BUILD_TLS_RSA_WITH_HC_128_B2B256)
-    #define BUILD_HC128
-#endif
-
-#if defined(BUILD_TLS_RSA_WITH_RABBIT_SHA)
-    #define BUILD_RABBIT
-#endif
-
-#ifdef NO_DES3
-    #define DES_BLOCK_SIZE 8
-#else
-    #undef  BUILD_DES3
-    #define BUILD_DES3
-#endif
-
-#ifdef NO_AES
-    #define AES_BLOCK_SIZE 16
-#else
-    #undef  BUILD_AES
-    #define BUILD_AES
-#endif
-
-#ifndef NO_RC4
-    #undef  BUILD_ARC4
-    #define BUILD_ARC4
-#endif
-
-
-
-#if defined(BUILD_AESGCM) || defined(HAVE_AESCCM)
-    #define HAVE_AEAD
-#endif
-
-
-/* actual cipher values, 2nd byte */
-enum {
-    TLS_DHE_RSA_WITH_AES_256_CBC_SHA  = 0x39,
-    TLS_DHE_RSA_WITH_AES_128_CBC_SHA  = 0x33,
-    TLS_RSA_WITH_AES_256_CBC_SHA      = 0x35,
-    TLS_RSA_WITH_AES_128_CBC_SHA      = 0x2F,
-    TLS_RSA_WITH_NULL_SHA             = 0x02,
-    TLS_PSK_WITH_AES_256_CBC_SHA      = 0x8d,
-    TLS_PSK_WITH_AES_128_CBC_SHA256   = 0xae,
-    TLS_PSK_WITH_AES_128_CBC_SHA      = 0x8c,
-    TLS_PSK_WITH_NULL_SHA256          = 0xb0,
-    TLS_PSK_WITH_NULL_SHA             = 0x2c,
-    SSL_RSA_WITH_RC4_128_SHA          = 0x05,
-    SSL_RSA_WITH_RC4_128_MD5          = 0x04,
-    SSL_RSA_WITH_3DES_EDE_CBC_SHA     = 0x0A,
-
-    /* ECC suites, first byte is 0xC0 (ECC_BYTE) */
-    TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA    = 0x14,
-    TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA    = 0x13,
-    TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA  = 0x0A,
-    TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA  = 0x09,
-    TLS_ECDHE_RSA_WITH_RC4_128_SHA        = 0x11,
-    TLS_ECDHE_ECDSA_WITH_RC4_128_SHA      = 0x07,
-    TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA   = 0x12,
-    TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA = 0x08,
-    TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256   = 0x27,
-    TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 = 0x23,
-    TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384   = 0x28,
-    TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 = 0x24,
-
-    /* static ECDH, first byte is 0xC0 (ECC_BYTE) */
-    TLS_ECDH_RSA_WITH_AES_256_CBC_SHA    = 0x0F,
-    TLS_ECDH_RSA_WITH_AES_128_CBC_SHA    = 0x0E,
-    TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA  = 0x05,
-    TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA  = 0x04,
-    TLS_ECDH_RSA_WITH_RC4_128_SHA        = 0x0C,
-    TLS_ECDH_ECDSA_WITH_RC4_128_SHA      = 0x02,
-    TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA   = 0x0D,
-    TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA = 0x03,
-    TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256   = 0x29,
-    TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 = 0x25,
-    TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384   = 0x2A,
-    TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 = 0x26,
-
-    /* CyaSSL extension - eSTREAM */
-    TLS_RSA_WITH_HC_128_MD5       = 0xFB,
-    TLS_RSA_WITH_HC_128_SHA       = 0xFC,
-    TLS_RSA_WITH_RABBIT_SHA       = 0xFD,
-
-    /* CyaSSL extension - Blake2b 256 */
-    TLS_RSA_WITH_AES_128_CBC_B2B256   = 0xF8,
-    TLS_RSA_WITH_AES_256_CBC_B2B256   = 0xF9,
-    TLS_RSA_WITH_HC_128_B2B256        = 0xFA,   /* eSTREAM too */
-
-    /* CyaSSL extension - NTRU */
-    TLS_NTRU_RSA_WITH_RC4_128_SHA      = 0xe5,
-    TLS_NTRU_RSA_WITH_3DES_EDE_CBC_SHA = 0xe6,
-    TLS_NTRU_RSA_WITH_AES_128_CBC_SHA  = 0xe7,  /* clases w/ official SHA-256 */
-    TLS_NTRU_RSA_WITH_AES_256_CBC_SHA  = 0xe8,
-
-    /* SHA256 */
-    TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 = 0x6b,
-    TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 = 0x67,
-    TLS_RSA_WITH_AES_256_CBC_SHA256     = 0x3d,
-    TLS_RSA_WITH_AES_128_CBC_SHA256     = 0x3c,
-    TLS_RSA_WITH_NULL_SHA256            = 0x3b,
-
-    /* AES-GCM */
-    TLS_RSA_WITH_AES_128_GCM_SHA256          = 0x9c,
-    TLS_RSA_WITH_AES_256_GCM_SHA384          = 0x9d,
-    TLS_DHE_RSA_WITH_AES_128_GCM_SHA256      = 0x9e,
-    TLS_DHE_RSA_WITH_AES_256_GCM_SHA384      = 0x9f,
-
-    /* ECC AES-GCM, first byte is 0xC0 (ECC_BYTE) */
-    TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256  = 0x2b,
-    TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384  = 0x2c,
-    TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256   = 0x2d,
-    TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384   = 0x2e,
-    TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256    = 0x2f,
-    TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384    = 0x30,
-    TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256     = 0x31,
-    TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384     = 0x32,
-
-    /* AES-CCM, first byte is 0xC0 but isn't ECC,
-     * also, in some of the other AES-CCM suites
-     * there will be second byte number conflicts
-     * with non-ECC AES-GCM */
-    TLS_RSA_WITH_AES_128_CCM_8         = 0xa0,
-    TLS_RSA_WITH_AES_256_CCM_8         = 0xa1,
-    TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8 = 0xc6, /* Still TBD, made up */
-    TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8 = 0xc7, /* Still TBD, made up */
-    TLS_PSK_WITH_AES_128_CCM           = 0xa4,
-    TLS_PSK_WITH_AES_256_CCM           = 0xa5,
-    TLS_PSK_WITH_AES_128_CCM_8         = 0xa8,
-    TLS_PSK_WITH_AES_256_CCM_8         = 0xa9,
-
-    TLS_RSA_WITH_CAMELLIA_128_CBC_SHA        = 0x41,
-    TLS_RSA_WITH_CAMELLIA_256_CBC_SHA        = 0x84,
-    TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256     = 0xba,
-    TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256     = 0xc0,
-    TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA    = 0x45,
-    TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA    = 0x88,
-    TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 = 0xbe,
-    TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 = 0xc4,
-
-    /* Renegotiation Indication Extension Special Suite */
-    TLS_EMPTY_RENEGOTIATION_INFO_SCSV        = 0xff
-};
-
-
-enum Misc {
-    ECC_BYTE =  0xC0,           /* ECC first cipher suite byte */
-
-    SEND_CERT       = 1,
-    SEND_BLANK_CERT = 2,
-
-    DTLS_MAJOR      = 0xfe,     /* DTLS major version number */
-    DTLS_MINOR      = 0xff,     /* DTLS minor version number */
-    DTLSv1_2_MINOR  = 0xfd,     /* DTLS minor version number */
-    SSLv3_MAJOR     = 3,        /* SSLv3 and TLSv1+  major version number */
-    SSLv3_MINOR     = 0,        /* TLSv1   minor version number */
-    TLSv1_MINOR     = 1,        /* TLSv1   minor version number */
-    TLSv1_1_MINOR   = 2,        /* TLSv1_1 minor version number */
-    TLSv1_2_MINOR   = 3,        /* TLSv1_2 minor version number */
-    INVALID_BYTE    = 0xff,     /* Used to initialize cipher specs values */
-    NO_COMPRESSION  =  0,
-    ZLIB_COMPRESSION = 221,     /* CyaSSL zlib compression */
-    HELLO_EXT_SIG_ALGO = 13,    /* ID for the sig_algo hello extension */
-    SECRET_LEN      = 48,       /* pre RSA and all master */
-    ENCRYPT_LEN     = 512,      /* allow 4096 bit static buffer */
-    SIZEOF_SENDER   =  4,       /* clnt or srvr           */
-    FINISHED_SZ     = 36,       /* MD5_DIGEST_SIZE + SHA_DIGEST_SIZE */
-    MAX_RECORD_SIZE = 16384,    /* 2^14, max size by standard */
-    MAX_MSG_EXTRA   = 38 + MAX_DIGEST_SIZE,
-                                /* max added to msg, mac + pad  from */
-                                /* RECORD_HEADER_SZ + BLOCK_SZ (pad) + Max
-                                   digest sz + BLOC_SZ (iv) + pad byte (1) */
-    MAX_COMP_EXTRA  = 1024,     /* max compression extra */
-    MAX_MTU         = 1500,     /* max expected MTU */
-    MAX_UDP_SIZE    = 8192 - 100, /* was MAX_MTU - 100 */
-    MAX_DH_SZ       = 612,      /* 2240 p, pub, g + 2 byte size for each */
-    MAX_STR_VERSION = 8,        /* string rep of protocol version */
-
-    PAD_MD5        = 48,       /* pad length for finished */
-    PAD_SHA        = 40,       /* pad length for finished */
-    MAX_PAD_SIZE   = 256,      /* maximum length of padding */
-    COMPRESS_DUMMY_SIZE = 64,  /* compression dummy round size */
-    COMPRESS_CONSTANT   = 13,  /* compression calc constant */
-    COMPRESS_UPPER      = 55,  /* compression calc numerator */
-    COMPRESS_LOWER      = 64,  /* compression calc denominator */
-
-    PEM_LINE_LEN   = 80,       /* PEM line max + fudge */
-    LENGTH_SZ      =  2,       /* length field for HMAC, data only */
-    VERSION_SZ     =  2,       /* length of proctocol version */
-    SEQ_SZ         =  8,       /* 64 bit sequence number  */
-    BYTE3_LEN      =  3,       /* up to 24 bit byte lengths */
-    ALERT_SIZE     =  2,       /* level + description     */
-    REQUEST_HEADER =  2,       /* always use 2 bytes      */
-    VERIFY_HEADER  =  2,       /* always use 2 bytes      */
-    EXT_ID_SZ      =  2,       /* always use 2 bytes      */
-    MAX_DH_SIZE    = 513,      /* 4096 bit plus possible leading 0 */
-
-    MAX_SUITE_SZ = 200,        /* 100 suites for now! */
-    RAN_LEN      = 32,         /* random length           */
-    SEED_LEN     = RAN_LEN * 2, /* tls prf seed length    */
-    ID_LEN       = 32,         /* session id length       */
-    MAX_COOKIE_LEN = 32,       /* max dtls cookie size    */
-    COOKIE_SZ    = 20,         /* use a 20 byte cookie    */
-    SUITE_LEN    =  2,         /* cipher suite sz length  */
-    ENUM_LEN     =  1,         /* always a byte           */
-    OPAQUE16_LEN =  2,         /* always 2 bytes          */
-    COMP_LEN     =  1,         /* compression length      */
-    CURVE_LEN    =  2,         /* ecc named curve length  */
-    SERVER_ID_LEN = 20,        /* server session id length  */
-    
-    HANDSHAKE_HEADER_SZ   = 4,  /* type + length(3)        */
-    RECORD_HEADER_SZ      = 5,  /* type + version + len(2) */
-    CERT_HEADER_SZ        = 3,  /* always 3 bytes          */
-    REQ_HEADER_SZ         = 2,  /* cert request header sz  */
-    HINT_LEN_SZ           = 2,  /* length of hint size field */
-    TRUNCATED_HMAC_SZ     = 10, /* length of hmac w/ truncated hmac extension */
-    HELLO_EXT_TYPE_SZ     = 2,  /* length of a hello extension type */
-    HELLO_EXT_SZ          = 8,  /* total length of the lazy hello extensions */
-    HELLO_EXT_LEN         = 6,  /* length of the lazy hello extensions */
-    HELLO_EXT_SIGALGO_SZ  = 2,  /* length of signature algo extension  */
-    HELLO_EXT_SIGALGO_MAX = 32, /* number of items in the signature algo list */
-
-    DTLS_HANDSHAKE_HEADER_SZ = 12, /* normal + seq(2) + offset(3) + length(3) */
-    DTLS_RECORD_HEADER_SZ    = 13, /* normal + epoch(2) + seq_num(6) */
-    DTLS_HANDSHAKE_EXTRA     = 8,  /* diff from normal */
-    DTLS_RECORD_EXTRA        = 8,  /* diff from normal */
-    DTLS_HANDSHAKE_SEQ_SZ    = 2,  /* handshake header sequence number */
-    DTLS_HANDSHAKE_FRAG_SZ   = 3,  /* fragment offset and length are 24 bit */
-    DTLS_POOL_SZ             = 5,  /* buffers to hold in the retry pool */
-
-    FINISHED_LABEL_SZ   = 15,  /* TLS finished label size */
-    TLS_FINISHED_SZ     = 12,  /* TLS has a shorter size  */
-    MASTER_LABEL_SZ     = 13,  /* TLS master secret label sz */
-    KEY_LABEL_SZ        = 13,  /* TLS key block expansion sz */
-    MAX_PRF_HALF        = 128, /* Maximum half secret len */
-    MAX_PRF_LABSEED     = 128, /* Maximum label + seed len */
-    MAX_PRF_DIG         = 224, /* Maximum digest len      */
-    MAX_REQUEST_SZ      = 256, /* Maximum cert req len (no auth yet */
-    SESSION_FLUSH_COUNT = 256, /* Flush session cache unless user turns off */ 
-
-    RC4_KEY_SIZE        = 16,  /* always 128bit           */
-    DES_KEY_SIZE        =  8,  /* des                     */
-    DES3_KEY_SIZE       = 24,  /* 3 des ede               */
-    DES_IV_SIZE         = DES_BLOCK_SIZE,
-    AES_256_KEY_SIZE    = 32,  /* for 256 bit             */
-    AES_192_KEY_SIZE    = 24,  /* for 192 bit             */
-    AES_IV_SIZE         = 16,  /* always block size       */
-    AES_128_KEY_SIZE    = 16,  /* for 128 bit             */
-
-    AEAD_SEQ_OFFSET     = 4,        /* Auth Data: Sequence number */
-    AEAD_TYPE_OFFSET    = 8,        /* Auth Data: Type            */
-    AEAD_VMAJ_OFFSET    = 9,        /* Auth Data: Major Version   */
-    AEAD_VMIN_OFFSET    = 10,       /* Auth Data: Minor Version   */
-    AEAD_LEN_OFFSET     = 11,       /* Auth Data: Length          */
-    AEAD_AUTH_DATA_SZ   = 13,       /* Size of the data to authenticate */
-    AEAD_IMP_IV_SZ      = 4,        /* Size of the implicit IV     */
-    AEAD_EXP_IV_SZ      = 8,        /* Size of the explicit IV     */
-    AEAD_NONCE_SZ       = AEAD_EXP_IV_SZ + AEAD_IMP_IV_SZ,
-
-    AES_GCM_AUTH_SZ     = 16, /* AES-GCM Auth Tag length    */
-    AES_CCM_16_AUTH_SZ  = 16, /* AES-CCM-16 Auth Tag length */
-    AES_CCM_8_AUTH_SZ   = 8,  /* AES-CCM-8 Auth Tag Length  */
-
-    CAMELLIA_128_KEY_SIZE = 16, /* for 128 bit */
-    CAMELLIA_192_KEY_SIZE = 24, /* for 192 bit */
-    CAMELLIA_256_KEY_SIZE = 32, /* for 256 bit */
-    CAMELLIA_IV_SIZE      = 16, /* always block size */
-
-    HC_128_KEY_SIZE     = 16,  /* 128 bits                */
-    HC_128_IV_SIZE      = 16,  /* also 128 bits           */
-
-    RABBIT_KEY_SIZE     = 16,  /* 128 bits                */
-    RABBIT_IV_SIZE      =  8,  /* 64 bits for iv          */
-
-    EVP_SALT_SIZE       =  8,  /* evp salt size 64 bits   */
-
-    ECDHE_SIZE          = 32,  /* ECHDE server size defaults to 256 bit */
-    MAX_EXPORT_ECC_SZ   = 256, /* Export ANS X9.62 max future size */
-
-    MAX_HELLO_SZ       = 128,  /* max client or server hello */
-    MAX_CERT_VERIFY_SZ = 1024, /* max   */
-    CLIENT_HELLO_FIRST =  35,  /* Protocol + RAN_LEN + sizeof(id_len) */
-    MAX_SUITE_NAME     =  48,  /* maximum length of cipher suite string */
-    DEFAULT_TIMEOUT    = 500,  /* default resumption timeout in seconds */
-
-    DTLS_TIMEOUT_INIT       =  1, /* default timeout init for DTLS receive  */
-    DTLS_TIMEOUT_MAX        = 64, /* default max timeout for DTLS receive */
-    DTLS_TIMEOUT_MULTIPLIER =  2, /* default timeout multiplier for DTLS recv */
-
-    MAX_PSK_ID_LEN     = 128,  /* max psk identity/hint supported */
-    MAX_PSK_KEY_LEN    =  64,  /* max psk key supported */
-
-    MAX_CYASSL_FILE_SIZE = 1024 * 1024 * 4,  /* 4 mb file size alloc limit */
-
-#ifdef FORTRESS
-    MAX_EX_DATA        =   3,  /* allow for three items of ex_data */
-#endif
-
-    MAX_X509_SIZE      = 2048, /* max static x509 buffer size */
-    CERT_MIN_SIZE      =  256, /* min PEM cert size with header/footer */
-    MAX_FILENAME_SZ    =  256, /* max file name length */
-    FILE_BUFFER_SIZE   = 1024, /* default static file buffer size for input,
-                                  will use dynamic buffer if not big enough */
-
-    MAX_NTRU_PUB_KEY_SZ = 1027, /* NTRU max for now */
-    MAX_NTRU_ENCRYPT_SZ = 1027, /* NTRU max for now */
-    MAX_NTRU_BITS       =  256, /* max symmetric bit strength */
-    NO_SNIFF           =   0,  /* not sniffing */
-    SNIFF              =   1,  /* currently sniffing */
-
-    HASH_SIG_SIZE      =   2,  /* default SHA1 RSA */
-
-    NO_CAVIUM_DEVICE   =  -2,  /* invalid cavium device id */
-
-    NO_COPY            =   0,  /* should we copy static buffer for write */
-    COPY               =   1   /* should we copy static buffer for write */
-};
-
-
-#ifdef SESSION_INDEX
-/* Shift values for making a session index */
-#define SESSIDX_ROW_SHIFT 4
-#define SESSIDX_IDX_MASK  0x0F
-#endif
-
-
-/* max cert chain peer depth */
-#ifndef MAX_CHAIN_DEPTH
-    #define MAX_CHAIN_DEPTH 9
-#endif
-
-
-/* don't use extra 3/4k stack space unless need to */
-#ifdef HAVE_NTRU
-    #define MAX_ENCRYPT_SZ MAX_NTRU_ENCRYPT_SZ
-#else
-    #define MAX_ENCRYPT_SZ ENCRYPT_LEN
-#endif
-
-
-/* states */
-enum states {
-    NULL_STATE = 0,
-
-    SERVER_HELLOVERIFYREQUEST_COMPLETE,
-    SERVER_HELLO_COMPLETE,
-    SERVER_CERT_COMPLETE,
-    SERVER_KEYEXCHANGE_COMPLETE,
-    SERVER_HELLODONE_COMPLETE,
-    SERVER_FINISHED_COMPLETE,
-
-    CLIENT_HELLO_COMPLETE,
-    CLIENT_KEYEXCHANGE_COMPLETE,
-    CLIENT_FINISHED_COMPLETE,
-
-    HANDSHAKE_DONE
-};
-
-
-#if defined(__GNUC__)
-    #define CYASSL_PACK __attribute__ ((packed))
-#else
-    #define CYASSL_PACK
-#endif
-
-/* SSL Version */
-typedef struct ProtocolVersion {
-    byte major;
-    byte minor;
-} CYASSL_PACK ProtocolVersion;
-
-
-CYASSL_LOCAL ProtocolVersion MakeSSLv3(void);
-CYASSL_LOCAL ProtocolVersion MakeTLSv1(void);
-CYASSL_LOCAL ProtocolVersion MakeTLSv1_1(void);
-CYASSL_LOCAL ProtocolVersion MakeTLSv1_2(void);
-
-#ifdef CYASSL_DTLS
-    CYASSL_LOCAL ProtocolVersion MakeDTLSv1(void);
-    CYASSL_LOCAL ProtocolVersion MakeDTLSv1_2(void);
-#endif
-
-
-enum BIO_TYPE {
-    BIO_BUFFER = 1,
-    BIO_SOCKET = 2,
-    BIO_SSL    = 3,
-    BIO_MEMORY = 4
-};
-
-
-/* CyaSSL BIO_METHOD type */
-struct CYASSL_BIO_METHOD {
-    byte type;               /* method type */
-};
-
-
-/* CyaSSL BIO type */
-struct CYASSL_BIO {
-    byte        type;          /* method type */
-    byte        close;         /* close flag */
-    byte        eof;           /* eof flag */
-    CYASSL*     ssl;           /* possible associated ssl */
-    byte*       mem;           /* memory buffer */
-    int         memLen;        /* memory buffer length */
-    int         fd;            /* possible file descriptor */
-    CYASSL_BIO* prev;          /* previous in chain */
-    CYASSL_BIO* next;          /* next in chain */
-};
-
-
-/* CyaSSL method type */
-struct CYASSL_METHOD {
-    ProtocolVersion version;
-    byte            side;         /* connection side, server or client */
-    byte            downgrade;    /* whether to downgrade version, default no */
-};
-
-
-/* defautls to client */
-CYASSL_LOCAL void InitSSL_Method(CYASSL_METHOD*, ProtocolVersion);
-
-/* for sniffer */
-CYASSL_LOCAL int DoFinished(CYASSL* ssl, const byte* input, word32* inOutIdx,
-                            int sniff);
-CYASSL_LOCAL int DoApplicationData(CYASSL* ssl, byte* input, word32* inOutIdx);
-
-
-/* CyaSSL buffer type */
-typedef struct buffer {
-    word32 length;
-    byte*  buffer;
-} buffer;
-
-
-enum {
-    FORCED_FREE = 1,
-    NO_FORCED_FREE = 0
-};
-
-
-/* only use compression extra if using compression */
-#ifdef HAVE_LIBZ
-    #define COMP_EXTRA MAX_COMP_EXTRA
-#else
-    #define COMP_EXTRA 0
-#endif
-
-/* only the sniffer needs space in the buffer for extra MTU record(s) */
-#ifdef CYASSL_SNIFFER
-    #define MTU_EXTRA MAX_MTU * 3 
-#else
-    #define MTU_EXTRA 0
-#endif
-
-
-/* embedded callbacks require large static buffers, make sure on */
-#ifdef CYASSL_CALLBACKS
-    #undef  LARGE_STATIC_BUFFERS
-    #define LARGE_STATIC_BUFFERS
-#endif
-
-
-/* give user option to use 16K static buffers */
-#if defined(LARGE_STATIC_BUFFERS)
-    #define RECORD_SIZE MAX_RECORD_SIZE
-#else
-    #ifdef CYASSL_DTLS
-        #define RECORD_SIZE MAX_MTU 
-    #else
-        #define RECORD_SIZE 128 
-    #endif
-#endif
-
-
-/* user option to turn off 16K output option */
-/* if using small static buffers (default) and SSL_write tries to write data
-   larger than the record we have, dynamically get it, unless user says only
-   write in static buffer chuncks  */
-#ifndef STATIC_CHUNKS_ONLY
-    #define OUTPUT_RECORD_SIZE MAX_RECORD_SIZE
-#else
-    #define OUTPUT_RECORD_SIZE RECORD_SIZE
-#endif
-
-/* CyaSSL input buffer
-
-   RFC 2246:
-
-   length
-       The length (in bytes) of the following TLSPlaintext.fragment.
-       The length should not exceed 2^14.
-*/
-#if defined(LARGE_STATIC_BUFFERS)
-    #define STATIC_BUFFER_LEN RECORD_HEADER_SZ + RECORD_SIZE + COMP_EXTRA + \
-             MTU_EXTRA + MAX_MSG_EXTRA
-#else
-    /* zero length arrays may not be supported */
-    #define STATIC_BUFFER_LEN 1
-#endif
-
-typedef struct {
-    word32 length;       /* total buffer length used */
-    word32 idx;          /* idx to part of length already consumed */
-    byte*  buffer;       /* place holder for static or dynamic buffer */
-    word32 bufferSize;   /* current buffer size */
-    ALIGN16 byte staticBuffer[STATIC_BUFFER_LEN];
-    byte   dynamicFlag;  /* dynamic memory currently in use */
-    byte   offset;       /* alignment offset attempt */
-} bufferStatic;
-
-/* Cipher Suites holder */
-typedef struct Suites {
-    int    setSuites;               /* user set suites from default */
-    byte   suites[MAX_SUITE_SZ];  
-    word16 suiteSz;                 /* suite length in bytes        */
-    byte   hashSigAlgo[HELLO_EXT_SIGALGO_MAX]; /* sig/algo to offer */
-    word16 hashSigAlgoSz;           /* SigAlgo extension length in bytes */
-    byte   hashAlgo;                /* selected hash algorithm */
-    byte   sigAlgo;                 /* selected sig algorithm */
-} Suites;
-
-
-CYASSL_LOCAL
-void InitSuites(Suites*, ProtocolVersion,
-                                     byte, byte, byte, byte, byte, byte, int);
-CYASSL_LOCAL
-int  SetCipherList(Suites*, const char* list);
-
-#ifndef PSK_TYPES_DEFINED
-    typedef unsigned int (*psk_client_callback)(CYASSL*, const char*, char*,
-                          unsigned int, unsigned char*, unsigned int);
-    typedef unsigned int (*psk_server_callback)(CYASSL*, const char*,
-                          unsigned char*, unsigned int);
-#endif /* PSK_TYPES_DEFINED */
-
-
-#ifndef CYASSL_USER_IO
-    /* default IO callbacks */
-    CYASSL_LOCAL
-    int EmbedReceive(CYASSL *ssl, char *buf, int sz, void *ctx);
-    CYASSL_LOCAL 
-    int EmbedSend(CYASSL *ssl, char *buf, int sz, void *ctx);
-
-    #ifdef HAVE_OCSP
-        CYASSL_LOCAL
-        int EmbedOcspLookup(void*, const char*, int, byte*, int, byte**);
-        CYASSL_LOCAL
-        void EmbedOcspRespFree(void*, byte*);
-    #endif
-
-    #ifdef CYASSL_DTLS
-        CYASSL_LOCAL
-        int EmbedReceiveFrom(CYASSL *ssl, char *buf, int sz, void *ctx);
-        CYASSL_LOCAL 
-        int EmbedSendTo(CYASSL *ssl, char *buf, int sz, void *ctx);
-        CYASSL_LOCAL
-        int EmbedGenerateCookie(CYASSL* ssl, byte *buf, int sz, void *ctx);
-        CYASSL_LOCAL
-        int IsUDP(void*);
-    #endif /* CYASSL_DTLS */
-#endif /* CYASSL_USER_IO */
-
-#ifdef HAVE_NETX
-    CYASSL_LOCAL int NetX_Receive(CYASSL *ssl, char *buf, int sz, void *ctx);
-    CYASSL_LOCAL int NetX_Send(CYASSL *ssl, char *buf, int sz, void *ctx);
-#endif /* HAVE_NETX */
-
-
-/* CyaSSL Cipher type just points back to SSL */
-struct CYASSL_CIPHER {
-    CYASSL* ssl;
-};
-
-
-typedef struct OCSP_Entry OCSP_Entry;
-
-#ifdef SHA_DIGEST_SIZE
-    #define OCSP_DIGEST_SIZE SHA_DIGEST_SIZE
-#else
-    #define OCSP_DIGEST_SIZE 160
-#endif
-
-#ifdef NO_ASN 
-    /* no_asn won't have */
-    typedef struct CertStatus CertStatus;
-#endif
-
-struct OCSP_Entry {
-    OCSP_Entry* next;                        /* next entry             */
-    byte    issuerHash[OCSP_DIGEST_SIZE];    /* issuer hash            */ 
-    byte    issuerKeyHash[OCSP_DIGEST_SIZE]; /* issuer public key hash */
-    CertStatus* status;                      /* OCSP response list     */
-    int         totalStatus;                 /* number on list         */
-};
-
-
-#ifndef HAVE_OCSP
-    typedef struct CYASSL_OCSP CYASSL_OCSP;
-#endif
-
-/* CyaSSL OCSP controller */
-struct CYASSL_OCSP {
-    CYASSL_CERT_MANAGER* cm;            /* pointer back to cert manager */
-    OCSP_Entry*          ocspList;      /* OCSP response list */
-};
-
-#ifndef MAX_DATE_SIZE
-#define MAX_DATE_SIZE 32
-#endif
-
-typedef struct CRL_Entry CRL_Entry;
-
-#ifdef SHA_DIGEST_SIZE
-    #define CRL_DIGEST_SIZE SHA_DIGEST_SIZE
-#else
-    #define CRL_DIGEST_SIZE 160
-#endif
-
-#ifdef NO_ASN 
-    typedef struct RevokedCert RevokedCert;
-#endif
-
-/* Complete CRL */
-struct CRL_Entry {
-    CRL_Entry* next;                      /* next entry */
-    byte    issuerHash[CRL_DIGEST_SIZE];  /* issuer hash                 */ 
-    /* byte    crlHash[CRL_DIGEST_SIZE];      raw crl data hash           */ 
-    /* restore the hash here if needed for optimized comparisons */
-    byte    lastDate[MAX_DATE_SIZE]; /* last date updated  */
-    byte    nextDate[MAX_DATE_SIZE]; /* next update date   */
-    byte    lastDateFormat;          /* last date format */
-    byte    nextDateFormat;          /* next date format */
-    RevokedCert* certs;              /* revoked cert list  */
-    int          totalCerts;         /* number on list     */
-};
-
-
-typedef struct CRL_Monitor CRL_Monitor;
-
-/* CRL directory monitor */
-struct CRL_Monitor {
-    char* path;      /* full dir path, if valid pointer we're using */
-    int   type;      /* PEM or ASN1 type */
-};
-
-
-#ifndef HAVE_CRL
-    typedef struct CYASSL_CRL CYASSL_CRL;
-#endif
-
-/* CyaSSL CRL controller */
-struct CYASSL_CRL {
-    CYASSL_CERT_MANAGER* cm;            /* pointer back to cert manager */
-    CRL_Entry*           crlList;       /* our CRL list */
-    CyaSSL_Mutex         crlLock;       /* CRL list lock */
-    CRL_Monitor          monitors[2];   /* PEM and DER possible */
-#ifdef HAVE_CRL_MONITOR
-    pthread_t            tid;           /* monitoring thread */
-#endif
-};
-
-
-#ifdef NO_ASN 
-    typedef struct Signer Signer;
-#endif
-
-
-#ifndef CA_TABLE_SIZE
-    #define CA_TABLE_SIZE 11
-#endif
-
-/* CyaSSL Certificate Manager */
-struct CYASSL_CERT_MANAGER {
-    Signer*         caTable[CA_TABLE_SIZE]; /* the CA signer table */
-    CyaSSL_Mutex    caLock;             /* CA list lock */
-    CallbackCACache caCacheCallback;    /* CA cache addition callback */
-    void*           heap;               /* heap helper */
-    CYASSL_CRL*     crl;                /* CRL checker */
-    byte            crlEnabled;         /* is CRL on ? */
-    byte            crlCheckAll;        /* always leaf, but all ? */
-    CbMissingCRL    cbMissingCRL;       /* notify through cb of missing crl */
-    CYASSL_OCSP*    ocsp;               /* OCSP checker */
-    byte            ocspEnabled;        /* is OCSP on ? */
-    byte            ocspSendNonce;      /* send the OCSP nonce ? */
-    byte            ocspUseOverrideURL; /* ignore cert's responder, override */
-    char*           ocspOverrideURL;    /* use this responder */
-    void*           ocspIOCtx;          /* I/O callback CTX */
-    CbOCSPIO        ocspIOCb;           /* I/O callback for OCSP lookup */
-    CbOCSPRespFree  ocspRespFreeCb;     /* Frees OCSP Response from IO Cb */
-};
-
-CYASSL_LOCAL int CM_SaveCertCache(CYASSL_CERT_MANAGER*, const char*);
-CYASSL_LOCAL int CM_RestoreCertCache(CYASSL_CERT_MANAGER*, const char*);
-CYASSL_LOCAL int CM_MemSaveCertCache(CYASSL_CERT_MANAGER*, void*, int, int*);
-CYASSL_LOCAL int CM_MemRestoreCertCache(CYASSL_CERT_MANAGER*, const void*, int);
-CYASSL_LOCAL int CM_GetCertCacheMemSize(CYASSL_CERT_MANAGER*);
-
-/* CyaSSL Sock Addr */
-struct CYASSL_SOCKADDR {
-    unsigned int sz; /* sockaddr size */
-    void*        sa; /* pointer to the sockaddr_in or sockaddr_in6 */
-};
-
-typedef struct CYASSL_DTLS_CTX {
-    CYASSL_SOCKADDR peer;
-    int fd;
-} CYASSL_DTLS_CTX;
-
-/* RFC 6066 TLS Extensions */
-#ifdef HAVE_TLS_EXTENSIONS
-
-typedef enum {
-    SERVER_NAME_INDICATION =  0,
-    MAX_FRAGMENT_LENGTH    =  1,
-  /*CLIENT_CERTIFICATE_URL =  2,
-    TRUSTED_CA_KEYS        =  3,*/
-    TRUNCATED_HMAC         =  4,
-  /*STATUS_REQUEST         =  5,
-    SIGNATURE_ALGORITHMS   = 13,*/
-} TLSX_Type;
-
-typedef struct TLSX {
-    TLSX_Type    type; /* Extension Type  */
-    void*        data; /* Extension Data  */
-    byte         resp; /* IsResponse Flag */
-    struct TLSX* next; /* List Behavior   */
-} TLSX;
-
-CYASSL_LOCAL TLSX* TLSX_Find(TLSX* list, TLSX_Type type);
-CYASSL_LOCAL void TLSX_FreeAll(TLSX* list);
-
-#ifndef NO_CYASSL_CLIENT
-CYASSL_LOCAL word16 TLSX_GetRequestSize(CYASSL* ssl);
-CYASSL_LOCAL word16 TLSX_WriteRequest(CYASSL* ssl, byte* output);
-#endif
-
-#ifndef NO_CYASSL_SERVER
-CYASSL_LOCAL word16 TLSX_GetResponseSize(CYASSL* ssl);
-CYASSL_LOCAL word16 TLSX_WriteResponse(CYASSL* ssl, byte* output);
-#endif
-
-CYASSL_LOCAL int    TLSX_Parse(CYASSL* ssl, byte* input, word16 length,
-                                                byte isRequest, Suites *suites);
-
-/* Server Name Indication */
-#ifdef HAVE_SNI
-
-typedef struct SNI {
-    byte                       type;    /* SNI Type          */
-    union { char* host_name; } data;    /* SNI Data          */
-    struct SNI*                next;    /* List Behavior     */
-#ifndef NO_CYASSL_SERVER
-    byte                       options; /* Behaviour options */
-    byte                       status;  /* Matching result   */
-#endif
-} SNI;
-
-CYASSL_LOCAL int TLSX_UseSNI(TLSX** extensions, byte type, const void* data,
-                                                                   word16 size);
-
-#ifndef NO_CYASSL_SERVER
-CYASSL_LOCAL void   TLSX_SNI_SetOptions(TLSX* extensions, byte type,
-                                                                  byte options);
-CYASSL_LOCAL byte   TLSX_SNI_Status(TLSX* extensions, byte type);
-CYASSL_LOCAL word16 TLSX_SNI_GetRequest(TLSX* extensions, byte type,
-                                                                   void** data);
-CYASSL_LOCAL int    TLSX_SNI_GetFromBuffer(const byte* buffer, word32 bufferSz,
-                                         byte type, byte* sni, word32* inOutSz);
-#endif
-
-#endif /* HAVE_SNI */
-
-/* Maximum Fragment Length */
-#ifdef HAVE_MAX_FRAGMENT
-
-CYASSL_LOCAL int TLSX_UseMaxFragment(TLSX** extensions, byte mfl);
-
-#endif /* HAVE_MAX_FRAGMENT */
-
-#ifdef HAVE_TRUNCATED_HMAC
-
-CYASSL_LOCAL int TLSX_UseTruncatedHMAC(TLSX** extensions);
-
-#endif /* HAVE_TRUNCATED_HMAC */
-
-#endif /* HAVE_TLS_EXTENSIONS */
-
-/* CyaSSL context type */
-struct CYASSL_CTX {
-    CYASSL_METHOD* method;
-    CyaSSL_Mutex   countMutex;    /* reference count mutex */
-    int         refCount;         /* reference count */
-#ifndef NO_CERTS
-    buffer      certificate;
-    buffer      certChain;
-                 /* chain after self, in DER, with leading size for each cert */
-    buffer      privateKey;
-    buffer      serverDH_P;
-    buffer      serverDH_G;
-    CYASSL_CERT_MANAGER* cm;      /* our cert manager, ctx owns SSL will use */
-#endif
-    Suites      suites;
-    void*       heap;             /* for user memory overrides */
-    byte        verifyPeer;
-    byte        verifyNone;
-    byte        failNoCert;
-    byte        sessionCacheOff;
-    byte        sessionCacheFlushOff;
-    byte        sendVerify;       /* for client side */
-    byte        haveRSA;          /* RSA available */
-    byte        haveDH;           /* server DH parms set by user */
-    byte        haveNTRU;         /* server private NTRU  key loaded */
-    byte        haveECDSAsig;     /* server cert signed w/ ECDSA */
-    byte        haveStaticECC;    /* static server ECC private key */
-    byte        partialWrite;     /* only one msg per write call */
-    byte        quietShutdown;    /* don't send close notify */
-    byte        groupMessages;    /* group handshake messages before sending */
-    CallbackIORecv CBIORecv;
-    CallbackIOSend CBIOSend;
-#ifdef CYASSL_DTLS
-    CallbackGenCookie CBIOCookie;       /* gen cookie callback */
-#endif
-    VerifyCallback  verifyCallback;     /* cert verification callback */
-    word32          timeout;            /* session timeout */
-#ifdef HAVE_ECC
-    word16          eccTempKeySz;       /* in octets 20 - 66 */
-#endif
-#ifndef NO_PSK
-    byte        havePSK;                /* psk key set by user */
-    psk_client_callback client_psk_cb;  /* client callback */
-    psk_server_callback server_psk_cb;  /* server callback */
-    char        server_hint[MAX_PSK_ID_LEN];
-#endif /* NO_PSK */
-#if defined(OPENSSL_EXTRA) || defined(HAVE_WEBSERVER)
-    pem_password_cb passwd_cb;
-    void*            userdata;
-#endif /* OPENSSL_EXTRA */
-#ifdef HAVE_OCSP
-    CYASSL_OCSP      ocsp;
-#endif
-#ifdef HAVE_CAVIUM
-    int              devId;            /* cavium device id to use */
-#endif
-#ifdef HAVE_TLS_EXTENSIONS
-    TLSX* extensions;                  /* RFC 6066 TLS Extensions data */
-#endif
-#ifdef ATOMIC_USER
-    CallbackMacEncrypt    MacEncryptCb;    /* Atomic User Mac/Encrypt Cb */
-    CallbackDecryptVerify DecryptVerifyCb; /* Atomic User Decrypt/Verify Cb */
-#endif
-#ifdef HAVE_PK_CALLBACKS
-    #ifdef HAVE_ECC
-        CallbackEccSign   EccSignCb;    /* User EccSign   Callback handler */
-        CallbackEccVerify EccVerifyCb;  /* User EccVerify Callback handler */
-    #endif /* HAVE_ECC */
-    #ifndef NO_RSA 
-        CallbackRsaSign   RsaSignCb;    /* User RsaSign   Callback handler */
-        CallbackRsaVerify RsaVerifyCb;  /* User RsaVerify Callback handler */
-        CallbackRsaEnc    RsaEncCb;     /* User Rsa Public Encrypt  handler */
-        CallbackRsaDec    RsaDecCb;     /* User Rsa Private Decrypt handler */
-    #endif /* NO_RSA */
-#endif /* HAVE_PK_CALLBACKS */
-};
-
-
-CYASSL_LOCAL
-int InitSSL_Ctx(CYASSL_CTX*, CYASSL_METHOD*);
-CYASSL_LOCAL
-void FreeSSL_Ctx(CYASSL_CTX*);
-CYASSL_LOCAL
-void SSL_CtxResourceFree(CYASSL_CTX*);
-
-CYASSL_LOCAL
-int DeriveTlsKeys(CYASSL* ssl);
-CYASSL_LOCAL
-int ProcessOldClientHello(CYASSL* ssl, const byte* input, word32* inOutIdx,
-                          word32 inSz, word16 sz);
-#ifndef NO_CERTS
-    CYASSL_LOCAL
-    int AddCA(CYASSL_CERT_MANAGER* ctx, buffer der, int type, int verify);
-    CYASSL_LOCAL
-    int AlreadySigner(CYASSL_CERT_MANAGER* cm, byte* hash);
-#endif
-
-/* All cipher suite related info */
-typedef struct CipherSpecs {
-    byte bulk_cipher_algorithm;
-    byte cipher_type;               /* block, stream, or aead */
-    byte mac_algorithm;
-    byte kea;                       /* key exchange algo */
-    byte sig_algo;
-    byte hash_size;
-    byte pad_size;
-    byte static_ecdh;
-    word16 key_size;
-    word16 iv_size;
-    word16 block_size;
-    word16 aead_mac_size;
-} CipherSpecs;
-
-
-void InitCipherSpecs(CipherSpecs* cs);
-
-
-/* Supported Message Authentication Codes from page 43 */
-enum MACAlgorithm { 
-    no_mac,
-    md5_mac,
-    sha_mac,
-    sha224_mac,
-    sha256_mac,
-    sha384_mac,
-    sha512_mac,
-    rmd_mac,
-    blake2b_mac
-};
-
-
-/* Supported Key Exchange Protocols */
-enum KeyExchangeAlgorithm { 
-    no_kea,
-    rsa_kea, 
-    diffie_hellman_kea, 
-    fortezza_kea,
-    psk_kea,
-    ntru_kea,
-    ecc_diffie_hellman_kea,
-    ecc_static_diffie_hellman_kea       /* for verify suite only */
-};
-
-
-/* Supported Authentication Schemes */
-enum SignatureAlgorithm {
-    anonymous_sa_algo,
-    rsa_sa_algo,
-    dsa_sa_algo,
-    ecc_dsa_sa_algo
-};
-
-
-/* Supprted ECC Curve Types */
-enum EccCurves {
-    named_curve = 3
-};
-
-
-/* Supprted ECC Named Curves */
-enum EccNamedCurves {
-    secp256r1 = 0x17,         /* default, OpenSSL also calls it prime256v1 */
-    secp384r1 = 0x18,
-    secp521r1 = 0x19,
-
-    secp160r1 = 0x10,
-    secp192r1 = 0x13,        /*           Openssl also call it prime192v1 */
-    secp224r1 = 0x15
-};
-
-
-/* Valid client certificate request types from page 27 */
-enum ClientCertificateType {    
-    rsa_sign            = 1, 
-    dss_sign            = 2,
-    rsa_fixed_dh        = 3,
-    dss_fixed_dh        = 4,
-    rsa_ephemeral_dh    = 5,
-    dss_ephemeral_dh    = 6,
-    fortezza_kea_cert   = 20
-};
-
-
-enum CipherType { stream, block, aead };
-
-
-#ifdef CYASSL_DTLS
-
-    #ifdef WORD64_AVAILABLE
-        typedef word64 DtlsSeq;
-    #else
-        typedef word32 DtlsSeq;
-    #endif
-    #define DTLS_SEQ_BITS (sizeof(DtlsSeq) * CHAR_BIT)
-
-    typedef struct DtlsState {
-        DtlsSeq window;     /* Sliding window for current epoch    */
-        word16 nextEpoch;   /* Expected epoch in next record       */
-        word32 nextSeq;     /* Expected sequence in next record    */
-
-        word16 curEpoch;    /* Received epoch in current record    */
-        word32 curSeq;      /* Received sequence in current record */
-
-        DtlsSeq prevWindow; /* Sliding window for old epoch        */
-        word32 prevSeq;     /* Next sequence in allowed old epoch  */
-    } DtlsState;
-
-#endif /* CYASSL_DTLS */
-
-
-/* keys and secrets */
-typedef struct Keys {
-    byte client_write_MAC_secret[MAX_DIGEST_SIZE];   /* max sizes */
-    byte server_write_MAC_secret[MAX_DIGEST_SIZE]; 
-    byte client_write_key[AES_256_KEY_SIZE];         /* max sizes */
-    byte server_write_key[AES_256_KEY_SIZE]; 
-    byte client_write_IV[AES_IV_SIZE];               /* max sizes */
-    byte server_write_IV[AES_IV_SIZE];
-#ifdef HAVE_AEAD
-    byte aead_exp_IV[AEAD_EXP_IV_SZ];
-    byte aead_enc_imp_IV[AEAD_IMP_IV_SZ];
-    byte aead_dec_imp_IV[AEAD_IMP_IV_SZ];
-#endif
-
-    word32 peer_sequence_number;
-    word32 sequence_number;
-    
-#ifdef CYASSL_DTLS
-    DtlsState dtls_state;                       /* Peer's state */
-    word16 dtls_peer_handshake_number;
-    word16 dtls_expected_peer_handshake_number;
-
-    word16 dtls_epoch;                          /* Current tx epoch    */
-    word32 dtls_sequence_number;                /* Current tx sequence */
-    word16 dtls_handshake_number;               /* Current tx handshake seq */
-#endif
-
-    word32 encryptSz;             /* last size of encrypted data   */
-    word32 padSz;                 /* how much to advance after decrypt part */
-    byte   encryptionOn;          /* true after change cipher spec */
-    byte   decryptedCur;          /* only decrypt current record once */
-} Keys;
-
-
-/* cipher for now */
-typedef struct Ciphers {
-#ifdef BUILD_ARC4
-    Arc4*   arc4;
-#endif
-#ifdef BUILD_DES3
-    Des3*   des3;
-#endif
-#if defined(BUILD_AES) || defined(BUILD_AESGCM)
-    Aes*    aes;
-#endif
-#ifdef HAVE_CAMELLIA
-    Camellia* cam;
-#endif
-#ifdef HAVE_HC128
-    HC128*  hc128;
-#endif
-#ifdef BUILD_RABBIT
-    Rabbit* rabbit;
-#endif
-    byte    setup;       /* have we set it up flag for detection */
-} Ciphers;
-
-
-CYASSL_LOCAL void InitCiphers(CYASSL* ssl);
-CYASSL_LOCAL void FreeCiphers(CYASSL* ssl);
-
-
-/* hashes type */
-typedef struct Hashes {
-    #ifndef NO_OLD_TLS
-        byte md5[MD5_DIGEST_SIZE];
-    #endif
-    byte sha[SHA_DIGEST_SIZE];
-    #ifndef NO_SHA256
-        byte sha256[SHA256_DIGEST_SIZE];
-    #endif
-    #ifdef CYASSL_SHA384
-        byte sha384[SHA384_DIGEST_SIZE];
-    #endif
-} Hashes;
-
-
-/* Static x509 buffer */
-typedef struct x509_buffer {
-    int  length;                  /* actual size */
-    byte buffer[MAX_X509_SIZE];   /* max static cert size */
-} x509_buffer;
-
-
-/* CyaSSL X509_CHAIN, for no dynamic memory SESSION_CACHE */
-struct CYASSL_X509_CHAIN {
-    int         count;                    /* total number in chain */
-    x509_buffer certs[MAX_CHAIN_DEPTH];   /* only allow max depth 4 for now */
-};
-
-
-/* CyaSSL session type */
-struct CYASSL_SESSION {
-    byte         sessionID[ID_LEN];             /* id for protocol */
-    byte         masterSecret[SECRET_LEN];      /* stored secret */
-    word32       bornOn;                        /* create time in seconds   */
-    word32       timeout;                       /* timeout in seconds       */
-#ifdef SESSION_CERTS
-    CYASSL_X509_CHAIN chain;                    /* peer cert chain, static  */
-    ProtocolVersion version;                    /* which version was used */
-    byte            cipherSuite0;               /* first byte, normally 0 */
-    byte            cipherSuite;                /* 2nd byte, actual suite */
-#endif
-#ifndef NO_CLIENT_CACHE
-    byte         serverID[SERVER_ID_LEN];       /* for easier client lookup */
-    word16       idLen;                         /* serverID length */
-#endif
-};
-
-
-CYASSL_LOCAL
-CYASSL_SESSION* GetSession(CYASSL*, byte*);
-CYASSL_LOCAL
-int          SetSession(CYASSL*, CYASSL_SESSION*);
-
-typedef void (*hmacfp) (CYASSL*, byte*, const byte*, word32, int, int);
-
-#ifndef NO_CLIENT_CACHE
-    CYASSL_SESSION* GetSessionClient(CYASSL*, const byte*, int);
-#endif
-
-/* client connect state for nonblocking restart */
-enum ConnectState {
-    CONNECT_BEGIN = 0,
-    CLIENT_HELLO_SENT,
-    HELLO_AGAIN,               /* HELLO_AGAIN s for DTLS case */
-    HELLO_AGAIN_REPLY,
-    FIRST_REPLY_DONE,
-    FIRST_REPLY_FIRST,
-    FIRST_REPLY_SECOND,
-    FIRST_REPLY_THIRD,
-    FIRST_REPLY_FOURTH,
-    FINISHED_DONE,
-    SECOND_REPLY_DONE
-};
-
-
-/* server accept state for nonblocking restart */
-enum AcceptState {
-    ACCEPT_BEGIN = 0,
-    ACCEPT_CLIENT_HELLO_DONE,
-    HELLO_VERIFY_SENT,
-    ACCEPT_FIRST_REPLY_DONE,
-    SERVER_HELLO_SENT,
-    CERT_SENT,
-    KEY_EXCHANGE_SENT,
-    CERT_REQ_SENT,
-    SERVER_HELLO_DONE,
-    ACCEPT_SECOND_REPLY_DONE,
-    CHANGE_CIPHER_SENT,
-    ACCEPT_FINISHED_DONE,
-    ACCEPT_THIRD_REPLY_DONE
-};
-
-
-typedef struct Buffers {
-#ifndef NO_CERTS
-    buffer          certificate;            /* CYASSL_CTX owns, unless we own */
-    buffer          key;                    /* CYASSL_CTX owns, unless we own */
-    buffer          certChain;              /* CYASSL_CTX owns */
-                 /* chain after self, in DER, with leading size for each cert */
-    buffer          serverDH_P;             /* CYASSL_CTX owns, unless we own */
-    buffer          serverDH_G;             /* CYASSL_CTX owns, unless we own */
-    buffer          serverDH_Pub;
-    buffer          serverDH_Priv;
-#endif
-    buffer          domainName;             /* for client check */
-    bufferStatic    inputBuffer;
-    bufferStatic    outputBuffer;
-    buffer          clearOutputBuffer;
-    int             prevSent;              /* previous plain text bytes sent
-                                              when got WANT_WRITE            */
-    int             plainSz;               /* plain text bytes in buffer to send
-                                              when got WANT_WRITE            */
-    byte            weOwnCert;             /* SSL own cert flag */
-    byte            weOwnKey;              /* SSL own key  flag */
-    byte            weOwnDH;               /* SSL own dh (p,g)  flag */
-#ifdef CYASSL_DTLS
-    CYASSL_DTLS_CTX dtlsCtx;               /* DTLS connection context */
-#endif
-#ifdef HAVE_PK_CALLBACKS
-    #ifdef HAVE_ECC
-        buffer peerEccDsaKey;              /* we own for Ecc Verify Callbacks */
-    #endif /* HAVE_ECC */
-    #ifndef NO_RSA
-        buffer peerRsaKey;                 /* we own for Rsa Verify Callbacks */
-    #endif /* NO_RSA */
-#endif /* HAVE_PK_CALLBACKS */
-} Buffers;
-
-typedef struct Options {
-    byte            sessionCacheOff;
-    byte            sessionCacheFlushOff;
-    byte            cipherSuite0;           /* first byte, normally 0 */
-    byte            cipherSuite;            /* second byte, actual suite */
-    byte            serverState;
-    byte            clientState;
-    byte            handShakeState;
-    byte            side;               /* client or server end */
-    byte            verifyPeer;
-    byte            verifyNone;
-    byte            failNoCert;
-    byte            downgrade;          /* allow downgrade of versions */
-    byte            sendVerify;         /* false = 0, true = 1, sendBlank = 2 */
-    byte            resuming;
-    byte            haveSessionId;      /* server may not send */
-    byte            tls;                /* using TLS ? */
-    byte            tls1_1;             /* using TLSv1.1+ ? */
-    byte            dtls;               /* using datagrams ? */
-    byte            connReset;          /* has the peer reset */
-    byte            isClosed;           /* if we consider conn closed */
-    byte            closeNotify;        /* we've recieved a close notify */
-    byte            sentNotify;         /* we've sent a close notify */
-    byte            connectState;       /* nonblocking resume */
-    byte            acceptState;        /* nonblocking resume */
-    byte            usingCompression;   /* are we using compression */
-    byte            haveRSA;            /* RSA available */
-    byte            haveDH;             /* server DH parms set by user */
-    byte            haveNTRU;           /* server NTRU  private key loaded */
-    byte            haveECDSAsig;       /* server ECDSA signed cert */
-    byte            haveStaticECC;      /* static server ECC private key */
-    byte            havePeerCert;       /* do we have peer's cert */
-    byte            havePeerVerify;     /* and peer's cert verify */
-    byte            usingPSK_cipher;    /* whether we're using psk as cipher */
-    byte            sendAlertState;     /* nonblocking resume */ 
-    byte            processReply;       /* nonblocking resume */
-    byte            partialWrite;       /* only one msg per write call */
-    byte            quietShutdown;      /* don't send close notify */
-    byte            certOnly;           /* stop once we get cert */
-    byte            groupMessages;      /* group handshake messages */
-    byte            usingNonblock;      /* set when using nonblocking socket */
-    byte            saveArrays;         /* save array Memory for user get keys
-                                           or psk */
-#ifndef NO_PSK
-    byte            havePSK;            /* psk key set by user */
-    psk_client_callback client_psk_cb;
-    psk_server_callback server_psk_cb;
-#endif /* NO_PSK */
-} Options;
-
-typedef struct Arrays {
-    byte            clientRandom[RAN_LEN];
-    byte            serverRandom[RAN_LEN];
-    byte            sessionID[ID_LEN];
-    byte            preMasterSecret[ENCRYPT_LEN];
-    byte            masterSecret[SECRET_LEN];
-#ifdef CYASSL_DTLS
-    byte            cookie[MAX_COOKIE_LEN];
-    byte            cookieSz;
-#endif
-#ifndef NO_PSK
-    char            client_identity[MAX_PSK_ID_LEN];
-    char            server_hint[MAX_PSK_ID_LEN];
-    byte            psk_key[MAX_PSK_KEY_LEN];
-    word32          psk_keySz;          /* acutal size */
-#endif
-    word32          preMasterSz;        /* differs for DH, actual size */
-} Arrays;
-
-#ifndef ASN_NAME_MAX
-#define ASN_NAME_MAX 256
-#endif
-
-#ifndef MAX_DATE_SZ
-#define MAX_DATE_SZ 32
-#endif
-
-struct CYASSL_X509_NAME {
-    char  *name;
-    char  staticName[ASN_NAME_MAX];
-    int   dynamicName;
-    int   sz;
-#ifdef OPENSSL_EXTRA
-    DecodedName fullName;
-#endif /* OPENSSL_EXTRA */
-};
-
-#ifndef EXTERNAL_SERIAL_SIZE
-    #define EXTERNAL_SERIAL_SIZE 32
-#endif
-
-#ifdef NO_ASN 
-    typedef struct DNS_entry DNS_entry;
-#endif
-
-struct CYASSL_X509 {
-    int              version;
-    CYASSL_X509_NAME issuer;
-    CYASSL_X509_NAME subject;
-    int              serialSz;
-    byte             serial[EXTERNAL_SERIAL_SIZE];
-    char             subjectCN[ASN_NAME_MAX];        /* common name short cut */
-#ifdef CYASSL_SEP
-    int              deviceTypeSz;
-    byte             deviceType[EXTERNAL_SERIAL_SIZE];
-    int              hwTypeSz;
-    byte             hwType[EXTERNAL_SERIAL_SIZE];
-    int              hwSerialNumSz;
-    byte             hwSerialNum[EXTERNAL_SERIAL_SIZE];
-    #ifdef OPENSSL_EXTRA
-        byte             certPolicySet;
-        byte             certPolicyCrit;
-    #endif /* OPENSSL_EXTRA */
-#endif
-    int              notBeforeSz;
-    byte             notBefore[MAX_DATE_SZ];
-    int              notAfterSz;
-    byte             notAfter[MAX_DATE_SZ];
-    int              sigOID;
-    buffer           sig;
-    int              pubKeyOID;
-    buffer           pubKey;
-    #ifdef HAVE_ECC
-        word32       pkCurveOID;
-    #endif /* HAVE_ECC */
-    buffer           derCert;                        /* may need  */
-    DNS_entry*       altNames;                       /* alt names list */
-    DNS_entry*       altNamesNext;                   /* hint for retrieval */
-    byte             dynamicMemory;                  /* dynamic memory flag */
-    byte             isCa;
-#ifdef OPENSSL_EXTRA
-    word32           pathLength;
-    word16           keyUsage;
-    byte             basicConstSet;
-    byte             basicConstCrit;
-    byte             basicConstPlSet;
-    byte             subjAltNameSet;
-    byte             subjAltNameCrit;
-    byte             authKeyIdSet;
-    byte             authKeyIdCrit;
-    byte*            authKeyId;
-    word32           authKeyIdSz;
-    byte             subjKeyIdSet;
-    byte             subjKeyIdCrit;
-    byte*            subjKeyId;
-    word32           subjKeyIdSz;
-    byte             keyUsageSet;
-    byte             keyUsageCrit;
-#endif /* OPENSSL_EXTRA */
-};
-
-
-/* record layer header for PlainText, Compressed, and CipherText */
-typedef struct RecordLayerHeader {
-    byte            type;
-    byte            pvMajor;
-    byte            pvMinor;
-    byte            length[2];
-} RecordLayerHeader;
-
-
-/* record layer header for DTLS PlainText, Compressed, and CipherText */
-typedef struct DtlsRecordLayerHeader {
-    byte            type;
-    byte            pvMajor;
-    byte            pvMinor;
-    byte            epoch[2];             /* increment on cipher state change */
-    byte            sequence_number[6];   /* per record */
-    byte            length[2];
-} DtlsRecordLayerHeader;
-
-
-typedef struct DtlsPool {
-    buffer          buf[DTLS_POOL_SZ];
-    int             used;
-} DtlsPool;
-
-typedef struct DtlsMsg {
-    struct DtlsMsg* next;
-    word32          seq;       /* Handshake sequence number    */
-    word32          sz;        /* Length of whole mesage       */
-    word32          fragSz;    /* Length of fragments received */
-    byte            type;
-    byte*           buf;
-    byte*           msg;
-} DtlsMsg;
-
-
-#ifdef HAVE_NETX
-
-    /* NETX I/O Callback default */
-    typedef struct NetX_Ctx {
-        NX_TCP_SOCKET* nxSocket;    /* send/recv socket handle */
-        NX_PACKET*     nxPacket;    /* incoming packet handle for short reads */
-        ULONG          nxOffset;    /* offset already read from nxPacket */
-        ULONG          nxWait;      /* wait option flag */
-    } NetX_Ctx;
-
-#endif
-
-
-/* CyaSSL ssl type */
-struct CYASSL {
-    CYASSL_CTX*     ctx;
-    int             error;
-    ProtocolVersion version;            /* negotiated version */
-    ProtocolVersion chVersion;          /* client hello version */
-    Suites*         suites;             /* only need during handshake */
-    Ciphers         encrypt;
-    Ciphers         decrypt;
-    CipherSpecs     specs;
-    Keys            keys;
-    int             rfd;                /* read  file descriptor */
-    int             wfd;                /* write file descriptor */
-    int             rflags;             /* user read  flags */
-    int             wflags;             /* user write flags */
-    CYASSL_BIO*     biord;              /* socket bio read  to free/close */
-    CYASSL_BIO*     biowr;              /* socket bio write to free/close */
-    void*           IOCB_ReadCtx;
-    void*           IOCB_WriteCtx;
-    RNG*            rng;
-#ifndef NO_OLD_TLS
-#ifndef NO_SHA
-    Sha             hashSha;            /* sha hash of handshake msgs */
-#endif
-#ifndef NO_MD5
-    Md5             hashMd5;            /* md5 hash of handshake msgs */
-#endif
-#endif
-#ifndef NO_SHA256
-    Sha256          hashSha256;         /* sha256 hash of handshake msgs */
-#endif
-#ifdef CYASSL_SHA384
-    Sha384          hashSha384;         /* sha384 hash of handshake msgs */
-#endif
-    Hashes          verifyHashes;
-    Hashes          certHashes;         /* for cert verify */
-    Buffers         buffers;
-    Options         options;
-    Arrays*         arrays;
-    CYASSL_SESSION  session;
-    VerifyCallback  verifyCallback;      /* cert verification callback */
-    void*           verifyCbCtx;         /* cert verify callback user ctx*/
-#ifndef NO_RSA
-    RsaKey*         peerRsaKey;
-    byte            peerRsaKeyPresent;
-#endif
-#ifdef HAVE_NTRU
-    word16          peerNtruKeyLen;
-    byte            peerNtruKey[MAX_NTRU_PUB_KEY_SZ];
-    byte            peerNtruKeyPresent;
-#endif
-#ifdef HAVE_ECC
-    ecc_key*        peerEccKey;              /* peer's  ECDHE key */
-    ecc_key*        peerEccDsaKey;           /* peer's  ECDSA key */
-    ecc_key*        eccTempKey;              /* private ECDHE key */
-    ecc_key*        eccDsaKey;               /* private ECDSA key */
-    word16          eccTempKeySz;            /* in octets 20 - 66 */
-    byte            peerEccKeyPresent;
-    byte            peerEccDsaKeyPresent;
-    byte            eccTempKeyPresent;
-    byte            eccDsaKeyPresent;
-#endif
-    hmacfp          hmac;
-    void*           heap;               /* for user overrides */
-    RecordLayerHeader curRL;
-    word16            curSize;
-    word32          timeout;            /* session timeout */
-    CYASSL_CIPHER   cipher;
-#ifdef HAVE_LIBZ
-    z_stream        c_stream;           /* compression   stream */
-    z_stream        d_stream;           /* decompression stream */
-    byte            didStreamInit;      /* for stream init and end */
-#endif
-#ifdef CYASSL_DTLS
-    int             dtls_timeout_init;  /* starting timeout vaule */
-    int             dtls_timeout_max;   /* maximum timeout value */
-    int             dtls_timeout;       /* current timeout value, changes */
-    DtlsPool*       dtls_pool;
-    DtlsMsg*        dtls_msg_list;
-    void*           IOCB_CookieCtx;     /* gen cookie ctx */
-    word32          dtls_expected_rx;
-#endif
-#ifdef CYASSL_CALLBACKS
-    HandShakeInfo   handShakeInfo;      /* info saved during handshake */
-    TimeoutInfo     timeoutInfo;        /* info saved during handshake */
-    byte            hsInfoOn;           /* track handshake info        */
-    byte            toInfoOn;           /* track timeout   info        */
-#endif
-#ifdef KEEP_PEER_CERT
-    CYASSL_X509     peerCert;           /* X509 peer cert */
-#endif
-#ifdef FORTRESS
-    void*           ex_data[MAX_EX_DATA]; /* external data, for Fortress */
-#endif
-#ifdef HAVE_CAVIUM
-    int              devId;            /* cavium device id to use */
-#endif
-#ifdef HAVE_TLS_EXTENSIONS
-    TLSX* extensions;                  /* RFC 6066 TLS Extensions data */
-#ifdef HAVE_MAX_FRAGMENT
-    word16 max_fragment;
-#endif
-#ifdef HAVE_TRUNCATED_HMAC
-    byte truncated_hmac;
-#endif
-#endif
-#ifdef HAVE_NETX
-    NetX_Ctx        nxCtx;             /* NetX IO Context */
-#endif
-#ifdef SESSION_INDEX
-    int sessionIndex;                  /* Session's location in the cache. */
-#endif
-    CYASSL_ALERT_HISTORY alert_history;
-#ifdef ATOMIC_USER
-    void*    MacEncryptCtx;    /* Atomic User Mac/Encrypt Callback Context */
-    void*    DecryptVerifyCtx; /* Atomic User Decrypt/Verify Callback Context */
-#endif
-#ifdef HAVE_PK_CALLBACKS
-    #ifdef HAVE_ECC
-        void* EccSignCtx;     /* Ecc Sign   Callback Context */
-        void* EccVerifyCtx;   /* Ecc Verify Callback Context */
-    #endif /* HAVE_ECC */
-    #ifndef NO_RSA 
-        void* RsaSignCtx;     /* Rsa Sign   Callback Context */
-        void* RsaVerifyCtx;   /* Rsa Verify Callback Context */
-        void* RsaEncCtx;      /* Rsa Public  Encrypt   Callback Context */
-        void* RsaDecCtx;      /* Rsa Private Decrypt   Callback Context */
-    #endif /* NO_RSA */
-#endif /* HAVE_PK_CALLBACKS */
-};
-
-
-CYASSL_LOCAL
-int  InitSSL(CYASSL*, CYASSL_CTX*);
-CYASSL_LOCAL
-void FreeSSL(CYASSL*);
-CYASSL_API void SSL_ResourceFree(CYASSL*);   /* Micrium uses */
-
-
-enum {
-    IV_SZ   = 32,          /* max iv sz */
-    NAME_SZ = 80          /* max one line */
-};
-
-
-typedef struct EncryptedInfo {
-    char     name[NAME_SZ];    /* encryption name */
-    byte     iv[IV_SZ];        /* encrypted IV */
-    word32   ivSz;             /* encrypted IV size */
-    long     consumed;         /* tracks PEM bytes consumed */
-    byte     set;              /* if encryption set */
-    CYASSL_CTX* ctx;              /* CTX owner */
-} EncryptedInfo;
-
-
-#ifndef NO_CERTS
-    CYASSL_LOCAL int PemToDer(const unsigned char* buff, long sz, int type,
-                              buffer* der, void* heap, EncryptedInfo* info,
-                              int* eccKey);
-
-    CYASSL_LOCAL int ProcessFile(CYASSL_CTX* ctx, const char* fname, int format,
-                                 int type, CYASSL* ssl, int userChain,
-                                CYASSL_CRL* crl);
-#endif
-
-
-#ifdef CYASSL_CALLBACKS
-    CYASSL_LOCAL
-    void InitHandShakeInfo(HandShakeInfo*);
-    CYASSL_LOCAL 
-    void FinishHandShakeInfo(HandShakeInfo*, const CYASSL*);
-    CYASSL_LOCAL 
-    void AddPacketName(const char*, HandShakeInfo*);
-
-    CYASSL_LOCAL
-    void InitTimeoutInfo(TimeoutInfo*);
-    CYASSL_LOCAL 
-    void FreeTimeoutInfo(TimeoutInfo*, void*);
-    CYASSL_LOCAL 
-    void AddPacketInfo(const char*, TimeoutInfo*, const byte*, int, void*);
-    CYASSL_LOCAL 
-    void AddLateName(const char*, TimeoutInfo*);
-    CYASSL_LOCAL 
-    void AddLateRecordHeader(const RecordLayerHeader* rl, TimeoutInfo* info);
-#endif
-
-
-/* Record Layer Header identifier from page 12 */
-enum ContentType {
-    no_type            = 0,
-    change_cipher_spec = 20, 
-    alert              = 21, 
-    handshake          = 22, 
-    application_data   = 23 
-};
-
-
-/* handshake header, same for each message type, pgs 20/21 */
-typedef struct HandShakeHeader {
-    byte            type;
-    word24          length;
-} HandShakeHeader;
-
-
-/* DTLS handshake header, same for each message type */
-typedef struct DtlsHandShakeHeader {
-    byte            type;
-    word24          length;
-    byte            message_seq[2];    /* start at 0, restransmit gets same # */
-    word24          fragment_offset;   /* bytes in previous fragments */
-    word24          fragment_length;   /* length of this fragment */
-} DtlsHandShakeHeader;
-
-
-enum HandShakeType {
-    no_shake            = -1,
-    hello_request       = 0, 
-    client_hello        = 1, 
-    server_hello        = 2,
-    hello_verify_request = 3,       /* DTLS addition */
-    session_ticket      =  4,
-    certificate         = 11, 
-    server_key_exchange = 12,
-    certificate_request = 13, 
-    server_hello_done   = 14,
-    certificate_verify  = 15, 
-    client_key_exchange = 16,
-    finished            = 20
-};
-
-
-static const byte client[SIZEOF_SENDER] = { 0x43, 0x4C, 0x4E, 0x54 };
-static const byte server[SIZEOF_SENDER] = { 0x53, 0x52, 0x56, 0x52 };
-
-static const byte tls_client[FINISHED_LABEL_SZ + 1] = "client finished";
-static const byte tls_server[FINISHED_LABEL_SZ + 1] = "server finished";
-
-
-/* internal functions */
-CYASSL_LOCAL int SendChangeCipher(CYASSL*);
-CYASSL_LOCAL int SendData(CYASSL*, const void*, int);
-CYASSL_LOCAL int SendCertificate(CYASSL*);
-CYASSL_LOCAL int SendCertificateRequest(CYASSL*);
-CYASSL_LOCAL int SendServerKeyExchange(CYASSL*);
-CYASSL_LOCAL int SendBuffered(CYASSL*);
-CYASSL_LOCAL int ReceiveData(CYASSL*, byte*, int, int);
-CYASSL_LOCAL int SendFinished(CYASSL*);
-CYASSL_LOCAL int SendAlert(CYASSL*, int, int);
-CYASSL_LOCAL int ProcessReply(CYASSL*);
-
-CYASSL_LOCAL int SetCipherSpecs(CYASSL*);
-CYASSL_LOCAL int MakeMasterSecret(CYASSL*);
-
-CYASSL_LOCAL int  AddSession(CYASSL*);
-CYASSL_LOCAL int  DeriveKeys(CYASSL* ssl);
-CYASSL_LOCAL int  StoreKeys(CYASSL* ssl, const byte* keyData);
-
-CYASSL_LOCAL int IsTLS(const CYASSL* ssl);
-CYASSL_LOCAL int IsAtLeastTLSv1_2(const CYASSL* ssl);
-
-CYASSL_LOCAL void FreeHandshakeResources(CYASSL* ssl);
-CYASSL_LOCAL void ShrinkInputBuffer(CYASSL* ssl, int forcedFree);
-CYASSL_LOCAL void ShrinkOutputBuffer(CYASSL* ssl);
-#ifndef NO_CERTS
-    CYASSL_LOCAL Signer* GetCA(void* cm, byte* hash);
-    #ifndef NO_SKID
-        CYASSL_LOCAL Signer* GetCAByName(void* cm, byte* hash);
-    #endif
-#endif
-CYASSL_LOCAL void BuildTlsFinished(CYASSL* ssl, Hashes* hashes,
-                                   const byte* sender);
-CYASSL_LOCAL void FreeArrays(CYASSL* ssl, int keep);
-CYASSL_LOCAL  int CheckAvailableSize(CYASSL *ssl, int size);
-CYASSL_LOCAL  int GrowInputBuffer(CYASSL* ssl, int size, int usedLength);
-
-#ifndef NO_TLS
-    CYASSL_LOCAL int  MakeTlsMasterSecret(CYASSL*);
-    CYASSL_LOCAL void TLS_hmac(CYASSL* ssl, byte* digest, const byte* in,
-                               word32 sz, int content, int verify);
-#endif
-
-#ifndef NO_CYASSL_CLIENT
-    CYASSL_LOCAL int SendClientHello(CYASSL*);
-    CYASSL_LOCAL int SendClientKeyExchange(CYASSL*);
-    CYASSL_LOCAL int SendCertificateVerify(CYASSL*);
-#endif /* NO_CYASSL_CLIENT */
-
-#ifndef NO_CYASSL_SERVER
-    CYASSL_LOCAL int SendServerHello(CYASSL*);
-    CYASSL_LOCAL int SendServerHelloDone(CYASSL*);
-    #ifdef CYASSL_DTLS
-        CYASSL_LOCAL int SendHelloVerifyRequest(CYASSL*);
-    #endif
-#endif /* NO_CYASSL_SERVER */
-
-#ifdef CYASSL_DTLS
-    CYASSL_LOCAL int  DtlsPoolInit(CYASSL*);
-    CYASSL_LOCAL int  DtlsPoolSave(CYASSL*, const byte*, int);
-    CYASSL_LOCAL int  DtlsPoolTimeout(CYASSL*);
-    CYASSL_LOCAL int  DtlsPoolSend(CYASSL*);
-    CYASSL_LOCAL void DtlsPoolReset(CYASSL*);
-
-    CYASSL_LOCAL DtlsMsg* DtlsMsgNew(word32, void*);
-    CYASSL_LOCAL void DtlsMsgDelete(DtlsMsg*, void*);
-    CYASSL_LOCAL void DtlsMsgListDelete(DtlsMsg*, void*);
-    CYASSL_LOCAL void DtlsMsgSet(DtlsMsg*, word32, const byte*, byte,
-                                                             word32, word32);
-    CYASSL_LOCAL DtlsMsg* DtlsMsgFind(DtlsMsg*, word32);
-    CYASSL_LOCAL DtlsMsg* DtlsMsgStore(DtlsMsg*, word32, const byte*, word32,
-                                                byte, word32, word32, void*);
-    CYASSL_LOCAL DtlsMsg* DtlsMsgInsert(DtlsMsg*, DtlsMsg*);
-#endif /* CYASSL_DTLS */
-
-#ifndef NO_TLS
-    
-
-#endif /* NO_TLS */
-
-
-CYASSL_LOCAL word32  LowResTimer(void);
-
-CYASSL_LOCAL void InitX509Name(CYASSL_X509_NAME*, int);
-CYASSL_LOCAL void FreeX509Name(CYASSL_X509_NAME* name);
-CYASSL_LOCAL void InitX509(CYASSL_X509*, int);
-CYASSL_LOCAL void FreeX509(CYASSL_X509*);
-#ifndef NO_CERTS
-    CYASSL_LOCAL int  CopyDecodedToX509(CYASSL_X509*, DecodedCert*);
-#endif
-
-
-#ifdef __cplusplus
-    }  /* extern "C" */
-#endif
-
-#endif /* CyaSSL_INT_H */
-
diff --git a/cyassl/ssl.h b/cyassl/ssl.h
index 6473dcc73..b791c2a49 100644
--- a/cyassl/ssl.h
+++ b/cyassl/ssl.h
@@ -675,10 +675,7 @@ enum { /* ssl Constants */
     SSL_R_SSLV3_ALERT_CERTIFICATE_UNKNOWN = 103,
     SSL_R_SSLV3_ALERT_BAD_CERTIFICATE     = 104,
 
-    PEM_BUFSIZE = 1024,
-    /* for non-blocking CyaSSL_connect */
-    SSL_CONNECTING = 201,      /* Ready for the next step */
-    SSL_CONNECT_WAITING = 202 /* Waiting for the response */
+    PEM_BUFSIZE = 1024
 };
 
 
@@ -942,7 +939,9 @@ CYASSL_API void CyaSSL_SetIOWriteFlags(CYASSL* ssl, int flags);
     CYASSL_API void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxsocket,
                                       ULONG waitoption);
 #endif
-
+#ifdef HAVE_LWIP_NATIVE
+    CYASSL_API int CyaSSL_SetIO_LwIP(CYASSL* ssl, void *pcb);
+#endif
 typedef int (*CallbackGenCookie)(CYASSL* ssl, unsigned char* buf, int sz,
                                  void* ctx);
 CYASSL_API void  CyaSSL_CTX_SetGenCookie(CYASSL_CTX*, CallbackGenCookie);
diff --git a/src/internal.c b/src/internal.c
index c050f856c..964f7af6a 100644
--- a/src/internal.c
+++ b/src/internal.c
@@ -1434,6 +1434,10 @@ int InitSSL(CYASSL* ssl, CYASSL_CTX* ctx)
     ssl->IOCB_ReadCtx  = &ssl->nxCtx;  /* default NetX IO ctx, same for read */
     ssl->IOCB_WriteCtx = &ssl->nxCtx;  /* and write */
 #endif
+#ifdef HAVE_LWIP_NATIVE
+    ssl->lwipCtx.pbuf = NULL ;
+    ssl->lwipCtx.pulled = 0 ;
+#endif
 #ifdef CYASSL_DTLS
     ssl->IOCB_CookieCtx = NULL;      /* we don't use for default cb */
     ssl->dtls_expected_rx = MAX_MTU;
diff --git a/src/io.c b/src/io.c
index bb4bb1ec2..02ff56803 100644
--- a/src/io.c
+++ b/src/io.c
@@ -1050,7 +1050,15 @@ void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxSocket, ULONG waitOption)
 #include "lwip/tcp.h"
 #include "lwip/pbuf.h"
 #include "lwip/sockets.h"
-#include "SSL-NB.h"
+
+#if 0
+/*Enable debug*/
+#include 
+#define DBG_PRINTF(x, ...) printf("[SSLClient : DBG]"x"\r\n", ##__VA_ARGS__);
+#else
+/*Disable debug*/
+#define DBG_PRINTF(x, ...)
+#endif
 
 #if 0
 /*Enable debug*/
@@ -1060,9 +1068,13 @@ void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxSocket, ULONG waitOption)
 #define DBG_PRINTF_CB(x, ...)
 #endif
 
-void CyaSSL_PbufFree(struct pbuf *p)
+#define ERR_PRINTF(x, ...) printf("[SSLClient:ERROR]"x"\r\n", ##__VA_ARGS__);
+
+void CyaSSL_PbufFree(void *vp)
 {
+    struct pbuf *p ;
     struct pbuf * next;
+    p = (struct pbuf *) vp ;
     while(p->next != NULL)
     {
         next = p->next;
@@ -1072,20 +1084,20 @@ void CyaSSL_PbufFree(struct pbuf *p)
     pbuf_free(p);
 }
 
-static int CyaSSL_GetDataFromPbuf(char *buff, CYASSL_NB *ssl_nb, int size)
+static int CyaSSL_GetDataFromPbuf(char *buff, CYASSL *ssl, int size)
 {
     struct pbuf *p ;
     struct pbuf *p_next ;
     int totalLen ;
     int skipLen = 0 ;
 
-    p = ssl_nb->pbuf ;
-    if(p->tot_len < (ssl_nb->pulled + size))
+    p = ssl->lwipCtx.pbuf ;
+    if(p->tot_len < (ssl->lwipCtx.pulled + size))
         return 0 ;
     
     while(p) { /* skip the part pulled before */
-        if(p->len && p->len > (ssl_nb->pulled - skipLen) ){ 
-            skipLen = (ssl_nb->pulled - skipLen) ;
+        if(p->len && p->len > (ssl->lwipCtx.pulled - skipLen) ){ 
+            skipLen = (ssl->lwipCtx.pulled - skipLen) ;
             break ;
         } else {
             skipLen += p->len ;
@@ -1113,25 +1125,62 @@ static int CyaSSL_GetDataFromPbuf(char *buff, CYASSL_NB *ssl_nb, int size)
             p = p_next ;
         } else break ;
     }
-    ssl_nb->pulled += totalLen ;
-    if(ssl_nb->pbuf->tot_len <= ssl_nb->pulled) {
-        CyaSSL_PbufFree(ssl_nb->pbuf) ;
-        ssl_nb->pbuf = NULL ;
-        tcp_recved(ssl_nb->pcb,ssl_nb->pbuf->tot_len) ;
+    ssl->lwipCtx.pulled += totalLen ;
+    if(ssl->lwipCtx.pbuf->tot_len <= ssl->lwipCtx.pulled) {
+        CyaSSL_PbufFree(ssl->lwipCtx.pbuf) ;
+        ssl->lwipCtx.pbuf = NULL ;
+        tcp_recved(ssl->lwipCtx.pcb,ssl->lwipCtx.pbuf->tot_len) ;
     }
     return totalLen;
 }
 
+err_t CyaSSL_connectCallback(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t err)
+{
+    struct pbuf *next ;
+    CYASSL *ssl ;
+    ssl = (CYASSL *)cb ;
+    
+    if((cb == NULL)||(pcb == NULL))
+        ERR_PRINTF("CyaSSL_connectCallBack, cb=%x, pcb=%d\n", cb, pcb) ;
+    if(p && (err == 0)) {
+        DBG_PRINTF_CB("CyaSSL_connectCallBack, pbuf=%x, err=%d, tot_len=%d\n", p, err, p->tot_len) ;
+    }else {
+        ERR_PRINTF("CyaSSL_connectCallBack, pbuf=%x, err=%d\n", p, err) ;
+        return ERR_OK; /* don't go to SSL_CONN */
+    }
+
+    if(ssl->lwipCtx.pbuf) {
+        next = ssl->lwipCtx.pbuf ;
+        while(1) {
+            if(next->next)
+                next = next->next ;
+            else break ;
+        }
+        next->next = p ;
+        ssl->lwipCtx.pbuf->tot_len += p->tot_len ;
+    } else {
+        ssl->lwipCtx.pbuf = p ;
+    }
+    ssl->lwipCtx.pulled = 0 ;
+    if(ssl->lwipCtx.wait < 0)
+        ssl->lwipCtx.wait = 10000 ;
+    return ERR_OK; 
+}
+
+err_t DataSentCallback (void *arg, struct tcp_pcb *pcb, u16_t err)
+{
+    DBG_PRINTF_CB("LwIPtest: Data Sent(SentCallBack1), err=%d\n", err) ;
+    return ERR_OK;
+}
+
 int CyaSSL_LwIP_Receive(CYASSL* ssl, char *buf, int sz, void *cb)
 {
     int ret ;
-    CYASSL_NB *ssl_nb ;
-    ssl_nb = (CYASSL_NB *)cb ;
-    DBG_PRINTF_CB("CyaSSL_LwIP_Receive: ssl_nb = %x\n", ssl_nb) ;  
+    DBG_PRINTF_CB("CyaSSL_LwIP_Receive: ssl_nb = %x\n", ssl) ;  
 
-    if(ssl_nb->pbuf) {
-        DBG_PRINTF_CB("Received Len=%d, Want Len= %d\n", ssl_nb->pbuf->tot_len, sz) ;
-        ret = CyaSSL_GetDataFromPbuf(buf, ssl_nb, sz) ;
+    if(ssl->lwipCtx.pbuf) {
+        DBG_PRINTF_CB("Received Len=%d, Want Len= %d\n", ssl->lwipCtx.pbuf->tot_len, sz) ;
+        ret = CyaSSL_GetDataFromPbuf(buf, ssl, sz) ;
         if(ret == 0)
              ret = CYASSL_CBIO_ERR_WANT_READ ;
     } else {
@@ -1143,13 +1192,35 @@ int CyaSSL_LwIP_Receive(CYASSL* ssl, char *buf, int sz, void *cb)
 
 int CyaSSL_LwIP_Send(CYASSL* ssl, char *buf, int sz, void *cb)
 {
-    CYASSL_NB *ssl_nb ;
-    ssl_nb = (CYASSL_NB *)cb ;
-    DBG_PRINTF_CB("CyaSSL_LwIP_Send: ssl_nb = %x\n", ssl_nb) ;
+    err_t ret ;
+    
+    DBG_PRINTF_CB("CyaSSL_LwIP_Send: ssl = %x\n", ssl) ;
     DBG_PRINTF_CB("Send buf[0,1,2,3]=%x,%x,%x,%x, sz=%d\n", buf[0], buf[1], buf[2], buf[3], sz) ;
-    tcp_write(ssl_nb->pcb, buf, sz, TCP_WRITE_FLAG_COPY) ;
-    return sz ;
+    ret = tcp_write(ssl->lwipCtx.pcb, buf, sz, TCP_WRITE_FLAG_COPY) ;
+    if(ret == ERR_OK)
+        return sz ;
+    else {
+        ERR_PRINTF("Send ssl=%x, ret=%d\n", ssl, ret) ;
+        return -1 ;
+    }
 }
+
+void CyaSSL_NB_setCallbackArg(CYASSL *ssl, void *arg)
+{
+    ssl->lwipCtx.arg = arg ; 
+}
+
+int CyaSSL_SetIO_LwIP(CYASSL* ssl, void* pcb)
+{
+    if (ssl && pcb) {
+        ssl->lwipCtx.pcb = (struct tcp_pcb *)pcb ;
+        tcp_recv(pcb, CyaSSL_connectCallback);
+        tcp_sent(pcb, DataSentCallback); 
+        tcp_arg (pcb, (void *)ssl) ;
+    } else return BAD_FUNC_ARG ;
+    return ERR_OK ;
+}
+
 #endif /* HAVE_LWIP_NATIVE */
 
 

From 459df7a7d2ef82c638915f2f662a845b60394397 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Mon, 3 Feb 2014 10:44:21 +0900
Subject: [PATCH 20/43] minor fix

---
 IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c | 12 +++---------
 src/io.c                        |  4 ++--
 2 files changed, 5 insertions(+), 11 deletions(-)

diff --git a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
index bd0e005a6..df83cf4df 100644
--- a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
+++ b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
@@ -45,13 +45,13 @@
 /*Enable debug*/
 #include 
 #define DBG_PRINTF(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
+#define ERR_PRINTF(x, ...) printf("[HTTPSClient:ERROR]"x"\r\n", ##__VA_ARGS__);
 #else
 /*Disable debug*/
 #define DBG_PRINTF(x, ...)
+#define ERR_PRINTF(x, ...)
 #endif
 
-#define ERR_PRINTF(x, ...) printf("[HTTPSClient:ERROR]"x"\r\n", ##__VA_ARGS__);
- 
 static int LwIP_cb_mutex = 0 ; 
 
 static unsigned long localPort = 0 ;
@@ -141,12 +141,6 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
     switch(https_nb->stat) {
     case BEGIN:
         printf("======= LwIP: HTTPS Client Test(%x): %d =========\n", nb, count ++) ;
-        {
-             void * p ;
-             p = (void *)malloc(1) ;
-             printf("Watermark=%x\n", p) ;
-             free(p) ;
-        }
         /*** Assuming LwIP has been initialized ***/
         https_nb->stat = INITIALIZED ; 
     case INITIALIZED:
@@ -338,7 +332,7 @@ void *CyaSSL_HTTPS_ClientP_5 = (void *)&CyaSSL_HTTPS_Client_5 ;
 
 #define HTTPS_PORT   443
 #define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
-static struct ip_addr server_em = { IP_ADDR(192,168,11,9) } ;
+static struct ip_addr server_em = { IP_ADDR(xxx,xxx,xxx,xxx) } ;
 
 void HTTPSClient_main_init() {
 
diff --git a/src/io.c b/src/io.c
index 02ff56803..e28d0fd39 100644
--- a/src/io.c
+++ b/src/io.c
@@ -1055,9 +1055,11 @@ void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxSocket, ULONG waitOption)
 /*Enable debug*/
 #include 
 #define DBG_PRINTF(x, ...) printf("[SSLClient : DBG]"x"\r\n", ##__VA_ARGS__);
+#define ERR_PRINTF(x, ...) printf("[SSLClient:ERROR]"x"\r\n", ##__VA_ARGS__);
 #else
 /*Disable debug*/
 #define DBG_PRINTF(x, ...)
+#define ERR_PRINTF(x, ...)
 #endif
 
 #if 0
@@ -1068,8 +1070,6 @@ void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxSocket, ULONG waitOption)
 #define DBG_PRINTF_CB(x, ...)
 #endif
 
-#define ERR_PRINTF(x, ...) printf("[SSLClient:ERROR]"x"\r\n", ##__VA_ARGS__);
-
 void CyaSSL_PbufFree(void *vp)
 {
     struct pbuf *p ;

From 52e661df05a020ccaa78ca10ac5ccac0547a153b Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 4 Feb 2014 10:07:01 +0900
Subject: [PATCH 21/43] Clean ups

---
 IDE/IAR-EWARM/CyaSSL/https-nb.c               | 49 ++++++++-----------
 IDE/IAR-EWARM/CyaSSL/https-nb.h               |  7 ++-
 .../Projects/CyaSSL-Lib/CyaSSL-Lib.ewp        |  3 --
 src/io.c                                      |  4 +-
 4 files changed, 28 insertions(+), 35 deletions(-)

diff --git a/IDE/IAR-EWARM/CyaSSL/https-nb.c b/IDE/IAR-EWARM/CyaSSL/https-nb.c
index 6f4da3de7..596119cbd 100644
--- a/IDE/IAR-EWARM/CyaSSL/https-nb.c
+++ b/IDE/IAR-EWARM/CyaSSL/https-nb.c
@@ -24,23 +24,16 @@
 #endif
  
 #include 
- 
-#if defined(CYASSL_MDK_ARM)
-      #include 
-        #include 
-        #include 
-        #include "cyassl_MDK_ARM.h"
-#endif
+
+#if defined(HAVE_LWIP_NATIVE)
 
 #if defined(CYASSL_IAR_ARM)
     #include 
     #include 
 #endif
 
-#if defined(CYASSL_LWIP)
 #include "lwip/tcp.h"
 #include "lwip/sockets.h"
-#endif
 
 #include 
 #include 
@@ -52,14 +45,14 @@
 /*Enable debug*/
 #include 
 #define DBG_PRINTF(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
+#define ERR_PRINTF(x, ...) printf("[HTTPSClient:ERROR]"x"\r\n", ##__VA_ARGS__);
 #else
 /*Disable debug*/
 #define DBG_PRINTF(x, ...)
+#define ERR_PRINTF(x, ...)
 #endif
 
-#define ERR_PRINTF(x, ...) printf("[HTTPSClient:ERROR]"x"\r\n", ##__VA_ARGS__);
- 
-static int CyaSSL_cb_mutex = 0 ; 
+static int LwIP_cb_mutex = 0 ; 
 
 static unsigned long localPort = 0 ;
 static unsigned long getPort(void) {
@@ -73,6 +66,7 @@ static err_t DataConnectedCallback (void *arg, struct tcp_pcb *pcb, s8_t err)
     return ERR_OK;
 }
 
+
 static err_t DataSentCallback (void *arg, struct tcp_pcb *pcb, u16_t err)
 {
     DBG_PRINTF("LwIPtest: Data Sent(SentCallBack1)\n") ;
@@ -119,6 +113,7 @@ static err_t DataReceiveCallback(void *arg, struct tcp_pcb *pcb, struct pbuf *p,
     return ERR_OK;
 }
 
+
 static int count = 0 ;
 
 void CyaSSL_HTTPS_Client_NB_init(void *nb, 
@@ -146,12 +141,6 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
     switch(https_nb->stat) {
     case BEGIN:
         printf("======= LwIP: HTTPS Client Test(%x): %d =========\n", nb, count ++) ;
-        {
-             void * p ;
-             p = (void *)malloc(1) ;
-             printf("Watermark=%x\n", p) ;
-             free(p) ;
-        }
         /*** Assuming LwIP has been initialized ***/
         https_nb->stat = INITIALIZED ; 
     case INITIALIZED:
@@ -181,8 +170,8 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         }
 
     case TCP_CONNECT:
-        if(CyaSSL_cb_mutex)return ERR_OK ;
-        else CyaSSL_cb_mutex = 1 ;
+        if(LwIP_cb_mutex)return ERR_OK ;
+        else LwIP_cb_mutex = 1 ;
         DBG_PRINTF("LwIPtest: TCP_CONNECT(%x)\n", https_nb) ;
         DBG_PRINTF("LwIPtest: Server IP Addrress(%d.%d.%d.%d)\n", 
               (*(unsigned long *)&https_nb->serverIP_em&0xff),
@@ -203,7 +192,7 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         
     case TCP_CONNECTED:
         printf("LwIPtest: TCP CONNECTED(%x)\n", https_nb) ;
-        CyaSSL_cb_mutex = 0 ; 
+        LwIP_cb_mutex = 0 ; 
 
         /*CyaSSLv3_client_method()
         CyaTLSv1_client_method()
@@ -229,7 +218,7 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         
     case SSL_CONN: /* handshaking */
 
-        if(CyaSSL_cb_mutex) return ERR_OK ;
+        if(LwIP_cb_mutex) return ERR_OK ;
         ret = CyaSSL_connect(https_nb->ssl); 
         DBG_PRINTF("LwIPtest: SSL Connecting(CyaSSL_connect), ret = %d\n", ret) ;
         if(ret == SSL_SUCCESS) {
@@ -253,7 +242,7 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         if(https_nb->ssl->lwipCtx.wait-- == 0) { /* counting down after the callback 
                for multiple callbacks */
             https_nb->stat = SSL_CONN ;
-            CyaSSL_cb_mutex = 0 ; 
+            LwIP_cb_mutex = 0 ; 
         }
         return ERR_OK ;
     
@@ -262,8 +251,8 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         #define SEND_BUFF_SIZE 100
         char sendBuff[SEND_BUFF_SIZE] ;    
         int size ;
-        if(CyaSSL_cb_mutex)return ERR_OK ;
-        else CyaSSL_cb_mutex = 1 ; /* lock */
+        if(LwIP_cb_mutex)return ERR_OK ;
+        else LwIP_cb_mutex = 1 ; /* lock */
         printf("LwIPtest: SSL CONNECTED(%x)\n", https_nb) ;
         CyaSSL_NB_setCallbackArg(https_nb->ssl, &(https_nb->stat)) ;
         tcp_sent(https_nb->pcb, DataSentCallback); 
@@ -286,7 +275,7 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         #define HTTP_BUFF_SIZE 2048
         char httpbuff[HTTP_BUFF_SIZE] ;
         
-        CyaSSL_cb_mutex = 0 ;
+        LwIP_cb_mutex = 0 ;
         memset(httpbuff, '\0', HTTP_BUFF_SIZE) ;
         ret = CyaSSL_read(https_nb->ssl, httpbuff, HTTP_BUFF_SIZE) ;
         printf("LwIPtest: HTTPS GET(%x), Received(%d)\n",https_nb, strlen(httpbuff)) ;
@@ -327,6 +316,7 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         CyaSSL_HTTPS_Client_NB
                                                                      */
 /*********************************************************************/
+#ifndef NO_MAIN_DRIVER
 
 CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_1 ;
 void *CyaSSL_HTTPS_ClientP_1 = (void *)&CyaSSL_HTTPS_Client_1 ;
@@ -344,7 +334,6 @@ void *CyaSSL_HTTPS_ClientP_5 = (void *)&CyaSSL_HTTPS_Client_5 ;
 #define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
 static struct ip_addr server_em = { IP_ADDR(192,168,11,9) } ;
 
-
 void HTTPSClient_main_init() {
 
   CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_1, 
@@ -361,7 +350,6 @@ void HTTPSClient_main_init() {
  
 void HTTPSClient_main(int i)
 {
-   
     if((i % 1) == 0) { /* wait for initializing TCP/IP, DHCP */
         CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_1) ;
     }
@@ -382,4 +370,7 @@ void HTTPSClient_main(int i)
         CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_5) ;
     }
 
-}
\ No newline at end of file
+}
+
+#endif /* NO_MAIN_DRIVER  */
+#endif /* HAVE_LWIP_NATIVE */
diff --git a/IDE/IAR-EWARM/CyaSSL/https-nb.h b/IDE/IAR-EWARM/CyaSSL/https-nb.h
index 978ccb028..6cac23155 100644
--- a/IDE/IAR-EWARM/CyaSSL/https-nb.h
+++ b/IDE/IAR-EWARM/CyaSSL/https-nb.h
@@ -18,6 +18,9 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
+ 
+#ifndef HTTPS_NB_H
+#define HTTPS_NB_H
 
 extern int CyaSSL_GetDataFromPbuf(char *buff, struct pbuf *p, int size) ;
 
@@ -68,4 +71,6 @@ typedef struct {
 
 extern void CyaSSL_HTTPS_Client_NB_init(void *nb, 
      struct ip_addr svIP, unsigned long svPort, char *host, char *path) ;
-extern int CyaSSL_HTTPS_Client_NB(void *nb) ;
\ No newline at end of file
+extern int CyaSSL_HTTPS_Client_NB(void *nb) ;
+
+#endif
diff --git a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
index c9d8e1473..e35c88a81 100644
--- a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
+++ b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
@@ -1874,9 +1874,6 @@
   
   
     Apps
-    
-      $PROJ_DIR$\..\..\CyaSSL\https-maic.c
-    
     
       $PROJ_DIR$\..\..\CyaSSL\https-nb.c
     
diff --git a/src/io.c b/src/io.c
index 02ff56803..e77752f1c 100644
--- a/src/io.c
+++ b/src/io.c
@@ -1055,9 +1055,11 @@ void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxSocket, ULONG waitOption)
 /*Enable debug*/
 #include 
 #define DBG_PRINTF(x, ...) printf("[SSLClient : DBG]"x"\r\n", ##__VA_ARGS__);
+#define ERR_PRINTF(x, ...) printf("[SSLClient:ERROR]"x"\r\n", ##__VA_ARGS__);
 #else
 /*Disable debug*/
 #define DBG_PRINTF(x, ...)
+#define ERR_PRINTF(x, ...) err_sys(x)
 #endif
 
 #if 0
@@ -1068,8 +1070,6 @@ void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxSocket, ULONG waitOption)
 #define DBG_PRINTF_CB(x, ...)
 #endif
 
-#define ERR_PRINTF(x, ...) printf("[SSLClient:ERROR]"x"\r\n", ##__VA_ARGS__);
-
 void CyaSSL_PbufFree(void *vp)
 {
     struct pbuf *p ;

From 23bc584cafc06c62a01775ea2970802567130c8e Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 4 Feb 2014 16:37:50 +0900
Subject: [PATCH 22/43] LwIP, native TCP socket, ver 2

---
 IDE/IAR-EWARM/CyaSSL/https-nb.c | 109 ++++++++++----------------------
 cyassl/internal.h               |   8 ++-
 cyassl/ssl.h                    |   2 +-
 src/io.c                        |  47 ++++++++------
 4 files changed, 67 insertions(+), 99 deletions(-)

diff --git a/IDE/IAR-EWARM/CyaSSL/https-nb.c b/IDE/IAR-EWARM/CyaSSL/https-nb.c
index 596119cbd..84a2d0868 100644
--- a/IDE/IAR-EWARM/CyaSSL/https-nb.c
+++ b/IDE/IAR-EWARM/CyaSSL/https-nb.c
@@ -1,4 +1,4 @@
-/* HTTPS-NB.c
+/* https-nb.c
  *
  * Copyright (C) 2006-2014 wolfSSL Inc.
  *
@@ -22,7 +22,7 @@
 #ifdef HAVE_CONFIG_H
     #include 
 #endif
- 
+
 #include 
 
 #if defined(HAVE_LWIP_NATIVE)
@@ -59,61 +59,22 @@ static unsigned long getPort(void) {
       return (localPort++ + 0x200) & 0x7fff ;
 }
 
-static err_t DataConnectedCallback (void *arg, struct tcp_pcb *pcb, s8_t err)
+static err_t TcpConnectedCallback (void *arg, struct tcp_pcb *pcb, s8_t err)
 {
-    DBG_PRINTF("DataConnectedCallback(arg=%x, pcb=%x, err=%x)\n", arg, pcb, err) ;
+    DBG_PRINTF("TcpConnectedCallback(arg=%x, pcb=%x, err=%x)\n", arg, pcb, err) ;
     *(enum HTTPS_Stat *)arg = TCP_CONNECTED ;
     return ERR_OK;
 }
 
-
-static err_t DataSentCallback (void *arg, struct tcp_pcb *pcb, u16_t err)
-{
-    DBG_PRINTF("LwIPtest: Data Sent(SentCallBack1)\n") ;
-    return ERR_OK;
-}
-
 static err_t DataReceiveCallback(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
 {
-    struct pbuf *next ;
-    CYASSL *ssl ;
-    ssl = (CYASSL *)arg ;
-    
-    DBG_PRINTF("LwIPtest: Data Received(DataReceiveCallback), pbuf->len=%d, err=%d\n", p->tot_len , err) ;
-    
-    if(p==0) { /* throw away */
+    DBG_PRINTF("DataReceiveCallback, pbuf->len=%d, err=%d\n", p->tot_len , err) ;
+    if(*(enum HTTPS_Stat *)(arg) == WAITING) {
+        *(enum HTTPS_Stat *)(arg) = HTTP_RECEIVE ;
         return ERR_OK ;
-    }
-    if(*(enum HTTPS_Stat *)(ssl->lwipCtx.arg) == WAITING) {
-        *(enum HTTPS_Stat *)(ssl->lwipCtx.arg) = HTTP_RECEIVE ;
-    } else { 
-        CyaSSL_PbufFree(p) ;
-        tcp_recved(pcb,p->tot_len) ;
-        return ERR_OK ;
-    }
-    /* put it into the queue */
-    if(ssl->lwipCtx.pbuf) {
-        next = ssl->lwipCtx.pbuf ;
-        while(1) {
-            DBG_PRINTF("pbuf=%x, pbuf->next=%x, ",ssl->lwipCtx.pbuf, next) ;
-            if(next->next)
-                next = next->next ;
-            else break ;
-        }
-        next->next = p ;
-        ssl->lwipCtx.pbuf->tot_len += p->tot_len ;
-    } else {
-        ssl->lwipCtx.pbuf = p ;
-    }
-    ssl->lwipCtx.pulled = 0 ;
-
-    if(ssl->lwipCtx.wait < 0)
-        ssl->lwipCtx.wait = 1000 ;
-    ssl->lwipCtx.pulled = 0 ;
-    return ERR_OK;
+    } else return !ERR_OK ;
 }
 
-
 static int count = 0 ;
 
 void CyaSSL_HTTPS_Client_NB_init(void *nb, 
@@ -140,14 +101,15 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
 
     switch(https_nb->stat) {
     case BEGIN:
-        printf("======= LwIP: HTTPS Client Test(%x): %d =========\n", nb, count ++) ;
+        printf("======= LwIP: HTTPS Client Test(%x): %d ====\n", nb, count ++) ;
         /*** Assuming LwIP has been initialized ***/
         https_nb->stat = INITIALIZED ; 
     case INITIALIZED:
         https_nb->pcb = tcp_new();
         if(https_nb->pcb) {
     	        tcp_arg(https_nb->pcb, (void *)&(https_nb->stat)) ;    
-                DBG_PRINTF("LwIPtest: New PCB(tcp_new=%x), &https->stat=%x\n", https_nb->pcb, &https_nb->stat) ;
+                DBG_PRINTF("New PCB(tcp_new=%x), &https->stat=%x\n",
+                                           https_nb->pcb, &https_nb->stat) ;
         } else {
     	    ERR_PRINTF("tcp_new, ret=%d\n", https_nb->pcb) ;
             https_nb->stat = IDLE ;
@@ -179,7 +141,7 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
               (*(unsigned long *)&https_nb->serverIP_em>>16)&0xff, 
               (*(unsigned long *)&https_nb->serverIP_em>>24)&0xff) ;
         ret = tcp_connect(https_nb->pcb, &(https_nb->serverIP_em),
-                          https_nb->serverPort, DataConnectedCallback); 
+                          https_nb->serverPort, TcpConnectedCallback); 
  
         if(ret == ERR_OK) {
     	     https_nb->stat = WAITING ;
@@ -212,35 +174,35 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
             return !ERR_OK ;
         }
         
-        CyaSSL_SetIO_LwIP(https_nb->ssl, https_nb->pcb);
-        CyaSSL_SetVersion(https_nb->ssl, CYASSL_TLSV1_2) ;
-        https_nb->stat = SSL_CONN ;      
+        CyaSSL_SetIO_LwIP(https_nb->ssl, https_nb->pcb, 
+                          DataReceiveCallback, NULL, (void *)&https_nb->stat);
+
+        https_nb->stat = SSL_CONN ;
         
     case SSL_CONN: /* handshaking */
-
         if(LwIP_cb_mutex) return ERR_OK ;
         ret = CyaSSL_connect(https_nb->ssl); 
-        DBG_PRINTF("LwIPtest: SSL Connecting(CyaSSL_connect), ret = %d\n", ret) ;
+        DBG_PRINTF("CyaSSL_connect, ret = %d\n", ret) ;
         if(ret == SSL_SUCCESS) {
-            https_nb->stat = SSL_CONN_WAITING ;
-            DBG_PRINTF("LwIPtest: SSL Connected\n") ;
+            DBG_PRINTF("SSL Connected\n") ;
             https_nb->stat = HTTP_SEND ;
         } else {
             ret = CyaSSL_get_error(https_nb->ssl, NULL) ;
             if(ret == SSL_ERROR_WANT_READ) {
-                https_nb->ssl->lwipCtx.wait = -1 ;
-                https_nb->stat = SSL_CONN_WAITING ;
+                 https_nb->ssl->lwipCtx.wait = -1 ;
+                 https_nb->stat = SSL_CONN_WAITING ;
                 return ERR_OK ;
             } else {
                 ERR_PRINTF("CyaSSL_connecting_NB:ssl=%x, ret=%d\n", https_nb->ssl, ret) ;   
                 return !ERR_OK ;
             }
         }
-        return ERR_OK ;
-        
+        return ERR_OK ; 
+         
     case SSL_CONN_WAITING:
-        if(https_nb->ssl->lwipCtx.wait-- == 0) { /* counting down after the callback 
-               for multiple callbacks */
+
+        if(https_nb->ssl->lwipCtx.wait-- == 0) { 
+            /* counting down after the callback for multiple callbacks */
             https_nb->stat = SSL_CONN ;
             LwIP_cb_mutex = 0 ; 
         }
@@ -253,23 +215,18 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         int size ;
         if(LwIP_cb_mutex)return ERR_OK ;
         else LwIP_cb_mutex = 1 ; /* lock */
-        printf("LwIPtest: SSL CONNECTED(%x)\n", https_nb) ;
-        CyaSSL_NB_setCallbackArg(https_nb->ssl, &(https_nb->stat)) ;
-        tcp_sent(https_nb->pcb, DataSentCallback); 
-        tcp_recv(https_nb->pcb, DataReceiveCallback); 
-
-        DBG_PRINTF("LwIPtest: HTTPS GET(%x)\n", https_nb) ;
+        printf("SSL CONNECTED(%x)\n", https_nb) ;
         sprintf(sendBuff,
                 "GET %s HTTP/1.0\r\nHost: %s\r\nConnection: close\r\n\r\n", 
                 https_nb->path, https_nb->hostname) ;
         size = strlen((char const *)sendBuff) ;
-        
+
         CyaSSL_write(https_nb->ssl, sendBuff, size) ;
 
         https_nb->stat = WAITING ;
         return ERR_OK;
     }
-      
+
     case HTTP_RECEIVE: 
     {
         #define HTTP_BUFF_SIZE 2048
@@ -278,9 +235,9 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         LwIP_cb_mutex = 0 ;
         memset(httpbuff, '\0', HTTP_BUFF_SIZE) ;
         ret = CyaSSL_read(https_nb->ssl, httpbuff, HTTP_BUFF_SIZE) ;
-        printf("LwIPtest: HTTPS GET(%x), Received(%d)\n",https_nb, strlen(httpbuff)) ;
-        /* puts(httpbuff) ;*/ 
-        puts("===================\n") ; 
+        printf("HTTPS GET(%x), Received(%d)\n",https_nb, strlen(httpbuff)) ;
+        /* puts(httpbuff) ; */ 
+        /* puts("===================\n") ; */
     }
     case SSL_CLOSE:  
     {
@@ -332,12 +289,12 @@ void *CyaSSL_HTTPS_ClientP_5 = (void *)&CyaSSL_HTTPS_Client_5 ;
 
 #define HTTPS_PORT   443
 #define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
-static struct ip_addr server_em = { IP_ADDR(192,168,11,9) } ;
+static struct ip_addr server_em = { IP_ADDR(192,168,11,9) } ; 
 
 void HTTPSClient_main_init() {
 
   CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_1, 
-                           server_em, HTTPS_PORT, "xxx.com", "/") ;
+                              server_em, HTTPS_PORT, "xxx.com", "/") ;
   CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_2, 
                               server_em, HTTPS_PORT, "xxx.com", "/") ;
   CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_3, 
diff --git a/cyassl/internal.h b/cyassl/internal.h
index 9c903814a..0c49948a4 100644
--- a/cyassl/internal.h
+++ b/cyassl/internal.h
@@ -964,9 +964,9 @@ int  SetCipherList(Suites*, const char* list);
 #ifdef HAVE_LWIP_NATIVE
     CYASSL_LOCAL int CyaSSL_LwIP_Send(CYASSL* ssl, char *buf, int sz, void *cb);
     CYASSL_LOCAL int CyaSSL_LwIP_Receive(CYASSL* ssl, char *buf, int sz, void *cb);
-    CYASSL_LOCAL void CyaSSL_NB_setCallbackArg(CYASSL *ssl, void *arg) ;
-    CYASSL_LOCAL void CyaSSL_PbufFree(void *p);
-#endif /* HAVE_{tcp stack} */
+    CYASSL_API int CyaSSL_SetIO_LwIP(CYASSL* ssl, void *pcb, 
+                                tcp_recv_fn recv, tcp_sent_fn sent, void *arg);
+#endif /* HAVE_LWIP_NATIVE */
 
 /* CyaSSL Cipher type just points back to SSL */
 struct CYASSL_CIPHER {
@@ -1806,6 +1806,8 @@ typedef struct DtlsMsg {
     /* LwIP native tpc socket context */
     typedef struct LwIP_native_Ctx {
         struct tcp_pcb * pcb ;
+        tcp_recv_fn recv ;
+        tcp_sent_fn sent ;
         int    pulled  ; 
         struct pbuf *pbuf ;
         int    wait ;
diff --git a/cyassl/ssl.h b/cyassl/ssl.h
index b791c2a49..328ea9444 100644
--- a/cyassl/ssl.h
+++ b/cyassl/ssl.h
@@ -940,7 +940,7 @@ CYASSL_API void CyaSSL_SetIOWriteFlags(CYASSL* ssl, int flags);
                                       ULONG waitoption);
 #endif
 #ifdef HAVE_LWIP_NATIVE
-    CYASSL_API int CyaSSL_SetIO_LwIP(CYASSL* ssl, void *pcb);
+    #include "lwip/tcp.h"
 #endif
 typedef int (*CallbackGenCookie)(CYASSL* ssl, unsigned char* buf, int sz,
                                  void* ctx);
diff --git a/src/io.c b/src/io.c
index e77752f1c..5c180a3d6 100644
--- a/src/io.c
+++ b/src/io.c
@@ -1059,7 +1059,7 @@ void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxSocket, ULONG waitOption)
 #else
 /*Disable debug*/
 #define DBG_PRINTF(x, ...)
-#define ERR_PRINTF(x, ...) err_sys(x)
+#define ERR_PRINTF(x, ...)
 #endif
 
 #if 0
@@ -1070,7 +1070,7 @@ void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxSocket, ULONG waitOption)
 #define DBG_PRINTF_CB(x, ...)
 #endif
 
-void CyaSSL_PbufFree(void *vp)
+static void CyaSSL_PbufFree(void *vp)
 {
     struct pbuf *p ;
     struct pbuf * next;
@@ -1134,18 +1134,18 @@ static int CyaSSL_GetDataFromPbuf(char *buff, CYASSL *ssl, int size)
     return totalLen;
 }
 
-err_t CyaSSL_connectCallback(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t err)
+err_t CyaSSL_LwIP_recv_cb(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t err)
 {
     struct pbuf *next ;
     CYASSL *ssl ;
     ssl = (CYASSL *)cb ;
     
     if((cb == NULL)||(pcb == NULL))
-        ERR_PRINTF("CyaSSL_connectCallBack, cb=%x, pcb=%d\n", cb, pcb) ;
+        ERR_PRINTF("CyaSSL_LwIP_recv_cb, cb=%x, pcb=%d\n", cb, pcb) ;
     if(p && (err == 0)) {
-        DBG_PRINTF_CB("CyaSSL_connectCallBack, pbuf=%x, err=%d, tot_len=%d\n", p, err, p->tot_len) ;
+        DBG_PRINTF_CB("CyaSSL_LwIP_recv_cb, pbuf=%x, err=%d, tot_len=%d\n", p, err, p->tot_len) ;
     }else {
-        ERR_PRINTF("CyaSSL_connectCallBack, pbuf=%x, err=%d\n", p, err) ;
+        ERR_PRINTF("CyaSSL_LwIP_recv_cb, pbuf=%x, err=%d\n", p, err) ;
         return ERR_OK; /* don't go to SSL_CONN */
     }
 
@@ -1162,14 +1162,23 @@ err_t CyaSSL_connectCallback(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t
         ssl->lwipCtx.pbuf = p ;
     }
     ssl->lwipCtx.pulled = 0 ;
-    if(ssl->lwipCtx.wait < 0)
-        ssl->lwipCtx.wait = 10000 ;
-    return ERR_OK; 
+
+    if(((ssl->options.connectState != CONNECT_BEGIN) &&
+        (ssl->options.connectState != SECOND_REPLY_DONE))||
+       ((ssl->options.acceptState  != ACCEPT_BEGIN) && 
+        (ssl->options.connectState != ACCEPT_THIRD_REPLY_DONE)))
+    {
+       if(ssl->lwipCtx.wait < 0) /* wait for multiple callbacks */
+           ssl->lwipCtx.wait = 10000 ;
+    } else if(ssl->lwipCtx.recv)
+        return ssl->lwipCtx.recv(ssl->lwipCtx.arg, pcb, p, err) ; 
+                                                      /* user callback */
+    return ERR_OK;
 }
 
-err_t DataSentCallback (void *arg, struct tcp_pcb *pcb, u16_t err)
+err_t  CyaSSL_LwIP_sent_cb(void *arg, struct tcp_pcb *pcb, u16_t err)
 {
-    DBG_PRINTF_CB("LwIPtest: Data Sent(SentCallBack1), err=%d\n", err) ;
+    DBG_PRINTF_CB("CaSSL_LwIP_write_cb, err=%d\n", err) ;
     return ERR_OK;
 }
 
@@ -1205,17 +1214,17 @@ int CyaSSL_LwIP_Send(CYASSL* ssl, char *buf, int sz, void *cb)
     }
 }
 
-void CyaSSL_NB_setCallbackArg(CYASSL *ssl, void *arg)
-{
-    ssl->lwipCtx.arg = arg ; 
-}
-
-int CyaSSL_SetIO_LwIP(CYASSL* ssl, void* pcb)
+int CyaSSL_SetIO_LwIP(CYASSL* ssl, void* pcb, 
+                              tcp_recv_fn recv, tcp_sent_fn sent, void *arg)
 {
     if (ssl && pcb) {
         ssl->lwipCtx.pcb = (struct tcp_pcb *)pcb ;
-        tcp_recv(pcb, CyaSSL_connectCallback);
-        tcp_sent(pcb, DataSentCallback); 
+        ssl->lwipCtx.recv = recv ; /*  recv user callback */
+        ssl->lwipCtx.sent = sent ; /*  sent user callback */
+        ssl->lwipCtx.arg  = arg  ;
+        /* CyaSSL_LwIP_recv/sent_cb invokes recv/sent user callback in them. */
+        tcp_recv(pcb, CyaSSL_LwIP_recv_cb) ;
+        tcp_sent(pcb, CyaSSL_LwIP_sent_cb) ;    
         tcp_arg (pcb, (void *)ssl) ;
     } else return BAD_FUNC_ARG ;
     return ERR_OK ;

From 15e92f78fbcb80afd297c56e855054bb5dd0b756 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 4 Feb 2014 16:44:00 +0900
Subject: [PATCH 23/43] LwIP, native tcp socket, v0.2

---
 IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c | 109 ++++++++++----------------------
 cyassl/internal.h               |   8 ++-
 cyassl/ssl.h                    |   2 +-
 src/io.c                        |  45 +++++++------
 4 files changed, 66 insertions(+), 98 deletions(-)

diff --git a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
index df83cf4df..84a2d0868 100644
--- a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
+++ b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
@@ -1,4 +1,4 @@
-/* HTTPS-NB.c
+/* https-nb.c
  *
  * Copyright (C) 2006-2014 wolfSSL Inc.
  *
@@ -22,7 +22,7 @@
 #ifdef HAVE_CONFIG_H
     #include 
 #endif
- 
+
 #include 
 
 #if defined(HAVE_LWIP_NATIVE)
@@ -59,61 +59,22 @@ static unsigned long getPort(void) {
       return (localPort++ + 0x200) & 0x7fff ;
 }
 
-static err_t DataConnectedCallback (void *arg, struct tcp_pcb *pcb, s8_t err)
+static err_t TcpConnectedCallback (void *arg, struct tcp_pcb *pcb, s8_t err)
 {
-    DBG_PRINTF("DataConnectedCallback(arg=%x, pcb=%x, err=%x)\n", arg, pcb, err) ;
+    DBG_PRINTF("TcpConnectedCallback(arg=%x, pcb=%x, err=%x)\n", arg, pcb, err) ;
     *(enum HTTPS_Stat *)arg = TCP_CONNECTED ;
     return ERR_OK;
 }
 
-
-static err_t DataSentCallback (void *arg, struct tcp_pcb *pcb, u16_t err)
-{
-    DBG_PRINTF("LwIPtest: Data Sent(SentCallBack1)\n") ;
-    return ERR_OK;
-}
-
 static err_t DataReceiveCallback(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
 {
-    struct pbuf *next ;
-    CYASSL *ssl ;
-    ssl = (CYASSL *)arg ;
-    
-    DBG_PRINTF("LwIPtest: Data Received(DataReceiveCallback), pbuf->len=%d, err=%d\n", p->tot_len , err) ;
-    
-    if(p==0) { /* throw away */
+    DBG_PRINTF("DataReceiveCallback, pbuf->len=%d, err=%d\n", p->tot_len , err) ;
+    if(*(enum HTTPS_Stat *)(arg) == WAITING) {
+        *(enum HTTPS_Stat *)(arg) = HTTP_RECEIVE ;
         return ERR_OK ;
-    }
-    if(*(enum HTTPS_Stat *)(ssl->lwipCtx.arg) == WAITING) {
-        *(enum HTTPS_Stat *)(ssl->lwipCtx.arg) = HTTP_RECEIVE ;
-    } else { 
-        CyaSSL_PbufFree(p) ;
-        tcp_recved(pcb,p->tot_len) ;
-        return ERR_OK ;
-    }
-    /* put it into the queue */
-    if(ssl->lwipCtx.pbuf) {
-        next = ssl->lwipCtx.pbuf ;
-        while(1) {
-            DBG_PRINTF("pbuf=%x, pbuf->next=%x, ",ssl->lwipCtx.pbuf, next) ;
-            if(next->next)
-                next = next->next ;
-            else break ;
-        }
-        next->next = p ;
-        ssl->lwipCtx.pbuf->tot_len += p->tot_len ;
-    } else {
-        ssl->lwipCtx.pbuf = p ;
-    }
-    ssl->lwipCtx.pulled = 0 ;
-
-    if(ssl->lwipCtx.wait < 0)
-        ssl->lwipCtx.wait = 1000 ;
-    ssl->lwipCtx.pulled = 0 ;
-    return ERR_OK;
+    } else return !ERR_OK ;
 }
 
-
 static int count = 0 ;
 
 void CyaSSL_HTTPS_Client_NB_init(void *nb, 
@@ -140,14 +101,15 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
 
     switch(https_nb->stat) {
     case BEGIN:
-        printf("======= LwIP: HTTPS Client Test(%x): %d =========\n", nb, count ++) ;
+        printf("======= LwIP: HTTPS Client Test(%x): %d ====\n", nb, count ++) ;
         /*** Assuming LwIP has been initialized ***/
         https_nb->stat = INITIALIZED ; 
     case INITIALIZED:
         https_nb->pcb = tcp_new();
         if(https_nb->pcb) {
     	        tcp_arg(https_nb->pcb, (void *)&(https_nb->stat)) ;    
-                DBG_PRINTF("LwIPtest: New PCB(tcp_new=%x), &https->stat=%x\n", https_nb->pcb, &https_nb->stat) ;
+                DBG_PRINTF("New PCB(tcp_new=%x), &https->stat=%x\n",
+                                           https_nb->pcb, &https_nb->stat) ;
         } else {
     	    ERR_PRINTF("tcp_new, ret=%d\n", https_nb->pcb) ;
             https_nb->stat = IDLE ;
@@ -179,7 +141,7 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
               (*(unsigned long *)&https_nb->serverIP_em>>16)&0xff, 
               (*(unsigned long *)&https_nb->serverIP_em>>24)&0xff) ;
         ret = tcp_connect(https_nb->pcb, &(https_nb->serverIP_em),
-                          https_nb->serverPort, DataConnectedCallback); 
+                          https_nb->serverPort, TcpConnectedCallback); 
  
         if(ret == ERR_OK) {
     	     https_nb->stat = WAITING ;
@@ -212,35 +174,35 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
             return !ERR_OK ;
         }
         
-        CyaSSL_SetIO_LwIP(https_nb->ssl, https_nb->pcb);
-        CyaSSL_SetVersion(https_nb->ssl, CYASSL_TLSV1_2) ;
-        https_nb->stat = SSL_CONN ;      
+        CyaSSL_SetIO_LwIP(https_nb->ssl, https_nb->pcb, 
+                          DataReceiveCallback, NULL, (void *)&https_nb->stat);
+
+        https_nb->stat = SSL_CONN ;
         
     case SSL_CONN: /* handshaking */
-
         if(LwIP_cb_mutex) return ERR_OK ;
         ret = CyaSSL_connect(https_nb->ssl); 
-        DBG_PRINTF("LwIPtest: SSL Connecting(CyaSSL_connect), ret = %d\n", ret) ;
+        DBG_PRINTF("CyaSSL_connect, ret = %d\n", ret) ;
         if(ret == SSL_SUCCESS) {
-            https_nb->stat = SSL_CONN_WAITING ;
-            DBG_PRINTF("LwIPtest: SSL Connected\n") ;
+            DBG_PRINTF("SSL Connected\n") ;
             https_nb->stat = HTTP_SEND ;
         } else {
             ret = CyaSSL_get_error(https_nb->ssl, NULL) ;
             if(ret == SSL_ERROR_WANT_READ) {
-                https_nb->ssl->lwipCtx.wait = -1 ;
-                https_nb->stat = SSL_CONN_WAITING ;
+                 https_nb->ssl->lwipCtx.wait = -1 ;
+                 https_nb->stat = SSL_CONN_WAITING ;
                 return ERR_OK ;
             } else {
                 ERR_PRINTF("CyaSSL_connecting_NB:ssl=%x, ret=%d\n", https_nb->ssl, ret) ;   
                 return !ERR_OK ;
             }
         }
-        return ERR_OK ;
-        
+        return ERR_OK ; 
+         
     case SSL_CONN_WAITING:
-        if(https_nb->ssl->lwipCtx.wait-- == 0) { /* counting down after the callback 
-               for multiple callbacks */
+
+        if(https_nb->ssl->lwipCtx.wait-- == 0) { 
+            /* counting down after the callback for multiple callbacks */
             https_nb->stat = SSL_CONN ;
             LwIP_cb_mutex = 0 ; 
         }
@@ -253,23 +215,18 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         int size ;
         if(LwIP_cb_mutex)return ERR_OK ;
         else LwIP_cb_mutex = 1 ; /* lock */
-        printf("LwIPtest: SSL CONNECTED(%x)\n", https_nb) ;
-        CyaSSL_NB_setCallbackArg(https_nb->ssl, &(https_nb->stat)) ;
-        tcp_sent(https_nb->pcb, DataSentCallback); 
-        tcp_recv(https_nb->pcb, DataReceiveCallback); 
-
-        DBG_PRINTF("LwIPtest: HTTPS GET(%x)\n", https_nb) ;
+        printf("SSL CONNECTED(%x)\n", https_nb) ;
         sprintf(sendBuff,
                 "GET %s HTTP/1.0\r\nHost: %s\r\nConnection: close\r\n\r\n", 
                 https_nb->path, https_nb->hostname) ;
         size = strlen((char const *)sendBuff) ;
-        
+
         CyaSSL_write(https_nb->ssl, sendBuff, size) ;
 
         https_nb->stat = WAITING ;
         return ERR_OK;
     }
-      
+
     case HTTP_RECEIVE: 
     {
         #define HTTP_BUFF_SIZE 2048
@@ -278,9 +235,9 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         LwIP_cb_mutex = 0 ;
         memset(httpbuff, '\0', HTTP_BUFF_SIZE) ;
         ret = CyaSSL_read(https_nb->ssl, httpbuff, HTTP_BUFF_SIZE) ;
-        printf("LwIPtest: HTTPS GET(%x), Received(%d)\n",https_nb, strlen(httpbuff)) ;
-        /* puts(httpbuff) ;*/ 
-        puts("===================\n") ; 
+        printf("HTTPS GET(%x), Received(%d)\n",https_nb, strlen(httpbuff)) ;
+        /* puts(httpbuff) ; */ 
+        /* puts("===================\n") ; */
     }
     case SSL_CLOSE:  
     {
@@ -332,12 +289,12 @@ void *CyaSSL_HTTPS_ClientP_5 = (void *)&CyaSSL_HTTPS_Client_5 ;
 
 #define HTTPS_PORT   443
 #define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
-static struct ip_addr server_em = { IP_ADDR(xxx,xxx,xxx,xxx) } ;
+static struct ip_addr server_em = { IP_ADDR(192,168,11,9) } ; 
 
 void HTTPSClient_main_init() {
 
   CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_1, 
-                           server_em, HTTPS_PORT, "xxx.com", "/") ;
+                              server_em, HTTPS_PORT, "xxx.com", "/") ;
   CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_2, 
                               server_em, HTTPS_PORT, "xxx.com", "/") ;
   CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_3, 
diff --git a/cyassl/internal.h b/cyassl/internal.h
index 9c903814a..0c49948a4 100644
--- a/cyassl/internal.h
+++ b/cyassl/internal.h
@@ -964,9 +964,9 @@ int  SetCipherList(Suites*, const char* list);
 #ifdef HAVE_LWIP_NATIVE
     CYASSL_LOCAL int CyaSSL_LwIP_Send(CYASSL* ssl, char *buf, int sz, void *cb);
     CYASSL_LOCAL int CyaSSL_LwIP_Receive(CYASSL* ssl, char *buf, int sz, void *cb);
-    CYASSL_LOCAL void CyaSSL_NB_setCallbackArg(CYASSL *ssl, void *arg) ;
-    CYASSL_LOCAL void CyaSSL_PbufFree(void *p);
-#endif /* HAVE_{tcp stack} */
+    CYASSL_API int CyaSSL_SetIO_LwIP(CYASSL* ssl, void *pcb, 
+                                tcp_recv_fn recv, tcp_sent_fn sent, void *arg);
+#endif /* HAVE_LWIP_NATIVE */
 
 /* CyaSSL Cipher type just points back to SSL */
 struct CYASSL_CIPHER {
@@ -1806,6 +1806,8 @@ typedef struct DtlsMsg {
     /* LwIP native tpc socket context */
     typedef struct LwIP_native_Ctx {
         struct tcp_pcb * pcb ;
+        tcp_recv_fn recv ;
+        tcp_sent_fn sent ;
         int    pulled  ; 
         struct pbuf *pbuf ;
         int    wait ;
diff --git a/cyassl/ssl.h b/cyassl/ssl.h
index b791c2a49..328ea9444 100644
--- a/cyassl/ssl.h
+++ b/cyassl/ssl.h
@@ -940,7 +940,7 @@ CYASSL_API void CyaSSL_SetIOWriteFlags(CYASSL* ssl, int flags);
                                       ULONG waitoption);
 #endif
 #ifdef HAVE_LWIP_NATIVE
-    CYASSL_API int CyaSSL_SetIO_LwIP(CYASSL* ssl, void *pcb);
+    #include "lwip/tcp.h"
 #endif
 typedef int (*CallbackGenCookie)(CYASSL* ssl, unsigned char* buf, int sz,
                                  void* ctx);
diff --git a/src/io.c b/src/io.c
index e28d0fd39..5c180a3d6 100644
--- a/src/io.c
+++ b/src/io.c
@@ -1070,7 +1070,7 @@ void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxSocket, ULONG waitOption)
 #define DBG_PRINTF_CB(x, ...)
 #endif
 
-void CyaSSL_PbufFree(void *vp)
+static void CyaSSL_PbufFree(void *vp)
 {
     struct pbuf *p ;
     struct pbuf * next;
@@ -1134,18 +1134,18 @@ static int CyaSSL_GetDataFromPbuf(char *buff, CYASSL *ssl, int size)
     return totalLen;
 }
 
-err_t CyaSSL_connectCallback(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t err)
+err_t CyaSSL_LwIP_recv_cb(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t err)
 {
     struct pbuf *next ;
     CYASSL *ssl ;
     ssl = (CYASSL *)cb ;
     
     if((cb == NULL)||(pcb == NULL))
-        ERR_PRINTF("CyaSSL_connectCallBack, cb=%x, pcb=%d\n", cb, pcb) ;
+        ERR_PRINTF("CyaSSL_LwIP_recv_cb, cb=%x, pcb=%d\n", cb, pcb) ;
     if(p && (err == 0)) {
-        DBG_PRINTF_CB("CyaSSL_connectCallBack, pbuf=%x, err=%d, tot_len=%d\n", p, err, p->tot_len) ;
+        DBG_PRINTF_CB("CyaSSL_LwIP_recv_cb, pbuf=%x, err=%d, tot_len=%d\n", p, err, p->tot_len) ;
     }else {
-        ERR_PRINTF("CyaSSL_connectCallBack, pbuf=%x, err=%d\n", p, err) ;
+        ERR_PRINTF("CyaSSL_LwIP_recv_cb, pbuf=%x, err=%d\n", p, err) ;
         return ERR_OK; /* don't go to SSL_CONN */
     }
 
@@ -1162,14 +1162,23 @@ err_t CyaSSL_connectCallback(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t
         ssl->lwipCtx.pbuf = p ;
     }
     ssl->lwipCtx.pulled = 0 ;
-    if(ssl->lwipCtx.wait < 0)
-        ssl->lwipCtx.wait = 10000 ;
-    return ERR_OK; 
+
+    if(((ssl->options.connectState != CONNECT_BEGIN) &&
+        (ssl->options.connectState != SECOND_REPLY_DONE))||
+       ((ssl->options.acceptState  != ACCEPT_BEGIN) && 
+        (ssl->options.connectState != ACCEPT_THIRD_REPLY_DONE)))
+    {
+       if(ssl->lwipCtx.wait < 0) /* wait for multiple callbacks */
+           ssl->lwipCtx.wait = 10000 ;
+    } else if(ssl->lwipCtx.recv)
+        return ssl->lwipCtx.recv(ssl->lwipCtx.arg, pcb, p, err) ; 
+                                                      /* user callback */
+    return ERR_OK;
 }
 
-err_t DataSentCallback (void *arg, struct tcp_pcb *pcb, u16_t err)
+err_t  CyaSSL_LwIP_sent_cb(void *arg, struct tcp_pcb *pcb, u16_t err)
 {
-    DBG_PRINTF_CB("LwIPtest: Data Sent(SentCallBack1), err=%d\n", err) ;
+    DBG_PRINTF_CB("CaSSL_LwIP_write_cb, err=%d\n", err) ;
     return ERR_OK;
 }
 
@@ -1205,17 +1214,17 @@ int CyaSSL_LwIP_Send(CYASSL* ssl, char *buf, int sz, void *cb)
     }
 }
 
-void CyaSSL_NB_setCallbackArg(CYASSL *ssl, void *arg)
-{
-    ssl->lwipCtx.arg = arg ; 
-}
-
-int CyaSSL_SetIO_LwIP(CYASSL* ssl, void* pcb)
+int CyaSSL_SetIO_LwIP(CYASSL* ssl, void* pcb, 
+                              tcp_recv_fn recv, tcp_sent_fn sent, void *arg)
 {
     if (ssl && pcb) {
         ssl->lwipCtx.pcb = (struct tcp_pcb *)pcb ;
-        tcp_recv(pcb, CyaSSL_connectCallback);
-        tcp_sent(pcb, DataSentCallback); 
+        ssl->lwipCtx.recv = recv ; /*  recv user callback */
+        ssl->lwipCtx.sent = sent ; /*  sent user callback */
+        ssl->lwipCtx.arg  = arg  ;
+        /* CyaSSL_LwIP_recv/sent_cb invokes recv/sent user callback in them. */
+        tcp_recv(pcb, CyaSSL_LwIP_recv_cb) ;
+        tcp_sent(pcb, CyaSSL_LwIP_sent_cb) ;    
         tcp_arg (pcb, (void *)ssl) ;
     } else return BAD_FUNC_ARG ;
     return ERR_OK ;

From 1234ec614289058562262edd4c2d2d4f482c09d9 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 4 Feb 2014 16:49:21 +0900
Subject: [PATCH 24/43] LwIP, native tcp socket, v2.1

---
 IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
index 84a2d0868..ad83bd6b2 100644
--- a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
+++ b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
@@ -289,7 +289,7 @@ void *CyaSSL_HTTPS_ClientP_5 = (void *)&CyaSSL_HTTPS_Client_5 ;
 
 #define HTTPS_PORT   443
 #define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
-static struct ip_addr server_em = { IP_ADDR(192,168,11,9) } ; 
+static struct ip_addr server_em = { IP_ADDR(xxx,xxx,xxx,xxx) } ; 
 
 void HTTPSClient_main_init() {
 

From 99216c02269b8f9750d58a7c66a763a84759621e Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 4 Feb 2014 23:14:43 +0900
Subject: [PATCH 25/43] LwIP, native tcp socket, user sent callback

---
 src/io.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/io.c b/src/io.c
index 5c180a3d6..87dd71a69 100644
--- a/src/io.c
+++ b/src/io.c
@@ -1176,9 +1176,14 @@ err_t CyaSSL_LwIP_recv_cb(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t er
     return ERR_OK;
 }
 
-err_t  CyaSSL_LwIP_sent_cb(void *arg, struct tcp_pcb *pcb, u16_t err)
+err_t  CyaSSL_LwIP_sent_cb(void *cb, struct tcp_pcb *pcb, u16_t err)
 {
+    CYASSL *ssl ;
+    ssl = (CYASSL *)cb ;
     DBG_PRINTF_CB("CaSSL_LwIP_write_cb, err=%d\n", err) ;
+    if(ssl->lwipCtx.sent)
+        return ssl->lwipCtx.sent(ssl->lwipCtx.arg, pcb, err) ; 
+                                                      /* user callback */
     return ERR_OK;
 }
 

From 78b897a07c5c315222837bf438b80e09179ad168 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 4 Feb 2014 23:15:34 +0900
Subject: [PATCH 26/43] LwIP, native tcp socket, user sent callback

---
 src/io.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/io.c b/src/io.c
index 5c180a3d6..87dd71a69 100644
--- a/src/io.c
+++ b/src/io.c
@@ -1176,9 +1176,14 @@ err_t CyaSSL_LwIP_recv_cb(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t er
     return ERR_OK;
 }
 
-err_t  CyaSSL_LwIP_sent_cb(void *arg, struct tcp_pcb *pcb, u16_t err)
+err_t  CyaSSL_LwIP_sent_cb(void *cb, struct tcp_pcb *pcb, u16_t err)
 {
+    CYASSL *ssl ;
+    ssl = (CYASSL *)cb ;
     DBG_PRINTF_CB("CaSSL_LwIP_write_cb, err=%d\n", err) ;
+    if(ssl->lwipCtx.sent)
+        return ssl->lwipCtx.sent(ssl->lwipCtx.arg, pcb, err) ; 
+                                                      /* user callback */
     return ERR_OK;
 }
 

From 2e69313eb303720bd1bd2adda565d30029352ff2 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Mon, 17 Feb 2014 17:40:42 +0900
Subject: [PATCH 27/43] Multiple callbacks, fixed initialize ssl->lwipCtx, io.c

---
 IDE/IAR-EWARM/CyaSSL/https-nb.c | 63 +++++++++++++++++++++++----------
 src/io.c                        | 22 ++++++++++--
 2 files changed, 64 insertions(+), 21 deletions(-)

diff --git a/IDE/IAR-EWARM/CyaSSL/https-nb.c b/IDE/IAR-EWARM/CyaSSL/https-nb.c
index 84a2d0868..0bb15f6e5 100644
--- a/IDE/IAR-EWARM/CyaSSL/https-nb.c
+++ b/IDE/IAR-EWARM/CyaSSL/https-nb.c
@@ -41,6 +41,15 @@
 #include 
 #include "https-nb.h"
 
+#if 0
+/*Enable debug*/
+#include 
+#define DBG0_PRINTF(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
+#else
+/*Disable debug*/
+#define DBG0_PRINTF(x, ...)
+#endif
+
 #if 0
 /*Enable debug*/
 #include 
@@ -89,7 +98,7 @@ void CyaSSL_HTTPS_Client_NB_init(void *nb,
     https_nb->path = path ;
     https_nb->stat = BEGIN ;
 }
-
+  
 int CyaSSL_HTTPS_Client_NB(void *nb)
 {
     int ret ;
@@ -101,7 +110,7 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
 
     switch(https_nb->stat) {
     case BEGIN:
-        printf("======= LwIP: HTTPS Client Test(%x): %d ====\n", nb, count ++) ;
+        printf("== HTTPS Client(%x): %d ==\n", nb, count ++) ;
         /*** Assuming LwIP has been initialized ***/
         https_nb->stat = INITIALIZED ; 
     case INITIALIZED:
@@ -134,8 +143,8 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
     case TCP_CONNECT:
         if(LwIP_cb_mutex)return ERR_OK ;
         else LwIP_cb_mutex = 1 ;
-        DBG_PRINTF("LwIPtest: TCP_CONNECT(%x)\n", https_nb) ;
-        DBG_PRINTF("LwIPtest: Server IP Addrress(%d.%d.%d.%d)\n", 
+        DBG_PRINTF("TCP_CONNECT(%x)\n", https_nb) ;
+        DBG_PRINTF("Server IP Addrress(%d.%d.%d.%d)\n", 
               (*(unsigned long *)&https_nb->serverIP_em&0xff),
               (*(unsigned long *)&https_nb->serverIP_em>>8)&0xff, 
               (*(unsigned long *)&https_nb->serverIP_em>>16)&0xff, 
@@ -144,6 +153,7 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
                           https_nb->serverPort, TcpConnectedCallback); 
  
         if(ret == ERR_OK) {
+             https_nb->wait_cnt = 0 ;
     	     https_nb->stat = WAITING ;
              return ERR_OK;
         } else {
@@ -153,7 +163,7 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         }
         
     case TCP_CONNECTED:
-        printf("LwIPtest: TCP CONNECTED(%x)\n", https_nb) ;
+        DBG0_PRINTF("TCP CONNECTED(%x)\n", https_nb) ;
         LwIP_cb_mutex = 0 ; 
 
         /*CyaSSLv3_client_method()
@@ -189,7 +199,7 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         } else {
             ret = CyaSSL_get_error(https_nb->ssl, NULL) ;
             if(ret == SSL_ERROR_WANT_READ) {
-                 https_nb->ssl->lwipCtx.wait = -1 ;
+                 https_nb->ssl->lwipCtx.wait = 1000000 ;
                  https_nb->stat = SSL_CONN_WAITING ;
                 return ERR_OK ;
             } else {
@@ -201,7 +211,7 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
          
     case SSL_CONN_WAITING:
 
-        if(https_nb->ssl->lwipCtx.wait-- == 0) { 
+        if(https_nb->ssl->lwipCtx.wait-- <= 0) { 
             /* counting down after the callback for multiple callbacks */
             https_nb->stat = SSL_CONN ;
             LwIP_cb_mutex = 0 ; 
@@ -215,7 +225,7 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         int size ;
         if(LwIP_cb_mutex)return ERR_OK ;
         else LwIP_cb_mutex = 1 ; /* lock */
-        printf("SSL CONNECTED(%x)\n", https_nb) ;
+        DBG0_PRINTF("SSL CONNECTED(%x)\n", https_nb) ;
         sprintf(sendBuff,
                 "GET %s HTTP/1.0\r\nHost: %s\r\nConnection: close\r\n\r\n", 
                 https_nb->path, https_nb->hostname) ;
@@ -223,6 +233,7 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
 
         CyaSSL_write(https_nb->ssl, sendBuff, size) ;
 
+        https_nb->wait_cnt = 0 ;
         https_nb->stat = WAITING ;
         return ERR_OK;
     }
@@ -235,9 +246,8 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         LwIP_cb_mutex = 0 ;
         memset(httpbuff, '\0', HTTP_BUFF_SIZE) ;
         ret = CyaSSL_read(https_nb->ssl, httpbuff, HTTP_BUFF_SIZE) ;
-        printf("HTTPS GET(%x), Received(%d)\n",https_nb, strlen(httpbuff)) ;
-        /* puts(httpbuff) ; */ 
-        /* puts("===================\n") ; */
+        DBG0_PRINTF("HTTPS GET(%x), Received(%d)\n",https_nb, strlen(httpbuff)) ;
+        /*DBG0_PRINTF*/puts(httpbuff) ;  
     }
     case SSL_CLOSE:  
     {
@@ -260,7 +270,20 @@ int CyaSSL_HTTPS_Client_NB(void *nb)
         https_nb->idle ++ ;
         if(https_nb->idle > 50000)
             https_nb->stat = BEGIN ;
+        return ERR_OK;
     case WAITING:
+        if(https_nb->wait_cnt++ > 1000000) {
+            LwIP_cb_mutex = 0 ;
+            https_nb->wait_cnt = 0 ;
+            if((https_nb->stat >= SSL_CONN)&&(https_nb->stat < SSL_CLOSE)) {
+                ERR_PRINTF("Wait Time out, go to CyaSSL close") ;
+                https_nb->stat = SSL_CLOSE ;
+            } else {
+               ERR_PRINTF("Wait Time out, go to Begin") ;
+                https_nb->stat = TCP_CLOSE ;
+            }
+        } 
+        return ERR_OK ;
     default:
         return ERR_OK;
     }
@@ -289,20 +312,23 @@ void *CyaSSL_HTTPS_ClientP_5 = (void *)&CyaSSL_HTTPS_Client_5 ;
 
 #define HTTPS_PORT   443
 #define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
-static struct ip_addr server_em = { IP_ADDR(192,168,11,9) } ; 
+static struct ip_addr server0_em = { IP_ADDR(192,168,11,9) } ; 
+static struct ip_addr server1_em = { IP_ADDR(31,13,68,33)} ; 
 
 void HTTPSClient_main_init() {
 
   CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_1, 
-                              server_em, HTTPS_PORT, "xxx.com", "/") ;
+                             //server_em, HTTPS_PORT, "xxx.com", "/") ;
+                             server1_em, HTTPS_PORT, "graph.facebook.com", "/takashikojo") ;
   CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_2, 
-                              server_em, HTTPS_PORT, "xxx.com", "/") ;
+                              server0_em, HTTPS_PORT, "xxx.com", "/") ;
   CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_3, 
-                              server_em, HTTPS_PORT, "xxx.com", "/") ;
+                              server1_em, HTTPS_PORT, "graph.facebook.com", "/takashikojo") ;
+                              //server_em, HTTPS_PORT, "xxx.com", "/") ;
   CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_4, 
-                              server_em, HTTPS_PORT, "xxx.com", "/") ;
+                              server0_em, HTTPS_PORT, "xxx.com", "/") ;
   CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_5, 
-                              server_em, HTTPS_PORT, "xxx.com", "/") ;  
+                              server0_em, HTTPS_PORT, "xxx.com", "/") ;  
 }
  
 void HTTPSClient_main(int i)
@@ -314,7 +340,7 @@ void HTTPSClient_main(int i)
     if((i % 2) == 0) { /* wait for initializing TCP/IP, DHCP */
         CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_2) ;
     }
-
+#if 0
     if((i % 3) == 0) { /* wait for initializing TCP/IP, DHCP */
         CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_3) ;
     }
@@ -327,6 +353,7 @@ void HTTPSClient_main(int i)
         CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_5) ;
     }
 
+#endif
 }
 
 #endif /* NO_MAIN_DRIVER  */
diff --git a/src/io.c b/src/io.c
index 87dd71a69..1d90de774 100644
--- a/src/io.c
+++ b/src/io.c
@@ -1070,6 +1070,10 @@ void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxSocket, ULONG waitOption)
 #define DBG_PRINTF_CB(x, ...)
 #endif
 
+#ifdef CYASSL_IAR_ARM
+    #include  "intrinsics.h" 
+#endif
+
 static void CyaSSL_PbufFree(void *vp)
 {
     struct pbuf *p ;
@@ -1078,7 +1082,7 @@ static void CyaSSL_PbufFree(void *vp)
     while(p->next != NULL)
     {
         next = p->next;
-        pbuf_free(p);   
+        pbuf_free(p);  
         p = next;
     }    
     pbuf_free(p);
@@ -1092,6 +1096,16 @@ static int CyaSSL_GetDataFromPbuf(char *buff, CYASSL *ssl, int size)
     int skipLen = 0 ;
 
     p = ssl->lwipCtx.pbuf ;
+    #if defined(DEBUG_PBUF)
+    printf("WantRead Size=%d\n", size) ;
+    do {
+        printf("p=%x, p->len=%d, p->tot_len=%d\n", p, p->len,  p->tot_len) ;
+        if(p != p->next)
+            p = p->next ;
+        else break ;
+    } while(p) ;
+    p = ssl->lwipCtx.pbuf ;    
+    #endif
     if(p->tot_len < (ssl->lwipCtx.pulled + size))
         return 0 ;
     
@@ -1168,8 +1182,7 @@ err_t CyaSSL_LwIP_recv_cb(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t er
        ((ssl->options.acceptState  != ACCEPT_BEGIN) && 
         (ssl->options.connectState != ACCEPT_THIRD_REPLY_DONE)))
     {
-       if(ssl->lwipCtx.wait < 0) /* wait for multiple callbacks */
-           ssl->lwipCtx.wait = 10000 ;
+        ssl->lwipCtx.wait = 100000 ;
     } else if(ssl->lwipCtx.recv)
         return ssl->lwipCtx.recv(ssl->lwipCtx.arg, pcb, p, err) ; 
                                                       /* user callback */
@@ -1227,6 +1240,9 @@ int CyaSSL_SetIO_LwIP(CYASSL* ssl, void* pcb,
         ssl->lwipCtx.recv = recv ; /*  recv user callback */
         ssl->lwipCtx.sent = sent ; /*  sent user callback */
         ssl->lwipCtx.arg  = arg  ;
+        ssl->lwipCtx.pbuf = 0 ;
+        ssl->lwipCtx.pulled = 0 ;
+        ssl->lwipCtx.wait = 0 ;
         /* CyaSSL_LwIP_recv/sent_cb invokes recv/sent user callback in them. */
         tcp_recv(pcb, CyaSSL_LwIP_recv_cb) ;
         tcp_sent(pcb, CyaSSL_LwIP_sent_cb) ;    

From cca013b6d92c502a6a167aca33cc0904fc55bda9 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Thu, 20 Feb 2014 13:36:42 +0900
Subject: [PATCH 28/43] client.c  for LwIP native socket

---
 IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c       |  167 ++
 IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.h       |  202 +++
 IDE/IAR-EWARM/Projects/client/client.ewp | 1886 ++++++++++++++++++++++
 IDE/IAR-EWARM/Projects/client/client.eww |   10 +
 examples/client/client.c                 |   56 +-
 examples/client/client.h                 |   31 +
 6 files changed, 2340 insertions(+), 12 deletions(-)
 create mode 100644 IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c
 create mode 100644 IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.h
 create mode 100644 IDE/IAR-EWARM/Projects/client/client.ewp
 create mode 100644 IDE/IAR-EWARM/Projects/client/client.eww

diff --git a/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c b/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c
new file mode 100644
index 000000000..ad60b6689
--- /dev/null
+++ b/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c
@@ -0,0 +1,167 @@
+/* tcp-conn-nb.c
+ *
+ * Copyright (C) 2006-2014 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+
+/*** Simulating tcp_connect by LwIP Native TCP ***/
+
+
+#if defined(HAVE_LWIP_NATIVE)
+#include 
+#include 
+#include "lwip/tcp.h"
+#include "lwip/sockets.h"
+#include "lwip/inet.h"
+#include "lwip/ip_addr.h"
+
+#include "cyassl/ssl.h"
+#include "tcp-conn-nb.h" 
+
+int   myoptind;
+char* myoptarg;
+
+
+static struct tcp_cb {
+    enum TCP_stat stat ;
+    struct tcp_pcb *pcb ;
+    unsigned long localPort;
+    ip_addr_t localIP_em ;
+    unsigned long serverPort ;
+    ip_addr_t serverIP_em ;    
+} tcp ;
+
+#define LOCAL_PORT 11111
+
+#if 0
+/*Enable debug*/
+#include 
+#define DBG_PRINTF(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
+#define ERR_PRINTF(x, ...) printf("[HTTPSClient:ERROR]"x"\r\n", ##__VA_ARGS__);
+#else
+/*Disable debug*/
+#define DBG_PRINTF(x, ...)
+#define ERR_PRINTF(x, ...)
+#endif
+
+
+static err_t TcpConnectedCallback (void *arg, struct tcp_pcb *pcb, s8_t err)
+{
+    DBG_PRINTF("TcpConnectedCallback(arg=%x, pcb=%x, err=%x)\n", arg, pcb, err) ;
+    //if(*(int *)arg  == TCP_WAITING)
+        *(int *)arg = TCP_CONNECTED ;
+    return ERR_OK;
+}
+
+/** strictly IPV4 ***/
+#define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
+ip_addr_t ip_addr_s2i(const char *ip_s) {
+    unsigned int ip[4] ;
+    ip_addr_t ip_addr ;
+    
+    sscanf(ip_s, "%d.%d.%d.%d", 
+                 &(ip[0]), &(ip[1]), &(ip[2]), &(ip[3])) ;
+    ip_addr.addr = IP_ADDR(ip[0], ip[1], ip[2], ip[3]) ;
+    return ip_addr ;
+}
+
+/** Placeholders for now **/
+void tcp_socket(SOCKET_T *s, int flag) { }
+void build_addr(int *addr, char *host, int port, int mode) { }
+void tcp_CloseSocket_nb(SOCKET_T *sockfd) { }
+void tcp_select(SOCKET_T *s, int flag) { }
+unsigned long current_time(void) { return 0 ; }
+
+int tcp_connect_nb(struct tcp_pcb **pcb, const char* ip, word16 port,
+                               int udp)
+{
+    int ret ;
+    
+    switch(tcp.stat) {
+    case TCP_BEGIN:
+        tcp.pcb = tcp_new();
+        if(tcp.pcb) {
+    	        tcp_arg(tcp.pcb, (void *)&(tcp.stat)) ;    
+                DBG_PRINTF("New PCB(tcp_new=%x), &https->stat=%x\n",
+                                           tcp.pcb, &tcp.stat) ;
+        } else {
+    	    ERR_PRINTF("tcp_new, ret=%d\n", tcp.pcb) ;
+            tcp.stat = TCP_IDLE ;
+    	    return TCP_ERROR ;
+        }
+        
+        *pcb = tcp.pcb ;
+        tcp_arg(tcp.pcb, (void *)&tcp.stat) ;
+
+        tcp.localPort = LOCAL_PORT ;
+        DBG_PRINTF("local Port=%d\n", tcp.localPort) ;
+        ret = tcp_bind (tcp.pcb, &(tcp.localIP_em),
+                        tcp.localPort) ;
+        if(ret == ERR_OK) {
+            tcp.stat = TCP_CONNECTING ;
+            return TCP_CONNECTING ;
+        } else {
+    	    ERR_PRINTF("tcp_bind, ret=%d\n", ret) ;
+            tcp.stat = TCP_CLOSE ;
+            return TCP_CONNECTING ;
+        }
+
+    case TCP_CONNECTING:
+        tcp.serverPort  = port ;
+        tcp.serverIP_em = ip_addr_s2i(ip) ;
+        DBG_PRINTF("TCP_CONNECT(%x)\n", tcp.pcb) ;
+        
+        ret = tcp_connect(tcp.pcb, &(tcp.serverIP_em),
+                          tcp.serverPort, TcpConnectedCallback); 
+        if(ret == ERR_OK) {
+    	     tcp.stat = TCP_WAITING ;
+             return TCP_CONNECTING ;
+        } else {
+    	    ERR_PRINTF("tcp_connect, ret=%d\n", ret) ;
+            tcp.stat = TCP_CLOSE ;
+    	    return TCP_ERROR ;
+        }
+
+    case TCP_WAITING:
+        return TCP_CONNECTING ;
+        
+    case TCP_CONNECTED:
+        *pcb = tcp.pcb ;
+        return TCP_CONNECTED ;
+        
+    case TCP_CLOSE:
+        tcp_close(tcp.pcb) ;
+        tcp.stat = TCP_IDLE ;
+        return TCP_CONNECTING ;
+    
+    case TCP_IDLE:
+    default:
+        return TCP_CONNECTING ;
+    }
+}
+
+
+#endif
+
+    
\ No newline at end of file
diff --git a/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.h b/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.h
new file mode 100644
index 000000000..0f8d6d0a9
--- /dev/null
+++ b/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.h
@@ -0,0 +1,202 @@
+/* tcp-conn-nb.h
+ *
+ * Copyright (C) 2006-2014 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifndef TCP_CONN_NB_H
+#define TCP_CONN_NB_H
+
+/* Options for LwIP native socket client example */
+    #define NO_MAIN_DRIVER
+    #define NO_SESSION_CACHE
+    #define NO_PSK
+    #define NO_BENCHMARK
+    #undef USE_CYASSL_MEMORY
+/******/
+
+    #include 
+    #include 
+    #include "lwip/tcp.h"
+    #include "lwip/sockets.h"
+    #include "lwip/inet.h"
+    #include "lwip/ip_addr.h"
+    
+    #define THREAD_RETURN int
+    #define CYASSL_THREAD
+    #define SOCKET_T struct tcp_pcb *
+    #define SOCKADDR_IN_T int
+    //#define ip_addr_t char * 
+    #define err_sys(msg) puts(msg)
+    #define exit(code) return(code) ;
+
+enum TCP_stat  {
+    TCP_BEGIN, 
+    TCP_CONNECTING, /* return code */
+    TCP_CONNECTED,  /* return code */
+    TCP_WAITING,
+    TCP_CLOSE,
+    TCP_IDLE,
+    TCP_ERROR,
+} ;
+
+
+
+/*** from test.h ***/
+    #define CYASSL_MAX_ERROR_SZ 128
+    #define CLIENT_DEFAULT_VERSION 3
+    #define CLIENT_DTLS_DEFAULT_VERSION (-2)
+    #define CLIENT_INVALID_VERSION (-99)
+    static const char* const yasslIP   = "127.0.0.1";
+    static const word16      yasslPort = 11111;
+    #define caCert     "./certs/ca-cert.pem"
+    #define cliCert    "./certs/client-cert.pem"
+    #define cliKey     "./certs/client-key.pem"
+    #define MY_EX_USAGE 2
+    #define StackTrap(a)
+    #define InitMemoryTracker(a)
+
+    typedef struct func_args {
+        int    argc;
+        char** argv;
+        int    return_code;
+    } func_args;
+    
+    extern int   myoptind;
+    extern char* myoptarg;
+
+    void build_addr(int *addr, char *host, int port, int mode) ;
+    void tcp_socket(SOCKET_T *s, int flag) ;
+        
+enum {
+    TEST_SELECT_FAIL,
+    TEST_TIMEOUT,
+    TEST_RECV_READY,
+    TEST_ERROR_READY
+};
+    
+    static INLINE void tcp_set_nonblocking(SOCKET_T* sockfd){ }
+    
+    
+static INLINE int mygetopt(int argc, char** argv, const char* optstring)
+{
+    static char* next = NULL;
+
+    char  c;
+    char* cp;
+
+    if (myoptind == 0)
+        next = NULL;   /* we're starting new/over */
+
+    if (next == NULL || *next == '\0') {
+        if (myoptind == 0)
+            myoptind++;
+
+        if (myoptind >= argc || argv[myoptind][0] != '-' ||
+                                argv[myoptind][1] == '\0') {
+            myoptarg = NULL;
+            if (myoptind < argc)
+                myoptarg = argv[myoptind];
+
+            return -1;
+        }
+
+        if (strcmp(argv[myoptind], "--") == 0) {
+            myoptind++;
+            myoptarg = NULL;
+
+            if (myoptind < argc)
+                myoptarg = argv[myoptind];
+
+            return -1;
+        }
+
+        next = argv[myoptind];
+        next++;                  /* skip - */
+        myoptind++;
+    }
+
+    c  = *next++;
+    /* The C++ strchr can return a different value */
+    cp = (char*)strchr(optstring, c);
+
+    if (cp == NULL || c == ':') 
+        return '?';
+
+    cp++;
+
+    if (*cp == ':') {
+        if (*next != '\0') {
+            myoptarg = next;
+            next     = NULL;
+        }
+        else if (myoptind < argc) {
+            myoptarg = argv[myoptind];
+            myoptind++;
+        }
+        else 
+            return '?';
+    }
+
+    return c;
+}
+
+static INLINE void showPeer(CYASSL* ssl)
+{
+
+    CYASSL_CIPHER* cipher;
+#ifdef KEEP_PEER_CERT
+    CYASSL_X509* peer = CyaSSL_get_peer_certificate(ssl);
+    if (peer)
+        ShowX509(peer, "peer's cert info:");
+    else
+        printf("peer has no cert!\n");
+#endif
+    printf("SSL version is %s\n", CyaSSL_get_version(ssl));
+
+    cipher = CyaSSL_get_current_cipher(ssl);
+    printf("SSL cipher suite is %s\n", CyaSSL_CIPHER_get_name(cipher));
+
+#if defined(SESSION_CERTS) && defined(SHOW_CERTS)
+    {
+        CYASSL_X509_CHAIN* chain = CyaSSL_get_peer_chain(ssl);
+        int                count = CyaSSL_get_chain_count(chain);
+        int i;
+
+        for (i = 0; i < count; i++) {
+            int length;
+            unsigned char buffer[3072];
+            CYASSL_X509* chainX509;
+
+            CyaSSL_get_chain_cert_pem(chain,i,buffer, sizeof(buffer), &length);
+            buffer[length] = 0;
+            printf("cert %d has length %d data = \n%s\n", i, length, buffer);
+
+            chainX509 = CyaSSL_get_chain_X509(chain, i);
+            if (chainX509)
+                ShowX509(chainX509, "session cert info:");
+            else
+                printf("get_chain_X509 failed\n");
+            CyaSSL_FreeX509(chainX509);
+        }
+    }
+#endif
+  (void)ssl;
+}
+
+#endif
diff --git a/IDE/IAR-EWARM/Projects/client/client.ewp b/IDE/IAR-EWARM/Projects/client/client.ewp
new file mode 100644
index 000000000..6bd4889ce
--- /dev/null
+++ b/IDE/IAR-EWARM/Projects/client/client.ewp
@@ -0,0 +1,1886 @@
+
+
+
+  2
+  
+    Debug
+    
+      ARM
+    
+    1
+    
+      General
+      3
+      
+        22
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      ICCARM
+      2
+      
+        29
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      AARM
+      2
+      
+        9
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      OBJCOPY
+      0
+      
+        1
+        1
+        1
+        
+        
+        
+        
+        
+      
+    
+    
+      CUSTOM
+      3
+      
+        
+        
+      
+    
+    
+      BICOMP
+      0
+      
+    
+    
+      BUILDACTION
+      1
+      
+        
+        
+      
+    
+    
+      ILINK
+      0
+      
+        16
+        1
+        1
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      IARCHIVE
+      0
+      
+        0
+        1
+        1
+        
+        
+        
+      
+    
+    
+      BILINK
+      0
+      
+    
+  
+  
+    Release
+    
+      ARM
+    
+    0
+    
+      General
+      3
+      
+        22
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      ICCARM
+      2
+      
+        29
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      AARM
+      2
+      
+        9
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      OBJCOPY
+      0
+      
+        1
+        1
+        0
+        
+        
+        
+        
+        
+      
+    
+    
+      CUSTOM
+      3
+      
+        
+        
+      
+    
+    
+      BICOMP
+      0
+      
+    
+    
+      BUILDACTION
+      1
+      
+        
+        
+      
+    
+    
+      ILINK
+      0
+      
+        16
+        1
+        0
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
+    
+    
+      IARCHIVE
+      0
+      
+        0
+        1
+        0
+        
+        
+        
+      
+    
+    
+      BILINK
+      0
+      
+    
+  
+  
+    Apps
+    
+      $PROJ_DIR$\..\..\..\..\examples\client\client.c
+    
+    
+      $PROJ_DIR$\..\..\CyaSSL\tcp-conn-nb.c
+    
+  
+
+
+
diff --git a/IDE/IAR-EWARM/Projects/client/client.eww b/IDE/IAR-EWARM/Projects/client/client.eww
new file mode 100644
index 000000000..3d83b971b
--- /dev/null
+++ b/IDE/IAR-EWARM/Projects/client/client.eww
@@ -0,0 +1,10 @@
+
+
+
+  
+    $WS_DIR$\client.ewp
+  
+  
+
+
+
diff --git a/examples/client/client.c b/examples/client/client.c
index ac6f935a8..52763d143 100644
--- a/examples/client/client.c
+++ b/examples/client/client.c
@@ -38,7 +38,12 @@
 #endif
 
 #include 
-#include 
+
+#if defined(HAVE_LWIP_NATIVE)
+    #include "tcp-conn-nb.h"
+#else
+    #include 
+#endif
 
 #include "examples/client/client.h"
 
@@ -49,7 +54,6 @@
     Timeval timeout;
 #endif
 
-
 static void NonBlockingSSL_Connect(CYASSL* ssl)
 {
 #ifndef CYASSL_CALLBACKS
@@ -159,11 +163,10 @@ static void Usage(void)
 
 THREAD_RETURN CYASSL_THREAD client_test(void* args)
 {
-    SOCKET_T sockfd = 0;
-
+    STATIC_NB SOCKET_T sockfd = 0 ;
     CYASSL_METHOD*  method  = 0;
-    CYASSL_CTX*     ctx     = 0;
-    CYASSL*         ssl     = 0;
+    STATIC_NB CYASSL_CTX* ctx = 0;
+    STATIC_NB CYASSL*     ssl = 0;
     
     CYASSL*         sslResume = 0;
     CYASSL_SESSION* session = 0;
@@ -389,7 +392,9 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
     }
 
     myoptind = 0;      /* reset for test cases */
-
+    
+SWITCH_STAT {
+    
     /* sort out DTLS versus TLS versions */
     if (version == CLIENT_INVALID_VERSION) {
         if (doDTLS)
@@ -595,13 +600,15 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
         exit(EXIT_SUCCESS);
     }
     
-    #if defined(CYASSL_MDK_ARM)
+    #if defined(CYASSL_MDK_ARM) || defined(HAVE_LWIP_NATIVE)
     CyaSSL_CTX_set_verify(ctx, SSL_VERIFY_NONE, 0);
     #endif
     
     ssl = CyaSSL_new(ctx);
     if (ssl == NULL)
         err_sys("unable to get SSL object");
+
+CASE(CLIENT_TCP_CONN):
     if (doDTLS) {
         SOCKADDR_IN_T addr;
         build_addr(&addr, host, port, 1);
@@ -609,7 +616,15 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
         tcp_socket(&sockfd, 1);
     }
     else {
-        tcp_connect(&sockfd, host, port, 0);
+        #if !defined(HAVE_LWIP_NATIVE)
+            tcp_connect(&sockfd, host, port, 0);
+        #else
+            int err = tcp_connect(&sockfd, host, port, 0);
+            if(err == TCP_CONNECTED)
+                CyaSSL_SetIO_LwIP(ssl, sockfd, NULL, NULL, NULL);
+            else
+                BREAK ;
+        #endif
     }
     CyaSSL_set_fd(ssl, sockfd);
 #ifdef HAVE_CRL
@@ -631,6 +646,9 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
     if (matchName && doPeerCheck)
         CyaSSL_check_domain_name(ssl, domain);
 #ifndef CYASSL_CALLBACKS
+            
+CASE(CLIENT_SSL_CONN):
+
     if (nonBlocking) {
         CyaSSL_set_using_nonblock(ssl, 1);
         tcp_set_nonblocking(&sockfd);
@@ -639,28 +657,37 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
     else if (CyaSSL_connect(ssl) != SSL_SUCCESS) {
         /* see note at top of README */
         int  err = CyaSSL_get_error(ssl, 0);
+        #if defined(HAVE_LWIP_NATIVE)
+            if(err == SSL_ERROR_WANT_READ)
+                BREAK ;
+        #endif
         char buffer[CYASSL_MAX_ERROR_SZ];
         printf("err = %d, %s\n", err,
                                 CyaSSL_ERR_error_string(err, buffer));
         err_sys("SSL_connect failed");
         /* if you're getting an error here  */
+        BREAK ;
     }
 #else
     timeout.tv_sec  = 2;
     timeout.tv_usec = 0;
     NonBlockingSSL_Connect(ssl);  /* will keep retrying on timeout */
 #endif
+
     showPeer(ssl);
 
     if (sendGET) {
         printf("SSL connect ok, sending GET...\n");
         msgSz = 28;
-        strncpy(msg, "GET /index.html HTTP/1.0\r\n\r\n", msgSz);
+        //strncpy(msg, "GET /index.html HTTP/1.0\r\n\r\n", msgSz);
+        strncpy(msg, "GET / HTTP/1.0\r\n\r\n", msgSz);
         msg[msgSz] = '\0';
     }
     if (CyaSSL_write(ssl, msg, msgSz) != msgSz)
         err_sys("SSL_write failed");
 
+CASE(CLIENT_SSL_READ):
+
     input = CyaSSL_read(ssl, reply, sizeof(reply)-1);
     if (input > 0) {
         reply[input] = 0;
@@ -682,8 +709,9 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
         int readErr = CyaSSL_get_error(ssl, 0);
         if (readErr != SSL_ERROR_WANT_READ)
             err_sys("CyaSSL_read failed");
+        BREAK ;
     }
-
+    
 #ifndef NO_SESSION_CACHE
     if (resumeSession) {
         if (doDTLS) {
@@ -782,6 +810,11 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
 #endif /* USE_CYASSL_MEMORY */
 
     return 0;
+    }
+
+END_SWITCH ; /* End of SWITCH(stat) */
+
+    return 0 ;
 }
 
 
@@ -831,7 +864,6 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
 #endif /* NO_MAIN_DRIVER */
 
 
-
 #ifdef CYASSL_CALLBACKS
 
     int handShakeCB(HandShakeInfo* info)
diff --git a/examples/client/client.h b/examples/client/client.h
index 2d051fb2d..a243b6601 100644
--- a/examples/client/client.h
+++ b/examples/client/client.h
@@ -23,3 +23,34 @@
 
 THREAD_RETURN CYASSL_THREAD client_test(void* args);
 
+#if defined(HAVE_LWIP_NATIVE)
+
+static enum Client_Stat {
+        CLIENT_BEGIN ,
+        CLIENT_TCP_CONN ,
+        CLIENT_SSL_CONN ,
+        CLIENT_SSL_READ ,
+    } client_stat ;
+
+    int tcp_connect_nb(struct tcp_pcb **pcb, const char* ip, word16 port, int udp);
+    void tcp_CloseSocket_nb(struct tcp_pcb *pcb) ;
+    #define tcp_connect(s, h, p, f) tcp_connect_nb(s, h, p, f)
+    #define CloseSocket(s) tcp_CloseSocket_nb(s)
+    #define CyaSSL_set_fd(ssl, s)
+#endif
+
+#if defined(HAVE_LWIP_NATIVE)
+#define SWITCH_STAT        switch(client_stat) { case CLIENT_BEGIN:
+#define CASE(stat)        client_stat = stat ; case stat 
+#define BREAK              break
+#define END_SWITCH         }
+#define STATIC_NB          static
+#else    
+#define SWITCH_STAT
+#define CASE(value)
+#define BREAK
+#define END_SWITHCH
+#define STATIC_NB
+#endif
+
+

From 5d5a8dbabdd61dd6d7eb3e42b7b63155e2fa6e87 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Thu, 20 Feb 2014 15:38:35 +0900
Subject: [PATCH 29/43] client.c for LwIP native socket, v0.2

---
 cyassl/test.h            | 12 ++++++++++--
 examples/client/client.c |  5 ++---
 examples/client/client.h | 28 +++++++++++++++++-----------
 src/io.c                 | 17 ++++++++---------
 4 files changed, 37 insertions(+), 25 deletions(-)

diff --git a/cyassl/test.h b/cyassl/test.h
index c5e2799d0..15c1e526d 100644
--- a/cyassl/test.h
+++ b/cyassl/test.h
@@ -37,7 +37,7 @@
 #else
     #include 
     #include 
-#ifndef CYASSL_LEANPSK
+#if !defined(CYASSL_LEANPSK) && !defined(HAVE_LWIP_NATIVE) 
     #include 
     #include 
     #include 
@@ -59,6 +59,14 @@
     #define SNPRINTF snprintf
 #endif /* USE_WINDOWS_API */
 
+#if defined(HAVE_LWIP_NATIVE)
+    #include 
+    #include "lwip/tcp.h"
+    #include "lwip/sockets.h"
+    #include "lwip/inet.h"
+    #include "lwip/ip_addr.h"
+#endif
+
 #ifdef HAVE_CAVIUM
     #include "cavium_sysdep.h"
     #include "cavium_common.h"
@@ -81,7 +89,7 @@
 
 /* HPUX doesn't use socklent_t for third parameter to accept, unless
    _XOPEN_SOURCE_EXTENDED is defined */
-#if !defined(__hpux__) && !defined(CYASSL_MDK_ARM)
+#if !defined(__hpux__) && !defined(CYASSL_MDK_ARM) && !defined(CYASSL_IAR_ARM)
     typedef socklen_t* ACCEPT_THIRD_T;
 #else
     #if defined _XOPEN_SOURCE_EXTENDED
diff --git a/examples/client/client.c b/examples/client/client.c
index 52763d143..852639313 100644
--- a/examples/client/client.c
+++ b/examples/client/client.c
@@ -658,15 +658,14 @@ CASE(CLIENT_SSL_CONN):
         /* see note at top of README */
         int  err = CyaSSL_get_error(ssl, 0);
         #if defined(HAVE_LWIP_NATIVE)
-            if(err == SSL_ERROR_WANT_READ)
-                BREAK ;
+        if(err == SSL_ERROR_WANT_READ)
+            BREAK ;
         #endif
         char buffer[CYASSL_MAX_ERROR_SZ];
         printf("err = %d, %s\n", err,
                                 CyaSSL_ERR_error_string(err, buffer));
         err_sys("SSL_connect failed");
         /* if you're getting an error here  */
-        BREAK ;
     }
 #else
     timeout.tv_sec  = 2;
diff --git a/examples/client/client.h b/examples/client/client.h
index a243b6601..b4acf4122 100644
--- a/examples/client/client.h
+++ b/examples/client/client.h
@@ -30,27 +30,33 @@ static enum Client_Stat {
         CLIENT_TCP_CONN ,
         CLIENT_SSL_CONN ,
         CLIENT_SSL_READ ,
-    } client_stat ;
+} client_stat ;
+
+int tcp_connect_nb(struct tcp_pcb **pcb, const char* ip, word16 port, int udp);
+void tcp_CloseSocket_nb(struct tcp_pcb *pcb) ;
+#define tcp_connect(s, h, p, f) tcp_connect_nb(s, h, p, f)
+#define CloseSocket(s) tcp_CloseSocket_nb(s)
+#define CyaSSL_set_fd(ssl, s)
 
-    int tcp_connect_nb(struct tcp_pcb **pcb, const char* ip, word16 port, int udp);
-    void tcp_CloseSocket_nb(struct tcp_pcb *pcb) ;
-    #define tcp_connect(s, h, p, f) tcp_connect_nb(s, h, p, f)
-    #define CloseSocket(s) tcp_CloseSocket_nb(s)
-    #define CyaSSL_set_fd(ssl, s)
 #endif
 
+
 #if defined(HAVE_LWIP_NATIVE)
-#define SWITCH_STAT        switch(client_stat) { case CLIENT_BEGIN:
+
+#define SWITCH_STAT       switch(client_stat) { case CLIENT_BEGIN:
 #define CASE(stat)        client_stat = stat ; case stat 
-#define BREAK              break
-#define END_SWITCH         }
-#define STATIC_NB          static
-#else    
+#define BREAK             break
+#define END_SWITCH        }
+#define STATIC_NB         static
+
+#else
+
 #define SWITCH_STAT
 #define CASE(value)
 #define BREAK
 #define END_SWITHCH
 #define STATIC_NB
+
 #endif
 
 
diff --git a/src/io.c b/src/io.c
index 1d90de774..3af0e6339 100644
--- a/src/io.c
+++ b/src/io.c
@@ -1096,6 +1096,7 @@ static int CyaSSL_GetDataFromPbuf(char *buff, CYASSL *ssl, int size)
     int skipLen = 0 ;
 
     p = ssl->lwipCtx.pbuf ;
+
     #if defined(DEBUG_PBUF)
     printf("WantRead Size=%d\n", size) ;
     do {
@@ -1176,14 +1177,8 @@ err_t CyaSSL_LwIP_recv_cb(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t er
         ssl->lwipCtx.pbuf = p ;
     }
     ssl->lwipCtx.pulled = 0 ;
-
-    if(((ssl->options.connectState != CONNECT_BEGIN) &&
-        (ssl->options.connectState != SECOND_REPLY_DONE))||
-       ((ssl->options.acceptState  != ACCEPT_BEGIN) && 
-        (ssl->options.connectState != ACCEPT_THIRD_REPLY_DONE)))
-    {
-        ssl->lwipCtx.wait = 100000 ;
-    } else if(ssl->lwipCtx.recv)
+    ssl->lwipCtx.wait = 10000 ;
+    if(ssl->lwipCtx.recv)
         return ssl->lwipCtx.recv(ssl->lwipCtx.arg, pcb, p, err) ; 
                                                       /* user callback */
     return ERR_OK;
@@ -1206,6 +1201,10 @@ int CyaSSL_LwIP_Receive(CYASSL* ssl, char *buf, int sz, void *cb)
     DBG_PRINTF_CB("CyaSSL_LwIP_Receive: ssl_nb = %x\n", ssl) ;  
 
     if(ssl->lwipCtx.pbuf) {
+        if(ssl->lwipCtx.wait){
+            ssl->lwipCtx.wait-- ;
+            return CYASSL_CBIO_ERR_WANT_READ ;
+        }
         DBG_PRINTF_CB("Received Len=%d, Want Len= %d\n", ssl->lwipCtx.pbuf->tot_len, sz) ;
         ret = CyaSSL_GetDataFromPbuf(buf, ssl, sz) ;
         if(ret == 0)
@@ -1221,7 +1220,7 @@ int CyaSSL_LwIP_Send(CYASSL* ssl, char *buf, int sz, void *cb)
 {
     err_t ret ;
     
-    DBG_PRINTF_CB("CyaSSL_LwIP_Send: ssl = %x\n", ssl) ;
+    DBG_PRINTF_CB("CyaSSL_LwIP_Send: ssl = %x, pcb = %x\n", ssl, ssl->lwipCtx.pcb) ;
     DBG_PRINTF_CB("Send buf[0,1,2,3]=%x,%x,%x,%x, sz=%d\n", buf[0], buf[1], buf[2], buf[3], sz) ;
     ret = tcp_write(ssl->lwipCtx.pcb, buf, sz, TCP_WRITE_FLAG_COPY) ;
     if(ret == ERR_OK)

From 7cd238efd25ffd8875dfaecbe735cca33e0861bc Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Thu, 20 Feb 2014 16:03:12 +0900
Subject: [PATCH 30/43] tcp-conn-nb.c, fixing stat

---
 IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c b/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c
index ad60b6689..10654364e 100644
--- a/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c
+++ b/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c
@@ -69,8 +69,7 @@ static struct tcp_cb {
 static err_t TcpConnectedCallback (void *arg, struct tcp_pcb *pcb, s8_t err)
 {
     DBG_PRINTF("TcpConnectedCallback(arg=%x, pcb=%x, err=%x)\n", arg, pcb, err) ;
-    //if(*(int *)arg  == TCP_WAITING)
-        *(int *)arg = TCP_CONNECTED ;
+    *(int *)arg = TCP_CONNECTED ;
     return ERR_OK;
 }
 

From f5922255b0dc89f6439a5ee2873feb6b60815606 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 4 Mar 2014 22:09:38 +0900
Subject: [PATCH 31/43] Catching up 2.9.0

---
 IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h          |   64 -
 .../CryptBenchmark/RTE/wolfSSL/config-Crypt.h |  185 ---
 .../CryptBenchmark/RTE/wolfSSL/config.h       |   61 -
 .../CryptTest/RTE/wolfSSL/config-Crypt.h      |  185 ---
 .../Projects/CryptTest/RTE/wolfSSL/config.h   |   61 -
 IDE/MDK5-ARM/Projects/CryptTest/test.c        |    6 +-
 .../CyaSSL-Full/CyaSSL-Full.uvguix.kojo       | 1342 ----------------
 .../CyaSSL-Full/CyaSSL-Full_CyaSSL-Full.dep   |   79 -
 .../Object/CyaSSL-Full.build_log.htm          |   12 -
 .../CyaSSL-Full/RTE/wolfSSL/config-Crypt.h    |  185 ---
 .../CyaSSL-Full/RTE/wolfSSL/config-CyaSSL.h   |  144 --
 .../Projects/CyaSSL-Full/RTE/wolfSSL/config.h |   64 -
 IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c    |    3 +-
 IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c    |   10 +-
 IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c      |    6 +-
 .../EchoClient/RTE/wolfSSL/config-Crypt.h     |  185 ---
 .../EchoClient/RTE/wolfSSL/config-CyaSSL.h    |  144 --
 .../Projects/EchoClient/RTE/wolfSSL/config.h  |   61 -
 .../EchoServer/RTE/wolfSSL/config-Crypt.h     |  185 ---
 .../EchoServer/RTE/wolfSSL/config-CyaSSL.h    |  144 --
 .../Projects/EchoServer/RTE/wolfSSL/config.h  |   61 -
 .../SimpleClient/RTE/wolfSSL/config-Crypt.h   |  185 ---
 .../SimpleClient/RTE/wolfSSL/config-CyaSSL.h  |  144 --
 .../SimpleClient/RTE/wolfSSL/config.h         |   61 -
 IDE/MDK5-ARM/Projects/SimpleClient/client.c   |    3 +-
 .../SimpleClient/config-SimpleClient.h        |   70 -
 .../SimpleServer/RTE/wolfSSL/config-Crypt.h   |  185 ---
 .../SimpleServer/RTE/wolfSSL/config-CyaSSL.h  |  144 --
 .../SimpleServer/RTE/wolfSSL/config.h         |   61 -
 IDE/MDK5-ARM/Projects/SimpleServer/server.c   |    2 +-
 Makefile.am                                   |    1 +
 README                                        |   41 +-
 certs/crl/cliCrl.pem                          |   58 +-
 certs/crl/crl.pem                             |   52 +-
 certs/crl/crl.revoked                         |   54 +-
 certs/crl/eccCliCRL.pem                       |   28 +-
 certs/crl/eccSrvCRL.pem                       |   28 +-
 certs/crl/gencrls.sh                          |   10 +-
 configure.ac                                  |  169 ++-
 ctaocrypt/benchmark/benchmark.c               |   53 +-
 ctaocrypt/src/asm.c                           |   12 +-
 ctaocrypt/src/asn.c                           |  971 +++++++++---
 ctaocrypt/src/coding.c                        |  154 +-
 ctaocrypt/src/ecc.c                           |  337 ++++-
 ctaocrypt/src/error.c                         |   20 +
 ctaocrypt/src/fp_sqr_comba_12.i               |    4 +-
 ctaocrypt/src/fp_sqr_comba_17.i               |    3 +
 ctaocrypt/src/fp_sqr_comba_3.i                |    3 +
 ctaocrypt/src/fp_sqr_comba_4.i                |    3 +
 ctaocrypt/src/fp_sqr_comba_6.i                |    3 +
 ctaocrypt/src/fp_sqr_comba_7.i                |    3 +
 ctaocrypt/src/fp_sqr_comba_8.i                |    3 +
 ctaocrypt/src/fp_sqr_comba_9.i                |    3 +
 ctaocrypt/src/integer.c                       |    2 +-
 ctaocrypt/src/md5.c                           |   32 +-
 ctaocrypt/src/pkcs7.c                         | 1348 +++++++++++++++++
 ctaocrypt/src/pwdbased.c                      |   16 +
 ctaocrypt/src/random.c                        |   64 +-
 ctaocrypt/src/sha512.c                        |   26 +-
 ctaocrypt/test/test.c                         |  577 ++++++-
 cyassl-ntru.vcproj                            |   20 +
 cyassl.vcproj                                 |   20 +
 cyassl/ctaocrypt/aes.h                        |    8 +
 cyassl/ctaocrypt/asn.h                        |  104 +-
 cyassl/ctaocrypt/asn_public.h                 |   27 +-
 cyassl/ctaocrypt/coding.h                     |    3 +
 cyassl/ctaocrypt/des3.h                       |   18 +-
 cyassl/ctaocrypt/ecc.h                        |   44 +-
 cyassl/ctaocrypt/error.h                      |    8 +
 cyassl/ctaocrypt/include.am                   |    1 +
 cyassl/ctaocrypt/integer.h                    |    5 +-
 cyassl/ctaocrypt/md5.h                        |   12 +-
 cyassl/ctaocrypt/pkcs7.h                      |  123 ++
 cyassl/ctaocrypt/settings.h                   |   72 +-
 cyassl/ctaocrypt/sha.h                        |   10 +-
 cyassl/ctaocrypt/sha256.h                     |    7 +
 cyassl/ctaocrypt/tfm.h                        |   68 +-
 cyassl/ctaocrypt/types.h                      |   20 +-
 cyassl/include.am                             |    5 +-
 cyassl/internal.h                             |  126 +-
 cyassl/ocsp.h                                 |    8 +-
 cyassl/ssl.h                                  |   88 +-
 cyassl/version.h                              |    4 +-
 examples/client/client.c                      |   22 +-
 examples/echoclient/echoclient.c              |    4 +-
 examples/echoserver/echoserver.c              |    4 +-
 examples/server/server.c                      |   25 +-
 m4/ax_debug.m4                                |    1 -
 m4/ax_tls.m4                                  |   76 +
 .../nbproject/configurations.xml              |   22 -
 mcapi/ctaocrypt_test.X/main.c                 |   51 -
 .../nbproject/Makefile-default.mk             |  164 ++
 .../nbproject/Makefile-genesis.properties     |    8 +
 .../nbproject/Makefile-impl.mk                |   69 +
 .../nbproject/Makefile-local-default.mk       |   37 +
 .../nbproject/Makefile-variables.mk           |   13 +
 .../nbproject/Package-default.bash            |   73 +
 .../nbproject/configurations.xml              |   22 -
 mcapi/ctaocrypt_test.X/nbproject/include.am   |    3 +-
 .../nbproject/private/private.xml             |    6 +
 mcapi/cyassl.X/nbproject/Makefile-default.mk  |  626 ++++++++
 .../nbproject/Makefile-genesis.properties     |    8 +
 mcapi/cyassl.X/nbproject/Makefile-impl.mk     |   69 +
 .../nbproject/Makefile-local-default.mk       |   37 +
 .../cyassl.X/nbproject/Makefile-variables.mk  |   13 +
 mcapi/cyassl.X/nbproject/Package-default.bash |   73 +
 mcapi/cyassl.X/nbproject/include.am           |    1 -
 mcapi/include.am                              |    7 +-
 mcapi/mcapi_test.c                            |    6 +-
 mcapi/zlib.X/nbproject/Makefile-default.mk    |  314 ++++
 .../nbproject/Makefile-genesis.properties     |    8 +
 mcapi/zlib.X/nbproject/Makefile-impl.mk       |   69 +
 .../nbproject/Makefile-local-default.mk       |   37 +
 mcapi/zlib.X/nbproject/Makefile-variables.mk  |   13 +
 mcapi/zlib.X/nbproject/Package-default.bash   |   73 +
 mplabx/PIC32MZ-Putc.c                         |   10 -
 mplabx/benchmark_main.c                       |    7 +
 mplabx/crypto.h                               |   82 +
 .../nbproject/Makefile-default.mk             |  162 ++
 .../nbproject/Makefile-genesis.properties     |    8 +
 .../nbproject/Makefile-impl.mk                |   69 +
 .../nbproject/Makefile-local-default.mk       |   37 +
 .../nbproject/Makefile-variables.mk           |   13 +
 .../nbproject/Package-default.bash            |   73 +
 .../nbproject/configurations.xml              |   28 +-
 .../nbproject/include.am                      |    3 +-
 .../nbproject/private/private.xml             |    3 +
 .../nbproject/Makefile-default.mk             |  162 ++
 .../nbproject/Makefile-genesis.properties     |    8 +
 .../nbproject/Makefile-impl.mk                |   69 +
 .../nbproject/Makefile-local-default.mk       |   37 +
 .../nbproject/Makefile-variables.mk           |   13 +
 .../nbproject/Package-default.bash            |   73 +
 .../nbproject/configurations.xml              |   29 +-
 mplabx/ctaocrypt_test.X/nbproject/include.am  |    3 +-
 .../SuppressibleMessageMemo.properties        |    3 +
 .../nbproject/private/private.xml             |    3 +
 .../dist/default/production/cyassl.X.a        |  Bin 0 -> 236980 bytes
 mplabx/cyassl.X/nbproject/Makefile-default.mk |  590 ++++++++
 .../nbproject/Makefile-genesis.properties     |    8 +
 mplabx/cyassl.X/nbproject/Makefile-impl.mk    |   69 +
 .../nbproject/Makefile-local-default.mk       |   37 +
 .../cyassl.X/nbproject/Makefile-variables.mk  |   13 +
 .../cyassl.X/nbproject/Package-default.bash   |   73 +
 mplabx/cyassl.X/nbproject/configurations.xml  |   29 +-
 mplabx/cyassl.X/nbproject/include.am          |    1 -
 mplabx/cyassl.X/nbproject/private/private.xml |    3 +
 mplabx/cyassl.X/print_mem.c                   |    7 +
 mplabx/include.am                             |   10 +
 .../config-EchoClient.h => mplabx/ssl-dummy.c |   50 +-
 mplabx/test_main.c                            |    6 +
 src/include.am                                |    4 +
 src/internal.c                                |  286 +++-
 src/io.c                                      |  129 +-
 src/ocsp.c                                    |  321 ++--
 src/sniffer.c                                 |    7 +
 src/ssl.c                                     |  749 +++++++--
 src/tls.c                                     |  490 +++++-
 sslSniffer/sslSnifferTest/include.am          |    2 +-
 sslSniffer/sslSnifferTest/snifftest.c         |   24 +-
 tests/api.c                                   |  184 ++-
 tests/suites.c                                |    4 +-
 tests/unit.c                                  |    6 +-
 testsuite/testsuite.c                         |   23 +-
 164 files changed, 9606 insertions(+), 5289 deletions(-)
 delete mode 100644 IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h
 delete mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config-Crypt.h
 delete mode 100644 IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config.h
 delete mode 100644 IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config-Crypt.h
 delete mode 100644 IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config.h
 delete mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvguix.kojo
 delete mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full_CyaSSL-Full.dep
 delete mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/Object/CyaSSL-Full.build_log.htm
 delete mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-Crypt.h
 delete mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-CyaSSL.h
 delete mode 100644 IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config.h
 delete mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-Crypt.h
 delete mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-CyaSSL.h
 delete mode 100644 IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config.h
 delete mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-Crypt.h
 delete mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-CyaSSL.h
 delete mode 100644 IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config.h
 delete mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-Crypt.h
 delete mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-CyaSSL.h
 delete mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config.h
 delete mode 100644 IDE/MDK5-ARM/Projects/SimpleClient/config-SimpleClient.h
 delete mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-Crypt.h
 delete mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-CyaSSL.h
 delete mode 100644 IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config.h
 create mode 100644 ctaocrypt/src/pkcs7.c
 create mode 100644 cyassl/ctaocrypt/pkcs7.h
 create mode 100644 m4/ax_tls.m4
 delete mode 100644 mcapi/ctaocrypt_test.X/main.c
 create mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-default.mk
 create mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
 create mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-impl.mk
 create mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
 create mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-variables.mk
 create mode 100644 mcapi/ctaocrypt_test.X/nbproject/Package-default.bash
 create mode 100644 mcapi/ctaocrypt_test.X/nbproject/private/private.xml
 create mode 100644 mcapi/cyassl.X/nbproject/Makefile-default.mk
 create mode 100644 mcapi/cyassl.X/nbproject/Makefile-genesis.properties
 create mode 100644 mcapi/cyassl.X/nbproject/Makefile-impl.mk
 create mode 100644 mcapi/cyassl.X/nbproject/Makefile-local-default.mk
 create mode 100644 mcapi/cyassl.X/nbproject/Makefile-variables.mk
 create mode 100644 mcapi/cyassl.X/nbproject/Package-default.bash
 create mode 100644 mcapi/zlib.X/nbproject/Makefile-default.mk
 create mode 100644 mcapi/zlib.X/nbproject/Makefile-genesis.properties
 create mode 100644 mcapi/zlib.X/nbproject/Makefile-impl.mk
 create mode 100644 mcapi/zlib.X/nbproject/Makefile-local-default.mk
 create mode 100644 mcapi/zlib.X/nbproject/Makefile-variables.mk
 create mode 100644 mcapi/zlib.X/nbproject/Package-default.bash
 delete mode 100644 mplabx/PIC32MZ-Putc.c
 create mode 100644 mplabx/crypto.h
 create mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-default.mk
 create mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-genesis.properties
 create mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-impl.mk
 create mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-local-default.mk
 create mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-variables.mk
 create mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Package-default.bash
 create mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/private/private.xml
 create mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-default.mk
 create mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
 create mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-impl.mk
 create mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
 create mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-variables.mk
 create mode 100644 mplabx/ctaocrypt_test.X/nbproject/Package-default.bash
 create mode 100644 mplabx/ctaocrypt_test.X/nbproject/private/SuppressibleMessageMemo.properties
 create mode 100644 mplabx/ctaocrypt_test.X/nbproject/private/private.xml
 create mode 100644 mplabx/cyassl.X/dist/default/production/cyassl.X.a
 create mode 100644 mplabx/cyassl.X/nbproject/Makefile-default.mk
 create mode 100644 mplabx/cyassl.X/nbproject/Makefile-genesis.properties
 create mode 100644 mplabx/cyassl.X/nbproject/Makefile-impl.mk
 create mode 100644 mplabx/cyassl.X/nbproject/Makefile-local-default.mk
 create mode 100644 mplabx/cyassl.X/nbproject/Makefile-variables.mk
 create mode 100644 mplabx/cyassl.X/nbproject/Package-default.bash
 create mode 100644 mplabx/cyassl.X/nbproject/private/private.xml
 create mode 100644 mplabx/cyassl.X/print_mem.c
 create mode 100644 mplabx/include.am
 rename IDE/MDK5-ARM/Projects/EchoClient/config-EchoClient.h => mplabx/ssl-dummy.c (54%)

diff --git a/IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h b/IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h
deleted file mode 100644
index 5115b2d1a..000000000
--- a/IDE/MDK5-ARM/MDK-ARM/CyaSSL/config.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/* config.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define CYASSL_MDK5
-#define CYASSL_CMSIS_RTOS
-
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define BENCH_EMBEDDED
-
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
-#define NO_MAIN_DRIVER
-
-#define CYASSL_STM32F2xx
-
-#if  defined(MDK_CONF_CYASSL)
-#define CYASSL_MDK_SHELL
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_Benchmark)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-#elif  defined(MDK_CONF_CryptTest)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-
-#endif
-
-
diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config-Crypt.h b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config-Crypt.h
deleted file mode 100644
index a11c3ef24..000000000
--- a/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config-Crypt.h
+++ /dev/null
@@ -1,185 +0,0 @@
-/* config-FS.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-//  wolfCrypt Configuration
-
-//  Cert/Key Strage
-//        Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes)
-#define MDK_CONF_CERT_BUFF 0
-#if MDK_CONF_CERT_BUFF== 1
-#define USE_CERT_BUFFERS_1024
-#elif MDK_CONF_CERT_BUFF == 2
-#define USE_CERT_BUFFERS_2048
-#endif
-//
-
-//  Crypt Algrithm
-
-//       MD5, SHA, SHA-256, AES, RC4, ASN, RSA
-//        
-
-//      MD2
-#define MDK_CONF_MD2 0
-#if MDK_CONF_MD2 == 1
-#define CYASSL_MD2
-#endif
-//  
-//      MD4
-#define MDK_CONF_MD4 1
-#if MDK_CONF_MD4 == 0
-#define NO_MD4
-#endif
-//  
-//      SHA-384
-//          This has to be with SHA512
-#define MDK_CONF_SHA384 0
-#if MDK_CONF_SHA384 == 1
-#define CYASSL_SHA384
-#endif
-//  
-//      SHA-512          
-#define MDK_CONF_SHA512     0
-#if MDK_CONF_SHA512     == 1
-#define CYASSL_SHA512   
-#endif
-//  
-//      RIPEMD
-#define MDK_CONF_RIPEMD 0
-#if MDK_CONF_RIPEMD == 1
-#define CYASSL_RIPEMD
-#endif
-//  
-//      HMAC
-#define MDK_CONF_HMAC 1
-#if MDK_CONF_HMAC == 0
-#define NO_HMAC
-#endif
-//  
-//      HC128
-#define MDK_CONF_HC128 0
-#if MDK_CONF_HC128 == 1
-#define HAVE_HC128
-#endif
-//  
-//  RABBIT
-#define MDK_CONF_RABBIT 1
-#if MDK_CONF_RABBI == 0
-#define NO_RABBIT
-#endif
-//  
-
-//      AEAD     
-#define MDK_CONF_AEAD 0
-#if MDK_CONF_AEAD == 1
-#define HAVE_AEAD
-#endif
-//  
-//      DES3
-#define MDK_CONF_DES3 1
-#if MDK_CONF_DES3 == 0
-#define NO_DES3
-#endif
-//  
-//      CAMELLIA
-#define MDK_CONF_CAMELLIA 0
-#if MDK_CONF_CAMELLIA == 1
-#define HAVE_CAMELLIA
-#endif
-//  
-
-//      DH
-//              need this for CYASSL_SERVER, OPENSSL_EXTRA
-#define MDK_CONF_DH 1
-#if MDK_CONF_DH == 0
-#define NO_DH
-#endif
-//  
-//      DSA
-#define MDK_CONF_DSA 1 
-#if MDK_CONF_DSA == 0
-#define NO_DSA
-#endif
-//  
-//      PWDBASED
-#define MDK_CONF_PWDBASED 1
-#if MDK_CONF_PWDBASED == 0
-#define NO_PWDBASED
-#endif
-//  
-
-//      ECC
-#define MDK_CONF_ECC 0
-#if MDK_CONF_ECC == 1
-#define HAVE_ECC
-#endif
-//  
-//      PSK
-#define MDK_CONF_PSK 1
-#if MDK_CONF_PSK == 0
-#define NO_PSK
-#endif
-//  
-//      AESCCM (Turn off Hardware Crypt)
-#define MDK_CONF_AESCCM 0
-#if MDK_CONF_AESCCM == 1
-#define HAVE_AESCCM
-#endif
-//  
-//      AESGCM (Turn off Hardware Crypt)
-#define MDK_CONF_AESGCM 0
-#if MDK_CONF_AESGCM == 1
-#define HAVE_AESGCM
-#define BUILD_AESGCM
-#endif
-//  
-//      NTRU (need License, "crypto_ntru.h")
-#define MDK_CONF_NTRU 0
-#if MDK_CONF_NTRU == 1
-#define HAVE_NTRU
-#endif
-//  
-//  
-
-//  Hardware Crypt (See document for usage)
-//      Hardware RNG
-#define MDK_CONF_STM32F2_RNG 0
-#if MDK_CONF_STM32F2_RNG == 1
-#define STM32F2_RNG
-#else
-
-#endif
-//  
-//      Hardware Crypt
-#define MDK_CONF_STM32F2_CRYPTO 0
-#if MDK_CONF_STM32F2_CRYPTO == 1
-#define STM32F2_CRYPTO
-#endif
-//  
-
-// 
-
-
-
-//
-// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config.h
deleted file mode 100644
index 4c8fcb01c..000000000
--- a/IDE/MDK5-ARM/Projects/CryptBenchmark/RTE/wolfSSL/config.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/* config.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define CYASSL_MDK5
-
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define BENCH_EMBEDDED
-
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
-#define NO_MAIN_DRIVER
-
-#if  defined(MDK_CONF_CYASSL)
-#define CYASSL_MDK_SHELL
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_Benchmark)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-#elif  defined(MDK_CONF_CryptTest)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-
-#endif
-
-
diff --git a/IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config-Crypt.h b/IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config-Crypt.h
deleted file mode 100644
index a11c3ef24..000000000
--- a/IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config-Crypt.h
+++ /dev/null
@@ -1,185 +0,0 @@
-/* config-FS.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-//  wolfCrypt Configuration
-
-//  Cert/Key Strage
-//        Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes)
-#define MDK_CONF_CERT_BUFF 0
-#if MDK_CONF_CERT_BUFF== 1
-#define USE_CERT_BUFFERS_1024
-#elif MDK_CONF_CERT_BUFF == 2
-#define USE_CERT_BUFFERS_2048
-#endif
-//
-
-//  Crypt Algrithm
-
-//       MD5, SHA, SHA-256, AES, RC4, ASN, RSA
-//        
-
-//      MD2
-#define MDK_CONF_MD2 0
-#if MDK_CONF_MD2 == 1
-#define CYASSL_MD2
-#endif
-//  
-//      MD4
-#define MDK_CONF_MD4 1
-#if MDK_CONF_MD4 == 0
-#define NO_MD4
-#endif
-//  
-//      SHA-384
-//          This has to be with SHA512
-#define MDK_CONF_SHA384 0
-#if MDK_CONF_SHA384 == 1
-#define CYASSL_SHA384
-#endif
-//  
-//      SHA-512          
-#define MDK_CONF_SHA512     0
-#if MDK_CONF_SHA512     == 1
-#define CYASSL_SHA512   
-#endif
-//  
-//      RIPEMD
-#define MDK_CONF_RIPEMD 0
-#if MDK_CONF_RIPEMD == 1
-#define CYASSL_RIPEMD
-#endif
-//  
-//      HMAC
-#define MDK_CONF_HMAC 1
-#if MDK_CONF_HMAC == 0
-#define NO_HMAC
-#endif
-//  
-//      HC128
-#define MDK_CONF_HC128 0
-#if MDK_CONF_HC128 == 1
-#define HAVE_HC128
-#endif
-//  
-//  RABBIT
-#define MDK_CONF_RABBIT 1
-#if MDK_CONF_RABBI == 0
-#define NO_RABBIT
-#endif
-//  
-
-//      AEAD     
-#define MDK_CONF_AEAD 0
-#if MDK_CONF_AEAD == 1
-#define HAVE_AEAD
-#endif
-//  
-//      DES3
-#define MDK_CONF_DES3 1
-#if MDK_CONF_DES3 == 0
-#define NO_DES3
-#endif
-//  
-//      CAMELLIA
-#define MDK_CONF_CAMELLIA 0
-#if MDK_CONF_CAMELLIA == 1
-#define HAVE_CAMELLIA
-#endif
-//  
-
-//      DH
-//              need this for CYASSL_SERVER, OPENSSL_EXTRA
-#define MDK_CONF_DH 1
-#if MDK_CONF_DH == 0
-#define NO_DH
-#endif
-//  
-//      DSA
-#define MDK_CONF_DSA 1 
-#if MDK_CONF_DSA == 0
-#define NO_DSA
-#endif
-//  
-//      PWDBASED
-#define MDK_CONF_PWDBASED 1
-#if MDK_CONF_PWDBASED == 0
-#define NO_PWDBASED
-#endif
-//  
-
-//      ECC
-#define MDK_CONF_ECC 0
-#if MDK_CONF_ECC == 1
-#define HAVE_ECC
-#endif
-//  
-//      PSK
-#define MDK_CONF_PSK 1
-#if MDK_CONF_PSK == 0
-#define NO_PSK
-#endif
-//  
-//      AESCCM (Turn off Hardware Crypt)
-#define MDK_CONF_AESCCM 0
-#if MDK_CONF_AESCCM == 1
-#define HAVE_AESCCM
-#endif
-//  
-//      AESGCM (Turn off Hardware Crypt)
-#define MDK_CONF_AESGCM 0
-#if MDK_CONF_AESGCM == 1
-#define HAVE_AESGCM
-#define BUILD_AESGCM
-#endif
-//  
-//      NTRU (need License, "crypto_ntru.h")
-#define MDK_CONF_NTRU 0
-#if MDK_CONF_NTRU == 1
-#define HAVE_NTRU
-#endif
-//  
-//  
-
-//  Hardware Crypt (See document for usage)
-//      Hardware RNG
-#define MDK_CONF_STM32F2_RNG 0
-#if MDK_CONF_STM32F2_RNG == 1
-#define STM32F2_RNG
-#else
-
-#endif
-//  
-//      Hardware Crypt
-#define MDK_CONF_STM32F2_CRYPTO 0
-#if MDK_CONF_STM32F2_CRYPTO == 1
-#define STM32F2_CRYPTO
-#endif
-//  
-
-// 
-
-
-
-//
-// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config.h
deleted file mode 100644
index 4c8fcb01c..000000000
--- a/IDE/MDK5-ARM/Projects/CryptTest/RTE/wolfSSL/config.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/* config.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define CYASSL_MDK5
-
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define BENCH_EMBEDDED
-
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
-#define NO_MAIN_DRIVER
-
-#if  defined(MDK_CONF_CYASSL)
-#define CYASSL_MDK_SHELL
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_Benchmark)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-#elif  defined(MDK_CONF_CryptTest)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-
-#endif
-
-
diff --git a/IDE/MDK5-ARM/Projects/CryptTest/test.c b/IDE/MDK5-ARM/Projects/CryptTest/test.c
index 7ba1b0b39..086032ab7 100644
--- a/IDE/MDK5-ARM/Projects/CryptTest/test.c
+++ b/IDE/MDK5-ARM/Projects/CryptTest/test.c
@@ -2779,7 +2779,8 @@ int rsa_test(void)
         if (certSz < 0)
             return -407;
 
-        certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng);
+        certSz = SignCert(myCert.bodySz, myCert.sigType, derCert, FOURK_BUF,
+                          &caKey, &rng);
         if (certSz < 0)
             return -408;
 
@@ -2891,7 +2892,8 @@ int rsa_test(void)
         if (certSz < 0)
             return -456;
 
-        certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng);
+        certSz = SignCert(myCert.bodySz, myCert.sigType, derCert, FOURK_BUF,
+                          &caKey, &rng);
         if (certSz < 0)
             return -457;
 
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvguix.kojo b/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvguix.kojo
deleted file mode 100644
index 6bb8a7870..000000000
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full.uvguix.kojo
+++ /dev/null
@@ -1,1342 +0,0 @@
-
-
-
-  -4.1
-
-  
### uVision Project, (C) Keil Software

-
-  
-
-  
-    
-      38003
-      Registers
-      115 159
-    
-    
-      346
-      Code Coverage
-      966 160
-    
-    
-      204
-      Performance Analyzer
-      1126
-    
-  
-
-  
-    
-      1506
-      Symbols
-      
-      133 133 133
-    
-    
-      1936
-      Watch 1
-      
-      133 133 133
-    
-    
-      1937
-      Watch 2
-      
-      133 133 133
-    
-    
-      1935
-      Call Stack + Locals
-      
-      133 133 133
-    
-    
-      2506
-      Trace Data
-      
-      75 135 130 95 70 230 200
-    
-  
-
-  
-    
-      1
-      1
-      0
-    
-  
-
-  
-    
-    
-      44
-      0
-      1
-      
-        -1
-        -1
-      
-      
-        -1
-        -1
-      
-      
-        148
-        32
-        1713
-        1071
-      
-    
-    
-      0
-      
-        60
-        010000000400000001000000010000000100000001000000000000000200000000000000010000000100000000000000280000002800000000000000
-      
-    
-    
-      0
-      Build
-      
-        -1
-        -1
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          200100004F00000090050000DF000000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        1005
-        1005
-        1
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000660000001901000048030000
-        
-        
-          16
-          8A000000A1000000A6010000E1020000
-        
-      
-      
-        109
-        109
-        1
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000660000001901000048030000
-        
-        
-          16
-          8A000000A1000000A6010000E1020000
-        
-      
-      
-        1465
-        1465
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          000000002D02000090050000BD020000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        1466
-        1466
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000300200008D05000090020000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        1467
-        1467
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000300200008D05000090020000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        1468
-        1468
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000300200008D05000090020000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        1506
-        1506
-        0
-        0
-        0
-        0
-        32767
-        0
-        16384
-        0
-        
-          16
-          03040000660000008D050000C6010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        1913
-        1913
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          200100006300000090050000DF000000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        1935
-        1935
-        0
-        0
-        0
-        0
-        32767
-        0
-        32768
-        0
-        
-          16
-          03000000300200008D050000A4020000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        1936
-        1936
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000300200008D05000090020000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        1937
-        1937
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000300200008D05000090020000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        1939
-        1939
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000300200008D05000090020000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        1940
-        1940
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000300200008D05000090020000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        1941
-        1941
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000300200008D05000090020000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        1942
-        1942
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000300200008D05000090020000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        195
-        195
-        1
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000660000001901000048030000
-        
-        
-          16
-          8A000000A1000000A6010000E1020000
-        
-      
-      
-        196
-        196
-        1
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000660000001901000048030000
-        
-        
-          16
-          8A000000A1000000A6010000E1020000
-        
-      
-      
-        197
-        197
-        0
-        0
-        0
-        0
-        32767
-        0
-        32768
-        0
-        
-          16
-          000000004102000090050000BD020000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        198
-        198
-        0
-        0
-        0
-        0
-        32767
-        0
-        32768
-        0
-        
-          16
-          000000001902000090050000BD020000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        199
-        199
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000440200008D050000A4020000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        203
-        203
-        0
-        0
-        0
-        0
-        32767
-        0
-        8192
-        0
-        
-          16
-          200100006300000090050000DF000000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        204
-        204
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          23010000660000008D050000C6000000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        221
-        221
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          00000000000000000000000000000000
-        
-        
-          16
-          0A0000000A0000006E0000006E000000
-        
-      
-      
-        2506
-        2506
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          00040000630000009005000029020000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        2507
-        2507
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          000000002D02000090050000A9020000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        343
-        343
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          23010000660000008D050000C6000000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        346
-        346
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          23010000660000008D050000C6000000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        35824
-        35824
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          23010000660000008D050000C6000000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        35885
-        35885
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35886
-        35886
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35887
-        35887
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35888
-        35888
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35889
-        35889
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35890
-        35890
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35891
-        35891
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35892
-        35892
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35893
-        35893
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35894
-        35894
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35895
-        35895
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35896
-        35896
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35897
-        35897
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35898
-        35898
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35899
-        35899
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35900
-        35900
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35901
-        35901
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35902
-        35902
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35903
-        35903
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35904
-        35904
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        35905
-        35905
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03040000660000008D0500007C010000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        38003
-        38003
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          030000006600000019010000A4020000
-        
-        
-          16
-          8A000000A1000000A6010000E1020000
-        
-      
-      
-        38007
-        38007
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          000000004102000090050000BD020000
-        
-        
-          16
-          8A000000A10000005203000031010000
-        
-      
-      
-        436
-        436
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000440200008D050000A4020000
-        
-        
-          16
-          8A000000A1000000A6010000E1020000
-        
-      
-      
-        437
-        437
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000300200008D05000090020000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        440
-        440
-        0
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          03000000300200008D05000090020000
-        
-        
-          16
-          8A000000A10000001A02000031020000
-        
-      
-      
-        59392
-        59392
-        1
-        0
-        0
-        0
-        32767
-        0
-        8192
-        0
-        
-          16
-          0000000000000000B70300001C000000
-        
-        
-          16
-          0A0000000A0000006E0000006E000000
-        
-      
-      
-        59393
-        0
-        1
-        0
-        0
-        0
-        32767
-        0
-        4096
-        0
-        
-          16
-          00000000610300008106000074030000
-        
-        
-          16
-          0A0000000A0000006E0000006E000000
-        
-      
-      
-        59399
-        59399
-        1
-        0
-        0
-        0
-        32767
-        0
-        8192
-        1
-        
-          16
-          000000001C000000C201000038000000
-        
-        
-          16
-          0A0000000A0000006E0000006E000000
-        
-      
-      
-        59400
-        59400
-        0
-        0
-        0
-        0
-        32767
-        0
-        8192
-        2
-        
-          16
-          00000000380000006F02000054000000
-        
-        
-          16
-          0A0000000A0000006E0000006E000000
-        
-      
-      
-        2619
-        000000000B000000000000000020000000000000FFFFFFFFFFFFFFFF20010000DF00000090050000E3000000000000000100001004000000010000000000000000000000FFFFFFFF06000000CB00000057010000CC000000F08B00005A01000079070000FFFF02000B004354616262656450616E6500200000000000008A000000A10000005203000031010000200100004F00000090050000DF0000000000000040280046060000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFFFC0300004F0000000004000029020000000000000200001004000000010000000000000000000000FFFFFFFF17000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C0000018000400000000000008A000000A10000001A02000031020000000400004F00000090050000290200000000000040410046170000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000001000000FFFFFFFFFFFFFFFF1C0100004F0000002001000061030000010000000200001004000000010000000000000000000000FFFFFFFF05000000ED0300006D000000C3000000C400000073940000018000100000010000008A000000A1000000A6010000E1020000000000004F0000001C010000610300000000000040140056050000000750726F6A65637401000000ED03000001000000FFFFFFFFFFFFFFFF05426F6F6B73010000006D00000001000000FFFFFFFFFFFFFFFF0946756E6374696F6E7301000000C300000001000000FFFFFFFFFFFFFFFF0954656D706C6174657301000000C400000001000000FFFFFFFFFFFFFFFF09526567697374657273000000007394000001000000FFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFED03000001000000FFFFFFFFED030000000000000080000000000000FFFFFFFFFFFFFFFF0000000015020000900500001902000000000000010000100400000001000000000000000000000000000000000000000000000001000000C6000000FFFFFFFF0E0000008F070000930700009407000095070000960700009007000091070000B5010000B8010000B9050000BA050000BB050000BC050000CB090000018000400000000000008A000000A10000001A02000031020000000000001902000090050000BD02000000000000404100460E0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031000000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFFFFFFFFFF0000000001000000000000000000000001000000FFFFFFFFC802000019020000CC020000BD02000000000000020000000400000000000000000000000000000000000000000000000000000002000000C6000000FFFFFFFF8F07000001000000FFFFFFFF8F07000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF0000000029020000900500002D020000000000000100001004000000010000000000000000000000FFFFFFFF04000000C5000000C7000000B401000077940000018000800000000000008A000000A10000005203000031010000000000002D02000090050000BD0200000000000040820046040000000C4275696C64204F757470757401000000C500000001000000FFFFFFFFFFFFFFFF0D46696E6420496E2046696C657300000000C700000001000000FFFFFFFFFFFFFFFF0A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0742726F77736572000000007794000001000000FFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFC500000001000000FFFFFFFFC5000000000000000000000000000000
-      
-      
-        59392
-        File
-        
-          2002
-          00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000400020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000040004000000000000000000000000000000000100000001000000018022E100000000040005000000000000000000000000000000000100000001000000018025E10000000004000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000004000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000004000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000004000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000400460000000000000000000000000000000001000000010000000180FE880000000004004500000000000000000000000000000000010000000100000001800B810000000004001300000000000000000000000000000000010000000100000001800C810000000004001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000400000000000000000000000000000000000001000000010000009600000002002050FFFFFFFF0096000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000004001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018022800000020000001500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000400160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000000180C8880000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E4C010000020001001A0000000F50726F6A6563742057696E646F7773000000000000000000000000010000000100000000000000000000000100000008002880DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002880DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002880E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002880E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000288018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000028800000000000000400FFFFFFFF00000000000000000000000000010000000100000000000000000000000100000000002880D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002880E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65FF7F0000
-        
-        
-          1423
-          2800FFFF01001100434D4643546F6F6C426172427574746F6E00E1000000000000FFFFFFFF000100000000000000010000000000000001000000018001E1000000000000FFFFFFFF000100000000000000010000000000000001000000018003E1000000000000FFFFFFFF0001000000000000000100000000000000010000000180CD7F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF000000000000000000010000000000000001000000018023E1000000000000FFFFFFFF000100000000000000010000000000000001000000018022E1000000000000FFFFFFFF000100000000000000010000000000000001000000018025E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802BE1000000000000FFFFFFFF00010000000000000001000000000000000100000001802CE1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001807A8A000000000000FFFFFFFF00010000000000000001000000000000000100000001807B8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180D3B0000000000000FFFFFFFF000100000000000000010000000000000001000000018015B1000000000000FFFFFFFF0001000000000000000100000000000000010000000180F4B0000000000000FFFFFFFF000100000000000000010000000000000001000000018036B1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FF88000000000000FFFFFFFF0001000000000000000100000000000000010000000180FE88000000000000FFFFFFFF00010000000000000001000000000000000100000001800B81000000000000FFFFFFFF00010000000000000001000000000000000100000001800C81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180F088000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE7F000000000000FFFFFFFF000100000000000000010000000000000001000000018024E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800A81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802280000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C488000000000000FFFFFFFF0001000000000000000100000000000000010000000180C988000000000000FFFFFFFF0001000000000000000100000000000000010000000180C788000000000000FFFFFFFF0001000000000000000100000000000000010000000180C888000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180DD88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FB7F000000000000FFFFFFFF000100000000000000010000000000000001000000
-        
-        
-          1423
-          2800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000000000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000000000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000000000C0000000000000000000000000000000001000000010000000180F4B00000000000000D000000000000000000000000000000000100000001000000018036B10000000000000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF880000000000000F0000000000000000000000000000000001000000010000000180FE880000000000001000000000000000000000000000000000010000000100000001800B810000000000001100000000000000000000000000000000010000000100000001800C810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F088000000000000130000000000000000000000000000000001000000010000000180EE7F00000000000014000000000000000000000000000000000100000001000000018024E10000000000001500000000000000000000000000000000010000000100000001800A810000000000001600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018022800000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000180000000000000000000000000000000001000000010000000180C988000000000000190000000000000000000000000000000001000000010000000180C7880000000000001A0000000000000000000000000000000001000000010000000180C8880000000000001B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180DD880000000000001C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001D000000000000000000000000000000000100000001000000
-        
-      
-      
-        59399
-        Build
-        
-          649
-          00200000010000000F00FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000004001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E00000000000000000000000000000000010000000100000001809E8A0000000004001F0000000000000000000000000000000001000000010000000180D17F0000000004002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050000000000B43796153534C2D46756C6C960000000000000001000B43796153534C2D46756C6C000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000400240000000000000000000000000000000001000000010000000180A8010000000000004E0000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C64FF7F0000
-        
-        
-          548
-          0F00FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000FFFFFFFF0001000000000000000100000000000000010000000180D07F000000000000FFFFFFFF00010000000000000001000000000000000100000001803080000000000000FFFFFFFF00010000000000000001000000000000000100000001809E8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D17F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001804C8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001806680000000000000FFFFFFFF0001000000000000000100000000000000010000000180EB88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180B08A000000000000FFFFFFFF0001000000000000000100000000000000010000000180A801000000000000FFFFFFFF0001000000000000000100000000000000010000000180BE01000000000000FFFFFFFF000100000000000000010000000000000001000000
-        
-        
-          548
-          0F00FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000000000000000000000000000000000000001000000010000000180D07F00000000000001000000000000000000000000000000000100000001000000018030800000000000000200000000000000000000000000000000010000000100000001809E8A000000000000030000000000000000000000000000000001000000010000000180D17F0000000000000400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000000500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001806680000000000000060000000000000000000000000000000001000000010000000180EB880000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000080000000000000000000000000000000001000000010000000180B08A000000000000090000000000000000000000000000000001000000010000000180A8010000000000000A0000000000000000000000000000000001000000010000000180BE010000000000000B000000000000000000000000000000000100000001000000
-        
-      
-      
-        59400
-        Debug
-        
-          2220
-          00200000000000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000000002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000000000002D0000000000000000000000000000000001000000010000000180F07F0000000000002E0000000000000000000000000000000001000000010000000180E8880000000000003700000000000000000000000000000000010000000100000001803B010000000000002F0000000000000000000000000000000001000000010000000180BB8A00000000000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000000000000310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000002001380D88B000000000000310000000757617463682031000000000000000000000000010000000100000000000000000000000100000000001380D98B0000000000003100000007576174636820320000000000000000000000000100000001000000000000000000000001000000000013800F01000000000000320000000E4D656D6F72792057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000084D656D6F72792031000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000084D656D6F72792032000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000084D656D6F72792033000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000084D656D6F727920340000000000000000000000000100000001000000000000000000000001000000000013801001000000000000330000000E53657269616C2057696E646F77730000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000755415254202331000000000000000000000000010000000100000000000000000000000100000000001380940700000000000033000000075541525420233200000000000000000000000001000000010000000000000000000000010000000000138095070000000000003300000007554152542023330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000000E49544D2F525441205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000000000003400000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380658A000000000000340000000E4C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E00000014506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000D436F646520436F76657261676500000000000000000000000001000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720100000000000000000000000100000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720100000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000138001890000000000003600000007546F6F6C626F7800000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730100000000000000000000000100000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000000000000100000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F720100000000000000000000000100000001000000000000000000000001000000000000000000054465627567FF7F0000
-        
-        
-          898
-          1900FFFF01001100434D4643546F6F6C426172427574746F6ECC88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801780000000000000FFFFFFFF00010000000000000001000000000000000100000001801D80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801A80000000000000FFFFFFFF00010000000000000001000000000000000100000001801B80000000000000FFFFFFFF0001000000000000000100000000000000010000000180E57F000000000000FFFFFFFF00010000000000000001000000000000000100000001801C80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800089000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180E48B000000000000FFFFFFFF0001000000000000000100000000000000010000000180F07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180E888000000000000FFFFFFFF00010000000000000001000000000000000100000001803B01000000000000FFFFFFFF0001000000000000000100000000000000010000000180BB8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D88B000000000000FFFFFFFF0001000000000000000100000000000000010000000180D28B000000000000FFFFFFFF00010000000000000001000000000000000100000001809307000000000000FFFFFFFF0001000000000000000100000000000000010000000180658A000000000000FFFFFFFF0001000000000000000100000000000000010000000180C18A000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE8B000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800189000000000000FFFFFFFF000100000000000000010000000000000001000000
-        
-        
-          898
-          1900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000000000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000000100000000000000000000000000000000010000000100000001801D800000000000000200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000000300000000000000000000000000000000010000000100000001801B80000000000000040000000000000000000000000000000001000000010000000180E57F0000000000000500000000000000000000000000000000010000000100000001801C800000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B000000000000080000000000000000000000000000000001000000010000000180F07F000000000000090000000000000000000000000000000001000000010000000180E8880000000000000A00000000000000000000000000000000010000000100000001803B010000000000000B0000000000000000000000000000000001000000010000000180BB8A0000000000000C0000000000000000000000000000000001000000010000000180D88B0000000000000D0000000000000000000000000000000001000000010000000180D28B0000000000000E000000000000000000000000000000000100000001000000018093070000000000000F0000000000000000000000000000000001000000010000000180658A000000000000100000000000000000000000000000000001000000010000000180C18A000000000000110000000000000000000000000000000001000000010000000180EE8B0000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180018900000000000013000000000000000000000000000000000100000001000000
-        
-      
-      
-        0
-        1920
-        1080
-      
-    
-  
-
-  
-
-
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full_CyaSSL-Full.dep b/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full_CyaSSL-Full.dep
deleted file mode 100644
index 966cbe457..000000000
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/CyaSSL-Full_CyaSSL-Full.dep
+++ /dev/null
@@ -1,79 +0,0 @@
-Dependencies for Project 'CyaSSL-Full', Target 'CyaSSL-Full': (DO NOT MODIFY !)
-F (.\main.c)(0x52675C4A)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\main.o --omf_browse .\object\main.crf --depend .\object\main.d)
-F (.\shell.c)(0x523B984C)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\shell.o --omf_browse .\object\shell.crf --depend .\object\shell.d)
-F (.\test.c)(0x524E6E34)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\test.o --omf_browse .\object\test.crf --depend .\object\test.d)
-F (.\benchmark.c)(0x5232780E)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\benchmark.o --omf_browse .\object\benchmark.crf --depend .\object\benchmark.d)
-F (.\client.c)(0x523AC4A0)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\client.o --omf_browse .\object\client.crf --depend .\object\client.d)
-F (.\echoclient.c)(0x523277E2)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\echoclient.o --omf_browse .\object\echoclient.crf --depend .\object\echoclient.d)
-F (.\echoserver.c)(0x523277D4)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\echoserver.o --omf_browse .\object\echoserver.crf --depend .\object\echoserver.d)
-F (.\server.c)(0x523AC4BA)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\server.o --omf_browse .\object\server.crf --depend .\object\server.d)
-F (.\cert_data.c)(0x523277FE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\cert_data.o --omf_browse .\object\cert_data.crf --depend .\object\cert_data.d)
-F (.\RTE\wolfSSL\config-CyaSSL.h)(0x523279FE)()
-F (.\RTE\wolfSSL\config-Crypt.h)(0x52327A08)()
-F (.\Abstract.txt)(0x526765CD)()
-F (C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\Lib\ARM\RTX_CM3.lib)(0x5244BA9A)()
-F (RTE\CMSIS\RTX_Conf_CM.c)(0x522BC824)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\rtx_conf_cm.o --omf_browse .\object\rtx_conf_cm.crf --depend .\object\rtx_conf_cm.d)
-F (C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\DMA_STM32F2xx.c)(0x520AB72C)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\dma_stm32f2xx.o --omf_browse .\object\dma_stm32f2xx.crf --depend .\object\dma_stm32f2xx.d)
-F (C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\GPIO_STM32F2xx.c)(0x514117F8)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\gpio_stm32f2xx.o --omf_browse .\object\gpio_stm32f2xx.crf --depend .\object\gpio_stm32f2xx.d)
-F (RTE\Device\STM32F207IG\RTE_Device.h)(0x520C57EA)()
-F (RTE\Device\STM32F207IG\startup_stm32f2xx.s)(0x524C04BE)(--cpu Cortex-M3 --pd "__RTX SETA 1" -g --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

--list .\object\startup_stm32f2xx.lst --xref -o .\object\startup_stm32f2xx.o --depend .\object\startup_stm32f2xx.d)
-F (RTE\Device\STM32F207IG\system_stm32f2xx.c)(0x4E640246)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\system_stm32f2xx.o --omf_browse .\object\system_stm32f2xx.crf --depend .\object\system_stm32f2xx.d)
-F (C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Driver\PHY_ST802RT1.c)(0x52411D22)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\phy_st802rt1.o --omf_browse .\object\phy_st802rt1.crf --depend .\object\phy_st802rt1.d)
-F (C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\EMAC_STM32F2xx.c)(0x52328C8E)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\emac_stm32f2xx.o --omf_browse .\object\emac_stm32f2xx.crf --depend .\object\emac_stm32f2xx.d)
-F (C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver\MCI_STM32F2xx.c)(0x52324BC0)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\mci_stm32f2xx.o --omf_browse .\object\mci_stm32f2xx.crf --depend .\object\mci_stm32f2xx.d)
-F (C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Lib\ARM\FS_LFN_CM3_L.lib)(0x524362F0)()
-F (RTE\File_System\FS_Config.c)(0x51CBD1D2)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\fs_config.o --omf_browse .\object\fs_config.crf --depend .\object\fs_config.d)
-F (RTE\File_System\FS_Config_MC_0.h)(0x520C36F0)()
-F (C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Lib\ARM\Net_Dbg_CM3_L.lib)(0x524B8A0E)()
-F (RTE\Network\Net_Config.c)(0x520C5816)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\net_config.o --omf_browse .\object\net_config.crf --depend .\object\net_config.d)
-F (RTE\Network\Net_Config_BSD.h)(0x52326150)()
-F (RTE\Network\Net_Config_DNS_Client.h)(0x51CBD1D2)()
-F (RTE\Network\Net_Config_ETH_0.h)(0x520C56DC)()
-F (RTE\Network\Net_Config_TCP.h)(0x52326152)()
-F (RTE\Network\Net_Config_UDP.h)(0x52326152)()
-F (RTE\Network\Net_Debug.c)(0x523BA1F2)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\net_debug.o --omf_browse .\object\net_debug.crf --depend .\object\net_debug.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c)(0x523AC74C)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\cyassl_mdk_arm.o --omf_browse .\object\cyassl_mdk_arm.crf --depend .\object\cyassl_mdk_arm.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c)(0x525754AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\time-stm32f2xx.o --omf_browse .\object\time-stm32f2xx.crf --depend .\object\time-stm32f2xx.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\aes.c)(0x5216DBDE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\aes.o --omf_browse .\object\aes.crf --depend .\object\aes.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\arc4.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\arc4.o --omf_browse .\object\arc4.crf --depend .\object\arc4.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asm.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\asm.o --omf_browse .\object\asm.crf --depend .\object\asm.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\asn.c)(0x52329E8A)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\asn.o --omf_browse .\object\asn.crf --depend .\object\asn.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\blake2b.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\blake2b.o --omf_browse .\object\blake2b.crf --depend .\object\blake2b.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\camellia.c)(0x51DA2952)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\camellia.o --omf_browse .\object\camellia.crf --depend .\object\camellia.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\coding.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\coding.o --omf_browse .\object\coding.crf --depend .\object\coding.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\compress.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\compress.o --omf_browse .\object\compress.crf --depend .\object\compress.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\des3.c)(0x51DA2952)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\des3.o --omf_browse .\object\des3.crf --depend .\object\des3.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dh.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\dh.o --omf_browse .\object\dh.crf --depend .\object\dh.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\dsa.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\dsa.o --omf_browse .\object\dsa.crf --depend .\object\dsa.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc.c)(0x5215D7AC)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\ecc.o --omf_browse .\object\ecc.crf --depend .\object\ecc.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ecc_fp.c)(0x4FBF1BB4)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\ecc_fp.o --omf_browse .\object\ecc_fp.crf --depend .\object\ecc_fp.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\error.c)(0x520063E0)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\error.o --omf_browse .\object\error.crf --depend .\object\error.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hc128.c)(0x51DA2952)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\hc128.o --omf_browse .\object\hc128.crf --depend .\object\hc128.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\hmac.c)(0x51942D42)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\hmac.o --omf_browse .\object\hmac.crf --depend .\object\hmac.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\integer.c)(0x51F0CCBE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\integer.o --omf_browse .\object\integer.crf --depend .\object\integer.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\logging.c)(0x51942D42)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\logging.o --omf_browse .\object\logging.crf --depend .\object\logging.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md2.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\md2.o --omf_browse .\object\md2.crf --depend .\object\md2.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md4.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\md4.o --omf_browse .\object\md4.crf --depend .\object\md4.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\md5.c)(0x51942D42)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\md5.o --omf_browse .\object\md5.crf --depend .\object\md5.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\memory.c)(0x523ABC8A)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\memory.o --omf_browse .\object\memory.crf --depend .\object\memory.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\misc.c)(0x51942D42)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\misc.o --omf_browse .\object\misc.crf --depend .\object\misc.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\pwdbased.c)(0x51942D42)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\pwdbased.o --omf_browse .\object\pwdbased.crf --depend .\object\pwdbased.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rabbit.c)(0x51DA2952)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\rabbit.o --omf_browse .\object\rabbit.crf --depend .\object\rabbit.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\random.c)(0x51BA9FE8)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\random.o --omf_browse .\object\random.crf --depend .\object\random.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\ripemd.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\ripemd.o --omf_browse .\object\ripemd.crf --depend .\object\ripemd.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\rsa.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\rsa.o --omf_browse .\object\rsa.crf --depend .\object\rsa.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha.c)(0x51942D42)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\sha.o --omf_browse .\object\sha.crf --depend .\object\sha.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha256.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\sha256.o --omf_browse .\object\sha256.crf --depend .\object\sha256.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\sha512.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\sha512.o --omf_browse .\object\sha512.crf --depend .\object\sha512.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\ctaocrypt\src\tfm.c)(0x51F0CCBE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\tfm.o --omf_browse .\object\tfm.crf --depend .\object\tfm.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\crl.c)(0x5164C8AE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\crl.o --omf_browse .\object\crl.crf --depend .\object\crl.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\internal.c)(0x52663ACA)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\internal.o --omf_browse .\object\internal.crf --depend .\object\internal.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\io.c)(0x5232A8CE)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\io.o --omf_browse .\object\io.crf --depend .\object\io.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\keys.c)(0x521C327A)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\keys.o --omf_browse .\object\keys.crf --depend .\object\keys.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ocsp.c)(0x51C7D2F0)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\ocsp.o --omf_browse .\object\ocsp.crf --depend .\object\ocsp.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\sniffer.c)(0x5204A7E4)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\sniffer.o --omf_browse .\object\sniffer.crf --depend .\object\sniffer.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\ssl.c)(0x524BE6BC)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\ssl.o --omf_browse .\object\ssl.crf --depend .\object\ssl.d)
-F (C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\src\tls.c)(0x524E69A6)(-c --cpu Cortex-M3 -D__RTX -g -O3 --apcs=interwork 

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\Device\STM32F207IG

-I C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\RTE\wolfSSL

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Driver\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS\Include

-I C:\Keil5\ARM\PACK\ARM\CMSIS\3.20.3\CMSIS_RTX\INC

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\FileSystem\Include

-I C:\Keil5\ARM\PACK\Keil\MDK-Middleware\5.1.2\Network\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\Device\Include

-I C:\Keil5\ARM\PACK\Keil\STM32F2xx_DFP\1.0.4\RTE_Driver

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl

-I C:\Keil5\ARM\PACK\wolfSSL\CyaSSL\2.8.0\cyassl\IDE\MDK5-ARM\MDK-ARM\CyaSSL

-D_RTE_ -DSTM32F2XX -DHAVE_CONFIG_H -D__DBG_ITM -D__RTX -DMDK_CONF_CYASSL -DCYASSL_STM32F2xx -o .\object\tls.o --omf_browse .\object\tls.crf --depend .\object\tls.d)
-F (RTE\wolfSSL\config-Crypt.h)(0x52327A08)()
-F (RTE\wolfSSL\config-CyaSSL.h)(0x523279FE)()
-F (RTE\wolfSSL\config.h)(0x524BE316)()
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/Object/CyaSSL-Full.build_log.htm b/IDE/MDK5-ARM/Projects/CyaSSL-Full/Object/CyaSSL-Full.build_log.htm
deleted file mode 100644
index dc05157d2..000000000
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/Object/CyaSSL-Full.build_log.htm
+++ /dev/null
@@ -1,12 +0,0 @@
-
-
-
-
µVision Build Log

-
Project:

-C:\ROOT\CyaSSL-Release\MDK5-Pack-2.8.0\wolfSSL.CyaSSL\cyassl\IDE\MDK5-ARM\Projects\CyaSSL-Full\CyaSSL-Full.uvprojx
-Project File Date:  10/23/2013
-
-
Output:

-

-
-
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-Crypt.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-Crypt.h
deleted file mode 100644
index a11c3ef24..000000000
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-Crypt.h
+++ /dev/null
@@ -1,185 +0,0 @@
-/* config-FS.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-//  wolfCrypt Configuration
-
-//  Cert/Key Strage
-//        Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes)
-#define MDK_CONF_CERT_BUFF 0
-#if MDK_CONF_CERT_BUFF== 1
-#define USE_CERT_BUFFERS_1024
-#elif MDK_CONF_CERT_BUFF == 2
-#define USE_CERT_BUFFERS_2048
-#endif
-//
-
-//  Crypt Algrithm
-
-//       MD5, SHA, SHA-256, AES, RC4, ASN, RSA
-//        
-
-//      MD2
-#define MDK_CONF_MD2 0
-#if MDK_CONF_MD2 == 1
-#define CYASSL_MD2
-#endif
-//  
-//      MD4
-#define MDK_CONF_MD4 1
-#if MDK_CONF_MD4 == 0
-#define NO_MD4
-#endif
-//  
-//      SHA-384
-//          This has to be with SHA512
-#define MDK_CONF_SHA384 0
-#if MDK_CONF_SHA384 == 1
-#define CYASSL_SHA384
-#endif
-//  
-//      SHA-512          
-#define MDK_CONF_SHA512     0
-#if MDK_CONF_SHA512     == 1
-#define CYASSL_SHA512   
-#endif
-//  
-//      RIPEMD
-#define MDK_CONF_RIPEMD 0
-#if MDK_CONF_RIPEMD == 1
-#define CYASSL_RIPEMD
-#endif
-//  
-//      HMAC
-#define MDK_CONF_HMAC 1
-#if MDK_CONF_HMAC == 0
-#define NO_HMAC
-#endif
-//  
-//      HC128
-#define MDK_CONF_HC128 0
-#if MDK_CONF_HC128 == 1
-#define HAVE_HC128
-#endif
-//  
-//  RABBIT
-#define MDK_CONF_RABBIT 1
-#if MDK_CONF_RABBI == 0
-#define NO_RABBIT
-#endif
-//  
-
-//      AEAD     
-#define MDK_CONF_AEAD 0
-#if MDK_CONF_AEAD == 1
-#define HAVE_AEAD
-#endif
-//  
-//      DES3
-#define MDK_CONF_DES3 1
-#if MDK_CONF_DES3 == 0
-#define NO_DES3
-#endif
-//  
-//      CAMELLIA
-#define MDK_CONF_CAMELLIA 0
-#if MDK_CONF_CAMELLIA == 1
-#define HAVE_CAMELLIA
-#endif
-//  
-
-//      DH
-//              need this for CYASSL_SERVER, OPENSSL_EXTRA
-#define MDK_CONF_DH 1
-#if MDK_CONF_DH == 0
-#define NO_DH
-#endif
-//  
-//      DSA
-#define MDK_CONF_DSA 1 
-#if MDK_CONF_DSA == 0
-#define NO_DSA
-#endif
-//  
-//      PWDBASED
-#define MDK_CONF_PWDBASED 1
-#if MDK_CONF_PWDBASED == 0
-#define NO_PWDBASED
-#endif
-//  
-
-//      ECC
-#define MDK_CONF_ECC 0
-#if MDK_CONF_ECC == 1
-#define HAVE_ECC
-#endif
-//  
-//      PSK
-#define MDK_CONF_PSK 1
-#if MDK_CONF_PSK == 0
-#define NO_PSK
-#endif
-//  
-//      AESCCM (Turn off Hardware Crypt)
-#define MDK_CONF_AESCCM 0
-#if MDK_CONF_AESCCM == 1
-#define HAVE_AESCCM
-#endif
-//  
-//      AESGCM (Turn off Hardware Crypt)
-#define MDK_CONF_AESGCM 0
-#if MDK_CONF_AESGCM == 1
-#define HAVE_AESGCM
-#define BUILD_AESGCM
-#endif
-//  
-//      NTRU (need License, "crypto_ntru.h")
-#define MDK_CONF_NTRU 0
-#if MDK_CONF_NTRU == 1
-#define HAVE_NTRU
-#endif
-//  
-//  
-
-//  Hardware Crypt (See document for usage)
-//      Hardware RNG
-#define MDK_CONF_STM32F2_RNG 0
-#if MDK_CONF_STM32F2_RNG == 1
-#define STM32F2_RNG
-#else
-
-#endif
-//  
-//      Hardware Crypt
-#define MDK_CONF_STM32F2_CRYPTO 0
-#if MDK_CONF_STM32F2_CRYPTO == 1
-#define STM32F2_CRYPTO
-#endif
-//  
-
-// 
-
-
-
-//
-// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-CyaSSL.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-CyaSSL.h
deleted file mode 100644
index 02ba94bd4..000000000
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config-CyaSSL.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/* config-RTX-TCP-FS.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-/**** CyaSSL for KEIL-RL Configuration ****/
-
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define NO_MAIN_DRIVER
-
-
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
-
-#define HAVE_KEIL_RTX
-#define CYASSL_CMSIS_RTOS
-#define CYASSL_KEIL_TCP_NET
-
-
-// <<< Use Configuration Wizard in Context Menu >>>
-//  CyaSSL Configuration
-
-//     SSL (Included by default)
-//     
-
-//      TLS 
-#define MDK_CONF_TLS 1
-#if MDK_CONF_TLS == 0
-#define NO_TLS
-#endif
-//  
-
-//      CRL
-#define MDK_CONF_DER_LOAD 0
-#if MDK_CONF_DER_LOAD == 1
-#define CYASSL_DER_LOAD
-#endif
-//  
-//      OpenSSL Extra
-#define MDK_CONF_OPENSSL_EXTRA 1
-#if MDK_CONF_OPENSSL_EXTRA == 1
-#define OPENSSL_EXTRA
-#endif
-//  
-//
-
-//  Cert/Key Generation
-//      CertGen
-#define MDK_CONF_CERT_GEN 0
-#if MDK_CONF_CERT_GEN == 1
-#define CYASSL_CERT_GEN
-#endif
-//  
-//      KeyGen
-#define MDK_CONF_KEY_GEN 0
-#if MDK_CONF_KEY_GEN == 1
-#define CYASSL_KEY_GEN
-#endif
-//  
-//
-
-//  Others
-
-//      Inline
-#define MDK_CONF_INLINE 0
-#if MDK_CONF_INLINE == 0
-#define NO_INLINE
-#endif
-//  
-//      Debug
-//              Debug Message
-#define MDK_CONF_DebugMessage 0
-#if MDK_CONF_DebugMessage == 1
-#define DEBUG_CYASSL
-#endif
-//         
-//              Check malloc
-#define MDK_CONF_CheckMalloc 1
-#if MDK_CONF_CheckMalloc == 1
-#define CYASSL_MALLOC_CHECK
-#endif
-//         
-
-
-//  
-//      ErrNo.h
-#define MDK_CONF_ErrNo 0
-#if MDK_CONF_ErrNo == 1
-#define HAVE_ERRNO
-#endif
-//  
-//      Error Strings
-#define MDK_CONF_ErrorStrings 1
-#if MDK_CONF_ErrorStrings == 0
-#define NO_ERROR_STRINGS
-#endif
-//  
-//      zlib (need "zlib.h")
-#define MDK_CONF_LIBZ 0
-#if MDK_CONF_LIBZ == 1
-#define HAVE_LIBZ
-#endif
-//  
-//      CAVIUM (need CAVIUM headers)
-#define MDK_CONF_CAVIUM 0
-#if MDK_CONF_CAVIUM == 1
-#define HAVE_CAVIUM
-#endif
-//  
-//      Small Stack
-#define MDK_CONF_SmallStack 1
-#if MDK_CONF_SmallStack == 0
-#define NO_CYASSL_SMALL_STACK
-#endif
-//  
-//      Use Fast Math
-#define MDK_CONF_FASTMATH 0
-#if MDK_CONF_FASTMATH == 1
-#define USE_FAST_MATH
-#endif
-//  
-//  
-
-// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config.h
deleted file mode 100644
index 5115b2d1a..000000000
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/RTE/wolfSSL/config.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/* config.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define CYASSL_MDK5
-#define CYASSL_CMSIS_RTOS
-
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define BENCH_EMBEDDED
-
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
-#define NO_MAIN_DRIVER
-
-#define CYASSL_STM32F2xx
-
-#if  defined(MDK_CONF_CYASSL)
-#define CYASSL_MDK_SHELL
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_Benchmark)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-#elif  defined(MDK_CONF_CryptTest)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-
-#endif
-
-
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c
index 2fd81fe2a..608a32457 100644
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/client.c
@@ -469,7 +469,8 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
 
 #ifdef HAVE_SNI
     if (sniHostName)
-        if (CyaSSL_CTX_UseSNI(ctx, 0, sniHostName, XSTRLEN(sniHostName)))
+        if (CyaSSL_CTX_UseSNI(ctx, 0, sniHostName, XSTRLEN(sniHostName))
+                                                                 != SSL_SUCCESS)
             err_sys("UseSNI failed");
 #endif
 
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c
index 8e155f30a..aeecd62fb 100644
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/server.c
@@ -347,6 +347,10 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
     usePsk = 1;
 #endif
 
+#ifdef OPENSSL_EXTRA
+    SSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack);
+#endif
+
     if (fewerPackets)
         CyaSSL_CTX_set_group_messages(ctx);
 
@@ -404,10 +408,6 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
     }
 #endif
 
-#ifdef OPENSSL_EXTRA
-    SSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack);
-#endif
-
 #if defined(CYASSL_SNIFFER) && !defined(HAVE_NTRU) && !defined(HAVE_ECC)
     /* don't use EDH, can't sniff tmp keys */
     if (cipherList == NULL) {
@@ -419,7 +419,7 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
 #ifdef HAVE_SNI
     if (sniHostName) {
         if (CyaSSL_CTX_UseSNI(ctx, CYASSL_SNI_HOST_NAME, sniHostName,
-                                                          XSTRLEN(sniHostName)))
+                                           XSTRLEN(sniHostName)) != SSL_SUCCESS)
             err_sys("UseSNI failed");
         else
             CyaSSL_CTX_SNI_SetOptions(ctx, CYASSL_SNI_HOST_NAME,
diff --git a/IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c b/IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c
index 6165cee31..22b4070eb 100644
--- a/IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c
+++ b/IDE/MDK5-ARM/Projects/CyaSSL-Full/test.c
@@ -2550,7 +2550,8 @@ int rsa_test(void)
         if (certSz < 0)
             return -407;
 
-        certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng);
+        certSz = SignCert(myCert.bodySz, myCert.sigType, derCert, FOURK_BUF,
+                          &caKey, &rng);
         if (certSz < 0)
             return -408;
 
@@ -2662,7 +2663,8 @@ int rsa_test(void)
         if (certSz < 0)
             return -456;
 
-        certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng);
+        certSz = SignCert(myCert.bodySz, myCert.sigType, derCert, FOURK_BUF,
+                          &caKey, &rng);
         if (certSz < 0)
             return -457;
 
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-Crypt.h b/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-Crypt.h
deleted file mode 100644
index a11c3ef24..000000000
--- a/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-Crypt.h
+++ /dev/null
@@ -1,185 +0,0 @@
-/* config-FS.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-//  wolfCrypt Configuration
-
-//  Cert/Key Strage
-//        Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes)
-#define MDK_CONF_CERT_BUFF 0
-#if MDK_CONF_CERT_BUFF== 1
-#define USE_CERT_BUFFERS_1024
-#elif MDK_CONF_CERT_BUFF == 2
-#define USE_CERT_BUFFERS_2048
-#endif
-//
-
-//  Crypt Algrithm
-
-//       MD5, SHA, SHA-256, AES, RC4, ASN, RSA
-//        
-
-//      MD2
-#define MDK_CONF_MD2 0
-#if MDK_CONF_MD2 == 1
-#define CYASSL_MD2
-#endif
-//  
-//      MD4
-#define MDK_CONF_MD4 1
-#if MDK_CONF_MD4 == 0
-#define NO_MD4
-#endif
-//  
-//      SHA-384
-//          This has to be with SHA512
-#define MDK_CONF_SHA384 0
-#if MDK_CONF_SHA384 == 1
-#define CYASSL_SHA384
-#endif
-//  
-//      SHA-512          
-#define MDK_CONF_SHA512     0
-#if MDK_CONF_SHA512     == 1
-#define CYASSL_SHA512   
-#endif
-//  
-//      RIPEMD
-#define MDK_CONF_RIPEMD 0
-#if MDK_CONF_RIPEMD == 1
-#define CYASSL_RIPEMD
-#endif
-//  
-//      HMAC
-#define MDK_CONF_HMAC 1
-#if MDK_CONF_HMAC == 0
-#define NO_HMAC
-#endif
-//  
-//      HC128
-#define MDK_CONF_HC128 0
-#if MDK_CONF_HC128 == 1
-#define HAVE_HC128
-#endif
-//  
-//  RABBIT
-#define MDK_CONF_RABBIT 1
-#if MDK_CONF_RABBI == 0
-#define NO_RABBIT
-#endif
-//  
-
-//      AEAD     
-#define MDK_CONF_AEAD 0
-#if MDK_CONF_AEAD == 1
-#define HAVE_AEAD
-#endif
-//  
-//      DES3
-#define MDK_CONF_DES3 1
-#if MDK_CONF_DES3 == 0
-#define NO_DES3
-#endif
-//  
-//      CAMELLIA
-#define MDK_CONF_CAMELLIA 0
-#if MDK_CONF_CAMELLIA == 1
-#define HAVE_CAMELLIA
-#endif
-//  
-
-//      DH
-//              need this for CYASSL_SERVER, OPENSSL_EXTRA
-#define MDK_CONF_DH 1
-#if MDK_CONF_DH == 0
-#define NO_DH
-#endif
-//  
-//      DSA
-#define MDK_CONF_DSA 1 
-#if MDK_CONF_DSA == 0
-#define NO_DSA
-#endif
-//  
-//      PWDBASED
-#define MDK_CONF_PWDBASED 1
-#if MDK_CONF_PWDBASED == 0
-#define NO_PWDBASED
-#endif
-//  
-
-//      ECC
-#define MDK_CONF_ECC 0
-#if MDK_CONF_ECC == 1
-#define HAVE_ECC
-#endif
-//  
-//      PSK
-#define MDK_CONF_PSK 1
-#if MDK_CONF_PSK == 0
-#define NO_PSK
-#endif
-//  
-//      AESCCM (Turn off Hardware Crypt)
-#define MDK_CONF_AESCCM 0
-#if MDK_CONF_AESCCM == 1
-#define HAVE_AESCCM
-#endif
-//  
-//      AESGCM (Turn off Hardware Crypt)
-#define MDK_CONF_AESGCM 0
-#if MDK_CONF_AESGCM == 1
-#define HAVE_AESGCM
-#define BUILD_AESGCM
-#endif
-//  
-//      NTRU (need License, "crypto_ntru.h")
-#define MDK_CONF_NTRU 0
-#if MDK_CONF_NTRU == 1
-#define HAVE_NTRU
-#endif
-//  
-//  
-
-//  Hardware Crypt (See document for usage)
-//      Hardware RNG
-#define MDK_CONF_STM32F2_RNG 0
-#if MDK_CONF_STM32F2_RNG == 1
-#define STM32F2_RNG
-#else
-
-#endif
-//  
-//      Hardware Crypt
-#define MDK_CONF_STM32F2_CRYPTO 0
-#if MDK_CONF_STM32F2_CRYPTO == 1
-#define STM32F2_CRYPTO
-#endif
-//  
-
-// 
-
-
-
-//
-// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-CyaSSL.h b/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-CyaSSL.h
deleted file mode 100644
index 02ba94bd4..000000000
--- a/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config-CyaSSL.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/* config-RTX-TCP-FS.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-/**** CyaSSL for KEIL-RL Configuration ****/
-
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define NO_MAIN_DRIVER
-
-
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
-
-#define HAVE_KEIL_RTX
-#define CYASSL_CMSIS_RTOS
-#define CYASSL_KEIL_TCP_NET
-
-
-// <<< Use Configuration Wizard in Context Menu >>>
-//  CyaSSL Configuration
-
-//     SSL (Included by default)
-//     
-
-//      TLS 
-#define MDK_CONF_TLS 1
-#if MDK_CONF_TLS == 0
-#define NO_TLS
-#endif
-//  
-
-//      CRL
-#define MDK_CONF_DER_LOAD 0
-#if MDK_CONF_DER_LOAD == 1
-#define CYASSL_DER_LOAD
-#endif
-//  
-//      OpenSSL Extra
-#define MDK_CONF_OPENSSL_EXTRA 1
-#if MDK_CONF_OPENSSL_EXTRA == 1
-#define OPENSSL_EXTRA
-#endif
-//  
-//
-
-//  Cert/Key Generation
-//      CertGen
-#define MDK_CONF_CERT_GEN 0
-#if MDK_CONF_CERT_GEN == 1
-#define CYASSL_CERT_GEN
-#endif
-//  
-//      KeyGen
-#define MDK_CONF_KEY_GEN 0
-#if MDK_CONF_KEY_GEN == 1
-#define CYASSL_KEY_GEN
-#endif
-//  
-//
-
-//  Others
-
-//      Inline
-#define MDK_CONF_INLINE 0
-#if MDK_CONF_INLINE == 0
-#define NO_INLINE
-#endif
-//  
-//      Debug
-//              Debug Message
-#define MDK_CONF_DebugMessage 0
-#if MDK_CONF_DebugMessage == 1
-#define DEBUG_CYASSL
-#endif
-//         
-//              Check malloc
-#define MDK_CONF_CheckMalloc 1
-#if MDK_CONF_CheckMalloc == 1
-#define CYASSL_MALLOC_CHECK
-#endif
-//         
-
-
-//  
-//      ErrNo.h
-#define MDK_CONF_ErrNo 0
-#if MDK_CONF_ErrNo == 1
-#define HAVE_ERRNO
-#endif
-//  
-//      Error Strings
-#define MDK_CONF_ErrorStrings 1
-#if MDK_CONF_ErrorStrings == 0
-#define NO_ERROR_STRINGS
-#endif
-//  
-//      zlib (need "zlib.h")
-#define MDK_CONF_LIBZ 0
-#if MDK_CONF_LIBZ == 1
-#define HAVE_LIBZ
-#endif
-//  
-//      CAVIUM (need CAVIUM headers)
-#define MDK_CONF_CAVIUM 0
-#if MDK_CONF_CAVIUM == 1
-#define HAVE_CAVIUM
-#endif
-//  
-//      Small Stack
-#define MDK_CONF_SmallStack 1
-#if MDK_CONF_SmallStack == 0
-#define NO_CYASSL_SMALL_STACK
-#endif
-//  
-//      Use Fast Math
-#define MDK_CONF_FASTMATH 0
-#if MDK_CONF_FASTMATH == 1
-#define USE_FAST_MATH
-#endif
-//  
-//  
-
-// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config.h
deleted file mode 100644
index 4c8fcb01c..000000000
--- a/IDE/MDK5-ARM/Projects/EchoClient/RTE/wolfSSL/config.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/* config.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define CYASSL_MDK5
-
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define BENCH_EMBEDDED
-
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
-#define NO_MAIN_DRIVER
-
-#if  defined(MDK_CONF_CYASSL)
-#define CYASSL_MDK_SHELL
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_Benchmark)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-#elif  defined(MDK_CONF_CryptTest)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-
-#endif
-
-
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-Crypt.h b/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-Crypt.h
deleted file mode 100644
index a11c3ef24..000000000
--- a/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-Crypt.h
+++ /dev/null
@@ -1,185 +0,0 @@
-/* config-FS.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-//  wolfCrypt Configuration
-
-//  Cert/Key Strage
-//        Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes)
-#define MDK_CONF_CERT_BUFF 0
-#if MDK_CONF_CERT_BUFF== 1
-#define USE_CERT_BUFFERS_1024
-#elif MDK_CONF_CERT_BUFF == 2
-#define USE_CERT_BUFFERS_2048
-#endif
-//
-
-//  Crypt Algrithm
-
-//       MD5, SHA, SHA-256, AES, RC4, ASN, RSA
-//        
-
-//      MD2
-#define MDK_CONF_MD2 0
-#if MDK_CONF_MD2 == 1
-#define CYASSL_MD2
-#endif
-//  
-//      MD4
-#define MDK_CONF_MD4 1
-#if MDK_CONF_MD4 == 0
-#define NO_MD4
-#endif
-//  
-//      SHA-384
-//          This has to be with SHA512
-#define MDK_CONF_SHA384 0
-#if MDK_CONF_SHA384 == 1
-#define CYASSL_SHA384
-#endif
-//  
-//      SHA-512          
-#define MDK_CONF_SHA512     0
-#if MDK_CONF_SHA512     == 1
-#define CYASSL_SHA512   
-#endif
-//  
-//      RIPEMD
-#define MDK_CONF_RIPEMD 0
-#if MDK_CONF_RIPEMD == 1
-#define CYASSL_RIPEMD
-#endif
-//  
-//      HMAC
-#define MDK_CONF_HMAC 1
-#if MDK_CONF_HMAC == 0
-#define NO_HMAC
-#endif
-//  
-//      HC128
-#define MDK_CONF_HC128 0
-#if MDK_CONF_HC128 == 1
-#define HAVE_HC128
-#endif
-//  
-//  RABBIT
-#define MDK_CONF_RABBIT 1
-#if MDK_CONF_RABBI == 0
-#define NO_RABBIT
-#endif
-//  
-
-//      AEAD     
-#define MDK_CONF_AEAD 0
-#if MDK_CONF_AEAD == 1
-#define HAVE_AEAD
-#endif
-//  
-//      DES3
-#define MDK_CONF_DES3 1
-#if MDK_CONF_DES3 == 0
-#define NO_DES3
-#endif
-//  
-//      CAMELLIA
-#define MDK_CONF_CAMELLIA 0
-#if MDK_CONF_CAMELLIA == 1
-#define HAVE_CAMELLIA
-#endif
-//  
-
-//      DH
-//              need this for CYASSL_SERVER, OPENSSL_EXTRA
-#define MDK_CONF_DH 1
-#if MDK_CONF_DH == 0
-#define NO_DH
-#endif
-//  
-//      DSA
-#define MDK_CONF_DSA 1 
-#if MDK_CONF_DSA == 0
-#define NO_DSA
-#endif
-//  
-//      PWDBASED
-#define MDK_CONF_PWDBASED 1
-#if MDK_CONF_PWDBASED == 0
-#define NO_PWDBASED
-#endif
-//  
-
-//      ECC
-#define MDK_CONF_ECC 0
-#if MDK_CONF_ECC == 1
-#define HAVE_ECC
-#endif
-//  
-//      PSK
-#define MDK_CONF_PSK 1
-#if MDK_CONF_PSK == 0
-#define NO_PSK
-#endif
-//  
-//      AESCCM (Turn off Hardware Crypt)
-#define MDK_CONF_AESCCM 0
-#if MDK_CONF_AESCCM == 1
-#define HAVE_AESCCM
-#endif
-//  
-//      AESGCM (Turn off Hardware Crypt)
-#define MDK_CONF_AESGCM 0
-#if MDK_CONF_AESGCM == 1
-#define HAVE_AESGCM
-#define BUILD_AESGCM
-#endif
-//  
-//      NTRU (need License, "crypto_ntru.h")
-#define MDK_CONF_NTRU 0
-#if MDK_CONF_NTRU == 1
-#define HAVE_NTRU
-#endif
-//  
-//  
-
-//  Hardware Crypt (See document for usage)
-//      Hardware RNG
-#define MDK_CONF_STM32F2_RNG 0
-#if MDK_CONF_STM32F2_RNG == 1
-#define STM32F2_RNG
-#else
-
-#endif
-//  
-//      Hardware Crypt
-#define MDK_CONF_STM32F2_CRYPTO 0
-#if MDK_CONF_STM32F2_CRYPTO == 1
-#define STM32F2_CRYPTO
-#endif
-//  
-
-// 
-
-
-
-//
-// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-CyaSSL.h b/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-CyaSSL.h
deleted file mode 100644
index 02ba94bd4..000000000
--- a/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config-CyaSSL.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/* config-RTX-TCP-FS.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-/**** CyaSSL for KEIL-RL Configuration ****/
-
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define NO_MAIN_DRIVER
-
-
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
-
-#define HAVE_KEIL_RTX
-#define CYASSL_CMSIS_RTOS
-#define CYASSL_KEIL_TCP_NET
-
-
-// <<< Use Configuration Wizard in Context Menu >>>
-//  CyaSSL Configuration
-
-//     SSL (Included by default)
-//     
-
-//      TLS 
-#define MDK_CONF_TLS 1
-#if MDK_CONF_TLS == 0
-#define NO_TLS
-#endif
-//  
-
-//      CRL
-#define MDK_CONF_DER_LOAD 0
-#if MDK_CONF_DER_LOAD == 1
-#define CYASSL_DER_LOAD
-#endif
-//  
-//      OpenSSL Extra
-#define MDK_CONF_OPENSSL_EXTRA 1
-#if MDK_CONF_OPENSSL_EXTRA == 1
-#define OPENSSL_EXTRA
-#endif
-//  
-//
-
-//  Cert/Key Generation
-//      CertGen
-#define MDK_CONF_CERT_GEN 0
-#if MDK_CONF_CERT_GEN == 1
-#define CYASSL_CERT_GEN
-#endif
-//  
-//      KeyGen
-#define MDK_CONF_KEY_GEN 0
-#if MDK_CONF_KEY_GEN == 1
-#define CYASSL_KEY_GEN
-#endif
-//  
-//
-
-//  Others
-
-//      Inline
-#define MDK_CONF_INLINE 0
-#if MDK_CONF_INLINE == 0
-#define NO_INLINE
-#endif
-//  
-//      Debug
-//              Debug Message
-#define MDK_CONF_DebugMessage 0
-#if MDK_CONF_DebugMessage == 1
-#define DEBUG_CYASSL
-#endif
-//         
-//              Check malloc
-#define MDK_CONF_CheckMalloc 1
-#if MDK_CONF_CheckMalloc == 1
-#define CYASSL_MALLOC_CHECK
-#endif
-//         
-
-
-//  
-//      ErrNo.h
-#define MDK_CONF_ErrNo 0
-#if MDK_CONF_ErrNo == 1
-#define HAVE_ERRNO
-#endif
-//  
-//      Error Strings
-#define MDK_CONF_ErrorStrings 1
-#if MDK_CONF_ErrorStrings == 0
-#define NO_ERROR_STRINGS
-#endif
-//  
-//      zlib (need "zlib.h")
-#define MDK_CONF_LIBZ 0
-#if MDK_CONF_LIBZ == 1
-#define HAVE_LIBZ
-#endif
-//  
-//      CAVIUM (need CAVIUM headers)
-#define MDK_CONF_CAVIUM 0
-#if MDK_CONF_CAVIUM == 1
-#define HAVE_CAVIUM
-#endif
-//  
-//      Small Stack
-#define MDK_CONF_SmallStack 1
-#if MDK_CONF_SmallStack == 0
-#define NO_CYASSL_SMALL_STACK
-#endif
-//  
-//      Use Fast Math
-#define MDK_CONF_FASTMATH 0
-#if MDK_CONF_FASTMATH == 1
-#define USE_FAST_MATH
-#endif
-//  
-//  
-
-// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config.h
deleted file mode 100644
index 4c8fcb01c..000000000
--- a/IDE/MDK5-ARM/Projects/EchoServer/RTE/wolfSSL/config.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/* config.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define CYASSL_MDK5
-
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define BENCH_EMBEDDED
-
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
-#define NO_MAIN_DRIVER
-
-#if  defined(MDK_CONF_CYASSL)
-#define CYASSL_MDK_SHELL
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_Benchmark)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-#elif  defined(MDK_CONF_CryptTest)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-
-#endif
-
-
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-Crypt.h b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-Crypt.h
deleted file mode 100644
index a11c3ef24..000000000
--- a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-Crypt.h
+++ /dev/null
@@ -1,185 +0,0 @@
-/* config-FS.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-//  wolfCrypt Configuration
-
-//  Cert/Key Strage
-//        Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes)
-#define MDK_CONF_CERT_BUFF 0
-#if MDK_CONF_CERT_BUFF== 1
-#define USE_CERT_BUFFERS_1024
-#elif MDK_CONF_CERT_BUFF == 2
-#define USE_CERT_BUFFERS_2048
-#endif
-//
-
-//  Crypt Algrithm
-
-//       MD5, SHA, SHA-256, AES, RC4, ASN, RSA
-//        
-
-//      MD2
-#define MDK_CONF_MD2 0
-#if MDK_CONF_MD2 == 1
-#define CYASSL_MD2
-#endif
-//  
-//      MD4
-#define MDK_CONF_MD4 1
-#if MDK_CONF_MD4 == 0
-#define NO_MD4
-#endif
-//  
-//      SHA-384
-//          This has to be with SHA512
-#define MDK_CONF_SHA384 0
-#if MDK_CONF_SHA384 == 1
-#define CYASSL_SHA384
-#endif
-//  
-//      SHA-512          
-#define MDK_CONF_SHA512     0
-#if MDK_CONF_SHA512     == 1
-#define CYASSL_SHA512   
-#endif
-//  
-//      RIPEMD
-#define MDK_CONF_RIPEMD 0
-#if MDK_CONF_RIPEMD == 1
-#define CYASSL_RIPEMD
-#endif
-//  
-//      HMAC
-#define MDK_CONF_HMAC 1
-#if MDK_CONF_HMAC == 0
-#define NO_HMAC
-#endif
-//  
-//      HC128
-#define MDK_CONF_HC128 0
-#if MDK_CONF_HC128 == 1
-#define HAVE_HC128
-#endif
-//  
-//  RABBIT
-#define MDK_CONF_RABBIT 1
-#if MDK_CONF_RABBI == 0
-#define NO_RABBIT
-#endif
-//  
-
-//      AEAD     
-#define MDK_CONF_AEAD 0
-#if MDK_CONF_AEAD == 1
-#define HAVE_AEAD
-#endif
-//  
-//      DES3
-#define MDK_CONF_DES3 1
-#if MDK_CONF_DES3 == 0
-#define NO_DES3
-#endif
-//  
-//      CAMELLIA
-#define MDK_CONF_CAMELLIA 0
-#if MDK_CONF_CAMELLIA == 1
-#define HAVE_CAMELLIA
-#endif
-//  
-
-//      DH
-//              need this for CYASSL_SERVER, OPENSSL_EXTRA
-#define MDK_CONF_DH 1
-#if MDK_CONF_DH == 0
-#define NO_DH
-#endif
-//  
-//      DSA
-#define MDK_CONF_DSA 1 
-#if MDK_CONF_DSA == 0
-#define NO_DSA
-#endif
-//  
-//      PWDBASED
-#define MDK_CONF_PWDBASED 1
-#if MDK_CONF_PWDBASED == 0
-#define NO_PWDBASED
-#endif
-//  
-
-//      ECC
-#define MDK_CONF_ECC 0
-#if MDK_CONF_ECC == 1
-#define HAVE_ECC
-#endif
-//  
-//      PSK
-#define MDK_CONF_PSK 1
-#if MDK_CONF_PSK == 0
-#define NO_PSK
-#endif
-//  
-//      AESCCM (Turn off Hardware Crypt)
-#define MDK_CONF_AESCCM 0
-#if MDK_CONF_AESCCM == 1
-#define HAVE_AESCCM
-#endif
-//  
-//      AESGCM (Turn off Hardware Crypt)
-#define MDK_CONF_AESGCM 0
-#if MDK_CONF_AESGCM == 1
-#define HAVE_AESGCM
-#define BUILD_AESGCM
-#endif
-//  
-//      NTRU (need License, "crypto_ntru.h")
-#define MDK_CONF_NTRU 0
-#if MDK_CONF_NTRU == 1
-#define HAVE_NTRU
-#endif
-//  
-//  
-
-//  Hardware Crypt (See document for usage)
-//      Hardware RNG
-#define MDK_CONF_STM32F2_RNG 0
-#if MDK_CONF_STM32F2_RNG == 1
-#define STM32F2_RNG
-#else
-
-#endif
-//  
-//      Hardware Crypt
-#define MDK_CONF_STM32F2_CRYPTO 0
-#if MDK_CONF_STM32F2_CRYPTO == 1
-#define STM32F2_CRYPTO
-#endif
-//  
-
-// 
-
-
-
-//
-// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-CyaSSL.h b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-CyaSSL.h
deleted file mode 100644
index 02ba94bd4..000000000
--- a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config-CyaSSL.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/* config-RTX-TCP-FS.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-/**** CyaSSL for KEIL-RL Configuration ****/
-
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define NO_MAIN_DRIVER
-
-
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
-
-#define HAVE_KEIL_RTX
-#define CYASSL_CMSIS_RTOS
-#define CYASSL_KEIL_TCP_NET
-
-
-// <<< Use Configuration Wizard in Context Menu >>>
-//  CyaSSL Configuration
-
-//     SSL (Included by default)
-//     
-
-//      TLS 
-#define MDK_CONF_TLS 1
-#if MDK_CONF_TLS == 0
-#define NO_TLS
-#endif
-//  
-
-//      CRL
-#define MDK_CONF_DER_LOAD 0
-#if MDK_CONF_DER_LOAD == 1
-#define CYASSL_DER_LOAD
-#endif
-//  
-//      OpenSSL Extra
-#define MDK_CONF_OPENSSL_EXTRA 1
-#if MDK_CONF_OPENSSL_EXTRA == 1
-#define OPENSSL_EXTRA
-#endif
-//  
-//
-
-//  Cert/Key Generation
-//      CertGen
-#define MDK_CONF_CERT_GEN 0
-#if MDK_CONF_CERT_GEN == 1
-#define CYASSL_CERT_GEN
-#endif
-//  
-//      KeyGen
-#define MDK_CONF_KEY_GEN 0
-#if MDK_CONF_KEY_GEN == 1
-#define CYASSL_KEY_GEN
-#endif
-//  
-//
-
-//  Others
-
-//      Inline
-#define MDK_CONF_INLINE 0
-#if MDK_CONF_INLINE == 0
-#define NO_INLINE
-#endif
-//  
-//      Debug
-//              Debug Message
-#define MDK_CONF_DebugMessage 0
-#if MDK_CONF_DebugMessage == 1
-#define DEBUG_CYASSL
-#endif
-//         
-//              Check malloc
-#define MDK_CONF_CheckMalloc 1
-#if MDK_CONF_CheckMalloc == 1
-#define CYASSL_MALLOC_CHECK
-#endif
-//         
-
-
-//  
-//      ErrNo.h
-#define MDK_CONF_ErrNo 0
-#if MDK_CONF_ErrNo == 1
-#define HAVE_ERRNO
-#endif
-//  
-//      Error Strings
-#define MDK_CONF_ErrorStrings 1
-#if MDK_CONF_ErrorStrings == 0
-#define NO_ERROR_STRINGS
-#endif
-//  
-//      zlib (need "zlib.h")
-#define MDK_CONF_LIBZ 0
-#if MDK_CONF_LIBZ == 1
-#define HAVE_LIBZ
-#endif
-//  
-//      CAVIUM (need CAVIUM headers)
-#define MDK_CONF_CAVIUM 0
-#if MDK_CONF_CAVIUM == 1
-#define HAVE_CAVIUM
-#endif
-//  
-//      Small Stack
-#define MDK_CONF_SmallStack 1
-#if MDK_CONF_SmallStack == 0
-#define NO_CYASSL_SMALL_STACK
-#endif
-//  
-//      Use Fast Math
-#define MDK_CONF_FASTMATH 0
-#if MDK_CONF_FASTMATH == 1
-#define USE_FAST_MATH
-#endif
-//  
-//  
-
-// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config.h
deleted file mode 100644
index 4c8fcb01c..000000000
--- a/IDE/MDK5-ARM/Projects/SimpleClient/RTE/wolfSSL/config.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/* config.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define CYASSL_MDK5
-
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define BENCH_EMBEDDED
-
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
-#define NO_MAIN_DRIVER
-
-#if  defined(MDK_CONF_CYASSL)
-#define CYASSL_MDK_SHELL
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_Benchmark)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-#elif  defined(MDK_CONF_CryptTest)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-
-#endif
-
-
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/client.c b/IDE/MDK5-ARM/Projects/SimpleClient/client.c
index 07cf20bea..e6f6a56e3 100644
--- a/IDE/MDK5-ARM/Projects/SimpleClient/client.c
+++ b/IDE/MDK5-ARM/Projects/SimpleClient/client.c
@@ -471,7 +471,8 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
 
 #ifdef HAVE_SNI
     if (sniHostName)
-        if (CyaSSL_CTX_UseSNI(ctx, 0, sniHostName, XSTRLEN(sniHostName)))
+        if (CyaSSL_CTX_UseSNI(ctx, 0, sniHostName, XSTRLEN(sniHostName))
+                                                                 != SSL_SUCCESS)
             err_sys("UseSNI failed");
 #endif
 
diff --git a/IDE/MDK5-ARM/Projects/SimpleClient/config-SimpleClient.h b/IDE/MDK5-ARM/Projects/SimpleClient/config-SimpleClient.h
deleted file mode 100644
index 966c7fb66..000000000
--- a/IDE/MDK5-ARM/Projects/SimpleClient/config-SimpleClient.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/* config-RTX-TCP-FS.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-/**** CyaSSL for KEIL-RL Configuration ****/
-
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define NO_MAIN_DRIVER
-
-
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
-
-#define HAVE_KEIL_RTX
-#define CYASSL_CMSIS_RTOS
-#define CYASSL_KEIL_TCP_NET
-
-
-// <<< Use Configuration Wizard in Context Menu >>>
-//  Build Target: Simple Client
-//   Callee IP Address
-//    Default: "192.168.1.100"
-#define CYASSL_CALLEE_IP           "192.168.2.101"
-//   Callee Port Number
-//    Default: "443"
-#define CYASSL_CALLEE_PORT           "443"
-//        HTTP GET Option <0=> HTTP Get <1=> SSL/TLS Message
-#define MDK_CONF_HTTP_GET 0
-#if MDK_CONF_HTTP_GET == 0
-    #define CYASSL_HTTP_GET "-g"
-		#define CYASSL_HTTP_GET_COUNT  1
-#elif MDK_CONF_HTTP_GET == 1
-    #define CYASSL_HTTP_GET ""
-		#define CYASSL_HTTP_GET_COUNT  0
-#endif
-//        SSL/TLS Version <0=> SSL3 <1=> TLS 1.0 <2=> TLS 1.1 <3=> TLS 1.2
-#define MDK_CONF_SSL_VERSION 0
-#if MDK_CONF_SSL_VERSION  == 0
-    #define CYASSL_SSL_VER  "0"
-#elif MDK_CONF_SSL_VERSION  == 1
-    #define CYASSL_SSL_VER  "1"
-#elif MDK_CONF_SSL_VERSION  == 2
-    #define CYASSL_SSL_VER  "2"
-#elif MDK_CONF_SSL_VERSION  == 3
-    #define CYASSL_SSL_VER  "3"
-#endif
-
-//     
-// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-Crypt.h b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-Crypt.h
deleted file mode 100644
index a11c3ef24..000000000
--- a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-Crypt.h
+++ /dev/null
@@ -1,185 +0,0 @@
-/* config-FS.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-//  wolfCrypt Configuration
-
-//  Cert/Key Strage
-//        Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes)
-#define MDK_CONF_CERT_BUFF 0
-#if MDK_CONF_CERT_BUFF== 1
-#define USE_CERT_BUFFERS_1024
-#elif MDK_CONF_CERT_BUFF == 2
-#define USE_CERT_BUFFERS_2048
-#endif
-//
-
-//  Crypt Algrithm
-
-//       MD5, SHA, SHA-256, AES, RC4, ASN, RSA
-//        
-
-//      MD2
-#define MDK_CONF_MD2 0
-#if MDK_CONF_MD2 == 1
-#define CYASSL_MD2
-#endif
-//  
-//      MD4
-#define MDK_CONF_MD4 1
-#if MDK_CONF_MD4 == 0
-#define NO_MD4
-#endif
-//  
-//      SHA-384
-//          This has to be with SHA512
-#define MDK_CONF_SHA384 0
-#if MDK_CONF_SHA384 == 1
-#define CYASSL_SHA384
-#endif
-//  
-//      SHA-512          
-#define MDK_CONF_SHA512     0
-#if MDK_CONF_SHA512     == 1
-#define CYASSL_SHA512   
-#endif
-//  
-//      RIPEMD
-#define MDK_CONF_RIPEMD 0
-#if MDK_CONF_RIPEMD == 1
-#define CYASSL_RIPEMD
-#endif
-//  
-//      HMAC
-#define MDK_CONF_HMAC 1
-#if MDK_CONF_HMAC == 0
-#define NO_HMAC
-#endif
-//  
-//      HC128
-#define MDK_CONF_HC128 0
-#if MDK_CONF_HC128 == 1
-#define HAVE_HC128
-#endif
-//  
-//  RABBIT
-#define MDK_CONF_RABBIT 1
-#if MDK_CONF_RABBI == 0
-#define NO_RABBIT
-#endif
-//  
-
-//      AEAD     
-#define MDK_CONF_AEAD 0
-#if MDK_CONF_AEAD == 1
-#define HAVE_AEAD
-#endif
-//  
-//      DES3
-#define MDK_CONF_DES3 1
-#if MDK_CONF_DES3 == 0
-#define NO_DES3
-#endif
-//  
-//      CAMELLIA
-#define MDK_CONF_CAMELLIA 0
-#if MDK_CONF_CAMELLIA == 1
-#define HAVE_CAMELLIA
-#endif
-//  
-
-//      DH
-//              need this for CYASSL_SERVER, OPENSSL_EXTRA
-#define MDK_CONF_DH 1
-#if MDK_CONF_DH == 0
-#define NO_DH
-#endif
-//  
-//      DSA
-#define MDK_CONF_DSA 1 
-#if MDK_CONF_DSA == 0
-#define NO_DSA
-#endif
-//  
-//      PWDBASED
-#define MDK_CONF_PWDBASED 1
-#if MDK_CONF_PWDBASED == 0
-#define NO_PWDBASED
-#endif
-//  
-
-//      ECC
-#define MDK_CONF_ECC 0
-#if MDK_CONF_ECC == 1
-#define HAVE_ECC
-#endif
-//  
-//      PSK
-#define MDK_CONF_PSK 1
-#if MDK_CONF_PSK == 0
-#define NO_PSK
-#endif
-//  
-//      AESCCM (Turn off Hardware Crypt)
-#define MDK_CONF_AESCCM 0
-#if MDK_CONF_AESCCM == 1
-#define HAVE_AESCCM
-#endif
-//  
-//      AESGCM (Turn off Hardware Crypt)
-#define MDK_CONF_AESGCM 0
-#if MDK_CONF_AESGCM == 1
-#define HAVE_AESGCM
-#define BUILD_AESGCM
-#endif
-//  
-//      NTRU (need License, "crypto_ntru.h")
-#define MDK_CONF_NTRU 0
-#if MDK_CONF_NTRU == 1
-#define HAVE_NTRU
-#endif
-//  
-//  
-
-//  Hardware Crypt (See document for usage)
-//      Hardware RNG
-#define MDK_CONF_STM32F2_RNG 0
-#if MDK_CONF_STM32F2_RNG == 1
-#define STM32F2_RNG
-#else
-
-#endif
-//  
-//      Hardware Crypt
-#define MDK_CONF_STM32F2_CRYPTO 0
-#if MDK_CONF_STM32F2_CRYPTO == 1
-#define STM32F2_CRYPTO
-#endif
-//  
-
-// 
-
-
-
-//
-// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-CyaSSL.h b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-CyaSSL.h
deleted file mode 100644
index 02ba94bd4..000000000
--- a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config-CyaSSL.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/* config-RTX-TCP-FS.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-/**** CyaSSL for KEIL-RL Configuration ****/
-
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define NO_MAIN_DRIVER
-
-
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
-
-#define HAVE_KEIL_RTX
-#define CYASSL_CMSIS_RTOS
-#define CYASSL_KEIL_TCP_NET
-
-
-// <<< Use Configuration Wizard in Context Menu >>>
-//  CyaSSL Configuration
-
-//     SSL (Included by default)
-//     
-
-//      TLS 
-#define MDK_CONF_TLS 1
-#if MDK_CONF_TLS == 0
-#define NO_TLS
-#endif
-//  
-
-//      CRL
-#define MDK_CONF_DER_LOAD 0
-#if MDK_CONF_DER_LOAD == 1
-#define CYASSL_DER_LOAD
-#endif
-//  
-//      OpenSSL Extra
-#define MDK_CONF_OPENSSL_EXTRA 1
-#if MDK_CONF_OPENSSL_EXTRA == 1
-#define OPENSSL_EXTRA
-#endif
-//  
-//
-
-//  Cert/Key Generation
-//      CertGen
-#define MDK_CONF_CERT_GEN 0
-#if MDK_CONF_CERT_GEN == 1
-#define CYASSL_CERT_GEN
-#endif
-//  
-//      KeyGen
-#define MDK_CONF_KEY_GEN 0
-#if MDK_CONF_KEY_GEN == 1
-#define CYASSL_KEY_GEN
-#endif
-//  
-//
-
-//  Others
-
-//      Inline
-#define MDK_CONF_INLINE 0
-#if MDK_CONF_INLINE == 0
-#define NO_INLINE
-#endif
-//  
-//      Debug
-//              Debug Message
-#define MDK_CONF_DebugMessage 0
-#if MDK_CONF_DebugMessage == 1
-#define DEBUG_CYASSL
-#endif
-//         
-//              Check malloc
-#define MDK_CONF_CheckMalloc 1
-#if MDK_CONF_CheckMalloc == 1
-#define CYASSL_MALLOC_CHECK
-#endif
-//         
-
-
-//  
-//      ErrNo.h
-#define MDK_CONF_ErrNo 0
-#if MDK_CONF_ErrNo == 1
-#define HAVE_ERRNO
-#endif
-//  
-//      Error Strings
-#define MDK_CONF_ErrorStrings 1
-#if MDK_CONF_ErrorStrings == 0
-#define NO_ERROR_STRINGS
-#endif
-//  
-//      zlib (need "zlib.h")
-#define MDK_CONF_LIBZ 0
-#if MDK_CONF_LIBZ == 1
-#define HAVE_LIBZ
-#endif
-//  
-//      CAVIUM (need CAVIUM headers)
-#define MDK_CONF_CAVIUM 0
-#if MDK_CONF_CAVIUM == 1
-#define HAVE_CAVIUM
-#endif
-//  
-//      Small Stack
-#define MDK_CONF_SmallStack 1
-#if MDK_CONF_SmallStack == 0
-#define NO_CYASSL_SMALL_STACK
-#endif
-//  
-//      Use Fast Math
-#define MDK_CONF_FASTMATH 0
-#if MDK_CONF_FASTMATH == 1
-#define USE_FAST_MATH
-#endif
-//  
-//  
-
-// <<< end of configuration section >>>
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config.h b/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config.h
deleted file mode 100644
index 4c8fcb01c..000000000
--- a/IDE/MDK5-ARM/Projects/SimpleServer/RTE/wolfSSL/config.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/* config.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define CYASSL_MDK5
-
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define BENCH_EMBEDDED
-
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
-#define NO_MAIN_DRIVER
-
-#if  defined(MDK_CONF_CYASSL)
-#define CYASSL_MDK_SHELL
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_SimpleServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoClient)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_EchoServer)
-#include "config-Crypt.h"
-#include "config-CyaSSL.h"
-#elif  defined(MDK_CONF_Benchmark)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-#elif  defined(MDK_CONF_CryptTest)
-#define SINGLE_THREADED
-#define NO_INLINE
-#include "config-Crypt.h"
-
-#endif
-
-
diff --git a/IDE/MDK5-ARM/Projects/SimpleServer/server.c b/IDE/MDK5-ARM/Projects/SimpleServer/server.c
index de53738e8..ecc9b510b 100644
--- a/IDE/MDK5-ARM/Projects/SimpleServer/server.c
+++ b/IDE/MDK5-ARM/Projects/SimpleServer/server.c
@@ -418,7 +418,7 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
 #ifdef HAVE_SNI
     if (sniHostName) {
         if (CyaSSL_CTX_UseSNI(ctx, CYASSL_SNI_HOST_NAME, sniHostName,
-                                                          XSTRLEN(sniHostName)))
+                                           XSTRLEN(sniHostName)) != SSL_SUCCESS)
             err_sys("UseSNI failed");
         else
             CyaSSL_CTX_SNI_SetOptions(ctx, CYASSL_SNI_HOST_NAME,
diff --git a/Makefile.am b/Makefile.am
index 651b60afb..02fea25cc 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -62,6 +62,7 @@ include mqx/ctaocrypt_test/Sources/include.am
 include mqx/cyassl/include.am
 include mqx/cyassl_client/Sources/include.am
 include mqx/util_lib/Sources/include.am
+include mplabx/include.am
 include mplabx/ctaocrypt_benchmark.X/nbproject/include.am
 include mplabx/ctaocrypt_test.X/nbproject/include.am
 include mplabx/cyassl.X/nbproject/include.am
diff --git a/README b/README
index 8f4e61ee8..e8c6c4965 100644
--- a/README
+++ b/README
@@ -23,10 +23,10 @@ beginning of the note and specify the full path.
 Note 2)
 CyaSSL takes a different approach to certificate verification than OpenSSL does.
 The default policy for the client is to verify the server, this means that if
-you don't load CAs to verify the server you'll get a connect error, unable to 
-verify (-155).  It you want to mimic OpenSSL behavior of having SSL_connect
-succeed even if verifying the server fails and reducing security you can do
-this by calling:
+you don't load CAs to verify the server you'll get a connect error, no signer
+error to confirm failure (-188).  If you want to mimic OpenSSL behavior of
+having SSL_connect succeed even if verifying the server fails and reducing
+security you can do this by calling:
 
 SSL_CTX_set_verify(ctx, SSL_VERIFY_NONE, 0);
 
@@ -35,12 +35,43 @@ before calling SSL_new();  Though it's not recommended.
 *** end Notes ***
 
 
-CyaSSL Release 2.9.0 (X/XX/XXXX)
+CyaSSL Release 2.9.0 (02/07/2014)
+
+Release 2.9.0 CyaSSL has bug fixes and new features including:
+- Freescale Kinetis RNGB support
+- Freescale Kinetis mmCAU support
+- TLS Hello extensions
+  - ECC
+  - Secure Renegotiation (null) 
+  - Truncated HMAC
+- SCEP support
+  - PKCS #7 Enveloped data and signed data
+  - PKCS #10 Certificate Signing Request generation
+- DTLS sliding window
+- OCSP Improvements
+  - API change to integrate into Certificate Manager
+  - IPv4/IPv6 agnostic
+  - example client/server support for OCSP
+  - OCSP nonces are optional
+- GMAC hashing
+- Windows build additions
+- Windows CYGWIN build fixes
+- Updated test certificates
+- Microchip MPLAB Harmony support
+- Update autoconf scripts
+- Additional X.509 inspection functions
+- ECC encrypt/decrypt primitives
+- ECC Certificate generation
 
 The Freescale Kinetis K53 RNGB documentation can be found in Chapter 33 of the
 K53 Sub-Family Reference Manual:
 http://cache.freescale.com/files/32bit/doc/ref_manual/K53P144M100SF2RM.pdf
 
+Freescale Kinetis K60 mmCAU (AES, DES, 3DES, MD5, SHA, SHA256) documentation
+can be found in the "ColdFire/ColdFire+ CAU and Kinetis mmCAU Software Library
+User Guide":
+http://cache.freescale.com/files/32bit/doc/user_guide/CAUAPIUG.pdf
+
 
 *****************CyaSSL Release 2.8.0 (8/30/2013)
 
diff --git a/certs/crl/cliCrl.pem b/certs/crl/cliCrl.pem
index d94d778e7..e623562a9 100644
--- a/certs/crl/cliCrl.pem
+++ b/certs/crl/cliCrl.pem
@@ -2,38 +2,40 @@ Certificate Revocation List (CRL):
         Version 2 (0x1)
     Signature Algorithm: sha1WithRSAEncryption
         Issuer: /C=US/ST=Oregon/L=Portland/O=yaSSL/OU=Programming/CN=www.yassl.com/emailAddress=info@yassl.com
-        Last Update: Jun 17 21:32:30 2013 GMT
-        Next Update: Dec 14 21:32:30 2013 GMT
+        Last Update: Feb  7 20:14:06 2014 GMT
+        Next Update: Feb  7 20:14:06 2015 GMT
         CRL extensions:
             X509v3 CRL Number: 
-                87
-No Revoked Certificates.
+                3
+Revoked Certificates:
+    Serial Number: 02
+        Revocation Date: Feb  7 20:14:06 2014 GMT
     Signature Algorithm: sha1WithRSAEncryption
-         0f:16:d2:d6:62:f8:c0:db:b2:2c:de:9d:0a:10:72:0e:85:6e:
-         25:1d:38:20:1b:d5:66:d9:d3:9e:0e:a6:9e:e8:60:20:1c:b5:
-         c9:ab:09:c3:a5:d5:c3:91:a3:9a:ff:44:40:68:da:7b:da:4a:
-         3c:15:17:89:0a:49:b9:af:b2:ac:f0:e2:b5:0e:4d:c0:22:d7:
-         5e:c1:02:9e:f3:95:20:62:7c:88:d9:32:97:12:04:1a:6f:8c:
-         d8:7b:9f:0c:1e:91:fe:98:52:17:de:f2:ee:7c:66:e7:db:91:
-         99:7a:f7:09:c9:15:16:3d:a2:1c:13:af:ad:e0:70:b8:6b:e5:
-         dc:8e:f8:b5:ec:ff:f7:88:1b:ce:46:eb:22:ff:10:2f:ea:53:
-         f0:86:62:1a:ab:6f:4d:05:45:e8:5c:ba:b5:8d:0d:38:72:cd:
-         df:a1:74:31:bb:ad:68:7d:56:be:d8:7e:7a:f5:ef:52:be:14:
-         5c:6d:ed:b4:2a:c9:ab:97:ba:e8:93:c5:6b:79:66:c7:52:a8:
-         0d:62:dc:cb:e2:4c:e6:53:f4:c3:5c:ce:47:0f:39:46:9a:cb:
-         82:d9:98:7d:69:41:aa:ac:6a:7a:e9:02:c9:9b:77:59:7f:6a:
-         90:54:10:8a:45:c7:49:5f:ca:be:66:6a:20:e1:cd:e8:10:09:
-         30:7e:16:44
+         36:33:8d:75:7a:2c:40:dc:e2:64:71:de:1d:06:b4:0e:d3:98:
+         63:05:79:84:53:76:9b:aa:51:70:a1:3a:ab:12:f7:da:69:70:
+         34:5b:4d:08:01:a6:3b:16:25:ac:3d:11:0c:80:94:bc:dc:b5:
+         51:7c:84:11:65:d7:d2:24:16:f5:ac:11:0b:ea:72:62:4a:cb:
+         83:c1:6c:96:ec:6b:ce:1f:26:88:89:8a:74:90:fb:d3:67:91:
+         8c:f7:ef:0e:ca:81:39:22:89:1a:52:75:d0:13:ba:ee:83:0c:
+         61:e9:b4:d8:f1:3f:80:77:29:d2:bb:7e:81:29:a8:fb:1f:ad:
+         92:91:bd:e9:b8:29:3f:a3:ec:44:b5:09:e5:03:3c:1b:2d:df:
+         4c:27:45:94:da:be:50:dd:b9:78:3f:1f:92:92:59:a5:ad:5a:
+         ef:95:71:ff:ca:ff:db:70:53:17:aa:00:40:9b:4c:ff:fb:be:
+         73:7a:8e:0f:07:9b:b9:14:fd:a4:b4:d7:79:4b:3e:ff:c6:90:
+         ef:91:2e:a2:f3:ee:4b:1f:16:47:2a:a3:39:f9:b5:fd:74:fa:
+         8f:c4:15:8d:77:7f:46:78:6f:ba:a5:4e:bc:63:8f:39:63:c9:
+         68:3d:8f:02:3a:4a:d0:d5:c4:47:6a:2c:4d:6c:d5:e2:a7:5f:
+         35:ba:65:e4
 -----BEGIN X509 CRL-----
-MIIB6DCB0QIBATANBgkqhkiG9w0BAQUFADCBjjELMAkGA1UEBhMCVVMxDzANBgNV
+MIIB/jCB5wIBATANBgkqhkiG9w0BAQUFADCBjjELMAkGA1UEBhMCVVMxDzANBgNV
 BAgTBk9yZWdvbjERMA8GA1UEBxMIUG9ydGxhbmQxDjAMBgNVBAoTBXlhU1NMMRQw
 EgYDVQQLEwtQcm9ncmFtbWluZzEWMBQGA1UEAxMNd3d3Lnlhc3NsLmNvbTEdMBsG
-CSqGSIb3DQEJARYOaW5mb0B5YXNzbC5jb20XDTEzMDYxNzIxMzIzMFoXDTEzMTIx
-NDIxMzIzMFqgDjAMMAoGA1UdFAQDAgFXMA0GCSqGSIb3DQEBBQUAA4IBAQAPFtLW
-YvjA27Is3p0KEHIOhW4lHTggG9Vm2dOeDqae6GAgHLXJqwnDpdXDkaOa/0RAaNp7
-2ko8FReJCkm5r7Ks8OK1Dk3AItdewQKe85UgYnyI2TKXEgQab4zYe58MHpH+mFIX
-3vLufGbn25GZevcJyRUWPaIcE6+t4HC4a+Xcjvi17P/3iBvORusi/xAv6lPwhmIa
-q29NBUXoXLq1jQ04cs3foXQxu61ofVa+2H569e9SvhRcbe20Ksmrl7rok8VreWbH
-UqgNYtzL4kzmU/TDXM5HDzlGmsuC2Zh9aUGqrGp66QLJm3dZf2qQVBCKRcdJX8q+
-Zmog4c3oEAkwfhZE
+CSqGSIb3DQEJARYOaW5mb0B5YXNzbC5jb20XDTE0MDIwNzIwMTQwNloXDTE1MDIw
+NzIwMTQwNlowFDASAgECFw0xNDAyMDcyMDE0MDZaoA4wDDAKBgNVHRQEAwIBAzAN
+BgkqhkiG9w0BAQUFAAOCAQEANjONdXosQNziZHHeHQa0DtOYYwV5hFN2m6pRcKE6
+qxL32mlwNFtNCAGmOxYlrD0RDICUvNy1UXyEEWXX0iQW9awRC+pyYkrLg8Fsluxr
+zh8miImKdJD702eRjPfvDsqBOSKJGlJ10BO67oMMYem02PE/gHcp0rt+gSmo+x+t
+kpG96bgpP6PsRLUJ5QM8Gy3fTCdFlNq+UN25eD8fkpJZpa1a75Vx/8r/23BTF6oA
+QJtM//u+c3qODwebuRT9pLTXeUs+/8aQ75EuovPuSx8WRyqjOfm1/XT6j8QVjXd/
+RnhvuqVOvGOPOWPJaD2PAjpK0NXER2osTWzV4qdfNbpl5A==
 -----END X509 CRL-----
diff --git a/certs/crl/crl.pem b/certs/crl/crl.pem
index 06ebdebe2..d93a4707e 100644
--- a/certs/crl/crl.pem
+++ b/certs/crl/crl.pem
@@ -2,38 +2,38 @@ Certificate Revocation List (CRL):
         Version 2 (0x1)
     Signature Algorithm: sha1WithRSAEncryption
         Issuer: /C=US/ST=Montana/L=Bozeman/O=Sawtooth/OU=Consulting/CN=www.yassl.com/emailAddress=info@yassl.com
-        Last Update: Jun 17 21:32:30 2013 GMT
-        Next Update: Dec 14 21:32:30 2013 GMT
+        Last Update: Feb  7 20:14:06 2014 GMT
+        Next Update: Feb  7 20:14:06 2015 GMT
         CRL extensions:
             X509v3 CRL Number: 
-                85
+                1
 No Revoked Certificates.
     Signature Algorithm: sha1WithRSAEncryption
-         4d:9c:63:22:02:91:fe:52:35:93:7c:b6:5b:e8:86:5a:29:a2:
-         4d:9a:bc:d9:16:e0:8a:04:90:4d:ae:21:00:be:9c:81:5b:68:
-         6e:90:1a:fd:1a:37:70:85:50:f2:02:87:1c:38:f4:ef:9d:41:
-         f5:4f:53:66:d4:c0:22:80:00:82:7a:09:42:49:c3:1c:c9:4c:
-         9f:92:f9:66:f4:21:1f:24:67:4f:83:6a:bd:3a:19:f1:04:99:
-         ea:30:05:bf:a7:3d:bf:71:ac:3e:3a:ba:2a:c5:05:12:53:eb:
-         5c:6f:ed:2d:4b:c0:f5:00:e1:95:45:c9:62:b5:89:66:4b:2b:
-         01:fc:66:29:a3:0a:9a:05:ae:f7:9f:51:2a:9c:3b:18:03:ed:
-         c4:7c:33:62:93:30:49:ab:c4:d1:07:f4:18:ac:96:24:1e:c2:
-         fa:37:ed:82:db:06:66:8d:fb:25:93:35:7b:39:88:e8:8e:70:
-         e9:c8:be:00:c4:f7:a7:67:83:f8:3d:af:8b:71:5b:25:3b:1d:
-         56:cd:d0:15:86:31:d1:cb:57:3a:00:b5:1c:7c:3e:99:44:ce:
-         bc:89:a7:78:37:50:ed:a1:b6:16:cd:72:20:c9:1f:60:b2:8a:
-         c5:62:30:26:f0:aa:b6:73:ca:8e:d6:ba:31:0a:21:a2:6e:40:
-         4b:66:30:11
+         4b:c1:68:4f:80:01:0e:ab:ff:c1:8f:5e:e5:3c:01:7a:fd:9c:
+         bb:21:b3:68:73:7c:e9:dc:c5:70:a8:fd:1b:74:27:c2:9e:7d:
+         11:9c:95:b9:fb:73:ac:50:bb:b7:4a:5e:f1:f3:44:b4:7c:b5:
+         21:0f:32:48:2e:b2:03:95:a7:09:6b:25:87:c3:1d:9c:3f:8f:
+         69:91:30:fb:e5:a1:b2:26:1a:ed:8f:73:06:2d:bd:bc:72:f4:
+         b8:bd:63:61:90:c7:91:2b:68:52:51:47:0d:d6:a1:79:b8:4b:
+         bc:30:57:94:fa:b7:49:80:1a:1f:4d:aa:a3:8b:cd:8f:5d:8e:
+         ad:8b:d6:d1:5b:c1:cf:f2:0c:60:22:19:87:42:db:42:8b:aa:
+         47:36:4d:20:eb:cb:72:ce:4b:48:1b:f3:4d:0b:e0:f8:58:27:
+         65:60:e7:97:50:83:a9:80:58:62:a8:02:ac:4e:37:79:42:47:
+         65:aa:55:ca:7c:9a:9c:bf:6c:36:89:f3:f7:60:d3:30:be:d4:
+         ce:f1:af:41:7e:02:75:6e:82:86:96:b9:16:07:15:29:c0:65:
+         4d:2f:13:4f:01:ec:47:f1:af:36:0a:d6:a1:dc:81:57:18:2d:
+         00:7b:d4:49:88:c0:61:81:0e:cd:a7:39:6a:53:2a:7c:91:3d:
+         ac:62:8d:49
 -----BEGIN X509 CRL-----
 MIIB6jCB0wIBATANBgkqhkiG9w0BAQUFADCBkDELMAkGA1UEBhMCVVMxEDAOBgNV
 BAgTB01vbnRhbmExEDAOBgNVBAcTB0JvemVtYW4xETAPBgNVBAoTCFNhd3Rvb3Ro
 MRMwEQYDVQQLEwpDb25zdWx0aW5nMRYwFAYDVQQDEw13d3cueWFzc2wuY29tMR0w
-GwYJKoZIhvcNAQkBFg5pbmZvQHlhc3NsLmNvbRcNMTMwNjE3MjEzMjMwWhcNMTMx
-MjE0MjEzMjMwWqAOMAwwCgYDVR0UBAMCAVUwDQYJKoZIhvcNAQEFBQADggEBAE2c
-YyICkf5SNZN8tlvohlopok2avNkW4IoEkE2uIQC+nIFbaG6QGv0aN3CFUPIChxw4
-9O+dQfVPU2bUwCKAAIJ6CUJJwxzJTJ+S+Wb0IR8kZ0+Dar06GfEEmeowBb+nPb9x
-rD46uirFBRJT61xv7S1LwPUA4ZVFyWK1iWZLKwH8ZimjCpoFrvefUSqcOxgD7cR8
-M2KTMEmrxNEH9BisliQewvo37YLbBmaN+yWTNXs5iOiOcOnIvgDE96dng/g9r4tx
-WyU7HVbN0BWGMdHLVzoAtRx8PplEzryJp3g3UO2hthbNciDJH2CyisViMCbwqrZz
-yo7WujEKIaJuQEtmMBE=
+GwYJKoZIhvcNAQkBFg5pbmZvQHlhc3NsLmNvbRcNMTQwMjA3MjAxNDA2WhcNMTUw
+MjA3MjAxNDA2WqAOMAwwCgYDVR0UBAMCAQEwDQYJKoZIhvcNAQEFBQADggEBAEvB
+aE+AAQ6r/8GPXuU8AXr9nLshs2hzfOncxXCo/Rt0J8KefRGclbn7c6xQu7dKXvHz
+RLR8tSEPMkgusgOVpwlrJYfDHZw/j2mRMPvlobImGu2PcwYtvbxy9Li9Y2GQx5Er
+aFJRRw3WoXm4S7wwV5T6t0mAGh9NqqOLzY9djq2L1tFbwc/yDGAiGYdC20KLqkc2
+TSDry3LOS0gb800L4PhYJ2Vg55dQg6mAWGKoAqxON3lCR2WqVcp8mpy/bDaJ8/dg
+0zC+1M7xr0F+AnVugoaWuRYHFSnAZU0vE08B7EfxrzYK1qHcgVcYLQB71EmIwGGB
+Ds2nOWpTKnyRPaxijUk=
 -----END X509 CRL-----
diff --git a/certs/crl/crl.revoked b/certs/crl/crl.revoked
index 734593600..b67ee676d 100644
--- a/certs/crl/crl.revoked
+++ b/certs/crl/crl.revoked
@@ -2,40 +2,40 @@ Certificate Revocation List (CRL):
         Version 2 (0x1)
     Signature Algorithm: sha1WithRSAEncryption
         Issuer: /C=US/ST=Montana/L=Bozeman/O=Sawtooth/OU=Consulting/CN=www.yassl.com/emailAddress=info@yassl.com
-        Last Update: Jun 17 21:32:30 2013 GMT
-        Next Update: Dec 14 21:32:30 2013 GMT
+        Last Update: Feb  7 20:14:06 2014 GMT
+        Next Update: Feb  7 20:14:06 2015 GMT
         CRL extensions:
             X509v3 CRL Number: 
-                86
+                2
 Revoked Certificates:
     Serial Number: 02
-        Revocation Date: Jun 17 21:32:30 2013 GMT
+        Revocation Date: Feb  7 20:14:06 2014 GMT
     Signature Algorithm: sha1WithRSAEncryption
-         87:3b:bb:ac:6b:1a:e8:96:87:6f:a3:8e:39:77:28:01:a7:ea:
-         76:36:c2:48:e2:41:02:3f:f3:f7:64:09:60:91:87:9e:57:74:
-         38:a0:c3:20:47:7d:82:4b:2c:34:23:fe:66:dc:2b:3e:8a:a1:
-         d9:e3:06:ec:75:0f:b1:ef:32:e2:28:ab:7d:40:2c:82:59:74:
-         c9:95:b5:62:a6:6a:8e:34:e6:f6:f8:91:ff:aa:c1:21:93:79:
-         cb:6f:dc:be:94:21:b1:c8:dd:9e:b8:fe:ad:e8:50:6e:0d:76:
-         92:32:54:51:96:cd:c7:be:d2:0f:6f:63:69:5f:b3:28:c1:57:
-         0e:61:f7:62:81:9f:ea:e7:a5:14:89:41:56:63:46:da:bc:d8:
-         e0:78:44:c6:c7:1a:ab:1b:f1:0b:59:d5:4e:6d:14:bc:16:c2:
-         02:43:06:0b:f4:16:6e:26:8c:36:09:61:0c:53:3f:72:85:64:
-         33:4d:bf:70:44:c8:23:83:c3:51:98:a8:14:f7:b2:03:a1:7b:
-         72:48:4d:24:d0:a8:a9:22:3d:9b:94:bf:24:24:01:6f:2e:4b:
-         2b:21:24:8f:64:46:20:79:45:b3:45:1a:4f:93:10:e1:8d:04:
-         4c:8d:83:63:96:9f:28:c5:37:0f:10:8e:02:9b:4d:96:8b:ea:
-         a3:31:88:9f
+         10:5d:b1:d0:79:d2:8a:15:2d:40:0b:44:d6:d9:df:58:73:eb:
+         55:2c:81:fe:e1:7b:62:48:8f:34:c5:06:51:e5:e8:50:70:8c:
+         12:ba:e3:6e:fe:7d:0d:ce:44:08:9d:dc:d9:57:43:6c:54:12:
+         82:d4:ed:6c:71:e5:74:44:bd:d1:a8:98:96:63:8b:68:5f:d2:
+         87:28:dd:99:4f:aa:ba:8e:18:9e:c4:4f:69:9e:66:13:03:28:
+         5f:3c:35:01:15:77:22:7c:ed:c5:4a:67:44:af:85:7f:df:8a:
+         fd:49:8b:e1:be:52:e3:ca:e8:ae:a3:ad:07:91:2c:51:c6:28:
+         5f:26:17:14:39:5d:4e:21:9f:11:6f:c4:a2:ef:ef:b8:ec:27:
+         af:45:ad:b9:ed:e0:14:09:60:a0:50:ee:dd:f7:b1:3e:58:c4:
+         0d:e8:b5:0b:a9:0d:98:ad:7c:74:ab:1c:d6:fa:c8:7d:e7:5a:
+         3b:91:23:d5:62:ba:d4:e4:be:58:78:fe:09:ba:63:f6:9e:2c:
+         3f:93:c2:fe:de:c5:00:21:50:39:91:ac:71:e6:fc:4a:37:a4:
+         e4:e9:5e:e7:ac:8d:95:21:d6:76:aa:10:a8:3c:28:3e:ef:1c:
+         64:58:e9:1e:f6:7e:54:f3:cb:bb:ed:6f:5d:27:5a:b1:4b:91:
+         8e:8c:67:7d
 -----BEGIN X509 CRL-----
 MIICADCB6QIBATANBgkqhkiG9w0BAQUFADCBkDELMAkGA1UEBhMCVVMxEDAOBgNV
 BAgTB01vbnRhbmExEDAOBgNVBAcTB0JvemVtYW4xETAPBgNVBAoTCFNhd3Rvb3Ro
 MRMwEQYDVQQLEwpDb25zdWx0aW5nMRYwFAYDVQQDEw13d3cueWFzc2wuY29tMR0w
-GwYJKoZIhvcNAQkBFg5pbmZvQHlhc3NsLmNvbRcNMTMwNjE3MjEzMjMwWhcNMTMx
-MjE0MjEzMjMwWjAUMBICAQIXDTEzMDYxNzIxMzIzMFqgDjAMMAoGA1UdFAQDAgFW
-MA0GCSqGSIb3DQEBBQUAA4IBAQCHO7usaxrolodvo445dygBp+p2NsJI4kECP/P3
-ZAlgkYeeV3Q4oMMgR32CSyw0I/5m3Cs+iqHZ4wbsdQ+x7zLiKKt9QCyCWXTJlbVi
-pmqONOb2+JH/qsEhk3nLb9y+lCGxyN2euP6t6FBuDXaSMlRRls3HvtIPb2NpX7Mo
-wVcOYfdigZ/q56UUiUFWY0bavNjgeETGxxqrG/ELWdVObRS8FsICQwYL9BZuJow2
-CWEMUz9yhWQzTb9wRMgjg8NRmKgU97IDoXtySE0k0KipIj2blL8kJAFvLksrISSP
-ZEYgeUWzRRpPkxDhjQRMjYNjlp8oxTcPEI4Cm02Wi+qjMYif
+GwYJKoZIhvcNAQkBFg5pbmZvQHlhc3NsLmNvbRcNMTQwMjA3MjAxNDA2WhcNMTUw
+MjA3MjAxNDA2WjAUMBICAQIXDTE0MDIwNzIwMTQwNlqgDjAMMAoGA1UdFAQDAgEC
+MA0GCSqGSIb3DQEBBQUAA4IBAQAQXbHQedKKFS1AC0TW2d9Yc+tVLIH+4XtiSI80
+xQZR5ehQcIwSuuNu/n0NzkQIndzZV0NsVBKC1O1sceV0RL3RqJiWY4toX9KHKN2Z
+T6q6jhiexE9pnmYTAyhfPDUBFXcifO3FSmdEr4V/34r9SYvhvlLjyuiuo60HkSxR
+xihfJhcUOV1OIZ8Rb8Si7++47CevRa257eAUCWCgUO7d97E+WMQN6LULqQ2YrXx0
+qxzW+sh951o7kSPVYrrU5L5YeP4JumP2niw/k8L+3sUAIVA5kaxx5vxKN6Tk6V7n
+rI2VIdZ2qhCoPCg+7xxkWOke9n5U88u77W9dJ1qxS5GOjGd9
 -----END X509 CRL-----
diff --git a/certs/crl/eccCliCRL.pem b/certs/crl/eccCliCRL.pem
index d83afecd7..5cfe2d566 100644
--- a/certs/crl/eccCliCRL.pem
+++ b/certs/crl/eccCliCRL.pem
@@ -2,23 +2,25 @@ Certificate Revocation List (CRL):
         Version 2 (0x1)
     Signature Algorithm: ecdsa-with-SHA1
         Issuer: /C=US/ST=Oregon/L=Salem/O=Client ECC/OU=Fast/CN=www.yassl.com/emailAddress=info@yassl.com
-        Last Update: Jun 17 21:32:30 2013 GMT
-        Next Update: Dec 14 21:32:30 2013 GMT
+        Last Update: Feb  7 20:14:06 2014 GMT
+        Next Update: Feb  7 20:14:06 2015 GMT
         CRL extensions:
             X509v3 CRL Number: 
-                88
-No Revoked Certificates.
+                4
+Revoked Certificates:
+    Serial Number: 02
+        Revocation Date: Feb  7 20:14:06 2014 GMT
     Signature Algorithm: ecdsa-with-SHA1
-         30:45:02:21:00:eb:6e:1b:5d:f9:43:f9:67:5b:4e:d1:6d:30:
-         c7:c1:57:a3:e6:25:af:87:7a:77:8d:d9:89:47:1d:a4:64:0e:
-         21:02:20:11:20:49:d5:84:47:fa:12:61:46:ec:b6:db:0e:d0:
-         9d:3d:95:24:4f:a3:43:ab:d0:ad:dd:d9:61:b7:49:e2:5e
+         30:44:02:20:10:95:f9:c8:20:bc:7d:ce:79:6d:35:23:4c:82:
+         8c:f5:8b:d1:4f:69:a9:5e:70:97:dd:bb:c2:67:13:46:b0:47:
+         02:20:4f:1f:43:c2:cc:63:1c:6e:26:89:2d:e7:ce:69:45:6d:
+         fb:8f:53:cd:1f:84:0f:93:fe:83:91:69:f2:91:c6:f9
 -----BEGIN X509 CRL-----
-MIIBIDCByAIBATAJBgcqhkjOPQQBMIGJMQswCQYDVQQGEwJVUzEPMA0GA1UECBMG
+MIIBNTCB3gIBATAJBgcqhkjOPQQBMIGJMQswCQYDVQQGEwJVUzEPMA0GA1UECBMG
 T3JlZ29uMQ4wDAYDVQQHEwVTYWxlbTETMBEGA1UEChMKQ2xpZW50IEVDQzENMAsG
 A1UECxMERmFzdDEWMBQGA1UEAxMNd3d3Lnlhc3NsLmNvbTEdMBsGCSqGSIb3DQEJ
-ARYOaW5mb0B5YXNzbC5jb20XDTEzMDYxNzIxMzIzMFoXDTEzMTIxNDIxMzIzMFqg
-DjAMMAoGA1UdFAQDAgFYMAkGByqGSM49BAEDSAAwRQIhAOtuG135Q/lnW07RbTDH
-wVej5iWvh3p3jdmJRx2kZA4hAiARIEnVhEf6EmFG7LbbDtCdPZUkT6NDq9Ct3dlh
-t0niXg==
+ARYOaW5mb0B5YXNzbC5jb20XDTE0MDIwNzIwMTQwNloXDTE1MDIwNzIwMTQwNlow
+FDASAgECFw0xNDAyMDcyMDE0MDZaoA4wDDAKBgNVHRQEAwIBBDAJBgcqhkjOPQQB
+A0cAMEQCIBCV+cggvH3OeW01I0yCjPWL0U9pqV5wl927wmcTRrBHAiBPH0PCzGMc
+biaJLefOaUVt+49TzR+ED5P+g5Fp8pHG+Q==
 -----END X509 CRL-----
diff --git a/certs/crl/eccSrvCRL.pem b/certs/crl/eccSrvCRL.pem
index c62ce585a..48fae36f3 100644
--- a/certs/crl/eccSrvCRL.pem
+++ b/certs/crl/eccSrvCRL.pem
@@ -2,23 +2,25 @@ Certificate Revocation List (CRL):
         Version 2 (0x1)
     Signature Algorithm: ecdsa-with-SHA1
         Issuer: /C=US/ST=Washington/L=Seattle/O=Eliptic/OU=ECC/CN=www.yassl.com/emailAddress=info@yassl.com
-        Last Update: Jun 17 21:32:30 2013 GMT
-        Next Update: Dec 14 21:32:30 2013 GMT
+        Last Update: Feb  7 20:14:06 2014 GMT
+        Next Update: Feb  7 20:14:06 2015 GMT
         CRL extensions:
             X509v3 CRL Number: 
-                89
-No Revoked Certificates.
+                5
+Revoked Certificates:
+    Serial Number: 02
+        Revocation Date: Feb  7 20:14:06 2014 GMT
     Signature Algorithm: ecdsa-with-SHA1
-         30:44:02:20:0c:78:df:c4:4b:8b:e0:70:15:4f:f6:7d:82:d6:
-         0d:dd:a5:a0:e2:6a:95:4b:2b:6b:29:14:15:ba:51:0d:e3:1f:
-         02:20:2b:4b:1d:7c:9d:2f:5a:01:3d:9b:c1:94:cd:10:86:fe:
-         e2:9d:a0:b2:3c:97:10:ba:a6:56:43:78:b3:92:9b:0b
+         30:44:02:20:2a:2a:2c:ff:8a:0f:6a:74:57:b8:41:a8:5a:5c:
+         8c:7d:c1:7d:b1:76:a3:db:ff:22:1a:69:cd:80:8d:d5:e4:2a:
+         02:20:2d:51:3e:01:5b:79:6c:f4:89:89:63:46:0b:65:44:46:
+         59:2d:42:3e:ba:a8:6d:08:4a:20:1f:9a:06:cc:a9:65
 -----BEGIN X509 CRL-----
-MIIBITCBygIBATAJBgcqhkjOPQQBMIGLMQswCQYDVQQGEwJVUzETMBEGA1UECBMK
+MIIBNzCB4AIBATAJBgcqhkjOPQQBMIGLMQswCQYDVQQGEwJVUzETMBEGA1UECBMK
 V2FzaGluZ3RvbjEQMA4GA1UEBxMHU2VhdHRsZTEQMA4GA1UEChMHRWxpcHRpYzEM
 MAoGA1UECxMDRUNDMRYwFAYDVQQDEw13d3cueWFzc2wuY29tMR0wGwYJKoZIhvcN
-AQkBFg5pbmZvQHlhc3NsLmNvbRcNMTMwNjE3MjEzMjMwWhcNMTMxMjE0MjEzMjMw
-WqAOMAwwCgYDVR0UBAMCAVkwCQYHKoZIzj0EAQNHADBEAiAMeN/ES4vgcBVP9n2C
-1g3dpaDiapVLK2spFBW6UQ3jHwIgK0sdfJ0vWgE9m8GUzRCG/uKdoLI8lxC6plZD
-eLOSmws=
+AQkBFg5pbmZvQHlhc3NsLmNvbRcNMTQwMjA3MjAxNDA2WhcNMTUwMjA3MjAxNDA2
+WjAUMBICAQIXDTE0MDIwNzIwMTQwNlqgDjAMMAoGA1UdFAQDAgEFMAkGByqGSM49
+BAEDRwAwRAIgKios/4oPanRXuEGoWlyMfcF9sXaj2/8iGmnNgI3V5CoCIC1RPgFb
+eWz0iYljRgtlREZZLUI+uqhtCEogH5oGzKll
 -----END X509 CRL-----
diff --git a/certs/crl/gencrls.sh b/certs/crl/gencrls.sh
index a2ae48ff5..df7d27143 100755
--- a/certs/crl/gencrls.sh
+++ b/certs/crl/gencrls.sh
@@ -5,7 +5,7 @@
 
 
 # caCrl
-openssl ca -gencrl -crldays 180 -out crl.pem -keyfile ~/cyassl/certs/ca-key.pem -cert ~/cyassl/certs/ca-cert.pem
+openssl ca -gencrl -crldays 365 -out crl.pem -keyfile ~/cyassl/certs/ca-key.pem -cert ~/cyassl/certs/ca-cert.pem
 
 # metadata
 openssl crl -in crl.pem -text > tmp
@@ -17,7 +17,7 @@ cp crl.pem ~/cyassl/certs/crl/crl.pem
 openssl ca -revoke ~/cyassl/certs/server-cert.pem -keyfile ~/cyassl/certs/ca-key.pem -cert ~/cyassl/certs/ca-cert.pem
 
 # caCrl server revoked generation
-openssl ca -gencrl -crldays 180 -out crl.revoked -keyfile ~/cyassl/certs/ca-key.pem -cert ~/cyassl/certs/ca-cert.pem
+openssl ca -gencrl -crldays 365 -out crl.revoked -keyfile ~/cyassl/certs/ca-key.pem -cert ~/cyassl/certs/ca-cert.pem
 
 # metadata
 openssl crl -in crl.revoked -text > tmp
@@ -29,7 +29,7 @@ cp crl.revoked ~/cyassl/certs/crl/crl.revoked
 cp blank.index.txt demoCA/index.txt
 
 # cliCrl
-openssl ca -gencrl -crldays 180 -out cliCrl.pem -keyfile ~/cyassl/certs/client-key.pem -cert ~/cyassl/certs/client-cert.pem
+openssl ca -gencrl -crldays 365 -out cliCrl.pem -keyfile ~/cyassl/certs/client-key.pem -cert ~/cyassl/certs/client-cert.pem
 
 # metadata
 openssl crl -in cliCrl.pem -text > tmp
@@ -38,7 +38,7 @@ mv tmp cliCrl.pem
 cp cliCrl.pem ~/cyassl/certs/crl/cliCrl.pem
 
 # eccCliCRL
-openssl ca -gencrl -crldays 180 -out eccCliCRL.pem -keyfile ~/cyassl/certs/ecc-client-key.pem -cert ~/cyassl/certs/client-ecc-cert.pem
+openssl ca -gencrl -crldays 365 -out eccCliCRL.pem -keyfile ~/cyassl/certs/ecc-client-key.pem -cert ~/cyassl/certs/client-ecc-cert.pem
 
 # metadata
 openssl crl -in eccCliCRL.pem -text > tmp
@@ -47,7 +47,7 @@ mv tmp eccCliCRL.pem
 cp eccCliCRL.pem ~/cyassl/certs/crl/eccCliCRL.pem
 
 # eccSrvCRL
-openssl ca -gencrl -crldays 180 -out eccSrvCRL.pem -keyfile ~/cyassl/certs/ecc-key.pem -cert ~/cyassl/certs/server-ecc.pem
+openssl ca -gencrl -crldays 365 -out eccSrvCRL.pem -keyfile ~/cyassl/certs/ecc-key.pem -cert ~/cyassl/certs/server-ecc.pem
 
 # metadata
 openssl crl -in eccSrvCRL.pem -text > tmp
diff --git a/configure.ac b/configure.ac
index 57f16b732..6ba48ab95 100644
--- a/configure.ac
+++ b/configure.ac
@@ -6,7 +6,7 @@
 #
 #
 
-AC_INIT([cyassl],[2.8.3],[https://github.com/cyassl/cyassl/issues],[cyassl],[http://www.yassl.com])
+AC_INIT([cyassl],[2.9.0],[https://github.com/cyassl/cyassl/issues],[cyassl],[http://www.yassl.com])
 
 AC_CONFIG_AUX_DIR([build-aux])
 
@@ -33,7 +33,7 @@ AC_CONFIG_MACRO_DIR([m4])
 AC_CONFIG_HEADERS([config.h:config.in])dnl Keep filename to 8.3 for MS-DOS.
 
 #shared library versioning
-CYASSL_LIBRARY_VERSION=5:2:0
+CYASSL_LIBRARY_VERSION=5:3:0
 #                      | | |
 #               +------+ | +---+
 #               |        |     |
@@ -103,6 +103,8 @@ OPTIMIZE_FAST_CFLAGS="-O2 -fomit-frame-pointer"
 OPTIMIZE_HUGE_CFLAGS="-funroll-loops -DTFM_SMALL_SET -DTFM_HUGE_SET"
 DEBUG_CFLAGS="-g -DDEBUG -DDEBUG_CYASSL"
 
+# Thread local storage
+AX_TLS([AM_CFLAGS="$AM_CFLAGS -DHAVE_THREAD_LS"])
 
 # DEBUG
 AX_DEBUG
@@ -308,17 +310,20 @@ fi
 
 
 # SNIFFER
+ENABLED_SNIFFTEST=no
 AC_ARG_ENABLE([sniffer],
-              [AS_HELP_STRING([--enable-sniffer],[ Enable CyaSSL sniffer support (default: disabled) ])],[
-               AS_IF([ test "x$enableval" = "xyes" ],[ AC_CHECK_HEADERS([pcap/pcap.h],[ 
-                      ENABLED_SNIFFER=yes 
-                      AM_CFLAGS="$AM_CFLAGS -DCYASSL_SNIFFER -DOPENSSL_EXTRA"
-                      ],[ ENABLED_SNIFFER=no ]) ])
-               ],[
-                  ENABLED_SNIFFER=no
-                  ])
+   [AS_HELP_STRING([--enable-sniffer],[ Enable CyaSSL sniffer support (default: disabled) ])],[
+       ENABLED_SNIFFER=yes 
+       AM_CFLAGS="$AM_CFLAGS -DCYASSL_SNIFFER -DOPENSSL_EXTRA"
+       AS_IF([ test "x$enableval" = "xyes" ],[ AC_CHECK_HEADERS([pcap/pcap.h],[ 
+           ENABLED_SNIFFTEST=yes 
+   ],[ AC_MSG_WARN([cannot enable sniffer test without having libpcap available.]) ]) ])
+   ],[
+       ENABLED_SNIFFER=no
+   ])
 
-AM_CONDITIONAL([BUILD_SNIFFER], [ test "x$ENABLED_SNIFFER" = "xyes" ])
+AM_CONDITIONAL([BUILD_SNIFFER],   [ test "x$ENABLED_SNIFFER"   = "xyes" ])
+AM_CONDITIONAL([BUILD_SNIFFTEST], [ test "x$ENABLED_SNIFFTEST" = "xyes" ])
 
 # AES-GCM
 AC_ARG_ENABLE([aesgcm],
@@ -526,6 +531,23 @@ then
 fi
 
 
+# CERT REQUEST GENERATION
+AC_ARG_ENABLE([certreq],
+    [  --enable-certreq        Enable cert request generation (default: disabled)],
+    [ ENABLED_CERTREQ=$enableval ],
+    [ ENABLED_CERTREQ=no ]
+    )
+
+if test "$ENABLED_CERTREQ" = "yes"
+then
+    if test "$ENABLED_CERTGEN" = "no"
+    then
+        AC_MSG_ERROR([cannot enable certreq without enabling certgen.])
+    fi
+    AM_CFLAGS="$AM_CFLAGS -DCYASSL_CERT_REQ"
+fi
+
+
 # SEP
 AC_ARG_ENABLE([sep],
     [  --enable-sep            Enable sep extensions (default: disabled)],
@@ -595,10 +617,35 @@ AC_ARG_ENABLE([fpecc],
 
 if test "$ENABLED_FPECC" = "yes"
 then
+    if test "$ENABLED_ECC" = "no"
+    then
+        AC_MSG_ERROR([cannot enable fpecc without enabling ecc.]) 
+    fi
     AM_CFLAGS="$AM_CFLAGS -DFP_ECC"
 fi
 
 
+# ECC encrypt
+AC_ARG_ENABLE([eccencrypt],
+    [  --enable-eccencrypt     Enable ECC encrypt (default: disabled)],
+    [ ENABLED_ECC_ENCRYPT=$enableval ],
+    [ ENABLED_ECC_ENCRYPT=no ]
+    )
+
+if test "$ENABLED_ECC_ENCRYPT" = "yes"
+then
+    if test "$ENABLED_ECC" = "no"
+    then
+        AC_MSG_ERROR([cannot enable eccencrypt without enabling ecc.]) 
+    fi
+    if test "$ENABLED_HKDF" = "no"
+    then
+        AC_MSG_ERROR([cannot enable eccencrypt without enabling hkdf.]) 
+    fi
+    AM_CFLAGS="$AM_CFLAGS -DHAVE_ECC_ENCRYPT"
+fi
+
+
 # PSK 
 AC_ARG_ENABLE([psk],
     [  --enable-psk            Enable PSK (default: disabled)],
@@ -1058,6 +1105,20 @@ fi
 AM_CONDITIONAL([BUILD_OCSP], [test "x$ENABLED_OCSP" = "xyes"])
 
 
+if test "$ENABLED_OCSP" = "yes"
+then
+    # check openssl command tool for testing ocsp
+    AC_CHECK_PROG([HAVE_OPENSSL_CMD],[openssl],[yes],[no])
+
+    if test "$HAVE_OPENSSL_CMD" = "yes"
+    then
+        AM_CFLAGS="$AM_CFLAGS -DHAVE_OPENSSL_CMD"
+    else
+        AC_MSG_WARN([openssl command line tool not available for testing ocsp])
+    fi
+fi
+
+
 # CRL 
 AC_ARG_ENABLE([crl],
     [  --enable-crl            Enable CRL (default: disabled)],
@@ -1153,6 +1214,30 @@ then
     AM_CFLAGS="$AM_CFLAGS -DHAVE_TLS_EXTENSIONS -DHAVE_TRUNCATED_HMAC"
 fi
 
+# Renegotiation Indication
+AC_ARG_ENABLE([renegotiation-indication],
+    [  --enable-renegotiation-indication  Enable Renegotiation Indication (default: disabled)],
+    [ ENABLED_RENEGOTIATION_INDICATION=$enableval ],
+    [ ENABLED_RENEGOTIATION_INDICATION=no ]
+    )
+
+if test "x$ENABLED_RENEGOTIATION_INDICATION" = "xyes"
+then
+    AM_CFLAGS="$AM_CFLAGS -DHAVE_TLS_EXTENSIONS -DHAVE_RENEGOTIATION_INDICATION"
+fi
+
+# Supported Elliptic Curves Extensions
+AC_ARG_ENABLE([supportedcurves],
+    [  --enable-supportedcurves Enable Supported Elliptic Curves (default: disabled)],
+    [ ENABLED_SUPPORTED_CURVES=$enableval ],
+    [ ENABLED_SUPPORTED_CURVES=no ]
+    )
+
+if test "x$ENABLED_SUPPORTED_CURVES" = "xyes"
+then
+    AM_CFLAGS="$AM_CFLAGS -DHAVE_TLS_EXTENSIONS -DHAVE_SUPPORTED_CURVES"
+fi
+
 # TLS Extensions
 AC_ARG_ENABLE([tlsx],
     [  --enable-tlsx           Enable all TLS Extensions (default: disabled)],
@@ -1164,9 +1249,61 @@ if test "x$ENABLED_TLSX" = "xyes"
 then
 	ENABLED_SNI=yes
 	ENABLED_MAX_FRAGMENT=yes
-    AM_CFLAGS="$AM_CFLAGS -DHAVE_TLS_EXTENSIONS -DHAVE_SNI -DHAVE_MAX_FRAGMENT"
+	ENABLED_TRUNCATED_HMAC=yes
+	ENABLED_RENEGOTIATION_INDICATION=yes
+	ENABLED_SUPPORTED_CURVES=yes
+    AM_CFLAGS="$AM_CFLAGS -DHAVE_TLS_EXTENSIONS -DHAVE_SNI -DHAVE_MAX_FRAGMENT -DHAVE_TRUNCATED_HMAC -DHAVE_RENEGOTIATION_INDICATION -DHAVE_SUPPORTED_CURVES"
 fi
 
+# PKCS7
+AC_ARG_ENABLE([pkcs7],
+    [  --enable-pkcs7          Enable PKCS7 (default: disabled)],
+    [ ENABLED_PKCS7=$enableval ],
+    [ ENABLED_PKCS7=no ],
+    )
+
+if test "$ENABLED_PKCS7" = "yes"
+then
+    AM_CFLAGS="$AM_CFLAGS -DHAVE_PKCS7"
+fi
+
+AM_CONDITIONAL([BUILD_PKCS7], [test "x$ENABLED_PKCS7" = "xyes"])
+
+
+# Simple Certificate Enrollment Protocol (SCEP)
+AC_ARG_ENABLE([scep],
+    [  --enable-scep           Enable wolfSCEP (default: disabled)],
+    [ ENABLED_WOLFSCEP=$enableval ],
+    [ ENABLED_WOLFSCEP=no ]
+    )
+if test "$ENABLED_WOLFSCEP" = "yes"
+then
+    # Enable prereqs if not already enabled
+    if test "x$ENABLED_KEYGEN" = "xno"
+    then
+        ENABLED_KEYGEN="yes"
+        AM_CFLAGS="$AM_CFLAGS -DCYASSL_KEY_GEN"
+    fi
+    if test "x$ENABLED_CERTGEN" = "xno"
+    then
+        ENABLED_CERTGEN="yes"
+        AM_CFLAGS="$AM_CFLAGS -DCYASSL_CERT_GEN"
+    fi
+    if test "x$ENABLED_CERTREQ" = "xno"
+    then
+        ENABLED_CERTREQ="yes"
+        AM_CFLAGS="$AM_CFLAGS -DCYASSL_CERT_REQ"
+    fi
+    if test "x$ENABLED_PKCS7" = "xno"
+    then
+        ENABLED_PKCS7="yes"
+        AM_CFLAGS="$AM_CFLAGS -DHAVE_PKCS7"
+        AM_CONDITIONAL([BUILD_PKCS7], [test "x$ENABLED_PKCS7" = "xyes"])
+    fi
+    AM_CFLAGS="$AM_CFLAGS -DCYASSL_HAVE_WOLFSCEP"
+fi
+
+
 #valgrind
 AC_ARG_ENABLE([valgrind],
     [  --enable-valgrind       Enable valgrind for unit tests (default: disabled)],
@@ -1504,6 +1641,7 @@ echo "   * Filesystem:                $ENABLED_FILESYSTEM"
 echo "   * OpenSSL Extra API:         $ENABLED_OPENSSLEXTRA"
 echo "   * fastmath:                  $ENABLED_FASTMATH"
 echo "   * sniffer:                   $ENABLED_SNIFFER"
+echo "   * snifftest:                 $ENABLED_SNIFFTEST"
 echo "   * ARC4:                      $ENABLED_ARC4"
 echo "   * AES:                       $ENABLED_AES"
 echo "   * AES-NI:                    $ENABLED_AESNI"
@@ -1519,9 +1657,11 @@ echo "   * SHA-512:                   $ENABLED_SHA512"
 echo "   * BLAKE2:                    $ENABLED_BLAKE2"
 echo "   * keygen:                    $ENABLED_KEYGEN"
 echo "   * certgen:                   $ENABLED_CERTGEN"
+echo "   * certreq:                   $ENABLED_CERTREQ"
 echo "   * HC-128:                    $ENABLED_HC128"
 echo "   * RABBIT:                    $ENABLED_RABBIT"
 echo "   * PWDBASED:                  $ENABLED_PWDBASED"
+echo "   * HKDF:                      $ENABLED_HKDF"
 echo "   * MD4:                       $ENABLED_MD4"
 echo "   * PSK:                       $ENABLED_PSK"
 echo "   * LEANPSK:                   $ENABLED_LEANPSK"
@@ -1530,6 +1670,7 @@ echo "   * DSA:                       $ENABLED_DSA"
 echo "   * DH:                        $ENABLED_DH"
 echo "   * ECC:                       $ENABLED_ECC"
 echo "   * FPECC:                     $ENABLED_FPECC"
+echo "   * ECC_ENCRYPT:               $ENABLED_ECC_ENCRYPT"
 echo "   * ASN:                       $ENABLED_ASN"
 echo "   * CODING:                    $ENABLED_CODING"
 echo "   * MEMORY:                    $ENABLED_MEMORY"
@@ -1547,7 +1688,11 @@ echo "   * NTRU:                      $ENABLED_NTRU"
 echo "   * SNI:                       $ENABLED_SNI"
 echo "   * Maximum Fragment Length:   $ENABLED_MAX_FRAGMENT"
 echo "   * Truncated HMAC:            $ENABLED_TRUNCATED_HMAC"
+echo "   * Renegotiation Indication:  $ENABLED_RENEGOTIATION_INDICATION"
+echo "   * Supported Elliptic Curves: $ENABLED_SUPPORTED_CURVES"
 echo "   * All TLS Extensions:        $ENABLED_TLSX"
+echo "   * PKCS#7                     $ENABLED_PKCS7"
+echo "   * wolfSCEP                   $ENABLED_WOLFSCEP"
 echo "   * valgrind unit tests:       $ENABLED_VALGRIND"
 echo "   * LIBZ:                      $ENABLED_LIBZ"
 echo "   * Examples:                  $ENABLED_EXAMPLES"
diff --git a/ctaocrypt/benchmark/benchmark.c b/ctaocrypt/benchmark/benchmark.c
index a6143139e..2086aaf10 100644
--- a/ctaocrypt/benchmark/benchmark.c
+++ b/ctaocrypt/benchmark/benchmark.c
@@ -221,13 +221,13 @@ int benchmark_test(void *args)
 #ifdef BENCH_EMBEDDED
 const int numBlocks = 25;       /* how many kB/megs to test (en/de)cryption */
 const char blockType[] = "kB";  /* used in printf output */
-const int times      = 1;        /* public key iterations */
+const int ntimes      = 1;        /* public key iterations */
 const int genTimes   = 5;
 const int agreeTimes = 5;
 #else
 const int numBlocks = 5;
 const char blockType[] = "megs";
-const int times      = 100;
+const int ntimes      = 100;
 const int genTimes   = 100;
 const int agreeTimes = 100;
 #endif
@@ -742,15 +742,15 @@ void bench_rsa(void)
     
     start = current_time(1);
 
-    for (i = 0; i < times; i++)
+    for (i = 0; i < ntimes; i++)
         ret = RsaPublicEncrypt(message,len,enc,sizeof(enc), &rsaKey, &rng);
 
     total = current_time(0) - start;
-    each  = total / times;   /* per second   */
+    each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
     printf("RSA %d encryption took %6.2f milliseconds, avg over %d" 
-           " iterations\n", rsaKeySz, milliEach, times);
+           " iterations\n", rsaKeySz, milliEach, ntimes);
 
     if (ret < 0) {
         printf("Rsa Public Encrypt failed\n");
@@ -759,17 +759,17 @@ void bench_rsa(void)
 
     start = current_time(1);
 
-    for (i = 0; i < times; i++) {
+    for (i = 0; i < ntimes; i++) {
          byte  out[512];  /* for up to 4096 bit */
          RsaPrivateDecrypt(enc, (word32)ret, out, sizeof(out), &rsaKey);
     }
 
     total = current_time(0) - start;
-    each  = total / times;   /* per second   */
+    each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
     printf("RSA %d decryption took %6.2f milliseconds, avg over %d" 
-           " iterations\n", rsaKeySz, milliEach, times);
+           " iterations\n", rsaKeySz, milliEach, ntimes);
 
     FreeRsaKey(&rsaKey);
 #ifdef HAVE_CAVIUM
@@ -847,28 +847,28 @@ void bench_dh(void)
 
     start = current_time(1);
 
-    for (i = 0; i < times; i++)
+    for (i = 0; i < ntimes; i++)
         DhGenerateKeyPair(&dhKey, &rng, priv, &privSz, pub, &pubSz);
 
     total = current_time(0) - start;
-    each  = total / times;   /* per second   */
+    each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
     printf("DH  %d key generation  %6.2f milliseconds, avg over %d" 
-           " iterations\n", dhKeySz, milliEach, times);
+           " iterations\n", dhKeySz, milliEach, ntimes);
 
     DhGenerateKeyPair(&dhKey, &rng, priv2, &privSz2, pub2, &pubSz2);
     start = current_time(1);
 
-    for (i = 0; i < times; i++)
+    for (i = 0; i < ntimes; i++)
         DhAgree(&dhKey, agree, &agreeSz, priv, privSz, pub2, pubSz2);
 
     total = current_time(0) - start;
-    each  = total / times;   /* per second   */
+    each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
     printf("DH  %d key agreement   %6.2f milliseconds, avg over %d" 
-           " iterations\n", dhKeySz, milliEach, times);
+           " iterations\n", dhKeySz, milliEach, ntimes);
 
 #if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048)
     fclose(file);
@@ -923,7 +923,6 @@ void bench_eccKeyGen(void)
     ecc_key genKey;
     double start, total, each, milliEach;
     int    i, ret;
-    const int genTimes = 5;
   
     ret = InitRng(&rng);
     if (ret < 0) {
@@ -952,7 +951,6 @@ void bench_eccKeyAgree(void)
     ecc_key genKey, genKey2;
     double start, total, each, milliEach;
     int    i, ret;
-    const int agreeTimes = 5;
     byte   shared[1024];
     byte   sig[1024];
     byte   digest[32];
@@ -1048,13 +1046,13 @@ void bench_eccKeyAgree(void)
 
     double current_time(int reset)
     {
-        (void)reset;
-
         static int init = 0;
         static LARGE_INTEGER freq;
     
         LARGE_INTEGER count;
 
+        (void)reset;
+
         if (!init) {
             QueryPerformanceFrequency(&freq);
             init = 1;
@@ -1089,20 +1087,35 @@ void bench_eccKeyAgree(void)
     }
 
 #elif defined CYASSL_MDK_ARM
+
     extern double current_time(int reset) ;
+
+#elif defined FREERTOS
+
+    double current_time(int reset)
+    {
+        (void) reset;
+
+        portTickType tickCount;
+
+        /* tick count == ms, if configTICK_RATE_HZ is set to 1000 */
+        tickCount = xTaskGetTickCount();
+        return (double)tickCount / 1000;
+    }
+
 #else
 
     #include 
 
     double current_time(int reset)
     {
+        struct timeval tv;
+
         (void)reset;
 
-        struct timeval tv;
         gettimeofday(&tv, 0);
 
         return (double)tv.tv_sec + (double)tv.tv_usec / 1000000;
     }
 
 #endif /* _WIN32 */
-
diff --git a/ctaocrypt/src/asm.c b/ctaocrypt/src/asm.c
index e19410e8a..941478a42 100644
--- a/ctaocrypt/src/asm.c
+++ b/ctaocrypt/src/asm.c
@@ -1004,15 +1004,17 @@ __asm__(                              \
 
 #define SQRADDAC(i, j)                                                         \
    do { fp_word t;                                                             \
-   t = sc0 + ((fp_word)i) * ((fp_word)j);  sc0 = t;                            \
-   t = sc1 + (t >> DIGIT_BIT);             sc1 = t; sc2 += t >> DIGIT_BIT;     \
+   t = sc0 + ((fp_word)i) * ((fp_word)j);  sc0 =  (fp_digit)t;                 \
+   t = sc1 + (t >> DIGIT_BIT);             sc1 =  (fp_digit)t;                 \
+                                           sc2 += (fp_digit)(t >> DIGIT_BIT);  \
    } while (0);
 
 #define SQRADDDB                                                               \
    do { fp_word t;                                                             \
-   t = ((fp_word)sc0) + ((fp_word)sc0) + c0; c0 = t;                                                 \
-   t = ((fp_word)sc1) + ((fp_word)sc1) + c1 + (t >> DIGIT_BIT); c1 = t;                              \
-   c2 = c2 + ((fp_word)sc2) + ((fp_word)sc2) + (t >> DIGIT_BIT);                                     \
+   t = ((fp_word)sc0) + ((fp_word)sc0) + c0; c0 = (fp_digit)t;                 \
+   t = ((fp_word)sc1) + ((fp_word)sc1) + c1 + (t >> DIGIT_BIT);                \
+                                             c1 = (fp_digit)t;                 \
+   c2 = c2 + (fp_digit)(((fp_word)sc2) + ((fp_word)sc2) + (t >> DIGIT_BIT));   \
    } while (0);
 
 #endif
diff --git a/ctaocrypt/src/asn.c b/ctaocrypt/src/asn.c
index 65ff0a660..bf6811375 100644
--- a/ctaocrypt/src/asn.c
+++ b/ctaocrypt/src/asn.c
@@ -398,8 +398,8 @@ CPU_INT32S NetSecure_ValidateDateHandler(CPU_INT08U *date, CPU_INT08U format,
 #endif /* MICRIUM */
 
 
-static int GetLength(const byte* input, word32* inOutIdx, int* len,
-                     word32 maxIdx)
+CYASSL_LOCAL int GetLength(const byte* input, word32* inOutIdx, int* len,
+                           word32 maxIdx)
 {
     int     length = 0;
     word32  i = *inOutIdx;
@@ -439,8 +439,8 @@ static int GetLength(const byte* input, word32* inOutIdx, int* len,
 }
 
 
-static int GetSequence(const byte* input, word32* inOutIdx, int* len,
-                       word32 maxIdx)
+CYASSL_LOCAL int GetSequence(const byte* input, word32* inOutIdx, int* len,
+                           word32 maxIdx)
 {
     int    length = -1;
     word32 idx    = *inOutIdx;
@@ -456,7 +456,8 @@ static int GetSequence(const byte* input, word32* inOutIdx, int* len,
 }
 
 
-static int GetSet(const byte* input, word32* inOutIdx, int* len, word32 maxIdx)
+CYASSL_LOCAL int GetSet(const byte* input, word32* inOutIdx, int* len,
+                        word32 maxIdx)
 {
     int    length = -1;
     word32 idx    = *inOutIdx;
@@ -473,7 +474,7 @@ static int GetSet(const byte* input, word32* inOutIdx, int* len, word32 maxIdx)
 
 
 /* winodws header clash for WinCE using GetVersion */
-static int GetMyVersion(const byte* input, word32* inOutIdx, int* version)
+CYASSL_LOCAL int GetMyVersion(const byte* input, word32* inOutIdx, int* version)
 {
     word32 idx = *inOutIdx;
 
@@ -537,7 +538,7 @@ static int GetExplicitVersion(const byte* input, word32* inOutIdx, int* version)
 }
 
 
-static int GetInt(mp_int* mpi, const byte* input, word32* inOutIdx,
+CYASSL_LOCAL int GetInt(mp_int* mpi, const byte* input, word32* inOutIdx,
                   word32 maxIdx)
 {
     word32 i = *inOutIdx;
@@ -593,7 +594,7 @@ static int GetObjectId(const byte* input, word32* inOutIdx, word32* oid,
 }
 
 
-static int GetAlgoId(const byte* input, word32* inOutIdx, word32* oid,
+CYASSL_LOCAL int GetAlgoId(const byte* input, word32* inOutIdx, word32* oid,
                      word32 maxIdx)
 {
     int    length;
@@ -764,7 +765,7 @@ int ToTraditional(byte* input, word32 sz)
     
     XMEMMOVE(input, input + inOutIdx, length);
 
-    return 0;
+    return length;
 }
 
 
@@ -1280,6 +1281,10 @@ void InitDecodedCert(DecodedCert* cert, byte* source, word32 inSz, void* heap)
     XMEMSET(cert->extAuthKeyId, 0, SHA_SIZE);
     cert->extAuthKeyIdSet = 0;
     cert->isCA            = 0;
+#ifdef HAVE_PKCS7
+    cert->issuerRaw       = NULL;
+    cert->issuerRawLen    = 0;
+#endif
 #ifdef CYASSL_CERT_GEN
     cert->subjectSN       = 0;
     cert->subjectSNLen    = 0;
@@ -1303,7 +1308,25 @@ void InitDecodedCert(DecodedCert* cert, byte* source, word32 inSz, void* heap)
 #ifdef OPENSSL_EXTRA
     XMEMSET(&cert->issuerName, 0, sizeof(DecodedName));
     XMEMSET(&cert->subjectName, 0, sizeof(DecodedName));
+    cert->extBasicConstSet = 0;
+    cert->extBasicConstCrit = 0;
+    cert->extBasicConstPlSet = 0;
+    cert->pathLength = 0;
+    cert->extSubjAltNameSet = 0;
+    cert->extSubjAltNameCrit = 0;
+    cert->extAuthKeyIdCrit = 0;
+    cert->extSubjKeyIdCrit = 0;
+    cert->extKeyUsageSet = 0;
+    cert->extKeyUsageCrit = 0;
+    cert->extKeyUsage = 0;
+    cert->extAuthKeyIdSrc = NULL;
+    cert->extAuthKeyIdSz = 0;
+    cert->extSubjKeyIdSrc = NULL;
+    cert->extSubjKeyIdSz = 0;
 #endif /* OPENSSL_EXTRA */
+#ifdef HAVE_ECC
+    cert->pkCurveOID = 0;
+#endif /* HAVE_ECC */
 #ifdef CYASSL_SEP
     cert->deviceTypeSz = 0;
     cert->deviceType = NULL;
@@ -1311,6 +1334,10 @@ void InitDecodedCert(DecodedCert* cert, byte* source, word32 inSz, void* heap)
     cert->hwType = NULL;
     cert->hwSerialNumSz = 0;
     cert->hwSerialNum = NULL;
+    #ifdef OPENSSL_EXTRA
+        cert->extCertPolicySet = 0;
+        cert->extCertPolicyCrit = 0;
+    #endif /* OPENSSL_EXTRA */
 #endif /* CYASSL_SEP */
 }
 
@@ -1434,7 +1461,7 @@ static int GetKey(DecodedCert* cert)
 
     if (GetSequence(cert->source, &cert->srcIdx, &length, cert->maxIdx) < 0)
         return ASN_PARSE_E;
-    
+   
     if (GetAlgoId(cert->source, &cert->srcIdx, &cert->keyOID, cert->maxIdx) < 0)
         return ASN_PARSE_E;
 
@@ -1495,7 +1522,6 @@ static int GetKey(DecodedCert* cert)
     #ifdef HAVE_ECC
         case ECDSAk:
         {
-            word32 oid = 0;
             int    oidSz = 0;
             byte   b = cert->source[cert->srcIdx++];
         
@@ -1506,8 +1532,9 @@ static int GetKey(DecodedCert* cert)
                 return ASN_PARSE_E;
 
             while(oidSz--)
-                oid += cert->source[cert->srcIdx++];
-            if (CheckCurve(oid) < 0)
+                cert->pkCurveOID += cert->source[cert->srcIdx++];
+
+            if (CheckCurve(cert->pkCurveOID) < 0)
                 return ECC_CURVE_OID_E;
 
             /* key header */
@@ -1586,6 +1613,14 @@ static int GetName(DecodedCert* cert, int nameType)
     length += cert->srcIdx;
     idx = 0;
 
+#ifdef HAVE_PKCS7
+    /* store pointer to raw issuer */
+    if (nameType == ISSUER) {
+        cert->issuerRaw = &cert->source[cert->srcIdx];
+        cert->issuerRawLen = length - cert->srcIdx;
+    }
+#endif
+
     while (cert->srcIdx < (word32)length) {
         byte   b;
         byte   joint[2];
@@ -2128,10 +2163,14 @@ int DecodeToKey(DecodedCert* cert, int verify)
     if ( (ret = GetCertHeader(cert)) < 0)
         return ret;
 
+    CYASSL_MSG("Got Cert Header");
+
     if ( (ret = GetAlgoId(cert->source, &cert->srcIdx, &cert->signatureOID,
                           cert->maxIdx)) < 0)
         return ret;
 
+    CYASSL_MSG("Got Algo ID");
+
     if ( (ret = GetName(cert, ISSUER)) < 0)
         return ret;
 
@@ -2141,9 +2180,13 @@ int DecodeToKey(DecodedCert* cert, int verify)
     if ( (ret = GetName(cert, SUBJECT)) < 0)
         return ret;
 
+    CYASSL_MSG("Got Subject Name");
+
     if ( (ret = GetKey(cert)) < 0)
         return ret;
 
+    CYASSL_MSG("Got Key");
+
     if (badDate != 0)
         return badDate;
 
@@ -2197,7 +2240,7 @@ static word32 BytePrecision(word32 value)
 }
 
 
-static word32 SetLength(word32 length, byte* output)
+CYASSL_LOCAL word32 SetLength(word32 length, byte* output)
 {
     word32 i = 0, j;
 
@@ -2216,14 +2259,114 @@ static word32 SetLength(word32 length, byte* output)
 }
 
 
-static word32 SetSequence(word32 len, byte* output)
+CYASSL_LOCAL word32 SetSequence(word32 len, byte* output)
 {
     output[0] = ASN_SEQUENCE | ASN_CONSTRUCTED;
     return SetLength(len, output + 1) + 1;
 }
 
+CYASSL_LOCAL word32 SetOctetString(word32 len, byte* output)
+{
+    output[0] = ASN_OCTET_STRING;
+    return SetLength(len, output + 1) + 1;
+}
 
-static word32 SetAlgoID(int algoOID, byte* output, int type)
+/* Write a set header to output */
+CYASSL_LOCAL word32 SetSet(word32 len, byte* output)
+{
+    output[0] = ASN_SET | ASN_CONSTRUCTED;
+    return SetLength(len, output + 1) + 1;
+}
+
+CYASSL_LOCAL word32 SetImplicit(byte tag, byte number, word32 len, byte* output)
+{
+
+    output[0] = ((tag == ASN_SEQUENCE || tag == ASN_SET) ? ASN_CONSTRUCTED : 0)
+                    | ASN_CONTEXT_SPECIFIC | number;
+    return SetLength(len, output + 1) + 1;
+}
+
+CYASSL_LOCAL word32 SetExplicit(byte number, word32 len, byte* output)
+{
+    output[0] = ASN_CONSTRUCTED | ASN_CONTEXT_SPECIFIC | number;
+    return SetLength(len, output + 1) + 1;
+}
+
+
+#if defined(HAVE_ECC) && defined(CYASSL_CERT_GEN)
+
+static word32 SetCurve(ecc_key* key, byte* output)
+{
+
+    /* curve types */
+    static const byte ECC_192v1_AlgoID[] = { 0x2a, 0x86, 0x48, 0xCE, 0x3d,
+                                             0x03, 0x01, 0x01};
+    static const byte ECC_256v1_AlgoID[] = { 0x2a, 0x86, 0x48, 0xCE, 0x3d,
+                                            0x03, 0x01, 0x07};
+    static const byte ECC_160r1_AlgoID[] = { 0x2b, 0x81, 0x04, 0x00,
+                                             0x02};
+    static const byte ECC_224r1_AlgoID[] = { 0x2b, 0x81, 0x04, 0x00,
+                                             0x21};
+    static const byte ECC_384r1_AlgoID[] = { 0x2b, 0x81, 0x04, 0x00,
+                                             0x22};
+    static const byte ECC_521r1_AlgoID[] = { 0x2b, 0x81, 0x04, 0x00,
+                                             0x23};
+
+    int    oidSz = 0;
+    int    idx = 0;
+    int    lenSz = 0;
+    const  byte* oid = 0;
+
+    output[0] = ASN_OBJECT_ID;
+    idx++;
+
+    switch (key->dp->size) {
+        case 20:
+            oidSz = sizeof(ECC_160r1_AlgoID);
+            oid   =        ECC_160r1_AlgoID;
+            break;
+
+        case 24:
+            oidSz = sizeof(ECC_192v1_AlgoID);
+            oid   =        ECC_192v1_AlgoID;
+            break;
+
+        case 28:
+            oidSz = sizeof(ECC_224r1_AlgoID);
+            oid   =        ECC_224r1_AlgoID;
+            break;
+
+        case 32:
+            oidSz = sizeof(ECC_256v1_AlgoID);
+            oid   =        ECC_256v1_AlgoID;
+            break;
+
+        case 48:
+            oidSz = sizeof(ECC_384r1_AlgoID);
+            oid   =        ECC_384r1_AlgoID;
+            break;
+
+        case 66:
+            oidSz = sizeof(ECC_521r1_AlgoID);
+            oid   =        ECC_521r1_AlgoID;
+            break;
+
+        default:
+            return ASN_UNKNOWN_OID_E;
+    }
+    lenSz = SetLength(oidSz, output+idx);
+    idx += lenSz;
+
+    XMEMCPY(output+idx, oid, oidSz);
+    idx += oidSz;
+
+    return idx;
+}
+
+#endif /* HAVE_ECC && CYASSL_CERT_GEN */
+
+
+CYASSL_LOCAL word32 SetAlgoID(int algoOID, byte* output, int type, int curveSz)
 {
     /* adding TAG_NULL and 0 to end */
     
@@ -2241,7 +2384,12 @@ static word32 SetAlgoID(int algoOID, byte* output, int type)
     static const byte md2AlgoID[]    = { 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d,
                                          0x02, 0x02, 0x05, 0x00};
 
-    /* sigTypes */
+    /* blkTypes, no NULL tags because IV is there instead */
+    static const byte desCbcAlgoID[]  = { 0x2B, 0x0E, 0x03, 0x02, 0x07 };
+    static const byte des3CbcAlgoID[] = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                          0x0D, 0x03, 0x07 };
+
+    /* RSA sigTypes */
     #ifndef NO_RSA
         static const byte md5wRSA_AlgoID[] = { 0x2a, 0x86, 0x48, 0x86, 0xf7,
                                             0x0d, 0x01, 0x01, 0x04, 0x05, 0x00};
@@ -2255,13 +2403,33 @@ static word32 SetAlgoID(int algoOID, byte* output, int type)
                                             0x0d, 0x01, 0x01, 0x0d, 0x05, 0x00};
     #endif /* NO_RSA */
  
-    /* keyTypes */
+    /* ECDSA sigTypes */
+    #ifdef HAVE_ECC 
+        static const byte shawECDSA_AlgoID[] = { 0x2a, 0x86, 0x48, 0xCE, 0x3d,
+                                                 0x04, 0x01, 0x05, 0x00};
+        static const byte sha256wECDSA_AlgoID[] = { 0x2a, 0x86, 0x48, 0xCE,0x3d,
+                                                 0x04, 0x03, 0x02, 0x05, 0x00};
+        static const byte sha384wECDSA_AlgoID[] = { 0x2a, 0x86, 0x48, 0xCE,0x3d,
+                                                 0x04, 0x03, 0x03, 0x05, 0x00};
+        static const byte sha512wECDSA_AlgoID[] = { 0x2a, 0x86, 0x48, 0xCE,0x3d,
+                                                 0x04, 0x03, 0x04, 0x05, 0x00};
+    #endif /* HAVE_ECC */
+ 
+    /* RSA keyType */
     #ifndef NO_RSA
         static const byte RSA_AlgoID[] = { 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d,
                                             0x01, 0x01, 0x01, 0x05, 0x00};
     #endif /* NO_RSA */
 
+    #ifdef HAVE_ECC 
+        /* ECC keyType */
+        /* no tags, so set tagSz smaller later */
+        static const byte ECC_AlgoID[] = { 0x2a, 0x86, 0x48, 0xCE, 0x3d,
+                                           0x02, 0x01};
+    #endif /* HAVE_ECC */
+
     int    algoSz = 0;
+    int    tagSz  = 2;   /* tag null and terminator */
     word32 idSz, seqSz;
     const  byte* algoName = 0;
     byte ID_Length[MAX_LENGTH_SZ];
@@ -2304,6 +2472,23 @@ static word32 SetAlgoID(int algoOID, byte* output, int type)
             return 0;  /* UNKOWN_HASH_E; */
         }
     }
+    else if (type == blkType) {
+        switch (algoOID) {
+        case DESb:
+            algoSz = sizeof(desCbcAlgoID);
+            algoName = desCbcAlgoID;
+            tagSz = 0;
+            break;
+        case DES3b:
+            algoSz = sizeof(des3CbcAlgoID);
+            algoName = des3CbcAlgoID;
+            tagSz = 0;
+            break;
+        default:
+            CYASSL_MSG("Unknown Block Algo");
+            return 0;
+        }
+    }
     else if (type == sigType) {    /* sigType */
         switch (algoOID) {
         #ifndef NO_RSA
@@ -2332,6 +2517,27 @@ static word32 SetAlgoID(int algoOID, byte* output, int type)
                 algoName = sha512wRSA_AlgoID;
                 break;
         #endif /* NO_RSA */
+        #ifdef HAVE_ECC 
+            case CTC_SHAwECDSA:
+                algoSz = sizeof(shawECDSA_AlgoID);
+                algoName = shawECDSA_AlgoID;
+                break;
+
+            case CTC_SHA256wECDSA:
+                algoSz = sizeof(sha256wECDSA_AlgoID);
+                algoName = sha256wECDSA_AlgoID;
+                break;
+
+            case CTC_SHA384wECDSA:
+                algoSz = sizeof(sha384wECDSA_AlgoID);
+                algoName = sha384wECDSA_AlgoID;
+                break;
+
+            case CTC_SHA512wECDSA:
+                algoSz = sizeof(sha512wECDSA_AlgoID);
+                algoName = sha512wECDSA_AlgoID;
+                break;
+        #endif /* HAVE_ECC */
         default:
             CYASSL_MSG("Unknown Signature Algo");
             return 0;
@@ -2345,6 +2551,13 @@ static word32 SetAlgoID(int algoOID, byte* output, int type)
                 algoName = RSA_AlgoID;
                 break;
         #endif /* NO_RSA */
+        #ifdef HAVE_ECC 
+            case ECDSAk:
+                algoSz = sizeof(ECC_AlgoID);
+                algoName = ECC_AlgoID;
+                tagSz = 0;
+                break;
+        #endif /* HAVE_ECC */
         default:
             CYASSL_MSG("Unknown Key Algo");
             return 0;
@@ -2355,8 +2568,9 @@ static word32 SetAlgoID(int algoOID, byte* output, int type)
         return 0;
     }
 
-    idSz  = SetLength(algoSz - 2, ID_Length); /* don't include TAG_NULL/0 */
-    seqSz = SetSequence(idSz + algoSz + 1, seqArray);
+    idSz  = SetLength(algoSz - tagSz, ID_Length); /* don't include tags */
+    seqSz = SetSequence(idSz + algoSz + 1 + curveSz, seqArray); 
+                 /* +1 for object id, curveID of curveSz follows for ecc */
     seqArray[seqSz++] = ASN_OBJECT_ID;
 
     XMEMCPY(output, seqArray, seqSz);
@@ -2376,7 +2590,7 @@ word32 EncodeSignature(byte* out, const byte* digest, word32 digSz, int hashOID)
     word32 encDigSz, algoSz, seqSz; 
 
     encDigSz = SetDigest(digest, digSz, digArray);
-    algoSz   = SetAlgoID(hashOID, algoArray, hashType);
+    algoSz   = SetAlgoID(hashOID, algoArray, hashType, 0);
     seqSz    = SetSequence(encDigSz + algoSz, seqArray);
 
     XMEMCPY(out, seqArray, seqSz);
@@ -2491,6 +2705,7 @@ static int ConfirmSignature(const byte* buf, word32 bufSz,
             CYASSL_MSG("Verify Signautre has unsupported type");
             return 0;
     }
+    (void)typeH;  /* some builds won't read */
 
     switch (keyOID) {
     #ifndef NO_RSA
@@ -2752,8 +2967,28 @@ static void DecodeBasicCaConstraint(byte* input, int sz, DecodedCert* cert)
         return;
     }
 
-    if (input[idx])
+    if (input[idx++])
         cert->isCA = 1;
+
+    #ifdef OPENSSL_EXTRA
+        /* If there isn't any more data, return. */
+        if (idx >= (word32)sz)
+            return;
+
+        /* Anything left should be the optional pathlength */
+        if (input[idx++] != ASN_INTEGER) {
+            CYASSL_MSG("\tfail: pathlen not INTEGER");
+            return;
+        }
+
+        if (input[idx++] != 1) {
+            CYASSL_MSG("\tfail: pathlen too long");
+            return;
+        }
+
+        cert->pathLength = input[idx];
+        cert->extBasicConstPlSet = 1;
+    #endif /* OPENSSL_EXTRA */
 }
 
 
@@ -2843,6 +3078,7 @@ static void DecodeAuthInfo(byte* input, int sz, DecodedCert* cert)
 {
     word32 idx = 0;
     int length = 0;
+    byte b;
     word32 oid;
 
     CYASSL_ENTER("DecodeAuthInfo");
@@ -2850,35 +3086,26 @@ static void DecodeAuthInfo(byte* input, int sz, DecodedCert* cert)
     /* Unwrap the list of AIAs */
     if (GetSequence(input, &idx, &length, sz) < 0) return;
 
-    /* Unwrap a single AIA */
-    if (GetSequence(input, &idx, &length, sz) < 0) return;
+    while (idx < (word32)sz) {
+        /* Unwrap a single AIA */
+        if (GetSequence(input, &idx, &length, sz) < 0) return;
 
-    oid = 0;
-    if (GetObjectId(input, &idx, &oid, sz) < 0) return;
+        oid = 0;
+        if (GetObjectId(input, &idx, &oid, sz) < 0) return;
 
-    /* Only supporting URIs right now. */
-    if (input[idx] == (ASN_CONTEXT_SPECIFIC | GENERALNAME_URI))
-    {
-        idx++;
+        /* Only supporting URIs right now. */
+        b = input[idx++];
         if (GetLength(input, &idx, &length, sz) < 0) return;
 
-        cert->extAuthInfoSz = length;
-        cert->extAuthInfo = input + idx;
+        if (b == (ASN_CONTEXT_SPECIFIC | GENERALNAME_URI) &&
+            oid == AIA_OCSP_OID)
+        {
+            cert->extAuthInfoSz = length;
+            cert->extAuthInfo = input + idx;
+            break;
+        }
         idx += length;
     }
-    else
-    {
-        /* Skip anything else. */
-        idx++;
-        if (GetLength(input, &idx, &length, sz) < 0) return;
-        idx += length;
-    }
-
-    if (idx < (word32)sz)
-    {
-        CYASSL_MSG("\tThere are more Authority Information Access records, "
-                   "but we only use first one.");
-    }
 
     return;
 }
@@ -2906,6 +3133,11 @@ static void DecodeAuthKeyId(byte* input, int sz, DecodedCert* cert)
         return;
     }
 
+    #ifdef OPENSSL_EXTRA
+        cert->extAuthKeyIdSrc = &input[idx];
+        cert->extAuthKeyIdSz = length;
+    #endif /* OPENSSL_EXTRA */
+
     if (length == SHA_SIZE) {
         XMEMCPY(cert->extAuthKeyId, input + idx, length);
     }
@@ -2915,7 +3147,6 @@ static void DecodeAuthKeyId(byte* input, int sz, DecodedCert* cert)
         ShaUpdate(&sha, input + idx, length);
         ShaFinal(&sha, cert->extAuthKeyId);
     }
-    cert->extAuthKeyIdSet = 1;
 
     return;
 }
@@ -2938,6 +3169,11 @@ static void DecodeSubjKeyId(byte* input, int sz, DecodedCert* cert)
         return;
     }
 
+    #ifdef OPENSSL_EXTRA
+        cert->extSubjKeyIdSrc = &input[idx];
+        cert->extSubjKeyIdSz = length;
+    #endif /* OPENSSL_EXTRA */
+
     if (length == SIGNER_DIGEST_SIZE) {
         XMEMCPY(cert->extSubjKeyId, input + idx, length);
     }
@@ -2947,12 +3183,44 @@ static void DecodeSubjKeyId(byte* input, int sz, DecodedCert* cert)
         ShaUpdate(&sha, input + idx, length);
         ShaFinal(&sha, cert->extSubjKeyId);
     }
-    cert->extSubjKeyIdSet = 1;
 
     return;
 }
 
 
+#ifdef OPENSSL_EXTRA
+    static void DecodeKeyUsage(byte* input, int sz, DecodedCert* cert)
+    {
+        word32 idx = 0;
+        int length;
+        byte unusedBits;
+        CYASSL_ENTER("DecodeKeyUsage");
+
+        if (input[idx++] != ASN_BIT_STRING) {
+            CYASSL_MSG("\tfail: key usage expected bit string");
+            return;
+        }
+
+        if (GetLength(input, &idx, &length, sz) < 0) {
+            CYASSL_MSG("\tfail: key usage bad length");
+            return;
+        }
+
+        unusedBits = input[idx++];
+        length--;
+
+        if (length == 2) {
+            cert->extKeyUsage = (input[idx] << 8) | input[idx+1];
+            cert->extKeyUsage >>= unusedBits;
+        }
+        else if (length == 1)
+            cert->extKeyUsage = (input[idx] << 1);
+
+        return;
+    }
+#endif /* OPENSSL_EXTRA */
+
+
 #ifdef CYASSL_SEP
     static void DecodeCertPolicy(byte* input, int sz, DecodedCert* cert)
     {
@@ -3008,6 +3276,9 @@ static void DecodeCertExtensions(DecodedCert* cert)
     byte* input = cert->extensions;
     int length;
     word32 oid;
+    byte critical;
+
+    (void)critical;
 
     CYASSL_ENTER("DecodeCertExtensions");
 
@@ -3032,9 +3303,16 @@ static void DecodeCertExtensions(DecodedCert* cert)
         }
 
         /* check for critical flag */
+        critical = 0;
         if (input[idx] == ASN_BOOLEAN) {
-            CYASSL_MSG("\tfound optional critical flag, moving past");
-            idx += (ASN_BOOL_SIZE + 1);
+            int boolLength = 0;
+            idx++;
+            if (GetLength(input, &idx, &boolLength, sz) < 0) {
+                CYASSL_MSG("\tfail: critical boolean length");
+                return;
+            }
+            if (input[idx++])
+                critical = 1;
         }
 
         /* process the extension based on the OID */
@@ -3050,6 +3328,10 @@ static void DecodeCertExtensions(DecodedCert* cert)
 
         switch (oid) {
             case BASIC_CA_OID:
+                #ifdef OPENSSL_EXTRA
+                    cert->extBasicConstSet = 1;
+                    cert->extBasicConstCrit = critical;
+                #endif
                 DecodeBasicCaConstraint(&input[idx], length, cert);
                 break;
 
@@ -3062,29 +3344,54 @@ static void DecodeCertExtensions(DecodedCert* cert)
                 break;
 
             case ALT_NAMES_OID:
+                #ifdef OPENSSL_EXTRA
+                    cert->extSubjAltNameSet = 1;
+                    cert->extSubjAltNameCrit = critical;
+                #endif
                 DecodeAltNames(&input[idx], length, cert);
                 break;
 
             case AUTH_KEY_OID:
+                cert->extAuthKeyIdSet = 1;
+                #ifdef OPENSSL_EXTRA
+                    cert->extAuthKeyIdCrit = critical;
+                #endif
                 DecodeAuthKeyId(&input[idx], length, cert);
                 break;
 
             case SUBJ_KEY_OID:
+                cert->extSubjKeyIdSet = 1;
+                #ifdef OPENSSL_EXTRA
+                    cert->extSubjKeyIdCrit = critical;
+                #endif
                 DecodeSubjKeyId(&input[idx], length, cert);
                 break;
 
             #ifdef CYASSL_SEP
             case CERT_POLICY_OID:
+                #ifdef OPENSSL_EXTRA
+                    cert->extCertPolicySet = 1;
+                    cert->extCertPolicyCrit = critical;
+                #endif
                 DecodeCertPolicy(&input[idx], length, cert);
                 break;
             #endif
 
+            #ifdef OPENSSL_EXTRA
+            case KEY_USAGE_OID:
+                cert->extKeyUsageSet = 1;
+                cert->extKeyUsageCrit = critical;
+                DecodeKeyUsage(&input[idx], length, cert);
+                break;
+            #endif
+
             default:
                 CYASSL_MSG("\tExtension type not handled, skipping");
                 break;
         }
         idx += length;
     }
+    (void)critical;
 
     CYASSL_LEAVE("DecodeCertExtensions", 0);
     return;
@@ -3111,7 +3418,8 @@ int ParseCert(DecodedCert* cert, int type, int verify, void* cm)
         cert->subjectCNStored = 1;
     }
 
-    if (cert->keyOID == RSAk && cert->pubKeySize > 0) {
+    if (cert->keyOID == RSAk &&
+                          cert->publicKey != NULL  && cert->pubKeySize > 0) {
         ptr = (char*) XMALLOC(cert->pubKeySize, cert->heap,
                               DYNAMIC_TYPE_PUBLIC_KEY);
         if (ptr == NULL)
@@ -3151,6 +3459,8 @@ int ParseCertRelative(DecodedCert* cert, int type, int verify, void* cm)
             return ret;
     }
 
+    CYASSL_MSG("Parsed Past Key");
+
     if (cert->srcIdx != cert->sigIndex) {
         if (cert->srcIdx < cert->sigIndex) {
             /* save extensions */
@@ -3180,7 +3490,6 @@ int ParseCertRelative(DecodedCert* cert, int type, int verify, void* cm)
             InitSha(&sha);
             ShaUpdate(&sha, cert->publicKey, cert->pubKeySize);
             ShaFinal(&sha, cert->extSubjKeyId);
-            cert->extSubjKeyIdSet = 1;
         }
     #endif
 
@@ -3277,9 +3586,7 @@ void FreeSignerTable(Signer** table, int rows, void* heap)
 }
 
 
-#if defined(CYASSL_KEY_GEN) || defined(CYASSL_CERT_GEN)
-
-static int SetMyVersion(word32 version, byte* output, int header)
+CYASSL_LOCAL int SetMyVersion(word32 version, byte* output, int header)
 {
     int i = 0;
 
@@ -3295,6 +3602,39 @@ static int SetMyVersion(word32 version, byte* output, int header)
 }
 
 
+CYASSL_LOCAL int SetSerialNumber(const byte* sn, word32 snSz, byte* output)
+{
+    int result = 0;
+
+    CYASSL_ENTER("SetSerialNumber");
+
+    if (snSz <= EXTERNAL_SERIAL_SIZE) {
+        output[0] = ASN_INTEGER;
+        /* The serial number is always positive. When encoding the
+         * INTEGER, if the MSB is 1, add a padding zero to keep the
+         * number positive. */
+        if (sn[0] & 0x80) {
+            output[1] = (byte)snSz + 1;
+            output[2] = 0;
+            XMEMCPY(&output[3], sn, snSz);
+            result = snSz + 3;
+        }
+        else {
+            output[1] = (byte)snSz;
+            XMEMCPY(&output[2], sn, snSz);
+            result = snSz + 2;
+        }
+    }
+    return result;
+}
+
+
+
+
+#if defined(CYASSL_KEY_GEN) || defined(CYASSL_CERT_GEN)
+
+/* convert der buffer to pem into output, can't do inplace, der and output
+   need to be different */
 int DerToPem(const byte* der, word32 derSz, byte* output, word32 outSz,
              int type)
 {
@@ -3307,6 +3647,9 @@ int DerToPem(const byte* der, word32 derSz, byte* output, word32 outSz,
     int err;
     int outLen;   /* return length or error */
 
+    if (der == output)      /* no in place conversion */
+        return BAD_FUNC_ARG;
+
     if (type == CERT_TYPE) {
         XSTRNCPY(header, "-----BEGIN CERTIFICATE-----\n", sizeof(header));
         XSTRNCPY(footer, "-----END CERTIFICATE-----\n", sizeof(footer));
@@ -3321,6 +3664,14 @@ int DerToPem(const byte* der, word32 derSz, byte* output, word32 outSz,
         XSTRNCPY(footer, "-----END EC PRIVATE KEY-----\n", sizeof(footer));
     }
     #endif
+    #ifdef CYASSL_CERT_REQ
+    else if (type == CERTREQ_TYPE)
+    {
+        XSTRNCPY(header,
+                       "-----BEGIN CERTIFICATE REQUEST-----\n", sizeof(header));
+        XSTRNCPY(footer, "-----END CERTIFICATE REQUEST-----\n", sizeof(footer));
+    }
+    #endif
     else
         return BAD_FUNC_ARG;
 
@@ -3532,6 +3883,10 @@ void InitCert(Cert* cert)
     cert->subject.unit[0] = '\0';
     cert->subject.commonName[0] = '\0';
     cert->subject.email[0] = '\0';
+
+#ifdef CYASSL_CERT_REQ
+    cert->challengePw[0] ='\0';
+#endif
 }
 
 
@@ -3547,6 +3902,9 @@ typedef struct DerCert {
     byte publicKey[MAX_PUBLIC_KEY_SZ]; /* rsa / ntru public key encoded */
     byte ca[MAX_CA_SZ];                /* basic constraint CA true size */
     byte extensions[MAX_EXTENSIONS_SZ];  /* all extensions */
+#ifdef CYASSL_CERT_REQ
+    byte attrib[MAX_ATTRIB_SZ];        /* Cert req attributes encoded */
+#endif
     int  sizeSz;                       /* encoded size length */
     int  versionSz;                    /* encoded version length */
     int  serialSz;                     /* encoded serial length */
@@ -3558,16 +3916,23 @@ typedef struct DerCert {
     int  caSz;                         /* encoded CA extension length */
     int  extensionsSz;                 /* encoded extensions total length */
     int  total;                        /* total encoded lengths */
+#ifdef CYASSL_CERT_REQ
+    int  attribSz;
+#endif
 } DerCert;
 
 
+#ifdef CYASSL_CERT_REQ
+
 /* Write a set header to output */
-static word32 SetSet(word32 len, byte* output)
+static word32 SetUTF8String(word32 len, byte* output)
 {
-    output[0] = ASN_SET | ASN_CONSTRUCTED;
+    output[0] = ASN_UTF8STRING;
     return SetLength(len, output + 1) + 1;
 }
 
+#endif /* CYASSL_CERT_REQ */
+
 
 /* Write a serial number to output */
 static int SetSerial(const byte* serial, byte* output)
@@ -3582,8 +3947,59 @@ static int SetSerial(const byte* serial, byte* output)
 }
 
 
+#ifdef HAVE_ECC 
+
+/* Write a public ECC key to output */
+static int SetEccPublicKey(byte* output, ecc_key* key)
+{
+    byte algo[MAX_ALGO_SZ];
+    byte curve[MAX_ALGO_SZ];
+    byte len[MAX_LENGTH_SZ + 1];  /* trailing 0 */
+    byte pub[ECC_BUFSIZE];
+    int  algoSz;
+    int  curveSz;
+    int  lenSz;
+    int  idx;
+    word32 pubSz = sizeof(pub);
+
+    int ret = ecc_export_x963(key, pub, &pubSz);
+    if (ret != 0) return ret;
+
+    /* headers */
+    curveSz = SetCurve(key, curve);
+    if (curveSz <= 0) return curveSz;
+
+    algoSz  = SetAlgoID(ECDSAk, algo, keyType, curveSz);
+    lenSz   = SetLength(pubSz + 1, len);
+    len[lenSz++] = 0;   /* trailing 0 */
+
+    /* write */
+    idx = SetSequence(pubSz + curveSz + lenSz + 1 + algoSz, output);
+        /* 1 is for ASN_BIT_STRING */
+    /* algo */
+    XMEMCPY(output + idx, algo, algoSz);
+    idx += algoSz;
+    /* curve */
+    XMEMCPY(output + idx, curve, curveSz);
+    idx += curveSz;
+    /* bit string */
+    output[idx++] = ASN_BIT_STRING;
+    /* length */
+    XMEMCPY(output + idx, len, lenSz);
+    idx += lenSz;
+    /* pub */
+    XMEMCPY(output + idx, pub, pubSz);
+    idx += pubSz;
+
+    return idx;
+}
+
+
+#endif /* HAVE_ECC */
+
+
 /* Write a public RSA key to output */
-static int SetPublicKey(byte* output, RsaKey* key)
+static int SetRsaPublicKey(byte* output, RsaKey* key)
 {
     byte n[MAX_RSA_INT_SZ];
     byte e[MAX_RSA_E_SZ];
@@ -3597,14 +4013,19 @@ static int SetPublicKey(byte* output, RsaKey* key)
     int  lenSz;
     int  idx;
     int  rawLen;
+    int  leadingBit;
+    int  err;
 
     /* n */
-    rawLen = mp_unsigned_bin_size(&key->n);
+    leadingBit = mp_leading_bit(&key->n);
+    rawLen = mp_unsigned_bin_size(&key->n) + leadingBit;
     n[0] = ASN_INTEGER;
     nSz  = SetLength(rawLen, n + 1) + 1;  /* int tag */
 
     if ( (nSz + rawLen) < (int)sizeof(n)) {
-        int err = mp_to_unsigned_bin(&key->n, n + nSz);
+        if (leadingBit)
+            n[nSz] = 0;
+        err = mp_to_unsigned_bin(&key->n, n + nSz + leadingBit);
         if (err == MP_OKAY)
             nSz += rawLen;
         else
@@ -3614,12 +4035,15 @@ static int SetPublicKey(byte* output, RsaKey* key)
         return BUFFER_E;
 
     /* e */
-    rawLen = mp_unsigned_bin_size(&key->e);
+    leadingBit = mp_leading_bit(&key->e);
+    rawLen = mp_unsigned_bin_size(&key->e) + leadingBit;
     e[0] = ASN_INTEGER;
     eSz  = SetLength(rawLen, e + 1) + 1;  /* int tag */
 
     if ( (eSz + rawLen) < (int)sizeof(e)) {
-        int err = mp_to_unsigned_bin(&key->e, e + eSz);
+        if (leadingBit)
+            e[eSz] = 0;
+        err = mp_to_unsigned_bin(&key->e, e + eSz + leadingBit);
         if (err == MP_OKAY)
             eSz += rawLen;
         else
@@ -3629,7 +4053,7 @@ static int SetPublicKey(byte* output, RsaKey* key)
         return BUFFER_E;
 
     /* headers */
-    algoSz = SetAlgoID(RSAk, algo, keyType);
+    algoSz = SetAlgoID(RSAk, algo, keyType, 0);
     seqSz  = SetSequence(nSz + eSz, seq);
     lenSz  = SetLength(seqSz + nSz + eSz + 1, len);
     len[lenSz++] = 0;   /* trailing 0 */
@@ -3852,19 +4276,21 @@ static byte GetNameId(int idx)
 
 
 /* encode all extensions, return total bytes written */
-static int SetExtensions(byte* output, const byte* ext, int extSz)
+static int SetExtensions(byte* output, const byte* ext, int extSz, int header)
 {
     byte sequence[MAX_SEQ_SZ];
     byte len[MAX_LENGTH_SZ];
 
     int sz = 0;
     int seqSz = SetSequence(extSz, sequence);
-    int lenSz = SetLength(seqSz + extSz, len);
 
-    output[0] = ASN_EXTENSIONS; /* extensions id */
-    sz++;
-    XMEMCPY(&output[sz], len, lenSz);  /* length */
-    sz += lenSz; 
+    if (header) {
+        int lenSz = SetLength(seqSz + extSz, len);
+        output[0] = ASN_EXTENSIONS; /* extensions id */
+        sz++;
+        XMEMCPY(&output[sz], len, lenSz);  /* length */
+        sz += lenSz;
+    }
     XMEMCPY(&output[sz], sequence, seqSz);  /* sequence */
     sz += seqSz;
     XMEMCPY(&output[sz], ext, extSz);  /* extensions */
@@ -3957,12 +4383,16 @@ static int SetName(byte* output, CertName* name)
             }
             else {
                 /* joint id */
+                byte bType = GetNameId(i);
                 names[i].encoded[idx++] = 0x55;
                 names[i].encoded[idx++] = 0x04;
                 /* id type */
-                names[i].encoded[idx++] = GetNameId(i);
+                names[i].encoded[idx++] = bType; 
                 /* str type */
-                names[i].encoded[idx++] = 0x13;
+                if (bType == ASN_COUNTRY_NAME)
+                    names[i].encoded[idx++] = 0x13;   /* printable */
+                else
+                    names[i].encoded[idx++] = 0x0c;   /* utf8 */
             }
             /* second length */
             XMEMCPY(names[i].encoded + idx, secondLen, secondSz);
@@ -3994,15 +4424,11 @@ static int SetName(byte* output, CertName* name)
     return totalBytes;
 }
 
-/* encode info from cert into DER enocder format */
-static int EncodeCert(
-Cert* cert, 
-DerCert* der, 
-RsaKey* rsaKey, 
-RNG* rng,
-                      const byte* ntruKey, 
-word16 ntruSz)
+/* encode info from cert into DER encoded format */
+static int EncodeCert(Cert* cert, DerCert* der, RsaKey* rsaKey, ecc_key* eccKey,
+                      RNG* rng, const byte* ntruKey, word16 ntruSz)
 {
+    (void)eccKey;
     (void)ntruKey;
     (void)ntruSz;
 
@@ -4018,18 +4444,31 @@ word16 ntruSz)
     der->serialSz  = SetSerial(cert->serial, der->serial);
 
     /* signature algo */
-    der->sigAlgoSz = SetAlgoID(cert->sigType, der->sigAlgo, sigType);
+    der->sigAlgoSz = SetAlgoID(cert->sigType, der->sigAlgo, sigType, 0);
     if (der->sigAlgoSz == 0)
         return ALGO_ID_E;
 
     /* public key */
     if (cert->keyType == RSA_KEY) {
-        der->publicKeySz = SetPublicKey(der->publicKey, rsaKey);
-        if (der->publicKeySz == 0)
+        if (rsaKey == NULL)
+            return PUBLIC_KEY_E;
+        der->publicKeySz = SetRsaPublicKey(der->publicKey, rsaKey);
+        if (der->publicKeySz <= 0)
             return PUBLIC_KEY_E;
     }
-    else {
+
+#ifdef HAVE_ECC
+    if (cert->keyType == ECC_KEY) {
+        if (eccKey == NULL)
+            return PUBLIC_KEY_E;
+        der->publicKeySz = SetEccPublicKey(der->publicKey, eccKey);
+        if (der->publicKeySz <= 0)
+            return PUBLIC_KEY_E;
+    }
+#endif /* HAVE_ECC */
+
 #ifdef HAVE_NTRU
+    if (cert->keyType == NTRU_KEY) {
         word32 rc;
         word16 encodedSz;
 
@@ -4046,8 +4485,8 @@ word16 ntruSz)
             return PUBLIC_KEY_E;
 
         der->publicKeySz = encodedSz;
-#endif
     }
+#endif /* HAVE_NTRU */
 
     der->validitySz = 0;
 #ifdef CYASSL_ALT_NAMES
@@ -4088,7 +4527,8 @@ word16 ntruSz)
 
     /* extensions, just CA now */
     if (cert->isCA) {
-        der->extensionsSz = SetExtensions(der->extensions, der->ca, der->caSz);
+        der->extensionsSz = SetExtensions(der->extensions,
+                                          der->ca, der->caSz, TRUE);
         if (der->extensionsSz == 0)
             return EXTENSIONS_E;
     }
@@ -4098,7 +4538,7 @@ word16 ntruSz)
 #ifdef CYASSL_ALT_NAMES
     if (der->extensionsSz == 0 && cert->altNamesSz) {
         der->extensionsSz = SetExtensions(der->extensions, cert->altNames,
-                                          cert->altNamesSz);
+                                          cert->altNamesSz, TRUE);
         if (der->extensionsSz == 0)
             return EXTENSIONS_E;
     }
@@ -4153,12 +4593,15 @@ static int WriteCertBody(DerCert* der, byte* buffer)
 
 /* Make RSA signature from buffer (sz), write to sig (sigSz) */
 static int MakeSignature(const byte* buffer, int sz, byte* sig, int sigSz,
-                         RsaKey* key, RNG* rng, int sigAlgoType)
+                         RsaKey* rsaKey, ecc_key* eccKey, RNG* rng,
+                         int sigAlgoType)
 {
     byte    digest[SHA256_DIGEST_SIZE];     /* max size */
     byte    encSig[MAX_ENCODED_DIG_SZ + MAX_ALGO_SZ + MAX_SEQ_SZ];
     int     encSigSz, digestSz, typeH;
 
+    (void)eccKey;
+
     if (sigAlgoType == CTC_MD5wRSA) {
         Md5     md5;
         InitMd5(&md5);
@@ -4167,7 +4610,7 @@ static int MakeSignature(const byte* buffer, int sz, byte* sig, int sigSz,
         digestSz = MD5_DIGEST_SIZE;
         typeH    = MD5h;
     }
-    else if (sigAlgoType == CTC_SHAwRSA) {
+    else if (sigAlgoType == CTC_SHAwRSA || sigAlgoType == CTC_SHAwECDSA) {
         Sha     sha;
         InitSha(&sha);
         ShaUpdate(&sha, buffer, sz);
@@ -4175,7 +4618,7 @@ static int MakeSignature(const byte* buffer, int sz, byte* sig, int sigSz,
         digestSz = SHA_DIGEST_SIZE;
         typeH    = SHAh;
     }
-    else if (sigAlgoType == CTC_SHA256wRSA) {
+    else if (sigAlgoType == CTC_SHA256wRSA || sigAlgoType == CTC_SHA256wECDSA) {
         Sha256     sha256;
         InitSha256(&sha256);
         Sha256Update(&sha256, buffer, sz);
@@ -4186,9 +4629,23 @@ static int MakeSignature(const byte* buffer, int sz, byte* sig, int sigSz,
     else
         return ALGO_ID_E;
 
-    /* signature */
-    encSigSz = EncodeSignature(encSig, digest, digestSz, typeH);
-    return RsaSSL_Sign(encSig, encSigSz, sig, sigSz, key, rng);
+    if (rsaKey) {
+        /* signature */
+        encSigSz = EncodeSignature(encSig, digest, digestSz, typeH);
+        return RsaSSL_Sign(encSig, encSigSz, sig, sigSz, rsaKey, rng);
+    }
+#ifdef HAVE_ECC
+    else if (eccKey) {
+        word32 outSz = sigSz;
+        int ret = ecc_sign_hash(digest, digestSz, sig, &outSz, rng, eccKey);
+
+        if (ret != 0)
+            return ret;
+        return outSz;
+    }
+#endif /* HAVE_ECC */
+
+    return ALGO_ID_E;
 }
 
 
@@ -4201,7 +4658,7 @@ static int AddSignature(byte* buffer, int bodySz, const byte* sig, int sigSz,
     int  idx = bodySz, seqSz;
 
     /* algo */
-    idx += SetAlgoID(sigAlgoType, buffer + idx, sigType);
+    idx += SetAlgoID(sigAlgoType, buffer + idx, sigType, 0);
     /* bit string */
     buffer[idx++] = ASN_BIT_STRING;
     /* length */
@@ -4222,13 +4679,17 @@ static int AddSignature(byte* buffer, int bodySz, const byte* sig, int sigSz,
 
 /* Make an x509 Certificate v3 any key type from cert input, write to buffer */
 static int MakeAnyCert(Cert* cert, byte* derBuffer, word32 derSz,
-                   RsaKey* rsaKey, RNG* rng, const byte* ntruKey, word16 ntruSz)
+                       RsaKey* rsaKey, ecc_key* eccKey, RNG* rng,
+                       const byte* ntruKey, word16 ntruSz)
 {
     DerCert der;
     int     ret;
 
-    cert->keyType = rsaKey ? RSA_KEY : NTRU_KEY;
-    ret = EncodeCert(cert, &der, rsaKey, rng, ntruKey, ntruSz);
+    if (eccKey)
+        cert->keyType = ECC_KEY;
+    else
+        cert->keyType = rsaKey ? RSA_KEY : NTRU_KEY;
+    ret = EncodeCert(cert, &der, rsaKey, eccKey, rng, ntruKey, ntruSz);
     if (ret != 0)
         return ret;
 
@@ -4239,10 +4700,11 @@ static int MakeAnyCert(Cert* cert, byte* derBuffer, word32 derSz,
 }
 
 
-/* Make an x509 Certificate v3 RSA from cert input, write to buffer */
-int MakeCert(Cert* cert, byte* derBuffer, word32 derSz, RsaKey* rsaKey,RNG* rng)
+/* Make an x509 Certificate v3 RSA or ECC from cert input, write to buffer */
+int MakeCert(Cert* cert, byte* derBuffer, word32 derSz, RsaKey* rsaKey,
+             ecc_key* eccKey, RNG* rng)
 {
-    return MakeAnyCert(cert, derBuffer, derSz, rsaKey, rng, NULL, 0);
+    return MakeAnyCert(cert, derBuffer, derSz, rsaKey, eccKey, rng, NULL, 0);
 }
 
 
@@ -4251,41 +4713,231 @@ int MakeCert(Cert* cert, byte* derBuffer, word32 derSz, RsaKey* rsaKey,RNG* rng)
 int  MakeNtruCert(Cert* cert, byte* derBuffer, word32 derSz,
                   const byte* ntruKey, word16 keySz, RNG* rng)
 {
-    return MakeAnyCert(cert, derBuffer, derSz, NULL, rng, ntruKey, keySz);
+    return MakeAnyCert(cert, derBuffer, derSz, NULL, NULL, rng, ntruKey, keySz);
 }
 
 #endif /* HAVE_NTRU */
 
 
-int SignCert(Cert* cert, byte* buffer, word32 buffSz, RsaKey* key, RNG* rng)
+#ifdef CYASSL_CERT_REQ
+
+static int SetReqAttrib(byte* output, char* pw, int extSz)
+{
+    static const byte cpOid[] =
+        { ASN_OBJECT_ID, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01,
+                         0x09, 0x07 };
+    static const byte erOid[] =
+        { ASN_OBJECT_ID, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01,
+                         0x09, 0x0e };
+
+    int sz      = 0; /* overall size */
+    int cpSz    = 0; /* Challenge Password section size */
+    int cpSeqSz = 0;
+    int cpSetSz = 0;
+    int cpStrSz = 0;
+    int pwSz    = 0;
+    int erSz    = 0; /* Extension Request section size */
+    int erSeqSz = 0;
+    int erSetSz = 0;
+    byte cpSeq[MAX_SEQ_SZ];
+    byte cpSet[MAX_SET_SZ];
+    byte cpStr[MAX_PRSTR_SZ];
+    byte erSeq[MAX_SEQ_SZ];
+    byte erSet[MAX_SET_SZ];
+
+    output[0] = 0xa0;
+    sz++;
+
+    if (pw && pw[0]) {
+        pwSz = (int)XSTRLEN(pw);
+        cpStrSz = SetUTF8String(pwSz, cpStr);
+        cpSetSz = SetSet(cpStrSz + pwSz, cpSet);
+        cpSeqSz = SetSequence(sizeof(cpOid) + cpSetSz + cpStrSz + pwSz, cpSeq);
+        cpSz = cpSeqSz + sizeof(cpOid) + cpSetSz + cpStrSz + pwSz;
+    }
+
+    if (extSz) {
+        erSetSz = SetSet(extSz, erSet);
+        erSeqSz = SetSequence(erSetSz + sizeof(erOid) + extSz, erSeq);
+        erSz = extSz + erSetSz + erSeqSz + sizeof(erOid);
+    }
+
+    /* Put the pieces together. */
+    sz += SetLength(cpSz + erSz, &output[sz]);
+
+    if (cpSz) {
+        XMEMCPY(&output[sz], cpSeq, cpSeqSz);
+        sz += cpSeqSz;
+        XMEMCPY(&output[sz], cpOid, sizeof(cpOid));
+        sz += sizeof(cpOid);
+        XMEMCPY(&output[sz], cpSet, cpSetSz);
+        sz += cpSetSz;
+        XMEMCPY(&output[sz], cpStr, cpStrSz);
+        sz += cpStrSz;
+        XMEMCPY(&output[sz], pw, pwSz);
+        sz += pwSz;
+    }
+
+    if (erSz) {
+        XMEMCPY(&output[sz], erSeq, erSeqSz);
+        sz += erSeqSz;
+        XMEMCPY(&output[sz], erOid, sizeof(erOid));
+        sz += sizeof(erOid);
+        XMEMCPY(&output[sz], erSet, erSetSz);
+        sz += erSetSz;
+        /* The actual extension data will be tacked onto the output later. */
+    }
+
+    return sz;
+}
+
+
+/* encode info from cert into DER encoded format */
+static int EncodeCertReq(Cert* cert, DerCert* der,
+                         RsaKey* rsaKey, ecc_key* eccKey)
+{
+    (void)eccKey;
+
+    /* init */
+    XMEMSET(der, 0, sizeof(DerCert));
+
+    /* version */
+    der->versionSz = SetMyVersion(cert->version, der->version, FALSE);
+
+    /* subject name */
+    der->subjectSz = SetName(der->subject, &cert->subject);
+    if (der->subjectSz == 0)
+        return SUBJECT_E;
+
+    /* public key */
+    if (cert->keyType == RSA_KEY) {
+        if (rsaKey == NULL)
+            return PUBLIC_KEY_E;
+        der->publicKeySz = SetRsaPublicKey(der->publicKey, rsaKey);
+        if (der->publicKeySz <= 0)
+            return PUBLIC_KEY_E;
+    }
+
+#ifdef HAVE_ECC
+    if (cert->keyType == ECC_KEY) {
+        if (eccKey == NULL)
+            return PUBLIC_KEY_E;
+        der->publicKeySz = SetEccPublicKey(der->publicKey, eccKey);
+        if (der->publicKeySz <= 0)
+            return PUBLIC_KEY_E;
+    }
+#endif /* HAVE_ECC */
+
+    /* CA */
+    if (cert->isCA) {
+        der->caSz = SetCa(der->ca);
+        if (der->caSz == 0)
+            return CA_TRUE_E;
+    }
+    else
+        der->caSz = 0;
+
+    /* extensions, just CA now */
+    if (cert->isCA) {
+        der->extensionsSz = SetExtensions(der->extensions,
+                                          der->ca, der->caSz, FALSE);
+        if (der->extensionsSz == 0)
+            return EXTENSIONS_E;
+    }
+    else
+        der->extensionsSz = 0;
+
+    der->attribSz = SetReqAttrib(der->attrib,
+                                 cert->challengePw, der->extensionsSz);
+    if (der->attribSz == 0)
+        return REQ_ATTRIBUTE_E;
+
+    der->total = der->versionSz + der->subjectSz + der->publicKeySz +
+        der->extensionsSz + der->attribSz;
+
+    return 0;
+}
+
+
+/* write DER encoded cert req to buffer, size already checked */
+static int WriteCertReqBody(DerCert* der, byte* buffer)
+{
+    int idx;
+
+    /* signed part header */
+    idx = SetSequence(der->total, buffer);
+    /* version */
+    XMEMCPY(buffer + idx, der->version, der->versionSz);
+    idx += der->versionSz;
+    /* subject */
+    XMEMCPY(buffer + idx, der->subject, der->subjectSz);
+    idx += der->subjectSz;
+    /* public key */
+    XMEMCPY(buffer + idx, der->publicKey, der->publicKeySz);
+    idx += der->publicKeySz;
+    /* attributes */
+    XMEMCPY(buffer + idx, der->attrib, der->attribSz);
+    idx += der->attribSz;
+    /* extensions */
+    if (der->extensionsSz) {
+        XMEMCPY(buffer + idx, der->extensions, min(der->extensionsSz,
+                                                   sizeof(der->extensions)));
+        idx += der->extensionsSz;
+    }
+
+    return idx;
+}
+
+
+int MakeCertReq(Cert* cert, byte* derBuffer, word32 derSz,
+                RsaKey* rsaKey, ecc_key* eccKey)
+{
+    DerCert der;
+    int     ret;
+
+    cert->keyType = (eccKey != NULL) ? ECC_KEY : RSA_KEY;
+    ret = EncodeCertReq(cert, &der, rsaKey, eccKey);
+    if (ret != 0)
+        return ret;
+
+    if (der.total + MAX_SEQ_SZ * 2 > (int)derSz)
+        return BUFFER_E;
+
+    return cert->bodySz = WriteCertReqBody(&der, derBuffer);
+}
+
+#endif /* CYASSL_CERT_REQ */
+
+
+int SignCert(int requestSz, int sType, byte* buffer, word32 buffSz,
+             RsaKey* rsaKey, ecc_key* eccKey, RNG* rng)
 {
     byte    sig[MAX_ENCODED_SIG_SZ];
     int     sigSz;
-    int     bodySz = cert->bodySz;
 
-    if (bodySz < 0)
-        return bodySz;
+    if (requestSz < 0)
+        return requestSz;
 
-    sigSz  = MakeSignature(buffer, bodySz, sig, sizeof(sig), key, rng,
-                           cert->sigType);
+    sigSz = MakeSignature(buffer, requestSz, sig, sizeof(sig), rsaKey, eccKey,
+                          rng, sType);
     if (sigSz < 0)
         return sigSz; 
 
-    if (bodySz + MAX_SEQ_SZ * 2 + sigSz > (int)buffSz)
+    if (requestSz + MAX_SEQ_SZ * 2 + sigSz > (int)buffSz)
         return BUFFER_E; 
 
-    return AddSignature(buffer, bodySz, sig, sigSz, cert->sigType);
+    return AddSignature(buffer, requestSz, sig, sigSz, sType);
 }
 
 
 int MakeSelfCert(Cert* cert, byte* buffer, word32 buffSz, RsaKey* key, RNG* rng)
 {
-    int ret = MakeCert(cert, buffer, buffSz, key, rng);
+    int ret = MakeCert(cert, buffer, buffSz, key, NULL, rng);
 
     if (ret < 0)
         return ret;
 
-    return SignCert(cert, buffer, buffSz, key, rng);
+    return SignCert(cert->bodySz, cert->sigType, buffer, buffSz, key, NULL,rng);
 }
 
 
@@ -4611,7 +5263,8 @@ int StoreECC_DSA_Sig(byte* out, word32* outLen, mp_int* r, mp_int* s)
     int sLen = mp_unsigned_bin_size(s);
     int err;
 
-    if (*outLen < (rLen + sLen + headerSz + 2))  /* SEQ_TAG + LEN(ENUM) */
+    if (*outLen < (rLen + rLeadingZero + sLen + sLeadingZero +
+                   headerSz + 2))  /* SEQ_TAG + LEN(ENUM) */
         return BAD_FUNC_ARG;
 
     idx = SetSequence(rLen+rLeadingZero+sLen+sLeadingZero+headerSz, out);
@@ -5215,33 +5868,6 @@ int OcspResponseDecode(OcspResponse* resp)
 }
 
 
-static int SetSerialNumber(const byte* sn, word32 snSz, byte* output)
-{
-    int result = 0;
-
-    CYASSL_ENTER("SetSerialNumber");
-
-    if (snSz <= EXTERNAL_SERIAL_SIZE) {
-        output[0] = ASN_INTEGER;
-        /* The serial number is always positive. When encoding the
-         * INTEGER, if the MSB is 1, add a padding zero to keep the
-         * number positive. */
-        if (sn[0] & 0x80) {
-            output[1] = (byte)snSz + 1;
-            output[2] = 0;
-            XMEMCPY(&output[3], sn, snSz);
-            result = snSz + 3;
-        }
-        else {
-            output[1] = (byte)snSz;
-            XMEMCPY(&output[2], sn, snSz);
-            result = snSz + 2;
-        }
-    }
-    return result;
-}
-
-
 static word32 SetOcspReqExtensions(word32 extSz, byte* output,
                                             const byte* nonce, word32 nonceSz)
 {
@@ -5310,7 +5936,7 @@ int EncodeOcspRequest(OcspRequest* req)
 
     CYASSL_ENTER("EncodeOcspRequest");
 
-    algoSz = SetAlgoID(SHAh, algoArray, hashType);
+    algoSz = SetAlgoID(SHAh, algoArray, hashType, 0);
 
     req->issuerHash = req->cert->issuerHash;
     issuerSz = SetDigest(req->cert->issuerHash, SHA_SIZE, issuerArray);
@@ -5398,7 +6024,9 @@ int CompareOcspReqResp(OcspRequest* req, OcspResponse* resp)
         return 1;
     }
 
-    if (req->useNonce) {
+    /* Nonces are not critical. The responder may not necessarily add
+     * the nonce to the response. */
+    if (req->useNonce && resp->nonceSz != 0) {
         cmp = req->nonceSz - resp->nonceSz;
         if (cmp != 0)
         {
@@ -5448,39 +6076,9 @@ int CompareOcspReqResp(OcspRequest* req, OcspResponse* resp)
 #endif
 
 
-#ifdef HAVE_CRL
-
-/* initialize decoded CRL */
-void InitDecodedCRL(DecodedCRL* dcrl)
-{
-    CYASSL_MSG("InitDecodedCRL");
-
-    dcrl->certBegin    = 0;
-    dcrl->sigIndex     = 0;
-    dcrl->sigLength    = 0;
-    dcrl->signatureOID = 0;
-    dcrl->certs        = NULL;
-    dcrl->totalCerts   = 0;
-}
-
-
-/* free decoded CRL resources */
-void FreeDecodedCRL(DecodedCRL* dcrl)
-{
-    RevokedCert* tmp = dcrl->certs;
-
-    CYASSL_MSG("FreeDecodedCRL");
-
-    while(tmp) {
-        RevokedCert* next = tmp->next;
-        XFREE(tmp, NULL, DYNAMIC_TYPE_REVOKED);
-        tmp = next;
-    }
-}
-
-
 /* store SHA1 hash of NAME */
-static int GetNameHash(const byte* source, word32* idx, byte* hash, int maxIdx)
+CYASSL_LOCAL int GetNameHash(const byte* source, word32* idx, byte* hash,
+                             int maxIdx)
 {
     Sha    sha;
     int    length;  /* length of all distinguished names */
@@ -5515,6 +6113,37 @@ static int GetNameHash(const byte* source, word32* idx, byte* hash, int maxIdx)
 }
 
 
+#ifdef HAVE_CRL
+
+/* initialize decoded CRL */
+void InitDecodedCRL(DecodedCRL* dcrl)
+{
+    CYASSL_MSG("InitDecodedCRL");
+
+    dcrl->certBegin    = 0;
+    dcrl->sigIndex     = 0;
+    dcrl->sigLength    = 0;
+    dcrl->signatureOID = 0;
+    dcrl->certs        = NULL;
+    dcrl->totalCerts   = 0;
+}
+
+
+/* free decoded CRL resources */
+void FreeDecodedCRL(DecodedCRL* dcrl)
+{
+    RevokedCert* tmp = dcrl->certs;
+
+    CYASSL_MSG("FreeDecodedCRL");
+
+    while(tmp) {
+        RevokedCert* next = tmp->next;
+        XFREE(tmp, NULL, DYNAMIC_TYPE_REVOKED);
+        tmp = next;
+    }
+}
+
+
 /* Get Revoked Cert list, 0 on success */
 static int GetRevoked(const byte* buff, word32* idx, DecodedCRL* dcrl,
                       int maxIdx)
diff --git a/ctaocrypt/src/coding.c b/ctaocrypt/src/coding.c
index 78286faae..8add2d59a 100644
--- a/ctaocrypt/src/coding.c
+++ b/ctaocrypt/src/coding.c
@@ -147,16 +147,101 @@ const byte base64Encode[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J',
                             };
 
 
-/* porting assistance from yaSSL by Raphael HUCK */
-int Base64_Encode(const byte* in, word32 inLen, byte* out, word32* outLen)
+/* make sure *i (idx) won't exceed max, store and possibly escape to out,
+ * raw means use e w/o decode,  0 on success */
+static int CEscape(int escaped, byte e, byte* out, word32* i, word32 max,
+                  int raw)
 {
+    int    doEscape = 0;
+    word32 needed = 1;
+    word32 idx = *i;
+
+    byte basic;
+    byte plus    = 0;
+    byte equals  = 0;
+    byte newline = 0;
+
+    if (raw)
+        basic = e;
+    else
+        basic = base64Encode[e];
+
+    /* check whether to escape */
+    if (escaped) {
+        switch ((char)basic) {
+            case '+' :
+                plus     = 1;
+                doEscape = 1;
+                needed  += 2;
+                break;
+            case '=' :
+                equals   = 1;
+                doEscape = 1;
+                needed  += 2;
+                break;
+            case '\n' :
+                newline  = 1;
+                doEscape = 1;
+                needed  += 2;
+                break;
+            default:
+                /* do nothing */
+                break;
+        }
+    }
+
+    /* check size */
+    if ( (idx+needed) > max) {
+        CYASSL_MSG("Escape buffer max too small");
+        return BUFFER_E;
+    }
+
+    /* store it */
+    if (doEscape == 0) {
+        out[idx++] = basic;
+    }
+    else {
+        out[idx++] = '%';  /* start escape */
+
+        if (plus) {
+            out[idx++] = '2';
+            out[idx++] = 'B';
+        }
+        else if (equals) {
+            out[idx++] = '3';
+            out[idx++] = 'D';
+        }
+        else if (newline) {
+            out[idx++] = '0';
+            out[idx++] = 'A';
+        }
+
+    }
+    *i = idx;
+
+    return 0;
+}
+
+
+/* internal worker, handles both escaped and normal line endings */
+static int DoBase64_Encode(const byte* in, word32 inLen, byte* out,
+                           word32* outLen, int escaped)
+{
+    int    ret = 0;
     word32 i = 0,
            j = 0,
            n = 0;   /* new line counter */
 
     word32 outSz = (inLen + 3 - 1) / 3 * 4;
-    outSz += (outSz + PEM_LINE_SZ - 1) / PEM_LINE_SZ;  /* new lines */
+    word32 addSz = (outSz + PEM_LINE_SZ - 1) / PEM_LINE_SZ;  /* new lines */
 
+    if (escaped)
+        addSz *= 3;   /* instead of just \n, we're doing %0A triplet */
+
+    outSz += addSz;
+
+    /* if escaped we can't predetermine size for one pass encoding, but
+     * make sure we have enough if no escapes are in input */
     if (outSz > *outLen) return BAD_FUNC_ARG;
     
     while (inLen > 2) {
@@ -171,19 +256,25 @@ int Base64_Encode(const byte* in, word32 inLen, byte* out, word32* outLen)
         byte e4 = b3 & 0x3F;
 
         /* store */
-        out[i++] = base64Encode[e1];
-        out[i++] = base64Encode[e2];
-        out[i++] = base64Encode[e3];
-        out[i++] = base64Encode[e4];
+        ret = CEscape(escaped, e1, out, &i, *outLen, 0);
+        if (ret != 0) break;
+        ret = CEscape(escaped, e2, out, &i, *outLen, 0);
+        if (ret != 0) break;
+        ret = CEscape(escaped, e3, out, &i, *outLen, 0);
+        if (ret != 0) break;
+        ret = CEscape(escaped, e4, out, &i, *outLen, 0);
+        if (ret != 0) break;
 
         inLen -= 3;
 
-        if ((++n % (PEM_LINE_SZ / 4)) == 0 && inLen)
-            out[i++] = '\n';
+        if ((++n % (PEM_LINE_SZ / 4)) == 0 && inLen) {
+            ret = CEscape(escaped, '\n', out, &i, *outLen, 1);
+            if (ret != 0) break;
+        }
     }
 
     /* last integral */
-    if (inLen) {
+    if (inLen && ret == 0) {
         int twoBytes = (inLen == 2);
 
         byte b1 = in[j++];
@@ -193,18 +284,43 @@ int Base64_Encode(const byte* in, word32 inLen, byte* out, word32* outLen)
         byte e2 = ((b1 & 0x3) << 4) | (b2 >> 4);
         byte e3 =  (b2 & 0xF) << 2;
 
-        out[i++] = base64Encode[e1];
-        out[i++] = base64Encode[e2];
-        out[i++] = (twoBytes) ? base64Encode[e3] : PAD;
-        out[i++] = PAD;
+        ret = CEscape(escaped, e1, out, &i, *outLen, 0);
+        if (ret == 0) 
+            ret = CEscape(escaped, e2, out, &i, *outLen, 0);
+        if (ret == 0) {
+            /* third */
+            if (twoBytes)
+                ret = CEscape(escaped, e3, out, &i, *outLen, 0);
+            else 
+                ret = CEscape(escaped, '=', out, &i, *outLen, 1);
+        }
+        /* fourth always pad */
+        if (ret == 0)
+            ret = CEscape(escaped, '=', out, &i, *outLen, 1);
     } 
 
-    out[i++] = '\n';
-    if (i != outSz)
-        return ASN_INPUT_E; 
-    *outLen = outSz;
+    if (ret == 0) 
+        ret = CEscape(escaped, '\n', out, &i, *outLen, 1);
 
-    return 0; 
+    if (i != outSz && escaped == 0 && ret == 0)
+        return ASN_INPUT_E; 
+
+    *outLen = i;
+    return ret; 
+}
+
+
+/* Base64 Encode, PEM style, with \n line endings */
+int Base64_Encode(const byte* in, word32 inLen, byte* out, word32* outLen)
+{
+    return DoBase64_Encode(in, inLen, out, outLen, 0);
+}
+
+
+/* Base64 Encode, with %0A esacped line endings instead of \n */
+int Base64_EncodeEsc(const byte* in, word32 inLen, byte* out, word32* outLen)
+{
+    return DoBase64_Encode(in, inLen, out, outLen, 1);
 }
 
 
diff --git a/ctaocrypt/src/ecc.c b/ctaocrypt/src/ecc.c
index 0a87e00cb..609a386f8 100644
--- a/ctaocrypt/src/ecc.c
+++ b/ctaocrypt/src/ecc.c
@@ -1997,7 +1997,6 @@ int ecc_export_x963(ecc_key* key, byte* out, word32* outLen)
 int ecc_import_x963(const byte* in, word32 inLen, ecc_key* key)
 {
    int x, err;
-
    
    if (in == NULL || key == NULL)
        return ECC_BAD_ARG_E;
@@ -2144,17 +2143,22 @@ int ecc_sig_size(ecc_key* key)
 
 
 /** Our FP cache */
-static struct {
+typedef struct {
    ecc_point* g;               /* cached COPY of base point */
    ecc_point* LUT[1U<encAlgo = ecAES_128_CBC;
-        options->kdfAlgo = ecHKDF_SHA256;
-        options->macAlgo = ecHMAC_SHA256;
+enum ecCliState {
+    ecCLI_INIT      = 1,    
+    ecCLI_SALT_GET  = 2,    
+    ecCLI_SALT_SET  = 3,    
+    ecCLI_SENT_REQ  = 4,    
+    ecCLI_RECV_RESP = 5,    
+    ecCLI_BAD_STATE = 99    
+};
+
+enum ecSrvState {
+    ecSRV_INIT      = 1,    
+    ecSRV_SALT_GET  = 2,    
+    ecSRV_SALT_SET  = 3,    
+    ecSRV_RECV_REQ  = 4,    
+    ecSRV_SENT_RESP = 5,    
+    ecSRV_BAD_STATE = 99    
+};
+
+
+struct ecEncCtx {
+    byte*     kdfSalt;     /* optional salt for kdf */
+    byte*     kdfInfo;     /* optional info for kdf */
+    byte*     macSalt;     /* optional salt for mac */
+    word32    kdfSaltSz;   /* size of kdfSalt */
+    word32    kdfInfoSz;   /* size of kdfInfo */
+    word32    macSaltSz;   /* size of macSalt */
+    byte      clientSalt[EXCHANGE_SALT_SZ];  /* for msg exchange */
+    byte      serverSalt[EXCHANGE_SALT_SZ];  /* for msg exchange */
+    byte      encAlgo;     /* which encryption type */
+    byte      kdfAlgo;     /* which key derivation function type */
+    byte      macAlgo;     /* which mac function type */
+    byte      protocol;    /* are we REQ_RESP client or server ? */
+    byte      cliSt;       /* protocol state, for sanity checks */
+    byte      srvSt;       /* protocol state, for sanity checks */
+};
+
+
+const byte* ecc_ctx_get_own_salt(ecEncCtx* ctx)
+{
+    if (ctx == NULL || ctx->protocol == 0)
+        return NULL;
+
+    if (ctx->protocol == REQ_RESP_CLIENT) {
+        if (ctx->cliSt == ecCLI_INIT) {
+            ctx->cliSt =  ecCLI_SALT_GET;
+            return ctx->clientSalt;
+        }
+        else {
+            ctx->cliSt = ecCLI_BAD_STATE;
+            return NULL;
+        }
     }
+    else if (ctx->protocol == REQ_RESP_SERVER) {
+        if (ctx->srvSt == ecSRV_INIT) {
+            ctx->srvSt =  ecSRV_SALT_GET;
+            return ctx->serverSalt;
+        }
+        else {
+            ctx->srvSt = ecSRV_BAD_STATE;
+            return NULL;
+        }
+    }
+
+    return NULL;
+}
+
+
+static const char* exchange_info = "Secure Message Exchange";
+
+int ecc_ctx_set_peer_salt(ecEncCtx* ctx, const byte* salt)
+{
+    byte tmp[EXCHANGE_SALT_SZ/2];
+    int  halfSz = EXCHANGE_SALT_SZ/2;
+
+    if (ctx == NULL || ctx->protocol == 0 || salt == NULL)
+        return BAD_FUNC_ARG;
+
+    if (ctx->protocol == REQ_RESP_CLIENT) {
+        XMEMCPY(ctx->serverSalt, salt, EXCHANGE_SALT_SZ);
+        if (ctx->cliSt == ecCLI_SALT_GET)
+            ctx->cliSt =  ecCLI_SALT_SET;
+        else {
+            ctx->cliSt =  ecCLI_BAD_STATE;
+            return BAD_ENC_STATE_E;
+        }
+    }
+    else {
+        XMEMCPY(ctx->clientSalt, salt, EXCHANGE_SALT_SZ);
+        if (ctx->srvSt == ecSRV_SALT_GET)
+            ctx->srvSt =  ecSRV_SALT_SET;
+        else {
+            ctx->srvSt =  ecSRV_BAD_STATE;
+            return BAD_ENC_STATE_E;
+        }
+    }
+
+    /* mix half and half */
+    /* tmp stores 2nd half of client before overwrite */
+    XMEMCPY(tmp, ctx->clientSalt + halfSz, halfSz);
+    XMEMCPY(ctx->clientSalt + halfSz, ctx->serverSalt, halfSz);
+    XMEMCPY(ctx->serverSalt, tmp, halfSz);
+
+    ctx->kdfSalt   = ctx->clientSalt;
+    ctx->kdfSaltSz = EXCHANGE_SALT_SZ;
+
+    ctx->macSalt   = ctx->serverSalt;
+    ctx->macSaltSz = EXCHANGE_SALT_SZ;
+
+    ctx->kdfInfo   = (byte*)exchange_info;
+    ctx->kdfInfoSz = EXCHANGE_INFO_SZ;
+
+    return 0;
+}
+
+
+static int ecc_ctx_set_salt(ecEncCtx* ctx, int flags, RNG* rng)
+{
+    byte* saltBuffer = NULL;
+
+    if (ctx == NULL || rng == NULL || flags == 0) 
+        return BAD_FUNC_ARG;
+
+    saltBuffer = (flags == REQ_RESP_CLIENT) ? ctx->clientSalt : ctx->serverSalt;
+    RNG_GenerateBlock(rng, saltBuffer, EXCHANGE_SALT_SZ);
+
+    return 0;
+}
+
+
+static void ecc_ctx_init(ecEncCtx* ctx, int flags)
+{
+    if (ctx) {
+        XMEMSET(ctx, 0, sizeof(ecEncCtx));
+
+        ctx->encAlgo  = ecAES_128_CBC;
+        ctx->kdfAlgo  = ecHKDF_SHA256;
+        ctx->macAlgo  = ecHMAC_SHA256;
+        ctx->protocol = (byte)flags;
+
+        if (flags == REQ_RESP_CLIENT)
+            ctx->cliSt = ecCLI_INIT;
+        if (flags == REQ_RESP_SERVER)
+            ctx->srvSt = ecSRV_INIT;
+    }
+}
+
+
+/* alloc/init and set defaults, return new Context  */
+ecEncCtx* ecc_ctx_new(int flags, RNG* rng)
+{
+    int       ret = 0;
+    ecEncCtx* ctx = (ecEncCtx*)XMALLOC(sizeof(ecEncCtx), 0, DYNAMIC_TYPE_ECC);
+
+    ecc_ctx_init(ctx, flags);
+
+    if (ctx && flags)
+        ret = ecc_ctx_set_salt(ctx, flags, rng);
+
+    if (ret != 0) {
+        ecc_ctx_free(ctx);
+        ctx = NULL;
+    }
+
+    return ctx;
 }
 
 
 /* free any resources, clear any keys */
-void ecc_encrypt_free_options(ecEncOptions* options)
+void ecc_ctx_free(ecEncCtx* ctx)
 {
-    if (options) {
-        XMEMSET(options, 0, sizeof(ecEncOptions));
+    if (ctx) {
+        XMEMSET(ctx, 0, sizeof(ecEncCtx));
+        XFREE(ctx, 0, DYNAMIC_TYPE_ECC);
     }
 }
 
 
-static int ecc_get_key_sizes(ecEncOptions* options, int* encKeySz, int* ivSz,
+static int ecc_get_key_sizes(ecEncCtx* ctx, int* encKeySz, int* ivSz,
                              int* keysLen, word32* digestSz, word32* blockSz)
 {
-    if (options) {
-        switch (options->encAlgo) {
+    if (ctx) {
+        switch (ctx->encAlgo) {
             case ecAES_128_CBC:
                 *encKeySz = KEY_SIZE_128;
                 *ivSz     = IV_SIZE_64;
@@ -3529,7 +3701,7 @@ static int ecc_get_key_sizes(ecEncOptions* options, int* encKeySz, int* ivSz,
                 return BAD_FUNC_ARG;
         }
 
-        switch (options->macAlgo) {
+        switch (ctx->macAlgo) {
             case ecHMAC_SHA256:
                 *digestSz = SHA256_DIGEST_SIZE;
                 break;
@@ -3546,22 +3718,23 @@ static int ecc_get_key_sizes(ecEncOptions* options, int* encKeySz, int* ivSz,
 
 
 /* ecc encrypt with shared secret run through kdf
-   options holds non default algos and inputs
+   ctx holds non default algos and inputs
    msgSz should be the right size for encAlgo, i.e., already padded 
    return 0 on success */
 int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
-                word32 msgSz, byte* out, word32* outSz, ecEncOptions* opts)
+                word32 msgSz, byte* out, word32* outSz, ecEncCtx* ctx)
 {
     int          ret;
     word32       blockSz;
     word32       digestSz;
-    ecEncOptions options;
+    ecEncCtx     localCtx;
     byte         sharedSecret[ECC_MAXSIZE];  /* 521 max size */
     byte         keys[ECC_BUFSIZE];         /* max size */
     word32       sharedSz = sizeof(sharedSecret);
     int          keysLen;
     int          encKeySz;
     int          ivSz;
+    int          offset = 0;         /* keys offset if doing msg exchange */
     byte*        encKey;
     byte*        encIv;
     byte*        macKey;
@@ -3570,19 +3743,37 @@ int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
                            outSz  == NULL)
         return BAD_FUNC_ARG;
 
-    if (opts)
-        options = *opts;
-    else  {
-        ecc_encrypt_init_options(&options); /* defaults */
+    if (ctx == NULL) {  /* use defaults */
+        ecc_ctx_init(&localCtx, 0);
+        ctx = &localCtx;  
     }
         
-    ret = ecc_get_key_sizes(&options, &encKeySz, &ivSz, &keysLen, &digestSz,
+    ret = ecc_get_key_sizes(ctx, &encKeySz, &ivSz, &keysLen, &digestSz,
                             &blockSz);
     if (ret != 0)
         return ret;
+
+    if (ctx->protocol == REQ_RESP_SERVER) {
+        offset = keysLen;
+        keysLen *= 2;
+
+        if (ctx->srvSt != ecSRV_RECV_REQ)
+            return BAD_ENC_STATE_E;
+
+        ctx->srvSt = ecSRV_BAD_STATE; /* we're done no more ops allowed */
+    }
+    else if (ctx->protocol == REQ_RESP_CLIENT) {
+        if (ctx->cliSt != ecCLI_SALT_SET)
+            return BAD_ENC_STATE_E;
+
+        ctx->cliSt = ecCLI_SENT_REQ; /* only do this once */
+    }
+        
+    if (keysLen > (int)sizeof(keys))
+        return BUFFER_E;
         
     if ( (msgSz%blockSz) != 0)
-        return BAD_FUNC_ARG;
+        return BAD_PADDING_E;
 
     if (*outSz < (msgSz + digestSz))
         return BUFFER_E;
@@ -3591,11 +3782,11 @@ int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
     if (ret != 0)
         return ret;
 
-    switch (options.kdfAlgo) {
+    switch (ctx->kdfAlgo) {
         case ecHKDF_SHA256 :
-                ret = HKDF(SHA256, sharedSecret, sharedSz, options.kdfSalt,
-                           options.kdfSaltSz, options.kdfInfo,
-                           options.kdfInfoSz, keys, keysLen);
+                ret = HKDF(SHA256, sharedSecret, sharedSz, ctx->kdfSalt,
+                           ctx->kdfSaltSz, ctx->kdfInfo,
+                           ctx->kdfInfoSz, keys, keysLen);
                 if (ret != 0)
                     return ret;
             break;
@@ -3604,11 +3795,11 @@ int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
             return BAD_FUNC_ARG;
     }
 
-    encKey = keys;
+    encKey = keys + offset;
     encIv  = encKey + encKeySz;
     macKey = encKey + encKeySz + ivSz;
 
-    switch (options.encAlgo) {
+    switch (ctx->encAlgo) {
         case ecAES_128_CBC:
             {
                 Aes aes;
@@ -3625,7 +3816,7 @@ int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
             return BAD_FUNC_ARG;
     }
 
-    switch (options.macAlgo) {
+    switch (ctx->macAlgo) {
         case ecHMAC_SHA256:
             {
                 Hmac hmac;
@@ -3633,7 +3824,7 @@ int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
                 if (ret != 0)
                     return ret;
                 HmacUpdate(&hmac, out, msgSz);
-                HmacUpdate(&hmac, options.macSalt, options.macSaltSz);
+                HmacUpdate(&hmac, ctx->macSalt, ctx->macSaltSz);
                 HmacFinal(&hmac, out+msgSz);
             }
             break;
@@ -3648,19 +3839,23 @@ int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
 }
 
 
+/* ecc decrypt with shared secret run through kdf
+   ctx holds non default algos and inputs
+   return 0 on success */
 int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
-                word32 msgSz, byte* out, word32* outSz, ecEncOptions* opts)
+                word32 msgSz, byte* out, word32* outSz, ecEncCtx* ctx)
 {
     int          ret;
     word32       blockSz;
     word32       digestSz;
-    ecEncOptions options;
+    ecEncCtx     localCtx;
     byte         sharedSecret[ECC_MAXSIZE];  /* 521 max size */
     byte         keys[ECC_BUFSIZE];         /* max size */
     word32       sharedSz = sizeof(sharedSecret);
     int          keysLen;
     int          encKeySz;
     int          ivSz;
+    int          offset = 0;       /* in case using msg exchange */
     byte*        encKey;
     byte*        encIv;
     byte*        macKey;
@@ -3669,19 +3864,37 @@ int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
                            outSz  == NULL)
         return BAD_FUNC_ARG;
 
-    if (opts)
-        options = *opts;
-    else  {
-        ecc_encrypt_init_options(&options); /* defaults */
+    if (ctx == NULL) {  /* use defaults */
+        ecc_ctx_init(&localCtx, 0);
+        ctx = &localCtx;  
     }
-
-    ret = ecc_get_key_sizes(&options, &encKeySz, &ivSz, &keysLen, &digestSz,
+        
+    ret = ecc_get_key_sizes(ctx, &encKeySz, &ivSz, &keysLen, &digestSz,
                             &blockSz);
     if (ret != 0)
         return ret;
         
+    if (ctx->protocol == REQ_RESP_CLIENT) {
+        offset = keysLen;
+        keysLen *= 2;
+
+        if (ctx->cliSt != ecCLI_SENT_REQ)
+            return BAD_ENC_STATE_E;
+
+        ctx->cliSt = ecSRV_BAD_STATE; /* we're done no more ops allowed */
+    }
+    else if (ctx->protocol == REQ_RESP_SERVER) {
+        if (ctx->srvSt != ecSRV_SALT_SET)
+            return BAD_ENC_STATE_E;
+
+        ctx->srvSt = ecSRV_RECV_REQ; /* only do this once */
+    }
+        
+    if (keysLen > (int)sizeof(keys))
+        return BUFFER_E;
+        
     if ( ((msgSz-digestSz) % blockSz) != 0)
-        return BAD_FUNC_ARG;
+        return BAD_PADDING_E;
 
     if (*outSz < (msgSz - digestSz))
         return BUFFER_E;
@@ -3690,11 +3903,11 @@ int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
     if (ret != 0)
         return ret;
 
-    switch (options.kdfAlgo) {
+    switch (ctx->kdfAlgo) {
         case ecHKDF_SHA256 :
-                ret = HKDF(SHA256, sharedSecret, sharedSz, options.kdfSalt,
-                           options.kdfSaltSz, options.kdfInfo,
-                           options.kdfInfoSz, keys, keysLen);
+                ret = HKDF(SHA256, sharedSecret, sharedSz, ctx->kdfSalt,
+                           ctx->kdfSaltSz, ctx->kdfInfo,
+                           ctx->kdfInfoSz, keys, keysLen);
                 if (ret != 0)
                     return ret;
             break;
@@ -3703,11 +3916,11 @@ int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
             return BAD_FUNC_ARG;
     }
 
-    encKey = keys;
+    encKey = keys + offset;
     encIv  = encKey + encKeySz;
     macKey = encKey + encKeySz + ivSz;
 
-    switch (options.macAlgo) {
+    switch (ctx->macAlgo) {
         case ecHMAC_SHA256:
             {
                 byte verify[SHA256_DIGEST_SIZE];
@@ -3716,7 +3929,7 @@ int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
                 if (ret != 0)
                     return ret;
                 HmacUpdate(&hmac, msg, msgSz-digestSz);
-                HmacUpdate(&hmac, options.macSalt, options.macSaltSz);
+                HmacUpdate(&hmac, ctx->macSalt, ctx->macSaltSz);
                 HmacFinal(&hmac, verify);
 
                 if (memcmp(verify, msg + msgSz - digestSz, digestSz) != 0) {
@@ -3729,7 +3942,7 @@ int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
             return BAD_FUNC_ARG;
     }
 
-    switch (options.encAlgo) {
+    switch (ctx->encAlgo) {
         case ecAES_128_CBC:
             {
                 Aes aes;
diff --git a/ctaocrypt/src/error.c b/ctaocrypt/src/error.c
index e6b4eaf3b..d7ed45194 100644
--- a/ctaocrypt/src/error.c
+++ b/ctaocrypt/src/error.c
@@ -323,6 +323,26 @@ void CTaoCryptErrorString(int error, char* buffer)
         XSTRNCPY(buffer, "ASN OCSP sig error, confirm failure", max);
         break;
 
+    case BAD_ENC_STATE_E:
+        XSTRNCPY(buffer, "Bad ecc encrypt state operation", max);
+        break;
+
+    case BAD_PADDING_E:
+        XSTRNCPY(buffer, "Bad padding, message wrong length", max);
+        break;
+
+    case REQ_ATTRIBUTE_E:
+        XSTRNCPY(buffer, "Setting cert request attributes error", max);
+        break;
+
+    case PKCS7_OID_E:
+        XSTRNCPY(buffer, "PKCS#7 error: mismatched OID value", max);
+        break;
+
+    case PKCS7_RECIP_E:
+        XSTRNCPY(buffer, "PKCS#7 error: no matching recipient found", max);
+        break;
+
     default:
         XSTRNCPY(buffer, "unknown error number", max);
 
diff --git a/ctaocrypt/src/fp_sqr_comba_12.i b/ctaocrypt/src/fp_sqr_comba_12.i
index 7ecb7c9e1..2f068c7d9 100644
--- a/ctaocrypt/src/fp_sqr_comba_12.i
+++ b/ctaocrypt/src/fp_sqr_comba_12.i
@@ -24,7 +24,9 @@
 void fp_sqr_comba12(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[24], c0, c1, c2, sc0, sc1, sc2;
-
+#ifdef TFM_ISO
+   fp_word tt;
+#endif
    a = A->dp;
    COMBA_START; 
 
diff --git a/ctaocrypt/src/fp_sqr_comba_17.i b/ctaocrypt/src/fp_sqr_comba_17.i
index fcd4daa5e..db34b1a78 100644
--- a/ctaocrypt/src/fp_sqr_comba_17.i
+++ b/ctaocrypt/src/fp_sqr_comba_17.i
@@ -24,6 +24,9 @@
 void fp_sqr_comba17(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[34], c0, c1, c2, sc0, sc1, sc2;
+#ifdef TFM_ISO
+   fp_word tt;
+#endif
 
    a = A->dp;
    COMBA_START; 
diff --git a/ctaocrypt/src/fp_sqr_comba_3.i b/ctaocrypt/src/fp_sqr_comba_3.i
index 6cf7faf1a..fea21d183 100644
--- a/ctaocrypt/src/fp_sqr_comba_3.i
+++ b/ctaocrypt/src/fp_sqr_comba_3.i
@@ -24,6 +24,9 @@
 void fp_sqr_comba3(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[6], c0, c1, c2;
+#ifdef TFM_ISO
+   fp_word tt;
+#endif
 
    a = A->dp;
    COMBA_START; 
diff --git a/ctaocrypt/src/fp_sqr_comba_4.i b/ctaocrypt/src/fp_sqr_comba_4.i
index 71c3c87af..7b7eefa6f 100644
--- a/ctaocrypt/src/fp_sqr_comba_4.i
+++ b/ctaocrypt/src/fp_sqr_comba_4.i
@@ -24,6 +24,9 @@
 void fp_sqr_comba4(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[8], c0, c1, c2;
+#ifdef TFM_ISO
+   fp_word tt;
+#endif
 
    a = A->dp;
    COMBA_START; 
diff --git a/ctaocrypt/src/fp_sqr_comba_6.i b/ctaocrypt/src/fp_sqr_comba_6.i
index 189f339a4..dc7028138 100644
--- a/ctaocrypt/src/fp_sqr_comba_6.i
+++ b/ctaocrypt/src/fp_sqr_comba_6.i
@@ -24,6 +24,9 @@
 void fp_sqr_comba6(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[12], c0, c1, c2, sc0, sc1, sc2;
+#ifdef TFM_ISO
+   fp_word tt;
+#endif
 
    a = A->dp;
    COMBA_START; 
diff --git a/ctaocrypt/src/fp_sqr_comba_7.i b/ctaocrypt/src/fp_sqr_comba_7.i
index 1a0cd2c19..7ba664e2f 100644
--- a/ctaocrypt/src/fp_sqr_comba_7.i
+++ b/ctaocrypt/src/fp_sqr_comba_7.i
@@ -24,6 +24,9 @@
 void fp_sqr_comba7(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[14], c0, c1, c2, sc0, sc1, sc2;
+#ifdef TFM_ISO
+   fp_word tt;
+#endif
 
    a = A->dp;
    COMBA_START; 
diff --git a/ctaocrypt/src/fp_sqr_comba_8.i b/ctaocrypt/src/fp_sqr_comba_8.i
index b71feae3b..24efa52cb 100644
--- a/ctaocrypt/src/fp_sqr_comba_8.i
+++ b/ctaocrypt/src/fp_sqr_comba_8.i
@@ -24,6 +24,9 @@
 void fp_sqr_comba8(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[16], c0, c1, c2, sc0, sc1, sc2;
+#ifdef TFM_ISO
+   fp_word   tt;   
+#endif   
 
    a = A->dp;
    COMBA_START; 
diff --git a/ctaocrypt/src/fp_sqr_comba_9.i b/ctaocrypt/src/fp_sqr_comba_9.i
index 1db06de22..e9cc21665 100644
--- a/ctaocrypt/src/fp_sqr_comba_9.i
+++ b/ctaocrypt/src/fp_sqr_comba_9.i
@@ -24,6 +24,9 @@
 void fp_sqr_comba9(fp_int *A, fp_int *B)
 {
    fp_digit *a, b[18], c0, c1, c2, sc0, sc1, sc2;
+#ifdef TFM_ISO
+   fp_word tt;
+#endif
 
    a = A->dp;
    COMBA_START; 
diff --git a/ctaocrypt/src/integer.c b/ctaocrypt/src/integer.c
index d3cb044b8..88e16d57c 100644
--- a/ctaocrypt/src/integer.c
+++ b/ctaocrypt/src/integer.c
@@ -3765,7 +3765,7 @@ int mp_sqrmod (mp_int * a, mp_int * b, mp_int * c)
 #endif
 
 
-#if defined(HAVE_ECC) || !defined(NO_PWDBASED) || defined(CYASSL_SNIFFER)
+#if defined(HAVE_ECC) || !defined(NO_PWDBASED) || defined(CYASSL_SNIFFER) || defined(CYASSL_HAVE_WOLFSCEP)
 
 /* single digit addition */
 int mp_add_d (mp_int* a, mp_digit b, mp_int* c)
diff --git a/ctaocrypt/src/md5.c b/ctaocrypt/src/md5.c
index 176bf44cd..6e645354b 100644
--- a/ctaocrypt/src/md5.c
+++ b/ctaocrypt/src/md5.c
@@ -26,7 +26,13 @@
 
 #include 
 
-#ifndef NO_MD5
+#if !defined(NO_MD5)
+
+#ifdef CYASSL_PIC32MZ_HASH
+#define InitMd5   InitMd5_sw
+#define Md5Update Md5Update_sw
+#define Md5Final  Md5Final_sw
+#endif
 
 #include 
 
@@ -36,6 +42,13 @@
     #include 
 #endif
 
+#ifdef FREESCALE_MMCAU
+    #include "cau_api.h"
+    #define XTRANSFORM(S,B)  cau_md5_hash_n((B), 1, (unsigned char*)(S)->digest)
+#else
+    #define XTRANSFORM(S,B)  Transform((S))
+#endif
+
 
 #ifdef STM32F2_HASH
     /*
@@ -174,6 +187,7 @@ void InitMd5(Md5* md5)
     md5->hiLen   = 0;
 }
 
+#ifndef FREESCALE_MMCAU
 
 static void Transform(Md5* md5)
 {
@@ -266,6 +280,8 @@ static void Transform(Md5* md5)
     md5->digest[3] += d;
 }
 
+#endif /* FREESCALE_MMCAU */
+
 
 static INLINE void AddLength(Md5* md5, word32 len)
 {
@@ -289,10 +305,10 @@ void Md5Update(Md5* md5, const byte* data, word32 len)
         len          -= add;
 
         if (md5->buffLen == MD5_BLOCK_SIZE) {
-            #ifdef BIG_ENDIAN_ORDER
+            #if defined(BIG_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
                 ByteReverseBytes(local, local, MD5_BLOCK_SIZE);
             #endif
-            Transform(md5);
+            XTRANSFORM(md5, local);
             AddLength(md5, MD5_BLOCK_SIZE);
             md5->buffLen = 0;
         }
@@ -304,7 +320,7 @@ void Md5Final(Md5* md5, byte* hash)
 {
     byte* local = (byte*)md5->buffer;
 
-    AddLength(md5, md5->buffLen);               /* before adding pads */
+    AddLength(md5, md5->buffLen);  /* before adding pads */
 
     local[md5->buffLen++] = 0x80;  /* add 1 */
 
@@ -313,10 +329,10 @@ void Md5Final(Md5* md5, byte* hash)
         XMEMSET(&local[md5->buffLen], 0, MD5_BLOCK_SIZE - md5->buffLen);
         md5->buffLen += MD5_BLOCK_SIZE - md5->buffLen;
 
-        #ifdef BIG_ENDIAN_ORDER
+        #if defined(BIG_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
             ByteReverseBytes(local, local, MD5_BLOCK_SIZE);
         #endif
-        Transform(md5);
+        XTRANSFORM(md5, local);
         md5->buffLen = 0;
     }
     XMEMSET(&local[md5->buffLen], 0, MD5_PAD_SIZE - md5->buffLen);
@@ -327,14 +343,14 @@ void Md5Final(Md5* md5, byte* hash)
     md5->loLen = md5->loLen << 3;
 
     /* store lengths */
-    #ifdef BIG_ENDIAN_ORDER
+    #if defined(BIG_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
         ByteReverseBytes(local, local, MD5_BLOCK_SIZE);
     #endif
     /* ! length ordering dependent on digest endian type ! */
     XMEMCPY(&local[MD5_PAD_SIZE], &md5->loLen, sizeof(word32));
     XMEMCPY(&local[MD5_PAD_SIZE + sizeof(word32)], &md5->hiLen, sizeof(word32));
 
-    Transform(md5);
+    XTRANSFORM(md5, local);
     #ifdef BIG_ENDIAN_ORDER
         ByteReverseWords(md5->digest, md5->digest, MD5_DIGEST_SIZE);
     #endif
diff --git a/ctaocrypt/src/pkcs7.c b/ctaocrypt/src/pkcs7.c
new file mode 100644
index 000000000..d1f79eefb
--- /dev/null
+++ b/ctaocrypt/src/pkcs7.c
@@ -0,0 +1,1348 @@
+/* pkcs7.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+
+#ifdef HAVE_PKCS7
+
+#include 
+#include 
+#include 
+
+#ifndef min
+    static INLINE word32 min(word32 a, word32 b)
+    {
+        return a > b ? b : a;
+    }
+#endif
+
+
+/* placed ASN.1 contentType OID into *output, return idx on success,
+ * 0 upon failure */
+CYASSL_LOCAL int SetContentType(int pkcs7TypeOID, byte* output)
+{
+    /* PKCS#7 content types, RFC 2315, section 14 */
+    static const byte pkcs7[]              = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                               0x0D, 0x01, 0x07 };
+    static const byte data[]               = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                               0x0D, 0x01, 0x07, 0x01 };
+    static const byte signedData[]         = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                               0x0D, 0x01, 0x07, 0x02};
+    static const byte envelopedData[]      = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                               0x0D, 0x01, 0x07, 0x03 };
+    static const byte signedAndEnveloped[] = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                               0x0D, 0x01, 0x07, 0x04 };
+    static const byte digestedData[]       = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                               0x0D, 0x01, 0x07, 0x05 };
+    static const byte encryptedData[]      = { 0x2A, 0x86, 0x48, 0x86, 0xF7,
+                                               0x0D, 0x01, 0x07, 0x06 };
+
+    int idSz;
+    int typeSz = 0, idx = 0;
+    const byte* typeName = 0;
+    byte ID_Length[MAX_LENGTH_SZ];
+
+    switch (pkcs7TypeOID) {
+        case PKCS7_MSG:
+            typeSz = sizeof(pkcs7);
+            typeName = pkcs7;
+            break;
+
+        case DATA:
+            typeSz = sizeof(data);
+            typeName = data;
+            break;
+
+        case SIGNED_DATA:
+            typeSz = sizeof(signedData);
+            typeName = signedData;
+            break;
+        
+        case ENVELOPED_DATA:
+            typeSz = sizeof(envelopedData);
+            typeName = envelopedData;
+            break;
+
+        case SIGNED_AND_ENVELOPED_DATA:
+            typeSz = sizeof(signedAndEnveloped);
+            typeName = signedAndEnveloped;
+            break;
+
+        case DIGESTED_DATA:
+            typeSz = sizeof(digestedData);
+            typeName = digestedData;
+            break;
+
+        case ENCRYPTED_DATA:
+            typeSz = sizeof(encryptedData);
+            typeName = encryptedData;
+            break;
+
+        default:
+            CYASSL_MSG("Unknown PKCS#7 Type");
+            return 0;
+    };
+
+    idSz  = SetLength(typeSz, ID_Length);
+    output[idx++] = ASN_OBJECT_ID;
+    XMEMCPY(output + idx, ID_Length, idSz);
+    idx += idSz;
+    XMEMCPY(output + idx, typeName, typeSz);
+    idx += typeSz;
+
+    return idx;
+
+}
+
+
+/* get ASN.1 contentType OID sum, return 0 on success, <0 on failure */
+int GetContentType(const byte* input, word32* inOutIdx, word32* oid,
+                   word32 maxIdx)
+{
+    int length;
+    word32 i = *inOutIdx;
+    byte b;
+    *oid = 0;
+
+    CYASSL_ENTER("GetContentType");
+
+    b = input[i++];
+    if (b != ASN_OBJECT_ID)
+        return ASN_OBJECT_ID_E;
+
+    if (GetLength(input, &i, &length, maxIdx) < 0)
+        return ASN_PARSE_E;
+
+    while(length--) {
+        *oid += input[i];
+        i++;
+    }
+
+    *inOutIdx = i;
+
+    return 0;
+}
+
+
+/* init PKCS7 struct with recipient cert, decode into DecodedCert */
+int PKCS7_InitWithCert(PKCS7* pkcs7, byte* cert, word32 certSz)
+{
+    int ret = 0;
+
+    XMEMSET(pkcs7, 0, sizeof(PKCS7));
+    if (cert != NULL && certSz > 0) {
+        DecodedCert dCert;
+
+        pkcs7->singleCert = cert;
+        pkcs7->singleCertSz = certSz;
+        InitDecodedCert(&dCert, cert, certSz, 0);
+
+        ret = ParseCert(&dCert, CA_TYPE, NO_VERIFY, 0);
+        if (ret < 0) {
+            FreeDecodedCert(&dCert);
+            return ret;
+        }
+        XMEMCPY(pkcs7->publicKey, dCert.publicKey, dCert.pubKeySize);
+        pkcs7->publicKeySz = dCert.pubKeySize;
+        XMEMCPY(pkcs7->issuerHash, dCert.issuerHash, SHA_SIZE);
+        pkcs7->issuer = dCert.issuerRaw;
+        pkcs7->issuerSz = dCert.issuerRawLen;
+        XMEMCPY(pkcs7->issuerSn, dCert.serial, dCert.serialSz);
+        pkcs7->issuerSnSz = dCert.serialSz;
+        FreeDecodedCert(&dCert);
+    }
+
+    return ret;
+}
+
+
+/* releases any memory allocated by a PKCS7 initializer */
+void PKCS7_Free(PKCS7* pkcs7)
+{
+    (void)pkcs7;
+}
+
+
+/* build PKCS#7 data content type */
+int PKCS7_EncodeData(PKCS7* pkcs7, byte* output, word32 outputSz)
+{
+    static const byte oid[] =
+        { ASN_OBJECT_ID, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01,
+                         0x07, 0x01 };
+    byte seq[MAX_SEQ_SZ];
+    byte octetStr[MAX_OCTET_STR_SZ];
+    word32 seqSz;
+    word32 octetStrSz;
+    word32 oidSz = (word32)sizeof(oid);
+    int idx = 0;
+
+    octetStrSz = SetOctetString(pkcs7->contentSz, octetStr);
+    seqSz = SetSequence(pkcs7->contentSz + octetStrSz + oidSz, seq);
+
+    if (outputSz < pkcs7->contentSz + octetStrSz + oidSz + seqSz)
+        return BUFFER_E;
+
+    XMEMCPY(output, seq, seqSz);
+    idx += seqSz;
+    XMEMCPY(output + idx, oid, oidSz);
+    idx += oidSz;
+    XMEMCPY(output + idx, octetStr, octetStrSz);
+    idx += octetStrSz;
+    XMEMCPY(output + idx, pkcs7->content, pkcs7->contentSz);
+    idx += pkcs7->contentSz;
+
+    return idx;
+}
+
+
+typedef struct EncodedAttrib {
+    byte valueSeq[MAX_SEQ_SZ];
+        const byte* oid;
+        byte valueSet[MAX_SET_SZ];
+        const byte* value;
+    word32 valueSeqSz, oidSz, idSz, valueSetSz, valueSz, totalSz;
+} EncodedAttrib;
+
+
+typedef struct ESD {
+    Sha sha;
+    byte contentDigest[SHA_DIGEST_SIZE + 2]; /* content only + ASN.1 heading */
+    byte contentAttribsDigest[SHA_DIGEST_SIZE];
+    byte encContentDigest[512];
+
+    byte outerSeq[MAX_SEQ_SZ];
+        byte outerContent[MAX_EXP_SZ];
+            byte innerSeq[MAX_SEQ_SZ];
+                byte version[MAX_VERSION_SZ];
+                byte digAlgoIdSet[MAX_SET_SZ];
+                    byte singleDigAlgoId[MAX_ALGO_SZ];
+
+                byte contentInfoSeq[MAX_SEQ_SZ];
+                    byte innerContSeq[MAX_EXP_SZ];
+                        byte innerOctets[MAX_OCTET_STR_SZ];
+
+                byte certsSet[MAX_SET_SZ];
+
+                byte signerInfoSet[MAX_SET_SZ];
+                    byte signerInfoSeq[MAX_SEQ_SZ];
+                        byte signerVersion[MAX_VERSION_SZ];
+                        byte issuerSnSeq[MAX_SEQ_SZ];
+                            byte issuerName[MAX_SEQ_SZ];
+                            byte issuerSn[MAX_SN_SZ];
+                        byte signerDigAlgoId[MAX_ALGO_SZ];
+                        byte digEncAlgoId[MAX_ALGO_SZ];
+                        byte signedAttribSet[MAX_SET_SZ];
+                            EncodedAttrib signedAttribs[6];
+                        byte signerDigest[MAX_OCTET_STR_SZ];
+    word32 innerOctetsSz, innerContSeqSz, contentInfoSeqSz;
+    word32 outerSeqSz, outerContentSz, innerSeqSz, versionSz, digAlgoIdSetSz,
+           singleDigAlgoIdSz, certsSetSz;
+    word32 signerInfoSetSz, signerInfoSeqSz, signerVersionSz,
+           issuerSnSeqSz, issuerNameSz, issuerSnSz,
+           signerDigAlgoIdSz, digEncAlgoIdSz, signerDigestSz;
+    word32 encContentDigestSz, signedAttribsSz, signedAttribsCount,
+           signedAttribSetSz;
+} ESD;
+
+
+static int EncodeAttributes(EncodedAttrib* ea, int eaSz,
+                                            PKCS7Attrib* attribs, int attribsSz)
+{
+    int i;
+    int maxSz = min(eaSz, attribsSz);
+    int allAttribsSz = 0;
+
+    for (i = 0; i < maxSz; i++)
+    {
+        int attribSz = 0;
+
+        ea[i].value = attribs[i].value;
+        ea[i].valueSz = attribs[i].valueSz;
+        attribSz += ea[i].valueSz;
+        ea[i].valueSetSz = SetSet(attribSz, ea[i].valueSet);
+        attribSz += ea[i].valueSetSz;
+        ea[i].oid = attribs[i].oid;
+        ea[i].oidSz = attribs[i].oidSz;
+        attribSz += ea[i].oidSz;
+        ea[i].valueSeqSz = SetSequence(attribSz, ea[i].valueSeq);
+        attribSz += ea[i].valueSeqSz;
+        ea[i].totalSz = attribSz;
+
+        allAttribsSz += attribSz;
+    }
+    return allAttribsSz;
+}
+
+
+static int FlattenAttributes(byte* output, EncodedAttrib* ea, int eaSz)
+{
+    int i, idx;
+
+    idx = 0;
+    for (i = 0; i < eaSz; i++) {
+        XMEMCPY(output + idx, ea[i].valueSeq, ea[i].valueSeqSz);
+        idx += ea[i].valueSeqSz;
+        XMEMCPY(output + idx, ea[i].oid, ea[i].oidSz);
+        idx += ea[i].oidSz;
+        XMEMCPY(output + idx, ea[i].valueSet, ea[i].valueSetSz);
+        idx += ea[i].valueSetSz;
+        XMEMCPY(output + idx, ea[i].value, ea[i].valueSz);
+        idx += ea[i].valueSz;
+    }
+    return 0;
+}
+
+
+/* build PKCS#7 signedData content type */
+int PKCS7_EncodeSignedData(PKCS7* pkcs7, byte* output, word32 outputSz)
+{
+    static const byte outerOid[] =
+        { ASN_OBJECT_ID, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01,
+                         0x07, 0x02 };
+    static const byte innerOid[] =
+        { ASN_OBJECT_ID, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01,
+                         0x07, 0x01 };
+
+    ESD esd;
+    word32 signerInfoSz = 0;
+    word32 totalSz = 0;
+    int idx = 0;
+    byte* flatSignedAttribs = NULL;
+    word32 flatSignedAttribsSz = 0;
+    word32 innerOidSz = sizeof(innerOid);
+    word32 outerOidSz = sizeof(outerOid);
+
+    if (pkcs7 == NULL || pkcs7->content == NULL || pkcs7->contentSz == 0 ||
+        pkcs7->encryptOID == 0 || pkcs7->hashOID == 0 || pkcs7->rng == 0 ||
+        pkcs7->singleCert == NULL || pkcs7->singleCertSz == 0 ||
+        pkcs7->privateKey == NULL || pkcs7->privateKeySz == 0 ||
+        output == NULL || outputSz == 0)
+        return BAD_FUNC_ARG;
+
+    XMEMSET(&esd, 0, sizeof(esd));
+    InitSha(&esd.sha);
+
+    if (pkcs7->contentSz != 0)
+    {
+        ShaUpdate(&esd.sha, pkcs7->content, pkcs7->contentSz);
+        esd.contentDigest[0] = ASN_OCTET_STRING;
+        esd.contentDigest[1] = SHA_DIGEST_SIZE;
+        ShaFinal(&esd.sha, &esd.contentDigest[2]);
+    }
+
+    esd.innerOctetsSz = SetOctetString(pkcs7->contentSz, esd.innerOctets);
+    esd.innerContSeqSz = SetExplicit(0, esd.innerOctetsSz + pkcs7->contentSz,
+                                esd.innerContSeq);
+    esd.contentInfoSeqSz = SetSequence(pkcs7->contentSz + esd.innerOctetsSz +
+                                    innerOidSz + esd.innerContSeqSz,
+                                    esd.contentInfoSeq);
+
+    esd.issuerSnSz = SetSerialNumber(pkcs7->issuerSn, pkcs7->issuerSnSz,
+                                     esd.issuerSn);
+    signerInfoSz += esd.issuerSnSz;
+    esd.issuerNameSz = SetSequence(pkcs7->issuerSz, esd.issuerName);
+    signerInfoSz += esd.issuerNameSz + pkcs7->issuerSz;
+    esd.issuerSnSeqSz = SetSequence(signerInfoSz, esd.issuerSnSeq);
+    signerInfoSz += esd.issuerSnSeqSz;
+    esd.signerVersionSz = SetMyVersion(1, esd.signerVersion, 0);
+    signerInfoSz += esd.signerVersionSz;
+    esd.signerDigAlgoIdSz = SetAlgoID(pkcs7->hashOID, esd.signerDigAlgoId,
+                                      hashType, 0);
+    signerInfoSz += esd.signerDigAlgoIdSz;
+    esd.digEncAlgoIdSz = SetAlgoID(pkcs7->encryptOID, esd.digEncAlgoId,
+                                   keyType, 0);
+    signerInfoSz += esd.digEncAlgoIdSz;
+
+    if (pkcs7->signedAttribsSz != 0) {
+        byte contentTypeOid[] =
+                { ASN_OBJECT_ID, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xF7, 0x0d, 0x01,
+                                 0x09, 0x03 };
+        byte contentType[] =
+                { ASN_OBJECT_ID, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01,
+                                 0x07, 0x01 };
+        byte messageDigestOid[] =
+                { ASN_OBJECT_ID, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01,
+                                 0x09, 0x04 };
+
+        PKCS7Attrib cannedAttribs[2] =
+        {
+            { contentTypeOid, sizeof(contentTypeOid),
+                             contentType, sizeof(contentType) },
+            { messageDigestOid, sizeof(messageDigestOid),
+                             esd.contentDigest, sizeof(esd.contentDigest) }
+        };
+        word32 cannedAttribsCount = sizeof(cannedAttribs)/sizeof(PKCS7Attrib);
+
+        esd.signedAttribsCount += cannedAttribsCount;
+        esd.signedAttribsSz += EncodeAttributes(&esd.signedAttribs[0], 2,
+                                             cannedAttribs, cannedAttribsCount);
+
+        esd.signedAttribsCount += pkcs7->signedAttribsSz;
+        esd.signedAttribsSz += EncodeAttributes(&esd.signedAttribs[2], 4,
+                                  pkcs7->signedAttribs, pkcs7->signedAttribsSz);
+
+        flatSignedAttribs = (byte*)XMALLOC(esd.signedAttribsSz, 0, NULL);
+        flatSignedAttribsSz = esd.signedAttribsSz;
+        if (flatSignedAttribs == NULL)
+            return MEMORY_E;
+        FlattenAttributes(flatSignedAttribs,
+                                     esd.signedAttribs, esd.signedAttribsCount);
+        esd.signedAttribSetSz = SetImplicit(ASN_SET, 0, esd.signedAttribsSz,
+                                                           esd.signedAttribSet);
+    }
+    /* Calculate the final hash and encrypt it. */
+    {
+        RsaKey privKey;
+        int result;
+        word32 scratch = 0;
+
+        byte digestInfo[MAX_SEQ_SZ + MAX_ALGO_SZ +
+                        MAX_OCTET_STR_SZ + SHA_DIGEST_SIZE];
+        byte digestInfoSeq[MAX_SEQ_SZ];
+        byte digestStr[MAX_OCTET_STR_SZ];
+        word32 digestInfoSeqSz, digestStrSz;
+        int digIdx = 0;
+
+        if (pkcs7->signedAttribsSz != 0) {
+            byte attribSet[MAX_SET_SZ];
+            word32 attribSetSz;
+
+            attribSetSz = SetSet(flatSignedAttribsSz, attribSet);
+
+            InitSha(&esd.sha);
+            ShaUpdate(&esd.sha, attribSet, attribSetSz);
+            ShaUpdate(&esd.sha, flatSignedAttribs, flatSignedAttribsSz);
+        }
+        ShaFinal(&esd.sha, esd.contentAttribsDigest);
+
+        digestStrSz = SetOctetString(SHA_DIGEST_SIZE, digestStr);
+        digestInfoSeqSz = SetSequence(esd.signerDigAlgoIdSz +
+                                      digestStrSz + SHA_DIGEST_SIZE,
+                                      digestInfoSeq);
+
+        XMEMCPY(digestInfo + digIdx, digestInfoSeq, digestInfoSeqSz);
+        digIdx += digestInfoSeqSz;
+        XMEMCPY(digestInfo + digIdx,
+                                    esd.signerDigAlgoId, esd.signerDigAlgoIdSz);
+        digIdx += esd.signerDigAlgoIdSz;
+        XMEMCPY(digestInfo + digIdx, digestStr, digestStrSz);
+        digIdx += digestStrSz;
+        XMEMCPY(digestInfo + digIdx, esd.contentAttribsDigest, SHA_DIGEST_SIZE);
+        digIdx += SHA_DIGEST_SIZE;
+
+        InitRsaKey(&privKey, NULL);
+        result = RsaPrivateKeyDecode(pkcs7->privateKey, &scratch, &privKey,
+                               pkcs7->privateKeySz);
+        if (result < 0) {
+            XFREE(flatSignedAttribs, 0, NULL);
+            return PUBLIC_KEY_E;
+        }
+        result = RsaSSL_Sign(digestInfo, digIdx,
+                             esd.encContentDigest, sizeof(esd.encContentDigest),
+                             &privKey, pkcs7->rng);
+        FreeRsaKey(&privKey);
+        if (result < 0) {
+            XFREE(flatSignedAttribs, 0, NULL);
+            return result;
+        }
+        esd.encContentDigestSz = (word32)result;
+    }
+    signerInfoSz += flatSignedAttribsSz + esd.signedAttribSetSz;
+
+    esd.signerDigestSz = SetOctetString(esd.encContentDigestSz,
+                                                              esd.signerDigest);
+    signerInfoSz += esd.signerDigestSz + esd.encContentDigestSz;
+
+    esd.signerInfoSeqSz = SetSequence(signerInfoSz, esd.signerInfoSeq);
+    signerInfoSz += esd.signerInfoSeqSz;
+    esd.signerInfoSetSz = SetSet(signerInfoSz, esd.signerInfoSet);
+    signerInfoSz += esd.signerInfoSetSz;
+
+    esd.certsSetSz = SetImplicit(ASN_SET, 0, pkcs7->singleCertSz, esd.certsSet);
+
+    esd.singleDigAlgoIdSz = SetAlgoID(pkcs7->hashOID, esd.singleDigAlgoId,
+                                      hashType, 0);
+    esd.digAlgoIdSetSz = SetSet(esd.singleDigAlgoIdSz, esd.digAlgoIdSet);
+
+
+    esd.versionSz = SetMyVersion(1, esd.version, 0);
+
+    totalSz = esd.versionSz + esd.singleDigAlgoIdSz + esd.digAlgoIdSetSz +
+              esd.contentInfoSeqSz + esd.certsSetSz + pkcs7->singleCertSz +
+              esd.innerOctetsSz + esd.innerContSeqSz +
+              innerOidSz + pkcs7->contentSz +
+              signerInfoSz;
+    esd.innerSeqSz = SetSequence(totalSz, esd.innerSeq);
+    totalSz += esd.innerSeqSz;
+    esd.outerContentSz = SetExplicit(0, totalSz, esd.outerContent);
+    totalSz += esd.outerContentSz + outerOidSz;
+    esd.outerSeqSz = SetSequence(totalSz, esd.outerSeq);
+    totalSz += esd.outerSeqSz;
+
+    if (outputSz < totalSz)
+        return BUFFER_E;
+
+    idx = 0;
+    XMEMCPY(output + idx, esd.outerSeq, esd.outerSeqSz);
+    idx += esd.outerSeqSz;
+    XMEMCPY(output + idx, outerOid, outerOidSz);
+    idx += outerOidSz;
+    XMEMCPY(output + idx, esd.outerContent, esd.outerContentSz);
+    idx += esd.outerContentSz;
+    XMEMCPY(output + idx, esd.innerSeq, esd.innerSeqSz);
+    idx += esd.innerSeqSz;
+    XMEMCPY(output + idx, esd.version, esd.versionSz);
+    idx += esd.versionSz;
+    XMEMCPY(output + idx, esd.digAlgoIdSet, esd.digAlgoIdSetSz);
+    idx += esd.digAlgoIdSetSz;
+    XMEMCPY(output + idx, esd.singleDigAlgoId, esd.singleDigAlgoIdSz);
+    idx += esd.singleDigAlgoIdSz;
+    XMEMCPY(output + idx, esd.contentInfoSeq, esd.contentInfoSeqSz);
+    idx += esd.contentInfoSeqSz;
+    XMEMCPY(output + idx, innerOid, innerOidSz);
+    idx += innerOidSz;
+    XMEMCPY(output + idx, esd.innerContSeq, esd.innerContSeqSz);
+    idx += esd.innerContSeqSz;
+    XMEMCPY(output + idx, esd.innerOctets, esd.innerOctetsSz);
+    idx += esd.innerOctetsSz;
+    XMEMCPY(output + idx, pkcs7->content, pkcs7->contentSz);
+    idx += pkcs7->contentSz;
+    XMEMCPY(output + idx, esd.certsSet, esd.certsSetSz);
+    idx += esd.certsSetSz;
+    XMEMCPY(output + idx, pkcs7->singleCert, pkcs7->singleCertSz);
+    idx += pkcs7->singleCertSz;
+    XMEMCPY(output + idx, esd.signerInfoSet, esd.signerInfoSetSz);
+    idx += esd.signerInfoSetSz;
+    XMEMCPY(output + idx, esd.signerInfoSeq, esd.signerInfoSeqSz);
+    idx += esd.signerInfoSeqSz;
+    XMEMCPY(output + idx, esd.signerVersion, esd.signerVersionSz);
+    idx += esd.signerVersionSz;
+    XMEMCPY(output + idx, esd.issuerSnSeq, esd.issuerSnSeqSz);
+    idx += esd.issuerSnSeqSz;
+    XMEMCPY(output + idx, esd.issuerName, esd.issuerNameSz);
+    idx += esd.issuerNameSz;
+    XMEMCPY(output + idx, pkcs7->issuer, pkcs7->issuerSz);
+    idx += pkcs7->issuerSz;
+    XMEMCPY(output + idx, esd.issuerSn, esd.issuerSnSz);
+    idx += esd.issuerSnSz;
+    XMEMCPY(output + idx, esd.signerDigAlgoId, esd.signerDigAlgoIdSz);
+    idx += esd.signerDigAlgoIdSz;
+
+    /* SignerInfo:Attributes */
+    if (pkcs7->signedAttribsSz != 0) {
+        XMEMCPY(output + idx, esd.signedAttribSet, esd.signedAttribSetSz);
+        idx += esd.signedAttribSetSz;
+        XMEMCPY(output + idx, flatSignedAttribs, flatSignedAttribsSz);
+        idx += flatSignedAttribsSz;
+        XFREE(flatSignedAttribs, 0, NULL);
+    }
+
+    XMEMCPY(output + idx, esd.digEncAlgoId, esd.digEncAlgoIdSz);
+    idx += esd.digEncAlgoIdSz;
+    XMEMCPY(output + idx, esd.signerDigest, esd.signerDigestSz);
+    idx += esd.signerDigestSz;
+    XMEMCPY(output + idx, esd.encContentDigest, esd.encContentDigestSz);
+    idx += esd.encContentDigestSz;
+
+    return idx;
+}
+
+
+/* Finds the certificates in the message and saves it. */
+int PKCS7_VerifySignedData(PKCS7* pkcs7, byte* pkiMsg, word32 pkiMsgSz)
+{
+    word32 idx, contentType;
+    int length, version;
+    byte* content = NULL;
+    byte* sig = NULL;
+    byte* cert = NULL;
+    byte* signedAttr = NULL;
+    int contentSz = 0, sigSz = 0, certSz = 0, signedAttrSz = 0;
+
+    (void)signedAttr;    /* not used yet, just set */
+    (void)signedAttrSz;
+
+    if (pkcs7 == NULL || pkiMsg == NULL || pkiMsgSz == 0)
+        return BAD_FUNC_ARG;
+
+    idx = 0;
+
+    /* Get the contentInfo sequence */
+    if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* Get the contentInfo contentType */
+    if (GetContentType(pkiMsg, &idx, &contentType, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (contentType != SIGNED_DATA) {
+        CYASSL_MSG("PKCS#7 input not of type SignedData");
+        return PKCS7_OID_E;
+    }
+
+    /* get the ContentInfo content */
+    if (pkiMsg[idx++] != (ASN_CONSTRUCTED | ASN_CONTEXT_SPECIFIC | 0))
+        return ASN_PARSE_E;
+
+    if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* Get the signedData sequence */
+    if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* Get the version */
+    if (GetMyVersion(pkiMsg, &idx, &version) < 0)
+        return ASN_PARSE_E;
+
+    if (version != 1) {
+        CYASSL_MSG("PKCS#7 signedData needs to be of version 1");
+        return ASN_VERSION_E;
+    }
+
+    /* Get the set of DigestAlgorithmIdentifiers */
+    if (GetSet(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* Skip the set. */
+    idx += length;
+
+    /* Get the inner ContentInfo sequence */
+    if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* Get the inner ContentInfo contentType */
+    if (GetContentType(pkiMsg, &idx, &contentType, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (contentType != DATA) {
+        CYASSL_MSG("PKCS#7 inner input not of type Data");
+        return PKCS7_OID_E;
+    }
+
+    if (pkiMsg[idx++] != (ASN_CONSTRUCTED | ASN_CONTEXT_SPECIFIC | 0))
+        return ASN_PARSE_E;
+
+    if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (pkiMsg[idx++] != ASN_OCTET_STRING)
+        return ASN_PARSE_E;
+
+    if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* Save the inner data as the content. */
+    if (length > 0) {
+        /* Local pointer for calculating hashes later */
+        pkcs7->content = content = &pkiMsg[idx];
+        pkcs7->contentSz = contentSz = length;
+        idx += length;
+    }
+
+    /* Get the implicit[0] set of certificates */
+    if (pkiMsg[idx] == (ASN_CONSTRUCTED | ASN_CONTEXT_SPECIFIC | 0)) {
+        idx++;
+        if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        if (length > 0) {
+            /* At this point, idx is at the first certificate in
+             * a set of certificates. There may be more than one,
+             * or none, or they may be a PKCS 6 extended
+             * certificate. We want to save the first cert if it
+             * is X.509. */
+
+            word32 certIdx = idx;
+
+            if (pkiMsg[certIdx++] == (ASN_CONSTRUCTED | ASN_SEQUENCE)) {
+                if (GetLength(pkiMsg, &certIdx, &certSz, pkiMsgSz) < 0)
+                    return ASN_PARSE_E;
+
+                cert = &pkiMsg[idx];
+                certSz += (certIdx - idx);
+            }
+            PKCS7_InitWithCert(pkcs7, cert, certSz);
+        }
+        idx += length;
+    }
+
+    /* Get the implicit[1] set of crls */
+    if (pkiMsg[idx] == (ASN_CONSTRUCTED | ASN_CONTEXT_SPECIFIC | 1)) {
+        idx++;
+        if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        /* Skip the set */
+        idx += length;
+    }
+
+    /* Get the set of signerInfos */
+    if (GetSet(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (length > 0) {
+        RsaKey key;
+        word32 scratch = 0;
+        int plainSz = 0;
+        byte digest[MAX_SEQ_SZ+MAX_ALGO_SZ+MAX_OCTET_STR_SZ+SHA_DIGEST_SIZE];
+
+        /* Get the sequence of the first signerInfo */
+        if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        /* Get the version */
+        if (GetMyVersion(pkiMsg, &idx, &version) < 0)
+            return ASN_PARSE_E;
+
+        if (version != 1) {
+            CYASSL_MSG("PKCS#7 signerInfo needs to be of version 1");
+            return ASN_VERSION_E;
+        }
+
+        /* Get the sequence of IssuerAndSerialNumber */
+        if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        /* Skip it */
+        idx += length;
+
+        /* Get the sequence of digestAlgorithm */
+        if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        /* Skip it */
+        idx += length;
+
+        /* Get the IMPLICIT[0] SET OF signedAttributes */
+        if (pkiMsg[idx] == (ASN_CONSTRUCTED | ASN_CONTEXT_SPECIFIC | 0)) {
+            idx++;
+
+            if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+                return ASN_PARSE_E;
+
+            /* save pointer and length */
+            signedAttr = &pkiMsg[idx];
+            signedAttrSz = length;
+
+            idx += length;
+        }
+
+        /* Get the sequence of digestEncryptionAlgorithm */
+        if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        /* Skip it */
+        idx += length;
+
+        /* Get the signature */
+        if (pkiMsg[idx] == ASN_OCTET_STRING) {
+            idx++;
+
+            if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+                return ASN_PARSE_E;
+
+            /* save pointer and length */
+            sig = &pkiMsg[idx];
+            sigSz = length;
+
+            idx += length;
+        }
+
+        XMEMSET(digest, 0, sizeof(digest));
+        pkcs7->content = content;
+        pkcs7->contentSz = contentSz;
+
+        InitRsaKey(&key, NULL);
+        if (RsaPublicKeyDecode(pkcs7->publicKey, &scratch, &key,
+                               pkcs7->publicKeySz) < 0) {
+            CYASSL_MSG("ASN RSA key decode error");
+            return PUBLIC_KEY_E;
+        }
+        plainSz = RsaSSL_Verify(sig, sigSz, digest, sizeof(digest), &key);
+        FreeRsaKey(&key);
+        if (plainSz < 0)
+            return plainSz;
+    }
+
+    return 0;
+}
+
+
+/* create ASN.1 fomatted RecipientInfo structure, returns sequence size */
+CYASSL_LOCAL int CreateRecipientInfo(const byte* cert, word32 certSz,
+                                     int keyEncAlgo, int blockKeySz,
+                                     RNG* rng, byte* contentKeyPlain,
+                                     byte* contentKeyEnc,
+                                     int* keyEncSz, byte* out, word32 outSz)
+{
+    word32 idx = 0;
+    int ret = 0, totalSz = 0;
+    int verSz, issuerSz, snSz, keyEncAlgSz;
+    int issuerSeqSz, recipSeqSz, issuerSerialSeqSz;
+    int encKeyOctetStrSz;
+
+    byte ver[MAX_VERSION_SZ];
+    byte serial[MAX_SN_SZ];
+    byte issuerSerialSeq[MAX_SEQ_SZ];
+    byte recipSeq[MAX_SEQ_SZ];
+    byte issuerSeq[MAX_SEQ_SZ];
+    byte keyAlgArray[MAX_ALGO_SZ];
+    byte encKeyOctetStr[MAX_OCTET_STR_SZ];
+
+    RsaKey pubKey;
+    DecodedCert decoded;
+
+    InitDecodedCert(&decoded, (byte*)cert, certSz, 0);
+    ret = ParseCert(&decoded, CA_TYPE, NO_VERIFY, 0);
+    if (ret < 0) {
+        FreeDecodedCert(&decoded);
+        return ret;
+    }
+
+    /* version */
+    verSz = SetMyVersion(0, ver, 0);
+
+    /* IssuerAndSerialNumber */
+    if (decoded.issuerRaw == NULL || decoded.issuerRawLen == 0) {
+        CYASSL_MSG("DecodedCert lacks raw issuer pointer and length");
+        FreeDecodedCert(&decoded);
+        return -1;
+    }
+    issuerSz    = decoded.issuerRawLen;
+    issuerSeqSz = SetSequence(issuerSz, issuerSeq);
+
+    if (decoded.serial == NULL || decoded.serialSz == 0) {
+        CYASSL_MSG("DecodedCert missing serial number");
+        FreeDecodedCert(&decoded);
+        return -1;
+    }
+    snSz = SetSerialNumber(decoded.serial, decoded.serialSz, serial);
+
+    issuerSerialSeqSz = SetSequence(issuerSeqSz + issuerSz + snSz,
+                                    issuerSerialSeq);
+
+    /* KeyEncryptionAlgorithmIdentifier, only support RSA now */
+    if (keyEncAlgo != RSAk)
+        return ALGO_ID_E;
+
+    keyEncAlgSz = SetAlgoID(keyEncAlgo, keyAlgArray, keyType, 0);
+    if (keyEncAlgSz == 0)
+        return BAD_FUNC_ARG;
+
+    /* EncryptedKey */
+    InitRsaKey(&pubKey, 0);
+    if (RsaPublicKeyDecode(decoded.publicKey, &idx, &pubKey,
+                           decoded.pubKeySize) < 0) {
+        CYASSL_MSG("ASN RSA key decode error");
+        return PUBLIC_KEY_E;
+    }
+
+    *keyEncSz = RsaPublicEncrypt(contentKeyPlain, blockKeySz, contentKeyEnc,
+                                 MAX_ENCRYPTED_KEY_SZ, &pubKey, rng);
+    FreeRsaKey(&pubKey);
+    if (*keyEncSz < 0) {
+        CYASSL_MSG("RSA Public Encrypt failed");
+        return *keyEncSz;
+    }
+
+    encKeyOctetStrSz = SetOctetString(*keyEncSz, encKeyOctetStr);
+
+    /* RecipientInfo */
+    recipSeqSz = SetSequence(verSz + issuerSerialSeqSz + issuerSeqSz +
+                             issuerSz + snSz + keyEncAlgSz + encKeyOctetStrSz +
+                             *keyEncSz, recipSeq);
+
+    if (recipSeqSz + verSz + issuerSerialSeqSz + issuerSeqSz + snSz +
+        keyEncAlgSz + encKeyOctetStrSz + *keyEncSz > (int)outSz) {
+        CYASSL_MSG("RecipientInfo output buffer too small");
+        return BUFFER_E;
+    }
+
+    XMEMCPY(out + totalSz, recipSeq, recipSeqSz);
+    totalSz += recipSeqSz;
+    XMEMCPY(out + totalSz, ver, verSz);
+    totalSz += verSz;
+    XMEMCPY(out + totalSz, issuerSerialSeq, issuerSerialSeqSz);
+    totalSz += issuerSerialSeqSz;
+    XMEMCPY(out + totalSz, issuerSeq, issuerSeqSz);
+    totalSz += issuerSeqSz;
+    XMEMCPY(out + totalSz, decoded.issuerRaw, issuerSz);
+    totalSz += issuerSz;
+    XMEMCPY(out + totalSz, serial, snSz);
+    totalSz += snSz;
+    XMEMCPY(out + totalSz, keyAlgArray, keyEncAlgSz);
+    totalSz += keyEncAlgSz;
+    XMEMCPY(out + totalSz, encKeyOctetStr, encKeyOctetStrSz);
+    totalSz += encKeyOctetStrSz;
+    XMEMCPY(out + totalSz, contentKeyEnc, *keyEncSz);
+    totalSz += *keyEncSz;
+
+    FreeDecodedCert(&decoded);
+
+    return totalSz;
+}
+
+
+/* build PKCS#7 envelopedData content type, return enveloped size */
+int PKCS7_EncodeEnvelopedData(PKCS7* pkcs7, byte* output, word32 outputSz)
+{
+    int i, idx = 0;
+    int totalSz = 0, padSz = 0, desOutSz = 0;
+
+    int contentInfoSeqSz, outerContentTypeSz, outerContentSz;
+    byte contentInfoSeq[MAX_SEQ_SZ];
+    byte outerContentType[MAX_ALGO_SZ];
+    byte outerContent[MAX_SEQ_SZ];
+
+    int envDataSeqSz, verSz;
+    byte envDataSeq[MAX_SEQ_SZ];
+    byte ver[MAX_VERSION_SZ];
+
+    RNG rng;
+    int contentKeyEncSz, blockKeySz;
+    int dynamicFlag = 0;
+    byte contentKeyPlain[MAX_CONTENT_KEY_LEN];
+    byte contentKeyEnc[MAX_ENCRYPTED_KEY_SZ];
+    byte* plain;
+    byte* encryptedContent;
+
+    int recipSz, recipSetSz;
+    byte recip[MAX_RECIP_SZ];
+    byte recipSet[MAX_SET_SZ];
+
+    int encContentOctetSz, encContentSeqSz, contentTypeSz;
+    int contentEncAlgoSz, ivOctetStringSz;
+    byte encContentSeq[MAX_SEQ_SZ];
+    byte contentType[MAX_ALGO_SZ];
+    byte contentEncAlgo[MAX_ALGO_SZ];
+    byte tmpIv[DES_BLOCK_SIZE];
+    byte ivOctetString[MAX_OCTET_STR_SZ];
+    byte encContentOctet[MAX_OCTET_STR_SZ];
+
+    if (pkcs7 == NULL || pkcs7->content == NULL || pkcs7->contentSz == 0 ||
+        pkcs7->encryptOID == 0 || pkcs7->singleCert == NULL)
+        return BAD_FUNC_ARG;
+
+    if (output == NULL || outputSz == 0)
+        return BAD_FUNC_ARG;
+
+    /* PKCS#7 only supports DES, 3DES for now */
+    switch (pkcs7->encryptOID) {
+        case DESb:
+            blockKeySz = DES_KEYLEN;
+            break;
+
+        case DES3b:
+            blockKeySz = DES3_KEYLEN;
+            break;
+
+        default:
+            CYASSL_MSG("Unsupported content cipher type");
+            return ALGO_ID_E;
+    };
+
+    /* outer content type */
+    outerContentTypeSz = SetContentType(ENVELOPED_DATA, outerContentType);
+
+    /* version, defined as 0 in RFC 2315 */
+    verSz = SetMyVersion(0, ver, 0);
+
+    /* generate random content encryption key */
+    InitRng(&rng);
+    RNG_GenerateBlock(&rng, contentKeyPlain, blockKeySz);
+
+    /* build RecipientInfo, only handle 1 for now */
+    recipSz = CreateRecipientInfo(pkcs7->singleCert, pkcs7->singleCertSz, RSAk,
+                                  blockKeySz, &rng, contentKeyPlain,
+                                  contentKeyEnc, &contentKeyEncSz, recip,
+                                  MAX_RECIP_SZ);
+
+    if (recipSz < 0) {
+        CYASSL_MSG("Failed to create RecipientInfo");
+        return recipSz;
+    }
+    recipSetSz = SetSet(recipSz, recipSet);
+
+    /* EncryptedContentInfo */
+    contentTypeSz = SetContentType(pkcs7->contentOID, contentType);
+    if (contentTypeSz == 0)
+        return BAD_FUNC_ARG;
+
+    /* allocate encrypted content buffer, pad if necessary, PKCS#7 padding */
+    padSz = DES_BLOCK_SIZE - (pkcs7->contentSz % DES_BLOCK_SIZE);
+    desOutSz = pkcs7->contentSz + padSz;
+
+    if (padSz != 0) {
+        plain = XMALLOC(desOutSz, NULL, DYNAMIC_TYPE_TMP_BUFFER);
+        if (plain == NULL) {
+            return MEMORY_E;
+        }
+        XMEMCPY(plain, pkcs7->content, pkcs7->contentSz);
+        dynamicFlag = 1;
+
+        for (i = 0; i < padSz; i++) {
+            plain[pkcs7->contentSz + i] = padSz;
+        }
+
+    } else {
+        plain = pkcs7->content;
+        desOutSz = pkcs7->contentSz;
+    }
+
+    encryptedContent = XMALLOC(desOutSz, NULL, DYNAMIC_TYPE_TMP_BUFFER);
+    if (encryptedContent == NULL) {
+        if (dynamicFlag)
+            XFREE(plain, NULL, DYNAMIC_TYPE_TMP_BUFFER);
+        return MEMORY_E;
+    }
+
+    /* generate IV for block cipher */
+    RNG_GenerateBlock(&rng, tmpIv, DES_BLOCK_SIZE);
+
+    /* put together IV OCTET STRING */
+    ivOctetStringSz = SetOctetString(DES_BLOCK_SIZE, ivOctetString);
+
+    /* build up our ContentEncryptionAlgorithmIdentifier sequence,
+     * adding (ivOctetStringSz + DES_BLOCK_SIZE) for IV OCTET STRING */
+    contentEncAlgoSz = SetAlgoID(pkcs7->encryptOID, contentEncAlgo,
+                                 blkType, ivOctetStringSz + DES_BLOCK_SIZE);
+    if (contentEncAlgoSz == 0)
+        return BAD_FUNC_ARG;
+
+    /* encrypt content */
+    if (pkcs7->encryptOID == DESb) {
+        Des des;
+        Des_SetKey(&des, contentKeyPlain, tmpIv, DES_ENCRYPTION);
+        Des_CbcEncrypt(&des, encryptedContent, plain, desOutSz);
+
+    } else if (pkcs7->encryptOID == DES3b) {
+        Des3 des3;
+        Des3_SetKey(&des3, contentKeyPlain, tmpIv, DES_ENCRYPTION);
+        Des3_CbcEncrypt(&des3, encryptedContent, plain, desOutSz);
+    }
+
+    encContentOctetSz = SetImplicit(ASN_OCTET_STRING, 0,
+                                    desOutSz, encContentOctet);
+
+    encContentSeqSz = SetSequence(contentTypeSz + contentEncAlgoSz +
+                                  ivOctetStringSz + DES_BLOCK_SIZE +
+                                  encContentOctetSz + desOutSz, encContentSeq);
+
+    /* keep track of sizes for outer wrapper layering */
+    totalSz = verSz + recipSetSz + recipSz + encContentSeqSz + contentTypeSz +
+              contentEncAlgoSz + ivOctetStringSz + DES_BLOCK_SIZE +
+              encContentOctetSz + desOutSz;
+
+    /* EnvelopedData */
+    envDataSeqSz = SetSequence(totalSz, envDataSeq);
+    totalSz += envDataSeqSz;
+
+    /* outer content */
+    outerContentSz = SetExplicit(0, totalSz, outerContent);
+    totalSz += outerContentTypeSz;
+    totalSz += outerContentSz;
+
+    /* ContentInfo */
+    contentInfoSeqSz = SetSequence(totalSz, contentInfoSeq);
+    totalSz += contentInfoSeqSz;
+
+    if (totalSz > (int)outputSz) {
+        CYASSL_MSG("Pkcs7_encrypt output buffer too small");
+        XFREE(encryptedContent, NULL, DYNAMIC_TYPE_TMP_BUFFER);
+        if (dynamicFlag)
+            XFREE(plain, NULL, DYNAMIC_TYPE_TMP_BUFFER);
+        return BUFFER_E;
+    }
+
+    XMEMCPY(output + idx, contentInfoSeq, contentInfoSeqSz);
+    idx += contentInfoSeqSz;
+    XMEMCPY(output + idx, outerContentType, outerContentTypeSz);
+    idx += outerContentTypeSz;
+    XMEMCPY(output + idx, outerContent, outerContentSz);
+    idx += outerContentSz;
+    XMEMCPY(output + idx, envDataSeq, envDataSeqSz);
+    idx += envDataSeqSz;
+    XMEMCPY(output + idx, ver, verSz);
+    idx += verSz;
+    XMEMCPY(output + idx, recipSet, recipSetSz);
+    idx += recipSetSz;
+    XMEMCPY(output + idx, recip, recipSz);
+    idx += recipSz;
+    XMEMCPY(output + idx, encContentSeq, encContentSeqSz);
+    idx += encContentSeqSz;
+    XMEMCPY(output + idx, contentType, contentTypeSz);
+    idx += contentTypeSz;
+    XMEMCPY(output + idx, contentEncAlgo, contentEncAlgoSz);
+    idx += contentEncAlgoSz;
+    XMEMCPY(output + idx, ivOctetString, ivOctetStringSz);
+    idx += ivOctetStringSz;
+    XMEMCPY(output + idx, tmpIv, DES_BLOCK_SIZE);
+    idx += DES_BLOCK_SIZE;
+    XMEMCPY(output + idx, encContentOctet, encContentOctetSz);
+    idx += encContentOctetSz;
+    XMEMCPY(output + idx, encryptedContent, desOutSz);
+    idx += desOutSz;
+
+#ifdef NO_RC4
+    FreeRng(&rng);
+#endif
+
+    XMEMSET(contentKeyPlain, 0, MAX_CONTENT_KEY_LEN);
+    XMEMSET(contentKeyEnc,   0, MAX_ENCRYPTED_KEY_SZ);
+
+    if (dynamicFlag)
+        XFREE(plain, NULL, DYNAMMIC_TYPE_TMP_BUFFER);
+    XFREE(encryptedContent, NULL, DYNAMIC_TYPE_TMP_BUFFER);
+
+    return idx;
+}
+
+/* unwrap and decrypt PKCS#7 envelopedData object, return decoded size */
+CYASSL_API int PKCS7_DecodeEnvelopedData(PKCS7* pkcs7, byte* pkiMsg,
+                                         word32 pkiMsgSz, byte* output,
+                                         word32 outputSz)
+{
+    int recipFound = 0;
+    int ret, version, length;
+    word32 savedIdx = 0, idx = 0;
+    word32 contentType, encOID;
+    byte   issuerHash[SHA_DIGEST_SIZE];
+    mp_int serialNum;
+
+    int encryptedKeySz, keySz;
+    byte tmpIv[DES_BLOCK_SIZE];
+    byte encryptedKey[MAX_ENCRYPTED_KEY_SZ];
+    byte* decryptedKey = NULL;
+
+    RsaKey privKey;
+    int encryptedContentSz;
+    byte padLen;
+    byte* encryptedContent = NULL;
+
+    if (pkcs7 == NULL || pkcs7->singleCert == NULL ||
+        pkcs7->singleCertSz == 0 || pkcs7->privateKey == NULL ||
+        pkcs7->privateKeySz == 0)
+        return BAD_FUNC_ARG;
+
+    if (pkiMsg == NULL || pkiMsgSz == 0 ||
+        output == NULL || outputSz == 0)
+        return BAD_FUNC_ARG;
+
+    /* load private key */
+    InitRsaKey(&privKey, 0);
+    ret = RsaPrivateKeyDecode(pkcs7->privateKey, &idx, &privKey,
+                              pkcs7->privateKeySz);
+    if (ret != 0) {
+        CYASSL_MSG("Failed to decode RSA private key");
+        return ret;
+    }
+
+    idx = 0;
+
+    /* read past ContentInfo, verify type is envelopedData */
+    if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (GetContentType(pkiMsg, &idx, &contentType, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (contentType != ENVELOPED_DATA) {
+        CYASSL_MSG("PKCS#7 input not of type EnvelopedData");
+        return PKCS7_OID_E;
+    }
+
+    if (pkiMsg[idx++] != (ASN_CONSTRUCTED | ASN_CONTEXT_SPECIFIC | 0))
+        return ASN_PARSE_E;
+
+    if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* remove EnvelopedData and version */
+    if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (GetMyVersion(pkiMsg, &idx, &version) < 0)
+        return ASN_PARSE_E;
+
+    if (version != 0) {
+        CYASSL_MSG("PKCS#7 envelopedData needs to be of version 0");
+        return ASN_VERSION_E;
+    }
+
+    /* walk through RecipientInfo set, find correct recipient */
+    if (GetSet(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    savedIdx = idx;
+    recipFound = 0;
+
+    /* when looking for next recipient, use first sequence and version to
+     * indicate there is another, if not, move on */
+    while(recipFound == 0) {
+
+        /* remove RecipientInfo, if we don't have a SEQUENCE, back up idx to
+         * last good saved one */
+        if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0) {
+            idx = savedIdx;
+            break;
+        }
+
+        if (GetMyVersion(pkiMsg, &idx, &version) < 0) {
+            idx = savedIdx;
+            break;
+        }
+
+        if (version != 0)
+            return ASN_VERSION_E;
+
+        /* remove IssuerAndSerialNumber */
+        if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        if (GetNameHash(pkiMsg, &idx, issuerHash, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        /* if we found correct recipient, issuer hashes will match */
+        if (XMEMCMP(issuerHash, pkcs7->issuerHash, SHA_DIGEST_SIZE) == 0) {
+            recipFound = 1;
+        }
+
+        if (GetInt(&serialNum, pkiMsg, &idx, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+        mp_clear(&serialNum);
+
+        if (GetAlgoId(pkiMsg, &idx, &encOID, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        /* key encryption algorithm must be RSA for now */
+        if (encOID != RSAk)
+            return ALGO_ID_E;
+
+        /* read encryptedKey */
+        if (pkiMsg[idx++] != ASN_OCTET_STRING)
+            return ASN_PARSE_E;
+
+        if (GetLength(pkiMsg, &idx, &encryptedKeySz, pkiMsgSz) < 0)
+            return ASN_PARSE_E;
+
+        if (recipFound == 1)
+            XMEMCPY(encryptedKey, &pkiMsg[idx], encryptedKeySz);
+        idx += encryptedKeySz;
+
+        /* update good idx */
+        savedIdx = idx;
+    }
+
+    if (recipFound == 0) {
+        CYASSL_MSG("No recipient found in envelopedData that matches input");
+        return PKCS7_RECIP_E;
+    }
+
+    /* remove EncryptedContentInfo */
+    if (GetSequence(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (GetContentType(pkiMsg, &idx, &contentType, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (GetAlgoId(pkiMsg, &idx, &encOID, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    /* get block cipher IV, stored in OPTIONAL parameter of AlgoID */
+    if (pkiMsg[idx++] != ASN_OCTET_STRING)
+        return ASN_PARSE_E;
+
+    if (GetLength(pkiMsg, &idx, &length, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    if (length != DES_BLOCK_SIZE) {
+        CYASSL_MSG("Incorrect IV length, must be of DES_BLOCK_SIZE");
+        return ASN_PARSE_E;
+    }
+
+    XMEMCPY(tmpIv, &pkiMsg[idx], length);
+    idx += length;
+
+    /* read encryptedContent, cont[0] */
+    if (pkiMsg[idx++] != (ASN_CONTEXT_SPECIFIC | 0))
+        return ASN_PARSE_E;
+
+    if (GetLength(pkiMsg, &idx, &encryptedContentSz, pkiMsgSz) < 0)
+        return ASN_PARSE_E;
+
+    encryptedContent = XMALLOC(encryptedContentSz, NULL,
+                               DYNAMIC_TYPE_TMP_BUFFER);
+
+    XMEMCPY(encryptedContent, &pkiMsg[idx], encryptedContentSz);
+
+    /* decrypt encryptedKey */
+    keySz = RsaPrivateDecryptInline(encryptedKey, encryptedKeySz,
+                                    &decryptedKey, &privKey);
+    FreeRsaKey(&privKey);
+    if (keySz <= 0)
+        return keySz;
+
+    /* decrypt encryptedContent */
+    if (encOID == DESb) {
+        Des des;
+        Des_SetKey(&des, decryptedKey, tmpIv, DES_DECRYPTION);
+        Des_CbcDecrypt(&des, encryptedContent, encryptedContent,
+                       encryptedContentSz);
+    } else if (encOID == DES3b) {
+        Des3 des;
+        Des3_SetKey(&des, decryptedKey, tmpIv, DES_DECRYPTION);
+        Des3_CbcDecrypt(&des, encryptedContent, encryptedContent,
+                       encryptedContentSz);
+    } else {
+        CYASSL_MSG("Unsupported content encryption OID type");
+        return ALGO_ID_E;
+    }
+
+    padLen = encryptedContent[encryptedContentSz-1];
+
+    /* copy plaintext to output */
+    XMEMCPY(output, encryptedContent, encryptedContentSz - padLen);
+
+    /* free memory, zero out keys */
+    XMEMSET(encryptedKey, 0, MAX_ENCRYPTED_KEY_SZ);
+    XMEMSET(encryptedContent, 0, encryptedContentSz);
+    XFREE(encryptedContent, NULL, DYNAMIC_TYPE_TMP_BUFFER);
+
+    return encryptedContentSz - padLen;
+}
+
+
+#else  /* HAVE_PKCS7 */
+
+
+#ifdef _MSC_VER
+    /* 4206 warning for blank file */
+    #pragma warning(disable: 4206)
+#endif
+
+
+#endif /* HAVE_PKCS7 */
+
diff --git a/ctaocrypt/src/pwdbased.c b/ctaocrypt/src/pwdbased.c
index 3f330ef4d..6152292ca 100644
--- a/ctaocrypt/src/pwdbased.c
+++ b/ctaocrypt/src/pwdbased.c
@@ -27,6 +27,22 @@
 
 #ifndef NO_PWDBASED
 
+#ifdef CYASSL_PIC32MZ_HASH
+
+#define InitMd5   InitMd5_sw
+#define Md5Update Md5Update_sw
+#define Md5Final  Md5Final_sw
+
+#define InitSha   InitSha_sw
+#define ShaUpdate ShaUpdate_sw
+#define ShaFinal  ShaFinal_sw
+
+#define InitSha256   InitSha256_sw
+#define Sha256Update Sha256Update_sw
+#define Sha256Final  Sha256Final_sw
+
+#endif
+
 #include 
 #include 
 #include 
diff --git a/ctaocrypt/src/random.c b/ctaocrypt/src/random.c
index 1032897b4..09966b8a8 100644
--- a/ctaocrypt/src/random.c
+++ b/ctaocrypt/src/random.c
@@ -460,15 +460,14 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
 
 #elif defined(MICROCHIP_PIC32)
 
-    #ifdef MICROCHIP_MPLAB_HARMONY
-        #define PIC32_SEED_COUNT _CP0_GET_COUNT
-    #else    
-        #if !defined(CYASSL_MICROCHIP_PIC32MZ)
-            #include 
-        #endif
-        #define PIC32_SEED_COUNT ReadCoreTimer
+#ifdef MICROCHIP_MPLAB_HARMONY
+    #define PIC32_SEED_COUNT _CP0_GET_COUNT
+#else
+    #if !defined(CYASSL_MICROCHIP_PIC32MZ)
+        #include 
     #endif
-
+    #define PIC32_SEED_COUNT ReadCoreTimer
+#endif
     #ifdef CYASSL_MIC32MZ_RNG
         #include "xc.h"
         int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
@@ -479,16 +478,17 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
             word32 size = sz ;
             byte* op = output ;
 
+            /* This part has to be replaced with better random seed */
             RNGNUMGEN1 = ReadCoreTimer();
-            RNGPOLY1 = 0x01020304;
-            RNGPOLY2 = 0x05060709;
+            RNGPOLY1 = ReadCoreTimer();
+            RNGPOLY2 = ReadCoreTimer();
             RNGNUMGEN2 = ReadCoreTimer();
 #ifdef DEBUG_CYASSL
             printf("GenerateSeed::Seed=%08x, %08x\n", RNGNUMGEN1, RNGNUMGEN2) ;
 #endif
             RNGCONbits.PLEN = 0x40;
             RNGCONbits.PRNGEN = 1;
-            for(i=0; i<3; i++) { /* wait for RNGNUMGEN ready */
+            for(i=0; i<5; i++) { /* wait for RNGNUMGEN ready */
                 volatile int x ;
                 x = RNGNUMGEN1 ;
                 x = RNGNUMGEN2 ;
@@ -503,36 +503,24 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
                     if(size==0)break ;
                 }
             } while(size) ;
-
-#ifdef DEBUG_CYASSL
-            printf("\nReturn=") ;
-            for(i=0; idigest, sizeof(T));
 
-    /* 64 operations, partially loop unrolled */
+#ifdef USE_SLOW_SHA2
+    /* over twice as small, but 50% slower */
+    /* 80 operations, not unrolled */
+    for (j = 0; j < 80; j += 16) {
+        int m; 
+        for (m = 0; m < 16; m++) { /* braces needed here for macros {} */
+            R(m);
+        }
+    }
+#else
+    /* 80 operations, partially loop unrolled */
     for (j = 0; j < 80; j += 16) {
         R( 0); R( 1); R( 2); R( 3);
         R( 4); R( 5); R( 6); R( 7);
         R( 8); R( 9); R(10); R(11);
         R(12); R(13); R(14); R(15);
     }
+#endif /* USE_SLOW_SHA2 */
 
     /* Add the working vars back into digest */
 
@@ -280,13 +291,24 @@ static void Transform384(Sha384* sha384)
     /* Copy digest to working vars */
     XMEMCPY(T, sha384->digest, sizeof(T));
 
-    /* 64 operations, partially loop unrolled */
+#ifdef USE_SLOW_SHA2
+    /* over twice as small, but 50% slower */
+    /* 80 operations, not unrolled */
+    for (j = 0; j < 80; j += 16) {
+        int m;
+        for (m = 0; m < 16; m++) {  /* braces needed for macros {} */
+            R2(m);
+        }
+    }
+#else
+    /* 80 operations, partially loop unrolled */
     for (j = 0; j < 80; j += 16) {
         R2( 0); R2( 1); R2( 2); R2( 3);
         R2( 4); R2( 5); R2( 6); R2( 7);
         R2( 8); R2( 9); R2(10); R2(11);
         R2(12); R2(13); R2(14); R2(15);
     }
+#endif /* USE_SLOW_SHA2 */
 
     /* Add the working vars back into digest */
 
diff --git a/ctaocrypt/test/test.c b/ctaocrypt/test/test.c
index 5ba050838..e7459904f 100644
--- a/ctaocrypt/test/test.c
+++ b/ctaocrypt/test/test.c
@@ -61,6 +61,9 @@
 #ifdef HAVE_LIBZ
     #include 
 #endif
+#ifdef HAVE_PKCS7
+    #include 
+#endif
 
 #ifdef _MSC_VER
     /* 4996 warning to use MS extensions e.g., strcpy_s instead of strncpy */
@@ -174,6 +177,10 @@ int pbkdf2_test(void);
 #ifdef HAVE_LIBZ
     int compress_test(void);
 #endif
+#ifdef HAVE_PKCS7
+    int pkcs7enveloped_test(void);
+    int pkcs7signed_test(void);
+#endif
 
 
 
@@ -458,6 +465,18 @@ void ctaocrypt_test(void* args)
         printf( "COMPRESS test passed!\n");
 #endif
 
+#ifdef HAVE_PKCS7
+    if ( (ret = pkcs7enveloped_test()) != 0)
+        err_sys("PKCS7enveloped test failed!\n", ret);
+    else
+        printf( "PKCS7enveloped test passed!\n");
+
+    if ( (ret = pkcs7signed_test()) != 0)
+        err_sys("PKCS7signed    test failed!\n", ret);
+    else
+        printf( "PKCS7signed    test passed!\n");
+#endif
+
     ((func_args*)args)->return_code = ret;
 }
 
@@ -1897,6 +1916,12 @@ int aes_test(void)
             0x79,0x21,0x70,0xa0,0xf3,0x00,0x9c,0xee
         };
 
+        const byte oddCipher[] =
+        {
+            0xb9,0xd7,0xcb,0x08,0xb0,0xe1,0x7b,0xa0,
+            0xc2
+        };
+
         AesSetKeyDirect(&enc, ctrKey, AES_BLOCK_SIZE, ctrIv, AES_ENCRYPTION);
         /* Ctr only uses encrypt, even on key setup */
         AesSetKeyDirect(&dec, ctrKey, AES_BLOCK_SIZE, ctrIv, AES_ENCRYPTION);
@@ -1909,6 +1934,30 @@ int aes_test(void)
 
         if (memcmp(cipher, ctrCipher, AES_BLOCK_SIZE*4))
             return -67;
+
+        /* let's try with just 9 bytes, non block size test */
+        AesSetKeyDirect(&enc, ctrKey, AES_BLOCK_SIZE, ctrIv, AES_ENCRYPTION);
+        /* Ctr only uses encrypt, even on key setup */
+        AesSetKeyDirect(&dec, ctrKey, AES_BLOCK_SIZE, ctrIv, AES_ENCRYPTION);
+
+        AesCtrEncrypt(&enc, cipher, ctrPlain, 9);
+        AesCtrEncrypt(&dec, plain, cipher, 9);
+
+        if (memcmp(plain, ctrPlain, 9))
+            return -68;
+
+        if (memcmp(cipher, ctrCipher, 9))
+            return -69;
+
+        /* and an additional 9 bytes to reuse tmp left buffer */
+        AesCtrEncrypt(&enc, cipher, ctrPlain, 9);
+        AesCtrEncrypt(&dec, plain, cipher, 9);
+
+        if (memcmp(plain, ctrPlain, 9))
+            return -70;
+
+        if (memcmp(cipher, oddCipher, 9))
+            return -71;
     }
 #endif /* CYASSL_AES_COUNTER */
 
@@ -2033,8 +2082,10 @@ int aesgcm_test(void)
 
     result = AesGcmDecrypt(&enc, p2, c2, sizeof(p2), iv, sizeof(iv),
                                                  t2, sizeof(t2), a, sizeof(a));
+
     if (result != 0)
         return -70;
+
     if (memcmp(p, p2, sizeof(p2)))
         return -71;
 
@@ -2487,17 +2538,27 @@ byte GetEntropy(ENTROPY_CMD cmd, byte* out)
         #ifdef CYASSL_CERT_GEN
             static const char* caKeyFile  = "a:\\certs\\ca-key.der";
             static const char* caCertFile = "a:\\certs\\ca-cert.pem";
+            #ifdef HAVE_ECC
+                static const char* eccCaKeyFile  = "a:\\certs\\ecc-key.der";
+                static const char* eccCaCertFile = "a:\\certs\\server-ecc.pem";
+            #endif 
         #endif
     #elif defined(CYASSL_MKD_SHELL)
         static char* clientKey = "certs/client-key.der";
         static char* clientCert = "certs/client-cert.der";
-        void set_clientKey(char *key) {  clientKey = key ; }      /* set by shell command */
-        void set_clientCert(char *cert) {  clientCert = cert ; }  /* set by shell command */
+        void set_clientKey(char *key) {  clientKey = key ; }
+        void set_clientCert(char *cert) {  clientCert = cert ; }
         #ifdef CYASSL_CERT_GEN
             static char* caKeyFile  = "certs/ca-key.der";
             static char* caCertFile = "certs/ca-cert.pem";
-            void set_caKeyFile (char * key)  { caKeyFile   = key ; }     /* set by shell command */
-            void set_caCertFile(char * cert) { caCertFile = cert ; }     /* set by shell command */
+            void set_caKeyFile (char * key)  { caKeyFile   = key ; }
+            void set_caCertFile(char * cert) { caCertFile = cert ; }
+            #ifdef HAVE_ECC
+                static const char* eccCaKeyFile  = "certs/ecc-key.der";
+                static const char* eccCaCertFile = "certs/server-ecc.pem";
+                void set_eccCaKeyFile (char * key)  { eccCaKeyFile  = key ; }
+                void set_eccCaCertFile(char * cert) { eccCaCertFile = cert ; }
+            #endif 
         #endif
     #else
         static const char* clientKey  = "./certs/client-key.der";
@@ -2505,6 +2566,10 @@ byte GetEntropy(ENTROPY_CMD cmd, byte* out)
         #ifdef CYASSL_CERT_GEN
             static const char* caKeyFile  = "./certs/ca-key.der";
             static const char* caCertFile = "./certs/ca-cert.pem";
+            #ifdef HAVE_ECC
+                static const char* eccCaKeyFile  = "./certs/ecc-key.der";
+                static const char* eccCaCertFile = "./certs/server-ecc.pem";
+            #endif 
         #endif
     #endif
 #endif
@@ -2784,11 +2849,12 @@ int rsa_test(void)
         if (ret < 0)
             return -405;
 
-        certSz = MakeCert(&myCert, derCert, FOURK_BUF, &key, &rng); 
+        certSz = MakeCert(&myCert, derCert, FOURK_BUF, &key, NULL, &rng); 
         if (certSz < 0)
             return -407;
 
-        certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng);
+        certSz = SignCert(myCert.bodySz, myCert.sigType, derCert, FOURK_BUF,
+                          &caKey, NULL, &rng);
         if (certSz < 0)
             return -408;
 
@@ -2820,6 +2886,95 @@ int rsa_test(void)
         free(derCert);
         FreeRsaKey(&caKey);
     }
+#ifdef HAVE_ECC
+    /* ECC CA style */
+    {
+        ecc_key     caKey;
+        Cert        myCert;
+        byte*       derCert;
+        byte*       pem;
+        FILE*       derFile;
+        FILE*       pemFile;
+        int         certSz;
+        int         pemSz;
+        size_t      bytes3;
+        word32      idx3 = 0;
+			  FILE* file3 ;
+#ifdef CYASSL_TEST_CERT
+        DecodedCert decode;
+#endif
+
+        derCert = (byte*)malloc(FOURK_BUF);
+        if (derCert == NULL)
+            return -5311;
+        pem = (byte*)malloc(FOURK_BUF);
+        if (pem == NULL)
+            return -5312;
+
+        file3 = fopen(eccCaKeyFile, "rb");
+
+        if (!file3)
+            return -5412;
+
+        bytes3 = fread(tmp, 1, FOURK_BUF, file3);
+        fclose(file3);
+  
+        ecc_init(&caKey);  
+        ret = EccPrivateKeyDecode(tmp, &idx3, &caKey, (word32)bytes3);
+        if (ret != 0) return -5413;
+
+        InitCert(&myCert);
+        myCert.sigType = CTC_SHA256wECDSA; 
+
+        strncpy(myCert.subject.country, "US", CTC_NAME_SIZE);
+        strncpy(myCert.subject.state, "OR", CTC_NAME_SIZE);
+        strncpy(myCert.subject.locality, "Portland", CTC_NAME_SIZE);
+        strncpy(myCert.subject.org, "wolfSSL", CTC_NAME_SIZE);
+        strncpy(myCert.subject.unit, "Development", CTC_NAME_SIZE);
+        strncpy(myCert.subject.commonName, "www.wolfssl.com", CTC_NAME_SIZE);
+        strncpy(myCert.subject.email, "info@wolfssl.com", CTC_NAME_SIZE);
+
+        ret = SetIssuer(&myCert, eccCaCertFile);
+        if (ret < 0)
+            return -5405;
+
+        certSz = MakeCert(&myCert, derCert, FOURK_BUF, NULL, &caKey, &rng); 
+        if (certSz < 0)
+            return -5407;
+
+        certSz = SignCert(myCert.bodySz, myCert.sigType, derCert, FOURK_BUF,
+                          NULL, &caKey, &rng);
+        if (certSz < 0)
+            return -5408;
+
+#ifdef CYASSL_TEST_CERT
+        InitDecodedCert(&decode, derCert, certSz, 0);
+        ret = ParseCert(&decode, CERT_TYPE, NO_VERIFY, 0);
+        if (ret != 0)
+            return -5409;
+        FreeDecodedCert(&decode);
+#endif
+
+        derFile = fopen("./certecc.der", "wb");
+        if (!derFile)
+            return -5410;
+        ret = (int)fwrite(derCert, certSz, 1, derFile);
+        fclose(derFile);
+
+        pemSz = DerToPem(derCert, certSz, pem, FOURK_BUF, CERT_TYPE);
+        if (pemSz < 0)
+            return -5411;
+
+        pemFile = fopen("./certecc.pem", "wb");
+        if (!pemFile)
+            return -5412;
+        ret = (int)fwrite(pem, pemSz, 1, pemFile);
+        fclose(pemFile);
+        free(pem);
+        free(derCert);
+        ecc_free(&caKey);
+    }
+#endif /* HAVE_ECC */
 #ifdef HAVE_NTRU
     {
         RsaKey      caKey;
@@ -2900,7 +3055,8 @@ int rsa_test(void)
         if (certSz < 0)
             return -456;
 
-        certSz = SignCert(&myCert, derCert, FOURK_BUF, &caKey, &rng);
+        certSz = SignCert(myCert.bodySz, myCert.sigType, derCert, FOURK_BUF,
+                          &caKey, NULL, &rng);
         if (certSz < 0)
             return -457;
 
@@ -2938,6 +3094,66 @@ int rsa_test(void)
         FreeRsaKey(&caKey);
     }
 #endif /* HAVE_NTRU */
+#ifdef CYASSL_CERT_REQ
+    {
+        Cert        req;
+        byte*       der;
+        byte*       pem;
+        int         derSz;
+        int         pemSz;
+        FILE*       reqFile;
+
+        der = (byte*)malloc(FOURK_BUF);
+        if (der == NULL)
+            return -463;
+        pem = (byte*)malloc(FOURK_BUF);
+        if (pem == NULL)
+            return -464;
+
+        InitCert(&req);
+
+        req.version = 0;
+        req.isCA    = 1;
+        strncpy(req.challengePw, "yassl123", CTC_NAME_SIZE);
+        strncpy(req.subject.country, "US", CTC_NAME_SIZE);
+        strncpy(req.subject.state, "OR", CTC_NAME_SIZE);
+        strncpy(req.subject.locality, "Portland", CTC_NAME_SIZE);
+        strncpy(req.subject.org, "yaSSL", CTC_NAME_SIZE);
+        strncpy(req.subject.unit, "Development", CTC_NAME_SIZE);
+        strncpy(req.subject.commonName, "www.yassl.com", CTC_NAME_SIZE);
+        strncpy(req.subject.email, "info@yassl.com", CTC_NAME_SIZE);
+        req.sigType = CTC_SHA256wRSA;
+
+        derSz = MakeCertReq(&req, der, FOURK_BUF, &key, NULL);
+        if (derSz < 0)
+            return -465;
+
+        derSz = SignCert(req.bodySz, req.sigType, der, FOURK_BUF,
+                          &key, NULL, &rng);
+        if (derSz < 0)
+            return -466;
+
+        pemSz = DerToPem(der, derSz, pem, FOURK_BUF, CERTREQ_TYPE);
+        if (pemSz < 0)
+            return -467;
+
+        reqFile = fopen("./certreq.der", "wb");
+        if (!reqFile)
+            return -468;
+
+        ret = (int)fwrite(der, derSz, 1, reqFile);
+        fclose(reqFile);
+
+        reqFile = fopen("./certreq.pem", "wb");
+        if (!reqFile)
+            return -469;
+        ret = (int)fwrite(pem, pemSz, 1, reqFile);
+        fclose(reqFile);
+
+        free(pem);
+        free(der);
+    }
+#endif /* CYASSL_CERT_REQ */
 #endif /* CYASSL_CERT_GEN */
 
     FreeRsaKey(&key);
@@ -3628,12 +3844,12 @@ int ecc_encrypt_test(void)
     for (i = 0; i < 48; i++)
         msg[i] = i;
 
-    /* send encrypted msg to B */
+    /* encrypt msg to B */
     ret = ecc_encrypt(&userA, &userB, msg, sizeof(msg), out, &outSz, NULL);
     if (ret != 0)
         return -3003;
 
-    /* decrypted msg to B */
+    /* decrypt msg from A */
     ret = ecc_decrypt(&userB, &userA, out, outSz, plain, &plainSz, NULL);
     if (ret != 0)
         return -3004;
@@ -3641,6 +3857,84 @@ int ecc_encrypt_test(void)
     if (memcmp(plain, msg, sizeof(msg)) != 0)
         return -3005;
 
+    
+    {  /* let's verify message exchange works, A is client, B is server */
+        ecEncCtx* cliCtx = ecc_ctx_new(REQ_RESP_CLIENT, &rng);
+        ecEncCtx* srvCtx = ecc_ctx_new(REQ_RESP_SERVER, &rng);
+
+        byte cliSalt[EXCHANGE_SALT_SZ];
+        byte srvSalt[EXCHANGE_SALT_SZ];
+        const byte* tmpSalt;
+
+        if (cliCtx == NULL || srvCtx == NULL)
+            return -3006;
+
+        /* get salt to send to peer */
+        tmpSalt = ecc_ctx_get_own_salt(cliCtx);
+        if (tmpSalt == NULL)
+            return -3007;
+        memcpy(cliSalt, tmpSalt, EXCHANGE_SALT_SZ);
+
+        tmpSalt = ecc_ctx_get_own_salt(srvCtx);
+        if (tmpSalt == NULL)
+            return -3007;
+        memcpy(srvSalt, tmpSalt, EXCHANGE_SALT_SZ);
+
+        /* in actual use, we'd get the peer's salt over the transport */
+        ret  = ecc_ctx_set_peer_salt(cliCtx, srvSalt);
+        ret += ecc_ctx_set_peer_salt(srvCtx, cliSalt);
+
+        if (ret != 0)
+            return -3008;
+
+        /* get encrypted msg (request) to send to B */
+        outSz  = sizeof(out);
+        ret = ecc_encrypt(&userA, &userB, msg, sizeof(msg), out, &outSz,cliCtx);
+        if (ret != 0)
+            return -3009;
+
+        /* B decrypts msg (request) from A */
+        plainSz = sizeof(plain);
+        ret = ecc_decrypt(&userB, &userA, out, outSz, plain, &plainSz, srvCtx);
+        if (ret != 0)
+            return -3010;
+
+        if (memcmp(plain, msg, sizeof(msg)) != 0)
+            return -3011;
+
+        {
+            /* msg2 (response) from B to A */
+            byte    msg2[48];
+            byte    plain2[48];
+            byte    out2[80];
+            word32  outSz2   = sizeof(out2);
+            word32  plainSz2 = sizeof(plain2);
+
+            for (i = 0; i < 48; i++)
+                msg2[i] = i+48;
+
+            /* get encrypted msg (response) to send to B */
+            ret = ecc_encrypt(&userB, &userA, msg2, sizeof(msg2), out2,
+                              &outSz2, srvCtx);
+            if (ret != 0)
+                return -3012;
+
+            /* A decrypts msg (response) from B */
+            ret = ecc_decrypt(&userA, &userB, out2, outSz2, plain2, &plainSz2,
+                             cliCtx);
+            if (ret != 0)
+                return -3013;
+
+            if (memcmp(plain2, msg2, sizeof(msg2)) != 0)
+                return -3014;
+        }
+
+        /* cleanup */
+        ecc_ctx_free(srvCtx);
+        ecc_ctx_free(cliCtx);
+    }
+
+    /* cleanup */
     ecc_free(&userB);
     ecc_free(&userA);
 
@@ -3766,4 +4060,269 @@ int compress_test(void)
 
 #endif /* HAVE_LIBZ */
 
+#ifdef HAVE_PKCS7
+
+int pkcs7enveloped_test(void)
+{
+    int ret = 0;
+
+    int cipher = DES3b;
+    int envelopedSz, decodedSz;
+    PKCS7 pkcs7;
+    byte* cert;
+    byte* privKey;
+    byte  enveloped[2048];
+    byte  decoded[2048];
+
+    size_t certSz;
+    size_t privKeySz;
+    FILE*  certFile;
+    FILE*  keyFile;
+    FILE*  pkcs7File;
+    const char* pkcs7OutFile = "pkcs7envelopedData.der";
+
+    const byte data[] = { /* Hello World */
+        0x48,0x65,0x6c,0x6c,0x6f,0x20,0x57,0x6f,
+        0x72,0x6c,0x64
+    };
+
+    /* read client cert and key in DER format */
+    cert = (byte*)malloc(FOURK_BUF);
+    if (cert == NULL)
+        return -201;
+
+    privKey = (byte*)malloc(FOURK_BUF);
+    if (privKey == NULL)
+        return -202;
+
+    certFile = fopen(clientCert, "rb");
+    if (!certFile)
+        err_sys("can't open ./certs/client-cert.der, "
+                "Please run from CyaSSL home dir", -42);
+
+    certSz = fread(cert, 1, FOURK_BUF, certFile);
+    fclose(certFile);
+
+    keyFile = fopen(clientKey, "rb");
+    if (!keyFile)
+        err_sys("can't open ./certs/client-key.der, "
+                "Please run from CyaSSL home dir", -43);
+
+    privKeySz = fread(privKey, 1, FOURK_BUF, keyFile);
+    fclose(keyFile);
+
+    PKCS7_InitWithCert(&pkcs7, cert, (word32)certSz);
+    pkcs7.content     = (byte*)data;
+    pkcs7.contentSz   = (word32)sizeof(data);
+    pkcs7.contentOID  = DATA;
+    pkcs7.encryptOID  = cipher;
+    pkcs7.privateKey  = privKey;
+    pkcs7.privateKeySz = (word32)privKeySz;
+
+    /* encode envelopedData */
+    envelopedSz = PKCS7_EncodeEnvelopedData(&pkcs7, enveloped,
+                                            sizeof(enveloped));
+    if (envelopedSz <= 0)
+        return -203;
+
+    /* decode envelopedData */
+    decodedSz = PKCS7_DecodeEnvelopedData(&pkcs7, enveloped, envelopedSz,
+                                          decoded, sizeof(decoded));
+    if (decodedSz <= 0)
+        return -204;
+
+    /* test decode result */
+    if (memcmp(decoded, data, sizeof(data)) != 0) {
+        return -205;
+    }
+
+    /* output pkcs7 envelopedData for external testing */
+    pkcs7File = fopen(pkcs7OutFile, "wb");
+    if (!pkcs7File)
+        return -206;
+
+    ret = (int)fwrite(enveloped, envelopedSz, 1, pkcs7File);
+    fclose(pkcs7File);
+
+    free(cert);
+    free(privKey);
+    PKCS7_Free(&pkcs7);
+
+    if (ret > 0)
+        return 0;
+
+    return ret;
+}
+
+int pkcs7signed_test(void)
+{
+    int ret = 0;
+
+    FILE* file;
+    byte* certDer;
+    byte* keyDer;
+    byte* out;
+    char data[] = "Hello World";
+    word32 dataSz, outSz, certDerSz, keyDerSz;
+    PKCS7 msg;
+    RNG rng;
+
+    byte transIdOid[] =
+               { 0x06, 0x0a, 0x60, 0x86, 0x48, 0x01, 0x86, 0xF8, 0x45, 0x01,
+                 0x09, 0x07 };
+    byte messageTypeOid[] =
+               { 0x06, 0x0a, 0x60, 0x86, 0x48, 0x01, 0x86, 0xF8, 0x45, 0x01,
+                 0x09, 0x02 };
+    byte senderNonceOid[] =
+               { 0x06, 0x0a, 0x60, 0x86, 0x48, 0x01, 0x86, 0xF8, 0x45, 0x01,
+                 0x09, 0x05 };
+    byte transId[(SHA_DIGEST_SIZE + 1) * 2 + 1];
+    byte messageType[] = { 0x13, 2, '1', '9' };
+    byte senderNonce[PKCS7_NONCE_SZ + 2];
+
+    PKCS7Attrib attribs[] =
+    {
+        { transIdOid, sizeof(transIdOid),
+                     transId, sizeof(transId) - 1 }, /* take off the null */
+        { messageTypeOid, sizeof(messageTypeOid),
+                     messageType, sizeof(messageType) },
+        { senderNonceOid, sizeof(senderNonceOid),
+                     senderNonce, sizeof(senderNonce) }
+    };
+
+    dataSz = (word32) strlen(data);
+    outSz = FOURK_BUF;
+
+    certDer = (byte*)malloc(FOURK_BUF);
+    keyDer = (byte*)malloc(FOURK_BUF);
+    out = (byte*)malloc(FOURK_BUF);
+
+    if (certDer == NULL)
+        return -207;
+    if (keyDer == NULL)
+        return -208;
+    if (out == NULL)
+        return -209;
+
+    /* read in DER cert of recipient, into cert of size certSz */
+    file = fopen(clientCert, "rb");
+    if (!file) {
+        free(certDer);
+        free(keyDer);
+        free(out);
+        err_sys("can't open ./certs/client-cert.der, "
+                "Please run from CyaSSL home dir", -44);
+    }
+    certDerSz = (word32)fread(certDer, 1, FOURK_BUF, file);
+    fclose(file);
+
+    file = fopen(clientKey, "rb");
+    if (!file) {
+        free(certDer);
+        free(keyDer);
+        free(out);
+        err_sys("can't open ./certs/client-key.der, "
+                "Please run from CyaSSL home dir", -45);
+    }
+    keyDerSz = (word32)fread(keyDer, 1, FOURK_BUF, file);
+    fclose(file);
+
+    ret = InitRng(&rng);
+    senderNonce[0] = 0x04;
+    senderNonce[1] = PKCS7_NONCE_SZ;
+    RNG_GenerateBlock(&rng, &senderNonce[2], PKCS7_NONCE_SZ);
+
+    PKCS7_InitWithCert(&msg, certDer, certDerSz);
+    msg.privateKey = keyDer;
+    msg.privateKeySz = keyDerSz;
+    msg.content = (byte*)data;
+    msg.contentSz = dataSz;
+    msg.hashOID = SHAh;
+    msg.encryptOID = RSAk;
+    msg.signedAttribs = attribs;
+    msg.signedAttribsSz = sizeof(attribs)/sizeof(PKCS7Attrib);
+    msg.rng = &rng;
+    {
+        Sha sha;
+        byte digest[SHA_DIGEST_SIZE];
+        int i,j;
+
+        transId[0] = 0x13;
+        transId[1] = SHA_DIGEST_SIZE * 2;
+
+        InitSha(&sha);
+        ShaUpdate(&sha, msg.publicKey, msg.publicKeySz);
+        ShaFinal(&sha, digest);
+
+        for (i = 0, j = 2; i < SHA_DIGEST_SIZE; i++, j += 2) {
+            snprintf((char*)&transId[j], 3, "%02x", digest[i]);
+        }
+    }
+    ret = PKCS7_EncodeSignedData(&msg, out, outSz);
+    if (ret < 0) {
+        free(certDer);
+        free(keyDer);
+        free(out);
+        PKCS7_Free(&msg);
+        return -210;
+    }
+    else
+        outSz = ret;
+
+    /* write PKCS#7 to output file for more testing */
+    file = fopen("./pkcs7signedData.der", "wb");
+    if (!file) {
+        free(certDer);
+        free(keyDer);
+        free(out);
+        PKCS7_Free(&msg);
+        return -211;
+    }
+    ret = (int)fwrite(out, 1, outSz, file);
+    fclose(file);
+
+    PKCS7_Free(&msg);
+    PKCS7_InitWithCert(&msg, NULL, 0);
+
+    ret = PKCS7_VerifySignedData(&msg, out, outSz);
+    if (ret < 0) {
+        free(certDer);
+        free(keyDer);
+        free(out);
+        PKCS7_Free(&msg);
+        return -212;
+    }
+
+    if (msg.singleCert == NULL || msg.singleCertSz == 0) {
+        free(certDer);
+        free(keyDer);
+        free(out);
+        PKCS7_Free(&msg);
+        return -213;
+    }
+
+    file = fopen("./pkcs7cert.der", "wb");
+    if (!file) {
+        free(certDer);
+        free(keyDer);
+        free(out);
+        PKCS7_Free(&msg);
+        return -214;
+    }
+    ret = (int)fwrite(msg.singleCert, 1, msg.singleCertSz, file);
+    fclose(file);
+
+    free(certDer);
+    free(keyDer);
+    free(out);
+    PKCS7_Free(&msg);
+
+    if (ret > 0)
+        return 0;
+
+    return ret;
+}
+
+#endif /* HAVE_PKCS7 */
+
 #endif /* NO_CRYPT_TEST */
diff --git a/cyassl-ntru.vcproj b/cyassl-ntru.vcproj
index 57720a52d..0813acdc7 100755
--- a/cyassl-ntru.vcproj
+++ b/cyassl-ntru.vcproj
@@ -166,10 +166,22 @@
 				RelativePath=".\ctaocrypt\src\asn.c"
 				>
 			
+			
+			
+			
+			
 			
 			
+			
+			
 			
@@ -182,6 +194,10 @@
 				RelativePath=".\ctaocrypt\src\dsa.c"
 				>
 			
+			
+			
 			
@@ -230,6 +246,10 @@
 				RelativePath=".\ctaocrypt\src\misc.c"
 				>
 			
+			
+			
 			
diff --git a/cyassl.vcproj b/cyassl.vcproj
index 958f3ab61..82f919d25 100755
--- a/cyassl.vcproj
+++ b/cyassl.vcproj
@@ -162,10 +162,22 @@
 				RelativePath=".\ctaocrypt\src\asn.c"
 				>
 			
+			
+			
+			
+			
 			
 			
+			
+			
 			
@@ -178,6 +190,10 @@
 				RelativePath=".\ctaocrypt\src\dsa.c"
 				>
 			
+			
+			
 			
@@ -222,6 +238,10 @@
 				RelativePath=".\ctaocrypt\src\memory.c"
 				>
 			
+			
+			
 			
diff --git a/cyassl/ctaocrypt/aes.h b/cyassl/ctaocrypt/aes.h
index 37861903e..b08e4e86a 100644
--- a/cyassl/ctaocrypt/aes.h
+++ b/cyassl/ctaocrypt/aes.h
@@ -92,6 +92,14 @@ typedef struct Aes {
     word32  magic;           /* using cavium magic */
     word64  contextHandle;   /* nitrox context memory handle */
 #endif
+#ifdef CYASSL_AES_COUNTER
+    word32  left;            /* unsued bytes left from last call */
+#endif
+#ifdef CYASSL_PIC32MZ_CRYPT
+    word32 key_ce[AES_BLOCK_SIZE*2/sizeof(word32)] ;
+    word32 iv_ce [AES_BLOCK_SIZE  /sizeof(word32)] ;
+    int    keylen ;
+#endif
 } Aes;
 
 
diff --git a/cyassl/ctaocrypt/asn.h b/cyassl/ctaocrypt/asn.h
index 70dbfbe09..db7ab2932 100644
--- a/cyassl/ctaocrypt/asn.h
+++ b/cyassl/ctaocrypt/asn.h
@@ -59,6 +59,7 @@ enum ASN_Tags {
     ASN_TAG_NULL          = 0x05,
     ASN_OBJECT_ID         = 0x06,
     ASN_ENUMERATED        = 0x0a,
+    ASN_UTF8STRING        = 0x0c,
     ASN_SEQUENCE          = 0x10,
     ASN_SET               = 0x11,
     ASN_UTC_TIME          = 0x17,
@@ -125,6 +126,9 @@ enum Misc_ASN {
     MAX_ALGO_SZ         =  20,
     MAX_SEQ_SZ          =   5,     /* enum(seq | con) + length(4) */  
     MAX_SET_SZ          =   5,     /* enum(set | con) + length(4) */  
+    MAX_OCTET_STR_SZ    =   5,     /* enum(set | con) + length(4) */
+    MAX_EXP_SZ          =   5,     /* enum(contextspec|con|exp) + length(4) */
+    MAX_PRSTR_SZ        =   5,     /* enum(prstr) + length(4) */
     MAX_VERSION_SZ      =   5,     /* enum + id + version(byte) + (header(2))*/
     MAX_ENCODED_DIG_SZ  =  73,     /* sha512 + enum(bit or octet) + legnth(4) */
     MAX_RSA_INT_SZ      = 517,     /* RSA raw sz 4096 for bits + tag + len(4) */
@@ -135,6 +139,11 @@ enum Misc_ASN {
     MAX_CA_SZ           =  32,     /* Max encoded CA basic constraint length */
     MAX_SN_SZ           =  35,     /* Max encoded serial number (INT) length */
 #ifdef CYASSL_CERT_GEN
+    #ifdef CYASSL_CERT_REQ
+                          /* Max encoded cert req attributes length */
+        MAX_ATTRIB_SZ   = MAX_SEQ_SZ * 3 + (11 + MAX_SEQ_SZ) * 2 +
+                          MAX_PRSTR_SZ + CTC_NAME_SIZE, /* 11 is the OID size */
+    #endif
     #ifdef CYASSL_ALT_NAMES
         MAX_EXTENSIONS_SZ   = 1 + MAX_LENGTH_SZ + CTC_MAX_ALT_SIZE,
     #else
@@ -151,9 +160,11 @@ enum Misc_ASN {
 
 
 enum Oid_Types {
-    hashType = 0,
-    sigType  = 1,
-    keyType  = 2
+    hashType  = 0,
+    sigType   = 1,
+    keyType   = 2,
+    curveType = 3,
+    blkType   = 4
 };
 
 
@@ -167,6 +178,12 @@ enum Hash_Sum  {
 };
 
 
+enum Block_Sum {
+    DESb  = 69,
+    DES3b = 652
+};
+
+
 enum Key_Sum {
     DSAk   = 515,
     RSAk   = 645,
@@ -198,7 +215,8 @@ enum Extensions_Sum {
     CA_ISSUER_OID   = 117,
     AUTH_KEY_OID    = 149,
     SUBJ_KEY_OID    = 128,
-    CERT_POLICY_OID = 146
+    CERT_POLICY_OID = 146,
+    KEY_USAGE_OID   = 129  /* 2.5.29.15 */
 };
 
 enum CertificatePolicy_Sum {
@@ -209,6 +227,11 @@ enum SepHardwareName_Sum {
     HW_NAME_OID     = 79   /* 1.3.6.1.5.5.7.8.4 from RFC 4108*/
 };
 
+enum AuthInfo_Sum {
+    AIA_OCSP_OID      = 116, /* 1.3.6.1.5.5.7.48.1 */
+    AIA_CA_ISSUER_OID = 117  /* 1.3.6.1.5.5.7.48.2 */
+};
+
 
 enum VerifyType {
     NO_VERIFY = 0,
@@ -216,6 +239,18 @@ enum VerifyType {
 };
 
 
+/* Key usage extension bits */
+#define KEYUSE_DIGITAL_SIG    0x0100
+#define KEYUSE_CONTENT_COMMIT 0x0080
+#define KEYUSE_KEY_ENCIPHER   0x0040
+#define KEYUSE_DATA_ENCIPHER  0x0020
+#define KEYUSE_KEY_AGREE      0x0010
+#define KEYUSE_KEY_CERT_SIGN  0x0008
+#define KEYUSE_CRL_SIGN       0x0004
+#define KEYUSE_ENCIPHER_ONLY  0x0002
+#define KEYUSE_DECIPHER_ONLY  0x0001
+
+
 typedef struct DNS_entry   DNS_entry;
 
 struct DNS_entry {
@@ -296,11 +331,35 @@ struct DecodedCert {
     byte    extSubjKeyIdSet;         /* Set when the SKID was read from cert */
     byte    extAuthKeyId[SHA_SIZE];  /* Authority Key ID                 */
     byte    extAuthKeyIdSet;         /* Set when the AKID was read from cert */
-    byte    isCA;                    /* CA basic constraint true */
+    byte    isCA;                    /* CA basic constraint true         */
+#ifdef OPENSSL_EXTRA
+    byte    extBasicConstSet;
+    byte    extBasicConstCrit;
+    byte    extBasicConstPlSet;
+    word32  pathLength;              /* CA basic constraint path length, opt */
+    byte    extSubjAltNameSet;
+    byte    extSubjAltNameCrit;
+    byte    extAuthKeyIdCrit;
+    byte    extSubjKeyIdCrit;
+    byte    extKeyUsageSet;
+    byte    extKeyUsageCrit;
+    word16  extKeyUsage;             /* Key usage bitfield               */
+    byte*   extAuthKeyIdSrc;
+    word32  extAuthKeyIdSz;
+    byte*   extSubjKeyIdSrc;
+    word32  extSubjKeyIdSz;
+#endif
+#ifdef HAVE_ECC
+    word32  pkCurveOID;           /* Public Key's curve OID */
+#endif /* HAVE_ECC */
     byte*   beforeDate;
     int     beforeDateLen;
     byte*   afterDate;
     int     afterDateLen;
+#ifdef HAVE_PKCS7
+    byte*   issuerRaw;               /* pointer to issuer inside source */
+    int     issuerRawLen;
+#endif
 #if defined(CYASSL_CERT_GEN)
     /* easy access to subject info for other sign */
     char*   subjectSN;
@@ -329,6 +388,10 @@ struct DecodedCert {
     byte*   hwType;
     int     hwSerialNumSz;
     byte*   hwSerialNum;
+    #ifdef OPENSSL_EXTRA
+        byte    extCertPolicySet;
+        byte    extCertPolicyCrit;
+    #endif /* OPENSSL_EXTRA */
 #endif /* CYASSL_SEP */
 };
 
@@ -385,15 +448,37 @@ CYASSL_LOCAL int ToTraditionalEnc(byte* buffer, word32 length,const char*, int);
 
 CYASSL_LOCAL int ValidateDate(const byte* date, byte format, int dateType);
 
+/* ASN.1 helper functions */
+CYASSL_LOCAL int GetLength(const byte* input, word32* inOutIdx, int* len,
+                           word32 maxIdx);
+CYASSL_LOCAL int GetSequence(const byte* input, word32* inOutIdx, int* len,
+                             word32 maxIdx);
+CYASSL_LOCAL int GetSet(const byte* input, word32* inOutIdx, int* len,
+                        word32 maxIdx);
+CYASSL_LOCAL int GetMyVersion(const byte* input, word32* inOutIdx,
+                              int* version);
+CYASSL_LOCAL int GetInt(mp_int* mpi, const byte* input, word32* inOutIdx,
+                        word32 maxIdx);
+CYASSL_LOCAL int GetAlgoId(const byte* input, word32* inOutIdx, word32* oid,
+                           word32 maxIdx);
+CYASSL_LOCAL word32 SetLength(word32 length, byte* output);
+CYASSL_LOCAL word32 SetSequence(word32 len, byte* output);
+CYASSL_LOCAL word32 SetOctetString(word32 len, byte* output);
+CYASSL_LOCAL word32 SetImplicit(byte tag, byte number, word32 len,byte* output);
+CYASSL_LOCAL word32 SetExplicit(byte number, word32 len, byte* output);
+CYASSL_LOCAL word32 SetSet(word32 len, byte* output);
+CYASSL_LOCAL word32 SetAlgoID(int algoOID, byte* output, int type, int curveSz);
+CYASSL_LOCAL int SetMyVersion(word32 version, byte* output, int header);
+CYASSL_LOCAL int SetSerialNumber(const byte* sn, word32 snSz, byte* output);
+CYASSL_LOCAL int GetNameHash(const byte* source, word32* idx, byte* hash,
+                             int maxIdx);
+
 #ifdef HAVE_ECC
     /* ASN sig helpers */
     CYASSL_LOCAL int StoreECC_DSA_Sig(byte* out, word32* outLen, mp_int* r,
                                       mp_int* s);
     CYASSL_LOCAL int DecodeECC_DSA_Sig(const byte* sig, word32 sigLen,
                                        mp_int* r, mp_int* s);
-    /* private key helpers */
-    CYASSL_API int EccPrivateKeyDecode(const byte* input,word32* inOutIdx,
-                                         ecc_key*,word32);
 #endif
 
 #ifdef CYASSL_CERT_GEN
@@ -403,7 +488,8 @@ enum cert_enums {
     JOINT_LEN       =  2,
     EMAIL_JOINT_LEN =  9,
     RSA_KEY         = 10,
-    NTRU_KEY        = 11
+    NTRU_KEY        = 11,
+    ECC_KEY         = 12
 };
 
 
diff --git a/cyassl/ctaocrypt/asn_public.h b/cyassl/ctaocrypt/asn_public.h
index f824fbb36..24c6a79e5 100644
--- a/cyassl/ctaocrypt/asn_public.h
+++ b/cyassl/ctaocrypt/asn_public.h
@@ -24,6 +24,7 @@
 #define CTAO_CRYPT_ASN_PUBLIC_H
 
 #include 
+#include 
 #ifdef CYASSL_CERT_GEN
     #include 
 #endif
@@ -41,7 +42,8 @@ enum CertType {
     DH_PARAM_TYPE,
     CRL_TYPE,
     CA_TYPE,
-    ECC_PRIVATEKEY_TYPE
+    ECC_PRIVATEKEY_TYPE,
+    CERTREQ_TYPE
 };
 
 
@@ -63,6 +65,10 @@ enum Ctc_SigType {
 
 #ifdef CYASSL_CERT_GEN
 
+#ifndef HAVE_ECC
+    typedef struct ecc_key ecc_key;
+#endif
+
 enum Ctc_Misc {
     CTC_NAME_SIZE    =   64,
     CTC_DATE_SIZE    =   32,
@@ -103,6 +109,9 @@ typedef struct Cert {
     byte     afterDate[CTC_DATE_SIZE];   /* after date copy */
     int      afterDateSz;                /* size of copy */
 #endif
+#ifdef CYASSL_CERT_REQ
+    char     challengePw[CTC_NAME_SIZE];
+#endif
 } Cert;
 
 
@@ -120,8 +129,14 @@ typedef struct Cert {
    keyType    = RSA_KEY (default)
 */
 CYASSL_API void InitCert(Cert*);
-CYASSL_API int  MakeCert(Cert*, byte* derBuffer, word32 derSz, RsaKey*, RNG*);
-CYASSL_API int  SignCert(Cert*, byte* derBuffer, word32 derSz, RsaKey*, RNG*);
+CYASSL_API int  MakeCert(Cert*, byte* derBuffer, word32 derSz, RsaKey*,
+                         ecc_key*, RNG*);
+#ifdef CYASSL_CERT_REQ
+    CYASSL_API int  MakeCertReq(Cert*, byte* derBuffer, word32 derSz, RsaKey*,
+                                ecc_key*);
+#endif
+CYASSL_API int  SignCert(int requestSz, int sigType, byte* derBuffer,
+                         word32 derSz, RsaKey*, ecc_key*, RNG*);
 CYASSL_API int  MakeSelfCert(Cert*, byte* derBuffer, word32 derSz, RsaKey*,
                              RNG*);
 CYASSL_API int  SetIssuer(Cert*, const char*);
@@ -147,6 +162,12 @@ CYASSL_API int  SetDatesBuffer(Cert*, const byte*, int);
                             word32 outputSz, int type);
 #endif
 
+#ifdef HAVE_ECC
+    /* private key helpers */
+    CYASSL_API int EccPrivateKeyDecode(const byte* input,word32* inOutIdx,
+                                         ecc_key*,word32);
+#endif
+
 
 #ifdef __cplusplus
     } /* extern "C" */
diff --git a/cyassl/ctaocrypt/coding.h b/cyassl/ctaocrypt/coding.h
index a22cd3801..911163794 100644
--- a/cyassl/ctaocrypt/coding.h
+++ b/cyassl/ctaocrypt/coding.h
@@ -39,6 +39,9 @@ CYASSL_LOCAL int Base64_Decode(const byte* in, word32 inLen, byte* out,
     CYASSL_API
     int Base64_Encode(const byte* in, word32 inLen, byte* out,
                                   word32* outLen);
+    CYASSL_API
+    int Base64_EncodeEsc(const byte* in, word32 inLen, byte* out,
+                                  word32* outLen);
     CYASSL_LOCAL 
     int Base16_Decode(const byte* in, word32 inLen, byte* out, word32* outLen);
 #endif
diff --git a/cyassl/ctaocrypt/des3.h b/cyassl/ctaocrypt/des3.h
index 6a970d40d..fe931960e 100644
--- a/cyassl/ctaocrypt/des3.h
+++ b/cyassl/ctaocrypt/des3.h
@@ -45,6 +45,12 @@ enum {
     DES_DECRYPTION  = 1
 };
 
+#define DES_IVLEN 8
+#define DES_KEYLEN 8
+#define DES3_IVLEN 8
+#define DES3_KEYLEN 24
+
+
 #ifdef STM32F2_CRYPTO
 enum {
     DES_CBC = 0,
@@ -55,14 +61,24 @@ enum {
 
 /* DES encryption and decryption */
 typedef struct Des {
-    word32 key[DES_KS_SIZE];
     word32 reg[DES_BLOCK_SIZE / sizeof(word32)];      /* for CBC mode */
     word32 tmp[DES_BLOCK_SIZE / sizeof(word32)];      /* same         */
+#ifdef HAVE_COLDFIRE_SEC
+    byte keylen ;        /* for Coldfire SEC   */
+    byte ivlen ;         /* for Coldfire SEC   */
+    byte iv[DES3_IVLEN]; /* for Coldfire SEC   */
+#endif
+    word32 key[DES_KS_SIZE];
 } Des;
 
 
 /* DES3 encryption and decryption */
 typedef struct Des3 {
+#ifdef HAVE_COLDFIRE_SEC
+    byte keylen ;        /* for Coldfire SEC   */
+    byte ivlen ;         /* for Coldfire SEC   */
+    byte iv[DES3_IVLEN]; /* for Coldfire SEC   */
+#endif
     word32 key[3][DES_KS_SIZE];
     word32 reg[DES_BLOCK_SIZE / sizeof(word32)];      /* for CBC mode */
     word32 tmp[DES_BLOCK_SIZE / sizeof(word32)];      /* same         */
diff --git a/cyassl/ctaocrypt/ecc.h b/cyassl/ctaocrypt/ecc.h
index 683429fec..2434a6844 100644
--- a/cyassl/ctaocrypt/ecc.h
+++ b/cyassl/ctaocrypt/ecc.h
@@ -49,7 +49,7 @@ typedef struct {
     int size;       /* The size of the curve in octets */
     const char* name;     /* name of this curve */
     const char* prime;    /* prime that defines the field, curve is in (hex) */
-    const char* B;        /* fields B param (hex) */
+    const char* Bf;       /* fields B param (hex) */
     const char* order;    /* order of the curve (hex) */
     const char* Gx;       /* x coordinate of the base point on curve (hex) */
     const char* Gy;       /* y coordinate of the base point on curve (hex) */
@@ -119,6 +119,7 @@ CYASSL_API
 int ecc_sig_size(ecc_key* key);
 
 
+#ifdef HAVE_ECC_ENCRYPT
 /* ecc encrypt */
 
 enum ecEncAlgo {
@@ -137,34 +138,39 @@ enum ecMacAlgo {
 };
 
 enum {
-    KEY_SIZE_128 = 16,   
-    KEY_SIZE_256 = 32,   
-    IV_SIZE_64   =  8   
+    KEY_SIZE_128     = 16,   
+    KEY_SIZE_256     = 32,   
+    IV_SIZE_64       =  8,
+    EXCHANGE_SALT_SZ = 16,  
+    EXCHANGE_INFO_SZ = 23  
 };
 
-typedef struct ecEncOptions {
-    byte      encAlgo;     /* which encryption type */
-    byte      kdfAlgo;     /* which key derivation function type */
-    byte      macAlgo;     /* which mac function type */
-    byte*     kdfSalt;     /* optional salt for kdf */
-    byte*     kdfInfo;     /* optional info for kdf */
-    byte*     macSalt;     /* optional salt for mac */
-    word32    kdfSaltSz;   /* size of kdfSalt */
-    word32    kdfInfoSz;   /* size of kdfInfo */
-    word32    macSaltSz;   /* size of macSalt */
-} ecEncOptions;
+enum ecFlags {
+    REQ_RESP_CLIENT = 1,
+    REQ_RESP_SERVER = 2
+};
+
+
+typedef struct ecEncCtx ecEncCtx;
 
 CYASSL_API
-void ecc_encrypt_init_options(ecEncOptions*); /* init and set to defaults */
+ecEncCtx* ecc_ctx_new(int flags, RNG* rng);
 CYASSL_API
-void ecc_encrypt_free_options(ecEncOptions*); /* release/clear options */
+void ecc_ctx_free(ecEncCtx*);
+
+CYASSL_API
+const byte* ecc_ctx_get_own_salt(ecEncCtx*);
+CYASSL_API
+int ecc_ctx_set_peer_salt(ecEncCtx*, const byte* salt);
 
 CYASSL_API
 int ecc_encrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
-                word32 msgSz, byte* out, word32* outSz, ecEncOptions* options);
+                word32 msgSz, byte* out, word32* outSz, ecEncCtx* ctx);
 CYASSL_API
 int ecc_decrypt(ecc_key* privKey, ecc_key* pubKey, const byte* msg,
-                word32 msgSz, byte* out, word32* outSz, ecEncOptions* options);
+                word32 msgSz, byte* out, word32* outSz, ecEncCtx* ctx);
+
+#endif /* HAVE_ECC_ENCRYPT */
 
 #ifdef __cplusplus
     }    /* extern "C" */    
diff --git a/cyassl/ctaocrypt/error.h b/cyassl/ctaocrypt/error.h
index 7bb7960c3..af4d8e9c8 100644
--- a/cyassl/ctaocrypt/error.h
+++ b/cyassl/ctaocrypt/error.h
@@ -114,6 +114,14 @@ enum {
     ASN_CRL_NO_SIGNER_E = -190,  /* ASN CRL no signer to confirm failure */
     ASN_OCSP_CONFIRM_E  = -191,  /* ASN OCSP signature confirm failure */
 
+    BAD_ENC_STATE_E     = -192,  /* Bad ecc enc state operation */
+    BAD_PADDING_E       = -193,  /* Bad padding, msg not correct length  */
+
+    REQ_ATTRIBUTE_E     = -194,  /* setting cert request attributes error */
+
+    PKCS7_OID_E         = -195,  /* PKCS#7, mismatched OID error */
+    PKCS7_RECIP_E       = -196,  /* PKCS#7, recipient error */
+
     MIN_CODE_E         = -200   /* errors -101 - -199 */
 };
 
diff --git a/cyassl/ctaocrypt/include.am b/cyassl/ctaocrypt/include.am
index 8be43c5e1..5c38659ef 100644
--- a/cyassl/ctaocrypt/include.am
+++ b/cyassl/ctaocrypt/include.am
@@ -21,6 +21,7 @@ nobase_include_HEADERS+= \
                          cyassl/ctaocrypt/md4.h \
                          cyassl/ctaocrypt/md5.h \
                          cyassl/ctaocrypt/misc.h \
+                         cyassl/ctaocrypt/pkcs7.h \
                          cyassl/ctaocrypt/port.h \
                          cyassl/ctaocrypt/pwdbased.h \
                          cyassl/ctaocrypt/rabbit.h \
diff --git a/cyassl/ctaocrypt/integer.h b/cyassl/ctaocrypt/integer.h
index 2f7ab84fa..707eff7bf 100644
--- a/cyassl/ctaocrypt/integer.h
+++ b/cyassl/ctaocrypt/integer.h
@@ -286,6 +286,7 @@ int  mp_2expt (mp_int * a, int b);
 int  mp_reduce_2k_setup(mp_int *a, mp_digit *d);
 int  mp_add_d (mp_int* a, mp_digit b, mp_int* c);
 int mp_set_int (mp_int * a, unsigned long b);
+int mp_sub_d (mp_int * a, mp_digit b, mp_int * c);
 /* end support added functions */
 
 /* added */
@@ -305,10 +306,6 @@ int mp_init_multi(mp_int* a, mp_int* b, mp_int* c, mp_int* d, mp_int* e,
     int mp_lcm (mp_int * a, mp_int * b, mp_int * c);
 #endif
 
-#if defined(HAVE_ECC) || !defined(NO_PWDBASED) || defined(CYASSL_SNIFFER)
-    int mp_sub_d (mp_int * a, mp_digit b, mp_int * c);
-#endif
-
 #ifdef __cplusplus
    }
 #endif
diff --git a/cyassl/ctaocrypt/md5.h b/cyassl/ctaocrypt/md5.h
index 2ab16b1b9..b669998e3 100644
--- a/cyassl/ctaocrypt/md5.h
+++ b/cyassl/ctaocrypt/md5.h
@@ -42,22 +42,28 @@ enum {
     MD5_PAD_SIZE    = 56
 };
 
+#ifdef CYASSL_PIC32MZ_HASH
+#include "port/pic32/pic32mz-crypt.h"
+#endif
 
 /* MD5 digest */
 typedef struct Md5 {
     word32  buffLen;   /* in bytes          */
     word32  loLen;     /* length in bytes   */
     word32  hiLen;     /* length in bytes   */
-    word32  digest[MD5_DIGEST_SIZE / sizeof(word32)];
     word32  buffer[MD5_BLOCK_SIZE  / sizeof(word32)];
+    #ifndef CYASSL_PIC32MZ_HASH
+    word32  digest[MD5_DIGEST_SIZE / sizeof(word32)];
+    #else
+    word32  digest[PIC32_HASH_SIZE / sizeof(word32)];
+    pic32mz_desc desc ; /* Crypt Engine descripter */
+    #endif
 } Md5;
 
-
 CYASSL_API void InitMd5(Md5*);
 CYASSL_API void Md5Update(Md5*, const byte*, word32);
 CYASSL_API void Md5Final(Md5*, byte*);
 
-
 #ifdef __cplusplus
     } /* extern "C" */
 #endif
diff --git a/cyassl/ctaocrypt/pkcs7.h b/cyassl/ctaocrypt/pkcs7.h
new file mode 100644
index 000000000..b4313f399
--- /dev/null
+++ b/cyassl/ctaocrypt/pkcs7.h
@@ -0,0 +1,123 @@
+/* pkcs7.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful, 
+ * * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+#ifdef HAVE_PKCS7
+
+#ifndef CTAO_CRYPT_PKCS7_H
+#define CTAO_CRYPT_PKCS7_H
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef __cplusplus
+    extern "C" {
+#endif
+
+/* PKCS#7 content types, ref RFC 2315 (Section 14) */
+enum PKCS7_TYPES {
+    PKCS7_MSG                 = 650,   /* 1.2.840.113549.1.7   */
+    DATA                      = 651,   /* 1.2.840.113549.1.7.1 */
+    SIGNED_DATA               = 652,   /* 1.2.840.113549.1.7.2 */
+    ENVELOPED_DATA            = 653,   /* 1.2.840.113549.1.7.3 */
+    SIGNED_AND_ENVELOPED_DATA = 654,   /* 1.2.840.113549.1.7.4 */
+    DIGESTED_DATA             = 655,   /* 1.2.840.113549.1.7.5 */
+    ENCRYPTED_DATA            = 656    /* 1.2.840.113549.1.7.6 */
+};
+
+enum Pkcs7_Misc {
+    PKCS7_NONCE_SZ       = 16,
+    MAX_ENCRYPTED_KEY_SZ = 512,           /* max enc. key size, RSA <= 4096 */
+    MAX_CONTENT_KEY_LEN  = DES3_KEYLEN,   /* highest current cipher is 3DES */
+    MAX_RECIP_SZ         = MAX_VERSION_SZ +
+                           MAX_SEQ_SZ + ASN_NAME_MAX + MAX_SN_SZ +
+                           MAX_SEQ_SZ + MAX_ALGO_SZ + 1 + MAX_ENCRYPTED_KEY_SZ
+};
+
+
+typedef struct PKCS7Attrib {
+    byte* oid;
+    word32 oidSz;
+    byte* value;
+    word32 valueSz;
+} PKCS7Attrib;
+
+
+typedef struct PKCS7 {
+    byte* content;                /* inner content, not owner             */
+    word32 contentSz;             /* content size                         */
+    int contentOID;               /* PKCS#7 content type OID sum          */
+
+    RNG* rng;
+
+    int hashOID;
+    int encryptOID;               /* key encryption algorithm OID         */
+
+    byte*  singleCert;            /* recipient cert, DER, not owner       */
+    word32 singleCertSz;          /* size of recipient cert buffer, bytes */
+    byte issuerHash[SHA_SIZE];    /* hash of all alt Names                */
+    byte*  issuer;                /* issuer name of singleCert            */
+    word32 issuerSz;              /* length of issuer name                */
+    byte issuerSn[MAX_SN_SZ];     /* singleCert's serial number           */
+    word32 issuerSnSz;            /* length of serial number              */
+    byte publicKey[512];
+    word32 publicKeySz;
+    byte*  privateKey;            /* private key, DER, not owner          */
+    word32 privateKeySz;          /* size of private key buffer, bytes    */
+    
+    PKCS7Attrib* signedAttribs;
+    word32 signedAttribsSz;
+} PKCS7;
+
+
+CYASSL_LOCAL int SetContentType(int pkcs7TypeOID, byte* output);
+CYASSL_LOCAL int GetContentType(const byte* input, word32* inOutIdx,
+                                word32* oid, word32 maxIdx);
+CYASSL_LOCAL int CreateRecipientInfo(const byte* cert, word32 certSz,
+                                     int keyEncAlgo, int blockKeySz,
+                                     RNG* rng, byte* contentKeyPlain,
+                                     byte* contentKeyEnc,
+                                     int* keyEncSz, byte* out, word32 outSz);
+
+CYASSL_API int  PKCS7_InitWithCert(PKCS7* pkcs7, byte* cert, word32 certSz);
+CYASSL_API void PKCS7_Free(PKCS7* pkcs7);
+CYASSL_API int  PKCS7_EncodeData(PKCS7* pkcs7, byte* output, word32 outputSz);
+CYASSL_API int  PKCS7_EncodeSignedData(PKCS7* pkcs7,
+                                       byte* output, word32 outputSz);
+CYASSL_API int  PKCS7_VerifySignedData(PKCS7* pkcs7,
+                                       byte* pkiMsg, word32 pkiMsgSz);
+CYASSL_API int  PKCS7_EncodeEnvelopedData(PKCS7* pkcs7,
+                                          byte* output, word32 outputSz);
+CYASSL_API int  PKCS7_DecodeEnvelopedData(PKCS7* pkcs7, byte* pkiMsg,
+                                          word32 pkiMsgSz, byte* output,
+                                          word32 outputSz);
+
+#ifdef __cplusplus
+    } /* extern "C" */
+#endif
+
+#endif /* CTAO_CRYPT_PKCS7_H */
+
+#endif /* HAVE_PKCS7 */
+
diff --git a/cyassl/ctaocrypt/settings.h b/cyassl/ctaocrypt/settings.h
index d61c5484a..31a596df3 100644
--- a/cyassl/ctaocrypt/settings.h
+++ b/cyassl/ctaocrypt/settings.h
@@ -43,7 +43,7 @@
 /* #define MBED */
 
 /* Uncomment next line if using Microchip PIC32 ethernet starter kit */
-/* #define MICROCHIP_PIC32 */
+#define MICROCHIP_PIC32
 
 /* Uncomment next line if using Microchip TCP/IP stack, version 5 */
 /* #define MICROCHIP_TCPIP_V5 */
@@ -51,6 +51,9 @@
 /* Uncomment next line if using Microchip TCP/IP stack, version 6 or later */
 /* #define MICROCHIP_TCPIP */
 
+/* Uncomment next line if using PIC32MZ Crypto Engine */
+#define CYASSL_MICROCHIP_PIC32MZ
+        
 /* Uncomment next line if using FreeRTOS */
 /* #define FREERTOS */
 
@@ -78,6 +81,9 @@
 /* Uncomment next line if using Comverge settings */
 /* #define COMVERGE */
 
+/* Uncomment next line if using QL SEP settings */
+/* #define CYASSL_QL */
+
 
 #include 
 
@@ -112,6 +118,7 @@
 #endif
 
 #ifdef MICROCHIP_PIC32
+    /* #define CYASSL_MICROCHIP_PIC32MZ */
     #define SIZEOF_LONG_LONG 8
     #define SINGLE_THREADED
     #define CYASSL_USER_IO
@@ -122,6 +129,18 @@
     #define TFM_TIMING_RESISTANT
 #endif
 
+#ifdef CYASSL_MICROCHIP_PIC32MZ
+    #define CYASSL_PIC32MZ_CE
+    #define CYASSL_PIC32MZ_CRYPT
+    #define HAVE_AES_ENGINE
+    #define CYASSL_PIC32MZ_RNG
+    /* #define CYASSL_PIC32MZ_HASH */
+    #define CYASSL_AES_COUNTER
+    #define HAVE_AESGCM
+    #define NO_BIG_INT
+
+#endif
+
 #ifdef MICROCHIP_TCPIP_V5
     /* include timer functions */
     #include "TCPIP Stack/TCPIP.h"
@@ -149,10 +168,26 @@
 #endif /* MBED */
 
 #ifdef CYASSL_TYTO
+    #include "rand.h"
     #define FREERTOS
     #define NO_FILESYSTEM
     #define CYASSL_USER_IO
     #define NO_DEV_RANDOM
+    #define HAVE_ECC
+    #define HAVE_ECC_ENCRYPT
+    #define ECC_SHAMIR
+    #define HAVE_HKDF
+    #define USE_FAST_MATH
+    #define TFM_TIMING_RESISTANT
+    #define FP_MAX_BITS 512
+    #define NO_OLD_TLS
+    #define NO_MD4
+    #define NO_RABBIT
+    #define NO_HC128
+    #define NO_RSA
+    #define NO_DSA
+    #define NO_PWDBASED
+    #define NO_PSK
 #endif
 
 #ifdef FREERTOS_WINSIM
@@ -313,8 +348,8 @@
         #include "mutex.h"
     #endif
 
-    #define XMALLOC(s, h, type) (void *)_mem_alloc_system((s))
-    #define XFREE(p, h, type)   _mem_free(p)
+    #define XMALLOC(s, h, t)    (void *)_mem_alloc_system((s))
+    #define XFREE(p, h, t)      {void* xp = (p); if ((xp)) _mem_free((xp));}
     /* Note: MQX has no realloc, using fastmath above */
 #endif
 
@@ -524,6 +559,37 @@
 #endif /* MICRIUM */
 
 
+#ifdef CYASSL_QL
+    #ifndef CYASSL_SEP
+        #define CYASSL_SEP
+    #endif
+    #ifndef OPENSSL_EXTRA
+        #define OPENSSL_EXTRA
+    #endif
+    #ifndef SESSION_CERTS
+        #define SESSION_CERTS
+    #endif
+    #ifndef HAVE_AESCCM
+        #define HAVE_AESCCM
+    #endif
+    #ifndef ATOMIC_USER
+        #define ATOMIC_USER
+    #endif
+    #ifndef CYASSL_DER_LOAD
+        #define CYASSL_DER_LOAD
+    #endif
+    #ifndef KEEP_PEER_CERT
+        #define KEEP_PEER_CERT
+    #endif
+    #ifndef HAVE_ECC
+        #define HAVE_ECC
+    #endif
+    #ifndef SESSION_INDEX
+        #define SESSION_INDEX
+    #endif
+#endif /* CYASSL_QL */
+
+
 #if !defined(XMALLOC_USER) && !defined(MICRIUM_MALLOC) && \
     !defined(CYASSL_LEANPSK) && !defined(NO_CYASSL_MEMORY)
     #define USE_CYASSL_MEMORY
diff --git a/cyassl/ctaocrypt/sha.h b/cyassl/ctaocrypt/sha.h
index ce96f2781..4904f9b92 100644
--- a/cyassl/ctaocrypt/sha.h
+++ b/cyassl/ctaocrypt/sha.h
@@ -43,14 +43,22 @@ enum {
     SHA_PAD_SIZE     = 56
 };
 
+#ifdef CYASSL_PIC32MZ_HASH
+#include "port/pic32/pic32mz-crypt.h"
+#endif
 
 /* Sha digest */
 typedef struct Sha {
     word32  buffLen;   /* in bytes          */
     word32  loLen;     /* length in bytes   */
     word32  hiLen;     /* length in bytes   */
-    word32  digest[SHA_DIGEST_SIZE / sizeof(word32)];
     word32  buffer[SHA_BLOCK_SIZE  / sizeof(word32)];
+    #ifndef CYASSL_PIC32MZ_HASH
+    word32  digest[SHA_DIGEST_SIZE / sizeof(word32)];
+    #else
+    word32  digest[PIC32_HASH_SIZE / sizeof(word32)];
+    pic32mz_desc desc ; /* Crypt Engine descripter */
+    #endif
 } Sha;
 
 
diff --git a/cyassl/ctaocrypt/sha256.h b/cyassl/ctaocrypt/sha256.h
index 7c65e133c..7231cfafd 100644
--- a/cyassl/ctaocrypt/sha256.h
+++ b/cyassl/ctaocrypt/sha256.h
@@ -34,6 +34,10 @@
     extern "C" {
 #endif
 
+#ifdef CYASSL_PIC32MZ_HASH
+#include "port/pic32/pic32mz-crypt.h"
+#endif
+
 
 /* in bytes */
 enum {
@@ -51,6 +55,9 @@ typedef struct Sha256 {
     word32  hiLen;     /* length in bytes   */
     word32  digest[SHA256_DIGEST_SIZE / sizeof(word32)];
     word32  buffer[SHA256_BLOCK_SIZE  / sizeof(word32)];
+    #ifdef CYASSL_PIC32MZ_HASH
+        pic32mz_desc desc ; /* Crypt Engine descripter */
+    #endif
 } Sha256;
 
 
diff --git a/cyassl/ctaocrypt/tfm.h b/cyassl/ctaocrypt/tfm.h
index 2495f67ab..e1b16e2d3 100644
--- a/cyassl/ctaocrypt/tfm.h
+++ b/cyassl/ctaocrypt/tfm.h
@@ -510,104 +510,104 @@ void s_fp_add(fp_int *a, fp_int *b, fp_int *c);
 void s_fp_sub(fp_int *a, fp_int *b, fp_int *c);
 void fp_reverse(unsigned char *s, int len);
 
-void fp_mul_comba(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba(fp_int *a, fp_int *b, fp_int *c);
 
 #ifdef TFM_SMALL_SET
-void fp_mul_comba_small(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba_small(fp_int *a, fp_int *b, fp_int *c);
 #endif
 
 #ifdef TFM_MUL3
-void fp_mul_comba3(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba3(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL4
-void fp_mul_comba4(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba4(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL6
-void fp_mul_comba6(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba6(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL7
-void fp_mul_comba7(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba7(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL8
-void fp_mul_comba8(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba8(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL9
-void fp_mul_comba9(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba9(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL12
-void fp_mul_comba12(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba12(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL17
-void fp_mul_comba17(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba17(fp_int *a, fp_int *b, fp_int *c);
 #endif
 
 #ifdef TFM_MUL20
-void fp_mul_comba20(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba20(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL24
-void fp_mul_comba24(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba24(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL28
-void fp_mul_comba28(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba28(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL32
-void fp_mul_comba32(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba32(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL48
-void fp_mul_comba48(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba48(fp_int *a, fp_int *b, fp_int *c);
 #endif
 #ifdef TFM_MUL64
-void fp_mul_comba64(fp_int *A, fp_int *B, fp_int *C);
+void fp_mul_comba64(fp_int *a, fp_int *b, fp_int *c);
 #endif
 
-void fp_sqr_comba(fp_int *A, fp_int *B);
+void fp_sqr_comba(fp_int *a, fp_int *b);
 
 #ifdef TFM_SMALL_SET
-void fp_sqr_comba_small(fp_int *A, fp_int *B);
+void fp_sqr_comba_small(fp_int *a, fp_int *b);
 #endif
 
 #ifdef TFM_SQR3
-void fp_sqr_comba3(fp_int *A, fp_int *B);
+void fp_sqr_comba3(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR4
-void fp_sqr_comba4(fp_int *A, fp_int *B);
+void fp_sqr_comba4(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR6
-void fp_sqr_comba6(fp_int *A, fp_int *B);
+void fp_sqr_comba6(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR7
-void fp_sqr_comba7(fp_int *A, fp_int *B);
+void fp_sqr_comba7(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR8
-void fp_sqr_comba8(fp_int *A, fp_int *B);
+void fp_sqr_comba8(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR9
-void fp_sqr_comba9(fp_int *A, fp_int *B);
+void fp_sqr_comba9(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR12
-void fp_sqr_comba12(fp_int *A, fp_int *B);
+void fp_sqr_comba12(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR17
-void fp_sqr_comba17(fp_int *A, fp_int *B);
+void fp_sqr_comba17(fp_int *a, fp_int *b);
 #endif
 
 #ifdef TFM_SQR20
-void fp_sqr_comba20(fp_int *A, fp_int *B);
+void fp_sqr_comba20(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR24
-void fp_sqr_comba24(fp_int *A, fp_int *B);
+void fp_sqr_comba24(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR28
-void fp_sqr_comba28(fp_int *A, fp_int *B);
+void fp_sqr_comba28(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR32
-void fp_sqr_comba32(fp_int *A, fp_int *B);
+void fp_sqr_comba32(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR48
-void fp_sqr_comba48(fp_int *A, fp_int *B);
+void fp_sqr_comba48(fp_int *a, fp_int *b);
 #endif
 #ifdef TFM_SQR64
-void fp_sqr_comba64(fp_int *A, fp_int *B);
+void fp_sqr_comba64(fp_int *a, fp_int *b);
 #endif
 /*extern const char *fp_s_rmap;*/
 
@@ -642,7 +642,7 @@ int  mp_mul (mp_int * a, mp_int * b, mp_int * c);
 int  mp_mulmod (mp_int * a, mp_int * b, mp_int * c, mp_int * d);
 int  mp_mod(mp_int *a, mp_int *b, mp_int *c);
 int  mp_invmod(mp_int *a, mp_int *b, mp_int *c);
-int  mp_exptmod (mp_int * G, mp_int * X, mp_int * P, mp_int * Y);
+int  mp_exptmod (mp_int * g, mp_int * x, mp_int * p, mp_int * y);
 
 int  mp_cmp(mp_int *a, mp_int *b);
 int  mp_cmp_d(mp_int *a, mp_digit b);
@@ -663,7 +663,7 @@ void mp_rshb(mp_int *a, int x);
 #ifdef HAVE_ECC
     int mp_read_radix(mp_int* a, const char* str, int radix);
     int mp_set(fp_int *a, fp_digit b);
-    int mp_sqr(fp_int *A, fp_int *B);
+    int mp_sqr(fp_int *a, fp_int *b);
     int mp_montgomery_reduce(fp_int *a, fp_int *m, fp_digit mp);
     int mp_montgomery_setup(fp_int *a, fp_digit *rho);
     int mp_div_2(fp_int * a, fp_int * b);
diff --git a/cyassl/ctaocrypt/types.h b/cyassl/ctaocrypt/types.h
index 8c44bb89f..ea9cf8c11 100644
--- a/cyassl/ctaocrypt/types.h
+++ b/cyassl/ctaocrypt/types.h
@@ -139,6 +139,18 @@ enum {
 #endif
 
 
+/* set up thread local storage if available */
+#ifdef HAVE_THREAD_LS
+    #if defined(_MSC_VER)
+        #define THREAD_LS_T __declspec(thread)
+    #else
+        #define THREAD_LS_T __thread
+    #endif
+#else
+    #define THREAD_LS_T
+#endif
+
+
 /* Micrium will use Visual Studio for compilation but not the Win32 API */
 #if defined(_WIN32) && !defined(MICRIUM) && !defined(FREERTOS) \
         && !defined(EBSNET)
@@ -205,6 +217,11 @@ enum {
         #define XISALPHA(c)     isalpha((c))
     #endif
     /* needed by CyaSSL_check_domain_name() */
+    #ifdef __CYGWIN__
+        /* Cygwin uses a macro version of tolower() by default, use the
+         * function version. */
+        #undef tolower
+    #endif
     #define XTOLOWER(c)      tolower((c))
 #endif
 
@@ -253,7 +270,8 @@ enum {
     DYNAMIC_TYPE_CAVIUM_TMP   = 40,
     DYNAMIC_TYPE_CAVIUM_RSA   = 41,
     DYNAMIC_TYPE_X509         = 42,
-    DYNAMIC_TYPE_TLSX         = 43
+    DYNAMIC_TYPE_TLSX         = 43,
+    DYNAMIC_TYPE_OCSP         = 44
 };
 
 /* max error buffer string size */
diff --git a/cyassl/include.am b/cyassl/include.am
index 0cd892a37..9784ab249 100644
--- a/cyassl/include.am
+++ b/cyassl/include.am
@@ -9,7 +9,6 @@ EXTRA_DIST+= cyassl/sniffer_error.rc
 
 nobase_include_HEADERS+= \
                          cyassl/error.h \
-                         cyassl/internal.h \
                          cyassl/ssl.h \
                          cyassl/sniffer_error.h \
                          cyassl/sniffer.h \
@@ -20,3 +19,7 @@ nobase_include_HEADERS+= \
                          cyassl/options.h \
                          cyassl/ocsp.h \
                          cyassl/crl.h
+
+noinst_HEADERS+= \
+                         cyassl/internal.h
+
diff --git a/cyassl/internal.h b/cyassl/internal.h
index 32b8964bf..989947acd 100644
--- a/cyassl/internal.h
+++ b/cyassl/internal.h
@@ -483,7 +483,6 @@ enum {
     TLS_RSA_WITH_AES_256_CBC_B2B256   = 0xF9,
     TLS_RSA_WITH_HC_128_B2B256        = 0xFA,   /* eSTREAM too */
 
-
     /* CyaSSL extension - NTRU */
     TLS_NTRU_RSA_WITH_RC4_128_SHA      = 0xe5,
     TLS_NTRU_RSA_WITH_3DES_EDE_CBC_SHA = 0xe6,
@@ -533,8 +532,10 @@ enum {
     TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA    = 0x45,
     TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA    = 0x88,
     TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 = 0xbe,
-    TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 = 0xc4
+    TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 = 0xc4,
 
+    /* Renegotiation Indication Extension Special Suite */
+    TLS_EMPTY_RENEGOTIATION_INFO_SCSV        = 0xff
 };
 
 
@@ -608,6 +609,7 @@ enum Misc {
     CERT_HEADER_SZ        = 3,  /* always 3 bytes          */
     REQ_HEADER_SZ         = 2,  /* cert request header sz  */
     HINT_LEN_SZ           = 2,  /* length of hint size field */
+    TRUNCATED_HMAC_SZ     = 10, /* length of hmac w/ truncated hmac extension */
     HELLO_EXT_TYPE_SZ     = 2,  /* length of a hello extension type */
     HELLO_EXT_SZ          = 8,  /* total length of the lazy hello extensions */
     HELLO_EXT_LEN         = 6,  /* length of the lazy hello extensions */
@@ -981,24 +983,23 @@ typedef struct OCSP_Entry OCSP_Entry;
 #endif
 
 struct OCSP_Entry {
-    OCSP_Entry* next;                       /* next entry             */
+    OCSP_Entry* next;                        /* next entry             */
     byte    issuerHash[OCSP_DIGEST_SIZE];    /* issuer hash            */ 
     byte    issuerKeyHash[OCSP_DIGEST_SIZE]; /* issuer public key hash */
-    CertStatus* status;                     /* OCSP response list     */
-    int         totalStatus;                /* number on list         */
+    CertStatus* status;                      /* OCSP response list     */
+    int         totalStatus;                 /* number on list         */
 };
 
 
+#ifndef HAVE_OCSP
+    typedef struct CYASSL_OCSP CYASSL_OCSP;
+#endif
+
 /* CyaSSL OCSP controller */
 struct CYASSL_OCSP {
-    byte enabled;
-    byte useOverrideUrl;
-    byte useNonce;
-    char overrideUrl[80];
-    OCSP_Entry* ocspList;
-    void* IOCB_OcspCtx;
-    CallbackIOOcsp CBIOOcsp;
-    CallbackIOOcspRespFree CBIOOcspRespFree;
+    CYASSL_CERT_MANAGER* cm;            /* pointer back to cert manager */
+    OCSP_Entry*          ocspList;      /* OCSP response list */
+    CyaSSL_Mutex         ocspLock;      /* OCSP list lock */
 };
 
 #ifndef MAX_DATE_SIZE
@@ -1076,6 +1077,14 @@ struct CYASSL_CERT_MANAGER {
     byte            crlEnabled;         /* is CRL on ? */
     byte            crlCheckAll;        /* always leaf, but all ? */
     CbMissingCRL    cbMissingCRL;       /* notify through cb of missing crl */
+    CYASSL_OCSP*    ocsp;               /* OCSP checker */
+    byte            ocspEnabled;        /* is OCSP on ? */
+    byte            ocspSendNonce;      /* send the OCSP nonce ? */
+    byte            ocspUseOverrideURL; /* ignore cert's responder, override */
+    char*           ocspOverrideURL;    /* use this responder */
+    void*           ocspIOCtx;          /* I/O callback CTX */
+    CbOCSPIO        ocspIOCb;           /* I/O callback for OCSP lookup */
+    CbOCSPRespFree  ocspRespFreeCb;     /* Frees OCSP Response from IO Cb */
 };
 
 CYASSL_LOCAL int CM_SaveCertCache(CYASSL_CERT_MANAGER*, const char*);
@@ -1101,11 +1110,8 @@ typedef struct CYASSL_DTLS_CTX {
 typedef enum {
     SERVER_NAME_INDICATION =  0,
     MAX_FRAGMENT_LENGTH    =  1,
-  /*CLIENT_CERTIFICATE_URL =  2,
-    TRUSTED_CA_KEYS        =  3,*/
     TRUNCATED_HMAC         =  4,
-  /*STATUS_REQUEST         =  5,
-    SIGNATURE_ALGORITHMS   = 13,*/
+    ELLIPTIC_CURVES        = 10
 } TLSX_Type;
 
 typedef struct TLSX {
@@ -1153,6 +1159,8 @@ CYASSL_LOCAL void   TLSX_SNI_SetOptions(TLSX* extensions, byte type,
 CYASSL_LOCAL byte   TLSX_SNI_Status(TLSX* extensions, byte type);
 CYASSL_LOCAL word16 TLSX_SNI_GetRequest(TLSX* extensions, byte type,
                                                                    void** data);
+CYASSL_LOCAL int    TLSX_SNI_GetFromBuffer(const byte* buffer, word32 bufferSz,
+                                         byte type, byte* sni, word32* inOutSz);
 #endif
 
 #endif /* HAVE_SNI */
@@ -1166,12 +1174,27 @@ CYASSL_LOCAL int TLSX_UseMaxFragment(TLSX** extensions, byte mfl);
 
 #ifdef HAVE_TRUNCATED_HMAC
 
-#define TRUNCATED_HMAC_SIZE 10
-
 CYASSL_LOCAL int TLSX_UseTruncatedHMAC(TLSX** extensions);
 
 #endif /* HAVE_TRUNCATED_HMAC */
 
+#ifdef HAVE_SUPPORTED_CURVES
+
+typedef struct EllipticCurve {
+    word16                name; /* CurveNames    */
+    struct EllipticCurve* next; /* List Behavior */
+
+} EllipticCurve;
+
+CYASSL_LOCAL int TLSX_UseSupportedCurve(TLSX** extensions, word16 name);
+
+#ifndef NO_CYASSL_SERVER
+CYASSL_LOCAL int TLSX_ValidateEllipticCurves(CYASSL* ssl, byte first,
+                                                                   byte second);
+#endif
+
+#endif /* HAVE_SUPPORTED_CURVES */
+
 #endif /* HAVE_TLS_EXTENSIONS */
 
 /* CyaSSL context type */
@@ -1213,6 +1236,7 @@ struct CYASSL_CTX {
     word32          timeout;            /* session timeout */
 #ifdef HAVE_ECC
     word16          eccTempKeySz;       /* in octets 20 - 66 */
+    word32          pkCurveOID;         /* curve Ecc_Sum */
 #endif
 #ifndef NO_PSK
     byte        havePSK;                /* psk key set by user */
@@ -1360,6 +1384,30 @@ enum ClientCertificateType {
 enum CipherType { stream, block, aead };
 
 
+#ifdef CYASSL_DTLS
+
+    #ifdef WORD64_AVAILABLE
+        typedef word64 DtlsSeq;
+    #else
+        typedef word32 DtlsSeq;
+    #endif
+    #define DTLS_SEQ_BITS (sizeof(DtlsSeq) * CHAR_BIT)
+
+    typedef struct DtlsState {
+        DtlsSeq window;     /* Sliding window for current epoch    */
+        word16 nextEpoch;   /* Expected epoch in next record       */
+        word32 nextSeq;     /* Expected sequence in next record    */
+
+        word16 curEpoch;    /* Received epoch in current record    */
+        word32 curSeq;      /* Received sequence in current record */
+
+        DtlsSeq prevWindow; /* Sliding window for old epoch        */
+        word32 prevSeq;     /* Next sequence in allowed old epoch  */
+    } DtlsState;
+
+#endif /* CYASSL_DTLS */
+
+
 /* keys and secrets */
 typedef struct Keys {
     byte client_write_MAC_secret[MAX_DIGEST_SIZE];   /* max sizes */
@@ -1378,15 +1426,13 @@ typedef struct Keys {
     word32 sequence_number;
     
 #ifdef CYASSL_DTLS
-    word32 dtls_sequence_number;
-    word32 dtls_peer_sequence_number;
-    word32 dtls_expected_peer_sequence_number;
-    word16 dtls_handshake_number;
+    DtlsState dtls_state;                       /* Peer's state */
     word16 dtls_peer_handshake_number;
     word16 dtls_expected_peer_handshake_number;
-    word16 dtls_epoch;
-    word16 dtls_peer_epoch;
-    word16 dtls_expected_peer_epoch;
+
+    word16 dtls_epoch;                          /* Current tx epoch    */
+    word32 dtls_sequence_number;                /* Current tx sequence */
+    word16 dtls_handshake_number;               /* Current tx handshake seq */
 #endif
 
     word32 encryptSz;             /* last size of encrypted data   */
@@ -1661,6 +1707,10 @@ struct CYASSL_X509 {
     byte             hwType[EXTERNAL_SERIAL_SIZE];
     int              hwSerialNumSz;
     byte             hwSerialNum[EXTERNAL_SERIAL_SIZE];
+    #ifdef OPENSSL_EXTRA
+        byte             certPolicySet;
+        byte             certPolicyCrit;
+    #endif /* OPENSSL_EXTRA */
 #endif
     int              notBeforeSz;
     byte             notBefore[MAX_DATE_SZ];
@@ -1670,10 +1720,33 @@ struct CYASSL_X509 {
     buffer           sig;
     int              pubKeyOID;
     buffer           pubKey;
+    #ifdef HAVE_ECC
+        word32       pkCurveOID;
+    #endif /* HAVE_ECC */
     buffer           derCert;                        /* may need  */
     DNS_entry*       altNames;                       /* alt names list */
     DNS_entry*       altNamesNext;                   /* hint for retrieval */
     byte             dynamicMemory;                  /* dynamic memory flag */
+    byte             isCa;
+#ifdef OPENSSL_EXTRA
+    word32           pathLength;
+    word16           keyUsage;
+    byte             basicConstSet;
+    byte             basicConstCrit;
+    byte             basicConstPlSet;
+    byte             subjAltNameSet;
+    byte             subjAltNameCrit;
+    byte             authKeyIdSet;
+    byte             authKeyIdCrit;
+    byte*            authKeyId;
+    word32           authKeyIdSz;
+    byte             subjKeyIdSet;
+    byte             subjKeyIdCrit;
+    byte*            subjKeyId;
+    word32           subjKeyIdSz;
+    byte             keyUsageSet;
+    byte             keyUsageCrit;
+#endif /* OPENSSL_EXTRA */
 };
 
 
@@ -1783,6 +1856,7 @@ struct CYASSL {
     ecc_key*        eccTempKey;              /* private ECDHE key */
     ecc_key*        eccDsaKey;               /* private ECDSA key */
     word16          eccTempKeySz;            /* in octets 20 - 66 */
+    word32          pkCurveOID;              /* curve Ecc_Sum     */
     byte            peerEccKeyPresent;
     byte            peerEccDsaKeyPresent;
     byte            eccTempKeyPresent;
diff --git a/cyassl/ocsp.h b/cyassl/ocsp.h
index f47f671b1..f6931bd98 100644
--- a/cyassl/ocsp.h
+++ b/cyassl/ocsp.h
@@ -36,12 +36,10 @@
 
 typedef struct CYASSL_OCSP CYASSL_OCSP;
 
-CYASSL_LOCAL int  CyaSSL_OCSP_Init(CYASSL_OCSP*);
-CYASSL_LOCAL void CyaSSL_OCSP_Cleanup(CYASSL_OCSP*);
-
-CYASSL_LOCAL int  CyaSSL_OCSP_set_override_url(CYASSL_OCSP*, const char*);
-CYASSL_LOCAL int  CyaSSL_OCSP_Lookup_Cert(CYASSL_OCSP*, DecodedCert*);
+CYASSL_LOCAL int  InitOCSP(CYASSL_OCSP*, CYASSL_CERT_MANAGER*);
+CYASSL_LOCAL void FreeOCSP(CYASSL_OCSP*, int dynamic);
 
+CYASSL_LOCAL int  CheckCertOCSP(CYASSL_OCSP*, DecodedCert*);
 
 #ifdef __cplusplus
     }  /* extern "C" */
diff --git a/cyassl/ssl.h b/cyassl/ssl.h
index bd5f25c38..9013e5345 100644
--- a/cyassl/ssl.h
+++ b/cyassl/ssl.h
@@ -99,6 +99,9 @@ typedef struct CYASSL_EVP_PKEY {
     union {
         char* ptr;
     } pkey;
+    #ifdef HAVE_ECC
+        int pkey_curve;
+    #endif
 } CYASSL_EVP_PKEY;
 
 typedef struct CYASSL_MD4_CTX {
@@ -413,6 +416,16 @@ CYASSL_API int   CyaSSL_X509_STORE_CTX_get_error_depth(CYASSL_X509_STORE_CTX*);
 CYASSL_API char*       CyaSSL_X509_NAME_oneline(CYASSL_X509_NAME*, char*, int);
 CYASSL_API CYASSL_X509_NAME*  CyaSSL_X509_get_issuer_name(CYASSL_X509*);
 CYASSL_API CYASSL_X509_NAME*  CyaSSL_X509_get_subject_name(CYASSL_X509*);
+CYASSL_API int  CyaSSL_X509_ext_isSet_by_NID(CYASSL_X509*, int);
+CYASSL_API int  CyaSSL_X509_ext_get_critical_by_NID(CYASSL_X509*, int);
+CYASSL_API int  CyaSSL_X509_get_isCA(CYASSL_X509*);
+CYASSL_API int  CyaSSL_X509_get_isSet_pathLength(CYASSL_X509*);
+CYASSL_API unsigned int CyaSSL_X509_get_pathLength(CYASSL_X509*);
+CYASSL_API unsigned int CyaSSL_X509_get_keyUsage(CYASSL_X509*);
+CYASSL_API unsigned char* CyaSSL_X509_get_authorityKeyID(
+                                            CYASSL_X509*, unsigned char*, int*);
+CYASSL_API unsigned char* CyaSSL_X509_get_subjectKeyID(
+                                            CYASSL_X509*, unsigned char*, int*);
 CYASSL_API int CyaSSL_X509_NAME_entry_count(CYASSL_X509_NAME*);
 CYASSL_API int CyaSSL_X509_NAME_get_text_by_NID(
                                             CYASSL_X509_NAME*, int, char*, int);
@@ -530,6 +543,9 @@ enum {
     OCSP_RESPONSE = 8,
     OCSP_BASICRESP = 16,
 
+    CYASSL_OCSP_URL_OVERRIDE = 1,
+    CYASSL_OCSP_NO_NONCE     = 2,
+
     CYASSL_CRL_CHECKALL = 1,
 
     ASN1_GENERALIZEDTIME = 4,
@@ -810,9 +826,9 @@ CYASSL_API CYASSL_X509*
 #ifndef NO_FILESYSTEM
 CYASSL_API CYASSL_X509*
     CyaSSL_X509_d2i_fp(CYASSL_X509** x509, FILE* file);
-#endif
 CYASSL_API CYASSL_X509*
     CyaSSL_X509_load_certificate_file(const char* fname, int format);
+#endif
 
 #ifdef CYASSL_SEP
     CYASSL_API unsigned char*
@@ -930,15 +946,6 @@ CYASSL_API void  CyaSSL_CTX_SetGenCookie(CYASSL_CTX*, CallbackGenCookie);
 CYASSL_API void  CyaSSL_SetCookieCtx(CYASSL* ssl, void *ctx);
 CYASSL_API void* CyaSSL_GetCookieCtx(CYASSL* ssl);
 
-typedef int (*CallbackIOOcsp)(void*, const char*, int,
-                                         unsigned char*, int, unsigned char**);
-typedef void (*CallbackIOOcspRespFree)(void*,unsigned char*); 
-#ifdef HAVE_OCSP 
-CYASSL_API void CyaSSL_SetIOOcsp(CYASSL_CTX *ocsp, CallbackIOOcsp cb);
-CYASSL_API void CyaSSL_SetIOOcspRespFree(CYASSL_CTX *ocsp,
-                                                    CallbackIOOcspRespFree cb);
-CYASSL_API void CyaSSL_SetIOOcspCtx(CYASSL_CTX *ocsp, void *octx);
-#endif
 
 /* I/O Callback default errors */
 enum IOerrors {
@@ -966,9 +973,14 @@ CYASSL_API int CyaSSL_GetObjectSize(void);  /* object size based on build */
 CYASSL_API int CyaSSL_SetVersion(CYASSL* ssl, int version);
 CYASSL_API int CyaSSL_KeyPemToDer(const unsigned char*, int sz, unsigned char*,
                                   int, const char*);
+CYASSL_API int CyaSSL_CertPemToDer(const unsigned char*, int sz, unsigned char*,
+                                   int, int);
 
 typedef void (*CallbackCACache)(unsigned char* der, int sz, int type);
 typedef void (*CbMissingCRL)(const char* url);
+typedef int  (*CbOCSPIO)(void*, const char*, int,
+                                         unsigned char*, int, unsigned char**);
+typedef void (*CbOCSPRespFree)(void*,unsigned char*);
 
 /* User Atomic Record Layer CallBacks */
 typedef int (*CallbackMacEncrypt)(CYASSL* ssl, unsigned char* macOut, 
@@ -994,6 +1006,7 @@ CYASSL_API const unsigned char* CyaSSL_GetClientWriteIV(CYASSL*);
 CYASSL_API const unsigned char* CyaSSL_GetServerWriteKey(CYASSL*);
 CYASSL_API const unsigned char* CyaSSL_GetServerWriteIV(CYASSL*);
 CYASSL_API int                  CyaSSL_GetKeySize(CYASSL*);
+CYASSL_API int                  CyaSSL_GetIVSize(CYASSL*);
 CYASSL_API int                  CyaSSL_GetSide(CYASSL*);
 CYASSL_API int                  CyaSSL_IsTLSv1_1(CYASSL*);
 CYASSL_API int                  CyaSSL_GetBulkCipher(CYASSL*);
@@ -1113,16 +1126,34 @@ CYASSL_API void* CyaSSL_GetRsaDecCtx(CYASSL* ssl);
                                                                       int, int);
     CYASSL_API int CyaSSL_CertManagerSetCRL_Cb(CYASSL_CERT_MANAGER*,
                                                                   CbMissingCRL);
+    CYASSL_API int CyaSSL_CertManagerCheckOCSP(CYASSL_CERT_MANAGER*,
+                                                        unsigned char*, int sz);
+    CYASSL_API int CyaSSL_CertManagerEnableOCSP(CYASSL_CERT_MANAGER*,
+                                                                   int options);
+    CYASSL_API int CyaSSL_CertManagerDisableOCSP(CYASSL_CERT_MANAGER*);
+    CYASSL_API int CyaSSL_CertManagerSetOCSPOverrideURL(CYASSL_CERT_MANAGER*,
+                                                                   const char*);
+    CYASSL_API int CyaSSL_CertManagerSetOCSP_Cb(CYASSL_CERT_MANAGER*,
+                                               CbOCSPIO, CbOCSPRespFree, void*);
 
     CYASSL_API int CyaSSL_EnableCRL(CYASSL* ssl, int options);
     CYASSL_API int CyaSSL_DisableCRL(CYASSL* ssl);
     CYASSL_API int CyaSSL_LoadCRL(CYASSL*, const char*, int, int);
     CYASSL_API int CyaSSL_SetCRL_Cb(CYASSL*, CbMissingCRL);
+    CYASSL_API int CyaSSL_EnableOCSP(CYASSL*, int options);
+    CYASSL_API int CyaSSL_DisableOCSP(CYASSL*);
+    CYASSL_API int CyaSSL_SetOCSP_OverrideURL(CYASSL*, const char*);
+    CYASSL_API int CyaSSL_SetOCSP_Cb(CYASSL*, CbOCSPIO, CbOCSPRespFree, void*);
 
     CYASSL_API int CyaSSL_CTX_EnableCRL(CYASSL_CTX* ctx, int options);
     CYASSL_API int CyaSSL_CTX_DisableCRL(CYASSL_CTX* ctx);
     CYASSL_API int CyaSSL_CTX_LoadCRL(CYASSL_CTX*, const char*, int, int);
     CYASSL_API int CyaSSL_CTX_SetCRL_Cb(CYASSL_CTX*, CbMissingCRL);
+    CYASSL_API int CyaSSL_CTX_EnableOCSP(CYASSL_CTX*, int options);
+    CYASSL_API int CyaSSL_CTX_DisableOCSP(CYASSL_CTX*);
+    CYASSL_API int CyaSSL_CTX_SetOCSP_OverrideURL(CYASSL_CTX*, const char*);
+    CYASSL_API int CyaSSL_CTX_SetOCSP_Cb(CYASSL_CTX*,
+                                               CbOCSPIO, CbOCSPRespFree, void*);
 #endif /* !NO_CERTS */
 
 /* end of handshake frees temporary arrays, if user needs for get_keys or
@@ -1174,6 +1205,10 @@ CYASSL_API unsigned char CyaSSL_SNI_Status(CYASSL* ssl, unsigned char type);
 CYASSL_API unsigned short CyaSSL_SNI_GetRequest(CYASSL *ssl, unsigned char type,
                                                                    void** data);
 
+CYASSL_API int CyaSSL_SNI_GetFromBuffer(
+                 const unsigned char* clientHello, unsigned int helloSz,
+                 unsigned char type, unsigned char* sni, unsigned int* inOutSz);
+
 #endif /* NO_CYASSL_SERVER */
 #endif /* HAVE_SNI */
 
@@ -1196,6 +1231,7 @@ CYASSL_API int CyaSSL_CTX_UseMaxFragment(CYASSL_CTX* ctx, unsigned char mfl);
 #endif /* NO_CYASSL_CLIENT */
 #endif /* HAVE_MAX_FRAGMENT */
 
+/* Truncated HMAC */
 #ifdef HAVE_TRUNCATED_HMAC
 #ifndef NO_CYASSL_CLIENT
 
@@ -1205,6 +1241,27 @@ CYASSL_API int CyaSSL_CTX_UseTruncatedHMAC(CYASSL_CTX* ctx);
 #endif /* NO_CYASSL_CLIENT */
 #endif /* HAVE_TRUNCATED_HMAC */
 
+/* Elliptic Curves */
+#ifdef HAVE_SUPPORTED_CURVES
+
+enum {
+    CYASSL_ECC_SECP160R1 = 0x10,
+    CYASSL_ECC_SECP192R1 = 0x13,
+    CYASSL_ECC_SECP224R1 = 0x15,
+    CYASSL_ECC_SECP256R1 = 0x17,
+    CYASSL_ECC_SECP384R1 = 0x18,
+    CYASSL_ECC_SECP521R1 = 0x19
+};
+
+#ifndef NO_CYASSL_CLIENT
+
+CYASSL_API int CyaSSL_UseSupportedCurve(CYASSL* ssl, unsigned short name);
+CYASSL_API int CyaSSL_CTX_UseSupportedCurve(CYASSL_CTX* ctx,
+                                                          unsigned short name);
+
+#endif /* NO_CYASSL_CLIENT */
+#endif /* HAVE_SUPPORTED_CURVES */
+
 
 #define CYASSL_CRL_MONITOR   0x01   /* monitor this dir flag */
 #define CYASSL_CRL_START_MON 0x02   /* start monitoring flag */
@@ -1227,14 +1284,9 @@ CYASSL_API int CyaSSL_accept_ex(CYASSL*, HandShakeCallBack, TimeoutCallBack,
 #endif /* CYASSL_CALLBACKS */
 
 
-CYASSL_API int  CyaSSL_CTX_OCSP_set_options(CYASSL_CTX*, int);
-CYASSL_API int  CyaSSL_CTX_OCSP_set_override_url(CYASSL_CTX*, const char*);
-
-/* OCSP Options */
-#define CYASSL_OCSP_ENABLE       0x0001 /* Enable OCSP lookups */
-#define CYASSL_OCSP_URL_OVERRIDE 0x0002 /* Use the override URL instead of URL
-                                         * in certificate */
-#define CYASSL_OCSP_NO_NONCE     0x0004 /* Disables the request nonce. */
+#ifdef CYASSL_HAVE_WOLFSCEP
+CYASSL_API void CyaSSL_wolfSCEP(void);
+#endif /* CYASSL_HAVE_WOLFSCEP */
 
 
 #ifdef __cplusplus
diff --git a/cyassl/version.h b/cyassl/version.h
index e66d54a0d..30bf70457 100644
--- a/cyassl/version.h
+++ b/cyassl/version.h
@@ -26,8 +26,8 @@
 extern "C" {
 #endif
 
-#define LIBCYASSL_VERSION_STRING "2.8.3"
-#define LIBCYASSL_VERSION_HEX 0x02008003
+#define LIBCYASSL_VERSION_STRING "2.9.0"
+#define LIBCYASSL_VERSION_HEX 0x02009000
 
 #ifdef __cplusplus
 }
diff --git a/examples/client/client.c b/examples/client/client.c
index 6c82d627c..ac6f935a8 100644
--- a/examples/client/client.c
+++ b/examples/client/client.c
@@ -505,10 +505,13 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
 
 #ifdef HAVE_OCSP
     if (useOcsp) {
-        CyaSSL_CTX_OCSP_set_options(ctx,
-                                    CYASSL_OCSP_ENABLE | CYASSL_OCSP_NO_NONCE);
-        if (ocspUrl != NULL)
-            CyaSSL_CTX_OCSP_set_override_url(ctx, ocspUrl);
+        if (ocspUrl != NULL) {
+            CyaSSL_CTX_SetOCSP_OverrideURL(ctx, ocspUrl);
+            CyaSSL_CTX_EnableOCSP(ctx, CYASSL_OCSP_NO_NONCE
+                                                    | CYASSL_OCSP_URL_OVERRIDE);
+        }
+        else
+            CyaSSL_CTX_EnableOCSP(ctx, CYASSL_OCSP_NO_NONCE);
     }
 #endif
 
@@ -547,17 +550,18 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
 
 #ifdef HAVE_SNI
     if (sniHostName)
-        if (CyaSSL_CTX_UseSNI(ctx, 0, sniHostName, XSTRLEN(sniHostName)))
+        if (CyaSSL_CTX_UseSNI(ctx, 0, sniHostName, XSTRLEN(sniHostName))
+                                                                 != SSL_SUCCESS)
             err_sys("UseSNI failed");
 #endif
 #ifdef HAVE_MAX_FRAGMENT
     if (maxFragment)
-        if (CyaSSL_CTX_UseMaxFragment(ctx, maxFragment))
+        if (CyaSSL_CTX_UseMaxFragment(ctx, maxFragment) != SSL_SUCCESS)
             err_sys("UseMaxFragment failed");
 #endif
 #ifdef HAVE_TRUNCATED_HMAC
     if (truncatedHMAC)
-        if (CyaSSL_CTX_UseTruncatedHMAC(ctx))
+        if (CyaSSL_CTX_UseTruncatedHMAC(ctx) != SSL_SUCCESS)
             err_sys("UseTruncatedHMAC failed");
 #endif
 
@@ -803,8 +807,10 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
 #if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL) && !defined(STACK_TRAP)
         CyaSSL_Debugging_ON();
 #endif
-        if (CurrentDir("client") || CurrentDir("build"))
+        if (CurrentDir("client"))
             ChangeDirBack(2);
+        else if (CurrentDir("Debug") || CurrentDir("Release"))
+            ChangeDirBack(3);
   
 #ifdef HAVE_STACK_SIZE
         StackSizeCheck(&args, client_test);
diff --git a/examples/echoclient/echoclient.c b/examples/echoclient/echoclient.c
index 0c444a2a2..ee654d481 100644
--- a/examples/echoclient/echoclient.c
+++ b/examples/echoclient/echoclient.c
@@ -255,8 +255,10 @@ void echoclient_test(void* args)
         CyaSSL_Debugging_ON();
 #endif
 
-        if (CurrentDir("echoclient") || CurrentDir("build"))
+        if (CurrentDir("echoclient"))
             ChangeDirBack(2);
+        else if (CurrentDir("Debug") || CurrentDir("Release"))
+            ChangeDirBack(3);
         echoclient_test(&args);
 
         CyaSSL_Cleanup();
diff --git a/examples/echoserver/echoserver.c b/examples/echoserver/echoserver.c
index cc4ed7200..1eac9b5a9 100644
--- a/examples/echoserver/echoserver.c
+++ b/examples/echoserver/echoserver.c
@@ -339,8 +339,10 @@ THREAD_RETURN CYASSL_THREAD echoserver_test(void* args)
 #if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL)
         CyaSSL_Debugging_ON();
 #endif
-        if (CurrentDir("echoserver") || CurrentDir("build"))
+        if (CurrentDir("echoserver"))
             ChangeDirBack(2);
+        else if (CurrentDir("Debug") || CurrentDir("Release"))
+            ChangeDirBack(3);
         echoserver_test(&args);
         CyaSSL_Cleanup();
 
diff --git a/examples/server/server.c b/examples/server/server.c
index 9be9c4802..f99be0aa2 100644
--- a/examples/server/server.c
+++ b/examples/server/server.c
@@ -374,6 +374,10 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
     if (fewerPackets)
         CyaSSL_CTX_set_group_messages(ctx);
 
+#ifdef OPENSSL_EXTRA
+    SSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack);
+#endif
+
 #if !defined(NO_FILESYSTEM) && !defined(NO_CERTS)
     if (!usePsk) {
         if (SSL_CTX_use_certificate_file(ctx, ourCert, SSL_FILETYPE_PEM)
@@ -428,10 +432,6 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
     }
 #endif
 
-#ifdef OPENSSL_EXTRA
-    SSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack);
-#endif
-
 #if defined(CYASSL_SNIFFER) && !defined(HAVE_NTRU) && !defined(HAVE_ECC)
     /* don't use EDH, can't sniff tmp keys */
     if (cipherList == NULL) {
@@ -443,7 +443,7 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
 #ifdef HAVE_SNI
     if (sniHostName)
         if (CyaSSL_CTX_UseSNI(ctx, CYASSL_SNI_HOST_NAME, sniHostName,
-                                                          XSTRLEN(sniHostName)))
+                                           XSTRLEN(sniHostName)) != SSL_SUCCESS)
             err_sys("UseSNI failed");
 #endif
 
@@ -459,10 +459,13 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
 #endif
 #ifdef HAVE_OCSP
     if (useOcsp) {
-        CyaSSL_CTX_OCSP_set_options(ctx,
-                                    CYASSL_OCSP_ENABLE | CYASSL_OCSP_NO_NONCE);
-        if (ocspUrl != NULL)
-            CyaSSL_CTX_OCSP_set_override_url(ctx, ocspUrl);
+        if (ocspUrl != NULL) {
+            CyaSSL_CTX_SetOCSP_OverrideURL(ctx, ocspUrl);
+            CyaSSL_CTX_EnableOCSP(ctx, CYASSL_OCSP_NO_NONCE
+                                                    | CYASSL_OCSP_URL_OVERRIDE);
+        }
+        else
+            CyaSSL_CTX_EnableOCSP(ctx, CYASSL_OCSP_NO_NONCE);
     }
 #endif
 #ifdef HAVE_PK_CALLBACKS
@@ -556,8 +559,10 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
 #if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL)
         CyaSSL_Debugging_ON();
 #endif
-        if (CurrentDir("server") || CurrentDir("build"))
+        if (CurrentDir("server"))
             ChangeDirBack(2);
+        else if (CurrentDir("Debug") || CurrentDir("Release"))
+            ChangeDirBack(3);
    
 #ifdef HAVE_STACK_SIZE
         StackSizeCheck(&args, server_test);
diff --git a/m4/ax_debug.m4 b/m4/ax_debug.m4
index 5522d7215..5ea3c3594 100644
--- a/m4/ax_debug.m4
+++ b/m4/ax_debug.m4
@@ -52,7 +52,6 @@ AC_DEFUN([AX_DEBUG],
         [Add debug code/turns off optimizations (yes|no) @<:@default=no@:>@])],
       [ax_enable_debug=yes
       AC_DEFINE([DEBUG],[1],[Define to 1 to enable debugging code.])
-      AX_CHECK_LIBRARY([MCHECK],[mcheck.h],[mcheck],[AX_APPEND_LINK_FLAGS([-lmcheck])])
       AX_ADD_AM_MACRO([--debug],[AM_YFLAGS])
       AX_ADD_AM_MACRO([-D_GLIBCXX_DEBUG],[AM_CPPFLAGS])],
       [ax_enable_debug=no
diff --git a/m4/ax_tls.m4 b/m4/ax_tls.m4
new file mode 100644
index 000000000..033e3b135
--- /dev/null
+++ b/m4/ax_tls.m4
@@ -0,0 +1,76 @@
+# ===========================================================================
+#          http://www.gnu.org/software/autoconf-archive/ax_tls.html
+# ===========================================================================
+#
+# SYNOPSIS
+#
+#   AX_TLS([action-if-found], [action-if-not-found])
+#
+# DESCRIPTION
+#
+#   Provides a test for the compiler support of thread local storage (TLS)
+#   extensions. Defines TLS if it is found. Currently knows about GCC/ICC
+#   and MSVC. I think SunPro uses the same as GCC, and Borland apparently
+#   supports either.
+#
+# LICENSE
+#
+#   Copyright (c) 2008 Alan Woodland 
+#   Copyright (c) 2010 Diego Elio Petteno` 
+#
+#   This program is free software: you can redistribute it and/or modify it
+#   under the terms of the GNU General Public License as published by the
+#   Free Software Foundation, either version 3 of the License, or (at your
+#   option) any later version.
+#
+#   This program is distributed in the hope that it will be useful, but
+#   WITHOUT ANY WARRANTY; without even the implied warranty of
+#   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
+#   Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License along
+#   with this program. If not, see .
+#
+#   As a special exception, the respective Autoconf Macro's copyright owner
+#   gives unlimited permission to copy, distribute and modify the configure
+#   scripts that are the output of Autoconf when processing the Macro. You
+#   need not follow the terms of the GNU General Public License when using
+#   or distributing such scripts, even though portions of the text of the
+#   Macro appear in them. The GNU General Public License (GPL) does govern
+#   all other use of the material that constitutes the Autoconf Macro.
+#
+#   This special exception to the GPL applies to versions of the Autoconf
+#   Macro released by the Autoconf Archive. When you make and distribute a
+#   modified version of the Autoconf Macro, you may extend this special
+#   exception to the GPL to apply to your modified version as well.
+
+#serial 10
+
+AC_DEFUN([AX_TLS], [
+  AC_MSG_CHECKING(for thread local storage (TLS) class)
+  AC_CACHE_VAL(ac_cv_tls, [
+    ax_tls_keywords="__thread __declspec(thread) none"
+    for ax_tls_keyword in $ax_tls_keywords; do
+       AS_CASE([$ax_tls_keyword],
+          [none], [ac_cv_tls=none ; break],
+          [AC_TRY_COMPILE(
+              [#include 
+               static void
+               foo(void) {
+               static ] $ax_tls_keyword [ int bar;
+               exit(1);
+               }],
+               [],
+               [ac_cv_tls=$ax_tls_keyword ; break],
+               ac_cv_tls=none
+           )])
+    done
+  ])
+  AC_MSG_RESULT($ac_cv_tls)
+
+  AS_IF([test "$ac_cv_tls" != "none"],
+    AC_DEFINE_UNQUOTED([TLS], $ac_cv_tls, [If the compiler supports a TLS storage class define it to that here])
+      m4_ifnblank([$1], [$1]),
+    m4_ifnblank([$2], [$2])
+  )
+])
diff --git a/mcapi/ctaocrypt_mcapi.X/nbproject/configurations.xml b/mcapi/ctaocrypt_mcapi.X/nbproject/configurations.xml
index 54eef5bf8..e9792ab63 100644
--- a/mcapi/ctaocrypt_mcapi.X/nbproject/configurations.xml
+++ b/mcapi/ctaocrypt_mcapi.X/nbproject/configurations.xml
@@ -167,28 +167,6 @@
         
         
       
-      
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
       
         
       
diff --git a/mcapi/ctaocrypt_test.X/main.c b/mcapi/ctaocrypt_test.X/main.c
deleted file mode 100644
index c39a3c9e9..000000000
--- a/mcapi/ctaocrypt_test.X/main.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/* main.c
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.  All rights reserved.
- *
- * This file is part of CyaSSL.
- *
- * Contact licensing@yassl.com with any questions or comments.
- *
- * http://www.yassl.com
- */
-
-
-#define PIC32_STARTER_KIT
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-/* func_args from test.h, so don't have to pull in other junk */
-typedef struct func_args {
-    int    argc;
-    char** argv;
-    int    return_code;
-} func_args;
-
-/*
- * Main driver for CTaoCrypt tests.
- */
-int main(int argc, char** argv) {
-
-    SYSTEMConfigPerformance(80000000);
-
-    DBINIT();
-    printf("CTaoCrypt Test:\n");
-
-    func_args args;
-
-    args.argc = argc;
-    args.argv = argv;
-
-    ctaocrypt_test(&args);
-
-    if (args.return_code == 0) {
-        printf("All tests passed!\n");
-    }
-    
-    return 0;
-}
-
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-default.mk b/mcapi/ctaocrypt_test.X/nbproject/Makefile-default.mk
new file mode 100644
index 000000000..736bc3eec
--- /dev/null
+++ b/mcapi/ctaocrypt_test.X/nbproject/Makefile-default.mk
@@ -0,0 +1,164 @@
+#
+# Generated Makefile - do not edit!
+#
+# Edit the Makefile in the project folder instead (../Makefile). Each target
+# has a -pre and a -post target defined where you can add customized code.
+#
+# This makefile implements configuration specific macros and targets.
+
+
+# Include project Makefile
+ifeq "${IGNORE_LOCAL}" "TRUE"
+# do not include local makefile. User is passing all local related variables already
+else
+include Makefile
+# Include makefile containing local settings
+ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
+include nbproject/Makefile-local-default.mk
+endif
+endif
+
+# Environment
+MKDIR=gnumkdir -p
+RM=rm -f 
+MV=mv 
+CP=cp 
+
+# Macros
+CND_CONF=default
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+IMAGE_TYPE=debug
+OUTPUT_SUFFIX=elf
+DEBUGGABLE_SUFFIX=elf
+FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+else
+IMAGE_TYPE=production
+OUTPUT_SUFFIX=hex
+DEBUGGABLE_SUFFIX=elf
+FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+endif
+
+# Object Directory
+OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
+
+# Distribution Directory
+DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
+
+# Source Files Quoted if spaced
+SOURCEFILES_QUOTED_IF_SPACED=../../ctaocrypt/test/test.c ../../mplabx/test_main.c
+
+# Object Files Quoted if spaced
+OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/1679622190/test.o ${OBJECTDIR}/_ext/1042050482/test_main.o
+POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/1679622190/test.o.d ${OBJECTDIR}/_ext/1042050482/test_main.o.d
+
+# Object Files
+OBJECTFILES=${OBJECTDIR}/_ext/1679622190/test.o ${OBJECTDIR}/_ext/1042050482/test_main.o
+
+# Source Files
+SOURCEFILES=../../ctaocrypt/test/test.c ../../mplabx/test_main.c
+
+
+CFLAGS=
+ASFLAGS=
+LDLIBSOPTIONS=
+
+############# Tool locations ##########################################
+# If you copy a project from one host to another, the path where the  #
+# compiler is installed may be different.                             #
+# If you open this project with MPLAB X in the new host, this         #
+# makefile will be regenerated and the paths will be corrected.       #
+#######################################################################
+# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
+FIXDEPS=fixDeps
+
+.build-conf:  ${BUILD_SUBPROJECTS}
+	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+
+MP_PROCESSOR_OPTION=32MX795F512L
+MP_LINKER_FILE_OPTION=
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: assemble
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: assembleWithPreprocess
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: compile
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+${OBJECTDIR}/_ext/1679622190/test.o: ../../ctaocrypt/test/test.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1679622190 
+	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1679622190/test.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1679622190/test.o.d" -o ${OBJECTDIR}/_ext/1679622190/test.o ../../ctaocrypt/test/test.c   
+	
+${OBJECTDIR}/_ext/1042050482/test_main.o: ../../mplabx/test_main.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1042050482 
+	@${RM} ${OBJECTDIR}/_ext/1042050482/test_main.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1042050482/test_main.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1042050482/test_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1042050482/test_main.o.d" -o ${OBJECTDIR}/_ext/1042050482/test_main.o ../../mplabx/test_main.c   
+	
+else
+${OBJECTDIR}/_ext/1679622190/test.o: ../../ctaocrypt/test/test.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1679622190 
+	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1679622190/test.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1679622190/test.o.d" -o ${OBJECTDIR}/_ext/1679622190/test.o ../../ctaocrypt/test/test.c   
+	
+${OBJECTDIR}/_ext/1042050482/test_main.o: ../../mplabx/test_main.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1042050482 
+	@${RM} ${OBJECTDIR}/_ext/1042050482/test_main.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1042050482/test_main.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1042050482/test_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1042050482/test_main.o.d" -o ${OBJECTDIR}/_ext/1042050482/test_main.o ../../mplabx/test_main.c   
+	
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: compileCPP
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: link
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/debug/cyassl.X.a ../zlib.X/dist/default/debug/zlib.X.a  
+	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
+	${MP_CC} $(MP_EXTRA_LD_PRE)  -mdebugger -D__MPLAB_DEBUGGER_PK3=1 -mprocessor=$(MP_PROCESSOR_OPTION) -Os -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\debug\cyassl.X.a ..\zlib.X\dist\default\debug\zlib.X.a       -mreserve=data@0x0:0x1FC -mreserve=boot@0x1FC02000:0x1FC02FEF -mreserve=boot@0x1FC02000:0x1FC024FF  -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=__MPLAB_DEBUG=1,--defsym=__DEBUG=1,--defsym=__MPLAB_DEBUGGER_PK3=1,--defsym=_min_heap_size=32768,--defsym=_min_stack_size=1024,--gc-sections
+	
+else
+dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/production/cyassl.X.a ../zlib.X/dist/default/production/zlib.X.a 
+	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
+	${MP_CC} $(MP_EXTRA_LD_PRE)  -mprocessor=$(MP_PROCESSOR_OPTION) -Os -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\production\cyassl.X.a ..\zlib.X\dist\default\production\zlib.X.a      -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=_min_heap_size=32768,--defsym=_min_stack_size=1024,--gc-sections
+	${MP_CC_DIR}\\xc32-bin2hex dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} 
+endif
+
+
+# Subprojects
+.build-subprojects:
+	cd /D ../cyassl.X && ${MAKE}  -f Makefile CONF=default
+	cd /D ../zlib.X && ${MAKE}  -f Makefile CONF=default
+
+
+# Subprojects
+.clean-subprojects:
+	cd /D ../cyassl.X && rm -rf "build/default" "dist/default"
+	cd /D ../zlib.X && rm -rf "build/default" "dist/default"
+
+# Clean Targets
+.clean-conf: ${CLEAN_SUBPROJECTS}
+	${RM} -r build/default
+	${RM} -r dist/default
+
+# Enable dependency checking
+.dep.inc: .depcheck-impl
+
+DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
+ifneq (${DEPFILES},)
+include ${DEPFILES}
+endif
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-genesis.properties b/mcapi/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
new file mode 100644
index 000000000..c3e8ca8d5
--- /dev/null
+++ b/mcapi/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
@@ -0,0 +1,8 @@
+#
+#Mon Feb 24 10:53:41 JST 2014
+default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
+default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30-TC9\\bin
+com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
+default.languagetoolchain.version=1.30
+host.platform=windows
+conf.ids=default
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-impl.mk b/mcapi/ctaocrypt_test.X/nbproject/Makefile-impl.mk
new file mode 100644
index 000000000..32630f76c
--- /dev/null
+++ b/mcapi/ctaocrypt_test.X/nbproject/Makefile-impl.mk
@@ -0,0 +1,69 @@
+#
+# Generated Makefile - do not edit!
+#
+# Edit the Makefile in the project folder instead (../Makefile). Each target
+# has a pre- and a post- target defined where you can add customization code.
+#
+# This makefile implements macros and targets common to all configurations.
+#
+# NOCDDL
+
+
+# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
+# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
+# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
+# and .clean-reqprojects-conf unless SUB has the value 'no'
+SUB_no=NO
+SUBPROJECTS=${SUB_${SUB}}
+BUILD_SUBPROJECTS_=.build-subprojects
+BUILD_SUBPROJECTS_NO=
+BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
+CLEAN_SUBPROJECTS_=.clean-subprojects
+CLEAN_SUBPROJECTS_NO=
+CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
+
+
+# Project Name
+PROJECTNAME=ctaocrypt_test.X
+
+# Active Configuration
+DEFAULTCONF=default
+CONF=${DEFAULTCONF}
+
+# All Configurations
+ALLCONFS=default 
+
+
+# build
+.build-impl: .build-pre
+	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
+
+
+# clean
+.clean-impl: .clean-pre
+	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
+
+# clobber
+.clobber-impl: .clobber-pre .depcheck-impl
+	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
+
+
+
+# all
+.all-impl: .all-pre .depcheck-impl
+	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
+
+
+
+# dependency checking support
+.depcheck-impl:
+#	@echo "# This code depends on make tool being used" >.dep.inc
+#	@if [ -n "${MAKE_VERSION}" ]; then \
+#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
+#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
+#	    echo "include \$${DEPFILES}" >>.dep.inc; \
+#	    echo "endif" >>.dep.inc; \
+#	else \
+#	    echo ".KEEP_STATE:" >>.dep.inc; \
+#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
+#	fi
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-local-default.mk b/mcapi/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
new file mode 100644
index 000000000..2d8424143
--- /dev/null
+++ b/mcapi/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
@@ -0,0 +1,37 @@
+#
+# Generated Makefile - do not edit!
+#
+#
+# This file contains information about the location of compilers and other tools.
+# If you commmit this file into your revision control server, you will be able to 
+# to checkout the project and build it from the command line with make. However,
+# if more than one person works on the same project, then this file might show
+# conflicts since different users are bound to have compilers in different places.
+# In that case you might choose to not commit this file and let MPLAB X recreate this file
+# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
+# least once so the file gets created and the project can be built. Finally, you can also
+# avoid using this file at all if you are only building from the command line with make.
+# You can invoke make with the values of the macros:
+# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
+#
+SHELL=cmd.exe
+PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
+# Adding MPLAB X bin directory to path.
+PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
+# Path to java used to run MPLAB X when this makefile was created
+MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
+OS_CURRENT="$(shell uname -s)"
+MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-gcc.exe"
+MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-g++.exe"
+# MP_BC is not defined
+MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-as.exe"
+MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-ld.exe"
+MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-ar.exe"
+DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
+MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+# MP_BC_DIR is not defined
+MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+# MP_BC_DIR is not defined
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-variables.mk b/mcapi/ctaocrypt_test.X/nbproject/Makefile-variables.mk
new file mode 100644
index 000000000..09fbeab2d
--- /dev/null
+++ b/mcapi/ctaocrypt_test.X/nbproject/Makefile-variables.mk
@@ -0,0 +1,13 @@
+#
+# Generated - do not edit!
+#
+# NOCDDL
+#
+CND_BASEDIR=`pwd`
+# default configuration
+CND_ARTIFACT_DIR_default=dist/default/production
+CND_ARTIFACT_NAME_default=ctaocrypt_test.X.production.hex
+CND_ARTIFACT_PATH_default=dist/default/production/ctaocrypt_test.X.production.hex
+CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
+CND_PACKAGE_NAME_default=ctaocrypttest.x.tar
+CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/ctaocrypttest.x.tar
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Package-default.bash b/mcapi/ctaocrypt_test.X/nbproject/Package-default.bash
new file mode 100644
index 000000000..24387c9d2
--- /dev/null
+++ b/mcapi/ctaocrypt_test.X/nbproject/Package-default.bash
@@ -0,0 +1,73 @@
+#!/bin/bash -x
+
+#
+# Generated - do not edit!
+#
+
+# Macros
+TOP=`pwd`
+CND_CONF=default
+CND_DISTDIR=dist
+TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
+TMPDIRNAME=tmp-packaging
+OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+OUTPUT_BASENAME=ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+PACKAGE_TOP_DIR=ctaocrypttest.x/
+
+# Functions
+function checkReturnCode
+{
+    rc=$?
+    if [ $rc != 0 ]
+    then
+        exit $rc
+    fi
+}
+function makeDirectory
+# $1 directory path
+# $2 permission (optional)
+{
+    mkdir -p "$1"
+    checkReturnCode
+    if [ "$2" != "" ]
+    then
+      chmod $2 "$1"
+      checkReturnCode
+    fi
+}
+function copyFileToTmpDir
+# $1 from-file path
+# $2 to-file path
+# $3 permission
+{
+    cp "$1" "$2"
+    checkReturnCode
+    if [ "$3" != "" ]
+    then
+        chmod $3 "$2"
+        checkReturnCode
+    fi
+}
+
+# Setup
+cd "${TOP}"
+mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
+rm -rf ${TMPDIR}
+mkdir -p ${TMPDIR}
+
+# Copy files and create directories and links
+cd "${TOP}"
+makeDirectory ${TMPDIR}/ctaocrypttest.x/bin
+copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}bin/${OUTPUT_BASENAME}" 0755
+
+
+# Generate tar file
+cd "${TOP}"
+rm -f ${CND_DISTDIR}/${CND_CONF}/package/ctaocrypttest.x.tar
+cd ${TMPDIR}
+tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/ctaocrypttest.x.tar *
+checkReturnCode
+
+# Cleanup
+cd "${TOP}"
+rm -rf ${TMPDIR}
diff --git a/mcapi/ctaocrypt_test.X/nbproject/configurations.xml b/mcapi/ctaocrypt_test.X/nbproject/configurations.xml
index e0ee5463e..d5b8d3e85 100644
--- a/mcapi/ctaocrypt_test.X/nbproject/configurations.xml
+++ b/mcapi/ctaocrypt_test.X/nbproject/configurations.xml
@@ -184,28 +184,6 @@
         
         
       
-      
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
       
         
       
diff --git a/mcapi/ctaocrypt_test.X/nbproject/include.am b/mcapi/ctaocrypt_test.X/nbproject/include.am
index ec09b769e..dc3d2f9a2 100644
--- a/mcapi/ctaocrypt_test.X/nbproject/include.am
+++ b/mcapi/ctaocrypt_test.X/nbproject/include.am
@@ -3,8 +3,7 @@
 #
 
 EXTRA_DIST += \
-         mcapi/ctaocrypt_test.X/Makefile \
-         mcapi/ctaocrypt_test.X/main.c
+         mcapi/ctaocrypt_test.X/Makefile
 
 EXTRA_DIST += \
          mcapi/ctaocrypt_test.X/nbproject/configurations.xml \
diff --git a/mcapi/ctaocrypt_test.X/nbproject/private/private.xml b/mcapi/ctaocrypt_test.X/nbproject/private/private.xml
new file mode 100644
index 000000000..776e0527b
--- /dev/null
+++ b/mcapi/ctaocrypt_test.X/nbproject/private/private.xml
@@ -0,0 +1,6 @@
+
+    
+        file:/C:/ROOT/CyaSSL-Release/PIC32MZ-HWCrypt/ctaocrypt/test/test.c
+        file:/C:/ROOT/CyaSSL-Release/PIC32MZ-HWCrypt/mplabx/test_main.c
+    
+
diff --git a/mcapi/cyassl.X/nbproject/Makefile-default.mk b/mcapi/cyassl.X/nbproject/Makefile-default.mk
new file mode 100644
index 000000000..d9d2aed90
--- /dev/null
+++ b/mcapi/cyassl.X/nbproject/Makefile-default.mk
@@ -0,0 +1,626 @@
+#
+# Generated Makefile - do not edit!
+#
+# Edit the Makefile in the project folder instead (../Makefile). Each target
+# has a -pre and a -post target defined where you can add customized code.
+#
+# This makefile implements configuration specific macros and targets.
+
+
+# Include project Makefile
+ifeq "${IGNORE_LOCAL}" "TRUE"
+# do not include local makefile. User is passing all local related variables already
+else
+include Makefile
+# Include makefile containing local settings
+ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
+include nbproject/Makefile-local-default.mk
+endif
+endif
+
+# Environment
+MKDIR=gnumkdir -p
+RM=rm -f 
+MV=mv 
+CP=cp 
+
+# Macros
+CND_CONF=default
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+IMAGE_TYPE=debug
+OUTPUT_SUFFIX=a
+DEBUGGABLE_SUFFIX=
+FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
+else
+IMAGE_TYPE=production
+OUTPUT_SUFFIX=a
+DEBUGGABLE_SUFFIX=
+FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
+endif
+
+# Object Directory
+OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
+
+# Distribution Directory
+DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
+
+# Source Files Quoted if spaced
+SOURCEFILES_QUOTED_IF_SPACED=../../src/crl.c ../../src/internal.c ../../src/io.c ../../src/keys.c ../../src/ocsp.c ../../src/sniffer.c ../../src/ssl.c ../../src/tls.c ../../ctaocrypt/src/aes.c ../../ctaocrypt/src/arc4.c ../../ctaocrypt/src/asm.c ../../ctaocrypt/src/asn.c ../../ctaocrypt/src/coding.c ../../ctaocrypt/src/des3.c ../../ctaocrypt/src/dh.c ../../ctaocrypt/src/dsa.c ../../ctaocrypt/src/ecc.c ../../ctaocrypt/src/ecc_fp.c ../../ctaocrypt/src/error.c ../../ctaocrypt/src/hc128.c ../../ctaocrypt/src/hmac.c ../../ctaocrypt/src/integer.c ../../ctaocrypt/src/logging.c ../../ctaocrypt/src/md2.c ../../ctaocrypt/src/md4.c ../../ctaocrypt/src/md5.c ../../ctaocrypt/src/memory.c ../../ctaocrypt/src/misc.c ../../ctaocrypt/src/pwdbased.c ../../ctaocrypt/src/rabbit.c ../../ctaocrypt/src/random.c ../../ctaocrypt/src/ripemd.c ../../ctaocrypt/src/rsa.c ../../ctaocrypt/src/sha.c ../../ctaocrypt/src/sha256.c ../../ctaocrypt/src/sha512.c ../../ctaocrypt/src/tfm.c ../../mcapi/crypto.c ../../ctaocrypt/src/compress.c ../../ctaocrypt/src/camellia.c ../../ctaocrypt/src/port.c
+
+# Object Files Quoted if spaced
+OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/1445274692/crl.o ${OBJECTDIR}/_ext/1445274692/internal.o ${OBJECTDIR}/_ext/1445274692/io.o ${OBJECTDIR}/_ext/1445274692/keys.o ${OBJECTDIR}/_ext/1445274692/ocsp.o ${OBJECTDIR}/_ext/1445274692/sniffer.o ${OBJECTDIR}/_ext/1445274692/ssl.o ${OBJECTDIR}/_ext/1445274692/tls.o ${OBJECTDIR}/_ext/1439655260/aes.o ${OBJECTDIR}/_ext/1439655260/arc4.o ${OBJECTDIR}/_ext/1439655260/asm.o ${OBJECTDIR}/_ext/1439655260/asn.o ${OBJECTDIR}/_ext/1439655260/coding.o ${OBJECTDIR}/_ext/1439655260/des3.o ${OBJECTDIR}/_ext/1439655260/dh.o ${OBJECTDIR}/_ext/1439655260/dsa.o ${OBJECTDIR}/_ext/1439655260/ecc.o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ${OBJECTDIR}/_ext/1439655260/error.o ${OBJECTDIR}/_ext/1439655260/hc128.o ${OBJECTDIR}/_ext/1439655260/hmac.o ${OBJECTDIR}/_ext/1439655260/integer.o ${OBJECTDIR}/_ext/1439655260/logging.o ${OBJECTDIR}/_ext/1439655260/md2.o ${OBJECTDIR}/_ext/1439655260/md4.o ${OBJECTDIR}/_ext/1439655260/md5.o ${OBJECTDIR}/_ext/1439655260/memory.o ${OBJECTDIR}/_ext/1439655260/misc.o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ${OBJECTDIR}/_ext/1439655260/rabbit.o ${OBJECTDIR}/_ext/1439655260/random.o ${OBJECTDIR}/_ext/1439655260/ripemd.o ${OBJECTDIR}/_ext/1439655260/rsa.o ${OBJECTDIR}/_ext/1439655260/sha.o ${OBJECTDIR}/_ext/1439655260/sha256.o ${OBJECTDIR}/_ext/1439655260/sha512.o ${OBJECTDIR}/_ext/1439655260/tfm.o ${OBJECTDIR}/_ext/1628556068/crypto.o ${OBJECTDIR}/_ext/1439655260/compress.o ${OBJECTDIR}/_ext/1439655260/camellia.o ${OBJECTDIR}/_ext/1439655260/port.o
+POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/1445274692/crl.o.d ${OBJECTDIR}/_ext/1445274692/internal.o.d ${OBJECTDIR}/_ext/1445274692/io.o.d ${OBJECTDIR}/_ext/1445274692/keys.o.d ${OBJECTDIR}/_ext/1445274692/ocsp.o.d ${OBJECTDIR}/_ext/1445274692/sniffer.o.d ${OBJECTDIR}/_ext/1445274692/ssl.o.d ${OBJECTDIR}/_ext/1445274692/tls.o.d ${OBJECTDIR}/_ext/1439655260/aes.o.d ${OBJECTDIR}/_ext/1439655260/arc4.o.d ${OBJECTDIR}/_ext/1439655260/asm.o.d ${OBJECTDIR}/_ext/1439655260/asn.o.d ${OBJECTDIR}/_ext/1439655260/coding.o.d ${OBJECTDIR}/_ext/1439655260/des3.o.d ${OBJECTDIR}/_ext/1439655260/dh.o.d ${OBJECTDIR}/_ext/1439655260/dsa.o.d ${OBJECTDIR}/_ext/1439655260/ecc.o.d ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d ${OBJECTDIR}/_ext/1439655260/error.o.d ${OBJECTDIR}/_ext/1439655260/hc128.o.d ${OBJECTDIR}/_ext/1439655260/hmac.o.d ${OBJECTDIR}/_ext/1439655260/integer.o.d ${OBJECTDIR}/_ext/1439655260/logging.o.d ${OBJECTDIR}/_ext/1439655260/md2.o.d ${OBJECTDIR}/_ext/1439655260/md4.o.d ${OBJECTDIR}/_ext/1439655260/md5.o.d ${OBJECTDIR}/_ext/1439655260/memory.o.d ${OBJECTDIR}/_ext/1439655260/misc.o.d ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d ${OBJECTDIR}/_ext/1439655260/rabbit.o.d ${OBJECTDIR}/_ext/1439655260/random.o.d ${OBJECTDIR}/_ext/1439655260/ripemd.o.d ${OBJECTDIR}/_ext/1439655260/rsa.o.d ${OBJECTDIR}/_ext/1439655260/sha.o.d ${OBJECTDIR}/_ext/1439655260/sha256.o.d ${OBJECTDIR}/_ext/1439655260/sha512.o.d ${OBJECTDIR}/_ext/1439655260/tfm.o.d ${OBJECTDIR}/_ext/1628556068/crypto.o.d ${OBJECTDIR}/_ext/1439655260/compress.o.d ${OBJECTDIR}/_ext/1439655260/camellia.o.d ${OBJECTDIR}/_ext/1439655260/port.o.d
+
+# Object Files
+OBJECTFILES=${OBJECTDIR}/_ext/1445274692/crl.o ${OBJECTDIR}/_ext/1445274692/internal.o ${OBJECTDIR}/_ext/1445274692/io.o ${OBJECTDIR}/_ext/1445274692/keys.o ${OBJECTDIR}/_ext/1445274692/ocsp.o ${OBJECTDIR}/_ext/1445274692/sniffer.o ${OBJECTDIR}/_ext/1445274692/ssl.o ${OBJECTDIR}/_ext/1445274692/tls.o ${OBJECTDIR}/_ext/1439655260/aes.o ${OBJECTDIR}/_ext/1439655260/arc4.o ${OBJECTDIR}/_ext/1439655260/asm.o ${OBJECTDIR}/_ext/1439655260/asn.o ${OBJECTDIR}/_ext/1439655260/coding.o ${OBJECTDIR}/_ext/1439655260/des3.o ${OBJECTDIR}/_ext/1439655260/dh.o ${OBJECTDIR}/_ext/1439655260/dsa.o ${OBJECTDIR}/_ext/1439655260/ecc.o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ${OBJECTDIR}/_ext/1439655260/error.o ${OBJECTDIR}/_ext/1439655260/hc128.o ${OBJECTDIR}/_ext/1439655260/hmac.o ${OBJECTDIR}/_ext/1439655260/integer.o ${OBJECTDIR}/_ext/1439655260/logging.o ${OBJECTDIR}/_ext/1439655260/md2.o ${OBJECTDIR}/_ext/1439655260/md4.o ${OBJECTDIR}/_ext/1439655260/md5.o ${OBJECTDIR}/_ext/1439655260/memory.o ${OBJECTDIR}/_ext/1439655260/misc.o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ${OBJECTDIR}/_ext/1439655260/rabbit.o ${OBJECTDIR}/_ext/1439655260/random.o ${OBJECTDIR}/_ext/1439655260/ripemd.o ${OBJECTDIR}/_ext/1439655260/rsa.o ${OBJECTDIR}/_ext/1439655260/sha.o ${OBJECTDIR}/_ext/1439655260/sha256.o ${OBJECTDIR}/_ext/1439655260/sha512.o ${OBJECTDIR}/_ext/1439655260/tfm.o ${OBJECTDIR}/_ext/1628556068/crypto.o ${OBJECTDIR}/_ext/1439655260/compress.o ${OBJECTDIR}/_ext/1439655260/camellia.o ${OBJECTDIR}/_ext/1439655260/port.o
+
+# Source Files
+SOURCEFILES=../../src/crl.c ../../src/internal.c ../../src/io.c ../../src/keys.c ../../src/ocsp.c ../../src/sniffer.c ../../src/ssl.c ../../src/tls.c ../../ctaocrypt/src/aes.c ../../ctaocrypt/src/arc4.c ../../ctaocrypt/src/asm.c ../../ctaocrypt/src/asn.c ../../ctaocrypt/src/coding.c ../../ctaocrypt/src/des3.c ../../ctaocrypt/src/dh.c ../../ctaocrypt/src/dsa.c ../../ctaocrypt/src/ecc.c ../../ctaocrypt/src/ecc_fp.c ../../ctaocrypt/src/error.c ../../ctaocrypt/src/hc128.c ../../ctaocrypt/src/hmac.c ../../ctaocrypt/src/integer.c ../../ctaocrypt/src/logging.c ../../ctaocrypt/src/md2.c ../../ctaocrypt/src/md4.c ../../ctaocrypt/src/md5.c ../../ctaocrypt/src/memory.c ../../ctaocrypt/src/misc.c ../../ctaocrypt/src/pwdbased.c ../../ctaocrypt/src/rabbit.c ../../ctaocrypt/src/random.c ../../ctaocrypt/src/ripemd.c ../../ctaocrypt/src/rsa.c ../../ctaocrypt/src/sha.c ../../ctaocrypt/src/sha256.c ../../ctaocrypt/src/sha512.c ../../ctaocrypt/src/tfm.c ../../mcapi/crypto.c ../../ctaocrypt/src/compress.c ../../ctaocrypt/src/camellia.c ../../ctaocrypt/src/port.c
+
+
+CFLAGS=
+ASFLAGS=
+LDLIBSOPTIONS=
+
+############# Tool locations ##########################################
+# If you copy a project from one host to another, the path where the  #
+# compiler is installed may be different.                             #
+# If you open this project with MPLAB X in the new host, this         #
+# makefile will be regenerated and the paths will be corrected.       #
+#######################################################################
+# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
+FIXDEPS=fixDeps
+
+.build-conf:  ${BUILD_SUBPROJECTS}
+	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
+
+MP_PROCESSOR_OPTION=32MX795F512L
+MP_LINKER_FILE_OPTION=
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: assemble
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: assembleWithPreprocess
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: compile
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+${OBJECTDIR}/_ext/1445274692/crl.o: ../../src/crl.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/crl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/crl.o.d" -o ${OBJECTDIR}/_ext/1445274692/crl.o ../../src/crl.c   
+	
+${OBJECTDIR}/_ext/1445274692/internal.o: ../../src/internal.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/internal.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/internal.o.d" -o ${OBJECTDIR}/_ext/1445274692/internal.o ../../src/internal.c   
+	
+${OBJECTDIR}/_ext/1445274692/io.o: ../../src/io.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/io.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/io.o.d" -o ${OBJECTDIR}/_ext/1445274692/io.o ../../src/io.c   
+	
+${OBJECTDIR}/_ext/1445274692/keys.o: ../../src/keys.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/keys.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/keys.o.d" -o ${OBJECTDIR}/_ext/1445274692/keys.o ../../src/keys.c   
+	
+${OBJECTDIR}/_ext/1445274692/ocsp.o: ../../src/ocsp.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" -o ${OBJECTDIR}/_ext/1445274692/ocsp.o ../../src/ocsp.c   
+	
+${OBJECTDIR}/_ext/1445274692/sniffer.o: ../../src/sniffer.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" -o ${OBJECTDIR}/_ext/1445274692/sniffer.o ../../src/sniffer.c   
+	
+${OBJECTDIR}/_ext/1445274692/ssl.o: ../../src/ssl.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ssl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ssl.o.d" -o ${OBJECTDIR}/_ext/1445274692/ssl.o ../../src/ssl.c   
+	
+${OBJECTDIR}/_ext/1445274692/tls.o: ../../src/tls.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/tls.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/tls.o.d" -o ${OBJECTDIR}/_ext/1445274692/tls.o ../../src/tls.c   
+	
+${OBJECTDIR}/_ext/1439655260/aes.o: ../../ctaocrypt/src/aes.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/aes.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/aes.o.d" -o ${OBJECTDIR}/_ext/1439655260/aes.o ../../ctaocrypt/src/aes.c   
+	
+${OBJECTDIR}/_ext/1439655260/arc4.o: ../../ctaocrypt/src/arc4.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/arc4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/arc4.o.d" -o ${OBJECTDIR}/_ext/1439655260/arc4.o ../../ctaocrypt/src/arc4.c   
+	
+${OBJECTDIR}/_ext/1439655260/asm.o: ../../ctaocrypt/src/asm.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asm.o.d" -o ${OBJECTDIR}/_ext/1439655260/asm.o ../../ctaocrypt/src/asm.c   
+	
+${OBJECTDIR}/_ext/1439655260/asn.o: ../../ctaocrypt/src/asn.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asn.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asn.o.d" -o ${OBJECTDIR}/_ext/1439655260/asn.o ../../ctaocrypt/src/asn.c   
+	
+${OBJECTDIR}/_ext/1439655260/coding.o: ../../ctaocrypt/src/coding.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/coding.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/coding.o.d" -o ${OBJECTDIR}/_ext/1439655260/coding.o ../../ctaocrypt/src/coding.c   
+	
+${OBJECTDIR}/_ext/1439655260/des3.o: ../../ctaocrypt/src/des3.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/des3.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/des3.o.d" -o ${OBJECTDIR}/_ext/1439655260/des3.o ../../ctaocrypt/src/des3.c   
+	
+${OBJECTDIR}/_ext/1439655260/dh.o: ../../ctaocrypt/src/dh.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dh.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dh.o.d" -o ${OBJECTDIR}/_ext/1439655260/dh.o ../../ctaocrypt/src/dh.c   
+	
+${OBJECTDIR}/_ext/1439655260/dsa.o: ../../ctaocrypt/src/dsa.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/dsa.o ../../ctaocrypt/src/dsa.c   
+	
+${OBJECTDIR}/_ext/1439655260/ecc.o: ../../ctaocrypt/src/ecc.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc.o ../../ctaocrypt/src/ecc.c   
+	
+${OBJECTDIR}/_ext/1439655260/ecc_fp.o: ../../ctaocrypt/src/ecc_fp.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ../../ctaocrypt/src/ecc_fp.c   
+	
+${OBJECTDIR}/_ext/1439655260/error.o: ../../ctaocrypt/src/error.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/error.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/error.o.d" -o ${OBJECTDIR}/_ext/1439655260/error.o ../../ctaocrypt/src/error.c   
+	
+${OBJECTDIR}/_ext/1439655260/hc128.o: ../../ctaocrypt/src/hc128.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hc128.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hc128.o.d" -o ${OBJECTDIR}/_ext/1439655260/hc128.o ../../ctaocrypt/src/hc128.c   
+	
+${OBJECTDIR}/_ext/1439655260/hmac.o: ../../ctaocrypt/src/hmac.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hmac.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hmac.o.d" -o ${OBJECTDIR}/_ext/1439655260/hmac.o ../../ctaocrypt/src/hmac.c   
+	
+${OBJECTDIR}/_ext/1439655260/integer.o: ../../ctaocrypt/src/integer.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/integer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/integer.o.d" -o ${OBJECTDIR}/_ext/1439655260/integer.o ../../ctaocrypt/src/integer.c   
+	
+${OBJECTDIR}/_ext/1439655260/logging.o: ../../ctaocrypt/src/logging.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/logging.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/logging.o.d" -o ${OBJECTDIR}/_ext/1439655260/logging.o ../../ctaocrypt/src/logging.c   
+	
+${OBJECTDIR}/_ext/1439655260/md2.o: ../../ctaocrypt/src/md2.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md2.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md2.o.d" -o ${OBJECTDIR}/_ext/1439655260/md2.o ../../ctaocrypt/src/md2.c   
+	
+${OBJECTDIR}/_ext/1439655260/md4.o: ../../ctaocrypt/src/md4.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md4.o.d" -o ${OBJECTDIR}/_ext/1439655260/md4.o ../../ctaocrypt/src/md4.c   
+	
+${OBJECTDIR}/_ext/1439655260/md5.o: ../../ctaocrypt/src/md5.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md5.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md5.o.d" -o ${OBJECTDIR}/_ext/1439655260/md5.o ../../ctaocrypt/src/md5.c   
+	
+${OBJECTDIR}/_ext/1439655260/memory.o: ../../ctaocrypt/src/memory.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/memory.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/memory.o.d" -o ${OBJECTDIR}/_ext/1439655260/memory.o ../../ctaocrypt/src/memory.c   
+	
+${OBJECTDIR}/_ext/1439655260/misc.o: ../../ctaocrypt/src/misc.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/misc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/misc.o.d" -o ${OBJECTDIR}/_ext/1439655260/misc.o ../../ctaocrypt/src/misc.c   
+	
+${OBJECTDIR}/_ext/1439655260/pwdbased.o: ../../ctaocrypt/src/pwdbased.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" -o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ../../ctaocrypt/src/pwdbased.c   
+	
+${OBJECTDIR}/_ext/1439655260/rabbit.o: ../../ctaocrypt/src/rabbit.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" -o ${OBJECTDIR}/_ext/1439655260/rabbit.o ../../ctaocrypt/src/rabbit.c   
+	
+${OBJECTDIR}/_ext/1439655260/random.o: ../../ctaocrypt/src/random.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/random.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/random.o.d" -o ${OBJECTDIR}/_ext/1439655260/random.o ../../ctaocrypt/src/random.c   
+	
+${OBJECTDIR}/_ext/1439655260/ripemd.o: ../../ctaocrypt/src/ripemd.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" -o ${OBJECTDIR}/_ext/1439655260/ripemd.o ../../ctaocrypt/src/ripemd.c   
+	
+${OBJECTDIR}/_ext/1439655260/rsa.o: ../../ctaocrypt/src/rsa.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/rsa.o ../../ctaocrypt/src/rsa.c   
+	
+${OBJECTDIR}/_ext/1439655260/sha.o: ../../ctaocrypt/src/sha.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha.o ../../ctaocrypt/src/sha.c   
+	
+${OBJECTDIR}/_ext/1439655260/sha256.o: ../../ctaocrypt/src/sha256.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha256.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha256.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha256.o ../../ctaocrypt/src/sha256.c   
+	
+${OBJECTDIR}/_ext/1439655260/sha512.o: ../../ctaocrypt/src/sha512.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha512.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha512.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha512.o ../../ctaocrypt/src/sha512.c   
+	
+${OBJECTDIR}/_ext/1439655260/tfm.o: ../../ctaocrypt/src/tfm.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/tfm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/tfm.o.d" -o ${OBJECTDIR}/_ext/1439655260/tfm.o ../../ctaocrypt/src/tfm.c   
+	
+${OBJECTDIR}/_ext/1628556068/crypto.o: ../../mcapi/crypto.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1628556068 
+	@${RM} ${OBJECTDIR}/_ext/1628556068/crypto.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1628556068/crypto.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1628556068/crypto.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1628556068/crypto.o.d" -o ${OBJECTDIR}/_ext/1628556068/crypto.o ../../mcapi/crypto.c   
+	
+${OBJECTDIR}/_ext/1439655260/compress.o: ../../ctaocrypt/src/compress.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/compress.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/compress.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/compress.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/compress.o.d" -o ${OBJECTDIR}/_ext/1439655260/compress.o ../../ctaocrypt/src/compress.c   
+	
+${OBJECTDIR}/_ext/1439655260/camellia.o: ../../ctaocrypt/src/camellia.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/camellia.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/camellia.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/camellia.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/camellia.o.d" -o ${OBJECTDIR}/_ext/1439655260/camellia.o ../../ctaocrypt/src/camellia.c   
+	
+${OBJECTDIR}/_ext/1439655260/port.o: ../../ctaocrypt/src/port.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/port.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/port.o.d" -o ${OBJECTDIR}/_ext/1439655260/port.o ../../ctaocrypt/src/port.c   
+	
+else
+${OBJECTDIR}/_ext/1445274692/crl.o: ../../src/crl.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/crl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/crl.o.d" -o ${OBJECTDIR}/_ext/1445274692/crl.o ../../src/crl.c   
+	
+${OBJECTDIR}/_ext/1445274692/internal.o: ../../src/internal.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/internal.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/internal.o.d" -o ${OBJECTDIR}/_ext/1445274692/internal.o ../../src/internal.c   
+	
+${OBJECTDIR}/_ext/1445274692/io.o: ../../src/io.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/io.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/io.o.d" -o ${OBJECTDIR}/_ext/1445274692/io.o ../../src/io.c   
+	
+${OBJECTDIR}/_ext/1445274692/keys.o: ../../src/keys.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/keys.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/keys.o.d" -o ${OBJECTDIR}/_ext/1445274692/keys.o ../../src/keys.c   
+	
+${OBJECTDIR}/_ext/1445274692/ocsp.o: ../../src/ocsp.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" -o ${OBJECTDIR}/_ext/1445274692/ocsp.o ../../src/ocsp.c   
+	
+${OBJECTDIR}/_ext/1445274692/sniffer.o: ../../src/sniffer.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" -o ${OBJECTDIR}/_ext/1445274692/sniffer.o ../../src/sniffer.c   
+	
+${OBJECTDIR}/_ext/1445274692/ssl.o: ../../src/ssl.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ssl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ssl.o.d" -o ${OBJECTDIR}/_ext/1445274692/ssl.o ../../src/ssl.c   
+	
+${OBJECTDIR}/_ext/1445274692/tls.o: ../../src/tls.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/tls.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/tls.o.d" -o ${OBJECTDIR}/_ext/1445274692/tls.o ../../src/tls.c   
+	
+${OBJECTDIR}/_ext/1439655260/aes.o: ../../ctaocrypt/src/aes.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/aes.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/aes.o.d" -o ${OBJECTDIR}/_ext/1439655260/aes.o ../../ctaocrypt/src/aes.c   
+	
+${OBJECTDIR}/_ext/1439655260/arc4.o: ../../ctaocrypt/src/arc4.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/arc4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/arc4.o.d" -o ${OBJECTDIR}/_ext/1439655260/arc4.o ../../ctaocrypt/src/arc4.c   
+	
+${OBJECTDIR}/_ext/1439655260/asm.o: ../../ctaocrypt/src/asm.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asm.o.d" -o ${OBJECTDIR}/_ext/1439655260/asm.o ../../ctaocrypt/src/asm.c   
+	
+${OBJECTDIR}/_ext/1439655260/asn.o: ../../ctaocrypt/src/asn.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asn.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asn.o.d" -o ${OBJECTDIR}/_ext/1439655260/asn.o ../../ctaocrypt/src/asn.c   
+	
+${OBJECTDIR}/_ext/1439655260/coding.o: ../../ctaocrypt/src/coding.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/coding.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/coding.o.d" -o ${OBJECTDIR}/_ext/1439655260/coding.o ../../ctaocrypt/src/coding.c   
+	
+${OBJECTDIR}/_ext/1439655260/des3.o: ../../ctaocrypt/src/des3.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/des3.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/des3.o.d" -o ${OBJECTDIR}/_ext/1439655260/des3.o ../../ctaocrypt/src/des3.c   
+	
+${OBJECTDIR}/_ext/1439655260/dh.o: ../../ctaocrypt/src/dh.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dh.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dh.o.d" -o ${OBJECTDIR}/_ext/1439655260/dh.o ../../ctaocrypt/src/dh.c   
+	
+${OBJECTDIR}/_ext/1439655260/dsa.o: ../../ctaocrypt/src/dsa.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/dsa.o ../../ctaocrypt/src/dsa.c   
+	
+${OBJECTDIR}/_ext/1439655260/ecc.o: ../../ctaocrypt/src/ecc.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc.o ../../ctaocrypt/src/ecc.c   
+	
+${OBJECTDIR}/_ext/1439655260/ecc_fp.o: ../../ctaocrypt/src/ecc_fp.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ../../ctaocrypt/src/ecc_fp.c   
+	
+${OBJECTDIR}/_ext/1439655260/error.o: ../../ctaocrypt/src/error.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/error.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/error.o.d" -o ${OBJECTDIR}/_ext/1439655260/error.o ../../ctaocrypt/src/error.c   
+	
+${OBJECTDIR}/_ext/1439655260/hc128.o: ../../ctaocrypt/src/hc128.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hc128.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hc128.o.d" -o ${OBJECTDIR}/_ext/1439655260/hc128.o ../../ctaocrypt/src/hc128.c   
+	
+${OBJECTDIR}/_ext/1439655260/hmac.o: ../../ctaocrypt/src/hmac.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hmac.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hmac.o.d" -o ${OBJECTDIR}/_ext/1439655260/hmac.o ../../ctaocrypt/src/hmac.c   
+	
+${OBJECTDIR}/_ext/1439655260/integer.o: ../../ctaocrypt/src/integer.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/integer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/integer.o.d" -o ${OBJECTDIR}/_ext/1439655260/integer.o ../../ctaocrypt/src/integer.c   
+	
+${OBJECTDIR}/_ext/1439655260/logging.o: ../../ctaocrypt/src/logging.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/logging.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/logging.o.d" -o ${OBJECTDIR}/_ext/1439655260/logging.o ../../ctaocrypt/src/logging.c   
+	
+${OBJECTDIR}/_ext/1439655260/md2.o: ../../ctaocrypt/src/md2.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md2.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md2.o.d" -o ${OBJECTDIR}/_ext/1439655260/md2.o ../../ctaocrypt/src/md2.c   
+	
+${OBJECTDIR}/_ext/1439655260/md4.o: ../../ctaocrypt/src/md4.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md4.o.d" -o ${OBJECTDIR}/_ext/1439655260/md4.o ../../ctaocrypt/src/md4.c   
+	
+${OBJECTDIR}/_ext/1439655260/md5.o: ../../ctaocrypt/src/md5.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md5.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md5.o.d" -o ${OBJECTDIR}/_ext/1439655260/md5.o ../../ctaocrypt/src/md5.c   
+	
+${OBJECTDIR}/_ext/1439655260/memory.o: ../../ctaocrypt/src/memory.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/memory.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/memory.o.d" -o ${OBJECTDIR}/_ext/1439655260/memory.o ../../ctaocrypt/src/memory.c   
+	
+${OBJECTDIR}/_ext/1439655260/misc.o: ../../ctaocrypt/src/misc.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/misc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/misc.o.d" -o ${OBJECTDIR}/_ext/1439655260/misc.o ../../ctaocrypt/src/misc.c   
+	
+${OBJECTDIR}/_ext/1439655260/pwdbased.o: ../../ctaocrypt/src/pwdbased.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" -o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ../../ctaocrypt/src/pwdbased.c   
+	
+${OBJECTDIR}/_ext/1439655260/rabbit.o: ../../ctaocrypt/src/rabbit.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" -o ${OBJECTDIR}/_ext/1439655260/rabbit.o ../../ctaocrypt/src/rabbit.c   
+	
+${OBJECTDIR}/_ext/1439655260/random.o: ../../ctaocrypt/src/random.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/random.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/random.o.d" -o ${OBJECTDIR}/_ext/1439655260/random.o ../../ctaocrypt/src/random.c   
+	
+${OBJECTDIR}/_ext/1439655260/ripemd.o: ../../ctaocrypt/src/ripemd.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" -o ${OBJECTDIR}/_ext/1439655260/ripemd.o ../../ctaocrypt/src/ripemd.c   
+	
+${OBJECTDIR}/_ext/1439655260/rsa.o: ../../ctaocrypt/src/rsa.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/rsa.o ../../ctaocrypt/src/rsa.c   
+	
+${OBJECTDIR}/_ext/1439655260/sha.o: ../../ctaocrypt/src/sha.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha.o ../../ctaocrypt/src/sha.c   
+	
+${OBJECTDIR}/_ext/1439655260/sha256.o: ../../ctaocrypt/src/sha256.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha256.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha256.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha256.o ../../ctaocrypt/src/sha256.c   
+	
+${OBJECTDIR}/_ext/1439655260/sha512.o: ../../ctaocrypt/src/sha512.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha512.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha512.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha512.o ../../ctaocrypt/src/sha512.c   
+	
+${OBJECTDIR}/_ext/1439655260/tfm.o: ../../ctaocrypt/src/tfm.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/tfm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/tfm.o.d" -o ${OBJECTDIR}/_ext/1439655260/tfm.o ../../ctaocrypt/src/tfm.c   
+	
+${OBJECTDIR}/_ext/1628556068/crypto.o: ../../mcapi/crypto.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1628556068 
+	@${RM} ${OBJECTDIR}/_ext/1628556068/crypto.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1628556068/crypto.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1628556068/crypto.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1628556068/crypto.o.d" -o ${OBJECTDIR}/_ext/1628556068/crypto.o ../../mcapi/crypto.c   
+	
+${OBJECTDIR}/_ext/1439655260/compress.o: ../../ctaocrypt/src/compress.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/compress.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/compress.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/compress.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/compress.o.d" -o ${OBJECTDIR}/_ext/1439655260/compress.o ../../ctaocrypt/src/compress.c   
+	
+${OBJECTDIR}/_ext/1439655260/camellia.o: ../../ctaocrypt/src/camellia.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/camellia.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/camellia.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/camellia.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/camellia.o.d" -o ${OBJECTDIR}/_ext/1439655260/camellia.o ../../ctaocrypt/src/camellia.c   
+	
+${OBJECTDIR}/_ext/1439655260/port.o: ../../ctaocrypt/src/port.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/port.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/port.o.d" -o ${OBJECTDIR}/_ext/1439655260/port.o ../../ctaocrypt/src/port.c   
+	
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: compileCPP
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: archive
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk    
+	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
+	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
+else
+dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk   
+	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
+	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
+endif
+
+
+# Subprojects
+.build-subprojects:
+
+
+# Subprojects
+.clean-subprojects:
+
+# Clean Targets
+.clean-conf: ${CLEAN_SUBPROJECTS}
+	${RM} -r build/default
+	${RM} -r dist/default
+
+# Enable dependency checking
+.dep.inc: .depcheck-impl
+
+DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
+ifneq (${DEPFILES},)
+include ${DEPFILES}
+endif
diff --git a/mcapi/cyassl.X/nbproject/Makefile-genesis.properties b/mcapi/cyassl.X/nbproject/Makefile-genesis.properties
new file mode 100644
index 000000000..e2b5ea418
--- /dev/null
+++ b/mcapi/cyassl.X/nbproject/Makefile-genesis.properties
@@ -0,0 +1,8 @@
+#
+#Mon Feb 24 12:04:34 JST 2014
+default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
+default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30-TC9\\bin
+com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
+default.languagetoolchain.version=1.30
+host.platform=windows
+conf.ids=default
diff --git a/mcapi/cyassl.X/nbproject/Makefile-impl.mk b/mcapi/cyassl.X/nbproject/Makefile-impl.mk
new file mode 100644
index 000000000..6f20c0abd
--- /dev/null
+++ b/mcapi/cyassl.X/nbproject/Makefile-impl.mk
@@ -0,0 +1,69 @@
+#
+# Generated Makefile - do not edit!
+#
+# Edit the Makefile in the project folder instead (../Makefile). Each target
+# has a pre- and a post- target defined where you can add customization code.
+#
+# This makefile implements macros and targets common to all configurations.
+#
+# NOCDDL
+
+
+# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
+# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
+# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
+# and .clean-reqprojects-conf unless SUB has the value 'no'
+SUB_no=NO
+SUBPROJECTS=${SUB_${SUB}}
+BUILD_SUBPROJECTS_=.build-subprojects
+BUILD_SUBPROJECTS_NO=
+BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
+CLEAN_SUBPROJECTS_=.clean-subprojects
+CLEAN_SUBPROJECTS_NO=
+CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
+
+
+# Project Name
+PROJECTNAME=cyassl.X
+
+# Active Configuration
+DEFAULTCONF=default
+CONF=${DEFAULTCONF}
+
+# All Configurations
+ALLCONFS=default 
+
+
+# build
+.build-impl: .build-pre
+	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
+
+
+# clean
+.clean-impl: .clean-pre
+	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
+
+# clobber
+.clobber-impl: .clobber-pre .depcheck-impl
+	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
+
+
+
+# all
+.all-impl: .all-pre .depcheck-impl
+	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
+
+
+
+# dependency checking support
+.depcheck-impl:
+#	@echo "# This code depends on make tool being used" >.dep.inc
+#	@if [ -n "${MAKE_VERSION}" ]; then \
+#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
+#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
+#	    echo "include \$${DEPFILES}" >>.dep.inc; \
+#	    echo "endif" >>.dep.inc; \
+#	else \
+#	    echo ".KEEP_STATE:" >>.dep.inc; \
+#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
+#	fi
diff --git a/mcapi/cyassl.X/nbproject/Makefile-local-default.mk b/mcapi/cyassl.X/nbproject/Makefile-local-default.mk
new file mode 100644
index 000000000..2d8424143
--- /dev/null
+++ b/mcapi/cyassl.X/nbproject/Makefile-local-default.mk
@@ -0,0 +1,37 @@
+#
+# Generated Makefile - do not edit!
+#
+#
+# This file contains information about the location of compilers and other tools.
+# If you commmit this file into your revision control server, you will be able to 
+# to checkout the project and build it from the command line with make. However,
+# if more than one person works on the same project, then this file might show
+# conflicts since different users are bound to have compilers in different places.
+# In that case you might choose to not commit this file and let MPLAB X recreate this file
+# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
+# least once so the file gets created and the project can be built. Finally, you can also
+# avoid using this file at all if you are only building from the command line with make.
+# You can invoke make with the values of the macros:
+# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
+#
+SHELL=cmd.exe
+PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
+# Adding MPLAB X bin directory to path.
+PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
+# Path to java used to run MPLAB X when this makefile was created
+MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
+OS_CURRENT="$(shell uname -s)"
+MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-gcc.exe"
+MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-g++.exe"
+# MP_BC is not defined
+MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-as.exe"
+MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-ld.exe"
+MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-ar.exe"
+DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
+MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+# MP_BC_DIR is not defined
+MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+# MP_BC_DIR is not defined
diff --git a/mcapi/cyassl.X/nbproject/Makefile-variables.mk b/mcapi/cyassl.X/nbproject/Makefile-variables.mk
new file mode 100644
index 000000000..b480b107d
--- /dev/null
+++ b/mcapi/cyassl.X/nbproject/Makefile-variables.mk
@@ -0,0 +1,13 @@
+#
+# Generated - do not edit!
+#
+# NOCDDL
+#
+CND_BASEDIR=`pwd`
+# default configuration
+CND_ARTIFACT_DIR_default=dist/default/production
+CND_ARTIFACT_NAME_default=cyassl.X.a
+CND_ARTIFACT_PATH_default=dist/default/production/cyassl.X.a
+CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
+CND_PACKAGE_NAME_default=cyassl.X.tar
+CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/cyassl.X.tar
diff --git a/mcapi/cyassl.X/nbproject/Package-default.bash b/mcapi/cyassl.X/nbproject/Package-default.bash
new file mode 100644
index 000000000..baae5e998
--- /dev/null
+++ b/mcapi/cyassl.X/nbproject/Package-default.bash
@@ -0,0 +1,73 @@
+#!/bin/bash -x
+
+#
+# Generated - do not edit!
+#
+
+# Macros
+TOP=`pwd`
+CND_CONF=default
+CND_DISTDIR=dist
+TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
+TMPDIRNAME=tmp-packaging
+OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
+OUTPUT_BASENAME=cyassl.X.${OUTPUT_SUFFIX}
+PACKAGE_TOP_DIR=cyassl.X/
+
+# Functions
+function checkReturnCode
+{
+    rc=$?
+    if [ $rc != 0 ]
+    then
+        exit $rc
+    fi
+}
+function makeDirectory
+# $1 directory path
+# $2 permission (optional)
+{
+    mkdir -p "$1"
+    checkReturnCode
+    if [ "$2" != "" ]
+    then
+      chmod $2 "$1"
+      checkReturnCode
+    fi
+}
+function copyFileToTmpDir
+# $1 from-file path
+# $2 to-file path
+# $3 permission
+{
+    cp "$1" "$2"
+    checkReturnCode
+    if [ "$3" != "" ]
+    then
+        chmod $3 "$2"
+        checkReturnCode
+    fi
+}
+
+# Setup
+cd "${TOP}"
+mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
+rm -rf ${TMPDIR}
+mkdir -p ${TMPDIR}
+
+# Copy files and create directories and links
+cd "${TOP}"
+makeDirectory ${TMPDIR}/cyassl.X/lib
+copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}lib/${OUTPUT_BASENAME}" 0644
+
+
+# Generate tar file
+cd "${TOP}"
+rm -f ${CND_DISTDIR}/${CND_CONF}/package/cyassl.X.tar
+cd ${TMPDIR}
+tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/cyassl.X.tar *
+checkReturnCode
+
+# Cleanup
+cd "${TOP}"
+rm -rf ${TMPDIR}
diff --git a/mcapi/cyassl.X/nbproject/include.am b/mcapi/cyassl.X/nbproject/include.am
index 163090026..fc7e8d972 100644
--- a/mcapi/cyassl.X/nbproject/include.am
+++ b/mcapi/cyassl.X/nbproject/include.am
@@ -3,7 +3,6 @@
 #
 
 EXTRA_DIST += \
-         mcapi/README \
          mcapi/cyassl.X/Makefile
 
 EXTRA_DIST += \
diff --git a/mcapi/include.am b/mcapi/include.am
index 7486c0fd5..993ba29c0 100644
--- a/mcapi/include.am
+++ b/mcapi/include.am
@@ -6,9 +6,14 @@ if BUILD_MCAPI
 check_PROGRAMS += mcapi/test
 noinst_PROGRAMS += mcapi/test 
 mcapi_test_SOURCES = mcapi/crypto.c \
-                     mcapi/test.c
+                     mcapi/mcapi_test.c
 mcapi_test_LDADD        = src/libcyassl.la 
 mcapi_test_DEPENDENCIES = src/libcyassl.la
 endif
 
 noinst_HEADERS += mcapi/crypto.h
+
+EXTRA_DIST += \
+         mcapi/README \
+		 mcapi/PIC32MZ-serial.h
+
diff --git a/mcapi/mcapi_test.c b/mcapi/mcapi_test.c
index c22618772..24e69174d 100644
--- a/mcapi/mcapi_test.c
+++ b/mcapi/mcapi_test.c
@@ -53,7 +53,7 @@
     #include 
     #include "PIC32MZ-serial.h"
     #define  SYSTEMConfigPerformance /* void out SYSTEMConfigPerformance(); */
-#else
+#elif defined(MICROCHIP_PIC32)
     #define PIC32_STARTER_KIT
     #include 
     #include 
@@ -61,6 +61,8 @@
     #include 
     #include 
     #define init_serial()  /* void out init_serial() */
+#else
+    #include   /* order matters above ? */
 #endif
 #define OUR_DATA_SIZE 1024
 static byte ourData[OUR_DATA_SIZE];
@@ -93,9 +95,11 @@ int main(int argc, char** argv)
     (void)argc;
     (void)argv;
 
+#if defined(MICROCHIP_PIC32)
     init_serial() ;  /* initialize PIC32MZ serial I/O */
     SYSTEMConfigPerformance(80000000);
     DBINIT();
+#endif
 
     /* align key, iv pointers */
     key = (byte*)XMALLOC(32, NULL, DYNAMIC_TYPE_KEY);
diff --git a/mcapi/zlib.X/nbproject/Makefile-default.mk b/mcapi/zlib.X/nbproject/Makefile-default.mk
new file mode 100644
index 000000000..7d2f68fae
--- /dev/null
+++ b/mcapi/zlib.X/nbproject/Makefile-default.mk
@@ -0,0 +1,314 @@
+#
+# Generated Makefile - do not edit!
+#
+# Edit the Makefile in the project folder instead (../Makefile). Each target
+# has a -pre and a -post target defined where you can add customized code.
+#
+# This makefile implements configuration specific macros and targets.
+
+
+# Include project Makefile
+ifeq "${IGNORE_LOCAL}" "TRUE"
+# do not include local makefile. User is passing all local related variables already
+else
+include Makefile
+# Include makefile containing local settings
+ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
+include nbproject/Makefile-local-default.mk
+endif
+endif
+
+# Environment
+MKDIR=gnumkdir -p
+RM=rm -f 
+MV=mv 
+CP=cp 
+
+# Macros
+CND_CONF=default
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+IMAGE_TYPE=debug
+OUTPUT_SUFFIX=a
+DEBUGGABLE_SUFFIX=
+FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}
+else
+IMAGE_TYPE=production
+OUTPUT_SUFFIX=a
+DEBUGGABLE_SUFFIX=
+FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}
+endif
+
+# Object Directory
+OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
+
+# Distribution Directory
+DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
+
+# Source Files Quoted if spaced
+SOURCEFILES_QUOTED_IF_SPACED=../../zlib-1.2.7/adler32.c ../../zlib-1.2.7/compress.c ../../zlib-1.2.7/crc32.c ../../zlib-1.2.7/deflate.c ../../zlib-1.2.7/gzclose.c ../../zlib-1.2.7/gzlib.c ../../zlib-1.2.7/gzread.c ../../zlib-1.2.7/gzwrite.c ../../zlib-1.2.7/infback.c ../../zlib-1.2.7/inffast.c ../../zlib-1.2.7/inflate.c ../../zlib-1.2.7/inftrees.c ../../zlib-1.2.7/trees.c ../../zlib-1.2.7/uncompr.c ../../zlib-1.2.7/zutil.c
+
+# Object Files Quoted if spaced
+OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/608321700/adler32.o ${OBJECTDIR}/_ext/608321700/compress.o ${OBJECTDIR}/_ext/608321700/crc32.o ${OBJECTDIR}/_ext/608321700/deflate.o ${OBJECTDIR}/_ext/608321700/gzclose.o ${OBJECTDIR}/_ext/608321700/gzlib.o ${OBJECTDIR}/_ext/608321700/gzread.o ${OBJECTDIR}/_ext/608321700/gzwrite.o ${OBJECTDIR}/_ext/608321700/infback.o ${OBJECTDIR}/_ext/608321700/inffast.o ${OBJECTDIR}/_ext/608321700/inflate.o ${OBJECTDIR}/_ext/608321700/inftrees.o ${OBJECTDIR}/_ext/608321700/trees.o ${OBJECTDIR}/_ext/608321700/uncompr.o ${OBJECTDIR}/_ext/608321700/zutil.o
+POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/608321700/adler32.o.d ${OBJECTDIR}/_ext/608321700/compress.o.d ${OBJECTDIR}/_ext/608321700/crc32.o.d ${OBJECTDIR}/_ext/608321700/deflate.o.d ${OBJECTDIR}/_ext/608321700/gzclose.o.d ${OBJECTDIR}/_ext/608321700/gzlib.o.d ${OBJECTDIR}/_ext/608321700/gzread.o.d ${OBJECTDIR}/_ext/608321700/gzwrite.o.d ${OBJECTDIR}/_ext/608321700/infback.o.d ${OBJECTDIR}/_ext/608321700/inffast.o.d ${OBJECTDIR}/_ext/608321700/inflate.o.d ${OBJECTDIR}/_ext/608321700/inftrees.o.d ${OBJECTDIR}/_ext/608321700/trees.o.d ${OBJECTDIR}/_ext/608321700/uncompr.o.d ${OBJECTDIR}/_ext/608321700/zutil.o.d
+
+# Object Files
+OBJECTFILES=${OBJECTDIR}/_ext/608321700/adler32.o ${OBJECTDIR}/_ext/608321700/compress.o ${OBJECTDIR}/_ext/608321700/crc32.o ${OBJECTDIR}/_ext/608321700/deflate.o ${OBJECTDIR}/_ext/608321700/gzclose.o ${OBJECTDIR}/_ext/608321700/gzlib.o ${OBJECTDIR}/_ext/608321700/gzread.o ${OBJECTDIR}/_ext/608321700/gzwrite.o ${OBJECTDIR}/_ext/608321700/infback.o ${OBJECTDIR}/_ext/608321700/inffast.o ${OBJECTDIR}/_ext/608321700/inflate.o ${OBJECTDIR}/_ext/608321700/inftrees.o ${OBJECTDIR}/_ext/608321700/trees.o ${OBJECTDIR}/_ext/608321700/uncompr.o ${OBJECTDIR}/_ext/608321700/zutil.o
+
+# Source Files
+SOURCEFILES=../../zlib-1.2.7/adler32.c ../../zlib-1.2.7/compress.c ../../zlib-1.2.7/crc32.c ../../zlib-1.2.7/deflate.c ../../zlib-1.2.7/gzclose.c ../../zlib-1.2.7/gzlib.c ../../zlib-1.2.7/gzread.c ../../zlib-1.2.7/gzwrite.c ../../zlib-1.2.7/infback.c ../../zlib-1.2.7/inffast.c ../../zlib-1.2.7/inflate.c ../../zlib-1.2.7/inftrees.c ../../zlib-1.2.7/trees.c ../../zlib-1.2.7/uncompr.c ../../zlib-1.2.7/zutil.c
+
+
+CFLAGS=
+ASFLAGS=
+LDLIBSOPTIONS=
+
+############# Tool locations ##########################################
+# If you copy a project from one host to another, the path where the  #
+# compiler is installed may be different.                             #
+# If you open this project with MPLAB X in the new host, this         #
+# makefile will be regenerated and the paths will be corrected.       #
+#######################################################################
+# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
+FIXDEPS=fixDeps
+
+.build-conf:  ${BUILD_SUBPROJECTS}
+	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}
+
+MP_PROCESSOR_OPTION=32MX795F512L
+MP_LINKER_FILE_OPTION=
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: assemble
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: assembleWithPreprocess
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: compile
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+${OBJECTDIR}/_ext/608321700/adler32.o: ../../zlib-1.2.7/adler32.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/adler32.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/adler32.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/adler32.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/adler32.o.d" -o ${OBJECTDIR}/_ext/608321700/adler32.o ../../zlib-1.2.7/adler32.c   
+	
+${OBJECTDIR}/_ext/608321700/compress.o: ../../zlib-1.2.7/compress.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/compress.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/compress.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/compress.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/compress.o.d" -o ${OBJECTDIR}/_ext/608321700/compress.o ../../zlib-1.2.7/compress.c   
+	
+${OBJECTDIR}/_ext/608321700/crc32.o: ../../zlib-1.2.7/crc32.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/crc32.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/crc32.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/crc32.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/crc32.o.d" -o ${OBJECTDIR}/_ext/608321700/crc32.o ../../zlib-1.2.7/crc32.c   
+	
+${OBJECTDIR}/_ext/608321700/deflate.o: ../../zlib-1.2.7/deflate.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/deflate.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/deflate.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/deflate.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/deflate.o.d" -o ${OBJECTDIR}/_ext/608321700/deflate.o ../../zlib-1.2.7/deflate.c   
+	
+${OBJECTDIR}/_ext/608321700/gzclose.o: ../../zlib-1.2.7/gzclose.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzclose.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzclose.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzclose.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzclose.o.d" -o ${OBJECTDIR}/_ext/608321700/gzclose.o ../../zlib-1.2.7/gzclose.c   
+	
+${OBJECTDIR}/_ext/608321700/gzlib.o: ../../zlib-1.2.7/gzlib.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzlib.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzlib.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzlib.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzlib.o.d" -o ${OBJECTDIR}/_ext/608321700/gzlib.o ../../zlib-1.2.7/gzlib.c   
+	
+${OBJECTDIR}/_ext/608321700/gzread.o: ../../zlib-1.2.7/gzread.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzread.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzread.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzread.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzread.o.d" -o ${OBJECTDIR}/_ext/608321700/gzread.o ../../zlib-1.2.7/gzread.c   
+	
+${OBJECTDIR}/_ext/608321700/gzwrite.o: ../../zlib-1.2.7/gzwrite.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzwrite.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzwrite.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzwrite.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzwrite.o.d" -o ${OBJECTDIR}/_ext/608321700/gzwrite.o ../../zlib-1.2.7/gzwrite.c   
+	
+${OBJECTDIR}/_ext/608321700/infback.o: ../../zlib-1.2.7/infback.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/infback.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/infback.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/infback.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/infback.o.d" -o ${OBJECTDIR}/_ext/608321700/infback.o ../../zlib-1.2.7/infback.c   
+	
+${OBJECTDIR}/_ext/608321700/inffast.o: ../../zlib-1.2.7/inffast.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/inffast.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/inffast.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inffast.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inffast.o.d" -o ${OBJECTDIR}/_ext/608321700/inffast.o ../../zlib-1.2.7/inffast.c   
+	
+${OBJECTDIR}/_ext/608321700/inflate.o: ../../zlib-1.2.7/inflate.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/inflate.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/inflate.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inflate.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inflate.o.d" -o ${OBJECTDIR}/_ext/608321700/inflate.o ../../zlib-1.2.7/inflate.c   
+	
+${OBJECTDIR}/_ext/608321700/inftrees.o: ../../zlib-1.2.7/inftrees.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/inftrees.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/inftrees.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inftrees.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inftrees.o.d" -o ${OBJECTDIR}/_ext/608321700/inftrees.o ../../zlib-1.2.7/inftrees.c   
+	
+${OBJECTDIR}/_ext/608321700/trees.o: ../../zlib-1.2.7/trees.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/trees.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/trees.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/trees.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/trees.o.d" -o ${OBJECTDIR}/_ext/608321700/trees.o ../../zlib-1.2.7/trees.c   
+	
+${OBJECTDIR}/_ext/608321700/uncompr.o: ../../zlib-1.2.7/uncompr.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/uncompr.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/uncompr.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/uncompr.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/uncompr.o.d" -o ${OBJECTDIR}/_ext/608321700/uncompr.o ../../zlib-1.2.7/uncompr.c   
+	
+${OBJECTDIR}/_ext/608321700/zutil.o: ../../zlib-1.2.7/zutil.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/zutil.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/zutil.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/zutil.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/zutil.o.d" -o ${OBJECTDIR}/_ext/608321700/zutil.o ../../zlib-1.2.7/zutil.c   
+	
+else
+${OBJECTDIR}/_ext/608321700/adler32.o: ../../zlib-1.2.7/adler32.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/adler32.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/adler32.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/adler32.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/adler32.o.d" -o ${OBJECTDIR}/_ext/608321700/adler32.o ../../zlib-1.2.7/adler32.c   
+	
+${OBJECTDIR}/_ext/608321700/compress.o: ../../zlib-1.2.7/compress.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/compress.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/compress.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/compress.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/compress.o.d" -o ${OBJECTDIR}/_ext/608321700/compress.o ../../zlib-1.2.7/compress.c   
+	
+${OBJECTDIR}/_ext/608321700/crc32.o: ../../zlib-1.2.7/crc32.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/crc32.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/crc32.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/crc32.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/crc32.o.d" -o ${OBJECTDIR}/_ext/608321700/crc32.o ../../zlib-1.2.7/crc32.c   
+	
+${OBJECTDIR}/_ext/608321700/deflate.o: ../../zlib-1.2.7/deflate.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/deflate.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/deflate.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/deflate.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/deflate.o.d" -o ${OBJECTDIR}/_ext/608321700/deflate.o ../../zlib-1.2.7/deflate.c   
+	
+${OBJECTDIR}/_ext/608321700/gzclose.o: ../../zlib-1.2.7/gzclose.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzclose.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzclose.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzclose.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzclose.o.d" -o ${OBJECTDIR}/_ext/608321700/gzclose.o ../../zlib-1.2.7/gzclose.c   
+	
+${OBJECTDIR}/_ext/608321700/gzlib.o: ../../zlib-1.2.7/gzlib.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzlib.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzlib.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzlib.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzlib.o.d" -o ${OBJECTDIR}/_ext/608321700/gzlib.o ../../zlib-1.2.7/gzlib.c   
+	
+${OBJECTDIR}/_ext/608321700/gzread.o: ../../zlib-1.2.7/gzread.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzread.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzread.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzread.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzread.o.d" -o ${OBJECTDIR}/_ext/608321700/gzread.o ../../zlib-1.2.7/gzread.c   
+	
+${OBJECTDIR}/_ext/608321700/gzwrite.o: ../../zlib-1.2.7/gzwrite.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzwrite.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/gzwrite.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzwrite.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzwrite.o.d" -o ${OBJECTDIR}/_ext/608321700/gzwrite.o ../../zlib-1.2.7/gzwrite.c   
+	
+${OBJECTDIR}/_ext/608321700/infback.o: ../../zlib-1.2.7/infback.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/infback.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/infback.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/infback.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/infback.o.d" -o ${OBJECTDIR}/_ext/608321700/infback.o ../../zlib-1.2.7/infback.c   
+	
+${OBJECTDIR}/_ext/608321700/inffast.o: ../../zlib-1.2.7/inffast.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/inffast.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/inffast.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inffast.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inffast.o.d" -o ${OBJECTDIR}/_ext/608321700/inffast.o ../../zlib-1.2.7/inffast.c   
+	
+${OBJECTDIR}/_ext/608321700/inflate.o: ../../zlib-1.2.7/inflate.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/inflate.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/inflate.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inflate.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inflate.o.d" -o ${OBJECTDIR}/_ext/608321700/inflate.o ../../zlib-1.2.7/inflate.c   
+	
+${OBJECTDIR}/_ext/608321700/inftrees.o: ../../zlib-1.2.7/inftrees.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/inftrees.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/inftrees.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inftrees.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inftrees.o.d" -o ${OBJECTDIR}/_ext/608321700/inftrees.o ../../zlib-1.2.7/inftrees.c   
+	
+${OBJECTDIR}/_ext/608321700/trees.o: ../../zlib-1.2.7/trees.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/trees.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/trees.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/trees.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/trees.o.d" -o ${OBJECTDIR}/_ext/608321700/trees.o ../../zlib-1.2.7/trees.c   
+	
+${OBJECTDIR}/_ext/608321700/uncompr.o: ../../zlib-1.2.7/uncompr.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/uncompr.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/uncompr.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/uncompr.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/uncompr.o.d" -o ${OBJECTDIR}/_ext/608321700/uncompr.o ../../zlib-1.2.7/uncompr.c   
+	
+${OBJECTDIR}/_ext/608321700/zutil.o: ../../zlib-1.2.7/zutil.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
+	@${RM} ${OBJECTDIR}/_ext/608321700/zutil.o.d 
+	@${RM} ${OBJECTDIR}/_ext/608321700/zutil.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/zutil.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/zutil.o.d" -o ${OBJECTDIR}/_ext/608321700/zutil.o ../../zlib-1.2.7/zutil.c   
+	
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: compileCPP
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: archive
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk    
+	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
+	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
+else
+dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk   
+	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
+	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
+endif
+
+
+# Subprojects
+.build-subprojects:
+
+
+# Subprojects
+.clean-subprojects:
+
+# Clean Targets
+.clean-conf: ${CLEAN_SUBPROJECTS}
+	${RM} -r build/default
+	${RM} -r dist/default
+
+# Enable dependency checking
+.dep.inc: .depcheck-impl
+
+DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
+ifneq (${DEPFILES},)
+include ${DEPFILES}
+endif
diff --git a/mcapi/zlib.X/nbproject/Makefile-genesis.properties b/mcapi/zlib.X/nbproject/Makefile-genesis.properties
new file mode 100644
index 000000000..c3e8ca8d5
--- /dev/null
+++ b/mcapi/zlib.X/nbproject/Makefile-genesis.properties
@@ -0,0 +1,8 @@
+#
+#Mon Feb 24 10:53:41 JST 2014
+default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
+default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30-TC9\\bin
+com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
+default.languagetoolchain.version=1.30
+host.platform=windows
+conf.ids=default
diff --git a/mcapi/zlib.X/nbproject/Makefile-impl.mk b/mcapi/zlib.X/nbproject/Makefile-impl.mk
new file mode 100644
index 000000000..df37d06fb
--- /dev/null
+++ b/mcapi/zlib.X/nbproject/Makefile-impl.mk
@@ -0,0 +1,69 @@
+#
+# Generated Makefile - do not edit!
+#
+# Edit the Makefile in the project folder instead (../Makefile). Each target
+# has a pre- and a post- target defined where you can add customization code.
+#
+# This makefile implements macros and targets common to all configurations.
+#
+# NOCDDL
+
+
+# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
+# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
+# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
+# and .clean-reqprojects-conf unless SUB has the value 'no'
+SUB_no=NO
+SUBPROJECTS=${SUB_${SUB}}
+BUILD_SUBPROJECTS_=.build-subprojects
+BUILD_SUBPROJECTS_NO=
+BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
+CLEAN_SUBPROJECTS_=.clean-subprojects
+CLEAN_SUBPROJECTS_NO=
+CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
+
+
+# Project Name
+PROJECTNAME=zlib.X
+
+# Active Configuration
+DEFAULTCONF=default
+CONF=${DEFAULTCONF}
+
+# All Configurations
+ALLCONFS=default 
+
+
+# build
+.build-impl: .build-pre
+	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
+
+
+# clean
+.clean-impl: .clean-pre
+	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
+
+# clobber
+.clobber-impl: .clobber-pre .depcheck-impl
+	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
+
+
+
+# all
+.all-impl: .all-pre .depcheck-impl
+	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
+
+
+
+# dependency checking support
+.depcheck-impl:
+#	@echo "# This code depends on make tool being used" >.dep.inc
+#	@if [ -n "${MAKE_VERSION}" ]; then \
+#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
+#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
+#	    echo "include \$${DEPFILES}" >>.dep.inc; \
+#	    echo "endif" >>.dep.inc; \
+#	else \
+#	    echo ".KEEP_STATE:" >>.dep.inc; \
+#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
+#	fi
diff --git a/mcapi/zlib.X/nbproject/Makefile-local-default.mk b/mcapi/zlib.X/nbproject/Makefile-local-default.mk
new file mode 100644
index 000000000..2d8424143
--- /dev/null
+++ b/mcapi/zlib.X/nbproject/Makefile-local-default.mk
@@ -0,0 +1,37 @@
+#
+# Generated Makefile - do not edit!
+#
+#
+# This file contains information about the location of compilers and other tools.
+# If you commmit this file into your revision control server, you will be able to 
+# to checkout the project and build it from the command line with make. However,
+# if more than one person works on the same project, then this file might show
+# conflicts since different users are bound to have compilers in different places.
+# In that case you might choose to not commit this file and let MPLAB X recreate this file
+# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
+# least once so the file gets created and the project can be built. Finally, you can also
+# avoid using this file at all if you are only building from the command line with make.
+# You can invoke make with the values of the macros:
+# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
+#
+SHELL=cmd.exe
+PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
+# Adding MPLAB X bin directory to path.
+PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
+# Path to java used to run MPLAB X when this makefile was created
+MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
+OS_CURRENT="$(shell uname -s)"
+MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-gcc.exe"
+MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-g++.exe"
+# MP_BC is not defined
+MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-as.exe"
+MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-ld.exe"
+MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-ar.exe"
+DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
+MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+# MP_BC_DIR is not defined
+MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
+# MP_BC_DIR is not defined
diff --git a/mcapi/zlib.X/nbproject/Makefile-variables.mk b/mcapi/zlib.X/nbproject/Makefile-variables.mk
new file mode 100644
index 000000000..6d21f14b9
--- /dev/null
+++ b/mcapi/zlib.X/nbproject/Makefile-variables.mk
@@ -0,0 +1,13 @@
+#
+# Generated - do not edit!
+#
+# NOCDDL
+#
+CND_BASEDIR=`pwd`
+# default configuration
+CND_ARTIFACT_DIR_default=dist/default/production
+CND_ARTIFACT_NAME_default=zlib.X.a
+CND_ARTIFACT_PATH_default=dist/default/production/zlib.X.a
+CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
+CND_PACKAGE_NAME_default=zlib.X.tar
+CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/zlib.X.tar
diff --git a/mcapi/zlib.X/nbproject/Package-default.bash b/mcapi/zlib.X/nbproject/Package-default.bash
new file mode 100644
index 000000000..66c5b0bd9
--- /dev/null
+++ b/mcapi/zlib.X/nbproject/Package-default.bash
@@ -0,0 +1,73 @@
+#!/bin/bash -x
+
+#
+# Generated - do not edit!
+#
+
+# Macros
+TOP=`pwd`
+CND_CONF=default
+CND_DISTDIR=dist
+TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
+TMPDIRNAME=tmp-packaging
+OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}
+OUTPUT_BASENAME=zlib.X.${OUTPUT_SUFFIX}
+PACKAGE_TOP_DIR=zlib.X/
+
+# Functions
+function checkReturnCode
+{
+    rc=$?
+    if [ $rc != 0 ]
+    then
+        exit $rc
+    fi
+}
+function makeDirectory
+# $1 directory path
+# $2 permission (optional)
+{
+    mkdir -p "$1"
+    checkReturnCode
+    if [ "$2" != "" ]
+    then
+      chmod $2 "$1"
+      checkReturnCode
+    fi
+}
+function copyFileToTmpDir
+# $1 from-file path
+# $2 to-file path
+# $3 permission
+{
+    cp "$1" "$2"
+    checkReturnCode
+    if [ "$3" != "" ]
+    then
+        chmod $3 "$2"
+        checkReturnCode
+    fi
+}
+
+# Setup
+cd "${TOP}"
+mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
+rm -rf ${TMPDIR}
+mkdir -p ${TMPDIR}
+
+# Copy files and create directories and links
+cd "${TOP}"
+makeDirectory ${TMPDIR}/zlib.X/lib
+copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}lib/${OUTPUT_BASENAME}" 0644
+
+
+# Generate tar file
+cd "${TOP}"
+rm -f ${CND_DISTDIR}/${CND_CONF}/package/zlib.X.tar
+cd ${TMPDIR}
+tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/zlib.X.tar *
+checkReturnCode
+
+# Cleanup
+cd "${TOP}"
+rm -rf ${TMPDIR}
diff --git a/mplabx/PIC32MZ-Putc.c b/mplabx/PIC32MZ-Putc.c
deleted file mode 100644
index d77c4794d..000000000
--- a/mplabx/PIC32MZ-Putc.c
+++ /dev/null
@@ -1,10 +0,0 @@
-
-#ifdef MICROCHIP_PIC32
-#if defined (__32MZ2048ECH144__) || defined (__32MZ2048ECM144__)
-void _mon_putc (char c)
-{
-    while (U2STAbits.UTXBF);
-    U2TXREG = c;
-}
-#endif
-#endif
\ No newline at end of file
diff --git a/mplabx/benchmark_main.c b/mplabx/benchmark_main.c
index f9c0bdaef..de98d44d3 100644
--- a/mplabx/benchmark_main.c
+++ b/mplabx/benchmark_main.c
@@ -18,6 +18,13 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+
 #if defined(CYASSL_MICROCHIP_PIC32MZ)
     #define MICROCHIP_PIC32
     #include 
diff --git a/mplabx/crypto.h b/mplabx/crypto.h
new file mode 100644
index 000000000..76dccadff
--- /dev/null
+++ b/mplabx/crypto.h
@@ -0,0 +1,82 @@
+/*
+ * File:   crypto.h
+ * Author: C15009
+ *
+ * Created on July 23, 2013, 12:26 PM
+ */
+
+#ifndef CRYPTO_H
+#define	CRYPTO_H
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+    typedef struct saCtrl {
+        unsigned int CRYPTOALGO : 4;
+        unsigned int MULTITASK : 3;
+        unsigned int KEYSIZE : 2;
+        unsigned int ENCTYPE : 1;
+        unsigned int ALGO : 7;
+        unsigned int : 3;
+        unsigned int FLAGS : 1;
+        unsigned int FB : 1;
+        unsigned int LOADIV : 1;
+        unsigned int LNC : 1;
+        unsigned int IRFLAG : 1;
+        unsigned int ICVONLY : 1;
+        unsigned int OR_EN : 1;
+        unsigned int NO_RX : 1;
+        unsigned int : 1;
+        unsigned int VERIFY : 1;
+        unsigned int : 2;
+    } saCtrl;
+
+    typedef struct securityAssociation {
+        saCtrl SA_CTRL;
+        unsigned int SA_AUTHKEY[8];
+        unsigned int SA_ENCKEY[8];
+        unsigned int SA_AUTHIV[8];
+        unsigned int SA_ENCIV[4];
+    } securityAssociation;
+
+    typedef struct bdCtrl {
+        unsigned int BUFLEN : 16;
+        unsigned int CBD_INT_EN : 1;
+        unsigned int PKT_INT_EN : 1;
+        unsigned int LIFM : 1;
+        unsigned int LAST_BD: 1;
+        unsigned int : 2;
+        unsigned int SA_FETCH_EN : 1;
+        unsigned int : 4;
+        unsigned int CRY_MODE: 3;
+        unsigned int : 1;
+        unsigned int DESC_EN : 1;
+        /* Naveen did this
+        unsigned int CRDMA_EN: 1;
+        unsigned int UPD_RES : 1;
+        unsigned int SA_FETCH_EN : 1;
+        unsigned int SEC_CODE : 1;
+        unsigned int : 7;
+        unsigned int DESC_EN : 1; */
+    } bdCtrl;
+
+    typedef struct bufferDescriptor {
+        bdCtrl BD_CTRL;
+//        unsigned int BD_CTRL;
+        unsigned int SA_ADDR;
+        unsigned int SRCADDR;
+        unsigned int DSTADDR;
+        unsigned int NXTPTR;
+        unsigned int UPDPTR;
+        unsigned int MSGLEN;
+        unsigned int ENCOFF;
+    } bufferDescriptor;
+
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif	/* CRYPTO_H */
+
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-default.mk b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-default.mk
new file mode 100644
index 000000000..2ca7717ba
--- /dev/null
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-default.mk
@@ -0,0 +1,162 @@
+#
+# Generated Makefile - do not edit!
+#
+# Edit the Makefile in the project folder instead (../Makefile). Each target
+# has a -pre and a -post target defined where you can add customized code.
+#
+# This makefile implements configuration specific macros and targets.
+
+
+# Include project Makefile
+ifeq "${IGNORE_LOCAL}" "TRUE"
+# do not include local makefile. User is passing all local related variables already
+else
+include Makefile
+# Include makefile containing local settings
+ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
+include nbproject/Makefile-local-default.mk
+endif
+endif
+
+# Environment
+MKDIR=gnumkdir -p
+RM=rm -f 
+MV=mv 
+CP=cp 
+
+# Macros
+CND_CONF=default
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+IMAGE_TYPE=debug
+OUTPUT_SUFFIX=elf
+DEBUGGABLE_SUFFIX=elf
+FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+else
+IMAGE_TYPE=production
+OUTPUT_SUFFIX=hex
+DEBUGGABLE_SUFFIX=elf
+FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+endif
+
+# Object Directory
+OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
+
+# Distribution Directory
+DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
+
+# Source Files Quoted if spaced
+SOURCEFILES_QUOTED_IF_SPACED=../../ctaocrypt/benchmark/benchmark.c ../benchmark_main.c
+
+# Object Files Quoted if spaced
+OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/2132364733/benchmark.o ${OBJECTDIR}/_ext/1472/benchmark_main.o
+POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/2132364733/benchmark.o.d ${OBJECTDIR}/_ext/1472/benchmark_main.o.d
+
+# Object Files
+OBJECTFILES=${OBJECTDIR}/_ext/2132364733/benchmark.o ${OBJECTDIR}/_ext/1472/benchmark_main.o
+
+# Source Files
+SOURCEFILES=../../ctaocrypt/benchmark/benchmark.c ../benchmark_main.c
+
+
+CFLAGS=
+ASFLAGS=
+LDLIBSOPTIONS=
+
+############# Tool locations ##########################################
+# If you copy a project from one host to another, the path where the  #
+# compiler is installed may be different.                             #
+# If you open this project with MPLAB X in the new host, this         #
+# makefile will be regenerated and the paths will be corrected.       #
+#######################################################################
+# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
+FIXDEPS=fixDeps
+
+.build-conf:  ${BUILD_SUBPROJECTS}
+	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+
+MP_PROCESSOR_OPTION=32MZ2048ECM144
+MP_LINKER_FILE_OPTION=
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: assemble
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: assembleWithPreprocess
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: compile
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+${OBJECTDIR}/_ext/2132364733/benchmark.o: ../../ctaocrypt/benchmark/benchmark.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/2132364733 
+	@${RM} ${OBJECTDIR}/_ext/2132364733/benchmark.o.d 
+	@${RM} ${OBJECTDIR}/_ext/2132364733/benchmark.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/2132364733/benchmark.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O1 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DBENCH_EMBEDDED -DHAVE_ECC -DCYASSL_SHA512 -I"../../" -MMD -MF "${OBJECTDIR}/_ext/2132364733/benchmark.o.d" -o ${OBJECTDIR}/_ext/2132364733/benchmark.o ../../ctaocrypt/benchmark/benchmark.c   
+	
+${OBJECTDIR}/_ext/1472/benchmark_main.o: ../benchmark_main.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1472 
+	@${RM} ${OBJECTDIR}/_ext/1472/benchmark_main.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1472/benchmark_main.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1472/benchmark_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O1 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DBENCH_EMBEDDED -DHAVE_ECC -DCYASSL_SHA512 -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1472/benchmark_main.o.d" -o ${OBJECTDIR}/_ext/1472/benchmark_main.o ../benchmark_main.c   
+	
+else
+${OBJECTDIR}/_ext/2132364733/benchmark.o: ../../ctaocrypt/benchmark/benchmark.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/2132364733 
+	@${RM} ${OBJECTDIR}/_ext/2132364733/benchmark.o.d 
+	@${RM} ${OBJECTDIR}/_ext/2132364733/benchmark.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/2132364733/benchmark.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O1 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DBENCH_EMBEDDED -DHAVE_ECC -DCYASSL_SHA512 -I"../../" -MMD -MF "${OBJECTDIR}/_ext/2132364733/benchmark.o.d" -o ${OBJECTDIR}/_ext/2132364733/benchmark.o ../../ctaocrypt/benchmark/benchmark.c   
+	
+${OBJECTDIR}/_ext/1472/benchmark_main.o: ../benchmark_main.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1472 
+	@${RM} ${OBJECTDIR}/_ext/1472/benchmark_main.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1472/benchmark_main.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1472/benchmark_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O1 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DBENCH_EMBEDDED -DHAVE_ECC -DCYASSL_SHA512 -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1472/benchmark_main.o.d" -o ${OBJECTDIR}/_ext/1472/benchmark_main.o ../benchmark_main.c   
+	
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: compileCPP
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: link
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/debug/cyassl.X.a  
+	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
+	${MP_CC} $(MP_EXTRA_LD_PRE)  -mdebugger -D__MPLAB_DEBUGGER_PK3=1 -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\debug\cyassl.X.a       -mreserve=data@0x0:0x27F   -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=__MPLAB_DEBUG=1,--defsym=__DEBUG=1,--defsym=__MPLAB_DEBUGGER_PK3=1,--defsym=_min_heap_size=20480,--defsym=_min_stack_size=20480
+	
+else
+dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/production/cyassl.X.a 
+	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
+	${MP_CC} $(MP_EXTRA_LD_PRE)  -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\production\cyassl.X.a      -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=_min_heap_size=20480,--defsym=_min_stack_size=20480
+	${MP_CC_DIR}\\xc32-bin2hex dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} 
+endif
+
+
+# Subprojects
+.build-subprojects:
+	cd /D ../cyassl.X && ${MAKE} MAKE_OPTIONS="" -f Makefile CONF=default
+
+
+# Subprojects
+.clean-subprojects:
+	cd /D ../cyassl.X && rm -rf "build/default" "dist/default"
+
+# Clean Targets
+.clean-conf: ${CLEAN_SUBPROJECTS}
+	${RM} -r build/default
+	${RM} -r dist/default
+
+# Enable dependency checking
+.dep.inc: .depcheck-impl
+
+DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
+ifneq (${DEPFILES},)
+include ${DEPFILES}
+endif
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-genesis.properties b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-genesis.properties
new file mode 100644
index 000000000..996a3b7f3
--- /dev/null
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-genesis.properties
@@ -0,0 +1,8 @@
+#
+#Tue Mar 04 21:07:46 JST 2014
+default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
+default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30\\bin
+com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
+default.languagetoolchain.version=1.30
+host.platform=windows
+conf.ids=default
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-impl.mk b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-impl.mk
new file mode 100644
index 000000000..3d6aa0df3
--- /dev/null
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-impl.mk
@@ -0,0 +1,69 @@
+#
+# Generated Makefile - do not edit!
+#
+# Edit the Makefile in the project folder instead (../Makefile). Each target
+# has a pre- and a post- target defined where you can add customization code.
+#
+# This makefile implements macros and targets common to all configurations.
+#
+# NOCDDL
+
+
+# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
+# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
+# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
+# and .clean-reqprojects-conf unless SUB has the value 'no'
+SUB_no=NO
+SUBPROJECTS=${SUB_${SUB}}
+BUILD_SUBPROJECTS_=.build-subprojects
+BUILD_SUBPROJECTS_NO=
+BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
+CLEAN_SUBPROJECTS_=.clean-subprojects
+CLEAN_SUBPROJECTS_NO=
+CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
+
+
+# Project Name
+PROJECTNAME=ctaocrypt_benchmark.X
+
+# Active Configuration
+DEFAULTCONF=default
+CONF=${DEFAULTCONF}
+
+# All Configurations
+ALLCONFS=default 
+
+
+# build
+.build-impl: .build-pre
+	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
+
+
+# clean
+.clean-impl: .clean-pre
+	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
+
+# clobber
+.clobber-impl: .clobber-pre .depcheck-impl
+	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
+
+
+
+# all
+.all-impl: .all-pre .depcheck-impl
+	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
+
+
+
+# dependency checking support
+.depcheck-impl:
+#	@echo "# This code depends on make tool being used" >.dep.inc
+#	@if [ -n "${MAKE_VERSION}" ]; then \
+#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
+#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
+#	    echo "include \$${DEPFILES}" >>.dep.inc; \
+#	    echo "endif" >>.dep.inc; \
+#	else \
+#	    echo ".KEEP_STATE:" >>.dep.inc; \
+#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
+#	fi
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-local-default.mk b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-local-default.mk
new file mode 100644
index 000000000..3350f874d
--- /dev/null
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-local-default.mk
@@ -0,0 +1,37 @@
+#
+# Generated Makefile - do not edit!
+#
+#
+# This file contains information about the location of compilers and other tools.
+# If you commmit this file into your revision control server, you will be able to 
+# to checkout the project and build it from the command line with make. However,
+# if more than one person works on the same project, then this file might show
+# conflicts since different users are bound to have compilers in different places.
+# In that case you might choose to not commit this file and let MPLAB X recreate this file
+# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
+# least once so the file gets created and the project can be built. Finally, you can also
+# avoid using this file at all if you are only building from the command line with make.
+# You can invoke make with the values of the macros:
+# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
+#
+SHELL=cmd.exe
+PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
+# Adding MPLAB X bin directory to path.
+PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
+# Path to java used to run MPLAB X when this makefile was created
+MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
+OS_CURRENT="$(shell uname -s)"
+MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-gcc.exe"
+MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-g++.exe"
+# MP_BC is not defined
+MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-as.exe"
+MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ld.exe"
+MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ar.exe"
+DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
+MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+# MP_BC_DIR is not defined
+MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+# MP_BC_DIR is not defined
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-variables.mk b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-variables.mk
new file mode 100644
index 000000000..479dfc45e
--- /dev/null
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-variables.mk
@@ -0,0 +1,13 @@
+#
+# Generated - do not edit!
+#
+# NOCDDL
+#
+CND_BASEDIR=`pwd`
+# default configuration
+CND_ARTIFACT_DIR_default=dist/default/production
+CND_ARTIFACT_NAME_default=ctaocrypt_benchmark.X.production.hex
+CND_ARTIFACT_PATH_default=dist/default/production/ctaocrypt_benchmark.X.production.hex
+CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
+CND_PACKAGE_NAME_default=ctaocryptbenchmark.x.tar
+CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/ctaocryptbenchmark.x.tar
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Package-default.bash b/mplabx/ctaocrypt_benchmark.X/nbproject/Package-default.bash
new file mode 100644
index 000000000..869e322bf
--- /dev/null
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/Package-default.bash
@@ -0,0 +1,73 @@
+#!/bin/bash -x
+
+#
+# Generated - do not edit!
+#
+
+# Macros
+TOP=`pwd`
+CND_CONF=default
+CND_DISTDIR=dist
+TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
+TMPDIRNAME=tmp-packaging
+OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+OUTPUT_BASENAME=ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+PACKAGE_TOP_DIR=ctaocryptbenchmark.x/
+
+# Functions
+function checkReturnCode
+{
+    rc=$?
+    if [ $rc != 0 ]
+    then
+        exit $rc
+    fi
+}
+function makeDirectory
+# $1 directory path
+# $2 permission (optional)
+{
+    mkdir -p "$1"
+    checkReturnCode
+    if [ "$2" != "" ]
+    then
+      chmod $2 "$1"
+      checkReturnCode
+    fi
+}
+function copyFileToTmpDir
+# $1 from-file path
+# $2 to-file path
+# $3 permission
+{
+    cp "$1" "$2"
+    checkReturnCode
+    if [ "$3" != "" ]
+    then
+        chmod $3 "$2"
+        checkReturnCode
+    fi
+}
+
+# Setup
+cd "${TOP}"
+mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
+rm -rf ${TMPDIR}
+mkdir -p ${TMPDIR}
+
+# Copy files and create directories and links
+cd "${TOP}"
+makeDirectory ${TMPDIR}/ctaocryptbenchmark.x/bin
+copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}bin/${OUTPUT_BASENAME}" 0755
+
+
+# Generate tar file
+cd "${TOP}"
+rm -f ${CND_DISTDIR}/${CND_CONF}/package/ctaocryptbenchmark.x.tar
+cd ${TMPDIR}
+tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/ctaocryptbenchmark.x.tar *
+checkReturnCode
+
+# Cleanup
+cd "${TOP}"
+rm -rf ${TMPDIR}
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml b/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
index 1b9409815..e752de2df 100644
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
@@ -29,10 +29,10 @@
     
       
         localhost
-        PIC32MX795F512L
+        PIC32MZ2048ECM144
         
         
-        SKDEPIC32PlatformTool
+        PKOBSKDEPlatformTool
         XC32
         1.30
         3
@@ -166,8 +166,28 @@
         
         
       
-      
-      
+      
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
     
   
 
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/include.am b/mplabx/ctaocrypt_benchmark.X/nbproject/include.am
index 567fbba38..9af74c3b8 100644
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/include.am
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/include.am
@@ -3,8 +3,7 @@
 #
 
 EXTRA_DIST += \
-         mplabx/ctaocrypt_benchmark.X/Makefile \
-         mplabx/ctaocrypt_benchmark.X/main.c
+         mplabx/ctaocrypt_benchmark.X/Makefile
 
 EXTRA_DIST += \
          mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml \
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/private/private.xml b/mplabx/ctaocrypt_benchmark.X/nbproject/private/private.xml
new file mode 100644
index 000000000..e39667075
--- /dev/null
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/private/private.xml
@@ -0,0 +1,3 @@
+
+    
+
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-default.mk b/mplabx/ctaocrypt_test.X/nbproject/Makefile-default.mk
new file mode 100644
index 000000000..0b3936f76
--- /dev/null
+++ b/mplabx/ctaocrypt_test.X/nbproject/Makefile-default.mk
@@ -0,0 +1,162 @@
+#
+# Generated Makefile - do not edit!
+#
+# Edit the Makefile in the project folder instead (../Makefile). Each target
+# has a -pre and a -post target defined where you can add customized code.
+#
+# This makefile implements configuration specific macros and targets.
+
+
+# Include project Makefile
+ifeq "${IGNORE_LOCAL}" "TRUE"
+# do not include local makefile. User is passing all local related variables already
+else
+include Makefile
+# Include makefile containing local settings
+ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
+include nbproject/Makefile-local-default.mk
+endif
+endif
+
+# Environment
+MKDIR=gnumkdir -p
+RM=rm -f 
+MV=mv 
+CP=cp 
+
+# Macros
+CND_CONF=default
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+IMAGE_TYPE=debug
+OUTPUT_SUFFIX=elf
+DEBUGGABLE_SUFFIX=elf
+FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+else
+IMAGE_TYPE=production
+OUTPUT_SUFFIX=hex
+DEBUGGABLE_SUFFIX=elf
+FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+endif
+
+# Object Directory
+OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
+
+# Distribution Directory
+DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
+
+# Source Files Quoted if spaced
+SOURCEFILES_QUOTED_IF_SPACED=../../ctaocrypt/test/test.c ../test_main.c
+
+# Object Files Quoted if spaced
+OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/1679622190/test.o ${OBJECTDIR}/_ext/1472/test_main.o
+POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/1679622190/test.o.d ${OBJECTDIR}/_ext/1472/test_main.o.d
+
+# Object Files
+OBJECTFILES=${OBJECTDIR}/_ext/1679622190/test.o ${OBJECTDIR}/_ext/1472/test_main.o
+
+# Source Files
+SOURCEFILES=../../ctaocrypt/test/test.c ../test_main.c
+
+
+CFLAGS=
+ASFLAGS=
+LDLIBSOPTIONS=
+
+############# Tool locations ##########################################
+# If you copy a project from one host to another, the path where the  #
+# compiler is installed may be different.                             #
+# If you open this project with MPLAB X in the new host, this         #
+# makefile will be regenerated and the paths will be corrected.       #
+#######################################################################
+# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
+FIXDEPS=fixDeps
+
+.build-conf:  ${BUILD_SUBPROJECTS}
+	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+
+MP_PROCESSOR_OPTION=32MZ2048ECM144
+MP_LINKER_FILE_OPTION=
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: assemble
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: assembleWithPreprocess
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: compile
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+${OBJECTDIR}/_ext/1679622190/test.o: ../../ctaocrypt/test/test.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1679622190 
+	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1679622190/test.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1679622190/test.o.d" -o ${OBJECTDIR}/_ext/1679622190/test.o ../../ctaocrypt/test/test.c   
+	
+${OBJECTDIR}/_ext/1472/test_main.o: ../test_main.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1472 
+	@${RM} ${OBJECTDIR}/_ext/1472/test_main.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1472/test_main.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1472/test_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1472/test_main.o.d" -o ${OBJECTDIR}/_ext/1472/test_main.o ../test_main.c   
+	
+else
+${OBJECTDIR}/_ext/1679622190/test.o: ../../ctaocrypt/test/test.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1679622190 
+	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1679622190/test.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1679622190/test.o.d" -o ${OBJECTDIR}/_ext/1679622190/test.o ../../ctaocrypt/test/test.c   
+	
+${OBJECTDIR}/_ext/1472/test_main.o: ../test_main.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1472 
+	@${RM} ${OBJECTDIR}/_ext/1472/test_main.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1472/test_main.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1472/test_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1472/test_main.o.d" -o ${OBJECTDIR}/_ext/1472/test_main.o ../test_main.c   
+	
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: compileCPP
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: link
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/debug/cyassl.X.a  
+	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
+	${MP_CC} $(MP_EXTRA_LD_PRE)  -mdebugger -D__MPLAB_DEBUGGER_PK3=1 -mprocessor=$(MP_PROCESSOR_OPTION) -Os -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\debug\cyassl.X.a       -mreserve=data@0x0:0x27F   -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=__MPLAB_DEBUG=1,--defsym=__DEBUG=1,--defsym=__MPLAB_DEBUGGER_PK3=1,--defsym=_min_heap_size=20480,--gc-sections
+	
+else
+dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/production/cyassl.X.a 
+	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
+	${MP_CC} $(MP_EXTRA_LD_PRE)  -mprocessor=$(MP_PROCESSOR_OPTION) -Os -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\production\cyassl.X.a      -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=_min_heap_size=20480,--gc-sections
+	${MP_CC_DIR}\\xc32-bin2hex dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} 
+endif
+
+
+# Subprojects
+.build-subprojects:
+	cd /D ../cyassl.X && ${MAKE} MAKE_OPTIONS="" -f Makefile CONF=default
+
+
+# Subprojects
+.clean-subprojects:
+	cd /D ../cyassl.X && rm -rf "build/default" "dist/default"
+
+# Clean Targets
+.clean-conf: ${CLEAN_SUBPROJECTS}
+	${RM} -r build/default
+	${RM} -r dist/default
+
+# Enable dependency checking
+.dep.inc: .depcheck-impl
+
+DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
+ifneq (${DEPFILES},)
+include ${DEPFILES}
+endif
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-genesis.properties b/mplabx/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
new file mode 100644
index 000000000..f6865cdde
--- /dev/null
+++ b/mplabx/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
@@ -0,0 +1,8 @@
+#
+#Tue Mar 04 21:12:11 JST 2014
+default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
+default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30\\bin
+com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
+default.languagetoolchain.version=1.30
+host.platform=windows
+conf.ids=default
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-impl.mk b/mplabx/ctaocrypt_test.X/nbproject/Makefile-impl.mk
new file mode 100644
index 000000000..32630f76c
--- /dev/null
+++ b/mplabx/ctaocrypt_test.X/nbproject/Makefile-impl.mk
@@ -0,0 +1,69 @@
+#
+# Generated Makefile - do not edit!
+#
+# Edit the Makefile in the project folder instead (../Makefile). Each target
+# has a pre- and a post- target defined where you can add customization code.
+#
+# This makefile implements macros and targets common to all configurations.
+#
+# NOCDDL
+
+
+# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
+# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
+# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
+# and .clean-reqprojects-conf unless SUB has the value 'no'
+SUB_no=NO
+SUBPROJECTS=${SUB_${SUB}}
+BUILD_SUBPROJECTS_=.build-subprojects
+BUILD_SUBPROJECTS_NO=
+BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
+CLEAN_SUBPROJECTS_=.clean-subprojects
+CLEAN_SUBPROJECTS_NO=
+CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
+
+
+# Project Name
+PROJECTNAME=ctaocrypt_test.X
+
+# Active Configuration
+DEFAULTCONF=default
+CONF=${DEFAULTCONF}
+
+# All Configurations
+ALLCONFS=default 
+
+
+# build
+.build-impl: .build-pre
+	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
+
+
+# clean
+.clean-impl: .clean-pre
+	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
+
+# clobber
+.clobber-impl: .clobber-pre .depcheck-impl
+	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
+
+
+
+# all
+.all-impl: .all-pre .depcheck-impl
+	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
+
+
+
+# dependency checking support
+.depcheck-impl:
+#	@echo "# This code depends on make tool being used" >.dep.inc
+#	@if [ -n "${MAKE_VERSION}" ]; then \
+#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
+#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
+#	    echo "include \$${DEPFILES}" >>.dep.inc; \
+#	    echo "endif" >>.dep.inc; \
+#	else \
+#	    echo ".KEEP_STATE:" >>.dep.inc; \
+#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
+#	fi
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-local-default.mk b/mplabx/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
new file mode 100644
index 000000000..3350f874d
--- /dev/null
+++ b/mplabx/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
@@ -0,0 +1,37 @@
+#
+# Generated Makefile - do not edit!
+#
+#
+# This file contains information about the location of compilers and other tools.
+# If you commmit this file into your revision control server, you will be able to 
+# to checkout the project and build it from the command line with make. However,
+# if more than one person works on the same project, then this file might show
+# conflicts since different users are bound to have compilers in different places.
+# In that case you might choose to not commit this file and let MPLAB X recreate this file
+# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
+# least once so the file gets created and the project can be built. Finally, you can also
+# avoid using this file at all if you are only building from the command line with make.
+# You can invoke make with the values of the macros:
+# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
+#
+SHELL=cmd.exe
+PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
+# Adding MPLAB X bin directory to path.
+PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
+# Path to java used to run MPLAB X when this makefile was created
+MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
+OS_CURRENT="$(shell uname -s)"
+MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-gcc.exe"
+MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-g++.exe"
+# MP_BC is not defined
+MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-as.exe"
+MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ld.exe"
+MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ar.exe"
+DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
+MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+# MP_BC_DIR is not defined
+MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+# MP_BC_DIR is not defined
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-variables.mk b/mplabx/ctaocrypt_test.X/nbproject/Makefile-variables.mk
new file mode 100644
index 000000000..09fbeab2d
--- /dev/null
+++ b/mplabx/ctaocrypt_test.X/nbproject/Makefile-variables.mk
@@ -0,0 +1,13 @@
+#
+# Generated - do not edit!
+#
+# NOCDDL
+#
+CND_BASEDIR=`pwd`
+# default configuration
+CND_ARTIFACT_DIR_default=dist/default/production
+CND_ARTIFACT_NAME_default=ctaocrypt_test.X.production.hex
+CND_ARTIFACT_PATH_default=dist/default/production/ctaocrypt_test.X.production.hex
+CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
+CND_PACKAGE_NAME_default=ctaocrypttest.x.tar
+CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/ctaocrypttest.x.tar
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Package-default.bash b/mplabx/ctaocrypt_test.X/nbproject/Package-default.bash
new file mode 100644
index 000000000..24387c9d2
--- /dev/null
+++ b/mplabx/ctaocrypt_test.X/nbproject/Package-default.bash
@@ -0,0 +1,73 @@
+#!/bin/bash -x
+
+#
+# Generated - do not edit!
+#
+
+# Macros
+TOP=`pwd`
+CND_CONF=default
+CND_DISTDIR=dist
+TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
+TMPDIRNAME=tmp-packaging
+OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+OUTPUT_BASENAME=ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+PACKAGE_TOP_DIR=ctaocrypttest.x/
+
+# Functions
+function checkReturnCode
+{
+    rc=$?
+    if [ $rc != 0 ]
+    then
+        exit $rc
+    fi
+}
+function makeDirectory
+# $1 directory path
+# $2 permission (optional)
+{
+    mkdir -p "$1"
+    checkReturnCode
+    if [ "$2" != "" ]
+    then
+      chmod $2 "$1"
+      checkReturnCode
+    fi
+}
+function copyFileToTmpDir
+# $1 from-file path
+# $2 to-file path
+# $3 permission
+{
+    cp "$1" "$2"
+    checkReturnCode
+    if [ "$3" != "" ]
+    then
+        chmod $3 "$2"
+        checkReturnCode
+    fi
+}
+
+# Setup
+cd "${TOP}"
+mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
+rm -rf ${TMPDIR}
+mkdir -p ${TMPDIR}
+
+# Copy files and create directories and links
+cd "${TOP}"
+makeDirectory ${TMPDIR}/ctaocrypttest.x/bin
+copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}bin/${OUTPUT_BASENAME}" 0755
+
+
+# Generate tar file
+cd "${TOP}"
+rm -f ${CND_DISTDIR}/${CND_CONF}/package/ctaocrypttest.x.tar
+cd ${TMPDIR}
+tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/ctaocrypttest.x.tar *
+checkReturnCode
+
+# Cleanup
+cd "${TOP}"
+rm -rf ${TMPDIR}
diff --git a/mplabx/ctaocrypt_test.X/nbproject/configurations.xml b/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
index de0a4cde1..210ed2136 100644
--- a/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
+++ b/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
@@ -30,10 +30,10 @@
     
       
         localhost
-        PIC32MX795F512L
+        PIC32MZ2048ECM144
         
         
-        SKDEPIC32PlatformTool
+        PKOBSKDEPlatformTool
         XC32
         1.30
         3
@@ -167,8 +167,29 @@
         
         
       
-      
-      
+      
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
     
   
 
diff --git a/mplabx/ctaocrypt_test.X/nbproject/include.am b/mplabx/ctaocrypt_test.X/nbproject/include.am
index e7d868de8..ea0df611c 100644
--- a/mplabx/ctaocrypt_test.X/nbproject/include.am
+++ b/mplabx/ctaocrypt_test.X/nbproject/include.am
@@ -3,8 +3,7 @@
 #
 
 EXTRA_DIST += \
-         mplabx/ctaocrypt_test.X/Makefile \
-         mplabx/ctaocrypt_test.X/main.c
+         mplabx/ctaocrypt_test.X/Makefile
 
 EXTRA_DIST += \
          mplabx/ctaocrypt_test.X/nbproject/configurations.xml \
diff --git a/mplabx/ctaocrypt_test.X/nbproject/private/SuppressibleMessageMemo.properties b/mplabx/ctaocrypt_test.X/nbproject/private/SuppressibleMessageMemo.properties
new file mode 100644
index 000000000..c0bf8789b
--- /dev/null
+++ b/mplabx/ctaocrypt_test.X/nbproject/private/SuppressibleMessageMemo.properties
@@ -0,0 +1,3 @@
+#
+#Tue Dec 17 15:03:03 JST 2013
+pkobskde/DEVID_MISMATCH=true
diff --git a/mplabx/ctaocrypt_test.X/nbproject/private/private.xml b/mplabx/ctaocrypt_test.X/nbproject/private/private.xml
new file mode 100644
index 000000000..e39667075
--- /dev/null
+++ b/mplabx/ctaocrypt_test.X/nbproject/private/private.xml
@@ -0,0 +1,3 @@
+
+    
+
diff --git a/mplabx/cyassl.X/dist/default/production/cyassl.X.a b/mplabx/cyassl.X/dist/default/production/cyassl.X.a
new file mode 100644
index 0000000000000000000000000000000000000000..ebe1820e1bdb5d7783add72f9418383312f316c2
GIT binary patch
literal 236980
zcmY$iNi0gvu;bEKKm~@zmd0l0=Eer53JL~bDP&SX!PwLQBA}4K#lXODhJk_i1M#?0
zhk*fvYyU7X5W-z&7#LQ{An<7u1_l^@dWL}k3uc_TgaHMwzQDkUjCZgwFe2l9It+|3
zeEA3iBMmT|Fi;EdtQj6oE!Y--B#z<^uu%kipNPd8FVRnMGph_FZJ0~S0$%9Pv
z3&fMq+$%IYV$pBE<1fj$3A4Vh)H6
zRbymo2I2*0BpR8Tp{O)6HA7cyYG?#9(A3Zfq7uphD}z~TY+(WtHnuQ9s4=!MfvE97
z1S^OMRRLl`L1
z1(cW}5+V7ZeBzo1a(ZxPdR}5lX;CUeKw?pGD#*N`)SSeU%rYbq2H(W&RFKNlBCz=w
z%#g&SoK%M3lKi4nS7+yVmte>E;LLOeh;_&!uF1(5f#;N1oN8tg4^a$`cyQo=ZGx~|
zGGKA+omv@?m|4W&lHr&Ria&5r6eoiG0}2Hf2-BrF5#&S$m*T{*)S}F^N`}F&?OR6QjjEa6AQo!@>0u@L{n0cH5X?j7Nw@d7pEo{r9zA=
zPAw@0Ys*c{PL0n_t&C5tK;eTqnR%HI=%4ASmoZ)r(t1vo+>ET8=3YzQkf55W#_
z@^*1EWB^k}3<2KG!G=chU>-wIVp39O2{fBPIIsd3WPT7N-a$zK%7kY*SXmDefP@XS
zZ1v2`$;?Xy=S>uGkO-(if}|XTDuftJ1vrfb6(>Ti0GC_N8L7$HL8W;inYpRKsU;uw^5adLtMMbHJDedK|)Ajl3Ngu93~)B
zL16(hD77RWR62r!vakpgBOpOIi(uq}iczq=a0b}DpgOVw6xPM@MWC`3WN2y$$W@?Z
z2o5QDs(~g7R6$7c0wqCkN{7ZwJlMPLsU^;iu+k}|BnMvYr>B<0mllI!J}*Bn3EYMN
zt97ab)tE3H0jas5$}c3}CAEklF|}APAE~nk?dKU88l(2}3=Is-%*+%NjLeNKjlliC
z1g?5lA2&uuMg|yQWZ+;x@E90&Brz~B3j8lH0V~j8;AP-q_`uNAbKw78bteHP1_6de
z>;M0EQekIs(y?LKx88zb`+5_GZR-sfwyxJ<*s@-OVe@(whE3}g7&flwVQ>(UVc4+V
zhGAd71;h4!6NYX51`J#Kbr`nvYcOo?S7F%HufVXeUxr~rKL^7DW(S77>MRVaRX7+{
zsqio?QekFT*}=?^(aFr<-pS11+`+)Gas~r~^9%-tjF}7!?lb>0u-Y*EXR`UvuvCTN
zzmti|231Ct8LW&d4Nn&?LaXWW~V}g{3=F+JEDSw8stxQ+91Pt(JPchu3=B**
zOk2ztnC2KWFtr#kFxBWYFfcf&sBJjQq&6dmNv(mKNv+})qoPIwg8;*d{sjyS9EuVS
z4F4H)j2W1FRR1&h8U1H?W$>S2rBOoy4+B?1P7MR|IaLN`FI5I+O;r|#)jdr6BpDcN
zzSS@-V`pHn*<8oeC(6KJ6Hv!=Oo)NOM!&wHfRCXefQzBQgOfomqMMPcAg_jjVQo*t
z4siws#%pQ}R$J>D7Kkt~FczyZSOwK_1!UDUbO?eXRgJ;QvYyK$vxbLZUr)mU2?hqn
z_o@t5&ucgs*7R`gD6eVQAjZJJv{j93K}k)+3}FTarXV%0j>4LT1_1^JCQEg$0~Iw5
z75oegOwU!+GR`t`Z78d0SRu;5HKVwuVS*5YT7VBDS3^Nf!wE?SH4i&Ru8RDc1`Bou
zwH@0TxmJ|cs4XaArs5AP{AY=sclL*7g9tP%YRR-pJ>I}>v
zw+7ZQ<%uyc*yPkP*$Fc+*hthdtrK8iu=!rgRL0N1U~{FeA%dHs;e#9l$h{H_J9`8e
zR`sZLXfkm{c-P1``T~5~u^YoqV79&@J4>)|e4n%;%mTN~iI3Cm{crtM<2m!}~T81wpS3^LJnuR(OSA~C#
z+KQ{pTpPk_)F${bam@&>QA=3EsAlnlL2bo$CbbD6O#lCLsH&Zqz^G>NoOg4<Po%X1Zm|0_)XGkB_~B}@b7Gc|?DOe!5pOrW$2N*kcG!j+L*qoy#CflDI2hT*?}
zk($MNCbftxMwJ7s%qjt$j4B$gOezT-jA{xK7*q-lF{)`iWl)Q#U}Om5Vqi+*VNelJ
zVpg%}WMKH8Y@njh!JrnA$H?%1t)Xgw52KpEA_g@9X9l&1Tt=o4Ee0kf76t|@b_QmK
zQ!7*?G8t7Zo-n9HWH73DcrvI6crY+9oZ7);qt3t}#SAXzn4-8D7`!+c*cpzmU|~3-
zq8gFSpz5H+$iUFPgULmMfk{Q1frH_&3OB=%6+8@wR2UdicJMQtSi!*Hv4fN{d%^#`
z>MjhM*Eh{zV_;)QQuAThy556f%X$ZfP3vtKHmSssk6>sT04)^RW-uj64zS|`E4r1FEgDM*BYtxti0NyUn(DM*HawNHS7
zNrji8NhpS4e}C|QCY1<=ef=Q}+xr6;w)OikZ0+}8*wXL9u({uXVN<^i!^VCKXq}h9
zuveXjfxQn@xBO>#X~1Cfq6U)RoKzUBp4C9|8HXwZgK!_0hi6TL0|x^G%P|!$2ag&i
zJ$42LMrNA^12zVR|136K25vQKGm@DY{%aaCuq;*i&%kV>;=sbFHY1a%L4%c{OVhPR
z#o#c5+Kdb)76!>awHawlYBN%qI2a`Q)J_;Ps~wPJ29+Zy?m%(_Hv7SLGx0<0uE>Ym
z4Ys%9B_oQx6)zaoDxNW_RXk->E6`_F%iv>HGkDAJpW&1NgU!hrP#MHvb)p7V=5Pgg
z!Tk@in@Nw20pfoi8<79i65cQ}{PzO;RmDSv5nLX?{OQ2V2+G%LpuCsR%BU7`hEXkG
zHKUrwDTeOezanm_YH<<>^_YwqOgB3dl}}4kk4RPDZr_8H{QhLKxLNwlVx?urp+^
zF|TD{xu?!xWm?O?@?8y72MI6;uM=UATqnUGu}+48eVqaW|2h>0zI7T5yz6ur*wz^^
z@T@ao;9h6Jz_reXfpwh&1IM}s3vmV)29b3PEX&kDbrPtqVbbGdU=R=mrvq>ra1do=
z_*+U=UuHz#zFUg+XFn1_S@P0tUWyB@DdlBp8p*E(Eh2{zRKKZ3WHPE4
z9AN;}W#F`HkjB_$>0YB|aDqY2;5b7I1J^pW05`@C2Dx==A5Jm%FtDyu)7Z!GpJBNH
zNI!$kYH<4w5`QaeKxq*YrkbkYIP~CTU~*$+U@+scQA;?(!0`XM0Vp3cuyClVD5Nl|
zS+p~P+@=Pq$0U>)yBs}g)GQt|s9C&VP*Zrtpe8YoLCqnRVFCl&x+x4?>t-;>t((KZ
zx^4jj`?@6zEbCSUB%3#XaK6p+ItunGJ04Tj;Sy(bgW@uNMFOk(B8wskkRw!
z|56nehK@BX4C!k)7&>}57&3dbEsip9Fm$frV8~d*!_d*g!;sm-!_c{ghaqE)07Hw)
z>;Df#KKxHs0oirzzk{d%Ly#H+1G5by1BVKONU{n8gL@wfgIga5gKHlTgG(PcZ`quy
zVX)a*!(cO|hAEDn;XlJ$1Eyna4F4I<7%0?3T``r
z+jZHhkbJln+)n_t!ys)WQ2Y2;4Fk)2Xj@5BmBDH$xI6{5^}y{xtCpIsK(CsvLcf}>
zlaV!D3qxueGI$|vN^m}Zt^#f&vm8?a^(jE*C@6n{+i#%02TO}e*GAu(uAM$LU6I~3
zT?Zp-x+?u^KxJ*$%FvpwnZe++2PzjpWle(u3qx0?dreoOTMek5>r!;7VPN!9Wnes~
z%D`x;4r-@^(k9qH%-7UFc7y%G{9O%f{|QM3P#+9zKd261E>`1;$OgA}L2X4)KMT~K
z0k!==eHm~c$%B&t)V^h4TB{1m&kRgGstim^RlsdsrWO^h51BQf_ARJy1!~{I+zAT@
zE|1h2Q2PuNv{4RlGK1o>%h0Vx1ylwc;9zE9;O|pAz|O38fQ^}hfv-=k;s+xS
z16!Y3!FfhCgL4f38O|Co`LQuD*qo?gU|FjQs+Sq8jziL!2PXrloDpE)>g&q%tpSxg
zpt1&3Zh^``aGB?!!U!s})G}5vg3G^*m5d?`Jbh{zD;Pm#m0HGfMhOP)K5+jkqMK1o
zBbD(#!%hPRo0T=-JOXMvfYJ?%rYhHoNO(Aa>;jd+Ap1aeG5ohQ2HDHN#AO3+rvzv*
zgX{;DwP1S#JQ>vjJQ&pi+!@sZxR}*uykb;4ahXxg;U>d>22n$%WgH9)Hk`HK_6jIp
zTCvx{(FJ5{sXmB!0i(cWkxlRPA0J5EYum*HoRd_
zTXC96&0{GOY8%A_-bPVikXWa}z`ss|fe+dy;az9Kz_ZSRfg9Q;;ab-a0cw*7uVY|o
zgS1H^ylX&h5>R}C>!ANvj2T#XY(V*2B_f4UZ9xyb{sgy27j!eJEofs>ThPj+wjhL2
zZAJ-`2ZQ7~P@B|;fn%MTgCygB1_?u^Fi<$K)q=_)a9L%=S_{s{0bJm=38;(!)!!g{
zL3V-c2IViYA3201!#Y+|3$A{VlvIo{K0olXA!EFQTw}I>h*{7DV8nsQ5v5HYGV;Q4b
z#!^PLj9wwSYKAwGaM`YCFy`t7$xE0<||_
zZ4yvh1k@%0wK+g-kPrqjaGL}qF2S(9KY{_$CXoTRNjTRfFo>*6VGv%I!63OV2VCb$
ztP^0^+F!%KzD@?*7Fhvqi!k4|FhauLHGV
zdKlQ&sTrJR_|I??QVxLn{GhQ4n-kzMC`f+bPz99Nnq4MFuEgAG?LsQ!S&
z8D}kMdYn&1r%Ru74H~9ZUC19puAb}icziNB_n9e
zORZu(qgp{fqgp^7qnZV%&+^p(JSGSp2brSAVDlN=Z$Z?zFKgiC0J#3tR0WLxR
zBEYb9J-DrDV^$05BZ0{HSbf*Vuo^XmB}@VgOV&#;Ea_js
zz`IUmMKgl{!{YuWpfs?e6f&;0Vm*_Z!a623i7p1U4e1Ok7`WH1VPIRgfkATJ76!R>
zI~XL^?P1_pcYuL^-4O=9btf3O)}3KsUw45)WZe}8;dM6{#Mj+n;9U2BL3G^{29|X%
z7?{^-Ff(wxVGvsfsq0P}KPx|
z@()zk?RWv{kMDTSq_*QJv_Edn%mc3fB$)-Ebss37s2Ln%1l4;GcY)evkopdkm%!x{
zQu+q>V=UMi!1;}d6Hz{a#so4}BFZO_8!}cfg7O%oe0s~ImY~b57Qw@;7Vw%;&BKpT
zO+$?l(r?}jZs##rEeEGRP+Jca=ioLE%X1Y_ngiu?P`U=&3+^v-s4}pK*nrZV%8V2y
zcs`#onF*55)0x0+ev9RdYAf0q)fSX8s?7*tRNIirq~>sxDS|<4-G2r#Lr}T{r#Bn9
zT1XlbUnj#Lxek9F#kJ0XfpeV;1M4~u2KIG645I5mJSFub)dRT?L;b*nuP}Qe}*3h4B+ur(3tWw$QUuG?Eo741-Dm@f$MIRdPM-_1_^Lq
z9_)q#T&R8P1DxRY5x5RJaDz#$Vh592K|hmPMjn$|!cImtgLZKJ0_pdH#;%Wo>lILW
z1s-b#*Jn#1{cJxr@HhdeZedUW)o0(qV;$hK3e@NI;A8-`zrlT8P+bG+??z-Yszq=^
z(#eNYjA|bH7}a*@Fsf-hW17RjxenC70JY0N<&Xfw%JmFZD?#Jz>jfBA_Ag)%2iFat
zdPsp`<$4*0mHm+VPZQjp2I&F05fm?=dPsv|<$9)ltPBbaEBjSIed_<_hALn^nyM-w
zvmH2X)ONgN0+|B}E0CEWc~GAkWERNn2@GQEWEfVi2bqz=Ai55uUV~v}e+dKoIu%eE
z4Al>=TXwu;Qrl6^sOAyQsKBs&{Tc?&b!t0KGS6Y)?AyQ~zD~`Mg
z)9ScLkIu3?}b%z-lICvNm)=B)|tIqJ?P|Xg8Me83h>|3w+;Q)gK!!mUX
zhQ;a|7?!Qy!LY1<3&Y~|91P4hM;JD)*OoZUpxDvCumLQ-q@O{7$>t8j_VqUywynRy
zuyy?fhArz4Fl<==gkk^sGYp&8pJ3RuUa?^TgW`$@41XB5^{eh^VtC4sAfme95CemP
zu#M^jVJ1Zd2PQ=gP#>IuN6}yb(-wwB{UE-oLNG{>r-Xq`g@NI59}5GMN=uV-4I=}S
z%8|X!H9r`Z^tWtvu5nrGT;t-^T*D%9xQ>s3MMZH21Jf;rBSH)ekJlY>WUc|x5sd16
zO&077KmI>biD6i*-XOrlpe&HYz@WfvqblIcAjI%MK!Z_5?LPyk?B%e5jA3i4GW_Q-
zWngH9jA0wBWKhvq!N6d|#=xY-%Al%olz~Y{m4Si5bqxzci^|vk>ELl}4@RXv$apxj
z4P+cV*+fOdok2yw89dex8UtrgV6jovSi~@gVUfD3fD7ClA4b(aP}r&}9AQu~Sk3@y
zC!*WO!r;0lfKjav6hM{m~mOfDUwoGxUY1!&h
zb7YQ7&5{2uHJ~_QU}#y#@W8cZ2g8znh6hY_pz#bIhNg863`{C446W-p7+TgzFic&?
zz>u_tfg!2q-+u=YkY7OcGsARls}(=QZjKtWY+K4I=}y4JaHL7@B%O
z;q>>vg9ylh0t^e*3otC|PhoJ<;9zhN;9@wW2jVj_IH`c+^_!*A|N?E1_uEL
z7bY8)4TqSt84j}jU|8G_@=r2DlE8=mi_{c99AXBgSyd3taHJnp&qL;=lOglc8qEwU
zpt&`)c?u6km31r(NBUK8$onv=tmD8VAHb-xjt3+!(afMC&;+0NQ3cI)izqRKFe$&HX1BHuWE2*w}vn
zI=AtHVXwNX!XaiwjRVY}c^5^42Mjvw3>=_5%FnRKsOrB%04QxR35qg++`u5n#4rIQ
z&(O3Cl(!@pSX87Ko&+3mbglu-wJ0(?5@2FrQUT4iDE)sF0?K=!ylBnAzyZpSiVaLm
z;CN_YVq#`s>tbhM?c!!&>EdT#?qXnIo5jMwI*WsWWfl(u^DGZWwRJv>s_Q^u_@14C
zBZN_T9moujnV|d(%FCcUttvI_P
zug_rEw?2ho`}zciZR=wgwyqCg*tFh+Q&oD)e;eWB2qJRRUN`eTZO2iZfm4Ffk6$fEP6@|$RDiXyEDjp_`Dgwa_
z44`?vAT9=mBp%3`256jt=K4VE8&nli7*!>l8C4xR7*z$77!?B;7!)HI7$9?gD&Tl!
z5>aBPU|6oph_ukT_wAfUsrXnhC60)YyK
z)%_I=i~5-&xfvW7Rjlpx5@5N_bWu(;oVVT1br|79wQ9Sax~4=^w&o?u{5EMQQJW
zLxoY*p_x(DAPF*`>Z1t>6B9KCHHA}*Y7#FQ)dV=0)iTtW4H#CfH(^-0-hyGpdK-pi
z>lGL_sVg=tU_$pF3xh`=1A}Lu6axdR0|T21BZHTL5`%-_fp}g95C*N8VPxnsP!&jG
zyuj!n=#;_B0E!QW25y@J>C6mH3M>px63h(${~uFP6>wry&B$d`RcK*UU^pP4CQ;9D
zD4dhQ!GVK8)xm@D#eYUt2M``6;IAKmUp{||_O+{D2Uq;}%}rZA8n1sK+?7hzbxUV>rAdKreD>z6Se
z5E5W8RGY}b!14e8H8oHgXkb{?Kb^rr5R^`)GCUAq`pCr~!+1cLpTW%#md*tjcJzxd
z?Ch6dSl2JZu)hEQ|7+@?d0$xiH(=PR4oNTg=VcifK=ZQb>18QWdfCFDk}(C5UNknN
zq!)%D4hB$t%aFy3nr4!C!1+tnV+o^bfGZ@uXrQGR9aRQ31ukYa2~B1-ffI~s8BZBe
z)5}ssdV%EwXubf2B_h4B;!Q7>4EWN^Qnd8408e`HV^E8j!Jw8<$)L7lJ)>d)G`$>1
zU{pK-O)nJ>n9$RU7!LdY|3|g^(fBy$r+V^`Lasz_6^}Nu7z|
zfCdwTlRO*40Rc7!0fuG$3JmMj)ijPWh%hYc2jx*Ug(ILgXFsScQWH4DAOjLlU|>)K
zwKX#s7#JS%*|0D??`2?k(JRI9fCZ9wJq?r?6a){1Gc$lNB=4>?0OiY61_eP-o&dQO
zoOk_M7@Ra%!TA@Se0$76P#B-ZAVbs5Zv|?Vq#ErU}aRbc*CG7k;0%VaEPIWVM%`n!?J#GePg2zuWtkx
zmZ}RdtXMC?uzbA)!{YUzHh~PoB2c~ApTV%NKZRj?e*(j{{uqX>{SgdX`a>8t_XjX+
z>i1#T*zW;tQxq`lRR_hvQ)qetv5!L83?Jnf6fOQSl>I*-07@&08V|tpaV!iB>o^z~
z*71PmJ{TBy3>X%yH(*%SZ^Ez~B`ho$mh{_z`d6T}gb9xsR3Z*DfY%Nh9AZ%MSj3>>
z(9EC`uo%+T(&7QvIpDQ}O56;p3T+Ik8q2|H5!8M+U|6~y)TaWaNAQ{yDK7AuLsf}P
z1`~!Q>(vz6!08j*W(KvhLE$LC#Av~=cs(eMg3>Ffj<#V~v>sHCg3_?!1O^7h84L`H
z2@DL1&@?Q-AfW=vD~bmBj4TYtdl(o_^dQo6CNw=WF&qeI0@pK)3@Z&lZ36>PdJqR2Q#R3tYJ|5QN*BjqL)E&1}Hse8Ym_xFezpz
zK+^Ms2h8a93*)dK+3p4|1`bgD2#Vux9Eh^w8WOvb3n4xe%64E_*3Tfw#-OONh#~sl
z10hhogq#MzbF>Bzm|Pf^gVP`)J*>
zEMidcXkt*2Xl7v0;$>h^f~E;44rqEpt7sYqZ%w_g~C{b*$z6QYc>R6q9LJ{;s%MEhjTdM-`|4jG2E>p|&8
zjvJ9a{z22ndM*YIPz+a8fyOgdngqOi(0S}UxHA9044};4B
zZX_`?h6WLC2A2g~NMeQz4I*3&E(-ML^v5-7H}YmsWUW)a4@(mU`G;DVrURy
zXK-1-h9oA-&>+Ib;Ie=fNlb#FL4=jTWdRG4m@q?w2n&PD0%jyJK86MnW(Jo9Oh{s!
z3=JYo3@!^8k;GUS8blZwToy1u#TXb|7J$NO(|?9AP}qetDlbxD*pIS?T!Ue+`iK9A
zR0J8Eb=Vma1R5HcZ5SGoO;`k+8CV&dSwL&^IzWrw85kHi7#=W#_#hfIE&vk;>A&!Q
zuR6#K4TcTtbr|-q7hp&b0IgF*HjkUZkwt=Gxw-_yg7q>C3)U+zELg9?uwZ=$BLfd8
zeSpdt35KQWpn6V(kxfm9VSm2{v>r2H*sDI{|6X+mh7IdI7$>MGN*rMDVA!-ihhgb@
z(E3NvI1EU?00Wx}s7^>>*uOr3Vc+@~hVAPWKRjTFVA!@k1l+&evfhVb^LiJCjq6(&
zw)BJSYGBydU%{}nzXnteGBEIf%wc3;Q3+vmSQN_WuqcetVNp1v%OWO0IR<`)YsMjr
z;cB6bp=x1_!D_1+97HS_7Wd~cZ0%Rvk-%Wja3Dy5VY7NTqthf%AN@arlK~%tgGe}|
z)1ojWF-`^tkuXN5MWIMyEDR1Jp^Q$8LZD(Hj82O{Wt~L;{nd0x0H|
z^)N7`_ki+_n#D5)ZG#R5$Xc7FDnI@o5Mg0RR^eheB&4XYfJspziK$ERQ5^$A>I9H~
z)HIebXe)#<{QTb_!oZNa0IWtM0qV8`OdSkM`+FFc_2)1w?+3YCfMMTy5r&QH-8mR|
zBp9}=2bCY7us{x5kUB*T2B;YcOsWzlOw0_)2DTtK3n(xtF*FFJFzoMdau5Ogvliq}
z2?Zt=hE_dh1{EVlhNTva3@th;3QHKu7#ajXepCdziLgJp8JfUmD|RR`F)%1k>QYRq
z1N&20
zhK>CW(Da(YuvfjwLX2Vi{|6BF2!O)Kt%rdj6%y_mN1!SJ7(fdiCQj6vZdz`&3Tr5nIwNRV=%gkk&o
z0)}nt6F_6!8xAml$^uXs0LsIPI~Fj2%7q$+{p)iWwyw`$*s?x_Ve|SJhK=hh81{kN
zGN8Wn1cs&kQ;_oh0*0miOBj}c$1FkiBd1l+SegODW_3l21K=@p35G@MMHn`N)3*S_
z#`U1Egr#K%hGpt5;BlGd{T>X9`$6mWKy4%+hDH5q63q-Y3`_bQ7?$=MFs$fT6KG2E&qmH3wEkQ2GsF3{?wd3;~xj1`I3Kn=mY24=US0WfrKN8^_=v!t_y)p^D*v
zI0LwBGBomKP!OtN*xygB@(0;J3JlBCRTa#bm>F6O6eSKYc{4N!C@?HiZ*mX>=gTHg
zzSKCt#KNGW$INgTrTnR8NDxq9Sga1pn+y!Zh`9A-dR7la&WFg3K_5XtakiQrh@RtQ3H44zW5ag#sUIq@3
zzxWuKRTMQIFew@wU{bVjU;xFB2*cv_0St@4c@|WUhBLZN`v3o)dH}bamOPj#SMp;lK(4+g)_!2%H?I?0EJC3)V=g-8?1otsqkQ&tODCl
z0oq5Qh`e7yAptzc1u7px81}C>U|7B$w6_Ab?;?j`6SzH4z_76&wD&<#0aRu)@PPJ0
z7%(jF&j6PRVk#kw42wb;85V^xGAs&b6k7!9H!Cn~0i|swMGFQ7P#lObYyy`F65uj{
zfeBL&)NF$WCRGI^NS+dKVA2KEUlI*WN(>4@A>cX>lDBL?c}v29iJ8IG2$a7V8J6mR
z>UU6`XA07zz`&rW0ot#T*2BQC98$+vV6WS`8I-_gD^74?VqkEd)TP)2$yeYyFA!A6
zK3=M0T
z85VW0Gpy*~W?0_A&#};>C{U!SA*ZbFzk(*AsyZ3Q_`0)G9+O>}9SFUXSyJ%7TtM%($_s^N5{CξAurg
zPofVTn0;vb_EMR@e;=-!JlQr&P0c6D%q+*z-oB3M`}eQ@XU;Uon3!aIS-LdP)xm~_N%o?mT0AT)96`sAPfb-;c8fcFc&>(ogu%jT)6Drat(jxpd
zICxpc#fv*Zp{n!t?ZE^E1qb;*e;%LMxUuqWbo91;Sy@-yPM_|*xo=;(x20v#Juj~*
zSA2YCyoiX{;C23dYxac;yS3iGKl*glDu1!xzuz8pc5b`w>pLsd*f?!UYpdXSSJy6q
zpFdx+F)^_;*4O|05D>7y#m1&$*Zldak5{bl{u~&%=-=YSu?HL+8oK)XS=UaQWWQ(b
zTtyEHivpIfUq9a8vnToBwr%C5w{ERZR#bE{5D-w1`v3na-{;SNb1z-m?{oHSqX-X=
zgsHHwn*N(Nhabkr?^`r|y6G7gmkvvDalP;(M<#z-zC5(4uI`V!t!>qsl#~hIiHoTjAYQm3UAvU*kIQ?o)1VJ(};{9lyL|
zN4AZKh(_hTd&?ii#qE*h<`yfveS59-g9o?6jEqwJtgK4pxVS`adwNddVq@dUQBm=D
z5)-o{_RyjEd6zHmeZOXn^RlF*BP%9Ov|KWEs-gLlCzrb`D?b@Me}2{Z#EI@mbMw6I
zxw*G`dV3jDu3p`E$dVV@>)a(c
zI0UZl+Lhl?QSl*PRn@CVPcKGAM#kdfvSs1Nw`?g6Ja%ll@{1RzYwq4%IH#oKg`&K?
z-Cb|*X?OPSO>FD#=56ij;-64Z@W9E=uI9+rt%a-7($3uQ@R-2L%*@94?b~-DK0cYn
ziHV2eO--|YhKH}auybeT#I`o^h=T`bs>{k+?VLAH-QwZHo5DYSyxu%xhPJVwpwjNl
z%u59~Z?5d@>tkO&Ws32(*|T+(Q_GHwj0=Yy9h)}HoT*u^s~aWA&o6g+!-ncV
zAt5WS?cSYhB_^hmoP2C)P0f#%^73~xtE<2De){yEH#_^<-u(P~8;>5H7-C?M5WvXD
z#GIafZl$(%Sna=m&n2&4-71gq5Vd3C8etc?>va(z1;lp#|BqR(prcEW{<)6@*Ae*E~ZoxXltVM~kf^x)uSUoT$V2^xK6c>DIC
zj)HF?if#hjhnj{5q}x^8To7TVe>IK|bq>-^83F9n#GSlH_8|1|~#
zEcjq!Q{ggyzUrZ?z|5WPp=f8ZHF73}fd$!Sshetw0SXj;U&6~se@$vf}
zPM>bN$i=1OjJUX-<&h(k!yaZDe1_vi4!eXOr2`D
zn{#R9O3w#5IXAY1g{}GZ<;!RGSFg^irly`+Usd&`Z{0fgmmC}d61#TgU#+P4(4ng8
zm9M84QzRo}p|WgQ_{S|~U}sn3v~_FYk+ifkt2{g=++b#AWBvB+J0l;Tj8J0Yp~a@AS@GfF>wfOs
znR%hDO?=|PgEJ#!Wv$fb%~Rj`@Zn91A3t6T&zPaTSx`{PI5YFo?wdDP7WDP8cTSmN
zynOa--EDGmHcIX7qLW^}JgIQ*T)Ssz=&Ju38UYpe?=P+D>0$0)xG?fZXD4R^FRzsN
z{{5-9o;|y6=;YLLEF4oAnP!!u`UZqU_@D(B~y6Wp+&`gBOhia)z|=Ux*N)3HiE
zwlulsM@volyP4(H-+HS*{pbCZeQj@c{=JR)M<<3HHAo0BU}R!uOh30WT|2B+``>fP
zf7iDrU0?0{Y<1b2S!JjCT~9U1&uu!{>2R|4S9|TR_oBZdH@%K@?>p)K;Wzh(wT^Gr
zUfG;}Wl{X!MeAK(t)HX3f6kKN?@NlFOe;DtJNm%((nH(-K9u=8*>>GzHJ>asvz#b1
z`#MMa?_Zg|pK10#W0DbLvNZ6^(x(?qo__qv@v-pHF_ZrN4C+J0B;zkcyd5gY@i%NB3x{L
zqqn_{&bqQM>vXT%>3!)p_gNNsTY62o=jAiwiciFb7ZK-Mz0P0Qoqgf`QLXo@{GYD+
z{Z{O^bK6m8-&xmvjnhJnTLq`Ix^|s+{rOVhCld=BQ~kfj`hW!=0&FT=Z04)(n!m#P
z@ruAjp92@i{#)$OaKNFTwX1)U{n|-$75B`wDDbfO`jO@9p5*&`wv`{;c58j;5#=*;cvRrkq%l61(eptfY~)Wbw19#R&%%Bs5CSX!M_V(f`ik`a4Q4
zX-Zllby^dwS5N5RZtigFIpy~5xaPYZ*_U^SXxNC{TV8oDZqK7QZZTQz+iS~iKe%oE
zz$him$g0H8ic3U}%X89gPc|MdHWiN?m6#n*Vh+uZJ#=|*-sLsU@7E+9S(Y@>a>c}{
zhD)YCxorNV@>6%^^Q%VBPjow2LgW6@s{1|6{XGjKe=O|eZ0O{b66f8YdTal)>xR#qT8=qo
zT-cG}*mT%&rsjs3x>4o2{BnZ)8>&xl2wCwbWOweh-C{acV#k&yC;w=vsd+cEy!=~l
zb@hMVPoJ*s&Cb5JF+YD|$kC$-0R{$4%#4iZR;H(i)oN=$m;Co{Ytr@WzRy;#elx4A
ztl#z2DfzigO`Q%WPyTAJt$i>0>({2&k&%5T-Q9n4fB4||X6@R|=~u4A|6R1m_0{_I
z%KPWc3I4uh$&+bCMYE$194I}sefvY1zkhAlO`hzNrKXk>WoB0AXm9_O>HGI)|1)PY
zVoXc|zbsvP(d6mVpBx`QKAK!uxVrepjig{hLoItzQ4Ss!mZ?Fgx+nZ)sWfH8^-@#zk=cKdAHetwVx>!ejYAe=1LG+_>#+bo7;dSy{bqr%$Kf
z+_$gD+tPB%Juj~rSA2XnyoiWs^*VokclLz~N44I+_kX%-)myROzuS&FJI}iA>zfv8
zY%DmXwYBTKtLsaFpFdgHn3(=G*4Hoi5D-w|Vq>GaYyN!i$17GW`WzS-`)~2$h64@`
ztX=*6_G>3iQrt6lZh?n|#YdK}Uz6|e*;9US+qU(kw{AHlD=I1&2nalt`v3ng-{;T!
zb1z+L^f`N0LWGA$%~V+Uu>PAj`yR%}n=YC@z2l6Fi=L&p_~h^-M?ya>U;d}5uCB`6
z*7n4jl$2f1V`Gi9B_*FtEiOK=AR$3=Mq}f=i~jzL>+jrgNmEh^sngQ3UOiy~cXLNa
z&nY*z
zYwq5CF{h-&PElTd+FftTU^0sw%^S5?&J(y5XP~&80S9oOW)-$Wp(k9&S@L*$Q
zX8z9j?VF4cAK#(HiHTY9rl#wDhKFZf*tt`DVq4qHh=T{M)MaJWcg~x4)8gU7*TO%3
zXm6e|L&;cB@Y3$g%#{TaG3zuNyvl)^g0r>B5eTjHbhmj+z^0&WtM8
z)s++E=dV7!VZ(|)AtAZfcJJ1)5)(^KPEM|=si`S1FE6jIuCD&{>C>m|?Ck9P{QUf*
zM~@ygFfcG+WMpJaPft(R*4Ebk_wV1o>({SeU%h(u>aw!3vQwu{ooZ@oYC3uHC=xN
zKYlDMEG)cn*!nJNx?j`WhP>8@IN$wz|5yy8it6^CuG%
z6H|SCeSJVcK!A;njm`Y|^XIQvv0_DFU|`_l#fuj^I5;@;_xJZtnlx$B+_`h-T3A?E
zeEs_M>z+M(_H5g>ZQHF|w{9saDk=&H2nhWD|NsBz&!0bEx^(H%*|TTQ^6>ER2n!1f
zzj^cKO?-TO{PgM5r@OegxQL63iyt|1PrYN=gO?AohcXxMpS65e8K|w)*ot>TC)~#E&rlqB&d3bnuFf%hVfBW|B8y_DZUt(fnqN%B=
zX?S>e_|Ba>ceb^)wH-Wo@Sv=$tn9pb^X5H#`0(M6A3uJ~m@#99prD{&W@cvQ&6_uG
z_VxAkO_?%f%Iw**XUoaS$+fq)x4(S(^5wa6=gx(OhK6crXlUHOfB$|@PfyRng$oyU
zc6N61^78WT-@kwVvuDqqIXO8wWn^SzI668y&YU@Ormn88Es?3tt>K_*R;M2Hxx?AtD
zpO>?r$M-W&oij=Fbye>ETaiIib({BHxvW?cp_%!>)8)j;zO2qer4^NZU$X5YX5KB_
zslLts;Xd)T9Us!xD4g74b*@&z>wa>Rq14j^5
z5g8r@l7C(M+jH(s+5V$CNcnQ{>PJl8MdAJOkF{2Zrm<_h-o$)ptNyI&qist$%rAdx
z*D%<$bieYhEM}&dCb75LGUvM{ZK+)T;S>Akg^x1*&VIR-dUYQwn|zYV#jbzLj?4|#
zGg%P&d6Ch>F4of5-+DK%LT+0sz1_p-awgyg*x7tQ)3Iyf+ilTCU|L6M~X3@$ocXgeux}~mJ%1wSQ#bq%W
z7ek_FTj`mpY)t3k;eQ@J`O>s^TjouiE$x5wK*J)1JBgXz+rwcvpB
z10@?-acLoLUQWKX$Gbo6T(M2}#7a4lR>_ayKJ2CIci)})?r%c<;`wTf-}ihiiaBbX
z=3-L!JGxBMx%yl8Rr-=b4JX53e1oNxTPOygeFQnkMAx0dW*YyV`fl@9Nuih$W?;Ou|)_kMe^WJ&eUA?Z5OKxqnB=
zrf&|qbbFFF>s+um=x?NZVBdHpH7BN;n&OjIo59Tp!dIxH*3
zqxxu1x2KJU<5b@Ng^VjK?``JcnDb=IjR^^#Gn^5h4U3bu_D5~J=PA8QHJ$I3>x={cVjq_3A7=XC(Mzw7^S-?p_KAH>%v
zoJ_MiSG&dQezJt2)YB&8!08F~!AY*=DH|WG%ii6xpz)uKHpkB?86E`@e_i_}bM8%P
z|4|*Z{c`bYWhU>UNB#1T!&ir0u}2D7uduP?iv}e8
z|2;!e<>lUM)14hU&&<1-Uhec_!`|*r_Ks-D=N9iyRNm&QS?JF1RP$1<<;O`-{%>pG
zY<{b4DJ3K$wrlbuF0BOzo<2~raTb>rlI7*(<38T~
zY3+(_x;t0OiJXx97~aZWy58sR%y+vJ>KFf2WBfkok|6b-$xcG@ZN4jwzqM
z^XKihjE_%tB;PT-eyTOuNkD13u!G>S76lcr)>_-$mwp)iTqn3t^LVcQJXvppO?N&A
zweh}re6ak2*kiNfgWrkVf*JbDLRV~%%+kQ)J|62PcbFFlqOsWXrJrkcb+pR7nNx1jhp&d6Sy!dXZ
z7q|X!)7OUB`THhc$gI)5n!i#=_59|UYff0#N(d}Zp7SDaxApDn3bnJG5|Mddw$FOQ
zILp6zMc&kBsn7nesyn|&k>iEv`)9MC@49K0?{$uI{;MlB8#J$NT4K0f*woUzceSZ_*1C;IT49U^W(+)
z&wdYnwd!wtbiVCkHVnwQt_V9SxXmn5I{qM-Q
z!m@BP568VHTW-ub7?v`j<#cu8HlwQrF*zP3;X5ukeF+R$?pPO`DlT<+iMrLaxYgFD
zv**fxbp5qvb;M)u$;<`{p})%3e#<@6F|my4tE$ga|3BBYj$S`)s@C9=w6%Zn#(SPo
zyHwMqU%AfU`xpE0fc{~oQlCbl4{p7Sr(e!K_OqY)dHf{NsdIAozpe_JdMk3@72W2N
zh|7u(JT)^<_PLxmRGQV<_obpTVrI78PW8Km5BF{J@Ax3TR^epYnsc>VtnMdEcu75N
zG7OxaU>uy}TA#AmUWH)WEODzoTBYf5Ru{9FZuW0l=htJpzS}3S1VukE_%cy
z|2VuqG)-&u>rLz$TlJX_9c`OcZGL$vhlatY_WjD6mNGN#$`X4U({#Q|Tc&dPq%G{9
zKYYscTlnZ!>e(->Y*+W0T$E2*cBJc{p2^(c&x;m>cCi{g{I;a@bu+i+n*@hd?+fGD
z=I8AV6i~GL*>!iCEt}olb*#^P-S&n|+}eAjkTsT#CI3o5!hg{jk}ALVUYq{Xq4SLM
z&GhnlFE;FT>SXWemV9mzeWLRAyPAdWTuwDF`CERRlmq4e2F~U-Z6lAjf^usLqH_F-
z`2PO>-^w3mvCdZRs;-&3B|lfn&6o_uWzn-QhM1{X>2dLFOb?&T|NPySOVegc&zpFl
z!T;!;#6=3_QJLOCGGbDbA93wkaNwzyl8y5NX(3s0PCjnl?oVrvZ`0kmLQdqw%8%i#
zlBMf?*k``meYbw`-vq|*^VN!C_IyoqIcoho+N938yG&F0^qpgGw`Kf!vLpGU;q_B@
zlAQ!vrwcnM9cxh#^lGhD*?sAU?ay_BMw-WS7tWLQ*57pJvq2m0o1lZ`7anic&JinE
zIdkU}!CxLP-IY@QtT@v1VS$u=ZP*PRW2N^KJll`^S=>B$@l?;hMOS8+aerNQzOibl
z#=Y&g)cV%iFWGOU^JH#C0Pm#utl4MkLXzBiza0|3G2z7yOTD=7hnv2xkDb4-;X-E3
zufz=z(jHVZ@y){*WNq(Zdi3D#CO`0`z#mdJ>Ht-Bi*5M
zaEE-VTYX^MT$WcojIpNezluw^f9pA>Z;q0^Jt^ptz)Rz>Yq`Si*Jt%4E;O&=`4QPC
zBK*43X63ne>WSM;Ps%)e`_#S4X5*zfk@r7^+82vRRGvFtyx;tL@T;?bU^4!16D3!Ksc?hnI+3O^Z{vKApW<{-f*MHLD|jc~543
ztPuLkVC}cuvW|&mXTGZXF!}$v{`Bbe(^_f`E~Z=i7bo5GjM}K0F1^cj2H&gLhX?*0
zW-8Th6#C%PyLh@=_OYLrnV-k^i%y+0Y5(i0+^M%BgRbZ{?~AysSmLRf`Jm6`#L3dE
z&O=`+D*I+;+eN6~E!??poBzWP;%hrjrmaz^-C}hvS;Fi7(~2|?{ZD2=9{rMkU8l6?+zZI18Ox};f`{mQLR)=n4*LbbZ
zd}wRitm>nemvWdJd}`NF-n4W-)2=M$w=qp(UD`6|mrvSK`T4^qcE5#>GE>ifxy5#M
zAL~W=B$Fdu|CX7|4c1$%N+mwP+UI6I`5&%3!{uhR?mj_%Iq
z7SWQGx8I#u=+0GB^OE1`$4R*sQ2ys^Zfh{|c&jb9ra&;quPEy8@Be)KVHT~na#z=x
zsaxuDrQGDtP+S%>`(jA6ij|%j&&G7F$^6g5w_KX`PI}(N*$w_j4T`nUg
zCG?1E*W?3FwHDYoKTr~q6_@7Y=H>jf_IS7M&K284POOv*Z)5b;r<2pfy?8L1}u6g5a^%
zS{1KLKWule6EymHJa?g{thfHWJD&|U@xBRaE5GpgpmvVf=9M#d76|_GnBuOK@^ZzI
zo<9qu>_3Fv(5Y2=Kf$>DxS!|EgBLA&{w+E+!;JgNvh$5!mulRrx~0~)-G0gbwK`Ac
zS_SYqssCO#y|t?t_);ob=^cHGd5`)=9vb^YP_`x;_1YbIaFU#WZb{AMB56V@}=
z2rRFac#)Sp=XUjO>$98{YI$EIBHu7>pVho#mjAQVys4||p8Z$kIKSupvlpVfZq9!0
zbwlYA)_cv@*>}VHGa>$ueirp{$~6~`EB
z+ViWpr2V&^BlqSg+4M<4mu|l_4im@~cE2{OC-J&@70<%RK9L`dU4$Ae#;{T?5^>hFD#eA|k)+b*XXKd;|ucO=6?
z$3*2&yu)I#qQkO#cvK&0bbH$Tcbv*=S;)A8K;w>}
zu@2BU5NPZLH0A>u&jXD&fyRzN<7J>RAJCW)Xk6phuV24FV|}189?%#LXxs)g29lPR
zmIfLZ0ga!4#*aW_e4sH(&^R1u{1G&^1R5g(jopC8>_B5apm9jh_zP&f1~j$>8lM4;
zn}Eh+K;t8zu}jc+C1@-PG#&{W`vQ$2fyUH8V{M@ECD0fUXxs-hHU}EZ1dRiN#(F?w
zZlJL)&^RS%91JuD1R6^NjZuNd=s@F#pm8$LcqV8(6_o!$<2j%)JJ6UHXgmxw4hkCU
z0*x1f#xz0WXrOUO(6}IIob1Ad3l~6Rm!L5s(D)x{JQg&53L5JHjTwT*nn2^OpfM}Z
zxD;qC7c|xf8oL6G^Mc0RKx1m4u_w@25ojDQJv}`gG?oV%F9VGQg2seFW0jz>C(xKK
zXlx8L#snJwn>KCQv^8titO1RWfyVwo<8h!dU(lErX#5g1<_a3W1dY#u#?nCJYoKvg
z(AX7doE0=q3>w!3jlC8Y78ZiW#Xw`Mps{Drm{xv%em-c77&P_=8c$obYSk*x7%yl%
zRa#nF8Z_1l8s7tr!GXr+Kx1~GaZS+JAZRQWGzJVBX9SHkgT}5wV|}18Ptf=-XiN|^
zrUx3|1C6DE##}*TmY^|X(3mo4j2SeJ3mQKLjhlkTwLxRYps{4wSSe`y6Ep@38k+@;
zH-g4RL1TfSabD1P9BAAPGBbW(_LHa1dl&d)8#%tYDEcyUP@v~B7RTMYB4CE5R2s*7{K>gut7DLFfcG|
zv4nC!j)pR&85kHip==PPkio$4fQf;D8>*j$0kl7efdO<93nK#q1Lyz?kh&L0W`X!1
zIS{Q4RZmDA=vY`b28IHV9uNkZCjnwWG00vJA7l;4Y?yfrR!{{{3M2<&x`(hzT+iv=Iix2H^uK3=E)^!aNKN3?k6@5P-%7+^-A_3<~KC
z4F5nHpcrHhl!-zii?c9%{EsZj3{D9M5oUNSLd2LESQtPF8N^dyV_*R7BoP8}Kv)Fi
zS9S(bkXzUo7z999V=yo>fKHbOI~*zx+T3Lz!@%%{1)|@Afq_9rk%3_kH-rx|3Wk~C
zwn0RQaUVn_gk)x5g)pEbGXp%venz`!EHz;Fgir?5lRm9Rt9&EbXcm+(UP90Cx&gaCy9
zMhs%k7cq!9i#SAFLIxtP0j2kVXi)}+3s71IbUdFZ14E7+0|ToV14D}(0|T2F149Rt
zo&pjVXJD8E;)^pdECKN)7#LQ7_!0~Z8$f(928KN#z8C|;77$;Of#Cp%FUi2*q5$!i
z4~Pc&6G|_D(hs0Cha$wCB2ZdJ1;Y1HgU}IBIt5BcXh6)J0-|{s7#2Y3Gay=ofuTYR
zqOS!?Pk_>Mp!5nTeFsE~FfeS;fvDdDrB6WV3sCwElors1sPll*7xW-}P@V$Cqk%qz
z?*OIOfM`($hCLu!gn=Q#03!bdM2j#mh!{fn7BJcf!ao9~J&Ymz04N;+rB{GxQ3i$`
zAXz4rXb&)#SOk&i%Ernp=kjlL&E|^P=UnAt^(Ts#l(=b0JJaj?|=6Y5MNQCfq{Xs
zTLrY=2DDF-iNSM1m*e6ZMT?gViWVp-;?R{cm@LHf9kOn?Ci;01A
z;phL}B3u$&4B)*X;PS6yf*8XC0Y--A35piW859FL7?>EGCNeObnV=})%mCUurRdSj
zz{H?E5p-s_Vn!0yxj;=2Wlt6j0D*W;+vw`YXGwdsu0F?hN^?L
z2SMtvwFg1%0p#{zE+eGf05uNY!a{Ek)-p0MAh#7@_JU~S_TUs|1_scrKcEZ9L2W{i
zKS0?8)Ha8O3COMz76t}T+aAOQVURf>8XY5x6K)S8y95+h$Toub$fkk#gw%svk8lw&
z?KM!`gLG6dK-w?D44{3R3=BC?J_ESGN@f6E>I|*8K}^{7qFgDd#l~36GYjl@0U8?_
z!S8&pcg24f;1baFLP&Q3@-Tqzl3LNh%&@!zv_Fl3VfhS!w@Gz{LA;7R=h6s`$Kxe*y&w4r0%&2l8nNg*}
znNg)cnNbCF_KU`2$eBnHNsKB1PK==Y$G~U7SUh3?`|*?{_&zU&LlO+&d$+3i!RNa$
z6!C%2{b2x|GX^^6#|m^F)N%&Z1RZA82ySN8fLDyF9w!-99ab=c{gR@?z!am+0KV_b
z2Xa0g14GXm7KZLM91LA+K=*+NFm$XDVQ62&&Tzbgnc-*$3&Zgl4B#+Z%m6;SNdgjf
zpmUl)XE!lOF@wV&bhfCfKsxwbP|(>z4UDbeeSz30uiwJ32z*W}!vm+92MkNrZ(vx`zlUMtdTjw`1__3Z>Ngnnt-r#sefhQ(e*E0n-MCMg0t*GgK9v!Ta4o;-K?dL1(ivFdPQ&V{d6{t^u9b
z`UUO0);|nO`dK8JYmPWN*Dx>~UJp8}6Le-|H$##D=xoRmh9&B%3QY_g3~VY77?y(f
z$1*%9u47e!-Lcsh6h35b4>*p4uQ`#Wneh6j)mdqIu3@*>v$M0t&?E5
zj&i;!_$<>0hII@KffSu>%E{mm016M#d8VMY2IyQG5F2*3DX825$#XF@>Burb&o~um
zVvu5RWcdO;q5{e@Dh5ly=?<3OKN`O`x>fzXQ5Y{sF^Y
zb&%gc`<+2)43ze!f$r>7Xkbc#rjyMK3>*>+Y$`wgKT=Z^Xkub!aOq$N-$m*&gM|Tf
z7b(j+5k^pVlzAQK3?M~`1_nis1q_M~2N*zSg9tDzUk|#wM^PhzLD4{gQPF~dQH5du
zdeE6bptBZ0_JYnp1D#_7YEOaAuOZEx1?%yeBXEEL;~ltkiG`S
zRuxtTCKb@x86bDzbdSIR29REuS-A9zFf0Id*?G|Y#LWP@L=@DoUl70m-t)Y;gPmbf
z2Lr?687vHoW-u@`gUcdN`ON~`&&&WCk3;BdUB!&(>#?|&YYxFsPjmxAtQM)ObiSx{0s~w
zQ2GLh764D$fW(in%#d-o7$}_r5*K1%$N}+%7#K=Gd|?KL3J_nIfuRA!7i3`Q
z0r3SH7+OGl5e9|{Aif9#!wnV&1{MJZh6f;;m4V>{lokP9Rlv%?5CEe27#Lm>4WTXNUve&bFhdVz#{elivMQjHa
zu^U*#zF-lPV8skS8!Tc8Sj1Yeh^@dPb^?po2PCl?aE*sapg%OG{EKbQJOnU}mHxX6B@(Fyt1*BP>-YE=ep&
z1&M(T1G^p}mReCzlAE6bF&8QfQd^QAUr|wkEUcrDoS3IxqL7@QSC(2-0t&6%g81Un
zBy5U`OOr~95|c|9KxQSTpqLLcC@}@pcFiq_&n?ZtW=3vlPDy4#P9@lk+|nF0XTpqu
zDO1SJhna`!AGku8d}dx54zn`z%Am%8+?||Tfb1@iI~1x?i}DqUQj1G-N^}(R@=Fv_
zD+*GROHx5rGvt?+DCDOp4F<-_u0_$xB$&gX#)cQ3H1h0|SFwDkOG5i7pwk5;8?0GmjxO
zFB9yqg2dwD^8BI{a2W(Da2OaE{PGpx!UaY7Wtl0dDGEuI3Z=!MSZ82x%qdau17-Pw
zqWq+s)Lb1T&5o|Yy6(=t3XY{E8L4?CnaPlvFF7MMIU5{Xp#0(*tm{lbjdNmIW@)a1
zC#Yft1tlbDFff2ta~7o*7ei#gi5npX;WD_SVpGL{EDlu(sbdp!GSlae0)p(GzvcwweN=O7=DLWpy9aH}EKJb&ll0DK05;ypDv
zSs^tK(h>o;1Q5*ya2ui^F$L6)(NV}vEiO(>Plcw?oYcJZ63}`_Sm6Qoy#l;=WEhm=
z%rstSs{&h0iD$gIM1+B10Via<6g1We8nFb8A)=2rMw86jiRe9-s+jn9Cb3>u~a=>=gQ5e5b|
z5Ce)q=0KS!6tXzwsOpkGDWY2)s!Ggj8BnC>epmAdGW=xO(bX_cTATpW3IV3S3
zJf!Oi8kr0RHz^p3ON#P93q2ugm|3|Q7(i)>jhlf%1{Bu(kZ@;ZgRFyPgN`3Ffv$LG
zU|;~zpix8+4H|a_(V+2a5Di*y1EN9m79bjQVn2umt;+_{pfxoh8Zzd*%7w`zdYvoJ9*fYft<<~8^k7(|#D7(n6@P;nWkxCT^Q2P$p=6}N$k
zJ3z%Q1J;+@hMRC3!vglpyDf_
z;#;8NJD}owpyDT>;%A`Z;CUQ=28KIOanPO>P&hn+s{a5L{{mJ211in}ny2ArVBi4F
z({M8|@GwK>ha{llGEi{^sJISP+yE+W0u^_Fii76!K=yh-#Y3Rt;Q1tO1_sc45-1!p
zpyJ^9ByI+V0;u{Ls5odo31kjv9tor#G>-&|N6@-JkoXL!`Xx~HE1>QHt@j71-vJfh
z0~H6|Gz$_x0~Nmj6~6*C=K)mw2~_+ARQwB6{0CJ04^$kq&j92e9u`P?6JUXan+yvi
zy(vJ&RiNSqP;nEexCK<)1uE_V759OPM?l46pyCNo@f@gl0aP5c{t@J_2B>%oRJ;SK
zehO5422^|wRD1p}
zsQ4eKIB1IsNSuci5!`9FRJ1{0{b1ytMyD((Rl_koIo
z=MVWA7-FE}2~cs+952Y;0;qTiRJ;OeP774L11jDF6$i~jg5q}$RD1zc95hD^65jw7
z-vSjs05#_bRQv=~{0db322}hGRQv^0{0&t6162GER2;OZ7nIIfK=Ysc3=9HnkZ==W
zgM^y|R2(!v3UZGIR9put4w|b5iQ7QM9iZYqP;&yH;vrD+1gLllR6GMJUIG=bfQr{Z
z#XF$lJy7upQ1LlX@dZ%vB~bAVQ1LBL@f}d{BT(@ZP;u}+5`G4T8&Gl3dJs@JJbeOz2UI
z$Y%uY0Z=hG$Dru&l2I)ql|j+sHG`r96Qi2J8HT0^bp{EB{vJgGHb%vS35cWT3;Kz|h;Hc;XPFqQ(w}L&tO&R1)4Ws9AI~YA|eE4-!-BIKiNJLYY~G
zp{J)wLY3jrF;xb|6Y9(=8mdf+7K<1aPgpSPFl<_{rm=!SZ9*D@V#I5PrVdL64Tc##
z1`M0mD_W#79-3##ps3NrsB$8bNzvjngW3c&X0-@qCPjx83{5B087vsKu2<9$V$@-n
z+5_^F;shpU6^nF6MUa^mj~Ub)44D-txG@&lJ5YFdbTE#GvSq#Hcdi6N8#XB$MKd5+=0?
z%NP_L1Q~4@wykgKFlIQk%$UJ~VOo!(13RP2j9?~3izJYLm=qmE7}aKg{Q8r@fnodl
zrV|>p8Sdok4Lz
zFq4W!JCov!M@)(n!kE++d}L7DA<3vXBbBMi!id3zp|wYG!yyKcyFhMLneYkX#vLyh
z)FwnSDQ>vP`o7cc|D2?7BMJpxWuFuz{PZEnlXdQjL%G9{tk5}wHX;qiVJ2k
zsRe{GHk~kIP@HgxS#iN+Cba-J#zXVW7}PvoGOBF&#&jrLivcXY!;o2R!*M3X2_8&p
z9@>me4kiqWGn^Q~?(|S)JhaV(L1n=grbGUk5I2L}KaojsMmp1>ZAJ_r_p3Er0EI2s
z&58?@7!_xfF{w2$GbwgVWKvrY$z;JWsYk6rj!CUzJ)>fW2@@!+549UGsO@;c0OG4v
zd}6d=n9|cU!I(jD0}~U-KWY`P7}W~;7!TF!GpOxwhxqHnO(wO1D~yM>88Rp?c*Ll9
z!kAgD;3T8UjE_t=^O$TFzIHM>RIbOMc*2aisl$*#ZALniS_Ut(qC*Fh;)g?wY8#B0
z4(+pKP|H}xsOTWfsFtvXNzp-^QPJW!bJGrx_y$HbkR1uFjEC}d84i8ZVDJE?i4#8=
z)Drp`52focC@xsUs5avxli~?GX0-zqj7=Xj7}PATGpm8q!6YWN17ggI8=4rK7FaTX
z(>*9$LHZByF{`a8Wl-$6$aLtq1vpKptysmR*kQ?J!7#H&(SeCsZN@xsn5wN<%XDbH
zDT88%8IxLsHnZXmamJ<-Mht2bia>deNo|7(^Pzc$3^oiMJ&HR%F)8l&%%u3?A4Ag&
zLk2aAi%b>_6MNJmG8xq*m>JbJTx3v-$YE5IC}21gug!31nmGf=ziJW{3~C$BGl9~u
z;)f(gHHS*3rU~W@hvbzR)HYmYVqjRjUU9({W<`l41{;QXJ!%f(jEAjq^9A@sQBR!gW`rTCJu&8{Y?(apfF}u
zlQ3rFVc6HNrm=?MkexY$+5$;NHH}RSAb%gyS7lJ#aGXhP!E~l33v&iFi8`>q6=y60
zr^!Rp%or3Gm@qYUfapm~iYF?W6elDxsLl8W&U0!z)R`0=JivKOZNe8OP@X#U4U}(;
znL+ssl#diA2r+{F2FhnM>X@1~m@ue$s4{}`3Melro^WDR+i{VpX@N1rp>M_vY7HDr
ziWB0P6djZp6)n`6LHS4R#Ahb89n+XVd8KKF5yPQxMhuD_f{cow^yKgf>|aniRJ34X
zQrl4i$zL13F@W-un#E5h9)|7xhrU@dC^~2`A?GJW2RX*336>0M1=krBJ03BD;uMtD
z6)lc4f$|e5&w%m~D1JcqEQ7)VlxNgBUNEU`Fk)8RaftEIH+2SZ{?6C{&PSm9qS#@_
z1S7fN%4an*sX`A
zSum(AIK-glAixO9drb!{7}Ojj8Pyi_GaYi*U{DqK!JxKaDif%#S3DuccxakBgNi^P
zgNnru2E`rMnGY=o?L^zM9-QxI7&EI*aA)9Q*wU{!p@@lrVROIghu2JsC(4-AEVeMH
ze7M1^vfwq-Au&)m8ZxV%xWX&|R_ny1X7P?e%^;1TX@@z(p?O9OY8GD@6i-+(f$||J
zKZ45ErVb+pRe^9OP(B3ZLB$#07*r;NGpT+sWL6RIW>7p(!KCuxISs3;~<0ymylpob3lo^{&STd+->|juwP{erXm=Yup
zg7W2r2&Se8B?i?6kql}Q>5zPRU>k#qKqQ0e2X7{o1rwPRcZf5qe7MQ1a=@EObwLx8
zqCgoaoiKpvLsfwr%pm_LF8Bh@pNaxXOah>L(H2Z*YMNlg0Lh;(8A0{mp?xL{sxu}r
zsd*SODhh-%G{u7R9P^INo7Vh6DYqz@~R}W>W4rE)fpvBiU-UXRdxh299pKt
zpz`4oGbleR&M;;M)!mAqeLg3yGlTMSlYkNf11SG31LbXIP#MAq%EyW)OqiP@j2To9
zBti1)0x>3)8A(j4AGDd(D!wzS91vtyoG^(=<-;Lnl?5QNSB$C$gqcD0pyGiDCe;a7
zz~QO5;~ThL1*#(z4+t|Wc6?+~D>%-mmT{ID6t;)vSulX|vf>0ICQ#l5233K}%mNIX`wty6Vo*zHWd!9fQ2nTOpo9sOr$OO-Xr4KPqCgU(S_Ct*qChZ%
z;(=+5O*70HR6l%TQj5rARQYg`S!Ks3aK2JJA<3+IAee!LVfA{|1=pEX4hS(Tekfy9
zi3nx@?VVCw02-Cp(J#QTv;WXOB?iR>)0xy(h%%~y{IOycliH4#OrY>q?6?TY-#gww
z>rZW_L+4BwR3n<04(&H*-~ipJd%}`Q@xV4FP+WuZsR}6lOb}vLT~NZv!LYhtb%!DI
zp<|W|iVH%R6c@~30=WZJzNkbPGOO%(#H2dmHItgd3kDX@-liFsnL+tj?ZXWQP?&@2
zNVN~=nL+vZP@D-UZ8NETxXP?LVp!&52vol@sLb#N=Uc@C;>@ZuCNrs7
z`~&ARk6buT=%N&@MZ#)pP;QOLx?u(==9u2R$3&H&24pfmxhN5SnWiDCxD
zh(bni{kcGnSuvuV5tMhqZ7NV371X9U0Sbd6Cbb1WAo;Q*iJ@tOHp8KL+6;;lBAL`c
zX)M5vkpq;*CIo}qr=WUO@q-#i!_I!i4kboVI~1H3X9zPZ&d3JUBTR}B
zOiXGAeuCSaY9~PD^*<)X4P}f?JB%6BB8-_2^%*mO@)sx^)DCblgVGwP9S6>1CzzPk
zK73*V<*`F`h75`krdS^B_16eK2AM
z)oq|O1gbMxK>fZQNsJN<`__Z%N&$wg>lql<_p>l;?dJfOqhFXLK;_ytV+OSk9~l)p
zwlOtT7&8bkZ0lD8^+P~?jTt`~Sr|62KeXPA0hCuDX=)miT7v*13&Xa4P`gNR$0Bf@
ztT^EllbXW`2DOfhOlluaGP5wOSP!c6)jphIJ~YjQL9xRKoKL|1-*JdpZ9_hjS_3x|
zsGkCk!xKN5)D~P}QacdA1PW)h3BrtuCzzN(cB&l^1?M5f4bzyKb{H~%(Pe12ql_^OGkO$1#4#v-
zILr*L>*e$q6nA`O0`V0Kt}rSZTw_qo*um(-FmFu=!}K*S4Ey>W7`FG@Fl_6$VA$Gk
z!my>^fMIjL4#TE?4Tg>VDhwO?0~q?&L@>0iiDBpk@8$Af*sJcE&Sb-=?4;tu(6r|4
zdnTLC)lMb>3{7ix&0wY~Zub;uNZ~YX8?dvBnY+K*MuyuU}
z!-n;W3mPE%O=m1%5N9|bz{4<6imH!Oa)ENG6HB%N~Vbb2=
z#KbKS&ZG$5l)YsgKf?q8t_wg|3
z^$9TO_Ng5B#;8*9mC=SlsgHrdypM&!vQLCTr%!@GyHAEet51PJvrmOVqfdiDy-$Zh
ztrO$#vxzB`Q{d$#(Ym5S5dK;qxn4ZR{0;bCtHNbQjqYjuhV>AHMVvH_e
z`Wu4>n7+o~!?1omXy39*#WscjhV|=Z7rX{9tIT;Q$`gBQAVauk_;vcYuAJ7ZykoU{R~2&eHLrhGkI|`XfUkl2kjSk
zVc5|RvPXqs(fSOAm7sfp`y&`u_7^a$Sg%rWl`({2MZZc!DWd|z{`Cx}BpG}d_V+Ut
z@i8zY@j&)rXYn!!Fzj5P!mw_=2gA;O1BP||8VqaJ+c2zN&yd8yz!1gBAj7btKY?Lo
zzYfD%a5ykzF)^s@_{zj2#LpnYu)g1gVaIx=UE&N3hvY&2>j&-W2HB;$<2$2j1t+5k
z!^(aIh7};QL3XTk1(4FS04xEfkL0k+D46D|QFsxY55X8rz
zT5zA)0u(k3`}%DdR`#oYxX%nKUmY0s_iHe$=+|M`*ALPM5|?3Eu^x2yJm_xi42FIE
zE)4toRXyYw3mEqGs~B8mP|?`RprSC9LDk_Ovx>!61`m+A5~U1GMr;hAJ>X1AEDRvG
zs2Z>_t7FTt?3Usa)nQB}Z+k;#gkL4;vdKa&(QgQ~@IW>tw~MkW;%2BsJ-
z2Bs8U1|}J0@Sa_!GnNcYHTn!pC3*}@Ar=fwId%+8(0%IQ{p%)b44}QgCJZX;nD&^1
z_jX$_D6eB-uw2K%pudiXL2sP^gZ4TR2Ay>h3|i}C7VaM(ZHan;LM;c(8N%|uxWh(!-n-!81}E9
zz_4$955xBL9Sqynw=is7-@veCeGO=Qa>4=z9tHz776u0a76z4d91KcO`;^u(G9;-q
z{AX2BlwfAEWN^`8U`Sn{!U)=@s(2n?;fl|UE(|OBL1jY-!`k&KCybc|
z7}oZyco;J>Rq-=`^I8%Q1H&p&uw9_?Nrz$GdKrc_>m?Z0_Zxu932-^Gb-fM4&VCVy
z+3OjKI2aTdw)Lxk%7-1FnLuSq48zLxDgnWa9t^i1BO-W9T*n%2QaMemjIQ8Nt_G`
z4D0(fKxPKs&ItS0;E==nNfscO}_;L
z(>falran+UHDF*_r(*G$K}8{iLB-%QgNnvx1{F~JD6uer@;1C20PVjwc*d-1ahzFI
zgOynov==`_2WuV%XrVQ{rpQ8&on*v%EFffR(V_^_oC&9qAPKJSVodN^LIu!=?
zbs7w8>vR}c*O@RdgWR`{gF$i~4+H-?0R~=BT3^QjuD_VotQlBVF)*a;U|~@1vteLT
zvu9vlrKq3)&NmDU&O3Y)cRBewlJs!Y-UjLn9QJ}F@-_J
zp_oBMp@cz2;tK=V{|l~w{m-ySgaK5afa6h%6>fAZLhJv4hJ-)fsI}ssdgN
zsv0X9R24cHR3*|O<=h-&a5)AFTTt2O!=SV-hQWAU0E6nf5C)ZX5e&-fm>HZ_F)%po
zVrOt&#lqmai<`k^6$gXME`A2*RXhyNyFhIpVTRyUp!SadL+~z;8HhHJ(mF&NNNF9S
z4WzVg3d8<>L_0`n9Rq{HIu-_nbsP)|>n1Sl>+fOM-rvEnt-pm~Ykvd7mi`)s&HWV&
zoBB%_Hue`l&o-FBuvguIL0CoEAc;v4sVw4QQ0c=svqhtsK}Dg70d$TDD7~pFEMWlo
zn}FJ`o1~J_&Gn#NDUC
zz}ct6z|m*Iz}9EMz}hFnuw=c8f-|E8n10NlQm~lO0>sW(#HgZh7<{IR4a1W4p!~0*
zu$V!BVa<96kbFWiqYVQ~AE-{20hI?E7Bi_VNM=&`q0Fpu;4!1hibde@5tS24%qkU+
z7!4TKtXD};W>op`m`Me6M$3*zOrUdGOhDouN{lKA%Kj
z8JIxlw}8rSf5|hbE@)y>{qdbygJDs>4romAkOa6~
zR6W4NtXgoL(Su=8zYItmRCf!6gU@#Wo$~=|1F1@6gU_K6VOZS{Dg!}nD&+D2bQX$g
zz$!*nkC%+94jqiD7V6BZ25C&H8cUg&M6?;0K=t__dj_T>7LYn0)FuegLM<1IIc82KIF<
z407u@7{u1`Fo>)J<$VhVR%pG?3{Ll;`m~9afdh1Q8m>F-2jyB@8lCA7BMV)m2wG%mNt&TjPno#uk@4^fk61b)a>SAhSRiv?dnBw}hTG23vQ!
z0*Ae@HMSsgLHa@Jh&j{YsVs48XTQo4ccz1d0s{kReIMv7U|wiAV_Q2Lp~%1hI!6uU
zRuG1TABc^Nk;TbbI}2MaD6Q77K9|`OfrZ{2+7RA!2nu=
z46+-vHWjp17PQ7SMvwu#ha1G#geV1*pl|}kUxz3I!xeVOnP%u`I52<~Wh66%6eZ>r
zr{x#rGJtj}1ZO117nd^xXCy)nB?WPEA;+l(XC%61<|XDpg+S*jFq{!&0H0&vBg()4
zT07GKrFlT-j0!R^xJW|8XGk$Huz>io5Pk@hF3w0aGBrai4S}x}Xgv?ZydDjPrXB-^t{xMH&K?VfjvgC^_8!pM0noaD1jg;_V;Hxs*I}61W5Bq0
zy$R#$^&Sk(Jr<0M)<-aIUGKxt)DyzEWqknS=Jh^|o7Q_UZd~uexM4j5!@l(jjH~-q
z7*?$ZjjO9Lt_HPT*K;te2DzbMhhfEf9){KHbr@Io8-UL)TD{(Yadp25!?N`v468x*
z^jk12T`$3~dc6(9;`J7ctNQ~Ox_UwwI>BpQ5*XTgQW#o$G8meBV!-YN`4i-~o$Fl~
zR;~A7Sh?N@)b3|kq#gh^UqU5>VcGf!hNbIc7#6R0U=UZaVh~edVDRr@VesoY)WFYh
zXrev?2ZL{qQ;I4>Qxq$M+Jpe6rXGC;#S@W?hvujFH(CU`UPF!=NcFnISITB6LLwqgSlXg!6~
z9A$<>Jz5M-Em{msrZJ3~CGdnAAE@;ZTbjgHw$fgJMK3#EwPm42lV77{T^*u`wt{tY%P~5W=LGki(!>@sUwcqli&a
zqMwnSK|VQ^lf9Pxu`%6~C&83rd6D~2r9
zh5#-G35Lb$42+A^6$7#u7#Li8&ir@oX))FciwC`v45;9ziG!@}UC^7g-12*^C}`DhGI
zDl!Z!`vn-*^n=}7G$y0Yz!;*!z#!bqz!21Ps7r^T
zsZobP?Swa@>Ve}7PIWpAPQ~gBO&OrII7Liq4F*gqD~>a$9AIT`+N#c=*1*rCIKh)i
z<%ABiTEF3U
z&U~m#nZfC_1p{d8P^BP`p{Y@sp{W8i|8|;DC1V+*iU&Kh(==sAuWl#;M
zU~+0UW>BeE&v2+nm7(c`F@svg8%C7?cSf~>vy3Vp6--T2jTsapw3(dpR2kGxNHT%^
zq;|rHSurA?QPsnf5tKG~7{q#c7(#m#JuDd&JG2=U4bm9Z3KlacMqFiT@>F9`4KQYM
zI&H|HQgDvpP?j1)Q-vXeVnPn1TEgLE
zWK^s8z^GWz$Ea9vno)ous7EoupHYB;vsW>p546^XQLW-AgQABKV^g3ygKES?MyF;S
z29=8U42O!;8JbS$fYy&Nsui4KY?`XWpb{{VQLW-Bqf?$b1895%#XlAK45|@XjEWU+
z8AU*TiKt{0Vc_ajl*ngP^!UN3cHkLNm?c2=Wb9;=
zVBqdm)Y!qO7$D57c0!#|F`|^QDN~EVX|gJV3aGp~q{X0Gu$ZB#L6rd?Fe9Us?%an$ym(LG*=Z=1~4n0xXGZJaTZ**DW1@0R?OJID8nGuD+996U?-zu
zgdwxq2~S4FimOabnc560Cn^~a9nxk{EjY^H)UC$Q)S$+oXz`p;?Eo*c+6hf&r#fv0
zm4d^JDj7!^K86k+oVSmqO%_Lwt(=OWPN9?<6&2+u`;=FSPvJ@7DS^a(Ji^@%X3_DL|P
z_sKA*^eHeX_o*;w^=W|S8MB)Gl1seR04t-RTh{qs?0EEWNPAIU|1x=z~scn0Gdl?GGb)_&7m=Au`__?otUgx
zz+=2jO3VzPxhl|DE<+SI1CtaN1Jf*F2GtV=;I&?=4jjy?2G1B(HI6c>S}bP-&*y^X
zZbd8^m_TzFE*g+AT+kS;jXHQ-A2grA!=SWIgTZ*60E5Ol5eBt&5)7*AWEj-fDKMz4
zQ$d;A@L0vd;IWIF!EF@>gWE2C2G>oV%M)4>yRYcq#(NFR+3w6P`8fOF!OYoD+T8cOKQ{Lu
z|Cxn6D)~Aubyu~Nc->jKA?8-c&$6IEyBWF13|E{`XWnqUK63wO?gz)*CoaDln0$&Y
zT~kw}m211Yg`%|HpIjYZVP1>ikYcXX-CS8^dM6Jxw(1m3TKHoBBJVV*6$RbihZYCs
z9G84C>7okT%xkTtd|wI{WC@5JTq4PlV=m`Y?xDVQ&jyptJTjJEt8V!DpPCc>IbSd1
zT~mKae)7@^k%|*798AZ1e*ND!;dM^HlJARu?)y|xcx+J43(@!tmKe~bdf<_G2Ke27
z=<`E7QVa|M;Iq{schrF9X|SEaG6Bgfkdd&N28{V39O^*x0LW*sfXoBU2Z782VUWEb
zKF0hI4)b91L$EVgR)EyO90i@H0hx<_2FnUj;?7`sDoW%$k|=R!uw+OuFo4c+0G$gC
znim227esTS-JQ5Yl7S%*5E67oix}u`K6VE1WtpIPCeVS*2iOtwPM{qx5Y>=)vu0pmcmq0P
zfCDn`L%W@I%CBfab467#LhcAp8(0U7V3<
zYG{NxFJ)|qeO}7M)Y8I00R#x&Pj+H0=DgI6zkAhxFf3Uwz|f?k!nA+A0@J?rGECdo
zOE7I)FT%8Sy#Uje^*l_Q*K;s!TF=6?aXkamhV=pri`4@dT2xpV+x(aQVTowEqXgvi=_o
z%lm&Ytmyy2u(JOL!>axt46FNpFs$kS!LYX9gTblChatJgfT5+wgkfoq1;eo(8;0jS
z4h$T)}LTpy8aB~vh^1jm#@FV
zxMKYc#+B>uFs@qvfN}NuCyZ;>zhGRu{s+Ul{vQnM`xO|@^{Ozu?+sws&>zCEu^)6t
z2MsDBB=;{G>`>(+l@
zT)%z|jfBhtY5;obG--SzV$kc
z``5cLE?Td_xOja6!;=0KhNb;07?y$834_)PuVGjYS{v7&!?3b{1H-EREexys3mDe)
zmoTjD-@&l1e-Fd@{tAW-;Pu6zb;h9i5Cg^~>ung9u5V#nw!VOI<9ZXuP3svLoK#X6
zm#?p2T(Q1}apn33##QTm7+0^K!nkIA2jklH0gUU`CoryGpToFey$a*z^*xMR)`QkC
ze_-6%|AY~=&S+~tXg%{4hDGb&Fz)Do!MMNw3ge>w8;pzlFEB3Y-@~}H{{Z8%{u0LR
z>)$Z!T>pS!-}(oP+xzb@?(09pxU>HVw&_!my#=DN2yxfT<9}flxsPCodre
zHI1E&Y6|BW85lSBtAY0Af#xyu+LV!#b1r*u(cFezh6-ObU$q`_&xy80Rpq
z@1McAu3vja1S3
zhDtdG)gSj51sFH5233u6CY2vwn3sU&
zA_58+6&*4dKx-dC=O?IWY-3PSC}&dr@se5F!kba?$9_gNgF_6e5=$5q4~Q}<9{9na
zo$;1g5i%di*kCQe(4Zs1aDicMe^U(?LsKyqgKEWlh6ZCUh9+eR2GxRf3{4^u3=J(@
z3uNd)~*(r&O;ef3K
zgPMUMvzo+VMh3;9}GBlKlF*G%bGPp2q>z~26
zwf{hZ2!oTqFoUW`C!=D*HYV*AQyD>N@dm@z^%{&@`w#sQW^h<6!f;@QFoWuX`Amu%
zt}?04_{?a-xV2xk;Q}LgZro!fg8}1~ejCQ6{RWKd`tLAoTMx4Pz<*W-rwTp>20d1W
z4-A{vt9ckOHq8`cIM6P_z_3k(0klrvVVNi>?3m{;Zd*Ttam#wAAEMy!yTP!npGixU
z;SOk@3FFp&5yqwK4{3@rD6Y7|^nqbp{~X3G{c1BVGl_uG`VVS
zW*f#0{fZu)jH((>8MPC17!_A+W;(P`fI&^;D5Ii=Dx>0xsf=nrzA$ThtYlDJv7bqC
zg(>3<#-;1$Fm7Eh!MJq22;MHP_W+|W(zYM^5kSVv_ypA
z1H;PoER37ib1;J3zoq{UXz%uhZA?6%{5GS631p|!dQpZq44c=3%(7wJy8gflPKE|Q
zPO$w=3xydB7+3b+0PV{x=wndyFlM|1wtsW~ABL6v+6qS))jW(D4H#Fh=V092&jRwF
zhcVcVAa{e(rs@h)Mo@S>VOX+Wb%6=v9fl?SAT!lATxL?7(aCUwVM)K*hAT{J9#a`)
z7?<>e@=4Q576!!)*BBKQCNrt6FlE#(ILD-@FqJ`3;RvGvD233o<%%CzF
zw09e{?ncGpJA;bBTV~aS)eILvWmv@{M%4w+7*sZ_W@s?xU{Fbz$9RKb*?QH4X^e^s
zzA!e-7G?moUz%(<7!(uMFsWLkGlAj)RIWCO@G~@=;b%}>u!TugAc?8Tn1kU7!jS!rfPnMC!jDkc*fAMg@fS+!}5OB4d7&;iY_CH|QwjLzMAjZVtv_cd-7X5-@>w480!3+%BKx!8CgVf!Cs$&vjVsKa|
z%J76?>-s+oi`G|w>J&jSh6d33fEC-AK>7Fu!?ykh3|sqES8QVfnFT6yZ$SBK8zwV7
zVc6Ucs*gZnCc(J5Uj$^v98kRk$p;eP`eAebffb?*PVH0F$PtEPzF#r1Ty0e
z!?u1F#zpHDXIy4#5)@^4zyKwF}NMD0b*DDGD3{oyEe~RKdc)
zFp-6!VLm4VQ#vPuwt*Xi>Wq9Q#ST-ZrVX473@bSqR1o`FXeyRtP^~!6)HIui;Q_<)_24vG(8ts;MUFvr
zLNK^ZqBi3K!wrV@{h)dubQX!zE;)t+wmb|6w#qR$t>R%&oA8NI`$QxtJQ!40TxC+V
zc+R8hP<%BXh2or!^QYyTC{86pd=Fssa%%&6AU%%oOPz@)$s(pSp8KuCol
zxUYb5dw&k&^8N$c#TlGdurn~&i8JIdZtn+~$uvovp#YSh_lq;UVA#GMB<{39i~*D`
z81{)Xs809sj-hTrs585LDsz*OCEME`G^Po0)0OPj)DU93u)h29WQrvKz=?%lS
z^>-My_k+?F3*)Bspgjx^7&i5T?st8`ux&jkJ*!%{Gl9en7&rABFmCS$wHpuZ5ob6s
zL5KmA&IA~@uXori%FqGoH!^Hm?=)SMApx96w=+#)+`2x1aeF_gKGt5bovDKnR6m34
z+uEkSyU_1l2LXu>CkJ0QEai!n4z69?tX^)DDUtv|2<)SrO3TX97w
zQ2Zl|cFzZ*_@rh{)AqslREX7y~GLLFI`WD7{PwgQ^FG&8B`ui{(se8$N-=`n6YlWl-D^
z#-z9d6rRi1L);9C)9vd)eLT<^A=&|5;4`@t10om|1N<4a7nm?97U(f4F6d&??zqUP
zIAJD}qQ!AW(3v4kpbNzgvN1IDGchpLGcjlvykk%Woh30LoT+I869dCaCI;0CerAVx
zObmxkvN1G-voSC&XJb%3;0ZnhPI1B|MsS|3&}UK&IK`yeQOR^@C1}5`CxgQ_HU`y#
zBjELyY8@XL6;JpwX;-8(g7a)Z2%}2I5eC%*;>;=q_d#bJF)ALgU{WnO%cvF*#;DyP
z$P8L9*|bHHp`n-?wEmY#b;C8rhTW134QnJBK>etu8g7QBY;I70gQ;n;B*P1aRiHGw
zUNvJaQ^Oo?@HsAO8E+ZY7W6TK^6U#xztn=A*=ZLy!+}sqh67u<8Jt#0GN{e?%n0_!
zimOc82YxW92E1ZY>o~!zSRll#ma&!b0>h?$wSX*WzTMofvcQB{rK6Bhtzr_BT89Rc
z217|-J=X#u9fqPl6~^uTCX73v`Bs8~;g~ps2`EjjxXQ#dOPoOknr}gA2_z26x1f9n
z&bKp!nL+X@j63={7`Lwn$%FP|gYxYi@L0>X^@k3E%7JbD4xoHHV>3A43NUV44@!fe
z{P~1oYdmj9dFb`2mz~
zIT*LDS6lIe=?}w>ehW~(JuJZha{m*C9guu`M1lb_b_AAR4{9GgVc6cUIzyNl)DCt6
z<=c7SG7jW!aK05_1hscT_e_^EH60XZ0JXtDZUvpEkOR)AptkS!ezhH+!TIzH!)CC1
zRCj!4Vqx6A9#o!MFm49tTToc3%_wIAl_?yIn?ZJf^KAj+_Vu9fxxoM`dpGwh&L{`9
z^+4@+P<-^OZ72iRy`XxufN?WC--5y&biNAcjEEZyo1tas=6=NkJDAiqfZPLWvxqV)
z?kEH2+Z@InAor|iVFZnzf%0t$gJOdaleR=NB;QIDFepmoGl27LhAxxhf@UV|j*X0p
zGrE`*5A0x6oMFt=u$-NNVIm(x(+WNYrf_x!?F?RKP`?M{=B5UA28NyN45|TMOb*M~
z85-pI7?`&6F&ygTV^E#&h(U42W=2r?rP?u(NmYWGNiAR%)1jU03@RCq7#!O87*tmr
zV^o>o$)pw#$f#IR&!pP$fk{oGj6vncF-Fx1zDz1BmM|%5ure!72x3%Sv7ZTa=A3rN
z4hHQ2FD6BaQU=8eeI`W-XU2wXR)!l4i`O@8;b&0Yu#K@{H$Owe8h(ZwpmCNSR)(hE
ztPH9hAHiX&`eQ#6=-eZ<6?KeFi}@L}CkQcv+^P1%o=IiJR)#wa8~YntSQ%6sM3@va
zf|;Clu`*l%-2olS&u~DNmBDEfKZDu=9cHx&`@s1Wv=&xn!52nQURK>u#-P^G!=(1(
z8?ymJNuOE+7gI0i0wEKI;=T;V?fpHBi^2JoAxxa1hjDwq(+XyA-F;xcI70^GHc;HJ
z2a9hIV*u^lh38iZXGV~G2IH#!I}F>wYC!u_LHYFyv@ALl2+IH4`aMATRbnwXzlK2b
zD=2TiVOR{VXKyep?*GEDy&sepLG^%YKo)op;RlAr;QANTegoID63pOwegQPUg31U1
z#>MNMOVtB)_YW)L-RgnA|!o>h;yMpYr0FAqY>%dk0pnM9d^Hn9B89{Yx
z!#;5akXt}y7s%ZqjNAL00+|^USA1nMVO-n~DjO9g${9fWV?chr!?3s?be72-@V*mJ
zyI^s@szf=%7ly^_LE!;%3n=ac7#H`e?Rd--!nhbzH?IekJ=zkBL1wN8#V^Plu-Q8v
zGd*Bf42}zs`Aw3{3~C#`F@ekjg%d~}DDD(@JO20MJS`J_ObiQo85*WbFf`5JWnlU*!2rr5sxyL_w0DFvHf@k#U|1=^
zp!#DzlfyI#hC`ja3=QtQ3{1;;8B`nCnL%y^*RMb7nN%H4FsaT6WID7`fHq&OA|b
z5MxwSc*3kbLzqd?L5Q*8H)#B0|9VA-45k|lE7sp(SkVs}%WvvoVYtAsxW8dC3xjHh
zAY+3H3q#WqPKKt2Om`SIu5Vh+%-}Q$G?v87ptfKdI1E8)xZw{cgX)j3
z%uY_645|t&jEXzT89-xLATtllQ9_&vbT*G#hc=U1!%ij(hRHosIT!?O7$)^hVBFqc!nmcsgmFbb
zcr0mwI0J(k2e==>BwljXkk2Zs`Z-=>;O-@hy-Xs2+CO
zFT#)kT37EN!pOn6Vm(Nm0ON{&(73I(0t;gXBWRvw%X$mOCH*fLR`i49RTY+i`n>%X
zj7!!ZasiDoEa`VzF2Vqs1Ny?SV*P;yq6`ggq70yZrs|IA3~xYZ+$w_V`0f3mu_#cy
zD>{5-0{ItICMxdu%9O#lef<{(NWHGQ10)A2<19d9R|~!{f%DCZ?cjP8RHlIXquM*f
z8GAtWsKOE^8OH6PxuSkh9(uvB9o+W@ncuWioI!2D7N#%YGIJ{^Pxrq8o#DG;J9rEa
z6!xG#0w{ddKw-N8)Hm4Puc*MnsO`|fpt#}-li~_d#vaBcpmJX;Ne3Yio?oMBe{aDiEShB5d|EX5ghp!P45;(~f6MTH|wilDPUK?lxHWM*ji
z&c(pg&c&eZFb%w?TM=|N;}0$dhMimtsto~54)eGe4uRCAGcz!)XJ%0Ch+tF{Xkq}B
z2dXQ+GO0COU{+0d!>szDi0P0c7lX==2u6o(%nYhKav4-Q)S1*i$T2BSXk*fDZ~>1C
zgZ6Z(800djcGxqi?0CndI6;UBbk>+!!Zb$J9nYAwKiDxT?wHQl;LOC(WFiDU6H?WH
zjqw7*ivET*LJXk#rYV_;p<%NSXzqxqsfCF_Z3RCgDDSE^TwrRNEyVDKVcGhIKTHgY
z3Mx!$8&nxpe|%=v?wH8nG>ZxBZnXp+CY23g3~v}V^n>QvKyxyR4kk?Cdi5(4gVQb{
z2DOf(;Bh9kAM#8pD?*u6L1&OPtY=b7n9iv7;~BF9LuubC_5(sL3?+RrjQjc{7?<@Q
z*e}Q61Ufj}OpYOfaUZzN#WYKfA%<~#|AFsv3||=btp|xa?Euvm+t)LElLL+Wg5_fv
zLF4HVdC(ab4*SHxeg(}bg3`kwLpcTk#(m(q0#F&Fy5k=>9a%8$1J`G&2FIAx4APiD
z?LUy5+J|x`ki8QaH}@afD9)fb<1#}CQ#+9r(q`W<$QF_p%2Gj^O~b
z9}Q}UFJRoa-s!s-LkVcyWkwmu%=I93A&i^*L1RbS25C$sjLX)8>XZeH%lcIqH}`|&
zRSljof$F0LjLX&^nj_3`hhZ7GuABgFXK!BLuuYudzzk5kV0*vnhkGFZtZyf`dW3yWoB@g
z?D)q7G6R&aKy7jD5BHcRFz#Cqa*qh(KG3{wKjZ_|A$EcY~J?%
zI}D(3+`Jy74ituz;*QJAiaV||O<-KM9yD((
z!MJR_2;=tkiYrPPL1$oUN33R2?AXYp7*WZn7*W8ey~319F+qn(am8vT?T(3ziZk{z
zDT3w;W*9RyE#P2ah~!{s_|C$>^q+-6JK+q2>W3@LiZjZYnm`vF>||k3{ZY^8u#AP_
zP$vgN!+8z{ru7^QstsKXiWbK~=Ls`{^Wu;D%&I4DGO2!;$aE-?g+V2vi@{+V2ZQPk
zW=53;2`04<|Ckj!@|d)LJOkBZjA|!LnN(<*k*+$z(7QbEuh8IyLy1+X8~
zB3?5qCI~Yf_{t7$<2vmUWKi4S$pAV}6Et=N>ieoJFahU970@}rKl+%|PM9-$fZMhw
znf9?Q5b|Lt?sH+>*RR32tzQFN2Z}K`ZIEMNC=+D>wf&h^$uVdkE5jDkDf<
zgK-@w&8-K?gXj15!Sds}^`P{5s1TYTSAfSQ`$2gQl>XrPvEUq&TERLdP(1>YQ~R);
z31lv44;eT=uDHq=0`4zfV+Qr3IH36v)HX)Wk03c%egyADTd@sf=6aAiP`ekL9}Cto
zMKG>|=ErrQ`UcdV?pG~%2kH~{FJN4^{?HoG9OOE1egy5ewqV=}$&V|*Z3Iw$WCZ1f
zrb0-51dVZl#?@f?5mas|ez?vYftDXZWm*g@Kd!ink{>~JEi6CAfbwI(J0=@&S-BmY
zA8#-~@*^lb!TE8;S8#p=m0O^^25O&!@*}8D1m#DNI&gk0SjVKc0-7HS&VlkHqvDRM
z;QR;*hZu1Ey$;m&U$3}e3xi_CXGU#}Rwl)U2~3I_>lqX^_A_WN5Mfe0A<3k;pp{9x
z!GKwDMK=?8ymy5tQ_~C{28NA13=QAe7?|SO7(nB{svj;hgX;4p(8Urv*%(wKPBS^o
zV`Dhf$ivW}&%?m9orghn!4U?<6{gIfbfy+@ni(`_tNNjU>CjF#29=5<3=aQz7*tPm
zFsdx*Vp976n&({0r26AOlNxB=KBI$CbwNLq$_Zs=#RE4OL1&Yzp3r4h1GzPVk6HV}
zJSIhroeYW%1&oRsN0}Q=OEA1)Sh~JxivWY_1~cY{-2w~^e*_rbfaYE1NH8=-OE9R;
z_{;{+jBCf6Qt#E-|S^)G-Dy
zZ0iH{rWp%M2=CKzR++
zmR!KNuOBqdp{nteSxsXpqXpwya2{3ru$>WPuM6Ya{zE^-85A?tGAv+RyIw8hJ~ODU
zkYL>3@332r;m{v>1_{P}{VN#vuNPt5-+$nP9K#z1P`xP6puxDmUom4p$jtR1^$Qr+
z_B;HRXVBJI%BaD(biDvr&)WVKj7$3u
z5||%%`~!_`t#@JE-oFAGzMwv++K21RATvPW3#vc0cWh?_*`ca&lo>ScqyepCpD^rO
z53&OkmTEulgTfK)XHePK^i!VU4|uK9{(d!$r%Z|;?lXhbgX%_*9?(4-YCrxlJz?0_
zubr`$L2<`@W<{_)OV@+k2wGdB2wMBHVk@Jz$4Mr|1y`6r>j^;fx!Ry}M>D#a6gQj%
z&7(6a{y5JBG7mI|&ahFEpA!(wIzRgaU*hj#KYJYm?p-r<`hLsJYFgX)KW
zOcy|77ohWeJw%HpnnDG3Wt9=jzw@_|B{{BbZU;M;)UgXx!Jsgi)>H
zBQt310CY!01jClTmn;W_Vi@-K`7rM5Zvc<`$T5J%dl=;87#cun1~g6^CCA_c8mIjZ
zPIK!);!YdH7(itRxUCwI4VL#|T-*=J3m|#WxDaUE2Q)Wm!MGSarg=ybS~o_lW`c~%
z-eda102*rrwXwGKt4b_pQj?wGU;CAbVRFSN9)UDaN1}k
z#8qZcKl2Od%+}4K44}FcTsN+O%)^4@Aa$cCLkeiFC888$Cb;hw!nnHMVYMg&Xbn{g
zA3h!A7=
z!mzDh^+O$`ttu%7ZmWXEguru!E3Pqv#&AL9oZ^RT%%C$+EEu*&}1u#c$)R5wZ-W_kcRV-wWo-f$1x)&$L0fy@WjjS;6o
zV(UTcKS1i9fX?dQaF6K&!)owcHfU@XRA++1RW0Hk6KGCWQDQNZHt0@{h|}P9XA9%v
z^(l;?`Rm2&!R}uW!k{=Io=IDvi3xls1?Y@>0e=SV1tmnhWkw5^8rAYPJLu$P_6K1a+t@;&>+ss
zz_g#2;m}X;cn#>x21ZanN)lhrC@iKtMZPY6MGpY%M
zGbsMZU{nRo6>iXBRB_nJs5&8(NpZp_MzsYY45}U{m=qOK7_fw0<9APtd?XT
zfMMl&MG0r7rrGig2iCGMXiq3&Q1m#>tmg27@eRZ3{)Rm)3{H#W86GgKhvdl}pP8IC
zu`nDEm1j_!5y7bF;Rzmt1qd6*$DCGGj7>O2m6+HPAgfJ03A5Fog7}&8T2f
zizs0H!@NK!g(0XffpK4d0OO+m1KUA)l8J#qOpYM{mM5#^7!sg)@&m)Z^&oLjo&@#1
zz#u&biuFvOvl~Ip^Nj`4d#%IDO}5@ByjYa2~YIZM^{Fwtj7aLrgx5i$H6J`yGUt8167ET5rL)
zz8|!PPqkt_lLq6~e$e>~ptdTg?FVurXslKB!#*ZZc>}7C8o+(Y_3In9F@fi44pcBP
zGzrQvurPw$0O~*PWAb6#+W!GmXRZLV*F*dWT9>g8y#A?yace)QE(O^MYFmQNum{cg
z+ySlo1=V9Kt}-<+Ze6b`aEKYSjsa9=Dt@@i?8CTkJ;+>8xuaHbo*Cw6P`ETz@-w_(
zSic_RXEo6JgAeDKVdlMHSl_QGaEM851z4jqV=G)
z5{e7HfX@Wi2H&SNnMu*&BP2gsfbPl4U{b7TXJXjM$LF<9EI}U-@9Dvfg$_!mbkRMe*_c=xAFsbc$&IDRJ0P2fhU|0k3vjb=@ciZ}g
zJ!}k3t3m4ozcML0oM3LSW@Bjh%+1iWgqxvZ3O9q=iZ{$nbJ!R_eZ{73HU_mFT@0YU
zzM=y^qiRPWlWN5m2B%4E3{H!<8B}&$XEo?HYDx+G04$~cmW$V>CHZfT+u3j&|xM=+n&^TqqbH)sYX?=Xm4}@|U
zruHd-`edNB2%z@s0?=9nIR*z%zFhEyiD{A?188m#G_J$KxNkj39MpaV^?AVga>6ID
zyaMC$eo!9?BoAJTuuq)f1H<<9A&kq{gXjA#q4{#cBqmVX6|}w%WCo~B3+nHvTC{`3
zL2J0d`O?CjNey&Q%0v+c&|Li!hE4sTGQnZ75W^qv8T$ViKy@N$T>_|m2AZD-sR8B7
z6`;1}cOixZ#!da8d4JISAgFz)ZSkBbfN}ZyKMc#kYYo0IEMLEZaZ^8NzEpL>BqmTB
z=Ly5|e$cu;(0C=tjZXW;89;3uQ2P~R59l1P6^xtKH|%3)SircY|G)%xh9*ln2GBSY
z$iIp^<}n2@g2sUN^(!s_v)6_+Xw5eBsd^^Bl#8?_EgCeWNDXw8V~fg4OJAMP=#
zotV$`gkjzK0)~>lKMd>FgVNj^hBfO!^OtH9BAC=Z9AQ>tS|C)yP}~Qa)AK-ETL79@
z1g{C|5@!If(cUl4u!3>>dXPA%e%!*iZ9M~MuA@Vc86>a6xC1n12$p9$BmrJq3!0DI
z!MJ1n3dU{yp!Ee?KxIV7Mkdg>it2{zOe+|-t>3}8y&v3u1I=k4uwYujxDmY0Ky8N^
z6UbZ##*L6RYlk5755|q_)jGa{*Q|lY{Xy%2K=lWBu44swo)T2X_y1wszTRoSD1!p1
z&DvoKGIKph-4Di%kT&Z93nm4|9qSi>+G>nD`X4ZC1h4M{g&n9}_lI%E`a?Z}3?Ym=
zz-?9s#;xmjFm8mjSv$aMYWh`oh%;|t+`hi)pcumsM)3ShZ)#E$1GdY0fIu6_bk1r{J
z+pO0?>wo$c7`Lqlt)l|Zb#z<=iLG~F+}01W^9Jbr@(tISI2b|xfvl?ntt(PHV8Nu;
zah(aI543hb8+0aF$3^h?sRQGV^$Ls|*I!`R+ON1Egb{R41$dngsDBj@%%~U;$*2v^
zvt3M}u}je1LQNZZ7(nX;6c0!+scx9Y#ITZwf$2Ouc%2q#Op{?FJA-zE05fQel4(6?
z9o&ZXiXSd9JIrHeP+jl{)LvvdG?53SzF&1h5mVC+b_SIh%}fp9AhlciL36L*Ig1lF
znGQ9wGdS$yVNl)B!Km`#5d(OA0O*dd6GqIcJH(mPR)jLDEa+fV{ZPlGvf(87o-FMd
zI~Wu*beTYFNK`jmVNwjpWzs%zlUcE08*7Fb50<0K=V{;8(uRyePU%$*$~F4wqrWefw>^H227y(Rc*pCMzxH!U^CS^PJ_pK
zz-!)TY-UuMu!#Y*W<>GC0)`9VIdae%jt%S8Cb%(GFx=}iWqcr1!*IEehY>WdwxwT&
zacw_n9RVl}g66{xZ0BWgS|I`sTc-`;3?Ow3dAtmuJPOLUAT>;jL>N>TY+(eA@qqM$
z#)3fVKxZn0#%K;@iZg)I2R6J*W;-&FBT?*M88QEm=vd7{wrYVG<1J46|_Fs|)yS}DRH0h<5Zu!WI_aZA4r
zd2(ZtZ$d`0N0!?ccGT5j6g!wxE{@WQGLemi3^0Gujzv
znPeE(t_O{oh%m10*8!QkpcmwZ^&qn)7}xfL;veKM&^kv@IDzsksICUJOVn0uWdz+r
z#RA?ZwYDEr=Y!g-YCEApa`04Q#it`s4$vOZtmf8%W
z^1}zveLgS<42(%-2M?2qLI(q={#M*j#-!Hqk6Be=I)mbbO^l#E
zx#EwjpmhsO+A}UQDR!tp`skpx>xz|3pnWA*7*_U!)+lOk_{I#n_f&wPMWum3Q#F8r
zSA~Ib$$G_(1O~+k3z!r?JYZJbae(RZ$6k>u3@g|FVA$AyhjCN?6UHt5Z@~K&_w|F$
zc+p`n?^B%diCM9ujzMvP2=f`nCH;yEelqM~+}D4Fac93`#u5fag`13uC+;yk0F4Pc
zykJt?aF6K)KGjuo~#G8p+IXwz+-q3
zrx^kmmZ&RQykSuE&|n1L`J=(WAi(f>y$Hj%^%4x9)+;c4S#QAbalH(~kM$}H&(~`(
zJX){A@N&Hg!{hZ93~$%lFuYpt!tidr2gA?xJ`AtdgYMmEU|>@bU|6EA!nD6%foWgA
z4Ab_038roRB1~KR1(>$<^Du4h=V02@&%(5^pMhyZKj@wd2L?9K7HtjJI=ZSm_96F3!*8gDG-hY7MN8b^KkA0vzs)Cn+15{7_VA#~ZgTcLT4?{>F
zs7(!PL(bq~-~hEFe=w}?-@x#wcMHSU-UdcQ-)|E)0|%)8_k&?y{|bh~{c9Mm_9Kti
zoaJKR0FBvz!gm3~)BYt4-}_w{m#%-t$-tq(xPAQ(hOPZG7}oX8Vc6b>JO{$Y$-n`c
zJNdz|xqkvfTHh3g@;>A_OC=5l4iT{a75yCyEWJGpqP@uL3+&k$IBqa(1)JZ%u&S?x
zVQU{~T~Ih10|#h*70BKSh8=x14BPvV*Z1YJGH|?LfViuGVR>H(!}h)@jEHr+^(-L&
zg5)>%XD}r7NA*8T*BZG9;WOZq_jZ)P(waDevUfcz7|klGi+P}+yQ
z-|aXf$Uh+WuILY7;O-4!5a~tU@5#@|zyT_cNB4`5?iU~3FFv|o9CRn|=zj6h{ooB@se00C~=zj6h{ot`s-!E<_4cb2q+UJaYzj&k+Z2vUq
zj%UPv@ghn5`^6_o;NLI4P8_tq8nka4`+o7$V%YbKKNiKmU;L*C{{7O%PUiw6sW`~wO{?EA%M3qbaZ@A=GR!h>ki2y^>8WD!(
zHK$sbY|?i#+gLAmGHG3xY$CzXv_^)ZdCio6Og4Eo%r@FToJ@*7Cz~iRG_6r#XkH^5
z&t&7jl-cH^nUjgt*JKk7hNd+-49#nvt!1*|3uLyr*yLnVACzojz|geDgrRwjoi>vV
z>uhEl`5Y&co{VG@3x=jOHVn;c9Dg&}G|MyFWbbt{S$#9v#DSq{jSEBbnmS=7n+MU%
zHkFD_CX#29O*|Ny*7z_quVG+lSi{25u!e)-0W$|f!08u
z3>()kVc5TZ0mHuaa~QU-pTe+p{RDl+w0tXG`Sz@Rwe0E6O&1q|X02Lu8bCaU~r
z5Vc|WFJi;M(9+YuAfWP}VXGR$|0!n50xV40JCc~V1*7(jP-Z|U!0
z*xcX2u&KWVbRQ1GhJKJgRxs>U4`7Jwi(!c9i(v5YQ~6=ata8GHIfcQmPk~|QdX*ER
z%n1y>eKKJ7SH>I$pFROF`zm7wgLj__n7x&;gu$!N0L-4sSis=fX8~rHGS)D7^x1&f
zp^Oy_?tKnmwkcx^gIk{um@UfKz~I^!0A_z>=wWc_3jwpQGK4UM_jNEh_eFsDTN$P>
zIQ7MV*;5%*K73_L0JBROQW$owXZR$?pmHLVf#H`tgNi^1Lk7dn^(738){8LgTQ9+|
zf4u_3zJ3{o{ryaz$+$)FMt!f3&;vtNK=(Rvexwd;Kt7WF4EtOc35-hpBN
zdZtg@3@Hrz`y&`u_k-^CsbE;SUZvs-V*ta-ewBhNj7(Mh;Cqi54oNT+Fsxdyk}!oa
zgke>`3&Z;LIt=U9t1ztZXDH$Y*}a}2OP+z@5I2Jc=-ii6k_=2qJPaUrF?ew@NHDDK
z2Zgr>!Sst|Vqg;DWRPK4*)IS(Th>F1(S>1uzXZd|^*Riz`c)WK
z_JhpOU|79g)kBNXgkgWb0mJHk8HSbXJs4K?TR`P)KxgiHXfY}#6M;S
zhL!yV4Ey?hKym?gj1>&~`c)i67*##~F{>C{VF+N@->;%Dg+WE4gn`M4g8_7h1L#f_
zCMjkHRfiYMss?P#3Jm-EWk7d5L8oQ;i-2Q;IGFQ;7uwQ;t2u1cvZF0fznk0Ss~LLKq^~
zMKJiRi(&9zm%!k+E``B&-4X`hz6A_EeM~Xh3``+f3^@$m>r@K1GOhuo{fsS)Og@?n
z1q@#63>em~U%}wjr;;(1k;z4ap@hM6odUz!^;;M``&2SY8JTR<87de&)(J4IUB7|B
zqfaFxl#$6qjiH9YeVq!!+Vy)F-1}5AOc|MUR2do=+}7zZtX;o@!L3gvLzIz8MTMb-
z!F3%djU8cd?NiD4%D^O}%+SH$vd)5G?fL@@E`2H)R~eX&*fTJRC^7UfIIr_ySiAlV
zgL9us##V+I4E}v{7$W;J7$Vk9U~pP@g2AcJhGFe`m5iwj4j}r&S035EoQ73)EH
z$AV!+KPca6Fzi^b!?3?!fMG{JC|@!Z@iBn&j>Q*-6oy6XWf<12H(^-RZ@{pwACxW`
zPDwHtFsxk9;Kae;!LYI)6px^M0m_S@{HDOLemyAd2Y~E6B*DNG#SL=9dQkpKVc6LZ
z%9|DpE7oT)EMKnycEj@i2!=K51sHa$cVSq)-iKjLzXK>g7V$B}FsuT(ZM_Y{s(ukr
zz7k?$0Oco@9bcG2Ansc4!LV{YlaM3>gBL%8>WQ}usugmK0u0OhT^LsMGwl**U^v9Z
zz)-}^AOp%fQJ_4uuRnxgO~2}n@5~XPbZ+s2L4;xXdesacM%9G-%qk4~`eVR(W<|eh
zzMplVee?lW63?CZ~f<^>6c4NEuB?D89J_A#ZE(24F4g*t+
zJvdD>`RFl#(kv*Ag3=@?4T91f(;jn%BMdI*g@{uUi1l
z8$Rn+FnF(9!{D`U1B2(fEesy(b}+cF+r!|t?f`@9x*mQ89z_KQCKd+gz6ORQ6>SM;
z1{Q_{0Tu?QbsP*%eT)oFDjW<>>lhdu);ax45K~lOU?`Sn-~iQMEDTLO3=GXZ0sr@^
zcYx~8h6V;j1!smW3`^H*3p6nVFtDnvVc5TZ1;f7eOBlAVU%;?!{Tzm^>t`@*SwDqg
z^ZE%4o7VR*Y+N70uyj2OgM$DI1Is!N1}3PTOzT1zR`fG6B&js~XH`*@U}h|2aM594
zNL}E>)F8mXz_hM_flWo(;1ELy=5vX4DC}LpPB*wtB
zN|b?NkqG#nW>7w1Iwi>fs(V275IA3E@iH(Z@i6o-F!ibI_{gNe
zZM^`)*7Z6JTh>c3Y+i4`uzx+M{uN=^u|9=iJvbj{Fsxk<%8v@5dMJnslrQ^p7*?-0
zVOX`^23$w2>UUsR)6eut99+Ju?yzGnU|6x1olAdrC}iW}@U3y4|k9YA(0;$`rFmj4Wg_!$BiHup0maWd#ItnPR67h^DB
zSPwe)sGli_iQ#~ND1+*X6U-u@^T8Qb^fUYdoxk~wk)cSKLABxpv+9go#tepS{W1)z
z`$27m9MFAS8D)$r3KJPrBTg`zFl_4wj%|A2M$OufbLKL=Phtuc8^I_;xMBFNM1*k;RJ)kx(Wui
zbz2zN`oQ^4Mwy|8fpy&m2G+g?29|X#49x5HFtGHgNL*qtU|76fMPd_!ip56;5iola
zg9Nw@vv@tItlYuC+y}bZ15=6}1Cx(AgNj5E1JfL129$CDRIj;c
zFo5%Zh!#T#gXp>`45ED<4B~wp3{2}-7$nvOFmSGmU=UunhJmwh0)ud041?sl1P1pB>?)~#S*?^9q{ydLB>
za9Wlq1gA#F5AIGw9x0)r4+FRS!=_)f1HrpfX!k
zqJs&PW>gi9FoEOihy?>v38?L&!vJb?faA+VjR9O%%P2E|%4$%2gX334g`tN*eBA_a
zTnew7!63PA4uizH1q^)amN4+FTfxA&ZVdzbx((no$GUC@1IxNS49x2eFfgrCRA68_
z!oUD7yU#E%tW#j%>C<80?o;_NiBW@rs}IzkHeulGQ~6ND2nr7a29CZ6hSlp;B7zuI
z7R>SWEdp-9Khw@
z>h++oQ;E35;KKka16QvHwX0MjHZh1WtnF9XafwM~#Uv(`8Ai-12@@GTKxRcuV(%03LM`x$15G6XPe?FZeD
z#Ly+k07^d*;I_xc^$ba(3=CZo3_1*3`xy?&F)$QyF$gg1>z4qvHL@Ug7ppL=?l)lA
z-p>Ro-$7;jDM@;uCVqrI4#4=VOZ4f!N9yugMoXU4g=RZ0|w4@CJY?w
zEEw3=*)XuJb6{Xy=fc3UPJn?~je#M(hlL@nhl3%thle4hhnc~B1p|Zo4t55&6)X&H
zJGdEKS8y=6?%-!|S;52LvLl3HN523=vdYK*6(Rx*PAZsV7EJ3z7?{^#j#)6RlVM<9
zhdE}!v`&SAc^&4M1=Bhm2Ih5`V-`&7OcU+|oY
zU|{XD0Lv*erZ7nMl`!!3)iCh%O<`c^1NDhjDh@MLFmUy$e0a>HvSBfk%7SDjl?lpB
zDiKMHDh^DHDl?LpR63NHJiulwW>EQ|%na&(s+>?_R*6{5Xv45#y$?vvp_x&oq8XB3
z6`H_x5va~#0_E39LJUk@f(#9y_S}v~OrWyN0o137aAs6VXkt_eaAJ&LSh8LKJg%^9
zeFDQ4a9IK>=TjIqtp~NIG#ECnH(=P<&!i;Ipu@0peGbEp^)d{b`yp+J?fo_kJNg|M
zc7n?RP+tbrwgHtHA`F}Q6&SYkTQICy@4&EneFMX)^`Nl>ABI)^0-%0v!68PKj75x~
zx)J2Y42Jz6d)9-?4v^bHWdNuRw@aJ>bUrtzF9j--L>ShsFJaiczJg)fdQhLVhGF}9
z6NVk@LE|zm4Exr5fcieOxEMg=6{Z;BBE
z(;s^VCRn`<>UV+qU!eBZ7Bhwt2Htf&46N%K7_R1P1waDGU=?N*|y)*oI*dJg=xQY+0|t
zunAi4ZUXoDWf->fD==&W_kk@K7WJ!0G&3+L@i8zI2{ABC0=4ZxZ9X{$hEGfkHVliv
zZ8}grB?2~gQ9mfXsqP48kO0Y5@iVBd2xU+Ku|fF(G(O7$nxMVc=c2fq{G776z_$I~X|EO<@pUH-kZR-5dttbqg2-!R@p?3>@o@FtDvV
z!@#ue00TR?&31x;6=CA3=FIXnQV5SX12L8&&ecqE@Irh#*E2kRuZ!f
z`&B0sEltF@dw~IyP2@yo8}YkNCQ*#Z@Nsv(?@TuOqRcjykxnKz-XO-^5Bz7cF-~W;
zG30hKNmoORyGLX&*=*@!wh9ikYaf%%R(EEb
zCH_t(vL2)3?g^vg?x3;n(Q$WBy$2mvA02o1?gP!wfa>ys(Q$Y1csHocIXdn>I_?e|
zcL(>=NE~+$R7D+k_xQh8eFDsK&rTfc;1>-q%@
zTh`BE*t~uQ!>09n7?!RNU=UQpHs+2PZ&zl5jkkYeL>+HeR8V39yI+HW0eP$)G|mnh
zZy)Ys?HUaG*6TpW+6@@CtQTR}ydE@<7QwJ{y$r*S^)U?V*DElrTb}?OYgYk{g9mXj
zfcj}E1jgDku#C0qkT}*38izw3YX{B!g2vh<7}obkfX1_t#@c1Tb6wcS+7lSIf%|}<
z`LGl+#@aK$^I(MxA~YOpmjI1VL&w@>!0bs3p!oyPST<-(3^blS7{}UG2#mFZ=5jz|
z=rU+y?V!0G(7cWW(pWoa+#J-m1C9IQ8fzB;jje;mUsr5o0*$qU#?(RmGW4-_&=@%b
z6~@{P(8k)qeK@qScF_1cxc_Fv#sKQaql~qK`fkLGwS)R>KAMoZ5!l!yNn`EYM2)qB
z$~(|ly8#1Bp9N^{?ZYJa*f?nH8ZJ86
z2SM`}p!p61&^%%h1IBnZcpSbEJZA|W)7IF?0GiW)jc2QL1Tuiu$bjMuyw(IXuCz%E
zJjMqT&9Wl^MYW!`lv4BYE97&zDIFtD#PU|?Nm!oaf5hCvWKe(b=&LDCp9
zXzUm?j{NC=26+4!v+oTVKgR5PL&lFW``(c8W6ZucWc(Pj?+qD0#_W4T#*Z=k-jMNQ
zSl@dK!~T9m{~L4scmu<}{xuBS`&Te*>tDjKwSNJ_mi{>moBL-lZ0euFu(5vvbo_V+
z!(R0U24)pygCqvzIz5F!0%PnLG@c9^KUO)x%&c;Ni5WDGY{0N%J!m`%G>$9*W<$o2
zL3N2dIDlct
z`Vi=NF{rKrjmbtp=QJVnw)^{4c06KI0gW#^JZ1pRse{It4H$OzgT~oFW742GA6wNkR;u
z`81|apu4C|8A0pnGQjJ}Hi5^sRVS=tWSAw%psMhKS@pyZM$lNbY6WQh+1maB&{`UX
z72q{+CJd|kRSR+%RS&#iR?X021g!-EtyQXESP33;Rt4Rc9RXVNwxS<2-V7Q~2F+Ee
zdT=qSSUh6r0O|j5k7)vfSRZI?88r6Vz`(5nY7a1g$LqNJR2|$ILF1y}F=tTunW=Mjc-U
zjVFV~l|l2upmAnU`3D+v29WT
zBtY{o>na%J!Q<3R807mvu9_%!ip&b{t|-nedny
zJl34i3{ErP`5I6juQ-etWB&07oaa?Qa~q&}99-keo5UEvRy
zHm#RnShHS%VN<^h!y51$3uv4eoCg+(faXirgVqp$*KROufsQZpFfb&6#+N~3%S;Ro
z42$|f`4XI-Pl3jqA>++1pmAhSIu>GLkU<-776Hl45(bYqgT|FX`BQa9FoO$;4$Yz5)2HWe1mJe`9K7NYQ{QH9moJ$
z&!Os}$xLvp8I&GC=>XJrAu!&&fI)uU5(bHND;W4u#+N~B06^oG}f%B4jF6y^Z);2@M*?kn0jP0ae=#(NE>LdR8?v)!3JMJ@Au$;a6T
zFL`~OcQAAIlgFz57H#hP-fz9y(|v62LH^V^Ys$|o8Z+OD@e&6x>$o+@<
zSJ-~$esD~6IoD+OiOa9%H!(j5Og_a{kjKZBuBj>VNB@#rE7x{)wUcTw7K+k(Z?%p@
z{mIqwy}x%RLwXNrsF*ta>>fS{_mUca&ObU*Es=8L@SSN`o8$*KJDP5$Db++kIhL`dv(rE{S^D5
z1B%CYv|W^Y{ow4i+FP$GF6OKknD|1T{
zlNj`hONtmdnxj{eT2aEFmy%eL$e@>0T+E!`uSW;4ynN(VmT8x&3@N(rD7#Khk^lVU7CJYP=E~}s%
zkfWhYX$A%cPAD5h-Py>%aDb74fg7ryg@J*AgMooT70PD@DPmw?s6a9cBm}YxL~BFU
z6H;fuz`(%9z)%3v1HvHlBtQ%(2H6YZTcX)J0f)WrP<1f>g48vDMvkE7f&2hs`a{)$
z><94$)-o{If*4Q?@&^blqj(FfuUkFfcHH%mDdU02&v_<|S-oV5k8Z0L374piC4BS)7I8
z<9}pHW^hVCh%lqL803By1}>6w$lmTIaNlf!$u?d!DU}oTCP=heRBq$tp85kH6Y8V(U
zFfcF(F)%V%fZSipz!1X@;k$xWLI{w09|i`7o)!iMAAX2DDE@CuM(9swU|?7=1)(35
za9QRsFgWl*)H4)kB$^r;=_NCS6eZ>rr{x#r8e5n!c$*p;Aw(E*Q*(<`OBg)!GE0KN
z>KPzZXhBM1Nh(M>xu6m%=9Zb4m;+M^GAlSE(b&QSsuaS3s5!#Oz`)AKz;K6=fq{*W
zfdRCGh((ZrA;5-#0YqnjXif%(1}MD%N*{pI51{l9C@o>jz`(-Ez+eHTBcOBvl%4>k
zH$dqNQ2GUw=CFh4*MQPr>>=*sae%nbr3&J%1}HrPL~}AQY=F`ip!5eQEl>?L4@!GL
z=?o~{0i_o}=>t&u0h9)1Adr6~Y9QuVK4JzW
z^g;LsCPVlaptQtPi2f6^A>x0abjKWs`ig}R@t7qLzRoHL-v&x&pkP44e!X{_j<1W>}=7!mw$*0>j4jG7KBQYidD#NyUx^2E~R03>z3HsT49b
zEMRAF5Gi14UBJPxNQa%lL4bjm$%aK>5d$lOBTMjqCKWb@MLL`e4k8Q;Og11sXm5uG
z!{&Y!@YBLbB&%=@*U|?5KR7eN=2ee)ev<8ELA$gLbh7%KL&qEADnuWGP
z0D~DrvIPUfvIPtb$&0@KZxCT*C{`0^fV87Q_Sq6)ALyRtSOx|T2L^T(M}|i_ss!{n
zFbJq9FtDkB^e8~}ND!e%2dYN|s)w5hJqA!c0-*3Pc)*~jkN^%7SR8}gqAl=&VaI<5
z0Z*6eplMVAltu-Z7z~(E)6@iJ
z28J!n3=B7z!HqqJKgq8Gg-i9ve+;(u&C^3VBjcZVp-In!NgF(+@ivz&|1U6
z&;Uvw3|Ckf7&fplF!Zo6FhnpjFl4YWFu1UQ(k26wqJ{&LqJaVvy1PKlDUiEBeXzl%
z#(r~#!F5u|hiN;lxN($T=64oW8t
z3*d1o%a9OI$fU3clvY6Hj0-DjnuuX#VEDtzz!1X5z%YZAfng0B0|N^?1A_sRks2tT
zKuMpbY)f!q$_!{h}R*i=A#uv!fUCXjvT@ekUQ3yObO`bAD_o{XThrUFiD
zPgqgY+8cHTh7;@z3`^J<7>=+qFf_13+AgHHPlN>bkzy{Wydl=#_{;^RJCHfB@Pvgg
zG2uyyxu9|jWDhasg47v6;~V5YP`w4q7qIvuRSn2rgv_Bt4JeH{Ffgh7Vc>^U%HYxp
zi5QH1Wg7L7C6KxnpgtKW6wv#~0(=Y%511LieI`)L3#1OD4ZV--0}=!o0L37+ASQYr
z8J9Xx9~HTe3{nT`6NAhEVUWEbK6)QH1&6(`J~GH$kbaOlY<=GVw7%~`4&wU08#x#l
z5C^
zsBg~z?m#6oc;qG~2d9>Jr&c0&n~^%(P^OWoS$uIhObv|bn_>!LLORx1dfCvvJ4%Ng
z!h!U{gEJD1OwAw~p#~Y5nt|n@TogIDgl~!|Lc%x26fTjQnhP2Y0Qm}{0PI1qG=p@u6%>FW3=9mctdKDyHdY3P9tH*mCRPT92~c_pl%4^l=Rj#t
z!4Fcmf`Nenl<$r}%{c=ar(gj;gJ%RFHK2LJSNEAX=D#p#nsUFfgnE
z(X0#%pfL{?Q3i$!Aifv_!vhe_%E0ggM2j;purM(&ut+d4h=6ET1_n@CVv%HEumJI;
z7#KW2G%EuGs0YF#&A^ZY;>$2F)PQJExPfR{28IilH&FTml>P#xe?Vy#
zP`g};fk6aBOENI1KxqRIEychP1EM7u7;-?gI0HislC
zSP(l_1WH5bV?`VO?N#?-+`rz1am#uS#;xlW7c?+9Fm7IN!??r`pf<4yYHh6X_!0ft436<07Y
zD1gs8GE`&uFRa4OAf&>`uvJZjVM7oL!xV7831lE>AFTkxQgwEQ#YQR&4lIfaTN%Fo
zFA`y3XaW^oJRm*T-0=SY1~HI+kXecf4NM?2KyC*0K@1p{sDs91Kzs&9&^XOfb&wiG
z1CWsnJPeHNDn5++`xONk7(5ua_Pa1{>33k<+;79Uso#QeW4{R_H{xhqn3OF-}LHRfS?^Oqlvne(#U;vG|f$Rm3wJ9(#sW9vZhob<)GVoXz
zXiSNPK}Ai`04&$9zyKLX1C0e}Fzi(a^}v@aXHPi%8PXzpBsVPn4tbPNYH&IpN%5Qdr1u!qG(7nJ{p!5$pJ
zV80*}BdDKq1*t&}YJY=*0llBo!_L64fq`&8hXc9M4yp1%#xbDxb8x8x^+%BVIUseQ
zeht_VP&_j5q%i0S9VG85O&$z>+4pR)nfzJSi9;_K%K
zurn}Jf;<4lFn>U~a0*#`DD-n+bBZ2}kaoKe+$WH5RzTx}3VWCks2>1IKgfJD7zfn;
zXF#2|1*!LB0F~1W44}C@P`@CWfq`KPBLf2{eS!En43KuC0MtDU(8@F!+!YAQOJ@j5
zO-ymlFG>x`%uOv~CESvFSRJKB-JS=
zKRFv!q_QNH0VW-snwkRg2FUNAb~b2UhJ}xT!3LDh`5C|?#h`XFXbuDSV;(QDY
zJfLC!U~hL=
zSeika9YoAgf&9XNG)Kh^UU2{lB`la;Wi+vCHmEQT1uAzzc^kHN0hA_?eGV(16`^G-
zthhy22QmYsPaV`yKw6i8OPvm=Z-=x71EdaA&VtMUVUWEbzA2i$p!@}rhhdn#&QNur
z{05Q(sl!(8g2a*6R&+x1Ge{2z!^{J%i-7qRBtDaYfguLOfMS?B5RFuwF>GLBU^oD+
zxA2v_1vtuksPS+LWIl{TxZFi{321EvvJXIfWYa)=Lh3=W0J9yW9@P0n=EG7AL=3!E
z0wuF1gO(NK7gd6CEhJ0A^R5y0ylZG`2+h2N=a)fiSdjY+ybN3n91Ng6T%hrpmi6om
z3&3-E>inlJwS{{WZOkg!*r2gdkRFizAU?=EY-Lm!+8DSb
zBc#m&(gVUEGe9(Y8Kud{z<@ly3R4H7k#qVCW(I}^BG!LNure@ogDiq#kU3B$3WY3A
zxQv3u4#Ws%2FUs^Q22qu3AElz3e?_!Vh|s4rf-FoTqK&7*$AGa82{a}W!qCmS=YI36g9pus7NF+R4mChRg=hNP>fj3pcs+N
zD8SI);}oaOpcs+Fs3viU;rI(48%2%vj4BezjA7e*Ow}aP7!(uMFeoN8Gm0>D^f0CB
zFeoN;Gpb1>F)FC=+9+zAU{H~0X1ranR#ilhRZ4l~LyboDe9=`qxNWw%i*ILoLev4(Ly
z|8o^Z3wK5piNlO)5;+Wt5w95(Es_~I7&fkVvQuYJV3^p`?#^tZXz`9gP2()1*0E$0
zMG0jl6^*A1Y8q=96cch76eU_2nPin2R2X`C3|4U3C`zO=sA;@o5O&j4RrKg&RMALf
zP}5k)pqQb{sOYhjQGj9d`a|BD3>plRd))rA+9-M`Gpa?TGcZnFYNDu-%A^vZ4dOF`
z-K}w&u}MpnL5HEQry&y*zAG8jGL#u_%*ZxXj5y7xlChRSEn_jGqD4BRV#Hep1%~bG
zc^EdWH(;0!4sVxkAsfYrR7N$6l?>~@2bn2O_{5}QkqF>r9|9SJc?b06ITa?wg#A+J>zR
zNvikM6+irARM~KtNo~VbCPjaT_&@qs$JQzndxUn9itT
z@s&Z%;wgio#A7DK9q9~*_L?&&?)b+Pr^alfX7P_HFbd=^WkwZ?rwnQq{}>cklrktv
zEN5zxQD#t-C}-IAQp`rpqMTvXaZuP!V^XpB$Dn5Mok0;Cw#ylqHk&ahZaB=Oe~r~f
z&EhaqtN_R_s!S>t-x<^_9y2I@*vFu#ah&;(o+^W)#x@2QCUzT8SOklJ!=70M6b37{
zF)8l&&Y)=VmFbYJI)kFcQ-*~%L~Yb|JY{Hnw$%(2ZYn#zF{$l%%A_cv7G6|Z&03aW>nen6dHzQ42lxhnV6(O{wQStrNxJepfD_Dcy{)l
zx#EX^Oe!0WL&8wwD6`^+ZO|}0%xr#G+(u2~F!MF`?`n!W!kJVwwlb(`EM`!&c+RA_
z<0(80uYM7;QPcRx)XsZNO>u)6vx>%I1~rX+42mnRGAV9Y%G9(46gJnHqFg~?bDim}
z2q#Zt5|e9Vxa4hqA^3^$oTX|a?E5;l)P>5EBm#dRiF
z7;5!`!eu#Amk%gy$uX(yILxG|ag-UH7I$oC`1POFhH1AsgOlY_6~!H2nG`itLGi$#
zw&5F-;)XJY!gf|0rtM}7jo+4%mx>a}OllVQn80}jng{mp6SV>D6)xDb
z)l5+$l|gZZD6^WyHdwl5Qv7h7dA5c)*gePUzN;yIILxfLqnuIAA{COCK;g6FIMc#c
zVm3_s%^7~FUsD6+J;e>vnA9u|Gb87t_gC0$oVJ=Vv>H5D0f(W5Ix{G3scCEjz-jZtJ|@K#N13nOWVbP3Xzg)YWy)ZA;kgMYTtRW5
zrcuVArm>X)lFyzp-F_x+!(^|{@O0*PGewK942nC%LFO>2X)I?@1i5>|QKm)mtYA0&
zs9CC_xZyYxsEktE@s&Ys$2V~ND{7Q8tU1DL13E)CH4GMx%#3O~jzjV)I2^Y#IY}uq
zXnqm50r^3Fg&2d2(swn*1=E>8=jVdc?SghDMT@CSO?K)GTF#<2p!A}?fR$nT|E*@K
z3%)QY&M0M4oKeQ4wxJo6-k6%UnlVgSEn)+5llly1hULmr)D$O#FsaVC%%nCW9TeY8
ziW-|4oODzfCjSw(0mZNS1a=0?1;u8H9mY(m6E-oZO$cKG)uD2LHOHDvAY1
z8C4}7Gb$DwXH=7@0Jklg%Jdj?{;}F97My2%@NB7xx`YISV#ZQN&{@%n8QU1uB=Q*)
zGZr&8C!3>*3b7@F3EFtn|SVCY=~8iUYa*sJcE&Sb-=?4;tu(6r|4dnTLC)lMcLb-QLT
z+5EfXWD>&Aw8lt)$)+sCNhN}zX$|^4FrfK1*!&u3ZVfc|rUSlnWb=B^9Gv0`(Awk!
z42laDFbFdo5a3~$sKUU|(gRxm47#sHdxjGew?HuTu9pVHT`x00YuuOgDNg{&r7$rt
zELq3HFhM|Z!DOaS{~f@0y@2M(2+fay=J6C27BI0eEbarHvG0I#7XPAk91M$~=i)C~
zcl*DC7z4wCb=Q~}I6!8@&fy2O-NAkVt+Q5eW&oWB1oJCsJ`*&r2%1miVGts4_K!1@
zCG@O)OYpc6(>e?2S^J6#PM|I`4`{BGg@GA#{&=60Iy1uo0Vak663h&W0xk@YGs&6P
zSu;4VvS4shV_0Nw=xns)+?hk(W^Kw}!{V^=XqW`T?XsRhyKV^_G;fyR!I
z$F4x?Kx0)PGe8(*FNhBslK`0w8*M4UVJ~Rx3ZxEXE=WH}9kwwkP(L1d+k
zc^QaWm&qc)0A7~`+WQG|D##z8u@cbuAj}US_o)anFo4GTL2M8PxgA8KV`Oo1#-w1o
z3TJRZ_9P;kPmeJs(AXZxZcwQU8bbn&1>N9+tc3&d(br{y;%^H#149XPei1bO0&_Dc
z9Ki!DNE-yf(~i((hbXH6p)3E;76XEI4l?L)L)Ot%fM_-bhBZ)Hg$J^?ECWP?)+X^n
z_yQoBje$V{N+%X0Egn)p8sjm?KE`8VVGfxzAYzPXbRG|~FBmo>1Da2R#XpD!Kzu^#VX+S}lc+thjm=m)DU}~H8L|aglrH^AhovX$FSSn*U5H
zU4l(D3NB1F91KjX^$bo1il8>1#S;c$h6f=ac?O2X;Px{E!=W{b4$chP9xoV}85BT8
zC?}vW>HlEPtaZp4v?83wV)6ZVQB6VVOZ3oW#G)9
z!f+sjk%38tnIS1afT6huqz1GOOaLk`1C^IzND={w^Ds2`@Id86p>o1dIS#OXh`D@F
zIUcAS3qx}c3sfIFRF0J)DFkFD={xPa`|5^x6l3FOWd|3K>_H?8+z+_*l3asT=N
z#?9+p7&okEU}&1a!oaKoTI0vT;4Gjx;Q&JjrWz@R1QsR+VHHJ*UluxiKs1OCT0aP5Z((v(1L?tKKPXO_7=l%_B{nl$`=0=Iha`i8
z029a$0t^gYipq6}I7=2&6>wol1?^3h2xeerQ14=AQ0wAmQ0?MpQ0Wq8Q0`)2P@l!Z
zpf-zxL3I`ngUT!c2IW~>nB3RxU~*fxhskx_0VbDqVGIl$N0^+~f&JLPz>ozp4_r|$
z>M>y8R8f>@Vqjp%n83`yDagd&p#lo~lK)I9ptSYpzk(=e?<_c7sxZ}XF*LB$Gq@Ni
zN_a46TRaA*OORSY1}7E}4N8|F{R|8%)+jo#Flr0DVBlhK5CO@7;`jf5PL==vTT~c=
zm>Ayu?-XEUNLFEFNSd&Zfq_F+z=;u}7Zl@%dO-a<&>BwAdQMQk4zzC?w3k{@Vi9=n
zGy_B01W>#)F|ep`G8_?LVhB@4NpAY#_6`1UJ<%gZAAjC@?WH1gZW1UkqA8#UsG5biDwB
zgMa|T(*A1<3>=gGGpQ&}aAE@4aqoXa2*@ppGZ+~D|7TGFt(9aj5@vYz-v#RD;t9V&
zex7j|ya!uR1H7AqN6{dGi3McWgd!#e2BCEzb3x$-PG<@VOdx*IeCMZr=z+k|@ssh@Z%fZkp06M=PO}K
zK-YAF`b5-tqd5|0_)|4#t>@9lp`
zymv{m)G;!&sDRD~WMg1b5nxCX0Nu|Z&&a@0016j{Rt9Z>Ckzk&Bc}y6mH+>jsxUY)
zF}(c03>q#;6C4>qX@Q9m)JGFxSPEKZ!y~}3O#R}22NqCRb22Od`J~5CNI>=D!2W|Nl%XA`DB{XE3p@<6&T32MXgZ
z$<`XsvSmhwr7DmACy9XMk;Cfle+L$j{{>klv`$eXi6MoFwNHS7d0m&{
zqM8K^%ql_*%>qme&MFEF4C_Gdw_sSJew=}UCxeMi?d*RC7LXf2X%8f>IKhEIfx$^b
z36wrTlbH+*JRtFMMg|U$pEH=4*L6uQt^wu8eg9Ly?q_CjQRz}#Qp3o=tg`EWvj|8X
z3xl%?NF6JKlZpZZ^SULB3>;whX)I&V7I@0A9-Kx5RY2+f|9=jZ|NoDvFnBRB?D&5I
zo<>fA(})ry$bOLfBp8;e-~R6)qS)cUP{PEb2I7On6%8DiHZU@9OkomQhp!GXV4$oH
z@nc9}QIv3CU}9iWQB+7`&{kN&@cw@TxO{*6KY;~wCS#YPQr+wS%_5+>0agb*`=059bO#)l%qsFk)mOri{Zp*=
z=Rc(WVP|6C0IA1S|D0rUQUldHp!x?^7ZJMeNtnTT#dAi``4G-KK=la|Lz9ZO#3F`8
z&^i&cM_*9_RCcmM>I)}khL!)@1sEBQsW37ep5VpAz@aL^%*Y3FTLS|_$G^Sm1&sUF
z2QY3}U&6S5eGcRH^%;!Y)~7ITU7x_XWql0e=JgSbo7RUgZd|YUVF80A1E`K~U`Sw?
zrjo%V*q6e@(#HlWCnY8_Ffb%dkYsQb$YEmZ1LbW+23G+l1|>C6xmm)vzrTQSUw;nc
z_WlgUZT%^XTl*6jxAey_Ztjm@+|(b!xUoL~+TN&O+^e3zh~4~`|6N5u<})%Vsc8!w
zVtDc2L4=*bP)%FlBEz%)4&bsigGq3mqQpdoOeWAm&7=w18iyD_X@Zf#RIN*KYK?*p
zOU*3C1uWokPKiZK+6IRiuKzy()_e8;A~ukFVeJx7{>ort>jUL~WrK?hAaO;Fji8E_
zN73La!xx4F;vg{w1_mA*2GDr}%r-s@$vq4VEH(~|i`O$SFx!C2KpTdZ9uo=l
zm=t$_&iq)i-h*-RdTohN1`)=D0L2~GnNpaT`wSV_RJt^iYI2xZ`nEHG%64}ZP)kzM23k_bNc=-
zfRu$ANem1O%O)@~Y?=_tz^byA;iw1;1FK3PgR2k|gR2T?EL3p3;<_kUJR|nN*Yo
z!WrZl76@o92xQ=8P*&3tNMev?a0p;z5K&2FXb^K@T-vWFaGi;n!F2^FtZf*YRa_XC
z^s_Le_AoHG>|h7qla|uM!r;1thaq(WFGKPKZU&bX91Jcyco|r0L3XNZul6!
zt0^j6X9CrUpm+qeB@}m*Gf6Ty1cBs1?qOjtR0Fw5t3!!Nm_Y$7F2K+r=D@h5pMinZ
z#)o0C3dlVy49OFi8C+I?+`xil2P;-PJ~M&LR}=_l*vtee%UK!RR6z9=3xku2wnZC5
zmu6~>{{IIepm6CDOsY|^VXEn7c)+4);l`k?(9WO%3cC&m2DSeVETA}LU}RC@WpGzf
zR+!G9rSOD-k)hp!nSn*ck6}pwXrDg|1CvSu!y*AtTcd+vkpMdblgeaVUYkU1Cz=MhDG33FT|~ZaJNb^gO0@!QK@HG3Q2bsZ49jc
zAAr-+9?-f<4F(2Knq$ynWng4*Qu*`WO+-~=Im0bb+0(Iz0ha!L{DY=H%k&xr9rhYW
zh6OB&8jl#XHCh=yLgn87d&C0Dm*8;FOsd(#1hU&*MbSWs2^3Dx|3U0s2#K3@iXBk9
zy95z-cc?Rc2H7p4#H7W*q_U3TkO(IOlS&&ykQF0?tKLhH9Apt9j|Ky)+6r*_!E7VQ
za70*9B8}m|{|6zUFaVt;#K7R(1B!2E2Im!^F?<$=?`p90gqoHVnBqX=K;~GuF*L*7$!sIQkUBwtAxVXi!DRvygYyKC{}~uu7cero
zEMQ`AUI218GsAbaG9*1B3`r^vm>D=k7*Zz`z{QztByjjS9j=DeMuA}wSg!)Z(g}%B
zaSujN8x)l9A>j_P6BJgFPZ)L~cxjvF0@#VVk@NKBakDg!{}0?0g2*`O%k#sDfC
z1EJ{;RIVY~RICh3|AE?6&s9L>uRIF_hpL7uBPd?(gTlPSfdSNi`2l8w!oS4;G#3P_
zhiqZytzcjg>WZ%n;QpPJD8ujnts;yJ$tqJo`Xv@Ifzq-&C_V%j
z7(j6f>K82icSvLsLy#57U7&Q!$PlE5=-WW{%z@_hKyzTQ{tc)-4({7@K>Ic`4lr;s
zvDnb|z@M9oo0EVq#c@)VJFKN@D_#
zz-Oa@?rT(m?v(_MV@430BKaQ_6lsoEVC~>T(DVmR2jF%v
zC_GzK7_68Xj{k2H0QLJA85U3AVFk5=A2Wc=1GyJuAIL6{*&sJQ@v<
zV)(?uz|keiRA=yeulf#_E$g?iY+k>CWz+gKEF0IKVcEa_1k1klM_9J6KftnW{T`OB
z>sPQq#@WE}13I^E!U6`x1qT=uXFOowV{jJGfX34qmi_%FSoZZFVcFh)fMr|%9+s{B
zJ6N{#Z(-Tozky{_{~DH!{VP~D^n=EDF0g?5!i#i1!Q&7z7MBJdi(^&+jZtbVxG=qf
z#^Lk-4lFvLxKL1F(qLGs4$4mk42#x-;zfgD@%jhgzABRn=uBuvP&-~hiRs_}<_X>m
zsRIB1w@hGVU{zseNEP5^U{*0(oRL9P
zg_S`-rAtx?Jgxv5zX9E+2x`9`{huTPy3|{X
z_x}VI1BS)xVPn55elTI!*6+x0NNe?f2LVv}*I?M*?*JNe
zG&sPds9_Eo0OtX(by6^6Vqj>V04ks6|4$MD-7mt(a7e97P^pfU!C7ba|AYXLekO+N
zYM{QU;s#KEidE(R|6~;gBQXXuhExGYh87h@hG`S#fzr{2YYf`ZFzJDY1rvj)N(L(f
z2M>dQ3Z$RbtfDQjn4tw4Z;BcUOrW~=|9@EeWMY^APoIk>Yyp`o@Q48vUZ8k0U|6QU
z0JI0%!hxw6>R*@~D1Jfl35wessGJVN;{GX2Oez`wlfd~E6u;H~A#P%05Kv)8avx|<
zG{~)>xKk7eXNdZLfDIJxpf;jC1CtQMo<;rWaT16YCm=V1@(;)zUQl;{>@{Fm(!YRZ
z(R$Drxe3F*{>coBgyyg;SJO$>{I6c|`km>HNx(iR&7vq}yFvk)r-vq}g9v)BQKP3qvbx`G3fqDBLg1H*E4(ETEydkZ8O
z7J>Jy%P?$RuQJxt6heE*%n^&2SOL4HOLD>gh~_5UAeya<#B
z_kr)mZUCp*2TY0@c91l?;~&#qRt63YhVAPWXDBg&!ZC>9kq{`{+!!7S&0ty94~i=m
z1}32fhGptJ3`{DF3`}7sKzW1_bcTQf*c{M4{5dSk`x(Gupp!)yz~iQZYz!QrFyUcf
zR=M+!ISdr`j10+Y4id}^jEu<|*Z(C1fW#OWLFW%JFlZS}W>BO+I%KxtQifkg$R2P6iP2Z@8y3j@;`>z9Z&ST01&>0Wl
z@fnKRe@fu-ZAm=sKTsLRz`(K&(xyvT2b%AJwb@{8x@&B(Hk|?!vOKJ<1d>N?D_w(?
zp8}vV8B}&IRbjAVVz`ggR$^ucje~>wK#O`HWBoYV!!!sF2_nM-*{`s$kYZ=xNCLNS
zF~b5R4w6R>i|aVT;sH`vxIx1LG$#a`2LjCvf#!uk^Fs^_i@D*9|hA7p%s|Ypkas12f1k=@`O4C
zX<#EocLk8A%OSU_@+J`Sqf`TtH}xf5Io>p*6M!W7o;IDsSm
zTtrGg*P!VK7LGFD`+PR77lEEr3hG-bFl+(O>0s+$a$)o@xAcSVmX|;~+ZK5a?F(8T
z(-JK_-$L8?uh9CK&!KfJBf}Jxu7x6XpfdK+|0Xd|TMoUCiLHP64j%Rl;InRFWfiD@
z2?}3G*rUpU`j;R%NZ6ywf%=yqIqdyQSiF?11KEolFI#cM%YLMIvEhJ}aWDSwRR^6b
z3<`S@hW+bPm|EB5Ftx2IU}|4e!ql*)f~jFm4O7FK2BwBJEldq-I+z;P^e{E7nZVSr
zW(!lp8qnI{9ZU^tSQr}Ca4
zEXZJLSTlvGVa*JthBb4T8rCdeYFM*`sbS3uriL|&8Vn3;m>SlA&Sl-e)Uaj`6T`X#
zObqLeFfptVpw#KiD8il!~XsUObqLuFfpuq!Njoc4HLsU0cc-U
z0(y=RXbb~%b`WSBgPEa01T=5m%fY|_IzxzsL8*^{!Jv;BGzX&qS_KEbt^hJNub{y6
z{Xc`4Vh02C%wohDJfJg&Vi=lxK<5;J(g?_GkR2eqBpH$fKw$}5qYILgXGjWQU|{J}
zVG!(NVNeJI*}0Yq_J=UE^gRFH5CF0V6fPh~gV-QDpZ-q@0oez#_tF1`00=z^=l~
zAgRK{z@fs&z^Bq>$zIpx$WaFx|LHm@S=Xh>TGyq>Qr9KPTzBFBbCs?@t~!Sbc7_Z8
zIaERJIbgxg&^1x0t}Bzbt}BtJt}Bwe&fx$D!-fA#RUmFoR=M!sQeDyFIpYBb4hDw`
zCaC)~nH3#4m>oJ;85~ZqFgP4wW;me1%5Xq|1-dT#5#xpbUaDPkE)^sGxLT2*{V~1XsVw7|6D~;V=aTCLJxzYL^cCxzB`Hm
z)Mj6~UWH-#dIg51>p}Nn$uKYpfyPQe`PqkIf4>LArhXTOjr|VLbREF3SDk@@e^L%R
zpUQ>*?^RhD-s@gq=TzbHIM2w47@6!ITmIHAr&SD
zb`?ejNfkv028MSWp#CMF3T*xf6#t-jWo0-ZqNw1&pvb_$Bf_v$U5k@}LtB6eh0n;~
zq_gAyUUdubzR3;iT^RPScVO7E-iBfGdJ~3?>p|-u#GrG1DNId08B7y<6eR)~9xyep
z0nrQ$#S<7A)YM-7Pf`2N&|<*E(4xc7&;XuSO8?KK;=-`M-+^IEzYW9YehY?8{U!_>
z`$2sS&=`gX!(Me{GZQ%(I9@O{uK~?@F)^sBXK;Kj!9^8X9y9C_M=$(#%vss?I|pnR#Q;mW|x;2@U4B(hGq
zVm=y92Gm
zfwjLt?J-arOmRX3=v*8g(0&9p1_zc5rU11RCYQb(CigzjI2J!61CIoQo0h!f&wZ3YLHERY*!fXGQ+`!7<0P0LK-29&q26EpeP6iIe4hDwb
z{}sSTGhO6l;K=+htOA;61g!6LWoSF$!hZ)A83s4C3?|ogu;iD1Q|f#0tz2S&^ipkrkV^U
z=XIcQFj)rY08qHz<7D8-{m-NVQzyc(V11V)Bo07f0qSSUGb9Os#_wTfD?-<9tbop4
zgVK);7ieC91H8UVRX~Xm)E)<|4@7(nA(k_-(3pfr@hxO2~g_5s)5`S=i#t=fATED6U|BfQ6$Q
zG(6Dtf!5Z5;v1B%|NjS#b3@u2pmYRU%LZ~w29tAN3X^M}0K+m+9tBnDJc=5N!FSSv
zl+xB
zuUDLLfME&4{`CtOwyvMUux0%OhK=ic7&fdoVOX>nB$>Yu={vA+je
z$F5-5t8N7K(>z8dl~ey8g@F79@;5I7lL{vTvkE_hpb9qwn~F3y14j$PQWcOKs67L!
zclj6uRk#?~R1z4Lsu(b^s7Np@SuDx0Xt4yt^68*F3PO^dGdwaq(h7hOLX47z9*4bAi_FELF$mh8%{a;Pw=<{UEo6Ff3I8
z%~6BKJh>SJRoJ0!o&a?-HnS=ima4Qsw&31g
z^%})R{h+)Pp}2j0h~l>OK8jn`dnj&R@1nSAy@TS$^)`wd*2gIBUmu_dIcHUI#sctq
zQpJu33>*r^3))8k&5CP@uekNv>P6lUz2~5s9P7Dbm9ZbwB
z6PTD)Bp93pCNeRrlrlJj*B5}wpBTmc{Sk`W`$H7B^#>?!?e|gK((j?Tx!*-`Q@?}a
z#(o<`$UI1b;$C%Q24?|ICTE>Qh6E8-CT0~LCT5j<24?|YCT5kl|DC~WtwC{O0Uqyc
zU;?Ed5E~?>!LV5!#s=Mm!^Xs{cin;|5tRrAQ5BGzul;ut0*#-v
zGBK%a`0peJ3PVPwLwaleI|zW>+@QF$ALQRB{7ck9_JihRKyz52e5k^(Xg#Q1V8f6k
z0J^Ugq!*+Pq#opUP+WlAPi%Zlfcj$_;($D!3{XDNfcOW*2AK`=4~z}+j{}2<${}tB
zjs=XODj<0a@VF~P4~PvC1L=XWL3$LRdgej(aDc~lA$mY;m>w7#q(=a%r;`a1zbXt%
z)fGTvV78*h0VdEqBgkz}_?N3M2B~XsU;z0G
z3T(t0}MTko7Xom
zZdkvBasT=SjQiHlVcfoc2IIE%Qy90dpTM|feFx*F^(~!ir@X?ML2*Gd(+sAP
zb#s_X*DYX5UdPVR5R}1`vW|sefzVBk3Gpj5CpKF}Juz+!2{~X5c
z{WBQ1^-p2k+CPDDOMegJ=Kc=GP5mv58~YoeYX(;^?p06XVc?j-RMIz{!AXUQ!Aa-+
ze+L1OIiWlZ93_m4*Wdo15CSrvk)e5#f(~p{&85&qJn3C3sFr=;PQUtBdb5eQE
z2vA=3^K2gVrgsG9&~DFr@T#NjBB7FcbXQHWx4U{MrEU{F*5t@B>O^yq&ASp9?lPAnkvSV3bzpmn&Ct#zQW>%ae(
zh$sp;GjxIZEGmTzDFI9ji&a<{*iKq=Iqj`eXkWf$eE#U{*Q6;4IL>;H)FXkRULTfmsDK517H=
zEYQHftisOVEK?iWLw>a|4Cqf
z6fiF7FJN5S&&1HIqOGu)Y5o5O0Y-*JDo=PoZHAOS0Y+zmsUY(iodsGMAoUx_JW%=s
zjqNCQOk^@(ShAjhL3t9WF9k9mw7y-3Vd?q`#^wE>v3DJ4I|?*U3tAfuy5srQe+LO2
zh9&)q0xC=l49*i68Q4^={Z9k?0i+M?9)rgW7r^n+qSB?PQU_W;tH`u~rJkYHpaQ%O
zvzb9#U=agoJQ?JsqBKRIWSnKLK2~gT}S=co{hEF(oYmuNRcq$N=(Z0W>|B
zFf9lu0F_aoHG_&1>mX|e4b}eqR~A#%Si&I5%fO)siWh~&OiAE028}Zn)*64t1{Oty
z#h|t0OfgXNqM-4`$dIbS&&$98N(Z1Y0)-DKZ07z?g8FfBKNCZe&aD3qA|N+2GAK_1
zrMEC9$eI|i|DfyAC;V>+0r{`@e*%l5h7#y}g9)H=pzD7#)U0LwOrU*f3Wph5z-|QP
z10`@iFoos=h5bD2+60&?hApsF9_tm4rQhlOiAlNakzx3a2+TtGr;HTD^CK2r^o*!5fz3yHIRFl
z7!K*U{&xV|2Mf<9j1DY{8lbY4Nu`2uNk3>WlD0%MgZ2Lea2QzqUj$AwX8#umWH2u4
zZ(;zIorh|S{x^$2!XZdSTjCSA{L=lOAdVE|`P@ICwG|oUOk!+}9j;}fLMW}v{t
z!tkiChH*)M4mf=WGB7YWEKrnaWnf@9)UQ0Dh(Wm{kcole(K@dG3Q`OV*Vkt-F79sv
zt!)x4t6}}`0xC25nHVmqX$x#(U}U(a#_-=kB!_X^`v3n8)oK_wt_S%shjDp-SLg8>
z1rfoT3;&&2Kw$@37hM4g9|0pKZHXp^&;Js@;h4{;Ad~@e3us-d(|1ANBA4m@qLkf707N`!N^KXF&$ZSv<1!@c21J5xP8i3R(3ZyV-3p`?&
z^3MUBjzD!kDBXkn394)J{xgHh_DSsEdqqJ>CaI4FboVIu?1!X2PN?{~zYIbpjEno%
zFfQ*0tzqJ0cocG%DQQv_4+96NT>?s%77U;^erg{JLs}n<4-sSF*}{~nwu%q5hk=3N
z5`%-t7Vuhg&_07ywaW|+Av_GJeIWO^{0G(jsRm38i&eA@7BemU3u(hRF)k1Q&B-u<
z_7qsQLCaLo8s9YVI_zoS`hPJ4xI6}xp9V{qc>Wy#*GHTFEeHUWogn>PhRsmD$tr*T
zr--O(EMsT`mB$L8VFv~tP=5%P#=v1LaD)LA#?Jph^SGe3T*}}&JQCFQ6G&hH#UXe<
zoW@}W>wgR2VQl^nGzPh7y`l!FE?NeTb7qD^0-!i)-~)}tEnd$A-tY2=0kqyk`(J_x
zC~m-Yk_=1D4u%AldWL35nJ58jYaM1#{s$=&LFrTeUjqxMj_lG@s%v9lQOW(kBm|TO
zK<0z`L$Ep$R6l~^0;EUiAEX@wsw)*0l$jJIoEbJSC9PY-l(G)yCT)eMVE?lJYe1wa
z73P{222i~O^Dk&0-(iOTe)-;0b0j0si44?l(
z(x4+hNF20(f6)Y0fkWW6!vFuXt1uWbG5q@9E&^)v+~5V30ZaSq8IlbY6+m_J5r)T5
z{ec+zlT{G<)4}>bLdy`aevQQp+5$_NI{rF<(*vll0~!~E>6!aC9l8dtX+j)7XfE;)
zgQ5n=&ZSJ%Fg+5@&^2x?V7rPK+66%FWnf5}07@S@FntOW8MGyyFzomXsS9dAZj}J}
z)p>%d#9{_enF$&{WYA(}`1M~+3=~&0z;0dM4?5#ZTj4Ro%D<4h6x7xQ)e8`JvM^l#
zyBxgE6trf&17x29=p4eJD2r4`}^P3FDIfRA_sg
zTcQaxKFc5vj*|uJSwZpI0a^>5YycV)1f`i8sGE0y{Hp-+uge5gg(KkcSD5>M{RhR3
zlZq}sC~lYagW9y9_CPLFFT}sFxMX2)_z#Mgr7DaJOC}tF`WMugcl&a0*4qt>vb!@ZC%LTH7jVmgT`ARd)Hw4nHlE8
z^)H_A1EgQ#F!)?0ZHY$=Ixv0Ub-oBayO8v-3V_!69%h)$16q^DtO9edEDrZZ|3kP}
z1f&=0UP!rfh=CtwCusd9n!RRly^AL(gY-%qW&q7G!`4bb=9o8u*Cj&cm>pO^`z|9G
zSo)+G8e~8~>&aQQ-iu1KQuuz~Hckg~4GB2ZO^J9tMXs
z0t^moY#1EYfadx^bAO0MPXTAag)#yFlwvU~5o7_vOOETAE>j1bBQByzUxgf(gjXFad_9zC{9{@wXr~
z5Zi`f0>=6Q4u&QSF_1ez{p3%eH3bV8!28)57!=mM{2wd^+8YMhJAr#`%YpxU)pZ!Q
zu9pGLt%A;1>j2#^eSpD+VgGsyhJEV|7`Ckk?XT2e*s@-QVe@*>{&djZbQ6Z{(DZTu
zycQVjjtLInb?adE0uUQ=7ddF{q~Zop{2%TI?I~jejYSB6=IR{;Kxfz6FzoNQVA$7h
z!mz#HfMHv|4#U=d4TdfKDh!)3_Ov@N>{VB^C}L9FafM0I;5icu!!Z?5U#EfLkWL!7
zeY1EGlNcLAC3sGNjiDYy3$ZaYLgxe+85S)9?Opya&tmice~XEtLJD~PT~S~GlcGZ@
z1Di%00~2`f5NKbRhsclrEh?b4gQCI`CT0fE+yJXe1H&U728PxJ!JvK94vU$X#Ml`?
zcbYSaurtJi?PF)igxbfzz_gH&fl~!xp9&*rzMqjnQx%kk6*ZU`*$mpj{Rhw;=D+`Y
zg6(8sa1a93>52l2q3IoTuH<4SPg1^&9_#=Ro=uXB0CiN^E8V?b8O`ecr(E
zNRNRbWq~2ceHNRUn8d^xJVEXf5ohoQ(L&-3zHs+FTENJ_f#g0GsQWme?t8?*W-uMe
zeULC=VQ3Ii1kI%hY=*k8SPj%p0l7_4V>441Xz%uhGNy9^pmyT5^&q!_<|IMk$ix5%
zLq>*WixeF|V+x?N=UW$m!h?Z?E@&qXVfbs<>&x6K}KxqAk0G(w5+W!*zpGgIhCpY!W
zFrc5+06EJ9qz1MJ1~iWjT6+uI1M}g3LkLLz-Tx#O5Us4B#02WEzWfhbSFmWkqQU`C
z{mulMdxfkMQ($`h-wCW%5xgFq0Ywh9o)u(HmmmWNXbmT*4usSxix{r{PXOBm8fS*o
ze~7)?x50b2LG|b22|EQrbr~}wXf57{e|yzg7`LovVBEa^55uPQKNvQy=V9Exo`Z4g
z`Y)h$L7?^rY<(;2EQ}@n$>#@Au+i+~3c^xV4{!aZ5h~zvK!%*CLte4Ro&k6?ESW1B1)DE=iR-2?o&meI}JB
z@U?l(Dxf|WC=K3+iZL@ZsetBBLHjRQ7+O>~7@T#kgU5|r)-iB1+pq{YGhF%a2;PeX
zO8cO-qOfsvMT-O`$o`-W{R|ADeTo{UOfsN3hZUe(RzUq<1||lE&~;ssrgfk`q&h=V
z0O&401_q}-*cyG1-3y^-Z-CXBp6Z!u7J7f{8P-GB9ZK
zF*8Yl6uUb+TPbMxW+oTqCud|9D1@XYXXNGQKQ5c2KYESDMUCM8!0&F
z=N4qYwV$drtDT2@$Fcv9yz7*xB
zB$gyH=+WrxOdT&!`wW7?3xF6HK<9cfa6*K@WJ3f4Ljy12dtVZe%mQg-1Q84j7OM1wX5f!H8?!Iy!-femso
zD(IY3ko!Ob_@KBzK4DHEgn=O!Bni?4bvu-aLV?VO2@pQh4%r6KnRP4-po9$4-vYX~
znSqf3bYL5Z4Y~&!bV3{GtU?_|28Iwu(3umA42BGlJL16iMl&#i!%&79a&9O{y$k5x
z6&41D6sUU8JuC}A_u4}FpnF&f*clk^K>47%NPIXM7|yUm%m>}M;-SjGPym&$VPIeY
z-DwRu)0G{3pEXDi=!{a(y)^R~Aa`4X`~l*F3P6ziVe*FZECU1RY*P^5kcojoM-Fn&B#7_A#K2G@&%iJP>i-BP&}1ay
zjMxmM%nyp6d?p5l7mAScFG2c2_l+aFr-O-s!9@vje;r7E1``7Vi!uWP$Q}@XDVlk!
z(D)mf7#Mb_F)*mGK*D=3n*3=d28KIY3=9=a5c%6^^3TxtpV9dL(fIsGMGDA&@@RYw
zG`=w!-wuuMiN+5@<0qlGu<3C_#U|8e8z;J^BqW%>#14D}=X(=c)&{bLAveVctj|Ty*uc=#h@m(m
z(bN!G$N(gSP-0>Z;v1QoAqiQ44pBz%O$|Xxj4ezMLME0B&iQ$1nMJw5ndy0nC8b5F
z;DeTfGZGnsGZI4!QW8s2K`gh-yu=)a+=BSbyv!01U6h)b5?`8EoSB}Nni8LsnFkU~
z&Ph!y0x^&!;)^q@QbB?x`DhwabCU}y8G?!v1Bx=s5=&COQ!61M$`FztQk0mI3A!T;
zWNm70Zhl!Rs;FyTGDCoqw~L!0gG*|0JoLg@5Yss+*(Ei(sIs60qQHm&bpI?=0f-5^
ziq<8y*ceHpaXhk4Z|7h`qj<0lU?-L)hh}GN6XL6ek9ttHa_u&%DeM
zh}INPieP}=k_)=L%rU0~lnmgvoPop`Km@Y-u*959P{e=}N=asJDnoiMn1Uz@$@fmJ
zgk69Jy(Y~y51dlbBiY!(1Qff*7AA5*E>Q|6FsGbDTpn3^J^MJ}(aRvr(d8@?0a0bc;m5(5KP`L=I7eVzL
zh_A!Kz`&xyz+eKR#Tgi$KxxqZi6D6mRt5$T-2kO$K@qb{WehA14OGaFeHFzbq0nE5G~HYV8Ow_z#`AU-~pl)7#Ko8v?2q;
z3J@*MzyRuWf$Xv2gqY_7r8T%9{0tB+&%n?Eq7@hzrhsTg28KCY3=FI?3=BDZ5PAU@
z0|T231H%%i_!cOC4V1qF$`{~)s2AaZsE^@cU|>;aV3+_Ep8^#>02RLiqQxP7L6AE;
zKKZq7@k!GC(v)Kh&Kqd=PtAfW*}q7&d@tP`pCvGf;IG
zpz0n##bx**_Gm!q6ewN75Ajb0Kg8S`C_Muz52}|z;j{)Sz5yz}1KO2t&u3zS|X3^C^glx7fNU|`W=0393#
z&KE8qzBmIz43w^b(k`M9eHBpp1eE3wgNR#zXmtjL9uO_gz_0>JKY`LeptOiMM7<4^
z_JGnMPpRP0EiZ6U|0a9S3v0tAX=Y+;Rc8nXJB{(r8%S^?gXtm0;PW)5Z{1-
z!2v`YGB9|6XmJLH0uXJ)z|aDsjTsnvK(sgm!vzp+!oa{G&A`B7!oVN^qCx2$N}qw!
zccAneD6Jp^vG)X&z5%6QK)&VkY%3K01SD4hYNTcGp;
zD7^UU+!;`M2b8`5rC&hlA5hvs1EM|yN*6%s
z8BqENlzsrE88jj4d7!ijly-sA4N!Ulls*EbKR{^_Er|XQDBS^~of#NbfM|6FhBF{q
zoPpsAlorv3)E^h1^aCjU1xowqK+Lnyft1q$I*@WQ1j^5V@@Ih5sWUL_0MVd)1EoW>
zA^NUB)xCgaWXy#!sQ!Y|YoPQND18A+e}U2(_7HPSptJ*&u7T1mPb+MoIAdV_=y(|+3UvP*Xm}Ym
z_cVIn6C}hyb4W=v_S$C4>_7|A#;JSAcCcAdgNOk
zn59&k(rEleyR
z6>b8-yV^i=NsI#j3n2B32I!0^2787@DvS(^Rhk5u7?cH)7#t*+7(iz!GcY{vX%b*!
z0Idbq7D!?cVc5DJwDyOGVe@(p@c9=T*EfLInQmCm!mvoE4YbA*RM;|fO<-i`p1{P=
zF`<#cL6DiDbAmR5lWq=!gNQAIgeB-24qFC&O9qA>RfY)yHjE4s`iu_Gq&A_W038r;*!xLd6}p
z85tNf7J|gw86Jo#Iviq9U9g4e59r<}29bqM3=6>f8oC^tYrg&GR265?(q(3F5M=Q%
zV3c4`Vg>DiU}0FHW5K{6%E*wd(iPZT!^DuG!pxAV(iPcV)8*JvW60nj*yY(-qs`!}
zE5oor6cm1-uwwz=EheE48h!(Xoh#_xvlR>siVGM(&0!AE*;DLb`;%2z83aW^2^C}?
z$SuFY>jaZk*cgPs;_M6y0@6VD^Eo!xfYgBYecbvlEC_NNNL++rYrg=)mVO?F&HWq<
zoBCN8Huf_>*B^q`cn5>;aKf*Kf#J~_kU60BY52_g^WPr4VF~13WNi2U|9^WEQ!{f5
zODk&|+y4;2z{teR!pg?Z!O6wV!^_7nASfg(A}S^>AqkO}l9rK`lUGnwQdUt_Q`gYc
z($>+{(>E|QG9Hxo9@BUYR}WG#2P>gK^%$sa1Pf~cb_NCw_}Uf*&{PR%u^@vgw5)}d
zbO(^k0_la7km&ax<5Gvdh6|()v}Oxr76^mf2jZiz;ktptUi39wAa$U-jzMODFvvU*
zjlPBpw6=hlHC(C8#MO7D%*3tXdI4(6F+$dGfmQ^9+y^Q;L2&^KV~~4aurYwc9>fM=
zSU7{&$QW6ia61**22i__1>9Z+nFk6p&>AQZ8-~H{N*IR$q#oHe5FgV#B;^du3?R=U
zM3@<{v|AC<49wsZhY$d*VFFEifkZ%Q7_^1~R!Jr^BqbK7nwdbRcp03)oOmdYfq|ib
zfq{XQ2eMv^jfa6@4`|Mi9Xf}|4xK|}XJAOq&n*Bg6@}Hhu(q<95%xOQ!g92&42ln8
zFsO_Hr5ISOL)sn)ouIT2;(^u)g4DrM6S_K(97rAL5FgN;?1a?mFff2p8Yl^Xv@w9p
z1C=RY4tO6h0|SU}idMGyz!X4fn7yF;%0X;U*#(jUsl!%wfW(p4e|9nuS9Z{%k2^fu
z%CO9u%#e}+%dwCaFg)Ml7@IOSFf)LtB-~cEVa2@HxZ?L-^#+#B>uXpxt*>C&xW0sC
z!+OveaG>+rLHCe??hTP(SfcL0v{W5*ekJG*s1}y}>p}ZnK>L9}=M94P;kB^r2cO5?
zz_Pi&hGkQK1R%Bq{=>HG8hn0Z`WY-Lq
z#r+HnNozpjp!OSRk03}Lj0WwS1MQD9Vb~7dBd5c#bv^PPIoN(6&^|iF84V1eb4wLh
z9AHpvc)$<;kzHqW=Jsq5`Nj#lWMu1GLW&&3)j#hfFpgw?WiD0G%-kGMWc;_7&(Z
zL|kry*d3-4@N=*F3bxJbm#}SGzkqGy`Z;VH)`QM`2FL3RNW6m5Bq$GLuz>CuVqjRq
zhM5P}utD;`3bxJtOV~E`FJRl)KZgx+cH9QGz3K=`m0ul%98-nE%kT@)#K-`nG4kQN3BYznFKL7Sqv*
z-Ved04pf&T?TjC-Mas3b%(Dnq-dUFN_27LVx&>FM*AcsRS%)d}BoI(~Sryl}qBeFpE
zZomx&m6o9KZ6tw#*h>K(FoC)O6tBuqHi!c8EkFz?2Js!CY!C(FgW855HVA|G@gN2i
zgZSXJj*JZ89uTOXQwJ(^kob_RsUaFbW3AI5OfU)JgZ9*bISdToeK?C?94LP!0|SEy
zBLl++=w5@}Nb(^2&!X``dtG2cAo=T{Jj=|$paRtoYJh>3g6E|cC6=T@R{4U~e}dLS
z$LE&jlw^W<_*X@zRuq)v=BI!ZVyuNOKv^3NSu+h<9SdG(3|^E9Va3O%<>V)pfEHL6
zr!k}z8r$QX*omv@?m|4US~Ud{VPLoc?T3Q)nt;~$fcBVx`l+CJ0rgXVfaGNvKnG%g
z*I@}TLHe;GObiSlc?r;-4q3?BSCBp(sJID8TmrJ!gGGXY!3U}@04g5>l9yy)hyl@3
zkbPJz>L-wCMr
z8IZUH0|RIr2IP(hQ28fN`4=F0Nd|@wAXc;b&kd0j<>)U|{G0(Si&N
zQ=s%5D18D%3otM|0ntJX3|~MrI|IWX5G~BWzyn&l%g(?c0-{A27!*J>I|D;XF?>1<
z+zo*D7tFEu^NkHGi0&`!LF+H@FmN(}?zacElTUCptpU-Xy!7JBUUeSst?OC1H?L>l
z-n9M?*T(ffxHha;1f4knJFj=b1BNpk8`X6fmZ*m?Emf~!S*E^(ZMnJ#_x|+)+}qZ3
zaBo>Jz_4*WsCWSNDM06hh;W12Q$i|=0uD?9+}rwjxVQFmaBt~n;ojWOz`d#e57);2
zA6$_3l?3-*bqyxaiZxK%vw=yJ!AVCOJeJSE0J)Iu0e8LU^!4919WEtn+iy70SClf
zP#Dy(K+b?&!UnMuk97N1aLlmol&W>3CWncKTS6zd5>v|R5E$bC{H?NoB-LzhUcjI~yUTC^(K-`PDgJYxm
z1FlWrJ}Rt@KY?wzx(+X>jSowco7QtNI0)$Qg3=_DiU#l2eihy={R+IB`(=1H^-J(>
z>=)sMq(uYXz3QMahV^$r=}(HmApn&AKy7mdhJHprhGypZ-jNIi%TYPW-ENc$Uf
z2LmK+O<-FBa!)@8@1lM}c8h@TgoniG6QuqCq(2D}zXui9V446v4;|)K2?lUn2Y}ph
z5uCo5R3P~SlD-rzz-cG|J!4oc|mGx
zI2jmjf*4Q?G6%{;p^(MN>4zX2Mvs05s2c{d6XbVLyB~C!3WyC#Lm<8^sNK%MzyNBW
zf%u?w1yT>fpl~t%)MJ5)fchJ`1@Va~U@f_&IZ$!*
z4vkB3B4k@0$g!XedC;>3Ky6-7K?~|*fcq4J3=E(FBv9Yt1E>!n46djdKz#_%K64N)
z0qP@w+O|+y14_q$XaNS$eMJl`tPBh_AigLALl1~%Wnh>CqQw{()_`bM28JCVTAYF5
z1c+v3U;yoh2iXhSpAXUx>XU%l@SqwE#ODFE)g>7iK>OT5d{EzmMT&vJ1|%-Pz~BL;
zQ$Vyd149dx2F=}p)PvG6hz7N!K=c=oJU;`20jTXR#K7PKqD2@OLZEaElum)tIZzth
zM-X9PSOMY-F)$o}(sw|#CS~m@%Wf>TDfM`|*&<0PGNe5UT!rTCRAHvAM!Wc4JNO;a6!W?zZ
zfscWk0W{}O!?I<41}zsfU>fQUkKffeCWX5~$4!YFC2wYk=-T
zV^*2R;4AHpfQU{U)`3Yneh!0W+Vk>Gu
z?w$ad4^acU4-B`NAayWzfWnj*J&=2ZK&1)DY|x$FFgC&-(Aj<x20QAhS@-
zNB9Xee+H5R(J;F~_nL$BfX*><0L`UH51Em>|zd>OJ)~5jp6G(V~+=WmJIX9MB<;Oqg5Kw*x
z=|K)>J_ZI3u($^7?z{$uYYYq=pzuPdYhY+&VBi49JzO0F6B{Gwt_lVwggOVNKcIeu
z2FU*~^BkByfyEe@K;s}B+}qZ(aBp4Dz`bStAFj>oe{gMD4;kawx1NW4`}!|j8`pmT
zjg3rbU;v*Ly5InV;)(|hpnD88xVQC({TEk(j2S#&65!s~&%?dFpM!f_KMVKPeg^I>
z{eQSN_y6G9)c=KRWB&)Fv5!ySa!*|4W-SyTcZGxRY+SJZA?RGk9S#f{Oi5~r3JaJNH5?c~VFHSSCtRTO2Vrpxx>v$M
zpnxs4FMuUUEr7*M?E%-K^`J6Qh#^1-G~NM<2L&c~H3kN6@VUku44yqa3?9&Ot$Pg%
zL)RJ(hR!uS3>|B}{dX4;U}#Z+oPi7~*V@;xFf^?ZWGEB>okQ!v;-bdDkk!M&klDk*
zkkP}#klq6-ml+tm*03;muHj(tSi{5MzUJHi6cI={p3=j@kle$-;If8=!Fi1!!#x2-
zfdkA1Y(Z)a3@3V67>@UFFdXUOVL03)z;H~3fx%-93xoR_4hEMsJPgijzWu)hHRnhV
z3&UZ!If@Jm0u&VvFhAg0(hmv~NIE?RE=NIpQ2!c~w;*LFB%Lxa9P0yx1wwwQI!wQ!
z0jPz9O+RdG1w@1NgJ@9xTmYI21$7^Iu-OfoJBEmZ<^n-w?y){lI!Cq}Vkc;f4AiQLoDWjoA#P}vURL(GQcWl=^*`437nurd@>K7+ypqHY1ao&bq~!V4^J
z&;U+n2t5i&g*jL)
zY8}P^3de4&;f)-2kaUs*t@Ck*F+^P~R&^lvq526F5BSn$0)sPnylMl-qJDM;2MN$z
zIwOOV0r>tN1<={!pq4u*zk=@n1DOvBTLmUTh6zH70u4+ZY>U+y7}&w*TXQh5_VF;V
z^a(Hss4+0OuVG%RRzBrd=(MU8>sa6b#fp?(I2=5-#73>+*B
zP3!m>7Kk91-{p)99H25BIZgL6F>rw63A`2s6h;jU%}_B=xev;-pnBpB*D~&u)YsqrgYq0GFJWu5gWMXxVxVTi%)rt7
zUqpq0!40VnNnm0JouR$}v=#<2J`BnOrpyc+AhSXF6xL<|mBn8{_4)!(T@D#b2HE=o
zDhARAQwu5=UO~lS?gND(NE|edtOzv&Sv_bR86*y>3qa;V)GILEfSLnwJ1kEnFkOO*
zYcLst`y-(Ef$2F7l|$Ea6e%vp#25`
zfA^}-VcNQW2Gf@HQsK)CTfc;9`}ze;+t&9mZCu~M1YMiA0@6PQ
zwHXz`{bNCuHB6v1sKB&>XmrtSR;n6~xLVcOb1gK10u6sFDn6PPyj_b_ej?_h$=
zQEXt^s}5;13WD2=ApP$^ZAJyqC=DoGEma4ng$_tMvtd}G{tOfk9S#g2HpsuA{PP2}
zM+T|}6!t&J2>X8w4k94EATvRCQMST93{8N5hl=rC+p&rXIJKNu0=VZg9q{U&^s{0343Qfoqlxga$lwH8FE1*!S^k0A(@-(hxvXl!n{#>~J0QwIun7+jpz@J{!3BH|2qS}l+MoY|Vk``xei!HtsU_-H
z!F8IT%10K^x=%qBkXa!6L4N+k!oUGC*MTGoS}iGL4t*WOTxJh*^UgR#r+BlqTqApdssntt1e#u?EjH)kX=vy
zJA{B}Q2!d#_CZc7xBfYVfYMbPD+33}Z6G_AvV!im0QnI#M#rq84(bay6c7i97JlEAbnX4rXy-||2c>>K=}bIN7U}KGH?_y
zEm+UZa0tAf`vB9T{;B^Q1i*G{!1B#9P=|*D6i%Rg&%_|8^7a1#p#YW?HN^>#bfLji
zrzXh;3il=J1sEO~@iI6BFfs(G6)=I@@}T>nz;|DZGL#B{{3F2t>i>Y&p)Xor35^4g
z`Un5Rgg|a6U|Q4
zgTh(^(kBPC>nfO*^vC^k5Xpf09V8YFwO5P{5(Zr?p!T|;3aBhCVOp}j1gaKPX8C~3
z>u_KQU|~`Nl}n&L6Ue>_rbX-JLFuK#0W`P8!N>q98<`mdRan638NvtEp&&jRR31cw
z_^ePqhz9XlpnMPw;)Bdt@OQ6z1k;xFAxxXs2QY0~@58ileGJq7^&X)1B&a_#0n(o2
z0`+MYJYWFre~n?<-ygxWr9XsebAJHSrhXr$jr|_bwqpX*UiI()7l7~g0rhJ@YQO$}
z5CBroz|h;zLy%$a@EDWtZpu0wz*%&xL`vyS!av2!fdj9@D
zAR@y6x=U+`#^?VHB3crQ8Sej22mtA0VQ}dK=>hErU}jh#Aj9CK(#r;_JCarY|8LTG
z{@+1FOQMF$iNO-8>GR&u#Sy^qXrySpz*s!>p^CM
z%m$6Mf!qmCzX}XY$^uI8`+^iTl9)hx85kz6Q~14C{S3?2^>nK=(omfcmjaDtB1+_upXI*MEg&d;bNN
zZT)9hw)UT3+0uW6Wpn=lmQDS8ST^?Wfc9x0uK%hPy
zD9>>)ELsP0Hw(k!b)fZjJPe!FOqlkm#jtEwYhl}<23mU;!>~!cg=wQY$Zv`o2bdKN
z9xy3dfcjsH77H+J0*@(x?$-kKCqdy0G7l7gE};0^;K0Dau&58zmq(5-dvIJPFhS%%
zW88>zV1XicfJp>Aw+D(NHWl!lN(vBtpt4Q^Nlpu@4^-xX+yH8~g31h#UqO73e-)u>
zK;mFA4F&LcCmX2z2aQi^K>NW43`}BBwV?G$AoZZVDvIE;+JOm{W_UpNIf3suU%U=f
z7K6;(0No=6@-v7J>UTe5W8m1pvZx;vKA>;}i6hiO$}rI08jv{1E?;(tdQjh)pJ9=P
z1jEMlp#HN6!-n-DAa`|u#!8uNKzS{n9n$CJU`PPxJq8Bn9xa1ZhTq`3nFZ9G8Im
Iw8w5ZrE7)v6XEHD_98*EeB_3iZX9tZ*8LR{K
zi9zuTI->zwADag}Pr$%q0_|hRu&}7Lu(7DY`qZF(PoO?Ej1Mvo#4mWaSG`4W>-q-4
zE$eFpH?OY{+_b(#aO3&{!42zs1oyA+5ZtyNyypknw+8jA7YJ_Z2hBk*5!}!ZDm!`v
z_xE=QZtHIm+}htDxTU{FaC3i!;HLf(!HxX|f{=do1i`)PU%_KNOe$agKM(-v`TUF;b>nzzBt{HJKu&RLcf$UJ$*v0@7XJimn
zX<-vn<6vL|=Vy={$UM+mKF}BzDBm98fRvvgx0^5^%2N>EhJT4VNUbqLr~qiZ3Zx$-
z4%!3U`n`4i3;gifnxzZ}zG$5#G9ff$)~~bA&gqpCPn8|rSiePh|N0HW
z`_``!-oAc?@V52feVje$bfF8R3onVgH3xwg`j9j2xIY2=D7(BfPzTh48li
zCBj?#7YJ|ZpCi1ve}?d;{wcy6`zHuP()JEv(3laZtQS)G@Sh2nG9H90UWbJi~;1YEs=$IWS%s}!W8Z>_E$KW8)
zA-rh455of?(EP9r!#;J;e2WGXn~Dn)q}|vfyl8!o@RELzJV+l%u16SjXFX_c7djSU
zaDZ7IRL_9#w*-wZfL8r8@N@`6=Knxug7kvS0ns2ofaodE_27G;>GcU0B;A72AxNHw
z7s3bmA(?}L0~8M+aZ>cd!UEJ@0hx=OzpsG$ViQ1hqf#Hp4&=J=EL09;AISXz3=RVA
z|Akc6a)7t!Fu=kJ6fU4J!53a2J
zav*guxmEvzLO^0*zQO?}&^na^0wN6B0*jbHaSjS6c7`o#hZcx1fcjlvbp{PgbD(}W
zut0=Cd%+eac7_Hakh$y(Tft=uNFPY8vc^^hkT|Gr1@Wh_EmQA>>IJC*r8m&Je~{cB
zj^*lYP&ttMk>x~y;J^S9k70p`2e7!R#6s1B(w3se113;=DMoO)I;738
zU_E#Y0<3RoKPcUS=5dkbeWCg#7&fYd(gw&)pmNq7Dh^89$mW9NLHjc7q4J=1M2sM0
zUjV3GYKbHc3+Eh`W$MOIaafuLwe9r&gZiFK(6q+1?!v#l>Kcq&*Q+pYS+BsjdA$zf
z{`E49o7PJ(Zd@d
zlK^Op3|cQJY9uk72Zc+A1A_o~j0-Ye$;i;6X2Mjc1~U&5<`DC6nX?ya4kH7LnxaAr
z6UaP}K2X1-pA(dqH?3n}*t8DBuK6#h0@~AVz_4|_4#Sr98VsA)gZ8dlFl=9M!mw?<
z3d5%L3g9*%G|a*Mf(8-A1)zR`xC-bFS4DvbOePH5`YpisxNhy&Vc62I!LYesg<(^_
z0>j3B&{!;}tp(b1{u$i<5m#YkSY+_=zk>isKM%tt6%(e5DlKf+RAN{zfcN5n(jCaX
ziWUc$klQZC;P7QuVPHs_B*5S-z{bF=!pGn&z|O#|!pq<+02*g0`7aJ0Q$}tFgZ-}n
z2~$v+_?DA_17tTyy%VT?qTs;9$dC%oW1xAz_neP{l7s(TVpDN5Elan
z$enLELG_ln3aD)-!@#1#q~THkYV(2HdlHKoKy$I6egFqU^E!}P28O0}ptd=v-vep`
zgWBexdxl|mj&gwd>CiqKq`keVUxZ;}Kj@xfP#l2ftbYDq0Pd50hxg4uZOpbFkh?+m
zcZ1rPp!=Br{$C&h68r!Eum%g8XN|0QSdv
zke|VKt2Q(+C~83NECz)EC>}ueu`xIZpqmTxH>h0=x?8h_%?0E}CQuoLt`_D7@O{q$
zpuMS0Js|xI3{FrQB-S9n#lWP(!O+wL5@%s>04?EXU}bPp0jYHmU}6B#pmxU}e(ZbW
zgI%2i3=NHfK=;GBIGH;eIXbzS8Mzvpx|*3;7?_(mxjMQS8CW=h%rG;xbak_Eax^e8
zwlp+zb#-yIurxF@H!yNCG6Kn?>NhttvT$*8bT%_JGjs+W_rhRcX<}h+WNc|^Y3gX|
z>S}K0WNPYW>1^a?Uu6!=>}u-hW?^n*;%wk(WbA6-YT)K(Zf*)XHJgC}>{cTS
zuv^_Azy(5Kk|6iET9})fTRIyW8kk$UnHamcSQwdDS{geWIlH==y1Iau??ZLE8bE=$
zsiU!hi=mUHfw6_7p&{7ahGvFtZsw*&7ETtHmQF@42F^wnW(MZYj;2P=rcM@SAiJF1
zOdXvqj4e%_9Nk=<42_))j9eUzER9@TTwTl^Ex>kx-EU@q?0%^An3OqG2xPXQv!%I{
ztDCc_i4({yCo@w=XEzH=Hw!}-6BiRl7iUv5Q#VHwuv-lbp&mh|4BbqeE!-@P%pF}_
zjGZ0LO^u99%^4U>94*b9OwBATT-{8~jg2f!%*;&8EG;a}ES!xkoSZBTjh&s`oGrj{
zYh>(bW@KS%YHVm`VQFISVruE)>}+XhWME=sY-(t1Ztm!8>gHq&R_p5QtZQg#!~pdI
zF3J^M0_0aS6C*S663eLlZM6
zOD9mW#c7YFrHiYZg|Qh(sk5b%p_7S=k&%TlSdXEFg^Qzwfvb~&v4N$5o0++@lbex&
ztCNYbqoIX`fq|Qeo11~7n~Q~!o13A5A=qE$hL%Q7mZolQ&K53?<`!ngh6aX)t}bRy
zMkdZKE~e(jZkFcej)sP==9VTFhK3BFa4<45!RbDj|B<5#i4AtAlZk<;fun_~fwO^$
zld+?do2iMRv5~2nsey@!lYx`Di@B4Vi-nV;k-34Bv89Qzk+G?%n;YnC76!cb8k#v8
zxf(cGxEUC`8XCK}7+IQ_nmU_08#x+-u7YH6GBj)zHY<#K^?l%>ty$)zr+`(Zs~S&B)x`z}Vcy!qCXY
z)yde{(ZJ2b(a_k^#MH&Y(!$xu5?sERxVaje7`Ym`xf(i}yIDF}xVoCVI+-|{I~%xJ
zx*D1pf!uCvYHsFaY-sB0?CR{~WM*PuW?^jZEr((rr>3lkU(
zGY=H@PR7QDMxeZFWDIhtiKT^wtAVMRldG|tg^`P)rJ;qPi>0%ftDCEZp^2fPk%6(H
ziGhWMo2h}Jv4uG(=1k3uEiGIu9F1IE3@u%Z94$JMilOE(KQ6GIm#7b6QxM?({HXID!XM`J@nV<%HL11Ae-0|Q4h
z11CdgS3?(bR|`W+7js7wV?!5nXG;TDM*~+=a9Dxj-qgsD!I0R%qMbShQ$tHrV^=3j
zGeZkkLuX4zLy%7$jSL+PoXjjtO$=OJ9gSQZ&5cZ*EGer
z($&z^%+S)<($vt^+1%CA*xbp`%+$!)z{$nf$;r^k&A{B))ZEy`&BDUi#mL#%#Ldvv
z&BWBu&Besb$<)Bu4b+;TJRBTN4K2(p%q@(a+>G2T&CHz4-JG2b3{5QD%nd9ZO2H4G9wyBTHv96AMtmYijJ~WNKvSW?^LE=w@bM=49ex?Be9;XlUYO>S}K8
z>gH;0YH4KQ=4$BTY-nWeXyoSRXyM{&Y;0oTWbABcVQS`RVr1#$W@+wf?rLo4Y~*U{
zzX=&kRYGPtyX=-li
zWMX1wVQB8?=Hy~%Ze(ukYG!8SY-#T5YHnm{Y3k}`Vq|7w;B0DY;AClFXzb?bVqk7&
zXl!ciY;Is-=4fPY>|)Tv7o!@BtZ8AGeOSW
zn7{-%E8_=*8tjN4OIs+55xrR0|)K32C+f-fj7B1N5>%ZVPfR$7YBur06zmm0vF^Ca+p~ln*QhKBF7}?d|oaF(0+1|
zTW&z_bVg1tpmGhAo
zA&3FRAbu5;4WdB&W(EcZklRkML+%^~ony6t2eL;Qv>zOOKlx6OMkog92i?&Q<%0LG
zpMi0p?!S!2zlFwsh{k`xz`)?c$G`wOj|*f!`W@<^^T}XZK=y-9f=A|yGeXJ>(76d9
z{i;X_45Z!?jqixYPeS8oqw$N;__d4-3>Ps0PXb#ng0w;9&}z6viZD7nHA(;(79C|vJ4DUpm$O$GC}SU
z1eGZu^R$>47*ymK7+~RL47w9tj)4Jmo)k#l5zRb*G=4Z5KM{?efyS?7VqmaQWMDW0
z%@3Vu^0S#37&z1*bvnrY)oAjYK<)$GMG8F!?GVWQnviq9K#?nsCF_ahSn
z1L$5nP<;=Q|HZ_>utW>e#sKlbo63_xB>{QTA#__2YSdN^7nTu>3$as*Q$hyHH0rn_J
z6nwojhyl819CGV4C?4`l^GZNBE*FDLC@RiK0@0bpRjEb!AQtFw3XHp&L8c(zUJW@q
z9r?0mkc!j_#C_Mfko(C&!qEGg;n!e8mBH?B&d#h-v^QRw+~Vhju%pfe`~85kr$v=9S>3WyeDU@!sELJSNM
zAX;4e}@G
zObXDQtRPyLfdPDnwGab?4Tujr+d`ayAqB)2VPMDs(d-Ni6(CxKfuR9JvokP&&$!eS7y|?7
zEId$n9Rb~aEy%!d1w;!mFgyX#!VC;wKs4xHVbGn|!VC-|AQ}{2AX=D#!30DLF)%oQ
zXh8;s01zz%y(?RofuR7(ZvfH43=9)MG$@^bXiz!<(V#OyK(rVG!x<1Q&H(NgfzD3(
z0^*A@Fz|rx)D~l4kO9%4bONG5=>$ZB(g~D~0ny?N3>6?6bdDp47G+?V1EN7^seot^
z28JCVT9kp|0*Dr4V0Zzdg&}<~P&(rP-PJA3z#svlg%}t#K(sIeg9V5dVqgHBvkE#_
zG6c#`0nx$?3?(2MlukgjFayIB5DoG#h!$jE*Z`tI{sqw>|AJ_ce?c@TUw~+F1_lAp
zUEm=9f@siP;~-j?fx!brgVHC67Gq#Y0nwnl20^q40|V%;aL^erpuPj>yvP~c3=AN8
z35XV9U|0j9*%=sifM^j0h65m)oq^#7hz6a-0;1U&7=D0g5l9Ccq@M?LSGWiR1L$sX
z5MKex*8tJ%3=Ae9T7-eY21J9-(FD<=3=A1ix&}mp(jSQCXJD8CqS+Z3BtUnK3otNf
zfM|9G1`7}^&A{LRqGcEu0-$sRh-PPC$N5*+fcWeT4B)%Xl^GZcKztPjh8_?N
z$|oRNm4RUgh-PPCxB{YO7#QwA=_gS72Z&Z>U|0aUOB~eR0MQx@44}KmSu`0Kz;}-;
zGcbVf8dqUp-~inPF2KMb0iu-|7z{wP3Il@=h!$XAhyl^c3=Ab8T7`iDeAl=D1H%Fk
zUzven2Z&Z-V7LOJLFa3NXk`Wl@EzkS3=9&WJH(#J~W)qg;!DK>}1JXfrTqfM^*8
z1`8++zO!77fguFS2j5*T!@!UN<>!ECRR)Fz5G}*N&;g|F2b_RwGAXM28KT%8dS!C?qFwUU=RS&stgPgAR2VX4~W)bVDN#`1yH&MM9VNR
z%mC5+3=CVK^aUvW1w>0SFi3#zaF=9Yuz}JEP`U+5uYl5LpmYT24tI72h6Pai2#Drq
zV7LOJL1(`~X$H_8?)(f45>VOzN`vou2b~KG;!83xbbx4f28JadTAP7k3zR+rrO$w9
z&^f#yT8e?;3y21t4-2IwKzF^fGcb67Xh{Z!8W7FTz|aGt*%=sSfM{(7hBZ+70F=G}
zqCw>vlm_1&ug$=~0lNELn}I<9M1#s7D6IgcHK4Qsl(vA<4p16=*E~D)u6a42TAmLs0q+l>P&v4H+0DKzGcuGcYKCXf*}~4G;|~pFy+=
z1A`5SHe_J%0ntVb3?U#I6#gLEgn>Z^boaaf1A`5SR$^d?0MP~v3?)!{0+e0@r4N8;
zMFxfoAlj6H;R%Q~V_^6LqU9MF6hL>>gUWRf4LZpbM9VNRctGg@5Y5iOkN~1(7#K33
zbODsEfYJ>h8kCM?A>p|~780IopyGd^;w*9yaURg!_QnhhA|M)MKZurLU~qua9#A?4
zN(;zC%$1Ob=+}{F0N0x_AXSSMfM`&C1f`dNXh#NyEg)Kr
zfng7nJ_4d;7#Pk#=_^qB4wQZZrQbm5FHrgqlx9(8U;v%J%>$y@85l%BvUxlaue?HVr
zJOL61m6uTZ1C$1}oj~O$hbBawj3(5dnh^apQ1J^OaTNxJ8z9<{f#DB`Hez7l(1NJ9
z0MRZC3=JUKl!2iGH2%xOz|aGwCqU^bP)wt>;W&BcOB)lum%spwWc10=;~F
z@agV|yHm}Lv7gOoVF^9nee}*_*zhe*8g%9{XxJAvmjqrUgQOZXM+D-I-s8r=fIL3}
z3Nui+fM}#)Wbj=Ipq*n}knS+}ZWz#5IcW9-V{Qh}oC8P@3#Qi$cu8tS34>lrVo4%{UQ%%}gI-Z;dS+f)K7(FvN@`MRx?W;Z
zrm+!&9u-bBAI-JI%{aTQXXd42=35Kw
z`PR_D$OMvc3Flh@M%0s#LHQQ6f;{LyXqEW`W*7|$Jr)KA@U}w`8wHP${0v$V0`oVl
z97eB&K`WVHYCtrsd{+l8?+4$m1rlXoz@-kf8VY%33P>Hgy&yhlc_+whSbdTLF&0jO
z600tGqu5~B|eaXz&Qyf<^rn4K+59%{ji9+xiRFX7{SX8P?-R$^FjA5LE7XH
z($K)b%*;$d!NS5Eq)b6!w55)c-mq~->->SM^Fb@YU~z(67Qn&48Ivg<(pMior7m#eiNWHG{(piUw|sPNr%MY6349G#FZYR0Iw&
zD0(brP!sTAP!v#NbP`r#kYU)iUQOdTgAT*A9u*B&21N%kMm3G)42l}8j86Kh3Y+tYD;LT{mFug~`L4#3I
zV>^SI12^2y4h%DU)GV|ZA^xpoRI_*m_pboM=Jjd@oQy6ElcD|%W>hmciQ-=mhAyao
zwHT58E5Wc8>|Y;-sZjrlqWCv}p}$AX!;L}3V(+0
zIV@rbVVKyX;?TjU=D@_LXmF81(clDwQ>+?;nnf#P1jxS@=@9=0JY`S}@M36+VzQZ8
z>7?Qmti_;ek;ACyafn&P!ktmYAcs*E6ki&ka9PIS
zRpTgwVge7NqC+d=AvX;MRRb+XMTcyuzVI4omO1;ri6zY#AO
z4#jFSs5-PVDh51aRB^~)RIzAfR0XA112;y+fa45@LSX)HV#4o#Cj$OYBH(`|tp3+v
z=;}d)ffFOPFtA|g>;a{Fa5zLLF`|Y;2BV?_C!+^LXAd|o0>ELxs1m@%sN%5<5>}wF
zuz1N30a62sj{sIim4H{^{HEf;$_Nfm0XK%5c|0}?U-y_Q3V1Rc5>aAM{BVX@&EN%t
zn!zCk#ScfB6+awfcKU9|pr+x@pt$1=lbXgp2E`pOm=t$BWjeIioIy?F5VPWjGfZk4
z+Zhx$9A{G8aFoeus~LmhiZx7X8vmHoG`2A)3M^t$6mVs50-3*{he^%iI+Nmuc}!{+
zj~Em`90!}PI3tHi%^-|H&EOt`;*N4A#U0Ne<{KPhR-E9&q-JoPL2*JDli~z7Ca0-J
z3?Q==J9L=TG&V6Pb|^6^cBnEr^%yd!34}8#Ht;a12?R1IHpnq4HZU0E#cgijRzn6^|I5YV;Wt1$-FQG$fhTG}bdHHUuyz3a~PHFtqkKi7PQE8mwVZ
z)A+%trm=`Y@x)CAP&_K0P=(l~;m@FGpu?!9v6CT!p{qynzzqh)1FR7HG?bVX6F}zf
zU{I{+XH=|s%E$vU6KtO=gQCP^M#T(XX2k+MW*&y7H7X4I`V|z82I+AqSe
zrC)$yb3YHmrhX2Fjr}YP8~Ozpn%9Uh^sbR$=vxEo-)S)HRd-EivSCzqQURH9_C1qL
z=V~Vt0fweEyJj%i{JZ01BErzL#z=t4rYyusMS`Je4Ff~N8Wx5Iuzn7PhBX)d?^V}e
z*t%YYVas|MhE3~1CpPIY>|d|Iuz5Y`)F$vvn-dN&C@xsQAk1(;K!#zW3Ijt+j{}2%
zin0I;llBZJCT@XXCPf7mCeZ0KiU#2I&^(GWK=hJ6~M6h2#yS^2i8MFnO
z7+`)?f%+A+D_n*_NR5TTL4bvUWgX~rBZ#?7>lhi5R2u%Xswhf0Gg&gY=rAy(F0f>1
z5MW?nT4%w)rlJhWTMAB~t`hh*6BY*MK9GJVb!LVG0!$1CB$yc#1zZ?77?{?vFfgyP
zW^i6*!QiCEz~H=tgMqovhQUeAp22w)hz}az1nqR^VPNf(U|{MKU|{JJVPNiKW>8(l
zz@WN|ok3+43xmooZU*I591P04_!*Q|@h~XuLZkzxb%=Dpv<{IDnAWK>pHh~z&824Rq1@Q!@Y={%q?cmTT51au4H|NoCc
z?KTWduki)YE*LtF8G`zNpf)PY0|*TOP#+n@1obmOqtzfb2p`~KU;yP1P+uCP
zAEXYX4Sko)9*`hN0~CYQf|#IP2_Pw0KOUDl(C!oDu?Ubl(AWdW3=js{3*v)zHGs^9
znRf+bI7k5$gXBO=(C!xy8)Pns4^oG1ECRGT9eFH5kdwH6h9V~e1NiJ+kl{$XP(XHq
zG8j~tA%&ZPL4lD0H0cK3*#hzhsP7F5W0)U6YFl_17_2}HCiY*2}uS91`9UG?mG}4
z{q}XxMlR4w(h}&Ze9+hh%t%l;GJrZT$qXSyiFw6o`9-n707SDfFf>5v+|1%+NM&$AeSurRdf%xcS
zqUbZ2ATvPfKovBosDPztTwsYB1xAa$TT3^Na8FNlwxr;&H9g4Dw7MbFb9b;RW9l|<%g&`wBVRvTOZWfSNP
z)%fN)E-*7NfRC5~c><}e0_DOfnEyZmLm^MY$|(>HYC8y_&2xZu=7HJ>FnQ3iXP|h7
z@gao)2Q4{*%xyqO*bIlM
zkqJbAh#G$iH|A)m$KSo`3z#;ozrwVse+|>t^(&aRtY5;kdHoEg4ePfs?O(rvY1{fa
zOdHoLE@)sl!L*_O4AbU*eg+4j3rt)4nHZe(;u#!7L>R5pzkz8R$ejKa
zOk4VwFm3K%z_h7<4%5c|8PIdhcQAoQWyMqk7?@PF1VR};{dW)n>HYXWK?52k(Vzc6iI|AA@S`Zr8l*S}!evii3|<`BFvlnL3cn*U~my&Vqj63z~CaH017LHCF-EF^c4-j
z3lexhcY;VTFX}I60G-g5qQ%G{q9VeuP5lDXlJz{yOZx?wA@LKzutc3nOoRbMgU(K5
zWMBiICn&(MXfcxr4sjvu;vl^+b3pMUz_4X8h!0|e&cp<{2Q*rswF5K?6V3z@gO9-M
zaA3H=w4~pdp+SU&;gKFQgQyWBgOdd#!&W_&6^ocuJH(lo84Qh@K8Q1b(h4KPRx6O%
zP%}VfAkP)1Me9LgF#FUQ6ojrYE$WwHcn|~{9chq|WAJ215CFNsone6(C_RDCnq)ZM
z!@$td!^p5yMa_YoQQKl40|P_H8Wx6QDnI@|5Mg0xQQ>BI3^qeiftiVcp>;x+;o&;a
znZ9ZUM;Wv=${83K+7|r$zd(eMp+yB`*UkUIAt1Ma{H!bx&LGO*ARxiKXuV>CIMWnx
zTAHHv_5T53u=^#z_qZ}JFr@b|Ff8it~X{h&1dhiQNR52k(nUzoP{e_-0y|AuL6{|lxqpmf&%fN4|z9j1-_H=uc&fqAcb
zCwM!NkP3(vVGvRQ-64|y-$lTIK}dyzk%0r0*B^t@E~uFNuvh&D|GxDf__wW>5!lx+
zBCxF=6#ifMx37P|ziIs+{{8FU@NZrJf`7~UC;Xe&-{If5{s#Ys^$Y?_)+>V2?t}vj
z0s@QsB?Pwjb21zd=GqX(5X5*$n2CW&C7kh)xB>&4$`<}*>m3+GRU8;W%icv)1Q=LU
zw(u_jiwQ7@sQmw5prY6y$|TJo%JhYC0h3Sz1A{%IgAh}LXwm=wfoh5!rcBZdrVzOf
z1_q`M(;`IyQ6@!!K!!d1i`Fx;IO#Zo?oygzz_fvTiTV!yCF_syFIc~We`)^?e$d&+
zTNyU+FI~TZe^I}Jz|ww2j{pYHxtLe@7q7p-zkK}}{uSV|?F9eI^;h^8_g~;&-hYOF
zML!P%gVYKBmEbs#VsK{o!kECYfqz-QqQW5tP#O@>U|>+xc*?-Quyn%r{{bQl46O^e
z7!;&HaVEtO#PEgDfk{z9i4m+;fq_9$0d)F6%Y+~Q14S4ZQWo$sK9FK!IHU!-8{`20
zqV?Vk2ZTXkpTqzOze2x0ib*uVrjQ#%55uByZ$h&#Y$A7Nl%
zXqoWs{~|Gv*`PdP!Ma3UpTR)@L{EaAUkqX&;a}Fz!f-&~5C48}84d~~5F2!#?GOHa
z{a^UE_kZBu*8hfoYyS)WE&WgUH}^l_-_(DHe`Eg*e#qIg3<8kR&>IY(@Lt-#haXbj
zfcPK`vLAF7`2qe#{TD%Jj0%8OObMufYo*isP=>SAPmw2GVcKYlKzeV8$>|i$H*X{0+IuXgXCfM
zgTz35kT}SG5FchgNc;v9svRIcNG(k60RPhd8UGi+?Ld}?*#Qy*sR!u;*#Y7s+rh!I
zL>&}{pfn3o2jYV;hz-(nfPYzk{r>}SJ3w+EagaRB4v-j#4-yC20pi2#0G;a!l2bHj
zV5t4?5Yqc!NTnJ)Le0P+%8(${!MRjDfgN;bDgy)P&cF@)8~PPH7NDG0%gx{r0!l|<
zbsEs~XAKrGfyzEue1POY_H=MAQQyM9q#xuKt%m6gTnZnUKi+{N22kGA*uc=l$iTrMuyj4hEDKi18O$A=%hW;V7K7XkGhdCtfdzE#wwAym
zCeT^MS^}X=$_x$xAiI?fHi6G(1*rwq0ie9EtYO3il7oo3GJy1g*dTjAG)V69eOkRy?JmpR{~ZEA@@7m79H1~VVq)Ovho(_bTOyu`
zfdgb8$PSQQH$eGUfr05Jh=$$GIl+Meqz=?F_XVZ@4$%2jtSVdhmx9YmQ28msAfhq{
zBsYP90aP{!FdPzgU|>>N2rk!!RQB*M>4%kTAbUV%+YbIk@N$iV!9f62wt>o-Fh&NB
zBm9fjZ{c6Gz5!Z3J1~fV%>tcw{)ZX+d9Ms3X!IPk?*kMcAPnk3f@sjF6=-A^#0KFG
zK?Vj;N+vXV4%+JhQV+who*4S*IWBdeQEueXbC5bv6%I2Gu
z6Yk-nk5Yj`5n&oL1F~tLQ7b~~SrMASt21F^n-F2lGo?5nmvJyKFr0vneuFO7nEK=Y!C+V!3RKsIM9&?@ZqaSd{F#BxnT3cVH~LXB&gk6m>_33WunQ0
z&QgL2f$Xb?aiID^qnI@;3=A@C5dG88hR3VED6p?1StiZYQ*4?o0uG&TH>8r31&ic
zgPCBx3<2KG!G=chVAZe*lH7uL@bNUDb7*o>6N_MrK0$*dU}pwrB$^r;F+eD&kq{2V
zP^>56K;33!Y6fy%a7Ln$sTo8sf)CaX;^r2B&N+$)A2|ea3+N=Jl1v7OFo-J61D%(X
zni8LsnFl#<2FsZ}&M0RRtzckaVBuw80G;{B!pFdH0mSEn%s{b#&SGGM>{}E8(Si&N
zIv`qzfx!esvobJ%&V~e?GZO*g3otMgK3b1A_;M=3`(80nwm+{~($VI@`w2z%T{GXJufR1EPf)7}kJj0S1O0AX<=t;Rc8n
zfS&gv$iVOe#0M3rpxHP@1_l8Ttpq*yMVW!Y2FmvV(aH=AF(8_ifguA#gU+!4(V+7>
zK(qn_!wC>A4L#>Ynt|a1h%dyz@CQVL&IJLTw*vAXh*o1@FaXi&3=A6@n6|!Fylny}qR6%r6Vp39O32ej?v47GM*9uQFOCw@u
zJXo-dSt>BJ^*Auh=rQqSvQc4Z?eV?rWCB`oWEAhV~w931>z{
zher&G63mPq42#!$Fs$h}U})_zVQB7AbXd)xZPCuCXu-~C!O+vAXaF+fDT5+t6`?>A
zqqf9i21N;Hh7g9u>z6QWTW`bA+Y`dDtzR)>HKTUI879Sq97YL-=AJbS`_`{u*uH)N
z!`Ah47`CjR!LWJ#6oyUfCopVW-@~wBeFMXe^*#*C*9S0w#y-1xSQt8cI2by5co^Dy
z1Q^NH#tTgpRFsxbcz_7hvQQ|OD1jrtbmrNcEtNRrN4l(`zZ)T_%z{Lz&#p=Sa
zqn|0_T9Kjy2lM~`qJ}99tJgC{Y%Ti#|BFEe!|L@u3~TzCBBm7m{~vDH!mxe4qCp!Y
z(~j>&|Nmb$$YEH$K7e6uKT||;k)p;@MyEaE3<(U|*Z=>&$smPcdw&7gte_&0cnZVz
z^*IdN`%4&BuLtq}|1UK7|3APWhhh8r5{B*lOc91f5)1-NAh{BT?dyehFfcG3VPc43
z*a23b!LXyhhGF~q1cvSXPDdmdG8lHO7iM_CRKT#KzXhZp)bM05FRlQYe?)?zfMLh_
z3Wgp1Aag+KD;Rcw^sbL!*wGJK`N~wo$)J5eoY{e4#u}yr-wHwQWh&udP~0HS46=ji
zz}3P-yCMF`0GXe|&Y-wLoSA9Imcm1u#TZf;wyn=$*w)XK!p5Mu;2RUuj>&}uAbt!h
zgW?Pjzo@VT#Q(y~pf~}DkD>bS0U4m_k~Oj9ED64&kL9&k_(swoC=sc
zGz*ywjuoUZZ0kSNEWpsfu%lnGp@31b;v18i!wE(;iNnll0!&P57Rwpc4B8mgJYF&~
z<)||#fWj+8nStqu5(86;27}@ZB}S$eRR(Z+N?60lbWDSRX`31YQ;jAAQ;8)5Q;Zse
zqQ^@HMT_MOKA>=1rp(|1N;7?y42lulOo{@aRfCa?Aq-3VBN$foD|%Qkg3?$3!;XFj
zhBf_)7T*{Y3*Iq$fWoMwkV#P>ghA2a1f!xvGNTT|v^53{)7P*tOkAVF(6dH^p?8f5
z!;Cc+46SQy7`oOlFw9)T!O*dWhoN)L8isxSD;T!-FJai$zkp$D{~U%b{WBOg_fKKi
z)IWh?V}B2L^{VxBSl+|Ku&9TDVMPxI!{VMD|M#kc
z?x_F&U%3@g5x~Io
zhY5Um7}F7U@FC6r|9>-3i4b7?|G(5gCEx?Y|NpFpOjDQ{R6Gh8RDZlpj@LHQkgk0NLsnFH*P
zrZqea^Vf(l%v>YGFk_7ZL;o5LhQ2ih483bC7<$&IFm$icVdz?8!qB+}v~tphp>+)l
z!=yD13=N>8sd*$AmVw70LGucremgR)z+l=Zz@XKq!eG)T!l2ow!C>4c!JyHn!(h}W
z!=T=0z+m6Uz@XP>!eH6Q!l2t{!C=wH!JyM;!=T^C!=T-#wqg~N+Ja6dwHX;qY7^X<
z)PB5URy(1~tOi<{TJf4ufx&d03WLcy4F=fU!nJ`$cvtY1TXTzYs&V@m5
zT?&KgIu8cjbr}pM>wFk=*5xo5uM1$%URS_iv@V1}Yh4M0{W=HmowCdNBN#N-RWMkt
zi($}MSHobjE`dRPT?2#uIva)q0xb+m>zEmicCa%X>0n?uI)jDb$c+F0w;8B3OkiLF
z9X@Bm!k{RzfI(590d#lNdJ%>t>s2+xnN$^yF}W}psHrX3!k|{s&!Bc(*xawfu&G~zVPn4v^iEI@2GBg)
zg7qQ{3)X|~A_9#=fyN={g2rzo7#KEycSk(ZabVcC-h^TEdIN?{>wOsZulHcsx88+e
z`+6IOt?Mlqwyf7-*tlMUVZ(aG4Gj#66BaO-gYICQae(2&|F0@c3q=_O7&fRd2#PR(
zRwFBZIKZH|V*!H;cx5c;E1*L
zK@3Nxd0s+
z3UdjD1>ig-!?0j|1jErjklzy+j`Vpj9O_eGSl-VR!^FT;!U{g*kqOjr7GYv=VK~#r
zpu@`G!*HsPL4}1OgyCc#lMFLM48w^&HH8#LHHjn!HG^Y}Y8p!!ntz@guLs@fX9T)m(ZGR8RUw#(h2f1zDYF?4MuH;Yz78~lWRcpNT7MF@BbM@LGxN0|34A{g|8WRMW0m2}A
zL45Qv!VnzxqK^@R)DbgAIFSpKW{fMgbOLBa*Z24R>w5Dl6f0EvO{
z6CMTz&~9ID2FTg*Ab)_yYCz+#$mU()Wne%a4+EJ4(vOaj#mN~XgasF<-_3+EMu==W
zZN>~it6o5Mzk!a~X)-V{xUfU+r~s{!VSsiBlNo{>ot!*F;`34~O5%%4KucwVzbU}InifzmNh8gzdJXq7B%73~AiH~||2!wV?=0ZQ9|`s-{A
z3`?N&3Q)fqGz1Fjx3V!X6lE5q=E7IjAoWvmt)>Mnx&e1o3GYN4Juw6{#|qB>;N%Wk
z)e2@n2~eH^G0|7vp{s+XUi6iBxYVJqyaTBNl`$Z@Kp12%h>yPV4zwB;BoD(ddqFJ{
z5F1pMf#g8yu$4I=@vr~?=Y!OMFlZbaR3?DfAPh1CM5C8Ev{+3GD-S^S!R!UGkukD3
z;W7ug^utz$Ae#n~C!`(}3kcT`wVD>1S(6!xiW3n-OA1K27RP#86H7A-aHb_-r^ZTh=dN+q`}b+ott1*fy?T!?u4tXrGkgi~|gc
z6CN-eVA}#-&2WTmYd;r*gTSQ!Oe$;G_V=$~+uFZ`ZA*f#agVB6R~g$=Tb
zVFTM23bu`EAiW?n)EPjt
z(@fA6U`y1sB?1`K7!m}OC4?E29hjJy8IldOH8L2uBv=`JK`l>>1O`Qk1kg-618CKf
zwm~Zc14F_BP)qXn{{teR6;fghtbvL%GMJPDSQ(ovxELBd*crGP6a*nXo>V4~KE((I
z25p0O1_p-JYe4!ytyM*dOa?XvPeIV$P>^}r3ZQwagav>8H-OCrnaRKqunrd9pjLGM
ze`Xaf2_^=RKNJNL7(j9-xIp0t>g6!-STHSD=VWjYSirGC4HSkTKZE=ZiYpKe3KJm)
z1`bf1f%Jah0qJD`WgVUbmgVZ7|2v4l^d+!BRvrj2EK`5`-$A4g8ut?XAUzQKK=H-O
z;2_ZbpGjph0|N)hzFhFisstvG`G|DYz;NfkgGdk544B!V)fnyn9Rzxj^n-2@cMyb(
zh`0#0f=5O``St*KZ{+6n0Sw^Vh#|M$D4CZQ(m3W{z4F(=2hHHA93_vD+MoZA!x$JIO;S{t%JBbx!vaMO2XGvLR+obJ
zbt));Z@l$kSgsE0?SbM}gkke~1_o!1I}8jQ+zXr;KxYrgFl<;a!mxb3V#5IjW(Fn|
zP-1j{oD-BI!X))0*nkQlb9Ho
zRTM2iv7j-DkwHyOiJ@8G|9>YHMg|TQCI)96E`|gVMh0dTMux)^*clQ8Kk{DPR
z8Uz$Il$jVAmP`QMmJG@-q72RgiVBAr{{L^8z{1cVqAcLdpl$JpL4e@_C;%Biy(^F#
zkZ+p??R^B9`R%_u=xk1~8y@^`76G|In~{M-+kpeD@8f@lP?&y2iNm1z=XL1jK++MY
zY+b;hsL{XxS}h41eE^L#C@?IA-kQB-z2XE&+EMIyzyR7q>%-t6pun)SUr_;6_Au~(
z;sX?}ps)*ISk$kmkiY~=^NI!uOcD&s)g>48P$xWMX|K(}m90F{j(_1Y34
z;61mB3Q0_i49ydM{|AM?lZq}wlaQjsB8LC}lP9n+B#0<4XkyYfxWb^pZ~zjvpcQ)y
z7#OrVOqeto6of#xY6t%pQBeem8$ikdkRL$l2}FZ#)m9W}U;>RcfJPnAM;t)6fP>rv
zS`h?u|Hc1FA|UsJRxxQ?urq+nX#UTn0@4pM2b&p+3m6z~{(lexa>s-J4Qz@Uix_4y
zGH`(033iJ?0~2`ENP__*U4vHgkejYSX?CE~HOLLv()GguPS>Dtr6gU0^bh594RSxW
zbZx=Jz(Gm6_Gdy(*TJBbaT*K^C%_~9o7a0VZ0=WJ*aWZNG{9#8Y+Mg2OH3H{uQy=W
zwqA!}>w4t6%>`7(FK}RRf!1xjNOhYD18BsyfysbjTfYv&)_x6!E&VDGJNji9Hug(E
zM-MF+_Ns&Gwa?Icjh}%*2vnzm>M~GRFfpj8{byiR`S*XB8Uq8Uo-+fttHAZ0!c``0
z^%S^lfYwzm;JRuNv^<2=Rg;+@brp0=3&S7&{|i913V!>$9Mbrd5De
z+(Gw5f%-upb)eBP^wBgO&~OpVFlg@>#6=%X!=(|~1hLUa(?II5^=v^cVdS1|BatiaCUO%ung$vr1Kp$q3Lel+j39r2DoFIv
zG!+2`2ISREFn@sjf{c;H3HNM~$Ll~nSHymG(4^f!jHaQlxC5m(nEycG0!jzSd{BHN
z^U+t_MZzSZE7(AL2Vp`W^NL{{sC+FNzXgro%>cQn3Zxe_x(8Ze$HUA3J`oqh2c4}b
z!py*609`@22~9s}ZvadPWX5UGXdw#&186TRNI&S14A4j)Xw?#k{}rYf>ON+q2nOlr
zLgR}uGBC)1ZqI<)uf@o~V8Q`e1qCwCf{}sY3nv2u=vG4z--VHZ0d#UXD9?iU-~onY
zhM?j^x6-_1*tKtqQ!1E{+KS^-xAUHJy8SU@Y^z$@W+85kab#Mu}azJO@ZZ9$-wYoPNH
zKr}xC19)W|KLdjdh%d;%0E$D<2ry_43S@2oNSvR60lY$vje#Kn#1~{>5CE-U6JlTh
z^^ig8O+b7B1_mDx&CkFP0;OX>G^lU|(E`vFal#A?u$$Y!E8;*mB!lGH7#PlgXwZ#u
zAR2Tt7KmnJU!N_CWbM&=Kt(5G}{RumnU)
zGccS1(QFJ16`+x9c?O0C5DmIP3Pgi2bVM6`euOl1B^(=c#T!T-I?@e3M?#K)p$5d4
zW?)zXqCxHit^AT_V2A+G3JeT$Ks4w~3@8m=Atueh@CM4)0gadoGBAK{7+{fSVAuoV
zOEWNlZUz8_E9fQw5Dm&lpmQur(sHql(HR>UVL#K?*x1wrGDt^wWW6ODb=N9C0}sQF
zzkAgkm^Q7qVcNLff@#Bg7bfU<+=K=OONIp!pguQr3Hw`_VF;d^a(HofyCCZFu1MZU~pZ-!{D;!+ka;<0R|@(1_qZt76#`&
z1_qZkEDX+T6d07Wycrw<6qwli6quO%|I&(I+9=YO(_qQC-%-~Sy#7#LD|
zK>cV1CWdt?Oib%snD+NOFm39$VcOVl0o`fm!L(QX=l?bV1*Rqy1_rl276#Wo4hEM#
z9tLNqU)a{MFtD!UU|?Ct!@#`m+kYo90R{okIZJ&k3{HIv44|`@7&urMnARyUF@fyq
zvt|GdC@`&Ku~29F|35|L?EeOq|Noz>GzhRTC@^rUC<-t!DSH?)g8GU7|8uA?FgW+H
zXs9x>87MQU8Y}~iDS+IvMn&T>!;k+RB7gonses1HKw;vnD9E5C(9Qtb5vFYLgu#a4
zfP|t115<+n3utE=6Ue^|46Qw&u{Z{X)HR^le2<0lmquRZMGuy<1F2alV9R(^oXj&;h=umHuI0uwWw4;rrk`5)9T)?i`-UHrnK
zD8T?8|A2)b$S)uF{*X7yEr><|Fen-7>37$E0ScQ7!is4zA4s4y+=+0Eb_pun`a
zM}eugM}cWwkCw$*MmdHDAqq_Ad$cUpF=j#8|Nk#n6=!(B(%`_(z~#|V!{xA|MmvC$
zQHa4oRNFy=F`j`z^xyxLstq2T42lk&4FCW0t6T-y?EyL+K&$u9e-2gc1aC$*h6YjX
zfGoyf1_#kU|20)XasB=O`w#{O?p~0cDolsg++{c*slar0O~U~`29Tc=9T*rCJs23c
zBARQs0v6XOTVyaQCvY+-2fSj?j!0)zj_7982Aw0BaF{{aBApSkv-E`l14Gx^PyZ`K
zKzbFJntQY~4l@cfED&f2U}k8r;A2qKXlGEgIL@G`&;=T&?E#I^DhFgRYDZ)-Do1ED
zGBCVa!^n_f2-5%k{}K@vhUY5k3LrN%GcYooQ&lWD%%~-Co{^Iw0n|ibXprDzXsF<4
z0F6T_R-6Zo8?OPm<=_AO5C(>XHS-x32>$=SShYccnSo2;NDVJTgUG-COH@JW5tP;x
z6+o?))}H_W(^WVa7Kr@$-=d-@@qpp?|AY`wI#pmgum%**pffi>;iSNH7(7-AVW00&
zVLH5K3c~_P1*UUr8V>M+(+48#7S(VCG~o%mL(s4Tjq$<4E&>{Mt9!HrRx=7SI0!UY
za5FS0fXrUP0CKOQ#&QM*2Cp7ao=~>%VAKw9XH*UVwT9Z)Ffw>R!_F1F<5*pQmq9VY
zn}LyGt*Tc9W%Lm3zrtPNv0Ao&0P
zAyr8EcBFv@hST9S3QX-i3QXsE
zv@#wua7nynP|QeR0EM3mLxKb-JR1@~XT>ovz{4$IQ4N
z2E_nRMs1153?P3iI)LsFPhb1xzYjRPSQ!`swFK5Nb}%f~RAEREQ4~1D0OEuE3QpGo
zyx_C~5(lLfP&ooJ2Ue!E|6d>ois%3T7pXQ#FfnjR9IoMGND%o4N;{yl>?95|)cgne
z*Hr~nZnJ^QlVp{}VE-;)0Hu?B5L*INt{hsU1Rk_K)B~bH=7Pqb7#N(_^fNMWfZ_tC
z7Ut*opnO}vzyOk0%s_;N9mvcKkeSUr3QUW7v@DVsxCGJ}6qpY8*fBUrfWo<t
z5@r@x!txrffc6^2jN=T70bPuW5gv@%2|kR937w3fasZU46dimR85mZt{qp}EIQ*Cy
z7z8^QTr}hv8bUz%Q%k{_fs>&@0BpVjs61wdrajPjFX%kQ7L|YhTSGu+D@uXWfs0Cm
z1PeIagu&tF1TKf!L1WVbp!?UIdw3WUz;(s{|1Bzi{x^hx>J?DffWi)zzd)xFFfcq>
za}OL&PAUpaN7kq?9qNI}Gl9l&1Q-}V@*usiGIcwHbBF@da%h>lrbkPn7d*G5C9#GP
zR>pm1Xn>Y+Jh;oa0^~C8G^C6xKriD?p_OsXNM#%knPnWvO`tNaM^!PQnNdrkAE}Jv
zf#g$(!_a)1fKtZoCZUX53eBhZ$~akugb+psCmm3^x#52TOM?Y71D8X44VT688f}jk
z46FYuh-zD~GYT<05c&6ig=zz6UcjP*;s1X=l~PdrIDq!WaQ6QB|6D~oLW^zI
zK!XG?LxTc0gQ5j!1^;0NMU5p4Ah&?@DJy`=Qx|A?nu1iGJ_WZ?)FnXWX*Qxfl>n8e
z(7H$gTAnH#fyNUopY((CNgzXm;Q#;4@VaR6e^6c20xwVJ{s*-u(^WwAjx{u%c7wuG
z0#u%MK+8~eMlK6pM#YQ=44|-bVt62-z;t{~LjtJ1gcMd}l%bF^V6mn$1L@^w0TJbA
zDwgu|Gsu4epz;&BUOlu1InTq&&ihP|vNIa22jN!@5I=!|0VI!Hc1{9`gUe1(TdN5i
zetzIO=g^vl3TCu2v%LnCzLWzx7?m?P8I&Wu8MPC-7?l&&Flq;QGlI%e<$x}vw6%Ke
zr~mJvX{)D4OCyH?($3*w0Oc3*+BwV&iU~aop!qvRi5vzkg*46dssm>C)hK<%Kz
z42lKkklHzU;C7A}xD0kyfwgn^!F4sP3{DUL)q4yKE|9EBw4p3POt6wxhd~iJn3e#1fdT9-)ttZ8hAOV^q0`+e|YKx%i6dgdL
z0LQ_rNgX`c8B`rO85tNn)+jJ_^c=EhXV7xU0N3eXp{q(o7#;|;GccWe`qzN$1I4eFLON>PTChXfuolOW;x?V;aeECEM*<8C+d#Ag1A`z#n}DLg0R{!8
zW)%ho^xa4;Dhv!>YgiaO*Kja+tl?pBU-RvMvk0W`+}^{&(A>ko;12COFVe6B&Eqni
z>|tnNvXN(SQc=-Z#9+v1(#Jystp3144}Nj$e^hT8W;Et
zPDdx#JowL~qN=fo;TtokOj@b}idW=3;~dD!py=Vr2r`SA!9nEze+|_R22PcB1`ZW1
z0WL;k1_u!Zrju)w1-KYN{nZ8u(A+wxy?dD9&;R4#J}anS&A^bd=Ffk3@VLSM|4gdN
z0UnHs0$!l?J1ii5Ah-Sbe^>?7o&~9gwPz(56a*UtI2gDD4%G;P?PpR2spnu|5CrJ~
zwY~oTXHn&Zw#h(Y^ZP$TC`cTX*FkMEP#^3gGia;;R3@BQ1M(jzzF=Y?buhLYD2xRd
z7$N=Irk)jl_o^!jBr&)!ZCc;K;H=TkAfyt&v~|4?)0XufOqeCVVQuU!T|>4K6pNZgOp;$0wx8f-aZAUyuSbc*MjpN
zXl@y#4z&IURL3g{EMVjkNM=-4NMckDIKrr9;KiUQ;Q%flxC7i6d>9-gLH$2a+5(?0
zq>#d-sPTY7QKFd%Y!5z`&^30m>H&OpFX_g`j*a;K9Hk1nM7as4{9B
ztYiR8D;l#ku
zu@)3gOQ8PS!~#kqt$oK?KxOQswdmt7XoD2y8DokxXpm4`lUx3ts5>{AjQVsD
zXm$f@eX78;U=3(a8&dZyTcg0V7+SY3Tcgj)zyXp2WtT&v{z)%Vw-`uPYS|a~ICo6&0
z(J3&ws4*~j_OLK`^l&h^_3$vb_CU($%rz_w8EZHg($?@Wq^|k)-$g`#AsJlOurN6F
zfXW&chNLwLOiq0cf=mor0!pA0Zv+?^RJG(8l+?HcRGC0_IcqX87%(mA*A@_A0Nsh8
zB>_6;9X4*q!k{RS#H1*Z%mgZvKxHbdOllBd1gU3=q=4}MGaUlKgRnUCV3<^(y1q>i}p^p1{U>W!I
zAbQ+413d1_(dWm|AO;%OGz6_v1lLiB@m_6knt+V;Lh>wRtXBo$m^Su1Fm32pRCoX`H=${T1C)PZW4}TS
z4+KDC%>oSRLIzBW)EOAk`dAoJ`#2a<`gjJp$7{a*
zPZASgc&@_0kle?@kkrS(@OTXi!=p90><6WLke#3*5Eh3H@EG%Y@E9|PDrAhA3o^zW
z5CR@!{=>?^@&7-kilPSS6m-y7vnwN;K{J!825hX^b&ZMyGvoLFo#6buh!s@MF!wok
zg2tLPm~0sw1e6T~8NC?}NHlZ^GAJqtGJ(dNLG=@;F9j;IF~^!cKrrmss9^8qF
z_V6%xK+BNqH7pESYd9D(*YGf8toioe9a@ICgT^C!7#PymK+2G&9!MFoh(V9RL4bi_
zxrRK$A{8!y3k8j`S!BxHDjuBarqGW;p`t>w?CV+n@
zF{r)*h5Zs}I6nBlR~>Yh2uKXPW?Tbwvet(6G7S5{>v2Hq%()m8*qj9g89;3!&>Buq
zSqB>P0;N$<`eW%(VFKk<28O~lG7S4s?gmi+?L1^^>X`tV6BA%!h+*0aZCi<|L@;ex
zpTo3&eFoFM^(jo-*C#M-TOY!-d3^xWru9Bd8`pb)+F1)47)qFyu3yH`D!{$MnW2OU
zbZQ~UcMRZpvl6Do{mU2@NLer~Ua!E^-^a+nqw@d%4^@W@eujn<5)2kh>-s@$F6D%N
zMo`-j6b7I+m*R<;Oj-i@j8O~@BA}g#4H7&IS`NI-iWUsaiUtjg;C7XO0&^GxgQ%jy
z0!GDv2aL)FZj8m0NcU9kOt~g^eE0?
zU=Zdwz%0m-z{JS$tN_#|6KYTZuNN0)U|1-d`+66q?ft?G2bcsI9xyR7I28z3Fff430iDdK4NB7NhmtVY}6I0I;GLfhaOgAl_35!n2$qCzu+qQ+u|P3)lh3p7u<
zxaZIR78PxaG=`V|ABbp690t`fB7gob1@~9K|Mv)CU}yu6WrN%fvKzDxA4V&K+c%)G
z3CMUA$enTw2SPyZ1G!Zi$&K&+!`!&6hRdK0?8YAjT(y?K<>N^cVlx8
z$UPu89)P;>?tjp@d<&8rmx0Sckh?%(3ktIvU-qi2aPMEQz`bw14EOf+65QL?i*RpU
zFTlNJJrDQh^&H%r*0XSLT+hJ0VZ9Fb()AkLOV%53FI%6_;2>bay?ng_(}W%^i2w!(
zhJ+9ShJET<0!&P03=SeD+)Mg3xR>_paIfiaP!M2Hv{(Wv&(#zaS{M}#9x-q;B(NxI
zG%@`7e+=aA9#H<(c38&1%D^D1t#Ongg<*jRxZTeIYFC5Sx9?L|R5-v4Dw{yaL1eQ(e
zLJX4x6$L=$paYWv=x7ZJ@)O97I^3W<>(rydl-$$6wz>ZY*P``*xE8N(VOy}?o*_Xf
zhGoI}|NoP~{YyoO!^{CJ$vvREqd@hslLRxvKj=Dk1qNmnDd>r_@(j!>0s^43-JM00
zC6X9saxidw;aadBl=f7(_xCGs@9UT0-rg_4y{%t_duzV{_m+Mh?#=xi+?)DYxHtAQ
za6|SwX>jjV2gRug
zMY&-rlcIny6R3V>Vn_%8jTM60@r(>EDxmbs&yXO}z_w()vP1v_sILwl-;;1=QdDqZ
zieXu%&cKk`0~!lpU}#X3QJdn1EGZUyzaKch2G_WlIw~KQs1MYp
z0HtjPhC}N>;Q(TT_PBu9Ao|iUm@WFI$;A8E|ZYP
zGgH9hnQ%31i`FCi@i!x6eGDkPVf`kMAAfQ|#-Cwv+`zVI{Yef6jutl1UJwUx8yMs_
zP+r#(*ur#{5j0P`SWS7xWTqQjo7dmqTG9_1@A<&BWc>%OrTq;GqL8?oAp$zhiCIzM
z2s0?3fYO2D3}dD@TuayA;o7qP3D=VKFSr)3zr(erUrWM=VK+m9$Q`bw{ZF_S^)oP}
z_64v6^awF-5CH8@`SU-e599{WxX2qW(CM>HYi@8Y?FZ>?&|qa?V(8KQz_oNeBSV7O!t$TiM^jwzwY@
zUMo0OuIF+%T3^YiAi0KP@%jb}PDmRqfPn$j{^K%msS{>!U=(CXU}R)qE9_ufqpqmY
z!YGizz#x&6oe}A|O2+3=0Ca6qFb{7+6(U7*qv8aR3@)tzhe2
z1F{b!2bzEGU|Xu*pa5bqF(@i50o}vM0Ge|Kjk*2%-vpjlTfwocUy$K|z<7!f%-@{xEA#*
z8XRKiU^t{PnZZE-Hq)#h>Eg68>6B?69WgdOaRwW0!<7pY@q#@4r@UA
z{{43WuX(!0@IatJ0A%(d<_b2a9zJke0J7EzWH$%H0Rhm-OQ1QP|NoDwWPr;HCly5l
z&|0$tAt3P;91FnxLs0$)=>g?^P?`n#Erw+=_(b+3h9m({J^-b2kUK$X88lx1|9_7v
zsBNPqv6Sf!*V6TW{uis=;99fZ;(vn38?GhmnL#Iy2rw{!>T*z<%Yb`L|0#wB!5EfB
z>kXLD%e2GHpfYVa*o~;|Tu{GwAvC`S{Ri!d1?|ZKt)X%d=wJhtmyoq|YEZqPxhB|J
zI#3!1`O*DJY>U;ma4b=`{a-Es$`6pfNGrH}*S1*3z{&7H1k?uk{(pf0C~Oiq
zL1oh7{vb{U4p5$Rpe5HyYe3_9AU`*N(*yZ!a8UjL#UL=AVsHom*$+w2pm+zR=fez+@br9`
z0hAU&eV_&jP?~E3jg2$3uz~ifx`5kYps~U~|6RfJ5}Rt94=FvbQCAdb
zVr&7&8!SCT*6@ijJP-i2fsxZRXb&{VzuoqIs}g&j6mVbH+v`#&g6
zJNJO%yBC^XR&Xp^zlH-;CnzwXrtd}TKX5JS2c>I8i6h{&2U>%24;;=ZYe4Y;%JVxx
z@gQ)3As1}k0S4H(4QR~9fO}Ct=oD-NCQuqY-p|5tte=D7Xg?3bk$%t#L!fyi)HS7t
z#UW#^NBUV94)=rRjzDWle{e1C|HHMUAJmRf6G#D%f2c4mT4Tb!rr-TvgCL}R0%@;+
z@}~~>qJ9M?=N^#TwG@&VxELCc>R2WQMG0l_J*1#{Pf*|Y-+$CP7E-?|gWC|G^;@8}
z33B}!!LnfeL$H4t7+!HQaDeQo1BHVJ149JMqV+K>i~3Et7xydtD-;0bWl%dV0^Dv<
z?_*(5>*HWh?c-rk=@Vcu#Imkd8M>}krH_R{8NRL-xgH1A;XL4cvuHiJ{ftZo2LVuD
zLxE{xkCsFrw2!et9W;Jjz~CTafYQehg!VC%iSA>>LHihz+^{|d=++s?*c+()1hqSu
z7z{D$aRa7}IQke{)dd+s1r#L~P@#{pv>(#P*dzcd3qkEP1*Rnw^;;U)_Vt7M5;hD6
zgdu&2L+YS03()u!DSZij21s9GB{%tf2~gZgK>HFP_WS>!z67Y94>~h|oc@Gs4+{fi
z%>$?%Tfz-m8=bNSM1#sB5Jv4kEMS72n}EIlu&+OYWqbes|JT(2|No+<+%b(wQNRvI
z{~?e8(SHbpv_V1b6{7kNN)+`U9HI3ka^45EtwH{6m>~%6KRg7b?-{~O3=By~eTSrV
zpu31c=^WH&`2U|r1;hujzk=3Y8Z2Of^dD51w88y{iHQC~hajZ?&=H8#e^5p1KNwQ2
z|8NyY{{iGjX&zAByl6eB?{JeF%m(c*N9#LWVQOV`5K#UwkLmya!)gs3atsX$Vvu;6
zA;R$Q|93UT4nZbG1s3pJ!40l0>p|t^6Rz#+6=!T_`oOhu{R6Hg>+N_LINoqAUjKt@
z>3UEB}m0*VF=Ovrr>keUx%Yx+TUGB7l)1=$O-6SO9iiD9V*DDN^d
zgsXu31Zuy5`ZfPS{t*yl0@d}Pb`hu?1I04~L-?AD3QdKCV>lFp!fpy
zLl*UOISAH)`UTS9KFA_S9|W`>AKnLX#?l9AM(TqkBlSVj5q%H|6+|CIf|&`@2g!x>
zK_pZdLF>#xZHWd6P6kjv0yJ+7YTKjNw<|c7_k-rv{{MdrUV{ZnBcMKr0C+v^KZbw*
zpCI)^K(|MM&h`eaJ5N(-fb~NpK>ZNNx^qxJ5|nNgE&efdFg(^MW&pKmL4Ew^DvS&-
zRJ0`iFtu#1j=|iQ~+Q63w9TNfuCl
z9n?QklxSvz^gR;RfZ7SLw!{tw20`$C3<+kY3by1P(7I@_KP8yK?L-bxTTTKpcK!eV
zQxz|0S)*tH>U%r@?{fjQ)4={wSO9ICfzBjn;90`~YGZ)fpiC-m(7wkHt|k3OJPaI9
zxYqO+f%^a~Dxf(M4u%GS4mQx7C8#~vs-gyK4=RA{fvhJ6r7@6Q>Hk4}wgu~Na4qgn
z`=1~KY5ylf+y6|^{_f)S>HnKVKl1k(eE?AY<=P=w7tRCf15D{X$^+^H
zu&aClt6RSQ07#uh0>cNc#r;pXmVo;K3=BzY{COBSesC>WPtCr7qQNm{^nL)OPkRrk
z4{#5Xra*mKa35e111Rm|>H|R9|Hqg?V_b;-EV1o>CMHmymhARFFC>f+?f(T#pmG|N
zZ((&eD4j7dDEEQNYw&n6gYr7$bOwqCQ2M+9iU)}Y47p%44=~IJ@gZ&Der$c*kAES3
zTu8eelBPj+5^lFIW>QoD?LvgD<;K=-U(5vRCqwowq4twO?e^1PHzL~U2HcDL&;Bh%
zYo{;oV_{g<$HB0)kB4DNA7uRxXpJ87{z01gbNIpy?X4ZpDXb
z(|Q4hP3i$mo7a0VZCvjHnp*^|;R2llqyQO@Q|vgv09xY(s!u@m3UvJn({C=&c`go2
zqM)&VrX~FGofI0W(~{!^(8EuAalGEKx;1)m_Ysoo#_PfKWI(?H0A%9
zuTa>szCdBq`V55)>su7|uWwM;w!TJT>-rLf&Fga%Hm(PsnK7Y(ffalf59n;4#h^8p
z21<;e^;b)J1Q@oeL)wst`50_r1Ug3xIm}?~6j&JE;M%N?K8FJecVs<63>(0EK_PuD
z7K-LFg%|>%YplR?Lll_>>Q^ZWEMQ7tS*&ir1RC!ne|!g2C*nybXltH8>BLC|(jQmv
z1BDl8TmlqkpmYfeThLfW1KT3-*x3zGJCzp4C$NCV)>;gT
z85%%skpBPwT~s6)CJKPg90RTK0gXk1#!^A!p9jp@7@RCv8B{HfL-&rluVG|ZX7J0CY;Pts6cl}~?5NKgr)(@UXPyp>q
zTEY~-0vYcGrI~;KA?x13`}+i%!0Yt>|4&tU2JRm?sesnxK=${!^nm+71`G@rxR&&D
zF*HcDuq|7^fdk}sCj-#f$^ZY&D&RC`09rfDz@whv$gM~p=<0$ByC=~_<*ENg`Z3aL77lQqKfooAeXum6{eF-|}3e>;ez_CnS
zQQ|Ooohqn(`S-s&cpW>)zTJ!s0#~>|euk`%Qb@0*YHuymBxyu!7F5V`OkLU}JO;0fpxep2eWs
zDH%cQg#{QISipJ(SitRrY<^JPy9jjCB?C%a8^Ge)Z4D#CQiJc%xL(1rs9#F~wDtarO@Z8(shA^RFY^(ClHEyoDjHv@@dP?>-p&!S*I
zqsB9+P56UndH+%Y&=?Nr1XE@e7KY{k&<(-73=Sd;yi3$U>=uRn{h+p1gTl7{8ilR>
z6$)GWOB6Qu7btA%&r#UepP>LLKRXn_R_+Kf2t&)(1SSP0%F0#+{zahkG+7vUA$gAj94Cv^Jp>o^voJWYXz)YC
zr~h{V#~B0fB6U#sD)58GW3iQ;pqqEw*Kjbjt>Iy41?}+{5nyNm;RXg
z63h%G!b?Cm%rK}jIRq34gXT<9dmb`^=E;&(;sikJT%1%uWdg{bp!Rh;L!bbN58C$w
z69bh)pmQ`qe2_S(oGJY0AOb047Wb?DPXNc^8V*n$!la`3ze#|JAz4EKD&E1ixSxq3
zMMvg;16Z9DRQwOm;(ktsBoP&+pgu+hK^0Kl1xo7>dlH!b@GR>8{Xb9uBreD>SqOBd
z-VYv7`bh6%VMy!aU`XxbVMu|laYb(fCqvu7DSa#q$?!I?3e%)@b3kR>1O|o`9E;b3
z$`CGw2NG*ImaPZP5rWD|NImfw>K<4hAb|;_7SvA`XGj1YeZ&A>!wy;-4UR*X9#A|v
z8L%*@g3nX{t-}VDm96kP;s+0;j&J~-i68+Q>rV!)JySuh8$fo*F+33X!viWOAA`?B
zP!w3ibb`yNM~=ZkVjlYSO_pM-W6cr_`$OnJf8?+gX#p(ZQ-!;6)Yz4fB{rKgX(ff9D&Y(
zOke`ll@NXcQ;`4z2Pl0=@q_5a>%;jOI6(bz5DhXDBo3lag3_>s0|T_Y1Fzp;;9aKv
zoF6n-#=ro|Gdmd;uz>a{R0u=Lifs%IBA_xtKn9fGmZ*U0t_tC0>Yy<(P(3Rp2&oG|
zbEKd?J-E&WwNv1AR~oeLnhKuh0@Y#GUa$<|mL5>}gL3k}|4YE*LLhU%aijp+iwYSRx`<_5
zXol#5^`Nn#LktcQb3~V~{~!q|H}*3m2w2E1?uXPD3E=Pn%^!ivAO>F0yd9|D)xZD=
z3l|j$SUoPm!Vm)r2hco{0qFFeR7l$ePdEt3Eba%DAsnFgnnD5tXpe-Vf(jF8UmGM0
zlE7ggAhV=@1w(^?hzuxgLfS2$+u=du2oEH|ZI=+x4J@$s3#9D=nXCH$-&JKQY#a&c
zyc7W$NE)?}ThT8fvur)6O(FyGiv|OugbX5XCxZNBzyNKR5cU%&?6edzAaSb!@sorM
z_PDi>TiRd1ut2~@4l`~!WLkPaV}79chs7<(9Q3%2!4kI?a*((M>9vttzMd7Ho*{AU
z58fZVLU}6B(F^U!{kTYO}7&t&T96p1tp=(;VPOWcdx0n{A1N?_^3@4(
z7{7txnjixQC|r@<_fn970~9`4eRQh-rl%aE`ZR=PVTGw$f
zw5;P{XkPd2zmk{$=(ZXL$%naEeec-lxvI=^;0%RA+Js|r)b{!F4+7B9Uwq|e$I3NycSEPW~=YZNQ
zB|?yP1;`IK{wGL)^qdff`0WZfE}d0;gcvwL=DC3FWMDWTzG(dm$tC?q#FwrI?HK~a
z1*o0__rW9@7^Z>Lf&Ju$~qt3&8C_5FaGY#;_njg$Z=VM^g_ogF^_24O)K-S`PwRgUJUzuNbs8xTyz}
zH$i95gTxsantHS)7BMh0BnW70xWd;ngY<#)a|y75#Xxyo0lepVagUZk5@`Li04Q&Q
z)PT&9W=IeL`3uxmX)s_$S^NAAx~>?s_8D{@6s&)(sL;gl5$wN33=9m5dO&Mnv@P5i
zUV+vX3mgKi1A(r62A%hifp_gQ14DBUBSVsb5QBpN6GNH`3&Sx32Lm<+MT5f(Oag}s
zm>5`8lr5SVm<*m3fbuJo!{GvDiw-cK$>MNj12rL|NnEVC@}DN}**%AjS?#PIF^0dW7GgJD4cXn!IbgCCe?V8~wsQpd;uI{$=e9Y~IYAt699z=5Fw
z+zw<$Y6n90x`W)Nz+~B{C7{JD!{8vI!o<_3B@hWZ^C^UpAxQ22e67?lq&GblTpV9@qZV^sFwWY#t~
z!Jupa+Jgb=m#tXC$Z*I2qz`l^)W`ob!Dl~dX>>7!fzFRoU}0#m;DVeXX2H$`T1T&}
zafm_N;3$K#K^g<79|tOfKxX^^tud4U?I(AF?k8ui6JSUPQDNd)_wTy|9!OkpkXFq$~_-
z9~ZCL369SMc-%CA`3wx(|2u?&(uQIJ0|U&>8$kPum^QChVA|Z{!L)U~D?^f&3)7bM
zHsHNP``24AZCr1{v|+vCf&~nU6B-ymXQzYqZu>Cp@AqKZ+V8@&rQd;RbH5GKCeV8N
zeiP^zd;r@14h1GQ6$K{mK2C-NNl^LJpur73KZ{GjsSey$mN*1H7vlGSR}s*9v(*d<
zQVj{h3<31)ES496=4e4TvO>=8PXL?6z%ZeQfniyXVg~~Q
z>OP^RDnigR925l(F=`w5F)%PRtx*&>&+zI03UK=s)UQ*N0G+Cu(xa&0!k`TvOH5hw
z`@aJ?--70f@BcRzWnu7A1-U^n!3VU@92~|B46VJO{Hvt^>T`k4x$9B=^&d2{nXICv
z;LX6s0P5T3sDac#`g7h;Gjr7V7#ai>n0(eX2naK92{_edfY*8^se$S@4-wFKn-fzK
zbnX+fF0%o=Z(o7QVI3$QLF;Q3n7aD31bi4}!DWH>IxT@N#u@(|L_l%$|9_Jzc#jLX
zEO4&ll4u5(1wzoWpzlBE+^c4AK2cO~W&)M@*&ur*nwc2D>)SzlT$VAw%7e!Lknw^4
z|D9A|dt6*VWuk@yI4nSU8d4Ul=wV=J?^8BlVpR5EW>B^`&YWmD|
z1}8YStlz=0Vf`JB{p)XV>|1|@WBd9G9NX5P;n=$V2*>922RJsZ-@~zSz2brc450e!
z3CGg)2N@Cs-f%2m&&1%a!ou*}zyWlwh{YoYCWS`@pt~KESEMk2@(O6p7?Z}M0?>G&
z@`_Zj7-$ZF$>C7}XuL{!MFv9$+cwbUOgv00mKTA<6cs@ChJ(hy85ltNz-?oV1||ij
z<~~q;1v)cq9q6u!6`~B#{YoJM44^gcNh;vXKzpjvdO-FlDm*|bBOΗXn<0eFth
z1ias^sqX+ol8Bp!-@tVGH6z!V%<7h`TJ9mZ^j0
zLP6`VRhXLkrZ6OlSTHS82kpI!U;&LuVjJ5eZtvX_jurik3<4?&Ov1g29SjVaqM&v*
zXn!{Y4`}TTXr2Q!R}Ja|fZPTuHyb467#alS!0UJwKg2N{_#nri_#uu7w5JN9<^VH@
z4N?o{8!TY@|6f22R91n~1UmzRn4-o3rvLxBRO}hDgr0DK)-)HZadjlsC@=`99QrQE
z09udSz_z@fk>P}OLjVUugCGZkmc((;o)|_gk7o>u0S6ek0vp#P>wf_Ximi{9goBI!NZ0g^`v9WV^||0moi-K?X4)MFG&BM`kq!2KGJ{2DUy9
z2G%|v29`d^nX2exhRo10LzX@k24?t}p{6J(FK<^z4x=|5i~2Pgf&?1CYoW2tZ=;)y
z{Y+YrpFnL*Qv3x;e+^8K_&UH8Aj-f2N*j=LixAfW=eY+={UBNZbmrip9#C7rmBC2^
zbdC$`ycQp({opfPKxglQ_H=>f#SK8~|0jUXBwNt~3VSXFCP4v)&FXtZ7HmMH
zMWFu0pZ`W;j0^&53QWpsMLvo%S+^QCm>^HptDUuZFNvR4BI~i+CvUXFA7Ww
z>p=T@B^WmKi!f~L7l7VJ0ohZo1d{6msl}xRlny{?0JQD{bY>4M4S>>w5QB>lC@etp
zW{`8EI(k?b+Iu({+In~xT6-Y#F6i?puydnYq31@qg3pZt?G*u?CkZOAn#Dl*Xi>jn
z2j~v2Mg5911VL+47lFzd4hB~6{bGs+4oo0D-~NN{`B7HmVNehP#Uld)%OnPd)JdTB
z)&Kv7YM^!D3=FJ`7#LC(fx`Cte^7t7SPi5WSA2u^3k!hHbw~z}t8*zd)$lPi2slVG
zGdL-*F#P)uxkHSdAw`9OAytE&A<2MSq7}TR|1dayA22HlID`A6pg3S>NCKT5s=+0Y
z0v0ni{G9c?A
zMm@57Kw~$ceV4in2>~4pOe+8Xd#Y$js4^NdB#0<5HLX#WP-O&-yEGVZg7>2+8niL|
z`QM?!z>p5!lf%Gpe9fQ#86u#wfByehR#nzm3EmUO0h@mTpX1uh@aKOkcn$@WSN{D^
z1@B1&o%sVgN14l`vqpeHLG<5$$R11;anKna%?#Miicnx`Ksp<^X$^xo14lapC+KXs
zHK6_IAit?FHLcMEnIXWyAPAx*6c|Ba4?5$6#bE^lD87Uk99aJU=K%LrL1&_Y_G^RB
zFEe0Za25yE*_9Am42lMzxfqbj<>0wQP}qU`-M{~Lh=6W(*3tm24P77r
z4sY<;-Jt!2&PaRjn!)pjQVa}&3QQhr{{Lr&o@?n+1Df0T_n!qkmH;~A0@QZ`jU#Zt
z+il4zkh2F{dqC}B1ttgZSd9vk^BM&v=QS!!&fq=rAU?F+!~x15b>Q%0V2A_J3JeTP
z42v{CbN7l8t>C^MXk9fZzcVnjPx${oV}i25A_gr3(6~#-g8%>17l8T}-~S%~?-z%K
z(++T77jeEks6PuX%Q_Hiyg+BpgYqKC4cY<%;I=P#9>V~%MhkNH7-+8$uJhYp{NJk%
z%8Mcl``1JL13ue81bk-@(0K+RdqCq=3gA15Hm{dp*tA}RVdHuM=-3sw
z-`xSZkJ5r+b3e#z8-@-2$Y!%JGzcjwG@!JHS-^LZDWHitfbS1?q&
z!qrv*sYP$o5DF(@hF0+YLj~}?3drphP#l8Vp)1y~Ff3og!LV!%55wX$-~Km=2rw*F
z0gY3$Ff{crFf3lf!mtQjZh`EFl_#LGorS?60we|+n+J)5)(C)TP&x(4gV>Psj)zCR
zO>ABEO@h3-43efvZzF-?0J)vi@q4d&0n4WKIV>C3XMor9HZXw7dgxkQ2GBi}B`lD$
znlzZ$R6uinpmH8mc41qe3e^W4UqD^MD*;~945}Xjh48G+Bx((B3CsTe0+vnvIV>Cd
zGob5tE3mBJ1*rqA-^HdDRz4ES7xbzR@zn{SJ3KD@->YuV;H0C$ux-5x!`AgO44c>M
zFzjCssuPjxL-4)KD;gLILH*ASpgEVt4Y~|WD)9_S0gMdWR1_zG#;O*e)OidHN18kt
z8U$1r3bY&;L{vH$1XWlW7=joWn!tBEgY&5hQw@l}M3R96R5#i&Yza_cTGXc~;mW|k
zklgV5e@X}=!%`J3fz1r&;Ijf3^(ind>yrT8cOtNW34GqH2Ll7BeFIu^13E`kkU@cw
zks+lBv`#`OfPq0E0%Vid8byZ$@L5-1|EGc1xUw@OfExP@tPB?gAp4^iF)=b61D(gV
zMuBPBIvsGE4m7`U2zplH;yTb?n17)AP{92T(7iK|y#t_g4&>l-8=(C~hlTUdSQko(E4|g3IoH6
z9u|h>Jsb?ndUzNX_dx1dR;@QBE$#H8eu)U@=B%&hF3+`RmP
z!lL4m(z5c3$|`MrxOwi*&Q=NKknD|1T{lNj`hONtmdnxj{eT2aEFmy%eL$e@>0T+EU0yhH#=)OnL^?e|991IK$=yztOAejZy3sMWB(eKQ}
zr4DpgBIvp`kRA{QsRP}S31WjV$X*a1bcZ6yY}jp(H8|{r-I)pVFGwBoeTyLTK;{NR
z!v(Y#48%W>1v=jb#DZX$I)4TR2IO#IX$JN4AmIWE50E+#9R)QHF&!?1_lNN4h9AlsC*5mgyw&#<89;|q
zMerf+;+)RFz)--?zyR9)1yT>X+jD~;1A`3{DE=84)-f~%;cX_04O$l!tKXJ=$!m|)Jp@CIr=A0q=pjRgaP08~Hd
z&e0xA2GH7829W!d7#SE|cp=;ax@pYEn}J~tRKFQW-kX6T2FmwhWMFXdVPG(Tx;LAV
zfuY2ofuRP_5TC!0;f7fdN#;
zfaK3JGBBt_Gl0_xh<}%nfgvKAfnfsFJ#Rqni$?hO3nK%=l^BG1e;64UEMgJy1DZLN
zi9?vr&&0rx5Qk7N!NkCDB#r@`k3jZ;c16C4V*pRqfcTnB3=BWw7#KkD3gVkHF)$p6
zXJAl(y2p-*f#CrX-xXAtBp~EL_i!pCAmTTSiGcxhyfZAl$1*W6fQB?-{B$M;1`8zh
zMWEBek@%HN3=AF#2=_NJF)*w_;!kH{U=T<|*uM&7ej)>?5ekm~{UGy`5b`IO7#Jdw
z7#KiJaFG8lFflM}K$5@7#K3SN2@xKTnHU)EBq8GGBgnpFMEo!?GcYVjM!1gybWdms
z1A_-Nyo8w<7<^I?=|h&8fx#mc5kBh73=9FO2={p~GcXjSBFqb9W?;C2Bp=1h!0;uN
zfdLfHAopiLi%?L#BFMnOPz2?JvJt4fsbXee_>qoqPa`t}g9GSp9H{#`m>C!nkoa?%
z85kNe5cy#vGXuk&421i4F*7jS$V7x6LrGe$UNS>kL3~PPS-eq-UUE);UaFn}R0PU3
zWQb2Ih=<>$o0?mkTEgI*k(!(xRGJr(nVTA%T2hjkmtKq_=$2Sq;+t5K0Wu48d2TVt
z5D+5`a>*{354vqPtsp+PG$-B&q!7eNfiaBWtmORMq(rDNhyuG7&VVS(Pl<tH#$t+9BGzJNzWR`&_&@I6bhd^1Gd1X*ma&AF9*a{FM
zH!&TeJg+1@KR30gGQK#qq_hA{EIBbJIX*AHC^s=DvnmmMXEDg|e7L5f)RfZXRFE!^
zW1$vd-esIt5MPpya&<9C3-WcxkgJSAL7G|ul1t7n%`1sd$}A}c@p4iVQ!?|?L3}W`
zI0NjFqT-As5WfhuyPS`hdpu=Q&J!ffiuAF
zElNzutN?{|aePs3VgW-*erZ8LY7xj;#i=D=su0XWvH+Smz`+PlF_2^iN{XPI3epIU
z5U{rybUGhaftX6
z5Y5TJAR+;g-vg!3K{|k&
zIT;vEfM_8Gh7@UtxPUCg+yE&314IikFi6Nj#1%la5(C2$5Y5TJ;2{qY*HD1aHXvGv
zfguD+r$FfnMToqD62u-25Dn4~qNN!aBA~Q^GDMvNh!$sH@Bz^(3=AwF%*nvO1EnRP
zv<8S4VqjPUqE#6fK7eQ;28IN61_l;!28J&n8kCMTAm(m?(tDuv87O@PO5cIfPoVS{
zD6OIe(eD7FMHv`kKr|-Dfzl;V`U;eO0;PL&AnF!?XdwoM
z9Z>oNls=*hkx$Tr&>2v=14K(RFwB6`IrJ37-YF5O)RGLFgqQ8WgTj`UsT10;Qio=^s#KF#G_~oD2*mArN`c>B*qhF=kAa~FL@O~c%mLAQ3=A4!3=E)p)&N9<;t5J00MU933_jtIbQS`lLHQm;i!w0e
zfM`wzh7u@!07{!gFfg!aGBAXIXpnj+y#YiEF);jzgt$v43PS$@(LxLi4KWb@8Yq1P
zN}qw!46zV-mN-Z_@PKGg`i0URAX;T%bD(qs
zl%4{mPk?Aq28I_PTAYD_19a}U3LlOf6sBAow4Dp9T3dB7nP`U*~D={!k0ns3TfM`wz1{F}BSQOH?
zW(i_ohyd|*85m}OXizx`qD2`P?tth}1_qxrh`Bjw3=HfM3=9Pzek21!4V2#i;&U=E
z;Tc63=CI5bSMME3lPo8!0-V|i)28|^8nFG3=A0{T91L@L?*-^p#C@$
z9|J>iagJ_EX>M+%UcSD9f`Wpfv8Az@xw)}{iGqRwNB~M28W@Ro-@7#R^`sEiC8C?l#0j0_Bn0{;sjV~!dO+zcGx^@gB%7|{F+KAMGr0esL6$ek#d
zUh^Kr&UsKe!2zAS0EHrK%pVk9pmAlGzd>UuAhsf8_z^V31LA_m2*C^}0Wt%`REJKo
z!-if!V~HSf7>20>^|6rWE*`~ez!
zLZ3r;!OXxA3DN+?AakHh6bf0K@EiiNOF(1zuvmZ?i8%*ANIl5)5WOIhnSt<}0BFt&
zq!u=&DGW^yFg|Eb4HOZ)ROqpV$j%3UVdIuPJVJWM6FY$Ut(@5OjST?u5)TpNl3m+Y7qk$0KGBRg8%>k

literal 0
HcmV?d00001

diff --git a/mplabx/cyassl.X/nbproject/Makefile-default.mk b/mplabx/cyassl.X/nbproject/Makefile-default.mk
new file mode 100644
index 000000000..bffad1ce1
--- /dev/null
+++ b/mplabx/cyassl.X/nbproject/Makefile-default.mk
@@ -0,0 +1,590 @@
+#
+# Generated Makefile - do not edit!
+#
+# Edit the Makefile in the project folder instead (../Makefile). Each target
+# has a -pre and a -post target defined where you can add customized code.
+#
+# This makefile implements configuration specific macros and targets.
+
+
+# Include project Makefile
+ifeq "${IGNORE_LOCAL}" "TRUE"
+# do not include local makefile. User is passing all local related variables already
+else
+include Makefile
+# Include makefile containing local settings
+ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
+include nbproject/Makefile-local-default.mk
+endif
+endif
+
+# Environment
+MKDIR=gnumkdir -p
+RM=rm -f 
+MV=mv 
+CP=cp 
+
+# Macros
+CND_CONF=default
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+IMAGE_TYPE=debug
+OUTPUT_SUFFIX=a
+DEBUGGABLE_SUFFIX=
+FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
+else
+IMAGE_TYPE=production
+OUTPUT_SUFFIX=a
+DEBUGGABLE_SUFFIX=
+FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
+endif
+
+# Object Directory
+OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
+
+# Distribution Directory
+DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
+
+# Source Files Quoted if spaced
+SOURCEFILES_QUOTED_IF_SPACED=../../src/crl.c ../../src/internal.c ../../src/io.c ../../src/keys.c ../../src/ocsp.c ../../src/sniffer.c ../../src/ssl.c ../../src/tls.c ../../ctaocrypt/src/aes.c ../../ctaocrypt/src/arc4.c ../../ctaocrypt/src/asm.c ../../ctaocrypt/src/asn.c ../../ctaocrypt/src/coding.c ../../ctaocrypt/src/des3.c ../../ctaocrypt/src/dh.c ../../ctaocrypt/src/dsa.c ../../ctaocrypt/src/ecc.c ../../ctaocrypt/src/ecc_fp.c ../../ctaocrypt/src/error.c ../../ctaocrypt/src/hc128.c ../../ctaocrypt/src/hmac.c ../../ctaocrypt/src/integer.c ../../ctaocrypt/src/logging.c ../../ctaocrypt/src/md2.c ../../ctaocrypt/src/md4.c ../../ctaocrypt/src/md5.c ../../ctaocrypt/src/memory.c ../../ctaocrypt/src/misc.c ../../ctaocrypt/src/pwdbased.c ../../ctaocrypt/src/rabbit.c ../../ctaocrypt/src/random.c ../../ctaocrypt/src/ripemd.c ../../ctaocrypt/src/rsa.c ../../ctaocrypt/src/sha.c ../../ctaocrypt/src/sha256.c ../../ctaocrypt/src/sha512.c ../../ctaocrypt/src/tfm.c ../../ctaocrypt/src/port.c
+
+# Object Files Quoted if spaced
+OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/1445274692/crl.o ${OBJECTDIR}/_ext/1445274692/internal.o ${OBJECTDIR}/_ext/1445274692/io.o ${OBJECTDIR}/_ext/1445274692/keys.o ${OBJECTDIR}/_ext/1445274692/ocsp.o ${OBJECTDIR}/_ext/1445274692/sniffer.o ${OBJECTDIR}/_ext/1445274692/ssl.o ${OBJECTDIR}/_ext/1445274692/tls.o ${OBJECTDIR}/_ext/1439655260/aes.o ${OBJECTDIR}/_ext/1439655260/arc4.o ${OBJECTDIR}/_ext/1439655260/asm.o ${OBJECTDIR}/_ext/1439655260/asn.o ${OBJECTDIR}/_ext/1439655260/coding.o ${OBJECTDIR}/_ext/1439655260/des3.o ${OBJECTDIR}/_ext/1439655260/dh.o ${OBJECTDIR}/_ext/1439655260/dsa.o ${OBJECTDIR}/_ext/1439655260/ecc.o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ${OBJECTDIR}/_ext/1439655260/error.o ${OBJECTDIR}/_ext/1439655260/hc128.o ${OBJECTDIR}/_ext/1439655260/hmac.o ${OBJECTDIR}/_ext/1439655260/integer.o ${OBJECTDIR}/_ext/1439655260/logging.o ${OBJECTDIR}/_ext/1439655260/md2.o ${OBJECTDIR}/_ext/1439655260/md4.o ${OBJECTDIR}/_ext/1439655260/md5.o ${OBJECTDIR}/_ext/1439655260/memory.o ${OBJECTDIR}/_ext/1439655260/misc.o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ${OBJECTDIR}/_ext/1439655260/rabbit.o ${OBJECTDIR}/_ext/1439655260/random.o ${OBJECTDIR}/_ext/1439655260/ripemd.o ${OBJECTDIR}/_ext/1439655260/rsa.o ${OBJECTDIR}/_ext/1439655260/sha.o ${OBJECTDIR}/_ext/1439655260/sha256.o ${OBJECTDIR}/_ext/1439655260/sha512.o ${OBJECTDIR}/_ext/1439655260/tfm.o ${OBJECTDIR}/_ext/1439655260/port.o
+POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/1445274692/crl.o.d ${OBJECTDIR}/_ext/1445274692/internal.o.d ${OBJECTDIR}/_ext/1445274692/io.o.d ${OBJECTDIR}/_ext/1445274692/keys.o.d ${OBJECTDIR}/_ext/1445274692/ocsp.o.d ${OBJECTDIR}/_ext/1445274692/sniffer.o.d ${OBJECTDIR}/_ext/1445274692/ssl.o.d ${OBJECTDIR}/_ext/1445274692/tls.o.d ${OBJECTDIR}/_ext/1439655260/aes.o.d ${OBJECTDIR}/_ext/1439655260/arc4.o.d ${OBJECTDIR}/_ext/1439655260/asm.o.d ${OBJECTDIR}/_ext/1439655260/asn.o.d ${OBJECTDIR}/_ext/1439655260/coding.o.d ${OBJECTDIR}/_ext/1439655260/des3.o.d ${OBJECTDIR}/_ext/1439655260/dh.o.d ${OBJECTDIR}/_ext/1439655260/dsa.o.d ${OBJECTDIR}/_ext/1439655260/ecc.o.d ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d ${OBJECTDIR}/_ext/1439655260/error.o.d ${OBJECTDIR}/_ext/1439655260/hc128.o.d ${OBJECTDIR}/_ext/1439655260/hmac.o.d ${OBJECTDIR}/_ext/1439655260/integer.o.d ${OBJECTDIR}/_ext/1439655260/logging.o.d ${OBJECTDIR}/_ext/1439655260/md2.o.d ${OBJECTDIR}/_ext/1439655260/md4.o.d ${OBJECTDIR}/_ext/1439655260/md5.o.d ${OBJECTDIR}/_ext/1439655260/memory.o.d ${OBJECTDIR}/_ext/1439655260/misc.o.d ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d ${OBJECTDIR}/_ext/1439655260/rabbit.o.d ${OBJECTDIR}/_ext/1439655260/random.o.d ${OBJECTDIR}/_ext/1439655260/ripemd.o.d ${OBJECTDIR}/_ext/1439655260/rsa.o.d ${OBJECTDIR}/_ext/1439655260/sha.o.d ${OBJECTDIR}/_ext/1439655260/sha256.o.d ${OBJECTDIR}/_ext/1439655260/sha512.o.d ${OBJECTDIR}/_ext/1439655260/tfm.o.d ${OBJECTDIR}/_ext/1439655260/port.o.d
+
+# Object Files
+OBJECTFILES=${OBJECTDIR}/_ext/1445274692/crl.o ${OBJECTDIR}/_ext/1445274692/internal.o ${OBJECTDIR}/_ext/1445274692/io.o ${OBJECTDIR}/_ext/1445274692/keys.o ${OBJECTDIR}/_ext/1445274692/ocsp.o ${OBJECTDIR}/_ext/1445274692/sniffer.o ${OBJECTDIR}/_ext/1445274692/ssl.o ${OBJECTDIR}/_ext/1445274692/tls.o ${OBJECTDIR}/_ext/1439655260/aes.o ${OBJECTDIR}/_ext/1439655260/arc4.o ${OBJECTDIR}/_ext/1439655260/asm.o ${OBJECTDIR}/_ext/1439655260/asn.o ${OBJECTDIR}/_ext/1439655260/coding.o ${OBJECTDIR}/_ext/1439655260/des3.o ${OBJECTDIR}/_ext/1439655260/dh.o ${OBJECTDIR}/_ext/1439655260/dsa.o ${OBJECTDIR}/_ext/1439655260/ecc.o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ${OBJECTDIR}/_ext/1439655260/error.o ${OBJECTDIR}/_ext/1439655260/hc128.o ${OBJECTDIR}/_ext/1439655260/hmac.o ${OBJECTDIR}/_ext/1439655260/integer.o ${OBJECTDIR}/_ext/1439655260/logging.o ${OBJECTDIR}/_ext/1439655260/md2.o ${OBJECTDIR}/_ext/1439655260/md4.o ${OBJECTDIR}/_ext/1439655260/md5.o ${OBJECTDIR}/_ext/1439655260/memory.o ${OBJECTDIR}/_ext/1439655260/misc.o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ${OBJECTDIR}/_ext/1439655260/rabbit.o ${OBJECTDIR}/_ext/1439655260/random.o ${OBJECTDIR}/_ext/1439655260/ripemd.o ${OBJECTDIR}/_ext/1439655260/rsa.o ${OBJECTDIR}/_ext/1439655260/sha.o ${OBJECTDIR}/_ext/1439655260/sha256.o ${OBJECTDIR}/_ext/1439655260/sha512.o ${OBJECTDIR}/_ext/1439655260/tfm.o ${OBJECTDIR}/_ext/1439655260/port.o
+
+# Source Files
+SOURCEFILES=../../src/crl.c ../../src/internal.c ../../src/io.c ../../src/keys.c ../../src/ocsp.c ../../src/sniffer.c ../../src/ssl.c ../../src/tls.c ../../ctaocrypt/src/aes.c ../../ctaocrypt/src/arc4.c ../../ctaocrypt/src/asm.c ../../ctaocrypt/src/asn.c ../../ctaocrypt/src/coding.c ../../ctaocrypt/src/des3.c ../../ctaocrypt/src/dh.c ../../ctaocrypt/src/dsa.c ../../ctaocrypt/src/ecc.c ../../ctaocrypt/src/ecc_fp.c ../../ctaocrypt/src/error.c ../../ctaocrypt/src/hc128.c ../../ctaocrypt/src/hmac.c ../../ctaocrypt/src/integer.c ../../ctaocrypt/src/logging.c ../../ctaocrypt/src/md2.c ../../ctaocrypt/src/md4.c ../../ctaocrypt/src/md5.c ../../ctaocrypt/src/memory.c ../../ctaocrypt/src/misc.c ../../ctaocrypt/src/pwdbased.c ../../ctaocrypt/src/rabbit.c ../../ctaocrypt/src/random.c ../../ctaocrypt/src/ripemd.c ../../ctaocrypt/src/rsa.c ../../ctaocrypt/src/sha.c ../../ctaocrypt/src/sha256.c ../../ctaocrypt/src/sha512.c ../../ctaocrypt/src/tfm.c ../../ctaocrypt/src/port.c
+
+
+CFLAGS=
+ASFLAGS=
+LDLIBSOPTIONS=
+
+############# Tool locations ##########################################
+# If you copy a project from one host to another, the path where the  #
+# compiler is installed may be different.                             #
+# If you open this project with MPLAB X in the new host, this         #
+# makefile will be regenerated and the paths will be corrected.       #
+#######################################################################
+# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
+FIXDEPS=fixDeps
+
+.build-conf:  ${BUILD_SUBPROJECTS}
+	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
+
+MP_PROCESSOR_OPTION=32MZ2048ECM144
+MP_LINKER_FILE_OPTION=
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: assemble
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: assembleWithPreprocess
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: compile
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+${OBJECTDIR}/_ext/1445274692/crl.o: ../../src/crl.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/crl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/crl.o.d" -o ${OBJECTDIR}/_ext/1445274692/crl.o ../../src/crl.c   
+	
+${OBJECTDIR}/_ext/1445274692/internal.o: ../../src/internal.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/internal.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/internal.o.d" -o ${OBJECTDIR}/_ext/1445274692/internal.o ../../src/internal.c   
+	
+${OBJECTDIR}/_ext/1445274692/io.o: ../../src/io.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/io.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/io.o.d" -o ${OBJECTDIR}/_ext/1445274692/io.o ../../src/io.c   
+	
+${OBJECTDIR}/_ext/1445274692/keys.o: ../../src/keys.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/keys.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/keys.o.d" -o ${OBJECTDIR}/_ext/1445274692/keys.o ../../src/keys.c   
+	
+${OBJECTDIR}/_ext/1445274692/ocsp.o: ../../src/ocsp.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" -o ${OBJECTDIR}/_ext/1445274692/ocsp.o ../../src/ocsp.c   
+	
+${OBJECTDIR}/_ext/1445274692/sniffer.o: ../../src/sniffer.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" -o ${OBJECTDIR}/_ext/1445274692/sniffer.o ../../src/sniffer.c   
+	
+${OBJECTDIR}/_ext/1445274692/ssl.o: ../../src/ssl.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ssl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ssl.o.d" -o ${OBJECTDIR}/_ext/1445274692/ssl.o ../../src/ssl.c   
+	
+${OBJECTDIR}/_ext/1445274692/tls.o: ../../src/tls.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/tls.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/tls.o.d" -o ${OBJECTDIR}/_ext/1445274692/tls.o ../../src/tls.c   
+	
+${OBJECTDIR}/_ext/1439655260/aes.o: ../../ctaocrypt/src/aes.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/aes.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/aes.o.d" -o ${OBJECTDIR}/_ext/1439655260/aes.o ../../ctaocrypt/src/aes.c   
+	
+${OBJECTDIR}/_ext/1439655260/arc4.o: ../../ctaocrypt/src/arc4.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/arc4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/arc4.o.d" -o ${OBJECTDIR}/_ext/1439655260/arc4.o ../../ctaocrypt/src/arc4.c   
+	
+${OBJECTDIR}/_ext/1439655260/asm.o: ../../ctaocrypt/src/asm.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asm.o.d" -o ${OBJECTDIR}/_ext/1439655260/asm.o ../../ctaocrypt/src/asm.c   
+	
+${OBJECTDIR}/_ext/1439655260/asn.o: ../../ctaocrypt/src/asn.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asn.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asn.o.d" -o ${OBJECTDIR}/_ext/1439655260/asn.o ../../ctaocrypt/src/asn.c   
+	
+${OBJECTDIR}/_ext/1439655260/coding.o: ../../ctaocrypt/src/coding.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/coding.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/coding.o.d" -o ${OBJECTDIR}/_ext/1439655260/coding.o ../../ctaocrypt/src/coding.c   
+	
+${OBJECTDIR}/_ext/1439655260/des3.o: ../../ctaocrypt/src/des3.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/des3.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/des3.o.d" -o ${OBJECTDIR}/_ext/1439655260/des3.o ../../ctaocrypt/src/des3.c   
+	
+${OBJECTDIR}/_ext/1439655260/dh.o: ../../ctaocrypt/src/dh.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dh.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dh.o.d" -o ${OBJECTDIR}/_ext/1439655260/dh.o ../../ctaocrypt/src/dh.c   
+	
+${OBJECTDIR}/_ext/1439655260/dsa.o: ../../ctaocrypt/src/dsa.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/dsa.o ../../ctaocrypt/src/dsa.c   
+	
+${OBJECTDIR}/_ext/1439655260/ecc.o: ../../ctaocrypt/src/ecc.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc.o ../../ctaocrypt/src/ecc.c   
+	
+${OBJECTDIR}/_ext/1439655260/ecc_fp.o: ../../ctaocrypt/src/ecc_fp.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ../../ctaocrypt/src/ecc_fp.c   
+	
+${OBJECTDIR}/_ext/1439655260/error.o: ../../ctaocrypt/src/error.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/error.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/error.o.d" -o ${OBJECTDIR}/_ext/1439655260/error.o ../../ctaocrypt/src/error.c   
+	
+${OBJECTDIR}/_ext/1439655260/hc128.o: ../../ctaocrypt/src/hc128.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hc128.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hc128.o.d" -o ${OBJECTDIR}/_ext/1439655260/hc128.o ../../ctaocrypt/src/hc128.c   
+	
+${OBJECTDIR}/_ext/1439655260/hmac.o: ../../ctaocrypt/src/hmac.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hmac.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hmac.o.d" -o ${OBJECTDIR}/_ext/1439655260/hmac.o ../../ctaocrypt/src/hmac.c   
+	
+${OBJECTDIR}/_ext/1439655260/integer.o: ../../ctaocrypt/src/integer.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/integer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/integer.o.d" -o ${OBJECTDIR}/_ext/1439655260/integer.o ../../ctaocrypt/src/integer.c   
+	
+${OBJECTDIR}/_ext/1439655260/logging.o: ../../ctaocrypt/src/logging.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/logging.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/logging.o.d" -o ${OBJECTDIR}/_ext/1439655260/logging.o ../../ctaocrypt/src/logging.c   
+	
+${OBJECTDIR}/_ext/1439655260/md2.o: ../../ctaocrypt/src/md2.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md2.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md2.o.d" -o ${OBJECTDIR}/_ext/1439655260/md2.o ../../ctaocrypt/src/md2.c   
+	
+${OBJECTDIR}/_ext/1439655260/md4.o: ../../ctaocrypt/src/md4.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md4.o.d" -o ${OBJECTDIR}/_ext/1439655260/md4.o ../../ctaocrypt/src/md4.c   
+	
+${OBJECTDIR}/_ext/1439655260/md5.o: ../../ctaocrypt/src/md5.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md5.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md5.o.d" -o ${OBJECTDIR}/_ext/1439655260/md5.o ../../ctaocrypt/src/md5.c   
+	
+${OBJECTDIR}/_ext/1439655260/memory.o: ../../ctaocrypt/src/memory.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/memory.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/memory.o.d" -o ${OBJECTDIR}/_ext/1439655260/memory.o ../../ctaocrypt/src/memory.c   
+	
+${OBJECTDIR}/_ext/1439655260/misc.o: ../../ctaocrypt/src/misc.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/misc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/misc.o.d" -o ${OBJECTDIR}/_ext/1439655260/misc.o ../../ctaocrypt/src/misc.c   
+	
+${OBJECTDIR}/_ext/1439655260/pwdbased.o: ../../ctaocrypt/src/pwdbased.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" -o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ../../ctaocrypt/src/pwdbased.c   
+	
+${OBJECTDIR}/_ext/1439655260/rabbit.o: ../../ctaocrypt/src/rabbit.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" -o ${OBJECTDIR}/_ext/1439655260/rabbit.o ../../ctaocrypt/src/rabbit.c   
+	
+${OBJECTDIR}/_ext/1439655260/random.o: ../../ctaocrypt/src/random.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/random.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/random.o.d" -o ${OBJECTDIR}/_ext/1439655260/random.o ../../ctaocrypt/src/random.c   
+	
+${OBJECTDIR}/_ext/1439655260/ripemd.o: ../../ctaocrypt/src/ripemd.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" -o ${OBJECTDIR}/_ext/1439655260/ripemd.o ../../ctaocrypt/src/ripemd.c   
+	
+${OBJECTDIR}/_ext/1439655260/rsa.o: ../../ctaocrypt/src/rsa.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/rsa.o ../../ctaocrypt/src/rsa.c   
+	
+${OBJECTDIR}/_ext/1439655260/sha.o: ../../ctaocrypt/src/sha.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha.o ../../ctaocrypt/src/sha.c   
+	
+${OBJECTDIR}/_ext/1439655260/sha256.o: ../../ctaocrypt/src/sha256.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha256.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha256.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha256.o ../../ctaocrypt/src/sha256.c   
+	
+${OBJECTDIR}/_ext/1439655260/sha512.o: ../../ctaocrypt/src/sha512.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha512.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha512.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha512.o ../../ctaocrypt/src/sha512.c   
+	
+${OBJECTDIR}/_ext/1439655260/tfm.o: ../../ctaocrypt/src/tfm.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/tfm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/tfm.o.d" -o ${OBJECTDIR}/_ext/1439655260/tfm.o ../../ctaocrypt/src/tfm.c   
+	
+${OBJECTDIR}/_ext/1439655260/port.o: ../../ctaocrypt/src/port.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/port.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/port.o.d" -o ${OBJECTDIR}/_ext/1439655260/port.o ../../ctaocrypt/src/port.c   
+	
+else
+${OBJECTDIR}/_ext/1445274692/crl.o: ../../src/crl.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/crl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/crl.o.d" -o ${OBJECTDIR}/_ext/1445274692/crl.o ../../src/crl.c   
+	
+${OBJECTDIR}/_ext/1445274692/internal.o: ../../src/internal.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/internal.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/internal.o.d" -o ${OBJECTDIR}/_ext/1445274692/internal.o ../../src/internal.c   
+	
+${OBJECTDIR}/_ext/1445274692/io.o: ../../src/io.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/io.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/io.o.d" -o ${OBJECTDIR}/_ext/1445274692/io.o ../../src/io.c   
+	
+${OBJECTDIR}/_ext/1445274692/keys.o: ../../src/keys.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/keys.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/keys.o.d" -o ${OBJECTDIR}/_ext/1445274692/keys.o ../../src/keys.c   
+	
+${OBJECTDIR}/_ext/1445274692/ocsp.o: ../../src/ocsp.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" -o ${OBJECTDIR}/_ext/1445274692/ocsp.o ../../src/ocsp.c   
+	
+${OBJECTDIR}/_ext/1445274692/sniffer.o: ../../src/sniffer.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" -o ${OBJECTDIR}/_ext/1445274692/sniffer.o ../../src/sniffer.c   
+	
+${OBJECTDIR}/_ext/1445274692/ssl.o: ../../src/ssl.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ssl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ssl.o.d" -o ${OBJECTDIR}/_ext/1445274692/ssl.o ../../src/ssl.c   
+	
+${OBJECTDIR}/_ext/1445274692/tls.o: ../../src/tls.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/tls.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/tls.o.d" -o ${OBJECTDIR}/_ext/1445274692/tls.o ../../src/tls.c   
+	
+${OBJECTDIR}/_ext/1439655260/aes.o: ../../ctaocrypt/src/aes.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/aes.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/aes.o.d" -o ${OBJECTDIR}/_ext/1439655260/aes.o ../../ctaocrypt/src/aes.c   
+	
+${OBJECTDIR}/_ext/1439655260/arc4.o: ../../ctaocrypt/src/arc4.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/arc4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/arc4.o.d" -o ${OBJECTDIR}/_ext/1439655260/arc4.o ../../ctaocrypt/src/arc4.c   
+	
+${OBJECTDIR}/_ext/1439655260/asm.o: ../../ctaocrypt/src/asm.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asm.o.d" -o ${OBJECTDIR}/_ext/1439655260/asm.o ../../ctaocrypt/src/asm.c   
+	
+${OBJECTDIR}/_ext/1439655260/asn.o: ../../ctaocrypt/src/asn.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asn.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asn.o.d" -o ${OBJECTDIR}/_ext/1439655260/asn.o ../../ctaocrypt/src/asn.c   
+	
+${OBJECTDIR}/_ext/1439655260/coding.o: ../../ctaocrypt/src/coding.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/coding.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/coding.o.d" -o ${OBJECTDIR}/_ext/1439655260/coding.o ../../ctaocrypt/src/coding.c   
+	
+${OBJECTDIR}/_ext/1439655260/des3.o: ../../ctaocrypt/src/des3.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/des3.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/des3.o.d" -o ${OBJECTDIR}/_ext/1439655260/des3.o ../../ctaocrypt/src/des3.c   
+	
+${OBJECTDIR}/_ext/1439655260/dh.o: ../../ctaocrypt/src/dh.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dh.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dh.o.d" -o ${OBJECTDIR}/_ext/1439655260/dh.o ../../ctaocrypt/src/dh.c   
+	
+${OBJECTDIR}/_ext/1439655260/dsa.o: ../../ctaocrypt/src/dsa.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/dsa.o ../../ctaocrypt/src/dsa.c   
+	
+${OBJECTDIR}/_ext/1439655260/ecc.o: ../../ctaocrypt/src/ecc.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc.o ../../ctaocrypt/src/ecc.c   
+	
+${OBJECTDIR}/_ext/1439655260/ecc_fp.o: ../../ctaocrypt/src/ecc_fp.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ../../ctaocrypt/src/ecc_fp.c   
+	
+${OBJECTDIR}/_ext/1439655260/error.o: ../../ctaocrypt/src/error.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/error.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/error.o.d" -o ${OBJECTDIR}/_ext/1439655260/error.o ../../ctaocrypt/src/error.c   
+	
+${OBJECTDIR}/_ext/1439655260/hc128.o: ../../ctaocrypt/src/hc128.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hc128.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hc128.o.d" -o ${OBJECTDIR}/_ext/1439655260/hc128.o ../../ctaocrypt/src/hc128.c   
+	
+${OBJECTDIR}/_ext/1439655260/hmac.o: ../../ctaocrypt/src/hmac.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hmac.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hmac.o.d" -o ${OBJECTDIR}/_ext/1439655260/hmac.o ../../ctaocrypt/src/hmac.c   
+	
+${OBJECTDIR}/_ext/1439655260/integer.o: ../../ctaocrypt/src/integer.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/integer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/integer.o.d" -o ${OBJECTDIR}/_ext/1439655260/integer.o ../../ctaocrypt/src/integer.c   
+	
+${OBJECTDIR}/_ext/1439655260/logging.o: ../../ctaocrypt/src/logging.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/logging.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/logging.o.d" -o ${OBJECTDIR}/_ext/1439655260/logging.o ../../ctaocrypt/src/logging.c   
+	
+${OBJECTDIR}/_ext/1439655260/md2.o: ../../ctaocrypt/src/md2.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md2.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md2.o.d" -o ${OBJECTDIR}/_ext/1439655260/md2.o ../../ctaocrypt/src/md2.c   
+	
+${OBJECTDIR}/_ext/1439655260/md4.o: ../../ctaocrypt/src/md4.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md4.o.d" -o ${OBJECTDIR}/_ext/1439655260/md4.o ../../ctaocrypt/src/md4.c   
+	
+${OBJECTDIR}/_ext/1439655260/md5.o: ../../ctaocrypt/src/md5.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md5.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md5.o.d" -o ${OBJECTDIR}/_ext/1439655260/md5.o ../../ctaocrypt/src/md5.c   
+	
+${OBJECTDIR}/_ext/1439655260/memory.o: ../../ctaocrypt/src/memory.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/memory.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/memory.o.d" -o ${OBJECTDIR}/_ext/1439655260/memory.o ../../ctaocrypt/src/memory.c   
+	
+${OBJECTDIR}/_ext/1439655260/misc.o: ../../ctaocrypt/src/misc.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/misc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/misc.o.d" -o ${OBJECTDIR}/_ext/1439655260/misc.o ../../ctaocrypt/src/misc.c   
+	
+${OBJECTDIR}/_ext/1439655260/pwdbased.o: ../../ctaocrypt/src/pwdbased.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" -o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ../../ctaocrypt/src/pwdbased.c   
+	
+${OBJECTDIR}/_ext/1439655260/rabbit.o: ../../ctaocrypt/src/rabbit.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" -o ${OBJECTDIR}/_ext/1439655260/rabbit.o ../../ctaocrypt/src/rabbit.c   
+	
+${OBJECTDIR}/_ext/1439655260/random.o: ../../ctaocrypt/src/random.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/random.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/random.o.d" -o ${OBJECTDIR}/_ext/1439655260/random.o ../../ctaocrypt/src/random.c   
+	
+${OBJECTDIR}/_ext/1439655260/ripemd.o: ../../ctaocrypt/src/ripemd.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" -o ${OBJECTDIR}/_ext/1439655260/ripemd.o ../../ctaocrypt/src/ripemd.c   
+	
+${OBJECTDIR}/_ext/1439655260/rsa.o: ../../ctaocrypt/src/rsa.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/rsa.o ../../ctaocrypt/src/rsa.c   
+	
+${OBJECTDIR}/_ext/1439655260/sha.o: ../../ctaocrypt/src/sha.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha.o ../../ctaocrypt/src/sha.c   
+	
+${OBJECTDIR}/_ext/1439655260/sha256.o: ../../ctaocrypt/src/sha256.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha256.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha256.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha256.o ../../ctaocrypt/src/sha256.c   
+	
+${OBJECTDIR}/_ext/1439655260/sha512.o: ../../ctaocrypt/src/sha512.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha512.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha512.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha512.o ../../ctaocrypt/src/sha512.c   
+	
+${OBJECTDIR}/_ext/1439655260/tfm.o: ../../ctaocrypt/src/tfm.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/tfm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/tfm.o.d" -o ${OBJECTDIR}/_ext/1439655260/tfm.o ../../ctaocrypt/src/tfm.c   
+	
+${OBJECTDIR}/_ext/1439655260/port.o: ../../ctaocrypt/src/port.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o.d 
+	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o 
+	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/port.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/port.o.d" -o ${OBJECTDIR}/_ext/1439655260/port.o ../../ctaocrypt/src/port.c   
+	
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: compileCPP
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: archive
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk    
+	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
+	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
+else
+dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk   
+	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
+	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
+endif
+
+
+# Subprojects
+.build-subprojects:
+
+
+# Subprojects
+.clean-subprojects:
+
+# Clean Targets
+.clean-conf: ${CLEAN_SUBPROJECTS}
+	${RM} -r build/default
+	${RM} -r dist/default
+
+# Enable dependency checking
+.dep.inc: .depcheck-impl
+
+DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
+ifneq (${DEPFILES},)
+include ${DEPFILES}
+endif
diff --git a/mplabx/cyassl.X/nbproject/Makefile-genesis.properties b/mplabx/cyassl.X/nbproject/Makefile-genesis.properties
new file mode 100644
index 000000000..8fa40f592
--- /dev/null
+++ b/mplabx/cyassl.X/nbproject/Makefile-genesis.properties
@@ -0,0 +1,8 @@
+#
+#Tue Mar 04 21:12:12 JST 2014
+default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
+default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30\\bin
+com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
+default.languagetoolchain.version=1.30
+host.platform=windows
+conf.ids=default
diff --git a/mplabx/cyassl.X/nbproject/Makefile-impl.mk b/mplabx/cyassl.X/nbproject/Makefile-impl.mk
new file mode 100644
index 000000000..6f20c0abd
--- /dev/null
+++ b/mplabx/cyassl.X/nbproject/Makefile-impl.mk
@@ -0,0 +1,69 @@
+#
+# Generated Makefile - do not edit!
+#
+# Edit the Makefile in the project folder instead (../Makefile). Each target
+# has a pre- and a post- target defined where you can add customization code.
+#
+# This makefile implements macros and targets common to all configurations.
+#
+# NOCDDL
+
+
+# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
+# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
+# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
+# and .clean-reqprojects-conf unless SUB has the value 'no'
+SUB_no=NO
+SUBPROJECTS=${SUB_${SUB}}
+BUILD_SUBPROJECTS_=.build-subprojects
+BUILD_SUBPROJECTS_NO=
+BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
+CLEAN_SUBPROJECTS_=.clean-subprojects
+CLEAN_SUBPROJECTS_NO=
+CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
+
+
+# Project Name
+PROJECTNAME=cyassl.X
+
+# Active Configuration
+DEFAULTCONF=default
+CONF=${DEFAULTCONF}
+
+# All Configurations
+ALLCONFS=default 
+
+
+# build
+.build-impl: .build-pre
+	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
+
+
+# clean
+.clean-impl: .clean-pre
+	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
+
+# clobber
+.clobber-impl: .clobber-pre .depcheck-impl
+	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
+
+
+
+# all
+.all-impl: .all-pre .depcheck-impl
+	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
+
+
+
+# dependency checking support
+.depcheck-impl:
+#	@echo "# This code depends on make tool being used" >.dep.inc
+#	@if [ -n "${MAKE_VERSION}" ]; then \
+#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
+#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
+#	    echo "include \$${DEPFILES}" >>.dep.inc; \
+#	    echo "endif" >>.dep.inc; \
+#	else \
+#	    echo ".KEEP_STATE:" >>.dep.inc; \
+#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
+#	fi
diff --git a/mplabx/cyassl.X/nbproject/Makefile-local-default.mk b/mplabx/cyassl.X/nbproject/Makefile-local-default.mk
new file mode 100644
index 000000000..3350f874d
--- /dev/null
+++ b/mplabx/cyassl.X/nbproject/Makefile-local-default.mk
@@ -0,0 +1,37 @@
+#
+# Generated Makefile - do not edit!
+#
+#
+# This file contains information about the location of compilers and other tools.
+# If you commmit this file into your revision control server, you will be able to 
+# to checkout the project and build it from the command line with make. However,
+# if more than one person works on the same project, then this file might show
+# conflicts since different users are bound to have compilers in different places.
+# In that case you might choose to not commit this file and let MPLAB X recreate this file
+# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
+# least once so the file gets created and the project can be built. Finally, you can also
+# avoid using this file at all if you are only building from the command line with make.
+# You can invoke make with the values of the macros:
+# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
+#
+SHELL=cmd.exe
+PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
+# Adding MPLAB X bin directory to path.
+PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
+# Path to java used to run MPLAB X when this makefile was created
+MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
+OS_CURRENT="$(shell uname -s)"
+MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-gcc.exe"
+MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-g++.exe"
+# MP_BC is not defined
+MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-as.exe"
+MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ld.exe"
+MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ar.exe"
+DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
+MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+# MP_BC_DIR is not defined
+MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
+# MP_BC_DIR is not defined
diff --git a/mplabx/cyassl.X/nbproject/Makefile-variables.mk b/mplabx/cyassl.X/nbproject/Makefile-variables.mk
new file mode 100644
index 000000000..b480b107d
--- /dev/null
+++ b/mplabx/cyassl.X/nbproject/Makefile-variables.mk
@@ -0,0 +1,13 @@
+#
+# Generated - do not edit!
+#
+# NOCDDL
+#
+CND_BASEDIR=`pwd`
+# default configuration
+CND_ARTIFACT_DIR_default=dist/default/production
+CND_ARTIFACT_NAME_default=cyassl.X.a
+CND_ARTIFACT_PATH_default=dist/default/production/cyassl.X.a
+CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
+CND_PACKAGE_NAME_default=cyassl.X.tar
+CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/cyassl.X.tar
diff --git a/mplabx/cyassl.X/nbproject/Package-default.bash b/mplabx/cyassl.X/nbproject/Package-default.bash
new file mode 100644
index 000000000..baae5e998
--- /dev/null
+++ b/mplabx/cyassl.X/nbproject/Package-default.bash
@@ -0,0 +1,73 @@
+#!/bin/bash -x
+
+#
+# Generated - do not edit!
+#
+
+# Macros
+TOP=`pwd`
+CND_CONF=default
+CND_DISTDIR=dist
+TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
+TMPDIRNAME=tmp-packaging
+OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
+OUTPUT_BASENAME=cyassl.X.${OUTPUT_SUFFIX}
+PACKAGE_TOP_DIR=cyassl.X/
+
+# Functions
+function checkReturnCode
+{
+    rc=$?
+    if [ $rc != 0 ]
+    then
+        exit $rc
+    fi
+}
+function makeDirectory
+# $1 directory path
+# $2 permission (optional)
+{
+    mkdir -p "$1"
+    checkReturnCode
+    if [ "$2" != "" ]
+    then
+      chmod $2 "$1"
+      checkReturnCode
+    fi
+}
+function copyFileToTmpDir
+# $1 from-file path
+# $2 to-file path
+# $3 permission
+{
+    cp "$1" "$2"
+    checkReturnCode
+    if [ "$3" != "" ]
+    then
+        chmod $3 "$2"
+        checkReturnCode
+    fi
+}
+
+# Setup
+cd "${TOP}"
+mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
+rm -rf ${TMPDIR}
+mkdir -p ${TMPDIR}
+
+# Copy files and create directories and links
+cd "${TOP}"
+makeDirectory ${TMPDIR}/cyassl.X/lib
+copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}lib/${OUTPUT_BASENAME}" 0644
+
+
+# Generate tar file
+cd "${TOP}"
+rm -f ${CND_DISTDIR}/${CND_CONF}/package/cyassl.X.tar
+cd ${TMPDIR}
+tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/cyassl.X.tar *
+checkReturnCode
+
+# Cleanup
+cd "${TOP}"
+rm -rf ${TMPDIR}
diff --git a/mplabx/cyassl.X/nbproject/configurations.xml b/mplabx/cyassl.X/nbproject/configurations.xml
index e12a2e988..7c67ebfcc 100644
--- a/mplabx/cyassl.X/nbproject/configurations.xml
+++ b/mplabx/cyassl.X/nbproject/configurations.xml
@@ -67,10 +67,10 @@
     
       
         localhost
-        PIC32MX795F512L
+        PIC32MZ2048ECM144
         
         
-        SKDEPIC32PlatformTool
+        PKOBSKDEPlatformTool
         XC32
         1.30
         3
@@ -181,9 +181,28 @@
         
         
       
-      
-        
-      
+      
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+        
+      
     
   
 
diff --git a/mplabx/cyassl.X/nbproject/include.am b/mplabx/cyassl.X/nbproject/include.am
index 4db3841b2..7d0b98793 100644
--- a/mplabx/cyassl.X/nbproject/include.am
+++ b/mplabx/cyassl.X/nbproject/include.am
@@ -3,7 +3,6 @@
 #
 
 EXTRA_DIST += \
-         mplabx/README \
          mplabx/cyassl.X/Makefile
 
 EXTRA_DIST += \
diff --git a/mplabx/cyassl.X/nbproject/private/private.xml b/mplabx/cyassl.X/nbproject/private/private.xml
new file mode 100644
index 000000000..e39667075
--- /dev/null
+++ b/mplabx/cyassl.X/nbproject/private/private.xml
@@ -0,0 +1,3 @@
+
+    
+
diff --git a/mplabx/cyassl.X/print_mem.c b/mplabx/cyassl.X/print_mem.c
new file mode 100644
index 000000000..b90e8c55c
--- /dev/null
+++ b/mplabx/cyassl.X/print_mem.c
@@ -0,0 +1,7 @@
+void print_mem(const unsigned char *p, int size) {
+    for(; size>0; size--, p++) {
+        if(size%4 == 0)printf(" ") ;
+            printf("%02x", (int)*p) ;
+    }
+    puts("") ;
+    }
diff --git a/mplabx/include.am b/mplabx/include.am
new file mode 100644
index 000000000..b63cdecaa
--- /dev/null
+++ b/mplabx/include.am
@@ -0,0 +1,10 @@
+# vim:ft=automake
+# All paths should be given relative to the root
+#
+
+EXTRA_DIST += \
+         mplabx/PIC32MZ-serial.h \
+		 mplabx/README \
+		 mplabx/benchmark_main.c \
+		 mplabx/test_main.c
+
diff --git a/IDE/MDK5-ARM/Projects/EchoClient/config-EchoClient.h b/mplabx/ssl-dummy.c
similarity index 54%
rename from IDE/MDK5-ARM/Projects/EchoClient/config-EchoClient.h
rename to mplabx/ssl-dummy.c
index b5520ecbe..88110ce98 100644
--- a/IDE/MDK5-ARM/Projects/EchoClient/config-EchoClient.h
+++ b/mplabx/ssl-dummy.c
@@ -1,4 +1,4 @@
-/* config-RTX-TCP-FS.h
+/* ssl-dummy.c
  *
  * Copyright (C) 2006-2013 wolfSSL Inc.
  *
@@ -19,32 +19,34 @@
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
 
-/**** CyaSSL for KEIL-RL Configuration ****/
+#include 
+#include 
 
-#define __CORTEX_M3__
-#define CYASSL_MDK_ARM
-#define NO_WRITEV
-#define NO_CYASSL_DIR
-#define NO_MAIN_DRIVER
+Signer* GetCA(void* vp, byte* hash) 
+{ 
+    return NULL  ;
+}
 
+int CyaSSL_dtls(CYASSL* ssl)
+{
+    return NULL ;
+}
 
-#define CYASSL_DER_LOAD
-#define HAVE_NULL_CIPHER
+int CyaSSL_get_using_nonblock(CYASSL* ssl)
+{
+    return NULL ;
+}
 
-#define HAVE_KEIL_RTX
-#define CYASSL_CMSIS_RTOS
-#define CYASSL_KEIL_TCP_NET
+Signer* GetCAByName(void* vp, byte* hash)
+{
+    return NULL ;
+}
 
-
-// <<< Use Configuration Wizard in Context Menu >>>
-//  Build Target: Simple Client
-//   Callee IP Address
-//    Default: "192.168.1.100"
-#define CYASSL_CALLEE_IP           "192.168.2.101"
-//   Callee Port Number
-//    Default: "11111"
-#define CYASSL_CALLEE_PORT           11111
-
-//     
-// <<< end of configuration section >>>
+int CyaSSL_PemCertToDer(const char* fileName, unsigned char* derBuf, int derSz) 
+{
+        return NULL ;
+}
diff --git a/mplabx/test_main.c b/mplabx/test_main.c
index cc9992da3..ee1fa95a5 100644
--- a/mplabx/test_main.c
+++ b/mplabx/test_main.c
@@ -19,6 +19,12 @@
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+
 #if defined(CYASSL_MICROCHIP_PIC32MZ)
     #define MICROCHIP_PIC32
     #include 
diff --git a/src/include.am b/src/include.am
index d187ab0d6..e57f0f6fc 100644
--- a/src/include.am
+++ b/src/include.am
@@ -136,3 +136,7 @@ if BUILD_LIBZ
 src_libcyassl_la_SOURCES += ctaocrypt/src/compress.c
 endif
 
+if BUILD_PKCS7
+src_libcyassl_la_SOURCES += ctaocrypt/src/pkcs7.c
+endif
+
diff --git a/src/internal.c b/src/internal.c
index 92194f5de..04c516389 100644
--- a/src/internal.c
+++ b/src/internal.c
@@ -87,6 +87,13 @@ CYASSL_CALLBACKS needs LARGE_STATIC_BUFFERS, please add LARGE_STATIC_BUFFERS
     #endif
 #endif
 
+
+#ifdef CYASSL_DTLS
+    static INLINE int DtlsCheckWindow(DtlsState* state);
+    static INLINE int DtlsUpdateWindow(DtlsState* state);
+#endif
+
+
 typedef enum {
     doProcessInit = 0,
 #ifndef NO_CYASSL_SERVER
@@ -419,9 +426,6 @@ int InitSSL_Ctx(CYASSL_CTX* ctx, CYASSL_METHOD* method)
     ctx->sendVerify = 0;
     ctx->quietShutdown = 0;
     ctx->groupMessages = 0;
-#ifdef HAVE_OCSP
-    CyaSSL_OCSP_Init(&ctx->ocsp);
-#endif
 #ifdef HAVE_CAVIUM
     ctx->devId = NO_CAVIUM_DEVICE; 
 #endif
@@ -472,9 +476,6 @@ void SSL_CtxResourceFree(CYASSL_CTX* ctx)
     XFREE(ctx->certChain.buffer, ctx->heap, DYNAMIC_TYPE_CERT);
     CyaSSL_CertManagerFree(ctx->cm);
 #endif
-#ifdef HAVE_OCSP
-    CyaSSL_OCSP_Cleanup(&ctx->ocsp);
-#endif
 #ifdef HAVE_TLS_EXTENSIONS
     TLSX_FreeAll(ctx->extensions);
 #endif
@@ -628,8 +629,10 @@ void InitSuites(Suites* suites, ProtocolVersion pv, byte haveRSA, byte havePSK,
     if (suites->setSuites)
         return;      /* trust user settings, don't override */
 
-    if (side == CYASSL_SERVER_END && haveStaticECC)
+    if (side == CYASSL_SERVER_END && haveStaticECC) {
         haveRSA = 0;   /* can't do RSA with ECDSA key */
+        (void)haveRSA; /* some builds won't read */
+    }
 
     if (side == CYASSL_SERVER_END && haveECDSAsig) {
         haveRSAsig = 0;     /* can't have RSA sig if signed by ECDSA */
@@ -643,6 +646,13 @@ void InitSuites(Suites* suites, ProtocolVersion pv, byte haveRSA, byte havePSK,
     }
 #endif
 
+#ifdef HAVE_RENEGOTIATION_INDICATION
+    if (side == CYASSL_CLIENT_END) {
+        suites->suites[idx++] = 0;
+        suites->suites[idx++] = TLS_EMPTY_RENEGOTIATION_INFO_SCSV;
+    }
+#endif
+
 #ifdef BUILD_TLS_NTRU_RSA_WITH_AES_256_CBC_SHA
     if (tls && haveNTRU && haveRSA) {
         suites->suites[idx++] = 0; 
@@ -1271,6 +1281,33 @@ void InitX509(CYASSL_X509* x509, int dynamicFlag)
     x509->altNames       = NULL;
     x509->altNamesNext   = NULL;
     x509->dynamicMemory  = (byte)dynamicFlag;
+    x509->isCa           = 0;
+#ifdef HAVE_ECC
+    x509->pkCurveOID = 0;
+#endif /* HAVE_ECC */
+#ifdef OPENSSL_EXTRA
+    x509->pathLength     = 0;
+    x509->basicConstSet  = 0;
+    x509->basicConstCrit = 0;
+    x509->basicConstPlSet = 0;
+    x509->subjAltNameSet = 0;
+    x509->subjAltNameCrit = 0;
+    x509->authKeyIdSet   = 0;
+    x509->authKeyIdCrit  = 0;
+    x509->authKeyId      = NULL;
+    x509->authKeyIdSz    = 0;
+    x509->subjKeyIdSet   = 0;
+    x509->subjKeyIdCrit  = 0;
+    x509->subjKeyId      = NULL;
+    x509->subjKeyIdSz    = 0;
+    x509->keyUsageSet    = 0;
+    x509->keyUsageCrit   = 0;
+    x509->keyUsage       = 0;
+    #ifdef CYASSL_SEP
+        x509->certPolicySet  = 0;
+        x509->certPolicyCrit = 0;
+    #endif /* CYASSL_SEP */
+#endif /* OPENSSL_EXTRA */
 }
 
 
@@ -1286,6 +1323,10 @@ void FreeX509(CYASSL_X509* x509)
         XFREE(x509->pubKey.buffer, NULL, DYNAMIC_TYPE_PUBLIC_KEY);
     XFREE(x509->derCert.buffer, NULL, DYNAMIC_TYPE_SUBJECT_CN);
     XFREE(x509->sig.buffer, NULL, 0);
+    #ifdef OPENSSL_EXTRA
+        XFREE(x509->authKeyId, NULL, 0);
+        XFREE(x509->subjKeyId, NULL, 0);
+    #endif /* OPENSSL_EXTRA */
     if (x509->altNames)
         FreeAltNames(x509->altNames, NULL);
     if (x509->dynamicMemory)
@@ -1359,6 +1400,7 @@ int InitSSL(CYASSL* ssl, CYASSL_CTX* ctx)
 
 #ifdef HAVE_ECC
     ssl->eccTempKeySz = ctx->eccTempKeySz;
+    ssl->pkCurveOID = ctx->pkCurveOID;
     ssl->peerEccKeyPresent = 0;
     ssl->peerEccDsaKeyPresent = 0;
     ssl->eccDsaKeyPresent = 0;
@@ -1390,6 +1432,9 @@ int InitSSL(CYASSL* ssl, CYASSL_CTX* ctx)
 #ifdef CYASSL_DTLS
     ssl->IOCB_CookieCtx = NULL;      /* we don't use for default cb */
     ssl->dtls_expected_rx = MAX_MTU;
+    ssl->keys.dtls_state.window = 0;
+    ssl->keys.dtls_state.nextEpoch = 0;
+    ssl->keys.dtls_state.nextSeq = 0;
 #endif
 
 #ifndef NO_OLD_TLS
@@ -1447,13 +1492,13 @@ int InitSSL(CYASSL* ssl, CYASSL_CTX* ctx)
 
 #ifdef CYASSL_DTLS
     ssl->keys.dtls_sequence_number      = 0;
-    ssl->keys.dtls_peer_sequence_number = 0;
-    ssl->keys.dtls_expected_peer_sequence_number = 0;
+    ssl->keys.dtls_state.curSeq         = 0;
+    ssl->keys.dtls_state.nextSeq        = 0;
     ssl->keys.dtls_handshake_number     = 0;
     ssl->keys.dtls_expected_peer_handshake_number = 0;
     ssl->keys.dtls_epoch                = 0;
-    ssl->keys.dtls_peer_epoch           = 0;
-    ssl->keys.dtls_expected_peer_epoch  = 0;
+    ssl->keys.dtls_state.curEpoch       = 0;
+    ssl->keys.dtls_state.nextEpoch      = 0;
     ssl->dtls_timeout_init              = DTLS_TIMEOUT_INIT;
     ssl->dtls_timeout_max               = DTLS_TIMEOUT_MAX;
     ssl->dtls_timeout                   = ssl->dtls_timeout_init;
@@ -1595,6 +1640,7 @@ int InitSSL(CYASSL* ssl, CYASSL_CTX* ctx)
         CYASSL_MSG("Arrays Memory error");
         return MEMORY_E;
     }
+    XMEMSET(ssl->arrays, 0, sizeof(Arrays));
 
 #ifndef NO_PSK
     ssl->arrays->client_identity[0] = 0;
@@ -2731,9 +2777,9 @@ static int GetRecordHeader(CYASSL* ssl, const byte* input, word32* inOutIdx,
         /* type and version in same sport */
         XMEMCPY(rh, input + *inOutIdx, ENUM_LEN + VERSION_SZ);
         *inOutIdx += ENUM_LEN + VERSION_SZ;
-        ato16(input + *inOutIdx, &ssl->keys.dtls_peer_epoch);
+        ato16(input + *inOutIdx, &ssl->keys.dtls_state.curEpoch);
         *inOutIdx += 4; /* advance past epoch, skip first 2 seq bytes for now */
-        ato32(input + *inOutIdx, &ssl->keys.dtls_peer_sequence_number);
+        ato32(input + *inOutIdx, &ssl->keys.dtls_state.curSeq);
         *inOutIdx += 4;  /* advance past rest of seq */
         ato16(input + *inOutIdx, size);
         *inOutIdx += LENGTH_SZ;
@@ -2754,27 +2800,14 @@ static int GetRecordHeader(CYASSL* ssl, const byte* input, word32* inOutIdx,
             return VERSION_ERROR;              /* only use requested version */
         }
     }
-#if 0
-    /* Instead of this, check the datagram against the sliding window of
-     * received datagram goodness. */
+
 #ifdef CYASSL_DTLS
-    /* If DTLS, check the sequence number against expected. If out of
-     * order, drop the record. Allows newer records in and resets the
-     * expected to the next record. */
     if (ssl->options.dtls) {
-        if ((ssl->keys.dtls_expected_peer_epoch ==
-                                        ssl->keys.dtls_peer_epoch) &&
-                (ssl->keys.dtls_peer_sequence_number >=
-                                ssl->keys.dtls_expected_peer_sequence_number)) {
-            ssl->keys.dtls_expected_peer_sequence_number =
-                            ssl->keys.dtls_peer_sequence_number + 1;
-        }
-        else {
+        if (DtlsCheckWindow(&ssl->keys.dtls_state) != 1)
             return SEQUENCE_ERROR;
-        }
     }
 #endif
-#endif
+
     /* record layer length check */
 #ifdef HAVE_MAX_FRAGMENT
     if (*size > (ssl->max_fragment + MAX_COMP_EXTRA + MAX_MSG_EXTRA))
@@ -3136,8 +3169,7 @@ int CopyDecodedToX509(CYASSL_X509* x509, DecodedCert* dCert)
         ret = MEMORY_E;
     }
     else {
-        XMEMCPY(x509->sig.buffer,
-                             &dCert->source[dCert->sigIndex], dCert->sigLength);
+        XMEMCPY(x509->sig.buffer, dCert->signature, dCert->sigLength);
         x509->sig.length = dCert->sigLength;
         x509->sigOID = dCert->signatureOID;
     }
@@ -3157,6 +3189,51 @@ int CopyDecodedToX509(CYASSL_X509* x509, DecodedCert* dCert)
     dCert->altNames    = NULL;     /* takes ownership */
     x509->altNamesNext = x509->altNames;  /* index hint */
 
+    x509->isCa = dCert->isCA;
+#ifdef OPENSSL_EXTRA
+    x509->pathLength = dCert->pathLength;
+    x509->keyUsage = dCert->extKeyUsage;
+
+    x509->basicConstSet = dCert->extBasicConstSet;
+    x509->basicConstCrit = dCert->extBasicConstCrit;
+    x509->basicConstPlSet = dCert->extBasicConstPlSet;
+    x509->subjAltNameSet = dCert->extSubjAltNameSet;
+    x509->subjAltNameCrit = dCert->extSubjAltNameCrit;
+    x509->authKeyIdSet = dCert->extAuthKeyIdSet;
+    x509->authKeyIdCrit = dCert->extAuthKeyIdCrit;
+    if (dCert->extAuthKeyIdSrc != NULL && dCert->extAuthKeyIdSz != 0) {
+        x509->authKeyId = (byte*)XMALLOC(dCert->extAuthKeyIdSz, NULL, 0);
+        if (x509->authKeyId != NULL) {
+            XMEMCPY(x509->authKeyId,
+                                 dCert->extAuthKeyIdSrc, dCert->extAuthKeyIdSz);
+            x509->authKeyIdSz = dCert->extAuthKeyIdSz;
+        }
+        else
+            ret = MEMORY_E;
+    }
+    x509->subjKeyIdSet = dCert->extSubjKeyIdSet;
+    x509->subjKeyIdCrit = dCert->extSubjKeyIdCrit;
+    if (dCert->extSubjKeyIdSrc != NULL && dCert->extSubjKeyIdSz != 0) {
+        x509->subjKeyId = (byte*)XMALLOC(dCert->extSubjKeyIdSz, NULL, 0);
+        if (x509->subjKeyId != NULL) {
+            XMEMCPY(x509->subjKeyId,
+                                 dCert->extSubjKeyIdSrc, dCert->extSubjKeyIdSz);
+            x509->subjKeyIdSz = dCert->extSubjKeyIdSz;
+        }
+        else
+            ret = MEMORY_E;
+    }
+    x509->keyUsageSet = dCert->extKeyUsageSet;
+    x509->keyUsageCrit = dCert->extKeyUsageCrit;
+    #ifdef CYASSL_SEP
+        x509->certPolicySet = dCert->extCertPolicySet;
+        x509->certPolicyCrit = dCert->extCertPolicyCrit;
+    #endif /* CYASSL_SEP */
+#endif /* OPENSSL_EXTRA */
+#ifdef HAVE_ECC
+    x509->pkCurveOID = dCert->pkCurveOID;
+#endif /* HAVE_ECC */
+
     return ret;
 }
 
@@ -3318,8 +3395,8 @@ static int DoCertificate(CYASSL* ssl, byte* input, word32* inOutIdx)
         }
 
 #ifdef HAVE_OCSP
-        if (fatal == 0) {
-            ret = CyaSSL_OCSP_Lookup_Cert(&ssl->ctx->ocsp, &dCert);
+        if (fatal == 0 && ssl->ctx->cm->ocspEnabled) {
+            ret = CheckCertOCSP(ssl->ctx->cm->ocsp, &dCert);
             if (ret != 0) {
                 CYASSL_MSG("\tOCSP Lookup not ok");
                 fatal = 0;
@@ -3332,7 +3409,7 @@ static int DoCertificate(CYASSL* ssl, byte* input, word32* inOutIdx)
             int doCrlLookup = 1;
 
             #ifdef HAVE_OCSP
-            if (ssl->ctx->ocsp.enabled) {
+            if (ssl->ctx->cm->ocspEnabled) {
                 doCrlLookup = (ret == OCSP_CERT_UNKNOWN);
             }
             #endif /* HAVE_OCSP */
@@ -3793,11 +3870,72 @@ static int DoHandShakeMsg(CYASSL* ssl, byte* input, word32* inOutIdx,
 
 
 #ifdef CYASSL_DTLS
+
+static INLINE int DtlsCheckWindow(DtlsState* state)
+{
+    word32 cur;
+    word32 next;
+    DtlsSeq window;
+
+    if (state->curEpoch == state->nextEpoch) {
+        next = state->nextSeq;
+        window = state->window;
+    }
+    else if (state->curEpoch < state->nextEpoch) {
+        next = state->prevSeq;
+        window = state->prevWindow;
+    }
+    else {
+        return 0;
+    }
+
+    cur = state->curSeq;
+
+    if ((next > DTLS_SEQ_BITS) && (cur < next - DTLS_SEQ_BITS)) {
+        return 0;
+    }
+    else if ((cur < next) && (window & (1 << (next - cur - 1)))) {
+        return 0;
+    }
+
+    return 1;
+}
+
+
+static INLINE int DtlsUpdateWindow(DtlsState* state)
+{
+    word32 cur;
+    word32* next;
+    DtlsSeq* window;
+
+    if (state->curEpoch == state->nextEpoch) {
+        next = &state->nextSeq;
+        window = &state->window;
+    }
+    else {
+        next = &state->prevSeq;
+        window = &state->prevWindow;
+    }
+
+    cur = state->curSeq;
+
+    if (cur < *next) {
+        *window |= (1 << (*next - cur - 1));
+    }
+    else {
+        *window <<= (1 + cur - *next);
+        *window |= 1;
+        *next = cur + 1;
+    }
+
+    return 1;
+}
+
+
 static int DtlsMsgDrain(CYASSL* ssl)
 {
     DtlsMsg* item = ssl->dtls_msg_list;
     int ret = 0;
-    word32 idx = 0;
 
     /* While there is an item in the store list, and it is the expected
      * message, and it is complete, and there hasn't been an error in the
@@ -3806,6 +3944,7 @@ static int DtlsMsgDrain(CYASSL* ssl)
             ssl->keys.dtls_expected_peer_handshake_number == item->seq &&
             item->fragSz == item->sz &&
             ret == 0) {
+        word32 idx = 0;
         ssl->keys.dtls_expected_peer_handshake_number++;
         ret = DoHandShakeMsgType(ssl, item->msg,
                                  &idx, item->type, item->sz, item->sz);
@@ -4192,23 +4331,27 @@ static INLINE int Decrypt(CYASSL* ssl, byte* plain, const byte* input,
 /* check cipher text size for sanity */
 static int SanityCheckCipherText(CYASSL* ssl, word32 encryptSz)
 {
-    word32 minLength = 0;
+#ifdef HAVE_TRUNCATED_HMAC
+    word32 minLength = ssl->truncated_hmac ? TRUNCATED_HMAC_SZ
+                                           : ssl->specs.hash_size;
+#else
+    word32 minLength = ssl->specs.hash_size; /* covers stream */
+#endif
 
     if (ssl->specs.cipher_type == block) {
         if (encryptSz % ssl->specs.block_size) {
             CYASSL_MSG("Block ciphertext not block size");
             return SANITY_CIPHER_E;
         }
-        minLength = ssl->specs.hash_size + 1;  /* pad byte */
+
+        minLength++;  /* pad byte */
+
         if (ssl->specs.block_size > minLength)
             minLength = ssl->specs.block_size;
 
         if (ssl->options.tls1_1)
             minLength += ssl->specs.block_size;  /* explicit IV */
     }
-    else if (ssl->specs.cipher_type == stream) {
-        minLength = ssl->specs.hash_size;
-    }
     else if (ssl->specs.cipher_type == aead) {
         minLength = ssl->specs.block_size; /* explicit IV + implicit IV + CTR */
     }
@@ -4652,7 +4795,12 @@ static INLINE int VerifyMac(CYASSL* ssl, const byte* input, word32 msgSz,
     int    ret;
     word32 pad     = 0;
     word32 padByte = 0;
+#ifdef HAVE_TRUNCATED_HMAC
+    word32 digestSz = ssl->truncated_hmac ? TRUNCATED_HMAC_SZ
+                                          : ssl->specs.hash_size;
+#else
     word32 digestSz = ssl->specs.hash_size;
+#endif
     byte   verify[MAX_DIGEST_SIZE];
 
     if (ssl->specs.cipher_type == block) {
@@ -4804,8 +4952,6 @@ int ProcessReply(CYASSL* ssl)
                                        &ssl->curRL, &ssl->curSize);
 #ifdef CYASSL_DTLS
             if (ssl->options.dtls && ret == SEQUENCE_ERROR) {
-                /* This message is out of order. If we are handshaking, save
-                 *it for later. Otherwise go ahead and process it. */
                 ssl->options.processReply = doProcessInit;
                 ssl->buffers.inputBuffer.length = 0;
                 ssl->buffers.inputBuffer.idx = 0;
@@ -4841,7 +4987,14 @@ int ProcessReply(CYASSL* ssl)
         /* the record layer is here */
         case runProcessingOneMessage:
 
-            if (ssl->keys.encryptionOn && ssl->keys.decryptedCur == 0) {
+            #ifdef CYASSL_DTLS
+            if (ssl->options.dtls &&
+                ssl->keys.dtls_state.curEpoch < ssl->keys.dtls_state.nextEpoch)
+                ssl->keys.decryptedCur = 1;
+            #endif
+
+            if (ssl->keys.encryptionOn && ssl->keys.decryptedCur == 0)
+            {
                 ret = SanityCheckCipherText(ssl, ssl->curSize);
                 if (ret < 0)
                     return ret;
@@ -4891,6 +5044,12 @@ int ProcessReply(CYASSL* ssl)
                 ssl->keys.decryptedCur = 1;
             }
 
+            if (ssl->options.dtls) {
+            #ifdef CYASSL_DTLS
+                DtlsUpdateWindow(&ssl->keys.dtls_state);
+            #endif /* CYASSL_DTLS */
+            }
+
             CYASSL_MSG("received record layer msg");
 
             switch (ssl->curRL.type) {
@@ -4950,8 +5109,8 @@ int ProcessReply(CYASSL* ssl)
                     #ifdef CYASSL_DTLS
                         if (ssl->options.dtls) {
                             DtlsPoolReset(ssl);
-                            ssl->keys.dtls_expected_peer_epoch++;
-                            ssl->keys.dtls_expected_peer_sequence_number = 0;
+                            ssl->keys.dtls_state.nextEpoch++;
+                            ssl->keys.dtls_state.nextSeq = 0;
                         }
                     #endif
 
@@ -5237,7 +5396,12 @@ static void BuildCertHashes(CYASSL* ssl, Hashes* hashes)
 static int BuildMessage(CYASSL* ssl, byte* output, const byte* input, int inSz,
                         int type)
 {
+#ifdef HAVE_TRUNCATED_HMAC
+    word32 digestSz = min(ssl->specs.hash_size,
+                ssl->truncated_hmac ? TRUNCATED_HMAC_SZ : ssl->specs.hash_size);
+#else
     word32 digestSz = ssl->specs.hash_size;
+#endif
     word32 sz = RECORD_HEADER_SZ + inSz + digestSz;                
     word32 pad  = 0, i;
     word32 idx  = RECORD_HEADER_SZ;
@@ -5313,8 +5477,19 @@ static int BuildMessage(CYASSL* ssl, byte* output, const byte* input, int inSz,
 #endif
     }
     else {  
-        if (ssl->specs.cipher_type != aead)
-            ssl->hmac(ssl, output+idx, output + headerSz + ivSz, inSz, type, 0);
+        if (ssl->specs.cipher_type != aead) {
+#ifdef HAVE_TRUNCATED_HMAC
+            if (ssl->truncated_hmac && ssl->specs.hash_size > digestSz) {
+                byte hmac[MAX_DIGEST_SIZE];
+
+                ssl->hmac(ssl, hmac, output + headerSz + ivSz, inSz, type, 0);
+
+                XMEMCPY(output + idx, hmac, digestSz);
+            } else
+#endif
+                ssl->hmac(ssl, output+idx, output + headerSz + ivSz, inSz,
+                                                                       type, 0);
+        }
 
         if ( (ret = Encrypt(ssl, output + headerSz, output+headerSz,size)) != 0)
             return ret;
@@ -7947,7 +8122,7 @@ static void PickHashSigAlgo(CYASSL* ssl,
             case ecc_diffie_hellman_kea:
                 {
                     ecc_key  myKey;
-                    ecc_key* peerKey = &myKey;
+                    ecc_key* peerKey = NULL;
                     word32   size = sizeof(encSecret);
 
                     if (ssl->specs.static_ecdh) {
@@ -7962,6 +8137,9 @@ static void PickHashSigAlgo(CYASSL* ssl,
                         peerKey = ssl->peerEccKey;
                     }
 
+                    if (peerKey == NULL)
+                        return NO_PEER_KEY;
+
                     ecc_init(&myKey);
                     ret = ecc_make_key(ssl->rng, peerKey->dp->size, &myKey);
                     if (ret != 0)
@@ -9131,7 +9309,7 @@ static void PickHashSigAlgo(CYASSL* ssl,
                 return 1;
             break;
 
-#ifndef NO_3DES
+#ifndef NO_DES3
         case TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA :
             if (requirement == REQUIRES_RSA)
                 return 1;
@@ -9160,7 +9338,7 @@ static void PickHashSigAlgo(CYASSL* ssl,
 #endif
 #endif /* NO_RSA */
 
-#ifndef NO_3DES
+#ifndef NO_DES3
         case TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA :
             if (requirement == REQUIRES_ECC_DSA)
                 return 1;
@@ -9587,6 +9765,13 @@ static void PickHashSigAlgo(CYASSL* ssl,
             }
         }
 
+#ifdef HAVE_SUPPORTED_CURVES
+        if (!TLSX_ValidateEllipticCurves(ssl, first, second)) {
+            CYASSL_MSG("Don't have matching curves");
+                return 0;
+        }
+#endif
+
         /* ECCDHE is always supported if ECC on */
 
         return 1;
@@ -9716,6 +9901,7 @@ static void PickHashSigAlgo(CYASSL* ssl,
 
         if (clSuites.suiteSz > MAX_SUITE_SZ)
             return BUFFER_ERROR;
+        clSuites.hashSigAlgoSz = 0;
 
         /* session size */
         ato16(&input[idx], &sessionSz);
diff --git a/src/io.c b/src/io.c
index ca620d4ad..55f28eed3 100644
--- a/src/io.c
+++ b/src/io.c
@@ -352,7 +352,7 @@ int EmbedReceiveFrom(CYASSL *ssl, char *buf, int sz, void *ctx)
     int err;
     int sd = dtlsCtx->fd;
     int dtls_timeout = CyaSSL_dtls_get_current_timeout(ssl);
-    struct sockaddr_in6 peer;
+    struct sockaddr_storage peer;
     XSOCKLENT peerSz = sizeof(peer);
 
     CYASSL_ENTER("EmbedReceiveFrom()");
@@ -471,34 +471,21 @@ int EmbedSendTo(CYASSL* ssl, char *buf, int sz, void *ctx)
 int EmbedGenerateCookie(CYASSL* ssl, byte *buf, int sz, void *ctx)
 {
     int sd = ssl->wfd;
-    struct sockaddr_in6 peer;
+    struct sockaddr_storage peer;
     XSOCKLENT peerSz = sizeof(peer);
     Sha sha;
     byte digest[SHA_DIGEST_SIZE];
 
     (void)ctx;
 
+    XMEMSET(&peer, 0, sizeof(peer));
     if (getpeername(sd, (struct sockaddr*)&peer, &peerSz) != 0) {
         CYASSL_MSG("getpeername failed in EmbedGenerateCookie");
         return GEN_COOKIE_E;
     }
     
     InitSha(&sha);
-
-    if (peer.sin6_family == AF_INET6) {
-        ShaUpdate(&sha, (byte*)&peer.sin6_port, sizeof(peer.sin6_port));
-        ShaUpdate(&sha, (byte*)&peer.sin6_addr, sizeof(peer.sin6_addr));
-    }
-    else if (peer.sin6_family == AF_INET) {
-        struct sockaddr_in *s = (struct sockaddr_in*)&peer;
-        ShaUpdate(&sha, (byte*)&s->sin_port, sizeof(s->sin_port));
-        ShaUpdate(&sha, (byte*)&s->sin_addr, sizeof(s->sin_addr));
-    }
-    else {
-        CYASSL_MSG("peer sin_family unknown type in EmbedGenerateCookie");
-        return GEN_COOKIE_E;
-    }
-
+    ShaUpdate(&sha, (byte*)&peer, peerSz);
     ShaFinal(&sha, digest);
 
     if (sz > SHA_DIGEST_SIZE)
@@ -512,52 +499,62 @@ int EmbedGenerateCookie(CYASSL* ssl, byte *buf, int sz, void *ctx)
 
 #ifdef HAVE_OCSP
 
-#ifdef TEST_IPV6
-    typedef struct sockaddr_in6 SOCKADDR_IN_T;
-    #define AF_INET_V    AF_INET6
-#else
-    typedef struct sockaddr_in  SOCKADDR_IN_T;
-    #define AF_INET_V    AF_INET
-#endif
 
-
-static INLINE int tcp_connect(SOCKET_T* sockfd, const char* ip, word16 port)
+static int tcp_connect(SOCKET_T* sockfd, const char* ip, word16 port)
 {
-    SOCKADDR_IN_T addr;
-    const char* host = ip;
+    struct sockaddr_storage addr;
+    int sockaddr_len = sizeof(struct sockaddr_in);
+    XMEMSET(&addr, 0, sizeof(addr));
 
-    /* peer could be in human readable form */
-    if (ip != INADDR_ANY && isalpha(ip[0])) {
+    #ifdef HAVE_GETADDRINFO
+    {
+        struct addrinfo hints;
+        struct addrinfo* answer = NULL;
+        char strPort[8];
+
+        XMEMSET(&hints, 0, sizeof(hints));
+        hints.ai_family = AF_UNSPEC;
+        hints.ai_socktype = SOCK_STREAM;
+        hints.ai_protocol = IPPROTO_TCP;
+
+        XSNPRINTF(strPort, sizeof(strPort), "%d", port);
+        strPort[7] = '\0';
+
+        if (getaddrinfo(ip, strPort, &hints, &answer) < 0 || answer == NULL) {
+            CYASSL_MSG("no addr info for OCSP responder");
+            return -1;
+        }
+
+        sockaddr_len = answer->ai_addrlen;
+        XMEMCPY(&addr, answer->ai_addr, sockaddr_len);
+        freeaddrinfo(answer);
+
+    }
+    #else /* HAVE_GETADDRINFO */
+    {
         struct hostent* entry = gethostbyname(ip);
+        struct sockaddr_in *sin = (struct sockaddr_in *)&addr;
 
         if (entry) {
-            struct sockaddr_in tmp;
-            XMEMSET(&tmp, 0, sizeof(struct sockaddr_in));
-            XMEMCPY(&tmp.sin_addr.s_addr, entry->h_addr_list[0],
-                   entry->h_length);
-            host = inet_ntoa(tmp.sin_addr);
+            sin->sin_family = AF_INET;
+            sin->sin_port = htons(port);
+            XMEMCPY(&sin->sin_addr.s_addr, entry->h_addr_list[0],
+                                                               entry->h_length);
         }
         else {
-            CYASSL_MSG("no addr entry for OCSP responder");
+            CYASSL_MSG("no addr info for OCSP responder");
             return -1;
         }
     }
+    #endif /* HAVE_GETADDRINFO */
 
-    *sockfd = socket(AF_INET_V, SOCK_STREAM, 0);
+    *sockfd = socket(addr.ss_family, SOCK_STREAM, 0);
     if (*sockfd < 0) {
         CYASSL_MSG("bad socket fd, out of fds?");
         return -1;
     }
-    XMEMSET(&addr, 0, sizeof(SOCKADDR_IN_T));
 
-    addr.sin_family = AF_INET_V;
-    addr.sin_port = htons(port);
-    if (host == INADDR_ANY)
-        addr.sin_addr.s_addr = INADDR_ANY;
-    else
-        addr.sin_addr.s_addr = inet_addr(host);
-
-    if (connect(*sockfd, (const struct sockaddr*)&addr, sizeof(addr)) != 0) {
+    if (connect(*sockfd, (struct sockaddr *)&addr, sockaddr_len) != 0) {
         CYASSL_MSG("OCSP responder tcp connect failed");
         return -1;
     }
@@ -597,15 +594,26 @@ static int decode_url(const char* url, int urlSz,
             int i, cur;
     
             /* need to break the url down into scheme, address, and port */
-            /* "http://example.com:8080/" */
+            /*     "http://example.com:8080/" */
+            /*     "http://[::1]:443/"        */
             if (XSTRNCMP(url, "http://", 7) == 0) {
                 cur = 7;
             } else cur = 0;
     
             i = 0;
-            while (url[cur] != 0 && url[cur] != ':' &&
+            if (url[cur] == '[') {
+                cur++;
+                /* copy until ']' */
+                while (url[cur] != 0 && url[cur] != ']' && cur < urlSz) {
+                    outName[i++] = url[cur++];
+                }
+                cur++; /* skip ']' */
+            }
+            else {
+                while (url[cur] != 0 && url[cur] != ':' &&
                                                url[cur] != '/' && cur < urlSz) {
-                outName[i++] = url[cur++];
+                    outName[i++] = url[cur++];
+                }
             }
             outName[i] = 0;
             /* Need to pick out the path after the domain name */
@@ -670,7 +678,7 @@ static int process_http_response(int sfd, byte** respBuf,
             if (result > 0) {
                 len += result;
                 start = (char*)httpBuf;
-                start[len+1] = 0;
+                start[len] = 0;
             }
             else {
                 CYASSL_MSG("process_http_response recv http from peer failed");
@@ -929,27 +937,6 @@ CYASSL_API void* CyaSSL_GetCookieCtx(CYASSL* ssl)
 #endif /* CYASSL_DTLS */
 
 
-#ifdef HAVE_OCSP
-
-CYASSL_API void CyaSSL_SetIOOcsp(CYASSL_CTX* ctx, CallbackIOOcsp cb)
-{
-    ctx->ocsp.CBIOOcsp = cb;
-}
-
-CYASSL_API void CyaSSL_SetIOOcspRespFree(CYASSL_CTX* ctx,
-                                                     CallbackIOOcspRespFree cb)
-{
-    ctx->ocsp.CBIOOcspRespFree = cb;
-}
-
-CYASSL_API void CyaSSL_SetIOOcspCtx(CYASSL_CTX* ctx, void *octx)
-{
-    ctx->ocsp.IOCB_OcspCtx = octx;
-}
-
-#endif
-
-
 #ifdef HAVE_NETX
 
 /* The NetX receive callback
diff --git a/src/ocsp.c b/src/ocsp.c
index 6933e9748..d03f66d88 100644
--- a/src/ocsp.c
+++ b/src/ocsp.c
@@ -27,55 +27,32 @@
 
 #ifdef HAVE_OCSP
 
-#ifdef EBSNET
-    #include "rtip.h"
-    #include "socket.h"
-#endif
-
 #include 
 #include 
 #include 
-#include 
-
-#include 
-
-#ifndef EBSNET
-    #include 
-    #include 
-    #include 
-    #include 
-    #include 
-    #include 
-    #include 
-    #include 
-    #include 
-#endif
 
 
-CYASSL_API int ocsp_test(unsigned char* buf, int sz);
-#define CYASSL_OCSP_ENABLE       0x0001 /* Enable OCSP lookups */
-#define CYASSL_OCSP_URL_OVERRIDE 0x0002 /* Use the override URL instead of URL
-                                         * in certificate */
-#define CYASSL_OCSP_NO_NONCE     0x0004 /* Disables the request nonce */
-
-typedef struct sockaddr_in  SOCKADDR_IN_T;
-#define AF_INET_V    AF_INET
-#define SOCKET_T unsigned int
-   
-
-int CyaSSL_OCSP_Init(CYASSL_OCSP* ocsp)
+int InitOCSP(CYASSL_OCSP* ocsp, CYASSL_CERT_MANAGER* cm)
 {
-    if (ocsp != NULL) {
-        XMEMSET(ocsp, 0, sizeof(*ocsp));
-        ocsp->useNonce = 1;
-        #ifndef CYASSL_USER_IO
-            ocsp->CBIOOcsp = EmbedOcspLookup;
-            ocsp->CBIOOcspRespFree = EmbedOcspRespFree;
-        #endif
-        return 0;
-    }
+    CYASSL_ENTER("InitOCSP");
+    XMEMSET(ocsp, 0, sizeof(*ocsp));
+    ocsp->cm = cm;
+    if (InitMutex(&ocsp->ocspLock) != 0)
+        return BAD_MUTEX_E;
 
-    return -1;
+    return 0;
+}
+
+
+static int InitOCSP_Entry(OCSP_Entry* ocspe, DecodedCert* cert)
+{
+    CYASSL_ENTER("InitOCSP_Entry");
+
+    XMEMSET(ocspe, 0, sizeof(*ocspe));
+    XMEMCPY(ocspe->issuerHash, cert->issuerHash, SHA_DIGEST_SIZE);
+    XMEMCPY(ocspe->issuerKeyHash, cert->issuerKeyHash, SHA_DIGEST_SIZE);
+
+    return 0;
 }
 
 
@@ -93,118 +70,22 @@ static void FreeOCSP_Entry(OCSP_Entry* ocspe)
 }
 
 
-void CyaSSL_OCSP_Cleanup(CYASSL_OCSP* ocsp)
+void FreeOCSP(CYASSL_OCSP* ocsp, int dynamic)
 {
     OCSP_Entry* tmp = ocsp->ocspList;
 
-    ocsp->enabled = 0;
+    CYASSL_ENTER("FreeOCSP");
+
     while (tmp) {
         OCSP_Entry* next = tmp->next;
         FreeOCSP_Entry(tmp);
         XFREE(tmp, NULL, DYNAMIC_TYPE_OCSP_ENTRY);
         tmp = next;
     }
-}
 
-
-int CyaSSL_OCSP_set_override_url(CYASSL_OCSP* ocsp, const char* url)
-{
-    if (ocsp != NULL) {
-        int urlSz = (int)XSTRLEN(url);
-        if (urlSz < (int)sizeof(ocsp->overrideUrl)) {
-            XSTRNCPY(ocsp->overrideUrl, url, urlSz);
-            return 1;
-        }
-    }
-
-    return 0;
-}
-
-
-static int InitOCSP_Entry(OCSP_Entry* ocspe, DecodedCert* cert)
-{
-    CYASSL_ENTER("InitOCSP_Entry");
-
-    ocspe->next = NULL;
-    XMEMCPY(ocspe->issuerHash, cert->issuerHash, SHA_DIGEST_SIZE);
-    XMEMCPY(ocspe->issuerKeyHash, cert->issuerKeyHash, SHA_DIGEST_SIZE);
-    ocspe->status = NULL;
-    ocspe->totalStatus = 0;
-
-    return 0;
-}
-
-
-static OCSP_Entry* find_ocsp_entry(CYASSL_OCSP* ocsp, DecodedCert* cert)
-{
-    OCSP_Entry* entry = ocsp->ocspList;
-
-    while (entry)
-    {
-        if (XMEMCMP(entry->issuerHash, cert->issuerHash, SHA_DIGEST_SIZE) == 0
-            && XMEMCMP(entry->issuerKeyHash, cert->issuerKeyHash,
-                                                        SHA_DIGEST_SIZE) == 0)
-        {
-            CYASSL_MSG("Found OCSP responder");
-            break;
-        }
-        else
-        {
-            entry = entry->next;
-        }
-    }
-
-    if (entry == NULL)
-    {
-        CYASSL_MSG("Add a new OCSP entry");
-        entry = (OCSP_Entry*)XMALLOC(sizeof(OCSP_Entry),
-                                                NULL, DYNAMIC_TYPE_OCSP_ENTRY);
-        if (entry != NULL)
-        {
-            InitOCSP_Entry(entry, cert);
-            entry->next = ocsp->ocspList;
-            ocsp->ocspList = entry;
-        }
-    }
-
-    return entry;
-}
-
-
-static CertStatus* find_cert_status(OCSP_Entry* ocspe, DecodedCert* cert)
-{
-    CertStatus* stat = ocspe->status;
-
-    while (stat)
-    {
-        if(stat->serialSz == cert->serialSz &&
-            (XMEMCMP(stat->serial, cert->serial, cert->serialSz) == 0))
-        {
-            break;
-        }
-        else
-        {
-            stat = stat->next;
-        }
-    }
-    if (stat == NULL)
-    {
-        stat = (CertStatus*)XMALLOC(sizeof(CertStatus),
-                                            NULL, DYNAMIC_TYPE_OCSP_STATUS);
-        if (stat != NULL)
-        {
-            XMEMCPY(stat->serial, cert->serial, cert->serialSz);
-            stat->serialSz = cert->serialSz;
-            stat->status = -1;
-            stat->nextDate[0] = 0;
-            ocspe->totalStatus++;
-
-            stat->next = ocspe->status;
-            ocspe->status = stat;
-        }
-    }
-
-    return stat;
+    FreeMutex(&ocsp->ocspLock);
+    if (dynamic)
+        XFREE(ocsp, NULL, DYNAMIC_TYPE_OCSP);
 }
 
 
@@ -224,62 +105,84 @@ static int xstat2err(int stat)
 }
 
 
-int CyaSSL_OCSP_Lookup_Cert(CYASSL_OCSP* ocsp, DecodedCert* cert)
+int CheckCertOCSP(CYASSL_OCSP* ocsp, DecodedCert* cert)
 {
     byte* ocspReqBuf = NULL;
     int ocspReqSz = 2048;
     byte* ocspRespBuf = NULL;
     OcspRequest ocspRequest;
     OcspResponse ocspResponse;
-    int result = 0;
+    int result = -1;
     OCSP_Entry* ocspe;
-    CertStatus* certStatus;
+    CertStatus* certStatus = NULL;
+    CertStatus newStatus;
     const char *url;
     int urlSz;
 
-    /* If OCSP lookups are disabled, return success. */
-    if (!ocsp->enabled) {
-        CYASSL_MSG("OCSP lookup disabled, assuming CERT_GOOD");
-        return 0;
+    CYASSL_ENTER("CheckCertOCSP");
+
+    if (LockMutex(&ocsp->ocspLock) != 0) {
+        CYASSL_LEAVE("CheckCertOCSP", BAD_MUTEX_E);
+        return BAD_MUTEX_E;
+    }
+
+    ocspe = ocsp->ocspList;
+    while (ocspe) {
+        if (XMEMCMP(ocspe->issuerHash, cert->issuerHash, SHA_DIGEST_SIZE) == 0
+            && XMEMCMP(ocspe->issuerKeyHash, cert->issuerKeyHash,
+                                                        SHA_DIGEST_SIZE) == 0)
+            break;
+        else
+            ocspe = ocspe->next;
     }
 
-    ocspe = find_ocsp_entry(ocsp, cert);
     if (ocspe == NULL) {
-        CYASSL_MSG("alloc OCSP entry failed");
-        return MEMORY_ERROR;
+        ocspe = (OCSP_Entry*)XMALLOC(sizeof(OCSP_Entry),
+                                                NULL, DYNAMIC_TYPE_OCSP_ENTRY);
+        if (ocspe != NULL) {
+            InitOCSP_Entry(ocspe, cert);
+            ocspe->next = ocsp->ocspList;
+            ocsp->ocspList = ocspe;
+        }
+        else {
+            UnLockMutex(&ocsp->ocspLock);
+            CYASSL_LEAVE("CheckCertOCSP", MEMORY_ERROR);
+            return MEMORY_ERROR;
+        }
+    }
+    else {
+        certStatus = ocspe->status;
+        while (certStatus) {
+            if (certStatus->serialSz == cert->serialSz &&
+                 XMEMCMP(certStatus->serial, cert->serial, cert->serialSz) == 0)
+                break;
+            else
+                certStatus = certStatus->next;
+        }
     }
 
-    certStatus = find_cert_status(ocspe, cert);
-    if (certStatus == NULL)
-    {
-        CYASSL_MSG("alloc OCSP cert status failed");
-        return MEMORY_ERROR;
-    }
-
-    if (certStatus->status != -1)
-    {
+    if (certStatus != NULL) {
         if (!ValidateDate(certStatus->thisDate,
                                         certStatus->thisDateFormat, BEFORE) ||
             (certStatus->nextDate[0] == 0) ||
             !ValidateDate(certStatus->nextDate,
-                                        certStatus->nextDateFormat, AFTER))
-        {
+                                        certStatus->nextDateFormat, AFTER)) {
             CYASSL_MSG("\tinvalid status date, looking up cert");
-            certStatus->status = -1;
         }
-        else
-        {
-            CYASSL_MSG("\tusing cached status");
+        else {
             result = xstat2err(certStatus->status);
+            UnLockMutex(&ocsp->ocspLock);
+            CYASSL_LEAVE("CheckCertOCSP", result);
             return result;
         }
     }
 
-    if (ocsp->useOverrideUrl) {
-        if (ocsp->overrideUrl[0] != '\0') {
-            url = ocsp->overrideUrl;
+    UnLockMutex(&ocsp->ocspLock);
+
+    if (ocsp->cm->ocspUseOverrideURL) {
+        url = ocsp->cm->ocspOverrideURL;
+        if (url != NULL && url[0] != '\0')
             urlSz = (int)XSTRLEN(url);
-        }
         else
             return OCSP_NEED_URL;
     }
@@ -288,56 +191,82 @@ int CyaSSL_OCSP_Lookup_Cert(CYASSL_OCSP* ocsp, DecodedCert* cert)
         urlSz = cert->extAuthInfoSz;
     }
     else {
-        CYASSL_MSG("\tcert doesn't have extAuthInfo, assuming CERT_GOOD");
+        /* cert doesn't have extAuthInfo, assuming CERT_GOOD */
         return 0;
     }
 
     ocspReqBuf = (byte*)XMALLOC(ocspReqSz, NULL, DYNAMIC_TYPE_IN_BUFFER);
     if (ocspReqBuf == NULL) {
-        CYASSL_MSG("\talloc OCSP request buffer failed");
+        CYASSL_LEAVE("CheckCertOCSP", MEMORY_ERROR);
         return MEMORY_ERROR;
     }
-    InitOcspRequest(&ocspRequest, cert, ocsp->useNonce, ocspReqBuf, ocspReqSz);
+    InitOcspRequest(&ocspRequest, cert, ocsp->cm->ocspSendNonce,
+                                                         ocspReqBuf, ocspReqSz);
     ocspReqSz = EncodeOcspRequest(&ocspRequest);
     
-    if (ocsp->CBIOOcsp) {
-        result = ocsp->CBIOOcsp(ocsp->IOCB_OcspCtx, url, urlSz,
-                                          ocspReqBuf, ocspReqSz, &ocspRespBuf);
-    }
+    if (ocsp->cm->ocspIOCb)
+        result = ocsp->cm->ocspIOCb(ocsp->cm->ocspIOCtx, url, urlSz,
+                                           ocspReqBuf, ocspReqSz, &ocspRespBuf);
 
     if (result >= 0 && ocspRespBuf) {
-        InitOcspResponse(&ocspResponse, certStatus, ocspRespBuf, result);
+        XMEMSET(&newStatus, 0, sizeof(CertStatus));
+
+        InitOcspResponse(&ocspResponse, &newStatus, ocspRespBuf, result);
         OcspResponseDecode(&ocspResponse);
     
-        if (ocspResponse.responseStatus != OCSP_SUCCESSFUL) {
-            CYASSL_MSG("OCSP Responder failure");
+        if (ocspResponse.responseStatus != OCSP_SUCCESSFUL)
             result = OCSP_LOOKUP_FAIL;
-        } else {
-            if (CompareOcspReqResp(&ocspRequest, &ocspResponse) == 0)
-            {
+        else {
+            if (CompareOcspReqResp(&ocspRequest, &ocspResponse) == 0) {
                 result = xstat2err(ocspResponse.status->status);
+
+                if (LockMutex(&ocsp->ocspLock) != 0)
+                    result = BAD_MUTEX_E;
+                else {
+                    if (certStatus != NULL)
+                        /* Replace existing certificate entry with updated */
+                        XMEMCPY(certStatus, &newStatus, sizeof(CertStatus));
+                    else {
+                        /* Save new certificate entry */
+                        certStatus = (CertStatus*)XMALLOC(sizeof(CertStatus),
+                                          NULL, DYNAMIC_TYPE_OCSP_STATUS);
+                        if (certStatus != NULL) {
+                            XMEMCPY(certStatus, &newStatus, sizeof(CertStatus));
+                            certStatus->next = ocspe->status;
+                            ocspe->status = certStatus;
+                            ocspe->totalStatus++;
+                        }
+                    }
+
+                    UnLockMutex(&ocsp->ocspLock);
+                }
             }
             else
-            {
-                CYASSL_MSG("OCSP Response incorrect for Request");
                 result = OCSP_LOOKUP_FAIL;
-            }
         }
     }
-    else {
+    else
         result = OCSP_LOOKUP_FAIL;
-    }
 
-    if (ocspReqBuf != NULL) {
+    if (ocspReqBuf != NULL)
         XFREE(ocspReqBuf, NULL, DYNAMIC_TYPE_IN_BUFFER);
-    }
-    if (ocspRespBuf != NULL && ocsp->CBIOOcspRespFree) {
-        ocsp->CBIOOcspRespFree(ocsp->IOCB_OcspCtx, ocspRespBuf);
-    }
 
+    if (ocspRespBuf != NULL && ocsp->cm->ocspRespFreeCb)
+        ocsp->cm->ocspRespFreeCb(ocsp->cm->ocspIOCtx, ocspRespBuf);
+
+    CYASSL_LEAVE("CheckCertOCSP", result);
     return result;
 }
 
 
+#else /* HAVE_OCSP */
+
+
+#ifdef _MSC_VER
+    /* 4206 warning for blank file */
+    #pragma warning(disable: 4206)
+#endif
+
+
 #endif /* HAVE_OCSP */
 
diff --git a/src/sniffer.c b/src/sniffer.c
index 7eb272f87..8e0bff995 100644
--- a/src/sniffer.c
+++ b/src/sniffer.c
@@ -417,6 +417,13 @@ void ssl_FreeSniffer(void)
 
     FreeMutex(&SessionMutex);
     FreeMutex(&ServerListMutex);
+
+    if (TraceFile) {
+        TraceOn = 0;
+        fclose(TraceFile);
+        TraceFile = NULL;
+    }
+
     CyaSSL_Cleanup();
 }
 
diff --git a/src/ssl.c b/src/ssl.c
index f17449376..c77ec56c1 100644
--- a/src/ssl.c
+++ b/src/ssl.c
@@ -568,6 +568,15 @@ word16 CyaSSL_SNI_GetRequest(CYASSL* ssl, byte type, void** data)
     return 0;
 }
 
+int CyaSSL_SNI_GetFromBuffer(const byte* clientHello, word32 helloSz, byte type,
+                                                     byte* sni, word32* inOutSz)
+{
+    if (clientHello && helloSz > 0 && sni && inOutSz && *inOutSz > 0)
+        return TLSX_SNI_GetFromBuffer(clientHello, helloSz, type, sni, inOutSz);
+
+    return BAD_FUNC_ARG;
+}
+
 #endif /* NO_CYASSL_SERVER */
 
 #endif /* HAVE_SNI */
@@ -613,6 +622,56 @@ int CyaSSL_CTX_UseTruncatedHMAC(CYASSL_CTX* ctx)
 #endif /* NO_CYASSL_CLIENT */
 #endif /* HAVE_TRUNCATED_HMAC */
 
+/* Elliptic Curves */
+#ifdef HAVE_SUPPORTED_CURVES
+#ifndef NO_CYASSL_CLIENT
+
+int CyaSSL_UseSupportedCurve(CYASSL* ssl, word16 name)
+{
+    if (ssl == NULL)
+        return BAD_FUNC_ARG;
+
+    switch (name) {
+        case CYASSL_ECC_SECP160R1:
+        case CYASSL_ECC_SECP192R1:
+        case CYASSL_ECC_SECP224R1:
+        case CYASSL_ECC_SECP256R1:
+        case CYASSL_ECC_SECP384R1:
+        case CYASSL_ECC_SECP521R1:
+            break;
+
+        default:
+            return BAD_FUNC_ARG;
+    }
+
+    return TLSX_UseSupportedCurve(&ssl->extensions, name);
+}
+
+int CyaSSL_CTX_UseSupportedCurve(CYASSL_CTX* ctx, word16 name)
+{
+    if (ctx == NULL)
+        return BAD_FUNC_ARG;
+
+    switch (name) {
+        case CYASSL_ECC_SECP160R1:
+        case CYASSL_ECC_SECP192R1:
+        case CYASSL_ECC_SECP224R1:
+        case CYASSL_ECC_SECP256R1:
+        case CYASSL_ECC_SECP384R1:
+        case CYASSL_ECC_SECP521R1:
+            break;
+
+        default:
+            return BAD_FUNC_ARG;
+    }
+
+    return TLSX_UseSupportedCurve(&ctx->extensions, name);
+}
+
+#endif /* NO_CYASSL_CLIENT */
+#endif /* HAVE_SUPPORTED_CURVES */
+
+
 #ifndef CYASSL_LEANPSK
 int CyaSSL_send(CYASSL* ssl, const void* data, int sz, int flags)
 {
@@ -901,6 +960,15 @@ int CyaSSL_GetKeySize(CYASSL* ssl)
 }
 
 
+int CyaSSL_GetIVSize(CYASSL* ssl)
+{
+    if (ssl)
+        return ssl->specs.iv_size;
+
+    return BAD_FUNC_ARG;
+}
+
+
 int CyaSSL_GetBulkCipher(CYASSL* ssl)
 {
     if (ssl)
@@ -967,8 +1035,9 @@ int CyaSSL_GetSide(CYASSL* ssl)
 
 int CyaSSL_GetHmacSize(CYASSL* ssl)
 {
+    /* AEAD ciphers don't have HMAC keys */
     if (ssl)
-        return ssl->specs.hash_size;
+        return (ssl->specs.cipher_type != aead) ? ssl->specs.hash_size : 0;
 
     return BAD_FUNC_ARG;
 }
@@ -986,16 +1055,7 @@ CYASSL_CERT_MANAGER* CyaSSL_CertManagerNew(void)
     cm = (CYASSL_CERT_MANAGER*) XMALLOC(sizeof(CYASSL_CERT_MANAGER), 0,
                                         DYNAMIC_TYPE_CERT_MANAGER);
     if (cm) {
-        int i;
-
-        for (i = 0; i < CA_TABLE_SIZE; i++)
-            cm->caTable[i]  = NULL;
-        cm->heap            = NULL;
-        cm->caCacheCallback = NULL;
-        cm->crl             = NULL;
-        cm->crlEnabled      = 0;
-        cm->crlCheckAll     = 0;
-        cm->cbMissingCRL    = NULL;
+        XMEMSET(cm, 0, sizeof(CYASSL_CERT_MANAGER));
 
         if (InitMutex(&cm->caLock) != 0) {
             CYASSL_MSG("Bad mutex init");
@@ -1017,6 +1077,10 @@ void CyaSSL_CertManagerFree(CYASSL_CERT_MANAGER* cm)
             if (cm->crl) 
                 FreeCRL(cm->crl, 1);
         #endif
+        #ifdef HAVE_OCSP
+            if (cm->ocsp)
+                FreeOCSP(cm->ocsp, 1);
+        #endif
         FreeSignerTable(cm->caTable, CA_TABLE_SIZE, NULL);
         FreeMutex(&cm->caLock);
         XFREE(cm, NULL, DYNAMIC_TYPE_CERT_MANAGER);
@@ -1045,6 +1109,124 @@ int CyaSSL_CertManagerUnloadCAs(CYASSL_CERT_MANAGER* cm)
 }
 
 
+/* Return bytes written to buff or < 0 for error */
+int CyaSSL_CertPemToDer(const unsigned char* pem, int pemSz,
+                        unsigned char* buff, int buffSz,
+                        int type)
+{
+    EncryptedInfo info;
+    int           eccKey = 0;
+    int           ret;
+    buffer        der;
+
+    CYASSL_ENTER("CyaSSL_CertPemToDer");
+
+    if (pem == NULL || buff == NULL || buffSz <= 0) {
+        CYASSL_MSG("Bad pem der args"); 
+        return BAD_FUNC_ARG;
+    }
+
+    if (type != CERT_TYPE && type != CA_TYPE && type != CERTREQ_TYPE) {
+        CYASSL_MSG("Bad cert type"); 
+        return BAD_FUNC_ARG;
+    }
+
+    info.set       = 0;
+    info.ctx      = NULL;
+    info.consumed = 0;
+    der.buffer    = NULL;
+
+    ret = PemToDer(pem, pemSz, type, &der, NULL, &info, &eccKey);
+    if (ret < 0) {
+        CYASSL_MSG("Bad Pem To Der"); 
+    }
+    else {
+        if (der.length <= (word32)buffSz) {
+            XMEMCPY(buff, der.buffer, der.length);
+            ret = der.length;
+        }
+        else {
+            CYASSL_MSG("Bad der length");
+            ret = BAD_FUNC_ARG;
+        }
+    }
+
+    XFREE(der.buffer, NULL, DYNAMIC_TYPE_KEY);
+
+    return ret;
+}
+
+
+/* our KeyPemToDer password callback, password in userData */
+static INLINE int OurPasswordCb(char* passwd, int sz, int rw, void* userdata)
+{
+    (void)rw;
+
+    if (userdata == NULL)
+        return 0;
+
+    XSTRNCPY(passwd, (char*)userdata, sz);
+    return min((word32)sz, (word32)XSTRLEN((char*)userdata));
+}
+
+
+/* Return bytes written to buff or < 0 for error */
+int CyaSSL_KeyPemToDer(const unsigned char* pem, int pemSz, unsigned char* buff,
+                       int buffSz, const char* pass)
+{
+    EncryptedInfo info;
+    int           eccKey = 0;
+    int           ret;
+    buffer        der;
+
+    (void)pass;
+
+    CYASSL_ENTER("CyaSSL_KeyPemToDer");
+
+    if (pem == NULL || buff == NULL || buffSz <= 0) {
+        CYASSL_MSG("Bad pem der args"); 
+        return BAD_FUNC_ARG;
+    }
+
+    info.set       = 0;
+    info.ctx      = NULL;
+    info.consumed = 0;
+    der.buffer    = NULL;
+
+#ifdef OPENSSL_EXTRA
+    if (pass) {
+        info.ctx = CyaSSL_CTX_new(CyaSSLv23_client_method());
+        if (info.ctx == NULL)
+            return MEMORY_E;
+        CyaSSL_CTX_set_default_passwd_cb(info.ctx, OurPasswordCb);
+        CyaSSL_CTX_set_default_passwd_cb_userdata(info.ctx, (void*)pass);
+    }
+#endif
+
+    ret = PemToDer(pem, pemSz, PRIVATEKEY_TYPE, &der, NULL, &info, &eccKey);
+    if (ret < 0) {
+        CYASSL_MSG("Bad Pem To Der"); 
+    }
+    else {
+        if (der.length <= (word32)buffSz) {
+            XMEMCPY(buff, der.buffer, der.length);
+            ret = der.length;
+        }
+        else {
+            CYASSL_MSG("Bad der length");
+            ret = BAD_FUNC_ARG;
+        }
+    }
+
+    XFREE(der.buffer, NULL, DYNAMIC_TYPE_KEY);
+
+    if (info.ctx)
+        CyaSSL_CTX_free(info.ctx);
+
+    return ret;
+}
+
+
 #endif /* !NO_CERTS */
 
 
@@ -1484,6 +1666,7 @@ int CyaSSL_Init(void)
         char* consumedEnd;
         char* bufferEnd = (char*)(buff + longSz);
         long  neededSz;
+        int   ret      = 0;
         int   pkcs8    = 0;
         int   pkcs8Enc = 0;
         int   dynamicType = 0;
@@ -1497,6 +1680,12 @@ int CyaSSL_Init(void)
             XSTRNCPY(footer, "-----END CERTIFICATE-----", sizeof(footer));
             dynamicType = (type == CA_TYPE) ? DYNAMIC_TYPE_CA :
                                               DYNAMIC_TYPE_CERT;
+        } else if (type == CERTREQ_TYPE) {
+            XSTRNCPY(header, "-----BEGIN CERTIFICATE REQUEST-----",
+                     sizeof(header));
+            XSTRNCPY(footer, "-----END CERTIFICATE REQUEST-----",
+                     sizeof(footer));
+            dynamicType = DYNAMIC_TYPE_KEY;
         } else if (type == DH_PARAM_TYPE) {
             XSTRNCPY(header, "-----BEGIN DH PARAMETERS-----", sizeof(header));
             XSTRNCPY(footer, "-----END DH PARAMETERS-----", sizeof(footer));
@@ -1635,8 +1824,15 @@ int CyaSSL_Init(void)
                           &der->length) < 0)
             return SSL_BAD_FILE;
 
-        if (pkcs8)
-            return ToTraditional(der->buffer, der->length);
+        if (pkcs8) {
+            /* convert and adjust length */
+            if ( (ret = ToTraditional(der->buffer, der->length)) < 0 ) {
+                return ret;
+            } else {
+                der->length = ret;
+                return 0;
+            }
+        }
 
 #if defined(OPENSSL_EXTRA) && !defined(NO_PWDBASED)
          if (pkcs8Enc) {
@@ -1647,8 +1843,14 @@ int CyaSSL_Init(void)
                 return SSL_BAD_FILE;  /* no callback error */
             passwordSz = info->ctx->passwd_cb(password, sizeof(password), 0,
                                               info->ctx->userdata);
-            return ToTraditionalEnc(der->buffer, der->length, password,
-                                    passwordSz);
+            /* convert and adjust length */
+            if ( (ret = ToTraditionalEnc(der->buffer, der->length, password,
+                                         passwordSz)) < 0 ) {
+                return ret;
+            } else {
+                der->length = ret;
+                return 0;
+            }
          }
 #endif
 
@@ -1677,6 +1879,7 @@ int CyaSSL_Init(void)
         der.buffer    = 0;
 
         (void)dynamicType;
+        (void)rsaKey;
 
         if (used)
             *used = sz;     /* used bytes default to sz, PEM chain may shorten*/
@@ -1927,7 +2130,8 @@ int CyaSSL_Init(void)
                 }
                 ecc_free(&key);
                 eccKey = 1;
-                ctx->haveStaticECC = 1;
+                if (ctx)
+                    ctx->haveStaticECC = 1;
                 if (ssl)
                     ssl->options.haveStaticECC = 1;
             }
@@ -1959,6 +2163,13 @@ int CyaSSL_Init(void)
                     break;
             }
 
+#ifdef HAVE_ECC
+            if (ctx)
+                ctx->pkCurveOID = cert.pkCurveOID;
+            if (ssl)
+                ssl->pkCurveOID = cert.pkCurveOID;
+#endif
+
             FreeDecodedCert(&cert);
         }
 
@@ -2399,6 +2610,62 @@ int CyaSSL_CertManagerDisableCRL(CYASSL_CERT_MANAGER* cm)
 }
 
 
+/* turn on OCSP if off and compiled in, set options */
+int CyaSSL_CertManagerEnableOCSP(CYASSL_CERT_MANAGER* cm, int options)
+{
+    int ret = SSL_SUCCESS;
+
+    (void)options;
+
+    CYASSL_ENTER("CyaSSL_CertManagerEnableOCSP");
+    if (cm == NULL)
+        return BAD_FUNC_ARG;
+
+    #ifdef HAVE_OCSP
+        if (cm->ocsp == NULL) {
+            cm->ocsp = (CYASSL_OCSP*)XMALLOC(sizeof(CYASSL_OCSP), cm->heap,
+                                                             DYNAMIC_TYPE_OCSP);
+            if (cm->ocsp == NULL)
+                return MEMORY_E;
+
+            if (InitOCSP(cm->ocsp, cm) != 0) {
+                CYASSL_MSG("Init OCSP failed");
+                FreeOCSP(cm->ocsp, 1);
+                cm->ocsp = NULL;
+                return SSL_FAILURE;
+            }
+        }
+        cm->ocspEnabled = 1;
+        if (options & CYASSL_OCSP_URL_OVERRIDE)
+            cm->ocspUseOverrideURL = 1;
+        if (options & CYASSL_OCSP_NO_NONCE)
+            cm->ocspSendNonce = 0;
+        else
+            cm->ocspSendNonce = 1;
+        #ifndef CYASSL_USER_IO
+            cm->ocspIOCb = EmbedOcspLookup;
+            cm->ocspRespFreeCb = EmbedOcspRespFree;
+        #endif /* CYASSL_USER_IO */
+    #else
+        ret = NOT_COMPILED_IN;
+    #endif
+
+    return ret;
+}
+
+
+int CyaSSL_CertManagerDisableOCSP(CYASSL_CERT_MANAGER* cm)
+{
+    CYASSL_ENTER("CyaSSL_CertManagerDisableOCSP");
+    if (cm == NULL)
+        return BAD_FUNC_ARG;
+
+    cm->ocspEnabled = 0;
+
+    return SSL_SUCCESS;
+}
+
+
 int CyaSSL_CTX_check_private_key(CYASSL_CTX* ctx)
 {
     /* TODO: check private against public for RSA match */
@@ -2561,6 +2828,171 @@ int CyaSSL_CTX_SetCRL_Cb(CYASSL_CTX* ctx, CbMissingCRL cb)
 #endif /* HAVE_CRL */
 
 
+#ifdef HAVE_OCSP
+
+
+/* check CRL if enabled, SSL_SUCCESS  */
+int CyaSSL_CertManagerCheckOCSP(CYASSL_CERT_MANAGER* cm, byte* der, int sz)
+{
+    int         ret;
+    DecodedCert cert;
+
+    CYASSL_ENTER("CyaSSL_CertManagerCheckOCSP");
+
+    if (cm == NULL)
+        return BAD_FUNC_ARG;
+
+    if (cm->ocspEnabled == 0)
+        return SSL_SUCCESS;
+
+    InitDecodedCert(&cert, der, sz, NULL);
+
+    ret = ParseCertRelative(&cert, CERT_TYPE, NO_VERIFY, cm);
+    if (ret != 0) {
+        CYASSL_MSG("ParseCert failed");
+        return ret;
+    }
+    else {
+        ret = CheckCertOCSP(cm->ocsp, &cert);
+        if (ret != 0) {
+            CYASSL_MSG("CheckCertOCSP failed");
+        }
+    }
+
+    FreeDecodedCert(&cert);
+
+    if (ret == 0)
+        return SSL_SUCCESS;  /* convert */
+
+    return ret;
+}
+
+
+int CyaSSL_CertManagerSetOCSPOverrideURL(CYASSL_CERT_MANAGER* cm,
+                                                                const char* url)
+{
+    CYASSL_ENTER("CyaSSL_CertManagerSetOCSPOverrideURL");
+    if (cm == NULL)
+        return BAD_FUNC_ARG;
+
+    XFREE(cm->ocspOverrideURL, cm->heap, 0);
+    if (url != NULL) {
+        int urlSz = (int)XSTRLEN(url) + 1;
+        cm->ocspOverrideURL = (char*)XMALLOC(urlSz, cm->heap, 0);
+        if (cm->ocspOverrideURL != NULL) {
+            XMEMCPY(cm->ocspOverrideURL, url, urlSz);
+        }
+        else
+            return MEMORY_E;
+    }
+    else
+        cm->ocspOverrideURL = NULL;
+
+    return SSL_SUCCESS;
+}
+
+
+int CyaSSL_CertManagerSetOCSP_Cb(CYASSL_CERT_MANAGER* cm,
+                        CbOCSPIO ioCb, CbOCSPRespFree respFreeCb, void* ioCbCtx)
+{
+    CYASSL_ENTER("CyaSSL_CertManagerSetOCSP_Cb");
+    if (cm == NULL)
+        return BAD_FUNC_ARG;
+
+    cm->ocspIOCb = ioCb;
+    cm->ocspRespFreeCb = respFreeCb;
+    cm->ocspIOCtx = ioCbCtx;
+
+    return SSL_SUCCESS;
+}
+
+
+int CyaSSL_EnableOCSP(CYASSL* ssl, int options)
+{
+    CYASSL_ENTER("CyaSSL_EnableOCSP");
+    if (ssl)
+        return CyaSSL_CertManagerEnableOCSP(ssl->ctx->cm, options);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+int CyaSSL_DisableOCSP(CYASSL* ssl)
+{
+    CYASSL_ENTER("CyaSSL_DisableOCSP");
+    if (ssl)
+        return CyaSSL_CertManagerDisableOCSP(ssl->ctx->cm);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+int CyaSSL_SetOCSP_OverrideURL(CYASSL* ssl, const char* url)
+{
+    CYASSL_ENTER("CyaSSL_SetOCSP_OverrideURL");
+    if (ssl)
+        return CyaSSL_CertManagerSetOCSPOverrideURL(ssl->ctx->cm, url);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+int CyaSSL_SetOCSP_Cb(CYASSL* ssl,
+                        CbOCSPIO ioCb, CbOCSPRespFree respFreeCb, void* ioCbCtx)
+{
+    CYASSL_ENTER("CyaSSL_SetOCSP_Cb");
+    if (ssl)
+        return CyaSSL_CertManagerSetOCSP_Cb(ssl->ctx->cm,
+                                                     ioCb, respFreeCb, ioCbCtx);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+int CyaSSL_CTX_EnableOCSP(CYASSL_CTX* ctx, int options)
+{
+    CYASSL_ENTER("CyaSSL_CTX_EnableOCSP");
+    if (ctx)
+        return CyaSSL_CertManagerEnableOCSP(ctx->cm, options);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+int CyaSSL_CTX_DisableOCSP(CYASSL_CTX* ctx)
+{
+    CYASSL_ENTER("CyaSSL_CTX_DisableOCSP");
+    if (ctx)
+        return CyaSSL_CertManagerDisableOCSP(ctx->cm);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+int CyaSSL_CTX_SetOCSP_OverrideURL(CYASSL_CTX* ctx, const char* url)
+{
+    CYASSL_ENTER("CyaSSL_SetOCSP_OverrideURL");
+    if (ctx)
+        return CyaSSL_CertManagerSetOCSPOverrideURL(ctx->cm, url);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+int CyaSSL_CTX_SetOCSP_Cb(CYASSL_CTX* ctx,
+                        CbOCSPIO ioCb, CbOCSPRespFree respFreeCb, void* ioCbCtx)
+{
+    CYASSL_ENTER("CyaSSL_CTX_SetOCSP_Cb");
+    if (ctx)
+        return CyaSSL_CertManagerSetOCSP_Cb(ctx->cm, ioCb, respFreeCb, ioCbCtx);
+    else
+        return BAD_FUNC_ARG;
+}
+
+
+#endif /* HAVE_OCSP */
+
+
 #ifdef CYASSL_DER_LOAD
 
 /* Add format parameter to allow DER load of CA files */
@@ -7048,28 +7480,170 @@ int CyaSSL_set_compression(CYASSL* ssl)
     }
 
 
-    /* copy name into in buffer, at most sz bytes, if buffer is null will
-       malloc buffer, call responsible for freeing                     */
-    char* CyaSSL_X509_NAME_oneline(CYASSL_X509_NAME* name, char* in, int sz)
+    int CyaSSL_X509_get_isCA(CYASSL_X509* x509)
     {
-        int copySz = min(sz, name->sz);
+        int isCA = 0;
 
-        CYASSL_ENTER("CyaSSL_X509_NAME_oneline");
-        if (!name->sz) return in;
+        CYASSL_ENTER("CyaSSL_X509_get_isCA");
 
-        if (!in) {
-            in = (char*)XMALLOC(name->sz, 0, DYNAMIC_TYPE_OPENSSL);
-            if (!in ) return in;
-            copySz = name->sz;
+        if (x509 != NULL)
+            isCA = x509->isCa;
+
+        CYASSL_LEAVE("CyaSSL_X509_get_isCA", isCA);
+
+        return isCA;
+    }
+
+
+#ifdef OPENSSL_EXTRA
+    int CyaSSL_X509_ext_isSet_by_NID(CYASSL_X509* x509, int nid)
+    {
+        int isSet = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_ext_isSet_by_NID");
+
+        if (x509 != NULL) {
+            switch (nid) {
+                case BASIC_CA_OID: isSet = x509->basicConstSet; break;
+                case ALT_NAMES_OID: isSet = x509->subjAltNameSet; break;
+                case AUTH_KEY_OID: isSet = x509->authKeyIdSet; break;
+                case SUBJ_KEY_OID: isSet = x509->subjKeyIdSet; break;
+                case KEY_USAGE_OID: isSet = x509->keyUsageSet; break;
+                #ifdef CYASSL_SEP
+                    case CERT_POLICY_OID: isSet = x509->certPolicySet; break;
+                #endif /* CYASSL_SEP */
+            }
         }
 
-        if (copySz == 0)
-            return in;
+        CYASSL_LEAVE("CyaSSL_X509_ext_isSet_by_NID", isSet);
 
-        XMEMCPY(in, name->name, copySz - 1);
-        in[copySz - 1] = 0;
+        return isSet;
+    }
 
-        return in;
+
+    int CyaSSL_X509_ext_get_critical_by_NID(CYASSL_X509* x509, int nid)
+    {
+        int crit = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_ext_get_critical_by_NID");
+
+        if (x509 != NULL) {
+            switch (nid) {
+                case BASIC_CA_OID: crit = x509->basicConstCrit; break;
+                case ALT_NAMES_OID: crit = x509->subjAltNameCrit; break;
+                case AUTH_KEY_OID: crit = x509->authKeyIdCrit; break;
+                case SUBJ_KEY_OID: crit = x509->subjKeyIdCrit; break;
+                case KEY_USAGE_OID: crit = x509->keyUsageCrit; break;
+                #ifdef CYASSL_SEP
+                    case CERT_POLICY_OID: crit = x509->certPolicyCrit; break;
+                #endif /* CYASSL_SEP */
+            }
+        }
+
+        CYASSL_LEAVE("CyaSSL_X509_ext_get_critical_by_NID", crit);
+
+        return crit;
+    }
+
+
+    int CyaSSL_X509_get_isSet_pathLength(CYASSL_X509* x509)
+    {
+        int isSet = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_get_isSet_pathLength");
+
+        if (x509 != NULL)
+            isSet = x509->basicConstPlSet;
+
+        CYASSL_LEAVE("CyaSSL_X509_get_isSet_pathLength", isSet);
+
+        return isSet;
+    }
+
+
+    word32 CyaSSL_X509_get_pathLength(CYASSL_X509* x509)
+    {
+        word32 pathLength = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_get_pathLength");
+
+        if (x509 != NULL)
+            pathLength = x509->pathLength;
+
+        CYASSL_LEAVE("CyaSSL_X509_get_pathLength", pathLength);
+
+        return pathLength;
+    }
+
+
+    unsigned int CyaSSL_X509_get_keyUsage(CYASSL_X509* x509)
+    {
+        word16 usage = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_get_keyUsage");
+
+        if (x509 != NULL)
+            usage = x509->keyUsage;
+
+        CYASSL_LEAVE("CyaSSL_X509_get_keyUsage", usage);
+
+        return usage;
+    }
+
+
+    byte* CyaSSL_X509_get_authorityKeyID(
+                                      CYASSL_X509* x509, byte* dst, int* dstLen)
+    {
+        byte *id = NULL;
+        int copySz = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_get_authorityKeyID");
+
+        if (x509 != NULL) {
+            if (x509->authKeyIdSet) {
+                copySz = min(dstLen != NULL ? *dstLen : 0,
+                                                        (int)x509->authKeyIdSz);
+                id = x509->authKeyId;
+            }
+
+            if (dst != NULL && dstLen != NULL && id != NULL && copySz > 0) {
+                XMEMCPY(dst, id, copySz);
+                id = dst;
+                *dstLen = copySz;
+            }
+        }
+
+        CYASSL_LEAVE("CyaSSL_X509_get_authorityKeyID", copySz);
+
+        return id;
+    }
+
+
+    byte* CyaSSL_X509_get_subjectKeyID(
+                                      CYASSL_X509* x509, byte* dst, int* dstLen)
+    {
+        byte *id = NULL;
+        int copySz = 0;
+
+        CYASSL_ENTER("CyaSSL_X509_get_subjectKeyID");
+
+        if (x509 != NULL) {
+            if (x509->subjKeyIdSet) {
+                copySz = min(dstLen != NULL ? *dstLen : 0,
+                                                        (int)x509->subjKeyIdSz);
+                id = x509->subjKeyId;
+            }
+
+            if (dst != NULL && dstLen != NULL && id != NULL && copySz > 0) {
+                XMEMCPY(dst, id, copySz);
+                id = dst;
+                *dstLen = copySz;
+            }
+        }
+
+        CYASSL_LEAVE("CyaSSL_X509_get_subjectKeyID", copySz);
+
+        return id;
     }
 
 
@@ -7141,6 +7715,32 @@ int CyaSSL_set_compression(CYASSL* ssl)
         CYASSL_LEAVE("CyaSSL_X509_NAME_get_text_by_NID", textSz);
         return textSz;
     }
+#endif
+
+
+    /* copy name into in buffer, at most sz bytes, if buffer is null will
+       malloc buffer, call responsible for freeing                     */
+    char* CyaSSL_X509_NAME_oneline(CYASSL_X509_NAME* name, char* in, int sz)
+    {
+        int copySz = min(sz, name->sz);
+
+        CYASSL_ENTER("CyaSSL_X509_NAME_oneline");
+        if (!name->sz) return in;
+
+        if (!in) {
+            in = (char*)XMALLOC(name->sz, 0, DYNAMIC_TYPE_OPENSSL);
+            if (!in ) return in;
+            copySz = name->sz;
+        }
+
+        if (copySz == 0)
+            return in;
+
+        XMEMCPY(in, name->name, copySz - 1);
+        in[copySz - 1] = 0;
+
+        return in;
+    }
 
 
     int CyaSSL_X509_get_signature_type(CYASSL_X509* x509)
@@ -7340,6 +7940,8 @@ CYASSL_X509* CyaSSL_X509_d2i(CYASSL_X509** x509, const byte* in, int len)
 }
 
 
+#ifndef NO_FILESYSTEM
+
 CYASSL_X509* CyaSSL_X509_d2i_fp(CYASSL_X509** x509, XFILE file)
 {
     CYASSL_X509* newX509 = NULL;
@@ -7463,6 +8065,7 @@ CYASSL_X509* CyaSSL_X509_load_certificate_file(const char* fname, int format)
     return x509;
 }
 
+#endif /* NO_FILESYSTEM */
 
 #endif /* KEEP_PEER_CERT || SESSION_CERTS */
 
@@ -8329,6 +8932,9 @@ CYASSL_X509* CyaSSL_X509_load_certificate_file(const char* fname, int format)
                 XMEMCPY(key->pkey.ptr,
                                       x509->pubKey.buffer, x509->pubKey.length);
                 key->pkey_sz = x509->pubKey.length;
+                #ifdef HAVE_ECC
+                    key->pkey_curve = (int)x509->pkCurveOID;
+                #endif /* HAVE_ECC */
             }
         }
         return key;
@@ -10430,49 +11036,6 @@ static int initGlobalRNG = 0;
 
 
 
-/* Return bytes written to buff or < 0 for error */
-int CyaSSL_KeyPemToDer(const unsigned char* pem, int pemSz, unsigned char* buff,
-                       int buffSz, const char* pass)
-{
-    EncryptedInfo info;
-    int           eccKey = 0;
-    int           ret;
-    buffer        der;
-
-    (void)pass;
-
-    CYASSL_ENTER("CyaSSL_KeyPemToDer");
-
-    if (pem == NULL || buff == NULL || buffSz <= 0) {
-        CYASSL_MSG("Bad pem der args"); 
-        return BAD_FUNC_ARG;
-    }
-
-    info.set       = 0;
-    info.ctx      = NULL;
-    info.consumed = 0;
-    der.buffer    = NULL;
-
-    ret = PemToDer(pem, pemSz, PRIVATEKEY_TYPE, &der, NULL, &info, &eccKey);
-    if (ret < 0) {
-        CYASSL_MSG("Bad Pem To Der"); 
-    }
-    else {
-        if (der.length <= (word32)buffSz) {
-            XMEMCPY(buff, der.buffer, der.length);
-            ret = der.length;
-        }
-        else {
-            CYASSL_MSG("Bad der length");
-            ret = BAD_FUNC_ARG;
-        }
-    }
-
-    XFREE(der.buffer, NULL, DYNAMIC_TYPE_KEY);
-
-    return ret;
-}
-
 
 /* Load RSA from Der, SSL_SUCCESS on success < 0 on error */
 int CyaSSL_RSA_LoadDer(CYASSL_RSA* rsa, const unsigned char* der,  int derSz)
@@ -10685,38 +11248,6 @@ const byte* CyaSSL_get_sessionID(const CYASSL_SESSION* session)
 #endif /* SESSION_CERTS */
 
 
-int CyaSSL_CTX_OCSP_set_options(CYASSL_CTX* ctx, int options)
-{
-    CYASSL_ENTER("CyaSSL_CTX_OCSP_set_options");
-#ifdef HAVE_OCSP
-    if (ctx != NULL) {
-        ctx->ocsp.enabled = (options & CYASSL_OCSP_ENABLE) != 0;
-        ctx->ocsp.useOverrideUrl = (options & CYASSL_OCSP_URL_OVERRIDE) != 0;
-        ctx->ocsp.useNonce = (options & CYASSL_OCSP_NO_NONCE) == 0;
-        return SSL_SUCCESS;
-    }
-    return SSL_FAILURE;
-#else
-    (void)ctx;
-    (void)options;
-    return NOT_COMPILED_IN;
-#endif
-}
-
-
-int CyaSSL_CTX_OCSP_set_override_url(CYASSL_CTX* ctx, const char* url)
-{
-    CYASSL_ENTER("CyaSSL_CTX_OCSP_set_override_url");
-#ifdef HAVE_OCSP
-    return CyaSSL_OCSP_set_override_url(&ctx->ocsp, url);
-#else
-    (void)ctx;
-    (void)url;
-    return NOT_COMPILED_IN;
-#endif
-}
-
-
 #ifndef NO_CERTS
 #ifdef  HAVE_PK_CALLBACKS
 
@@ -10866,3 +11397,9 @@ void* CyaSSL_GetRsaDecCtx(CYASSL* ssl)
 #endif /* HAVE_PK_CALLBACKS */
 #endif /* NO_CERTS */
 
+
+#ifdef CYASSL_HAVE_WOLFSCEP
+    /* Used by autoconf to see if wolfSCEP is available */
+    void CyaSSL_wolfSCEP(void) {}
+#endif
+
diff --git a/src/tls.c b/src/tls.c
index 878e2e003..6f4d4e6cb 100644
--- a/src/tls.c
+++ b/src/tls.c
@@ -376,6 +376,14 @@ static INLINE void ato16(const byte* c, word16* u16)
 {
     *u16 = (c[0] << 8) | (c[1]);
 }
+
+#ifdef HAVE_SNI
+/* convert a 24 bit integer into a 32 bit one */
+static INLINE void c24to32(const word24 u24, word32* u32)
+{
+    *u32 = (u24[0] << 16) | (u24[1] << 8) | u24[2];
+}
+#endif
 #endif
 
 /* convert 32 bit integer to opaque */
@@ -393,7 +401,7 @@ static INLINE word32 GetSEQIncrement(CYASSL* ssl, int verify)
 #ifdef CYASSL_DTLS
     if (ssl->options.dtls) {
         if (verify)
-            return ssl->keys.dtls_peer_sequence_number; /* explicit from peer */
+            return ssl->keys.dtls_state.curSeq; /* explicit from peer */
         else
             return ssl->keys.dtls_sequence_number - 1; /* already incremented */
     }
@@ -410,9 +418,9 @@ static INLINE word32 GetSEQIncrement(CYASSL* ssl, int verify)
 static INLINE word32 GetEpoch(CYASSL* ssl, int verify)
 {
     if (verify)
-        return ssl->keys.dtls_peer_epoch; 
+        return ssl->keys.dtls_state.curEpoch;
     else
-        return ssl->keys.dtls_epoch; 
+        return ssl->keys.dtls_epoch;
 }
 
 #endif /* CYASSL_DTLS */
@@ -507,6 +515,12 @@ void TLS_hmac(CYASSL* ssl, byte* digest, const byte* in, word32 sz,
 
 #ifdef HAVE_TLS_EXTENSIONS
 
+#define IS_OFF(semaphore, light) \
+    ((semaphore)[(light) / 8] ^  (byte) (0x01 << ((light) % 8)))
+
+#define TURN_ON(semaphore, light) \
+    ((semaphore)[(light) / 8] |= (byte) (0x01 << ((light) % 8)))
+
 static int TLSX_Append(TLSX** list, TLSX_Type type)
 {
     TLSX* extension;
@@ -528,7 +542,9 @@ static int TLSX_Append(TLSX** list, TLSX_Type type)
 
 #ifndef NO_CYASSL_SERVER
 
-static void TLSX_SetResponse(CYASSL* ssl, TLSX_Type type)
+void TLSX_SetResponse(CYASSL* ssl, TLSX_Type type);
+
+void TLSX_SetResponse(CYASSL* ssl, TLSX_Type type)
 {
     TLSX *ext = TLSX_Find(ssl->extensions, type);
 
@@ -760,7 +776,7 @@ static int TLSX_SNI_Parse(CYASSL* ssl, byte* input, word16 length,
                     int r = TLSX_UseSNI(&ssl->extensions,
                                                     type, input + offset, size);
 
-                    if (r) return r; /* throw error */
+                    if (r != SSL_SUCCESS) return r; /* throw error */
 
                     TLSX_SNI_SetStatus(ssl->extensions, type,
                       matched ? CYASSL_SNI_REAL_MATCH : CYASSL_SNI_FAKE_MATCH);
@@ -826,7 +842,7 @@ int TLSX_UseSNI(TLSX** extensions, byte type, const void* data, word16 size)
         }
     } while ((sni = sni->next));
 
-    return 0;
+    return SSL_SUCCESS;
 }
 
 #ifndef NO_CYASSL_SERVER
@@ -854,6 +870,135 @@ void TLSX_SNI_SetOptions(TLSX* extensions, byte type, byte options)
     if (sni)
         sni->options = options;
 }
+
+int TLSX_SNI_GetFromBuffer(const byte* clientHello, word32 helloSz,
+                           byte type, byte* sni, word32* inOutSz)
+{
+    word32 offset = 0;
+    word32 len32  = 0;
+    word16 len16  = 0;
+
+    if (helloSz < RECORD_HEADER_SZ + HANDSHAKE_HEADER_SZ + CLIENT_HELLO_FIRST)
+        return INCOMPLETE_DATA;
+
+    /* TLS record header */
+    if ((enum ContentType) clientHello[offset++] != handshake)
+        return BUFFER_ERROR;
+
+    if (clientHello[offset++] != SSLv3_MAJOR)
+        return BUFFER_ERROR;
+
+    if (clientHello[offset++] < TLSv1_MINOR)
+        return BUFFER_ERROR;
+
+    ato16(clientHello + offset, &len16);
+    offset += OPAQUE16_LEN;
+
+    if (offset + len16 > helloSz)
+        return INCOMPLETE_DATA;
+
+    /* Handshake header */
+    if ((enum HandShakeType) clientHello[offset] != client_hello)
+        return BUFFER_ERROR;
+
+    c24to32(clientHello + offset + 1, &len32);
+    offset += HANDSHAKE_HEADER_SZ;
+
+    if (offset + len32 > helloSz)
+        return INCOMPLETE_DATA;
+
+    /* client hello */
+    offset += VERSION_SZ + RAN_LEN; /* version, random */
+
+    if (helloSz < offset + clientHello[offset])
+        return INCOMPLETE_DATA;
+
+    offset += ENUM_LEN + clientHello[offset]; /* skip session id */
+
+    /* cypher suites */
+    if (helloSz < offset + OPAQUE16_LEN)
+        return INCOMPLETE_DATA;
+
+    ato16(clientHello + offset, &len16);
+    offset += OPAQUE16_LEN;
+
+    if (helloSz < offset + len16)
+        return INCOMPLETE_DATA;
+
+    offset += len16; /* skip cypher suites */
+
+    /* compression methods */
+    if (helloSz < offset + 1)
+        return INCOMPLETE_DATA;
+
+    if (helloSz < offset + clientHello[offset])
+        return INCOMPLETE_DATA;
+
+    offset += ENUM_LEN + clientHello[offset]; /* skip compression methods */
+
+    /* extensions */
+    if (helloSz < offset + OPAQUE16_LEN)
+        return 0; /* no extensions in client hello. */
+
+    ato16(clientHello + offset, &len16);
+    offset += OPAQUE16_LEN;
+
+    if (helloSz < offset + len16)
+        return INCOMPLETE_DATA;
+
+    while (len16 > OPAQUE16_LEN + OPAQUE16_LEN) {
+        word16 extType;
+        word16 extLen;
+
+        ato16(clientHello + offset, &extType);
+        offset += OPAQUE16_LEN;
+
+        ato16(clientHello + offset, &extLen);
+        offset += OPAQUE16_LEN;
+
+        if (helloSz < offset + extLen)
+            return INCOMPLETE_DATA;
+
+        if (extType != SERVER_NAME_INDICATION) {
+            offset += extLen; /* skip extension */
+        } else {
+            word16 listLen;
+
+            ato16(clientHello + offset, &listLen);
+            offset += OPAQUE16_LEN;
+
+            if (helloSz < offset + listLen)
+                return INCOMPLETE_DATA;
+
+            while (listLen > ENUM_LEN + OPAQUE16_LEN) {
+                byte   sniType = clientHello[offset++];
+                word16 sniLen;
+
+                ato16(clientHello + offset, &sniLen);
+                offset += OPAQUE16_LEN;
+
+                if (helloSz < offset + sniLen)
+                    return INCOMPLETE_DATA;
+
+                if (sniType != type) {
+                    offset  += sniLen;
+                    listLen -= min(ENUM_LEN + OPAQUE16_LEN + sniLen, listLen);
+                    continue;
+                }
+
+                *inOutSz = min(sniLen, *inOutSz);
+                XMEMCPY(sni, clientHello + offset, *inOutSz);
+
+                return SSL_SUCCESS;
+            }
+        }
+
+        len16 -= min(2 * OPAQUE16_LEN + extLen, len16);
+    }
+
+    return len16 ? BUFFER_ERROR : SSL_SUCCESS;
+}
+
 #endif
 
 #define SNI_FREE_ALL TLSX_SNI_FreeAll
@@ -902,7 +1047,7 @@ static int TLSX_MFL_Parse(CYASSL* ssl, byte* input, word16 length,
     if (isRequest) {
         int r = TLSX_UseMaxFragment(&ssl->extensions, *input);
 
-        if (r) return r; /* throw error */
+        if (r != SSL_SUCCESS) return r; /* throw error */
 
         TLSX_SetResponse(ssl, MAX_FRAGMENT_LENGTH);
     }
@@ -952,7 +1097,7 @@ int TLSX_UseMaxFragment(TLSX** extensions, byte mfl)
         }
     } while ((extension = extension->next));
 
-    return 0;
+    return SSL_SUCCESS;
 }
 
 
@@ -983,7 +1128,7 @@ int TLSX_UseTruncatedHMAC(TLSX** extensions)
         if ((ret = TLSX_Append(extensions, TRUNCATED_HMAC)) != 0)
             return ret;
 
-    return 0;
+    return SSL_SUCCESS;
 }
 
 static int TLSX_THM_Parse(CYASSL* ssl, byte* input, word16 length,
@@ -996,7 +1141,7 @@ static int TLSX_THM_Parse(CYASSL* ssl, byte* input, word16 length,
     if (isRequest) {
         int r = TLSX_UseTruncatedHMAC(&ssl->extensions);
 
-        if (r) return r; /* throw error */
+        if (r != SSL_SUCCESS) return r; /* throw error */
 
         TLSX_SetResponse(ssl, TRUNCATED_HMAC);
     }
@@ -1004,9 +1149,6 @@ static int TLSX_THM_Parse(CYASSL* ssl, byte* input, word16 length,
 
     ssl->truncated_hmac = 1;
 
-#error "TRUNCATED HMAC IS NOT FINISHED YET \
-(contact moises@wolfssl.com for more info)"
-
     return 0;
 }
 
@@ -1018,6 +1160,292 @@ static int TLSX_THM_Parse(CYASSL* ssl, byte* input, word16 length,
 
 #endif /* HAVE_TRUNCATED_HMAC */
 
+#ifdef HAVE_SUPPORTED_CURVES
+
+#ifndef HAVE_ECC
+#error "Elliptic Curves Extension requires Elliptic Curve Cryptography. \
+Use --enable-ecc in the configure script or define HAVE_ECC."
+#endif
+
+static void TLSX_EllipticCurve_FreeAll(EllipticCurve* list)
+{
+    EllipticCurve* curve;
+
+    while ((curve = list)) {
+        list = curve->next;
+        XFREE(curve, 0, DYNAMIC_TYPE_TLSX);
+    }
+}
+
+static int TLSX_EllipticCurve_Append(EllipticCurve** list, word16 name)
+{
+    EllipticCurve* curve;
+
+    if (list == NULL)
+        return BAD_FUNC_ARG;
+
+    if ((curve = XMALLOC(sizeof(EllipticCurve), 0, DYNAMIC_TYPE_TLSX)) == NULL)
+        return MEMORY_E;
+
+    curve->name = name;
+    curve->next = *list;
+
+    *list = curve;
+
+    return 0;
+}
+
+#ifndef NO_CYASSL_CLIENT
+
+static void TLSX_EllipticCurve_ValidateRequest(CYASSL* ssl, byte* semaphore)
+{
+    int i;
+
+    for (i = 0; i < ssl->suites->suiteSz; i+= 2)
+        if (ssl->suites->suites[i] == ECC_BYTE)
+            return;
+
+    /* No elliptic curve suite found */
+    TURN_ON(semaphore, ELLIPTIC_CURVES);
+}
+
+static word16 TLSX_EllipticCurve_GetSize(EllipticCurve* list)
+{
+    EllipticCurve* curve;
+    word16 length = OPAQUE16_LEN; /* list length */
+
+    while ((curve = list)) {
+        list = curve->next;
+        length += OPAQUE16_LEN; /* curve length */
+    }
+
+    return length;
+}
+
+static word16 TLSX_EllipticCurve_WriteR(EllipticCurve* curve, byte* output);
+static word16 TLSX_EllipticCurve_WriteR(EllipticCurve* curve, byte* output)
+{
+    word16 offset = 0;
+
+    if (!curve)
+        return offset;
+
+    offset = TLSX_EllipticCurve_WriteR(curve->next, output);
+    c16toa(curve->name, output + offset);
+
+    return OPAQUE16_LEN + offset;
+}
+
+static word16 TLSX_EllipticCurve_Write(EllipticCurve* list, byte* output)
+{
+    word16 length = TLSX_EllipticCurve_WriteR(list, output + OPAQUE16_LEN);
+
+    c16toa(length, output); /* writing list length */
+
+    return OPAQUE16_LEN + length;
+}
+
+#endif /* NO_CYASSL_CLIENT */
+#ifndef NO_CYASSL_SERVER
+
+static int TLSX_EllipticCurve_Parse(CYASSL* ssl, byte* input, word16 length,
+                                                                 byte isRequest)
+{
+    word16 offset;
+    word16 name;
+    int r;
+
+    (void) isRequest; /* shut up compiler! */
+
+    if (OPAQUE16_LEN > length || length % OPAQUE16_LEN)
+        return INCOMPLETE_DATA;
+
+    ato16(input, &offset);
+
+    /* validating curve list length */
+    if (length != OPAQUE16_LEN + offset)
+        return INCOMPLETE_DATA;
+
+    while (offset) {
+        ato16(input + offset, &name);
+        offset -= OPAQUE16_LEN;
+
+        r = TLSX_UseSupportedCurve(&ssl->extensions, name);
+
+        if (r != SSL_SUCCESS) return r; /* throw error */
+    }
+
+    return 0;
+}
+
+int TLSX_ValidateEllipticCurves(CYASSL* ssl, byte first, byte second) {
+    TLSX*          extension = (first == ECC_BYTE)
+                             ? TLSX_Find(ssl->extensions, ELLIPTIC_CURVES)
+                             : NULL;
+    EllipticCurve* curve     = NULL;
+    word32         oid       = 0;
+    word16         octets    = 0; /* acording to 'ecc_set_type ecc_sets[];' */
+    int            sig       = 0; /* valitade signature */
+    int            key       = 0; /* validate key       */
+
+    if (!extension)
+        return 1; /* no suite restriction */
+
+    for (curve = extension->data; curve && !(sig && key); curve = curve->next) {
+
+        switch (curve->name) {
+            case CYASSL_ECC_SECP160R1: oid = ECC_160R1; octets = 20; break;
+            case CYASSL_ECC_SECP192R1: oid = ECC_192R1; octets = 24; break;
+            case CYASSL_ECC_SECP224R1: oid = ECC_224R1; octets = 28; break;
+            case CYASSL_ECC_SECP256R1: oid = ECC_256R1; octets = 32; break;
+            case CYASSL_ECC_SECP384R1: oid = ECC_384R1; octets = 48; break;
+            case CYASSL_ECC_SECP521R1: oid = ECC_521R1; octets = 66; break;
+            default: continue; /* unsupported curve */
+        }
+
+        switch (second) {
+#ifndef NO_DSA
+            /* ECDHE_ECDSA */
+            case TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA:
+            case TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA:
+            case TLS_ECDHE_ECDSA_WITH_RC4_128_SHA:
+            case TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA:
+            case TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256:
+            case TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384:
+            case TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256:
+            case TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384:
+            case TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8:
+            case TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8:
+                sig |= ssl->pkCurveOID == oid;
+                key |= ssl->eccTempKeySz == octets;
+            break;
+
+            /* ECDH_ECDSA */
+            case TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA:
+            case TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA:
+            case TLS_ECDH_ECDSA_WITH_RC4_128_SHA:
+            case TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA:
+            case TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256:
+            case TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384:
+            case TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256:
+            case TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384:
+                sig |= ssl->pkCurveOID == oid;
+                key |= ssl->pkCurveOID == oid;
+            break;
+#endif
+#ifndef NO_RSA
+            /* ECDHE_RSA */
+            case TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA:
+            case TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA:
+            case TLS_ECDHE_RSA_WITH_RC4_128_SHA:
+            case TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA:
+            case TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256:
+            case TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384:
+            case TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256:
+            case TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384:
+                sig = 1;
+                key |= ssl->eccTempKeySz == octets;
+            break;
+
+            /* ECDH_RSA */
+            case TLS_ECDH_RSA_WITH_AES_256_CBC_SHA:
+            case TLS_ECDH_RSA_WITH_AES_128_CBC_SHA:
+            case TLS_ECDH_RSA_WITH_RC4_128_SHA:
+            case TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA:
+            case TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256:
+            case TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384:
+            case TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256:
+            case TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384:
+                sig = 1;
+                key |= ssl->pkCurveOID == oid;
+            break;
+#endif
+            default:
+                sig = 1;
+                key = 1;
+            break;
+        }
+    }
+
+    return sig && key;
+}
+
+#endif /* NO_CYASSL_SERVER */
+
+int TLSX_UseSupportedCurve(TLSX** extensions, word16 name)
+{
+    TLSX*          extension = NULL;
+    EllipticCurve* curve     = NULL;
+    int            ret       = 0;
+
+    if (extensions == NULL)
+        return BAD_FUNC_ARG;
+
+    if ((ret = TLSX_EllipticCurve_Append(&curve, name)) != 0)
+        return ret;
+
+    extension = *extensions;
+
+    /* find EllipticCurve extension if it already exists. */
+    while (extension && extension->type != ELLIPTIC_CURVES)
+        extension = extension->next;
+
+    /* push new EllipticCurve extension if it doesn't exists. */
+    if (!extension) {
+        if ((ret = TLSX_Append(extensions, ELLIPTIC_CURVES)) != 0) {
+            XFREE(curve, 0, DYNAMIC_TYPE_TLSX);
+            return ret;
+        }
+
+        extension = *extensions;
+    }
+
+    /* push new EllipticCurve object to extension data. */
+    curve->next = (EllipticCurve*) extension->data;
+    extension->data = (void*) curve;
+
+    /* look for another curve of the same name to remove (replacement) */
+    do {
+        if (curve->next && curve->next->name == name) {
+            EllipticCurve *next = curve->next;
+
+            curve->next = next->next;
+            XFREE(next, 0, DYNAMIC_TYPE_TLSX);
+
+            break;
+        }
+    } while ((curve = curve->next));
+
+    return SSL_SUCCESS;
+}
+
+#define EC_FREE_ALL         TLSX_EllipticCurve_FreeAll
+#define EC_VALIDATE_REQUEST TLSX_EllipticCurve_ValidateRequest
+
+#ifndef NO_CYASSL_CLIENT
+#define EC_GET_SIZE TLSX_EllipticCurve_GetSize
+#define EC_WRITE    TLSX_EllipticCurve_Write
+#else
+#define EC_GET_SIZE(list)         0
+#define EC_WRITE(a, b)            0
+#endif
+
+#ifndef NO_CYASSL_SERVER
+#define EC_PARSE TLSX_EllipticCurve_Parse
+#else
+#define EC_PARSE(a, b, c, d)      0
+#endif
+
+#else
+
+#define EC_FREE_ALL(list)
+#define EC_GET_SIZE(list)         0
+#define EC_WRITE(a, b)            0
+#define EC_PARSE(a, b, c, d)      0
+#define EC_VALIDATE_REQUEST(a, b)
+
+#endif /* HAVE_SUPPORTED_CURVES */
+
 TLSX* TLSX_Find(TLSX* list, TLSX_Type type)
 {
     TLSX* extension = list;
@@ -1047,18 +1475,16 @@ void TLSX_FreeAll(TLSX* list)
             case TRUNCATED_HMAC:
                 /* Nothing to do. */
                 break;
+
+            case ELLIPTIC_CURVES:
+                EC_FREE_ALL(extension->data);
+                break;
         }
 
         XFREE(extension, 0, DYNAMIC_TYPE_TLSX);
     }
 }
 
-#define IS_OFF(semaphore, light) \
-    ((semaphore)[(light) / 8] ^  (byte) (0x01 << ((light) % 8)))
-
-#define TURN_ON(semaphore, light) \
-    ((semaphore)[(light) / 8] |= (byte) (0x01 << ((light) % 8)))
-
 static word16 TLSX_GetSize(TLSX* list, byte* semaphore, byte isRequest)
 {
     TLSX* extension;
@@ -1086,6 +1512,10 @@ static word16 TLSX_GetSize(TLSX* list, byte* semaphore, byte isRequest)
                 case TRUNCATED_HMAC:
                     /* empty extension. */
                     break;
+
+                case ELLIPTIC_CURVES:
+                    length += EC_GET_SIZE((EllipticCurve *) extension->data);
+                    break;
             }
 
             TURN_ON(semaphore, extension->type);
@@ -1130,6 +1560,11 @@ static word16 TLSX_Write(TLSX* list, byte* output, byte* semaphore,
                 case TRUNCATED_HMAC:
                     /* empty extension. */
                     break;
+
+                case ELLIPTIC_CURVES:
+                    offset += EC_WRITE((EllipticCurve *) extension->data,
+                                                               output + offset);
+                    break;
             }
 
             /* writing extension data length */
@@ -1152,6 +1587,8 @@ word16 TLSX_GetRequestSize(CYASSL* ssl)
     if (ssl && IsTLS(ssl)) {
         byte semaphore[16] = {0};
 
+        EC_VALIDATE_REQUEST(ssl, semaphore);
+
         if (ssl->extensions)
             length += TLSX_GetSize(ssl->extensions, semaphore, 1);
 
@@ -1177,6 +1614,8 @@ word16 TLSX_WriteRequest(CYASSL* ssl, byte* output)
 
         offset += OPAQUE16_LEN; /* extensions length */
 
+        EC_VALIDATE_REQUEST(ssl, semaphore);
+
         if (ssl->extensions)
             offset += TLSX_Write(ssl->extensions, output + offset,
                                                                   semaphore, 1);
@@ -1296,6 +1735,12 @@ int TLSX_Parse(CYASSL* ssl, byte* input, word16 length, byte isRequest,
                 ret = THM_PARSE(ssl, input + offset, size, isRequest);
                 break;
 
+            case ELLIPTIC_CURVES:
+                CYASSL_MSG("Elliptic Curves extension received");
+
+                ret = EC_PARSE(ssl, input + offset, size, isRequest);
+                break;
+
             case HELLO_EXT_SIG_ALGO:
                 if (isRequest) {
                     /* do not mess with offset inside the switch! */
@@ -1328,6 +1773,13 @@ int TLSX_Parse(CYASSL* ssl, byte* input, word16 length, byte isRequest,
 #undef IS_OFF
 #undef TURN_ON
 
+#elif defined(HAVE_SNI)             \
+   || defined(HAVE_MAX_FRAGMENT)    \
+   || defined(HAVE_TRUNCATED_HMAC)  \
+   || defined(HAVE_SUPPORTED_CURVES)
+
+#error "Using TLS extensions requires HAVE_TLS_EXTENSIONS to be defined."
+
 #endif /* HAVE_TLS_EXTENSIONS */
 
 
diff --git a/sslSniffer/sslSnifferTest/include.am b/sslSniffer/sslSnifferTest/include.am
index 44349f976..d4c90accc 100644
--- a/sslSniffer/sslSnifferTest/include.am
+++ b/sslSniffer/sslSnifferTest/include.am
@@ -2,7 +2,7 @@
 # included from Top Level Makefile.am
 # All paths should be given relative to the root
 
-if BUILD_SNIFFER
+if BUILD_SNIFFTEST
 noinst_PROGRAMS += sslSniffer/sslSnifferTest/snifftest
 sslSniffer_sslSnifferTest_snifftest_SOURCES = sslSniffer/sslSnifferTest/snifftest.c
 sslSniffer_sslSnifferTest_snifftest_LDADD        = src/libcyassl.la -lpcap
diff --git a/sslSniffer/sslSnifferTest/snifftest.c b/sslSniffer/sslSnifferTest/snifftest.c
index 7d5a7561e..2570a65bc 100755
--- a/sslSniffer/sslSnifferTest/snifftest.c
+++ b/sslSniffer/sslSnifferTest/snifftest.c
@@ -69,18 +69,25 @@ enum {
 };
 
 
-pcap_t* pcap = 0;
-pcap_if_t *alldevs;
+pcap_t* pcap = NULL;
+pcap_if_t* alldevs = NULL;
+
+
+static void FreeAll(void)
+{
+    if (pcap)
+        pcap_close(pcap);
+    if (alldevs)
+        pcap_freealldevs(alldevs);
+#ifndef _WIN32
+    ssl_FreeSniffer();
+#endif
+}
 
 static void sig_handler(const int sig) 
 {
     printf("SIGINT handled = %d.\n", sig);
-    if (pcap)
-        pcap_close(pcap);
-	pcap_freealldevs(alldevs);
-#ifndef _WIN32
-    ssl_FreeSniffer();
-#endif
+    FreeAll();
     if (sig)
         exit(EXIT_SUCCESS);
 }
@@ -286,6 +293,7 @@ int main(int argc, char** argv)
         else if (saveFile)
             break;      /* we're done reading file */
     }
+    FreeAll();
 
     return EXIT_SUCCESS;
 }
diff --git a/tests/api.c b/tests/api.c
index ecd89a5ba..94a232f06 100644
--- a/tests/api.c
+++ b/tests/api.c
@@ -56,6 +56,9 @@ static void test_CyaSSL_UseMaxFragment(void);
 #ifdef HAVE_TRUNCATED_HMAC
 static void test_CyaSSL_UseTruncatedHMAC(void);
 #endif /* HAVE_TRUNCATED_HMAC */
+#ifdef HAVE_SUPPORTED_CURVES
+static void test_CyaSSL_UseSupportedCurve(void);
+#endif /* HAVE_SUPPORTED_CURVES */
 
 /* test function helpers */
 static int test_method(CYASSL_METHOD *method, const char *name);
@@ -116,6 +119,9 @@ int ApiTest(void)
 #ifdef HAVE_TRUNCATED_HMAC
     test_CyaSSL_UseTruncatedHMAC();
 #endif /* HAVE_TRUNCATED_HMAC */
+#ifdef HAVE_SUPPORTED_CURVES
+    test_CyaSSL_UseSupportedCurve();
+#endif /* HAVE_SUPPORTED_CURVES */
     test_CyaSSL_Cleanup();
     printf(" End API Tests\n");
 
@@ -236,14 +242,13 @@ int test_CyaSSL_CTX_new(CYASSL_METHOD *method)
     return TEST_SUCCESS;
 }
 
-#ifdef HAVE_TLS_EXTENSIONS
 #ifdef HAVE_SNI
 static void use_SNI_at_ctx(CYASSL_CTX* ctx)
 {
     byte type = CYASSL_SNI_HOST_NAME;
     char name[] = "www.yassl.com";
 
-    AssertIntEQ(0, CyaSSL_CTX_UseSNI(ctx, type, (void *) name, XSTRLEN(name)));
+    AssertIntEQ(1, CyaSSL_CTX_UseSNI(ctx, type, (void *) name, XSTRLEN(name)));
 }
 
 static void use_SNI_at_ssl(CYASSL* ssl)
@@ -251,7 +256,7 @@ static void use_SNI_at_ssl(CYASSL* ssl)
     byte type = CYASSL_SNI_HOST_NAME;
     char name[] = "www.yassl.com";
 
-    AssertIntEQ(0, CyaSSL_UseSNI(ssl, type, (void *) name, XSTRLEN(name)));
+    AssertIntEQ(1, CyaSSL_UseSNI(ssl, type, (void *) name, XSTRLEN(name)));
 }
 
 static void different_SNI_at_ssl(CYASSL* ssl)
@@ -259,7 +264,7 @@ static void different_SNI_at_ssl(CYASSL* ssl)
     byte type = CYASSL_SNI_HOST_NAME;
     char name[] = "ww2.yassl.com";
 
-    AssertIntEQ(0, CyaSSL_UseSNI(ssl, type, (void *) name, XSTRLEN(name)));
+    AssertIntEQ(1, CyaSSL_UseSNI(ssl, type, (void *) name, XSTRLEN(name)));
 }
 
 static void use_SNI_WITH_CONTINUE_at_ssl(CYASSL* ssl)
@@ -332,6 +337,88 @@ static void verify_SNI_fake_matching(CYASSL* ssl)
     AssertStrEQ(name, request);
 }
 
+static void test_CyaSSL_SNI_GetFromBuffer(void)
+{
+    byte buffer[] = { /* www.paypal.com */
+        0x00, 0x00, 0x00, 0x00, 0xff, 0x01, 0x00, 0x00, 0x60, 0x03, 0x03, 0x5c,
+        0xc4, 0xb3, 0x8c, 0x87, 0xef, 0xa4, 0x09, 0xe0, 0x02, 0xab, 0x86, 0xca,
+        0x76, 0xf0, 0x9e, 0x01, 0x65, 0xf6, 0xa6, 0x06, 0x13, 0x1d, 0x0f, 0xa5,
+        0x79, 0xb0, 0xd4, 0x77, 0x22, 0xeb, 0x1a, 0x00, 0x00, 0x16, 0x00, 0x6b,
+        0x00, 0x67, 0x00, 0x39, 0x00, 0x33, 0x00, 0x3d, 0x00, 0x3c, 0x00, 0x35,
+        0x00, 0x2f, 0x00, 0x05, 0x00, 0x04, 0x00, 0x0a, 0x01, 0x00, 0x00, 0x21,
+        0x00, 0x00, 0x00, 0x13, 0x00, 0x11, 0x00, 0x00, 0x0e, 0x77, 0x77, 0x77,
+        0x2e, 0x70, 0x61, 0x79, 0x70, 0x61, 0x6c, 0x2e, 0x63, 0x6f, 0x6d, 0x00,
+        0x0d, 0x00, 0x06, 0x00, 0x04, 0x04, 0x01, 0x02, 0x01
+    };
+
+    byte buffer2[] = { /* api.textmate.org */
+        0x16, 0x03, 0x01, 0x00, 0xc6, 0x01, 0x00, 0x00, 0xc2, 0x03, 0x03, 0x52,
+        0x8b, 0x7b, 0xca, 0x69, 0xec, 0x97, 0xd5, 0x08, 0x03, 0x50, 0xfe, 0x3b,
+        0x99, 0xc3, 0x20, 0xce, 0xa5, 0xf6, 0x99, 0xa5, 0x71, 0xf9, 0x57, 0x7f,
+        0x04, 0x38, 0xf6, 0x11, 0x0b, 0xb8, 0xd3, 0x00, 0x00, 0x5e, 0x00, 0xff,
+        0xc0, 0x24, 0xc0, 0x23, 0xc0, 0x0a, 0xc0, 0x09, 0xc0, 0x07, 0xc0, 0x08,
+        0xc0, 0x28, 0xc0, 0x27, 0xc0, 0x14, 0xc0, 0x13, 0xc0, 0x11, 0xc0, 0x12,
+        0xc0, 0x26, 0xc0, 0x25, 0xc0, 0x2a, 0xc0, 0x29, 0xc0, 0x05, 0xc0, 0x04,
+        0xc0, 0x02, 0xc0, 0x03, 0xc0, 0x0f, 0xc0, 0x0e, 0xc0, 0x0c, 0xc0, 0x0d,
+        0x00, 0x3d, 0x00, 0x3c, 0x00, 0x2f, 0x00, 0x05, 0x00, 0x04, 0x00, 0x35,
+        0x00, 0x0a, 0x00, 0x67, 0x00, 0x6b, 0x00, 0x33, 0x00, 0x39, 0x00, 0x16,
+        0x00, 0xaf, 0x00, 0xae, 0x00, 0x8d, 0x00, 0x8c, 0x00, 0x8a, 0x00, 0x8b,
+        0x00, 0xb1, 0x00, 0xb0, 0x00, 0x2c, 0x00, 0x3b, 0x01, 0x00, 0x00, 0x3b,
+        0x00, 0x00, 0x00, 0x15, 0x00, 0x13, 0x00, 0x00, 0x10, 0x61, 0x70, 0x69,
+        0x2e, 0x74, 0x65, 0x78, 0x74, 0x6d, 0x61, 0x74, 0x65, 0x2e, 0x6f, 0x72,
+        0x67, 0x00, 0x0a, 0x00, 0x08, 0x00, 0x06, 0x00, 0x17, 0x00, 0x18, 0x00,
+        0x19, 0x00, 0x0b, 0x00, 0x02, 0x01, 0x00, 0x00, 0x0d, 0x00, 0x0c, 0x00,
+        0x0a, 0x05, 0x01, 0x04, 0x01, 0x02, 0x01, 0x04, 0x03, 0x02, 0x03
+    };
+
+    byte buffer3[] = { /* no sni extension */
+        0x16, 0x03, 0x03, 0x00, 0x4d, 0x01, 0x00, 0x00, 0x49, 0x03, 0x03, 0xea,
+        0xa1, 0x9f, 0x60, 0xdd, 0x52, 0x12, 0x13, 0xbd, 0x84, 0x34, 0xd5, 0x1c,
+        0x38, 0x25, 0xa8, 0x97, 0xd2, 0xd5, 0xc6, 0x45, 0xaf, 0x1b, 0x08, 0xe4,
+        0x1e, 0xbb, 0xdf, 0x9d, 0x39, 0xf0, 0x65, 0x00, 0x00, 0x16, 0x00, 0x6b,
+        0x00, 0x67, 0x00, 0x39, 0x00, 0x33, 0x00, 0x3d, 0x00, 0x3c, 0x00, 0x35,
+        0x00, 0x2f, 0x00, 0x05, 0x00, 0x04, 0x00, 0x0a, 0x01, 0x00, 0x00, 0x0a,
+        0x00, 0x0d, 0x00, 0x06, 0x00, 0x04, 0x04, 0x01, 0x02, 0x01
+    };
+
+    byte result[32] = {0};
+    word32 length   = 32;
+
+    AssertIntEQ(SSL_SUCCESS, CyaSSL_SNI_GetFromBuffer(buffer3, sizeof(buffer3),
+                                                           0, result, &length));
+
+    AssertIntEQ(SSL_SUCCESS, CyaSSL_SNI_GetFromBuffer(buffer2, sizeof(buffer2),
+                                                           1, result, &length));
+
+    AssertIntEQ(-228, CyaSSL_SNI_GetFromBuffer(buffer, sizeof(buffer), 0,
+                                                              result, &length));
+    buffer[0] = 0x16;
+
+    AssertIntEQ(-228, CyaSSL_SNI_GetFromBuffer(buffer, sizeof(buffer), 0,
+                                                              result, &length));
+    buffer[1] = 0x03;
+
+    AssertIntEQ(-228, CyaSSL_SNI_GetFromBuffer(buffer, sizeof(buffer), 0,
+                                                              result, &length));
+    buffer[2] = 0x03;
+
+    AssertIntEQ(-210, CyaSSL_SNI_GetFromBuffer(buffer, sizeof(buffer), 0,
+                                                              result, &length));
+    buffer[4] = 0x64;
+
+    AssertIntEQ(1, CyaSSL_SNI_GetFromBuffer(buffer, sizeof(buffer), 0,
+                                                              result, &length));
+    result[length] = 0;
+    AssertStrEQ("www.paypal.com", (const char*) result);
+
+    length = 32;
+
+    AssertIntEQ(1, CyaSSL_SNI_GetFromBuffer(buffer2, sizeof(buffer2), 0,
+                                                              result, &length));
+    result[length] = 0;
+    AssertStrEQ("api.textmate.org", (const char*) result);
+}
+
 void test_CyaSSL_UseSNI(void)
 {
     callback_functions client_callbacks = {CyaSSLv23_client_method, 0, 0, 0};
@@ -344,20 +431,22 @@ void test_CyaSSL_UseSNI(void)
     AssertNotNull(ssl);
 
     /* error cases */
-    AssertIntNE(0, CyaSSL_CTX_UseSNI(NULL, 0, (void *) "ctx", XSTRLEN("ctx")));
-    AssertIntNE(0, CyaSSL_UseSNI(    NULL, 0, (void *) "ssl", XSTRLEN("ssl")));
-    AssertIntNE(0, CyaSSL_CTX_UseSNI(ctx, -1, (void *) "ctx", XSTRLEN("ctx")));
-    AssertIntNE(0, CyaSSL_UseSNI(    ssl, -1, (void *) "ssl", XSTRLEN("ssl")));
-    AssertIntNE(0, CyaSSL_CTX_UseSNI(ctx,  0, (void *) NULL,  XSTRLEN("ctx")));
-    AssertIntNE(0, CyaSSL_UseSNI(    ssl,  0, (void *) NULL,  XSTRLEN("ssl")));
+    AssertIntNE(1, CyaSSL_CTX_UseSNI(NULL, 0, (void *) "ctx", XSTRLEN("ctx")));
+    AssertIntNE(1, CyaSSL_UseSNI(    NULL, 0, (void *) "ssl", XSTRLEN("ssl")));
+    AssertIntNE(1, CyaSSL_CTX_UseSNI(ctx, -1, (void *) "ctx", XSTRLEN("ctx")));
+    AssertIntNE(1, CyaSSL_UseSNI(    ssl, -1, (void *) "ssl", XSTRLEN("ssl")));
+    AssertIntNE(1, CyaSSL_CTX_UseSNI(ctx,  0, (void *) NULL,  XSTRLEN("ctx")));
+    AssertIntNE(1, CyaSSL_UseSNI(    ssl,  0, (void *) NULL,  XSTRLEN("ssl")));
 
     /* success case */
-    AssertIntEQ(0, CyaSSL_CTX_UseSNI(ctx,  0, (void *) "ctx", XSTRLEN("ctx")));
-    AssertIntEQ(0, CyaSSL_UseSNI(    ssl,  0, (void *) "ssl", XSTRLEN("ssl")));
+    AssertIntEQ(1, CyaSSL_CTX_UseSNI(ctx,  0, (void *) "ctx", XSTRLEN("ctx")));
+    AssertIntEQ(1, CyaSSL_UseSNI(    ssl,  0, (void *) "ssl", XSTRLEN("ssl")));
 
     CyaSSL_free(ssl);
     CyaSSL_CTX_free(ctx);
 
+#if !defined(NO_FILESYSTEM) && !defined(NO_CERTS)
+
     /* Testing success case at ctx */
     client_callbacks.ctx_ready = server_callbacks.ctx_ready = use_SNI_at_ctx;
     server_callbacks.on_result = verify_SNI_real_matching;
@@ -390,6 +479,10 @@ void test_CyaSSL_UseSNI(void)
     server_callbacks.on_result = verify_SNI_fake_matching;
 
     test_CyaSSL_client_server(&client_callbacks, &server_callbacks);
+
+#endif
+
+    test_CyaSSL_SNI_GetFromBuffer();
 }
 #endif /* HAVE_SNI */
 
@@ -403,24 +496,24 @@ static void test_CyaSSL_UseMaxFragment(void)
     AssertNotNull(ssl);
 
     /* error cases */
-    AssertIntNE(0, CyaSSL_CTX_UseMaxFragment(NULL, CYASSL_MFL_2_9));
-    AssertIntNE(0, CyaSSL_UseMaxFragment(    NULL, CYASSL_MFL_2_9));
-    AssertIntNE(0, CyaSSL_CTX_UseMaxFragment(ctx, 0));
-    AssertIntNE(0, CyaSSL_CTX_UseMaxFragment(ctx, 6));
-    AssertIntNE(0, CyaSSL_UseMaxFragment(ssl, 0));
-    AssertIntNE(0, CyaSSL_UseMaxFragment(ssl, 6));
+    AssertIntNE(1, CyaSSL_CTX_UseMaxFragment(NULL, CYASSL_MFL_2_9));
+    AssertIntNE(1, CyaSSL_UseMaxFragment(    NULL, CYASSL_MFL_2_9));
+    AssertIntNE(1, CyaSSL_CTX_UseMaxFragment(ctx, 0));
+    AssertIntNE(1, CyaSSL_CTX_UseMaxFragment(ctx, 6));
+    AssertIntNE(1, CyaSSL_UseMaxFragment(ssl, 0));
+    AssertIntNE(1, CyaSSL_UseMaxFragment(ssl, 6));
 
     /* success case */
-    AssertIntEQ(0, CyaSSL_CTX_UseMaxFragment(ctx,  CYASSL_MFL_2_9));
-    AssertIntEQ(0, CyaSSL_CTX_UseMaxFragment(ctx,  CYASSL_MFL_2_10));
-    AssertIntEQ(0, CyaSSL_CTX_UseMaxFragment(ctx,  CYASSL_MFL_2_11));
-    AssertIntEQ(0, CyaSSL_CTX_UseMaxFragment(ctx,  CYASSL_MFL_2_12));
-    AssertIntEQ(0, CyaSSL_CTX_UseMaxFragment(ctx,  CYASSL_MFL_2_13));
-    AssertIntEQ(0, CyaSSL_UseMaxFragment(    ssl,  CYASSL_MFL_2_9));
-    AssertIntEQ(0, CyaSSL_UseMaxFragment(    ssl,  CYASSL_MFL_2_10));
-    AssertIntEQ(0, CyaSSL_UseMaxFragment(    ssl,  CYASSL_MFL_2_11));
-    AssertIntEQ(0, CyaSSL_UseMaxFragment(    ssl,  CYASSL_MFL_2_12));
-    AssertIntEQ(0, CyaSSL_UseMaxFragment(    ssl,  CYASSL_MFL_2_13));
+    AssertIntEQ(1, CyaSSL_CTX_UseMaxFragment(ctx,  CYASSL_MFL_2_9));
+    AssertIntEQ(1, CyaSSL_CTX_UseMaxFragment(ctx,  CYASSL_MFL_2_10));
+    AssertIntEQ(1, CyaSSL_CTX_UseMaxFragment(ctx,  CYASSL_MFL_2_11));
+    AssertIntEQ(1, CyaSSL_CTX_UseMaxFragment(ctx,  CYASSL_MFL_2_12));
+    AssertIntEQ(1, CyaSSL_CTX_UseMaxFragment(ctx,  CYASSL_MFL_2_13));
+    AssertIntEQ(1, CyaSSL_UseMaxFragment(    ssl,  CYASSL_MFL_2_9));
+    AssertIntEQ(1, CyaSSL_UseMaxFragment(    ssl,  CYASSL_MFL_2_10));
+    AssertIntEQ(1, CyaSSL_UseMaxFragment(    ssl,  CYASSL_MFL_2_11));
+    AssertIntEQ(1, CyaSSL_UseMaxFragment(    ssl,  CYASSL_MFL_2_12));
+    AssertIntEQ(1, CyaSSL_UseMaxFragment(    ssl,  CYASSL_MFL_2_13));
 
     CyaSSL_free(ssl);
     CyaSSL_CTX_free(ctx);
@@ -437,19 +530,44 @@ static void test_CyaSSL_UseTruncatedHMAC(void)
     AssertNotNull(ssl);
 
     /* error cases */
-    AssertIntNE(0, CyaSSL_CTX_UseTruncatedHMAC(NULL));
-    AssertIntNE(0, CyaSSL_UseTruncatedHMAC(NULL));
+    AssertIntNE(1, CyaSSL_CTX_UseTruncatedHMAC(NULL));
+    AssertIntNE(1, CyaSSL_UseTruncatedHMAC(NULL));
 
     /* success case */
-    AssertIntEQ(0, CyaSSL_CTX_UseTruncatedHMAC(ctx));
-    AssertIntEQ(0, CyaSSL_UseTruncatedHMAC(ssl));
+    AssertIntEQ(1, CyaSSL_CTX_UseTruncatedHMAC(ctx));
+    AssertIntEQ(1, CyaSSL_UseTruncatedHMAC(ssl));
 
     CyaSSL_free(ssl);
     CyaSSL_CTX_free(ctx);
 }
 #endif /* HAVE_TRUNCATED_HMAC */
 
-#endif /* HAVE_TLS_EXTENSIONS */
+#ifdef HAVE_SUPPORTED_CURVES
+static void test_CyaSSL_UseSupportedCurve(void)
+{
+    CYASSL_CTX *ctx = CyaSSL_CTX_new(CyaSSLv23_client_method());
+    CYASSL     *ssl = CyaSSL_new(ctx);
+
+    AssertNotNull(ctx);
+    AssertNotNull(ssl);
+
+#ifndef NO_CYASSL_CLIENT
+    /* error cases */
+    AssertIntNE(1, CyaSSL_CTX_UseSupportedCurve(NULL, CYASSL_ECC_SECP160R1));
+    AssertIntNE(1, CyaSSL_CTX_UseSupportedCurve(ctx,  0));
+
+    AssertIntNE(1, CyaSSL_UseSupportedCurve(NULL, CYASSL_ECC_SECP160R1));
+    AssertIntNE(1, CyaSSL_UseSupportedCurve(ssl,  0));
+
+    /* success case */
+    AssertIntEQ(1, CyaSSL_CTX_UseSupportedCurve(ctx, CYASSL_ECC_SECP160R1));
+    AssertIntEQ(1, CyaSSL_UseSupportedCurve(ssl, CYASSL_ECC_SECP160R1));
+#endif
+
+    CyaSSL_free(ssl);
+    CyaSSL_CTX_free(ctx);
+}
+#endif /* HAVE_SUPPORTED_CURVES */
 
 #if !defined(NO_FILESYSTEM) && !defined(NO_CERTS)
 /* Helper for testing CyaSSL_CTX_use_certificate_file() */
diff --git a/tests/suites.c b/tests/suites.c
index 72e23e1ba..4df5a469b 100644
--- a/tests/suites.c
+++ b/tests/suites.c
@@ -80,8 +80,8 @@ static int IsValidCipherSuite(const char* line, char* suite)
     int  valid = 0;
 
     const char* find = "-l ";
-    char* begin = strstr(line, find);
-    char* end;
+    const char* begin = strstr(line, find);
+    const char* end;
 
     suite[0] = '\0';
 
diff --git a/tests/unit.c b/tests/unit.c
index 72f14ff68..f1926f2e9 100644
--- a/tests/unit.c
+++ b/tests/unit.c
@@ -27,10 +27,10 @@ int main(int argc, char** argv)
         err_sys("Cavium OpenNitroxDevice failed");
 #endif /* HAVE_CAVIUM */
 
-    if (CurrentDir("tests"))
+    if (CurrentDir("tests") || CurrentDir("_build"))
         ChangeDirBack(1);
-    else if (CurrentDir("build"))
-        ChangeDirBack(2);
+    else if (CurrentDir("Debug") || CurrentDir("Release"))
+        ChangeDirBack(3);
 
     if ( (ret = ApiTest()) != 0) {
         printf("api test failed with %d\n", ret);
diff --git a/testsuite/testsuite.c b/testsuite/testsuite.c
index 351a7471f..6d6cc8921 100644
--- a/testsuite/testsuite.c
+++ b/testsuite/testsuite.c
@@ -51,11 +51,16 @@ enum {
     NUMARGS = 3
 };
 
+#ifndef USE_WINDOWS_API
+    const char outputName[] = "/tmp/output";
+#else
+    const char outputName[] = "output";
+#endif
+
 
 int myoptind = 0;
 char* myoptarg = NULL;
 
-
 int main(int argc, char** argv)
 {
     func_args server_args;
@@ -79,11 +84,13 @@ int main(int argc, char** argv)
     CyaSSL_Debugging_ON();
 #endif
 
-    if (CurrentDir("testsuite"))
+    if (CurrentDir("testsuite") || CurrentDir("_build"))
         ChangeDirBack(1);
-    else if (CurrentDir("build"))  /* Xcode->Preferences->Locations->Build */
-        ChangeDirBack(2);          /* Location "Place build product in locations
-                                      specified by targets", uses build/Debug */
+    else if (CurrentDir("Debug") || CurrentDir("Release"))
+        ChangeDirBack(3);          /* Xcode->Preferences->Locations->Locations*/
+                                   /* Derived Data Advanced -> Custom  */
+                                   /* Relative to Workspace, Build/Products */
+                                   /* Debug or Release */
     server_args.signal = &ready;
     InitTcpReady(&ready);
 
@@ -115,8 +122,8 @@ int main(int argc, char** argv)
    
         strcpy(echo_args.argv[0], "echoclient");
         strcpy(echo_args.argv[1], "input");
-        strcpy(echo_args.argv[2], "output");
-        remove("output");
+        strcpy(echo_args.argv[2], outputName);
+        remove(outputName);
 
         /* Share the signal, it has the new port number in it. */
         echo_args.signal = server_args.signal;
@@ -144,7 +151,7 @@ int main(int argc, char** argv)
         byte output[SHA256_DIGEST_SIZE];
 
         file_test("input",  input);
-        file_test("output", output);
+        file_test(outputName, output);
         if (memcmp(input, output, sizeof(input)) != 0)
             return EXIT_FAILURE;
     }

From e5a51ca51696b9683e0fd59f59e46e800bb14265 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 4 Mar 2014 22:10:19 +0900
Subject: [PATCH 32/43] PIC32MZ Crypt Engine

---
 ctaocrypt/src/aes.c                         | 370 +++++++++++++++-
 ctaocrypt/src/des3.c                        | 463 ++++++++++++++++++++
 ctaocrypt/src/hmac.c                        |  17 +-
 ctaocrypt/src/port/pic32/pic32mz-hash.c     | 243 ++++++++++
 ctaocrypt/src/sha.c                         |  53 ++-
 ctaocrypt/src/sha256.c                      |  59 ++-
 cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h |  88 ++++
 7 files changed, 1247 insertions(+), 46 deletions(-)
 create mode 100644 ctaocrypt/src/port/pic32/pic32mz-hash.c
 create mode 100644 cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h

diff --git a/ctaocrypt/src/aes.c b/ctaocrypt/src/aes.c
index 8f5e357d7..02a15690a 100644
--- a/ctaocrypt/src/aes.c
+++ b/ctaocrypt/src/aes.c
@@ -55,6 +55,184 @@
                                     word32 length);
 #endif
 
+#if defined(CYASSL_PIC32MZ_CRYPT)
+
+#include "../../cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h"
+#define DEBUG_CYASSL
+
+    /* core hardware crypt engine driver */
+    static void AesCrypt(Aes *aes, byte* out, const byte* in, word32 sz,
+                                            int dir, int algo, int cryptoalgo)
+    {
+        securityAssociation *sa_p ;
+        bufferDescriptor *bd_p ;
+
+        volatile securityAssociation sa __attribute__((aligned (8)));
+        volatile bufferDescriptor bd __attribute__((aligned (8)));
+        volatile int k ;
+
+        /* get uncached address */
+        sa_p = KVA0_TO_KVA1(&sa) ;
+        bd_p = KVA0_TO_KVA1(&bd) ;
+
+        /* Sync cache and physical memory */
+        if(PIC32MZ_IF_RAM(in)) {
+            XMEMCPY((void *)KVA0_TO_KVA1(in), (void *)in, sz);
+        }
+        XMEMSET((void *)KVA0_TO_KVA1(out), 0, sz);
+        /* Set up the Security Association */
+        XMEMSET((byte *)KVA0_TO_KVA1(&sa), 0, sizeof(sa));
+        sa_p->SA_CTRL.ALGO = algo ; /* AES */
+        sa_p->SA_CTRL.LNC = 1;
+        sa_p->SA_CTRL.LOADIV = 1;
+        sa_p->SA_CTRL.FB = 1;
+        sa_p->SA_CTRL.ENCTYPE = dir ; /* Encryption/Decryption */
+        sa_p->SA_CTRL.CRYPTOALGO = cryptoalgo;
+
+        if(cryptoalgo == PIC32_CRYPTOALGO_AES_GCM){
+            switch(aes->keylen) {
+            case 32:
+                sa_p->SA_CTRL.KEYSIZE = PIC32_AES_KEYSIZE_256 ;
+                break ;
+            case 24:
+                sa_p->SA_CTRL.KEYSIZE = PIC32_AES_KEYSIZE_192 ;
+                break ;
+            case 16:
+                sa_p->SA_CTRL.KEYSIZE = PIC32_AES_KEYSIZE_128 ;
+                break ;
+            }
+        } else
+            sa_p->SA_CTRL.KEYSIZE = PIC32_AES_KEYSIZE_128 ;
+
+        ByteReverseWords(
+        (word32 *)KVA0_TO_KVA1(sa.SA_ENCKEY + 8 - aes->keylen/sizeof(word32)),
+                         (word32 *)aes->key_ce, aes->keylen);
+        ByteReverseWords(
+        (word32*)KVA0_TO_KVA1(sa.SA_ENCIV), (word32 *)aes->iv_ce, 16);
+
+        XMEMSET((byte *)KVA0_TO_KVA1(&bd), 0, sizeof(bd));
+        /* Set up the Buffer Descriptor */
+        bd_p->BD_CTRL.BUFLEN = sz;
+        if(cryptoalgo == PIC32_CRYPTOALGO_AES_GCM) {
+            if(sz % 0x10)
+                bd_p->BD_CTRL.BUFLEN = (sz/0x10 + 1) * 0x10 ;
+        }
+        bd_p->BD_CTRL.LIFM = 1;
+        bd_p->BD_CTRL.SA_FETCH_EN = 1;
+        bd_p->BD_CTRL.LAST_BD = 1;
+        bd_p->BD_CTRL.DESC_EN = 1;
+
+        bd_p->SA_ADDR = (unsigned int)KVA_TO_PA(&sa) ; 
+        bd_p->SRCADDR = (unsigned int)KVA_TO_PA(in) ; 
+        bd_p->DSTADDR = (unsigned int)KVA_TO_PA(out); 
+        bd_p->MSGLEN = sz ;
+
+        CECON = 1 << 6;
+        while (CECON);
+
+        /* Run the engine */
+        CEBDPADDR = (unsigned int)KVA_TO_PA(&bd) ;
+        CEINTEN = 0x07;
+        CECON = 0x27;
+
+        WAIT_ENGINE ;
+
+        if((cryptoalgo == PIC32_CRYPTOALGO_CBC) ||
+           (cryptoalgo == PIC32_CRYPTOALGO_TCBC)||
+           (cryptoalgo == PIC32_CRYPTOALGO_RCBC)) {
+            /* set iv for the next call */
+            if(dir == PIC32_ENCRYPTION) {
+	        XMEMCPY((void *)aes->iv_ce,
+                        (void*)KVA0_TO_KVA1(out + sz - AES_BLOCK_SIZE),
+                        AES_BLOCK_SIZE) ;
+	    } else {
+                ByteReverseWords((word32*)aes->iv_ce,
+                        (word32 *)KVA0_TO_KVA1(in + sz - AES_BLOCK_SIZE),
+                        AES_BLOCK_SIZE);
+	    }
+        }
+        XMEMCPY((byte *)out, (byte *)KVA0_TO_KVA1(out), sz) ;
+        ByteReverseWords((word32*)out, (word32 *)out, sz);
+    }
+
+    int AesCbcEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
+    {
+        AesCrypt(aes, out, in, sz, PIC32_ENCRYPTION, PIC32_ALGO_AES,
+                                                      PIC32_CRYPTOALGO_RCBC );
+    }
+
+    int AesCbcDecrypt(Aes* aes, byte* out, const byte* in, word32 sz)
+    {
+        AesCrypt(aes, out, in, sz, PIC32_DECRYPTION, PIC32_ALGO_AES,
+                                                      PIC32_CRYPTOALGO_RCBC);
+    }
+
+    #if defined(CYASSL_AES_COUNTER)
+    void AesCtrEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
+    {
+        int i ;
+        char out_block[AES_BLOCK_SIZE] ;
+        int odd ;
+        int even ;
+        char *tmp ; /* (char *)aes->tmp, for short */
+
+        tmp = (char *)aes->tmp ;
+        if(aes->left) {
+            if((aes->left + sz) >= AES_BLOCK_SIZE){
+                odd = AES_BLOCK_SIZE - aes->left ;
+            } else {
+                odd = sz ;
+            }
+            XMEMCPY(tmp+aes->left, in, odd) ;
+            if((odd+aes->left) == AES_BLOCK_SIZE){
+                AesCrypt(aes, out_block, tmp, AES_BLOCK_SIZE,
+                    PIC32_ENCRYPTION, PIC32_ALGO_AES, PIC32_CRYPTOALGO_RCTR);
+                XMEMCPY(out, out_block+aes->left, odd) ;
+                aes->left = 0 ;
+                XMEMSET(tmp, 0x0, AES_BLOCK_SIZE) ;
+                /* Increment IV */
+                for (i = AES_BLOCK_SIZE - 1; i >= 0; i--) {
+                    if (++((byte *)aes->iv_ce)[i])
+                        break ;
+                }
+            }
+            in += odd ;
+            out+= odd ;
+            sz -= odd ;
+        }
+        odd = sz % AES_BLOCK_SIZE ;  /* if there is tail flagment */
+        if(sz / AES_BLOCK_SIZE) {
+            even = (sz/AES_BLOCK_SIZE)*AES_BLOCK_SIZE ;
+            AesCrypt(aes, out, in, even, PIC32_ENCRYPTION, PIC32_ALGO_AES,
+                                                    PIC32_CRYPTOALGO_RCTR);
+            out += even ;
+            in  += even ;
+            do {  /* Increment IV */
+                for (i = AES_BLOCK_SIZE - 1; i >= 0; i--) {
+                    if (++((byte *)aes->iv_ce)[i])
+                        break ;
+                }
+                even -= AES_BLOCK_SIZE ;
+            } while((int)even > 0) ;
+        }
+        if(odd) {
+            XMEMSET(tmp+aes->left, 0x0, AES_BLOCK_SIZE - aes->left) ;
+            XMEMCPY(tmp+aes->left, in, odd) ;
+            AesCrypt(aes, out_block, tmp, AES_BLOCK_SIZE,
+                    PIC32_ENCRYPTION, PIC32_ALGO_AES, PIC32_CRYPTOALGO_RCTR);
+            XMEMCPY(out, out_block+aes->left,odd) ;
+            aes->left += odd ;
+        }
+    }
+    #endif /* CYASSL_AES_COUNTER */
+
+    #ifdef HAVE_AESGCM
+    #define HAVE_AES_ENGINE
+    /* Hardware AESGCM borows most of the software AESGCM, GMAC */
+    #endif
+
+#endif /* CYASSL_PIC32MZ_CRYPT */
+
 #ifdef STM32F2_CRYPTO
     /*
      * STM32F2 hardware AES support through the STM32F2 standard peripheral
@@ -62,8 +240,8 @@
      * document (See note in README).
      */
     #include "stm32f2xx.h"
-		#include "stm32f2xx_cryp.h"
-		
+    #include "stm32f2xx_cryp.h"
+
     int AesSetKey(Aes* aes, const byte* userKey, word32 keylen, const byte* iv,
                   int dir)
     {
@@ -439,13 +617,11 @@ extern volatile unsigned char __MBAR[];
 
 int AesCbcEncrypt(Aes* aes, byte* po, const byte* pi, word32 sz)
 {
-	//printf("AesCbcEncrypt(%x, %x, %x, %d)\n", aes, po, pi, sz) ;
 	return(AesCbcCrypt(aes, po, pi, sz, SEC_DESC_AES_CBC_ENCRYPT)) ;
 }
 
 int AesCbcDecrypt(Aes* aes, byte* po, const byte* pi, word32 sz)
 {
-	//printf("AesCbcDecrypt(%x, %x, %x, %d)\n", aes, po, pi, sz) ;
 	return(AesCbcCrypt(aes, po, pi, sz, SEC_DESC_AES_CBC_DECRYPT)) ;
 }
 	
@@ -553,6 +729,96 @@ int AesSetKey(Aes* aes, const byte* userKey, word32 keylen, const byte* iv,
     return 0;
 }
 
+#elif defined FREESCALE_MMCAU
+    /*
+     * Freescale mmCAU hardware AES support through the CAU/mmCAU library.
+     * Documentation located in ColdFire/ColdFire+ CAU and Kinetis mmCAU
+     * Software Library User Guide (See note in README).
+     */
+    #include "cau_api.h"
+
+    int AesSetKey(Aes* aes, const byte* userKey, word32 keylen, const byte* iv,
+                  int dir)
+    {
+        byte *rk = (byte*)aes->key;
+
+        if (!((keylen == 16) || (keylen == 24) || (keylen == 32)))
+            return BAD_FUNC_ARG;
+
+        if (rk == NULL)
+            return BAD_FUNC_ARG;
+
+        aes->rounds = keylen/4 + 6;
+        cau_aes_set_key(userKey, keylen*8, rk);
+
+        return AesSetIV(aes, iv);
+    }
+
+    int AesCbcEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
+    {
+        int i;
+        int offset = 0;
+        int len = sz;
+
+        byte *iv, *enc_key;
+        byte temp_block[AES_BLOCK_SIZE];
+
+        iv      = (byte*)aes->reg;
+        enc_key = (byte*)aes->key;
+
+        while (len > 0)
+        {
+            XMEMCPY(temp_block, in + offset, AES_BLOCK_SIZE);
+
+            /* XOR block with IV for CBC */
+            for (i = 0; i < AES_BLOCK_SIZE; i++)
+                temp_block[i] ^= iv[i];
+
+            cau_aes_encrypt(temp_block, enc_key, aes->rounds, out + offset);
+
+            len    -= AES_BLOCK_SIZE;
+            offset += AES_BLOCK_SIZE;
+
+            /* store IV for next block */
+            XMEMCPY(iv, out + offset - AES_BLOCK_SIZE, AES_BLOCK_SIZE);
+        }
+
+        return 0;
+    }
+
+    int AesCbcDecrypt(Aes* aes, byte* out, const byte* in, word32 sz)
+    {
+        int i;
+        int offset = 0;
+        int len = sz;
+
+        byte* iv, *dec_key;
+        byte temp_block[AES_BLOCK_SIZE];
+
+        iv      = (byte*)aes->reg;
+        dec_key = (byte*)aes->key;
+
+        while (len > 0)
+        {
+            XMEMCPY(temp_block, in + offset, AES_BLOCK_SIZE);
+
+            cau_aes_decrypt(in + offset, dec_key, aes->rounds, out + offset);
+
+            /* XOR block with IV for CBC */
+            for (i = 0; i < AES_BLOCK_SIZE; i++)
+                (out + offset)[i] ^= iv[i];
+
+            /* store IV for next block */
+            XMEMCPY(iv, temp_block, AES_BLOCK_SIZE);
+
+            len    -= AES_BLOCK_SIZE;
+            offset += AES_BLOCK_SIZE;
+        }
+
+        return 0;
+    }
+
+
 #else /* CTaoCrypt software implementation */
 
 static const word32 rcon[] = {
@@ -1232,7 +1498,6 @@ static const word32 Td[5][256] = {
 };
 
 
-
 #define GETBYTE(x, y) (word32)((byte)((x) >> (8 * (y))))
 
 
@@ -1386,6 +1651,10 @@ static int AesSetKeyLocal(Aes* aes, const byte* userKey, word32 keylen,
     #ifdef CYASSL_AESNI
         aes->use_aesni = 0;
     #endif /* CYASSL_AESNI */
+    #ifdef CYASSL_AES_COUNTER
+        aes->left = 0;
+    #endif /* CYASSL_AES_COUNTER */
+
     aes->rounds = keylen/4 + 6;
 
     XMEMCPY(rk, userKey, keylen);
@@ -1393,6 +1662,19 @@ static int AesSetKeyLocal(Aes* aes, const byte* userKey, word32 keylen,
         ByteReverseWords(rk, rk, keylen);
     #endif
 
+#ifdef CYASSL_PIC32MZ_CRYPT
+    {
+        word32 *akey1 = aes->key_ce;
+        word32 *areg = aes->iv_ce ;
+        aes->keylen = keylen ;
+        XMEMCPY(akey1, userKey, keylen);
+        if (iv)
+            XMEMCPY(areg, iv, AES_BLOCK_SIZE);
+        else
+            XMEMSET(areg,  0, AES_BLOCK_SIZE);
+    }
+#endif
+
     switch(keylen)
     {
     case 16:
@@ -1882,7 +2164,7 @@ static void AesDecrypt(Aes* aes, const byte* inBlock, byte* outBlock)
     XMEMCPY(outBlock + 3 * sizeof(s0), &s3, sizeof(s3));
 }
 
-
+#ifndef HAVE_AES_ENGINE
 int AesCbcEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
 {
     word32 blocks = sz / AES_BLOCK_SIZE;
@@ -1989,7 +2271,7 @@ int AesCbcDecrypt(Aes* aes, byte* out, const byte* in, word32 sz)
 
     return 0;
 }
-
+#endif
 
 #ifdef CYASSL_AES_DIRECT
 
@@ -2022,7 +2304,7 @@ int AesSetKeyDirect(Aes* aes, const byte* userKey, word32 keylen,
 #endif /* CYASSL_AES_DIRECT || CYASSL_AES_COUNTER */
 
 
-#ifdef CYASSL_AES_COUNTER
+#if defined(CYASSL_AES_COUNTER) && !defined(HAVE_AES_ENGINE)
 
 /* Increment AES counter */
 static INLINE void IncrementAesCounter(byte* inOutCtr)
@@ -2039,15 +2321,39 @@ static INLINE void IncrementAesCounter(byte* inOutCtr)
 
 void AesCtrEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
 {
-    word32 blocks = sz / AES_BLOCK_SIZE;
+    byte* tmp = (byte*)aes->tmp + AES_BLOCK_SIZE - aes->left;
 
-    while (blocks--) {
+    /* consume any unused bytes left in aes->tmp */
+    while (aes->left && sz) {
+       *(out++) = *(in++) ^ *(tmp++);
+       aes->left--;
+       sz--;
+    }
+
+    /* do as many block size ops as possible */
+    while (sz >= AES_BLOCK_SIZE) {
         AesEncrypt(aes, (byte*)aes->reg, out);
         IncrementAesCounter((byte*)aes->reg);
         xorbuf(out, in, AES_BLOCK_SIZE);
 
         out += AES_BLOCK_SIZE;
-        in  += AES_BLOCK_SIZE; 
+        in  += AES_BLOCK_SIZE;
+        sz  -= AES_BLOCK_SIZE;
+        aes->left = 0;
+    }
+
+    /* handle non block size remaining and sotre unused byte count in left */
+    if (sz) {
+        AesEncrypt(aes, (byte*)aes->reg, (byte*)aes->tmp);
+        IncrementAesCounter((byte*)aes->reg);
+
+        aes->left = AES_BLOCK_SIZE;
+        tmp = (byte*)aes->tmp;
+
+        while (sz--) {
+            *(out++) = *(in++) ^ *(tmp++);
+            aes->left--;
+        }
     }
 }
 
@@ -2688,34 +2994,51 @@ void AesGcmEncrypt(Aes* aes, byte* out, const byte* in, word32 sz,
     word32 partial = sz % AES_BLOCK_SIZE;
     const byte* p = in;
     byte* c = out;
-    byte ctr[AES_BLOCK_SIZE];
+    byte counter[AES_BLOCK_SIZE];
+    byte *ctr ;
     byte scratch[AES_BLOCK_SIZE];
 
     CYASSL_ENTER("AesGcmEncrypt");
 
+#ifdef CYASSL_PIC32MZ_CRYPT
+    ctr = (char *)aes->iv_ce ;
+#else
+    ctr = counter ;
+#endif
+
     XMEMSET(ctr, 0, AES_BLOCK_SIZE);
     XMEMCPY(ctr, iv, ivSz);
     InitGcmCounter(ctr);
 
+#ifdef CYASSL_PIC32MZ_CRYPT
+    if(blocks)
+        AesCrypt(aes, out, in, blocks*AES_BLOCK_SIZE,
+             PIC32_ENCRYPTION, PIC32_ALGO_AES, PIC32_CRYPTOALGO_AES_GCM );
+#endif
     while (blocks--) {
         IncrementGcmCounter(ctr);
+        #ifndef CYASSL_PIC32MZ_CRYPT
         AesEncrypt(aes, ctr, scratch);
         xorbuf(scratch, p, AES_BLOCK_SIZE);
         XMEMCPY(c, scratch, AES_BLOCK_SIZE);
-
+        #endif
         p += AES_BLOCK_SIZE;
         c += AES_BLOCK_SIZE;
     }
+
     if (partial != 0) {
         IncrementGcmCounter(ctr);
         AesEncrypt(aes, ctr, scratch);
         xorbuf(scratch, p, partial);
         XMEMCPY(c, scratch, partial);
+
     }
+
     GHASH(aes, authIn, authInSz, out, sz, authTag, authTagSz);
     InitGcmCounter(ctr);
     AesEncrypt(aes, ctr, scratch);
     xorbuf(authTag, scratch, authTagSz);
+
 }
 
 
@@ -2728,11 +3051,18 @@ int  AesGcmDecrypt(Aes* aes, byte* out, const byte* in, word32 sz,
     word32 partial = sz % AES_BLOCK_SIZE;
     const byte* c = in;
     byte* p = out;
-    byte ctr[AES_BLOCK_SIZE];
+    byte counter[AES_BLOCK_SIZE];
+    byte *ctr ;
     byte scratch[AES_BLOCK_SIZE];
 
     CYASSL_ENTER("AesGcmDecrypt");
 
+#ifdef CYASSL_PIC32MZ_CRYPT
+    ctr = (char *)aes->iv_ce ;
+#else
+    ctr = counter ;
+#endif
+
     XMEMSET(ctr, 0, AES_BLOCK_SIZE);
     XMEMCPY(ctr, iv, ivSz);
     InitGcmCounter(ctr);
@@ -2746,17 +3076,25 @@ int  AesGcmDecrypt(Aes* aes, byte* out, const byte* in, word32 sz,
         GHASH(aes, authIn, authInSz, in, sz, Tprime, sizeof(Tprime));
         AesEncrypt(aes, ctr, EKY0);
         xorbuf(Tprime, EKY0, sizeof(Tprime));
+
         if (XMEMCMP(authTag, Tprime, authTagSz) != 0) {
             return AES_GCM_AUTH_E;
         }
     }
+ 
+#ifdef CYASSL_PIC32MZ_CRYPT
+    if(blocks)
+        AesCrypt(aes, out, in, blocks*AES_BLOCK_SIZE,
+             PIC32_DECRYPTION, PIC32_ALGO_AES, PIC32_CRYPTOALGO_AES_GCM );
+#endif
 
     while (blocks--) {
         IncrementGcmCounter(ctr);
+        #ifndef CYASSL_PIC32MZ_CRYPT
         AesEncrypt(aes, ctr, scratch);
         xorbuf(scratch, c, AES_BLOCK_SIZE);
         XMEMCPY(p, scratch, AES_BLOCK_SIZE);
-
+        #endif
         p += AES_BLOCK_SIZE;
         c += AES_BLOCK_SIZE;
     }
@@ -2766,11 +3104,11 @@ int  AesGcmDecrypt(Aes* aes, byte* out, const byte* in, word32 sz,
         xorbuf(scratch, c, partial);
         XMEMCPY(p, scratch, partial);
     }
-
     return 0;
 }
 
 
+
 CYASSL_API void GmacSetKey(Gmac* gmac, const byte* key, word32 len)
 {
     AesGcmSetKey(&gmac->aes, key, len);
diff --git a/ctaocrypt/src/des3.c b/ctaocrypt/src/des3.c
index 4a501c93d..ab2c8a76c 100644
--- a/ctaocrypt/src/des3.c
+++ b/ctaocrypt/src/des3.c
@@ -263,6 +263,469 @@
         Des3Crypt(des, out, in, sz, DES_DECRYPTION);
     }
 
+
+#elif  defined(HAVE_COLDFIRE_SEC)
+
+#include "sec.h"
+#include "mcf548x_sec.h"
+
+#include "memory_pools.h"
+extern TX_BYTE_POOL mp_ncached;  /* Non Cached memory pool */
+#define DES_BUFFER_SIZE (DES_BLOCK_SIZE * 16)
+static unsigned char *DesBuffer = NULL ;
+
+#define SEC_DESC_DES_CBC_ENCRYPT  0x20500010
+#define SEC_DESC_DES_CBC_DECRYPT  0x20400010
+#define SEC_DESC_DES3_CBC_ENCRYPT 0x20700010
+#define SEC_DESC_DES3_CBC_DECRYPT 0x20600010
+
+extern volatile unsigned char __MBAR[];
+
+static void Des_Cbc(Des* des, byte* out, const byte* in, word32 sz, word32 desc)
+{
+    static volatile SECdescriptorType descriptor = {    NULL } ;
+    int ret ; int stat1,stat2 ;
+    int i ; int size ;
+    volatile int v ;
+
+    while(sz) {
+        if((sz%DES_BUFFER_SIZE) == sz) {
+            size = sz ;
+            sz = 0 ;
+        } else {
+            size = DES_BUFFER_SIZE ;
+            sz -= DES_BUFFER_SIZE ;
+        }
+        
+        descriptor.header = desc ;
+        /*
+        escriptor.length1 = 0x0;
+        descriptor.pointer1 = NULL;
+        */
+        descriptor.length2 = des->ivlen ;
+        descriptor.pointer2 = (byte *)des->iv ;
+        descriptor.length3 = des->keylen ;
+        descriptor.pointer3 = (byte *)des->key;
+        descriptor.length4 = size;
+        descriptor.pointer4 = (byte *)in ;
+        descriptor.length5 = size;
+        descriptor.pointer5 = DesBuffer ;
+        /*
+        descriptor.length6 = 0; 
+        descriptor.pointer6 = NULL; 
+        descriptor.length7 = 0x0;
+        descriptor.pointer7 = NULL;
+        descriptor.nextDescriptorPtr = NULL ; 
+        */
+        
+        /* Initialize SEC and wait for encryption to complete */
+        MCF_SEC_CCCR0 = 0x0000001A; //enable channel done notification
+
+        /* Point SEC to the location of the descriptor */
+        MCF_SEC_FR0 = (uint32)&descriptor;  
+                
+        /* poll SISR to determine when channel is complete */
+        while (!(MCF_SEC_SISRL) && !(MCF_SEC_SISRH))
+            ;   
+            
+        for(v=0; v<500; v++) ; 
+
+        ret = MCF_SEC_SISRH;
+        stat1 = MCF_SEC_DSR ;   
+        stat2 = MCF_SEC_DISR ;
+        if(ret & 0xe0000000)
+            db_printf("Des_Cbc(%x):ISRH=%08x, DSR=%08x, DISR=%08x\n", desc, ret, stat1, stat2) ;
+
+        XMEMCPY(out, DesBuffer, size) ;
+
+        if((desc==SEC_DESC_DES3_CBC_ENCRYPT)||(desc==SEC_DESC_DES_CBC_ENCRYPT)) {
+            XMEMCPY((void*)des->iv, (void*)&(out[size-DES_IVLEN]), DES_IVLEN) ;
+        } else {
+            XMEMCPY((void*)des->iv, (void*)&(in[size-DES_IVLEN]), DES_IVLEN) ;
+        }
+        
+        in  += size ;   
+        out += size ;
+                
+    }
+}
+
+
+void Des_CbcEncrypt(Des* des, byte* out, const byte* in, word32 sz)
+{
+    Des_Cbc(des, out, in, sz, SEC_DESC_DES_CBC_ENCRYPT) ;
+}
+
+void Des_CbcDecrypt(Des* des, byte* out, const byte* in, word32 sz)
+{
+    Des_Cbc(des, out, in, sz, SEC_DESC_DES_CBC_DECRYPT) ;
+}
+
+void Des3_CbcEncrypt(Des3* des3, byte* out, const byte* in, word32 sz)
+{
+    Des_Cbc((Des *)des3, out, in, sz, SEC_DESC_DES3_CBC_ENCRYPT) ;
+}
+
+void Des3_CbcDecrypt(Des3* des3, byte* out, const byte* in, word32 sz)
+{
+    Des_Cbc((Des *)des3, out, in, sz, SEC_DESC_DES3_CBC_DECRYPT) ;
+}
+
+
+void Des_SetKey(Des* des, const byte* key, const byte* iv, int dir)
+{
+    int i ; int status ;
+    
+    if(DesBuffer == NULL) {
+        status = tx_byte_allocate(&mp_ncached,(void *)&DesBuffer,DES_BUFFER_SIZE,TX_NO_WAIT);       
+    }
+    
+    XMEMCPY(des->key, key, DES_KEYLEN);
+    des->keylen = DES_KEYLEN ;
+    des->ivlen = 0 ;      
+    if (iv) {
+        XMEMCPY(des->iv, iv, DES_IVLEN);
+        des->ivlen = DES_IVLEN ;
+    }   else {
+        for(i=0; iiv[i] = 0x0 ;
+    }
+
+}
+
+void Des3_SetKey(Des3* des3, const byte* key, const byte* iv, int dir)
+{
+    int i ; int status ;
+    
+    if(DesBuffer == NULL) {
+        status = tx_byte_allocate(&mp_ncached,(void *)&DesBuffer,DES_BUFFER_SIZE,TX_NO_WAIT);       
+    }
+    
+    XMEMCPY(des3->key, key, DES3_KEYLEN);  
+    des3->keylen = DES3_KEYLEN ;   
+    des3->ivlen = 0 ;         
+    if (iv) {
+        XMEMCPY(des3->iv, iv, DES3_IVLEN);
+        des3->ivlen = DES3_IVLEN ;
+    }   else {
+        for(i=0; iiv[i] = 0x0 ;
+    }
+}
+
+#elif defined FREESCALE_MMCAU
+    /*
+     * Freescale mmCAU hardware DES/3DES support through the CAU/mmCAU library.
+     * Documentation located in ColdFire/ColdFire+ CAU and Kinetis mmCAU
+     * Software Library User Guide (See note in README).
+     */
+    #include "cau_api.h"
+
+    const unsigned char parityLookup[128] =
+    {
+        1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,
+        0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,
+        0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,
+        1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0
+     };
+
+    void Des_SetKey(Des* des, const byte* key, const byte* iv, int dir)
+    {
+        int i = 0;
+        byte* dkey = (byte*)des->key;
+
+        XMEMCPY(dkey, key, 8);
+
+        Des_SetIV(des, iv);
+
+        /* fix key parity, if needed */
+        for (i = 0; i < 8; i++) {
+            dkey[i] = ((dkey[i] & 0xFE) | parityLookup[dkey[i] >> 1]);
+        }
+    }
+
+    void Des3_SetKey(Des3* des, const byte* key, const byte* iv, int dir)
+    {
+        int i = 0;
+        byte* dkey1 = (byte*)des->key[0];
+        byte* dkey2 = (byte*)des->key[1];
+        byte* dkey3 = (byte*)des->key[2];
+
+        XMEMCPY(dkey1, key, 8);         /* set key 1 */
+        XMEMCPY(dkey2, key + 8, 8);     /* set key 2 */
+        XMEMCPY(dkey3, key + 16, 8);    /* set key 3 */
+
+        Des3_SetIV(des, iv);
+
+        /* fix key parity if needed */
+        for (i = 0; i < 8; i++)
+           dkey1[i] = ((dkey1[i] & 0xFE) | parityLookup[dkey1[i] >> 1]);
+
+        for (i = 0; i < 8; i++)
+           dkey2[i] = ((dkey2[i] & 0xFE) | parityLookup[dkey2[i] >> 1]);
+
+        for (i = 0; i < 8; i++)
+           dkey3[i] = ((dkey3[i] & 0xFE) | parityLookup[dkey3[i] >> 1]);
+    }
+
+    void Des_CbcEncrypt(Des* des, byte* out, const byte* in, word32 sz)
+    {
+        int i;
+        int offset = 0;
+        int len = sz;
+        byte *iv;
+        byte temp_block[DES_BLOCK_SIZE];
+
+        iv = (byte*)des->reg;
+
+        while (len > 0)
+        {
+            XMEMCPY(temp_block, in + offset, DES_BLOCK_SIZE);
+
+            /* XOR block with IV for CBC */
+            for (i = 0; i < DES_BLOCK_SIZE; i++)
+                temp_block[i] ^= iv[i];
+
+            cau_des_encrypt(temp_block, (byte*)des->key, out + offset);
+
+            len    -= DES_BLOCK_SIZE;
+            offset += DES_BLOCK_SIZE;
+
+            /* store IV for next block */
+            XMEMCPY(iv, out + offset - DES_BLOCK_SIZE, DES_BLOCK_SIZE);
+        }
+
+        return;
+    }
+
+    void Des_CbcDecrypt(Des* des, byte* out, const byte* in, word32 sz)
+    {
+        int i;
+        int offset = 0;
+        int len = sz;
+        byte* iv;
+        byte temp_block[DES_BLOCK_SIZE];
+
+        iv = (byte*)des->reg;
+
+        while (len > 0)
+        {
+            XMEMCPY(temp_block, in + offset, DES_BLOCK_SIZE);
+
+            cau_des_decrypt(in + offset, (byte*)des->key, out + offset);
+
+            /* XOR block with IV for CBC */
+            for (i = 0; i < DES_BLOCK_SIZE; i++)
+                (out + offset)[i] ^= iv[i];
+
+            /* store IV for next block */
+            XMEMCPY(iv, temp_block, DES_BLOCK_SIZE);
+
+            len     -= DES_BLOCK_SIZE;
+            offset += DES_BLOCK_SIZE;
+        }
+
+        return;
+    }
+
+    void Des3_CbcEncrypt(Des3* des, byte* out, const byte* in, word32 sz)
+    {
+        int i;
+        int offset = 0;
+        int len = sz;
+
+        byte *iv;
+        byte temp_block[DES_BLOCK_SIZE];
+
+        iv = (byte*)des->reg;
+
+        while (len > 0)
+        {
+            XMEMCPY(temp_block, in + offset, DES_BLOCK_SIZE);
+
+            /* XOR block with IV for CBC */
+            for (i = 0; i < DES_BLOCK_SIZE; i++)
+                temp_block[i] ^= iv[i];
+
+            cau_des_encrypt(temp_block  , (byte*)des->key[0], out + offset);
+            cau_des_decrypt(out + offset, (byte*)des->key[1], out + offset);
+            cau_des_encrypt(out + offset, (byte*)des->key[2], out + offset);
+
+            len    -= DES_BLOCK_SIZE;
+            offset += DES_BLOCK_SIZE;
+
+            /* store IV for next block */
+            XMEMCPY(iv, out + offset - DES_BLOCK_SIZE, DES_BLOCK_SIZE);
+        }
+
+        return;
+    }
+
+    void Des3_CbcDecrypt(Des3* des, byte* out, const byte* in, word32 sz)
+    {
+        int i;
+        int offset = 0;
+        int len = sz;
+
+        byte* iv;
+        byte temp_block[DES_BLOCK_SIZE];
+
+        iv = (byte*)des->reg;
+
+        while (len > 0)
+        {
+            XMEMCPY(temp_block, in + offset, DES_BLOCK_SIZE);
+
+            cau_des_decrypt(in + offset , (byte*)des->key[2], out + offset);
+            cau_des_encrypt(out + offset, (byte*)des->key[1], out + offset);
+            cau_des_decrypt(out + offset, (byte*)des->key[0], out + offset);
+
+            /* XOR block with IV for CBC */
+            for (i = 0; i < DES_BLOCK_SIZE; i++)
+                (out + offset)[i] ^= iv[i];
+
+            /* store IV for next block */
+            XMEMCPY(iv, temp_block, DES_BLOCK_SIZE);
+
+            len    -= DES_BLOCK_SIZE;
+            offset += DES_BLOCK_SIZE;
+        }
+
+        return;
+    }
+
+
+#elif defined(CYASSL_PIC32MZ_CRYPT)
+
+    #include "../../cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h"
+
+void Des_SetIV(Des* des, const byte* iv);
+void Des3_SetIV(Des3* des, const byte* iv);
+
+    void Des_SetKey(Des* des, const byte* key, const byte* iv, int dir)
+    {
+        word32 *dkey = des->key ;
+        word32 *dreg = des->reg ;
+
+        XMEMCPY((byte *)dkey, (byte *)key, 8);
+        ByteReverseWords(dkey, dkey, 8);
+        XMEMCPY((byte *)dreg, (byte *)iv, 8);
+        ByteReverseWords(dreg, dreg, 8);
+    }
+
+    void Des3_SetKey(Des3* des, const byte* key, const byte* iv, int dir)
+    {
+        word32 *dkey1 = des->key[0];
+        word32 *dreg = des->reg ;
+
+        XMEMCPY(dkey1, key, 24);
+        ByteReverseWords(dkey1, dkey1, 24);
+        XMEMCPY(dreg, iv, 8);
+        ByteReverseWords(dreg, dreg, 8) ;
+
+    }
+
+    void DesCrypt(word32 *key, word32 *iv, byte* out, const byte* in, word32 sz,
+                  int dir, int algo, int cryptoalgo)
+    {
+        securityAssociation *sa_p ;
+        bufferDescriptor *bd_p ;
+        const byte *in_p, *in_l ;
+        byte *out_p, *out_l ;
+        volatile securityAssociation sa __attribute__((aligned (8)));
+        volatile bufferDescriptor bd __attribute__((aligned (8)));
+        volatile int k ;
+        
+        /* get uncached address */
+
+        in_l = in;
+        out_l = out ;
+        sa_p = KVA0_TO_KVA1(&sa) ; 
+        bd_p = KVA0_TO_KVA1(&bd) ;
+        in_p = KVA0_TO_KVA1(in_l) ;
+        out_p= KVA0_TO_KVA1(out_l);
+        
+        if(PIC32MZ_IF_RAM(in_p))
+            XMEMCPY((void *)in_p, (void *)in, sz);
+        XMEMSET((void *)out_p, 0, sz);
+
+        /* Set up the Security Association */
+        XMEMSET((byte *)KVA0_TO_KVA1(&sa), 0, sizeof(sa));
+        sa_p->SA_CTRL.ALGO = algo ; 
+        sa_p->SA_CTRL.LNC = 1;
+        sa_p->SA_CTRL.LOADIV = 1;
+        sa_p->SA_CTRL.FB = 1;
+        sa_p->SA_CTRL.ENCTYPE = dir ; /* Encryption/Decryption */
+        sa_p->SA_CTRL.CRYPTOALGO = cryptoalgo;
+        sa_p->SA_CTRL.KEYSIZE = 1 ; /* KEY is 192 bits */
+        XMEMCPY((byte *)KVA0_TO_KVA1(&sa.SA_ENCKEY[algo==PIC32_ALGO_TDES ? 2 : 6]),
+                (byte *)key, algo==PIC32_ALGO_TDES ? 24 : 8);
+        XMEMCPY((byte *)KVA0_TO_KVA1(&sa.SA_ENCIV[2]), (byte *)iv, 8);
+
+        XMEMSET((byte *)KVA0_TO_KVA1(&bd), 0, sizeof(bd));
+        /* Set up the Buffer Descriptor */
+        bd_p->BD_CTRL.BUFLEN = sz;
+        bd_p->BD_CTRL.LIFM = 1;
+        bd_p->BD_CTRL.SA_FETCH_EN = 1;
+        bd_p->BD_CTRL.LAST_BD = 1;
+        bd_p->BD_CTRL.DESC_EN = 1;
+    
+        bd_p->SA_ADDR = (unsigned int)KVA_TO_PA(&sa) ; // (unsigned int)sa_p  ;
+        bd_p->SRCADDR = (unsigned int)KVA_TO_PA(in) ; // (unsigned int)in_p  ;
+        bd_p->DSTADDR = (unsigned int)KVA_TO_PA(out); // (unsigned int)out_p  ;
+        bd_p->NXTPTR = (unsigned int)KVA_TO_PA(&bd);
+        bd_p->MSGLEN = sz ;
+        
+        /* Fire in the hole! */
+        CECON = 1 << 6;
+        while (CECON);
+        
+        /* Run the engine */
+        CEBDPADDR = (unsigned int)KVA_TO_PA(&bd) ; // (unsigned int)bd_p ;
+        CEINTEN = 0x07;
+        CECON = 0x27;
+
+        WAIT_ENGINE ;
+
+        if((cryptoalgo == PIC32_CRYPTOALGO_CBC) ||
+           (cryptoalgo == PIC32_CRYPTOALGO_TCBC)||
+           (cryptoalgo == PIC32_CRYPTOALGO_RCBC)) {
+            /* set iv for the next call */
+            if(dir == PIC32_ENCRYPTION) {
+	        XMEMCPY((void *)iv, (void*)&(out_p[sz-DES_IVLEN]), DES_IVLEN) ;
+	        } else {
+                ByteReverseWords((word32*)iv, (word32 *)&(in_p[sz-DES_IVLEN]), DES_IVLEN);
+	        }
+
+        }
+
+        ByteReverseWords((word32*)out, (word32 *)KVA0_TO_KVA1(out), sz);
+    }
+
+    void Des_CbcEncrypt(Des* des, byte* out, const byte* in, word32 sz)
+    {
+        DesCrypt(des->key, des->reg, out, in, sz, 
+                PIC32_ENCRYPTION, PIC32_ALGO_DES, PIC32_CRYPTOALGO_CBC );
+    }
+
+    void Des_CbcDecrypt(Des* des, byte* out, const byte* in, word32 sz)
+    {
+        DesCrypt(des->key, des->reg, out, in, sz, 
+                PIC32_DECRYPTION, PIC32_ALGO_DES, PIC32_CRYPTOALGO_CBC);
+    }
+
+    void Des3_CbcEncrypt(Des3* des, byte* out, const byte* in, word32 sz)
+    {
+        DesCrypt(des->key[0], des->reg, out, in, sz, 
+                PIC32_ENCRYPTION, PIC32_ALGO_TDES, PIC32_CRYPTOALGO_TCBC);
+    }
+
+    void Des3_CbcDecrypt(Des3* des, byte* out, const byte* in, word32 sz)
+    {
+        DesCrypt(des->key[0], des->reg, out, in, sz, 
+                PIC32_DECRYPTION, PIC32_ALGO_TDES, PIC32_CRYPTOALGO_TCBC);
+    }
+
 #else /* CTaoCrypt software implementation */
 
 /* permuted choice table (key) */
diff --git a/ctaocrypt/src/hmac.c b/ctaocrypt/src/hmac.c
index 003eb6317..25c867997 100644
--- a/ctaocrypt/src/hmac.c
+++ b/ctaocrypt/src/hmac.c
@@ -27,6 +27,22 @@
 
 #ifndef NO_HMAC
 
+#ifdef CYASSL_PIC32MZ_HASH
+
+#define InitMd5   InitMd5_sw
+#define Md5Update Md5Update_sw
+#define Md5Final  Md5Final_sw
+
+#define InitSha   InitSha_sw
+#define ShaUpdate ShaUpdate_sw
+#define ShaFinal  ShaFinal_sw
+
+#define InitSha256   InitSha256_sw
+#define Sha256Update Sha256Update_sw
+#define Sha256Final  Sha256Final_sw
+
+#endif
+
 #include 
 #include 
 
@@ -86,7 +102,6 @@ static int InitHmac(Hmac* hmac, int type)
         
         default:
             return BAD_FUNC_ARG;
-        break;
     }
 
     return 0;
diff --git a/ctaocrypt/src/port/pic32/pic32mz-hash.c b/ctaocrypt/src/port/pic32/pic32mz-hash.c
new file mode 100644
index 000000000..fe2c1f3e4
--- /dev/null
+++ b/ctaocrypt/src/port/pic32/pic32mz-hash.c
@@ -0,0 +1,243 @@
+/* pic32mz-hash.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+
+#ifdef CYASSL_PIC32MZ_HASH
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#if !defined(NO_MD5) && !defined(NO_SHA) && !defined(NO_SHA256)
+
+static void reset_engine(pic32mz_desc *desc_l, int algo)
+{
+    pic32mz_desc *desc ;
+    desc = KVA0_TO_KVA1(desc_l) ;
+
+    CECON = 1 << 6;
+    while (CECON);
+
+    /* Make sure everything is clear first before we make settings. */
+    XMEMSET((void *)KVA0_TO_KVA1(&desc->sa), 0, sizeof(desc->sa));
+    XMEMSET((void *)KVA0_TO_KVA1(&desc->bd[0]), 0, sizeof(desc->bd[0]));
+    XMEMSET((void *)KVA0_TO_KVA1(&desc->bd[1]), 0, sizeof(desc->bd[1]));
+
+    /* Set up the security association */
+    desc->sa.SA_CTRL.ALGO = algo ;
+    desc->sa.SA_CTRL.LNC = 1;
+    desc->sa.SA_CTRL.FB = 1;
+    desc->sa.SA_CTRL.ENCTYPE = 1;
+    desc->sa.SA_CTRL.LOADIV = 1;
+
+    /* Set up the buffer descriptor */
+    desc->err = 0 ;
+    desc->bd[0].BD_CTRL.LAST_BD = 1;
+    desc->bd[0].BD_CTRL.LIFM = 1;
+    desc->bd[0].SA_ADDR = KVA_TO_PA(&desc->sa);
+    desc->bd[1].BD_CTRL.LAST_BD = 1;
+    desc->bd[1].BD_CTRL.LIFM = 1;
+    desc->bd[1].SA_ADDR = KVA_TO_PA(&desc->sa);
+    desc_l->bdCount = 0 ;
+    CEBDPADDR = KVA_TO_PA(&(desc->bd[0]));
+
+    CECON = 0x27;
+}
+
+#define PIC32MZ_IF_RAM(addr) (KVA_TO_PA(addr) < 0x80000)
+
+static void update_engine(pic32mz_desc *desc_l, const char *input, word32 len,
+                    word32 *hash)
+{
+    pic32mz_desc *desc ;
+    int i ;
+    int total ;
+    desc = KVA0_TO_KVA1(desc_l) ;
+
+    i = desc_l->bdCount ;
+    if(i >= PIC32MZ_MAX_BD) {
+        desc_l->err = 1 ;
+        return ;
+    }
+
+    if(PIC32MZ_IF_RAM(input))
+        XMEMCPY(KVA0_TO_KVA1(input), input, len) ; /* Sync phys with cache */
+    desc->bd[i].SRCADDR = KVA_TO_PA(input);
+    /* Finally, turn on the buffer descriptor */
+    if (len % 4)
+         desc->bd[i].BD_CTRL.BUFLEN = (len + 4) - (len % 4);
+    else desc->bd[i].BD_CTRL.BUFLEN =  len ;
+
+    if(i == 0) {
+        desc->bd[i].MSGLEN =  len ;
+        desc->bd[i].BD_CTRL.SA_FETCH_EN = 1;
+    } else {
+        desc->bd[i-1].NXTPTR  = KVA_TO_PA(&(desc->bd[i])) ;
+        desc->bd[i].BD_CTRL.DESC_EN = 1;
+        desc->bd[i-1].BD_CTRL.LAST_BD = 0 ;
+        desc->bd[i-1].BD_CTRL.LIFM    = 0 ;
+        total = desc->bd[i-1].MSGLEN + len ;
+        desc->bd[i].MSGLEN = total ;
+        desc->bd[i-1].MSGLEN = total ;
+    }
+    desc->bd[i].UPDPTR = KVA_TO_PA(hash);
+    desc_l->bdCount ++ ;
+
+    #ifdef DEBUG_CYASSL
+    printf("Input[bd=%d, len=%d]:%x->\"%s\"\n", desc_l->bdCount, len, input, input) ;
+    print_mem(input, len+4) ;
+    #endif
+}
+
+static void start_engine(pic32mz_desc *desc) {
+    bufferDescriptor *hash_bd[2] ;
+    hash_bd[0] = (bufferDescriptor *)KVA0_TO_KVA1(&(desc->bd[0])) ;
+    hash_bd[0]->BD_CTRL.DESC_EN = 1;
+}
+
+void wait_engine(pic32mz_desc *desc, char *hash, int hash_sz) {
+    unsigned int i;
+    unsigned int *intptr;
+#undef DEBUG_CYASSL
+    #ifdef DEBUG_CYASSL
+    printf("desc(%x)[bd:%d * 2, sz:%d]\n", desc, sizeof(desc->bd[0]),
+                                                 sizeof(desc->sa) );
+    print_mem(KVA0_TO_KVA1(&(desc->bd[0])), sizeof(desc->bd[0])) ;
+    print_mem(KVA0_TO_KVA1(&(desc->bd[1])), sizeof(desc->bd[0])) ;
+    #endif
+
+    WAIT_ENGINE ;
+    
+    XMEMCPY(hash, KVA0_TO_KVA1(hash), hash_sz) ;
+
+    #ifdef DEBUG_CYASSL
+    print_mem(KVA0_TO_KVA1(hash), hash_sz) ;
+    print_mem(             hash , hash_sz) ;
+    #endif
+    for (i = 0, intptr = (unsigned int *)hash; i < hash_sz/sizeof(unsigned int);
+                                                                  i++, intptr++)
+    {
+        *intptr = ntohl(*intptr);
+    }
+}
+
+static int fillBuff(char *buff, int *bufflen, const char *data, int len, int blocksz)
+{
+    int room, copysz ;
+
+    room = blocksz - *bufflen ;
+    copysz = (len <= room) ? len : room ;
+    XMEMCPY(buff, data, copysz) ;
+    *bufflen += copysz ;
+    return (*bufflen == blocksz) ? 1 : 0 ;
+}
+
+#endif
+
+#ifndef NO_MD5
+void InitMd5(Md5* md5)
+{
+    CYASSL_ENTER("InitMd5\n") ;
+    XMEMSET((void *)md5, 0xcc, sizeof(Md5)) ;
+    XMEMSET((void *)KVA0_TO_KVA1(md5), 0xcc, sizeof(Md5)) ;
+    reset_engine(&(md5->desc), PIC32_ALGO_MD5) ;
+
+}
+
+void Md5Update(Md5* md5, const byte* data, word32 len)
+{
+     CYASSL_ENTER("Md5Update\n") ;
+     update_engine(&(md5->desc), data, len, md5->digest) ;
+}
+
+void Md5Final(Md5* md5, byte* hash)
+{
+     CYASSL_ENTER("Md5Final\n") ;
+    start_engine(&(md5->desc)) ;
+    wait_engine(&(md5->desc), (char *)md5->digest, MD5_HASH_SIZE) ;
+    XMEMCPY(hash, md5->digest, MD5_HASH_SIZE) ;
+    InitMd5(md5);  /* reset state */
+}
+#endif
+
+#ifndef NO_SHA
+void InitSha(Sha* sha)
+{
+    CYASSL_ENTER("InitSha\n") ;
+    XMEMSET((void *)sha, 0xcc, sizeof(Sha)) ;
+    XMEMSET((void *)KVA0_TO_KVA1(sha), 0xcc, sizeof(Sha)) ;
+    reset_engine(&(sha->desc), PIC32_ALGO_SHA1) ;
+}
+
+void ShaUpdate(Sha* sha, const byte* data, word32 len)
+{
+    CYASSL_ENTER("ShaUpdate\n") ;
+    update_engine(&(sha->desc), data, len, sha->digest) ;
+}
+
+void ShaFinal(Sha* sha, byte* hash)
+{
+    CYASSL_ENTER("ShaFinal\n") ;
+    start_engine(&(sha->desc)) ;
+    wait_engine(&(sha->desc), (char *)sha->digest, SHA1_HASH_SIZE) ;
+    XMEMCPY(hash, sha->digest, SHA1_HASH_SIZE) ;
+
+    InitSha(sha);  /* reset state */
+}
+#endif /* NO_SHA */
+
+#ifndef NO_SHA256
+void InitSha256(Sha256* sha256)
+{
+    CYASSL_ENTER("InitSha256\n") ;
+    XMEMSET((void *)sha256, 0xcc, sizeof(Sha256)) ;
+    XMEMSET((void *)KVA0_TO_KVA1(sha256), 0xcc, sizeof(Sha256)) ;
+    reset_engine(&(sha256->desc), PIC32_ALGO_SHA256) ;
+}
+
+void Sha256Update(Sha256* sha256, const byte* data, word32 len)
+{
+    CYASSL_ENTER("Sha256Update\n") ;
+    update_engine(&(sha256->desc), data, len, sha256->digest) ;
+}
+
+void Sha256Final(Sha256* sha256, byte* hash)
+{
+    CYASSL_ENTER("Sha256Final\n") ;
+    start_engine(&(sha256->desc)) ;
+    wait_engine(&(sha256->desc), (char *)sha256->digest, SHA256_HASH_SIZE) ;
+    XMEMCPY(hash, sha256->digest, SHA256_HASH_SIZE) ;
+    InitSha256(sha256);  /* reset state */
+}
+#endif /* NO_SHA256 */
+
+#endif
+
+
+
diff --git a/ctaocrypt/src/sha.c b/ctaocrypt/src/sha.c
index 20d2261f5..88d76d8e4 100644
--- a/ctaocrypt/src/sha.c
+++ b/ctaocrypt/src/sha.c
@@ -26,7 +26,13 @@
 
 #include 
 
-#ifndef NO_SHA
+#if !defined(NO_SHA)
+
+#ifdef CYASSL_PIC32MZ_HASH
+#define InitSha   InitSha_sw
+#define ShaUpdate ShaUpdate_sw
+#define ShaFinal  ShaFinal_sw
+#endif
 
 #include 
 #ifdef NO_INLINE
@@ -35,6 +41,13 @@
     #include 
 #endif
 
+#ifdef FREESCALE_MMCAU
+    #include "cau_api.h"
+    #define XTRANSFORM(S,B)  cau_sha1_hash_n((B), 1, ((S))->digest)
+#else
+    #define XTRANSFORM(S,B)  Transform((S))
+#endif
+
 
 #ifdef STM32F2_HASH
     /*
@@ -164,17 +177,23 @@
 
 void InitSha(Sha* sha)
 {
-    sha->digest[0] = 0x67452301L;
-    sha->digest[1] = 0xEFCDAB89L;
-    sha->digest[2] = 0x98BADCFEL;
-    sha->digest[3] = 0x10325476L;
-    sha->digest[4] = 0xC3D2E1F0L;
+    #ifdef FREESCALE_MMCAU
+        cau_sha1_initialize_output(sha->digest);
+    #else
+        sha->digest[0] = 0x67452301L;
+        sha->digest[1] = 0xEFCDAB89L;
+        sha->digest[2] = 0x98BADCFEL;
+        sha->digest[3] = 0x10325476L;
+        sha->digest[4] = 0xC3D2E1F0L;
+    #endif
 
     sha->buffLen = 0;
     sha->loLen   = 0;
     sha->hiLen   = 0;
 }
 
+#ifndef FREESCALE_MMCAU
+
 #define blk0(i) (W[i] = sha->buffer[i])
 #define blk1(i) (W[i&15] = \
                    rotlFixed(W[(i+13)&15]^W[(i+8)&15]^W[(i+2)&15]^W[i&15],1))
@@ -272,6 +291,8 @@ static void Transform(Sha* sha)
     sha->digest[4] += e;
 }
 
+#endif /* FREESCALE_MMCAU */
+
 
 static INLINE void AddLength(Sha* sha, word32 len)
 {
@@ -295,10 +316,10 @@ void ShaUpdate(Sha* sha, const byte* data, word32 len)
         len          -= add;
 
         if (sha->buffLen == SHA_BLOCK_SIZE) {
-            #ifdef LITTLE_ENDIAN_ORDER
+            #if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
                 ByteReverseBytes(local, local, SHA_BLOCK_SIZE);
             #endif
-            Transform(sha);
+            XTRANSFORM(sha, local);
             AddLength(sha, SHA_BLOCK_SIZE);
             sha->buffLen = 0;
         }
@@ -310,7 +331,7 @@ void ShaFinal(Sha* sha, byte* hash)
 {
     byte* local = (byte*)sha->buffer;
 
-    AddLength(sha, sha->buffLen);               /* before adding pads */
+    AddLength(sha, sha->buffLen);  /* before adding pads */
 
     local[sha->buffLen++] = 0x80;  /* add 1 */
 
@@ -319,10 +340,10 @@ void ShaFinal(Sha* sha, byte* hash)
         XMEMSET(&local[sha->buffLen], 0, SHA_BLOCK_SIZE - sha->buffLen);
         sha->buffLen += SHA_BLOCK_SIZE - sha->buffLen;
 
-        #ifdef LITTLE_ENDIAN_ORDER
+        #if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
             ByteReverseBytes(local, local, SHA_BLOCK_SIZE);
         #endif
-        Transform(sha);
+        XTRANSFORM(sha, local);
         sha->buffLen = 0;
     }
     XMEMSET(&local[sha->buffLen], 0, SHA_PAD_SIZE - sha->buffLen);
@@ -333,14 +354,20 @@ void ShaFinal(Sha* sha, byte* hash)
     sha->loLen = sha->loLen << 3;
 
     /* store lengths */
-    #ifdef LITTLE_ENDIAN_ORDER
+    #if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
         ByteReverseBytes(local, local, SHA_BLOCK_SIZE);
     #endif
     /* ! length ordering dependent on digest endian type ! */
     XMEMCPY(&local[SHA_PAD_SIZE], &sha->hiLen, sizeof(word32));
     XMEMCPY(&local[SHA_PAD_SIZE + sizeof(word32)], &sha->loLen, sizeof(word32));
 
-    Transform(sha);
+    #ifdef FREESCALE_MMCAU
+        /* Kinetis requires only these bytes reversed */
+        ByteReverseBytes(&local[SHA_PAD_SIZE], &local[SHA_PAD_SIZE],
+                2 * sizeof(word32));
+    #endif
+
+    XTRANSFORM(sha, local);
     #ifdef LITTLE_ENDIAN_ORDER
         ByteReverseWords(sha->digest, sha->digest, SHA_DIGEST_SIZE);
     #endif
diff --git a/ctaocrypt/src/sha256.c b/ctaocrypt/src/sha256.c
index baa379059..b551ff484 100644
--- a/ctaocrypt/src/sha256.c
+++ b/ctaocrypt/src/sha256.c
@@ -28,7 +28,13 @@
 
 #include 
 
-#ifndef NO_SHA256
+#if !defined(NO_SHA256)
+
+#ifdef CYASSL_PIC32MZ_HASH
+#define InitSha256   InitSha256_sw
+#define Sha256Update Sha256Update_sw
+#define Sha256Final  Sha256Final_sw
+#endif
 
 #include 
 #ifdef NO_INLINE
@@ -37,6 +43,13 @@
     #include 
 #endif
 
+#ifdef FREESCALE_MMCAU
+    #include "cau_api.h"
+    #define XTRANSFORM(S,B)  cau_sha256_hash_n((B), 1, ((S))->digest)
+#else
+    #define XTRANSFORM(S,B)  Transform((S))
+#endif
+
 
 #ifndef min
 
@@ -50,20 +63,26 @@
 
 void InitSha256(Sha256* sha256)
 {
-    sha256->digest[0] = 0x6A09E667L;
-    sha256->digest[1] = 0xBB67AE85L;
-    sha256->digest[2] = 0x3C6EF372L;
-    sha256->digest[3] = 0xA54FF53AL;
-    sha256->digest[4] = 0x510E527FL;
-    sha256->digest[5] = 0x9B05688CL;
-    sha256->digest[6] = 0x1F83D9ABL;
-    sha256->digest[7] = 0x5BE0CD19L;
+    #ifdef FREESCALE_MMCAU
+        cau_sha256_initialize_output(sha256->digest);
+    #else
+        sha256->digest[0] = 0x6A09E667L;
+        sha256->digest[1] = 0xBB67AE85L;
+        sha256->digest[2] = 0x3C6EF372L;
+        sha256->digest[3] = 0xA54FF53AL;
+        sha256->digest[4] = 0x510E527FL;
+        sha256->digest[5] = 0x9B05688CL;
+        sha256->digest[6] = 0x1F83D9ABL;
+        sha256->digest[7] = 0x5BE0CD19L;
+    #endif
 
     sha256->buffLen = 0;
     sha256->loLen   = 0;
     sha256->hiLen   = 0;
 }
 
+#ifndef FREESCALE_MMCAU
+
 static const word32 K[64] = {
     0x428A2F98L, 0x71374491L, 0xB5C0FBCFL, 0xE9B5DBA5L, 0x3956C25BL,
     0x59F111F1L, 0x923F82A4L, 0xAB1C5ED5L, 0xD807AA98L, 0x12835B01L,
@@ -128,6 +147,8 @@ static void Transform(Sha256* sha256)
     }
 }
 
+#endif /* FREESCALE_MMCAU */
+
 
 static INLINE void AddLength(Sha256* sha256, word32 len)
 {
@@ -151,10 +172,10 @@ void Sha256Update(Sha256* sha256, const byte* data, word32 len)
         len             -= add;
 
         if (sha256->buffLen == SHA256_BLOCK_SIZE) {
-            #ifdef LITTLE_ENDIAN_ORDER
+            #if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
                 ByteReverseBytes(local, local, SHA256_BLOCK_SIZE);
             #endif
-            Transform(sha256);
+            XTRANSFORM(sha256, local);
             AddLength(sha256, SHA256_BLOCK_SIZE);
             sha256->buffLen = 0;
         }
@@ -168,17 +189,17 @@ void Sha256Final(Sha256* sha256, byte* hash)
 
     AddLength(sha256, sha256->buffLen);  /* before adding pads */
 
-    local[sha256->buffLen++] = 0x80;  /* add 1 */
+    local[sha256->buffLen++] = 0x80;     /* add 1 */
 
     /* pad with zeros */
     if (sha256->buffLen > SHA256_PAD_SIZE) {
         XMEMSET(&local[sha256->buffLen], 0, SHA256_BLOCK_SIZE - sha256->buffLen);
         sha256->buffLen += SHA256_BLOCK_SIZE - sha256->buffLen;
 
-        #ifdef LITTLE_ENDIAN_ORDER
+        #if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
             ByteReverseBytes(local, local, SHA256_BLOCK_SIZE);
         #endif
-        Transform(sha256);
+        XTRANSFORM(sha256, local);
         sha256->buffLen = 0;
     }
     XMEMSET(&local[sha256->buffLen], 0, SHA256_PAD_SIZE - sha256->buffLen);
@@ -189,7 +210,7 @@ void Sha256Final(Sha256* sha256, byte* hash)
     sha256->loLen = sha256->loLen << 3;
 
     /* store lengths */
-    #ifdef LITTLE_ENDIAN_ORDER
+    #if defined(LITTLE_ENDIAN_ORDER) && !defined(FREESCALE_MMCAU)
         ByteReverseBytes(local, local, SHA256_BLOCK_SIZE);
     #endif
     /* ! length ordering dependent on digest endian type ! */
@@ -197,7 +218,13 @@ void Sha256Final(Sha256* sha256, byte* hash)
     XMEMCPY(&local[SHA256_PAD_SIZE + sizeof(word32)], &sha256->loLen,
             sizeof(word32));
 
-    Transform(sha256);
+    #ifdef FREESCALE_MMCAU
+        /* Kinetis requires only these bytes reversed */
+        ByteReverseBytes(&local[SHA256_PAD_SIZE], &local[SHA256_PAD_SIZE],
+                2 * sizeof(word32));
+    #endif
+
+    XTRANSFORM(sha256, local);
     #ifdef LITTLE_ENDIAN_ORDER
         ByteReverseWords(sha256->digest, sha256->digest, SHA256_DIGEST_SIZE);
     #endif
diff --git a/cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h b/cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h
new file mode 100644
index 000000000..e52b7d584
--- /dev/null
+++ b/cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h
@@ -0,0 +1,88 @@
+/* pic32mz-crypt.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifndef PIC32MZ_CRYPT_H
+#define PIC32MZ_CRYPT_H
+
+#ifdef  CYASSL_PIC32MZ_CRYPT
+
+#define MICROCHIP_PIC32
+#include 
+#include 
+#include 
+#include "../../../../mplabx/crypto.h"
+
+
+#define PIC32_ENCRYPTION      0b1
+#define PIC32_DECRYPTION      0b0
+
+#define PIC32_ALGO_HMAC1     0b01000000
+#define PIC32_ALGO_SHA256    0b00100000
+#define PIC32_ALGO_SHA1      0b00010000
+#define PIC32_ALGO_MD5       0b00001000
+#define PIC32_ALGO_AES       0b00000100
+#define PIC32_ALGO_TDES      0b00000010
+#define PIC32_ALGO_DES       0b00000001
+
+#define PIC32_CRYPTOALGO_AES_GCM 0b1110
+#define PIC32_CRYPTOALGO_RCTR    0b1101
+#define PIC32_CRYPTOALGO_RCBC    0b1001
+#define PIC32_CRYPTOALGO_REBC    0b1000
+#define PIC32_CRYPTOALGO_TCBC    0b0101
+#define PIC32_CRYPTOALGO_CBC     0b0001
+
+#define PIC32_AES_KEYSIZE_256     0b10
+#define PIC32_AES_KEYSIZE_192     0b01
+#define PIC32_AES_KEYSIZE_128     0b00
+
+#define PIC32_AES_BLOCK_SIZE 16
+#define MD5_HASH_SIZE 16
+#define SHA1_HASH_SIZE 20
+#define SHA256_HASH_SIZE 32
+#define PIC32_HASH_SIZE 32
+
+#define PIC32MZ_MAX_BD   2
+typedef struct {      /* Crypt Engine descripter */
+    int bdCount ;
+    int err   ;
+    volatile bufferDescriptor 
+        bd[PIC32MZ_MAX_BD] __attribute__((aligned (8), coherent));
+    securityAssociation 
+        sa                 __attribute__((aligned (8), coherent));
+} pic32mz_desc ;
+
+#define PIC32MZ_IF_RAM(addr) (KVA_TO_PA(addr) < 0x80000)
+
+#define WAIT_ENGINE \
+    { volatile int v ; while (CESTATbits.ACTIVE) ; for(v=0; v<100; v++) ; }
+
+#ifdef DEBUG_CYASSL
+static void print_mem(const unsigned char *p, int size) {
+    for(; size>0; size--, p++) {
+        if(size%4 == 0)printf(" ") ;
+            printf("%02x", (int)*p) ;
+    }
+    puts("") ;
+}
+#endif
+
+#endif
+#endif /* PIC32MZ_CRYPT_H */

From 65dc202356cc9fa8e63d85d2c0e2173771371e54 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 4 Mar 2014 22:57:51 +0900
Subject: [PATCH 33/43] settings.h for Harmony

---
 cyassl/ctaocrypt/settings.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cyassl/ctaocrypt/settings.h b/cyassl/ctaocrypt/settings.h
index 31a596df3..ed6a4eb3e 100644
--- a/cyassl/ctaocrypt/settings.h
+++ b/cyassl/ctaocrypt/settings.h
@@ -148,10 +148,10 @@
 
 #ifdef MICROCHIP_TCPIP
     /* include timer, NTP functions */
-    #include "system/system_services.h"
     #ifdef MICROCHIP_MPLAB_HARMONY
         #include "tcpip/tcpip.h"
     #else
+        #include "system/system_services.h"
         #include "tcpip/sntp.h"
     #endif
 #endif

From a12fe607237d2e7329c5fae39fcb4a13711cb8ce Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Mon, 10 Mar 2014 10:46:40 +0900
Subject: [PATCH 34/43] Add AES-Counter to benchmark.c

---
 .gitignore                      | 11 +++++
 ctaocrypt/benchmark/benchmark.c | 83 +++++++++++++++++++++++----------
 2 files changed, 69 insertions(+), 25 deletions(-)

diff --git a/.gitignore b/.gitignore
index d16360a27..0942fbf64 100644
--- a/.gitignore
+++ b/.gitignore
@@ -46,10 +46,17 @@ testsuite/*.pem
 testsuite/*.raw
 cert.der
 cert.pem
+certecc.der
+certecc.pem
 othercert.der
 othercert.pem
 key.der
 key.pem
+certreq.der
+certreq.pem
+pkcs7cert.der
+pkcs7signedData.der
+pkcs7envelopedData.der
 diff
 sslSniffer/sslSnifferTest/tracefile.txt
 *.gz
@@ -81,9 +88,13 @@ cov-int
 cyassl.tgz
 *.log
 *.trs
+IDE\MDK-ARM\Projects/
+IDE\MDK-ARM\STM32F2xx_StdPeriph_Lib/inc
+IDE\MDK-ARM\STM32F2xx_StdPeriph_Lib/src
 IDE\MDK-ARM\LPC43xx\Drivers/
 IDE\MDK-ARM\LPC43xx\LPC43xx/
 *.gcno
 *.gcda
 *.gcov
 
+Memo/
diff --git a/ctaocrypt/benchmark/benchmark.c b/ctaocrypt/benchmark/benchmark.c
index 2086aaf10..ae10bcf5e 100644
--- a/ctaocrypt/benchmark/benchmark.c
+++ b/ctaocrypt/benchmark/benchmark.c
@@ -85,6 +85,7 @@ void bench_rabbit(void);
 void bench_aes(int);
 void bench_aesgcm(void);
 void bench_aesccm(void);
+void bench_aesctr(void);
 void bench_camellia(void);
 
 void bench_md5(void);
@@ -155,6 +156,11 @@ int benchmark_test(void *args)
 #ifdef HAVE_AESGCM
     bench_aesgcm();
 #endif
+
+#ifdef CYASSL_AES_COUNTER
+    bench_aesctr();
+#endif
+
 #ifdef HAVE_AESCCM
     bench_aesccm();
 #endif
@@ -285,7 +291,7 @@ void bench_aes(int show)
 #endif
 
     if (show)
-        printf("AES      %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+        printf("AES      %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                                   blockType, total, persec);
 #ifdef HAVE_CAVIUM
     AesFreeCavium(&enc);
@@ -320,13 +326,40 @@ void bench_aesgcm(void)
     persec = persec / 1024;
 #endif
 
-    printf("AES-GCM  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("AES-GCM  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+                                              blockType, total, persec);
+}
+#endif
+
+#ifdef CYASSL_AES_COUNTER
+void bench_aesctr(void)
+{
+    Aes    enc;
+    double start, total, persec;
+    int    i;
+
+    AesSetKeyDirect(&enc, key, AES_BLOCK_SIZE, iv, AES_ENCRYPTION);
+    start = current_time(1);
+
+    for(i = 0; i < numBlocks; i++)
+        AesCtrEncrypt(&enc, plain, cipher, sizeof(plain));
+
+    total = current_time(0) - start;
+
+    persec = 1 / total * numBlocks;
+#ifdef BENCH_EMBEDDED
+    /* since using kB, convert to MB/s */
+    persec = persec / 1024;
+#endif
+
+    printf("AES-CTR  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
 
 
-#ifdef HAVE_AESCCM
+
+#ifdef CYASSL_AESCCM
 void bench_aesccm(void)
 {
     Aes    enc;
@@ -348,7 +381,7 @@ void bench_aesccm(void)
     persec = persec / 1024;
 #endif
 
-    printf("AES-CCM  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("AES-CCM  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -375,7 +408,7 @@ void bench_camellia(void)
     persec = persec / 1024;
 #endif
 
-    printf("Camellia %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("Camellia %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -406,7 +439,7 @@ void bench_des(void)
     persec = persec / 1024;
 #endif
 
-    printf("3DES     %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("3DES     %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 #ifdef HAVE_CAVIUM
     Des3_FreeCavium(&enc);
@@ -440,7 +473,7 @@ void bench_arc4(void)
     persec = persec / 1024;
 #endif
 
-    printf("ARC4     %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("ARC4     %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 #ifdef HAVE_CAVIUM
     Arc4FreeCavium(&enc);
@@ -469,7 +502,7 @@ void bench_hc128(void)
     persec = persec / 1024;
 #endif
 
-    printf("HC128    %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("HC128    %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif /* HAVE_HC128 */
@@ -495,7 +528,7 @@ void bench_rabbit(void)
     persec = persec / 1024;
 #endif
 
-    printf("RABBIT   %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("RABBIT   %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif /* NO_RABBIT */
@@ -524,7 +557,7 @@ void bench_md5(void)
     persec = persec / 1024;
 #endif
 
-    printf("MD5      %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("MD5      %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif /* NO_MD5 */
@@ -553,7 +586,7 @@ void bench_sha(void)
     persec = persec / 1024;
 #endif
 
-    printf("SHA      %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("SHA      %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif /* NO_SHA */
@@ -582,7 +615,7 @@ void bench_sha256(void)
     persec = persec / 1024;
 #endif
 
-    printf("SHA-256  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("SHA-256  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -610,7 +643,7 @@ void bench_sha512(void)
     persec = persec / 1024;
 #endif
 
-    printf("SHA-512  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("SHA-512  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -638,7 +671,7 @@ void bench_ripemd(void)
     persec = persec / 1024;
 #endif
 
-    printf("RIPEMD   %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("RIPEMD   %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -667,7 +700,7 @@ void bench_blake2(void)
     persec = persec / 1024;
 #endif
 
-    printf("BLAKE2b  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("BLAKE2b  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -749,7 +782,7 @@ void bench_rsa(void)
     each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
-    printf("RSA %d encryption took %6.2f milliseconds, avg over %d" 
+    printf("RSA %d encryption took %6.3f milliseconds, avg over %d"
            " iterations\n", rsaKeySz, milliEach, ntimes);
 
     if (ret < 0) {
@@ -768,7 +801,7 @@ void bench_rsa(void)
     each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
-    printf("RSA %d decryption took %6.2f milliseconds, avg over %d" 
+    printf("RSA %d decryption took %6.3f milliseconds, avg over %d"
            " iterations\n", rsaKeySz, milliEach, ntimes);
 
     FreeRsaKey(&rsaKey);
@@ -854,7 +887,7 @@ void bench_dh(void)
     each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
-    printf("DH  %d key generation  %6.2f milliseconds, avg over %d" 
+    printf("DH  %d key generation  %6.3f milliseconds, avg over %d"
            " iterations\n", dhKeySz, milliEach, ntimes);
 
     DhGenerateKeyPair(&dhKey, &rng, priv2, &privSz2, pub2, &pubSz2);
@@ -867,7 +900,7 @@ void bench_dh(void)
     each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
-    printf("DH  %d key agreement   %6.2f milliseconds, avg over %d" 
+    printf("DH  %d key agreement   %6.3f milliseconds, avg over %d"
            " iterations\n", dhKeySz, milliEach, ntimes);
 
 #if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048)
@@ -897,7 +930,7 @@ void bench_rsaKeyGen(void)
     each  = total / genTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
     printf("\n");
-    printf("RSA 1024 key generation  %6.2f milliseconds, avg over %d" 
+    printf("RSA 1024 key generation  %6.3f milliseconds, avg over %d"
            " iterations\n", milliEach, genTimes);
 
     /* 2048 bit */
@@ -912,7 +945,7 @@ void bench_rsaKeyGen(void)
     total = current_time(0) - start;
     each  = total / genTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
-    printf("RSA 2048 key generation  %6.2f milliseconds, avg over %d" 
+    printf("RSA 2048 key generation  %6.3f milliseconds, avg over %d"
            " iterations\n", milliEach, genTimes);
 }
 #endif /* CYASSL_KEY_GEN */
@@ -941,7 +974,7 @@ void bench_eccKeyGen(void)
     each  = total / genTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
     printf("\n");
-    printf("ECC  256 key generation  %6.2f milliseconds, avg over %d" 
+    printf("ECC  256 key generation  %6.3f milliseconds, avg over %d"
            " iterations\n", milliEach, genTimes);
 }
 
@@ -991,7 +1024,7 @@ void bench_eccKeyAgree(void)
     total = current_time(0) - start;
     each  = total / agreeTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
-    printf("EC-DHE   key agreement   %6.2f milliseconds, avg over %d" 
+    printf("EC-DHE   key agreement   %6.3f milliseconds, avg over %d"
            " iterations\n", milliEach, agreeTimes);
 
     /* make dummy digest */
@@ -1013,7 +1046,7 @@ void bench_eccKeyAgree(void)
     total = current_time(0) - start;
     each  = total / agreeTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
-    printf("EC-DSA   sign   time     %6.2f milliseconds, avg over %d" 
+    printf("EC-DSA   sign   time     %6.3f milliseconds, avg over %d"
            " iterations\n", milliEach, agreeTimes);
 
     start = current_time(1);
@@ -1030,7 +1063,7 @@ void bench_eccKeyAgree(void)
     total = current_time(0) - start;
     each  = total / agreeTimes;  /* per second  */
     milliEach = each * 1000;     /* millisconds */
-    printf("EC-DSA   verify time     %6.2f milliseconds, avg over %d" 
+    printf("EC-DSA   verify time     %6.3f milliseconds, avg over %d"
            " iterations\n", milliEach, agreeTimes);
 
     ecc_free(&genKey2);

From 6463d34fe79bfaa00703ee25fc580ee0b4ac4578 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 11 Mar 2014 10:59:09 +0900
Subject: [PATCH 35/43] Roll back native LwIP

---
 IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c               |  360 ---
 IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h               |   76 -
 IDE/IAR-EWARM/CyaSSL/https-nb.c               |  360 ---
 IDE/IAR-EWARM/CyaSSL/https-nb.h               |   76 -
 IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c            |  166 --
 IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.h            |  202 --
 .../Projects/CyaSSL-Lib/CyaSSL-Lib.ewp        | 2009 -----------------
 .../Projects/CyaSSL-Lib/CyaSSL-Lib.eww        |   10 -
 IDE/IAR-EWARM/Projects/client/client.ewp      | 1886 ----------------
 IDE/IAR-EWARM/Projects/client/client.eww      |   10 -
 cyassl/internal.h                             |   25 +-
 cyassl/ssl.h                                  |   10 +-
 cyassl/test.h                                 |   10 +-
 examples/client/client.c                      |   55 +-
 examples/client/client.h                      |   37 -
 src/internal.c                                |    9 -
 src/io.c                                      |  209 +-
 17 files changed, 22 insertions(+), 5488 deletions(-)
 delete mode 100644 IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
 delete mode 100644 IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h
 delete mode 100644 IDE/IAR-EWARM/CyaSSL/https-nb.c
 delete mode 100644 IDE/IAR-EWARM/CyaSSL/https-nb.h
 delete mode 100644 IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c
 delete mode 100644 IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.h
 delete mode 100644 IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
 delete mode 100644 IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.eww
 delete mode 100644 IDE/IAR-EWARM/Projects/client/client.ewp
 delete mode 100644 IDE/IAR-EWARM/Projects/client/client.eww

diff --git a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
deleted file mode 100644
index 0bb15f6e5..000000000
--- a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.c
+++ /dev/null
@@ -1,360 +0,0 @@
-/* https-nb.c
- *
- * Copyright (C) 2006-2014 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#ifdef HAVE_CONFIG_H
-    #include 
-#endif
-
-#include 
-
-#if defined(HAVE_LWIP_NATIVE)
-
-#if defined(CYASSL_IAR_ARM)
-    #include 
-    #include 
-#endif
-
-#include "lwip/tcp.h"
-#include "lwip/sockets.h"
-
-#include 
-#include 
-#include 
-#include 
-#include "https-nb.h"
-
-#if 0
-/*Enable debug*/
-#include 
-#define DBG0_PRINTF(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
-#else
-/*Disable debug*/
-#define DBG0_PRINTF(x, ...)
-#endif
-
-#if 0
-/*Enable debug*/
-#include 
-#define DBG_PRINTF(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
-#define ERR_PRINTF(x, ...) printf("[HTTPSClient:ERROR]"x"\r\n", ##__VA_ARGS__);
-#else
-/*Disable debug*/
-#define DBG_PRINTF(x, ...)
-#define ERR_PRINTF(x, ...)
-#endif
-
-static int LwIP_cb_mutex = 0 ; 
-
-static unsigned long localPort = 0 ;
-static unsigned long getPort(void) {
-      return (localPort++ + 0x200) & 0x7fff ;
-}
-
-static err_t TcpConnectedCallback (void *arg, struct tcp_pcb *pcb, s8_t err)
-{
-    DBG_PRINTF("TcpConnectedCallback(arg=%x, pcb=%x, err=%x)\n", arg, pcb, err) ;
-    *(enum HTTPS_Stat *)arg = TCP_CONNECTED ;
-    return ERR_OK;
-}
-
-static err_t DataReceiveCallback(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
-{
-    DBG_PRINTF("DataReceiveCallback, pbuf->len=%d, err=%d\n", p->tot_len , err) ;
-    if(*(enum HTTPS_Stat *)(arg) == WAITING) {
-        *(enum HTTPS_Stat *)(arg) = HTTP_RECEIVE ;
-        return ERR_OK ;
-    } else return !ERR_OK ;
-}
-
-static int count = 0 ;
-
-void CyaSSL_HTTPS_Client_NB_init(void *nb, 
-     struct ip_addr svIP, unsigned long svPort, char *host, char *path)
-{
-    CYASSL_HTTPS_NB *https_nb ;
-    https_nb = (CYASSL_HTTPS_NB *)nb ;
-    
-    https_nb->serverIP_em = svIP ;
-    https_nb->serverPort = svPort ;
-    https_nb->hostname = host ;
-    https_nb->path = path ;
-    https_nb->stat = BEGIN ;
-}
-  
-int CyaSSL_HTTPS_Client_NB(void *nb)
-{
-    int ret ;
-    CYASSL_HTTPS_NB *https_nb ;
-    
-    https_nb = (CYASSL_HTTPS_NB *)nb ;
-    
-    CyaSSL_Debugging_ON() ; 
-
-    switch(https_nb->stat) {
-    case BEGIN:
-        printf("== HTTPS Client(%x): %d ==\n", nb, count ++) ;
-        /*** Assuming LwIP has been initialized ***/
-        https_nb->stat = INITIALIZED ; 
-    case INITIALIZED:
-        https_nb->pcb = tcp_new();
-        if(https_nb->pcb) {
-    	        tcp_arg(https_nb->pcb, (void *)&(https_nb->stat)) ;    
-                DBG_PRINTF("New PCB(tcp_new=%x), &https->stat=%x\n",
-                                           https_nb->pcb, &https_nb->stat) ;
-        } else {
-    	    ERR_PRINTF("tcp_new, ret=%d\n", https_nb->pcb) ;
-            https_nb->stat = IDLE ;
-    	    return !ERR_OK ;
-        }
-
-        tcp_arg(https_nb->pcb, (void *)&https_nb->stat) ;
-
-        https_nb->localPort = getPort() ;
-        DBG_PRINTF("local Port=%d\n", https_nb->localPort) ;
-        ret = tcp_bind (https_nb->pcb, &(https_nb->localIP_em),
-                        https_nb->localPort) ;
-        if(ret == ERR_OK) {
-            https_nb->stat = TCP_CONNECT ;
-            return ERR_OK;
-        } else {
-    	    ERR_PRINTF("tcp_bind, ret=%d\n", ret) ;
-            https_nb->stat = INITIALIZED ;
-            return !ERR_OK ;
-        }
-
-    case TCP_CONNECT:
-        if(LwIP_cb_mutex)return ERR_OK ;
-        else LwIP_cb_mutex = 1 ;
-        DBG_PRINTF("TCP_CONNECT(%x)\n", https_nb) ;
-        DBG_PRINTF("Server IP Addrress(%d.%d.%d.%d)\n", 
-              (*(unsigned long *)&https_nb->serverIP_em&0xff),
-              (*(unsigned long *)&https_nb->serverIP_em>>8)&0xff, 
-              (*(unsigned long *)&https_nb->serverIP_em>>16)&0xff, 
-              (*(unsigned long *)&https_nb->serverIP_em>>24)&0xff) ;
-        ret = tcp_connect(https_nb->pcb, &(https_nb->serverIP_em),
-                          https_nb->serverPort, TcpConnectedCallback); 
- 
-        if(ret == ERR_OK) {
-             https_nb->wait_cnt = 0 ;
-    	     https_nb->stat = WAITING ;
-             return ERR_OK;
-        } else {
-    	    ERR_PRINTF("tcp_connect, ret=%d\n", ret) ;
-            https_nb->stat = TCP_CLOSE ;
-    	    return !ERR_OK;
-        }
-        
-    case TCP_CONNECTED:
-        DBG0_PRINTF("TCP CONNECTED(%x)\n", https_nb) ;
-        LwIP_cb_mutex = 0 ; 
-
-        /*CyaSSLv3_client_method()
-        CyaTLSv1_client_method()
-        CyaTLSv1_1_client_method()
-        CyaTLSv1_2_client_method() */
-        https_nb->ctx = CyaSSL_CTX_new(CyaTLSv1_2_client_method());
-        if (https_nb->ctx == NULL) {
-            ERR_PRINTF("CyaSSL_CTX_new: unable to get ctx");
-            return !ERR_OK ;
-        }
-    
-        CyaSSL_CTX_set_verify(https_nb->ctx, SSL_VERIFY_NONE, 0);
-
-        https_nb->ssl = CyaSSL_new(https_nb->ctx);
-        if (https_nb->ssl == NULL) {
-            ERR_PRINTF("CyaSSL_new: unable to get SSL object");
-            return !ERR_OK ;
-        }
-        
-        CyaSSL_SetIO_LwIP(https_nb->ssl, https_nb->pcb, 
-                          DataReceiveCallback, NULL, (void *)&https_nb->stat);
-
-        https_nb->stat = SSL_CONN ;
-        
-    case SSL_CONN: /* handshaking */
-        if(LwIP_cb_mutex) return ERR_OK ;
-        ret = CyaSSL_connect(https_nb->ssl); 
-        DBG_PRINTF("CyaSSL_connect, ret = %d\n", ret) ;
-        if(ret == SSL_SUCCESS) {
-            DBG_PRINTF("SSL Connected\n") ;
-            https_nb->stat = HTTP_SEND ;
-        } else {
-            ret = CyaSSL_get_error(https_nb->ssl, NULL) ;
-            if(ret == SSL_ERROR_WANT_READ) {
-                 https_nb->ssl->lwipCtx.wait = 1000000 ;
-                 https_nb->stat = SSL_CONN_WAITING ;
-                return ERR_OK ;
-            } else {
-                ERR_PRINTF("CyaSSL_connecting_NB:ssl=%x, ret=%d\n", https_nb->ssl, ret) ;   
-                return !ERR_OK ;
-            }
-        }
-        return ERR_OK ; 
-         
-    case SSL_CONN_WAITING:
-
-        if(https_nb->ssl->lwipCtx.wait-- <= 0) { 
-            /* counting down after the callback for multiple callbacks */
-            https_nb->stat = SSL_CONN ;
-            LwIP_cb_mutex = 0 ; 
-        }
-        return ERR_OK ;
-    
-    case HTTP_SEND: 
-    {
-        #define SEND_BUFF_SIZE 100
-        char sendBuff[SEND_BUFF_SIZE] ;    
-        int size ;
-        if(LwIP_cb_mutex)return ERR_OK ;
-        else LwIP_cb_mutex = 1 ; /* lock */
-        DBG0_PRINTF("SSL CONNECTED(%x)\n", https_nb) ;
-        sprintf(sendBuff,
-                "GET %s HTTP/1.0\r\nHost: %s\r\nConnection: close\r\n\r\n", 
-                https_nb->path, https_nb->hostname) ;
-        size = strlen((char const *)sendBuff) ;
-
-        CyaSSL_write(https_nb->ssl, sendBuff, size) ;
-
-        https_nb->wait_cnt = 0 ;
-        https_nb->stat = WAITING ;
-        return ERR_OK;
-    }
-
-    case HTTP_RECEIVE: 
-    {
-        #define HTTP_BUFF_SIZE 2048
-        char httpbuff[HTTP_BUFF_SIZE] ;
-        
-        LwIP_cb_mutex = 0 ;
-        memset(httpbuff, '\0', HTTP_BUFF_SIZE) ;
-        ret = CyaSSL_read(https_nb->ssl, httpbuff, HTTP_BUFF_SIZE) ;
-        DBG0_PRINTF("HTTPS GET(%x), Received(%d)\n",https_nb, strlen(httpbuff)) ;
-        /*DBG0_PRINTF*/puts(httpbuff) ;  
-    }
-    case SSL_CLOSE:  
-    {
-        CYASSL_CTX *ctx ; ;
-    
-        ctx = https_nb->ssl->ctx ;
-        DBG_PRINTF("CyaSSL_close(%x)", https_nb->ssl) ;
-        CyaSSL_shutdown(https_nb->ssl);
-        CyaSSL_free(https_nb->ssl);
-        CyaSSL_CTX_free(ctx); ;
-        https_nb->stat = TCP_CLOSE ;
-    }
-    case TCP_CLOSE:
-        tcp_close(https_nb->pcb) ;
- 
-        https_nb->idle = 0 ;
-        https_nb->stat = IDLE ;
-
-    case IDLE:
-        https_nb->idle ++ ;
-        if(https_nb->idle > 50000)
-            https_nb->stat = BEGIN ;
-        return ERR_OK;
-    case WAITING:
-        if(https_nb->wait_cnt++ > 1000000) {
-            LwIP_cb_mutex = 0 ;
-            https_nb->wait_cnt = 0 ;
-            if((https_nb->stat >= SSL_CONN)&&(https_nb->stat < SSL_CLOSE)) {
-                ERR_PRINTF("Wait Time out, go to CyaSSL close") ;
-                https_nb->stat = SSL_CLOSE ;
-            } else {
-               ERR_PRINTF("Wait Time out, go to Begin") ;
-                https_nb->stat = TCP_CLOSE ;
-            }
-        } 
-        return ERR_OK ;
-    default:
-        return ERR_OK;
-    }
-}
-
-/*********************************************************************/
-/*
-    Usage Example:
-        CyaSSL_HTTPS_Client_NB_init
-        CyaSSL_HTTPS_Client_NB
-                                                                     */
-/*********************************************************************/
-#ifndef NO_MAIN_DRIVER
-
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_1 ;
-void *CyaSSL_HTTPS_ClientP_1 = (void *)&CyaSSL_HTTPS_Client_1 ;
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_2 ;
-void *CyaSSL_HTTPS_ClientP_2 = (void *)&CyaSSL_HTTPS_Client_2 ;
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_3 ;
-void *CyaSSL_HTTPS_ClientP_3 = (void *)&CyaSSL_HTTPS_Client_3 ;
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_4 ;
-void *CyaSSL_HTTPS_ClientP_4 = (void *)&CyaSSL_HTTPS_Client_4 ;
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_5 ;
-void *CyaSSL_HTTPS_ClientP_5 = (void *)&CyaSSL_HTTPS_Client_5 ;
-
-
-#define HTTPS_PORT   443
-#define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
-static struct ip_addr server0_em = { IP_ADDR(192,168,11,9) } ; 
-static struct ip_addr server1_em = { IP_ADDR(31,13,68,33)} ; 
-
-void HTTPSClient_main_init() {
-
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_1, 
-                             //server_em, HTTPS_PORT, "xxx.com", "/") ;
-                             server1_em, HTTPS_PORT, "graph.facebook.com", "/takashikojo") ;
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_2, 
-                              server0_em, HTTPS_PORT, "xxx.com", "/") ;
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_3, 
-                              server1_em, HTTPS_PORT, "graph.facebook.com", "/takashikojo") ;
-                              //server_em, HTTPS_PORT, "xxx.com", "/") ;
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_4, 
-                              server0_em, HTTPS_PORT, "xxx.com", "/") ;
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_5, 
-                              server0_em, HTTPS_PORT, "xxx.com", "/") ;  
-}
- 
-void HTTPSClient_main(int i)
-{
-    if((i % 1) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_1) ;
-    }
-
-    if((i % 2) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_2) ;
-    }
-#if 0
-    if((i % 3) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_3) ;
-    }
-
-    if((i % 4) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_4) ;
-    }
-
-    if((i % 5) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_5) ;
-    }
-
-#endif
-}
-
-#endif /* NO_MAIN_DRIVER  */
-#endif /* HAVE_LWIP_NATIVE */
diff --git a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h b/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h
deleted file mode 100644
index 6cac23155..000000000
--- a/IDE/IAR-EWARM/CyaSSL/HTTPS-NB.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/* HTTPS-NB.h
- *
- * Copyright (C) 2006-2014 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
- 
-#ifndef HTTPS_NB_H
-#define HTTPS_NB_H
-
-extern int CyaSSL_GetDataFromPbuf(char *buff, struct pbuf *p, int size) ;
-
-#define IP4_LONG_2_ADDR(ipaddr, iplong) \
-        (ipaddr)->addr = htonl(((u32_t)(iplong) & 0xFF000000) | \
-                               ((u32_t)(iplong) & 0xFF0000)   | \
-                               ((u32_t)(iplong) & 0xFF00)     | \
-                                (u32_t)(iplong) & 0xFF)
-
-#define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
-
-enum HTTPS_Stat {
-    BEGIN,
-    GET_MYIP,
-    INITIALIZED,
-    TCP_CONNECT,
-    TCP_CONNECTED,
-    SSL_INIT,
-    SSL_CONN,
-    SSL_CONN_WAITING,
-    HTTP_SEND,
-    HTTP_RECEIVE,
-    HTTP_DONE,
-    SSL_CLOSE,
-    TCP_CLOSE,
-    WAITING,
-    IDLE
-} ;
-
-
-#define HTTPS_PORT 443
-
-typedef struct {
-    CYASSL *ssl ;
-    CYASSL_CTX *ctx ;
-    enum HTTPS_Stat stat ;
-    struct tcp_pcb * pcb ;
-    unsigned long ipaddress ;
-    struct ip_addr localIP_em;
-    unsigned long localPort ;
-    struct ip_addr serverIP_em ;
-    unsigned long serverPort ;
-    char   *hostname ;
-    char   *path ;
-    int    idle ;
-    int    wait_cnt ; /* wait tick counter */
-} CYASSL_HTTPS_NB ;
-
-extern void CyaSSL_HTTPS_Client_NB_init(void *nb, 
-     struct ip_addr svIP, unsigned long svPort, char *host, char *path) ;
-extern int CyaSSL_HTTPS_Client_NB(void *nb) ;
-
-#endif
diff --git a/IDE/IAR-EWARM/CyaSSL/https-nb.c b/IDE/IAR-EWARM/CyaSSL/https-nb.c
deleted file mode 100644
index 0bb15f6e5..000000000
--- a/IDE/IAR-EWARM/CyaSSL/https-nb.c
+++ /dev/null
@@ -1,360 +0,0 @@
-/* https-nb.c
- *
- * Copyright (C) 2006-2014 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#ifdef HAVE_CONFIG_H
-    #include 
-#endif
-
-#include 
-
-#if defined(HAVE_LWIP_NATIVE)
-
-#if defined(CYASSL_IAR_ARM)
-    #include 
-    #include 
-#endif
-
-#include "lwip/tcp.h"
-#include "lwip/sockets.h"
-
-#include 
-#include 
-#include 
-#include 
-#include "https-nb.h"
-
-#if 0
-/*Enable debug*/
-#include 
-#define DBG0_PRINTF(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
-#else
-/*Disable debug*/
-#define DBG0_PRINTF(x, ...)
-#endif
-
-#if 0
-/*Enable debug*/
-#include 
-#define DBG_PRINTF(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
-#define ERR_PRINTF(x, ...) printf("[HTTPSClient:ERROR]"x"\r\n", ##__VA_ARGS__);
-#else
-/*Disable debug*/
-#define DBG_PRINTF(x, ...)
-#define ERR_PRINTF(x, ...)
-#endif
-
-static int LwIP_cb_mutex = 0 ; 
-
-static unsigned long localPort = 0 ;
-static unsigned long getPort(void) {
-      return (localPort++ + 0x200) & 0x7fff ;
-}
-
-static err_t TcpConnectedCallback (void *arg, struct tcp_pcb *pcb, s8_t err)
-{
-    DBG_PRINTF("TcpConnectedCallback(arg=%x, pcb=%x, err=%x)\n", arg, pcb, err) ;
-    *(enum HTTPS_Stat *)arg = TCP_CONNECTED ;
-    return ERR_OK;
-}
-
-static err_t DataReceiveCallback(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
-{
-    DBG_PRINTF("DataReceiveCallback, pbuf->len=%d, err=%d\n", p->tot_len , err) ;
-    if(*(enum HTTPS_Stat *)(arg) == WAITING) {
-        *(enum HTTPS_Stat *)(arg) = HTTP_RECEIVE ;
-        return ERR_OK ;
-    } else return !ERR_OK ;
-}
-
-static int count = 0 ;
-
-void CyaSSL_HTTPS_Client_NB_init(void *nb, 
-     struct ip_addr svIP, unsigned long svPort, char *host, char *path)
-{
-    CYASSL_HTTPS_NB *https_nb ;
-    https_nb = (CYASSL_HTTPS_NB *)nb ;
-    
-    https_nb->serverIP_em = svIP ;
-    https_nb->serverPort = svPort ;
-    https_nb->hostname = host ;
-    https_nb->path = path ;
-    https_nb->stat = BEGIN ;
-}
-  
-int CyaSSL_HTTPS_Client_NB(void *nb)
-{
-    int ret ;
-    CYASSL_HTTPS_NB *https_nb ;
-    
-    https_nb = (CYASSL_HTTPS_NB *)nb ;
-    
-    CyaSSL_Debugging_ON() ; 
-
-    switch(https_nb->stat) {
-    case BEGIN:
-        printf("== HTTPS Client(%x): %d ==\n", nb, count ++) ;
-        /*** Assuming LwIP has been initialized ***/
-        https_nb->stat = INITIALIZED ; 
-    case INITIALIZED:
-        https_nb->pcb = tcp_new();
-        if(https_nb->pcb) {
-    	        tcp_arg(https_nb->pcb, (void *)&(https_nb->stat)) ;    
-                DBG_PRINTF("New PCB(tcp_new=%x), &https->stat=%x\n",
-                                           https_nb->pcb, &https_nb->stat) ;
-        } else {
-    	    ERR_PRINTF("tcp_new, ret=%d\n", https_nb->pcb) ;
-            https_nb->stat = IDLE ;
-    	    return !ERR_OK ;
-        }
-
-        tcp_arg(https_nb->pcb, (void *)&https_nb->stat) ;
-
-        https_nb->localPort = getPort() ;
-        DBG_PRINTF("local Port=%d\n", https_nb->localPort) ;
-        ret = tcp_bind (https_nb->pcb, &(https_nb->localIP_em),
-                        https_nb->localPort) ;
-        if(ret == ERR_OK) {
-            https_nb->stat = TCP_CONNECT ;
-            return ERR_OK;
-        } else {
-    	    ERR_PRINTF("tcp_bind, ret=%d\n", ret) ;
-            https_nb->stat = INITIALIZED ;
-            return !ERR_OK ;
-        }
-
-    case TCP_CONNECT:
-        if(LwIP_cb_mutex)return ERR_OK ;
-        else LwIP_cb_mutex = 1 ;
-        DBG_PRINTF("TCP_CONNECT(%x)\n", https_nb) ;
-        DBG_PRINTF("Server IP Addrress(%d.%d.%d.%d)\n", 
-              (*(unsigned long *)&https_nb->serverIP_em&0xff),
-              (*(unsigned long *)&https_nb->serverIP_em>>8)&0xff, 
-              (*(unsigned long *)&https_nb->serverIP_em>>16)&0xff, 
-              (*(unsigned long *)&https_nb->serverIP_em>>24)&0xff) ;
-        ret = tcp_connect(https_nb->pcb, &(https_nb->serverIP_em),
-                          https_nb->serverPort, TcpConnectedCallback); 
- 
-        if(ret == ERR_OK) {
-             https_nb->wait_cnt = 0 ;
-    	     https_nb->stat = WAITING ;
-             return ERR_OK;
-        } else {
-    	    ERR_PRINTF("tcp_connect, ret=%d\n", ret) ;
-            https_nb->stat = TCP_CLOSE ;
-    	    return !ERR_OK;
-        }
-        
-    case TCP_CONNECTED:
-        DBG0_PRINTF("TCP CONNECTED(%x)\n", https_nb) ;
-        LwIP_cb_mutex = 0 ; 
-
-        /*CyaSSLv3_client_method()
-        CyaTLSv1_client_method()
-        CyaTLSv1_1_client_method()
-        CyaTLSv1_2_client_method() */
-        https_nb->ctx = CyaSSL_CTX_new(CyaTLSv1_2_client_method());
-        if (https_nb->ctx == NULL) {
-            ERR_PRINTF("CyaSSL_CTX_new: unable to get ctx");
-            return !ERR_OK ;
-        }
-    
-        CyaSSL_CTX_set_verify(https_nb->ctx, SSL_VERIFY_NONE, 0);
-
-        https_nb->ssl = CyaSSL_new(https_nb->ctx);
-        if (https_nb->ssl == NULL) {
-            ERR_PRINTF("CyaSSL_new: unable to get SSL object");
-            return !ERR_OK ;
-        }
-        
-        CyaSSL_SetIO_LwIP(https_nb->ssl, https_nb->pcb, 
-                          DataReceiveCallback, NULL, (void *)&https_nb->stat);
-
-        https_nb->stat = SSL_CONN ;
-        
-    case SSL_CONN: /* handshaking */
-        if(LwIP_cb_mutex) return ERR_OK ;
-        ret = CyaSSL_connect(https_nb->ssl); 
-        DBG_PRINTF("CyaSSL_connect, ret = %d\n", ret) ;
-        if(ret == SSL_SUCCESS) {
-            DBG_PRINTF("SSL Connected\n") ;
-            https_nb->stat = HTTP_SEND ;
-        } else {
-            ret = CyaSSL_get_error(https_nb->ssl, NULL) ;
-            if(ret == SSL_ERROR_WANT_READ) {
-                 https_nb->ssl->lwipCtx.wait = 1000000 ;
-                 https_nb->stat = SSL_CONN_WAITING ;
-                return ERR_OK ;
-            } else {
-                ERR_PRINTF("CyaSSL_connecting_NB:ssl=%x, ret=%d\n", https_nb->ssl, ret) ;   
-                return !ERR_OK ;
-            }
-        }
-        return ERR_OK ; 
-         
-    case SSL_CONN_WAITING:
-
-        if(https_nb->ssl->lwipCtx.wait-- <= 0) { 
-            /* counting down after the callback for multiple callbacks */
-            https_nb->stat = SSL_CONN ;
-            LwIP_cb_mutex = 0 ; 
-        }
-        return ERR_OK ;
-    
-    case HTTP_SEND: 
-    {
-        #define SEND_BUFF_SIZE 100
-        char sendBuff[SEND_BUFF_SIZE] ;    
-        int size ;
-        if(LwIP_cb_mutex)return ERR_OK ;
-        else LwIP_cb_mutex = 1 ; /* lock */
-        DBG0_PRINTF("SSL CONNECTED(%x)\n", https_nb) ;
-        sprintf(sendBuff,
-                "GET %s HTTP/1.0\r\nHost: %s\r\nConnection: close\r\n\r\n", 
-                https_nb->path, https_nb->hostname) ;
-        size = strlen((char const *)sendBuff) ;
-
-        CyaSSL_write(https_nb->ssl, sendBuff, size) ;
-
-        https_nb->wait_cnt = 0 ;
-        https_nb->stat = WAITING ;
-        return ERR_OK;
-    }
-
-    case HTTP_RECEIVE: 
-    {
-        #define HTTP_BUFF_SIZE 2048
-        char httpbuff[HTTP_BUFF_SIZE] ;
-        
-        LwIP_cb_mutex = 0 ;
-        memset(httpbuff, '\0', HTTP_BUFF_SIZE) ;
-        ret = CyaSSL_read(https_nb->ssl, httpbuff, HTTP_BUFF_SIZE) ;
-        DBG0_PRINTF("HTTPS GET(%x), Received(%d)\n",https_nb, strlen(httpbuff)) ;
-        /*DBG0_PRINTF*/puts(httpbuff) ;  
-    }
-    case SSL_CLOSE:  
-    {
-        CYASSL_CTX *ctx ; ;
-    
-        ctx = https_nb->ssl->ctx ;
-        DBG_PRINTF("CyaSSL_close(%x)", https_nb->ssl) ;
-        CyaSSL_shutdown(https_nb->ssl);
-        CyaSSL_free(https_nb->ssl);
-        CyaSSL_CTX_free(ctx); ;
-        https_nb->stat = TCP_CLOSE ;
-    }
-    case TCP_CLOSE:
-        tcp_close(https_nb->pcb) ;
- 
-        https_nb->idle = 0 ;
-        https_nb->stat = IDLE ;
-
-    case IDLE:
-        https_nb->idle ++ ;
-        if(https_nb->idle > 50000)
-            https_nb->stat = BEGIN ;
-        return ERR_OK;
-    case WAITING:
-        if(https_nb->wait_cnt++ > 1000000) {
-            LwIP_cb_mutex = 0 ;
-            https_nb->wait_cnt = 0 ;
-            if((https_nb->stat >= SSL_CONN)&&(https_nb->stat < SSL_CLOSE)) {
-                ERR_PRINTF("Wait Time out, go to CyaSSL close") ;
-                https_nb->stat = SSL_CLOSE ;
-            } else {
-               ERR_PRINTF("Wait Time out, go to Begin") ;
-                https_nb->stat = TCP_CLOSE ;
-            }
-        } 
-        return ERR_OK ;
-    default:
-        return ERR_OK;
-    }
-}
-
-/*********************************************************************/
-/*
-    Usage Example:
-        CyaSSL_HTTPS_Client_NB_init
-        CyaSSL_HTTPS_Client_NB
-                                                                     */
-/*********************************************************************/
-#ifndef NO_MAIN_DRIVER
-
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_1 ;
-void *CyaSSL_HTTPS_ClientP_1 = (void *)&CyaSSL_HTTPS_Client_1 ;
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_2 ;
-void *CyaSSL_HTTPS_ClientP_2 = (void *)&CyaSSL_HTTPS_Client_2 ;
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_3 ;
-void *CyaSSL_HTTPS_ClientP_3 = (void *)&CyaSSL_HTTPS_Client_3 ;
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_4 ;
-void *CyaSSL_HTTPS_ClientP_4 = (void *)&CyaSSL_HTTPS_Client_4 ;
-CYASSL_HTTPS_NB CyaSSL_HTTPS_Client_5 ;
-void *CyaSSL_HTTPS_ClientP_5 = (void *)&CyaSSL_HTTPS_Client_5 ;
-
-
-#define HTTPS_PORT   443
-#define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
-static struct ip_addr server0_em = { IP_ADDR(192,168,11,9) } ; 
-static struct ip_addr server1_em = { IP_ADDR(31,13,68,33)} ; 
-
-void HTTPSClient_main_init() {
-
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_1, 
-                             //server_em, HTTPS_PORT, "xxx.com", "/") ;
-                             server1_em, HTTPS_PORT, "graph.facebook.com", "/takashikojo") ;
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_2, 
-                              server0_em, HTTPS_PORT, "xxx.com", "/") ;
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_3, 
-                              server1_em, HTTPS_PORT, "graph.facebook.com", "/takashikojo") ;
-                              //server_em, HTTPS_PORT, "xxx.com", "/") ;
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_4, 
-                              server0_em, HTTPS_PORT, "xxx.com", "/") ;
-  CyaSSL_HTTPS_Client_NB_init(CyaSSL_HTTPS_ClientP_5, 
-                              server0_em, HTTPS_PORT, "xxx.com", "/") ;  
-}
- 
-void HTTPSClient_main(int i)
-{
-    if((i % 1) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_1) ;
-    }
-
-    if((i % 2) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_2) ;
-    }
-#if 0
-    if((i % 3) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_3) ;
-    }
-
-    if((i % 4) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_4) ;
-    }
-
-    if((i % 5) == 0) { /* wait for initializing TCP/IP, DHCP */
-        CyaSSL_HTTPS_Client_NB(CyaSSL_HTTPS_ClientP_5) ;
-    }
-
-#endif
-}
-
-#endif /* NO_MAIN_DRIVER  */
-#endif /* HAVE_LWIP_NATIVE */
diff --git a/IDE/IAR-EWARM/CyaSSL/https-nb.h b/IDE/IAR-EWARM/CyaSSL/https-nb.h
deleted file mode 100644
index 6cac23155..000000000
--- a/IDE/IAR-EWARM/CyaSSL/https-nb.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/* HTTPS-NB.h
- *
- * Copyright (C) 2006-2014 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
- 
-#ifndef HTTPS_NB_H
-#define HTTPS_NB_H
-
-extern int CyaSSL_GetDataFromPbuf(char *buff, struct pbuf *p, int size) ;
-
-#define IP4_LONG_2_ADDR(ipaddr, iplong) \
-        (ipaddr)->addr = htonl(((u32_t)(iplong) & 0xFF000000) | \
-                               ((u32_t)(iplong) & 0xFF0000)   | \
-                               ((u32_t)(iplong) & 0xFF00)     | \
-                                (u32_t)(iplong) & 0xFF)
-
-#define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
-
-enum HTTPS_Stat {
-    BEGIN,
-    GET_MYIP,
-    INITIALIZED,
-    TCP_CONNECT,
-    TCP_CONNECTED,
-    SSL_INIT,
-    SSL_CONN,
-    SSL_CONN_WAITING,
-    HTTP_SEND,
-    HTTP_RECEIVE,
-    HTTP_DONE,
-    SSL_CLOSE,
-    TCP_CLOSE,
-    WAITING,
-    IDLE
-} ;
-
-
-#define HTTPS_PORT 443
-
-typedef struct {
-    CYASSL *ssl ;
-    CYASSL_CTX *ctx ;
-    enum HTTPS_Stat stat ;
-    struct tcp_pcb * pcb ;
-    unsigned long ipaddress ;
-    struct ip_addr localIP_em;
-    unsigned long localPort ;
-    struct ip_addr serverIP_em ;
-    unsigned long serverPort ;
-    char   *hostname ;
-    char   *path ;
-    int    idle ;
-    int    wait_cnt ; /* wait tick counter */
-} CYASSL_HTTPS_NB ;
-
-extern void CyaSSL_HTTPS_Client_NB_init(void *nb, 
-     struct ip_addr svIP, unsigned long svPort, char *host, char *path) ;
-extern int CyaSSL_HTTPS_Client_NB(void *nb) ;
-
-#endif
diff --git a/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c b/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c
deleted file mode 100644
index 10654364e..000000000
--- a/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.c
+++ /dev/null
@@ -1,166 +0,0 @@
-/* tcp-conn-nb.c
- *
- * Copyright (C) 2006-2014 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#ifdef HAVE_CONFIG_H
-    #include 
-#endif
-
-#include 
-
-/*** Simulating tcp_connect by LwIP Native TCP ***/
-
-
-#if defined(HAVE_LWIP_NATIVE)
-#include 
-#include 
-#include "lwip/tcp.h"
-#include "lwip/sockets.h"
-#include "lwip/inet.h"
-#include "lwip/ip_addr.h"
-
-#include "cyassl/ssl.h"
-#include "tcp-conn-nb.h" 
-
-int   myoptind;
-char* myoptarg;
-
-
-static struct tcp_cb {
-    enum TCP_stat stat ;
-    struct tcp_pcb *pcb ;
-    unsigned long localPort;
-    ip_addr_t localIP_em ;
-    unsigned long serverPort ;
-    ip_addr_t serverIP_em ;    
-} tcp ;
-
-#define LOCAL_PORT 11111
-
-#if 0
-/*Enable debug*/
-#include 
-#define DBG_PRINTF(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
-#define ERR_PRINTF(x, ...) printf("[HTTPSClient:ERROR]"x"\r\n", ##__VA_ARGS__);
-#else
-/*Disable debug*/
-#define DBG_PRINTF(x, ...)
-#define ERR_PRINTF(x, ...)
-#endif
-
-
-static err_t TcpConnectedCallback (void *arg, struct tcp_pcb *pcb, s8_t err)
-{
-    DBG_PRINTF("TcpConnectedCallback(arg=%x, pcb=%x, err=%x)\n", arg, pcb, err) ;
-    *(int *)arg = TCP_CONNECTED ;
-    return ERR_OK;
-}
-
-/** strictly IPV4 ***/
-#define IP_ADDR(a,b,c,d) (((a)|((b)<<8)|((c)<<16)|(d)<<24))
-ip_addr_t ip_addr_s2i(const char *ip_s) {
-    unsigned int ip[4] ;
-    ip_addr_t ip_addr ;
-    
-    sscanf(ip_s, "%d.%d.%d.%d", 
-                 &(ip[0]), &(ip[1]), &(ip[2]), &(ip[3])) ;
-    ip_addr.addr = IP_ADDR(ip[0], ip[1], ip[2], ip[3]) ;
-    return ip_addr ;
-}
-
-/** Placeholders for now **/
-void tcp_socket(SOCKET_T *s, int flag) { }
-void build_addr(int *addr, char *host, int port, int mode) { }
-void tcp_CloseSocket_nb(SOCKET_T *sockfd) { }
-void tcp_select(SOCKET_T *s, int flag) { }
-unsigned long current_time(void) { return 0 ; }
-
-int tcp_connect_nb(struct tcp_pcb **pcb, const char* ip, word16 port,
-                               int udp)
-{
-    int ret ;
-    
-    switch(tcp.stat) {
-    case TCP_BEGIN:
-        tcp.pcb = tcp_new();
-        if(tcp.pcb) {
-    	        tcp_arg(tcp.pcb, (void *)&(tcp.stat)) ;    
-                DBG_PRINTF("New PCB(tcp_new=%x), &https->stat=%x\n",
-                                           tcp.pcb, &tcp.stat) ;
-        } else {
-    	    ERR_PRINTF("tcp_new, ret=%d\n", tcp.pcb) ;
-            tcp.stat = TCP_IDLE ;
-    	    return TCP_ERROR ;
-        }
-        
-        *pcb = tcp.pcb ;
-        tcp_arg(tcp.pcb, (void *)&tcp.stat) ;
-
-        tcp.localPort = LOCAL_PORT ;
-        DBG_PRINTF("local Port=%d\n", tcp.localPort) ;
-        ret = tcp_bind (tcp.pcb, &(tcp.localIP_em),
-                        tcp.localPort) ;
-        if(ret == ERR_OK) {
-            tcp.stat = TCP_CONNECTING ;
-            return TCP_CONNECTING ;
-        } else {
-    	    ERR_PRINTF("tcp_bind, ret=%d\n", ret) ;
-            tcp.stat = TCP_CLOSE ;
-            return TCP_CONNECTING ;
-        }
-
-    case TCP_CONNECTING:
-        tcp.serverPort  = port ;
-        tcp.serverIP_em = ip_addr_s2i(ip) ;
-        DBG_PRINTF("TCP_CONNECT(%x)\n", tcp.pcb) ;
-        
-        ret = tcp_connect(tcp.pcb, &(tcp.serverIP_em),
-                          tcp.serverPort, TcpConnectedCallback); 
-        if(ret == ERR_OK) {
-    	     tcp.stat = TCP_WAITING ;
-             return TCP_CONNECTING ;
-        } else {
-    	    ERR_PRINTF("tcp_connect, ret=%d\n", ret) ;
-            tcp.stat = TCP_CLOSE ;
-    	    return TCP_ERROR ;
-        }
-
-    case TCP_WAITING:
-        return TCP_CONNECTING ;
-        
-    case TCP_CONNECTED:
-        *pcb = tcp.pcb ;
-        return TCP_CONNECTED ;
-        
-    case TCP_CLOSE:
-        tcp_close(tcp.pcb) ;
-        tcp.stat = TCP_IDLE ;
-        return TCP_CONNECTING ;
-    
-    case TCP_IDLE:
-    default:
-        return TCP_CONNECTING ;
-    }
-}
-
-
-#endif
-
-    
\ No newline at end of file
diff --git a/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.h b/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.h
deleted file mode 100644
index 0f8d6d0a9..000000000
--- a/IDE/IAR-EWARM/CyaSSL/tcp-conn-nb.h
+++ /dev/null
@@ -1,202 +0,0 @@
-/* tcp-conn-nb.h
- *
- * Copyright (C) 2006-2014 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#ifndef TCP_CONN_NB_H
-#define TCP_CONN_NB_H
-
-/* Options for LwIP native socket client example */
-    #define NO_MAIN_DRIVER
-    #define NO_SESSION_CACHE
-    #define NO_PSK
-    #define NO_BENCHMARK
-    #undef USE_CYASSL_MEMORY
-/******/
-
-    #include 
-    #include 
-    #include "lwip/tcp.h"
-    #include "lwip/sockets.h"
-    #include "lwip/inet.h"
-    #include "lwip/ip_addr.h"
-    
-    #define THREAD_RETURN int
-    #define CYASSL_THREAD
-    #define SOCKET_T struct tcp_pcb *
-    #define SOCKADDR_IN_T int
-    //#define ip_addr_t char * 
-    #define err_sys(msg) puts(msg)
-    #define exit(code) return(code) ;
-
-enum TCP_stat  {
-    TCP_BEGIN, 
-    TCP_CONNECTING, /* return code */
-    TCP_CONNECTED,  /* return code */
-    TCP_WAITING,
-    TCP_CLOSE,
-    TCP_IDLE,
-    TCP_ERROR,
-} ;
-
-
-
-/*** from test.h ***/
-    #define CYASSL_MAX_ERROR_SZ 128
-    #define CLIENT_DEFAULT_VERSION 3
-    #define CLIENT_DTLS_DEFAULT_VERSION (-2)
-    #define CLIENT_INVALID_VERSION (-99)
-    static const char* const yasslIP   = "127.0.0.1";
-    static const word16      yasslPort = 11111;
-    #define caCert     "./certs/ca-cert.pem"
-    #define cliCert    "./certs/client-cert.pem"
-    #define cliKey     "./certs/client-key.pem"
-    #define MY_EX_USAGE 2
-    #define StackTrap(a)
-    #define InitMemoryTracker(a)
-
-    typedef struct func_args {
-        int    argc;
-        char** argv;
-        int    return_code;
-    } func_args;
-    
-    extern int   myoptind;
-    extern char* myoptarg;
-
-    void build_addr(int *addr, char *host, int port, int mode) ;
-    void tcp_socket(SOCKET_T *s, int flag) ;
-        
-enum {
-    TEST_SELECT_FAIL,
-    TEST_TIMEOUT,
-    TEST_RECV_READY,
-    TEST_ERROR_READY
-};
-    
-    static INLINE void tcp_set_nonblocking(SOCKET_T* sockfd){ }
-    
-    
-static INLINE int mygetopt(int argc, char** argv, const char* optstring)
-{
-    static char* next = NULL;
-
-    char  c;
-    char* cp;
-
-    if (myoptind == 0)
-        next = NULL;   /* we're starting new/over */
-
-    if (next == NULL || *next == '\0') {
-        if (myoptind == 0)
-            myoptind++;
-
-        if (myoptind >= argc || argv[myoptind][0] != '-' ||
-                                argv[myoptind][1] == '\0') {
-            myoptarg = NULL;
-            if (myoptind < argc)
-                myoptarg = argv[myoptind];
-
-            return -1;
-        }
-
-        if (strcmp(argv[myoptind], "--") == 0) {
-            myoptind++;
-            myoptarg = NULL;
-
-            if (myoptind < argc)
-                myoptarg = argv[myoptind];
-
-            return -1;
-        }
-
-        next = argv[myoptind];
-        next++;                  /* skip - */
-        myoptind++;
-    }
-
-    c  = *next++;
-    /* The C++ strchr can return a different value */
-    cp = (char*)strchr(optstring, c);
-
-    if (cp == NULL || c == ':') 
-        return '?';
-
-    cp++;
-
-    if (*cp == ':') {
-        if (*next != '\0') {
-            myoptarg = next;
-            next     = NULL;
-        }
-        else if (myoptind < argc) {
-            myoptarg = argv[myoptind];
-            myoptind++;
-        }
-        else 
-            return '?';
-    }
-
-    return c;
-}
-
-static INLINE void showPeer(CYASSL* ssl)
-{
-
-    CYASSL_CIPHER* cipher;
-#ifdef KEEP_PEER_CERT
-    CYASSL_X509* peer = CyaSSL_get_peer_certificate(ssl);
-    if (peer)
-        ShowX509(peer, "peer's cert info:");
-    else
-        printf("peer has no cert!\n");
-#endif
-    printf("SSL version is %s\n", CyaSSL_get_version(ssl));
-
-    cipher = CyaSSL_get_current_cipher(ssl);
-    printf("SSL cipher suite is %s\n", CyaSSL_CIPHER_get_name(cipher));
-
-#if defined(SESSION_CERTS) && defined(SHOW_CERTS)
-    {
-        CYASSL_X509_CHAIN* chain = CyaSSL_get_peer_chain(ssl);
-        int                count = CyaSSL_get_chain_count(chain);
-        int i;
-
-        for (i = 0; i < count; i++) {
-            int length;
-            unsigned char buffer[3072];
-            CYASSL_X509* chainX509;
-
-            CyaSSL_get_chain_cert_pem(chain,i,buffer, sizeof(buffer), &length);
-            buffer[length] = 0;
-            printf("cert %d has length %d data = \n%s\n", i, length, buffer);
-
-            chainX509 = CyaSSL_get_chain_X509(chain, i);
-            if (chainX509)
-                ShowX509(chainX509, "session cert info:");
-            else
-                printf("get_chain_X509 failed\n");
-            CyaSSL_FreeX509(chainX509);
-        }
-    }
-#endif
-  (void)ssl;
-}
-
-#endif
diff --git a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
deleted file mode 100644
index e35c88a81..000000000
--- a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.ewp
+++ /dev/null
@@ -1,2009 +0,0 @@
-
-
-
-  2
-  
-    Debug
-    
-      ARM
-    
-    1
-    
-      General
-      3
-      
-        22
-        1
-        1
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      ICCARM
-      2
-      
-        29
-        1
-        1
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      AARM
-      2
-      
-        9
-        1
-        1
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      OBJCOPY
-      0
-      
-        1
-        1
-        1
-        
-        
-        
-        
-        
-      
-    
-    
-      CUSTOM
-      3
-      
-        
-        
-      
-    
-    
-      BICOMP
-      0
-      
-    
-    
-      BUILDACTION
-      1
-      
-        
-        
-      
-    
-    
-      ILINK
-      0
-      
-        16
-        1
-        1
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      IARCHIVE
-      0
-      
-        0
-        1
-        1
-        
-        
-        
-      
-    
-    
-      BILINK
-      0
-      
-    
-  
-  
-    Release
-    
-      ARM
-    
-    0
-    
-      General
-      3
-      
-        22
-        1
-        0
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      ICCARM
-      2
-      
-        29
-        1
-        0
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      AARM
-      2
-      
-        9
-        1
-        0
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      OBJCOPY
-      0
-      
-        1
-        1
-        0
-        
-        
-        
-        
-        
-      
-    
-    
-      CUSTOM
-      3
-      
-        
-        
-      
-    
-    
-      BICOMP
-      0
-      
-    
-    
-      BUILDACTION
-      1
-      
-        
-        
-      
-    
-    
-      ILINK
-      0
-      
-        16
-        1
-        0
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      IARCHIVE
-      0
-      
-        0
-        1
-        0
-        
-        
-        
-      
-    
-    
-      BILINK
-      0
-      
-    
-  
-  
-    Apps
-    
-      $PROJ_DIR$\..\..\CyaSSL\https-nb.c
-    
-  
-  
-    CyaSSL
-    
-      $PROJ_DIR$\..\..\..\..\src\internal.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\src\io.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\src\keys.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\src\ssl.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\src\tls.c
-    
-  
-  
-    wolfCrypt
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\aes.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\arc4.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asm.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\asn.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\blake2b.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\camellia.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\coding.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\compress.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\des3.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dh.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\dsa.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ecc_fp.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\error.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hc128.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\hmac.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\integer.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\logging.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md2.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md4.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\md5.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory-orig.c
-      
-        Debug
-      
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\memory.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\misc.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\port.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\pwdbased.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rabbit.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\random.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\ripemd.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\rsa.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha256.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\sha512.c
-    
-    
-      $PROJ_DIR$\..\..\..\..\ctaocrypt\src\tfm.c
-    
-  
-
-
-
diff --git a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.eww b/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.eww
deleted file mode 100644
index 17ce82d66..000000000
--- a/IDE/IAR-EWARM/Projects/CyaSSL-Lib/CyaSSL-Lib.eww
+++ /dev/null
@@ -1,10 +0,0 @@
-
-
-
-  
-    $WS_DIR$\CyaSSL-Lib.ewp
-  
-  
-
-
-
diff --git a/IDE/IAR-EWARM/Projects/client/client.ewp b/IDE/IAR-EWARM/Projects/client/client.ewp
deleted file mode 100644
index 6bd4889ce..000000000
--- a/IDE/IAR-EWARM/Projects/client/client.ewp
+++ /dev/null
@@ -1,1886 +0,0 @@
-
-
-
-  2
-  
-    Debug
-    
-      ARM
-    
-    1
-    
-      General
-      3
-      
-        22
-        1
-        1
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      ICCARM
-      2
-      
-        29
-        1
-        1
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      AARM
-      2
-      
-        9
-        1
-        1
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      OBJCOPY
-      0
-      
-        1
-        1
-        1
-        
-        
-        
-        
-        
-      
-    
-    
-      CUSTOM
-      3
-      
-        
-        
-      
-    
-    
-      BICOMP
-      0
-      
-    
-    
-      BUILDACTION
-      1
-      
-        
-        
-      
-    
-    
-      ILINK
-      0
-      
-        16
-        1
-        1
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      IARCHIVE
-      0
-      
-        0
-        1
-        1
-        
-        
-        
-      
-    
-    
-      BILINK
-      0
-      
-    
-  
-  
-    Release
-    
-      ARM
-    
-    0
-    
-      General
-      3
-      
-        22
-        1
-        0
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      ICCARM
-      2
-      
-        29
-        1
-        0
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      AARM
-      2
-      
-        9
-        1
-        0
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      OBJCOPY
-      0
-      
-        1
-        1
-        0
-        
-        
-        
-        
-        
-      
-    
-    
-      CUSTOM
-      3
-      
-        
-        
-      
-    
-    
-      BICOMP
-      0
-      
-    
-    
-      BUILDACTION
-      1
-      
-        
-        
-      
-    
-    
-      ILINK
-      0
-      
-        16
-        1
-        0
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-        
-      
-    
-    
-      IARCHIVE
-      0
-      
-        0
-        1
-        0
-        
-        
-        
-      
-    
-    
-      BILINK
-      0
-      
-    
-  
-  
-    Apps
-    
-      $PROJ_DIR$\..\..\..\..\examples\client\client.c
-    
-    
-      $PROJ_DIR$\..\..\CyaSSL\tcp-conn-nb.c
-    
-  
-
-
-
diff --git a/IDE/IAR-EWARM/Projects/client/client.eww b/IDE/IAR-EWARM/Projects/client/client.eww
deleted file mode 100644
index 3d83b971b..000000000
--- a/IDE/IAR-EWARM/Projects/client/client.eww
+++ /dev/null
@@ -1,10 +0,0 @@
-
-
-
-  
-    $WS_DIR$\client.ewp
-  
-  
-
-
-
diff --git a/cyassl/internal.h b/cyassl/internal.h
index 618efb3c0..146019236 100644
--- a/cyassl/internal.h
+++ b/cyassl/internal.h
@@ -962,13 +962,8 @@ int  SetCipherList(Suites*, const char* list);
 #ifdef HAVE_NETX
     CYASSL_LOCAL int NetX_Receive(CYASSL *ssl, char *buf, int sz, void *ctx);
     CYASSL_LOCAL int NetX_Send(CYASSL *ssl, char *buf, int sz, void *ctx);
-#endif
-#ifdef HAVE_LWIP_NATIVE
-    CYASSL_LOCAL int CyaSSL_LwIP_Send(CYASSL* ssl, char *buf, int sz, void *cb);
-    CYASSL_LOCAL int CyaSSL_LwIP_Receive(CYASSL* ssl, char *buf, int sz, void *cb);
-    CYASSL_API int CyaSSL_SetIO_LwIP(CYASSL* ssl, void *pcb, 
-                                tcp_recv_fn recv, tcp_sent_fn sent, void *arg);
-#endif /* HAVE_LWIP_NATIVE */
+#endif /* HAVE_NETX */
+
 
 /* CyaSSL Cipher type just points back to SSL */
 struct CYASSL_CIPHER {
@@ -1805,19 +1800,6 @@ typedef struct DtlsMsg {
 
 #endif
 
-#ifdef HAVE_LWIP_NATIVE
-    /* LwIP native tpc socket context */
-    typedef struct LwIP_native_Ctx {
-        struct tcp_pcb * pcb ;
-        tcp_recv_fn recv ;
-        tcp_sent_fn sent ;
-        int    pulled  ; 
-        struct pbuf *pbuf ;
-        int    wait ;
-        void * arg ;   /* arg for application */
-        int    idle_count ;
-    } LwIP_native_Ctx ;    
-#endif
 
 /* CyaSSL ssl type */
 struct CYASSL {
@@ -1929,9 +1911,6 @@ struct CYASSL {
 #ifdef HAVE_NETX
     NetX_Ctx        nxCtx;             /* NetX IO Context */
 #endif
-#ifdef HAVE_LWIP_NATIVE
-    LwIP_native_Ctx        lwipCtx;             /* NetX IO Context */
-#endif
 #ifdef SESSION_INDEX
     int sessionIndex;                  /* Session's location in the cache. */
 #endif
diff --git a/cyassl/ssl.h b/cyassl/ssl.h
index ccf969537..7821cefd2 100644
--- a/cyassl/ssl.h
+++ b/cyassl/ssl.h
@@ -941,9 +941,7 @@ CYASSL_API void CyaSSL_SetIOWriteFlags(CYASSL* ssl, int flags);
     CYASSL_API void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxsocket,
                                       ULONG waitoption);
 #endif
-#ifdef HAVE_LWIP_NATIVE
-    #include "lwip/tcp.h"
-#endif
+
 typedef int (*CallbackGenCookie)(CYASSL* ssl, unsigned char* buf, int sz,
                                  void* ctx);
 CYASSL_API void  CyaSSL_CTX_SetGenCookie(CYASSL_CTX*, CallbackGenCookie);
@@ -1289,9 +1287,13 @@ CYASSL_API int CyaSSL_accept_ex(CYASSL*, HandShakeCallBack, TimeoutCallBack,
 
 
 #ifdef CYASSL_HAVE_WOLFSCEP
-CYASSL_API void CyaSSL_wolfSCEP(void);
+    CYASSL_API void CyaSSL_wolfSCEP(void);
 #endif /* CYASSL_HAVE_WOLFSCEP */
 
+#ifdef CYASSL_HAVE_CERT_SERVICE
+    CYASSL_API void CyaSSL_cert_service(void);
+#endif
+
 
 #ifdef __cplusplus
     }  /* extern "C" */
diff --git a/cyassl/test.h b/cyassl/test.h
index fcf322803..644cb96a9 100644
--- a/cyassl/test.h
+++ b/cyassl/test.h
@@ -37,7 +37,7 @@
 #else
     #include 
     #include 
-#if !defined(CYASSL_LEANPSK) && !defined(HAVE_LWIP_NATIVE) 
+#ifndef CYASSL_LEANPSK
     #include 
     #include 
     #include 
@@ -59,14 +59,6 @@
     #define SNPRINTF snprintf
 #endif /* USE_WINDOWS_API */
 
-#if defined(HAVE_LWIP_NATIVE)
-    #include 
-    #include "lwip/tcp.h"
-    #include "lwip/sockets.h"
-    #include "lwip/inet.h"
-    #include "lwip/ip_addr.h"
-#endif
-
 #ifdef HAVE_CAVIUM
     #include "cavium_sysdep.h"
     #include "cavium_common.h"
diff --git a/examples/client/client.c b/examples/client/client.c
index 267d56b3d..b2564d102 100644
--- a/examples/client/client.c
+++ b/examples/client/client.c
@@ -38,12 +38,7 @@
 #endif
 
 #include 
-
-#if defined(HAVE_LWIP_NATIVE)
-    #include "tcp-conn-nb.h"
-#else
-    #include 
-#endif
+#include 
 
 #include "examples/client/client.h"
 
@@ -54,6 +49,7 @@
     Timeval timeout;
 #endif
 
+
 static void NonBlockingSSL_Connect(CYASSL* ssl)
 {
 #ifndef CYASSL_CALLBACKS
@@ -163,10 +159,11 @@ static void Usage(void)
 
 THREAD_RETURN CYASSL_THREAD client_test(void* args)
 {
-    STATIC_NB SOCKET_T sockfd = 0 ;
+    SOCKET_T sockfd = 0;
+
     CYASSL_METHOD*  method  = 0;
-    STATIC_NB CYASSL_CTX* ctx = 0;
-    STATIC_NB CYASSL*     ssl = 0;
+    CYASSL_CTX*     ctx     = 0;
+    CYASSL*         ssl     = 0;
     
     CYASSL*         sslResume = 0;
     CYASSL_SESSION* session = 0;
@@ -392,9 +389,7 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args)
     }
 
     myoptind = 0;      /* reset for test cases */
-    
-SWITCH_STAT {
-    
+
     /* sort out DTLS versus TLS versions */
     if (version == CLIENT_INVALID_VERSION) {
         if (doDTLS)
@@ -600,15 +595,13 @@ SWITCH_STAT {
         exit(EXIT_SUCCESS);
     }
     
-    #if defined(CYASSL_MDK_ARM) || defined(HAVE_LWIP_NATIVE)
+    #if defined(CYASSL_MDK_ARM)
     CyaSSL_CTX_set_verify(ctx, SSL_VERIFY_NONE, 0);
     #endif
     
     ssl = CyaSSL_new(ctx);
     if (ssl == NULL)
         err_sys("unable to get SSL object");
-
-CASE(CLIENT_TCP_CONN):
     if (doDTLS) {
         SOCKADDR_IN_T addr;
         build_addr(&addr, host, port, 1);
@@ -616,15 +609,7 @@ CASE(CLIENT_TCP_CONN):
         tcp_socket(&sockfd, 1);
     }
     else {
-        #if !defined(HAVE_LWIP_NATIVE)
-            tcp_connect(&sockfd, host, port, 0);
-        #else
-            int err = tcp_connect(&sockfd, host, port, 0);
-            if(err == TCP_CONNECTED)
-                CyaSSL_SetIO_LwIP(ssl, sockfd, NULL, NULL, NULL);
-            else
-                BREAK ;
-        #endif
+        tcp_connect(&sockfd, host, port, 0);
     }
     CyaSSL_set_fd(ssl, sockfd);
 #ifdef HAVE_CRL
@@ -646,9 +631,6 @@ CASE(CLIENT_TCP_CONN):
     if (matchName && doPeerCheck)
         CyaSSL_check_domain_name(ssl, domain);
 #ifndef CYASSL_CALLBACKS
-            
-CASE(CLIENT_SSL_CONN):
-
     if (nonBlocking) {
         CyaSSL_set_using_nonblock(ssl, 1);
         tcp_set_nonblocking(&sockfd);
@@ -657,10 +639,6 @@ CASE(CLIENT_SSL_CONN):
     else if (CyaSSL_connect(ssl) != SSL_SUCCESS) {
         /* see note at top of README */
         int  err = CyaSSL_get_error(ssl, 0);
-        #if defined(HAVE_LWIP_NATIVE)
-        if(err == SSL_ERROR_WANT_READ)
-            BREAK ;
-        #endif
         char buffer[CYASSL_MAX_ERROR_SZ];
         printf("err = %d, %s\n", err,
                                 CyaSSL_ERR_error_string(err, buffer));
@@ -672,21 +650,17 @@ CASE(CLIENT_SSL_CONN):
     timeout.tv_usec = 0;
     NonBlockingSSL_Connect(ssl);  /* will keep retrying on timeout */
 #endif
-
     showPeer(ssl);
 
     if (sendGET) {
         printf("SSL connect ok, sending GET...\n");
         msgSz = 28;
-        //strncpy(msg, "GET /index.html HTTP/1.0\r\n\r\n", msgSz);
-        strncpy(msg, "GET / HTTP/1.0\r\n\r\n", msgSz);
+        strncpy(msg, "GET /index.html HTTP/1.0\r\n\r\n", msgSz);
         msg[msgSz] = '\0';
     }
     if (CyaSSL_write(ssl, msg, msgSz) != msgSz)
         err_sys("SSL_write failed");
 
-CASE(CLIENT_SSL_READ):
-
     input = CyaSSL_read(ssl, reply, sizeof(reply)-1);
     if (input > 0) {
         reply[input] = 0;
@@ -708,9 +682,8 @@ CASE(CLIENT_SSL_READ):
         int readErr = CyaSSL_get_error(ssl, 0);
         if (readErr != SSL_ERROR_WANT_READ)
             err_sys("CyaSSL_read failed");
-        BREAK ;
     }
-    
+
 #ifndef NO_SESSION_CACHE
     if (resumeSession) {
         if (doDTLS) {
@@ -809,11 +782,6 @@ CASE(CLIENT_SSL_READ):
 #endif /* USE_CYASSL_MEMORY */
 
     return 0;
-    }
-
-END_SWITCH ; /* End of SWITCH(stat) */
-
-    return 0 ;
 }
 
 
@@ -863,6 +831,7 @@ END_SWITCH ; /* End of SWITCH(stat) */
 #endif /* NO_MAIN_DRIVER */
 
 
+
 #ifdef CYASSL_CALLBACKS
 
     int handShakeCB(HandShakeInfo* info)
diff --git a/examples/client/client.h b/examples/client/client.h
index b4acf4122..2d051fb2d 100644
--- a/examples/client/client.h
+++ b/examples/client/client.h
@@ -23,40 +23,3 @@
 
 THREAD_RETURN CYASSL_THREAD client_test(void* args);
 
-#if defined(HAVE_LWIP_NATIVE)
-
-static enum Client_Stat {
-        CLIENT_BEGIN ,
-        CLIENT_TCP_CONN ,
-        CLIENT_SSL_CONN ,
-        CLIENT_SSL_READ ,
-} client_stat ;
-
-int tcp_connect_nb(struct tcp_pcb **pcb, const char* ip, word16 port, int udp);
-void tcp_CloseSocket_nb(struct tcp_pcb *pcb) ;
-#define tcp_connect(s, h, p, f) tcp_connect_nb(s, h, p, f)
-#define CloseSocket(s) tcp_CloseSocket_nb(s)
-#define CyaSSL_set_fd(ssl, s)
-
-#endif
-
-
-#if defined(HAVE_LWIP_NATIVE)
-
-#define SWITCH_STAT       switch(client_stat) { case CLIENT_BEGIN:
-#define CASE(stat)        client_stat = stat ; case stat 
-#define BREAK             break
-#define END_SWITCH        }
-#define STATIC_NB         static
-
-#else
-
-#define SWITCH_STAT
-#define CASE(value)
-#define BREAK
-#define END_SWITHCH
-#define STATIC_NB
-
-#endif
-
-
diff --git a/src/internal.c b/src/internal.c
index 4afc7818f..5b6998f13 100644
--- a/src/internal.c
+++ b/src/internal.c
@@ -396,11 +396,6 @@ int InitSSL_Ctx(CYASSL_CTX* ctx, CYASSL_METHOD* method)
     ctx->CBIORecv = NetX_Receive;
     ctx->CBIOSend = NetX_Send;
 #endif
-#ifdef HAVE_LWIP_NATIVE
-    ctx->CBIORecv = CyaSSL_LwIP_Receive ;
-    ctx->CBIOSend = CyaSSL_LwIP_Send ;
-#endif
-
     ctx->partialWrite   = 0;
     ctx->verifyCallback = 0;
 
@@ -1433,10 +1428,6 @@ int InitSSL(CYASSL* ssl, CYASSL_CTX* ctx)
     ssl->IOCB_ReadCtx  = &ssl->nxCtx;  /* default NetX IO ctx, same for read */
     ssl->IOCB_WriteCtx = &ssl->nxCtx;  /* and write */
 #endif
-#ifdef HAVE_LWIP_NATIVE
-    ssl->lwipCtx.pbuf = NULL ;
-    ssl->lwipCtx.pulled = 0 ;
-#endif
 #ifdef CYASSL_DTLS
     ssl->IOCB_CookieCtx = NULL;      /* we don't use for default cb */
     ssl->dtls_expected_rx = MAX_MTU;
diff --git a/src/io.c b/src/io.c
index fa59345ed..55f28eed3 100644
--- a/src/io.c
+++ b/src/io.c
@@ -553,6 +553,7 @@ static int tcp_connect(SOCKET_T* sockfd, const char* ip, word16 port)
         CYASSL_MSG("bad socket fd, out of fds?");
         return -1;
     }
+
     if (connect(*sockfd, (struct sockaddr *)&addr, sockaddr_len) != 0) {
         CYASSL_MSG("OCSP responder tcp connect failed");
         return -1;
@@ -1044,211 +1045,3 @@ void CyaSSL_SetIO_NetX(CYASSL* ssl, NX_TCP_SOCKET* nxSocket, ULONG waitOption)
 
 #endif /* HAVE_NETX */
 
-#ifdef HAVE_LWIP_NATIVE
-
-#include "lwip/tcp.h"
-#include "lwip/pbuf.h"
-#include "lwip/sockets.h"
-
-#if 0
-/*Enable debug*/
-#include 
-#define DBG_PRINTF(x, ...) printf("[SSLClient : DBG]"x"\r\n", ##__VA_ARGS__);
-#define ERR_PRINTF(x, ...) printf("[SSLClient:ERROR]"x"\r\n", ##__VA_ARGS__);
-#else
-/*Disable debug*/
-#define DBG_PRINTF(x, ...)
-#define ERR_PRINTF(x, ...)
-#endif
-
-#if 0
-/*Enable debug*/
-#define DBG_PRINTF_CB(x, ...) printf("[HTTPSClient : DBG]"x"\r\n", ##__VA_ARGS__);
-#else
-/*Disable debug*/
-#define DBG_PRINTF_CB(x, ...)
-#endif
-
-#ifdef CYASSL_IAR_ARM
-    #include  "intrinsics.h" 
-#endif
-
-static void CyaSSL_PbufFree(void *vp)
-{
-    struct pbuf *p ;
-    struct pbuf * next;
-    p = (struct pbuf *) vp ;
-    while(p->next != NULL)
-    {
-        next = p->next;
-        pbuf_free(p);  
-        p = next;
-    }    
-    pbuf_free(p);
-}
-
-static int CyaSSL_GetDataFromPbuf(char *buff, CYASSL *ssl, int size)
-{
-    struct pbuf *p ;
-    struct pbuf *p_next ;
-    int totalLen ;
-    int skipLen = 0 ;
-
-    p = ssl->lwipCtx.pbuf ;
-
-    #if defined(DEBUG_PBUF)
-    printf("WantRead Size=%d\n", size) ;
-    do {
-        printf("p=%x, p->len=%d, p->tot_len=%d\n", p, p->len,  p->tot_len) ;
-        if(p != p->next)
-            p = p->next ;
-        else break ;
-    } while(p) ;
-    p = ssl->lwipCtx.pbuf ;    
-    #endif
-    if(p->tot_len < (ssl->lwipCtx.pulled + size))
-        return 0 ;
-    
-    while(p) { /* skip the part pulled before */
-        if(p->len && p->len > (ssl->lwipCtx.pulled - skipLen) ){ 
-            skipLen = (ssl->lwipCtx.pulled - skipLen) ;
-            break ;
-        } else {
-            skipLen += p->len ;
-            if(p->next)
-                p = p->next ;
-            else return 0 ;
-        }
-    } 
-    
-    totalLen = 0 ;
-    while(p){
-        if(p->len) {
-          if((p->len - skipLen) > (size - totalLen)) { /* buffer full */
-                memcpy(&buff[totalLen], (const char *)&(((char *)(p->payload))[skipLen]), size-totalLen) ;
-                totalLen = size  ;
-                break ;
-          } else {
-                memcpy(&buff[totalLen], (const char *)&(((char *)(p->payload))[skipLen]), p->len - skipLen) ;
-                totalLen += (p->len-skipLen) ;
-                skipLen = 0 ;
-          }
-        }
-        if(p->next){
-            p_next = p->next ;
-            p = p_next ;
-        } else break ;
-    }
-    ssl->lwipCtx.pulled += totalLen ;
-    if(ssl->lwipCtx.pbuf->tot_len <= ssl->lwipCtx.pulled) {
-        CyaSSL_PbufFree(ssl->lwipCtx.pbuf) ;
-        ssl->lwipCtx.pbuf = NULL ;
-        tcp_recved(ssl->lwipCtx.pcb,ssl->lwipCtx.pbuf->tot_len) ;
-    }
-    return totalLen;
-}
-
-err_t CyaSSL_LwIP_recv_cb(void *cb, struct tcp_pcb *pcb, struct pbuf *p, s8_t err)
-{
-    struct pbuf *next ;
-    CYASSL *ssl ;
-    ssl = (CYASSL *)cb ;
-    
-    if((cb == NULL)||(pcb == NULL))
-        ERR_PRINTF("CyaSSL_LwIP_recv_cb, cb=%x, pcb=%d\n", cb, pcb) ;
-    if(p && (err == 0)) {
-        DBG_PRINTF_CB("CyaSSL_LwIP_recv_cb, pbuf=%x, err=%d, tot_len=%d\n", p, err, p->tot_len) ;
-    }else {
-        ERR_PRINTF("CyaSSL_LwIP_recv_cb, pbuf=%x, err=%d\n", p, err) ;
-        return ERR_OK; /* don't go to SSL_CONN */
-    }
-
-    if(ssl->lwipCtx.pbuf) {
-        next = ssl->lwipCtx.pbuf ;
-        while(1) {
-            if(next->next)
-                next = next->next ;
-            else break ;
-        }
-        next->next = p ;
-        ssl->lwipCtx.pbuf->tot_len += p->tot_len ;
-    } else {
-        ssl->lwipCtx.pbuf = p ;
-    }
-    ssl->lwipCtx.pulled = 0 ;
-    ssl->lwipCtx.wait = 10000 ;
-    if(ssl->lwipCtx.recv)
-        return ssl->lwipCtx.recv(ssl->lwipCtx.arg, pcb, p, err) ; 
-                                                      /* user callback */
-    return ERR_OK;
-}
-
-err_t  CyaSSL_LwIP_sent_cb(void *cb, struct tcp_pcb *pcb, u16_t err)
-{
-    CYASSL *ssl ;
-    ssl = (CYASSL *)cb ;
-    DBG_PRINTF_CB("CaSSL_LwIP_write_cb, err=%d\n", err) ;
-    if(ssl->lwipCtx.sent)
-        return ssl->lwipCtx.sent(ssl->lwipCtx.arg, pcb, err) ; 
-                                                      /* user callback */
-    return ERR_OK;
-}
-
-int CyaSSL_LwIP_Receive(CYASSL* ssl, char *buf, int sz, void *cb)
-{
-    int ret ;
-    DBG_PRINTF_CB("CyaSSL_LwIP_Receive: ssl_nb = %x\n", ssl) ;  
-
-    if(ssl->lwipCtx.pbuf) {
-        if(ssl->lwipCtx.wait){
-            ssl->lwipCtx.wait-- ;
-            return CYASSL_CBIO_ERR_WANT_READ ;
-        }
-        DBG_PRINTF_CB("Received Len=%d, Want Len= %d\n", ssl->lwipCtx.pbuf->tot_len, sz) ;
-        ret = CyaSSL_GetDataFromPbuf(buf, ssl, sz) ;
-        if(ret == 0)
-             ret = CYASSL_CBIO_ERR_WANT_READ ;
-    } else {
-        DBG_PRINTF_CB("No Received Data\n") ;
-        ret = CYASSL_CBIO_ERR_WANT_READ ;
-    }
-    return ret ;
-}
-
-int CyaSSL_LwIP_Send(CYASSL* ssl, char *buf, int sz, void *cb)
-{
-    err_t ret ;
-    
-    DBG_PRINTF_CB("CyaSSL_LwIP_Send: ssl = %x, pcb = %x\n", ssl, ssl->lwipCtx.pcb) ;
-    DBG_PRINTF_CB("Send buf[0,1,2,3]=%x,%x,%x,%x, sz=%d\n", buf[0], buf[1], buf[2], buf[3], sz) ;
-    ret = tcp_write(ssl->lwipCtx.pcb, buf, sz, TCP_WRITE_FLAG_COPY) ;
-    if(ret == ERR_OK)
-        return sz ;
-    else {
-        ERR_PRINTF("Send ssl=%x, ret=%d\n", ssl, ret) ;
-        return -1 ;
-    }
-}
-
-int CyaSSL_SetIO_LwIP(CYASSL* ssl, void* pcb, 
-                              tcp_recv_fn recv, tcp_sent_fn sent, void *arg)
-{
-    if (ssl && pcb) {
-        ssl->lwipCtx.pcb = (struct tcp_pcb *)pcb ;
-        ssl->lwipCtx.recv = recv ; /*  recv user callback */
-        ssl->lwipCtx.sent = sent ; /*  sent user callback */
-        ssl->lwipCtx.arg  = arg  ;
-        ssl->lwipCtx.pbuf = 0 ;
-        ssl->lwipCtx.pulled = 0 ;
-        ssl->lwipCtx.wait = 0 ;
-        /* CyaSSL_LwIP_recv/sent_cb invokes recv/sent user callback in them. */
-        tcp_recv(pcb, CyaSSL_LwIP_recv_cb) ;
-        tcp_sent(pcb, CyaSSL_LwIP_sent_cb) ;    
-        tcp_arg (pcb, (void *)ssl) ;
-    } else return BAD_FUNC_ARG ;
-    return ERR_OK ;
-}
-
-#endif /* HAVE_LWIP_NATIVE */
-
-

From a9ca608030a827dd4a6f5e41226d3d16d88351cd Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 11 Mar 2014 11:22:39 +0900
Subject: [PATCH 36/43] Sync with CyaSSL master

---
 .gitignore                                    |    2 -
 configure.ac                                  |   52 +-
 ctaocrypt/benchmark/benchmark.c               |   92 +-
 ctaocrypt/src/aes.c                           |  242 +-
 ctaocrypt/src/asn.c                           |   22 +-
 ctaocrypt/src/coding.c                        |    5 -
 ctaocrypt/src/des3.c                          |  132 -
 ctaocrypt/src/hmac.c                          |   16 -
 ctaocrypt/src/md5.c                           |    8 +-
 ctaocrypt/src/port/pic32/pic32mz-hash.c       |  243 --
 ctaocrypt/src/pwdbased.c                      |   16 -
 ctaocrypt/src/random.c                        |   45 +-
 ctaocrypt/src/sha.c                           |   14 +-
 ctaocrypt/src/sha256.c                        |   14 +-
 ctaocrypt/test/test.c                         |    2 -
 cyassl/ctaocrypt/aes.h                        |    7 +-
 cyassl/ctaocrypt/md5.h                        |   12 +-
 cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h   |   88 -
 cyassl/ctaocrypt/settings.h                   |   52 +-
 cyassl/ctaocrypt/sha.h                        |   10 +-
 cyassl/ctaocrypt/sha256.h                     |    7 -
 cyassl/internal.h.orig                        | 2140 +++++++++++++++++
 cyassl/test.h                                 |    2 +-
 cyassl/version.h                              |    4 +-
 examples/server/server.c                      |    2 +-
 m4/ax_tls.m4                                  |   18 +-
 .../nbproject/Makefile-default.mk             |  164 --
 .../nbproject/Makefile-genesis.properties     |    8 -
 .../nbproject/Makefile-impl.mk                |   69 -
 .../nbproject/Makefile-local-default.mk       |   37 -
 .../nbproject/Makefile-variables.mk           |   13 -
 .../nbproject/Package-default.bash            |   73 -
 .../nbproject/private/private.xml             |    6 -
 mcapi/cyassl.X/nbproject/Makefile-default.mk  |  626 -----
 .../nbproject/Makefile-genesis.properties     |    8 -
 mcapi/cyassl.X/nbproject/Makefile-impl.mk     |   69 -
 .../nbproject/Makefile-local-default.mk       |   37 -
 .../cyassl.X/nbproject/Makefile-variables.mk  |   13 -
 mcapi/cyassl.X/nbproject/Package-default.bash |   73 -
 mcapi/zlib.X/nbproject/Makefile-default.mk    |  314 ---
 .../nbproject/Makefile-genesis.properties     |    8 -
 mcapi/zlib.X/nbproject/Makefile-impl.mk       |   69 -
 .../nbproject/Makefile-local-default.mk       |   37 -
 mcapi/zlib.X/nbproject/Makefile-variables.mk  |   13 -
 mcapi/zlib.X/nbproject/Package-default.bash   |   73 -
 mplabx/benchmark_main.c                       |    9 -
 mplabx/crypto.h                               |   82 -
 .../nbproject/Makefile-default.mk             |  162 --
 .../nbproject/Makefile-genesis.properties     |    8 -
 .../nbproject/Makefile-impl.mk                |   69 -
 .../nbproject/Makefile-local-default.mk       |   37 -
 .../nbproject/Makefile-variables.mk           |   13 -
 .../nbproject/Package-default.bash            |   73 -
 .../nbproject/configurations.xml              |    2 +-
 .../nbproject/private/private.xml             |    3 -
 .../nbproject/Makefile-default.mk             |  162 --
 .../nbproject/Makefile-genesis.properties     |    8 -
 .../nbproject/Makefile-impl.mk                |   69 -
 .../nbproject/Makefile-local-default.mk       |   37 -
 .../nbproject/Makefile-variables.mk           |   13 -
 .../nbproject/Package-default.bash            |   73 -
 .../nbproject/configurations.xml              |    3 +-
 .../SuppressibleMessageMemo.properties        |    3 -
 .../nbproject/private/private.xml             |    3 -
 .../dist/default/production/cyassl.X.a        |  Bin 236980 -> 0 bytes
 mplabx/cyassl.X/nbproject/Makefile-default.mk |  590 -----
 .../nbproject/Makefile-genesis.properties     |    8 -
 mplabx/cyassl.X/nbproject/Makefile-impl.mk    |   69 -
 .../nbproject/Makefile-local-default.mk       |   37 -
 .../cyassl.X/nbproject/Makefile-variables.mk  |   13 -
 .../cyassl.X/nbproject/Package-default.bash   |   73 -
 mplabx/cyassl.X/nbproject/configurations.xml  |    2 +-
 mplabx/cyassl.X/nbproject/private/private.xml |    3 -
 mplabx/cyassl.X/print_mem.c                   |    7 -
 mplabx/ssl-dummy.c                            |   52 -
 mplabx/test_main.c                            |   11 -
 src/ocsp.c                                    |    3 +-
 src/ssl.c                                     |    6 -
 src/tls.c                                     |   24 +-
 testsuite/testsuite.c                         |    4 +-
 80 files changed, 2253 insertions(+), 4435 deletions(-)
 delete mode 100644 ctaocrypt/src/port/pic32/pic32mz-hash.c
 delete mode 100644 cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h
 create mode 100644 cyassl/internal.h.orig
 delete mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-default.mk
 delete mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
 delete mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-impl.mk
 delete mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
 delete mode 100644 mcapi/ctaocrypt_test.X/nbproject/Makefile-variables.mk
 delete mode 100644 mcapi/ctaocrypt_test.X/nbproject/Package-default.bash
 delete mode 100644 mcapi/ctaocrypt_test.X/nbproject/private/private.xml
 delete mode 100644 mcapi/cyassl.X/nbproject/Makefile-default.mk
 delete mode 100644 mcapi/cyassl.X/nbproject/Makefile-genesis.properties
 delete mode 100644 mcapi/cyassl.X/nbproject/Makefile-impl.mk
 delete mode 100644 mcapi/cyassl.X/nbproject/Makefile-local-default.mk
 delete mode 100644 mcapi/cyassl.X/nbproject/Makefile-variables.mk
 delete mode 100644 mcapi/cyassl.X/nbproject/Package-default.bash
 delete mode 100644 mcapi/zlib.X/nbproject/Makefile-default.mk
 delete mode 100644 mcapi/zlib.X/nbproject/Makefile-genesis.properties
 delete mode 100644 mcapi/zlib.X/nbproject/Makefile-impl.mk
 delete mode 100644 mcapi/zlib.X/nbproject/Makefile-local-default.mk
 delete mode 100644 mcapi/zlib.X/nbproject/Makefile-variables.mk
 delete mode 100644 mcapi/zlib.X/nbproject/Package-default.bash
 delete mode 100644 mplabx/crypto.h
 delete mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-default.mk
 delete mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-genesis.properties
 delete mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-impl.mk
 delete mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-local-default.mk
 delete mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-variables.mk
 delete mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/Package-default.bash
 delete mode 100644 mplabx/ctaocrypt_benchmark.X/nbproject/private/private.xml
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-default.mk
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-impl.mk
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/Makefile-variables.mk
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/Package-default.bash
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/private/SuppressibleMessageMemo.properties
 delete mode 100644 mplabx/ctaocrypt_test.X/nbproject/private/private.xml
 delete mode 100644 mplabx/cyassl.X/dist/default/production/cyassl.X.a
 delete mode 100644 mplabx/cyassl.X/nbproject/Makefile-default.mk
 delete mode 100644 mplabx/cyassl.X/nbproject/Makefile-genesis.properties
 delete mode 100644 mplabx/cyassl.X/nbproject/Makefile-impl.mk
 delete mode 100644 mplabx/cyassl.X/nbproject/Makefile-local-default.mk
 delete mode 100644 mplabx/cyassl.X/nbproject/Makefile-variables.mk
 delete mode 100644 mplabx/cyassl.X/nbproject/Package-default.bash
 delete mode 100644 mplabx/cyassl.X/nbproject/private/private.xml
 delete mode 100644 mplabx/cyassl.X/print_mem.c
 delete mode 100644 mplabx/ssl-dummy.c

diff --git a/.gitignore b/.gitignore
index a625fd539..44ff8d102 100644
--- a/.gitignore
+++ b/.gitignore
@@ -98,5 +98,3 @@ IDE\MDK-ARM\LPC43xx\LPC43xx/
 *.gcno
 *.gcda
 *.gcov
-
-Memo/
diff --git a/configure.ac b/configure.ac
index 8ccd15bda..d10f6c9f7 100644
--- a/configure.ac
+++ b/configure.ac
@@ -6,7 +6,7 @@
 #
 #
 
-AC_INIT([cyassl],[2.9.0],[https://github.com/cyassl/cyassl/issues],[cyassl],[http://www.yassl.com])
+AC_INIT([cyassl],[2.9.1],[https://github.com/cyassl/cyassl/issues],[cyassl],[http://www.yassl.com])
 
 AC_CONFIG_AUX_DIR([build-aux])
 
@@ -102,7 +102,7 @@ OPTIMIZE_HUGE_CFLAGS="-funroll-loops -DTFM_SMALL_SET -DTFM_HUGE_SET"
 DEBUG_CFLAGS="-g -DDEBUG -DDEBUG_CYASSL"
 
 # Thread local storage
-AX_TLS([AM_CFLAGS="$AM_CFLAGS -DHAVE_THREAD_LS"])
+AX_TLS([AM_CFLAGS="$AM_CFLAGS -DHAVE_THREAD_LS"], [:])
 
 # DEBUG
 AX_DEBUG
@@ -1268,54 +1268,6 @@ fi
 AM_CONDITIONAL([BUILD_PKCS7], [test "x$ENABLED_PKCS7" = "xyes"])
 
 
-# Simple Certificate Enrollment Protocol (SCEP)
-AC_ARG_ENABLE([scep],
-    [  --enable-scep           Enable wolfSCEP (default: disabled)],
-    [ ENABLED_WOLFSCEP=$enableval ],
-    [ ENABLED_WOLFSCEP=no ]
-    )
-if test "$ENABLED_WOLFSCEP" = "yes"
-then
-    # Enable prereqs if not already enabled
-    if test "x$ENABLED_KEYGEN" = "xno"
-    then
-        ENABLED_KEYGEN="yes"
-        AM_CFLAGS="$AM_CFLAGS -DCYASSL_KEY_GEN"
-    fi
-    if test "x$ENABLED_CERTGEN" = "xno"
-    then
-        ENABLED_CERTGEN="yes"
-        AM_CFLAGS="$AM_CFLAGS -DCYASSL_CERT_GEN"
-    fi
-    if test "x$ENABLED_CERTREQ" = "xno"
-    then
-        ENABLED_CERTREQ="yes"
-        AM_CFLAGS="$AM_CFLAGS -DCYASSL_CERT_REQ"
-    fi
-    if test "x$ENABLED_PKCS7" = "xno"
-    then
-        ENABLED_PKCS7="yes"
-        AM_CFLAGS="$AM_CFLAGS -DHAVE_PKCS7"
-        AM_CONDITIONAL([BUILD_PKCS7], [test "x$ENABLED_PKCS7" = "xyes"])
-    fi
-    AM_CFLAGS="$AM_CFLAGS -DCYASSL_HAVE_WOLFSCEP"
-fi
-
-# PKCS7
-AC_ARG_ENABLE([pkcs7],
-    [  --enable-pkcs7          Enable PKCS7 (default: disabled)],
-    [ ENABLED_PKCS7=$enableval ],
-    [ ENABLED_PKCS7=no ],
-    )
-
-if test "$ENABLED_PKCS7" = "yes"
-then
-    AM_CFLAGS="$AM_CFLAGS -DHAVE_PKCS7"
-fi
-
-AM_CONDITIONAL([BUILD_PKCS7], [test "x$ENABLED_PKCS7" = "xyes"])
-
-
 # Simple Certificate Enrollment Protocol (SCEP)
 AC_ARG_ENABLE([scep],
     [  --enable-scep           Enable wolfSCEP (default: disabled)],
diff --git a/ctaocrypt/benchmark/benchmark.c b/ctaocrypt/benchmark/benchmark.c
index 5dee5064b..72503131b 100644
--- a/ctaocrypt/benchmark/benchmark.c
+++ b/ctaocrypt/benchmark/benchmark.c
@@ -85,7 +85,6 @@ void bench_rabbit(void);
 void bench_aes(int);
 void bench_aesgcm(void);
 void bench_aesccm(void);
-void bench_aesctr(void);
 void bench_camellia(void);
 
 void bench_md5(void);
@@ -156,11 +155,6 @@ int benchmark_test(void *args)
 #ifdef HAVE_AESGCM
     bench_aesgcm();
 #endif
-
-#ifdef CYASSL_AES_COUNTER
-    bench_aesctr();
-#endif
-
 #ifdef HAVE_AESCCM
     bench_aesccm();
 #endif
@@ -230,15 +224,12 @@ static const char blockType[] = "kB";  /* used in printf output */
 static const int ntimes      = 1;        /* public key iterations */
 static const int genTimes   = 5;
 static const int agreeTimes = 5;
-const int ntimes      = 1;        /* public key iterations */
-const int genTimes   = 5;
-const int agreeTimes = 5;
 #else
 static const int numBlocks = 5;
 static const char blockType[] = "megs";
-const int ntimes      = 100;
-const int genTimes   = 100;
-const int agreeTimes = 100;
+static const int ntimes      = 100;
+static const int genTimes   = 100;
+static const int agreeTimes = 100;
 #endif
 
 static const byte key[] = 
@@ -294,7 +285,7 @@ void bench_aes(int show)
 #endif
 
     if (show)
-        printf("AES      %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+        printf("AES      %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
                                                   blockType, total, persec);
 #ifdef HAVE_CAVIUM
     AesFreeCavium(&enc);
@@ -331,40 +322,13 @@ void bench_aesgcm(void)
     persec = persec / 1024;
 #endif
 
-    printf("AES-GCM  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
-                                              blockType, total, persec);
-}
-#endif
-
-#ifdef CYASSL_AES_COUNTER
-void bench_aesctr(void)
-{
-    Aes    enc;
-    double start, total, persec;
-    int    i;
-
-    AesSetKeyDirect(&enc, key, AES_BLOCK_SIZE, iv, AES_ENCRYPTION);
-    start = current_time(1);
-
-    for(i = 0; i < numBlocks; i++)
-        AesCtrEncrypt(&enc, plain, cipher, sizeof(plain));
-
-    total = current_time(0) - start;
-
-    persec = 1 / total * numBlocks;
-#ifdef BENCH_EMBEDDED
-    /* since using kB, convert to MB/s */
-    persec = persec / 1024;
-#endif
-
-    printf("AES-CTR  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+    printf("AES-GCM  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
 
 
-
-#ifdef CYASSL_AESCCM
+#ifdef HAVE_AESCCM
 void bench_aesccm(void)
 {
     Aes    enc;
@@ -386,7 +350,7 @@ void bench_aesccm(void)
     persec = persec / 1024;
 #endif
 
-    printf("AES-CCM  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+    printf("AES-CCM  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -413,7 +377,7 @@ void bench_camellia(void)
     persec = persec / 1024;
 #endif
 
-    printf("Camellia %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+    printf("Camellia %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -444,7 +408,7 @@ void bench_des(void)
     persec = persec / 1024;
 #endif
 
-    printf("3DES     %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+    printf("3DES     %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
                                               blockType, total, persec);
 #ifdef HAVE_CAVIUM
     Des3_FreeCavium(&enc);
@@ -478,7 +442,7 @@ void bench_arc4(void)
     persec = persec / 1024;
 #endif
 
-    printf("ARC4     %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+    printf("ARC4     %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
                                               blockType, total, persec);
 #ifdef HAVE_CAVIUM
     Arc4FreeCavium(&enc);
@@ -507,7 +471,7 @@ void bench_hc128(void)
     persec = persec / 1024;
 #endif
 
-    printf("HC128    %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+    printf("HC128    %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif /* HAVE_HC128 */
@@ -533,7 +497,7 @@ void bench_rabbit(void)
     persec = persec / 1024;
 #endif
 
-    printf("RABBIT   %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+    printf("RABBIT   %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif /* NO_RABBIT */
@@ -562,7 +526,7 @@ void bench_md5(void)
     persec = persec / 1024;
 #endif
 
-    printf("MD5      %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+    printf("MD5      %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif /* NO_MD5 */
@@ -591,7 +555,7 @@ void bench_sha(void)
     persec = persec / 1024;
 #endif
 
-    printf("SHA      %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+    printf("SHA      %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif /* NO_SHA */
@@ -620,7 +584,7 @@ void bench_sha256(void)
     persec = persec / 1024;
 #endif
 
-    printf("SHA-256  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+    printf("SHA-256  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -648,7 +612,7 @@ void bench_sha512(void)
     persec = persec / 1024;
 #endif
 
-    printf("SHA-512  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+    printf("SHA-512  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -676,7 +640,7 @@ void bench_ripemd(void)
     persec = persec / 1024;
 #endif
 
-    printf("RIPEMD   %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+    printf("RIPEMD   %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -705,7 +669,7 @@ void bench_blake2(void)
     persec = persec / 1024;
 #endif
 
-    printf("BLAKE2b  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+    printf("BLAKE2b  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -787,7 +751,7 @@ void bench_rsa(void)
     each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
-    printf("RSA %d encryption took %6.3f milliseconds, avg over %d"
+    printf("RSA %d encryption took %6.2f milliseconds, avg over %d" 
            " iterations\n", rsaKeySz, milliEach, ntimes);
 
     if (ret < 0) {
@@ -806,7 +770,7 @@ void bench_rsa(void)
     each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
-    printf("RSA %d decryption took %6.3f milliseconds, avg over %d"
+    printf("RSA %d decryption took %6.2f milliseconds, avg over %d" 
            " iterations\n", rsaKeySz, milliEach, ntimes);
 
     FreeRsaKey(&rsaKey);
@@ -892,7 +856,7 @@ void bench_dh(void)
     each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
-    printf("DH  %d key generation  %6.3f milliseconds, avg over %d"
+    printf("DH  %d key generation  %6.2f milliseconds, avg over %d" 
            " iterations\n", dhKeySz, milliEach, ntimes);
 
     DhGenerateKeyPair(&dhKey, &rng, priv2, &privSz2, pub2, &pubSz2);
@@ -905,7 +869,7 @@ void bench_dh(void)
     each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
-    printf("DH  %d key agreement   %6.3f milliseconds, avg over %d"
+    printf("DH  %d key agreement   %6.2f milliseconds, avg over %d" 
            " iterations\n", dhKeySz, milliEach, ntimes);
 
 #if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048)
@@ -935,7 +899,7 @@ void bench_rsaKeyGen(void)
     each  = total / genTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
     printf("\n");
-    printf("RSA 1024 key generation  %6.3f milliseconds, avg over %d"
+    printf("RSA 1024 key generation  %6.2f milliseconds, avg over %d" 
            " iterations\n", milliEach, genTimes);
 
     /* 2048 bit */
@@ -950,7 +914,7 @@ void bench_rsaKeyGen(void)
     total = current_time(0) - start;
     each  = total / genTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
-    printf("RSA 2048 key generation  %6.3f milliseconds, avg over %d"
+    printf("RSA 2048 key generation  %6.2f milliseconds, avg over %d" 
            " iterations\n", milliEach, genTimes);
 }
 #endif /* CYASSL_KEY_GEN */
@@ -979,7 +943,7 @@ void bench_eccKeyGen(void)
     each  = total / genTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
     printf("\n");
-    printf("ECC  256 key generation  %6.3f milliseconds, avg over %d"
+    printf("ECC  256 key generation  %6.2f milliseconds, avg over %d" 
            " iterations\n", milliEach, genTimes);
 }
 
@@ -1029,7 +993,7 @@ void bench_eccKeyAgree(void)
     total = current_time(0) - start;
     each  = total / agreeTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
-    printf("EC-DHE   key agreement   %6.3f milliseconds, avg over %d"
+    printf("EC-DHE   key agreement   %6.2f milliseconds, avg over %d" 
            " iterations\n", milliEach, agreeTimes);
 
     /* make dummy digest */
@@ -1051,7 +1015,7 @@ void bench_eccKeyAgree(void)
     total = current_time(0) - start;
     each  = total / agreeTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
-    printf("EC-DSA   sign   time     %6.3f milliseconds, avg over %d"
+    printf("EC-DSA   sign   time     %6.2f milliseconds, avg over %d" 
            " iterations\n", milliEach, agreeTimes);
 
     start = current_time(1);
@@ -1068,7 +1032,7 @@ void bench_eccKeyAgree(void)
     total = current_time(0) - start;
     each  = total / agreeTimes;  /* per second  */
     milliEach = each * 1000;     /* millisconds */
-    printf("EC-DSA   verify time     %6.3f milliseconds, avg over %d"
+    printf("EC-DSA   verify time     %6.2f milliseconds, avg over %d" 
            " iterations\n", milliEach, agreeTimes);
 
     ecc_free(&genKey2);
diff --git a/ctaocrypt/src/aes.c b/ctaocrypt/src/aes.c
index 02a15690a..4cb723d31 100644
--- a/ctaocrypt/src/aes.c
+++ b/ctaocrypt/src/aes.c
@@ -55,184 +55,6 @@
                                     word32 length);
 #endif
 
-#if defined(CYASSL_PIC32MZ_CRYPT)
-
-#include "../../cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h"
-#define DEBUG_CYASSL
-
-    /* core hardware crypt engine driver */
-    static void AesCrypt(Aes *aes, byte* out, const byte* in, word32 sz,
-                                            int dir, int algo, int cryptoalgo)
-    {
-        securityAssociation *sa_p ;
-        bufferDescriptor *bd_p ;
-
-        volatile securityAssociation sa __attribute__((aligned (8)));
-        volatile bufferDescriptor bd __attribute__((aligned (8)));
-        volatile int k ;
-
-        /* get uncached address */
-        sa_p = KVA0_TO_KVA1(&sa) ;
-        bd_p = KVA0_TO_KVA1(&bd) ;
-
-        /* Sync cache and physical memory */
-        if(PIC32MZ_IF_RAM(in)) {
-            XMEMCPY((void *)KVA0_TO_KVA1(in), (void *)in, sz);
-        }
-        XMEMSET((void *)KVA0_TO_KVA1(out), 0, sz);
-        /* Set up the Security Association */
-        XMEMSET((byte *)KVA0_TO_KVA1(&sa), 0, sizeof(sa));
-        sa_p->SA_CTRL.ALGO = algo ; /* AES */
-        sa_p->SA_CTRL.LNC = 1;
-        sa_p->SA_CTRL.LOADIV = 1;
-        sa_p->SA_CTRL.FB = 1;
-        sa_p->SA_CTRL.ENCTYPE = dir ; /* Encryption/Decryption */
-        sa_p->SA_CTRL.CRYPTOALGO = cryptoalgo;
-
-        if(cryptoalgo == PIC32_CRYPTOALGO_AES_GCM){
-            switch(aes->keylen) {
-            case 32:
-                sa_p->SA_CTRL.KEYSIZE = PIC32_AES_KEYSIZE_256 ;
-                break ;
-            case 24:
-                sa_p->SA_CTRL.KEYSIZE = PIC32_AES_KEYSIZE_192 ;
-                break ;
-            case 16:
-                sa_p->SA_CTRL.KEYSIZE = PIC32_AES_KEYSIZE_128 ;
-                break ;
-            }
-        } else
-            sa_p->SA_CTRL.KEYSIZE = PIC32_AES_KEYSIZE_128 ;
-
-        ByteReverseWords(
-        (word32 *)KVA0_TO_KVA1(sa.SA_ENCKEY + 8 - aes->keylen/sizeof(word32)),
-                         (word32 *)aes->key_ce, aes->keylen);
-        ByteReverseWords(
-        (word32*)KVA0_TO_KVA1(sa.SA_ENCIV), (word32 *)aes->iv_ce, 16);
-
-        XMEMSET((byte *)KVA0_TO_KVA1(&bd), 0, sizeof(bd));
-        /* Set up the Buffer Descriptor */
-        bd_p->BD_CTRL.BUFLEN = sz;
-        if(cryptoalgo == PIC32_CRYPTOALGO_AES_GCM) {
-            if(sz % 0x10)
-                bd_p->BD_CTRL.BUFLEN = (sz/0x10 + 1) * 0x10 ;
-        }
-        bd_p->BD_CTRL.LIFM = 1;
-        bd_p->BD_CTRL.SA_FETCH_EN = 1;
-        bd_p->BD_CTRL.LAST_BD = 1;
-        bd_p->BD_CTRL.DESC_EN = 1;
-
-        bd_p->SA_ADDR = (unsigned int)KVA_TO_PA(&sa) ; 
-        bd_p->SRCADDR = (unsigned int)KVA_TO_PA(in) ; 
-        bd_p->DSTADDR = (unsigned int)KVA_TO_PA(out); 
-        bd_p->MSGLEN = sz ;
-
-        CECON = 1 << 6;
-        while (CECON);
-
-        /* Run the engine */
-        CEBDPADDR = (unsigned int)KVA_TO_PA(&bd) ;
-        CEINTEN = 0x07;
-        CECON = 0x27;
-
-        WAIT_ENGINE ;
-
-        if((cryptoalgo == PIC32_CRYPTOALGO_CBC) ||
-           (cryptoalgo == PIC32_CRYPTOALGO_TCBC)||
-           (cryptoalgo == PIC32_CRYPTOALGO_RCBC)) {
-            /* set iv for the next call */
-            if(dir == PIC32_ENCRYPTION) {
-	        XMEMCPY((void *)aes->iv_ce,
-                        (void*)KVA0_TO_KVA1(out + sz - AES_BLOCK_SIZE),
-                        AES_BLOCK_SIZE) ;
-	    } else {
-                ByteReverseWords((word32*)aes->iv_ce,
-                        (word32 *)KVA0_TO_KVA1(in + sz - AES_BLOCK_SIZE),
-                        AES_BLOCK_SIZE);
-	    }
-        }
-        XMEMCPY((byte *)out, (byte *)KVA0_TO_KVA1(out), sz) ;
-        ByteReverseWords((word32*)out, (word32 *)out, sz);
-    }
-
-    int AesCbcEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
-    {
-        AesCrypt(aes, out, in, sz, PIC32_ENCRYPTION, PIC32_ALGO_AES,
-                                                      PIC32_CRYPTOALGO_RCBC );
-    }
-
-    int AesCbcDecrypt(Aes* aes, byte* out, const byte* in, word32 sz)
-    {
-        AesCrypt(aes, out, in, sz, PIC32_DECRYPTION, PIC32_ALGO_AES,
-                                                      PIC32_CRYPTOALGO_RCBC);
-    }
-
-    #if defined(CYASSL_AES_COUNTER)
-    void AesCtrEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
-    {
-        int i ;
-        char out_block[AES_BLOCK_SIZE] ;
-        int odd ;
-        int even ;
-        char *tmp ; /* (char *)aes->tmp, for short */
-
-        tmp = (char *)aes->tmp ;
-        if(aes->left) {
-            if((aes->left + sz) >= AES_BLOCK_SIZE){
-                odd = AES_BLOCK_SIZE - aes->left ;
-            } else {
-                odd = sz ;
-            }
-            XMEMCPY(tmp+aes->left, in, odd) ;
-            if((odd+aes->left) == AES_BLOCK_SIZE){
-                AesCrypt(aes, out_block, tmp, AES_BLOCK_SIZE,
-                    PIC32_ENCRYPTION, PIC32_ALGO_AES, PIC32_CRYPTOALGO_RCTR);
-                XMEMCPY(out, out_block+aes->left, odd) ;
-                aes->left = 0 ;
-                XMEMSET(tmp, 0x0, AES_BLOCK_SIZE) ;
-                /* Increment IV */
-                for (i = AES_BLOCK_SIZE - 1; i >= 0; i--) {
-                    if (++((byte *)aes->iv_ce)[i])
-                        break ;
-                }
-            }
-            in += odd ;
-            out+= odd ;
-            sz -= odd ;
-        }
-        odd = sz % AES_BLOCK_SIZE ;  /* if there is tail flagment */
-        if(sz / AES_BLOCK_SIZE) {
-            even = (sz/AES_BLOCK_SIZE)*AES_BLOCK_SIZE ;
-            AesCrypt(aes, out, in, even, PIC32_ENCRYPTION, PIC32_ALGO_AES,
-                                                    PIC32_CRYPTOALGO_RCTR);
-            out += even ;
-            in  += even ;
-            do {  /* Increment IV */
-                for (i = AES_BLOCK_SIZE - 1; i >= 0; i--) {
-                    if (++((byte *)aes->iv_ce)[i])
-                        break ;
-                }
-                even -= AES_BLOCK_SIZE ;
-            } while((int)even > 0) ;
-        }
-        if(odd) {
-            XMEMSET(tmp+aes->left, 0x0, AES_BLOCK_SIZE - aes->left) ;
-            XMEMCPY(tmp+aes->left, in, odd) ;
-            AesCrypt(aes, out_block, tmp, AES_BLOCK_SIZE,
-                    PIC32_ENCRYPTION, PIC32_ALGO_AES, PIC32_CRYPTOALGO_RCTR);
-            XMEMCPY(out, out_block+aes->left,odd) ;
-            aes->left += odd ;
-        }
-    }
-    #endif /* CYASSL_AES_COUNTER */
-
-    #ifdef HAVE_AESGCM
-    #define HAVE_AES_ENGINE
-    /* Hardware AESGCM borows most of the software AESGCM, GMAC */
-    #endif
-
-#endif /* CYASSL_PIC32MZ_CRYPT */
-
 #ifdef STM32F2_CRYPTO
     /*
      * STM32F2 hardware AES support through the STM32F2 standard peripheral
@@ -617,11 +439,13 @@ extern volatile unsigned char __MBAR[];
 
 int AesCbcEncrypt(Aes* aes, byte* po, const byte* pi, word32 sz)
 {
+	//printf("AesCbcEncrypt(%x, %x, %x, %d)\n", aes, po, pi, sz) ;
 	return(AesCbcCrypt(aes, po, pi, sz, SEC_DESC_AES_CBC_ENCRYPT)) ;
 }
 
 int AesCbcDecrypt(Aes* aes, byte* po, const byte* pi, word32 sz)
 {
+	//printf("AesCbcDecrypt(%x, %x, %x, %d)\n", aes, po, pi, sz) ;
 	return(AesCbcCrypt(aes, po, pi, sz, SEC_DESC_AES_CBC_DECRYPT)) ;
 }
 	
@@ -1498,6 +1322,7 @@ static const word32 Td[5][256] = {
 };
 
 
+
 #define GETBYTE(x, y) (word32)((byte)((x) >> (8 * (y))))
 
 
@@ -1662,19 +1487,6 @@ static int AesSetKeyLocal(Aes* aes, const byte* userKey, word32 keylen,
         ByteReverseWords(rk, rk, keylen);
     #endif
 
-#ifdef CYASSL_PIC32MZ_CRYPT
-    {
-        word32 *akey1 = aes->key_ce;
-        word32 *areg = aes->iv_ce ;
-        aes->keylen = keylen ;
-        XMEMCPY(akey1, userKey, keylen);
-        if (iv)
-            XMEMCPY(areg, iv, AES_BLOCK_SIZE);
-        else
-            XMEMSET(areg,  0, AES_BLOCK_SIZE);
-    }
-#endif
-
     switch(keylen)
     {
     case 16:
@@ -2164,7 +1976,7 @@ static void AesDecrypt(Aes* aes, const byte* inBlock, byte* outBlock)
     XMEMCPY(outBlock + 3 * sizeof(s0), &s3, sizeof(s3));
 }
 
-#ifndef HAVE_AES_ENGINE
+
 int AesCbcEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
 {
     word32 blocks = sz / AES_BLOCK_SIZE;
@@ -2271,7 +2083,7 @@ int AesCbcDecrypt(Aes* aes, byte* out, const byte* in, word32 sz)
 
     return 0;
 }
-#endif
+
 
 #ifdef CYASSL_AES_DIRECT
 
@@ -2304,7 +2116,7 @@ int AesSetKeyDirect(Aes* aes, const byte* userKey, word32 keylen,
 #endif /* CYASSL_AES_DIRECT || CYASSL_AES_COUNTER */
 
 
-#if defined(CYASSL_AES_COUNTER) && !defined(HAVE_AES_ENGINE)
+#ifdef CYASSL_AES_COUNTER
 
 /* Increment AES counter */
 static INLINE void IncrementAesCounter(byte* inOutCtr)
@@ -2994,51 +2806,34 @@ void AesGcmEncrypt(Aes* aes, byte* out, const byte* in, word32 sz,
     word32 partial = sz % AES_BLOCK_SIZE;
     const byte* p = in;
     byte* c = out;
-    byte counter[AES_BLOCK_SIZE];
-    byte *ctr ;
+    byte ctr[AES_BLOCK_SIZE];
     byte scratch[AES_BLOCK_SIZE];
 
     CYASSL_ENTER("AesGcmEncrypt");
 
-#ifdef CYASSL_PIC32MZ_CRYPT
-    ctr = (char *)aes->iv_ce ;
-#else
-    ctr = counter ;
-#endif
-
     XMEMSET(ctr, 0, AES_BLOCK_SIZE);
     XMEMCPY(ctr, iv, ivSz);
     InitGcmCounter(ctr);
 
-#ifdef CYASSL_PIC32MZ_CRYPT
-    if(blocks)
-        AesCrypt(aes, out, in, blocks*AES_BLOCK_SIZE,
-             PIC32_ENCRYPTION, PIC32_ALGO_AES, PIC32_CRYPTOALGO_AES_GCM );
-#endif
     while (blocks--) {
         IncrementGcmCounter(ctr);
-        #ifndef CYASSL_PIC32MZ_CRYPT
         AesEncrypt(aes, ctr, scratch);
         xorbuf(scratch, p, AES_BLOCK_SIZE);
         XMEMCPY(c, scratch, AES_BLOCK_SIZE);
-        #endif
+
         p += AES_BLOCK_SIZE;
         c += AES_BLOCK_SIZE;
     }
-
     if (partial != 0) {
         IncrementGcmCounter(ctr);
         AesEncrypt(aes, ctr, scratch);
         xorbuf(scratch, p, partial);
         XMEMCPY(c, scratch, partial);
-
     }
-
     GHASH(aes, authIn, authInSz, out, sz, authTag, authTagSz);
     InitGcmCounter(ctr);
     AesEncrypt(aes, ctr, scratch);
     xorbuf(authTag, scratch, authTagSz);
-
 }
 
 
@@ -3051,18 +2846,11 @@ int  AesGcmDecrypt(Aes* aes, byte* out, const byte* in, word32 sz,
     word32 partial = sz % AES_BLOCK_SIZE;
     const byte* c = in;
     byte* p = out;
-    byte counter[AES_BLOCK_SIZE];
-    byte *ctr ;
+    byte ctr[AES_BLOCK_SIZE];
     byte scratch[AES_BLOCK_SIZE];
 
     CYASSL_ENTER("AesGcmDecrypt");
 
-#ifdef CYASSL_PIC32MZ_CRYPT
-    ctr = (char *)aes->iv_ce ;
-#else
-    ctr = counter ;
-#endif
-
     XMEMSET(ctr, 0, AES_BLOCK_SIZE);
     XMEMCPY(ctr, iv, ivSz);
     InitGcmCounter(ctr);
@@ -3076,25 +2864,17 @@ int  AesGcmDecrypt(Aes* aes, byte* out, const byte* in, word32 sz,
         GHASH(aes, authIn, authInSz, in, sz, Tprime, sizeof(Tprime));
         AesEncrypt(aes, ctr, EKY0);
         xorbuf(Tprime, EKY0, sizeof(Tprime));
-
         if (XMEMCMP(authTag, Tprime, authTagSz) != 0) {
             return AES_GCM_AUTH_E;
         }
     }
- 
-#ifdef CYASSL_PIC32MZ_CRYPT
-    if(blocks)
-        AesCrypt(aes, out, in, blocks*AES_BLOCK_SIZE,
-             PIC32_DECRYPTION, PIC32_ALGO_AES, PIC32_CRYPTOALGO_AES_GCM );
-#endif
 
     while (blocks--) {
         IncrementGcmCounter(ctr);
-        #ifndef CYASSL_PIC32MZ_CRYPT
         AesEncrypt(aes, ctr, scratch);
         xorbuf(scratch, c, AES_BLOCK_SIZE);
         XMEMCPY(p, scratch, AES_BLOCK_SIZE);
-        #endif
+
         p += AES_BLOCK_SIZE;
         c += AES_BLOCK_SIZE;
     }
@@ -3104,11 +2884,11 @@ int  AesGcmDecrypt(Aes* aes, byte* out, const byte* in, word32 sz,
         xorbuf(scratch, c, partial);
         XMEMCPY(p, scratch, partial);
     }
+
     return 0;
 }
 
 
-
 CYASSL_API void GmacSetKey(Gmac* gmac, const byte* key, word32 len)
 {
     AesGcmSetKey(&gmac->aes, key, len);
diff --git a/ctaocrypt/src/asn.c b/ctaocrypt/src/asn.c
index ba03b1eee..f0e93b949 100644
--- a/ctaocrypt/src/asn.c
+++ b/ctaocrypt/src/asn.c
@@ -1323,9 +1323,6 @@ void InitDecodedCert(DecodedCert* cert, byte* source, word32 inSz, void* heap)
     cert->extAuthKeyIdSz = 0;
     cert->extSubjKeyIdSrc = NULL;
     cert->extSubjKeyIdSz = 0;
-    #ifdef HAVE_ECC
-        cert->pkCurveOID = 0;
-    #endif /* HAVE_ECC */
 #endif /* OPENSSL_EXTRA */
 #ifdef HAVE_ECC
     cert->pkCurveOID = 0;
@@ -1540,9 +1537,6 @@ static int GetKey(DecodedCert* cert)
 
             if (CheckCurve(cert->pkCurveOID) < 0)
                 return ECC_CURVE_OID_E;
-            #ifdef OPENSSL_EXTRA
-                cert->pkCurveOID = oid;
-            #endif /* OPENSSL_EXTRA */
 
             /* key header */
             b = cert->source[cert->srcIdx++];
@@ -2372,13 +2366,6 @@ static word32 SetCurve(ecc_key* key, byte* output)
 #endif /* HAVE_ECC && CYASSL_CERT_GEN */
 
 
-CYASSL_LOCAL word32 SetAlgoID(int algoOID, byte* output, int type, int curveSz)
-    return idx;
-}
-
-#endif /* HAVE_ECC && CYASSL_CERT_GEN */
-
-
 CYASSL_LOCAL word32 SetAlgoID(int algoOID, byte* output, int type, int curveSz)
 {
     /* adding TAG_NULL and 0 to end */
@@ -3223,11 +3210,11 @@ static void DecodeSubjKeyId(byte* input, int sz, DecodedCert* cert)
         length--;
 
         if (length == 2) {
-            cert->extKeyUsage = (input[idx] << 8) | input[idx+1];
+            cert->extKeyUsage = (word16)((input[idx] << 8) | input[idx+1]);
             cert->extKeyUsage >>= unusedBits;
         }
         else if (length == 1)
-            cert->extKeyUsage = (input[idx] << 1);
+            cert->extKeyUsage = (word16)(input[idx] << 1);
 
         return;
     }
@@ -3289,9 +3276,7 @@ static void DecodeCertExtensions(DecodedCert* cert)
     byte* input = cert->extensions;
     int length;
     word32 oid;
-    byte critical;
-
-    (void)critical;
+    byte critical = 0;
 
     CYASSL_ENTER("DecodeCertExtensions");
 
@@ -3404,7 +3389,6 @@ static void DecodeCertExtensions(DecodedCert* cert)
         }
         idx += length;
     }
-    (void)critical;
 
     CYASSL_LEAVE("DecodeCertExtensions", 0);
     return;
diff --git a/ctaocrypt/src/coding.c b/ctaocrypt/src/coding.c
index b8cedbd37..c18c7ee05 100644
--- a/ctaocrypt/src/coding.c
+++ b/ctaocrypt/src/coding.c
@@ -240,11 +240,6 @@ static int DoBase64_Encode(const byte* in, word32 inLen, byte* out,
 
     outSz += addSz;
 
-    if (escaped)
-        addSz *= 3;   /* instead of just \n, we're doing %0A triplet */
-
-    outSz += addSz;
-
     /* if escaped we can't predetermine size for one pass encoding, but
      * make sure we have enough if no escapes are in input */
     if (outSz > *outLen) return BAD_FUNC_ARG;
diff --git a/ctaocrypt/src/des3.c b/ctaocrypt/src/des3.c
index ea6678bbf..15016b2b3 100644
--- a/ctaocrypt/src/des3.c
+++ b/ctaocrypt/src/des3.c
@@ -594,138 +594,6 @@ void Des3_SetKey(Des3* des3, const byte* key, const byte* iv, int dir)
         return;
     }
 
-
-#elif defined(CYASSL_PIC32MZ_CRYPT)
-
-    #include "../../cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h"
-
-void Des_SetIV(Des* des, const byte* iv);
-void Des3_SetIV(Des3* des, const byte* iv);
-
-    void Des_SetKey(Des* des, const byte* key, const byte* iv, int dir)
-    {
-        word32 *dkey = des->key ;
-        word32 *dreg = des->reg ;
-
-        XMEMCPY((byte *)dkey, (byte *)key, 8);
-        ByteReverseWords(dkey, dkey, 8);
-        XMEMCPY((byte *)dreg, (byte *)iv, 8);
-        ByteReverseWords(dreg, dreg, 8);
-    }
-
-    void Des3_SetKey(Des3* des, const byte* key, const byte* iv, int dir)
-    {
-        word32 *dkey1 = des->key[0];
-        word32 *dreg = des->reg ;
-
-        XMEMCPY(dkey1, key, 24);
-        ByteReverseWords(dkey1, dkey1, 24);
-        XMEMCPY(dreg, iv, 8);
-        ByteReverseWords(dreg, dreg, 8) ;
-
-    }
-
-    void DesCrypt(word32 *key, word32 *iv, byte* out, const byte* in, word32 sz,
-                  int dir, int algo, int cryptoalgo)
-    {
-        securityAssociation *sa_p ;
-        bufferDescriptor *bd_p ;
-        const byte *in_p, *in_l ;
-        byte *out_p, *out_l ;
-        volatile securityAssociation sa __attribute__((aligned (8)));
-        volatile bufferDescriptor bd __attribute__((aligned (8)));
-        volatile int k ;
-        
-        /* get uncached address */
-
-        in_l = in;
-        out_l = out ;
-        sa_p = KVA0_TO_KVA1(&sa) ; 
-        bd_p = KVA0_TO_KVA1(&bd) ;
-        in_p = KVA0_TO_KVA1(in_l) ;
-        out_p= KVA0_TO_KVA1(out_l);
-        
-        if(PIC32MZ_IF_RAM(in_p))
-            XMEMCPY((void *)in_p, (void *)in, sz);
-        XMEMSET((void *)out_p, 0, sz);
-
-        /* Set up the Security Association */
-        XMEMSET((byte *)KVA0_TO_KVA1(&sa), 0, sizeof(sa));
-        sa_p->SA_CTRL.ALGO = algo ; 
-        sa_p->SA_CTRL.LNC = 1;
-        sa_p->SA_CTRL.LOADIV = 1;
-        sa_p->SA_CTRL.FB = 1;
-        sa_p->SA_CTRL.ENCTYPE = dir ; /* Encryption/Decryption */
-        sa_p->SA_CTRL.CRYPTOALGO = cryptoalgo;
-        sa_p->SA_CTRL.KEYSIZE = 1 ; /* KEY is 192 bits */
-        XMEMCPY((byte *)KVA0_TO_KVA1(&sa.SA_ENCKEY[algo==PIC32_ALGO_TDES ? 2 : 6]),
-                (byte *)key, algo==PIC32_ALGO_TDES ? 24 : 8);
-        XMEMCPY((byte *)KVA0_TO_KVA1(&sa.SA_ENCIV[2]), (byte *)iv, 8);
-
-        XMEMSET((byte *)KVA0_TO_KVA1(&bd), 0, sizeof(bd));
-        /* Set up the Buffer Descriptor */
-        bd_p->BD_CTRL.BUFLEN = sz;
-        bd_p->BD_CTRL.LIFM = 1;
-        bd_p->BD_CTRL.SA_FETCH_EN = 1;
-        bd_p->BD_CTRL.LAST_BD = 1;
-        bd_p->BD_CTRL.DESC_EN = 1;
-    
-        bd_p->SA_ADDR = (unsigned int)KVA_TO_PA(&sa) ; // (unsigned int)sa_p  ;
-        bd_p->SRCADDR = (unsigned int)KVA_TO_PA(in) ; // (unsigned int)in_p  ;
-        bd_p->DSTADDR = (unsigned int)KVA_TO_PA(out); // (unsigned int)out_p  ;
-        bd_p->NXTPTR = (unsigned int)KVA_TO_PA(&bd);
-        bd_p->MSGLEN = sz ;
-        
-        /* Fire in the hole! */
-        CECON = 1 << 6;
-        while (CECON);
-        
-        /* Run the engine */
-        CEBDPADDR = (unsigned int)KVA_TO_PA(&bd) ; // (unsigned int)bd_p ;
-        CEINTEN = 0x07;
-        CECON = 0x27;
-
-        WAIT_ENGINE ;
-
-        if((cryptoalgo == PIC32_CRYPTOALGO_CBC) ||
-           (cryptoalgo == PIC32_CRYPTOALGO_TCBC)||
-           (cryptoalgo == PIC32_CRYPTOALGO_RCBC)) {
-            /* set iv for the next call */
-            if(dir == PIC32_ENCRYPTION) {
-	        XMEMCPY((void *)iv, (void*)&(out_p[sz-DES_IVLEN]), DES_IVLEN) ;
-	        } else {
-                ByteReverseWords((word32*)iv, (word32 *)&(in_p[sz-DES_IVLEN]), DES_IVLEN);
-	        }
-
-        }
-
-        ByteReverseWords((word32*)out, (word32 *)KVA0_TO_KVA1(out), sz);
-    }
-
-    void Des_CbcEncrypt(Des* des, byte* out, const byte* in, word32 sz)
-    {
-        DesCrypt(des->key, des->reg, out, in, sz, 
-                PIC32_ENCRYPTION, PIC32_ALGO_DES, PIC32_CRYPTOALGO_CBC );
-    }
-
-    void Des_CbcDecrypt(Des* des, byte* out, const byte* in, word32 sz)
-    {
-        DesCrypt(des->key, des->reg, out, in, sz, 
-                PIC32_DECRYPTION, PIC32_ALGO_DES, PIC32_CRYPTOALGO_CBC);
-    }
-
-    void Des3_CbcEncrypt(Des3* des, byte* out, const byte* in, word32 sz)
-    {
-        DesCrypt(des->key[0], des->reg, out, in, sz, 
-                PIC32_ENCRYPTION, PIC32_ALGO_TDES, PIC32_CRYPTOALGO_TCBC);
-    }
-
-    void Des3_CbcDecrypt(Des3* des, byte* out, const byte* in, word32 sz)
-    {
-        DesCrypt(des->key[0], des->reg, out, in, sz, 
-                PIC32_DECRYPTION, PIC32_ALGO_TDES, PIC32_CRYPTOALGO_TCBC);
-    }
-
 #else /* CTaoCrypt software implementation */
 
 /* permuted choice table (key) */
diff --git a/ctaocrypt/src/hmac.c b/ctaocrypt/src/hmac.c
index 25c867997..71fd0cad4 100644
--- a/ctaocrypt/src/hmac.c
+++ b/ctaocrypt/src/hmac.c
@@ -27,22 +27,6 @@
 
 #ifndef NO_HMAC
 
-#ifdef CYASSL_PIC32MZ_HASH
-
-#define InitMd5   InitMd5_sw
-#define Md5Update Md5Update_sw
-#define Md5Final  Md5Final_sw
-
-#define InitSha   InitSha_sw
-#define ShaUpdate ShaUpdate_sw
-#define ShaFinal  ShaFinal_sw
-
-#define InitSha256   InitSha256_sw
-#define Sha256Update Sha256Update_sw
-#define Sha256Final  Sha256Final_sw
-
-#endif
-
 #include 
 #include 
 
diff --git a/ctaocrypt/src/md5.c b/ctaocrypt/src/md5.c
index 43362327a..96bcc359d 100644
--- a/ctaocrypt/src/md5.c
+++ b/ctaocrypt/src/md5.c
@@ -26,13 +26,7 @@
 
 #include 
 
-#if !defined(NO_MD5)
-
-#ifdef CYASSL_PIC32MZ_HASH
-#define InitMd5   InitMd5_sw
-#define Md5Update Md5Update_sw
-#define Md5Final  Md5Final_sw
-#endif
+#ifndef NO_MD5
 
 #include 
 
diff --git a/ctaocrypt/src/port/pic32/pic32mz-hash.c b/ctaocrypt/src/port/pic32/pic32mz-hash.c
deleted file mode 100644
index fe2c1f3e4..000000000
--- a/ctaocrypt/src/port/pic32/pic32mz-hash.c
+++ /dev/null
@@ -1,243 +0,0 @@
-/* pic32mz-hash.c
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#ifdef HAVE_CONFIG_H
-    #include 
-#endif
-
-#include 
-
-#ifdef CYASSL_PIC32MZ_HASH
-
-#include 
-#include 
-#include 
-#include 
-
-#include 
-
-#if !defined(NO_MD5) && !defined(NO_SHA) && !defined(NO_SHA256)
-
-static void reset_engine(pic32mz_desc *desc_l, int algo)
-{
-    pic32mz_desc *desc ;
-    desc = KVA0_TO_KVA1(desc_l) ;
-
-    CECON = 1 << 6;
-    while (CECON);
-
-    /* Make sure everything is clear first before we make settings. */
-    XMEMSET((void *)KVA0_TO_KVA1(&desc->sa), 0, sizeof(desc->sa));
-    XMEMSET((void *)KVA0_TO_KVA1(&desc->bd[0]), 0, sizeof(desc->bd[0]));
-    XMEMSET((void *)KVA0_TO_KVA1(&desc->bd[1]), 0, sizeof(desc->bd[1]));
-
-    /* Set up the security association */
-    desc->sa.SA_CTRL.ALGO = algo ;
-    desc->sa.SA_CTRL.LNC = 1;
-    desc->sa.SA_CTRL.FB = 1;
-    desc->sa.SA_CTRL.ENCTYPE = 1;
-    desc->sa.SA_CTRL.LOADIV = 1;
-
-    /* Set up the buffer descriptor */
-    desc->err = 0 ;
-    desc->bd[0].BD_CTRL.LAST_BD = 1;
-    desc->bd[0].BD_CTRL.LIFM = 1;
-    desc->bd[0].SA_ADDR = KVA_TO_PA(&desc->sa);
-    desc->bd[1].BD_CTRL.LAST_BD = 1;
-    desc->bd[1].BD_CTRL.LIFM = 1;
-    desc->bd[1].SA_ADDR = KVA_TO_PA(&desc->sa);
-    desc_l->bdCount = 0 ;
-    CEBDPADDR = KVA_TO_PA(&(desc->bd[0]));
-
-    CECON = 0x27;
-}
-
-#define PIC32MZ_IF_RAM(addr) (KVA_TO_PA(addr) < 0x80000)
-
-static void update_engine(pic32mz_desc *desc_l, const char *input, word32 len,
-                    word32 *hash)
-{
-    pic32mz_desc *desc ;
-    int i ;
-    int total ;
-    desc = KVA0_TO_KVA1(desc_l) ;
-
-    i = desc_l->bdCount ;
-    if(i >= PIC32MZ_MAX_BD) {
-        desc_l->err = 1 ;
-        return ;
-    }
-
-    if(PIC32MZ_IF_RAM(input))
-        XMEMCPY(KVA0_TO_KVA1(input), input, len) ; /* Sync phys with cache */
-    desc->bd[i].SRCADDR = KVA_TO_PA(input);
-    /* Finally, turn on the buffer descriptor */
-    if (len % 4)
-         desc->bd[i].BD_CTRL.BUFLEN = (len + 4) - (len % 4);
-    else desc->bd[i].BD_CTRL.BUFLEN =  len ;
-
-    if(i == 0) {
-        desc->bd[i].MSGLEN =  len ;
-        desc->bd[i].BD_CTRL.SA_FETCH_EN = 1;
-    } else {
-        desc->bd[i-1].NXTPTR  = KVA_TO_PA(&(desc->bd[i])) ;
-        desc->bd[i].BD_CTRL.DESC_EN = 1;
-        desc->bd[i-1].BD_CTRL.LAST_BD = 0 ;
-        desc->bd[i-1].BD_CTRL.LIFM    = 0 ;
-        total = desc->bd[i-1].MSGLEN + len ;
-        desc->bd[i].MSGLEN = total ;
-        desc->bd[i-1].MSGLEN = total ;
-    }
-    desc->bd[i].UPDPTR = KVA_TO_PA(hash);
-    desc_l->bdCount ++ ;
-
-    #ifdef DEBUG_CYASSL
-    printf("Input[bd=%d, len=%d]:%x->\"%s\"\n", desc_l->bdCount, len, input, input) ;
-    print_mem(input, len+4) ;
-    #endif
-}
-
-static void start_engine(pic32mz_desc *desc) {
-    bufferDescriptor *hash_bd[2] ;
-    hash_bd[0] = (bufferDescriptor *)KVA0_TO_KVA1(&(desc->bd[0])) ;
-    hash_bd[0]->BD_CTRL.DESC_EN = 1;
-}
-
-void wait_engine(pic32mz_desc *desc, char *hash, int hash_sz) {
-    unsigned int i;
-    unsigned int *intptr;
-#undef DEBUG_CYASSL
-    #ifdef DEBUG_CYASSL
-    printf("desc(%x)[bd:%d * 2, sz:%d]\n", desc, sizeof(desc->bd[0]),
-                                                 sizeof(desc->sa) );
-    print_mem(KVA0_TO_KVA1(&(desc->bd[0])), sizeof(desc->bd[0])) ;
-    print_mem(KVA0_TO_KVA1(&(desc->bd[1])), sizeof(desc->bd[0])) ;
-    #endif
-
-    WAIT_ENGINE ;
-    
-    XMEMCPY(hash, KVA0_TO_KVA1(hash), hash_sz) ;
-
-    #ifdef DEBUG_CYASSL
-    print_mem(KVA0_TO_KVA1(hash), hash_sz) ;
-    print_mem(             hash , hash_sz) ;
-    #endif
-    for (i = 0, intptr = (unsigned int *)hash; i < hash_sz/sizeof(unsigned int);
-                                                                  i++, intptr++)
-    {
-        *intptr = ntohl(*intptr);
-    }
-}
-
-static int fillBuff(char *buff, int *bufflen, const char *data, int len, int blocksz)
-{
-    int room, copysz ;
-
-    room = blocksz - *bufflen ;
-    copysz = (len <= room) ? len : room ;
-    XMEMCPY(buff, data, copysz) ;
-    *bufflen += copysz ;
-    return (*bufflen == blocksz) ? 1 : 0 ;
-}
-
-#endif
-
-#ifndef NO_MD5
-void InitMd5(Md5* md5)
-{
-    CYASSL_ENTER("InitMd5\n") ;
-    XMEMSET((void *)md5, 0xcc, sizeof(Md5)) ;
-    XMEMSET((void *)KVA0_TO_KVA1(md5), 0xcc, sizeof(Md5)) ;
-    reset_engine(&(md5->desc), PIC32_ALGO_MD5) ;
-
-}
-
-void Md5Update(Md5* md5, const byte* data, word32 len)
-{
-     CYASSL_ENTER("Md5Update\n") ;
-     update_engine(&(md5->desc), data, len, md5->digest) ;
-}
-
-void Md5Final(Md5* md5, byte* hash)
-{
-     CYASSL_ENTER("Md5Final\n") ;
-    start_engine(&(md5->desc)) ;
-    wait_engine(&(md5->desc), (char *)md5->digest, MD5_HASH_SIZE) ;
-    XMEMCPY(hash, md5->digest, MD5_HASH_SIZE) ;
-    InitMd5(md5);  /* reset state */
-}
-#endif
-
-#ifndef NO_SHA
-void InitSha(Sha* sha)
-{
-    CYASSL_ENTER("InitSha\n") ;
-    XMEMSET((void *)sha, 0xcc, sizeof(Sha)) ;
-    XMEMSET((void *)KVA0_TO_KVA1(sha), 0xcc, sizeof(Sha)) ;
-    reset_engine(&(sha->desc), PIC32_ALGO_SHA1) ;
-}
-
-void ShaUpdate(Sha* sha, const byte* data, word32 len)
-{
-    CYASSL_ENTER("ShaUpdate\n") ;
-    update_engine(&(sha->desc), data, len, sha->digest) ;
-}
-
-void ShaFinal(Sha* sha, byte* hash)
-{
-    CYASSL_ENTER("ShaFinal\n") ;
-    start_engine(&(sha->desc)) ;
-    wait_engine(&(sha->desc), (char *)sha->digest, SHA1_HASH_SIZE) ;
-    XMEMCPY(hash, sha->digest, SHA1_HASH_SIZE) ;
-
-    InitSha(sha);  /* reset state */
-}
-#endif /* NO_SHA */
-
-#ifndef NO_SHA256
-void InitSha256(Sha256* sha256)
-{
-    CYASSL_ENTER("InitSha256\n") ;
-    XMEMSET((void *)sha256, 0xcc, sizeof(Sha256)) ;
-    XMEMSET((void *)KVA0_TO_KVA1(sha256), 0xcc, sizeof(Sha256)) ;
-    reset_engine(&(sha256->desc), PIC32_ALGO_SHA256) ;
-}
-
-void Sha256Update(Sha256* sha256, const byte* data, word32 len)
-{
-    CYASSL_ENTER("Sha256Update\n") ;
-    update_engine(&(sha256->desc), data, len, sha256->digest) ;
-}
-
-void Sha256Final(Sha256* sha256, byte* hash)
-{
-    CYASSL_ENTER("Sha256Final\n") ;
-    start_engine(&(sha256->desc)) ;
-    wait_engine(&(sha256->desc), (char *)sha256->digest, SHA256_HASH_SIZE) ;
-    XMEMCPY(hash, sha256->digest, SHA256_HASH_SIZE) ;
-    InitSha256(sha256);  /* reset state */
-}
-#endif /* NO_SHA256 */
-
-#endif
-
-
-
diff --git a/ctaocrypt/src/pwdbased.c b/ctaocrypt/src/pwdbased.c
index 6152292ca..3f330ef4d 100644
--- a/ctaocrypt/src/pwdbased.c
+++ b/ctaocrypt/src/pwdbased.c
@@ -27,22 +27,6 @@
 
 #ifndef NO_PWDBASED
 
-#ifdef CYASSL_PIC32MZ_HASH
-
-#define InitMd5   InitMd5_sw
-#define Md5Update Md5Update_sw
-#define Md5Final  Md5Final_sw
-
-#define InitSha   InitSha_sw
-#define ShaUpdate ShaUpdate_sw
-#define ShaFinal  ShaFinal_sw
-
-#define InitSha256   InitSha256_sw
-#define Sha256Update Sha256Update_sw
-#define Sha256Final  Sha256Final_sw
-
-#endif
-
 #include 
 #include 
 #include 
diff --git a/ctaocrypt/src/random.c b/ctaocrypt/src/random.c
index bf1c9f097..0b84af3e5 100644
--- a/ctaocrypt/src/random.c
+++ b/ctaocrypt/src/random.c
@@ -51,8 +51,7 @@
     #include 
     #include 
 #else
-    #if !defined(NO_DEV_RANDOM) && !defined(CYASSL_MDK_ARM) \
-                                && !defined(CYASSL_IAR_ARM)
+    #if !defined(NO_DEV_RANDOM) && !defined(CYASSL_MDK_ARM) 
             #include 
         #ifndef EBSNET
             #include 
@@ -469,44 +468,7 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
     #endif
     #define PIC32_SEED_COUNT ReadCoreTimer
 #endif
-    #ifdef CYASSL_MIC32MZ_RNG
-        #include "xc.h"
-        int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
-        {
-            int i ;
-            byte rnd[8] ;
-            word32 *rnd32 = (word32 *)rnd ;
-            word32 size = sz ;
-            byte* op = output ;
 
-            /* This part has to be replaced with better random seed */
-            RNGNUMGEN1 = ReadCoreTimer();
-            RNGPOLY1 = ReadCoreTimer();
-            RNGPOLY2 = ReadCoreTimer();
-            RNGNUMGEN2 = ReadCoreTimer();
-#ifdef DEBUG_CYASSL
-            printf("GenerateSeed::Seed=%08x, %08x\n", RNGNUMGEN1, RNGNUMGEN2) ;
-#endif
-            RNGCONbits.PLEN = 0x40;
-            RNGCONbits.PRNGEN = 1;
-            for(i=0; i<5; i++) { /* wait for RNGNUMGEN ready */
-                volatile int x ;
-                x = RNGNUMGEN1 ;
-                x = RNGNUMGEN2 ;
-            }
-            do {
-                rnd32[0] = RNGNUMGEN1;
-                rnd32[1] = RNGNUMGEN2;
-
-                for(i=0; i<8; i++, op++) {
-                    *op = rnd[i] ;
-                    size -- ;
-                    if(size==0)break ;
-                }
-            } while(size) ;
-            return 0;
-        }
-#else  /* CYASSL_MIC32MZ_RNG */
 /* uses the core timer, in nanoseconds to seed srand */
 int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
 {
@@ -521,9 +483,8 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
 
     return 0;
 }
-#endif /* CYASSL_MIC32MZ_RNG */
-#elif defined(CYASSL_SAFERTOS) || defined(CYASSL_LEANPSK) \
-   || defined(CYASSL_IAR_ARM)                               
+
+#elif defined(CYASSL_SAFERTOS) || defined(CYASSL_LEANPSK)
 
 #warning "write a real random seed!!!!, just for testing now"
 
diff --git a/ctaocrypt/src/sha.c b/ctaocrypt/src/sha.c
index 0bf5359eb..93683ee95 100644
--- a/ctaocrypt/src/sha.c
+++ b/ctaocrypt/src/sha.c
@@ -26,13 +26,7 @@
 
 #include 
 
-#if !defined(NO_SHA)
-
-#ifdef CYASSL_PIC32MZ_HASH
-#define InitSha   InitSha_sw
-#define ShaUpdate ShaUpdate_sw
-#define ShaFinal  ShaFinal_sw
-#endif
+#ifndef NO_SHA
 
 #include 
 #ifdef NO_INLINE
@@ -363,11 +357,11 @@ void ShaFinal(Sha* sha, byte* hash)
 
     #ifdef FREESCALE_MMCAU
         /* Kinetis requires only these bytes reversed */
-        ByteReverseBytes(&local[SHA_PAD_SIZE], &local[SHA_PAD_SIZE],
-                2 * sizeof(word32));
+        ByteReverseWords(&sha->buffer[SHA_PAD_SIZE/sizeof(word32)],
+                         &sha->buffer[SHA_PAD_SIZE/sizeof(word32)],
+                         2 * sizeof(word32));
     #endif
 
-    XTRANSFORM(sha, local);
     XTRANSFORM(sha, local);
     #ifdef LITTLE_ENDIAN_ORDER
         ByteReverseWords(sha->digest, sha->digest, SHA_DIGEST_SIZE);
diff --git a/ctaocrypt/src/sha256.c b/ctaocrypt/src/sha256.c
index d859774e7..769edf9e2 100644
--- a/ctaocrypt/src/sha256.c
+++ b/ctaocrypt/src/sha256.c
@@ -28,13 +28,7 @@
 
 #include 
 
-#if !defined(NO_SHA256)
-
-#ifdef CYASSL_PIC32MZ_HASH
-#define InitSha256   InitSha256_sw
-#define Sha256Update Sha256Update_sw
-#define Sha256Final  Sha256Final_sw
-#endif
+#ifndef NO_SHA256
 
 #include 
 #ifdef NO_INLINE
@@ -221,11 +215,11 @@ void Sha256Final(Sha256* sha256, byte* hash)
 
     #ifdef FREESCALE_MMCAU
         /* Kinetis requires only these bytes reversed */
-        ByteReverseBytes(&local[SHA256_PAD_SIZE], &local[SHA256_PAD_SIZE],
-                2 * sizeof(word32));
+        ByteReverseWords(&sha256->buffer[SHA256_PAD_SIZE/sizeof(word32)],
+                         &sha256->buffer[SHA256_PAD_SIZE/sizeof(word32)],
+                         2 * sizeof(word32));
     #endif
 
-    XTRANSFORM(sha256, local);
     XTRANSFORM(sha256, local);
     #ifdef LITTLE_ENDIAN_ORDER
         ByteReverseWords(sha256->digest, sha256->digest, SHA256_DIGEST_SIZE);
diff --git a/ctaocrypt/test/test.c b/ctaocrypt/test/test.c
index c9473d78b..a21d1b8c8 100644
--- a/ctaocrypt/test/test.c
+++ b/ctaocrypt/test/test.c
@@ -2084,10 +2084,8 @@ int aesgcm_test(void)
 
     result = AesGcmDecrypt(&enc, p2, c2, sizeof(p2), iv, sizeof(iv),
                                                  t2, sizeof(t2), a, sizeof(a));
-
     if (result != 0)
         return -70;
-
     if (memcmp(p, p2, sizeof(p2)))
         return -71;
 
diff --git a/cyassl/ctaocrypt/aes.h b/cyassl/ctaocrypt/aes.h
index b08e4e86a..e280e006b 100644
--- a/cyassl/ctaocrypt/aes.h
+++ b/cyassl/ctaocrypt/aes.h
@@ -94,12 +94,7 @@ typedef struct Aes {
 #endif
 #ifdef CYASSL_AES_COUNTER
     word32  left;            /* unsued bytes left from last call */
-#endif
-#ifdef CYASSL_PIC32MZ_CRYPT
-    word32 key_ce[AES_BLOCK_SIZE*2/sizeof(word32)] ;
-    word32 iv_ce [AES_BLOCK_SIZE  /sizeof(word32)] ;
-    int    keylen ;
-#endif
+#endif 
 } Aes;
 
 
diff --git a/cyassl/ctaocrypt/md5.h b/cyassl/ctaocrypt/md5.h
index b669998e3..2ab16b1b9 100644
--- a/cyassl/ctaocrypt/md5.h
+++ b/cyassl/ctaocrypt/md5.h
@@ -42,28 +42,22 @@ enum {
     MD5_PAD_SIZE    = 56
 };
 
-#ifdef CYASSL_PIC32MZ_HASH
-#include "port/pic32/pic32mz-crypt.h"
-#endif
 
 /* MD5 digest */
 typedef struct Md5 {
     word32  buffLen;   /* in bytes          */
     word32  loLen;     /* length in bytes   */
     word32  hiLen;     /* length in bytes   */
-    word32  buffer[MD5_BLOCK_SIZE  / sizeof(word32)];
-    #ifndef CYASSL_PIC32MZ_HASH
     word32  digest[MD5_DIGEST_SIZE / sizeof(word32)];
-    #else
-    word32  digest[PIC32_HASH_SIZE / sizeof(word32)];
-    pic32mz_desc desc ; /* Crypt Engine descripter */
-    #endif
+    word32  buffer[MD5_BLOCK_SIZE  / sizeof(word32)];
 } Md5;
 
+
 CYASSL_API void InitMd5(Md5*);
 CYASSL_API void Md5Update(Md5*, const byte*, word32);
 CYASSL_API void Md5Final(Md5*, byte*);
 
+
 #ifdef __cplusplus
     } /* extern "C" */
 #endif
diff --git a/cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h b/cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h
deleted file mode 100644
index e52b7d584..000000000
--- a/cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/* pic32mz-crypt.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#ifndef PIC32MZ_CRYPT_H
-#define PIC32MZ_CRYPT_H
-
-#ifdef  CYASSL_PIC32MZ_CRYPT
-
-#define MICROCHIP_PIC32
-#include 
-#include 
-#include 
-#include "../../../../mplabx/crypto.h"
-
-
-#define PIC32_ENCRYPTION      0b1
-#define PIC32_DECRYPTION      0b0
-
-#define PIC32_ALGO_HMAC1     0b01000000
-#define PIC32_ALGO_SHA256    0b00100000
-#define PIC32_ALGO_SHA1      0b00010000
-#define PIC32_ALGO_MD5       0b00001000
-#define PIC32_ALGO_AES       0b00000100
-#define PIC32_ALGO_TDES      0b00000010
-#define PIC32_ALGO_DES       0b00000001
-
-#define PIC32_CRYPTOALGO_AES_GCM 0b1110
-#define PIC32_CRYPTOALGO_RCTR    0b1101
-#define PIC32_CRYPTOALGO_RCBC    0b1001
-#define PIC32_CRYPTOALGO_REBC    0b1000
-#define PIC32_CRYPTOALGO_TCBC    0b0101
-#define PIC32_CRYPTOALGO_CBC     0b0001
-
-#define PIC32_AES_KEYSIZE_256     0b10
-#define PIC32_AES_KEYSIZE_192     0b01
-#define PIC32_AES_KEYSIZE_128     0b00
-
-#define PIC32_AES_BLOCK_SIZE 16
-#define MD5_HASH_SIZE 16
-#define SHA1_HASH_SIZE 20
-#define SHA256_HASH_SIZE 32
-#define PIC32_HASH_SIZE 32
-
-#define PIC32MZ_MAX_BD   2
-typedef struct {      /* Crypt Engine descripter */
-    int bdCount ;
-    int err   ;
-    volatile bufferDescriptor 
-        bd[PIC32MZ_MAX_BD] __attribute__((aligned (8), coherent));
-    securityAssociation 
-        sa                 __attribute__((aligned (8), coherent));
-} pic32mz_desc ;
-
-#define PIC32MZ_IF_RAM(addr) (KVA_TO_PA(addr) < 0x80000)
-
-#define WAIT_ENGINE \
-    { volatile int v ; while (CESTATbits.ACTIVE) ; for(v=0; v<100; v++) ; }
-
-#ifdef DEBUG_CYASSL
-static void print_mem(const unsigned char *p, int size) {
-    for(; size>0; size--, p++) {
-        if(size%4 == 0)printf(" ") ;
-            printf("%02x", (int)*p) ;
-    }
-    puts("") ;
-}
-#endif
-
-#endif
-#endif /* PIC32MZ_CRYPT_H */
diff --git a/cyassl/ctaocrypt/settings.h b/cyassl/ctaocrypt/settings.h
index b740cef3b..7be8ed79a 100644
--- a/cyassl/ctaocrypt/settings.h
+++ b/cyassl/ctaocrypt/settings.h
@@ -43,7 +43,7 @@
 /* #define MBED */
 
 /* Uncomment next line if using Microchip PIC32 ethernet starter kit */
-#define MICROCHIP_PIC32
+/* #define MICROCHIP_PIC32 */
 
 /* Uncomment next line if using Microchip TCP/IP stack, version 5 */
 /* #define MICROCHIP_TCPIP_V5 */
@@ -51,9 +51,6 @@
 /* Uncomment next line if using Microchip TCP/IP stack, version 6 or later */
 /* #define MICROCHIP_TCPIP */
 
-/* Uncomment next line if using PIC32MZ Crypto Engine */
-#define CYASSL_MICROCHIP_PIC32MZ
-        
 /* Uncomment next line if using FreeRTOS */
 /* #define FREERTOS */
 
@@ -84,8 +81,6 @@
 /* Uncomment next line if using QL SEP settings */
 /* #define CYASSL_QL */
 
-/* Uncomment next line if using LwIP native TCP socket settings */
-/* #define HAVE_LWIP_NATIVE */
 
 #include 
 
@@ -119,16 +114,7 @@
     #include "nx_api.h"
 #endif
 
-#if defined(HAVE_LWIP_NATIVE) /* using LwIP native TCP socket */
-    #define CYASSL_LWIP
-    #define NO_WRITEV
-    #define SINGLE_THREADED
-    #define CYASSL_USER_IO
-    #define NO_FILESYSTEM
-#endif 
-
 #ifdef MICROCHIP_PIC32
-    /* #define CYASSL_MICROCHIP_PIC32MZ */
     #define SIZEOF_LONG_LONG 8
     #define SINGLE_THREADED
     #define CYASSL_USER_IO
@@ -139,18 +125,6 @@
     #define TFM_TIMING_RESISTANT
 #endif
 
-#ifdef CYASSL_MICROCHIP_PIC32MZ
-    #define CYASSL_PIC32MZ_CE
-    #define CYASSL_PIC32MZ_CRYPT
-    #define HAVE_AES_ENGINE
-    #define CYASSL_PIC32MZ_RNG
-    /* #define CYASSL_PIC32MZ_HASH */
-    #define CYASSL_AES_COUNTER
-    #define HAVE_AESGCM
-    #define NO_BIG_INT
-
-#endif
-
 #ifdef MICROCHIP_TCPIP_V5
     /* include timer functions */
     #include "TCPIP Stack/TCPIP.h"
@@ -158,10 +132,10 @@
 
 #ifdef MICROCHIP_TCPIP
     /* include timer, NTP functions */
+    #include "system/system_services.h"
     #ifdef MICROCHIP_MPLAB_HARMONY
         #include "tcpip/tcpip.h"
     #else
-        #include "system/system_services.h"
         #include "tcpip/sntp.h"
     #endif
 #endif
@@ -183,21 +157,21 @@
     #define NO_FILESYSTEM
     #define CYASSL_USER_IO
     #define NO_DEV_RANDOM
+    #define HAVE_HKDF
+    #define NO_MAIN_DRIVER
+    #define CYASSL_LWIP
+
+    /* ECC and optimizations */
+    #define FREESCALE_MMCAU 1
     #define HAVE_ECC
     #define HAVE_ECC_ENCRYPT
-    #define ECC_SHAMIR
-    #define HAVE_HKDF
     #define USE_FAST_MATH
     #define TFM_TIMING_RESISTANT
-    #define FP_MAX_BITS 512
-    #define NO_OLD_TLS
-    #define NO_MD4
-    #define NO_RABBIT
-    #define NO_HC128
-    #define NO_RSA
-    #define NO_DSA
-    #define NO_PWDBASED
-    #define NO_PSK
+    #define TFM_ECC256
+    #define TFM_ARM
+    #define ECC_SHAMIR
+    #define FP_ECC
+    #define FP_ENTRIES 2
     #define FP_LUT 4
     #define FP_MAX_BITS 512
 
diff --git a/cyassl/ctaocrypt/sha.h b/cyassl/ctaocrypt/sha.h
index 4904f9b92..ce96f2781 100644
--- a/cyassl/ctaocrypt/sha.h
+++ b/cyassl/ctaocrypt/sha.h
@@ -43,22 +43,14 @@ enum {
     SHA_PAD_SIZE     = 56
 };
 
-#ifdef CYASSL_PIC32MZ_HASH
-#include "port/pic32/pic32mz-crypt.h"
-#endif
 
 /* Sha digest */
 typedef struct Sha {
     word32  buffLen;   /* in bytes          */
     word32  loLen;     /* length in bytes   */
     word32  hiLen;     /* length in bytes   */
-    word32  buffer[SHA_BLOCK_SIZE  / sizeof(word32)];
-    #ifndef CYASSL_PIC32MZ_HASH
     word32  digest[SHA_DIGEST_SIZE / sizeof(word32)];
-    #else
-    word32  digest[PIC32_HASH_SIZE / sizeof(word32)];
-    pic32mz_desc desc ; /* Crypt Engine descripter */
-    #endif
+    word32  buffer[SHA_BLOCK_SIZE  / sizeof(word32)];
 } Sha;
 
 
diff --git a/cyassl/ctaocrypt/sha256.h b/cyassl/ctaocrypt/sha256.h
index 7231cfafd..7c65e133c 100644
--- a/cyassl/ctaocrypt/sha256.h
+++ b/cyassl/ctaocrypt/sha256.h
@@ -34,10 +34,6 @@
     extern "C" {
 #endif
 
-#ifdef CYASSL_PIC32MZ_HASH
-#include "port/pic32/pic32mz-crypt.h"
-#endif
-
 
 /* in bytes */
 enum {
@@ -55,9 +51,6 @@ typedef struct Sha256 {
     word32  hiLen;     /* length in bytes   */
     word32  digest[SHA256_DIGEST_SIZE / sizeof(word32)];
     word32  buffer[SHA256_BLOCK_SIZE  / sizeof(word32)];
-    #ifdef CYASSL_PIC32MZ_HASH
-        pic32mz_desc desc ; /* Crypt Engine descripter */
-    #endif
 } Sha256;
 
 
diff --git a/cyassl/internal.h.orig b/cyassl/internal.h.orig
new file mode 100644
index 000000000..146019236
--- /dev/null
+++ b/cyassl/internal.h.orig
@@ -0,0 +1,2140 @@
+/* internal.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+
+#ifndef CYASSL_INT_H
+#define CYASSL_INT_H
+
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#ifndef NO_RC4
+    #include 
+#endif
+#ifdef HAVE_ECC
+    #include 
+#endif
+#ifndef NO_SHA256
+    #include 
+#endif
+#ifdef HAVE_OCSP
+    #include 
+#endif
+#ifdef CYASSL_SHA512
+    #include 
+#endif
+
+#ifdef HAVE_AESGCM
+    #include 
+#endif
+
+#ifdef CYASSL_RIPEMD
+    #include 
+#endif
+
+#ifdef CYASSL_CALLBACKS
+    #include 
+    #include 
+#endif
+
+#ifdef USE_WINDOWS_API 
+    #ifdef CYASSL_GAME_BUILD
+        #include "system/xtl.h"
+    #else
+        #if defined(_WIN32_WCE) || defined(WIN32_LEAN_AND_MEAN)
+            /* On WinCE winsock2.h must be included before windows.h */
+            #include 
+        #endif
+        #include 
+    #endif
+#elif defined(THREADX)
+    #ifndef SINGLE_THREADED
+        #include "tx_api.h"
+    #endif
+#elif defined(MICRIUM)
+    /* do nothing, just don't pick Unix */
+#elif defined(FREERTOS) || defined(CYASSL_SAFERTOS)
+    /* do nothing */
+#elif defined(EBSNET)
+    /* do nothing */
+#elif defined(FREESCALE_MQX)
+    /* do nothing */
+#elif defined(CYASSL_MDK_ARM)
+    #if defined(CYASSL_MDK5)
+         #include "cmsis_os.h"
+    #else
+        #include 
+    #endif
+#else
+    #ifndef SINGLE_THREADED
+        #define CYASSL_PTHREADS
+        #include 
+    #endif
+    #if defined(OPENSSL_EXTRA) || defined(GOAHEAD_WS)
+        #include       /* for close of BIO */
+    #endif
+#endif
+
+
+#ifdef HAVE_LIBZ
+    #include "zlib.h"
+#endif
+
+#ifdef _MSC_VER
+    /* 4996 warning to use MS extensions e.g., strcpy_s instead of strncpy */
+    #pragma warning(disable: 4996)
+#endif
+
+#ifdef NO_AES
+    #if !defined (ALIGN16)
+        #define ALIGN16
+    #endif
+#endif
+
+#ifdef NO_SHA
+    #define SHA_DIGEST_SIZE 20 
+#endif
+
+#ifdef NO_SHA256
+    #define SHA256_DIGEST_SIZE 32 
+#endif
+
+
+#ifdef __cplusplus
+    extern "C" {
+#endif
+
+
+#ifdef USE_WINDOWS_API 
+    typedef unsigned int SOCKET_T;
+#else
+    typedef int SOCKET_T;
+#endif
+
+
+typedef byte word24[3];
+
+/* used by ssl.c and cyassl_int.c */
+void c32to24(word32 in, word24 out);
+
+/* Define or comment out the cipher suites you'd like to be compiled in
+   make sure to use at least one BUILD_SSL_xxx or BUILD_TLS_xxx is defined
+
+   When adding cipher suites, add name to cipher_names, idx to cipher_name_idx
+*/
+#if !defined(NO_RSA) && !defined(NO_RC4)
+  #if !defined(NO_SHA)
+    #define BUILD_SSL_RSA_WITH_RC4_128_SHA
+  #endif
+    #if !defined(NO_MD5)
+        #define BUILD_SSL_RSA_WITH_RC4_128_MD5
+    #endif
+    #if !defined(NO_TLS) && defined(HAVE_NTRU) && !defined(NO_SHA)
+        #define BUILD_TLS_NTRU_RSA_WITH_RC4_128_SHA
+    #endif
+#endif
+
+#if !defined(NO_RSA) && !defined(NO_DES3)
+  #if !defined(NO_SHA)
+    #define BUILD_SSL_RSA_WITH_3DES_EDE_CBC_SHA
+    #if !defined(NO_TLS) && defined(HAVE_NTRU)
+        #define BUILD_TLS_NTRU_RSA_WITH_3DES_EDE_CBC_SHA
+    #endif
+  #endif
+#endif
+
+#if !defined(NO_RSA) && !defined(NO_AES) && !defined(NO_TLS)
+  #if !defined(NO_SHA)
+    #define BUILD_TLS_RSA_WITH_AES_128_CBC_SHA
+    #define BUILD_TLS_RSA_WITH_AES_256_CBC_SHA
+    #if defined(HAVE_NTRU)
+        #define BUILD_TLS_NTRU_RSA_WITH_AES_128_CBC_SHA
+        #define BUILD_TLS_NTRU_RSA_WITH_AES_256_CBC_SHA
+    #endif
+  #endif
+    #if !defined (NO_SHA256)
+        #define BUILD_TLS_RSA_WITH_AES_128_CBC_SHA256
+        #define BUILD_TLS_RSA_WITH_AES_256_CBC_SHA256
+    #endif
+    #if defined (HAVE_AESGCM)
+        #define BUILD_TLS_RSA_WITH_AES_128_GCM_SHA256
+        #if defined (CYASSL_SHA384)
+            #define BUILD_TLS_RSA_WITH_AES_256_GCM_SHA384
+        #endif
+    #endif
+    #if defined (HAVE_AESCCM)
+        #define BUILD_TLS_RSA_WITH_AES_128_CCM_8
+        #define BUILD_TLS_RSA_WITH_AES_256_CCM_8
+    #endif
+    #if defined(HAVE_BLAKE2)
+        #define BUILD_TLS_RSA_WITH_AES_128_CBC_B2B256
+        #define BUILD_TLS_RSA_WITH_AES_256_CBC_B2B256
+    #endif
+#endif
+
+#if defined(HAVE_CAMELLIA) && !defined(NO_TLS)
+    #ifndef NO_RSA
+      #if !defined(NO_SHA)
+        #define BUILD_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
+        #define BUILD_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
+      #endif
+        #ifndef NO_SHA256
+            #define BUILD_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
+            #define BUILD_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
+        #endif
+        #if !defined(NO_DH) && defined(OPENSSL_EXTRA)
+          #if !defined(NO_SHA)
+            #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
+            #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
+          #endif
+            #ifndef NO_SHA256
+                #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
+                #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
+            #endif
+        #endif
+    #endif
+#endif
+
+#if !defined(NO_PSK) && !defined(NO_AES) && !defined(NO_TLS)
+  #if !defined(NO_SHA)
+    #define BUILD_TLS_PSK_WITH_AES_128_CBC_SHA
+    #define BUILD_TLS_PSK_WITH_AES_256_CBC_SHA
+  #endif
+    #ifndef NO_SHA256
+        #define BUILD_TLS_PSK_WITH_AES_128_CBC_SHA256
+        #ifdef HAVE_AESCCM
+            #define BUILD_TLS_PSK_WITH_AES_128_CCM_8
+            #define BUILD_TLS_PSK_WITH_AES_256_CCM_8
+        #endif
+    #endif
+#endif
+
+#if !defined(NO_TLS) && defined(HAVE_NULL_CIPHER)
+    #if !defined(NO_RSA)
+      #if !defined(NO_SHA)
+        #define BUILD_TLS_RSA_WITH_NULL_SHA
+      #endif
+      #ifndef NO_SHA256
+        #define BUILD_TLS_RSA_WITH_NULL_SHA256
+      #endif
+    #endif
+    #if !defined(NO_PSK)
+      #if !defined(NO_SHA)
+        #define BUILD_TLS_PSK_WITH_NULL_SHA
+      #endif
+        #ifndef NO_SHA256
+            #define BUILD_TLS_PSK_WITH_NULL_SHA256
+        #endif
+    #endif
+#endif
+
+#if !defined(NO_HC128) && !defined(NO_RSA) && !defined(NO_TLS)
+    #define BUILD_TLS_RSA_WITH_HC_128_MD5
+  #if !defined(NO_SHA)
+    #define BUILD_TLS_RSA_WITH_HC_128_SHA
+  #endif
+  #if defined(HAVE_BLAKE2)
+    #define BUILD_TLS_RSA_WITH_HC_128_B2B256
+  #endif
+#endif
+
+#if !defined(NO_RABBIT) && !defined(NO_TLS) && !defined(NO_RSA)
+  #if !defined(NO_SHA)
+    #define BUILD_TLS_RSA_WITH_RABBIT_SHA
+  #endif
+#endif
+
+#if !defined(NO_DH) && !defined(NO_AES) && !defined(NO_TLS) && \
+    !defined(NO_RSA) && defined(OPENSSL_EXTRA)
+  #if !defined(NO_SHA)
+    #define BUILD_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
+    #define BUILD_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
+  #endif
+    #if !defined (NO_SHA256)
+        #define BUILD_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
+        #define BUILD_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
+        #if defined (HAVE_AESGCM)
+            #define BUILD_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
+            #if defined (CYASSL_SHA384)
+                #define BUILD_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
+            #endif
+        #endif
+    #endif
+#endif
+
+#if defined(HAVE_ECC) && !defined(NO_TLS)
+    #if !defined(NO_AES)
+        #if !defined(NO_SHA)
+            #if !defined(NO_RSA)
+                #define BUILD_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
+                #define BUILD_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
+                #define BUILD_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
+                #define BUILD_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
+            #endif
+    
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
+    
+            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
+            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
+        #endif /* NO_SHA */
+        #ifndef NO_SHA256
+            #if !defined(NO_RSA)
+                #define BUILD_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
+                #define BUILD_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
+            #endif
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
+            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
+        #endif
+
+        #ifdef CYASSL_SHA384
+            #if !defined(NO_RSA)
+                #define BUILD_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
+                #define BUILD_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
+            #endif
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
+            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
+        #endif
+
+        #if defined (HAVE_AESGCM)
+            #if !defined(NO_RSA)
+                #define BUILD_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
+                #define BUILD_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
+                #if defined(CYASSL_SHA384)
+                    #define BUILD_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
+                    #define BUILD_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
+                #endif
+            #endif
+
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
+            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
+            
+            #if defined(CYASS_SHA384)
+                #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
+                #define BUILD_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
+            #endif
+        #endif
+        #if defined (HAVE_AESCCM)
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8
+        #endif
+    #endif /* NO_AES */
+    #if !defined(NO_RC4)
+        #if !defined(NO_SHA)
+            #if !defined(NO_RSA)
+                #define BUILD_TLS_ECDHE_RSA_WITH_RC4_128_SHA
+                #define BUILD_TLS_ECDH_RSA_WITH_RC4_128_SHA
+            #endif
+
+            #define BUILD_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
+            #define BUILD_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
+        #endif
+    #endif
+    #if !defined(NO_DES3)
+        #if !defined(NO_RSA)
+            #define BUILD_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
+            #define BUILD_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
+        #endif
+
+        #define BUILD_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
+        #define BUILD_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
+    #endif
+#endif
+
+
+#if defined(BUILD_SSL_RSA_WITH_RC4_128_SHA) || \
+    defined(BUILD_SSL_RSA_WITH_RC4_128_MD5)
+    #define BUILD_ARC4
+#endif
+
+#if defined(BUILD_SSL_RSA_WITH_3DES_EDE_CBC_SHA)
+    #define BUILD_DES3
+#endif
+
+#if defined(BUILD_TLS_RSA_WITH_AES_128_CBC_SHA) || \
+    defined(BUILD_TLS_RSA_WITH_AES_256_CBC_SHA) || \
+    defined(BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256)
+    #undef  BUILD_AES
+    #define BUILD_AES
+#endif
+
+#if defined(BUILD_TLS_RSA_WITH_AES_128_GCM_SHA256) || \
+    defined(BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256)
+    #define BUILD_AESGCM
+#endif
+
+#if defined(BUILD_TLS_RSA_WITH_HC_128_SHA) || \
+    defined(BUILD_TLS_RSA_WITH_HC_128_MD5) || \
+    defined(BUILD_TLS_RSA_WITH_HC_128_B2B256)
+    #define BUILD_HC128
+#endif
+
+#if defined(BUILD_TLS_RSA_WITH_RABBIT_SHA)
+    #define BUILD_RABBIT
+#endif
+
+#ifdef NO_DES3
+    #define DES_BLOCK_SIZE 8
+#else
+    #undef  BUILD_DES3
+    #define BUILD_DES3
+#endif
+
+#ifdef NO_AES
+    #define AES_BLOCK_SIZE 16
+#else
+    #undef  BUILD_AES
+    #define BUILD_AES
+#endif
+
+#ifndef NO_RC4
+    #undef  BUILD_ARC4
+    #define BUILD_ARC4
+#endif
+
+
+
+#if defined(BUILD_AESGCM) || defined(HAVE_AESCCM)
+    #define HAVE_AEAD
+#endif
+
+
+/* actual cipher values, 2nd byte */
+enum {
+    TLS_DHE_RSA_WITH_AES_256_CBC_SHA  = 0x39,
+    TLS_DHE_RSA_WITH_AES_128_CBC_SHA  = 0x33,
+    TLS_RSA_WITH_AES_256_CBC_SHA      = 0x35,
+    TLS_RSA_WITH_AES_128_CBC_SHA      = 0x2F,
+    TLS_RSA_WITH_NULL_SHA             = 0x02,
+    TLS_PSK_WITH_AES_256_CBC_SHA      = 0x8d,
+    TLS_PSK_WITH_AES_128_CBC_SHA256   = 0xae,
+    TLS_PSK_WITH_AES_128_CBC_SHA      = 0x8c,
+    TLS_PSK_WITH_NULL_SHA256          = 0xb0,
+    TLS_PSK_WITH_NULL_SHA             = 0x2c,
+    SSL_RSA_WITH_RC4_128_SHA          = 0x05,
+    SSL_RSA_WITH_RC4_128_MD5          = 0x04,
+    SSL_RSA_WITH_3DES_EDE_CBC_SHA     = 0x0A,
+
+    /* ECC suites, first byte is 0xC0 (ECC_BYTE) */
+    TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA    = 0x14,
+    TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA    = 0x13,
+    TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA  = 0x0A,
+    TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA  = 0x09,
+    TLS_ECDHE_RSA_WITH_RC4_128_SHA        = 0x11,
+    TLS_ECDHE_ECDSA_WITH_RC4_128_SHA      = 0x07,
+    TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA   = 0x12,
+    TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA = 0x08,
+    TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256   = 0x27,
+    TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 = 0x23,
+    TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384   = 0x28,
+    TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 = 0x24,
+
+    /* static ECDH, first byte is 0xC0 (ECC_BYTE) */
+    TLS_ECDH_RSA_WITH_AES_256_CBC_SHA    = 0x0F,
+    TLS_ECDH_RSA_WITH_AES_128_CBC_SHA    = 0x0E,
+    TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA  = 0x05,
+    TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA  = 0x04,
+    TLS_ECDH_RSA_WITH_RC4_128_SHA        = 0x0C,
+    TLS_ECDH_ECDSA_WITH_RC4_128_SHA      = 0x02,
+    TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA   = 0x0D,
+    TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA = 0x03,
+    TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256   = 0x29,
+    TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 = 0x25,
+    TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384   = 0x2A,
+    TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 = 0x26,
+
+    /* CyaSSL extension - eSTREAM */
+    TLS_RSA_WITH_HC_128_MD5       = 0xFB,
+    TLS_RSA_WITH_HC_128_SHA       = 0xFC,
+    TLS_RSA_WITH_RABBIT_SHA       = 0xFD,
+
+    /* CyaSSL extension - Blake2b 256 */
+    TLS_RSA_WITH_AES_128_CBC_B2B256   = 0xF8,
+    TLS_RSA_WITH_AES_256_CBC_B2B256   = 0xF9,
+    TLS_RSA_WITH_HC_128_B2B256        = 0xFA,   /* eSTREAM too */
+
+    /* CyaSSL extension - NTRU */
+    TLS_NTRU_RSA_WITH_RC4_128_SHA      = 0xe5,
+    TLS_NTRU_RSA_WITH_3DES_EDE_CBC_SHA = 0xe6,
+    TLS_NTRU_RSA_WITH_AES_128_CBC_SHA  = 0xe7,  /* clases w/ official SHA-256 */
+    TLS_NTRU_RSA_WITH_AES_256_CBC_SHA  = 0xe8,
+
+    /* SHA256 */
+    TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 = 0x6b,
+    TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 = 0x67,
+    TLS_RSA_WITH_AES_256_CBC_SHA256     = 0x3d,
+    TLS_RSA_WITH_AES_128_CBC_SHA256     = 0x3c,
+    TLS_RSA_WITH_NULL_SHA256            = 0x3b,
+
+    /* AES-GCM */
+    TLS_RSA_WITH_AES_128_GCM_SHA256          = 0x9c,
+    TLS_RSA_WITH_AES_256_GCM_SHA384          = 0x9d,
+    TLS_DHE_RSA_WITH_AES_128_GCM_SHA256      = 0x9e,
+    TLS_DHE_RSA_WITH_AES_256_GCM_SHA384      = 0x9f,
+
+    /* ECC AES-GCM, first byte is 0xC0 (ECC_BYTE) */
+    TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256  = 0x2b,
+    TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384  = 0x2c,
+    TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256   = 0x2d,
+    TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384   = 0x2e,
+    TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256    = 0x2f,
+    TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384    = 0x30,
+    TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256     = 0x31,
+    TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384     = 0x32,
+
+    /* AES-CCM, first byte is 0xC0 but isn't ECC,
+     * also, in some of the other AES-CCM suites
+     * there will be second byte number conflicts
+     * with non-ECC AES-GCM */
+    TLS_RSA_WITH_AES_128_CCM_8         = 0xa0,
+    TLS_RSA_WITH_AES_256_CCM_8         = 0xa1,
+    TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8 = 0xc6, /* Still TBD, made up */
+    TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8 = 0xc7, /* Still TBD, made up */
+    TLS_PSK_WITH_AES_128_CCM           = 0xa4,
+    TLS_PSK_WITH_AES_256_CCM           = 0xa5,
+    TLS_PSK_WITH_AES_128_CCM_8         = 0xa8,
+    TLS_PSK_WITH_AES_256_CCM_8         = 0xa9,
+
+    TLS_RSA_WITH_CAMELLIA_128_CBC_SHA        = 0x41,
+    TLS_RSA_WITH_CAMELLIA_256_CBC_SHA        = 0x84,
+    TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256     = 0xba,
+    TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256     = 0xc0,
+    TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA    = 0x45,
+    TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA    = 0x88,
+    TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 = 0xbe,
+    TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 = 0xc4,
+
+    /* Renegotiation Indication Extension Special Suite */
+    TLS_EMPTY_RENEGOTIATION_INFO_SCSV        = 0xff
+};
+
+
+enum Misc {
+    ECC_BYTE =  0xC0,           /* ECC first cipher suite byte */
+
+    SEND_CERT       = 1,
+    SEND_BLANK_CERT = 2,
+
+    DTLS_MAJOR      = 0xfe,     /* DTLS major version number */
+    DTLS_MINOR      = 0xff,     /* DTLS minor version number */
+    DTLSv1_2_MINOR  = 0xfd,     /* DTLS minor version number */
+    SSLv3_MAJOR     = 3,        /* SSLv3 and TLSv1+  major version number */
+    SSLv3_MINOR     = 0,        /* TLSv1   minor version number */
+    TLSv1_MINOR     = 1,        /* TLSv1   minor version number */
+    TLSv1_1_MINOR   = 2,        /* TLSv1_1 minor version number */
+    TLSv1_2_MINOR   = 3,        /* TLSv1_2 minor version number */
+    INVALID_BYTE    = 0xff,     /* Used to initialize cipher specs values */
+    NO_COMPRESSION  =  0,
+    ZLIB_COMPRESSION = 221,     /* CyaSSL zlib compression */
+    HELLO_EXT_SIG_ALGO = 13,    /* ID for the sig_algo hello extension */
+    SECRET_LEN      = 48,       /* pre RSA and all master */
+    ENCRYPT_LEN     = 512,      /* allow 4096 bit static buffer */
+    SIZEOF_SENDER   =  4,       /* clnt or srvr           */
+    FINISHED_SZ     = 36,       /* MD5_DIGEST_SIZE + SHA_DIGEST_SIZE */
+    MAX_RECORD_SIZE = 16384,    /* 2^14, max size by standard */
+    MAX_MSG_EXTRA   = 38 + MAX_DIGEST_SIZE,
+                                /* max added to msg, mac + pad  from */
+                                /* RECORD_HEADER_SZ + BLOCK_SZ (pad) + Max
+                                   digest sz + BLOC_SZ (iv) + pad byte (1) */
+    MAX_COMP_EXTRA  = 1024,     /* max compression extra */
+    MAX_MTU         = 1500,     /* max expected MTU */
+    MAX_UDP_SIZE    = 8192 - 100, /* was MAX_MTU - 100 */
+    MAX_DH_SZ       = 612,      /* 2240 p, pub, g + 2 byte size for each */
+    MAX_STR_VERSION = 8,        /* string rep of protocol version */
+
+    PAD_MD5        = 48,       /* pad length for finished */
+    PAD_SHA        = 40,       /* pad length for finished */
+    MAX_PAD_SIZE   = 256,      /* maximum length of padding */
+    COMPRESS_DUMMY_SIZE = 64,  /* compression dummy round size */
+    COMPRESS_CONSTANT   = 13,  /* compression calc constant */
+    COMPRESS_UPPER      = 55,  /* compression calc numerator */
+    COMPRESS_LOWER      = 64,  /* compression calc denominator */
+
+    PEM_LINE_LEN   = 80,       /* PEM line max + fudge */
+    LENGTH_SZ      =  2,       /* length field for HMAC, data only */
+    VERSION_SZ     =  2,       /* length of proctocol version */
+    SEQ_SZ         =  8,       /* 64 bit sequence number  */
+    BYTE3_LEN      =  3,       /* up to 24 bit byte lengths */
+    ALERT_SIZE     =  2,       /* level + description     */
+    REQUEST_HEADER =  2,       /* always use 2 bytes      */
+    VERIFY_HEADER  =  2,       /* always use 2 bytes      */
+    EXT_ID_SZ      =  2,       /* always use 2 bytes      */
+    MAX_DH_SIZE    = 513,      /* 4096 bit plus possible leading 0 */
+
+    MAX_SUITE_SZ = 200,        /* 100 suites for now! */
+    RAN_LEN      = 32,         /* random length           */
+    SEED_LEN     = RAN_LEN * 2, /* tls prf seed length    */
+    ID_LEN       = 32,         /* session id length       */
+    MAX_COOKIE_LEN = 32,       /* max dtls cookie size    */
+    COOKIE_SZ    = 20,         /* use a 20 byte cookie    */
+    SUITE_LEN    =  2,         /* cipher suite sz length  */
+    ENUM_LEN     =  1,         /* always a byte           */
+    OPAQUE8_LEN  =  1,         /* 1 byte                  */
+    OPAQUE16_LEN =  2,         /* 2 bytes                 */
+    OPAQUE24_LEN =  3,         /* 3 bytes                 */
+    COMP_LEN     =  1,         /* compression length      */
+    CURVE_LEN    =  2,         /* ecc named curve length  */
+    SERVER_ID_LEN = 20,        /* server session id length  */
+    
+    HANDSHAKE_HEADER_SZ   = 4,  /* type + length(3)        */
+    RECORD_HEADER_SZ      = 5,  /* type + version + len(2) */
+    CERT_HEADER_SZ        = 3,  /* always 3 bytes          */
+    REQ_HEADER_SZ         = 2,  /* cert request header sz  */
+    HINT_LEN_SZ           = 2,  /* length of hint size field */
+    TRUNCATED_HMAC_SZ     = 10, /* length of hmac w/ truncated hmac extension */
+    HELLO_EXT_TYPE_SZ     = 2,  /* length of a hello extension type */
+    HELLO_EXT_SZ          = 8,  /* total length of the lazy hello extensions */
+    HELLO_EXT_LEN         = 6,  /* length of the lazy hello extensions */
+    HELLO_EXT_SIGALGO_SZ  = 2,  /* length of signature algo extension  */
+    HELLO_EXT_SIGALGO_MAX = 32, /* number of items in the signature algo list */
+
+    DTLS_HANDSHAKE_HEADER_SZ = 12, /* normal + seq(2) + offset(3) + length(3) */
+    DTLS_RECORD_HEADER_SZ    = 13, /* normal + epoch(2) + seq_num(6) */
+    DTLS_HANDSHAKE_EXTRA     = 8,  /* diff from normal */
+    DTLS_RECORD_EXTRA        = 8,  /* diff from normal */
+    DTLS_HANDSHAKE_SEQ_SZ    = 2,  /* handshake header sequence number */
+    DTLS_HANDSHAKE_FRAG_SZ   = 3,  /* fragment offset and length are 24 bit */
+    DTLS_POOL_SZ             = 5,  /* buffers to hold in the retry pool */
+
+    FINISHED_LABEL_SZ   = 15,  /* TLS finished label size */
+    TLS_FINISHED_SZ     = 12,  /* TLS has a shorter size  */
+    MASTER_LABEL_SZ     = 13,  /* TLS master secret label sz */
+    KEY_LABEL_SZ        = 13,  /* TLS key block expansion sz */
+    MAX_PRF_HALF        = 128, /* Maximum half secret len */
+    MAX_PRF_LABSEED     = 128, /* Maximum label + seed len */
+    MAX_PRF_DIG         = 224, /* Maximum digest len      */
+    MAX_REQUEST_SZ      = 256, /* Maximum cert req len (no auth yet */
+    SESSION_FLUSH_COUNT = 256, /* Flush session cache unless user turns off */ 
+
+    RC4_KEY_SIZE        = 16,  /* always 128bit           */
+    DES_KEY_SIZE        =  8,  /* des                     */
+    DES3_KEY_SIZE       = 24,  /* 3 des ede               */
+    DES_IV_SIZE         = DES_BLOCK_SIZE,
+    AES_256_KEY_SIZE    = 32,  /* for 256 bit             */
+    AES_192_KEY_SIZE    = 24,  /* for 192 bit             */
+    AES_IV_SIZE         = 16,  /* always block size       */
+    AES_128_KEY_SIZE    = 16,  /* for 128 bit             */
+
+    AEAD_SEQ_OFFSET     = 4,        /* Auth Data: Sequence number */
+    AEAD_TYPE_OFFSET    = 8,        /* Auth Data: Type            */
+    AEAD_VMAJ_OFFSET    = 9,        /* Auth Data: Major Version   */
+    AEAD_VMIN_OFFSET    = 10,       /* Auth Data: Minor Version   */
+    AEAD_LEN_OFFSET     = 11,       /* Auth Data: Length          */
+    AEAD_AUTH_DATA_SZ   = 13,       /* Size of the data to authenticate */
+    AEAD_IMP_IV_SZ      = 4,        /* Size of the implicit IV     */
+    AEAD_EXP_IV_SZ      = 8,        /* Size of the explicit IV     */
+    AEAD_NONCE_SZ       = AEAD_EXP_IV_SZ + AEAD_IMP_IV_SZ,
+
+    AES_GCM_AUTH_SZ     = 16, /* AES-GCM Auth Tag length    */
+    AES_CCM_16_AUTH_SZ  = 16, /* AES-CCM-16 Auth Tag length */
+    AES_CCM_8_AUTH_SZ   = 8,  /* AES-CCM-8 Auth Tag Length  */
+
+    CAMELLIA_128_KEY_SIZE = 16, /* for 128 bit */
+    CAMELLIA_192_KEY_SIZE = 24, /* for 192 bit */
+    CAMELLIA_256_KEY_SIZE = 32, /* for 256 bit */
+    CAMELLIA_IV_SIZE      = 16, /* always block size */
+
+    HC_128_KEY_SIZE     = 16,  /* 128 bits                */
+    HC_128_IV_SIZE      = 16,  /* also 128 bits           */
+
+    RABBIT_KEY_SIZE     = 16,  /* 128 bits                */
+    RABBIT_IV_SIZE      =  8,  /* 64 bits for iv          */
+
+    EVP_SALT_SIZE       =  8,  /* evp salt size 64 bits   */
+
+    ECDHE_SIZE          = 32,  /* ECHDE server size defaults to 256 bit */
+    MAX_EXPORT_ECC_SZ   = 256, /* Export ANS X9.62 max future size */
+
+    MAX_HELLO_SZ       = 128,  /* max client or server hello */
+    MAX_CERT_VERIFY_SZ = 1024, /* max   */
+    CLIENT_HELLO_FIRST =  35,  /* Protocol + RAN_LEN + sizeof(id_len) */
+    MAX_SUITE_NAME     =  48,  /* maximum length of cipher suite string */
+    DEFAULT_TIMEOUT    = 500,  /* default resumption timeout in seconds */
+
+    DTLS_TIMEOUT_INIT       =  1, /* default timeout init for DTLS receive  */
+    DTLS_TIMEOUT_MAX        = 64, /* default max timeout for DTLS receive */
+    DTLS_TIMEOUT_MULTIPLIER =  2, /* default timeout multiplier for DTLS recv */
+
+    MAX_PSK_ID_LEN     = 128,  /* max psk identity/hint supported */
+    MAX_PSK_KEY_LEN    =  64,  /* max psk key supported */
+
+    MAX_CYASSL_FILE_SIZE = 1024 * 1024 * 4,  /* 4 mb file size alloc limit */
+
+#ifdef FORTRESS
+    MAX_EX_DATA        =   3,  /* allow for three items of ex_data */
+#endif
+
+    MAX_X509_SIZE      = 2048, /* max static x509 buffer size */
+    CERT_MIN_SIZE      =  256, /* min PEM cert size with header/footer */
+    MAX_FILENAME_SZ    =  256, /* max file name length */
+    FILE_BUFFER_SIZE   = 1024, /* default static file buffer size for input,
+                                  will use dynamic buffer if not big enough */
+
+    MAX_NTRU_PUB_KEY_SZ = 1027, /* NTRU max for now */
+    MAX_NTRU_ENCRYPT_SZ = 1027, /* NTRU max for now */
+    MAX_NTRU_BITS       =  256, /* max symmetric bit strength */
+    NO_SNIFF           =   0,  /* not sniffing */
+    SNIFF              =   1,  /* currently sniffing */
+
+    HASH_SIG_SIZE      =   2,  /* default SHA1 RSA */
+
+    NO_CAVIUM_DEVICE   =  -2,  /* invalid cavium device id */
+
+    NO_COPY            =   0,  /* should we copy static buffer for write */
+    COPY               =   1   /* should we copy static buffer for write */
+};
+
+
+#ifdef SESSION_INDEX
+/* Shift values for making a session index */
+#define SESSIDX_ROW_SHIFT 4
+#define SESSIDX_IDX_MASK  0x0F
+#endif
+
+
+/* max cert chain peer depth */
+#ifndef MAX_CHAIN_DEPTH
+    #define MAX_CHAIN_DEPTH 9
+#endif
+
+
+/* don't use extra 3/4k stack space unless need to */
+#ifdef HAVE_NTRU
+    #define MAX_ENCRYPT_SZ MAX_NTRU_ENCRYPT_SZ
+#else
+    #define MAX_ENCRYPT_SZ ENCRYPT_LEN
+#endif
+
+
+/* states */
+enum states {
+    NULL_STATE = 0,
+
+    SERVER_HELLOVERIFYREQUEST_COMPLETE,
+    SERVER_HELLO_COMPLETE,
+    SERVER_CERT_COMPLETE,
+    SERVER_KEYEXCHANGE_COMPLETE,
+    SERVER_HELLODONE_COMPLETE,
+    SERVER_FINISHED_COMPLETE,
+
+    CLIENT_HELLO_COMPLETE,
+    CLIENT_KEYEXCHANGE_COMPLETE,
+    CLIENT_FINISHED_COMPLETE,
+
+    HANDSHAKE_DONE
+};
+
+
+#if defined(__GNUC__)
+    #define CYASSL_PACK __attribute__ ((packed))
+#else
+    #define CYASSL_PACK
+#endif
+
+/* SSL Version */
+typedef struct ProtocolVersion {
+    byte major;
+    byte minor;
+} CYASSL_PACK ProtocolVersion;
+
+
+CYASSL_LOCAL ProtocolVersion MakeSSLv3(void);
+CYASSL_LOCAL ProtocolVersion MakeTLSv1(void);
+CYASSL_LOCAL ProtocolVersion MakeTLSv1_1(void);
+CYASSL_LOCAL ProtocolVersion MakeTLSv1_2(void);
+
+#ifdef CYASSL_DTLS
+    CYASSL_LOCAL ProtocolVersion MakeDTLSv1(void);
+    CYASSL_LOCAL ProtocolVersion MakeDTLSv1_2(void);
+#endif
+
+
+enum BIO_TYPE {
+    BIO_BUFFER = 1,
+    BIO_SOCKET = 2,
+    BIO_SSL    = 3,
+    BIO_MEMORY = 4
+};
+
+
+/* CyaSSL BIO_METHOD type */
+struct CYASSL_BIO_METHOD {
+    byte type;               /* method type */
+};
+
+
+/* CyaSSL BIO type */
+struct CYASSL_BIO {
+    byte        type;          /* method type */
+    byte        close;         /* close flag */
+    byte        eof;           /* eof flag */
+    CYASSL*     ssl;           /* possible associated ssl */
+    byte*       mem;           /* memory buffer */
+    int         memLen;        /* memory buffer length */
+    int         fd;            /* possible file descriptor */
+    CYASSL_BIO* prev;          /* previous in chain */
+    CYASSL_BIO* next;          /* next in chain */
+};
+
+
+/* CyaSSL method type */
+struct CYASSL_METHOD {
+    ProtocolVersion version;
+    byte            side;         /* connection side, server or client */
+    byte            downgrade;    /* whether to downgrade version, default no */
+};
+
+
+/* defautls to client */
+CYASSL_LOCAL void InitSSL_Method(CYASSL_METHOD*, ProtocolVersion);
+
+/* for sniffer */
+CYASSL_LOCAL int DoFinished(CYASSL* ssl, const byte* input, word32* inOutIdx,
+                            int sniff);
+CYASSL_LOCAL int DoApplicationData(CYASSL* ssl, byte* input, word32* inOutIdx);
+
+
+/* CyaSSL buffer type */
+typedef struct buffer {
+    word32 length;
+    byte*  buffer;
+} buffer;
+
+
+enum {
+    FORCED_FREE = 1,
+    NO_FORCED_FREE = 0
+};
+
+
+/* only use compression extra if using compression */
+#ifdef HAVE_LIBZ
+    #define COMP_EXTRA MAX_COMP_EXTRA
+#else
+    #define COMP_EXTRA 0
+#endif
+
+/* only the sniffer needs space in the buffer for extra MTU record(s) */
+#ifdef CYASSL_SNIFFER
+    #define MTU_EXTRA MAX_MTU * 3 
+#else
+    #define MTU_EXTRA 0
+#endif
+
+
+/* embedded callbacks require large static buffers, make sure on */
+#ifdef CYASSL_CALLBACKS
+    #undef  LARGE_STATIC_BUFFERS
+    #define LARGE_STATIC_BUFFERS
+#endif
+
+
+/* give user option to use 16K static buffers */
+#if defined(LARGE_STATIC_BUFFERS)
+    #define RECORD_SIZE MAX_RECORD_SIZE
+#else
+    #ifdef CYASSL_DTLS
+        #define RECORD_SIZE MAX_MTU 
+    #else
+        #define RECORD_SIZE 128 
+    #endif
+#endif
+
+
+/* user option to turn off 16K output option */
+/* if using small static buffers (default) and SSL_write tries to write data
+   larger than the record we have, dynamically get it, unless user says only
+   write in static buffer chuncks  */
+#ifndef STATIC_CHUNKS_ONLY
+    #define OUTPUT_RECORD_SIZE MAX_RECORD_SIZE
+#else
+    #define OUTPUT_RECORD_SIZE RECORD_SIZE
+#endif
+
+/* CyaSSL input buffer
+
+   RFC 2246:
+
+   length
+       The length (in bytes) of the following TLSPlaintext.fragment.
+       The length should not exceed 2^14.
+*/
+#if defined(LARGE_STATIC_BUFFERS)
+    #define STATIC_BUFFER_LEN RECORD_HEADER_SZ + RECORD_SIZE + COMP_EXTRA + \
+             MTU_EXTRA + MAX_MSG_EXTRA
+#else
+    /* zero length arrays may not be supported */
+    #define STATIC_BUFFER_LEN 1
+#endif
+
+typedef struct {
+    word32 length;       /* total buffer length used */
+    word32 idx;          /* idx to part of length already consumed */
+    byte*  buffer;       /* place holder for static or dynamic buffer */
+    word32 bufferSize;   /* current buffer size */
+    ALIGN16 byte staticBuffer[STATIC_BUFFER_LEN];
+    byte   dynamicFlag;  /* dynamic memory currently in use */
+    byte   offset;       /* alignment offset attempt */
+} bufferStatic;
+
+/* Cipher Suites holder */
+typedef struct Suites {
+    int    setSuites;               /* user set suites from default */
+    byte   suites[MAX_SUITE_SZ];  
+    word16 suiteSz;                 /* suite length in bytes        */
+    byte   hashSigAlgo[HELLO_EXT_SIGALGO_MAX]; /* sig/algo to offer */
+    word16 hashSigAlgoSz;           /* SigAlgo extension length in bytes */
+    byte   hashAlgo;                /* selected hash algorithm */
+    byte   sigAlgo;                 /* selected sig algorithm */
+} Suites;
+
+
+CYASSL_LOCAL
+void InitSuites(Suites*, ProtocolVersion,
+                                     byte, byte, byte, byte, byte, byte, int);
+CYASSL_LOCAL
+int  SetCipherList(Suites*, const char* list);
+
+#ifndef PSK_TYPES_DEFINED
+    typedef unsigned int (*psk_client_callback)(CYASSL*, const char*, char*,
+                          unsigned int, unsigned char*, unsigned int);
+    typedef unsigned int (*psk_server_callback)(CYASSL*, const char*,
+                          unsigned char*, unsigned int);
+#endif /* PSK_TYPES_DEFINED */
+
+
+#ifndef CYASSL_USER_IO
+    /* default IO callbacks */
+    CYASSL_LOCAL
+    int EmbedReceive(CYASSL *ssl, char *buf, int sz, void *ctx);
+    CYASSL_LOCAL 
+    int EmbedSend(CYASSL *ssl, char *buf, int sz, void *ctx);
+
+    #ifdef HAVE_OCSP
+        CYASSL_LOCAL
+        int EmbedOcspLookup(void*, const char*, int, byte*, int, byte**);
+        CYASSL_LOCAL
+        void EmbedOcspRespFree(void*, byte*);
+    #endif
+
+    #ifdef CYASSL_DTLS
+        CYASSL_LOCAL
+        int EmbedReceiveFrom(CYASSL *ssl, char *buf, int sz, void *ctx);
+        CYASSL_LOCAL 
+        int EmbedSendTo(CYASSL *ssl, char *buf, int sz, void *ctx);
+        CYASSL_LOCAL
+        int EmbedGenerateCookie(CYASSL* ssl, byte *buf, int sz, void *ctx);
+        CYASSL_LOCAL
+        int IsUDP(void*);
+    #endif /* CYASSL_DTLS */
+#endif /* CYASSL_USER_IO */
+
+#ifdef HAVE_NETX
+    CYASSL_LOCAL int NetX_Receive(CYASSL *ssl, char *buf, int sz, void *ctx);
+    CYASSL_LOCAL int NetX_Send(CYASSL *ssl, char *buf, int sz, void *ctx);
+#endif /* HAVE_NETX */
+
+
+/* CyaSSL Cipher type just points back to SSL */
+struct CYASSL_CIPHER {
+    CYASSL* ssl;
+};
+
+
+typedef struct OCSP_Entry OCSP_Entry;
+
+#ifdef SHA_DIGEST_SIZE
+    #define OCSP_DIGEST_SIZE SHA_DIGEST_SIZE
+#else
+    #define OCSP_DIGEST_SIZE 160
+#endif
+
+#ifdef NO_ASN 
+    /* no_asn won't have */
+    typedef struct CertStatus CertStatus;
+#endif
+
+struct OCSP_Entry {
+    OCSP_Entry* next;                        /* next entry             */
+    byte    issuerHash[OCSP_DIGEST_SIZE];    /* issuer hash            */ 
+    byte    issuerKeyHash[OCSP_DIGEST_SIZE]; /* issuer public key hash */
+    CertStatus* status;                      /* OCSP response list     */
+    int         totalStatus;                 /* number on list         */
+};
+
+
+#ifndef HAVE_OCSP
+    typedef struct CYASSL_OCSP CYASSL_OCSP;
+#endif
+
+/* CyaSSL OCSP controller */
+struct CYASSL_OCSP {
+    CYASSL_CERT_MANAGER* cm;            /* pointer back to cert manager */
+    OCSP_Entry*          ocspList;      /* OCSP response list */
+    CyaSSL_Mutex         ocspLock;      /* OCSP list lock */
+};
+
+#ifndef MAX_DATE_SIZE
+#define MAX_DATE_SIZE 32
+#endif
+
+typedef struct CRL_Entry CRL_Entry;
+
+#ifdef SHA_DIGEST_SIZE
+    #define CRL_DIGEST_SIZE SHA_DIGEST_SIZE
+#else
+    #define CRL_DIGEST_SIZE 160
+#endif
+
+#ifdef NO_ASN 
+    typedef struct RevokedCert RevokedCert;
+#endif
+
+/* Complete CRL */
+struct CRL_Entry {
+    CRL_Entry* next;                      /* next entry */
+    byte    issuerHash[CRL_DIGEST_SIZE];  /* issuer hash                 */ 
+    /* byte    crlHash[CRL_DIGEST_SIZE];      raw crl data hash           */ 
+    /* restore the hash here if needed for optimized comparisons */
+    byte    lastDate[MAX_DATE_SIZE]; /* last date updated  */
+    byte    nextDate[MAX_DATE_SIZE]; /* next update date   */
+    byte    lastDateFormat;          /* last date format */
+    byte    nextDateFormat;          /* next date format */
+    RevokedCert* certs;              /* revoked cert list  */
+    int          totalCerts;         /* number on list     */
+};
+
+
+typedef struct CRL_Monitor CRL_Monitor;
+
+/* CRL directory monitor */
+struct CRL_Monitor {
+    char* path;      /* full dir path, if valid pointer we're using */
+    int   type;      /* PEM or ASN1 type */
+};
+
+
+#ifndef HAVE_CRL
+    typedef struct CYASSL_CRL CYASSL_CRL;
+#endif
+
+/* CyaSSL CRL controller */
+struct CYASSL_CRL {
+    CYASSL_CERT_MANAGER* cm;            /* pointer back to cert manager */
+    CRL_Entry*           crlList;       /* our CRL list */
+    CyaSSL_Mutex         crlLock;       /* CRL list lock */
+    CRL_Monitor          monitors[2];   /* PEM and DER possible */
+#ifdef HAVE_CRL_MONITOR
+    pthread_t            tid;           /* monitoring thread */
+#endif
+};
+
+
+#ifdef NO_ASN 
+    typedef struct Signer Signer;
+#endif
+
+
+#ifndef CA_TABLE_SIZE
+    #define CA_TABLE_SIZE 11
+#endif
+
+/* CyaSSL Certificate Manager */
+struct CYASSL_CERT_MANAGER {
+    Signer*         caTable[CA_TABLE_SIZE]; /* the CA signer table */
+    CyaSSL_Mutex    caLock;             /* CA list lock */
+    CallbackCACache caCacheCallback;    /* CA cache addition callback */
+    void*           heap;               /* heap helper */
+    CYASSL_CRL*     crl;                /* CRL checker */
+    byte            crlEnabled;         /* is CRL on ? */
+    byte            crlCheckAll;        /* always leaf, but all ? */
+    CbMissingCRL    cbMissingCRL;       /* notify through cb of missing crl */
+    CYASSL_OCSP*    ocsp;               /* OCSP checker */
+    byte            ocspEnabled;        /* is OCSP on ? */
+    byte            ocspSendNonce;      /* send the OCSP nonce ? */
+    byte            ocspUseOverrideURL; /* ignore cert's responder, override */
+    char*           ocspOverrideURL;    /* use this responder */
+    void*           ocspIOCtx;          /* I/O callback CTX */
+    CbOCSPIO        ocspIOCb;           /* I/O callback for OCSP lookup */
+    CbOCSPRespFree  ocspRespFreeCb;     /* Frees OCSP Response from IO Cb */
+};
+
+CYASSL_LOCAL int CM_SaveCertCache(CYASSL_CERT_MANAGER*, const char*);
+CYASSL_LOCAL int CM_RestoreCertCache(CYASSL_CERT_MANAGER*, const char*);
+CYASSL_LOCAL int CM_MemSaveCertCache(CYASSL_CERT_MANAGER*, void*, int, int*);
+CYASSL_LOCAL int CM_MemRestoreCertCache(CYASSL_CERT_MANAGER*, const void*, int);
+CYASSL_LOCAL int CM_GetCertCacheMemSize(CYASSL_CERT_MANAGER*);
+
+/* CyaSSL Sock Addr */
+struct CYASSL_SOCKADDR {
+    unsigned int sz; /* sockaddr size */
+    void*        sa; /* pointer to the sockaddr_in or sockaddr_in6 */
+};
+
+typedef struct CYASSL_DTLS_CTX {
+    CYASSL_SOCKADDR peer;
+    int fd;
+} CYASSL_DTLS_CTX;
+
+/* RFC 6066 TLS Extensions */
+#ifdef HAVE_TLS_EXTENSIONS
+
+typedef enum {
+    SERVER_NAME_INDICATION =  0,
+    MAX_FRAGMENT_LENGTH    =  1,
+    TRUNCATED_HMAC         =  4,
+    ELLIPTIC_CURVES        = 10
+} TLSX_Type;
+
+typedef struct TLSX {
+    TLSX_Type    type; /* Extension Type  */
+    void*        data; /* Extension Data  */
+    byte         resp; /* IsResponse Flag */
+    struct TLSX* next; /* List Behavior   */
+} TLSX;
+
+CYASSL_LOCAL TLSX* TLSX_Find(TLSX* list, TLSX_Type type);
+CYASSL_LOCAL void TLSX_FreeAll(TLSX* list);
+
+#ifndef NO_CYASSL_CLIENT
+CYASSL_LOCAL word16 TLSX_GetRequestSize(CYASSL* ssl);
+CYASSL_LOCAL word16 TLSX_WriteRequest(CYASSL* ssl, byte* output);
+#endif
+
+#ifndef NO_CYASSL_SERVER
+CYASSL_LOCAL word16 TLSX_GetResponseSize(CYASSL* ssl);
+CYASSL_LOCAL word16 TLSX_WriteResponse(CYASSL* ssl, byte* output);
+#endif
+
+CYASSL_LOCAL int    TLSX_Parse(CYASSL* ssl, byte* input, word16 length,
+                                                byte isRequest, Suites *suites);
+
+/* Server Name Indication */
+#ifdef HAVE_SNI
+
+typedef struct SNI {
+    byte                       type;    /* SNI Type          */
+    union { char* host_name; } data;    /* SNI Data          */
+    struct SNI*                next;    /* List Behavior     */
+#ifndef NO_CYASSL_SERVER
+    byte                       options; /* Behaviour options */
+    byte                       status;  /* Matching result   */
+#endif
+} SNI;
+
+CYASSL_LOCAL int TLSX_UseSNI(TLSX** extensions, byte type, const void* data,
+                                                                   word16 size);
+
+#ifndef NO_CYASSL_SERVER
+CYASSL_LOCAL void   TLSX_SNI_SetOptions(TLSX* extensions, byte type,
+                                                                  byte options);
+CYASSL_LOCAL byte   TLSX_SNI_Status(TLSX* extensions, byte type);
+CYASSL_LOCAL word16 TLSX_SNI_GetRequest(TLSX* extensions, byte type,
+                                                                   void** data);
+CYASSL_LOCAL int    TLSX_SNI_GetFromBuffer(const byte* buffer, word32 bufferSz,
+                                         byte type, byte* sni, word32* inOutSz);
+#endif
+
+#endif /* HAVE_SNI */
+
+/* Maximum Fragment Length */
+#ifdef HAVE_MAX_FRAGMENT
+
+CYASSL_LOCAL int TLSX_UseMaxFragment(TLSX** extensions, byte mfl);
+
+#endif /* HAVE_MAX_FRAGMENT */
+
+#ifdef HAVE_TRUNCATED_HMAC
+
+CYASSL_LOCAL int TLSX_UseTruncatedHMAC(TLSX** extensions);
+
+#endif /* HAVE_TRUNCATED_HMAC */
+
+#ifdef HAVE_SUPPORTED_CURVES
+
+typedef struct EllipticCurve {
+    word16                name; /* CurveNames    */
+    struct EllipticCurve* next; /* List Behavior */
+
+} EllipticCurve;
+
+CYASSL_LOCAL int TLSX_UseSupportedCurve(TLSX** extensions, word16 name);
+
+#ifndef NO_CYASSL_SERVER
+CYASSL_LOCAL int TLSX_ValidateEllipticCurves(CYASSL* ssl, byte first,
+                                                                   byte second);
+#endif
+
+#endif /* HAVE_SUPPORTED_CURVES */
+
+#endif /* HAVE_TLS_EXTENSIONS */
+
+/* CyaSSL context type */
+struct CYASSL_CTX {
+    CYASSL_METHOD* method;
+    CyaSSL_Mutex   countMutex;    /* reference count mutex */
+    int         refCount;         /* reference count */
+#ifndef NO_CERTS
+    buffer      certificate;
+    buffer      certChain;
+                 /* chain after self, in DER, with leading size for each cert */
+    buffer      privateKey;
+    buffer      serverDH_P;
+    buffer      serverDH_G;
+    CYASSL_CERT_MANAGER* cm;      /* our cert manager, ctx owns SSL will use */
+#endif
+    Suites      suites;
+    void*       heap;             /* for user memory overrides */
+    byte        verifyPeer;
+    byte        verifyNone;
+    byte        failNoCert;
+    byte        sessionCacheOff;
+    byte        sessionCacheFlushOff;
+    byte        sendVerify;       /* for client side */
+    byte        haveRSA;          /* RSA available */
+    byte        haveDH;           /* server DH parms set by user */
+    byte        haveNTRU;         /* server private NTRU  key loaded */
+    byte        haveECDSAsig;     /* server cert signed w/ ECDSA */
+    byte        haveStaticECC;    /* static server ECC private key */
+    byte        partialWrite;     /* only one msg per write call */
+    byte        quietShutdown;    /* don't send close notify */
+    byte        groupMessages;    /* group handshake messages before sending */
+    CallbackIORecv CBIORecv;
+    CallbackIOSend CBIOSend;
+#ifdef CYASSL_DTLS
+    CallbackGenCookie CBIOCookie;       /* gen cookie callback */
+#endif
+    VerifyCallback  verifyCallback;     /* cert verification callback */
+    word32          timeout;            /* session timeout */
+#ifdef HAVE_ECC
+    word16          eccTempKeySz;       /* in octets 20 - 66 */
+    word32          pkCurveOID;         /* curve Ecc_Sum */
+#endif
+#ifndef NO_PSK
+    byte        havePSK;                /* psk key set by user */
+    psk_client_callback client_psk_cb;  /* client callback */
+    psk_server_callback server_psk_cb;  /* server callback */
+    char        server_hint[MAX_PSK_ID_LEN];
+#endif /* NO_PSK */
+#if defined(OPENSSL_EXTRA) || defined(HAVE_WEBSERVER)
+    pem_password_cb passwd_cb;
+    void*            userdata;
+#endif /* OPENSSL_EXTRA */
+#ifdef HAVE_OCSP
+    CYASSL_OCSP      ocsp;
+#endif
+#ifdef HAVE_CAVIUM
+    int              devId;            /* cavium device id to use */
+#endif
+#ifdef HAVE_TLS_EXTENSIONS
+    TLSX* extensions;                  /* RFC 6066 TLS Extensions data */
+#endif
+#ifdef ATOMIC_USER
+    CallbackMacEncrypt    MacEncryptCb;    /* Atomic User Mac/Encrypt Cb */
+    CallbackDecryptVerify DecryptVerifyCb; /* Atomic User Decrypt/Verify Cb */
+#endif
+#ifdef HAVE_PK_CALLBACKS
+    #ifdef HAVE_ECC
+        CallbackEccSign   EccSignCb;    /* User EccSign   Callback handler */
+        CallbackEccVerify EccVerifyCb;  /* User EccVerify Callback handler */
+    #endif /* HAVE_ECC */
+    #ifndef NO_RSA 
+        CallbackRsaSign   RsaSignCb;    /* User RsaSign   Callback handler */
+        CallbackRsaVerify RsaVerifyCb;  /* User RsaVerify Callback handler */
+        CallbackRsaEnc    RsaEncCb;     /* User Rsa Public Encrypt  handler */
+        CallbackRsaDec    RsaDecCb;     /* User Rsa Private Decrypt handler */
+    #endif /* NO_RSA */
+#endif /* HAVE_PK_CALLBACKS */
+};
+
+
+CYASSL_LOCAL
+int InitSSL_Ctx(CYASSL_CTX*, CYASSL_METHOD*);
+CYASSL_LOCAL
+void FreeSSL_Ctx(CYASSL_CTX*);
+CYASSL_LOCAL
+void SSL_CtxResourceFree(CYASSL_CTX*);
+
+CYASSL_LOCAL
+int DeriveTlsKeys(CYASSL* ssl);
+CYASSL_LOCAL
+int ProcessOldClientHello(CYASSL* ssl, const byte* input, word32* inOutIdx,
+                          word32 inSz, word16 sz);
+#ifndef NO_CERTS
+    CYASSL_LOCAL
+    int AddCA(CYASSL_CERT_MANAGER* ctx, buffer der, int type, int verify);
+    CYASSL_LOCAL
+    int AlreadySigner(CYASSL_CERT_MANAGER* cm, byte* hash);
+#endif
+
+/* All cipher suite related info */
+typedef struct CipherSpecs {
+    byte bulk_cipher_algorithm;
+    byte cipher_type;               /* block, stream, or aead */
+    byte mac_algorithm;
+    byte kea;                       /* key exchange algo */
+    byte sig_algo;
+    byte hash_size;
+    byte pad_size;
+    byte static_ecdh;
+    word16 key_size;
+    word16 iv_size;
+    word16 block_size;
+    word16 aead_mac_size;
+} CipherSpecs;
+
+
+void InitCipherSpecs(CipherSpecs* cs);
+
+
+/* Supported Message Authentication Codes from page 43 */
+enum MACAlgorithm { 
+    no_mac,
+    md5_mac,
+    sha_mac,
+    sha224_mac,
+    sha256_mac,
+    sha384_mac,
+    sha512_mac,
+    rmd_mac,
+    blake2b_mac
+};
+
+
+/* Supported Key Exchange Protocols */
+enum KeyExchangeAlgorithm { 
+    no_kea,
+    rsa_kea, 
+    diffie_hellman_kea, 
+    fortezza_kea,
+    psk_kea,
+    ntru_kea,
+    ecc_diffie_hellman_kea,
+    ecc_static_diffie_hellman_kea       /* for verify suite only */
+};
+
+
+/* Supported Authentication Schemes */
+enum SignatureAlgorithm {
+    anonymous_sa_algo,
+    rsa_sa_algo,
+    dsa_sa_algo,
+    ecc_dsa_sa_algo
+};
+
+
+/* Supprted ECC Curve Types */
+enum EccCurves {
+    named_curve = 3
+};
+
+
+/* Supprted ECC Named Curves */
+enum EccNamedCurves {
+    secp256r1 = 0x17,         /* default, OpenSSL also calls it prime256v1 */
+    secp384r1 = 0x18,
+    secp521r1 = 0x19,
+
+    secp160r1 = 0x10,
+    secp192r1 = 0x13,        /*           Openssl also call it prime192v1 */
+    secp224r1 = 0x15
+};
+
+
+/* Valid client certificate request types from page 27 */
+enum ClientCertificateType {    
+    rsa_sign            = 1, 
+    dss_sign            = 2,
+    rsa_fixed_dh        = 3,
+    dss_fixed_dh        = 4,
+    rsa_ephemeral_dh    = 5,
+    dss_ephemeral_dh    = 6,
+    fortezza_kea_cert   = 20
+};
+
+
+enum CipherType { stream, block, aead };
+
+
+#ifdef CYASSL_DTLS
+
+    #ifdef WORD64_AVAILABLE
+        typedef word64 DtlsSeq;
+    #else
+        typedef word32 DtlsSeq;
+    #endif
+    #define DTLS_SEQ_BITS (sizeof(DtlsSeq) * CHAR_BIT)
+
+    typedef struct DtlsState {
+        DtlsSeq window;     /* Sliding window for current epoch    */
+        word16 nextEpoch;   /* Expected epoch in next record       */
+        word32 nextSeq;     /* Expected sequence in next record    */
+
+        word16 curEpoch;    /* Received epoch in current record    */
+        word32 curSeq;      /* Received sequence in current record */
+
+        DtlsSeq prevWindow; /* Sliding window for old epoch        */
+        word32 prevSeq;     /* Next sequence in allowed old epoch  */
+    } DtlsState;
+
+#endif /* CYASSL_DTLS */
+
+
+/* keys and secrets */
+typedef struct Keys {
+    byte client_write_MAC_secret[MAX_DIGEST_SIZE];   /* max sizes */
+    byte server_write_MAC_secret[MAX_DIGEST_SIZE]; 
+    byte client_write_key[AES_256_KEY_SIZE];         /* max sizes */
+    byte server_write_key[AES_256_KEY_SIZE]; 
+    byte client_write_IV[AES_IV_SIZE];               /* max sizes */
+    byte server_write_IV[AES_IV_SIZE];
+#ifdef HAVE_AEAD
+    byte aead_exp_IV[AEAD_EXP_IV_SZ];
+    byte aead_enc_imp_IV[AEAD_IMP_IV_SZ];
+    byte aead_dec_imp_IV[AEAD_IMP_IV_SZ];
+#endif
+
+    word32 peer_sequence_number;
+    word32 sequence_number;
+    
+#ifdef CYASSL_DTLS
+    DtlsState dtls_state;                       /* Peer's state */
+    word16 dtls_peer_handshake_number;
+    word16 dtls_expected_peer_handshake_number;
+
+    word16 dtls_epoch;                          /* Current tx epoch    */
+    word32 dtls_sequence_number;                /* Current tx sequence */
+    word16 dtls_handshake_number;               /* Current tx handshake seq */
+#endif
+
+    word32 encryptSz;             /* last size of encrypted data   */
+    word32 padSz;                 /* how much to advance after decrypt part */
+    byte   encryptionOn;          /* true after change cipher spec */
+    byte   decryptedCur;          /* only decrypt current record once */
+} Keys;
+
+
+/* cipher for now */
+typedef struct Ciphers {
+#ifdef BUILD_ARC4
+    Arc4*   arc4;
+#endif
+#ifdef BUILD_DES3
+    Des3*   des3;
+#endif
+#if defined(BUILD_AES) || defined(BUILD_AESGCM)
+    Aes*    aes;
+#endif
+#ifdef HAVE_CAMELLIA
+    Camellia* cam;
+#endif
+#ifdef HAVE_HC128
+    HC128*  hc128;
+#endif
+#ifdef BUILD_RABBIT
+    Rabbit* rabbit;
+#endif
+    byte    setup;       /* have we set it up flag for detection */
+} Ciphers;
+
+
+CYASSL_LOCAL void InitCiphers(CYASSL* ssl);
+CYASSL_LOCAL void FreeCiphers(CYASSL* ssl);
+
+
+/* hashes type */
+typedef struct Hashes {
+    #ifndef NO_OLD_TLS
+        byte md5[MD5_DIGEST_SIZE];
+    #endif
+    byte sha[SHA_DIGEST_SIZE];
+    #ifndef NO_SHA256
+        byte sha256[SHA256_DIGEST_SIZE];
+    #endif
+    #ifdef CYASSL_SHA384
+        byte sha384[SHA384_DIGEST_SIZE];
+    #endif
+} Hashes;
+
+
+/* Static x509 buffer */
+typedef struct x509_buffer {
+    int  length;                  /* actual size */
+    byte buffer[MAX_X509_SIZE];   /* max static cert size */
+} x509_buffer;
+
+
+/* CyaSSL X509_CHAIN, for no dynamic memory SESSION_CACHE */
+struct CYASSL_X509_CHAIN {
+    int         count;                    /* total number in chain */
+    x509_buffer certs[MAX_CHAIN_DEPTH];   /* only allow max depth 4 for now */
+};
+
+
+/* CyaSSL session type */
+struct CYASSL_SESSION {
+    byte         sessionID[ID_LEN];             /* id for protocol */
+    byte         masterSecret[SECRET_LEN];      /* stored secret */
+    word32       bornOn;                        /* create time in seconds   */
+    word32       timeout;                       /* timeout in seconds       */
+#ifdef SESSION_CERTS
+    CYASSL_X509_CHAIN chain;                    /* peer cert chain, static  */
+    ProtocolVersion version;                    /* which version was used */
+    byte            cipherSuite0;               /* first byte, normally 0 */
+    byte            cipherSuite;                /* 2nd byte, actual suite */
+#endif
+#ifndef NO_CLIENT_CACHE
+    byte         serverID[SERVER_ID_LEN];       /* for easier client lookup */
+    word16       idLen;                         /* serverID length */
+#endif
+};
+
+
+CYASSL_LOCAL
+CYASSL_SESSION* GetSession(CYASSL*, byte*);
+CYASSL_LOCAL
+int          SetSession(CYASSL*, CYASSL_SESSION*);
+
+typedef void (*hmacfp) (CYASSL*, byte*, const byte*, word32, int, int);
+
+#ifndef NO_CLIENT_CACHE
+    CYASSL_SESSION* GetSessionClient(CYASSL*, const byte*, int);
+#endif
+
+/* client connect state for nonblocking restart */
+enum ConnectState {
+    CONNECT_BEGIN = 0,
+    CLIENT_HELLO_SENT,
+    HELLO_AGAIN,               /* HELLO_AGAIN s for DTLS case */
+    HELLO_AGAIN_REPLY,
+    FIRST_REPLY_DONE,
+    FIRST_REPLY_FIRST,
+    FIRST_REPLY_SECOND,
+    FIRST_REPLY_THIRD,
+    FIRST_REPLY_FOURTH,
+    FINISHED_DONE,
+    SECOND_REPLY_DONE
+};
+
+
+/* server accept state for nonblocking restart */
+enum AcceptState {
+    ACCEPT_BEGIN = 0,
+    ACCEPT_CLIENT_HELLO_DONE,
+    HELLO_VERIFY_SENT,
+    ACCEPT_FIRST_REPLY_DONE,
+    SERVER_HELLO_SENT,
+    CERT_SENT,
+    KEY_EXCHANGE_SENT,
+    CERT_REQ_SENT,
+    SERVER_HELLO_DONE,
+    ACCEPT_SECOND_REPLY_DONE,
+    CHANGE_CIPHER_SENT,
+    ACCEPT_FINISHED_DONE,
+    ACCEPT_THIRD_REPLY_DONE
+};
+
+
+typedef struct Buffers {
+#ifndef NO_CERTS
+    buffer          certificate;            /* CYASSL_CTX owns, unless we own */
+    buffer          key;                    /* CYASSL_CTX owns, unless we own */
+    buffer          certChain;              /* CYASSL_CTX owns */
+                 /* chain after self, in DER, with leading size for each cert */
+    buffer          serverDH_P;             /* CYASSL_CTX owns, unless we own */
+    buffer          serverDH_G;             /* CYASSL_CTX owns, unless we own */
+    buffer          serverDH_Pub;
+    buffer          serverDH_Priv;
+#endif
+    buffer          domainName;             /* for client check */
+    bufferStatic    inputBuffer;
+    bufferStatic    outputBuffer;
+    buffer          clearOutputBuffer;
+    int             prevSent;              /* previous plain text bytes sent
+                                              when got WANT_WRITE            */
+    int             plainSz;               /* plain text bytes in buffer to send
+                                              when got WANT_WRITE            */
+    byte            weOwnCert;             /* SSL own cert flag */
+    byte            weOwnKey;              /* SSL own key  flag */
+    byte            weOwnDH;               /* SSL own dh (p,g)  flag */
+#ifdef CYASSL_DTLS
+    CYASSL_DTLS_CTX dtlsCtx;               /* DTLS connection context */
+#endif
+#ifdef HAVE_PK_CALLBACKS
+    #ifdef HAVE_ECC
+        buffer peerEccDsaKey;              /* we own for Ecc Verify Callbacks */
+    #endif /* HAVE_ECC */
+    #ifndef NO_RSA
+        buffer peerRsaKey;                 /* we own for Rsa Verify Callbacks */
+    #endif /* NO_RSA */
+#endif /* HAVE_PK_CALLBACKS */
+} Buffers;
+
+typedef struct Options {
+    byte            sessionCacheOff;
+    byte            sessionCacheFlushOff;
+    byte            cipherSuite0;           /* first byte, normally 0 */
+    byte            cipherSuite;            /* second byte, actual suite */
+    byte            serverState;
+    byte            clientState;
+    byte            handShakeState;
+    byte            side;               /* client or server end */
+    byte            verifyPeer;
+    byte            verifyNone;
+    byte            failNoCert;
+    byte            downgrade;          /* allow downgrade of versions */
+    byte            sendVerify;         /* false = 0, true = 1, sendBlank = 2 */
+    byte            resuming;
+    byte            haveSessionId;      /* server may not send */
+    byte            tls;                /* using TLS ? */
+    byte            tls1_1;             /* using TLSv1.1+ ? */
+    byte            dtls;               /* using datagrams ? */
+    byte            connReset;          /* has the peer reset */
+    byte            isClosed;           /* if we consider conn closed */
+    byte            closeNotify;        /* we've recieved a close notify */
+    byte            sentNotify;         /* we've sent a close notify */
+    byte            connectState;       /* nonblocking resume */
+    byte            acceptState;        /* nonblocking resume */
+    byte            usingCompression;   /* are we using compression */
+    byte            haveRSA;            /* RSA available */
+    byte            haveDH;             /* server DH parms set by user */
+    byte            haveNTRU;           /* server NTRU  private key loaded */
+    byte            haveECDSAsig;       /* server ECDSA signed cert */
+    byte            haveStaticECC;      /* static server ECC private key */
+    byte            havePeerCert;       /* do we have peer's cert */
+    byte            havePeerVerify;     /* and peer's cert verify */
+    byte            usingPSK_cipher;    /* whether we're using psk as cipher */
+    byte            sendAlertState;     /* nonblocking resume */ 
+    byte            processReply;       /* nonblocking resume */
+    byte            partialWrite;       /* only one msg per write call */
+    byte            quietShutdown;      /* don't send close notify */
+    byte            certOnly;           /* stop once we get cert */
+    byte            groupMessages;      /* group handshake messages */
+    byte            usingNonblock;      /* set when using nonblocking socket */
+    byte            saveArrays;         /* save array Memory for user get keys
+                                           or psk */
+#ifndef NO_PSK
+    byte            havePSK;            /* psk key set by user */
+    psk_client_callback client_psk_cb;
+    psk_server_callback server_psk_cb;
+#endif /* NO_PSK */
+} Options;
+
+typedef struct Arrays {
+    byte            clientRandom[RAN_LEN];
+    byte            serverRandom[RAN_LEN];
+    byte            sessionID[ID_LEN];
+    byte            preMasterSecret[ENCRYPT_LEN];
+    byte            masterSecret[SECRET_LEN];
+#ifdef CYASSL_DTLS
+    byte            cookie[MAX_COOKIE_LEN];
+    byte            cookieSz;
+#endif
+#ifndef NO_PSK
+    char            client_identity[MAX_PSK_ID_LEN];
+    char            server_hint[MAX_PSK_ID_LEN];
+    byte            psk_key[MAX_PSK_KEY_LEN];
+    word32          psk_keySz;          /* acutal size */
+#endif
+    word32          preMasterSz;        /* differs for DH, actual size */
+} Arrays;
+
+#ifndef ASN_NAME_MAX
+#define ASN_NAME_MAX 256
+#endif
+
+#ifndef MAX_DATE_SZ
+#define MAX_DATE_SZ 32
+#endif
+
+struct CYASSL_X509_NAME {
+    char  *name;
+    char  staticName[ASN_NAME_MAX];
+    int   dynamicName;
+    int   sz;
+#ifdef OPENSSL_EXTRA
+    DecodedName fullName;
+#endif /* OPENSSL_EXTRA */
+};
+
+#ifndef EXTERNAL_SERIAL_SIZE
+    #define EXTERNAL_SERIAL_SIZE 32
+#endif
+
+#ifdef NO_ASN 
+    typedef struct DNS_entry DNS_entry;
+#endif
+
+struct CYASSL_X509 {
+    int              version;
+    CYASSL_X509_NAME issuer;
+    CYASSL_X509_NAME subject;
+    int              serialSz;
+    byte             serial[EXTERNAL_SERIAL_SIZE];
+    char             subjectCN[ASN_NAME_MAX];        /* common name short cut */
+#ifdef CYASSL_SEP
+    int              deviceTypeSz;
+    byte             deviceType[EXTERNAL_SERIAL_SIZE];
+    int              hwTypeSz;
+    byte             hwType[EXTERNAL_SERIAL_SIZE];
+    int              hwSerialNumSz;
+    byte             hwSerialNum[EXTERNAL_SERIAL_SIZE];
+    #ifdef OPENSSL_EXTRA
+        byte             certPolicySet;
+        byte             certPolicyCrit;
+    #endif /* OPENSSL_EXTRA */
+#endif
+    int              notBeforeSz;
+    byte             notBefore[MAX_DATE_SZ];
+    int              notAfterSz;
+    byte             notAfter[MAX_DATE_SZ];
+    int              sigOID;
+    buffer           sig;
+    int              pubKeyOID;
+    buffer           pubKey;
+    #ifdef HAVE_ECC
+        word32       pkCurveOID;
+    #endif /* HAVE_ECC */
+    buffer           derCert;                        /* may need  */
+    DNS_entry*       altNames;                       /* alt names list */
+    DNS_entry*       altNamesNext;                   /* hint for retrieval */
+    byte             dynamicMemory;                  /* dynamic memory flag */
+    byte             isCa;
+#ifdef OPENSSL_EXTRA
+    word32           pathLength;
+    word16           keyUsage;
+    byte             basicConstSet;
+    byte             basicConstCrit;
+    byte             basicConstPlSet;
+    byte             subjAltNameSet;
+    byte             subjAltNameCrit;
+    byte             authKeyIdSet;
+    byte             authKeyIdCrit;
+    byte*            authKeyId;
+    word32           authKeyIdSz;
+    byte             subjKeyIdSet;
+    byte             subjKeyIdCrit;
+    byte*            subjKeyId;
+    word32           subjKeyIdSz;
+    byte             keyUsageSet;
+    byte             keyUsageCrit;
+#endif /* OPENSSL_EXTRA */
+};
+
+
+/* record layer header for PlainText, Compressed, and CipherText */
+typedef struct RecordLayerHeader {
+    byte            type;
+    byte            pvMajor;
+    byte            pvMinor;
+    byte            length[2];
+} RecordLayerHeader;
+
+
+/* record layer header for DTLS PlainText, Compressed, and CipherText */
+typedef struct DtlsRecordLayerHeader {
+    byte            type;
+    byte            pvMajor;
+    byte            pvMinor;
+    byte            epoch[2];             /* increment on cipher state change */
+    byte            sequence_number[6];   /* per record */
+    byte            length[2];
+} DtlsRecordLayerHeader;
+
+
+typedef struct DtlsPool {
+    buffer          buf[DTLS_POOL_SZ];
+    int             used;
+} DtlsPool;
+
+typedef struct DtlsMsg {
+    struct DtlsMsg* next;
+    word32          seq;       /* Handshake sequence number    */
+    word32          sz;        /* Length of whole mesage       */
+    word32          fragSz;    /* Length of fragments received */
+    byte            type;
+    byte*           buf;
+    byte*           msg;
+} DtlsMsg;
+
+
+#ifdef HAVE_NETX
+
+    /* NETX I/O Callback default */
+    typedef struct NetX_Ctx {
+        NX_TCP_SOCKET* nxSocket;    /* send/recv socket handle */
+        NX_PACKET*     nxPacket;    /* incoming packet handle for short reads */
+        ULONG          nxOffset;    /* offset already read from nxPacket */
+        ULONG          nxWait;      /* wait option flag */
+    } NetX_Ctx;
+
+#endif
+
+
+/* CyaSSL ssl type */
+struct CYASSL {
+    CYASSL_CTX*     ctx;
+    int             error;
+    ProtocolVersion version;            /* negotiated version */
+    ProtocolVersion chVersion;          /* client hello version */
+    Suites*         suites;             /* only need during handshake */
+    Ciphers         encrypt;
+    Ciphers         decrypt;
+    CipherSpecs     specs;
+    Keys            keys;
+    int             rfd;                /* read  file descriptor */
+    int             wfd;                /* write file descriptor */
+    int             rflags;             /* user read  flags */
+    int             wflags;             /* user write flags */
+    CYASSL_BIO*     biord;              /* socket bio read  to free/close */
+    CYASSL_BIO*     biowr;              /* socket bio write to free/close */
+    void*           IOCB_ReadCtx;
+    void*           IOCB_WriteCtx;
+    RNG*            rng;
+#ifndef NO_OLD_TLS
+#ifndef NO_SHA
+    Sha             hashSha;            /* sha hash of handshake msgs */
+#endif
+#ifndef NO_MD5
+    Md5             hashMd5;            /* md5 hash of handshake msgs */
+#endif
+#endif
+#ifndef NO_SHA256
+    Sha256          hashSha256;         /* sha256 hash of handshake msgs */
+#endif
+#ifdef CYASSL_SHA384
+    Sha384          hashSha384;         /* sha384 hash of handshake msgs */
+#endif
+    Hashes          verifyHashes;
+    Hashes          certHashes;         /* for cert verify */
+    Buffers         buffers;
+    Options         options;
+    Arrays*         arrays;
+    CYASSL_SESSION  session;
+    VerifyCallback  verifyCallback;      /* cert verification callback */
+    void*           verifyCbCtx;         /* cert verify callback user ctx*/
+#ifndef NO_RSA
+    RsaKey*         peerRsaKey;
+    byte            peerRsaKeyPresent;
+#endif
+#ifdef HAVE_NTRU
+    word16          peerNtruKeyLen;
+    byte            peerNtruKey[MAX_NTRU_PUB_KEY_SZ];
+    byte            peerNtruKeyPresent;
+#endif
+#ifdef HAVE_ECC
+    ecc_key*        peerEccKey;              /* peer's  ECDHE key */
+    ecc_key*        peerEccDsaKey;           /* peer's  ECDSA key */
+    ecc_key*        eccTempKey;              /* private ECDHE key */
+    ecc_key*        eccDsaKey;               /* private ECDSA key */
+    word16          eccTempKeySz;            /* in octets 20 - 66 */
+    word32          pkCurveOID;              /* curve Ecc_Sum     */
+    byte            peerEccKeyPresent;
+    byte            peerEccDsaKeyPresent;
+    byte            eccTempKeyPresent;
+    byte            eccDsaKeyPresent;
+#endif
+    hmacfp          hmac;
+    void*           heap;               /* for user overrides */
+    RecordLayerHeader curRL;
+    word16            curSize;
+    word32          timeout;            /* session timeout */
+    CYASSL_CIPHER   cipher;
+#ifdef HAVE_LIBZ
+    z_stream        c_stream;           /* compression   stream */
+    z_stream        d_stream;           /* decompression stream */
+    byte            didStreamInit;      /* for stream init and end */
+#endif
+#ifdef CYASSL_DTLS
+    int             dtls_timeout_init;  /* starting timeout vaule */
+    int             dtls_timeout_max;   /* maximum timeout value */
+    int             dtls_timeout;       /* current timeout value, changes */
+    DtlsPool*       dtls_pool;
+    DtlsMsg*        dtls_msg_list;
+    void*           IOCB_CookieCtx;     /* gen cookie ctx */
+    word32          dtls_expected_rx;
+#endif
+#ifdef CYASSL_CALLBACKS
+    HandShakeInfo   handShakeInfo;      /* info saved during handshake */
+    TimeoutInfo     timeoutInfo;        /* info saved during handshake */
+    byte            hsInfoOn;           /* track handshake info        */
+    byte            toInfoOn;           /* track timeout   info        */
+#endif
+#ifdef KEEP_PEER_CERT
+    CYASSL_X509     peerCert;           /* X509 peer cert */
+#endif
+#ifdef FORTRESS
+    void*           ex_data[MAX_EX_DATA]; /* external data, for Fortress */
+#endif
+#ifdef HAVE_CAVIUM
+    int              devId;            /* cavium device id to use */
+#endif
+#ifdef HAVE_TLS_EXTENSIONS
+    TLSX* extensions;                  /* RFC 6066 TLS Extensions data */
+#ifdef HAVE_MAX_FRAGMENT
+    word16 max_fragment;
+#endif
+#ifdef HAVE_TRUNCATED_HMAC
+    byte truncated_hmac;
+#endif
+#endif
+#ifdef HAVE_NETX
+    NetX_Ctx        nxCtx;             /* NetX IO Context */
+#endif
+#ifdef SESSION_INDEX
+    int sessionIndex;                  /* Session's location in the cache. */
+#endif
+    CYASSL_ALERT_HISTORY alert_history;
+#ifdef ATOMIC_USER
+    void*    MacEncryptCtx;    /* Atomic User Mac/Encrypt Callback Context */
+    void*    DecryptVerifyCtx; /* Atomic User Decrypt/Verify Callback Context */
+#endif
+#ifdef HAVE_PK_CALLBACKS
+    #ifdef HAVE_ECC
+        void* EccSignCtx;     /* Ecc Sign   Callback Context */
+        void* EccVerifyCtx;   /* Ecc Verify Callback Context */
+    #endif /* HAVE_ECC */
+    #ifndef NO_RSA 
+        void* RsaSignCtx;     /* Rsa Sign   Callback Context */
+        void* RsaVerifyCtx;   /* Rsa Verify Callback Context */
+        void* RsaEncCtx;      /* Rsa Public  Encrypt   Callback Context */
+        void* RsaDecCtx;      /* Rsa Private Decrypt   Callback Context */
+    #endif /* NO_RSA */
+#endif /* HAVE_PK_CALLBACKS */
+};
+
+
+CYASSL_LOCAL
+int  InitSSL(CYASSL*, CYASSL_CTX*);
+CYASSL_LOCAL
+void FreeSSL(CYASSL*);
+CYASSL_API void SSL_ResourceFree(CYASSL*);   /* Micrium uses */
+
+
+enum {
+    IV_SZ   = 32,          /* max iv sz */
+    NAME_SZ = 80          /* max one line */
+};
+
+
+typedef struct EncryptedInfo {
+    char     name[NAME_SZ];    /* encryption name */
+    byte     iv[IV_SZ];        /* encrypted IV */
+    word32   ivSz;             /* encrypted IV size */
+    long     consumed;         /* tracks PEM bytes consumed */
+    byte     set;              /* if encryption set */
+    CYASSL_CTX* ctx;              /* CTX owner */
+} EncryptedInfo;
+
+
+#ifndef NO_CERTS
+    CYASSL_LOCAL int PemToDer(const unsigned char* buff, long sz, int type,
+                              buffer* der, void* heap, EncryptedInfo* info,
+                              int* eccKey);
+
+    CYASSL_LOCAL int ProcessFile(CYASSL_CTX* ctx, const char* fname, int format,
+                                 int type, CYASSL* ssl, int userChain,
+                                CYASSL_CRL* crl);
+#endif
+
+
+#ifdef CYASSL_CALLBACKS
+    CYASSL_LOCAL
+    void InitHandShakeInfo(HandShakeInfo*);
+    CYASSL_LOCAL 
+    void FinishHandShakeInfo(HandShakeInfo*, const CYASSL*);
+    CYASSL_LOCAL 
+    void AddPacketName(const char*, HandShakeInfo*);
+
+    CYASSL_LOCAL
+    void InitTimeoutInfo(TimeoutInfo*);
+    CYASSL_LOCAL 
+    void FreeTimeoutInfo(TimeoutInfo*, void*);
+    CYASSL_LOCAL 
+    void AddPacketInfo(const char*, TimeoutInfo*, const byte*, int, void*);
+    CYASSL_LOCAL 
+    void AddLateName(const char*, TimeoutInfo*);
+    CYASSL_LOCAL 
+    void AddLateRecordHeader(const RecordLayerHeader* rl, TimeoutInfo* info);
+#endif
+
+
+/* Record Layer Header identifier from page 12 */
+enum ContentType {
+    no_type            = 0,
+    change_cipher_spec = 20, 
+    alert              = 21, 
+    handshake          = 22, 
+    application_data   = 23 
+};
+
+
+/* handshake header, same for each message type, pgs 20/21 */
+typedef struct HandShakeHeader {
+    byte            type;
+    word24          length;
+} HandShakeHeader;
+
+
+/* DTLS handshake header, same for each message type */
+typedef struct DtlsHandShakeHeader {
+    byte            type;
+    word24          length;
+    byte            message_seq[2];    /* start at 0, restransmit gets same # */
+    word24          fragment_offset;   /* bytes in previous fragments */
+    word24          fragment_length;   /* length of this fragment */
+} DtlsHandShakeHeader;
+
+
+enum HandShakeType {
+    no_shake            = -1,
+    hello_request       = 0, 
+    client_hello        = 1, 
+    server_hello        = 2,
+    hello_verify_request = 3,       /* DTLS addition */
+    session_ticket      =  4,
+    certificate         = 11, 
+    server_key_exchange = 12,
+    certificate_request = 13, 
+    server_hello_done   = 14,
+    certificate_verify  = 15, 
+    client_key_exchange = 16,
+    finished            = 20
+};
+
+
+static const byte client[SIZEOF_SENDER] = { 0x43, 0x4C, 0x4E, 0x54 };
+static const byte server[SIZEOF_SENDER] = { 0x53, 0x52, 0x56, 0x52 };
+
+static const byte tls_client[FINISHED_LABEL_SZ + 1] = "client finished";
+static const byte tls_server[FINISHED_LABEL_SZ + 1] = "server finished";
+
+
+/* internal functions */
+CYASSL_LOCAL int SendChangeCipher(CYASSL*);
+CYASSL_LOCAL int SendData(CYASSL*, const void*, int);
+CYASSL_LOCAL int SendCertificate(CYASSL*);
+CYASSL_LOCAL int SendCertificateRequest(CYASSL*);
+CYASSL_LOCAL int SendServerKeyExchange(CYASSL*);
+CYASSL_LOCAL int SendBuffered(CYASSL*);
+CYASSL_LOCAL int ReceiveData(CYASSL*, byte*, int, int);
+CYASSL_LOCAL int SendFinished(CYASSL*);
+CYASSL_LOCAL int SendAlert(CYASSL*, int, int);
+CYASSL_LOCAL int ProcessReply(CYASSL*);
+
+CYASSL_LOCAL int SetCipherSpecs(CYASSL*);
+CYASSL_LOCAL int MakeMasterSecret(CYASSL*);
+
+CYASSL_LOCAL int  AddSession(CYASSL*);
+CYASSL_LOCAL int  DeriveKeys(CYASSL* ssl);
+CYASSL_LOCAL int  StoreKeys(CYASSL* ssl, const byte* keyData);
+
+CYASSL_LOCAL int IsTLS(const CYASSL* ssl);
+CYASSL_LOCAL int IsAtLeastTLSv1_2(const CYASSL* ssl);
+
+CYASSL_LOCAL void FreeHandshakeResources(CYASSL* ssl);
+CYASSL_LOCAL void ShrinkInputBuffer(CYASSL* ssl, int forcedFree);
+CYASSL_LOCAL void ShrinkOutputBuffer(CYASSL* ssl);
+#ifndef NO_CERTS
+    CYASSL_LOCAL Signer* GetCA(void* cm, byte* hash);
+    #ifndef NO_SKID
+        CYASSL_LOCAL Signer* GetCAByName(void* cm, byte* hash);
+    #endif
+#endif
+CYASSL_LOCAL void BuildTlsFinished(CYASSL* ssl, Hashes* hashes,
+                                   const byte* sender);
+CYASSL_LOCAL void FreeArrays(CYASSL* ssl, int keep);
+CYASSL_LOCAL  int CheckAvailableSize(CYASSL *ssl, int size);
+CYASSL_LOCAL  int GrowInputBuffer(CYASSL* ssl, int size, int usedLength);
+
+#ifndef NO_TLS
+    CYASSL_LOCAL int  MakeTlsMasterSecret(CYASSL*);
+    CYASSL_LOCAL void TLS_hmac(CYASSL* ssl, byte* digest, const byte* in,
+                               word32 sz, int content, int verify);
+#endif
+
+#ifndef NO_CYASSL_CLIENT
+    CYASSL_LOCAL int SendClientHello(CYASSL*);
+    CYASSL_LOCAL int SendClientKeyExchange(CYASSL*);
+    CYASSL_LOCAL int SendCertificateVerify(CYASSL*);
+#endif /* NO_CYASSL_CLIENT */
+
+#ifndef NO_CYASSL_SERVER
+    CYASSL_LOCAL int SendServerHello(CYASSL*);
+    CYASSL_LOCAL int SendServerHelloDone(CYASSL*);
+    #ifdef CYASSL_DTLS
+        CYASSL_LOCAL int SendHelloVerifyRequest(CYASSL*);
+    #endif
+#endif /* NO_CYASSL_SERVER */
+
+#ifdef CYASSL_DTLS
+    CYASSL_LOCAL int  DtlsPoolInit(CYASSL*);
+    CYASSL_LOCAL int  DtlsPoolSave(CYASSL*, const byte*, int);
+    CYASSL_LOCAL int  DtlsPoolTimeout(CYASSL*);
+    CYASSL_LOCAL int  DtlsPoolSend(CYASSL*);
+    CYASSL_LOCAL void DtlsPoolReset(CYASSL*);
+
+    CYASSL_LOCAL DtlsMsg* DtlsMsgNew(word32, void*);
+    CYASSL_LOCAL void DtlsMsgDelete(DtlsMsg*, void*);
+    CYASSL_LOCAL void DtlsMsgListDelete(DtlsMsg*, void*);
+    CYASSL_LOCAL void DtlsMsgSet(DtlsMsg*, word32, const byte*, byte,
+                                                             word32, word32);
+    CYASSL_LOCAL DtlsMsg* DtlsMsgFind(DtlsMsg*, word32);
+    CYASSL_LOCAL DtlsMsg* DtlsMsgStore(DtlsMsg*, word32, const byte*, word32,
+                                                byte, word32, word32, void*);
+    CYASSL_LOCAL DtlsMsg* DtlsMsgInsert(DtlsMsg*, DtlsMsg*);
+#endif /* CYASSL_DTLS */
+
+#ifndef NO_TLS
+    
+
+#endif /* NO_TLS */
+
+
+CYASSL_LOCAL word32  LowResTimer(void);
+
+CYASSL_LOCAL void InitX509Name(CYASSL_X509_NAME*, int);
+CYASSL_LOCAL void FreeX509Name(CYASSL_X509_NAME* name);
+CYASSL_LOCAL void InitX509(CYASSL_X509*, int);
+CYASSL_LOCAL void FreeX509(CYASSL_X509*);
+#ifndef NO_CERTS
+    CYASSL_LOCAL int  CopyDecodedToX509(CYASSL_X509*, DecodedCert*);
+#endif
+
+
+#ifdef __cplusplus
+    }  /* extern "C" */
+#endif
+
+#endif /* CyaSSL_INT_H */
+
diff --git a/cyassl/test.h b/cyassl/test.h
index 644cb96a9..e176e3b28 100644
--- a/cyassl/test.h
+++ b/cyassl/test.h
@@ -81,7 +81,7 @@
 
 /* HPUX doesn't use socklent_t for third parameter to accept, unless
    _XOPEN_SOURCE_EXTENDED is defined */
-#if !defined(__hpux__) && !defined(CYASSL_MDK_ARM) && !defined(CYASSL_IAR_ARM)
+#if !defined(__hpux__) && !defined(CYASSL_MDK_ARM)
     typedef socklen_t* ACCEPT_THIRD_T;
 #else
     #if defined _XOPEN_SOURCE_EXTENDED
diff --git a/cyassl/version.h b/cyassl/version.h
index 30bf70457..dbd2a819c 100644
--- a/cyassl/version.h
+++ b/cyassl/version.h
@@ -26,8 +26,8 @@
 extern "C" {
 #endif
 
-#define LIBCYASSL_VERSION_STRING "2.9.0"
-#define LIBCYASSL_VERSION_HEX 0x02009000
+#define LIBCYASSL_VERSION_STRING "2.9.1"
+#define LIBCYASSL_VERSION_HEX 0x02009001
 
 #ifdef __cplusplus
 }
diff --git a/examples/server/server.c b/examples/server/server.c
index 57bf4715a..435db8a23 100644
--- a/examples/server/server.c
+++ b/examples/server/server.c
@@ -374,7 +374,7 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args)
     if (fewerPackets)
         CyaSSL_CTX_set_group_messages(ctx);
 
-#ifdef OPENSSL_EXTRA
+#if defined(OPENSSL_EXTRA) || defined(HAVE_WEBSERVER)
     SSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack);
 #endif
 
diff --git a/m4/ax_tls.m4 b/m4/ax_tls.m4
index 033e3b135..3f6b5e10b 100644
--- a/m4/ax_tls.m4
+++ b/m4/ax_tls.m4
@@ -44,7 +44,23 @@
 #   modified version of the Autoconf Macro, you may extend this special
 #   exception to the GPL to apply to your modified version as well.
 
-#serial 10
+#serial 11
+
+#   Define m4_ifblank and m4_ifnblank macros from introduced in
+#   autotools 2.64 m4sugar.m4 if using an earlier autotools.
+
+ifdef([m4_ifblank], [], [
+    m4_define([m4_ifblank],
+    [m4_if(m4_translit([[$1]], [ ][	][
+]), [], [$2], [$3])])
+    ])
+
+
+ifdef([m4_ifnblank], [], [
+    m4_define([m4_ifnblank],
+    [m4_if(m4_translit([[$1]], [ ][	][
+]), [], [$3], [$2])])
+    ])
 
 AC_DEFUN([AX_TLS], [
   AC_MSG_CHECKING(for thread local storage (TLS) class)
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-default.mk b/mcapi/ctaocrypt_test.X/nbproject/Makefile-default.mk
deleted file mode 100644
index 736bc3eec..000000000
--- a/mcapi/ctaocrypt_test.X/nbproject/Makefile-default.mk
+++ /dev/null
@@ -1,164 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a -pre and a -post target defined where you can add customized code.
-#
-# This makefile implements configuration specific macros and targets.
-
-
-# Include project Makefile
-ifeq "${IGNORE_LOCAL}" "TRUE"
-# do not include local makefile. User is passing all local related variables already
-else
-include Makefile
-# Include makefile containing local settings
-ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
-include nbproject/Makefile-local-default.mk
-endif
-endif
-
-# Environment
-MKDIR=gnumkdir -p
-RM=rm -f 
-MV=mv 
-CP=cp 
-
-# Macros
-CND_CONF=default
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-IMAGE_TYPE=debug
-OUTPUT_SUFFIX=elf
-DEBUGGABLE_SUFFIX=elf
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-else
-IMAGE_TYPE=production
-OUTPUT_SUFFIX=hex
-DEBUGGABLE_SUFFIX=elf
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-endif
-
-# Object Directory
-OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
-
-# Distribution Directory
-DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
-
-# Source Files Quoted if spaced
-SOURCEFILES_QUOTED_IF_SPACED=../../ctaocrypt/test/test.c ../../mplabx/test_main.c
-
-# Object Files Quoted if spaced
-OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/1679622190/test.o ${OBJECTDIR}/_ext/1042050482/test_main.o
-POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/1679622190/test.o.d ${OBJECTDIR}/_ext/1042050482/test_main.o.d
-
-# Object Files
-OBJECTFILES=${OBJECTDIR}/_ext/1679622190/test.o ${OBJECTDIR}/_ext/1042050482/test_main.o
-
-# Source Files
-SOURCEFILES=../../ctaocrypt/test/test.c ../../mplabx/test_main.c
-
-
-CFLAGS=
-ASFLAGS=
-LDLIBSOPTIONS=
-
-############# Tool locations ##########################################
-# If you copy a project from one host to another, the path where the  #
-# compiler is installed may be different.                             #
-# If you open this project with MPLAB X in the new host, this         #
-# makefile will be regenerated and the paths will be corrected.       #
-#######################################################################
-# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
-FIXDEPS=fixDeps
-
-.build-conf:  ${BUILD_SUBPROJECTS}
-	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-
-MP_PROCESSOR_OPTION=32MX795F512L
-MP_LINKER_FILE_OPTION=
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assemble
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assembleWithPreprocess
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compile
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-${OBJECTDIR}/_ext/1679622190/test.o: ../../ctaocrypt/test/test.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1679622190 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1679622190/test.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1679622190/test.o.d" -o ${OBJECTDIR}/_ext/1679622190/test.o ../../ctaocrypt/test/test.c   
-	
-${OBJECTDIR}/_ext/1042050482/test_main.o: ../../mplabx/test_main.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1042050482 
-	@${RM} ${OBJECTDIR}/_ext/1042050482/test_main.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1042050482/test_main.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1042050482/test_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1042050482/test_main.o.d" -o ${OBJECTDIR}/_ext/1042050482/test_main.o ../../mplabx/test_main.c   
-	
-else
-${OBJECTDIR}/_ext/1679622190/test.o: ../../ctaocrypt/test/test.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1679622190 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1679622190/test.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1679622190/test.o.d" -o ${OBJECTDIR}/_ext/1679622190/test.o ../../ctaocrypt/test/test.c   
-	
-${OBJECTDIR}/_ext/1042050482/test_main.o: ../../mplabx/test_main.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1042050482 
-	@${RM} ${OBJECTDIR}/_ext/1042050482/test_main.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1042050482/test_main.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1042050482/test_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1042050482/test_main.o.d" -o ${OBJECTDIR}/_ext/1042050482/test_main.o ../../mplabx/test_main.c   
-	
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compileCPP
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: link
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/debug/cyassl.X.a ../zlib.X/dist/default/debug/zlib.X.a  
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_CC} $(MP_EXTRA_LD_PRE)  -mdebugger -D__MPLAB_DEBUGGER_PK3=1 -mprocessor=$(MP_PROCESSOR_OPTION) -Os -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\debug\cyassl.X.a ..\zlib.X\dist\default\debug\zlib.X.a       -mreserve=data@0x0:0x1FC -mreserve=boot@0x1FC02000:0x1FC02FEF -mreserve=boot@0x1FC02000:0x1FC024FF  -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=__MPLAB_DEBUG=1,--defsym=__DEBUG=1,--defsym=__MPLAB_DEBUGGER_PK3=1,--defsym=_min_heap_size=32768,--defsym=_min_stack_size=1024,--gc-sections
-	
-else
-dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/production/cyassl.X.a ../zlib.X/dist/default/production/zlib.X.a 
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_CC} $(MP_EXTRA_LD_PRE)  -mprocessor=$(MP_PROCESSOR_OPTION) -Os -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\production\cyassl.X.a ..\zlib.X\dist\default\production\zlib.X.a      -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=_min_heap_size=32768,--defsym=_min_stack_size=1024,--gc-sections
-	${MP_CC_DIR}\\xc32-bin2hex dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} 
-endif
-
-
-# Subprojects
-.build-subprojects:
-	cd /D ../cyassl.X && ${MAKE}  -f Makefile CONF=default
-	cd /D ../zlib.X && ${MAKE}  -f Makefile CONF=default
-
-
-# Subprojects
-.clean-subprojects:
-	cd /D ../cyassl.X && rm -rf "build/default" "dist/default"
-	cd /D ../zlib.X && rm -rf "build/default" "dist/default"
-
-# Clean Targets
-.clean-conf: ${CLEAN_SUBPROJECTS}
-	${RM} -r build/default
-	${RM} -r dist/default
-
-# Enable dependency checking
-.dep.inc: .depcheck-impl
-
-DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
-ifneq (${DEPFILES},)
-include ${DEPFILES}
-endif
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-genesis.properties b/mcapi/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
deleted file mode 100644
index c3e8ca8d5..000000000
--- a/mcapi/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-#Mon Feb 24 10:53:41 JST 2014
-default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
-default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30-TC9\\bin
-com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
-default.languagetoolchain.version=1.30
-host.platform=windows
-conf.ids=default
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-impl.mk b/mcapi/ctaocrypt_test.X/nbproject/Makefile-impl.mk
deleted file mode 100644
index 32630f76c..000000000
--- a/mcapi/ctaocrypt_test.X/nbproject/Makefile-impl.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a pre- and a post- target defined where you can add customization code.
-#
-# This makefile implements macros and targets common to all configurations.
-#
-# NOCDDL
-
-
-# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
-# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
-# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
-# and .clean-reqprojects-conf unless SUB has the value 'no'
-SUB_no=NO
-SUBPROJECTS=${SUB_${SUB}}
-BUILD_SUBPROJECTS_=.build-subprojects
-BUILD_SUBPROJECTS_NO=
-BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
-CLEAN_SUBPROJECTS_=.clean-subprojects
-CLEAN_SUBPROJECTS_NO=
-CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
-
-
-# Project Name
-PROJECTNAME=ctaocrypt_test.X
-
-# Active Configuration
-DEFAULTCONF=default
-CONF=${DEFAULTCONF}
-
-# All Configurations
-ALLCONFS=default 
-
-
-# build
-.build-impl: .build-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
-
-
-# clean
-.clean-impl: .clean-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
-
-# clobber
-.clobber-impl: .clobber-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
-
-
-
-# all
-.all-impl: .all-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
-
-
-
-# dependency checking support
-.depcheck-impl:
-#	@echo "# This code depends on make tool being used" >.dep.inc
-#	@if [ -n "${MAKE_VERSION}" ]; then \
-#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
-#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
-#	    echo "include \$${DEPFILES}" >>.dep.inc; \
-#	    echo "endif" >>.dep.inc; \
-#	else \
-#	    echo ".KEEP_STATE:" >>.dep.inc; \
-#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
-#	fi
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-local-default.mk b/mcapi/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
deleted file mode 100644
index 2d8424143..000000000
--- a/mcapi/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-#
-# This file contains information about the location of compilers and other tools.
-# If you commmit this file into your revision control server, you will be able to 
-# to checkout the project and build it from the command line with make. However,
-# if more than one person works on the same project, then this file might show
-# conflicts since different users are bound to have compilers in different places.
-# In that case you might choose to not commit this file and let MPLAB X recreate this file
-# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
-# least once so the file gets created and the project can be built. Finally, you can also
-# avoid using this file at all if you are only building from the command line with make.
-# You can invoke make with the values of the macros:
-# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
-#
-SHELL=cmd.exe
-PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
-# Adding MPLAB X bin directory to path.
-PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
-# Path to java used to run MPLAB X when this makefile was created
-MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
-OS_CURRENT="$(shell uname -s)"
-MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-gcc.exe"
-MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-g++.exe"
-# MP_BC is not defined
-MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-as.exe"
-MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-ld.exe"
-MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-ar.exe"
-DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
-MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-# MP_BC_DIR is not defined
-MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-# MP_BC_DIR is not defined
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Makefile-variables.mk b/mcapi/ctaocrypt_test.X/nbproject/Makefile-variables.mk
deleted file mode 100644
index 09fbeab2d..000000000
--- a/mcapi/ctaocrypt_test.X/nbproject/Makefile-variables.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Generated - do not edit!
-#
-# NOCDDL
-#
-CND_BASEDIR=`pwd`
-# default configuration
-CND_ARTIFACT_DIR_default=dist/default/production
-CND_ARTIFACT_NAME_default=ctaocrypt_test.X.production.hex
-CND_ARTIFACT_PATH_default=dist/default/production/ctaocrypt_test.X.production.hex
-CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
-CND_PACKAGE_NAME_default=ctaocrypttest.x.tar
-CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/ctaocrypttest.x.tar
diff --git a/mcapi/ctaocrypt_test.X/nbproject/Package-default.bash b/mcapi/ctaocrypt_test.X/nbproject/Package-default.bash
deleted file mode 100644
index 24387c9d2..000000000
--- a/mcapi/ctaocrypt_test.X/nbproject/Package-default.bash
+++ /dev/null
@@ -1,73 +0,0 @@
-#!/bin/bash -x
-
-#
-# Generated - do not edit!
-#
-
-# Macros
-TOP=`pwd`
-CND_CONF=default
-CND_DISTDIR=dist
-TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
-TMPDIRNAME=tmp-packaging
-OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-OUTPUT_BASENAME=ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-PACKAGE_TOP_DIR=ctaocrypttest.x/
-
-# Functions
-function checkReturnCode
-{
-    rc=$?
-    if [ $rc != 0 ]
-    then
-        exit $rc
-    fi
-}
-function makeDirectory
-# $1 directory path
-# $2 permission (optional)
-{
-    mkdir -p "$1"
-    checkReturnCode
-    if [ "$2" != "" ]
-    then
-      chmod $2 "$1"
-      checkReturnCode
-    fi
-}
-function copyFileToTmpDir
-# $1 from-file path
-# $2 to-file path
-# $3 permission
-{
-    cp "$1" "$2"
-    checkReturnCode
-    if [ "$3" != "" ]
-    then
-        chmod $3 "$2"
-        checkReturnCode
-    fi
-}
-
-# Setup
-cd "${TOP}"
-mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
-rm -rf ${TMPDIR}
-mkdir -p ${TMPDIR}
-
-# Copy files and create directories and links
-cd "${TOP}"
-makeDirectory ${TMPDIR}/ctaocrypttest.x/bin
-copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}bin/${OUTPUT_BASENAME}" 0755
-
-
-# Generate tar file
-cd "${TOP}"
-rm -f ${CND_DISTDIR}/${CND_CONF}/package/ctaocrypttest.x.tar
-cd ${TMPDIR}
-tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/ctaocrypttest.x.tar *
-checkReturnCode
-
-# Cleanup
-cd "${TOP}"
-rm -rf ${TMPDIR}
diff --git a/mcapi/ctaocrypt_test.X/nbproject/private/private.xml b/mcapi/ctaocrypt_test.X/nbproject/private/private.xml
deleted file mode 100644
index 776e0527b..000000000
--- a/mcapi/ctaocrypt_test.X/nbproject/private/private.xml
+++ /dev/null
@@ -1,6 +0,0 @@
-
-    
-        file:/C:/ROOT/CyaSSL-Release/PIC32MZ-HWCrypt/ctaocrypt/test/test.c
-        file:/C:/ROOT/CyaSSL-Release/PIC32MZ-HWCrypt/mplabx/test_main.c
-    
-
diff --git a/mcapi/cyassl.X/nbproject/Makefile-default.mk b/mcapi/cyassl.X/nbproject/Makefile-default.mk
deleted file mode 100644
index d9d2aed90..000000000
--- a/mcapi/cyassl.X/nbproject/Makefile-default.mk
+++ /dev/null
@@ -1,626 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a -pre and a -post target defined where you can add customized code.
-#
-# This makefile implements configuration specific macros and targets.
-
-
-# Include project Makefile
-ifeq "${IGNORE_LOCAL}" "TRUE"
-# do not include local makefile. User is passing all local related variables already
-else
-include Makefile
-# Include makefile containing local settings
-ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
-include nbproject/Makefile-local-default.mk
-endif
-endif
-
-# Environment
-MKDIR=gnumkdir -p
-RM=rm -f 
-MV=mv 
-CP=cp 
-
-# Macros
-CND_CONF=default
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-IMAGE_TYPE=debug
-OUTPUT_SUFFIX=a
-DEBUGGABLE_SUFFIX=
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-else
-IMAGE_TYPE=production
-OUTPUT_SUFFIX=a
-DEBUGGABLE_SUFFIX=
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-endif
-
-# Object Directory
-OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
-
-# Distribution Directory
-DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
-
-# Source Files Quoted if spaced
-SOURCEFILES_QUOTED_IF_SPACED=../../src/crl.c ../../src/internal.c ../../src/io.c ../../src/keys.c ../../src/ocsp.c ../../src/sniffer.c ../../src/ssl.c ../../src/tls.c ../../ctaocrypt/src/aes.c ../../ctaocrypt/src/arc4.c ../../ctaocrypt/src/asm.c ../../ctaocrypt/src/asn.c ../../ctaocrypt/src/coding.c ../../ctaocrypt/src/des3.c ../../ctaocrypt/src/dh.c ../../ctaocrypt/src/dsa.c ../../ctaocrypt/src/ecc.c ../../ctaocrypt/src/ecc_fp.c ../../ctaocrypt/src/error.c ../../ctaocrypt/src/hc128.c ../../ctaocrypt/src/hmac.c ../../ctaocrypt/src/integer.c ../../ctaocrypt/src/logging.c ../../ctaocrypt/src/md2.c ../../ctaocrypt/src/md4.c ../../ctaocrypt/src/md5.c ../../ctaocrypt/src/memory.c ../../ctaocrypt/src/misc.c ../../ctaocrypt/src/pwdbased.c ../../ctaocrypt/src/rabbit.c ../../ctaocrypt/src/random.c ../../ctaocrypt/src/ripemd.c ../../ctaocrypt/src/rsa.c ../../ctaocrypt/src/sha.c ../../ctaocrypt/src/sha256.c ../../ctaocrypt/src/sha512.c ../../ctaocrypt/src/tfm.c ../../mcapi/crypto.c ../../ctaocrypt/src/compress.c ../../ctaocrypt/src/camellia.c ../../ctaocrypt/src/port.c
-
-# Object Files Quoted if spaced
-OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/1445274692/crl.o ${OBJECTDIR}/_ext/1445274692/internal.o ${OBJECTDIR}/_ext/1445274692/io.o ${OBJECTDIR}/_ext/1445274692/keys.o ${OBJECTDIR}/_ext/1445274692/ocsp.o ${OBJECTDIR}/_ext/1445274692/sniffer.o ${OBJECTDIR}/_ext/1445274692/ssl.o ${OBJECTDIR}/_ext/1445274692/tls.o ${OBJECTDIR}/_ext/1439655260/aes.o ${OBJECTDIR}/_ext/1439655260/arc4.o ${OBJECTDIR}/_ext/1439655260/asm.o ${OBJECTDIR}/_ext/1439655260/asn.o ${OBJECTDIR}/_ext/1439655260/coding.o ${OBJECTDIR}/_ext/1439655260/des3.o ${OBJECTDIR}/_ext/1439655260/dh.o ${OBJECTDIR}/_ext/1439655260/dsa.o ${OBJECTDIR}/_ext/1439655260/ecc.o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ${OBJECTDIR}/_ext/1439655260/error.o ${OBJECTDIR}/_ext/1439655260/hc128.o ${OBJECTDIR}/_ext/1439655260/hmac.o ${OBJECTDIR}/_ext/1439655260/integer.o ${OBJECTDIR}/_ext/1439655260/logging.o ${OBJECTDIR}/_ext/1439655260/md2.o ${OBJECTDIR}/_ext/1439655260/md4.o ${OBJECTDIR}/_ext/1439655260/md5.o ${OBJECTDIR}/_ext/1439655260/memory.o ${OBJECTDIR}/_ext/1439655260/misc.o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ${OBJECTDIR}/_ext/1439655260/rabbit.o ${OBJECTDIR}/_ext/1439655260/random.o ${OBJECTDIR}/_ext/1439655260/ripemd.o ${OBJECTDIR}/_ext/1439655260/rsa.o ${OBJECTDIR}/_ext/1439655260/sha.o ${OBJECTDIR}/_ext/1439655260/sha256.o ${OBJECTDIR}/_ext/1439655260/sha512.o ${OBJECTDIR}/_ext/1439655260/tfm.o ${OBJECTDIR}/_ext/1628556068/crypto.o ${OBJECTDIR}/_ext/1439655260/compress.o ${OBJECTDIR}/_ext/1439655260/camellia.o ${OBJECTDIR}/_ext/1439655260/port.o
-POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/1445274692/crl.o.d ${OBJECTDIR}/_ext/1445274692/internal.o.d ${OBJECTDIR}/_ext/1445274692/io.o.d ${OBJECTDIR}/_ext/1445274692/keys.o.d ${OBJECTDIR}/_ext/1445274692/ocsp.o.d ${OBJECTDIR}/_ext/1445274692/sniffer.o.d ${OBJECTDIR}/_ext/1445274692/ssl.o.d ${OBJECTDIR}/_ext/1445274692/tls.o.d ${OBJECTDIR}/_ext/1439655260/aes.o.d ${OBJECTDIR}/_ext/1439655260/arc4.o.d ${OBJECTDIR}/_ext/1439655260/asm.o.d ${OBJECTDIR}/_ext/1439655260/asn.o.d ${OBJECTDIR}/_ext/1439655260/coding.o.d ${OBJECTDIR}/_ext/1439655260/des3.o.d ${OBJECTDIR}/_ext/1439655260/dh.o.d ${OBJECTDIR}/_ext/1439655260/dsa.o.d ${OBJECTDIR}/_ext/1439655260/ecc.o.d ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d ${OBJECTDIR}/_ext/1439655260/error.o.d ${OBJECTDIR}/_ext/1439655260/hc128.o.d ${OBJECTDIR}/_ext/1439655260/hmac.o.d ${OBJECTDIR}/_ext/1439655260/integer.o.d ${OBJECTDIR}/_ext/1439655260/logging.o.d ${OBJECTDIR}/_ext/1439655260/md2.o.d ${OBJECTDIR}/_ext/1439655260/md4.o.d ${OBJECTDIR}/_ext/1439655260/md5.o.d ${OBJECTDIR}/_ext/1439655260/memory.o.d ${OBJECTDIR}/_ext/1439655260/misc.o.d ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d ${OBJECTDIR}/_ext/1439655260/rabbit.o.d ${OBJECTDIR}/_ext/1439655260/random.o.d ${OBJECTDIR}/_ext/1439655260/ripemd.o.d ${OBJECTDIR}/_ext/1439655260/rsa.o.d ${OBJECTDIR}/_ext/1439655260/sha.o.d ${OBJECTDIR}/_ext/1439655260/sha256.o.d ${OBJECTDIR}/_ext/1439655260/sha512.o.d ${OBJECTDIR}/_ext/1439655260/tfm.o.d ${OBJECTDIR}/_ext/1628556068/crypto.o.d ${OBJECTDIR}/_ext/1439655260/compress.o.d ${OBJECTDIR}/_ext/1439655260/camellia.o.d ${OBJECTDIR}/_ext/1439655260/port.o.d
-
-# Object Files
-OBJECTFILES=${OBJECTDIR}/_ext/1445274692/crl.o ${OBJECTDIR}/_ext/1445274692/internal.o ${OBJECTDIR}/_ext/1445274692/io.o ${OBJECTDIR}/_ext/1445274692/keys.o ${OBJECTDIR}/_ext/1445274692/ocsp.o ${OBJECTDIR}/_ext/1445274692/sniffer.o ${OBJECTDIR}/_ext/1445274692/ssl.o ${OBJECTDIR}/_ext/1445274692/tls.o ${OBJECTDIR}/_ext/1439655260/aes.o ${OBJECTDIR}/_ext/1439655260/arc4.o ${OBJECTDIR}/_ext/1439655260/asm.o ${OBJECTDIR}/_ext/1439655260/asn.o ${OBJECTDIR}/_ext/1439655260/coding.o ${OBJECTDIR}/_ext/1439655260/des3.o ${OBJECTDIR}/_ext/1439655260/dh.o ${OBJECTDIR}/_ext/1439655260/dsa.o ${OBJECTDIR}/_ext/1439655260/ecc.o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ${OBJECTDIR}/_ext/1439655260/error.o ${OBJECTDIR}/_ext/1439655260/hc128.o ${OBJECTDIR}/_ext/1439655260/hmac.o ${OBJECTDIR}/_ext/1439655260/integer.o ${OBJECTDIR}/_ext/1439655260/logging.o ${OBJECTDIR}/_ext/1439655260/md2.o ${OBJECTDIR}/_ext/1439655260/md4.o ${OBJECTDIR}/_ext/1439655260/md5.o ${OBJECTDIR}/_ext/1439655260/memory.o ${OBJECTDIR}/_ext/1439655260/misc.o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ${OBJECTDIR}/_ext/1439655260/rabbit.o ${OBJECTDIR}/_ext/1439655260/random.o ${OBJECTDIR}/_ext/1439655260/ripemd.o ${OBJECTDIR}/_ext/1439655260/rsa.o ${OBJECTDIR}/_ext/1439655260/sha.o ${OBJECTDIR}/_ext/1439655260/sha256.o ${OBJECTDIR}/_ext/1439655260/sha512.o ${OBJECTDIR}/_ext/1439655260/tfm.o ${OBJECTDIR}/_ext/1628556068/crypto.o ${OBJECTDIR}/_ext/1439655260/compress.o ${OBJECTDIR}/_ext/1439655260/camellia.o ${OBJECTDIR}/_ext/1439655260/port.o
-
-# Source Files
-SOURCEFILES=../../src/crl.c ../../src/internal.c ../../src/io.c ../../src/keys.c ../../src/ocsp.c ../../src/sniffer.c ../../src/ssl.c ../../src/tls.c ../../ctaocrypt/src/aes.c ../../ctaocrypt/src/arc4.c ../../ctaocrypt/src/asm.c ../../ctaocrypt/src/asn.c ../../ctaocrypt/src/coding.c ../../ctaocrypt/src/des3.c ../../ctaocrypt/src/dh.c ../../ctaocrypt/src/dsa.c ../../ctaocrypt/src/ecc.c ../../ctaocrypt/src/ecc_fp.c ../../ctaocrypt/src/error.c ../../ctaocrypt/src/hc128.c ../../ctaocrypt/src/hmac.c ../../ctaocrypt/src/integer.c ../../ctaocrypt/src/logging.c ../../ctaocrypt/src/md2.c ../../ctaocrypt/src/md4.c ../../ctaocrypt/src/md5.c ../../ctaocrypt/src/memory.c ../../ctaocrypt/src/misc.c ../../ctaocrypt/src/pwdbased.c ../../ctaocrypt/src/rabbit.c ../../ctaocrypt/src/random.c ../../ctaocrypt/src/ripemd.c ../../ctaocrypt/src/rsa.c ../../ctaocrypt/src/sha.c ../../ctaocrypt/src/sha256.c ../../ctaocrypt/src/sha512.c ../../ctaocrypt/src/tfm.c ../../mcapi/crypto.c ../../ctaocrypt/src/compress.c ../../ctaocrypt/src/camellia.c ../../ctaocrypt/src/port.c
-
-
-CFLAGS=
-ASFLAGS=
-LDLIBSOPTIONS=
-
-############# Tool locations ##########################################
-# If you copy a project from one host to another, the path where the  #
-# compiler is installed may be different.                             #
-# If you open this project with MPLAB X in the new host, this         #
-# makefile will be regenerated and the paths will be corrected.       #
-#######################################################################
-# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
-FIXDEPS=fixDeps
-
-.build-conf:  ${BUILD_SUBPROJECTS}
-	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-
-MP_PROCESSOR_OPTION=32MX795F512L
-MP_LINKER_FILE_OPTION=
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assemble
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assembleWithPreprocess
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compile
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-${OBJECTDIR}/_ext/1445274692/crl.o: ../../src/crl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/crl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/crl.o.d" -o ${OBJECTDIR}/_ext/1445274692/crl.o ../../src/crl.c   
-	
-${OBJECTDIR}/_ext/1445274692/internal.o: ../../src/internal.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/internal.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/internal.o.d" -o ${OBJECTDIR}/_ext/1445274692/internal.o ../../src/internal.c   
-	
-${OBJECTDIR}/_ext/1445274692/io.o: ../../src/io.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/io.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/io.o.d" -o ${OBJECTDIR}/_ext/1445274692/io.o ../../src/io.c   
-	
-${OBJECTDIR}/_ext/1445274692/keys.o: ../../src/keys.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/keys.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/keys.o.d" -o ${OBJECTDIR}/_ext/1445274692/keys.o ../../src/keys.c   
-	
-${OBJECTDIR}/_ext/1445274692/ocsp.o: ../../src/ocsp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" -o ${OBJECTDIR}/_ext/1445274692/ocsp.o ../../src/ocsp.c   
-	
-${OBJECTDIR}/_ext/1445274692/sniffer.o: ../../src/sniffer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" -o ${OBJECTDIR}/_ext/1445274692/sniffer.o ../../src/sniffer.c   
-	
-${OBJECTDIR}/_ext/1445274692/ssl.o: ../../src/ssl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ssl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ssl.o.d" -o ${OBJECTDIR}/_ext/1445274692/ssl.o ../../src/ssl.c   
-	
-${OBJECTDIR}/_ext/1445274692/tls.o: ../../src/tls.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/tls.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/tls.o.d" -o ${OBJECTDIR}/_ext/1445274692/tls.o ../../src/tls.c   
-	
-${OBJECTDIR}/_ext/1439655260/aes.o: ../../ctaocrypt/src/aes.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/aes.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/aes.o.d" -o ${OBJECTDIR}/_ext/1439655260/aes.o ../../ctaocrypt/src/aes.c   
-	
-${OBJECTDIR}/_ext/1439655260/arc4.o: ../../ctaocrypt/src/arc4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/arc4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/arc4.o.d" -o ${OBJECTDIR}/_ext/1439655260/arc4.o ../../ctaocrypt/src/arc4.c   
-	
-${OBJECTDIR}/_ext/1439655260/asm.o: ../../ctaocrypt/src/asm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asm.o.d" -o ${OBJECTDIR}/_ext/1439655260/asm.o ../../ctaocrypt/src/asm.c   
-	
-${OBJECTDIR}/_ext/1439655260/asn.o: ../../ctaocrypt/src/asn.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asn.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asn.o.d" -o ${OBJECTDIR}/_ext/1439655260/asn.o ../../ctaocrypt/src/asn.c   
-	
-${OBJECTDIR}/_ext/1439655260/coding.o: ../../ctaocrypt/src/coding.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/coding.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/coding.o.d" -o ${OBJECTDIR}/_ext/1439655260/coding.o ../../ctaocrypt/src/coding.c   
-	
-${OBJECTDIR}/_ext/1439655260/des3.o: ../../ctaocrypt/src/des3.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/des3.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/des3.o.d" -o ${OBJECTDIR}/_ext/1439655260/des3.o ../../ctaocrypt/src/des3.c   
-	
-${OBJECTDIR}/_ext/1439655260/dh.o: ../../ctaocrypt/src/dh.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dh.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dh.o.d" -o ${OBJECTDIR}/_ext/1439655260/dh.o ../../ctaocrypt/src/dh.c   
-	
-${OBJECTDIR}/_ext/1439655260/dsa.o: ../../ctaocrypt/src/dsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/dsa.o ../../ctaocrypt/src/dsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc.o: ../../ctaocrypt/src/ecc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc.o ../../ctaocrypt/src/ecc.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc_fp.o: ../../ctaocrypt/src/ecc_fp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ../../ctaocrypt/src/ecc_fp.c   
-	
-${OBJECTDIR}/_ext/1439655260/error.o: ../../ctaocrypt/src/error.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/error.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/error.o.d" -o ${OBJECTDIR}/_ext/1439655260/error.o ../../ctaocrypt/src/error.c   
-	
-${OBJECTDIR}/_ext/1439655260/hc128.o: ../../ctaocrypt/src/hc128.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hc128.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hc128.o.d" -o ${OBJECTDIR}/_ext/1439655260/hc128.o ../../ctaocrypt/src/hc128.c   
-	
-${OBJECTDIR}/_ext/1439655260/hmac.o: ../../ctaocrypt/src/hmac.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hmac.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hmac.o.d" -o ${OBJECTDIR}/_ext/1439655260/hmac.o ../../ctaocrypt/src/hmac.c   
-	
-${OBJECTDIR}/_ext/1439655260/integer.o: ../../ctaocrypt/src/integer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/integer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/integer.o.d" -o ${OBJECTDIR}/_ext/1439655260/integer.o ../../ctaocrypt/src/integer.c   
-	
-${OBJECTDIR}/_ext/1439655260/logging.o: ../../ctaocrypt/src/logging.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/logging.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/logging.o.d" -o ${OBJECTDIR}/_ext/1439655260/logging.o ../../ctaocrypt/src/logging.c   
-	
-${OBJECTDIR}/_ext/1439655260/md2.o: ../../ctaocrypt/src/md2.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md2.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md2.o.d" -o ${OBJECTDIR}/_ext/1439655260/md2.o ../../ctaocrypt/src/md2.c   
-	
-${OBJECTDIR}/_ext/1439655260/md4.o: ../../ctaocrypt/src/md4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md4.o.d" -o ${OBJECTDIR}/_ext/1439655260/md4.o ../../ctaocrypt/src/md4.c   
-	
-${OBJECTDIR}/_ext/1439655260/md5.o: ../../ctaocrypt/src/md5.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md5.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md5.o.d" -o ${OBJECTDIR}/_ext/1439655260/md5.o ../../ctaocrypt/src/md5.c   
-	
-${OBJECTDIR}/_ext/1439655260/memory.o: ../../ctaocrypt/src/memory.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/memory.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/memory.o.d" -o ${OBJECTDIR}/_ext/1439655260/memory.o ../../ctaocrypt/src/memory.c   
-	
-${OBJECTDIR}/_ext/1439655260/misc.o: ../../ctaocrypt/src/misc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/misc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/misc.o.d" -o ${OBJECTDIR}/_ext/1439655260/misc.o ../../ctaocrypt/src/misc.c   
-	
-${OBJECTDIR}/_ext/1439655260/pwdbased.o: ../../ctaocrypt/src/pwdbased.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" -o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ../../ctaocrypt/src/pwdbased.c   
-	
-${OBJECTDIR}/_ext/1439655260/rabbit.o: ../../ctaocrypt/src/rabbit.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" -o ${OBJECTDIR}/_ext/1439655260/rabbit.o ../../ctaocrypt/src/rabbit.c   
-	
-${OBJECTDIR}/_ext/1439655260/random.o: ../../ctaocrypt/src/random.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/random.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/random.o.d" -o ${OBJECTDIR}/_ext/1439655260/random.o ../../ctaocrypt/src/random.c   
-	
-${OBJECTDIR}/_ext/1439655260/ripemd.o: ../../ctaocrypt/src/ripemd.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" -o ${OBJECTDIR}/_ext/1439655260/ripemd.o ../../ctaocrypt/src/ripemd.c   
-	
-${OBJECTDIR}/_ext/1439655260/rsa.o: ../../ctaocrypt/src/rsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/rsa.o ../../ctaocrypt/src/rsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha.o: ../../ctaocrypt/src/sha.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha.o ../../ctaocrypt/src/sha.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha256.o: ../../ctaocrypt/src/sha256.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha256.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha256.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha256.o ../../ctaocrypt/src/sha256.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha512.o: ../../ctaocrypt/src/sha512.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha512.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha512.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha512.o ../../ctaocrypt/src/sha512.c   
-	
-${OBJECTDIR}/_ext/1439655260/tfm.o: ../../ctaocrypt/src/tfm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/tfm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/tfm.o.d" -o ${OBJECTDIR}/_ext/1439655260/tfm.o ../../ctaocrypt/src/tfm.c   
-	
-${OBJECTDIR}/_ext/1628556068/crypto.o: ../../mcapi/crypto.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1628556068 
-	@${RM} ${OBJECTDIR}/_ext/1628556068/crypto.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1628556068/crypto.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1628556068/crypto.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1628556068/crypto.o.d" -o ${OBJECTDIR}/_ext/1628556068/crypto.o ../../mcapi/crypto.c   
-	
-${OBJECTDIR}/_ext/1439655260/compress.o: ../../ctaocrypt/src/compress.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/compress.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/compress.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/compress.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/compress.o.d" -o ${OBJECTDIR}/_ext/1439655260/compress.o ../../ctaocrypt/src/compress.c   
-	
-${OBJECTDIR}/_ext/1439655260/camellia.o: ../../ctaocrypt/src/camellia.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/camellia.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/camellia.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/camellia.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/camellia.o.d" -o ${OBJECTDIR}/_ext/1439655260/camellia.o ../../ctaocrypt/src/camellia.c   
-	
-${OBJECTDIR}/_ext/1439655260/port.o: ../../ctaocrypt/src/port.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/port.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/port.o.d" -o ${OBJECTDIR}/_ext/1439655260/port.o ../../ctaocrypt/src/port.c   
-	
-else
-${OBJECTDIR}/_ext/1445274692/crl.o: ../../src/crl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/crl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/crl.o.d" -o ${OBJECTDIR}/_ext/1445274692/crl.o ../../src/crl.c   
-	
-${OBJECTDIR}/_ext/1445274692/internal.o: ../../src/internal.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/internal.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/internal.o.d" -o ${OBJECTDIR}/_ext/1445274692/internal.o ../../src/internal.c   
-	
-${OBJECTDIR}/_ext/1445274692/io.o: ../../src/io.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/io.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/io.o.d" -o ${OBJECTDIR}/_ext/1445274692/io.o ../../src/io.c   
-	
-${OBJECTDIR}/_ext/1445274692/keys.o: ../../src/keys.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/keys.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/keys.o.d" -o ${OBJECTDIR}/_ext/1445274692/keys.o ../../src/keys.c   
-	
-${OBJECTDIR}/_ext/1445274692/ocsp.o: ../../src/ocsp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" -o ${OBJECTDIR}/_ext/1445274692/ocsp.o ../../src/ocsp.c   
-	
-${OBJECTDIR}/_ext/1445274692/sniffer.o: ../../src/sniffer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" -o ${OBJECTDIR}/_ext/1445274692/sniffer.o ../../src/sniffer.c   
-	
-${OBJECTDIR}/_ext/1445274692/ssl.o: ../../src/ssl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ssl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ssl.o.d" -o ${OBJECTDIR}/_ext/1445274692/ssl.o ../../src/ssl.c   
-	
-${OBJECTDIR}/_ext/1445274692/tls.o: ../../src/tls.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/tls.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1445274692/tls.o.d" -o ${OBJECTDIR}/_ext/1445274692/tls.o ../../src/tls.c   
-	
-${OBJECTDIR}/_ext/1439655260/aes.o: ../../ctaocrypt/src/aes.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/aes.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/aes.o.d" -o ${OBJECTDIR}/_ext/1439655260/aes.o ../../ctaocrypt/src/aes.c   
-	
-${OBJECTDIR}/_ext/1439655260/arc4.o: ../../ctaocrypt/src/arc4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/arc4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/arc4.o.d" -o ${OBJECTDIR}/_ext/1439655260/arc4.o ../../ctaocrypt/src/arc4.c   
-	
-${OBJECTDIR}/_ext/1439655260/asm.o: ../../ctaocrypt/src/asm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asm.o.d" -o ${OBJECTDIR}/_ext/1439655260/asm.o ../../ctaocrypt/src/asm.c   
-	
-${OBJECTDIR}/_ext/1439655260/asn.o: ../../ctaocrypt/src/asn.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asn.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asn.o.d" -o ${OBJECTDIR}/_ext/1439655260/asn.o ../../ctaocrypt/src/asn.c   
-	
-${OBJECTDIR}/_ext/1439655260/coding.o: ../../ctaocrypt/src/coding.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/coding.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/coding.o.d" -o ${OBJECTDIR}/_ext/1439655260/coding.o ../../ctaocrypt/src/coding.c   
-	
-${OBJECTDIR}/_ext/1439655260/des3.o: ../../ctaocrypt/src/des3.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/des3.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/des3.o.d" -o ${OBJECTDIR}/_ext/1439655260/des3.o ../../ctaocrypt/src/des3.c   
-	
-${OBJECTDIR}/_ext/1439655260/dh.o: ../../ctaocrypt/src/dh.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dh.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dh.o.d" -o ${OBJECTDIR}/_ext/1439655260/dh.o ../../ctaocrypt/src/dh.c   
-	
-${OBJECTDIR}/_ext/1439655260/dsa.o: ../../ctaocrypt/src/dsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/dsa.o ../../ctaocrypt/src/dsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc.o: ../../ctaocrypt/src/ecc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc.o ../../ctaocrypt/src/ecc.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc_fp.o: ../../ctaocrypt/src/ecc_fp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ../../ctaocrypt/src/ecc_fp.c   
-	
-${OBJECTDIR}/_ext/1439655260/error.o: ../../ctaocrypt/src/error.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/error.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/error.o.d" -o ${OBJECTDIR}/_ext/1439655260/error.o ../../ctaocrypt/src/error.c   
-	
-${OBJECTDIR}/_ext/1439655260/hc128.o: ../../ctaocrypt/src/hc128.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hc128.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hc128.o.d" -o ${OBJECTDIR}/_ext/1439655260/hc128.o ../../ctaocrypt/src/hc128.c   
-	
-${OBJECTDIR}/_ext/1439655260/hmac.o: ../../ctaocrypt/src/hmac.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hmac.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hmac.o.d" -o ${OBJECTDIR}/_ext/1439655260/hmac.o ../../ctaocrypt/src/hmac.c   
-	
-${OBJECTDIR}/_ext/1439655260/integer.o: ../../ctaocrypt/src/integer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/integer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/integer.o.d" -o ${OBJECTDIR}/_ext/1439655260/integer.o ../../ctaocrypt/src/integer.c   
-	
-${OBJECTDIR}/_ext/1439655260/logging.o: ../../ctaocrypt/src/logging.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/logging.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/logging.o.d" -o ${OBJECTDIR}/_ext/1439655260/logging.o ../../ctaocrypt/src/logging.c   
-	
-${OBJECTDIR}/_ext/1439655260/md2.o: ../../ctaocrypt/src/md2.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md2.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md2.o.d" -o ${OBJECTDIR}/_ext/1439655260/md2.o ../../ctaocrypt/src/md2.c   
-	
-${OBJECTDIR}/_ext/1439655260/md4.o: ../../ctaocrypt/src/md4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md4.o.d" -o ${OBJECTDIR}/_ext/1439655260/md4.o ../../ctaocrypt/src/md4.c   
-	
-${OBJECTDIR}/_ext/1439655260/md5.o: ../../ctaocrypt/src/md5.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md5.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md5.o.d" -o ${OBJECTDIR}/_ext/1439655260/md5.o ../../ctaocrypt/src/md5.c   
-	
-${OBJECTDIR}/_ext/1439655260/memory.o: ../../ctaocrypt/src/memory.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/memory.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/memory.o.d" -o ${OBJECTDIR}/_ext/1439655260/memory.o ../../ctaocrypt/src/memory.c   
-	
-${OBJECTDIR}/_ext/1439655260/misc.o: ../../ctaocrypt/src/misc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/misc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/misc.o.d" -o ${OBJECTDIR}/_ext/1439655260/misc.o ../../ctaocrypt/src/misc.c   
-	
-${OBJECTDIR}/_ext/1439655260/pwdbased.o: ../../ctaocrypt/src/pwdbased.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" -o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ../../ctaocrypt/src/pwdbased.c   
-	
-${OBJECTDIR}/_ext/1439655260/rabbit.o: ../../ctaocrypt/src/rabbit.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" -o ${OBJECTDIR}/_ext/1439655260/rabbit.o ../../ctaocrypt/src/rabbit.c   
-	
-${OBJECTDIR}/_ext/1439655260/random.o: ../../ctaocrypt/src/random.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/random.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/random.o.d" -o ${OBJECTDIR}/_ext/1439655260/random.o ../../ctaocrypt/src/random.c   
-	
-${OBJECTDIR}/_ext/1439655260/ripemd.o: ../../ctaocrypt/src/ripemd.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" -o ${OBJECTDIR}/_ext/1439655260/ripemd.o ../../ctaocrypt/src/ripemd.c   
-	
-${OBJECTDIR}/_ext/1439655260/rsa.o: ../../ctaocrypt/src/rsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/rsa.o ../../ctaocrypt/src/rsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha.o: ../../ctaocrypt/src/sha.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha.o ../../ctaocrypt/src/sha.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha256.o: ../../ctaocrypt/src/sha256.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha256.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha256.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha256.o ../../ctaocrypt/src/sha256.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha512.o: ../../ctaocrypt/src/sha512.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha512.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha512.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha512.o ../../ctaocrypt/src/sha512.c   
-	
-${OBJECTDIR}/_ext/1439655260/tfm.o: ../../ctaocrypt/src/tfm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/tfm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/tfm.o.d" -o ${OBJECTDIR}/_ext/1439655260/tfm.o ../../ctaocrypt/src/tfm.c   
-	
-${OBJECTDIR}/_ext/1628556068/crypto.o: ../../mcapi/crypto.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1628556068 
-	@${RM} ${OBJECTDIR}/_ext/1628556068/crypto.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1628556068/crypto.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1628556068/crypto.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1628556068/crypto.o.d" -o ${OBJECTDIR}/_ext/1628556068/crypto.o ../../mcapi/crypto.c   
-	
-${OBJECTDIR}/_ext/1439655260/compress.o: ../../ctaocrypt/src/compress.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/compress.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/compress.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/compress.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/compress.o.d" -o ${OBJECTDIR}/_ext/1439655260/compress.o ../../ctaocrypt/src/compress.c   
-	
-${OBJECTDIR}/_ext/1439655260/camellia.o: ../../ctaocrypt/src/camellia.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/camellia.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/camellia.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/camellia.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/camellia.o.d" -o ${OBJECTDIR}/_ext/1439655260/camellia.o ../../ctaocrypt/src/camellia.c   
-	
-${OBJECTDIR}/_ext/1439655260/port.o: ../../ctaocrypt/src/port.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/port.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DCYASSL_SHA512 -DCYASSL_SHA384 -DCYASSL_AES_COUNTER -DCYASSL_AES_DIRECT -DHAVE_ECC -DHAVE_LIBZ -DHAVE_MCAPI -I"../../" -I"../../mcapi" -I"../../zlib-1.2.7" -I"/Users/chrisc/yaSSL/products/cyassl/git/cyassl57/zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/1439655260/port.o.d" -o ${OBJECTDIR}/_ext/1439655260/port.o ../../ctaocrypt/src/port.c   
-	
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compileCPP
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: archive
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk    
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
-else
-dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk   
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
-endif
-
-
-# Subprojects
-.build-subprojects:
-
-
-# Subprojects
-.clean-subprojects:
-
-# Clean Targets
-.clean-conf: ${CLEAN_SUBPROJECTS}
-	${RM} -r build/default
-	${RM} -r dist/default
-
-# Enable dependency checking
-.dep.inc: .depcheck-impl
-
-DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
-ifneq (${DEPFILES},)
-include ${DEPFILES}
-endif
diff --git a/mcapi/cyassl.X/nbproject/Makefile-genesis.properties b/mcapi/cyassl.X/nbproject/Makefile-genesis.properties
deleted file mode 100644
index e2b5ea418..000000000
--- a/mcapi/cyassl.X/nbproject/Makefile-genesis.properties
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-#Mon Feb 24 12:04:34 JST 2014
-default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
-default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30-TC9\\bin
-com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
-default.languagetoolchain.version=1.30
-host.platform=windows
-conf.ids=default
diff --git a/mcapi/cyassl.X/nbproject/Makefile-impl.mk b/mcapi/cyassl.X/nbproject/Makefile-impl.mk
deleted file mode 100644
index 6f20c0abd..000000000
--- a/mcapi/cyassl.X/nbproject/Makefile-impl.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a pre- and a post- target defined where you can add customization code.
-#
-# This makefile implements macros and targets common to all configurations.
-#
-# NOCDDL
-
-
-# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
-# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
-# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
-# and .clean-reqprojects-conf unless SUB has the value 'no'
-SUB_no=NO
-SUBPROJECTS=${SUB_${SUB}}
-BUILD_SUBPROJECTS_=.build-subprojects
-BUILD_SUBPROJECTS_NO=
-BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
-CLEAN_SUBPROJECTS_=.clean-subprojects
-CLEAN_SUBPROJECTS_NO=
-CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
-
-
-# Project Name
-PROJECTNAME=cyassl.X
-
-# Active Configuration
-DEFAULTCONF=default
-CONF=${DEFAULTCONF}
-
-# All Configurations
-ALLCONFS=default 
-
-
-# build
-.build-impl: .build-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
-
-
-# clean
-.clean-impl: .clean-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
-
-# clobber
-.clobber-impl: .clobber-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
-
-
-
-# all
-.all-impl: .all-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
-
-
-
-# dependency checking support
-.depcheck-impl:
-#	@echo "# This code depends on make tool being used" >.dep.inc
-#	@if [ -n "${MAKE_VERSION}" ]; then \
-#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
-#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
-#	    echo "include \$${DEPFILES}" >>.dep.inc; \
-#	    echo "endif" >>.dep.inc; \
-#	else \
-#	    echo ".KEEP_STATE:" >>.dep.inc; \
-#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
-#	fi
diff --git a/mcapi/cyassl.X/nbproject/Makefile-local-default.mk b/mcapi/cyassl.X/nbproject/Makefile-local-default.mk
deleted file mode 100644
index 2d8424143..000000000
--- a/mcapi/cyassl.X/nbproject/Makefile-local-default.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-#
-# This file contains information about the location of compilers and other tools.
-# If you commmit this file into your revision control server, you will be able to 
-# to checkout the project and build it from the command line with make. However,
-# if more than one person works on the same project, then this file might show
-# conflicts since different users are bound to have compilers in different places.
-# In that case you might choose to not commit this file and let MPLAB X recreate this file
-# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
-# least once so the file gets created and the project can be built. Finally, you can also
-# avoid using this file at all if you are only building from the command line with make.
-# You can invoke make with the values of the macros:
-# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
-#
-SHELL=cmd.exe
-PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
-# Adding MPLAB X bin directory to path.
-PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
-# Path to java used to run MPLAB X when this makefile was created
-MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
-OS_CURRENT="$(shell uname -s)"
-MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-gcc.exe"
-MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-g++.exe"
-# MP_BC is not defined
-MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-as.exe"
-MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-ld.exe"
-MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-ar.exe"
-DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
-MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-# MP_BC_DIR is not defined
-MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-# MP_BC_DIR is not defined
diff --git a/mcapi/cyassl.X/nbproject/Makefile-variables.mk b/mcapi/cyassl.X/nbproject/Makefile-variables.mk
deleted file mode 100644
index b480b107d..000000000
--- a/mcapi/cyassl.X/nbproject/Makefile-variables.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Generated - do not edit!
-#
-# NOCDDL
-#
-CND_BASEDIR=`pwd`
-# default configuration
-CND_ARTIFACT_DIR_default=dist/default/production
-CND_ARTIFACT_NAME_default=cyassl.X.a
-CND_ARTIFACT_PATH_default=dist/default/production/cyassl.X.a
-CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
-CND_PACKAGE_NAME_default=cyassl.X.tar
-CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/cyassl.X.tar
diff --git a/mcapi/cyassl.X/nbproject/Package-default.bash b/mcapi/cyassl.X/nbproject/Package-default.bash
deleted file mode 100644
index baae5e998..000000000
--- a/mcapi/cyassl.X/nbproject/Package-default.bash
+++ /dev/null
@@ -1,73 +0,0 @@
-#!/bin/bash -x
-
-#
-# Generated - do not edit!
-#
-
-# Macros
-TOP=`pwd`
-CND_CONF=default
-CND_DISTDIR=dist
-TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
-TMPDIRNAME=tmp-packaging
-OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-OUTPUT_BASENAME=cyassl.X.${OUTPUT_SUFFIX}
-PACKAGE_TOP_DIR=cyassl.X/
-
-# Functions
-function checkReturnCode
-{
-    rc=$?
-    if [ $rc != 0 ]
-    then
-        exit $rc
-    fi
-}
-function makeDirectory
-# $1 directory path
-# $2 permission (optional)
-{
-    mkdir -p "$1"
-    checkReturnCode
-    if [ "$2" != "" ]
-    then
-      chmod $2 "$1"
-      checkReturnCode
-    fi
-}
-function copyFileToTmpDir
-# $1 from-file path
-# $2 to-file path
-# $3 permission
-{
-    cp "$1" "$2"
-    checkReturnCode
-    if [ "$3" != "" ]
-    then
-        chmod $3 "$2"
-        checkReturnCode
-    fi
-}
-
-# Setup
-cd "${TOP}"
-mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
-rm -rf ${TMPDIR}
-mkdir -p ${TMPDIR}
-
-# Copy files and create directories and links
-cd "${TOP}"
-makeDirectory ${TMPDIR}/cyassl.X/lib
-copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}lib/${OUTPUT_BASENAME}" 0644
-
-
-# Generate tar file
-cd "${TOP}"
-rm -f ${CND_DISTDIR}/${CND_CONF}/package/cyassl.X.tar
-cd ${TMPDIR}
-tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/cyassl.X.tar *
-checkReturnCode
-
-# Cleanup
-cd "${TOP}"
-rm -rf ${TMPDIR}
diff --git a/mcapi/zlib.X/nbproject/Makefile-default.mk b/mcapi/zlib.X/nbproject/Makefile-default.mk
deleted file mode 100644
index 7d2f68fae..000000000
--- a/mcapi/zlib.X/nbproject/Makefile-default.mk
+++ /dev/null
@@ -1,314 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a -pre and a -post target defined where you can add customized code.
-#
-# This makefile implements configuration specific macros and targets.
-
-
-# Include project Makefile
-ifeq "${IGNORE_LOCAL}" "TRUE"
-# do not include local makefile. User is passing all local related variables already
-else
-include Makefile
-# Include makefile containing local settings
-ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
-include nbproject/Makefile-local-default.mk
-endif
-endif
-
-# Environment
-MKDIR=gnumkdir -p
-RM=rm -f 
-MV=mv 
-CP=cp 
-
-# Macros
-CND_CONF=default
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-IMAGE_TYPE=debug
-OUTPUT_SUFFIX=a
-DEBUGGABLE_SUFFIX=
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}
-else
-IMAGE_TYPE=production
-OUTPUT_SUFFIX=a
-DEBUGGABLE_SUFFIX=
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}
-endif
-
-# Object Directory
-OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
-
-# Distribution Directory
-DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
-
-# Source Files Quoted if spaced
-SOURCEFILES_QUOTED_IF_SPACED=../../zlib-1.2.7/adler32.c ../../zlib-1.2.7/compress.c ../../zlib-1.2.7/crc32.c ../../zlib-1.2.7/deflate.c ../../zlib-1.2.7/gzclose.c ../../zlib-1.2.7/gzlib.c ../../zlib-1.2.7/gzread.c ../../zlib-1.2.7/gzwrite.c ../../zlib-1.2.7/infback.c ../../zlib-1.2.7/inffast.c ../../zlib-1.2.7/inflate.c ../../zlib-1.2.7/inftrees.c ../../zlib-1.2.7/trees.c ../../zlib-1.2.7/uncompr.c ../../zlib-1.2.7/zutil.c
-
-# Object Files Quoted if spaced
-OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/608321700/adler32.o ${OBJECTDIR}/_ext/608321700/compress.o ${OBJECTDIR}/_ext/608321700/crc32.o ${OBJECTDIR}/_ext/608321700/deflate.o ${OBJECTDIR}/_ext/608321700/gzclose.o ${OBJECTDIR}/_ext/608321700/gzlib.o ${OBJECTDIR}/_ext/608321700/gzread.o ${OBJECTDIR}/_ext/608321700/gzwrite.o ${OBJECTDIR}/_ext/608321700/infback.o ${OBJECTDIR}/_ext/608321700/inffast.o ${OBJECTDIR}/_ext/608321700/inflate.o ${OBJECTDIR}/_ext/608321700/inftrees.o ${OBJECTDIR}/_ext/608321700/trees.o ${OBJECTDIR}/_ext/608321700/uncompr.o ${OBJECTDIR}/_ext/608321700/zutil.o
-POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/608321700/adler32.o.d ${OBJECTDIR}/_ext/608321700/compress.o.d ${OBJECTDIR}/_ext/608321700/crc32.o.d ${OBJECTDIR}/_ext/608321700/deflate.o.d ${OBJECTDIR}/_ext/608321700/gzclose.o.d ${OBJECTDIR}/_ext/608321700/gzlib.o.d ${OBJECTDIR}/_ext/608321700/gzread.o.d ${OBJECTDIR}/_ext/608321700/gzwrite.o.d ${OBJECTDIR}/_ext/608321700/infback.o.d ${OBJECTDIR}/_ext/608321700/inffast.o.d ${OBJECTDIR}/_ext/608321700/inflate.o.d ${OBJECTDIR}/_ext/608321700/inftrees.o.d ${OBJECTDIR}/_ext/608321700/trees.o.d ${OBJECTDIR}/_ext/608321700/uncompr.o.d ${OBJECTDIR}/_ext/608321700/zutil.o.d
-
-# Object Files
-OBJECTFILES=${OBJECTDIR}/_ext/608321700/adler32.o ${OBJECTDIR}/_ext/608321700/compress.o ${OBJECTDIR}/_ext/608321700/crc32.o ${OBJECTDIR}/_ext/608321700/deflate.o ${OBJECTDIR}/_ext/608321700/gzclose.o ${OBJECTDIR}/_ext/608321700/gzlib.o ${OBJECTDIR}/_ext/608321700/gzread.o ${OBJECTDIR}/_ext/608321700/gzwrite.o ${OBJECTDIR}/_ext/608321700/infback.o ${OBJECTDIR}/_ext/608321700/inffast.o ${OBJECTDIR}/_ext/608321700/inflate.o ${OBJECTDIR}/_ext/608321700/inftrees.o ${OBJECTDIR}/_ext/608321700/trees.o ${OBJECTDIR}/_ext/608321700/uncompr.o ${OBJECTDIR}/_ext/608321700/zutil.o
-
-# Source Files
-SOURCEFILES=../../zlib-1.2.7/adler32.c ../../zlib-1.2.7/compress.c ../../zlib-1.2.7/crc32.c ../../zlib-1.2.7/deflate.c ../../zlib-1.2.7/gzclose.c ../../zlib-1.2.7/gzlib.c ../../zlib-1.2.7/gzread.c ../../zlib-1.2.7/gzwrite.c ../../zlib-1.2.7/infback.c ../../zlib-1.2.7/inffast.c ../../zlib-1.2.7/inflate.c ../../zlib-1.2.7/inftrees.c ../../zlib-1.2.7/trees.c ../../zlib-1.2.7/uncompr.c ../../zlib-1.2.7/zutil.c
-
-
-CFLAGS=
-ASFLAGS=
-LDLIBSOPTIONS=
-
-############# Tool locations ##########################################
-# If you copy a project from one host to another, the path where the  #
-# compiler is installed may be different.                             #
-# If you open this project with MPLAB X in the new host, this         #
-# makefile will be regenerated and the paths will be corrected.       #
-#######################################################################
-# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
-FIXDEPS=fixDeps
-
-.build-conf:  ${BUILD_SUBPROJECTS}
-	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}
-
-MP_PROCESSOR_OPTION=32MX795F512L
-MP_LINKER_FILE_OPTION=
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assemble
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assembleWithPreprocess
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compile
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-${OBJECTDIR}/_ext/608321700/adler32.o: ../../zlib-1.2.7/adler32.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/adler32.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/adler32.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/adler32.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/adler32.o.d" -o ${OBJECTDIR}/_ext/608321700/adler32.o ../../zlib-1.2.7/adler32.c   
-	
-${OBJECTDIR}/_ext/608321700/compress.o: ../../zlib-1.2.7/compress.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/compress.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/compress.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/compress.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/compress.o.d" -o ${OBJECTDIR}/_ext/608321700/compress.o ../../zlib-1.2.7/compress.c   
-	
-${OBJECTDIR}/_ext/608321700/crc32.o: ../../zlib-1.2.7/crc32.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/crc32.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/crc32.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/crc32.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/crc32.o.d" -o ${OBJECTDIR}/_ext/608321700/crc32.o ../../zlib-1.2.7/crc32.c   
-	
-${OBJECTDIR}/_ext/608321700/deflate.o: ../../zlib-1.2.7/deflate.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/deflate.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/deflate.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/deflate.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/deflate.o.d" -o ${OBJECTDIR}/_ext/608321700/deflate.o ../../zlib-1.2.7/deflate.c   
-	
-${OBJECTDIR}/_ext/608321700/gzclose.o: ../../zlib-1.2.7/gzclose.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzclose.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzclose.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzclose.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzclose.o.d" -o ${OBJECTDIR}/_ext/608321700/gzclose.o ../../zlib-1.2.7/gzclose.c   
-	
-${OBJECTDIR}/_ext/608321700/gzlib.o: ../../zlib-1.2.7/gzlib.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzlib.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzlib.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzlib.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzlib.o.d" -o ${OBJECTDIR}/_ext/608321700/gzlib.o ../../zlib-1.2.7/gzlib.c   
-	
-${OBJECTDIR}/_ext/608321700/gzread.o: ../../zlib-1.2.7/gzread.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzread.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzread.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzread.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzread.o.d" -o ${OBJECTDIR}/_ext/608321700/gzread.o ../../zlib-1.2.7/gzread.c   
-	
-${OBJECTDIR}/_ext/608321700/gzwrite.o: ../../zlib-1.2.7/gzwrite.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzwrite.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzwrite.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzwrite.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzwrite.o.d" -o ${OBJECTDIR}/_ext/608321700/gzwrite.o ../../zlib-1.2.7/gzwrite.c   
-	
-${OBJECTDIR}/_ext/608321700/infback.o: ../../zlib-1.2.7/infback.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/infback.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/infback.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/infback.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/infback.o.d" -o ${OBJECTDIR}/_ext/608321700/infback.o ../../zlib-1.2.7/infback.c   
-	
-${OBJECTDIR}/_ext/608321700/inffast.o: ../../zlib-1.2.7/inffast.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inffast.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inffast.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inffast.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inffast.o.d" -o ${OBJECTDIR}/_ext/608321700/inffast.o ../../zlib-1.2.7/inffast.c   
-	
-${OBJECTDIR}/_ext/608321700/inflate.o: ../../zlib-1.2.7/inflate.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inflate.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inflate.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inflate.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inflate.o.d" -o ${OBJECTDIR}/_ext/608321700/inflate.o ../../zlib-1.2.7/inflate.c   
-	
-${OBJECTDIR}/_ext/608321700/inftrees.o: ../../zlib-1.2.7/inftrees.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inftrees.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inftrees.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inftrees.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inftrees.o.d" -o ${OBJECTDIR}/_ext/608321700/inftrees.o ../../zlib-1.2.7/inftrees.c   
-	
-${OBJECTDIR}/_ext/608321700/trees.o: ../../zlib-1.2.7/trees.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/trees.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/trees.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/trees.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/trees.o.d" -o ${OBJECTDIR}/_ext/608321700/trees.o ../../zlib-1.2.7/trees.c   
-	
-${OBJECTDIR}/_ext/608321700/uncompr.o: ../../zlib-1.2.7/uncompr.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/uncompr.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/uncompr.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/uncompr.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/uncompr.o.d" -o ${OBJECTDIR}/_ext/608321700/uncompr.o ../../zlib-1.2.7/uncompr.c   
-	
-${OBJECTDIR}/_ext/608321700/zutil.o: ../../zlib-1.2.7/zutil.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/zutil.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/zutil.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/zutil.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PIC32MXSK=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/zutil.o.d" -o ${OBJECTDIR}/_ext/608321700/zutil.o ../../zlib-1.2.7/zutil.c   
-	
-else
-${OBJECTDIR}/_ext/608321700/adler32.o: ../../zlib-1.2.7/adler32.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/adler32.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/adler32.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/adler32.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/adler32.o.d" -o ${OBJECTDIR}/_ext/608321700/adler32.o ../../zlib-1.2.7/adler32.c   
-	
-${OBJECTDIR}/_ext/608321700/compress.o: ../../zlib-1.2.7/compress.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/compress.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/compress.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/compress.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/compress.o.d" -o ${OBJECTDIR}/_ext/608321700/compress.o ../../zlib-1.2.7/compress.c   
-	
-${OBJECTDIR}/_ext/608321700/crc32.o: ../../zlib-1.2.7/crc32.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/crc32.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/crc32.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/crc32.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/crc32.o.d" -o ${OBJECTDIR}/_ext/608321700/crc32.o ../../zlib-1.2.7/crc32.c   
-	
-${OBJECTDIR}/_ext/608321700/deflate.o: ../../zlib-1.2.7/deflate.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/deflate.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/deflate.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/deflate.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/deflate.o.d" -o ${OBJECTDIR}/_ext/608321700/deflate.o ../../zlib-1.2.7/deflate.c   
-	
-${OBJECTDIR}/_ext/608321700/gzclose.o: ../../zlib-1.2.7/gzclose.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzclose.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzclose.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzclose.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzclose.o.d" -o ${OBJECTDIR}/_ext/608321700/gzclose.o ../../zlib-1.2.7/gzclose.c   
-	
-${OBJECTDIR}/_ext/608321700/gzlib.o: ../../zlib-1.2.7/gzlib.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzlib.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzlib.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzlib.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzlib.o.d" -o ${OBJECTDIR}/_ext/608321700/gzlib.o ../../zlib-1.2.7/gzlib.c   
-	
-${OBJECTDIR}/_ext/608321700/gzread.o: ../../zlib-1.2.7/gzread.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzread.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzread.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzread.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzread.o.d" -o ${OBJECTDIR}/_ext/608321700/gzread.o ../../zlib-1.2.7/gzread.c   
-	
-${OBJECTDIR}/_ext/608321700/gzwrite.o: ../../zlib-1.2.7/gzwrite.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzwrite.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/gzwrite.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/gzwrite.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/gzwrite.o.d" -o ${OBJECTDIR}/_ext/608321700/gzwrite.o ../../zlib-1.2.7/gzwrite.c   
-	
-${OBJECTDIR}/_ext/608321700/infback.o: ../../zlib-1.2.7/infback.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/infback.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/infback.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/infback.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/infback.o.d" -o ${OBJECTDIR}/_ext/608321700/infback.o ../../zlib-1.2.7/infback.c   
-	
-${OBJECTDIR}/_ext/608321700/inffast.o: ../../zlib-1.2.7/inffast.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inffast.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inffast.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inffast.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inffast.o.d" -o ${OBJECTDIR}/_ext/608321700/inffast.o ../../zlib-1.2.7/inffast.c   
-	
-${OBJECTDIR}/_ext/608321700/inflate.o: ../../zlib-1.2.7/inflate.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inflate.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inflate.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inflate.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inflate.o.d" -o ${OBJECTDIR}/_ext/608321700/inflate.o ../../zlib-1.2.7/inflate.c   
-	
-${OBJECTDIR}/_ext/608321700/inftrees.o: ../../zlib-1.2.7/inftrees.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inftrees.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/inftrees.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/inftrees.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/inftrees.o.d" -o ${OBJECTDIR}/_ext/608321700/inftrees.o ../../zlib-1.2.7/inftrees.c   
-	
-${OBJECTDIR}/_ext/608321700/trees.o: ../../zlib-1.2.7/trees.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/trees.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/trees.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/trees.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/trees.o.d" -o ${OBJECTDIR}/_ext/608321700/trees.o ../../zlib-1.2.7/trees.c   
-	
-${OBJECTDIR}/_ext/608321700/uncompr.o: ../../zlib-1.2.7/uncompr.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/uncompr.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/uncompr.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/uncompr.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/uncompr.o.d" -o ${OBJECTDIR}/_ext/608321700/uncompr.o ../../zlib-1.2.7/uncompr.c   
-	
-${OBJECTDIR}/_ext/608321700/zutil.o: ../../zlib-1.2.7/zutil.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/608321700 
-	@${RM} ${OBJECTDIR}/_ext/608321700/zutil.o.d 
-	@${RM} ${OBJECTDIR}/_ext/608321700/zutil.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/608321700/zutil.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -Os -DHAVE_HIDDEN -DMAX_MEM_LEVEL=1 -DMAX_WBITS=11 -I"../../zlib-1.2.7" -MMD -MF "${OBJECTDIR}/_ext/608321700/zutil.o.d" -o ${OBJECTDIR}/_ext/608321700/zutil.o ../../zlib-1.2.7/zutil.c   
-	
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compileCPP
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: archive
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk    
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
-else
-dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk   
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
-endif
-
-
-# Subprojects
-.build-subprojects:
-
-
-# Subprojects
-.clean-subprojects:
-
-# Clean Targets
-.clean-conf: ${CLEAN_SUBPROJECTS}
-	${RM} -r build/default
-	${RM} -r dist/default
-
-# Enable dependency checking
-.dep.inc: .depcheck-impl
-
-DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
-ifneq (${DEPFILES},)
-include ${DEPFILES}
-endif
diff --git a/mcapi/zlib.X/nbproject/Makefile-genesis.properties b/mcapi/zlib.X/nbproject/Makefile-genesis.properties
deleted file mode 100644
index c3e8ca8d5..000000000
--- a/mcapi/zlib.X/nbproject/Makefile-genesis.properties
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-#Mon Feb 24 10:53:41 JST 2014
-default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
-default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30-TC9\\bin
-com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
-default.languagetoolchain.version=1.30
-host.platform=windows
-conf.ids=default
diff --git a/mcapi/zlib.X/nbproject/Makefile-impl.mk b/mcapi/zlib.X/nbproject/Makefile-impl.mk
deleted file mode 100644
index df37d06fb..000000000
--- a/mcapi/zlib.X/nbproject/Makefile-impl.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a pre- and a post- target defined where you can add customization code.
-#
-# This makefile implements macros and targets common to all configurations.
-#
-# NOCDDL
-
-
-# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
-# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
-# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
-# and .clean-reqprojects-conf unless SUB has the value 'no'
-SUB_no=NO
-SUBPROJECTS=${SUB_${SUB}}
-BUILD_SUBPROJECTS_=.build-subprojects
-BUILD_SUBPROJECTS_NO=
-BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
-CLEAN_SUBPROJECTS_=.clean-subprojects
-CLEAN_SUBPROJECTS_NO=
-CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
-
-
-# Project Name
-PROJECTNAME=zlib.X
-
-# Active Configuration
-DEFAULTCONF=default
-CONF=${DEFAULTCONF}
-
-# All Configurations
-ALLCONFS=default 
-
-
-# build
-.build-impl: .build-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
-
-
-# clean
-.clean-impl: .clean-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
-
-# clobber
-.clobber-impl: .clobber-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
-
-
-
-# all
-.all-impl: .all-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
-
-
-
-# dependency checking support
-.depcheck-impl:
-#	@echo "# This code depends on make tool being used" >.dep.inc
-#	@if [ -n "${MAKE_VERSION}" ]; then \
-#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
-#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
-#	    echo "include \$${DEPFILES}" >>.dep.inc; \
-#	    echo "endif" >>.dep.inc; \
-#	else \
-#	    echo ".KEEP_STATE:" >>.dep.inc; \
-#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
-#	fi
diff --git a/mcapi/zlib.X/nbproject/Makefile-local-default.mk b/mcapi/zlib.X/nbproject/Makefile-local-default.mk
deleted file mode 100644
index 2d8424143..000000000
--- a/mcapi/zlib.X/nbproject/Makefile-local-default.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-#
-# This file contains information about the location of compilers and other tools.
-# If you commmit this file into your revision control server, you will be able to 
-# to checkout the project and build it from the command line with make. However,
-# if more than one person works on the same project, then this file might show
-# conflicts since different users are bound to have compilers in different places.
-# In that case you might choose to not commit this file and let MPLAB X recreate this file
-# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
-# least once so the file gets created and the project can be built. Finally, you can also
-# avoid using this file at all if you are only building from the command line with make.
-# You can invoke make with the values of the macros:
-# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
-#
-SHELL=cmd.exe
-PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
-# Adding MPLAB X bin directory to path.
-PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
-# Path to java used to run MPLAB X when this makefile was created
-MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
-OS_CURRENT="$(shell uname -s)"
-MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-gcc.exe"
-MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-g++.exe"
-# MP_BC is not defined
-MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-as.exe"
-MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-ld.exe"
-MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin\xc32-ar.exe"
-DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
-MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-# MP_BC_DIR is not defined
-MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30-TC9\bin"
-# MP_BC_DIR is not defined
diff --git a/mcapi/zlib.X/nbproject/Makefile-variables.mk b/mcapi/zlib.X/nbproject/Makefile-variables.mk
deleted file mode 100644
index 6d21f14b9..000000000
--- a/mcapi/zlib.X/nbproject/Makefile-variables.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Generated - do not edit!
-#
-# NOCDDL
-#
-CND_BASEDIR=`pwd`
-# default configuration
-CND_ARTIFACT_DIR_default=dist/default/production
-CND_ARTIFACT_NAME_default=zlib.X.a
-CND_ARTIFACT_PATH_default=dist/default/production/zlib.X.a
-CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
-CND_PACKAGE_NAME_default=zlib.X.tar
-CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/zlib.X.tar
diff --git a/mcapi/zlib.X/nbproject/Package-default.bash b/mcapi/zlib.X/nbproject/Package-default.bash
deleted file mode 100644
index 66c5b0bd9..000000000
--- a/mcapi/zlib.X/nbproject/Package-default.bash
+++ /dev/null
@@ -1,73 +0,0 @@
-#!/bin/bash -x
-
-#
-# Generated - do not edit!
-#
-
-# Macros
-TOP=`pwd`
-CND_CONF=default
-CND_DISTDIR=dist
-TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
-TMPDIRNAME=tmp-packaging
-OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/zlib.X.${OUTPUT_SUFFIX}
-OUTPUT_BASENAME=zlib.X.${OUTPUT_SUFFIX}
-PACKAGE_TOP_DIR=zlib.X/
-
-# Functions
-function checkReturnCode
-{
-    rc=$?
-    if [ $rc != 0 ]
-    then
-        exit $rc
-    fi
-}
-function makeDirectory
-# $1 directory path
-# $2 permission (optional)
-{
-    mkdir -p "$1"
-    checkReturnCode
-    if [ "$2" != "" ]
-    then
-      chmod $2 "$1"
-      checkReturnCode
-    fi
-}
-function copyFileToTmpDir
-# $1 from-file path
-# $2 to-file path
-# $3 permission
-{
-    cp "$1" "$2"
-    checkReturnCode
-    if [ "$3" != "" ]
-    then
-        chmod $3 "$2"
-        checkReturnCode
-    fi
-}
-
-# Setup
-cd "${TOP}"
-mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
-rm -rf ${TMPDIR}
-mkdir -p ${TMPDIR}
-
-# Copy files and create directories and links
-cd "${TOP}"
-makeDirectory ${TMPDIR}/zlib.X/lib
-copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}lib/${OUTPUT_BASENAME}" 0644
-
-
-# Generate tar file
-cd "${TOP}"
-rm -f ${CND_DISTDIR}/${CND_CONF}/package/zlib.X.tar
-cd ${TMPDIR}
-tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/zlib.X.tar *
-checkReturnCode
-
-# Cleanup
-cd "${TOP}"
-rm -rf ${TMPDIR}
diff --git a/mplabx/benchmark_main.c b/mplabx/benchmark_main.c
index d17def394..f9c0bdaef 100644
--- a/mplabx/benchmark_main.c
+++ b/mplabx/benchmark_main.c
@@ -18,15 +18,6 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#if defined(CYASSL_MICROCHIP_PIC32MZ)
-#ifdef HAVE_CONFIG_H
-    #include 
-#endif
-
-#include 
-    #define SYSTEMConfigPerformance /* void out SYSTEMConfigPerformance(); */
-#else
-
 #if defined(CYASSL_MICROCHIP_PIC32MZ)
     #define MICROCHIP_PIC32
     #include 
diff --git a/mplabx/crypto.h b/mplabx/crypto.h
deleted file mode 100644
index 76dccadff..000000000
--- a/mplabx/crypto.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * File:   crypto.h
- * Author: C15009
- *
- * Created on July 23, 2013, 12:26 PM
- */
-
-#ifndef CRYPTO_H
-#define	CRYPTO_H
-
-#ifdef	__cplusplus
-extern "C" {
-#endif
-
-    typedef struct saCtrl {
-        unsigned int CRYPTOALGO : 4;
-        unsigned int MULTITASK : 3;
-        unsigned int KEYSIZE : 2;
-        unsigned int ENCTYPE : 1;
-        unsigned int ALGO : 7;
-        unsigned int : 3;
-        unsigned int FLAGS : 1;
-        unsigned int FB : 1;
-        unsigned int LOADIV : 1;
-        unsigned int LNC : 1;
-        unsigned int IRFLAG : 1;
-        unsigned int ICVONLY : 1;
-        unsigned int OR_EN : 1;
-        unsigned int NO_RX : 1;
-        unsigned int : 1;
-        unsigned int VERIFY : 1;
-        unsigned int : 2;
-    } saCtrl;
-
-    typedef struct securityAssociation {
-        saCtrl SA_CTRL;
-        unsigned int SA_AUTHKEY[8];
-        unsigned int SA_ENCKEY[8];
-        unsigned int SA_AUTHIV[8];
-        unsigned int SA_ENCIV[4];
-    } securityAssociation;
-
-    typedef struct bdCtrl {
-        unsigned int BUFLEN : 16;
-        unsigned int CBD_INT_EN : 1;
-        unsigned int PKT_INT_EN : 1;
-        unsigned int LIFM : 1;
-        unsigned int LAST_BD: 1;
-        unsigned int : 2;
-        unsigned int SA_FETCH_EN : 1;
-        unsigned int : 4;
-        unsigned int CRY_MODE: 3;
-        unsigned int : 1;
-        unsigned int DESC_EN : 1;
-        /* Naveen did this
-        unsigned int CRDMA_EN: 1;
-        unsigned int UPD_RES : 1;
-        unsigned int SA_FETCH_EN : 1;
-        unsigned int SEC_CODE : 1;
-        unsigned int : 7;
-        unsigned int DESC_EN : 1; */
-    } bdCtrl;
-
-    typedef struct bufferDescriptor {
-        bdCtrl BD_CTRL;
-//        unsigned int BD_CTRL;
-        unsigned int SA_ADDR;
-        unsigned int SRCADDR;
-        unsigned int DSTADDR;
-        unsigned int NXTPTR;
-        unsigned int UPDPTR;
-        unsigned int MSGLEN;
-        unsigned int ENCOFF;
-    } bufferDescriptor;
-
-
-#ifdef	__cplusplus
-}
-#endif
-
-#endif	/* CRYPTO_H */
-
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-default.mk b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-default.mk
deleted file mode 100644
index 2ca7717ba..000000000
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-default.mk
+++ /dev/null
@@ -1,162 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a -pre and a -post target defined where you can add customized code.
-#
-# This makefile implements configuration specific macros and targets.
-
-
-# Include project Makefile
-ifeq "${IGNORE_LOCAL}" "TRUE"
-# do not include local makefile. User is passing all local related variables already
-else
-include Makefile
-# Include makefile containing local settings
-ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
-include nbproject/Makefile-local-default.mk
-endif
-endif
-
-# Environment
-MKDIR=gnumkdir -p
-RM=rm -f 
-MV=mv 
-CP=cp 
-
-# Macros
-CND_CONF=default
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-IMAGE_TYPE=debug
-OUTPUT_SUFFIX=elf
-DEBUGGABLE_SUFFIX=elf
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-else
-IMAGE_TYPE=production
-OUTPUT_SUFFIX=hex
-DEBUGGABLE_SUFFIX=elf
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-endif
-
-# Object Directory
-OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
-
-# Distribution Directory
-DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
-
-# Source Files Quoted if spaced
-SOURCEFILES_QUOTED_IF_SPACED=../../ctaocrypt/benchmark/benchmark.c ../benchmark_main.c
-
-# Object Files Quoted if spaced
-OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/2132364733/benchmark.o ${OBJECTDIR}/_ext/1472/benchmark_main.o
-POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/2132364733/benchmark.o.d ${OBJECTDIR}/_ext/1472/benchmark_main.o.d
-
-# Object Files
-OBJECTFILES=${OBJECTDIR}/_ext/2132364733/benchmark.o ${OBJECTDIR}/_ext/1472/benchmark_main.o
-
-# Source Files
-SOURCEFILES=../../ctaocrypt/benchmark/benchmark.c ../benchmark_main.c
-
-
-CFLAGS=
-ASFLAGS=
-LDLIBSOPTIONS=
-
-############# Tool locations ##########################################
-# If you copy a project from one host to another, the path where the  #
-# compiler is installed may be different.                             #
-# If you open this project with MPLAB X in the new host, this         #
-# makefile will be regenerated and the paths will be corrected.       #
-#######################################################################
-# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
-FIXDEPS=fixDeps
-
-.build-conf:  ${BUILD_SUBPROJECTS}
-	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-
-MP_PROCESSOR_OPTION=32MZ2048ECM144
-MP_LINKER_FILE_OPTION=
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assemble
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assembleWithPreprocess
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compile
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-${OBJECTDIR}/_ext/2132364733/benchmark.o: ../../ctaocrypt/benchmark/benchmark.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/2132364733 
-	@${RM} ${OBJECTDIR}/_ext/2132364733/benchmark.o.d 
-	@${RM} ${OBJECTDIR}/_ext/2132364733/benchmark.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/2132364733/benchmark.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O1 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DBENCH_EMBEDDED -DHAVE_ECC -DCYASSL_SHA512 -I"../../" -MMD -MF "${OBJECTDIR}/_ext/2132364733/benchmark.o.d" -o ${OBJECTDIR}/_ext/2132364733/benchmark.o ../../ctaocrypt/benchmark/benchmark.c   
-	
-${OBJECTDIR}/_ext/1472/benchmark_main.o: ../benchmark_main.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1472 
-	@${RM} ${OBJECTDIR}/_ext/1472/benchmark_main.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1472/benchmark_main.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1472/benchmark_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O1 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DBENCH_EMBEDDED -DHAVE_ECC -DCYASSL_SHA512 -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1472/benchmark_main.o.d" -o ${OBJECTDIR}/_ext/1472/benchmark_main.o ../benchmark_main.c   
-	
-else
-${OBJECTDIR}/_ext/2132364733/benchmark.o: ../../ctaocrypt/benchmark/benchmark.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/2132364733 
-	@${RM} ${OBJECTDIR}/_ext/2132364733/benchmark.o.d 
-	@${RM} ${OBJECTDIR}/_ext/2132364733/benchmark.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/2132364733/benchmark.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O1 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DBENCH_EMBEDDED -DHAVE_ECC -DCYASSL_SHA512 -I"../../" -MMD -MF "${OBJECTDIR}/_ext/2132364733/benchmark.o.d" -o ${OBJECTDIR}/_ext/2132364733/benchmark.o ../../ctaocrypt/benchmark/benchmark.c   
-	
-${OBJECTDIR}/_ext/1472/benchmark_main.o: ../benchmark_main.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1472 
-	@${RM} ${OBJECTDIR}/_ext/1472/benchmark_main.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1472/benchmark_main.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1472/benchmark_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -g -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O1 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DBENCH_EMBEDDED -DHAVE_ECC -DCYASSL_SHA512 -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1472/benchmark_main.o.d" -o ${OBJECTDIR}/_ext/1472/benchmark_main.o ../benchmark_main.c   
-	
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compileCPP
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: link
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/debug/cyassl.X.a  
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_CC} $(MP_EXTRA_LD_PRE)  -mdebugger -D__MPLAB_DEBUGGER_PK3=1 -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\debug\cyassl.X.a       -mreserve=data@0x0:0x27F   -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=__MPLAB_DEBUG=1,--defsym=__DEBUG=1,--defsym=__MPLAB_DEBUGGER_PK3=1,--defsym=_min_heap_size=20480,--defsym=_min_stack_size=20480
-	
-else
-dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/production/cyassl.X.a 
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_CC} $(MP_EXTRA_LD_PRE)  -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\production\cyassl.X.a      -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=_min_heap_size=20480,--defsym=_min_stack_size=20480
-	${MP_CC_DIR}\\xc32-bin2hex dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} 
-endif
-
-
-# Subprojects
-.build-subprojects:
-	cd /D ../cyassl.X && ${MAKE} MAKE_OPTIONS="" -f Makefile CONF=default
-
-
-# Subprojects
-.clean-subprojects:
-	cd /D ../cyassl.X && rm -rf "build/default" "dist/default"
-
-# Clean Targets
-.clean-conf: ${CLEAN_SUBPROJECTS}
-	${RM} -r build/default
-	${RM} -r dist/default
-
-# Enable dependency checking
-.dep.inc: .depcheck-impl
-
-DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
-ifneq (${DEPFILES},)
-include ${DEPFILES}
-endif
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-genesis.properties b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-genesis.properties
deleted file mode 100644
index 996a3b7f3..000000000
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-genesis.properties
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-#Tue Mar 04 21:07:46 JST 2014
-default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
-default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30\\bin
-com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
-default.languagetoolchain.version=1.30
-host.platform=windows
-conf.ids=default
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-impl.mk b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-impl.mk
deleted file mode 100644
index 3d6aa0df3..000000000
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-impl.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a pre- and a post- target defined where you can add customization code.
-#
-# This makefile implements macros and targets common to all configurations.
-#
-# NOCDDL
-
-
-# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
-# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
-# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
-# and .clean-reqprojects-conf unless SUB has the value 'no'
-SUB_no=NO
-SUBPROJECTS=${SUB_${SUB}}
-BUILD_SUBPROJECTS_=.build-subprojects
-BUILD_SUBPROJECTS_NO=
-BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
-CLEAN_SUBPROJECTS_=.clean-subprojects
-CLEAN_SUBPROJECTS_NO=
-CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
-
-
-# Project Name
-PROJECTNAME=ctaocrypt_benchmark.X
-
-# Active Configuration
-DEFAULTCONF=default
-CONF=${DEFAULTCONF}
-
-# All Configurations
-ALLCONFS=default 
-
-
-# build
-.build-impl: .build-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
-
-
-# clean
-.clean-impl: .clean-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
-
-# clobber
-.clobber-impl: .clobber-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
-
-
-
-# all
-.all-impl: .all-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
-
-
-
-# dependency checking support
-.depcheck-impl:
-#	@echo "# This code depends on make tool being used" >.dep.inc
-#	@if [ -n "${MAKE_VERSION}" ]; then \
-#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
-#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
-#	    echo "include \$${DEPFILES}" >>.dep.inc; \
-#	    echo "endif" >>.dep.inc; \
-#	else \
-#	    echo ".KEEP_STATE:" >>.dep.inc; \
-#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
-#	fi
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-local-default.mk b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-local-default.mk
deleted file mode 100644
index 3350f874d..000000000
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-local-default.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-#
-# This file contains information about the location of compilers and other tools.
-# If you commmit this file into your revision control server, you will be able to 
-# to checkout the project and build it from the command line with make. However,
-# if more than one person works on the same project, then this file might show
-# conflicts since different users are bound to have compilers in different places.
-# In that case you might choose to not commit this file and let MPLAB X recreate this file
-# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
-# least once so the file gets created and the project can be built. Finally, you can also
-# avoid using this file at all if you are only building from the command line with make.
-# You can invoke make with the values of the macros:
-# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
-#
-SHELL=cmd.exe
-PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
-# Adding MPLAB X bin directory to path.
-PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
-# Path to java used to run MPLAB X when this makefile was created
-MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
-OS_CURRENT="$(shell uname -s)"
-MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-gcc.exe"
-MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-g++.exe"
-# MP_BC is not defined
-MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-as.exe"
-MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ld.exe"
-MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ar.exe"
-DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
-MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
-MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-variables.mk b/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-variables.mk
deleted file mode 100644
index 479dfc45e..000000000
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/Makefile-variables.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Generated - do not edit!
-#
-# NOCDDL
-#
-CND_BASEDIR=`pwd`
-# default configuration
-CND_ARTIFACT_DIR_default=dist/default/production
-CND_ARTIFACT_NAME_default=ctaocrypt_benchmark.X.production.hex
-CND_ARTIFACT_PATH_default=dist/default/production/ctaocrypt_benchmark.X.production.hex
-CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
-CND_PACKAGE_NAME_default=ctaocryptbenchmark.x.tar
-CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/ctaocryptbenchmark.x.tar
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/Package-default.bash b/mplabx/ctaocrypt_benchmark.X/nbproject/Package-default.bash
deleted file mode 100644
index 869e322bf..000000000
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/Package-default.bash
+++ /dev/null
@@ -1,73 +0,0 @@
-#!/bin/bash -x
-
-#
-# Generated - do not edit!
-#
-
-# Macros
-TOP=`pwd`
-CND_CONF=default
-CND_DISTDIR=dist
-TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
-TMPDIRNAME=tmp-packaging
-OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-OUTPUT_BASENAME=ctaocrypt_benchmark.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-PACKAGE_TOP_DIR=ctaocryptbenchmark.x/
-
-# Functions
-function checkReturnCode
-{
-    rc=$?
-    if [ $rc != 0 ]
-    then
-        exit $rc
-    fi
-}
-function makeDirectory
-# $1 directory path
-# $2 permission (optional)
-{
-    mkdir -p "$1"
-    checkReturnCode
-    if [ "$2" != "" ]
-    then
-      chmod $2 "$1"
-      checkReturnCode
-    fi
-}
-function copyFileToTmpDir
-# $1 from-file path
-# $2 to-file path
-# $3 permission
-{
-    cp "$1" "$2"
-    checkReturnCode
-    if [ "$3" != "" ]
-    then
-        chmod $3 "$2"
-        checkReturnCode
-    fi
-}
-
-# Setup
-cd "${TOP}"
-mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
-rm -rf ${TMPDIR}
-mkdir -p ${TMPDIR}
-
-# Copy files and create directories and links
-cd "${TOP}"
-makeDirectory ${TMPDIR}/ctaocryptbenchmark.x/bin
-copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}bin/${OUTPUT_BASENAME}" 0755
-
-
-# Generate tar file
-cd "${TOP}"
-rm -f ${CND_DISTDIR}/${CND_CONF}/package/ctaocryptbenchmark.x.tar
-cd ${TMPDIR}
-tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/ctaocryptbenchmark.x.tar *
-checkReturnCode
-
-# Cleanup
-cd "${TOP}"
-rm -rf ${TMPDIR}
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml b/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
index e752de2df..13faa6bc4 100644
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
+++ b/mplabx/ctaocrypt_benchmark.X/nbproject/configurations.xml
@@ -29,7 +29,7 @@
     
       
         localhost
-        PIC32MZ2048ECM144
+        PIC32MX795F512L
         
         
         PKOBSKDEPlatformTool
diff --git a/mplabx/ctaocrypt_benchmark.X/nbproject/private/private.xml b/mplabx/ctaocrypt_benchmark.X/nbproject/private/private.xml
deleted file mode 100644
index e39667075..000000000
--- a/mplabx/ctaocrypt_benchmark.X/nbproject/private/private.xml
+++ /dev/null
@@ -1,3 +0,0 @@
-
-    
-
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-default.mk b/mplabx/ctaocrypt_test.X/nbproject/Makefile-default.mk
deleted file mode 100644
index 0b3936f76..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/Makefile-default.mk
+++ /dev/null
@@ -1,162 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a -pre and a -post target defined where you can add customized code.
-#
-# This makefile implements configuration specific macros and targets.
-
-
-# Include project Makefile
-ifeq "${IGNORE_LOCAL}" "TRUE"
-# do not include local makefile. User is passing all local related variables already
-else
-include Makefile
-# Include makefile containing local settings
-ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
-include nbproject/Makefile-local-default.mk
-endif
-endif
-
-# Environment
-MKDIR=gnumkdir -p
-RM=rm -f 
-MV=mv 
-CP=cp 
-
-# Macros
-CND_CONF=default
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-IMAGE_TYPE=debug
-OUTPUT_SUFFIX=elf
-DEBUGGABLE_SUFFIX=elf
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-else
-IMAGE_TYPE=production
-OUTPUT_SUFFIX=hex
-DEBUGGABLE_SUFFIX=elf
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-endif
-
-# Object Directory
-OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
-
-# Distribution Directory
-DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
-
-# Source Files Quoted if spaced
-SOURCEFILES_QUOTED_IF_SPACED=../../ctaocrypt/test/test.c ../test_main.c
-
-# Object Files Quoted if spaced
-OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/1679622190/test.o ${OBJECTDIR}/_ext/1472/test_main.o
-POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/1679622190/test.o.d ${OBJECTDIR}/_ext/1472/test_main.o.d
-
-# Object Files
-OBJECTFILES=${OBJECTDIR}/_ext/1679622190/test.o ${OBJECTDIR}/_ext/1472/test_main.o
-
-# Source Files
-SOURCEFILES=../../ctaocrypt/test/test.c ../test_main.c
-
-
-CFLAGS=
-ASFLAGS=
-LDLIBSOPTIONS=
-
-############# Tool locations ##########################################
-# If you copy a project from one host to another, the path where the  #
-# compiler is installed may be different.                             #
-# If you open this project with MPLAB X in the new host, this         #
-# makefile will be regenerated and the paths will be corrected.       #
-#######################################################################
-# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
-FIXDEPS=fixDeps
-
-.build-conf:  ${BUILD_SUBPROJECTS}
-	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-
-MP_PROCESSOR_OPTION=32MZ2048ECM144
-MP_LINKER_FILE_OPTION=
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assemble
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assembleWithPreprocess
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compile
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-${OBJECTDIR}/_ext/1679622190/test.o: ../../ctaocrypt/test/test.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1679622190 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1679622190/test.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1679622190/test.o.d" -o ${OBJECTDIR}/_ext/1679622190/test.o ../../ctaocrypt/test/test.c   
-	
-${OBJECTDIR}/_ext/1472/test_main.o: ../test_main.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1472 
-	@${RM} ${OBJECTDIR}/_ext/1472/test_main.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1472/test_main.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1472/test_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1472/test_main.o.d" -o ${OBJECTDIR}/_ext/1472/test_main.o ../test_main.c   
-	
-else
-${OBJECTDIR}/_ext/1679622190/test.o: ../../ctaocrypt/test/test.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1679622190 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1679622190/test.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1679622190/test.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1679622190/test.o.d" -o ${OBJECTDIR}/_ext/1679622190/test.o ../../ctaocrypt/test/test.c   
-	
-${OBJECTDIR}/_ext/1472/test_main.o: ../test_main.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1472 
-	@${RM} ${OBJECTDIR}/_ext/1472/test_main.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1472/test_main.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1472/test_main.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DNO_MAIN_DRIVER -DUSE_CERT_BUFFERS_1024 -DCYASSL_SHA384 -DCYASSL_SHA512 -DHAVE_ECC -I"../../" -MMD -MF "${OBJECTDIR}/_ext/1472/test_main.o.d" -o ${OBJECTDIR}/_ext/1472/test_main.o ../test_main.c   
-	
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compileCPP
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: link
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/debug/cyassl.X.a  
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_CC} $(MP_EXTRA_LD_PRE)  -mdebugger -D__MPLAB_DEBUGGER_PK3=1 -mprocessor=$(MP_PROCESSOR_OPTION) -Os -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\debug\cyassl.X.a       -mreserve=data@0x0:0x27F   -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=__MPLAB_DEBUG=1,--defsym=__DEBUG=1,--defsym=__MPLAB_DEBUGGER_PK3=1,--defsym=_min_heap_size=20480,--gc-sections
-	
-else
-dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk  ../cyassl.X/dist/default/production/cyassl.X.a 
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_CC} $(MP_EXTRA_LD_PRE)  -mprocessor=$(MP_PROCESSOR_OPTION) -Os -o dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    ..\cyassl.X\dist\default\production\cyassl.X.a      -Wl,--defsym=__MPLAB_BUILD=1$(MP_EXTRA_LD_POST)$(MP_LINKER_FILE_OPTION),--defsym=_min_heap_size=20480,--gc-sections
-	${MP_CC_DIR}\\xc32-bin2hex dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} 
-endif
-
-
-# Subprojects
-.build-subprojects:
-	cd /D ../cyassl.X && ${MAKE} MAKE_OPTIONS="" -f Makefile CONF=default
-
-
-# Subprojects
-.clean-subprojects:
-	cd /D ../cyassl.X && rm -rf "build/default" "dist/default"
-
-# Clean Targets
-.clean-conf: ${CLEAN_SUBPROJECTS}
-	${RM} -r build/default
-	${RM} -r dist/default
-
-# Enable dependency checking
-.dep.inc: .depcheck-impl
-
-DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
-ifneq (${DEPFILES},)
-include ${DEPFILES}
-endif
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-genesis.properties b/mplabx/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
deleted file mode 100644
index f6865cdde..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/Makefile-genesis.properties
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-#Tue Mar 04 21:12:11 JST 2014
-default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
-default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30\\bin
-com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
-default.languagetoolchain.version=1.30
-host.platform=windows
-conf.ids=default
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-impl.mk b/mplabx/ctaocrypt_test.X/nbproject/Makefile-impl.mk
deleted file mode 100644
index 32630f76c..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/Makefile-impl.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a pre- and a post- target defined where you can add customization code.
-#
-# This makefile implements macros and targets common to all configurations.
-#
-# NOCDDL
-
-
-# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
-# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
-# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
-# and .clean-reqprojects-conf unless SUB has the value 'no'
-SUB_no=NO
-SUBPROJECTS=${SUB_${SUB}}
-BUILD_SUBPROJECTS_=.build-subprojects
-BUILD_SUBPROJECTS_NO=
-BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
-CLEAN_SUBPROJECTS_=.clean-subprojects
-CLEAN_SUBPROJECTS_NO=
-CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
-
-
-# Project Name
-PROJECTNAME=ctaocrypt_test.X
-
-# Active Configuration
-DEFAULTCONF=default
-CONF=${DEFAULTCONF}
-
-# All Configurations
-ALLCONFS=default 
-
-
-# build
-.build-impl: .build-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
-
-
-# clean
-.clean-impl: .clean-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
-
-# clobber
-.clobber-impl: .clobber-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
-
-
-
-# all
-.all-impl: .all-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
-
-
-
-# dependency checking support
-.depcheck-impl:
-#	@echo "# This code depends on make tool being used" >.dep.inc
-#	@if [ -n "${MAKE_VERSION}" ]; then \
-#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
-#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
-#	    echo "include \$${DEPFILES}" >>.dep.inc; \
-#	    echo "endif" >>.dep.inc; \
-#	else \
-#	    echo ".KEEP_STATE:" >>.dep.inc; \
-#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
-#	fi
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-local-default.mk b/mplabx/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
deleted file mode 100644
index 3350f874d..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/Makefile-local-default.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-#
-# This file contains information about the location of compilers and other tools.
-# If you commmit this file into your revision control server, you will be able to 
-# to checkout the project and build it from the command line with make. However,
-# if more than one person works on the same project, then this file might show
-# conflicts since different users are bound to have compilers in different places.
-# In that case you might choose to not commit this file and let MPLAB X recreate this file
-# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
-# least once so the file gets created and the project can be built. Finally, you can also
-# avoid using this file at all if you are only building from the command line with make.
-# You can invoke make with the values of the macros:
-# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
-#
-SHELL=cmd.exe
-PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
-# Adding MPLAB X bin directory to path.
-PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
-# Path to java used to run MPLAB X when this makefile was created
-MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
-OS_CURRENT="$(shell uname -s)"
-MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-gcc.exe"
-MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-g++.exe"
-# MP_BC is not defined
-MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-as.exe"
-MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ld.exe"
-MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ar.exe"
-DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
-MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
-MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Makefile-variables.mk b/mplabx/ctaocrypt_test.X/nbproject/Makefile-variables.mk
deleted file mode 100644
index 09fbeab2d..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/Makefile-variables.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Generated - do not edit!
-#
-# NOCDDL
-#
-CND_BASEDIR=`pwd`
-# default configuration
-CND_ARTIFACT_DIR_default=dist/default/production
-CND_ARTIFACT_NAME_default=ctaocrypt_test.X.production.hex
-CND_ARTIFACT_PATH_default=dist/default/production/ctaocrypt_test.X.production.hex
-CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
-CND_PACKAGE_NAME_default=ctaocrypttest.x.tar
-CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/ctaocrypttest.x.tar
diff --git a/mplabx/ctaocrypt_test.X/nbproject/Package-default.bash b/mplabx/ctaocrypt_test.X/nbproject/Package-default.bash
deleted file mode 100644
index 24387c9d2..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/Package-default.bash
+++ /dev/null
@@ -1,73 +0,0 @@
-#!/bin/bash -x
-
-#
-# Generated - do not edit!
-#
-
-# Macros
-TOP=`pwd`
-CND_CONF=default
-CND_DISTDIR=dist
-TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
-TMPDIRNAME=tmp-packaging
-OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-OUTPUT_BASENAME=ctaocrypt_test.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
-PACKAGE_TOP_DIR=ctaocrypttest.x/
-
-# Functions
-function checkReturnCode
-{
-    rc=$?
-    if [ $rc != 0 ]
-    then
-        exit $rc
-    fi
-}
-function makeDirectory
-# $1 directory path
-# $2 permission (optional)
-{
-    mkdir -p "$1"
-    checkReturnCode
-    if [ "$2" != "" ]
-    then
-      chmod $2 "$1"
-      checkReturnCode
-    fi
-}
-function copyFileToTmpDir
-# $1 from-file path
-# $2 to-file path
-# $3 permission
-{
-    cp "$1" "$2"
-    checkReturnCode
-    if [ "$3" != "" ]
-    then
-        chmod $3 "$2"
-        checkReturnCode
-    fi
-}
-
-# Setup
-cd "${TOP}"
-mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
-rm -rf ${TMPDIR}
-mkdir -p ${TMPDIR}
-
-# Copy files and create directories and links
-cd "${TOP}"
-makeDirectory ${TMPDIR}/ctaocrypttest.x/bin
-copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}bin/${OUTPUT_BASENAME}" 0755
-
-
-# Generate tar file
-cd "${TOP}"
-rm -f ${CND_DISTDIR}/${CND_CONF}/package/ctaocrypttest.x.tar
-cd ${TMPDIR}
-tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/ctaocrypttest.x.tar *
-checkReturnCode
-
-# Cleanup
-cd "${TOP}"
-rm -rf ${TMPDIR}
diff --git a/mplabx/ctaocrypt_test.X/nbproject/configurations.xml b/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
index 210ed2136..7ffe44c26 100644
--- a/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
+++ b/mplabx/ctaocrypt_test.X/nbproject/configurations.xml
@@ -30,7 +30,7 @@
     
       
         localhost
-        PIC32MZ2048ECM144
+        PIC32MX795F512L
         
         
         PKOBSKDEPlatformTool
@@ -173,7 +173,6 @@
         
         
-        
         
         
         
diff --git a/mplabx/ctaocrypt_test.X/nbproject/private/SuppressibleMessageMemo.properties b/mplabx/ctaocrypt_test.X/nbproject/private/SuppressibleMessageMemo.properties
deleted file mode 100644
index c0bf8789b..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/private/SuppressibleMessageMemo.properties
+++ /dev/null
@@ -1,3 +0,0 @@
-#
-#Tue Dec 17 15:03:03 JST 2013
-pkobskde/DEVID_MISMATCH=true
diff --git a/mplabx/ctaocrypt_test.X/nbproject/private/private.xml b/mplabx/ctaocrypt_test.X/nbproject/private/private.xml
deleted file mode 100644
index e39667075..000000000
--- a/mplabx/ctaocrypt_test.X/nbproject/private/private.xml
+++ /dev/null
@@ -1,3 +0,0 @@
-
-    
-
diff --git a/mplabx/cyassl.X/dist/default/production/cyassl.X.a b/mplabx/cyassl.X/dist/default/production/cyassl.X.a
deleted file mode 100644
index ebe1820e1bdb5d7783add72f9418383312f316c2..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 236980
zcmY$iNi0gvu;bEKKm~@zmd0l0=Eer53JL~bDP&SX!PwLQBA}4K#lXODhJk_i1M#?0
zhk*fvYyU7X5W-z&7#LQ{An<7u1_l^@dWL}k3uc_TgaHMwzQDkUjCZgwFe2l9It+|3
zeEA3iBMmT|Fi;EdtQj6oE!Y--B#z<^uu%kipNPd8FVRnMGph_FZJ0~S0$%9Pv
z3&fMq+$%IYV$pBE<1fj$3A4Vh)H6
zRbymo2I2*0BpR8Tp{O)6HA7cyYG?#9(A3Zfq7uphD}z~TY+(WtHnuQ9s4=!MfvE97
z1S^OMRRLl`L1
z1(cW}5+V7ZeBzo1a(ZxPdR}5lX;CUeKw?pGD#*N`)SSeU%rYbq2H(W&RFKNlBCz=w
z%#g&SoK%M3lKi4nS7+yVmte>E;LLOeh;_&!uF1(5f#;N1oN8tg4^a$`cyQo=ZGx~|
zGGKA+omv@?m|4W&lHr&Ria&5r6eoiG0}2Hf2-BrF5#&S$m*T{*)S}F^N`}F&?OR6QjjEa6AQo!@>0u@L{n0cH5X?j7Nw@d7pEo{r9zA=
zPAw@0Ys*c{PL0n_t&C5tK;eTqnR%HI=%4ASmoZ)r(t1vo+>ET8=3YzQkf55W#_
z@^*1EWB^k}3<2KG!G=chU>-wIVp39O2{fBPIIsd3WPT7N-a$zK%7kY*SXmDefP@XS
zZ1v2`$;?Xy=S>uGkO-(if}|XTDuftJ1vrfb6(>Ti0GC_N8L7$HL8W;inYpRKsU;uw^5adLtMMbHJDedK|)Ajl3Ngu93~)B
zL16(hD77RWR62r!vakpgBOpOIi(uq}iczq=a0b}DpgOVw6xPM@MWC`3WN2y$$W@?Z
z2o5QDs(~g7R6$7c0wqCkN{7ZwJlMPLsU^;iu+k}|BnMvYr>B<0mllI!J}*Bn3EYMN
zt97ab)tE3H0jas5$}c3}CAEklF|}APAE~nk?dKU88l(2}3=Is-%*+%NjLeNKjlliC
z1g?5lA2&uuMg|yQWZ+;x@E90&Brz~B3j8lH0V~j8;AP-q_`uNAbKw78bteHP1_6de
z>;M0EQekIs(y?LKx88zb`+5_GZR-sfwyxJ<*s@-OVe@(whE3}g7&flwVQ>(UVc4+V
zhGAd71;h4!6NYX51`J#Kbr`nvYcOo?S7F%HufVXeUxr~rKL^7DW(S77>MRVaRX7+{
zsqio?QekFT*}=?^(aFr<-pS11+`+)Gas~r~^9%-tjF}7!?lb>0u-Y*EXR`UvuvCTN
zzmti|231Ct8LW&d4Nn&?LaXWW~V}g{3=F+JEDSw8stxQ+91Pt(JPchu3=B**
zOk2ztnC2KWFtr#kFxBWYFfcf&sBJjQq&6dmNv(mKNv+})qoPIwg8;*d{sjyS9EuVS
z4F4H)j2W1FRR1&h8U1H?W$>S2rBOoy4+B?1P7MR|IaLN`FI5I+O;r|#)jdr6BpDcN
zzSS@-V`pHn*<8oeC(6KJ6Hv!=Oo)NOM!&wHfRCXefQzBQgOfomqMMPcAg_jjVQo*t
z4siws#%pQ}R$J>D7Kkt~FczyZSOwK_1!UDUbO?eXRgJ;QvYyK$vxbLZUr)mU2?hqn
z_o@t5&ucgs*7R`gD6eVQAjZJJv{j93K}k)+3}FTarXV%0j>4LT1_1^JCQEg$0~Iw5
z75oegOwU!+GR`t`Z78d0SRu;5HKVwuVS*5YT7VBDS3^Nf!wE?SH4i&Ru8RDc1`Bou
zwH@0TxmJ|cs4XaArs5AP{AY=sclL*7g9tP%YRR-pJ>I}>v
zw+7ZQ<%uyc*yPkP*$Fc+*hthdtrK8iu=!rgRL0N1U~{FeA%dHs;e#9l$h{H_J9`8e
zR`sZLXfkm{c-P1``T~5~u^YoqV79&@J4>)|e4n%;%mTN~iI3Cm{crtM<2m!}~T81wpS3^LJnuR(OSA~C#
z+KQ{pTpPk_)F${bam@&>QA=3EsAlnlL2bo$CbbD6O#lCLsH&Zqz^G>NoOg4<Po%X1Zm|0_)XGkB_~B}@b7Gc|?DOe!5pOrW$2N*kcG!j+L*qoy#CflDI2hT*?}
zk($MNCbftxMwJ7s%qjt$j4B$gOezT-jA{xK7*q-lF{)`iWl)Q#U}Om5Vqi+*VNelJ
zVpg%}WMKH8Y@njh!JrnA$H?%1t)Xgw52KpEA_g@9X9l&1Tt=o4Ee0kf76t|@b_QmK
zQ!7*?G8t7Zo-n9HWH73DcrvI6crY+9oZ7);qt3t}#SAXzn4-8D7`!+c*cpzmU|~3-
zq8gFSpz5H+$iUFPgULmMfk{Q1frH_&3OB=%6+8@wR2UdicJMQtSi!*Hv4fN{d%^#`
z>MjhM*Eh{zV_;)QQuAThy556f%X$ZfP3vtKHmSssk6>sT04)^RW-uj64zS|`E4r1FEgDM*BYtxti0NyUn(DM*HawNHS7
zNrji8NhpS4e}C|QCY1<=ef=Q}+xr6;w)OikZ0+}8*wXL9u({uXVN<^i!^VCKXq}h9
zuveXjfxQn@xBO>#X~1Cfq6U)RoKzUBp4C9|8HXwZgK!_0hi6TL0|x^G%P|!$2ag&i
zJ$42LMrNA^12zVR|136K25vQKGm@DY{%aaCuq;*i&%kV>;=sbFHY1a%L4%c{OVhPR
z#o#c5+Kdb)76!>awHawlYBN%qI2a`Q)J_;Ps~wPJ29+Zy?m%(_Hv7SLGx0<0uE>Ym
z4Ys%9B_oQx6)zaoDxNW_RXk->E6`_F%iv>HGkDAJpW&1NgU!hrP#MHvb)p7V=5Pgg
z!Tk@in@Nw20pfoi8<79i65cQ}{PzO;RmDSv5nLX?{OQ2V2+G%LpuCsR%BU7`hEXkG
zHKUrwDTeOezanm_YH<<>^_YwqOgB3dl}}4kk4RPDZr_8H{QhLKxLNwlVx?urp+^
zF|TD{xu?!xWm?O?@?8y72MI6;uM=UATqnUGu}+48eVqaW|2h>0zI7T5yz6ur*wz^^
z@T@ao;9h6Jz_reXfpwh&1IM}s3vmV)29b3PEX&kDbrPtqVbbGdU=R=mrvq>ra1do=
z_*+U=UuHz#zFUg+XFn1_S@P0tUWyB@DdlBp8p*E(Eh2{zRKKZ3WHPE4
z9AN;}W#F`HkjB_$>0YB|aDqY2;5b7I1J^pW05`@C2Dx==A5Jm%FtDyu)7Z!GpJBNH
zNI!$kYH<4w5`QaeKxq*YrkbkYIP~CTU~*$+U@+scQA;?(!0`XM0Vp3cuyClVD5Nl|
zS+p~P+@=Pq$0U>)yBs}g)GQt|s9C&VP*Zrtpe8YoLCqnRVFCl&x+x4?>t-;>t((KZ
zx^4jj`?@6zEbCSUB%3#XaK6p+ItunGJ04Tj;Sy(bgW@uNMFOk(B8wskkRw!
z|56nehK@BX4C!k)7&>}57&3dbEsip9Fm$frV8~d*!_d*g!;sm-!_c{ghaqE)07Hw)
z>;Df#KKxHs0oirzzk{d%Ly#H+1G5by1BVKONU{n8gL@wfgIga5gKHlTgG(PcZ`quy
zVX)a*!(cO|hAEDn;XlJ$1Eyna4F4I<7%0?3T``r
z+jZHhkbJln+)n_t!ys)WQ2Y2;4Fk)2Xj@5BmBDH$xI6{5^}y{xtCpIsK(CsvLcf}>
zlaV!D3qxueGI$|vN^m}Zt^#f&vm8?a^(jE*C@6n{+i#%02TO}e*GAu(uAM$LU6I~3
zT?Zp-x+?u^KxJ*$%FvpwnZe++2PzjpWle(u3qx0?dreoOTMek5>r!;7VPN!9Wnes~
z%D`x;4r-@^(k9qH%-7UFc7y%G{9O%f{|QM3P#+9zKd261E>`1;$OgA}L2X4)KMT~K
z0k!==eHm~c$%B&t)V^h4TB{1m&kRgGstim^RlsdsrWO^h51BQf_ARJy1!~{I+zAT@
zE|1h2Q2PuNv{4RlGK1o>%h0Vx1ylwc;9zE9;O|pAz|O38fQ^}hfv-=k;s+xS
z16!Y3!FfhCgL4f38O|Co`LQuD*qo?gU|FjQs+Sq8jziL!2PXrloDpE)>g&q%tpSxg
zpt1&3Zh^``aGB?!!U!s})G}5vg3G^*m5d?`Jbh{zD;Pm#m0HGfMhOP)K5+jkqMK1o
zBbD(#!%hPRo0T=-JOXMvfYJ?%rYhHoNO(Aa>;jd+Ap1aeG5ohQ2HDHN#AO3+rvzv*
zgX{;DwP1S#JQ>vjJQ&pi+!@sZxR}*uykb;4ahXxg;U>d>22n$%WgH9)Hk`HK_6jIp
zTCvx{(FJ5{sXmB!0i(cWkxlRPA0J5EYum*HoRd_
zTXC96&0{GOY8%A_-bPVikXWa}z`ss|fe+dy;az9Kz_ZSRfg9Q;;ab-a0cw*7uVY|o
zgS1H^ylX&h5>R}C>!ANvj2T#XY(V*2B_f4UZ9xyb{sgy27j!eJEofs>ThPj+wjhL2
zZAJ-`2ZQ7~P@B|;fn%MTgCygB1_?u^Fi<$K)q=_)a9L%=S_{s{0bJm=38;(!)!!g{
zL3V-c2IViYA3201!#Y+|3$A{VlvIo{K0olXA!EFQTw}I>h*{7DV8nsQ5v5HYGV;Q4b
z#!^PLj9wwSYKAwGaM`YCFy`t7$xE0<||_
zZ4yvh1k@%0wK+g-kPrqjaGL}qF2S(9KY{_$CXoTRNjTRfFo>*6VGv%I!63OV2VCb$
ztP^0^+F!%KzD@?*7Fhvqi!k4|FhauLHGV
zdKlQ&sTrJR_|I??QVxLn{GhQ4n-kzMC`f+bPz99Nnq4MFuEgAG?LsQ!S&
z8D}kMdYn&1r%Ru74H~9ZUC19puAb}icziNB_n9e
zORZu(qgp{fqgp^7qnZV%&+^p(JSGSp2brSAVDlN=Z$Z?zFKgiC0J#3tR0WLxR
zBEYb9J-DrDV^$05BZ0{HSbf*Vuo^XmB}@VgOV&#;Ea_js
zz`IUmMKgl{!{YuWpfs?e6f&;0Vm*_Z!a623i7p1U4e1Ok7`WH1VPIRgfkATJ76!R>
zI~XL^?P1_pcYuL^-4O=9btf3O)}3KsUw45)WZe}8;dM6{#Mj+n;9U2BL3G^{29|X%
z7?{^-Ff(wxVGvsfsq0P}KPx|
z@()zk?RWv{kMDTSq_*QJv_Edn%mc3fB$)-Ebss37s2Ln%1l4;GcY)evkopdkm%!x{
zQu+q>V=UMi!1;}d6Hz{a#so4}BFZO_8!}cfg7O%oe0s~ImY~b57Qw@;7Vw%;&BKpT
zO+$?l(r?}jZs##rEeEGRP+Jca=ioLE%X1Y_ngiu?P`U=&3+^v-s4}pK*nrZV%8V2y
zcs`#onF*55)0x0+ev9RdYAf0q)fSX8s?7*tRNIirq~>sxDS|<4-G2r#Lr}T{r#Bn9
zT1XlbUnj#Lxek9F#kJ0XfpeV;1M4~u2KIG645I5mJSFub)dRT?L;b*nuP}Qe}*3h4B+ur(3tWw$QUuG?Eo741-Dm@f$MIRdPM-_1_^Lq
z9_)q#T&R8P1DxRY5x5RJaDz#$Vh592K|hmPMjn$|!cImtgLZKJ0_pdH#;%Wo>lILW
z1s-b#*Jn#1{cJxr@HhdeZedUW)o0(qV;$hK3e@NI;A8-`zrlT8P+bG+??z-Yszq=^
z(#eNYjA|bH7}a*@Fsf-hW17RjxenC70JY0N<&Xfw%JmFZD?#Jz>jfBA_Ag)%2iFat
zdPsp`<$4*0mHm+VPZQjp2I&F05fm?=dPsv|<$9)ltPBbaEBjSIed_<_hALn^nyM-w
zvmH2X)ONgN0+|B}E0CEWc~GAkWERNn2@GQEWEfVi2bqz=Ai55uUV~v}e+dKoIu%eE
z4Al>=TXwu;Qrl6^sOAyQsKBs&{Tc?&b!t0KGS6Y)?AyQ~zD~`Mg
z)9ScLkIu3?}b%z-lICvNm)=B)|tIqJ?P|Xg8Me83h>|3w+;Q)gK!!mUX
zhQ;a|7?!Qy!LY1<3&Y~|91P4hM;JD)*OoZUpxDvCumLQ-q@O{7$>t8j_VqUywynRy
zuyy?fhArz4Fl<==gkk^sGYp&8pJ3RuUa?^TgW`$@41XB5^{eh^VtC4sAfme95CemP
zu#M^jVJ1Zd2PQ=gP#>IuN6}yb(-wwB{UE-oLNG{>r-Xq`g@NI59}5GMN=uV-4I=}S
z%8|X!H9r`Z^tWtvu5nrGT;t-^T*D%9xQ>s3MMZH21Jf;rBSH)ekJlY>WUc|x5sd16
zO&077KmI>biD6i*-XOrlpe&HYz@WfvqblIcAjI%MK!Z_5?LPyk?B%e5jA3i4GW_Q-
zWngH9jA0wBWKhvq!N6d|#=xY-%Al%olz~Y{m4Si5bqxzci^|vk>ELl}4@RXv$apxj
z4P+cV*+fOdok2yw89dex8UtrgV6jovSi~@gVUfD3fD7ClA4b(aP}r&}9AQu~Sk3@y
zC!*WO!r;0lfKjav6hM{m~mOfDUwoGxUY1!&h
zb7YQ7&5{2uHJ~_QU}#y#@W8cZ2g8znh6hY_pz#bIhNg863`{C446W-p7+TgzFic&?
zz>u_tfg!2q-+u=YkY7OcGsARls}(=QZjKtWY+K4I=}y4JaHL7@B%O
z;q>>vg9ylh0t^e*3otC|PhoJ<;9zhN;9@wW2jVj_IH`c+^_!*A|N?E1_uEL
z7bY8)4TqSt84j}jU|8G_@=r2DlE8=mi_{c99AXBgSyd3taHJnp&qL;=lOglc8qEwU
zpt&`)c?u6km31r(NBUK8$onv=tmD8VAHb-xjt3+!(afMC&;+0NQ3cI)izqRKFe$&HX1BHuWE2*w}vn
zI=AtHVXwNX!XaiwjRVY}c^5^42Mjvw3>=_5%FnRKsOrB%04QxR35qg++`u5n#4rIQ
z&(O3Cl(!@pSX87Ko&+3mbglu-wJ0(?5@2FrQUT4iDE)sF0?K=!ylBnAzyZpSiVaLm
z;CN_YVq#`s>tbhM?c!!&>EdT#?qXnIo5jMwI*WsWWfl(u^DGZWwRJv>s_Q^u_@14C
zBZN_T9moujnV|d(%FCcUttvI_P
zug_rEw?2ho`}zciZR=wgwyqCg*tFh+Q&oD)e;eWB2qJRRUN`eTZO2iZfm4Ffk6$fEP6@|$RDiXyEDjp_`Dgwa_
z44`?vAT9=mBp%3`256jt=K4VE8&nli7*!>l8C4xR7*z$77!?B;7!)HI7$9?gD&Tl!
z5>aBPU|6oph_ukT_wAfUsrXnhC60)YyK
z)%_I=i~5-&xfvW7Rjlpx5@5N_bWu(;oVVT1br|79wQ9Sax~4=^w&o?u{5EMQQJW
zLxoY*p_x(DAPF*`>Z1t>6B9KCHHA}*Y7#FQ)dV=0)iTtW4H#CfH(^-0-hyGpdK-pi
z>lGL_sVg=tU_$pF3xh`=1A}Lu6axdR0|T21BZHTL5`%-_fp}g95C*N8VPxnsP!&jG
zyuj!n=#;_B0E!QW25y@J>C6mH3M>px63h(${~uFP6>wry&B$d`RcK*UU^pP4CQ;9D
zD4dhQ!GVK8)xm@D#eYUt2M``6;IAKmUp{||_O+{D2Uq;}%}rZA8n1sK+?7hzbxUV>rAdKreD>z6Se
z5E5W8RGY}b!14e8H8oHgXkb{?Kb^rr5R^`)GCUAq`pCr~!+1cLpTW%#md*tjcJzxd
z?Ch6dSl2JZu)hEQ|7+@?d0$xiH(=PR4oNTg=VcifK=ZQb>18QWdfCFDk}(C5UNknN
zq!)%D4hB$t%aFy3nr4!C!1+tnV+o^bfGZ@uXrQGR9aRQ31ukYa2~B1-ffI~s8BZBe
z)5}ssdV%EwXubf2B_h4B;!Q7>4EWN^Qnd8408e`HV^E8j!Jw8<$)L7lJ)>d)G`$>1
zU{pK-O)nJ>n9$RU7!LdY|3|g^(fBy$r+V^`Lasz_6^}Nu7z|
zfCdwTlRO*40Rc7!0fuG$3JmMj)ijPWh%hYc2jx*Ug(ILgXFsScQWH4DAOjLlU|>)K
zwKX#s7#JS%*|0D??`2?k(JRI9fCZ9wJq?r?6a){1Gc$lNB=4>?0OiY61_eP-o&dQO
zoOk_M7@Ra%!TA@Se0$76P#B-ZAVbs5Zv|?Vq#ErU}aRbc*CG7k;0%VaEPIWVM%`n!?J#GePg2zuWtkx
zmZ}RdtXMC?uzbA)!{YUzHh~PoB2c~ApTV%NKZRj?e*(j{{uqX>{SgdX`a>8t_XjX+
z>i1#T*zW;tQxq`lRR_hvQ)qetv5!L83?Jnf6fOQSl>I*-07@&08V|tpaV!iB>o^z~
z*71PmJ{TBy3>X%yH(*%SZ^Ez~B`ho$mh{_z`d6T}gb9xsR3Z*DfY%Nh9AZ%MSj3>>
z(9EC`uo%+T(&7QvIpDQ}O56;p3T+Ik8q2|H5!8M+U|6~y)TaWaNAQ{yDK7AuLsf}P
z1`~!Q>(vz6!08j*W(KvhLE$LC#Av~=cs(eMg3>Ffj<#V~v>sHCg3_?!1O^7h84L`H
z2@DL1&@?Q-AfW=vD~bmBj4TYtdl(o_^dQo6CNw=WF&qeI0@pK)3@Z&lZ36>PdJqR2Q#R3tYJ|5QN*BjqL)E&1}Hse8Ym_xFezpz
zK+^Ms2h8a93*)dK+3p4|1`bgD2#Vux9Eh^w8WOvb3n4xe%64E_*3Tfw#-OONh#~sl
z10hhogq#MzbF>Bzm|Pf^gVP`)J*>
zEMidcXkt*2Xl7v0;$>h^f~E;44rqEpt7sYqZ%w_g~C{b*$z6QYc>R6q9LJ{;s%MEhjTdM-`|4jG2E>p|&8
zjvJ9a{z22ndM*YIPz+a8fyOgdngqOi(0S}UxHA9044};4B
zZX_`?h6WLC2A2g~NMeQz4I*3&E(-ML^v5-7H}YmsWUW)a4@(mU`G;DVrURy
zXK-1-h9oA-&>+Ib;Ie=fNlb#FL4=jTWdRG4m@q?w2n&PD0%jyJK86MnW(Jo9Oh{s!
z3=JYo3@!^8k;GUS8blZwToy1u#TXb|7J$NO(|?9AP}qetDlbxD*pIS?T!Ue+`iK9A
zR0J8Eb=Vma1R5HcZ5SGoO;`k+8CV&dSwL&^IzWrw85kHi7#=W#_#hfIE&vk;>A&!Q
zuR6#K4TcTtbr|-q7hp&b0IgF*HjkUZkwt=Gxw-_yg7q>C3)U+zELg9?uwZ=$BLfd8
zeSpdt35KQWpn6V(kxfm9VSm2{v>r2H*sDI{|6X+mh7IdI7$>MGN*rMDVA!-ihhgb@
z(E3NvI1EU?00Wx}s7^>>*uOr3Vc+@~hVAPWKRjTFVA!@k1l+&evfhVb^LiJCjq6(&
zw)BJSYGBydU%{}nzXnteGBEIf%wc3;Q3+vmSQN_WuqcetVNp1v%OWO0IR<`)YsMjr
z;cB6bp=x1_!D_1+97HS_7Wd~cZ0%Rvk-%Wja3Dy5VY7NTqthf%AN@arlK~%tgGe}|
z)1ojWF-`^tkuXN5MWIMyEDR1Jp^Q$8LZD(Hj82O{Wt~L;{nd0x0H|
z^)N7`_ki+_n#D5)ZG#R5$Xc7FDnI@o5Mg0RR^eheB&4XYfJspziK$ERQ5^$A>I9H~
z)HIebXe)#<{QTb_!oZNa0IWtM0qV8`OdSkM`+FFc_2)1w?+3YCfMMTy5r&QH-8mR|
zBp9}=2bCY7us{x5kUB*T2B;YcOsWzlOw0_)2DTtK3n(xtF*FFJFzoMdau5Ogvliq}
z2?Zt=hE_dh1{EVlhNTva3@th;3QHKu7#ajXepCdziLgJp8JfUmD|RR`F)%1k>QYRq
z1N&20
zhK>CW(Da(YuvfjwLX2Vi{|6BF2!O)Kt%rdj6%y_mN1!SJ7(fdiCQj6vZdz`&3Tr5nIwNRV=%gkk&o
z0)}nt6F_6!8xAml$^uXs0LsIPI~Fj2%7q$+{p)iWwyw`$*s?x_Ve|SJhK=hh81{kN
zGN8Wn1cs&kQ;_oh0*0miOBj}c$1FkiBd1l+SegODW_3l21K=@p35G@MMHn`N)3*S_
z#`U1Egr#K%hGpt5;BlGd{T>X9`$6mWKy4%+hDH5q63q-Y3`_bQ7?$=MFs$fT6KG2E&qmH3wEkQ2GsF3{?wd3;~xj1`I3Kn=mY24=US0WfrKN8^_=v!t_y)p^D*v
zI0LwBGBomKP!OtN*xygB@(0;J3JlBCRTa#bm>F6O6eSKYc{4N!C@?HiZ*mX>=gTHg
zzSKCt#KNGW$INgTrTnR8NDxq9Sga1pn+y!Zh`9A-dR7la&WFg3K_5XtakiQrh@RtQ3H44zW5ag#sUIq@3
zzxWuKRTMQIFew@wU{bVjU;xFB2*cv_0St@4c@|WUhBLZN`v3o)dH}bamOPj#SMp;lK(4+g)_!2%H?I?0EJC3)V=g-8?1otsqkQ&tODCl
z0oq5Qh`e7yAptzc1u7px81}C>U|7B$w6_Ab?;?j`6SzH4z_76&wD&<#0aRu)@PPJ0
z7%(jF&j6PRVk#kw42wb;85V^xGAs&b6k7!9H!Cn~0i|swMGFQ7P#lObYyy`F65uj{
zfeBL&)NF$WCRGI^NS+dKVA2KEUlI*WN(>4@A>cX>lDBL?c}v29iJ8IG2$a7V8J6mR
z>UU6`XA07zz`&rW0ot#T*2BQC98$+vV6WS`8I-_gD^74?VqkEd)TP)2$yeYyFA!A6
zK3=M0T
z85VW0Gpy*~W?0_A&#};>C{U!SA*ZbFzk(*AsyZ3Q_`0)G9+O>}9SFUXSyJ%7TtM%($_s^N5{CξAurg
zPofVTn0;vb_EMR@e;=-!JlQr&P0c6D%q+*z-oB3M`}eQ@XU;Uon3!aIS-LdP)xm~_N%o?mT0AT)96`sAPfb-;c8fcFc&>(ogu%jT)6Drat(jxpd
zICxpc#fv*Zp{n!t?ZE^E1qb;*e;%LMxUuqWbo91;Sy@-yPM_|*xo=;(x20v#Juj~*
zSA2YCyoiX{;C23dYxac;yS3iGKl*glDu1!xzuz8pc5b`w>pLsd*f?!UYpdXSSJy6q
zpFdx+F)^_;*4O|05D>7y#m1&$*Zldak5{bl{u~&%=-=YSu?HL+8oK)XS=UaQWWQ(b
zTtyEHivpIfUq9a8vnToBwr%C5w{ERZR#bE{5D-w1`v3na-{;SNb1z-m?{oHSqX-X=
zgsHHwn*N(Nhabkr?^`r|y6G7gmkvvDalP;(M<#z-zC5(4uI`V!t!>qsl#~hIiHoTjAYQm3UAvU*kIQ?o)1VJ(};{9lyL|
zN4AZKh(_hTd&?ii#qE*h<`yfveS59-g9o?6jEqwJtgK4pxVS`adwNddVq@dUQBm=D
z5)-o{_RyjEd6zHmeZOXn^RlF*BP%9Ov|KWEs-gLlCzrb`D?b@Me}2{Z#EI@mbMw6I
zxw*G`dV3jDu3p`E$dVV@>)a(c
zI0UZl+Lhl?QSl*PRn@CVPcKGAM#kdfvSs1Nw`?g6Ja%ll@{1RzYwq4%IH#oKg`&K?
z-Cb|*X?OPSO>FD#=56ij;-64Z@W9E=uI9+rt%a-7($3uQ@R-2L%*@94?b~-DK0cYn
ziHV2eO--|YhKH}auybeT#I`o^h=T`bs>{k+?VLAH-QwZHo5DYSyxu%xhPJVwpwjNl
z%u59~Z?5d@>tkO&Ws32(*|T+(Q_GHwj0=Yy9h)}HoT*u^s~aWA&o6g+!-ncV
zAt5WS?cSYhB_^hmoP2C)P0f#%^73~xtE<2De){yEH#_^<-u(P~8;>5H7-C?M5WvXD
z#GIafZl$(%Sna=m&n2&4-71gq5Vd3C8etc?>va(z1;lp#|BqR(prcEW{<)6@*Ae*E~ZoxXltVM~kf^x)uSUoT$V2^xK6c>DIC
zj)HF?if#hjhnj{5q}x^8To7TVe>IK|bq>-^83F9n#GSlH_8|1|~#
zEcjq!Q{ggyzUrZ?z|5WPp=f8ZHF73}fd$!Sshetw0SXj;U&6~se@$vf}
zPM>bN$i=1OjJUX-<&h(k!yaZDe1_vi4!eXOr2`D
zn{#R9O3w#5IXAY1g{}GZ<;!RGSFg^irly`+Usd&`Z{0fgmmC}d61#TgU#+P4(4ng8
zm9M84QzRo}p|WgQ_{S|~U}sn3v~_FYk+ifkt2{g=++b#AWBvB+J0l;Tj8J0Yp~a@AS@GfF>wfOs
znR%hDO?=|PgEJ#!Wv$fb%~Rj`@Zn91A3t6T&zPaTSx`{PI5YFo?wdDP7WDP8cTSmN
zynOa--EDGmHcIX7qLW^}JgIQ*T)Ssz=&Ju38UYpe?=P+D>0$0)xG?fZXD4R^FRzsN
z{{5-9o;|y6=;YLLEF4oAnP!!u`UZqU_@D(B~y6Wp+&`gBOhia)z|=Ux*N)3HiE
zwlulsM@volyP4(H-+HS*{pbCZeQj@c{=JR)M<<3HHAo0BU}R!uOh30WT|2B+``>fP
zf7iDrU0?0{Y<1b2S!JjCT~9U1&uu!{>2R|4S9|TR_oBZdH@%K@?>p)K;Wzh(wT^Gr
zUfG;}Wl{X!MeAK(t)HX3f6kKN?@NlFOe;DtJNm%((nH(-K9u=8*>>GzHJ>asvz#b1
z`#MMa?_Zg|pK10#W0DbLvNZ6^(x(?qo__qv@v-pHF_ZrN4C+J0B;zkcyd5gY@i%NB3x{L
zqqn_{&bqQM>vXT%>3!)p_gNNsTY62o=jAiwiciFb7ZK-Mz0P0Qoqgf`QLXo@{GYD+
z{Z{O^bK6m8-&xmvjnhJnTLq`Ix^|s+{rOVhCld=BQ~kfj`hW!=0&FT=Z04)(n!m#P
z@ruAjp92@i{#)$OaKNFTwX1)U{n|-$75B`wDDbfO`jO@9p5*&`wv`{;c58j;5#=*;cvRrkq%l61(eptfY~)Wbw19#R&%%Bs5CSX!M_V(f`ik`a4Q4
zX-Zllby^dwS5N5RZtigFIpy~5xaPYZ*_U^SXxNC{TV8oDZqK7QZZTQz+iS~iKe%oE
zz$him$g0H8ic3U}%X89gPc|MdHWiN?m6#n*Vh+uZJ#=|*-sLsU@7E+9S(Y@>a>c}{
zhD)YCxorNV@>6%^^Q%VBPjow2LgW6@s{1|6{XGjKe=O|eZ0O{b66f8YdTal)>xR#qT8=qo
zT-cG}*mT%&rsjs3x>4o2{BnZ)8>&xl2wCwbWOweh-C{acV#k&yC;w=vsd+cEy!=~l
zb@hMVPoJ*s&Cb5JF+YD|$kC$-0R{$4%#4iZR;H(i)oN=$m;Co{Ytr@WzRy;#elx4A
ztl#z2DfzigO`Q%WPyTAJt$i>0>({2&k&%5T-Q9n4fB4||X6@R|=~u4A|6R1m_0{_I
z%KPWc3I4uh$&+bCMYE$194I}sefvY1zkhAlO`hzNrKXk>WoB0AXm9_O>HGI)|1)PY
zVoXc|zbsvP(d6mVpBx`QKAK!uxVrepjig{hLoItzQ4Ss!mZ?Fgx+nZ)sWfH8^-@#zk=cKdAHetwVx>!ejYAe=1LG+_>#+bo7;dSy{bqr%$Kf
z+_$gD+tPB%Juj~rSA2XnyoiWs^*VokclLz~N44I+_kX%-)myROzuS&FJI}iA>zfv8
zY%DmXwYBTKtLsaFpFdgHn3(=G*4Hoi5D-w|Vq>GaYyN!i$17GW`WzS-`)~2$h64@`
ztX=*6_G>3iQrt6lZh?n|#YdK}Uz6|e*;9US+qU(kw{AHlD=I1&2nalt`v3ng-{;T!
zb1z+L^f`N0LWGA$%~V+Uu>PAj`yR%}n=YC@z2l6Fi=L&p_~h^-M?ya>U;d}5uCB`6
z*7n4jl$2f1V`Gi9B_*FtEiOK=AR$3=Mq}f=i~jzL>+jrgNmEh^sngQ3UOiy~cXLNa
z&nY*z
zYwq5CF{h-&PElTd+FftTU^0sw%^S5?&J(y5XP~&80S9oOW)-$Wp(k9&S@L*$Q
zX8z9j?VF4cAK#(HiHTY9rl#wDhKFZf*tt`DVq4qHh=T{M)MaJWcg~x4)8gU7*TO%3
zXm6e|L&;cB@Y3$g%#{TaG3zuNyvl)^g0r>B5eTjHbhmj+z^0&WtM8
z)s++E=dV7!VZ(|)AtAZfcJJ1)5)(^KPEM|=si`S1FE6jIuCD&{>C>m|?Ck9P{QUf*
zM~@ygFfcG+WMpJaPft(R*4Ebk_wV1o>({SeU%h(u>aw!3vQwu{ooZ@oYC3uHC=xN
zKYlDMEG)cn*!nJNx?j`WhP>8@IN$wz|5yy8it6^CuG%
z6H|SCeSJVcK!A;njm`Y|^XIQvv0_DFU|`_l#fuj^I5;@;_xJZtnlx$B+_`h-T3A?E
zeEs_M>z+M(_H5g>ZQHF|w{9saDk=&H2nhWD|NsBz&!0bEx^(H%*|TTQ^6>ER2n!1f
zzj^cKO?-TO{PgM5r@OegxQL63iyt|1PrYN=gO?AohcXxMpS65e8K|w)*ot>TC)~#E&rlqB&d3bnuFf%hVfBW|B8y_DZUt(fnqN%B=
zX?S>e_|Ba>ceb^)wH-Wo@Sv=$tn9pb^X5H#`0(M6A3uJ~m@#99prD{&W@cvQ&6_uG
z_VxAkO_?%f%Iw**XUoaS$+fq)x4(S(^5wa6=gx(OhK6crXlUHOfB$|@PfyRng$oyU
zc6N61^78WT-@kwVvuDqqIXO8wWn^SzI668y&YU@Ormn88Es?3tt>K_*R;M2Hxx?AtD
zpO>?r$M-W&oij=Fbye>ETaiIib({BHxvW?cp_%!>)8)j;zO2qer4^NZU$X5YX5KB_
zslLts;Xd)T9Us!xD4g74b*@&z>wa>Rq14j^5
z5g8r@l7C(M+jH(s+5V$CNcnQ{>PJl8MdAJOkF{2Zrm<_h-o$)ptNyI&qist$%rAdx
z*D%<$bieYhEM}&dCb75LGUvM{ZK+)T;S>Akg^x1*&VIR-dUYQwn|zYV#jbzLj?4|#
zGg%P&d6Ch>F4of5-+DK%LT+0sz1_p-awgyg*x7tQ)3Iyf+ilTCU|L6M~X3@$ocXgeux}~mJ%1wSQ#bq%W
z7ek_FTj`mpY)t3k;eQ@J`O>s^TjouiE$x5wK*J)1JBgXz+rwcvpB
z10@?-acLoLUQWKX$Gbo6T(M2}#7a4lR>_ayKJ2CIci)})?r%c<;`wTf-}ihiiaBbX
z=3-L!JGxBMx%yl8Rr-=b4JX53e1oNxTPOygeFQnkMAx0dW*YyV`fl@9Nuih$W?;Ou|)_kMe^WJ&eUA?Z5OKxqnB=
zrf&|qbbFFF>s+um=x?NZVBdHpH7BN;n&OjIo59Tp!dIxH*3
zqxxu1x2KJU<5b@Ng^VjK?``JcnDb=IjR^^#Gn^5h4U3bu_D5~J=PA8QHJ$I3>x={cVjq_3A7=XC(Mzw7^S-?p_KAH>%v
zoJ_MiSG&dQezJt2)YB&8!08F~!AY*=DH|WG%ii6xpz)uKHpkB?86E`@e_i_}bM8%P
z|4|*Z{c`bYWhU>UNB#1T!&ir0u}2D7uduP?iv}e8
z|2;!e<>lUM)14hU&&<1-Uhec_!`|*r_Ks-D=N9iyRNm&QS?JF1RP$1<<;O`-{%>pG
zY<{b4DJ3K$wrlbuF0BOzo<2~raTb>rlI7*(<38T~
zY3+(_x;t0OiJXx97~aZWy58sR%y+vJ>KFf2WBfkok|6b-$xcG@ZN4jwzqM
z^XKihjE_%tB;PT-eyTOuNkD13u!G>S76lcr)>_-$mwp)iTqn3t^LVcQJXvppO?N&A
zweh}re6ak2*kiNfgWrkVf*JbDLRV~%%+kQ)J|62PcbFFlqOsWXrJrkcb+pR7nNx1jhp&d6Sy!dXZ
z7q|X!)7OUB`THhc$gI)5n!i#=_59|UYff0#N(d}Zp7SDaxApDn3bnJG5|Mddw$FOQ
zILp6zMc&kBsn7nesyn|&k>iEv`)9MC@49K0?{$uI{;MlB8#J$NT4K0f*woUzceSZ_*1C;IT49U^W(+)
z&wdYnwd!wtbiVCkHVnwQt_V9SxXmn5I{qM-Q
z!m@BP568VHTW-ub7?v`j<#cu8HlwQrF*zP3;X5ukeF+R$?pPO`DlT<+iMrLaxYgFD
zv**fxbp5qvb;M)u$;<`{p})%3e#<@6F|my4tE$ga|3BBYj$S`)s@C9=w6%Zn#(SPo
zyHwMqU%AfU`xpE0fc{~oQlCbl4{p7Sr(e!K_OqY)dHf{NsdIAozpe_JdMk3@72W2N
zh|7u(JT)^<_PLxmRGQV<_obpTVrI78PW8Km5BF{J@Ax3TR^epYnsc>VtnMdEcu75N
zG7OxaU>uy}TA#AmUWH)WEODzoTBYf5Ru{9FZuW0l=htJpzS}3S1VukE_%cy
z|2VuqG)-&u>rLz$TlJX_9c`OcZGL$vhlatY_WjD6mNGN#$`X4U({#Q|Tc&dPq%G{9
zKYYscTlnZ!>e(->Y*+W0T$E2*cBJc{p2^(c&x;m>cCi{g{I;a@bu+i+n*@hd?+fGD
z=I8AV6i~GL*>!iCEt}olb*#^P-S&n|+}eAjkTsT#CI3o5!hg{jk}ALVUYq{Xq4SLM
z&GhnlFE;FT>SXWemV9mzeWLRAyPAdWTuwDF`CERRlmq4e2F~U-Z6lAjf^usLqH_F-
z`2PO>-^w3mvCdZRs;-&3B|lfn&6o_uWzn-QhM1{X>2dLFOb?&T|NPySOVegc&zpFl
z!T;!;#6=3_QJLOCGGbDbA93wkaNwzyl8y5NX(3s0PCjnl?oVrvZ`0kmLQdqw%8%i#
zlBMf?*k``meYbw`-vq|*^VN!C_IyoqIcoho+N938yG&F0^qpgGw`Kf!vLpGU;q_B@
zlAQ!vrwcnM9cxh#^lGhD*?sAU?ay_BMw-WS7tWLQ*57pJvq2m0o1lZ`7anic&JinE
zIdkU}!CxLP-IY@QtT@v1VS$u=ZP*PRW2N^KJll`^S=>B$@l?;hMOS8+aerNQzOibl
z#=Y&g)cV%iFWGOU^JH#C0Pm#utl4MkLXzBiza0|3G2z7yOTD=7hnv2xkDb4-;X-E3
zufz=z(jHVZ@y){*WNq(Zdi3D#CO`0`z#mdJ>Ht-Bi*5M
zaEE-VTYX^MT$WcojIpNezluw^f9pA>Z;q0^Jt^ptz)Rz>Yq`Si*Jt%4E;O&=`4QPC
zBK*43X63ne>WSM;Ps%)e`_#S4X5*zfk@r7^+82vRRGvFtyx;tL@T;?bU^4!16D3!Ksc?hnI+3O^Z{vKApW<{-f*MHLD|jc~543
ztPuLkVC}cuvW|&mXTGZXF!}$v{`Bbe(^_f`E~Z=i7bo5GjM}K0F1^cj2H&gLhX?*0
zW-8Th6#C%PyLh@=_OYLrnV-k^i%y+0Y5(i0+^M%BgRbZ{?~AysSmLRf`Jm6`#L3dE
z&O=`+D*I+;+eN6~E!??poBzWP;%hrjrmaz^-C}hvS;Fi7(~2|?{ZD2=9{rMkU8l6?+zZI18Ox};f`{mQLR)=n4*LbbZ
zd}wRitm>nemvWdJd}`NF-n4W-)2=M$w=qp(UD`6|mrvSK`T4^qcE5#>GE>ifxy5#M
zAL~W=B$Fdu|CX7|4c1$%N+mwP+UI6I`5&%3!{uhR?mj_%Iq
z7SWQGx8I#u=+0GB^OE1`$4R*sQ2ys^Zfh{|c&jb9ra&;quPEy8@Be)KVHT~na#z=x
zsaxuDrQGDtP+S%>`(jA6ij|%j&&G7F$^6g5w_KX`PI}(N*$w_j4T`nUg
zCG?1E*W?3FwHDYoKTr~q6_@7Y=H>jf_IS7M&K284POOv*Z)5b;r<2pfy?8L1}u6g5a^%
zS{1KLKWule6EymHJa?g{thfHWJD&|U@xBRaE5GpgpmvVf=9M#d76|_GnBuOK@^ZzI
zo<9qu>_3Fv(5Y2=Kf$>DxS!|EgBLA&{w+E+!;JgNvh$5!mulRrx~0~)-G0gbwK`Ac
zS_SYqssCO#y|t?t_);ob=^cHGd5`)=9vb^YP_`x;_1YbIaFU#WZb{AMB56V@}=
z2rRFac#)Sp=XUjO>$98{YI$EIBHu7>pVho#mjAQVys4||p8Z$kIKSupvlpVfZq9!0
zbwlYA)_cv@*>}VHGa>$ueirp{$~6~`EB
z+ViWpr2V&^BlqSg+4M<4mu|l_4im@~cE2{OC-J&@70<%RK9L`dU4$Ae#;{T?5^>hFD#eA|k)+b*XXKd;|ucO=6?
z$3*2&yu)I#qQkO#cvK&0bbH$Tcbv*=S;)A8K;w>}
zu@2BU5NPZLH0A>u&jXD&fyRzN<7J>RAJCW)Xk6phuV24FV|}189?%#LXxs)g29lPR
zmIfLZ0ga!4#*aW_e4sH(&^R1u{1G&^1R5g(jopC8>_B5apm9jh_zP&f1~j$>8lM4;
zn}Eh+K;t8zu}jc+C1@-PG#&{W`vQ$2fyUH8V{M@ECD0fUXxs-hHU}EZ1dRiN#(F?w
zZlJL)&^RS%91JuD1R6^NjZuNd=s@F#pm8$LcqV8(6_o!$<2j%)JJ6UHXgmxw4hkCU
z0*x1f#xz0WXrOUO(6}IIob1Ad3l~6Rm!L5s(D)x{JQg&53L5JHjTwT*nn2^OpfM}Z
zxD;qC7c|xf8oL6G^Mc0RKx1m4u_w@25ojDQJv}`gG?oV%F9VGQg2seFW0jz>C(xKK
zXlx8L#snJwn>KCQv^8titO1RWfyVwo<8h!dU(lErX#5g1<_a3W1dY#u#?nCJYoKvg
z(AX7doE0=q3>w!3jlC8Y78ZiW#Xw`Mps{Drm{xv%em-c77&P_=8c$obYSk*x7%yl%
zRa#nF8Z_1l8s7tr!GXr+Kx1~GaZS+JAZRQWGzJVBX9SHkgT}5wV|}18Ptf=-XiN|^
zrUx3|1C6DE##}*TmY^|X(3mo4j2SeJ3mQKLjhlkTwLxRYps{4wSSe`y6Ep@38k+@;
zH-g4RL1TfSabD1P9BAAPGBbW(_LHa1dl&d)8#%tYDEcyUP@v~B7RTMYB4CE5R2s*7{K>gut7DLFfcG|
zv4nC!j)pR&85kHip==PPkio$4fQf;D8>*j$0kl7efdO<93nK#q1Lyz?kh&L0W`X!1
zIS{Q4RZmDA=vY`b28IHV9uNkZCjnwWG00vJA7l;4Y?yfrR!{{{3M2<&x`(hzT+iv=Iix2H^uK3=E)^!aNKN3?k6@5P-%7+^-A_3<~KC
z4F5nHpcrHhl!-zii?c9%{EsZj3{D9M5oUNSLd2LESQtPF8N^dyV_*R7BoP8}Kv)Fi
zS9S(bkXzUo7z999V=yo>fKHbOI~*zx+T3Lz!@%%{1)|@Afq_9rk%3_kH-rx|3Wk~C
zwn0RQaUVn_gk)x5g)pEbGXp%venz`!EHz;Fgir?5lRm9Rt9&EbXcm+(UP90Cx&gaCy9
zMhs%k7cq!9i#SAFLIxtP0j2kVXi)}+3s71IbUdFZ14E7+0|ToV14D}(0|T2F149Rt
zo&pjVXJD8E;)^pdECKN)7#LQ7_!0~Z8$f(928KN#z8C|;77$;Of#Cp%FUi2*q5$!i
z4~Pc&6G|_D(hs0Cha$wCB2ZdJ1;Y1HgU}IBIt5BcXh6)J0-|{s7#2Y3Gay=ofuTYR
zqOS!?Pk_>Mp!5nTeFsE~FfeS;fvDdDrB6WV3sCwElors1sPll*7xW-}P@V$Cqk%qz
z?*OIOfM`($hCLu!gn=Q#03!bdM2j#mh!{fn7BJcf!ao9~J&Ymz04N;+rB{GxQ3i$`
zAXz4rXb&)#SOk&i%Ernp=kjlL&E|^P=UnAt^(Ts#l(=b0JJaj?|=6Y5MNQCfq{Xs
zTLrY=2DDF-iNSM1m*e6ZMT?gViWVp-;?R{cm@LHf9kOn?Ci;01A
z;phL}B3u$&4B)*X;PS6yf*8XC0Y--A35piW859FL7?>EGCNeObnV=})%mCUurRdSj
zz{H?E5p-s_Vn!0yxj;=2Wlt6j0D*W;+vw`YXGwdsu0F?hN^?L
z2SMtvwFg1%0p#{zE+eGf05uNY!a{Ek)-p0MAh#7@_JU~S_TUs|1_scrKcEZ9L2W{i
zKS0?8)Ha8O3COMz76t}T+aAOQVURf>8XY5x6K)S8y95+h$Toub$fkk#gw%svk8lw&
z?KM!`gLG6dK-w?D44{3R3=BC?J_ESGN@f6E>I|*8K}^{7qFgDd#l~36GYjl@0U8?_
z!S8&pcg24f;1baFLP&Q3@-Tqzl3LNh%&@!zv_Fl3VfhS!w@Gz{LA;7R=h6s`$Kxe*y&w4r0%&2l8nNg*}
znNg)cnNbCF_KU`2$eBnHNsKB1PK==Y$G~U7SUh3?`|*?{_&zU&LlO+&d$+3i!RNa$
z6!C%2{b2x|GX^^6#|m^F)N%&Z1RZA82ySN8fLDyF9w!-99ab=c{gR@?z!am+0KV_b
z2Xa0g14GXm7KZLM91LA+K=*+NFm$XDVQ62&&Tzbgnc-*$3&Zgl4B#+Z%m6;SNdgjf
zpmUl)XE!lOF@wV&bhfCfKsxwbP|(>z4UDbeeSz30uiwJ32z*W}!vm+92MkNrZ(vx`zlUMtdTjw`1__3Z>Ngnnt-r#sefhQ(e*E0n-MCMg0t*GgK9v!Ta4o;-K?dL1(ivFdPQ&V{d6{t^u9b
z`UUO0);|nO`dK8JYmPWN*Dx>~UJp8}6Le-|H$##D=xoRmh9&B%3QY_g3~VY77?y(f
z$1*%9u47e!-Lcsh6h35b4>*p4uQ`#Wneh6j)mdqIu3@*>v$M0t&?E5
zj&i;!_$<>0hII@KffSu>%E{mm016M#d8VMY2IyQG5F2*3DX825$#XF@>Burb&o~um
zVvu5RWcdO;q5{e@Dh5ly=?<3OKN`O`x>fzXQ5Y{sF^Y
zb&%gc`<+2)43ze!f$r>7Xkbc#rjyMK3>*>+Y$`wgKT=Z^Xkub!aOq$N-$m*&gM|Tf
z7b(j+5k^pVlzAQK3?M~`1_nis1q_M~2N*zSg9tDzUk|#wM^PhzLD4{gQPF~dQH5du
zdeE6bptBZ0_JYnp1D#_7YEOaAuOZEx1?%yeBXEEL;~ltkiG`S
zRuxtTCKb@x86bDzbdSIR29REuS-A9zFf0Id*?G|Y#LWP@L=@DoUl70m-t)Y;gPmbf
z2Lr?687vHoW-u@`gUcdN`ON~`&&&WCk3;BdUB!&(>#?|&YYxFsPjmxAtQM)ObiSx{0s~w
zQ2GLh764D$fW(in%#d-o7$}_r5*K1%$N}+%7#K=Gd|?KL3J_nIfuRA!7i3`Q
z0r3SH7+OGl5e9|{Aif9#!wnV&1{MJZh6f;;m4V>{lokP9Rlv%?5CEe27#Lm>4WTXNUve&bFhdVz#{elivMQjHa
zu^U*#zF-lPV8skS8!Tc8Sj1Yeh^@dPb^?po2PCl?aE*sapg%OG{EKbQJOnU}mHxX6B@(Fyt1*BP>-YE=ep&
z1&M(T1G^p}mReCzlAE6bF&8QfQd^QAUr|wkEUcrDoS3IxqL7@QSC(2-0t&6%g81Un
zBy5U`OOr~95|c|9KxQSTpqLLcC@}@pcFiq_&n?ZtW=3vlPDy4#P9@lk+|nF0XTpqu
zDO1SJhna`!AGku8d}dx54zn`z%Am%8+?||Tfb1@iI~1x?i}DqUQj1G-N^}(R@=Fv_
zD+*GROHx5rGvt?+DCDOp4F<-_u0_$xB$&gX#)cQ3H1h0|SFwDkOG5i7pwk5;8?0GmjxO
zFB9yqg2dwD^8BI{a2W(Da2OaE{PGpx!UaY7Wtl0dDGEuI3Z=!MSZ82x%qdau17-Pw
zqWq+s)Lb1T&5o|Yy6(=t3XY{E8L4?CnaPlvFF7MMIU5{Xp#0(*tm{lbjdNmIW@)a1
zC#Yft1tlbDFff2ta~7o*7ei#gi5npX;WD_SVpGL{EDlu(sbdp!GSlae0)p(GzvcwweN=O7=DLWpy9aH}EKJb&ll0DK05;ypDv
zSs^tK(h>o;1Q5*ya2ui^F$L6)(NV}vEiO(>Plcw?oYcJZ63}`_Sm6Qoy#l;=WEhm=
z%rstSs{&h0iD$gIM1+B10Via<6g1We8nFb8A)=2rMw86jiRe9-s+jn9Cb3>u~a=>=gQ5e5b|
z5Ce)q=0KS!6tXzwsOpkGDWY2)s!Ggj8BnC>epmAdGW=xO(bX_cTATpW3IV3S3
zJf!Oi8kr0RHz^p3ON#P93q2ugm|3|Q7(i)>jhlf%1{Bu(kZ@;ZgRFyPgN`3Ffv$LG
zU|;~zpix8+4H|a_(V+2a5Di*y1EN9m79bjQVn2umt;+_{pfxoh8Zzd*%7w`zdYvoJ9*fYft<<~8^k7(|#D7(n6@P;nWkxCT^Q2P$p=6}N$k
zJ3z%Q1J;+@hMRC3!vglpyDf_
z;#;8NJD}owpyDT>;%A`Z;CUQ=28KIOanPO>P&hn+s{a5L{{mJ211in}ny2ArVBi4F
z({M8|@GwK>ha{llGEi{^sJISP+yE+W0u^_Fii76!K=yh-#Y3Rt;Q1tO1_sc45-1!p
zpyJ^9ByI+V0;u{Ls5odo31kjv9tor#G>-&|N6@-JkoXL!`Xx~HE1>QHt@j71-vJfh
z0~H6|Gz$_x0~Nmj6~6*C=K)mw2~_+ARQwB6{0CJ04^$kq&j92e9u`P?6JUXan+yvi
zy(vJ&RiNSqP;nEexCK<)1uE_V759OPM?l46pyCNo@f@gl0aP5c{t@J_2B>%oRJ;SK
zehO5422^|wRD1p}
zsQ4eKIB1IsNSuci5!`9FRJ1{0{b1ytMyD((Rl_koIo
z=MVWA7-FE}2~cs+952Y;0;qTiRJ;OeP774L11jDF6$i~jg5q}$RD1zc95hD^65jw7
z-vSjs05#_bRQv=~{0db322}hGRQv^0{0&t6162GER2;OZ7nIIfK=Ysc3=9HnkZ==W
zgM^y|R2(!v3UZGIR9put4w|b5iQ7QM9iZYqP;&yH;vrD+1gLllR6GMJUIG=bfQr{Z
z#XF$lJy7upQ1LlX@dZ%vB~bAVQ1LBL@f}d{BT(@ZP;u}+5`G4T8&Gl3dJs@JJbeOz2UI
z$Y%uY0Z=hG$Dru&l2I)ql|j+sHG`r96Qi2J8HT0^bp{EB{vJgGHb%vS35cWT3;Kz|h;Hc;XPFqQ(w}L&tO&R1)4Ws9AI~YA|eE4-!-BIKiNJLYY~G
zp{J)wLY3jrF;xb|6Y9(=8mdf+7K<1aPgpSPFl<_{rm=!SZ9*D@V#I5PrVdL64Tc##
z1`M0mD_W#79-3##ps3NrsB$8bNzvjngW3c&X0-@qCPjx83{5B087vsKu2<9$V$@-n
z+5_^F;shpU6^nF6MUa^mj~Ub)44D-txG@&lJ5YFdbTE#GvSq#Hcdi6N8#XB$MKd5+=0?
z%NP_L1Q~4@wykgKFlIQk%$UJ~VOo!(13RP2j9?~3izJYLm=qmE7}aKg{Q8r@fnodl
zrV|>p8Sdok4Lz
zFq4W!JCov!M@)(n!kE++d}L7DA<3vXBbBMi!id3zp|wYG!yyKcyFhMLneYkX#vLyh
z)FwnSDQ>vP`o7cc|D2?7BMJpxWuFuz{PZEnlXdQjL%G9{tk5}wHX;qiVJ2k
zsRe{GHk~kIP@HgxS#iN+Cba-J#zXVW7}PvoGOBF&#&jrLivcXY!;o2R!*M3X2_8&p
z9@>me4kiqWGn^Q~?(|S)JhaV(L1n=grbGUk5I2L}KaojsMmp1>ZAJ_r_p3Er0EI2s
z&58?@7!_xfF{w2$GbwgVWKvrY$z;JWsYk6rj!CUzJ)>fW2@@!+549UGsO@;c0OG4v
zd}6d=n9|cU!I(jD0}~U-KWY`P7}W~;7!TF!GpOxwhxqHnO(wO1D~yM>88Rp?c*Ll9
z!kAgD;3T8UjE_t=^O$TFzIHM>RIbOMc*2aisl$*#ZALniS_Ut(qC*Fh;)g?wY8#B0
z4(+pKP|H}xsOTWfsFtvXNzp-^QPJW!bJGrx_y$HbkR1uFjEC}d84i8ZVDJE?i4#8=
z)Drp`52focC@xsUs5avxli~?GX0-zqj7=Xj7}PATGpm8q!6YWN17ggI8=4rK7FaTX
z(>*9$LHZByF{`a8Wl-$6$aLtq1vpKptysmR*kQ?J!7#H&(SeCsZN@xsn5wN<%XDbH
zDT88%8IxLsHnZXmamJ<-Mht2bia>deNo|7(^Pzc$3^oiMJ&HR%F)8l&%%u3?A4Ag&
zLk2aAi%b>_6MNJmG8xq*m>JbJTx3v-$YE5IC}21gug!31nmGf=ziJW{3~C$BGl9~u
z;)f(gHHS*3rU~W@hvbzR)HYmYVqjRjUU9({W<`l41{;QXJ!%f(jEAjq^9A@sQBR!gW`rTCJu&8{Y?(apfF}u
zlQ3rFVc6HNrm=?MkexY$+5$;NHH}RSAb%gyS7lJ#aGXhP!E~l33v&iFi8`>q6=y60
zr^!Rp%or3Gm@qYUfapm~iYF?W6elDxsLl8W&U0!z)R`0=JivKOZNe8OP@X#U4U}(;
znL+ssl#diA2r+{F2FhnM>X@1~m@ue$s4{}`3Melro^WDR+i{VpX@N1rp>M_vY7HDr
ziWB0P6djZp6)n`6LHS4R#Ahb89n+XVd8KKF5yPQxMhuD_f{cow^yKgf>|aniRJ34X
zQrl4i$zL13F@W-un#E5h9)|7xhrU@dC^~2`A?GJW2RX*336>0M1=krBJ03BD;uMtD
z6)lc4f$|e5&w%m~D1JcqEQ7)VlxNgBUNEU`Fk)8RaftEIH+2SZ{?6C{&PSm9qS#@_
z1S7fN%4an*sX`A
zSum(AIK-glAixO9drb!{7}Ojj8Pyi_GaYi*U{DqK!JxKaDif%#S3DuccxakBgNi^P
zgNnru2E`rMnGY=o?L^zM9-QxI7&EI*aA)9Q*wU{!p@@lrVROIghu2JsC(4-AEVeMH
ze7M1^vfwq-Au&)m8ZxV%xWX&|R_ny1X7P?e%^;1TX@@z(p?O9OY8GD@6i-+(f$||J
zKZ45ErVb+pRe^9OP(B3ZLB$#07*r;NGpT+sWL6RIW>7p(!KCuxISs3;~<0ymylpob3lo^{&STd+->|juwP{erXm=Yup
zg7W2r2&Se8B?i?6kql}Q>5zPRU>k#qKqQ0e2X7{o1rwPRcZf5qe7MQ1a=@EObwLx8
zqCgoaoiKpvLsfwr%pm_LF8Bh@pNaxXOah>L(H2Z*YMNlg0Lh;(8A0{mp?xL{sxu}r
zsd*SODhh-%G{u7R9P^INo7Vh6DYqz@~R}W>W4rE)fpvBiU-UXRdxh299pKt
zpz`4oGbleR&M;;M)!mAqeLg3yGlTMSlYkNf11SG31LbXIP#MAq%EyW)OqiP@j2To9
zBti1)0x>3)8A(j4AGDd(D!wzS91vtyoG^(=<-;Lnl?5QNSB$C$gqcD0pyGiDCe;a7
zz~QO5;~ThL1*#(z4+t|Wc6?+~D>%-mmT{ID6t;)vSulX|vf>0ICQ#l5233K}%mNIX`wty6Vo*zHWd!9fQ2nTOpo9sOr$OO-Xr4KPqCgU(S_Ct*qChZ%
z;(=+5O*70HR6l%TQj5rARQYg`S!Ks3aK2JJA<3+IAee!LVfA{|1=pEX4hS(Tekfy9
zi3nx@?VVCw02-Cp(J#QTv;WXOB?iR>)0xy(h%%~y{IOycliH4#OrY>q?6?TY-#gww
z>rZW_L+4BwR3n<04(&H*-~ipJd%}`Q@xV4FP+WuZsR}6lOb}vLT~NZv!LYhtb%!DI
zp<|W|iVH%R6c@~30=WZJzNkbPGOO%(#H2dmHItgd3kDX@-liFsnL+tj?ZXWQP?&@2
zNVN~=nL+vZP@D-UZ8NETxXP?LVp!&52vol@sLb#N=Uc@C;>@ZuCNrs7
z`~&ARk6buT=%N&@MZ#)pP;QOLx?u(==9u2R$3&H&24pfmxhN5SnWiDCxD
zh(bni{kcGnSuvuV5tMhqZ7NV371X9U0Sbd6Cbb1WAo;Q*iJ@tOHp8KL+6;;lBAL`c
zX)M5vkpq;*CIo}qr=WUO@q-#i!_I!i4kboVI~1H3X9zPZ&d3JUBTR}B
zOiXGAeuCSaY9~PD^*<)X4P}f?JB%6BB8-_2^%*mO@)sx^)DCblgVGwP9S6>1CzzPk
zK73*V<*`F`h75`krdS^B_16eK2AM
z)oq|O1gbMxK>fZQNsJN<`__Z%N&$wg>lql<_p>l;?dJfOqhFXLK;_ytV+OSk9~l)p
zwlOtT7&8bkZ0lD8^+P~?jTt`~Sr|62KeXPA0hCuDX=)miT7v*13&Xa4P`gNR$0Bf@
ztT^EllbXW`2DOfhOlluaGP5wOSP!c6)jphIJ~YjQL9xRKoKL|1-*JdpZ9_hjS_3x|
zsGkCk!xKN5)D~P}QacdA1PW)h3BrtuCzzN(cB&l^1?M5f4bzyKb{H~%(Pe12ql_^OGkO$1#4#v-
zILr*L>*e$q6nA`O0`V0Kt}rSZTw_qo*um(-FmFu=!}K*S4Ey>W7`FG@Fl_6$VA$Gk
z!my>^fMIjL4#TE?4Tg>VDhwO?0~q?&L@>0iiDBpk@8$Af*sJcE&Sb-=?4;tu(6r|4
zdnTLC)lMb>3{7ix&0wY~Zub;uNZ~YX8?dvBnY+K*MuyuU}
z!-n;W3mPE%O=m1%5N9|bz{4<6imH!Oa)ENG6HB%N~Vbb2=
z#KbKS&ZG$5l)YsgKf?q8t_wg|3
z^$9TO_Ng5B#;8*9mC=SlsgHrdypM&!vQLCTr%!@GyHAEet51PJvrmOVqfdiDy-$Zh
ztrO$#vxzB`Q{d$#(Ym5S5dK;qxn4ZR{0;bCtHNbQjqYjuhV>AHMVvH_e
z`Wu4>n7+o~!?1omXy39*#WscjhV|=Z7rX{9tIT;Q$`gBQAVauk_;vcYuAJ7ZykoU{R~2&eHLrhGkI|`XfUkl2kjSk
zVc5|RvPXqs(fSOAm7sfp`y&`u_7^a$Sg%rWl`({2MZZc!DWd|z{`Cx}BpG}d_V+Ut
z@i8zY@j&)rXYn!!Fzj5P!mw_=2gA;O1BP||8VqaJ+c2zN&yd8yz!1gBAj7btKY?Lo
zzYfD%a5ykzF)^s@_{zj2#LpnYu)g1gVaIx=UE&N3hvY&2>j&-W2HB;$<2$2j1t+5k
z!^(aIh7};QL3XTk1(4FS04xEfkL0k+D46D|QFsxY55X8rz
zT5zA)0u(k3`}%DdR`#oYxX%nKUmY0s_iHe$=+|M`*ALPM5|?3Eu^x2yJm_xi42FIE
zE)4toRXyYw3mEqGs~B8mP|?`RprSC9LDk_Ovx>!61`m+A5~U1GMr;hAJ>X1AEDRvG
zs2Z>_t7FTt?3Usa)nQB}Z+k;#gkL4;vdKa&(QgQ~@IW>tw~MkW;%2BsJ-
z2Bs8U1|}J0@Sa_!GnNcYHTn!pC3*}@Ar=fwId%+8(0%IQ{p%)b44}QgCJZX;nD&^1
z_jX$_D6eB-uw2K%pudiXL2sP^gZ4TR2Ay>h3|i}C7VaM(ZHan;LM;c(8N%|uxWh(!-n-!81}E9
zz_4$955xBL9Sqynw=is7-@veCeGO=Qa>4=z9tHz776u0a76z4d91KcO`;^u(G9;-q
z{AX2BlwfAEWN^`8U`Sn{!U)=@s(2n?;fl|UE(|OBL1jY-!`k&KCybc|
z7}oZyco;J>Rq-=`^I8%Q1H&p&uw9_?Nrz$GdKrc_>m?Z0_Zxu932-^Gb-fM4&VCVy
z+3OjKI2aTdw)Lxk%7-1FnLuSq48zLxDgnWa9t^i1BO-W9T*n%2QaMemjIQ8Nt_G`
z4D0(fKxPKs&ItS0;E==nNfscO}_;L
z(>falran+UHDF*_r(*G$K}8{iLB-%QgNnvx1{F~JD6uer@;1C20PVjwc*d-1ahzFI
zgOynov==`_2WuV%XrVQ{rpQ8&on*v%EFffR(V_^_oC&9qAPKJSVodN^LIu!=?
zbs7w8>vR}c*O@RdgWR`{gF$i~4+H-?0R~=BT3^QjuD_VotQlBVF)*a;U|~@1vteLT
zvu9vlrKq3)&NmDU&O3Y)cRBewlJs!Y-UjLn9QJ}F@-_J
zp_oBMp@cz2;tK=V{|l~w{m-ySgaK5afa6h%6>fAZLhJv4hJ-)fsI}ssdgN
zsv0X9R24cHR3*|O<=h-&a5)AFTTt2O!=SV-hQWAU0E6nf5C)ZX5e&-fm>HZ_F)%po
zVrOt&#lqmai<`k^6$gXME`A2*RXhyNyFhIpVTRyUp!SadL+~z;8HhHJ(mF&NNNF9S
z4WzVg3d8<>L_0`n9Rq{HIu-_nbsP)|>n1Sl>+fOM-rvEnt-pm~Ykvd7mi`)s&HWV&
zoBB%_Hue`l&o-FBuvguIL0CoEAc;v4sVw4QQ0c=svqhtsK}Dg70d$TDD7~pFEMWlo
zn}FJ`o1~J_&Gn#NDUC
zz}ct6z|m*Iz}9EMz}hFnuw=c8f-|E8n10NlQm~lO0>sW(#HgZh7<{IR4a1W4p!~0*
zu$V!BVa<96kbFWiqYVQ~AE-{20hI?E7Bi_VNM=&`q0Fpu;4!1hibde@5tS24%qkU+
z7!4TKtXD};W>op`m`Me6M$3*zOrUdGOhDouN{lKA%Kj
z8JIxlw}8rSf5|hbE@)y>{qdbygJDs>4romAkOa6~
zR6W4NtXgoL(Su=8zYItmRCf!6gU@#Wo$~=|1F1@6gU_K6VOZS{Dg!}nD&+D2bQX$g
zz$!*nkC%+94jqiD7V6BZ25C&H8cUg&M6?;0K=t__dj_T>7LYn0)FuegLM<1IIc82KIF<
z407u@7{u1`Fo>)J<$VhVR%pG?3{Ll;`m~9afdh1Q8m>F-2jyB@8lCA7BMV)m2wG%mNt&TjPno#uk@4^fk61b)a>SAhSRiv?dnBw}hTG23vQ!
z0*Ae@HMSsgLHa@Jh&j{YsVs48XTQo4ccz1d0s{kReIMv7U|wiAV_Q2Lp~%1hI!6uU
zRuG1TABc^Nk;TbbI}2MaD6Q77K9|`OfrZ{2+7RA!2nu=
z46+-vHWjp17PQ7SMvwu#ha1G#geV1*pl|}kUxz3I!xeVOnP%u`I52<~Wh66%6eZ>r
zr{x#rGJtj}1ZO117nd^xXCy)nB?WPEA;+l(XC%61<|XDpg+S*jFq{!&0H0&vBg()4
zT07GKrFlT-j0!R^xJW|8XGk$Huz>io5Pk@hF3w0aGBrai4S}x}Xgv?ZydDjPrXB-^t{xMH&K?VfjvgC^_8!pM0noaD1jg;_V;Hxs*I}61W5Bq0
zy$R#$^&Sk(Jr<0M)<-aIUGKxt)DyzEWqknS=Jh^|o7Q_UZd~uexM4j5!@l(jjH~-q
z7*?$ZjjO9Lt_HPT*K;te2DzbMhhfEf9){KHbr@Io8-UL)TD{(Yadp25!?N`v468x*
z^jk12T`$3~dc6(9;`J7ctNQ~Ox_UwwI>BpQ5*XTgQW#o$G8meBV!-YN`4i-~o$Fl~
zR;~A7Sh?N@)b3|kq#gh^UqU5>VcGf!hNbIc7#6R0U=UZaVh~edVDRr@VesoY)WFYh
zXrev?2ZL{qQ;I4>Qxq$M+Jpe6rXGC;#S@W?hvujFH(CU`UPF!=NcFnISITB6LLwqgSlXg!6~
z9A$<>Jz5M-Em{msrZJ3~CGdnAAE@;ZTbjgHw$fgJMK3#EwPm42lV77{T^*u`wt{tY%P~5W=LGki(!>@sUwcqli&a
zqMwnSK|VQ^lf9Pxu`%6~C&83rd6D~2r9
zh5#-G35Lb$42+A^6$7#u7#Li8&ir@oX))FciwC`v45;9ziG!@}UC^7g-12*^C}`DhGI
zDl!Z!`vn-*^n=}7G$y0Yz!;*!z#!bqz!21Ps7r^T
zsZobP?Swa@>Ve}7PIWpAPQ~gBO&OrII7Liq4F*gqD~>a$9AIT`+N#c=*1*rCIKh)i
z<%ABiTEF3U
z&U~m#nZfC_1p{d8P^BP`p{Y@sp{W8i|8|;DC1V+*iU&Kh(==sAuWl#;M
zU~+0UW>BeE&v2+nm7(c`F@svg8%C7?cSf~>vy3Vp6--T2jTsapw3(dpR2kGxNHT%^
zq;|rHSurA?QPsnf5tKG~7{q#c7(#m#JuDd&JG2=U4bm9Z3KlacMqFiT@>F9`4KQYM
zI&H|HQgDvpP?j1)Q-vXeVnPn1TEgLE
zWK^s8z^GWz$Ea9vno)ous7EoupHYB;vsW>p546^XQLW-AgQABKV^g3ygKES?MyF;S
z29=8U42O!;8JbS$fYy&Nsui4KY?`XWpb{{VQLW-Bqf?$b1895%#XlAK45|@XjEWU+
z8AU*TiKt{0Vc_ajl*ngP^!UN3cHkLNm?c2=Wb9;=
zVBqdm)Y!qO7$D57c0!#|F`|^QDN~EVX|gJV3aGp~q{X0Gu$ZB#L6rd?Fe9Us?%an$ym(LG*=Z=1~4n0xXGZJaTZ**DW1@0R?OJID8nGuD+996U?-zu
zgdwxq2~S4FimOabnc560Cn^~a9nxk{EjY^H)UC$Q)S$+oXz`p;?Eo*c+6hf&r#fv0
zm4d^JDj7!^K86k+oVSmqO%_Lwt(=OWPN9?<6&2+u`;=FSPvJ@7DS^a(Ji^@%X3_DL|P
z_sKA*^eHeX_o*;w^=W|S8MB)Gl1seR04t-RTh{qs?0EEWNPAIU|1x=z~scn0Gdl?GGb)_&7m=Au`__?otUgx
zz+=2jO3VzPxhl|DE<+SI1CtaN1Jf*F2GtV=;I&?=4jjy?2G1B(HI6c>S}bP-&*y^X
zZbd8^m_TzFE*g+AT+kS;jXHQ-A2grA!=SWIgTZ*60E5Ol5eBt&5)7*AWEj-fDKMz4
zQ$d;A@L0vd;IWIF!EF@>gWE2C2G>oV%M)4>yRYcq#(NFR+3w6P`8fOF!OYoD+T8cOKQ{Lu
z|Cxn6D)~Aubyu~Nc->jKA?8-c&$6IEyBWF13|E{`XWnqUK63wO?gz)*CoaDln0$&Y
zT~kw}m211Yg`%|HpIjYZVP1>ikYcXX-CS8^dM6Jxw(1m3TKHoBBJVV*6$RbihZYCs
z9G84C>7okT%xkTtd|wI{WC@5JTq4PlV=m`Y?xDVQ&jyptJTjJEt8V!DpPCc>IbSd1
zT~mKae)7@^k%|*798AZ1e*ND!;dM^HlJARu?)y|xcx+J43(@!tmKe~bdf<_G2Ke27
z=<`E7QVa|M;Iq{schrF9X|SEaG6Bgfkdd&N28{V39O^*x0LW*sfXoBU2Z782VUWEb
zKF0hI4)b91L$EVgR)EyO90i@H0hx<_2FnUj;?7`sDoW%$k|=R!uw+OuFo4c+0G$gC
znim227esTS-JQ5Yl7S%*5E67oix}u`K6VE1WtpIPCeVS*2iOtwPM{qx5Y>=)vu0pmcmq0P
zfCDn`L%W@I%CBfab467#LhcAp8(0U7V3<
zYG{NxFJ)|qeO}7M)Y8I00R#x&Pj+H0=DgI6zkAhxFf3Uwz|f?k!nA+A0@J?rGECdo
zOE7I)FT%8Sy#Uje^*l_Q*K;s!TF=6?aXkamhV=pri`4@dT2xpV+x(aQVTowEqXgvi=_o
z%lm&Ytmyy2u(JOL!>axt46FNpFs$kS!LYX9gTblChatJgfT5+wgkfoq1;eo(8;0jS
z4h$T)}LTpy8aB~vh^1jm#@FV
zxMKYc#+B>uFs@qvfN}NuCyZ;>zhGRu{s+Ul{vQnM`xO|@^{Ozu?+sws&>zCEu^)6t
z2MsDBB=;{G>`>(+l@
zT)%z|jfBhtY5;obG--SzV$kc
z``5cLE?Td_xOja6!;=0KhNb;07?y$834_)PuVGjYS{v7&!?3b{1H-EREexys3mDe)
zmoTjD-@&l1e-Fd@{tAW-;Pu6zb;h9i5Cg^~>ung9u5V#nw!VOI<9ZXuP3svLoK#X6
zm#?p2T(Q1}apn33##QTm7+0^K!nkIA2jklH0gUU`CoryGpToFey$a*z^*xMR)`QkC
ze_-6%|AY~=&S+~tXg%{4hDGb&Fz)Do!MMNw3ge>w8;pzlFEB3Y-@~}H{{Z8%{u0LR
z>)$Z!T>pS!-}(oP+xzb@?(09pxU>HVw&_!my#=DN2yxfT<9}flxsPCodre
zHI1E&Y6|BW85lSBtAY0Af#xyu+LV!#b1r*u(cFezh6-ObU$q`_&xy80Rpq
z@1McAu3vja1S3
zhDtdG)gSj51sFH5233u6CY2vwn3sU&
zA_58+6&*4dKx-dC=O?IWY-3PSC}&dr@se5F!kba?$9_gNgF_6e5=$5q4~Q}<9{9na
zo$;1g5i%di*kCQe(4Zs1aDicMe^U(?LsKyqgKEWlh6ZCUh9+eR2GxRf3{4^u3=J(@
z3uNd)~*(r&O;ef3K
zgPMUMvzo+VMh3;9}GBlKlF*G%bGPp2q>z~26
zwf{hZ2!oTqFoUW`C!=D*HYV*AQyD>N@dm@z^%{&@`w#sQW^h<6!f;@QFoWuX`Amu%
zt}?04_{?a-xV2xk;Q}LgZro!fg8}1~ejCQ6{RWKd`tLAoTMx4Pz<*W-rwTp>20d1W
z4-A{vt9ckOHq8`cIM6P_z_3k(0klrvVVNi>?3m{;Zd*Ttam#wAAEMy!yTP!npGixU
z;SOk@3FFp&5yqwK4{3@rD6Y7|^nqbp{~X3G{c1BVGl_uG`VVS
zW*f#0{fZu)jH((>8MPC17!_A+W;(P`fI&^;D5Ii=Dx>0xsf=nrzA$ThtYlDJv7bqC
zg(>3<#-;1$Fm7Eh!MJq22;MHP_W+|W(zYM^5kSVv_ypA
z1H;PoER37ib1;J3zoq{UXz%uhZA?6%{5GS631p|!dQpZq44c=3%(7wJy8gflPKE|Q
zPO$w=3xydB7+3b+0PV{x=wndyFlM|1wtsW~ABL6v+6qS))jW(D4H#Fh=V092&jRwF
zhcVcVAa{e(rs@h)Mo@S>VOX+Wb%6=v9fl?SAT!lATxL?7(aCUwVM)K*hAT{J9#a`)
z7?<>e@=4Q576!!)*BBKQCNrt6FlE#(ILD-@FqJ`3;RvGvD233o<%%CzF
zw09e{?ncGpJA;bBTV~aS)eILvWmv@{M%4w+7*sZ_W@s?xU{Fbz$9RKb*?QH4X^e^s
zzA!e-7G?moUz%(<7!(uMFsWLkGlAj)RIWCO@G~@=;b%}>u!TugAc?8Tn1kU7!jS!rfPnMC!jDkc*fAMg@fS+!}5OB4d7&;iY_CH|QwjLzMAjZVtv_cd-7X5-@>w480!3+%BKx!8CgVf!Cs$&vjVsKa|
z%J76?>-s+oi`G|w>J&jSh6d33fEC-AK>7Fu!?ykh3|sqES8QVfnFT6yZ$SBK8zwV7
zVc6Ucs*gZnCc(J5Uj$^v98kRk$p;eP`eAebffb?*PVH0F$PtEPzF#r1Ty0e
z!?u1F#zpHDXIy4#5)@^4zyKwF}NMD0b*DDGD3{oyEe~RKdc)
zFp-6!VLm4VQ#vPuwt*Xi>Wq9Q#ST-ZrVX473@bSqR1o`FXeyRtP^~!6)HIui;Q_<)_24vG(8ts;MUFvr
zLNK^ZqBi3K!wrV@{h)dubQX!zE;)t+wmb|6w#qR$t>R%&oA8NI`$QxtJQ!40TxC+V
zc+R8hP<%BXh2or!^QYyTC{86pd=Fssa%%&6AU%%oOPz@)$s(pSp8KuCol
zxUYb5dw&k&^8N$c#TlGdurn~&i8JIdZtn+~$uvovp#YSh_lq;UVA#GMB<{39i~*D`
z81{)Xs809sj-hTrs585LDsz*OCEME`G^Po0)0OPj)DU93u)h29WQrvKz=?%lS
z^>-My_k+?F3*)Bspgjx^7&i5T?st8`ux&jkJ*!%{Gl9en7&rABFmCS$wHpuZ5ob6s
zL5KmA&IA~@uXori%FqGoH!^Hm?=)SMApx96w=+#)+`2x1aeF_gKGt5bovDKnR6m34
z+uEkSyU_1l2LXu>CkJ0QEai!n4z69?tX^)DDUtv|2<)SrO3TX97w
zQ2Zl|cFzZ*_@rh{)AqslREX7y~GLLFI`WD7{PwgQ^FG&8B`ui{(se8$N-=`n6YlWl-D^
z#-z9d6rRi1L);9C)9vd)eLT<^A=&|5;4`@t10om|1N<4a7nm?97U(f4F6d&??zqUP
zIAJD}qQ!AW(3v4kpbNzgvN1IDGchpLGcjlvykk%Woh30LoT+I869dCaCI;0CerAVx
zObmxkvN1G-voSC&XJb%3;0ZnhPI1B|MsS|3&}UK&IK`yeQOR^@C1}5`CxgQ_HU`y#
zBjELyY8@XL6;JpwX;-8(g7a)Z2%}2I5eC%*;>;=q_d#bJF)ALgU{WnO%cvF*#;DyP
z$P8L9*|bHHp`n-?wEmY#b;C8rhTW134QnJBK>etu8g7QBY;I70gQ;n;B*P1aRiHGw
zUNvJaQ^Oo?@HsAO8E+ZY7W6TK^6U#xztn=A*=ZLy!+}sqh67u<8Jt#0GN{e?%n0_!
zimOc82YxW92E1ZY>o~!zSRll#ma&!b0>h?$wSX*WzTMofvcQB{rK6Bhtzr_BT89Rc
z217|-J=X#u9fqPl6~^uTCX73v`Bs8~;g~ps2`EjjxXQ#dOPoOknr}gA2_z26x1f9n
z&bKp!nL+X@j63={7`Lwn$%FP|gYxYi@L0>X^@k3E%7JbD4xoHHV>3A43NUV44@!fe
z{P~1oYdmj9dFb`2mz~
zIT*LDS6lIe=?}w>ehW~(JuJZha{m*C9guu`M1lb_b_AAR4{9GgVc6cUIzyNl)DCt6
z<=c7SG7jW!aK05_1hscT_e_^EH60XZ0JXtDZUvpEkOR)AptkS!ezhH+!TIzH!)CC1
zRCj!4Vqx6A9#o!MFm49tTToc3%_wIAl_?yIn?ZJf^KAj+_Vu9fxxoM`dpGwh&L{`9
z^+4@+P<-^OZ72iRy`XxufN?WC--5y&biNAcjEEZyo1tas=6=NkJDAiqfZPLWvxqV)
z?kEH2+Z@InAor|iVFZnzf%0t$gJOdaleR=NB;QIDFepmoGl27LhAxxhf@UV|j*X0p
zGrE`*5A0x6oMFt=u$-NNVIm(x(+WNYrf_x!?F?RKP`?M{=B5UA28NyN45|TMOb*M~
z85-pI7?`&6F&ygTV^E#&h(U42W=2r?rP?u(NmYWGNiAR%)1jU03@RCq7#!O87*tmr
zV^o>o$)pw#$f#IR&!pP$fk{oGj6vncF-Fx1zDz1BmM|%5ure!72x3%Sv7ZTa=A3rN
z4hHQ2FD6BaQU=8eeI`W-XU2wXR)!l4i`O@8;b&0Yu#K@{H$Owe8h(ZwpmCNSR)(hE
ztPH9hAHiX&`eQ#6=-eZ<6?KeFi}@L}CkQcv+^P1%o=IiJR)#wa8~YntSQ%6sM3@va
zf|;Clu`*l%-2olS&u~DNmBDEfKZDu=9cHx&`@s1Wv=&xn!52nQURK>u#-P^G!=(1(
z8?ymJNuOE+7gI0i0wEKI;=T;V?fpHBi^2JoAxxa1hjDwq(+XyA-F;xcI70^GHc;HJ
z2a9hIV*u^lh38iZXGV~G2IH#!I}F>wYC!u_LHYFyv@ALl2+IH4`aMATRbnwXzlK2b
zD=2TiVOR{VXKyep?*GEDy&sepLG^%YKo)op;RlAr;QANTegoID63pOwegQPUg31U1
z#>MNMOVtB)_YW)L-RgnA|!o>h;yMpYr0FAqY>%dk0pnM9d^Hn9B89{Yx
z!#;5akXt}y7s%ZqjNAL00+|^USA1nMVO-n~DjO9g${9fWV?chr!?3s?be72-@V*mJ
zyI^s@szf=%7ly^_LE!;%3n=ac7#H`e?Rd--!nhbzH?IekJ=zkBL1wN8#V^Plu-Q8v
zGd*Bf42}zs`Aw3{3~C#`F@ekjg%d~}DDD(@JO20MJS`J_ObiQo85*WbFf`5JWnlU*!2rr5sxyL_w0DFvHf@k#U|1=^
zp!#DzlfyI#hC`ja3=QtQ3{1;;8B`nCnL%y^*RMb7nN%H4FsaT6WID7`fHq&OA|b
z5MxwSc*3kbLzqd?L5Q*8H)#B0|9VA-45k|lE7sp(SkVs}%WvvoVYtAsxW8dC3xjHh
zAY+3H3q#WqPKKt2Om`SIu5Vh+%-}Q$G?v87ptfKdI1E8)xZw{cgX)j3
z%uY_645|t&jEXzT89-xLATtllQ9_&vbT*G#hc=U1!%ij(hRHosIT!?O7$)^hVBFqc!nmcsgmFbb
zcr0mwI0J(k2e==>BwljXkk2Zs`Z-=>;O-@hy-Xs2+CO
zFT#)kT37EN!pOn6Vm(Nm0ON{&(73I(0t;gXBWRvw%X$mOCH*fLR`i49RTY+i`n>%X
zj7!!ZasiDoEa`VzF2Vqs1Ny?SV*P;yq6`ggq70yZrs|IA3~xYZ+$w_V`0f3mu_#cy
zD>{5-0{ItICMxdu%9O#lef<{(NWHGQ10)A2<19d9R|~!{f%DCZ?cjP8RHlIXquM*f
z8GAtWsKOE^8OH6PxuSkh9(uvB9o+W@ncuWioI!2D7N#%YGIJ{^Pxrq8o#DG;J9rEa
z6!xG#0w{ddKw-N8)Hm4Puc*MnsO`|fpt#}-li~_d#vaBcpmJX;Ne3Yio?oMBe{aDiEShB5d|EX5ghp!P45;(~f6MTH|wilDPUK?lxHWM*ji
z&c(pg&c&eZFb%w?TM=|N;}0$dhMimtsto~54)eGe4uRCAGcz!)XJ%0Ch+tF{Xkq}B
z2dXQ+GO0COU{+0d!>szDi0P0c7lX==2u6o(%nYhKav4-Q)S1*i$T2BSXk*fDZ~>1C
zgZ6Z(800djcGxqi?0CndI6;UBbk>+!!Zb$J9nYAwKiDxT?wHQl;LOC(WFiDU6H?WH
zjqw7*ivET*LJXk#rYV_;p<%NSXzqxqsfCF_Z3RCgDDSE^TwrRNEyVDKVcGhIKTHgY
z3Mx!$8&nxpe|%=v?wH8nG>ZxBZnXp+CY23g3~v}V^n>QvKyxyR4kk?Cdi5(4gVQb{
z2DOf(;Bh9kAM#8pD?*u6L1&OPtY=b7n9iv7;~BF9LuubC_5(sL3?+RrjQjc{7?<@Q
z*e}Q61Ufj}OpYOfaUZzN#WYKfA%<~#|AFsv3||=btp|xa?Euvm+t)LElLL+Wg5_fv
zLF4HVdC(ab4*SHxeg(}bg3`kwLpcTk#(m(q0#F&Fy5k=>9a%8$1J`G&2FIAx4APiD
z?LUy5+J|x`ki8QaH}@afD9)fb<1#}CQ#+9r(q`W<$QF_p%2Gj^O~b
z9}Q}UFJRoa-s!s-LkVcyWkwmu%=I93A&i^*L1RbS25C$sjLX)8>XZeH%lcIqH}`|&
zRSljof$F0LjLX&^nj_3`hhZ7GuABgFXK!BLuuYudzzk5kV0*vnhkGFZtZyf`dW3yWoB@g
z?D)q7G6R&aKy7jD5BHcRFz#Cqa*qh(KG3{wKjZ_|A$EcY~J?%
zI}D(3+`Jy74ituz;*QJAiaV||O<-KM9yD((
z!MJR_2;=tkiYrPPL1$oUN33R2?AXYp7*WZn7*W8ey~319F+qn(am8vT?T(3ziZk{z
zDT3w;W*9RyE#P2ah~!{s_|C$>^q+-6JK+q2>W3@LiZjZYnm`vF>||k3{ZY^8u#AP_
zP$vgN!+8z{ru7^QstsKXiWbK~=Ls`{^Wu;D%&I4DGO2!;$aE-?g+V2vi@{+V2ZQPk
zW=53;2`04<|Ckj!@|d)LJOkBZjA|!LnN(<*k*+$z(7QbEuh8IyLy1+X8~
zB3?5qCI~Yf_{t7$<2vmUWKi4S$pAV}6Et=N>ieoJFahU970@}rKl+%|PM9-$fZMhw
znf9?Q5b|Lt?sH+>*RR32tzQFN2Z}K`ZIEMNC=+D>wf&h^$uVdkE5jDkDf<
zgK-@w&8-K?gXj15!Sds}^`P{5s1TYTSAfSQ`$2gQl>XrPvEUq&TERLdP(1>YQ~R);
z31lv44;eT=uDHq=0`4zfV+Qr3IH36v)HX)Wk03c%egyADTd@sf=6aAiP`ekL9}Cto
zMKG>|=ErrQ`UcdV?pG~%2kH~{FJN4^{?HoG9OOE1egy5ewqV=}$&V|*Z3Iw$WCZ1f
zrb0-51dVZl#?@f?5mas|ez?vYftDXZWm*g@Kd!ink{>~JEi6CAfbwI(J0=@&S-BmY
zA8#-~@*^lb!TE8;S8#p=m0O^^25O&!@*}8D1m#DNI&gk0SjVKc0-7HS&VlkHqvDRM
z;QR;*hZu1Ey$;m&U$3}e3xi_CXGU#}Rwl)U2~3I_>lqX^_A_WN5Mfe0A<3k;pp{9x
z!GKwDMK=?8ymy5tQ_~C{28NA13=QAe7?|SO7(nB{svj;hgX;4p(8Urv*%(wKPBS^o
zV`Dhf$ivW}&%?m9orghn!4U?<6{gIfbfy+@ni(`_tNNjU>CjF#29=5<3=aQz7*tPm
zFsdx*Vp976n&({0r26AOlNxB=KBI$CbwNLq$_Zs=#RE4OL1&Yzp3r4h1GzPVk6HV}
zJSIhroeYW%1&oRsN0}Q=OEA1)Sh~JxivWY_1~cY{-2w~^e*_rbfaYE1NH8=-OE9R;
z_{;{+jBCf6Qt#E-|S^)G-Dy
zZ0iH{rWp%M2=CKzR++
zmR!KNuOBqdp{nteSxsXpqXpwya2{3ru$>WPuM6Ya{zE^-85A?tGAv+RyIw8hJ~ODU
zkYL>3@332r;m{v>1_{P}{VN#vuNPt5-+$nP9K#z1P`xP6puxDmUom4p$jtR1^$Qr+
z_B;HRXVBJI%BaD(biDvr&)WVKj7$3u
z5||%%`~!_`t#@JE-oFAGzMwv++K21RATvPW3#vc0cWh?_*`ca&lo>ScqyepCpD^rO
z53&OkmTEulgTfK)XHePK^i!VU4|uK9{(d!$r%Z|;?lXhbgX%_*9?(4-YCrxlJz?0_
zubr`$L2<`@W<{_)OV@+k2wGdB2wMBHVk@Jz$4Mr|1y`6r>j^;fx!Ry}M>D#a6gQj%
z&7(6a{y5JBG7mI|&ahFEpA!(wIzRgaU*hj#KYJYm?p-r<`hLsJYFgX)KW
zOcy|77ohWeJw%HpnnDG3Wt9=jzw@_|B{{BbZU;M;)UgXx!Jsgi)>H
zBQt310CY!01jClTmn;W_Vi@-K`7rM5Zvc<`$T5J%dl=;87#cun1~g6^CCA_c8mIjZ
zPIK!);!YdH7(itRxUCwI4VL#|T-*=J3m|#WxDaUE2Q)Wm!MGSarg=ybS~o_lW`c~%
z-eda102*rrwXwGKt4b_pQj?wGU;CAbVRFSN9)UDaN1}k
z#8qZcKl2Od%+}4K44}FcTsN+O%)^4@Aa$cCLkeiFC888$Cb;hw!nnHMVYMg&Xbn{g
zA3h!A7=
z!mzDh^+O$`ttu%7ZmWXEguru!E3Pqv#&AL9oZ^RT%%C$+EEu*&}1u#c$)R5wZ-W_kcRV-wWo-f$1x)&$L0fy@WjjS;6o
zV(UTcKS1i9fX?dQaF6K&!)owcHfU@XRA++1RW0Hk6KGCWQDQNZHt0@{h|}P9XA9%v
z^(l;?`Rm2&!R}uW!k{=Io=IDvi3xls1?Y@>0e=SV1tmnhWkw5^8rAYPJLu$P_6K1a+t@;&>+ss
zz_g#2;m}X;cn#>x21ZanN)lhrC@iKtMZPY6MGpY%M
zGbsMZU{nRo6>iXBRB_nJs5&8(NpZp_MzsYY45}U{m=qOK7_fw0<9APtd?XT
zfMMl&MG0r7rrGig2iCGMXiq3&Q1m#>tmg27@eRZ3{)Rm)3{H#W86GgKhvdl}pP8IC
zu`nDEm1j_!5y7bF;Rzmt1qd6*$DCGGj7>O2m6+HPAgfJ03A5Fog7}&8T2f
zizs0H!@NK!g(0XffpK4d0OO+m1KUA)l8J#qOpYM{mM5#^7!sg)@&m)Z^&oLjo&@#1
zz#u&biuFvOvl~Ip^Nj`4d#%IDO}5@ByjYa2~YIZM^{Fwtj7aLrgx5i$H6J`yGUt8167ET5rL)
zz8|!PPqkt_lLq6~e$e>~ptdTg?FVurXslKB!#*ZZc>}7C8o+(Y_3In9F@fi44pcBP
zGzrQvurPw$0O~*PWAb6#+W!GmXRZLV*F*dWT9>g8y#A?yace)QE(O^MYFmQNum{cg
z+ySlo1=V9Kt}-<+Ze6b`aEKYSjsa9=Dt@@i?8CTkJ;+>8xuaHbo*Cw6P`ETz@-w_(
zSic_RXEo6JgAeDKVdlMHSl_QGaEM851z4jqV=G)
z5{e7HfX@Wi2H&SNnMu*&BP2gsfbPl4U{b7TXJXjM$LF<9EI}U-@9Dvfg$_!mbkRMe*_c=xAFsbc$&IDRJ0P2fhU|0k3vjb=@ciZ}g
zJ!}k3t3m4ozcML0oM3LSW@Bjh%+1iWgqxvZ3O9q=iZ{$nbJ!R_eZ{73HU_mFT@0YU
zzM=y^qiRPWlWN5m2B%4E3{H!<8B}&$XEo?HYDx+G04$~cmW$V>CHZfT+u3j&|xM=+n&^TqqbH)sYX?=Xm4}@|U
zruHd-`edNB2%z@s0?=9nIR*z%zFhEyiD{A?188m#G_J$KxNkj39MpaV^?AVga>6ID
zyaMC$eo!9?BoAJTuuq)f1H<<9A&kq{gXjA#q4{#cBqmVX6|}w%WCo~B3+nHvTC{`3
zL2J0d`O?CjNey&Q%0v+c&|Li!hE4sTGQnZ75W^qv8T$ViKy@N$T>_|m2AZD-sR8B7
z6`;1}cOixZ#!da8d4JISAgFz)ZSkBbfN}ZyKMc#kYYo0IEMLEZaZ^8NzEpL>BqmTB
z=Ly5|e$cu;(0C=tjZXW;89;3uQ2P~R59l1P6^xtKH|%3)SircY|G)%xh9*ln2GBSY
z$iIp^<}n2@g2sUN^(!s_v)6_+Xw5eBsd^^Bl#8?_EgCeWNDXw8V~fg4OJAMP=#
zotV$`gkjzK0)~>lKMd>FgVNj^hBfO!^OtH9BAC=Z9AQ>tS|C)yP}~Qa)AK-ETL79@
z1g{C|5@!If(cUl4u!3>>dXPA%e%!*iZ9M~MuA@Vc86>a6xC1n12$p9$BmrJq3!0DI
z!MJ1n3dU{yp!Ee?KxIV7Mkdg>it2{zOe+|-t>3}8y&v3u1I=k4uwYujxDmY0Ky8N^
z6UbZ##*L6RYlk5755|q_)jGa{*Q|lY{Xy%2K=lWBu44swo)T2X_y1wszTRoSD1!p1
z&DvoKGIKph-4Di%kT&Z93nm4|9qSi>+G>nD`X4ZC1h4M{g&n9}_lI%E`a?Z}3?Ym=
zz-?9s#;xmjFm8mjSv$aMYWh`oh%;|t+`hi)pcumsM)3ShZ)#E$1GdY0fIu6_bk1r{J
z+pO0?>wo$c7`Lqlt)l|Zb#z<=iLG~F+}01W^9Jbr@(tISI2b|xfvl?ntt(PHV8Nu;
zah(aI543hb8+0aF$3^h?sRQGV^$Ls|*I!`R+ON1Egb{R41$dngsDBj@%%~U;$*2v^
zvt3M}u}je1LQNZZ7(nX;6c0!+scx9Y#ITZwf$2Ouc%2q#Op{?FJA-zE05fQel4(6?
z9o&ZXiXSd9JIrHeP+jl{)LvvdG?53SzF&1h5mVC+b_SIh%}fp9AhlciL36L*Ig1lF
znGQ9wGdS$yVNl)B!Km`#5d(OA0O*dd6GqIcJH(mPR)jLDEa+fV{ZPlGvf(87o-FMd
zI~Wu*beTYFNK`jmVNwjpWzs%zlUcE08*7Fb50<0K=V{;8(uRyePU%$*$~F4wqrWefw>^H227y(Rc*pCMzxH!U^CS^PJ_pK
zz-!)TY-UuMu!#Y*W<>GC0)`9VIdae%jt%S8Cb%(GFx=}iWqcr1!*IEehY>WdwxwT&
zacw_n9RVl}g66{xZ0BWgS|I`sTc-`;3?Ow3dAtmuJPOLUAT>;jL>N>TY+(eA@qqM$
z#)3fVKxZn0#%K;@iZg)I2R6J*W;-&FBT?*M88QEm=vd7{wrYVG<1J46|_Fs|)yS}DRH0h<5Zu!WI_aZA4r
zd2(ZtZ$d`0N0!?ccGT5j6g!wxE{@WQGLemi3^0Gujzv
znPeE(t_O{oh%m10*8!QkpcmwZ^&qn)7}xfL;veKM&^kv@IDzsksICUJOVn0uWdz+r
z#RA?ZwYDEr=Y!g-YCEApa`04Q#it`s4$vOZtmf8%W
z^1}zveLgS<42(%-2M?2qLI(q={#M*j#-!Hqk6Be=I)mbbO^l#E
zx#EwjpmhsO+A}UQDR!tp`skpx>xz|3pnWA*7*_U!)+lOk_{I#n_f&wPMWum3Q#F8r
zSA~Ib$$G_(1O~+k3z!r?JYZJbae(RZ$6k>u3@g|FVA$AyhjCN?6UHt5Z@~K&_w|F$
zc+p`n?^B%diCM9ujzMvP2=f`nCH;yEelqM~+}D4Fac93`#u5fag`13uC+;yk0F4Pc
zykJt?aF6K)KGjuo~#G8p+IXwz+-q3
zrx^kmmZ&RQykSuE&|n1L`J=(WAi(f>y$Hj%^%4x9)+;c4S#QAbalH(~kM$}H&(~`(
zJX){A@N&Hg!{hZ93~$%lFuYpt!tidr2gA?xJ`AtdgYMmEU|>@bU|6EA!nD6%foWgA
z4Ab_038roRB1~KR1(>$<^Du4h=V02@&%(5^pMhyZKj@wd2L?9K7HtjJI=ZSm_96F3!*8gDG-hY7MN8b^KkA0vzs)Cn+15{7_VA#~ZgTcLT4?{>F
zs7(!PL(bq~-~hEFe=w}?-@x#wcMHSU-UdcQ-)|E)0|%)8_k&?y{|bh~{c9Mm_9Kti
zoaJKR0FBvz!gm3~)BYt4-}_w{m#%-t$-tq(xPAQ(hOPZG7}oX8Vc6b>JO{$Y$-n`c
zJNdz|xqkvfTHh3g@;>A_OC=5l4iT{a75yCyEWJGpqP@uL3+&k$IBqa(1)JZ%u&S?x
zVQU{~T~Ih10|#h*70BKSh8=x14BPvV*Z1YJGH|?LfViuGVR>H(!}h)@jEHr+^(-L&
zg5)>%XD}r7NA*8T*BZG9;WOZq_jZ)P(waDevUfcz7|klGi+P}+yQ
z-|aXf$Uh+WuILY7;O-4!5a~tU@5#@|zyT_cNB4`5?iU~3FFv|o9CRn|=zj6h{ooB@se00C~=zj6h{ot`s-!E<_4cb2q+UJaYzj&k+Z2vUq
zj%UPv@ghn5`^6_o;NLI4P8_tq8nka4`+o7$V%YbKKNiKmU;L*C{{7O%PUiw6sW`~wO{?EA%M3qbaZ@A=GR!h>ki2y^>8WD!(
zHK$sbY|?i#+gLAmGHG3xY$CzXv_^)ZdCio6Og4Eo%r@FToJ@*7Cz~iRG_6r#XkH^5
z&t&7jl-cH^nUjgt*JKk7hNd+-49#nvt!1*|3uLyr*yLnVACzojz|geDgrRwjoi>vV
z>uhEl`5Y&co{VG@3x=jOHVn;c9Dg&}G|MyFWbbt{S$#9v#DSq{jSEBbnmS=7n+MU%
zHkFD_CX#29O*|Ny*7z_quVG+lSi{25u!e)-0W$|f!08u
z3>()kVc5TZ0mHuaa~QU-pTe+p{RDl+w0tXG`Sz@Rwe0E6O&1q|X02Lu8bCaU~r
z5Vc|WFJi;M(9+YuAfWP}VXGR$|0!n50xV40JCc~V1*7(jP-Z|U!0
z*xcX2u&KWVbRQ1GhJKJgRxs>U4`7Jwi(!c9i(v5YQ~6=ata8GHIfcQmPk~|QdX*ER
z%n1y>eKKJ7SH>I$pFROF`zm7wgLj__n7x&;gu$!N0L-4sSis=fX8~rHGS)D7^x1&f
zp^Oy_?tKnmwkcx^gIk{um@UfKz~I^!0A_z>=wWc_3jwpQGK4UM_jNEh_eFsDTN$P>
zIQ7MV*;5%*K73_L0JBROQW$owXZR$?pmHLVf#H`tgNi^1Lk7dn^(738){8LgTQ9+|
zf4u_3zJ3{o{ryaz$+$)FMt!f3&;vtNK=(Rvexwd;Kt7WF4EtOc35-hpBN
zdZtg@3@Hrz`y&`u_k-^CsbE;SUZvs-V*ta-ewBhNj7(Mh;Cqi54oNT+Fsxdyk}!oa
zgke>`3&Z;LIt=U9t1ztZXDH$Y*}a}2OP+z@5I2Jc=-ii6k_=2qJPaUrF?ew@NHDDK
z2Zgr>!Sst|Vqg;DWRPK4*)IS(Th>F1(S>1uzXZd|^*Riz`c)WK
z_JhpOU|79g)kBNXgkgWb0mJHk8HSbXJs4K?TR`P)KxgiHXfY}#6M;S
zhL!yV4Ey?hKym?gj1>&~`c)i67*##~F{>C{VF+N@->;%Dg+WE4gn`M4g8_7h1L#f_
zCMjkHRfiYMss?P#3Jm-EWk7d5L8oQ;i-2Q;IGFQ;7uwQ;t2u1cvZF0fznk0Ss~LLKq^~
zMKJiRi(&9zm%!k+E``B&-4X`hz6A_EeM~Xh3``+f3^@$m>r@K1GOhuo{fsS)Og@?n
z1q@#63>em~U%}wjr;;(1k;z4ap@hM6odUz!^;;M``&2SY8JTR<87de&)(J4IUB7|B
zqfaFxl#$6qjiH9YeVq!!+Vy)F-1}5AOc|MUR2do=+}7zZtX;o@!L3gvLzIz8MTMb-
z!F3%djU8cd?NiD4%D^O}%+SH$vd)5G?fL@@E`2H)R~eX&*fTJRC^7UfIIr_ySiAlV
zgL9us##V+I4E}v{7$W;J7$Vk9U~pP@g2AcJhGFe`m5iwj4j}r&S035EoQ73)EH
z$AV!+KPca6Fzi^b!?3?!fMG{JC|@!Z@iBn&j>Q*-6oy6XWf<12H(^-RZ@{pwACxW`
zPDwHtFsxk9;Kae;!LYI)6px^M0m_S@{HDOLemyAd2Y~E6B*DNG#SL=9dQkpKVc6LZ
z%9|DpE7oT)EMKnycEj@i2!=K51sHa$cVSq)-iKjLzXK>g7V$B}FsuT(ZM_Y{s(ukr
zz7k?$0Oco@9bcG2Ansc4!LV{YlaM3>gBL%8>WQ}usugmK0u0OhT^LsMGwl**U^v9Z
zz)-}^AOp%fQJ_4uuRnxgO~2}n@5~XPbZ+s2L4;xXdesacM%9G-%qk4~`eVR(W<|eh
zzMplVee?lW63?CZ~f<^>6c4NEuB?D89J_A#ZE(24F4g*t+
zJvdD>`RFl#(kv*Ag3=@?4T91f(;jn%BMdI*g@{uUi1l
z8$Rn+FnF(9!{D`U1B2(fEesy(b}+cF+r!|t?f`@9x*mQ89z_KQCKd+gz6ORQ6>SM;
z1{Q_{0Tu?QbsP*%eT)oFDjW<>>lhdu);ax45K~lOU?`Sn-~iQMEDTLO3=GXZ0sr@^
zcYx~8h6V;j1!smW3`^H*3p6nVFtDnvVc5TZ1;f7eOBlAVU%;?!{Tzm^>t`@*SwDqg
z^ZE%4o7VR*Y+N70uyj2OgM$DI1Is!N1}3PTOzT1zR`fG6B&js~XH`*@U}h|2aM594
zNL}E>)F8mXz_hM_flWo(;1ELy=5vX4DC}LpPB*wtB
zN|b?NkqG#nW>7w1Iwi>fs(V275IA3E@iH(Z@i6o-F!ibI_{gNe
zZM^`)*7Z6JTh>c3Y+i4`uzx+M{uN=^u|9=iJvbj{Fsxk<%8v@5dMJnslrQ^p7*?-0
zVOX`^23$w2>UUsR)6eut99+Ju?yzGnU|6x1olAdrC}iW}@U3y4|k9YA(0;$`rFmj4Wg_!$BiHup0maWd#ItnPR67h^DB
zSPwe)sGli_iQ#~ND1+*X6U-u@^T8Qb^fUYdoxk~wk)cSKLABxpv+9go#tepS{W1)z
z`$27m9MFAS8D)$r3KJPrBTg`zFl_4wj%|A2M$OufbLKL=Phtuc8^I_;xMBFNM1*k;RJ)kx(Wui
zbz2zN`oQ^4Mwy|8fpy&m2G+g?29|X#49x5HFtGHgNL*qtU|76fMPd_!ip56;5iola
zg9Nw@vv@tItlYuC+y}bZ15=6}1Cx(AgNj5E1JfL129$CDRIj;c
zFo5%Zh!#T#gXp>`45ED<4B~wp3{2}-7$nvOFmSGmU=UunhJmwh0)ud041?sl1P1pB>?)~#S*?^9q{ydLB>
za9Wlq1gA#F5AIGw9x0)r4+FRS!=_)f1HrpfX!k
zqJs&PW>gi9FoEOihy?>v38?L&!vJb?faA+VjR9O%%P2E|%4$%2gX334g`tN*eBA_a
zTnew7!63PA4uizH1q^)amN4+FTfxA&ZVdzbx((no$GUC@1IxNS49x2eFfgrCRA68_
z!oUD7yU#E%tW#j%>C<80?o;_NiBW@rs}IzkHeulGQ~6ND2nr7a29CZ6hSlp;B7zuI
z7R>SWEdp-9Khw@
z>h++oQ;E35;KKka16QvHwX0MjHZh1WtnF9XafwM~#Uv(`8Ai-12@@GTKxRcuV(%03LM`x$15G6XPe?FZeD
z#Ly+k07^d*;I_xc^$ba(3=CZo3_1*3`xy?&F)$QyF$gg1>z4qvHL@Ug7ppL=?l)lA
z-p>Ro-$7;jDM@;uCVqrI4#4=VOZ4f!N9yugMoXU4g=RZ0|w4@CJY?w
zEEw3=*)XuJb6{Xy=fc3UPJn?~je#M(hlL@nhl3%thle4hhnc~B1p|Zo4t55&6)X&H
zJGdEKS8y=6?%-!|S;52LvLl3HN523=vdYK*6(Rx*PAZsV7EJ3z7?{^#j#)6RlVM<9
zhdE}!v`&SAc^&4M1=Bhm2Ih5`V-`&7OcU+|oY
zU|{XD0Lv*erZ7nMl`!!3)iCh%O<`c^1NDhjDh@MLFmUy$e0a>HvSBfk%7SDjl?lpB
zDiKMHDh^DHDl?LpR63NHJiulwW>EQ|%na&(s+>?_R*6{5Xv45#y$?vvp_x&oq8XB3
z6`H_x5va~#0_E39LJUk@f(#9y_S}v~OrWyN0o137aAs6VXkt_eaAJ&LSh8LKJg%^9
zeFDQ4a9IK>=TjIqtp~NIG#ECnH(=P<&!i;Ipu@0peGbEp^)d{b`yp+J?fo_kJNg|M
zc7n?RP+tbrwgHtHA`F}Q6&SYkTQICy@4&EneFMX)^`Nl>ABI)^0-%0v!68PKj75x~
zx)J2Y42Jz6d)9-?4v^bHWdNuRw@aJ>bUrtzF9j--L>ShsFJaiczJg)fdQhLVhGF}9
z6NVk@LE|zm4Exr5fcieOxEMg=6{Z;BBE
z(;s^VCRn`<>UV+qU!eBZ7Bhwt2Htf&46N%K7_R1P1waDGU=?N*|y)*oI*dJg=xQY+0|t
zunAi4ZUXoDWf->fD==&W_kk@K7WJ!0G&3+L@i8zI2{ABC0=4ZxZ9X{$hEGfkHVliv
zZ8}grB?2~gQ9mfXsqP48kO0Y5@iVBd2xU+Ku|fF(G(O7$nxMVc=c2fq{G776z_$I~X|EO<@pUH-kZR-5dttbqg2-!R@p?3>@o@FtDvV
z!@#ue00TR?&31x;6=CA3=FIXnQV5SX12L8&&ecqE@Irh#*E2kRuZ!f
z`&B0sEltF@dw~IyP2@yo8}YkNCQ*#Z@Nsv(?@TuOqRcjykxnKz-XO-^5Bz7cF-~W;
zG30hKNmoORyGLX&*=*@!wh9ikYaf%%R(EEb
zCH_t(vL2)3?g^vg?x3;n(Q$WBy$2mvA02o1?gP!wfa>ys(Q$Y1csHocIXdn>I_?e|
zcL(>=NE~+$R7D+k_xQh8eFDsK&rTfc;1>-q%@
zTh`BE*t~uQ!>09n7?!RNU=UQpHs+2PZ&zl5jkkYeL>+HeR8V39yI+HW0eP$)G|mnh
zZy)Ys?HUaG*6TpW+6@@CtQTR}ydE@<7QwJ{y$r*S^)U?V*DElrTb}?OYgYk{g9mXj
zfcj}E1jgDku#C0qkT}*38izw3YX{B!g2vh<7}obkfX1_t#@c1Tb6wcS+7lSIf%|}<
z`LGl+#@aK$^I(MxA~YOpmjI1VL&w@>!0bs3p!oyPST<-(3^blS7{}UG2#mFZ=5jz|
z=rU+y?V!0G(7cWW(pWoa+#J-m1C9IQ8fzB;jje;mUsr5o0*$qU#?(RmGW4-_&=@%b
z6~@{P(8k)qeK@qScF_1cxc_Fv#sKQaql~qK`fkLGwS)R>KAMoZ5!l!yNn`EYM2)qB
z$~(|ly8#1Bp9N^{?ZYJa*f?nH8ZJ86
z2SM`}p!p61&^%%h1IBnZcpSbEJZA|W)7IF?0GiW)jc2QL1Tuiu$bjMuyw(IXuCz%E
zJjMqT&9Wl^MYW!`lv4BYE97&zDIFtD#PU|?Nm!oaf5hCvWKe(b=&LDCp9
zXzUm?j{NC=26+4!v+oTVKgR5PL&lFW``(c8W6ZucWc(Pj?+qD0#_W4T#*Z=k-jMNQ
zSl@dK!~T9m{~L4scmu<}{xuBS`&Te*>tDjKwSNJ_mi{>moBL-lZ0euFu(5vvbo_V+
z!(R0U24)pygCqvzIz5F!0%PnLG@c9^KUO)x%&c;Ni5WDGY{0N%J!m`%G>$9*W<$o2
zL3N2dIDlct
z`Vi=NF{rKrjmbtp=QJVnw)^{4c06KI0gW#^JZ1pRse{It4H$OzgT~oFW742GA6wNkR;u
z`81|apu4C|8A0pnGQjJ}Hi5^sRVS=tWSAw%psMhKS@pyZM$lNbY6WQh+1maB&{`UX
z72q{+CJd|kRSR+%RS&#iR?X021g!-EtyQXESP33;Rt4Rc9RXVNwxS<2-V7Q~2F+Ee
zdT=qSSUh6r0O|j5k7)vfSRZI?88r6Vz`(5nY7a1g$LqNJR2|$ILF1y}F=tTunW=Mjc-U
zjVFV~l|l2upmAnU`3D+v29WT
zBtY{o>na%J!Q<3R807mvu9_%!ip&b{t|-nedny
zJl34i3{ErP`5I6juQ-etWB&07oaa?Qa~q&}99-keo5UEvRy
zHm#RnShHS%VN<^h!y51$3uv4eoCg+(faXirgVqp$*KROufsQZpFfb&6#+N~3%S;Ro
z42$|f`4XI-Pl3jqA>++1pmAhSIu>GLkU<-776Hl45(bYqgT|FX`BQa9FoO$;4$Yz5)2HWe1mJe`9K7NYQ{QH9moJ$
z&!Os}$xLvp8I&GC=>XJrAu!&&fI)uU5(bHND;W4u#+N~B06^oG}f%B4jF6y^Z);2@M*?kn0jP0ae=#(NE>LdR8?v)!3JMJ@Au$;a6T
zFL`~OcQAAIlgFz57H#hP-fz9y(|v62LH^V^Ys$|o8Z+OD@e&6x>$o+@<
zSJ-~$esD~6IoD+OiOa9%H!(j5Og_a{kjKZBuBj>VNB@#rE7x{)wUcTw7K+k(Z?%p@
z{mIqwy}x%RLwXNrsF*ta>>fS{_mUca&ObU*Es=8L@SSN`o8$*KJDP5$Db++kIhL`dv(rE{S^D5
z1B%CYv|W^Y{ow4i+FP$GF6OKknD|1T{
zlNj`hONtmdnxj{eT2aEFmy%eL$e@>0T+E!`uSW;4ynN(VmT8x&3@N(rD7#Khk^lVU7CJYP=E~}s%
zkfWhYX$A%cPAD5h-Py>%aDb74fg7ryg@J*AgMooT70PD@DPmw?s6a9cBm}YxL~BFU
z6H;fuz`(%9z)%3v1HvHlBtQ%(2H6YZTcX)J0f)WrP<1f>g48vDMvkE7f&2hs`a{)$
z><94$)-o{If*4Q?@&^blqj(FfuUkFfcHH%mDdU02&v_<|S-oV5k8Z0L374piC4BS)7I8
z<9}pHW^hVCh%lqL803By1}>6w$lmTIaNlf!$u?d!DU}oTCP=heRBq$tp85kH6Y8V(U
zFfcF(F)%V%fZSipz!1X@;k$xWLI{w09|i`7o)!iMAAX2DDE@CuM(9swU|?7=1)(35
za9QRsFgWl*)H4)kB$^r;=_NCS6eZ>rr{x#r8e5n!c$*p;Aw(E*Q*(<`OBg)!GE0KN
z>KPzZXhBM1Nh(M>xu6m%=9Zb4m;+M^GAlSE(b&QSsuaS3s5!#Oz`)AKz;K6=fq{*W
zfdRCGh((ZrA;5-#0YqnjXif%(1}MD%N*{pI51{l9C@o>jz`(-Ez+eHTBcOBvl%4>k
zH$dqNQ2GUw=CFh4*MQPr>>=*sae%nbr3&J%1}HrPL~}AQY=F`ip!5eQEl>?L4@!GL
z=?o~{0i_o}=>t&u0h9)1Adr6~Y9QuVK4JzW
z^g;LsCPVlaptQtPi2f6^A>x0abjKWs`ig}R@t7qLzRoHL-v&x&pkP44e!X{_j<1W>}=7!mw$*0>j4jG7KBQYidD#NyUx^2E~R03>z3HsT49b
zEMRAF5Gi14UBJPxNQa%lL4bjm$%aK>5d$lOBTMjqCKWb@MLL`e4k8Q;Og11sXm5uG
z!{&Y!@YBLbB&%=@*U|?5KR7eN=2ee)ev<8ELA$gLbh7%KL&qEADnuWGP
z0D~DrvIPUfvIPtb$&0@KZxCT*C{`0^fV87Q_Sq6)ALyRtSOx|T2L^T(M}|i_ss!{n
zFbJq9FtDkB^e8~}ND!e%2dYN|s)w5hJqA!c0-*3Pc)*~jkN^%7SR8}gqAl=&VaI<5
z0Z*6eplMVAltu-Z7z~(E)6@iJ
z28J!n3=B7z!HqqJKgq8Gg-i9ve+;(u&C^3VBjcZVp-In!NgF(+@ivz&|1U6
z&;Uvw3|Ckf7&fplF!Zo6FhnpjFl4YWFu1UQ(k26wqJ{&LqJaVvy1PKlDUiEBeXzl%
z#(r~#!F5u|hiN;lxN($T=64oW8t
z3*d1o%a9OI$fU3clvY6Hj0-DjnuuX#VEDtzz!1X5z%YZAfng0B0|N^?1A_sRks2tT
zKuMpbY)f!q$_!{h}R*i=A#uv!fUCXjvT@ekUQ3yObO`bAD_o{XThrUFiD
zPgqgY+8cHTh7;@z3`^J<7>=+qFf_13+AgHHPlN>bkzy{Wydl=#_{;^RJCHfB@Pvgg
zG2uyyxu9|jWDhasg47v6;~V5YP`w4q7qIvuRSn2rgv_Bt4JeH{Ffgh7Vc>^U%HYxp
zi5QH1Wg7L7C6KxnpgtKW6wv#~0(=Y%511LieI`)L3#1OD4ZV--0}=!o0L37+ASQYr
z8J9Xx9~HTe3{nT`6NAhEVUWEbK6)QH1&6(`J~GH$kbaOlY<=GVw7%~`4&wU08#x#l
z5C^
zsBg~z?m#6oc;qG~2d9>Jr&c0&n~^%(P^OWoS$uIhObv|bn_>!LLORx1dfCvvJ4%Ng
z!h!U{gEJD1OwAw~p#~Y5nt|n@TogIDgl~!|Lc%x26fTjQnhP2Y0Qm}{0PI1qG=p@u6%>FW3=9mctdKDyHdY3P9tH*mCRPT92~c_pl%4^l=Rj#t
z!4Fcmf`Nenl<$r}%{c=ar(gj;gJ%RFHK2LJSNEAX=D#p#nsUFfgnE
z(X0#%pfL{?Q3i$!Aifv_!vhe_%E0ggM2j;purM(&ut+d4h=6ET1_n@CVv%HEumJI;
z7#KW2G%EuGs0YF#&A^ZY;>$2F)PQJExPfR{28IilH&FTml>P#xe?Vy#
zP`g};fk6aBOENI1KxqRIEychP1EM7u7;-?gI0HislC
zSP(l_1WH5bV?`VO?N#?-+`rz1am#uS#;xlW7c?+9Fm7IN!??r`pf<4yYHh6X_!0ft436<07Y
zD1gs8GE`&uFRa4OAf&>`uvJZjVM7oL!xV7831lE>AFTkxQgwEQ#YQR&4lIfaTN%Fo
zFA`y3XaW^oJRm*T-0=SY1~HI+kXecf4NM?2KyC*0K@1p{sDs91Kzs&9&^XOfb&wiG
z1CWsnJPeHNDn5++`xONk7(5ua_Pa1{>33k<+;79Uso#QeW4{R_H{xhqn3OF-}LHRfS?^Oqlvne(#U;vG|f$Rm3wJ9(#sW9vZhob<)GVoXz
zXiSNPK}Ai`04&$9zyKLX1C0e}Fzi(a^}v@aXHPi%8PXzpBsVPn4tbPNYH&IpN%5Qdr1u!qG(7nJ{p!5$pJ
zV80*}BdDKq1*t&}YJY=*0llBo!_L64fq`&8hXc9M4yp1%#xbDxb8x8x^+%BVIUseQ
zeht_VP&_j5q%i0S9VG85O&$z>+4pR)nfzJSi9;_K%K
zurn}Jf;<4lFn>U~a0*#`DD-n+bBZ2}kaoKe+$WH5RzTx}3VWCks2>1IKgfJD7zfn;
zXF#2|1*!LB0F~1W44}C@P`@CWfq`KPBLf2{eS!En43KuC0MtDU(8@F!+!YAQOJ@j5
zO-ymlFG>x`%uOv~CESvFSRJKB-JS=
zKRFv!q_QNH0VW-snwkRg2FUNAb~b2UhJ}xT!3LDh`5C|?#h`XFXbuDSV;(QDY
zJfLC!U~hL=
zSeika9YoAgf&9XNG)Kh^UU2{lB`la;Wi+vCHmEQT1uAzzc^kHN0hA_?eGV(16`^G-
zthhy22QmYsPaV`yKw6i8OPvm=Z-=x71EdaA&VtMUVUWEbzA2i$p!@}rhhdn#&QNur
z{05Q(sl!(8g2a*6R&+x1Ge{2z!^{J%i-7qRBtDaYfguLOfMS?B5RFuwF>GLBU^oD+
zxA2v_1vtuksPS+LWIl{TxZFi{321EvvJXIfWYa)=Lh3=W0J9yW9@P0n=EG7AL=3!E
z0wuF1gO(NK7gd6CEhJ0A^R5y0ylZG`2+h2N=a)fiSdjY+ybN3n91Ng6T%hrpmi6om
z3&3-E>inlJwS{{WZOkg!*r2gdkRFizAU?=EY-Lm!+8DSb
zBc#m&(gVUEGe9(Y8Kud{z<@ly3R4H7k#qVCW(I}^BG!LNure@ogDiq#kU3B$3WY3A
zxQv3u4#Ws%2FUs^Q22qu3AElz3e?_!Vh|s4rf-FoTqK&7*$AGa82{a}W!qCmS=YI36g9pus7NF+R4mChRg=hNP>fj3pcs+N
zD8SI);}oaOpcs+Fs3viU;rI(48%2%vj4BezjA7e*Ow}aP7!(uMFeoN8Gm0>D^f0CB
zFeoN;Gpb1>F)FC=+9+zAU{H~0X1ranR#ilhRZ4l~LyboDe9=`qxNWw%i*ILoLev4(Ly
z|8o^Z3wK5piNlO)5;+Wt5w95(Es_~I7&fkVvQuYJV3^p`?#^tZXz`9gP2()1*0E$0
zMG0jl6^*A1Y8q=96cch76eU_2nPin2R2X`C3|4U3C`zO=sA;@o5O&j4RrKg&RMALf
zP}5k)pqQb{sOYhjQGj9d`a|BD3>plRd))rA+9-M`Gpa?TGcZnFYNDu-%A^vZ4dOF`
z-K}w&u}MpnL5HEQry&y*zAG8jGL#u_%*ZxXj5y7xlChRSEn_jGqD4BRV#Hep1%~bG
zc^EdWH(;0!4sVxkAsfYrR7N$6l?>~@2bn2O_{5}QkqF>r9|9SJc?b06ITa?wg#A+J>zR
zNvikM6+irARM~KtNo~VbCPjaT_&@qs$JQzndxUn9itT
z@s&Z%;wgio#A7DK9q9~*_L?&&?)b+Pr^alfX7P_HFbd=^WkwZ?rwnQq{}>cklrktv
zEN5zxQD#t-C}-IAQp`rpqMTvXaZuP!V^XpB$Dn5Mok0;Cw#ylqHk&ahZaB=Oe~r~f
z&EhaqtN_R_s!S>t-x<^_9y2I@*vFu#ah&;(o+^W)#x@2QCUzT8SOklJ!=70M6b37{
zF)8l&&Y)=VmFbYJI)kFcQ-*~%L~Yb|JY{Hnw$%(2ZYn#zF{$l%%A_cv7G6|Z&03aW>nen6dHzQ42lxhnV6(O{wQStrNxJepfD_Dcy{)l
zx#EX^Oe!0WL&8wwD6`^+ZO|}0%xr#G+(u2~F!MF`?`n!W!kJVwwlb(`EM`!&c+RA_
z<0(80uYM7;QPcRx)XsZNO>u)6vx>%I1~rX+42mnRGAV9Y%G9(46gJnHqFg~?bDim}
z2q#Zt5|e9Vxa4hqA^3^$oTX|a?E5;l)P>5EBm#dRiF
z7;5!`!eu#Amk%gy$uX(yILxG|ag-UH7I$oC`1POFhH1AsgOlY_6~!H2nG`itLGi$#
zw&5F-;)XJY!gf|0rtM}7jo+4%mx>a}OllVQn80}jng{mp6SV>D6)xDb
z)l5+$l|gZZD6^WyHdwl5Qv7h7dA5c)*gePUzN;yIILxfLqnuIAA{COCK;g6FIMc#c
zVm3_s%^7~FUsD6+J;e>vnA9u|Gb87t_gC0$oVJ=Vv>H5D0f(W5Ix{G3scCEjz-jZtJ|@K#N13nOWVbP3Xzg)YWy)ZA;kgMYTtRW5
zrcuVArm>X)lFyzp-F_x+!(^|{@O0*PGewK942nC%LFO>2X)I?@1i5>|QKm)mtYA0&
zs9CC_xZyYxsEktE@s&Ys$2V~ND{7Q8tU1DL13E)CH4GMx%#3O~jzjV)I2^Y#IY}uq
zXnqm50r^3Fg&2d2(swn*1=E>8=jVdc?SghDMT@CSO?K)GTF#<2p!A}?fR$nT|E*@K
z3%)QY&M0M4oKeQ4wxJo6-k6%UnlVgSEn)+5llly1hULmr)D$O#FsaVC%%nCW9TeY8
ziW-|4oODzfCjSw(0mZNS1a=0?1;u8H9mY(m6E-oZO$cKG)uD2LHOHDvAY1
z8C4}7Gb$DwXH=7@0Jklg%Jdj?{;}F97My2%@NB7xx`YISV#ZQN&{@%n8QU1uB=Q*)
zGZr&8C!3>*3b7@F3EFtn|SVCY=~8iUYa*sJcE&Sb-=?4;tu(6r|4dnTLC)lMcLb-QLT
z+5EfXWD>&Aw8lt)$)+sCNhN}zX$|^4FrfK1*!&u3ZVfc|rUSlnWb=B^9Gv0`(Awk!
z42laDFbFdo5a3~$sKUU|(gRxm47#sHdxjGew?HuTu9pVHT`x00YuuOgDNg{&r7$rt
zELq3HFhM|Z!DOaS{~f@0y@2M(2+fay=J6C27BI0eEbarHvG0I#7XPAk91M$~=i)C~
zcl*DC7z4wCb=Q~}I6!8@&fy2O-NAkVt+Q5eW&oWB1oJCsJ`*&r2%1miVGts4_K!1@
zCG@O)OYpc6(>e?2S^J6#PM|I`4`{BGg@GA#{&=60Iy1uo0Vak663h&W0xk@YGs&6P
zSu;4VvS4shV_0Nw=xns)+?hk(W^Kw}!{V^=XqW`T?XsRhyKV^_G;fyR!I
z$F4x?Kx0)PGe8(*FNhBslK`0w8*M4UVJ~Rx3ZxEXE=WH}9kwwkP(L1d+k
zc^QaWm&qc)0A7~`+WQG|D##z8u@cbuAj}US_o)anFo4GTL2M8PxgA8KV`Oo1#-w1o
z3TJRZ_9P;kPmeJs(AXZxZcwQU8bbn&1>N9+tc3&d(br{y;%^H#149XPei1bO0&_Dc
z9Ki!DNE-yf(~i((hbXH6p)3E;76XEI4l?L)L)Ot%fM_-bhBZ)Hg$J^?ECWP?)+X^n
z_yQoBje$V{N+%X0Egn)p8sjm?KE`8VVGfxzAYzPXbRG|~FBmo>1Da2R#XpD!Kzu^#VX+S}lc+thjm=m)DU}~H8L|aglrH^AhovX$FSSn*U5H
zU4l(D3NB1F91KjX^$bo1il8>1#S;c$h6f=ac?O2X;Px{E!=W{b4$chP9xoV}85BT8
zC?}vW>HlEPtaZp4v?83wV)6ZVQB6VVOZ3oW#G)9
z!f+sjk%38tnIS1afT6huqz1GOOaLk`1C^IzND={w^Ds2`@Id86p>o1dIS#OXh`D@F
zIUcAS3qx}c3sfIFRF0J)DFkFD={xPa`|5^x6l3FOWd|3K>_H?8+z+_*l3asT=N
z#?9+p7&okEU}&1a!oaKoTI0vT;4Gjx;Q&JjrWz@R1QsR+VHHJ*UluxiKs1OCT0aP5Z((v(1L?tKKPXO_7=l%_B{nl$`=0=Iha`i8
z029a$0t^gYipq6}I7=2&6>wol1?^3h2xeerQ14=AQ0wAmQ0?MpQ0Wq8Q0`)2P@l!Z
zpf-zxL3I`ngUT!c2IW~>nB3RxU~*fxhskx_0VbDqVGIl$N0^+~f&JLPz>ozp4_r|$
z>M>y8R8f>@Vqjp%n83`yDagd&p#lo~lK)I9ptSYpzk(=e?<_c7sxZ}XF*LB$Gq@Ni
zN_a46TRaA*OORSY1}7E}4N8|F{R|8%)+jo#Flr0DVBlhK5CO@7;`jf5PL==vTT~c=
zm>Ayu?-XEUNLFEFNSd&Zfq_F+z=;u}7Zl@%dO-a<&>BwAdQMQk4zzC?w3k{@Vi9=n
zGy_B01W>#)F|ep`G8_?LVhB@4NpAY#_6`1UJ<%gZAAjC@?WH1gZW1UkqA8#UsG5biDwB
zgMa|T(*A1<3>=gGGpQ&}aAE@4aqoXa2*@ppGZ+~D|7TGFt(9aj5@vYz-v#RD;t9V&
zex7j|ya!uR1H7AqN6{dGi3McWgd!#e2BCEzb3x$-PG<@VOdx*IeCMZr=z+k|@ssh@Z%fZkp06M=PO}K
zK-YAF`b5-tqd5|0_)|4#t>@9lp`
zymv{m)G;!&sDRD~WMg1b5nxCX0Nu|Z&&a@0016j{Rt9Z>Ckzk&Bc}y6mH+>jsxUY)
zF}(c03>q#;6C4>qX@Q9m)JGFxSPEKZ!y~}3O#R}22NqCRb22Od`J~5CNI>=D!2W|Nl%XA`DB{XE3p@<6&T32MXgZ
z$<`XsvSmhwr7DmACy9XMk;Cfle+L$j{{>klv`$eXi6MoFwNHS7d0m&{
zqM8K^%ql_*%>qme&MFEF4C_Gdw_sSJew=}UCxeMi?d*RC7LXf2X%8f>IKhEIfx$^b
z36wrTlbH+*JRtFMMg|U$pEH=4*L6uQt^wu8eg9Ly?q_CjQRz}#Qp3o=tg`EWvj|8X
z3xl%?NF6JKlZpZZ^SULB3>;whX)I&V7I@0A9-Kx5RY2+f|9=jZ|NoDvFnBRB?D&5I
zo<>fA(})ry$bOLfBp8;e-~R6)qS)cUP{PEb2I7On6%8DiHZU@9OkomQhp!GXV4$oH
z@nc9}QIv3CU}9iWQB+7`&{kN&@cw@TxO{*6KY;~wCS#YPQr+wS%_5+>0agb*`=059bO#)l%qsFk)mOri{Zp*=
z=Rc(WVP|6C0IA1S|D0rUQUldHp!x?^7ZJMeNtnTT#dAi``4G-KK=la|Lz9ZO#3F`8
z&^i&cM_*9_RCcmM>I)}khL!)@1sEBQsW37ep5VpAz@aL^%*Y3FTLS|_$G^Sm1&sUF
z2QY3}U&6S5eGcRH^%;!Y)~7ITU7x_XWql0e=JgSbo7RUgZd|YUVF80A1E`K~U`Sw?
zrjo%V*q6e@(#HlWCnY8_Ffb%dkYsQb$YEmZ1LbW+23G+l1|>C6xmm)vzrTQSUw;nc
z_WlgUZT%^XTl*6jxAey_Ztjm@+|(b!xUoL~+TN&O+^e3zh~4~`|6N5u<})%Vsc8!w
zVtDc2L4=*bP)%FlBEz%)4&bsigGq3mqQpdoOeWAm&7=w18iyD_X@Zf#RIN*KYK?*p
zOU*3C1uWokPKiZK+6IRiuKzy()_e8;A~ukFVeJx7{>ort>jUL~WrK?hAaO;Fji8E_
zN73La!xx4F;vg{w1_mA*2GDr}%r-s@$vq4VEH(~|i`O$SFx!C2KpTdZ9uo=l
zm=t$_&iq)i-h*-RdTohN1`)=D0L2~GnNpaT`wSV_RJt^iYI2xZ`nEHG%64}ZP)kzM23k_bNc=-
zfRu$ANem1O%O)@~Y?=_tz^byA;iw1;1FK3PgR2k|gR2T?EL3p3;<_kUJR|nN*Yo
z!WrZl76@o92xQ=8P*&3tNMev?a0p;z5K&2FXb^K@T-vWFaGi;n!F2^FtZf*YRa_XC
z^s_Le_AoHG>|h7qla|uM!r;1thaq(WFGKPKZU&bX91Jcyco|r0L3XNZul6!
zt0^j6X9CrUpm+qeB@}m*Gf6Ty1cBs1?qOjtR0Fw5t3!!Nm_Y$7F2K+r=D@h5pMinZ
z#)o0C3dlVy49OFi8C+I?+`xil2P;-PJ~M&LR}=_l*vtee%UK!RR6z9=3xku2wnZC5
zmu6~>{{IIepm6CDOsY|^VXEn7c)+4);l`k?(9WO%3cC&m2DSeVETA}LU}RC@WpGzf
zR+!G9rSOD-k)hp!nSn*ck6}pwXrDg|1CvSu!y*AtTcd+vkpMdblgeaVUYkU1Cz=MhDG33FT|~ZaJNb^gO0@!QK@HG3Q2bsZ49jc
zAAr-+9?-f<4F(2Knq$ynWng4*Qu*`WO+-~=Im0bb+0(Iz0ha!L{DY=H%k&xr9rhYW
zh6OB&8jl#XHCh=yLgn87d&C0Dm*8;FOsd(#1hU&*MbSWs2^3Dx|3U0s2#K3@iXBk9
zy95z-cc?Rc2H7p4#H7W*q_U3TkO(IOlS&&ykQF0?tKLhH9Apt9j|Ky)+6r*_!E7VQ
za70*9B8}m|{|6zUFaVt;#K7R(1B!2E2Im!^F?<$=?`p90gqoHVnBqX=K;~GuF*L*7$!sIQkUBwtAxVXi!DRvygYyKC{}~uu7cero
zEMQ`AUI218GsAbaG9*1B3`r^vm>D=k7*Zz`z{QztByjjS9j=DeMuA}wSg!)Z(g}%B
zaSujN8x)l9A>j_P6BJgFPZ)L~cxjvF0@#VVk@NKBakDg!{}0?0g2*`O%k#sDfC
z1EJ{;RIVY~RICh3|AE?6&s9L>uRIF_hpL7uBPd?(gTlPSfdSNi`2l8w!oS4;G#3P_
zhiqZytzcjg>WZ%n;QpPJD8ujnts;yJ$tqJo`Xv@Ifzq-&C_V%j
z7(j6f>K82icSvLsLy#57U7&Q!$PlE5=-WW{%z@_hKyzTQ{tc)-4({7@K>Ic`4lr;s
zvDnb|z@M9oo0EVq#c@)VJFKN@D_#
zz-Oa@?rT(m?v(_MV@430BKaQ_6lsoEVC~>T(DVmR2jF%v
zC_GzK7_68Xj{k2H0QLJA85U3AVFk5=A2Wc=1GyJuAIL6{*&sJQ@v<
zV)(?uz|keiRA=yeulf#_E$g?iY+k>CWz+gKEF0IKVcEa_1k1klM_9J6KftnW{T`OB
z>sPQq#@WE}13I^E!U6`x1qT=uXFOowV{jJGfX34qmi_%FSoZZFVcFh)fMr|%9+s{B
zJ6N{#Z(-Tozky{_{~DH!{VP~D^n=EDF0g?5!i#i1!Q&7z7MBJdi(^&+jZtbVxG=qf
z#^Lk-4lFvLxKL1F(qLGs4$4mk42#x-;zfgD@%jhgzABRn=uBuvP&-~hiRs_}<_X>m
zsRIB1w@hGVU{zseNEP5^U{*0(oRL9P
zg_S`-rAtx?Jgxv5zX9E+2x`9`{huTPy3|{X
z_x}VI1BS)xVPn55elTI!*6+x0NNe?f2LVv}*I?M*?*JNe
zG&sPds9_Eo0OtX(by6^6Vqj>V04ks6|4$MD-7mt(a7e97P^pfU!C7ba|AYXLekO+N
zYM{QU;s#KEidE(R|6~;gBQXXuhExGYh87h@hG`S#fzr{2YYf`ZFzJDY1rvj)N(L(f
z2M>dQ3Z$RbtfDQjn4tw4Z;BcUOrW~=|9@EeWMY^APoIk>Yyp`o@Q48vUZ8k0U|6QU
z0JI0%!hxw6>R*@~D1Jfl35wessGJVN;{GX2Oez`wlfd~E6u;H~A#P%05Kv)8avx|<
zG{~)>xKk7eXNdZLfDIJxpf;jC1CtQMo<;rWaT16YCm=V1@(;)zUQl;{>@{Fm(!YRZ
z(R$Drxe3F*{>coBgyyg;SJO$>{I6c|`km>HNx(iR&7vq}yFvk)r-vq}g9v)BQKP3qvbx`G3fqDBLg1H*E4(ETEydkZ8O
z7J>Jy%P?$RuQJxt6heE*%n^&2SOL4HOLD>gh~_5UAeya<#B
z_kr)mZUCp*2TY0@c91l?;~&#qRt63YhVAPWXDBg&!ZC>9kq{`{+!!7S&0ty94~i=m
z1}32fhGptJ3`{DF3`}7sKzW1_bcTQf*c{M4{5dSk`x(Gupp!)yz~iQZYz!QrFyUcf
zR=M+!ISdr`j10+Y4id}^jEu<|*Z(C1fW#OWLFW%JFlZS}W>BO+I%KxtQifkg$R2P6iP2Z@8y3j@;`>z9Z&ST01&>0Wl
z@fnKRe@fu-ZAm=sKTsLRz`(K&(xyvT2b%AJwb@{8x@&B(Hk|?!vOKJ<1d>N?D_w(?
zp8}vV8B}&IRbjAVVz`ggR$^ucje~>wK#O`HWBoYV!!!sF2_nM-*{`s$kYZ=xNCLNS
zF~b5R4w6R>i|aVT;sH`vxIx1LG$#a`2LjCvf#!uk^Fs^_i@D*9|hA7p%s|Ypkas12f1k=@`O4C
zX<#EocLk8A%OSU_@+J`Sqf`TtH}xf5Io>p*6M!W7o;IDsSm
zTtrGg*P!VK7LGFD`+PR77lEEr3hG-bFl+(O>0s+$a$)o@xAcSVmX|;~+ZK5a?F(8T
z(-JK_-$L8?uh9CK&!KfJBf}Jxu7x6XpfdK+|0Xd|TMoUCiLHP64j%Rl;InRFWfiD@
z2?}3G*rUpU`j;R%NZ6ywf%=yqIqdyQSiF?11KEolFI#cM%YLMIvEhJ}aWDSwRR^6b
z3<`S@hW+bPm|EB5Ftx2IU}|4e!ql*)f~jFm4O7FK2BwBJEldq-I+z;P^e{E7nZVSr
zW(!lp8qnI{9ZU^tSQr}Ca4
zEXZJLSTlvGVa*JthBb4T8rCdeYFM*`sbS3uriL|&8Vn3;m>SlA&Sl-e)Uaj`6T`X#
zObqLeFfptVpw#KiD8il!~XsUObqLuFfpuq!Njoc4HLsU0cc-U
z0(y=RXbb~%b`WSBgPEa01T=5m%fY|_IzxzsL8*^{!Jv;BGzX&qS_KEbt^hJNub{y6
z{Xc`4Vh02C%wohDJfJg&Vi=lxK<5;J(g?_GkR2eqBpH$fKw$}5qYILgXGjWQU|{J}
zVG!(NVNeJI*}0Yq_J=UE^gRFH5CF0V6fPh~gV-QDpZ-q@0oez#_tF1`00=z^=l~
zAgRK{z@fs&z^Bq>$zIpx$WaFx|LHm@S=Xh>TGyq>Qr9KPTzBFBbCs?@t~!Sbc7_Z8
zIaERJIbgxg&^1x0t}Bzbt}BtJt}Bwe&fx$D!-fA#RUmFoR=M!sQeDyFIpYBb4hDw`
zCaC)~nH3#4m>oJ;85~ZqFgP4wW;me1%5Xq|1-dT#5#xpbUaDPkE)^sGxLT2*{V~1XsVw7|6D~;V=aTCLJxzYL^cCxzB`Hm
z)Mj6~UWH-#dIg51>p}Nn$uKYpfyPQe`PqkIf4>LArhXTOjr|VLbREF3SDk@@e^L%R
zpUQ>*?^RhD-s@gq=TzbHIM2w47@6!ITmIHAr&SD
zb`?ejNfkv028MSWp#CMF3T*xf6#t-jWo0-ZqNw1&pvb_$Bf_v$U5k@}LtB6eh0n;~
zq_gAyUUdubzR3;iT^RPScVO7E-iBfGdJ~3?>p|-u#GrG1DNId08B7y<6eR)~9xyep
z0nrQ$#S<7A)YM-7Pf`2N&|<*E(4xc7&;XuSO8?KK;=-`M-+^IEzYW9YehY?8{U!_>
z`$2sS&=`gX!(Me{GZQ%(I9@O{uK~?@F)^sBXK;Kj!9^8X9y9C_M=$(#%vss?I|pnR#Q;mW|x;2@U4B(hGq
zVm=y92Gm
zfwjLt?J-arOmRX3=v*8g(0&9p1_zc5rU11RCYQb(CigzjI2J!61CIoQo0h!f&wZ3YLHERY*!fXGQ+`!7<0P0LK-29&q26EpeP6iIe4hDwb
z{}sSTGhO6l;K=+htOA;61g!6LWoSF$!hZ)A83s4C3?|ogu;iD1Q|f#0tz2S&^ipkrkV^U
z=XIcQFj)rY08qHz<7D8-{m-NVQzyc(V11V)Bo07f0qSSUGb9Os#_wTfD?-<9tbop4
zgVK);7ieC91H8UVRX~Xm)E)<|4@7(nA(k_-(3pfr@hxO2~g_5s)5`S=i#t=fATED6U|BfQ6$Q
zG(6Dtf!5Z5;v1B%|NjS#b3@u2pmYRU%LZ~w29tAN3X^M}0K+m+9tBnDJc=5N!FSSv
zl+xB
zuUDLLfME&4{`CtOwyvMUux0%OhK=ic7&fdoVOX>nB$>Yu={vA+je
z$F5-5t8N7K(>z8dl~ey8g@F79@;5I7lL{vTvkE_hpb9qwn~F3y14j$PQWcOKs67L!
zclj6uRk#?~R1z4Lsu(b^s7Np@SuDx0Xt4yt^68*F3PO^dGdwaq(h7hOLX47z9*4bAi_FELF$mh8%{a;Pw=<{UEo6Ff3I8
z%~6BKJh>SJRoJ0!o&a?-HnS=ima4Qsw&31g
z^%})R{h+)Pp}2j0h~l>OK8jn`dnj&R@1nSAy@TS$^)`wd*2gIBUmu_dIcHUI#sctq
zQpJu33>*r^3))8k&5CP@uekNv>P6lUz2~5s9P7Dbm9ZbwB
z6PTD)Bp93pCNeRrlrlJj*B5}wpBTmc{Sk`W`$H7B^#>?!?e|gK((j?Tx!*-`Q@?}a
z#(o<`$UI1b;$C%Q24?|ICTE>Qh6E8-CT0~LCT5j<24?|YCT5kl|DC~WtwC{O0Uqyc
zU;?Ed5E~?>!LV5!#s=Mm!^Xs{cin;|5tRrAQ5BGzul;ut0*#-v
zGBK%a`0peJ3PVPwLwaleI|zW>+@QF$ALQRB{7ck9_JihRKyz52e5k^(Xg#Q1V8f6k
z0J^Ugq!*+Pq#opUP+WlAPi%Zlfcj$_;($D!3{XDNfcOW*2AK`=4~z}+j{}2<${}tB
zjs=XODj<0a@VF~P4~PvC1L=XWL3$LRdgej(aDc~lA$mY;m>w7#q(=a%r;`a1zbXt%
z)fGTvV78*h0VdEqBgkz}_?N3M2B~XsU;z0G
z3T(t0}MTko7Xom
zZdkvBasT=SjQiHlVcfoc2IIE%Qy90dpTM|feFx*F^(~!ir@X?ML2*Gd(+sAP
zb#s_X*DYX5UdPVR5R}1`vW|sefzVBk3Gpj5CpKF}Juz+!2{~X5c
z{WBQ1^-p2k+CPDDOMegJ=Kc=GP5mv58~YoeYX(;^?p06XVc?j-RMIz{!AXUQ!Aa-+
ze+L1OIiWlZ93_m4*Wdo15CSrvk)e5#f(~p{&85&qJn3C3sFr=;PQUtBdb5eQE
z2vA=3^K2gVrgsG9&~DFr@T#NjBB7FcbXQHWx4U{MrEU{F*5t@B>O^yq&ASp9?lPAnkvSV3bzpmn&Ct#zQW>%ae(
zh$sp;GjxIZEGmTzDFI9ji&a<{*iKq=Iqj`eXkWf$eE#U{*Q6;4IL>;H)FXkRULTfmsDK517H=
zEYQHftisOVEK?iWLw>a|4Cqf
z6fiF7FJN5S&&1HIqOGu)Y5o5O0Y-*JDo=PoZHAOS0Y+zmsUY(iodsGMAoUx_JW%=s
zjqNCQOk^@(ShAjhL3t9WF9k9mw7y-3Vd?q`#^wE>v3DJ4I|?*U3tAfuy5srQe+LO2
zh9&)q0xC=l49*i68Q4^={Z9k?0i+M?9)rgW7r^n+qSB?PQU_W;tH`u~rJkYHpaQ%O
zvzb9#U=agoJQ?JsqBKRIWSnKLK2~gT}S=co{hEF(oYmuNRcq$N=(Z0W>|B
zFf9lu0F_aoHG_&1>mX|e4b}eqR~A#%Si&I5%fO)siWh~&OiAE028}Zn)*64t1{Oty
z#h|t0OfgXNqM-4`$dIbS&&$98N(Z1Y0)-DKZ07z?g8FfBKNCZe&aD3qA|N+2GAK_1
zrMEC9$eI|i|DfyAC;V>+0r{`@e*%l5h7#y}g9)H=pzD7#)U0LwOrU*f3Wph5z-|QP
z10`@iFoos=h5bD2+60&?hApsF9_tm4rQhlOiAlNakzx3a2+TtGr;HTD^CK2r^o*!5fz3yHIRFl
z7!K*U{&xV|2Mf<9j1DY{8lbY4Nu`2uNk3>WlD0%MgZ2Lea2QzqUj$AwX8#umWH2u4
zZ(;zIorh|S{x^$2!XZdSTjCSA{L=lOAdVE|`P@ICwG|oUOk!+}9j;}fLMW}v{t
z!tkiChH*)M4mf=WGB7YWEKrnaWnf@9)UQ0Dh(Wm{kcole(K@dG3Q`OV*Vkt-F79sv
zt!)x4t6}}`0xC25nHVmqX$x#(U}U(a#_-=kB!_X^`v3n8)oK_wt_S%shjDp-SLg8>
z1rfoT3;&&2Kw$@37hM4g9|0pKZHXp^&;Js@;h4{;Ad~@e3us-d(|1ANBA4m@qLkf707N`!N^KXF&$ZSv<1!@c21J5xP8i3R(3ZyV-3p`?&
z^3MUBjzD!kDBXkn394)J{xgHh_DSsEdqqJ>CaI4FboVIu?1!X2PN?{~zYIbpjEno%
zFfQ*0tzqJ0cocG%DQQv_4+96NT>?s%77U;^erg{JLs}n<4-sSF*}{~nwu%q5hk=3N
z5`%-t7Vuhg&_07ywaW|+Av_GJeIWO^{0G(jsRm38i&eA@7BemU3u(hRF)k1Q&B-u<
z_7qsQLCaLo8s9YVI_zoS`hPJ4xI6}xp9V{qc>Wy#*GHTFEeHUWogn>PhRsmD$tr*T
zr--O(EMsT`mB$L8VFv~tP=5%P#=v1LaD)LA#?Jph^SGe3T*}}&JQCFQ6G&hH#UXe<
zoW@}W>wgR2VQl^nGzPh7y`l!FE?NeTb7qD^0-!i)-~)}tEnd$A-tY2=0kqyk`(J_x
zC~m-Yk_=1D4u%AldWL35nJ58jYaM1#{s$=&LFrTeUjqxMj_lG@s%v9lQOW(kBm|TO
zK<0z`L$Ep$R6l~^0;EUiAEX@wsw)*0l$jJIoEbJSC9PY-l(G)yCT)eMVE?lJYe1wa
z73P{222i~O^Dk&0-(iOTe)-;0b0j0si44?l(
z(x4+hNF20(f6)Y0fkWW6!vFuXt1uWbG5q@9E&^)v+~5V30ZaSq8IlbY6+m_J5r)T5
z{ec+zlT{G<)4}>bLdy`aevQQp+5$_NI{rF<(*vll0~!~E>6!aC9l8dtX+j)7XfE;)
zgQ5n=&ZSJ%Fg+5@&^2x?V7rPK+66%FWnf5}07@S@FntOW8MGyyFzomXsS9dAZj}J}
z)p>%d#9{_enF$&{WYA(}`1M~+3=~&0z;0dM4?5#ZTj4Ro%D<4h6x7xQ)e8`JvM^l#
zyBxgE6trf&17x29=p4eJD2r4`}^P3FDIfRA_sg
zTcQaxKFc5vj*|uJSwZpI0a^>5YycV)1f`i8sGE0y{Hp-+uge5gg(KkcSD5>M{RhR3
zlZq}sC~lYagW9y9_CPLFFT}sFxMX2)_z#Mgr7DaJOC}tF`WMugcl&a0*4qt>vb!@ZC%LTH7jVmgT`ARd)Hw4nHlE8
z^)H_A1EgQ#F!)?0ZHY$=Ixv0Ub-oBayO8v-3V_!69%h)$16q^DtO9edEDrZZ|3kP}
z1f&=0UP!rfh=CtwCusd9n!RRly^AL(gY-%qW&q7G!`4bb=9o8u*Cj&cm>pO^`z|9G
zSo)+G8e~8~>&aQQ-iu1KQuuz~Hckg~4GB2ZO^J9tMXs
z0t^moY#1EYfadx^bAO0MPXTAag)#yFlwvU~5o7_vOOETAE>j1bBQByzUxgf(gjXFad_9zC{9{@wXr~
z5Zi`f0>=6Q4u&QSF_1ez{p3%eH3bV8!28)57!=mM{2wd^+8YMhJAr#`%YpxU)pZ!Q
zu9pGLt%A;1>j2#^eSpD+VgGsyhJEV|7`Ckk?XT2e*s@-QVe@*>{&djZbQ6Z{(DZTu
zycQVjjtLInb?adE0uUQ=7ddF{q~Zop{2%TI?I~jejYSB6=IR{;Kxfz6FzoNQVA$7h
z!mz#HfMHv|4#U=d4TdfKDh!)3_Ov@N>{VB^C}L9FafM0I;5icu!!Z?5U#EfLkWL!7
zeY1EGlNcLAC3sGNjiDYy3$ZaYLgxe+85S)9?Opya&tmice~XEtLJD~PT~S~GlcGZ@
z1Di%00~2`f5NKbRhsclrEh?b4gQCI`CT0fE+yJXe1H&U728PxJ!JvK94vU$X#Ml`?
zcbYSaurtJi?PF)igxbfzz_gH&fl~!xp9&*rzMqjnQx%kk6*ZU`*$mpj{Rhw;=D+`Y
zg6(8sa1a93>52l2q3IoTuH<4SPg1^&9_#=Ro=uXB0CiN^E8V?b8O`ecr(E
zNRNRbWq~2ceHNRUn8d^xJVEXf5ohoQ(L&-3zHs+FTENJ_f#g0GsQWme?t8?*W-uMe
zeULC=VQ3Ii1kI%hY=*k8SPj%p0l7_4V>441Xz%uhGNy9^pmyT5^&q!_<|IMk$ix5%
zLq>*WixeF|V+x?N=UW$m!h?Z?E@&qXVfbs<>&x6K}KxqAk0G(w5+W!*zpGgIhCpY!W
zFrc5+06EJ9qz1MJ1~iWjT6+uI1M}g3LkLLz-Tx#O5Us4B#02WEzWfhbSFmWkqQU`C
z{mulMdxfkMQ($`h-wCW%5xgFq0Ywh9o)u(HmmmWNXbmT*4usSxix{r{PXOBm8fS*o
ze~7)?x50b2LG|b22|EQrbr~}wXf57{e|yzg7`LovVBEa^55uPQKNvQy=V9Exo`Z4g
z`Y)h$L7?^rY<(;2EQ}@n$>#@Au+i+~3c^xV4{!aZ5h~zvK!%*CLte4Ro&k6?ESW1B1)DE=iR-2?o&meI}JB
z@U?l(Dxf|WC=K3+iZL@ZsetBBLHjRQ7+O>~7@T#kgU5|r)-iB1+pq{YGhF%a2;PeX
zO8cO-qOfsvMT-O`$o`-W{R|ADeTo{UOfsN3hZUe(RzUq<1||lE&~;ssrgfk`q&h=V
z0O&401_q}-*cyG1-3y^-Z-CXBp6Z!u7J7f{8P-GB9ZK
zF*8Yl6uUb+TPbMxW+oTqCud|9D1@XYXXNGQKQ5c2KYESDMUCM8!0&F
z=N4qYwV$drtDT2@$Fcv9yz7*xB
zB$gyH=+WrxOdT&!`wW7?3xF6HK<9cfa6*K@WJ3f4Ljy12dtVZe%mQg-1Q84j7OM1wX5f!H8?!Iy!-femso
zD(IY3ko!Ob_@KBzK4DHEgn=O!Bni?4bvu-aLV?VO2@pQh4%r6KnRP4-po9$4-vYX~
znSqf3bYL5Z4Y~&!bV3{GtU?_|28Iwu(3umA42BGlJL16iMl&#i!%&79a&9O{y$k5x
z6&41D6sUU8JuC}A_u4}FpnF&f*clk^K>47%NPIXM7|yUm%m>}M;-SjGPym&$VPIeY
z-DwRu)0G{3pEXDi=!{a(y)^R~Aa`4X`~l*F3P6ziVe*FZECU1RY*P^5kcojoM-Fn&B#7_A#K2G@&%iJP>i-BP&}1ay
zjMxmM%nyp6d?p5l7mAScFG2c2_l+aFr-O-s!9@vje;r7E1``7Vi!uWP$Q}@XDVlk!
z(D)mf7#Mb_F)*mGK*D=3n*3=d28KIY3=9=a5c%6^^3TxtpV9dL(fIsGMGDA&@@RYw
zG`=w!-wuuMiN+5@<0qlGu<3C_#U|8e8z;J^BqW%>#14D}=X(=c)&{bLAveVctj|Ty*uc=#h@m(m
z(bN!G$N(gSP-0>Z;v1QoAqiQ44pBz%O$|Xxj4ezMLME0B&iQ$1nMJw5ndy0nC8b5F
z;DeTfGZGnsGZI4!QW8s2K`gh-yu=)a+=BSbyv!01U6h)b5?`8EoSB}Nni8LsnFkU~
z&Ph!y0x^&!;)^q@QbB?x`DhwabCU}y8G?!v1Bx=s5=&COQ!61M$`FztQk0mI3A!T;
zWNm70Zhl!Rs;FyTGDCoqw~L!0gG*|0JoLg@5Yss+*(Ei(sIs60qQHm&bpI?=0f-5^
ziq<8y*ceHpaXhk4Z|7h`qj<0lU?-L)hh}GN6XL6ek9ttHa_u&%DeM
zh}INPieP}=k_)=L%rU0~lnmgvoPop`Km@Y-u*959P{e=}N=asJDnoiMn1Uz@$@fmJ
zgk69Jy(Y~y51dlbBiY!(1Qff*7AA5*E>Q|6FsGbDTpn3^J^MJ}(aRvr(d8@?0a0bc;m5(5KP`L=I7eVzL
zh_A!Kz`&xyz+eKR#Tgi$KxxqZi6D6mRt5$T-2kO$K@qb{WehA14OGaFeHFzbq0nE5G~HYV8Ow_z#`AU-~pl)7#Ko8v?2q;
z3J@*MzyRuWf$Xv2gqY_7r8T%9{0tB+&%n?Eq7@hzrhsTg28KCY3=FI?3=BDZ5PAU@
z0|T231H%%i_!cOC4V1qF$`{~)s2AaZsE^@cU|>;aV3+_Ep8^#>02RLiqQxP7L6AE;
zKKZq7@k!GC(v)Kh&Kqd=PtAfW*}q7&d@tP`pCvGf;IG
zpz0n##bx**_Gm!q6ewN75Ajb0Kg8S`C_Muz52}|z;j{)Sz5yz}1KO2t&u3zS|X3^C^glx7fNU|`W=0393#
z&KE8qzBmIz43w^b(k`M9eHBpp1eE3wgNR#zXmtjL9uO_gz_0>JKY`LeptOiMM7<4^
z_JGnMPpRP0EiZ6U|0a9S3v0tAX=Y+;Rc8nXJB{(r8%S^?gXtm0;PW)5Z{1-
z!2v`YGB9|6XmJLH0uXJ)z|aDsjTsnvK(sgm!vzp+!oa{G&A`B7!oVN^qCx2$N}qw!
zccAneD6Jp^vG)X&z5%6QK)&VkY%3K01SD4hYNTcGp;
zD7^UU+!;`M2b8`5rC&hlA5hvs1EM|yN*6%s
z8BqENlzsrE88jj4d7!ijly-sA4N!Ulls*EbKR{^_Er|XQDBS^~of#NbfM|6FhBF{q
zoPpsAlorv3)E^h1^aCjU1xowqK+Lnyft1q$I*@WQ1j^5V@@Ih5sWUL_0MVd)1EoW>
zA^NUB)xCgaWXy#!sQ!Y|YoPQND18A+e}U2(_7HPSptJ*&u7T1mPb+MoIAdV_=y(|+3UvP*Xm}Ym
z_cVIn6C}hyb4W=v_S$C4>_7|A#;JSAcCcAdgNOk
zn59&k(rEleyR
z6>b8-yV^i=NsI#j3n2B32I!0^2787@DvS(^Rhk5u7?cH)7#t*+7(iz!GcY{vX%b*!
z0Idbq7D!?cVc5DJwDyOGVe@(p@c9=T*EfLInQmCm!mvoE4YbA*RM;|fO<-i`p1{P=
zF`<#cL6DiDbAmR5lWq=!gNQAIgeB-24qFC&O9qA>RfY)yHjE4s`iu_Gq&A_W038r;*!xLd6}p
z85tNf7J|gw86Jo#Iviq9U9g4e59r<}29bqM3=6>f8oC^tYrg&GR265?(q(3F5M=Q%
zV3c4`Vg>DiU}0FHW5K{6%E*wd(iPZT!^DuG!pxAV(iPcV)8*JvW60nj*yY(-qs`!}
zE5oor6cm1-uwwz=EheE48h!(Xoh#_xvlR>siVGM(&0!AE*;DLb`;%2z83aW^2^C}?
z$SuFY>jaZk*cgPs;_M6y0@6VD^Eo!xfYgBYecbvlEC_NNNL++rYrg=)mVO?F&HWq<
zoBCN8Huf_>*B^q`cn5>;aKf*Kf#J~_kU60BY52_g^WPr4VF~13WNi2U|9^WEQ!{f5
zODk&|+y4;2z{teR!pg?Z!O6wV!^_7nASfg(A}S^>AqkO}l9rK`lUGnwQdUt_Q`gYc
z($>+{(>E|QG9Hxo9@BUYR}WG#2P>gK^%$sa1Pf~cb_NCw_}Uf*&{PR%u^@vgw5)}d
zbO(^k0_la7km&ax<5Gvdh6|()v}Oxr76^mf2jZiz;ktptUi39wAa$U-jzMODFvvU*
zjlPBpw6=hlHC(C8#MO7D%*3tXdI4(6F+$dGfmQ^9+y^Q;L2&^KV~~4aurYwc9>fM=
zSU7{&$QW6ia61**22i__1>9Z+nFk6p&>AQZ8-~H{N*IR$q#oHe5FgV#B;^du3?R=U
zM3@<{v|AC<49wsZhY$d*VFFEifkZ%Q7_^1~R!Jr^BqbK7nwdbRcp03)oOmdYfq|ib
zfq{XQ2eMv^jfa6@4`|Mi9Xf}|4xK|}XJAOq&n*Bg6@}Hhu(q<95%xOQ!g92&42ln8
zFsO_Hr5ISOL)sn)ouIT2;(^u)g4DrM6S_K(97rAL5FgN;?1a?mFff2p8Yl^Xv@w9p
z1C=RY4tO6h0|SU}idMGyz!X4fn7yF;%0X;U*#(jUsl!%wfW(p4e|9nuS9Z{%k2^fu
z%CO9u%#e}+%dwCaFg)Ml7@IOSFf)LtB-~cEVa2@HxZ?L-^#+#B>uXpxt*>C&xW0sC
z!+OveaG>+rLHCe??hTP(SfcL0v{W5*ekJG*s1}y}>p}ZnK>L9}=M94P;kB^r2cO5?
zz_Pi&hGkQK1R%Bq{=>HG8hn0Z`WY-Lq
z#r+HnNozpjp!OSRk03}Lj0WwS1MQD9Vb~7dBd5c#bv^PPIoN(6&^|iF84V1eb4wLh
z9AHpvc)$<;kzHqW=Jsq5`Nj#lWMu1GLW&&3)j#hfFpgw?WiD0G%-kGMWc;_7&(Z
zL|kry*d3-4@N=*F3bxJbm#}SGzkqGy`Z;VH)`QM`2FL3RNW6m5Bq$GLuz>CuVqjRq
zhM5P}utD;`3bxJtOV~E`FJRl)KZgx+cH9QGz3K=`m0ul%98-nE%kT@)#K-`nG4kQN3BYznFKL7Sqv*
z-Ved04pf&T?TjC-Mas3b%(Dnq-dUFN_27LVx&>FM*AcsRS%)d}BoI(~Sryl}qBeFpE
zZomx&m6o9KZ6tw#*h>K(FoC)O6tBuqHi!c8EkFz?2Js!CY!C(FgW855HVA|G@gN2i
zgZSXJj*JZ89uTOXQwJ(^kob_RsUaFbW3AI5OfU)JgZ9*bISdToeK?C?94LP!0|SEy
zBLl++=w5@}Nb(^2&!X``dtG2cAo=T{Jj=|$paRtoYJh>3g6E|cC6=T@R{4U~e}dLS
z$LE&jlw^W<_*X@zRuq)v=BI!ZVyuNOKv^3NSu+h<9SdG(3|^E9Va3O%<>V)pfEHL6
zr!k}z8r$QX*omv@?m|4US~Ud{VPLoc?T3Q)nt;~$fcBVx`l+CJ0rgXVfaGNvKnG%g
z*I@}TLHe;GObiSlc?r;-4q3?BSCBp(sJID8TmrJ!gGGXY!3U}@04g5>l9yy)hyl@3
zkbPJz>L-wCMr
z8IZUH0|RIr2IP(hQ28fN`4=F0Nd|@wAXc;b&kd0j<>)U|{G0(Si&N
zQ=s%5D18D%3otM|0ntJX3|~MrI|IWX5G~BWzyn&l%g(?c0-{A27!*J>I|D;XF?>1<
z+zo*D7tFEu^NkHGi0&`!LF+H@FmN(}?zacElTUCptpU-Xy!7JBUUeSst?OC1H?L>l
z-n9M?*T(ffxHha;1f4knJFj=b1BNpk8`X6fmZ*m?Emf~!S*E^(ZMnJ#_x|+)+}qZ3
zaBo>Jz_4*WsCWSNDM06hh;W12Q$i|=0uD?9+}rwjxVQFmaBt~n;ojWOz`d#e57);2
zA6$_3l?3-*bqyxaiZxK%vw=yJ!AVCOJeJSE0J)Iu0e8LU^!4919WEtn+iy70SClf
zP#Dy(K+b?&!UnMuk97N1aLlmol&W>3CWncKTS6zd5>v|R5E$bC{H?NoB-LzhUcjI~yUTC^(K-`PDgJYxm
z1FlWrJ}Rt@KY?wzx(+X>jSowco7QtNI0)$Qg3=_DiU#l2eihy={R+IB`(=1H^-J(>
z>=)sMq(uYXz3QMahV^$r=}(HmApn&AKy7mdhJHprhGypZ-jNIi%TYPW-ENc$Uf
z2LmK+O<-FBa!)@8@1lM}c8h@TgoniG6QuqCq(2D}zXui9V446v4;|)K2?lUn2Y}ph
z5uCo5R3P~SlD-rzz-cG|J!4oc|mGx
zI2jmjf*4Q?G6%{;p^(MN>4zX2Mvs05s2c{d6XbVLyB~C!3WyC#Lm<8^sNK%MzyNBW
zf%u?w1yT>fpl~t%)MJ5)fchJ`1@Va~U@f_&IZ$!*
z4vkB3B4k@0$g!XedC;>3Ky6-7K?~|*fcq4J3=E(FBv9Yt1E>!n46djdKz#_%K64N)
z0qP@w+O|+y14_q$XaNS$eMJl`tPBh_AigLALl1~%Wnh>CqQw{()_`bM28JCVTAYF5
z1c+v3U;yoh2iXhSpAXUx>XU%l@SqwE#ODFE)g>7iK>OT5d{EzmMT&vJ1|%-Pz~BL;
zQ$Vyd149dx2F=}p)PvG6hz7N!K=c=oJU;`20jTXR#K7PKqD2@OLZEaElum)tIZzth
zM-X9PSOMY-F)$o}(sw|#CS~m@%Wf>TDfM`|*&<0PGNe5UT!rTCRAHvAM!Wc4JNO;a6!W?zZ
zfscWk0W{}O!?I<41}zsfU>fQUkKffeCWX5~$4!YFC2wYk=-T
zV^*2R;4AHpfQU{U)`3Yneh!0W+Vk>Gu
z?w$ad4^acU4-B`NAayWzfWnj*J&=2ZK&1)DY|x$FFgC&-(Aj<x20QAhS@-
zNB9Xee+H5R(J;F~_nL$BfX*><0L`UH51Em>|zd>OJ)~5jp6G(V~+=WmJIX9MB<;Oqg5Kw*x
z=|K)>J_ZI3u($^7?z{$uYYYq=pzuPdYhY+&VBi49JzO0F6B{Gwt_lVwggOVNKcIeu
z2FU*~^BkByfyEe@K;s}B+}qZ(aBp4Dz`bStAFj>oe{gMD4;kawx1NW4`}!|j8`pmT
zjg3rbU;v*Ly5InV;)(|hpnD88xVQC({TEk(j2S#&65!s~&%?dFpM!f_KMVKPeg^I>
z{eQSN_y6G9)c=KRWB&)Fv5!ySa!*|4W-SyTcZGxRY+SJZA?RGk9S#f{Oi5~r3JaJNH5?c~VFHSSCtRTO2Vrpxx>v$M
zpnxs4FMuUUEr7*M?E%-K^`J6Qh#^1-G~NM<2L&c~H3kN6@VUku44yqa3?9&Ot$Pg%
zL)RJ(hR!uS3>|B}{dX4;U}#Z+oPi7~*V@;xFf^?ZWGEB>okQ!v;-bdDkk!M&klDk*
zkkP}#klq6-ml+tm*03;muHj(tSi{5MzUJHi6cI={p3=j@kle$-;If8=!Fi1!!#x2-
zfdkA1Y(Z)a3@3V67>@UFFdXUOVL03)z;H~3fx%-93xoR_4hEMsJPgijzWu)hHRnhV
z3&UZ!If@Jm0u&VvFhAg0(hmv~NIE?RE=NIpQ2!c~w;*LFB%Lxa9P0yx1wwwQI!wQ!
z0jPz9O+RdG1w@1NgJ@9xTmYI21$7^Iu-OfoJBEmZ<^n-w?y){lI!Cq}Vkc;f4AiQLoDWjoA#P}vURL(GQcWl=^*`437nurd@>K7+ypqHY1ao&bq~!V4^J
z&;U+n2t5i&g*jL)
zY8}P^3de4&;f)-2kaUs*t@Ck*F+^P~R&^lvq526F5BSn$0)sPnylMl-qJDM;2MN$z
zIwOOV0r>tN1<={!pq4u*zk=@n1DOvBTLmUTh6zH70u4+ZY>U+y7}&w*TXQh5_VF;V
z^a(Hss4+0OuVG%RRzBrd=(MU8>sa6b#fp?(I2=5-#73>+*B
zP3!m>7Kk91-{p)99H25BIZgL6F>rw63A`2s6h;jU%}_B=xev;-pnBpB*D~&u)YsqrgYq0GFJWu5gWMXxVxVTi%)rt7
zUqpq0!40VnNnm0JouR$}v=#<2J`BnOrpyc+AhSXF6xL<|mBn8{_4)!(T@D#b2HE=o
zDhARAQwu5=UO~lS?gND(NE|edtOzv&Sv_bR86*y>3qa;V)GILEfSLnwJ1kEnFkOO*
zYcLst`y-(Ef$2F7l|$Ea6e%vp#25`
zfA^}-VcNQW2Gf@HQsK)CTfc;9`}ze;+t&9mZCu~M1YMiA0@6PQ
zwHXz`{bNCuHB6v1sKB&>XmrtSR;n6~xLVcOb1gK10u6sFDn6PPyj_b_ej?_h$=
zQEXt^s}5;13WD2=ApP$^ZAJyqC=DoGEma4ng$_tMvtd}G{tOfk9S#g2HpsuA{PP2}
zM+T|}6!t&J2>X8w4k94EATvRCQMST93{8N5hl=rC+p&rXIJKNu0=VZg9q{U&^s{0343Qfoqlxga$lwH8FE1*!S^k0A(@-(hxvXl!n{#>~J0QwIun7+jpz@J{!3BH|2qS}l+MoY|Vk``xei!HtsU_-H
z!F8IT%10K^x=%qBkXa!6L4N+k!oUGC*MTGoS}iGL4t*WOTxJh*^UgR#r+BlqTqApdssntt1e#u?EjH)kX=vy
zJA{B}Q2!d#_CZc7xBfYVfYMbPD+33}Z6G_AvV!im0QnI#M#rq84(bay6c7i97JlEAbnX4rXy-||2c>>K=}bIN7U}KGH?_y
zEm+UZa0tAf`vB9T{;B^Q1i*G{!1B#9P=|*D6i%Rg&%_|8^7a1#p#YW?HN^>#bfLji
zrzXh;3il=J1sEO~@iI6BFfs(G6)=I@@}T>nz;|DZGL#B{{3F2t>i>Y&p)Xor35^4g
z`Un5Rgg|a6U|Q4
zgTh(^(kBPC>nfO*^vC^k5Xpf09V8YFwO5P{5(Zr?p!T|;3aBhCVOp}j1gaKPX8C~3
z>u_KQU|~`Nl}n&L6Ue>_rbX-JLFuK#0W`P8!N>q98<`mdRan638NvtEp&&jRR31cw
z_^ePqhz9XlpnMPw;)Bdt@OQ6z1k;xFAxxXs2QY0~@58ileGJq7^&X)1B&a_#0n(o2
z0`+MYJYWFre~n?<-ygxWr9XsebAJHSrhXr$jr|_bwqpX*UiI()7l7~g0rhJ@YQO$}
z5CBroz|h;zLy%$a@EDWtZpu0wz*%&xL`vyS!av2!fdj9@D
zAR@y6x=U+`#^?VHB3crQ8Sej22mtA0VQ}dK=>hErU}jh#Aj9CK(#r;_JCarY|8LTG
z{@+1FOQMF$iNO-8>GR&u#Sy^qXrySpz*s!>p^CM
z%m$6Mf!qmCzX}XY$^uI8`+^iTl9)hx85kz6Q~14C{S3?2^>nK=(omfcmjaDtB1+_upXI*MEg&d;bNN
zZT)9hw)UT3+0uW6Wpn=lmQDS8ST^?Wfc9x0uK%hPy
zD9>>)ELsP0Hw(k!b)fZjJPe!FOqlkm#jtEwYhl}<23mU;!>~!cg=wQY$Zv`o2bdKN
z9xy3dfcjsH77H+J0*@(x?$-kKCqdy0G7l7gE};0^;K0Dau&58zmq(5-dvIJPFhS%%
zW88>zV1XicfJp>Aw+D(NHWl!lN(vBtpt4Q^Nlpu@4^-xX+yH8~g31h#UqO73e-)u>
zK;mFA4F&LcCmX2z2aQi^K>NW43`}BBwV?G$AoZZVDvIE;+JOm{W_UpNIf3suU%U=f
z7K6;(0No=6@-v7J>UTe5W8m1pvZx;vKA>;}i6hiO$}rI08jv{1E?;(tdQjh)pJ9=P
z1jEMlp#HN6!-n-DAa`|u#!8uNKzS{n9n$CJU`PPxJq8Bn9xa1ZhTq`3nFZ9G8Im
Iw8w5ZrE7)v6XEHD_98*EeB_3iZX9tZ*8LR{K
zi9zuTI->zwADag}Pr$%q0_|hRu&}7Lu(7DY`qZF(PoO?Ej1Mvo#4mWaSG`4W>-q-4
zE$eFpH?OY{+_b(#aO3&{!42zs1oyA+5ZtyNyypknw+8jA7YJ_Z2hBk*5!}!ZDm!`v
z_xE=QZtHIm+}htDxTU{FaC3i!;HLf(!HxX|f{=do1i`)PU%_KNOe$agKM(-v`TUF;b>nzzBt{HJKu&RLcf$UJ$*v0@7XJimn
zX<-vn<6vL|=Vy={$UM+mKF}BzDBm98fRvvgx0^5^%2N>EhJT4VNUbqLr~qiZ3Zx$-
z4%!3U`n`4i3;gifnxzZ}zG$5#G9ff$)~~bA&gqpCPn8|rSiePh|N0HW
z`_``!-oAc?@V52feVje$bfF8R3onVgH3xwg`j9j2xIY2=D7(BfPzTh48li
zCBj?#7YJ|ZpCi1ve}?d;{wcy6`zHuP()JEv(3laZtQS)G@Sh2nG9H90UWbJi~;1YEs=$IWS%s}!W8Z>_E$KW8)
zA-rh455of?(EP9r!#;J;e2WGXn~Dn)q}|vfyl8!o@RELzJV+l%u16SjXFX_c7djSU
zaDZ7IRL_9#w*-wZfL8r8@N@`6=Knxug7kvS0ns2ofaodE_27G;>GcU0B;A72AxNHw
z7s3bmA(?}L0~8M+aZ>cd!UEJ@0hx=OzpsG$ViQ1hqf#Hp4&=J=EL09;AISXz3=RVA
z|Akc6a)7t!Fu=kJ6fU4J!53a2J
zav*guxmEvzLO^0*zQO?}&^na^0wN6B0*jbHaSjS6c7`o#hZcx1fcjlvbp{PgbD(}W
zut0=Cd%+eac7_Hakh$y(Tft=uNFPY8vc^^hkT|Gr1@Wh_EmQA>>IJC*r8m&Je~{cB
zj^*lYP&ttMk>x~y;J^S9k70p`2e7!R#6s1B(w3se113;=DMoO)I;738
zU_E#Y0<3RoKPcUS=5dkbeWCg#7&fYd(gw&)pmNq7Dh^89$mW9NLHjc7q4J=1M2sM0
zUjV3GYKbHc3+Eh`W$MOIaafuLwe9r&gZiFK(6q+1?!v#l>Kcq&*Q+pYS+BsjdA$zf
z{`E49o7PJ(Zd@d
zlK^Op3|cQJY9uk72Zc+A1A_o~j0-Ye$;i;6X2Mjc1~U&5<`DC6nX?ya4kH7LnxaAr
z6UaP}K2X1-pA(dqH?3n}*t8DBuK6#h0@~AVz_4|_4#Sr98VsA)gZ8dlFl=9M!mw?<
z3d5%L3g9*%G|a*Mf(8-A1)zR`xC-bFS4DvbOePH5`YpisxNhy&Vc62I!LYesg<(^_
z0>j3B&{!;}tp(b1{u$i<5m#YkSY+_=zk>isKM%tt6%(e5DlKf+RAN{zfcN5n(jCaX
ziWUc$klQZC;P7QuVPHs_B*5S-z{bF=!pGn&z|O#|!pq<+02*g0`7aJ0Q$}tFgZ-}n
z2~$v+_?DA_17tTyy%VT?qTs;9$dC%oW1xAz_neP{l7s(TVpDN5Elan
z$enLELG_ln3aD)-!@#1#q~THkYV(2HdlHKoKy$I6egFqU^E!}P28O0}ptd=v-vep`
zgWBexdxl|mj&gwd>CiqKq`keVUxZ;}Kj@xfP#l2ftbYDq0Pd50hxg4uZOpbFkh?+m
zcZ1rPp!=Br{$C&h68r!Eum%g8XN|0QSdv
zke|VKt2Q(+C~83NECz)EC>}ueu`xIZpqmTxH>h0=x?8h_%?0E}CQuoLt`_D7@O{q$
zpuMS0Js|xI3{FrQB-S9n#lWP(!O+wL5@%s>04?EXU}bPp0jYHmU}6B#pmxU}e(ZbW
zgI%2i3=NHfK=;GBIGH;eIXbzS8Mzvpx|*3;7?_(mxjMQS8CW=h%rG;xbak_Eax^e8
zwlp+zb#-yIurxF@H!yNCG6Kn?>NhttvT$*8bT%_JGjs+W_rhRcX<}h+WNc|^Y3gX|
z>S}K0WNPYW>1^a?Uu6!=>}u-hW?^n*;%wk(WbA6-YT)K(Zf*)XHJgC}>{cTS
zuv^_Azy(5Kk|6iET9})fTRIyW8kk$UnHamcSQwdDS{geWIlH==y1Iau??ZLE8bE=$
zsiU!hi=mUHfw6_7p&{7ahGvFtZsw*&7ETtHmQF@42F^wnW(MZYj;2P=rcM@SAiJF1
zOdXvqj4e%_9Nk=<42_))j9eUzER9@TTwTl^Ex>kx-EU@q?0%^An3OqG2xPXQv!%I{
ztDCc_i4({yCo@w=XEzH=Hw!}-6BiRl7iUv5Q#VHwuv-lbp&mh|4BbqeE!-@P%pF}_
zjGZ0LO^u99%^4U>94*b9OwBATT-{8~jg2f!%*;&8EG;a}ES!xkoSZBTjh&s`oGrj{
zYh>(bW@KS%YHVm`VQFISVruE)>}+XhWME=sY-(t1Ztm!8>gHq&R_p5QtZQg#!~pdI
zF3J^M0_0aS6C*S663eLlZM6
zOD9mW#c7YFrHiYZg|Qh(sk5b%p_7S=k&%TlSdXEFg^Qzwfvb~&v4N$5o0++@lbex&
ztCNYbqoIX`fq|Qeo11~7n~Q~!o13A5A=qE$hL%Q7mZolQ&K53?<`!ngh6aX)t}bRy
zMkdZKE~e(jZkFcej)sP==9VTFhK3BFa4<45!RbDj|B<5#i4AtAlZk<;fun_~fwO^$
zld+?do2iMRv5~2nsey@!lYx`Di@B4Vi-nV;k-34Bv89Qzk+G?%n;YnC76!cb8k#v8
zxf(cGxEUC`8XCK}7+IQ_nmU_08#x+-u7YH6GBj)zHY<#K^?l%>ty$)zr+`(Zs~S&B)x`z}Vcy!qCXY
z)yde{(ZJ2b(a_k^#MH&Y(!$xu5?sERxVaje7`Ym`xf(i}yIDF}xVoCVI+-|{I~%xJ
zx*D1pf!uCvYHsFaY-sB0?CR{~WM*PuW?^jZEr((rr>3lkU(
zGY=H@PR7QDMxeZFWDIhtiKT^wtAVMRldG|tg^`P)rJ;qPi>0%ftDCEZp^2fPk%6(H
ziGhWMo2h}Jv4uG(=1k3uEiGIu9F1IE3@u%Z94$JMilOE(KQ6GIm#7b6QxM?({HXID!XM`J@nV<%HL11Ae-0|Q4h
z11CdgS3?(bR|`W+7js7wV?!5nXG;TDM*~+=a9Dxj-qgsD!I0R%qMbShQ$tHrV^=3j
zGeZkkLuX4zLy%7$jSL+PoXjjtO$=OJ9gSQZ&5cZ*EGer
z($&z^%+S)<($vt^+1%CA*xbp`%+$!)z{$nf$;r^k&A{B))ZEy`&BDUi#mL#%#Ldvv
z&BWBu&Besb$<)Bu4b+;TJRBTN4K2(p%q@(a+>G2T&CHz4-JG2b3{5QD%nd9ZO2H4G9wyBTHv96AMtmYijJ~WNKvSW?^LE=w@bM=49ex?Be9;XlUYO>S}K8
z>gH;0YH4KQ=4$BTY-nWeXyoSRXyM{&Y;0oTWbABcVQS`RVr1#$W@+wf?rLo4Y~*U{
zzX=&kRYGPtyX=-li
zWMX1wVQB8?=Hy~%Ze(ukYG!8SY-#T5YHnm{Y3k}`Vq|7w;B0DY;AClFXzb?bVqk7&
zXl!ciY;Is-=4fPY>|)Tv7o!@BtZ8AGeOSW
zn7{-%E8_=*8tjN4OIs+55xrR0|)K32C+f-fj7B1N5>%ZVPfR$7YBur06zmm0vF^Ca+p~ln*QhKBF7}?d|oaF(0+1|
zTW&z_bVg1tpmGhAo
zA&3FRAbu5;4WdB&W(EcZklRkML+%^~ony6t2eL;Qv>zOOKlx6OMkog92i?&Q<%0LG
zpMi0p?!S!2zlFwsh{k`xz`)?c$G`wOj|*f!`W@<^^T}XZK=y-9f=A|yGeXJ>(76d9
z{i;X_45Z!?jqixYPeS8oqw$N;__d4-3>Ps0PXb#ng0w;9&}z6viZD7nHA(;(79C|vJ4DUpm$O$GC}SU
z1eGZu^R$>47*ymK7+~RL47w9tj)4Jmo)k#l5zRb*G=4Z5KM{?efyS?7VqmaQWMDW0
z%@3Vu^0S#37&z1*bvnrY)oAjYK<)$GMG8F!?GVWQnviq9K#?nsCF_ahSn
z1L$5nP<;=Q|HZ_>utW>e#sKlbo63_xB>{QTA#__2YSdN^7nTu>3$as*Q$hyHH0rn_J
z6nwojhyl819CGV4C?4`l^GZNBE*FDLC@RiK0@0bpRjEb!AQtFw3XHp&L8c(zUJW@q
z9r?0mkc!j_#C_Mfko(C&!qEGg;n!e8mBH?B&d#h-v^QRw+~Vhju%pfe`~85kr$v=9S>3WyeDU@!sELJSNM
zAX;4e}@G
zObXDQtRPyLfdPDnwGab?4Tujr+d`ayAqB)2VPMDs(d-Ni6(CxKfuR9JvokP&&$!eS7y|?7
zEId$n9Rb~aEy%!d1w;!mFgyX#!VC;wKs4xHVbGn|!VC-|AQ}{2AX=D#!30DLF)%oQ
zXh8;s01zz%y(?RofuR7(ZvfH43=9)MG$@^bXiz!<(V#OyK(rVG!x<1Q&H(NgfzD3(
z0^*A@Fz|rx)D~l4kO9%4bONG5=>$ZB(g~D~0ny?N3>6?6bdDp47G+?V1EN7^seot^
z28JCVT9kp|0*Dr4V0Zzdg&}<~P&(rP-PJA3z#svlg%}t#K(sIeg9V5dVqgHBvkE#_
zG6c#`0nx$?3?(2MlukgjFayIB5DoG#h!$jE*Z`tI{sqw>|AJ_ce?c@TUw~+F1_lAp
zUEm=9f@siP;~-j?fx!brgVHC67Gq#Y0nwnl20^q40|V%;aL^erpuPj>yvP~c3=AN8
z35XV9U|0j9*%=sifM^j0h65m)oq^#7hz6a-0;1U&7=D0g5l9Ccq@M?LSGWiR1L$sX
z5MKex*8tJ%3=Ae9T7-eY21J9-(FD<=3=A1ix&}mp(jSQCXJD8CqS+Z3BtUnK3otNf
zfM|9G1`7}^&A{LRqGcEu0-$sRh-PPC$N5*+fcWeT4B)%Xl^GZcKztPjh8_?N
z$|oRNm4RUgh-PPCxB{YO7#QwA=_gS72Z&Z>U|0aUOB~eR0MQx@44}KmSu`0Kz;}-;
zGcbVf8dqUp-~inPF2KMb0iu-|7z{wP3Il@=h!$XAhyl^c3=Ab8T7`iDeAl=D1H%Fk
zUzven2Z&Z-V7LOJLFa3NXk`Wl@EzkS3=9&WJH(#J~W)qg;!DK>}1JXfrTqfM^*8
z1`8++zO!77fguFS2j5*T!@!UN<>!ECRR)Fz5G}*N&;g|F2b_RwGAXM28KT%8dS!C?qFwUU=RS&stgPgAR2VX4~W)bVDN#`1yH&MM9VNR
z%mC5+3=CVK^aUvW1w>0SFi3#zaF=9Yuz}JEP`U+5uYl5LpmYT24tI72h6Pai2#Drq
zV7LOJL1(`~X$H_8?)(f45>VOzN`vou2b~KG;!83xbbx4f28JadTAP7k3zR+rrO$w9
z&^f#yT8e?;3y21t4-2IwKzF^fGcb67Xh{Z!8W7FTz|aGt*%=sSfM{(7hBZ+70F=G}
zqCw>vlm_1&ug$=~0lNELn}I<9M1#s7D6IgcHK4Qsl(vA<4p16=*E~D)u6a42TAmLs0q+l>P&v4H+0DKzGcuGcYKCXf*}~4G;|~pFy+=
z1A`5SHe_J%0ntVb3?U#I6#gLEgn>Z^boaaf1A`5SR$^d?0MP~v3?)!{0+e0@r4N8;
zMFxfoAlj6H;R%Q~V_^6LqU9MF6hL>>gUWRf4LZpbM9VNRctGg@5Y5iOkN~1(7#K33
zbODsEfYJ>h8kCM?A>p|~780IopyGd^;w*9yaURg!_QnhhA|M)MKZurLU~qua9#A?4
zN(;zC%$1Ob=+}{F0N0x_AXSSMfM`&C1f`dNXh#NyEg)Kr
zfng7nJ_4d;7#Pk#=_^qB4wQZZrQbm5FHrgqlx9(8U;v%J%>$y@85l%BvUxlaue?HVr
zJOL61m6uTZ1C$1}oj~O$hbBawj3(5dnh^apQ1J^OaTNxJ8z9<{f#DB`Hez7l(1NJ9
z0MRZC3=JUKl!2iGH2%xOz|aGwCqU^bP)wt>;W&BcOB)lum%spwWc10=;~F
z@agV|yHm}Lv7gOoVF^9nee}*_*zhe*8g%9{XxJAvmjqrUgQOZXM+D-I-s8r=fIL3}
z3Nui+fM}#)Wbj=Ipq*n}knS+}ZWz#5IcW9-V{Qh}oC8P@3#Qi$cu8tS34>lrVo4%{UQ%%}gI-Z;dS+f)K7(FvN@`MRx?W;Z
zrm+!&9u-bBAI-JI%{aTQXXd42=35Kw
z`PR_D$OMvc3Flh@M%0s#LHQQ6f;{LyXqEW`W*7|$Jr)KA@U}w`8wHP${0v$V0`oVl
z97eB&K`WVHYCtrsd{+l8?+4$m1rlXoz@-kf8VY%33P>Hgy&yhlc_+whSbdTLF&0jO
z600tGqu5~B|eaXz&Qyf<^rn4K+59%{ji9+xiRFX7{SX8P?-R$^FjA5LE7XH
z($K)b%*;$d!NS5Eq)b6!w55)c-mq~->->SM^Fb@YU~z(67Qn&48Ivg<(pMior7m#eiNWHG{(piUw|sPNr%MY6349G#FZYR0Iw&
zD0(brP!sTAP!v#NbP`r#kYU)iUQOdTgAT*A9u*B&21N%kMm3G)42l}8j86Kh3Y+tYD;LT{mFug~`L4#3I
zV>^SI12^2y4h%DU)GV|ZA^xpoRI_*m_pboM=Jjd@oQy6ElcD|%W>hmciQ-=mhAyao
zwHT58E5Wc8>|Y;-sZjrlqWCv}p}$AX!;L}3V(+0
zIV@rbVVKyX;?TjU=D@_LXmF81(clDwQ>+?;nnf#P1jxS@=@9=0JY`S}@M36+VzQZ8
z>7?Qmti_;ek;ACyafn&P!ktmYAcs*E6ki&ka9PIS
zRpTgwVge7NqC+d=AvX;MRRb+XMTcyuzVI4omO1;ri6zY#AO
z4#jFSs5-PVDh51aRB^~)RIzAfR0XA112;y+fa45@LSX)HV#4o#Cj$OYBH(`|tp3+v
z=;}d)ffFOPFtA|g>;a{Fa5zLLF`|Y;2BV?_C!+^LXAd|o0>ELxs1m@%sN%5<5>}wF
zuz1N30a62sj{sIim4H{^{HEf;$_Nfm0XK%5c|0}?U-y_Q3V1Rc5>aAM{BVX@&EN%t
zn!zCk#ScfB6+awfcKU9|pr+x@pt$1=lbXgp2E`pOm=t$BWjeIioIy?F5VPWjGfZk4
z+Zhx$9A{G8aFoeus~LmhiZx7X8vmHoG`2A)3M^t$6mVs50-3*{he^%iI+Nmuc}!{+
zj~Em`90!}PI3tHi%^-|H&EOt`;*N4A#U0Ne<{KPhR-E9&q-JoPL2*JDli~z7Ca0-J
z3?Q==J9L=TG&V6Pb|^6^cBnEr^%yd!34}8#Ht;a12?R1IHpnq4HZU0E#cgijRzn6^|I5YV;Wt1$-FQG$fhTG}bdHHUuyz3a~PHFtqkKi7PQE8mwVZ
z)A+%trm=`Y@x)CAP&_K0P=(l~;m@FGpu?!9v6CT!p{qynzzqh)1FR7HG?bVX6F}zf
zU{I{+XH=|s%E$vU6KtO=gQCP^M#T(XX2k+MW*&y7H7X4I`V|z82I+AqSe
zrC)$yb3YHmrhX2Fjr}YP8~Ozpn%9Uh^sbR$=vxEo-)S)HRd-EivSCzqQURH9_C1qL
z=V~Vt0fweEyJj%i{JZ01BErzL#z=t4rYyusMS`Je4Ff~N8Wx5Iuzn7PhBX)d?^V}e
z*t%YYVas|MhE3~1CpPIY>|d|Iuz5Y`)F$vvn-dN&C@xsQAk1(;K!#zW3Ijt+j{}2%
zin0I;llBZJCT@XXCPf7mCeZ0KiU#2I&^(GWK=hJ6~M6h2#yS^2i8MFnO
z7+`)?f%+A+D_n*_NR5TTL4bvUWgX~rBZ#?7>lhi5R2u%Xswhf0Gg&gY=rAy(F0f>1
z5MW?nT4%w)rlJhWTMAB~t`hh*6BY*MK9GJVb!LVG0!$1CB$yc#1zZ?77?{?vFfgyP
zW^i6*!QiCEz~H=tgMqovhQUeAp22w)hz}az1nqR^VPNf(U|{MKU|{JJVPNiKW>8(l
zz@WN|ok3+43xmooZU*I591P04_!*Q|@h~XuLZkzxb%=Dpv<{IDnAWK>pHh~z&824Rq1@Q!@Y={%q?cmTT51au4H|NoCc
z?KTWduki)YE*LtF8G`zNpf)PY0|*TOP#+n@1obmOqtzfb2p`~KU;yP1P+uCP
zAEXYX4Sko)9*`hN0~CYQf|#IP2_Pw0KOUDl(C!oDu?Ubl(AWdW3=js{3*v)zHGs^9
znRf+bI7k5$gXBO=(C!xy8)Pns4^oG1ECRGT9eFH5kdwH6h9V~e1NiJ+kl{$XP(XHq
zG8j~tA%&ZPL4lD0H0cK3*#hzhsP7F5W0)U6YFl_17_2}HCiY*2}uS91`9UG?mG}4
z{q}XxMlR4w(h}&Ze9+hh%t%l;GJrZT$qXSyiFw6o`9-n707SDfFf>5v+|1%+NM&$AeSurRdf%xcS
zqUbZ2ATvPfKovBosDPztTwsYB1xAa$TT3^Na8FNlwxr;&H9g4Dw7MbFb9b;RW9l|<%g&`wBVRvTOZWfSNP
z)%fN)E-*7NfRC5~c><}e0_DOfnEyZmLm^MY$|(>HYC8y_&2xZu=7HJ>FnQ3iXP|h7
z@gao)2Q4{*%xyqO*bIlM
zkqJbAh#G$iH|A)m$KSo`3z#;ozrwVse+|>t^(&aRtY5;kdHoEg4ePfs?O(rvY1{fa
zOdHoLE@)sl!L*_O4AbU*eg+4j3rt)4nHZe(;u#!7L>R5pzkz8R$ejKa
zOk4VwFm3K%z_h7<4%5c|8PIdhcQAoQWyMqk7?@PF1VR};{dW)n>HYXWK?52k(Vzc6iI|AA@S`Zr8l*S}!evii3|<`BFvlnL3cn*U~my&Vqj63z~CaH017LHCF-EF^c4-j
z3lexhcY;VTFX}I60G-g5qQ%G{q9VeuP5lDXlJz{yOZx?wA@LKzutc3nOoRbMgU(K5
zWMBiICn&(MXfcxr4sjvu;vl^+b3pMUz_4X8h!0|e&cp<{2Q*rswF5K?6V3z@gO9-M
zaA3H=w4~pdp+SU&;gKFQgQyWBgOdd#!&W_&6^ocuJH(lo84Qh@K8Q1b(h4KPRx6O%
zP%}VfAkP)1Me9LgF#FUQ6ojrYE$WwHcn|~{9chq|WAJ215CFNsone6(C_RDCnq)ZM
z!@$td!^p5yMa_YoQQKl40|P_H8Wx6QDnI@|5Mg0xQQ>BI3^qeiftiVcp>;x+;o&;a
znZ9ZUM;Wv=${83K+7|r$zd(eMp+yB`*UkUIAt1Ma{H!bx&LGO*ARxiKXuV>CIMWnx
zTAHHv_5T53u=^#z_qZ}JFr@b|Ff8it~X{h&1dhiQNR52k(nUzoP{e_-0y|AuL6{|lxqpmf&%fN4|z9j1-_H=uc&fqAcb
zCwM!NkP3(vVGvRQ-64|y-$lTIK}dyzk%0r0*B^t@E~uFNuvh&D|GxDf__wW>5!lx+
zBCxF=6#ifMx37P|ziIs+{{8FU@NZrJf`7~UC;Xe&-{If5{s#Ys^$Y?_)+>V2?t}vj
z0s@QsB?Pwjb21zd=GqX(5X5*$n2CW&C7kh)xB>&4$`<}*>m3+GRU8;W%icv)1Q=LU
zw(u_jiwQ7@sQmw5prY6y$|TJo%JhYC0h3Sz1A{%IgAh}LXwm=wfoh5!rcBZdrVzOf
z1_q`M(;`IyQ6@!!K!!d1i`Fx;IO#Zo?oygzz_fvTiTV!yCF_syFIc~We`)^?e$d&+
zTNyU+FI~TZe^I}Jz|ww2j{pYHxtLe@7q7p-zkK}}{uSV|?F9eI^;h^8_g~;&-hYOF
zML!P%gVYKBmEbs#VsK{o!kECYfqz-QqQW5tP#O@>U|>+xc*?-Quyn%r{{bQl46O^e
z7!;&HaVEtO#PEgDfk{z9i4m+;fq_9$0d)F6%Y+~Q14S4ZQWo$sK9FK!IHU!-8{`20
zqV?Vk2ZTXkpTqzOze2x0ib*uVrjQ#%55uByZ$h&#Y$A7Nl%
zXqoWs{~|Gv*`PdP!Ma3UpTR)@L{EaAUkqX&;a}Fz!f-&~5C48}84d~~5F2!#?GOHa
z{a^UE_kZBu*8hfoYyS)WE&WgUH}^l_-_(DHe`Eg*e#qIg3<8kR&>IY(@Lt-#haXbj
zfcPK`vLAF7`2qe#{TD%Jj0%8OObMufYo*isP=>SAPmw2GVcKYlKzeV8$>|i$H*X{0+IuXgXCfM
zgTz35kT}SG5FchgNc;v9svRIcNG(k60RPhd8UGi+?Ld}?*#Qy*sR!u;*#Y7s+rh!I
zL>&}{pfn3o2jYV;hz-(nfPYzk{r>}SJ3w+EagaRB4v-j#4-yC20pi2#0G;a!l2bHj
zV5t4?5Yqc!NTnJ)Le0P+%8(${!MRjDfgN;bDgy)P&cF@)8~PPH7NDG0%gx{r0!l|<
zbsEs~XAKrGfyzEue1POY_H=MAQQyM9q#xuKt%m6gTnZnUKi+{N22kGA*uc=l$iTrMuyj4hEDKi18O$A=%hW;V7K7XkGhdCtfdzE#wwAym
zCeT^MS^}X=$_x$xAiI?fHi6G(1*rwq0ie9EtYO3il7oo3GJy1g*dTjAG)V69eOkRy?JmpR{~ZEA@@7m79H1~VVq)Ovho(_bTOyu`
zfdgb8$PSQQH$eGUfr05Jh=$$GIl+Meqz=?F_XVZ@4$%2jtSVdhmx9YmQ28msAfhq{
zBsYP90aP{!FdPzgU|>>N2rk!!RQB*M>4%kTAbUV%+YbIk@N$iV!9f62wt>o-Fh&NB
zBm9fjZ{c6Gz5!Z3J1~fV%>tcw{)ZX+d9Ms3X!IPk?*kMcAPnk3f@sjF6=-A^#0KFG
zK?Vj;N+vXV4%+JhQV+who*4S*IWBdeQEueXbC5bv6%I2Gu
z6Yk-nk5Yj`5n&oL1F~tLQ7b~~SrMASt21F^n-F2lGo?5nmvJyKFr0vneuFO7nEK=Y!C+V!3RKsIM9&?@ZqaSd{F#BxnT3cVH~LXB&gk6m>_33WunQ0
z&QgL2f$Xb?aiID^qnI@;3=A@C5dG88hR3VED6p?1StiZYQ*4?o0uG&TH>8r31&ic
zgPCBx3<2KG!G=chVAZe*lH7uL@bNUDb7*o>6N_MrK0$*dU}pwrB$^r;F+eD&kq{2V
zP^>56K;33!Y6fy%a7Ln$sTo8sf)CaX;^r2B&N+$)A2|ea3+N=Jl1v7OFo-J61D%(X
zni8LsnFl#<2FsZ}&M0RRtzckaVBuw80G;{B!pFdH0mSEn%s{b#&SGGM>{}E8(Si&N
zIv`qzfx!esvobJ%&V~e?GZO*g3otMgK3b1A_;M=3`(80nwm+{~($VI@`w2z%T{GXJufR1EPf)7}kJj0S1O0AX<=t;Rc8n
zfS&gv$iVOe#0M3rpxHP@1_l8Ttpq*yMVW!Y2FmvV(aH=AF(8_ifguA#gU+!4(V+7>
zK(qn_!wC>A4L#>Ynt|a1h%dyz@CQVL&IJLTw*vAXh*o1@FaXi&3=A6@n6|!Fylny}qR6%r6Vp39O32ej?v47GM*9uQFOCw@u
zJXo-dSt>BJ^*Auh=rQqSvQc4Z?eV?rWCB`oWEAhV~w931>z{
zher&G63mPq42#!$Fs$h}U})_zVQB7AbXd)xZPCuCXu-~C!O+vAXaF+fDT5+t6`?>A
zqqf9i21N;Hh7g9u>z6QWTW`bA+Y`dDtzR)>HKTUI879Sq97YL-=AJbS`_`{u*uH)N
z!`Ah47`CjR!LWJ#6oyUfCopVW-@~wBeFMXe^*#*C*9S0w#y-1xSQt8cI2by5co^Dy
z1Q^NH#tTgpRFsxbcz_7hvQQ|OD1jrtbmrNcEtNRrN4l(`zZ)T_%z{Lz&#p=Sa
zqn|0_T9Kjy2lM~`qJ}99tJgC{Y%Ti#|BFEe!|L@u3~TzCBBm7m{~vDH!mxe4qCp!Y
z(~j>&|Nmb$$YEH$K7e6uKT||;k)p;@MyEaE3<(U|*Z=>&$smPcdw&7gte_&0cnZVz
z^*IdN`%4&BuLtq}|1UK7|3APWhhh8r5{B*lOc91f5)1-NAh{BT?dyehFfcG3VPc43
z*a23b!LXyhhGF~q1cvSXPDdmdG8lHO7iM_CRKT#KzXhZp)bM05FRlQYe?)?zfMLh_
z3Wgp1Aag+KD;Rcw^sbL!*wGJK`N~wo$)J5eoY{e4#u}yr-wHwQWh&udP~0HS46=ji
zz}3P-yCMF`0GXe|&Y-wLoSA9Imcm1u#TZf;wyn=$*w)XK!p5Mu;2RUuj>&}uAbt!h
zgW?Pjzo@VT#Q(y~pf~}DkD>bS0U4m_k~Oj9ED64&kL9&k_(swoC=sc
zGz*ywjuoUZZ0kSNEWpsfu%lnGp@31b;v18i!wE(;iNnll0!&P57Rwpc4B8mgJYF&~
z<)||#fWj+8nStqu5(86;27}@ZB}S$eRR(Z+N?60lbWDSRX`31YQ;jAAQ;8)5Q;Zse
zqQ^@HMT_MOKA>=1rp(|1N;7?y42lulOo{@aRfCa?Aq-3VBN$foD|%Qkg3?$3!;XFj
zhBf_)7T*{Y3*Iq$fWoMwkV#P>ghA2a1f!xvGNTT|v^53{)7P*tOkAVF(6dH^p?8f5
z!;Cc+46SQy7`oOlFw9)T!O*dWhoN)L8isxSD;T!-FJai$zkp$D{~U%b{WBOg_fKKi
z)IWh?V}B2L^{VxBSl+|Ku&9TDVMPxI!{VMD|M#kc
z?x_F&U%3@g5x~Io
zhY5Um7}F7U@FC6r|9>-3i4b7?|G(5gCEx?Y|NpFpOjDQ{R6Gh8RDZlpj@LHQkgk0NLsnFH*P
zrZqea^Vf(l%v>YGFk_7ZL;o5LhQ2ih483bC7<$&IFm$icVdz?8!qB+}v~tphp>+)l
z!=yD13=N>8sd*$AmVw70LGucremgR)z+l=Zz@XKq!eG)T!l2ow!C>4c!JyHn!(h}W
z!=T=0z+m6Uz@XP>!eH6Q!l2t{!C=wH!JyM;!=T^C!=T-#wqg~N+Ja6dwHX;qY7^X<
z)PB5URy(1~tOi<{TJf4ufx&d03WLcy4F=fU!nJ`$cvtY1TXTzYs&V@m5
zT?&KgIu8cjbr}pM>wFk=*5xo5uM1$%URS_iv@V1}Yh4M0{W=HmowCdNBN#N-RWMkt
zi($}MSHobjE`dRPT?2#uIva)q0xb+m>zEmicCa%X>0n?uI)jDb$c+F0w;8B3OkiLF
z9X@Bm!k{RzfI(590d#lNdJ%>t>s2+xnN$^yF}W}psHrX3!k|{s&!Bc(*xawfu&G~zVPn4v^iEI@2GBg)
zg7qQ{3)X|~A_9#=fyN={g2rzo7#KEycSk(ZabVcC-h^TEdIN?{>wOsZulHcsx88+e
z`+6IOt?Mlqwyf7-*tlMUVZ(aG4Gj#66BaO-gYICQae(2&|F0@c3q=_O7&fRd2#PR(
zRwFBZIKZH|V*!H;cx5c;E1*L
zK@3Nxd0s+
z3UdjD1>ig-!?0j|1jErjklzy+j`Vpj9O_eGSl-VR!^FT;!U{g*kqOjr7GYv=VK~#r
zpu@`G!*HsPL4}1OgyCc#lMFLM48w^&HH8#LHHjn!HG^Y}Y8p!!ntz@guLs@fX9T)m(ZGR8RUw#(h2f1zDYF?4MuH;Yz78~lWRcpNT7MF@BbM@LGxN0|34A{g|8WRMW0m2}A
zL45Qv!VnzxqK^@R)DbgAIFSpKW{fMgbOLBa*Z24R>w5Dl6f0EvO{
z6CMTz&~9ID2FTg*Ab)_yYCz+#$mU()Wne%a4+EJ4(vOaj#mN~XgasF<-_3+EMu==W
zZN>~it6o5Mzk!a~X)-V{xUfU+r~s{!VSsiBlNo{>ot!*F;`34~O5%%4KucwVzbU}InifzmNh8gzdJXq7B%73~AiH~||2!wV?=0ZQ9|`s-{A
z3`?N&3Q)fqGz1Fjx3V!X6lE5q=E7IjAoWvmt)>Mnx&e1o3GYN4Juw6{#|qB>;N%Wk
z)e2@n2~eH^G0|7vp{s+XUi6iBxYVJqyaTBNl`$Z@Kp12%h>yPV4zwB;BoD(ddqFJ{
z5F1pMf#g8yu$4I=@vr~?=Y!OMFlZbaR3?DfAPh1CM5C8Ev{+3GD-S^S!R!UGkukD3
z;W7ug^utz$Ae#n~C!`(}3kcT`wVD>1S(6!xiW3n-OA1K27RP#86H7A-aHb_-r^ZTh=dN+q`}b+ott1*fy?T!?u4tXrGkgi~|gc
z6CN-eVA}#-&2WTmYd;r*gTSQ!Oe$;G_V=$~+uFZ`ZA*f#agVB6R~g$=Tb
zVFTM23bu`EAiW?n)EPjt
z(@fA6U`y1sB?1`K7!m}OC4?E29hjJy8IldOH8L2uBv=`JK`l>>1O`Qk1kg-618CKf
zwm~Zc14F_BP)qXn{{teR6;fghtbvL%GMJPDSQ(ovxELBd*crGP6a*nXo>V4~KE((I
z25p0O1_p-JYe4!ytyM*dOa?XvPeIV$P>^}r3ZQwagav>8H-OCrnaRKqunrd9pjLGM
ze`Xaf2_^=RKNJNL7(j9-xIp0t>g6!-STHSD=VWjYSirGC4HSkTKZE=ZiYpKe3KJm)
z1`bf1f%Jah0qJD`WgVUbmgVZ7|2v4l^d+!BRvrj2EK`5`-$A4g8ut?XAUzQKK=H-O
z;2_ZbpGjph0|N)hzFhFisstvG`G|DYz;NfkgGdk544B!V)fnyn9Rzxj^n-2@cMyb(
zh`0#0f=5O``St*KZ{+6n0Sw^Vh#|M$D4CZQ(m3W{z4F(=2hHHA93_vD+MoZA!x$JIO;S{t%JBbx!vaMO2XGvLR+obJ
zbt));Z@l$kSgsE0?SbM}gkke~1_o!1I}8jQ+zXr;KxYrgFl<;a!mxb3V#5IjW(Fn|
zP-1j{oD-BI!X))0*nkQlb9Ho
zRTM2iv7j-DkwHyOiJ@8G|9>YHMg|TQCI)96E`|gVMh0dTMux)^*clQ8Kk{DPR
z8Uz$Il$jVAmP`QMmJG@-q72RgiVBAr{{L^8z{1cVqAcLdpl$JpL4e@_C;%Biy(^F#
zkZ+p??R^B9`R%_u=xk1~8y@^`76G|In~{M-+kpeD@8f@lP?&y2iNm1z=XL1jK++MY
zY+b;hsL{XxS}h41eE^L#C@?IA-kQB-z2XE&+EMIyzyR7q>%-t6pun)SUr_;6_Au~(
z;sX?}ps)*ISk$kmkiY~=^NI!uOcD&s)g>48P$xWMX|K(}m90F{j(_1Y34
z;61mB3Q0_i49ydM{|AM?lZq}wlaQjsB8LC}lP9n+B#0<4XkyYfxWb^pZ~zjvpcQ)y
z7#OrVOqeto6of#xY6t%pQBeem8$ikdkRL$l2}FZ#)m9W}U;>RcfJPnAM;t)6fP>rv
zS`h?u|Hc1FA|UsJRxxQ?urq+nX#UTn0@4pM2b&p+3m6z~{(lexa>s-J4Qz@Uix_4y
zGH`(033iJ?0~2`ENP__*U4vHgkejYSX?CE~HOLLv()GguPS>Dtr6gU0^bh594RSxW
zbZx=Jz(Gm6_Gdy(*TJBbaT*K^C%_~9o7a0VZ0=WJ*aWZNG{9#8Y+Mg2OH3H{uQy=W
zwqA!}>w4t6%>`7(FK}RRf!1xjNOhYD18BsyfysbjTfYv&)_x6!E&VDGJNji9Hug(E
zM-MF+_Ns&Gwa?Icjh}%*2vnzm>M~GRFfpj8{byiR`S*XB8Uq8Uo-+fttHAZ0!c``0
z^%S^lfYwzm;JRuNv^<2=Rg;+@brp0=3&S7&{|i913V!>$9Mbrd5De
z+(Gw5f%-upb)eBP^wBgO&~OpVFlg@>#6=%X!=(|~1hLUa(?II5^=v^cVdS1|BatiaCUO%ung$vr1Kp$q3Lel+j39r2DoFIv
zG!+2`2ISREFn@sjf{c;H3HNM~$Ll~nSHymG(4^f!jHaQlxC5m(nEycG0!jzSd{BHN
z^U+t_MZzSZE7(AL2Vp`W^NL{{sC+FNzXgro%>cQn3Zxe_x(8Ze$HUA3J`oqh2c4}b
z!py*609`@22~9s}ZvadPWX5UGXdw#&186TRNI&S14A4j)Xw?#k{}rYf>ON+q2nOlr
zLgR}uGBC)1ZqI<)uf@o~V8Q`e1qCwCf{}sY3nv2u=vG4z--VHZ0d#UXD9?iU-~onY
zhM?j^x6-_1*tKtqQ!1E{+KS^-xAUHJy8SU@Y^z$@W+85kab#Mu}azJO@ZZ9$-wYoPNH
zKr}xC19)W|KLdjdh%d;%0E$D<2ry_43S@2oNSvR60lY$vje#Kn#1~{>5CE-U6JlTh
z^^ig8O+b7B1_mDx&CkFP0;OX>G^lU|(E`vFal#A?u$$Y!E8;*mB!lGH7#PlgXwZ#u
zAR2Tt7KmnJU!N_CWbM&=Kt(5G}{RumnU)
zGccS1(QFJ16`+x9c?O0C5DmIP3Pgi2bVM6`euOl1B^(=c#T!T-I?@e3M?#K)p$5d4
zW?)zXqCxHit^AT_V2A+G3JeT$Ks4w~3@8m=Atueh@CM4)0gadoGBAK{7+{fSVAuoV
zOEWNlZUz8_E9fQw5Dm&lpmQur(sHql(HR>UVL#K?*x1wrGDt^wWW6ODb=N9C0}sQF
zzkAgkm^Q7qVcNLff@#Bg7bfU<+=K=OONIp!pguQr3Hw`_VF;d^a(HofyCCZFu1MZU~pZ-!{D;!+ka;<0R|@(1_qZt76#`&
z1_qZkEDX+T6d07Wycrw<6qwli6quO%|I&(I+9=YO(_qQC-%-~Sy#7#LD|
zK>cV1CWdt?Oib%snD+NOFm39$VcOVl0o`fm!L(QX=l?bV1*Rqy1_rl276#Wo4hEM#
z9tLNqU)a{MFtD!UU|?Ct!@#`m+kYo90R{okIZJ&k3{HIv44|`@7&urMnARyUF@fyq
zvt|GdC@`&Ku~29F|35|L?EeOq|Noz>GzhRTC@^rUC<-t!DSH?)g8GU7|8uA?FgW+H
zXs9x>87MQU8Y}~iDS+IvMn&T>!;k+RB7gonses1HKw;vnD9E5C(9Qtb5vFYLgu#a4
zfP|t115<+n3utE=6Ue^|46Qw&u{Z{X)HR^le2<0lmquRZMGuy<1F2alV9R(^oXj&;h=umHuI0uwWw4;rrk`5)9T)?i`-UHrnK
zD8T?8|A2)b$S)uF{*X7yEr><|Fen-7>37$E0ScQ7!is4zA4s4y+=+0Eb_pun`a
zM}eugM}cWwkCw$*MmdHDAqq_Ad$cUpF=j#8|Nk#n6=!(B(%`_(z~#|V!{xA|MmvC$
zQHa4oRNFy=F`j`z^xyxLstq2T42lk&4FCW0t6T-y?EyL+K&$u9e-2gc1aC$*h6YjX
zfGoyf1_#kU|20)XasB=O`w#{O?p~0cDolsg++{c*slar0O~U~`29Tc=9T*rCJs23c
zBARQs0v6XOTVyaQCvY+-2fSj?j!0)zj_7982Aw0BaF{{aBApSkv-E`l14Gx^PyZ`K
zKzbFJntQY~4l@cfED&f2U}k8r;A2qKXlGEgIL@G`&;=T&?E#I^DhFgRYDZ)-Do1ED
zGBCVa!^n_f2-5%k{}K@vhUY5k3LrN%GcYooQ&lWD%%~-Co{^Iw0n|ibXprDzXsF<4
z0F6T_R-6Zo8?OPm<=_AO5C(>XHS-x32>$=SShYccnSo2;NDVJTgUG-COH@JW5tP;x
z6+o?))}H_W(^WVa7Kr@$-=d-@@qpp?|AY`wI#pmgum%**pffi>;iSNH7(7-AVW00&
zVLH5K3c~_P1*UUr8V>M+(+48#7S(VCG~o%mL(s4Tjq$<4E&>{Mt9!HrRx=7SI0!UY
za5FS0fXrUP0CKOQ#&QM*2Cp7ao=~>%VAKw9XH*UVwT9Z)Ffw>R!_F1F<5*pQmq9VY
zn}LyGt*Tc9W%Lm3zrtPNv0Ao&0P
zAyr8EcBFv@hST9S3QX-i3QXsE
zv@#wua7nynP|QeR0EM3mLxKb-JR1@~XT>ovz{4$IQ4N
z2E_nRMs1153?P3iI)LsFPhb1xzYjRPSQ!`swFK5Nb}%f~RAEREQ4~1D0OEuE3QpGo
zyx_C~5(lLfP&ooJ2Ue!E|6d>ois%3T7pXQ#FfnjR9IoMGND%o4N;{yl>?95|)cgne
z*Hr~nZnJ^QlVp{}VE-;)0Hu?B5L*INt{hsU1Rk_K)B~bH=7Pqb7#N(_^fNMWfZ_tC
z7Ut*opnO}vzyOk0%s_;N9mvcKkeSUr3QUW7v@DVsxCGJ}6qpY8*fBUrfWo<t
z5@r@x!txrffc6^2jN=T70bPuW5gv@%2|kR937w3fasZU46dimR85mZt{qp}EIQ*Cy
z7z8^QTr}hv8bUz%Q%k{_fs>&@0BpVjs61wdrajPjFX%kQ7L|YhTSGu+D@uXWfs0Cm
z1PeIagu&tF1TKf!L1WVbp!?UIdw3WUz;(s{|1Bzi{x^hx>J?DffWi)zzd)xFFfcq>
za}OL&PAUpaN7kq?9qNI}Gl9l&1Q-}V@*usiGIcwHbBF@da%h>lrbkPn7d*G5C9#GP
zR>pm1Xn>Y+Jh;oa0^~C8G^C6xKriD?p_OsXNM#%knPnWvO`tNaM^!PQnNdrkAE}Jv
zf#g$(!_a)1fKtZoCZUX53eBhZ$~akugb+psCmm3^x#52TOM?Y71D8X44VT688f}jk
z46FYuh-zD~GYT<05c&6ig=zz6UcjP*;s1X=l~PdrIDq!WaQ6QB|6D~oLW^zI
zK!XG?LxTc0gQ5j!1^;0NMU5p4Ah&?@DJy`=Qx|A?nu1iGJ_WZ?)FnXWX*Qxfl>n8e
z(7H$gTAnH#fyNUopY((CNgzXm;Q#;4@VaR6e^6c20xwVJ{s*-u(^WwAjx{u%c7wuG
z0#u%MK+8~eMlK6pM#YQ=44|-bVt62-z;t{~LjtJ1gcMd}l%bF^V6mn$1L@^w0TJbA
zDwgu|Gsu4epz;&BUOlu1InTq&&ihP|vNIa22jN!@5I=!|0VI!Hc1{9`gUe1(TdN5i
zetzIO=g^vl3TCu2v%LnCzLWzx7?m?P8I&Wu8MPC-7?l&&Flq;QGlI%e<$x}vw6%Ke
zr~mJvX{)D4OCyH?($3*w0Oc3*+BwV&iU~aop!qvRi5vzkg*46dssm>C)hK<%Kz
z42lKkklHzU;C7A}xD0kyfwgn^!F4sP3{DUL)q4yKE|9EBw4p3POt6wxhd~iJn3e#1fdT9-)ttZ8hAOV^q0`+e|YKx%i6dgdL
z0LQ_rNgX`c8B`rO85tNn)+jJ_^c=EhXV7xU0N3eXp{q(o7#;|;GccWe`qzN$1I4eFLON>PTChXfuolOW;x?V;aeECEM*<8C+d#Ag1A`z#n}DLg0R{!8
zW)%ho^xa4;Dhv!>YgiaO*Kja+tl?pBU-RvMvk0W`+}^{&(A>ko;12COFVe6B&Eqni
z>|tnNvXN(SQc=-Z#9+v1(#Jystp3144}Nj$e^hT8W;Et
zPDdx#JowL~qN=fo;TtokOj@b}idW=3;~dD!py=Vr2r`SA!9nEze+|_R22PcB1`ZW1
z0WL;k1_u!Zrju)w1-KYN{nZ8u(A+wxy?dD9&;R4#J}anS&A^bd=Ffk3@VLSM|4gdN
z0UnHs0$!l?J1ii5Ah-Sbe^>?7o&~9gwPz(56a*UtI2gDD4%G;P?PpR2spnu|5CrJ~
zwY~oTXHn&Zw#h(Y^ZP$TC`cTX*FkMEP#^3gGia;;R3@BQ1M(jzzF=Y?buhLYD2xRd
z7$N=Irk)jl_o^!jBr&)!ZCc;K;H=TkAfyt&v~|4?)0XufOqeCVVQuU!T|>4K6pNZgOp;$0wx8f-aZAUyuSbc*MjpN
zXl@y#4z&IURL3g{EMVjkNM=-4NMckDIKrr9;KiUQ;Q%flxC7i6d>9-gLH$2a+5(?0
zq>#d-sPTY7QKFd%Y!5z`&^30m>H&OpFX_g`j*a;K9Hk1nM7as4{9B
ztYiR8D;l#ku
zu@)3gOQ8PS!~#kqt$oK?KxOQswdmt7XoD2y8DokxXpm4`lUx3ts5>{AjQVsD
zXm$f@eX78;U=3(a8&dZyTcg0V7+SY3Tcgj)zyXp2WtT&v{z)%Vw-`uPYS|a~ICo6&0
z(J3&ws4*~j_OLK`^l&h^_3$vb_CU($%rz_w8EZHg($?@Wq^|k)-$g`#AsJlOurN6F
zfXW&chNLwLOiq0cf=mor0!pA0Zv+?^RJG(8l+?HcRGC0_IcqX87%(mA*A@_A0Nsh8
zB>_6;9X4*q!k{RS#H1*Z%mgZvKxHbdOllBd1gU3=q=4}MGaUlKgRnUCV3<^(y1q>i}p^p1{U>W!I
zAbQ+413d1_(dWm|AO;%OGz6_v1lLiB@m_6knt+V;Lh>wRtXBo$m^Su1Fm32pRCoX`H=${T1C)PZW4}TS
z4+KDC%>oSRLIzBW)EOAk`dAoJ`#2a<`gjJp$7{a*
zPZASgc&@_0kle?@kkrS(@OTXi!=p90><6WLke#3*5Eh3H@EG%Y@E9|PDrAhA3o^zW
z5CR@!{=>?^@&7-kilPSS6m-y7vnwN;K{J!825hX^b&ZMyGvoLFo#6buh!s@MF!wok
zg2tLPm~0sw1e6T~8NC?}NHlZ^GAJqtGJ(dNLG=@;F9j;IF~^!cKrrmss9^8qF
z_V6%xK+BNqH7pESYd9D(*YGf8toioe9a@ICgT^C!7#PymK+2G&9!MFoh(V9RL4bi_
zxrRK$A{8!y3k8j`S!BxHDjuBarqGW;p`t>w?CV+n@
zF{r)*h5Zs}I6nBlR~>Yh2uKXPW?Tbwvet(6G7S5{>v2Hq%()m8*qj9g89;3!&>Buq
zSqB>P0;N$<`eW%(VFKk<28O~lG7S4s?gmi+?L1^^>X`tV6BA%!h+*0aZCi<|L@;ex
zpTo3&eFoFM^(jo-*C#M-TOY!-d3^xWru9Bd8`pb)+F1)47)qFyu3yH`D!{$MnW2OU
zbZQ~UcMRZpvl6Do{mU2@NLer~Ua!E^-^a+nqw@d%4^@W@eujn<5)2kh>-s@$F6D%N
zMo`-j6b7I+m*R<;Oj-i@j8O~@BA}g#4H7&IS`NI-iWUsaiUtjg;C7XO0&^GxgQ%jy
z0!GDv2aL)FZj8m0NcU9kOt~g^eE0?
zU=Zdwz%0m-z{JS$tN_#|6KYTZuNN0)U|1-d`+66q?ft?G2bcsI9xyR7I28z3Fff430iDdK4NB7NhmtVY}6I0I;GLfhaOgAl_35!n2$qCzu+qQ+u|P3)lh3p7u<
zxaZIR78PxaG=`V|ABbp690t`fB7gob1@~9K|Mv)CU}yu6WrN%fvKzDxA4V&K+c%)G
z3CMUA$enTw2SPyZ1G!Zi$&K&+!`!&6hRdK0?8YAjT(y?K<>N^cVlx8
z$UPu89)P;>?tjp@d<&8rmx0Sckh?%(3ktIvU-qi2aPMEQz`bw14EOf+65QL?i*RpU
zFTlNJJrDQh^&H%r*0XSLT+hJ0VZ9Fb()AkLOV%53FI%6_;2>bay?ng_(}W%^i2w!(
zhJ+9ShJET<0!&P03=SeD+)Mg3xR>_paIfiaP!M2Hv{(Wv&(#zaS{M}#9x-q;B(NxI
zG%@`7e+=aA9#H<(c38&1%D^D1t#Ongg<*jRxZTeIYFC5Sx9?L|R5-v4Dw{yaL1eQ(e
zLJX4x6$L=$paYWv=x7ZJ@)O97I^3W<>(rydl-$$6wz>ZY*P``*xE8N(VOy}?o*_Xf
zhGoI}|NoP~{YyoO!^{CJ$vvREqd@hslLRxvKj=Dk1qNmnDd>r_@(j!>0s^43-JM00
zC6X9saxidw;aadBl=f7(_xCGs@9UT0-rg_4y{%t_duzV{_m+Mh?#=xi+?)DYxHtAQ
za6|SwX>jjV2gRug
zMY&-rlcIny6R3V>Vn_%8jTM60@r(>EDxmbs&yXO}z_w()vP1v_sILwl-;;1=QdDqZ
zieXu%&cKk`0~!lpU}#X3QJdn1EGZUyzaKch2G_WlIw~KQs1MYp
z0HtjPhC}N>;Q(TT_PBu9Ao|iUm@WFI$;A8E|ZYP
zGgH9hnQ%31i`FCi@i!x6eGDkPVf`kMAAfQ|#-Cwv+`zVI{Yef6jutl1UJwUx8yMs_
zP+r#(*ur#{5j0P`SWS7xWTqQjo7dmqTG9_1@A<&BWc>%OrTq;GqL8?oAp$zhiCIzM
z2s0?3fYO2D3}dD@TuayA;o7qP3D=VKFSr)3zr(erUrWM=VK+m9$Q`bw{ZF_S^)oP}
z_64v6^awF-5CH8@`SU-e599{WxX2qW(CM>HYi@8Y?FZ>?&|qa?V(8KQz_oNeBSV7O!t$TiM^jwzwY@
zUMo0OuIF+%T3^YiAi0KP@%jb}PDmRqfPn$j{^K%msS{>!U=(CXU}R)qE9_ufqpqmY
z!YGizz#x&6oe}A|O2+3=0Ca6qFb{7+6(U7*qv8aR3@)tzhe2
z1F{b!2bzEGU|Xu*pa5bqF(@i50o}vM0Ge|Kjk*2%-vpjlTfwocUy$K|z<7!f%-@{xEA#*
z8XRKiU^t{PnZZE-Hq)#h>Eg68>6B?69WgdOaRwW0!<7pY@q#@4r@UA
z{{43WuX(!0@IatJ0A%(d<_b2a9zJke0J7EzWH$%H0Rhm-OQ1QP|NoDwWPr;HCly5l
z&|0$tAt3P;91FnxLs0$)=>g?^P?`n#Erw+=_(b+3h9m({J^-b2kUK$X88lx1|9_7v
zsBNPqv6Sf!*V6TW{uis=;99fZ;(vn38?GhmnL#Iy2rw{!>T*z<%Yb`L|0#wB!5EfB
z>kXLD%e2GHpfYVa*o~;|Tu{GwAvC`S{Ri!d1?|ZKt)X%d=wJhtmyoq|YEZqPxhB|J
zI#3!1`O*DJY>U;ma4b=`{a-Es$`6pfNGrH}*S1*3z{&7H1k?uk{(pf0C~Oiq
zL1oh7{vb{U4p5$Rpe5HyYe3_9AU`*N(*yZ!a8UjL#UL=AVsHom*$+w2pm+zR=fez+@br9`
z0hAU&eV_&jP?~E3jg2$3uz~ifx`5kYps~U~|6RfJ5}Rt94=FvbQCAdb
zVr&7&8!SCT*6@ijJP-i2fsxZRXb&{VzuoqIs}g&j6mVbH+v`#&g6
zJNJO%yBC^XR&Xp^zlH-;CnzwXrtd}TKX5JS2c>I8i6h{&2U>%24;;=ZYe4Y;%JVxx
z@gQ)3As1}k0S4H(4QR~9fO}Ct=oD-NCQuqY-p|5tte=D7Xg?3bk$%t#L!fyi)HS7t
z#UW#^NBUV94)=rRjzDWle{e1C|HHMUAJmRf6G#D%f2c4mT4Tb!rr-TvgCL}R0%@;+
z@}~~>qJ9M?=N^#TwG@&VxELCc>R2WQMG0l_J*1#{Pf*|Y-+$CP7E-?|gWC|G^;@8}
z33B}!!LnfeL$H4t7+!HQaDeQo1BHVJ149JMqV+K>i~3Et7xydtD-;0bWl%dV0^Dv<
z?_*(5>*HWh?c-rk=@Vcu#Imkd8M>}krH_R{8NRL-xgH1A;XL4cvuHiJ{ftZo2LVuD
zLxE{xkCsFrw2!et9W;Jjz~CTafYQehg!VC%iSA>>LHihz+^{|d=++s?*c+()1hqSu
z7z{D$aRa7}IQke{)dd+s1r#L~P@#{pv>(#P*dzcd3qkEP1*Rnw^;;U)_Vt7M5;hD6
zgdu&2L+YS03()u!DSZij21s9GB{%tf2~gZgK>HFP_WS>!z67Y94>~h|oc@Gs4+{fi
z%>$?%Tfz-m8=bNSM1#sB5Jv4kEMS72n}EIlu&+OYWqbes|JT(2|No+<+%b(wQNRvI
z{~?e8(SHbpv_V1b6{7kNN)+`U9HI3ka^45EtwH{6m>~%6KRg7b?-{~O3=By~eTSrV
zpu31c=^WH&`2U|r1;hujzk=3Y8Z2Of^dD51w88y{iHQC~hajZ?&=H8#e^5p1KNwQ2
z|8NyY{{iGjX&zAByl6eB?{JeF%m(c*N9#LWVQOV`5K#UwkLmya!)gs3atsX$Vvu;6
zA;R$Q|93UT4nZbG1s3pJ!40l0>p|t^6Rz#+6=!T_`oOhu{R6Hg>+N_LINoqAUjKt@
z>3UEB}m0*VF=Ovrr>keUx%Yx+TUGB7l)1=$O-6SO9iiD9V*DDN^d
zgsXu31Zuy5`ZfPS{t*yl0@d}Pb`hu?1I04~L-?AD3QdKCV>lFp!fpy
zLl*UOISAH)`UTS9KFA_S9|W`>AKnLX#?l9AM(TqkBlSVj5q%H|6+|CIf|&`@2g!x>
zK_pZdLF>#xZHWd6P6kjv0yJ+7YTKjNw<|c7_k-rv{{MdrUV{ZnBcMKr0C+v^KZbw*
zpCI)^K(|MM&h`eaJ5N(-fb~NpK>ZNNx^qxJ5|nNgE&efdFg(^MW&pKmL4Ew^DvS&-
zRJ0`iFtu#1j=|iQ~+Q63w9TNfuCl
z9n?QklxSvz^gR;RfZ7SLw!{tw20`$C3<+kY3by1P(7I@_KP8yK?L-bxTTTKpcK!eV
zQxz|0S)*tH>U%r@?{fjQ)4={wSO9ICfzBjn;90`~YGZ)fpiC-m(7wkHt|k3OJPaI9
zxYqO+f%^a~Dxf(M4u%GS4mQx7C8#~vs-gyK4=RA{fvhJ6r7@6Q>Hk4}wgu~Na4qgn
z`=1~KY5ylf+y6|^{_f)S>HnKVKl1k(eE?AY<=P=w7tRCf15D{X$^+^H
zu&aClt6RSQ07#uh0>cNc#r;pXmVo;K3=BzY{COBSesC>WPtCr7qQNm{^nL)OPkRrk
z4{#5Xra*mKa35e111Rm|>H|R9|Hqg?V_b;-EV1o>CMHmymhARFFC>f+?f(T#pmG|N
zZ((&eD4j7dDEEQNYw&n6gYr7$bOwqCQ2M+9iU)}Y47p%44=~IJ@gZ&Der$c*kAES3
zTu8eelBPj+5^lFIW>QoD?LvgD<;K=-U(5vRCqwowq4twO?e^1PHzL~U2HcDL&;Bh%
zYo{;oV_{g<$HB0)kB4DNA7uRxXpJ87{z01gbNIpy?X4ZpDXb
z(|Q4hP3i$mo7a0VZCvjHnp*^|;R2llqyQO@Q|vgv09xY(s!u@m3UvJn({C=&c`go2
zqM)&VrX~FGofI0W(~{!^(8EuAalGEKx;1)m_Ysoo#_PfKWI(?H0A%9
zuTa>szCdBq`V55)>su7|uWwM;w!TJT>-rLf&Fga%Hm(PsnK7Y(ffalf59n;4#h^8p
z21<;e^;b)J1Q@oeL)wst`50_r1Ug3xIm}?~6j&JE;M%N?K8FJecVs<63>(0EK_PuD
z7K-LFg%|>%YplR?Lll_>>Q^ZWEMQ7tS*&ir1RC!ne|!g2C*nybXltH8>BLC|(jQmv
z1BDl8TmlqkpmYfeThLfW1KT3-*x3zGJCzp4C$NCV)>;gT
z85%%skpBPwT~s6)CJKPg90RTK0gXk1#!^A!p9jp@7@RCv8B{HfL-&rluVG|ZX7J0CY;Pts6cl}~?5NKgr)(@UXPyp>q
zTEY~-0vYcGrI~;KA?x13`}+i%!0Yt>|4&tU2JRm?sesnxK=${!^nm+71`G@rxR&&D
zF*HcDuq|7^fdk}sCj-#f$^ZY&D&RC`09rfDz@whv$gM~p=<0$ByC=~_<*ENg`Z3aL77lQqKfooAeXum6{eF-|}3e>;ez_CnS
zQQ|Ooohqn(`S-s&cpW>)zTJ!s0#~>|euk`%Qb@0*YHuymBxyu!7F5V`OkLU}JO;0fpxep2eWs
zDH%cQg#{QISipJ(SitRrY<^JPy9jjCB?C%a8^Ge)Z4D#CQiJc%xL(1rs9#F~wDtarO@Z8(shA^RFY^(ClHEyoDjHv@@dP?>-p&!S*I
zqsB9+P56UndH+%Y&=?Nr1XE@e7KY{k&<(-73=Sd;yi3$U>=uRn{h+p1gTl7{8ilR>
z6$)GWOB6Qu7btA%&r#UepP>LLKRXn_R_+Kf2t&)(1SSP0%F0#+{zahkG+7vUA$gAj94Cv^Jp>o^voJWYXz)YC
zr~h{V#~B0fB6U#sD)58GW3iQ;pqqEw*Kjbjt>Iy41?}+{5nyNm;RXg
z63h%G!b?Cm%rK}jIRq34gXT<9dmb`^=E;&(;sikJT%1%uWdg{bp!Rh;L!bbN58C$w
z69bh)pmQ`qe2_S(oGJY0AOb047Wb?DPXNc^8V*n$!la`3ze#|JAz4EKD&E1ixSxq3
zMMvg;16Z9DRQwOm;(ktsBoP&+pgu+hK^0Kl1xo7>dlH!b@GR>8{Xb9uBreD>SqOBd
z-VYv7`bh6%VMy!aU`XxbVMu|laYb(fCqvu7DSa#q$?!I?3e%)@b3kR>1O|o`9E;b3
z$`CGw2NG*ImaPZP5rWD|NImfw>K<4hAb|;_7SvA`XGj1YeZ&A>!wy;-4UR*X9#A|v
z8L%*@g3nX{t-}VDm96kP;s+0;j&J~-i68+Q>rV!)JySuh8$fo*F+33X!viWOAA`?B
zP!w3ibb`yNM~=ZkVjlYSO_pM-W6cr_`$OnJf8?+gX#p(ZQ-!;6)Yz4fB{rKgX(ff9D&Y(
zOke`ll@NXcQ;`4z2Pl0=@q_5a>%;jOI6(bz5DhXDBo3lag3_>s0|T_Y1Fzp;;9aKv
zoF6n-#=ro|Gdmd;uz>a{R0u=Lifs%IBA_xtKn9fGmZ*U0t_tC0>Yy<(P(3Rp2&oG|
zbEKd?J-E&WwNv1AR~oeLnhKuh0@Y#GUa$<|mL5>}gL3k}|4YE*LLhU%aijp+iwYSRx`<_5
zXol#5^`Nn#LktcQb3~V~{~!q|H}*3m2w2E1?uXPD3E=Pn%^!ivAO>F0yd9|D)xZD=
z3l|j$SUoPm!Vm)r2hco{0qFFeR7l$ePdEt3Eba%DAsnFgnnD5tXpe-Vf(jF8UmGM0
zlE7ggAhV=@1w(^?hzuxgLfS2$+u=du2oEH|ZI=+x4J@$s3#9D=nXCH$-&JKQY#a&c
zyc7W$NE)?}ThT8fvur)6O(FyGiv|OugbX5XCxZNBzyNKR5cU%&?6edzAaSb!@sorM
z_PDi>TiRd1ut2~@4l`~!WLkPaV}79chs7<(9Q3%2!4kI?a*((M>9vttzMd7Ho*{AU
z58fZVLU}6B(F^U!{kTYO}7&t&T96p1tp=(;VPOWcdx0n{A1N?_^3@4(
z7{7txnjixQC|r@<_fn970~9`4eRQh-rl%aE`ZR=PVTGw$f
zw5;P{XkPd2zmk{$=(ZXL$%naEeec-lxvI=^;0%RA+Js|r)b{!F4+7B9Uwq|e$I3NycSEPW~=YZNQ
zB|?yP1;`IK{wGL)^qdff`0WZfE}d0;gcvwL=DC3FWMDWTzG(dm$tC?q#FwrI?HK~a
z1*o0__rW9@7^Z>Lf&Ju$~qt3&8C_5FaGY#;_njg$Z=VM^g_ogF^_24O)K-S`PwRgUJUzuNbs8xTyz}
zH$i95gTxsantHS)7BMh0BnW70xWd;ngY<#)a|y75#Xxyo0lepVagUZk5@`Li04Q&Q
z)PT&9W=IeL`3uxmX)s_$S^NAAx~>?s_8D{@6s&)(sL;gl5$wN33=9m5dO&Mnv@P5i
zUV+vX3mgKi1A(r62A%hifp_gQ14DBUBSVsb5QBpN6GNH`3&Sx32Lm<+MT5f(Oag}s
zm>5`8lr5SVm<*m3fbuJo!{GvDiw-cK$>MNj12rL|NnEVC@}DN}**%AjS?#PIF^0dW7GgJD4cXn!IbgCCe?V8~wsQpd;uI{$=e9Y~IYAt699z=5Fw
z+zw<$Y6n90x`W)Nz+~B{C7{JD!{8vI!o<_3B@hWZ^C^UpAxQ22e67?lq&GblTpV9@qZV^sFwWY#t~
z!Jupa+Jgb=m#tXC$Z*I2qz`l^)W`ob!Dl~dX>>7!fzFRoU}0#m;DVeXX2H$`T1T&}
zafm_N;3$K#K^g<79|tOfKxX^^tud4U?I(AF?k8ui6JSUPQDNd)_wTy|9!OkpkXFq$~_-
z9~ZCL369SMc-%CA`3wx(|2u?&(uQIJ0|U&>8$kPum^QChVA|Z{!L)U~D?^f&3)7bM
zHsHNP``24AZCr1{v|+vCf&~nU6B-ymXQzYqZu>Cp@AqKZ+V8@&rQd;RbH5GKCeV8N
zeiP^zd;r@14h1GQ6$K{mK2C-NNl^LJpur73KZ{GjsSey$mN*1H7vlGSR}s*9v(*d<
zQVj{h3<31)ES496=4e4TvO>=8PXL?6z%ZeQfniyXVg~~Q
z>OP^RDnigR925l(F=`w5F)%PRtx*&>&+zI03UK=s)UQ*N0G+Cu(xa&0!k`TvOH5hw
z`@aJ?--70f@BcRzWnu7A1-U^n!3VU@92~|B46VJO{Hvt^>T`k4x$9B=^&d2{nXICv
z;LX6s0P5T3sDac#`g7h;Gjr7V7#ai>n0(eX2naK92{_edfY*8^se$S@4-wFKn-fzK
zbnX+fF0%o=Z(o7QVI3$QLF;Q3n7aD31bi4}!DWH>IxT@N#u@(|L_l%$|9_Jzc#jLX
zEO4&ll4u5(1wzoWpzlBE+^c4AK2cO~W&)M@*&ur*nwc2D>)SzlT$VAw%7e!Lknw^4
z|D9A|dt6*VWuk@yI4nSU8d4Ul=wV=J?^8BlVpR5EW>B^`&YWmD|
z1}8YStlz=0Vf`JB{p)XV>|1|@WBd9G9NX5P;n=$V2*>922RJsZ-@~zSz2brc450e!
z3CGg)2N@Cs-f%2m&&1%a!ou*}zyWlwh{YoYCWS`@pt~KESEMk2@(O6p7?Z}M0?>G&
z@`_Zj7-$ZF$>C7}XuL{!MFv9$+cwbUOgv00mKTA<6cs@ChJ(hy85ltNz-?oV1||ij
z<~~q;1v)cq9q6u!6`~B#{YoJM44^gcNh;vXKzpjvdO-FlDm*|bBOΗXn<0eFth
z1ias^sqX+ol8Bp!-@tVGH6z!V%<7h`TJ9mZ^j0
zLP6`VRhXLkrZ6OlSTHS82kpI!U;&LuVjJ5eZtvX_jurik3<4?&Ov1g29SjVaqM&v*
zXn!{Y4`}TTXr2Q!R}Ja|fZPTuHyb467#alS!0UJwKg2N{_#nri_#uu7w5JN9<^VH@
z4N?o{8!TY@|6f22R91n~1UmzRn4-o3rvLxBRO}hDgr0DK)-)HZadjlsC@=`99QrQE
z09udSz_z@fk>P}OLjVUugCGZkmc((;o)|_gk7o>u0S6ek0vp#P>wf_Ximi{9goBI!NZ0g^`v9WV^||0moi-K?X4)MFG&BM`kq!2KGJ{2DUy9
z2G%|v29`d^nX2exhRo10LzX@k24?t}p{6J(FK<^z4x=|5i~2Pgf&?1CYoW2tZ=;)y
z{Y+YrpFnL*Qv3x;e+^8K_&UH8Aj-f2N*j=LixAfW=eY+={UBNZbmrip9#C7rmBC2^
zbdC$`ycQp({opfPKxglQ_H=>f#SK8~|0jUXBwNt~3VSXFCP4v)&FXtZ7HmMH
zMWFu0pZ`W;j0^&53QWpsMLvo%S+^QCm>^HptDUuZFNvR4BI~i+CvUXFA7Ww
z>p=T@B^WmKi!f~L7l7VJ0ohZo1d{6msl}xRlny{?0JQD{bY>4M4S>>w5QB>lC@etp
zW{`8EI(k?b+Iu({+In~xT6-Y#F6i?puydnYq31@qg3pZt?G*u?CkZOAn#Dl*Xi>jn
z2j~v2Mg5911VL+47lFzd4hB~6{bGs+4oo0D-~NN{`B7HmVNehP#Uld)%OnPd)JdTB
z)&Kv7YM^!D3=FJ`7#LC(fx`Cte^7t7SPi5WSA2u^3k!hHbw~z}t8*zd)$lPi2slVG
zGdL-*F#P)uxkHSdAw`9OAytE&A<2MSq7}TR|1dayA22HlID`A6pg3S>NCKT5s=+0Y
z0v0ni{G9c?A
zMm@57Kw~$ceV4in2>~4pOe+8Xd#Y$js4^NdB#0<5HLX#WP-O&-yEGVZg7>2+8niL|
z`QM?!z>p5!lf%Gpe9fQ#86u#wfByehR#nzm3EmUO0h@mTpX1uh@aKOkcn$@WSN{D^
z1@B1&o%sVgN14l`vqpeHLG<5$$R11;anKna%?#Miicnx`Ksp<^X$^xo14lapC+KXs
zHK6_IAit?FHLcMEnIXWyAPAx*6c|Ba4?5$6#bE^lD87Uk99aJU=K%LrL1&_Y_G^RB
zFEe0Za25yE*_9Am42lMzxfqbj<>0wQP}qU`-M{~Lh=6W(*3tm24P77r
z4sY<;-Jt!2&PaRjn!)pjQVa}&3QQhr{{Lr&o@?n+1Df0T_n!qkmH;~A0@QZ`jU#Zt
z+il4zkh2F{dqC}B1ttgZSd9vk^BM&v=QS!!&fq=rAU?F+!~x15b>Q%0V2A_J3JeTP
z42v{CbN7l8t>C^MXk9fZzcVnjPx${oV}i25A_gr3(6~#-g8%>17l8T}-~S%~?-z%K
z(++T77jeEks6PuX%Q_Hiyg+BpgYqKC4cY<%;I=P#9>V~%MhkNH7-+8$uJhYp{NJk%
z%8Mcl``1JL13ue81bk-@(0K+RdqCq=3gA15Hm{dp*tA}RVdHuM=-3sw
z-`xSZkJ5r+b3e#z8-@-2$Y!%JGzcjwG@!JHS-^LZDWHitfbS1?q&
z!qrv*sYP$o5DF(@hF0+YLj~}?3drphP#l8Vp)1y~Ff3og!LV!%55wX$-~Km=2rw*F
z0gY3$Ff{crFf3lf!mtQjZh`EFl_#LGorS?60we|+n+J)5)(C)TP&x(4gV>Psj)zCR
zO>ABEO@h3-43efvZzF-?0J)vi@q4d&0n4WKIV>C3XMor9HZXw7dgxkQ2GBi}B`lD$
znlzZ$R6uinpmH8mc41qe3e^W4UqD^MD*;~945}Xjh48G+Bx((B3CsTe0+vnvIV>Cd
zGob5tE3mBJ1*rqA-^HdDRz4ES7xbzR@zn{SJ3KD@->YuV;H0C$ux-5x!`AgO44c>M
zFzjCssuPjxL-4)KD;gLILH*ASpgEVt4Y~|WD)9_S0gMdWR1_zG#;O*e)OidHN18kt
z8U$1r3bY&;L{vH$1XWlW7=joWn!tBEgY&5hQw@l}M3R96R5#i&Yza_cTGXc~;mW|k
zklgV5e@X}=!%`J3fz1r&;Ijf3^(ind>yrT8cOtNW34GqH2Ll7BeFIu^13E`kkU@cw
zks+lBv`#`OfPq0E0%Vid8byZ$@L5-1|EGc1xUw@OfExP@tPB?gAp4^iF)=b61D(gV
zMuBPBIvsGE4m7`U2zplH;yTb?n17)AP{92T(7iK|y#t_g4&>l-8=(C~hlTUdSQko(E4|g3IoH6
z9u|h>Jsb?ndUzNX_dx1dR;@QBE$#H8eu)U@=B%&hF3+`RmP
z!lL4m(z5c3$|`MrxOwi*&Q=NKknD|1T{lNj`hONtmdnxj{eT2aEFmy%eL$e@>0T+EU0yhH#=)OnL^?e|991IK$=yztOAejZy3sMWB(eKQ}
zr4DpgBIvp`kRA{QsRP}S31WjV$X*a1bcZ6yY}jp(H8|{r-I)pVFGwBoeTyLTK;{NR
z!v(Y#48%W>1v=jb#DZX$I)4TR2IO#IX$JN4AmIWE50E+#9R)QHF&!?1_lNN4h9AlsC*5mgyw&#<89;|q
zMerf+;+)RFz)--?zyR9)1yT>X+jD~;1A`3{DE=84)-f~%;cX_04O$l!tKXJ=$!m|)Jp@CIr=A0q=pjRgaP08~Hd
z&e0xA2GH7829W!d7#SE|cp=;ax@pYEn}J~tRKFQW-kX6T2FmwhWMFXdVPG(Tx;LAV
zfuY2ofuRP_5TC!0;f7fdN#;
zfaK3JGBBt_Gl0_xh<}%nfgvKAfnfsFJ#Rqni$?hO3nK%=l^BG1e;64UEMgJy1DZLN
zi9?vr&&0rx5Qk7N!NkCDB#r@`k3jZ;c16C4V*pRqfcTnB3=BWw7#KkD3gVkHF)$p6
zXJAl(y2p-*f#CrX-xXAtBp~EL_i!pCAmTTSiGcxhyfZAl$1*W6fQB?-{B$M;1`8zh
zMWEBek@%HN3=AF#2=_NJF)*w_;!kH{U=T<|*uM&7ej)>?5ekm~{UGy`5b`IO7#Jdw
z7#KiJaFG8lFflM}K$5@7#K3SN2@xKTnHU)EBq8GGBgnpFMEo!?GcYVjM!1gybWdms
z1A_-Nyo8w<7<^I?=|h&8fx#mc5kBh73=9FO2={p~GcXjSBFqb9W?;C2Bp=1h!0;uN
zfdLfHAopiLi%?L#BFMnOPz2?JvJt4fsbXee_>qoqPa`t}g9GSp9H{#`m>C!nkoa?%
z85kNe5cy#vGXuk&421i4F*7jS$V7x6LrGe$UNS>kL3~PPS-eq-UUE);UaFn}R0PU3
zWQb2Ih=<>$o0?mkTEgI*k(!(xRGJr(nVTA%T2hjkmtKq_=$2Sq;+t5K0Wu48d2TVt
z5D+5`a>*{354vqPtsp+PG$-B&q!7eNfiaBWtmORMq(rDNhyuG7&VVS(Pl<tH#$t+9BGzJNzWR`&_&@I6bhd^1Gd1X*ma&AF9*a{FM
zH!&TeJg+1@KR30gGQK#qq_hA{EIBbJIX*AHC^s=DvnmmMXEDg|e7L5f)RfZXRFE!^
zW1$vd-esIt5MPpya&<9C3-WcxkgJSAL7G|ul1t7n%`1sd$}A}c@p4iVQ!?|?L3}W`
zI0NjFqT-As5WfhuyPS`hdpu=Q&J!ffiuAF
zElNzutN?{|aePs3VgW-*erZ8LY7xj;#i=D=su0XWvH+Smz`+PlF_2^iN{XPI3epIU
z5U{rybUGhaftX6
z5Y5TJAR+;g-vg!3K{|k&
zIT;vEfM_8Gh7@UtxPUCg+yE&314IikFi6Nj#1%la5(C2$5Y5TJ;2{qY*HD1aHXvGv
zfguD+r$FfnMToqD62u-25Dn4~qNN!aBA~Q^GDMvNh!$sH@Bz^(3=AwF%*nvO1EnRP
zv<8S4VqjPUqE#6fK7eQ;28IN61_l;!28J&n8kCMTAm(m?(tDuv87O@PO5cIfPoVS{
zD6OIe(eD7FMHv`kKr|-Dfzl;V`U;eO0;PL&AnF!?XdwoM
z9Z>oNls=*hkx$Tr&>2v=14K(RFwB6`IrJ37-YF5O)RGLFgqQ8WgTj`UsT10;Qio=^s#KF#G_~oD2*mArN`c>B*qhF=kAa~FL@O~c%mLAQ3=A4!3=E)p)&N9<;t5J00MU933_jtIbQS`lLHQm;i!w0e
zfM`wzh7u@!07{!gFfg!aGBAXIXpnj+y#YiEF);jzgt$v43PS$@(LxLi4KWb@8Yq1P
zN}qw!46zV-mN-Z_@PKGg`i0URAX;T%bD(qs
zl%4{mPk?Aq28I_PTAYD_19a}U3LlOf6sBAow4Dp9T3dB7nP`U*~D={!k0ns3TfM`wz1{F}BSQOH?
zW(i_ohyd|*85m}OXizx`qD2`P?tth}1_qxrh`Bjw3=HfM3=9Pzek21!4V2#i;&U=E
z;Tc63=CI5bSMME3lPo8!0-V|i)28|^8nFG3=A0{T91L@L?*-^p#C@$
z9|J>iagJ_EX>M+%UcSD9f`Wpfv8Az@xw)}{iGqRwNB~M28W@Ro-@7#R^`sEiC8C?l#0j0_Bn0{;sjV~!dO+zcGx^@gB%7|{F+KAMGr0esL6$ek#d
zUh^Kr&UsKe!2zAS0EHrK%pVk9pmAlGzd>UuAhsf8_z^V31LA_m2*C^}0Wt%`REJKo
z!-if!V~HSf7>20>^|6rWE*`~ez!
zLZ3r;!OXxA3DN+?AakHh6bf0K@EiiNOF(1zuvmZ?i8%*ANIl5)5WOIhnSt<}0BFt&
zq!u=&DGW^yFg|Eb4HOZ)ROqpV$j%3UVdIuPJVJWM6FY$Ut(@5OjST?u5)TpNl3m+Y7qk$0KGBRg8%>k

diff --git a/mplabx/cyassl.X/nbproject/Makefile-default.mk b/mplabx/cyassl.X/nbproject/Makefile-default.mk
deleted file mode 100644
index bffad1ce1..000000000
--- a/mplabx/cyassl.X/nbproject/Makefile-default.mk
+++ /dev/null
@@ -1,590 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a -pre and a -post target defined where you can add customized code.
-#
-# This makefile implements configuration specific macros and targets.
-
-
-# Include project Makefile
-ifeq "${IGNORE_LOCAL}" "TRUE"
-# do not include local makefile. User is passing all local related variables already
-else
-include Makefile
-# Include makefile containing local settings
-ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
-include nbproject/Makefile-local-default.mk
-endif
-endif
-
-# Environment
-MKDIR=gnumkdir -p
-RM=rm -f 
-MV=mv 
-CP=cp 
-
-# Macros
-CND_CONF=default
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-IMAGE_TYPE=debug
-OUTPUT_SUFFIX=a
-DEBUGGABLE_SUFFIX=
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-else
-IMAGE_TYPE=production
-OUTPUT_SUFFIX=a
-DEBUGGABLE_SUFFIX=
-FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-endif
-
-# Object Directory
-OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
-
-# Distribution Directory
-DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
-
-# Source Files Quoted if spaced
-SOURCEFILES_QUOTED_IF_SPACED=../../src/crl.c ../../src/internal.c ../../src/io.c ../../src/keys.c ../../src/ocsp.c ../../src/sniffer.c ../../src/ssl.c ../../src/tls.c ../../ctaocrypt/src/aes.c ../../ctaocrypt/src/arc4.c ../../ctaocrypt/src/asm.c ../../ctaocrypt/src/asn.c ../../ctaocrypt/src/coding.c ../../ctaocrypt/src/des3.c ../../ctaocrypt/src/dh.c ../../ctaocrypt/src/dsa.c ../../ctaocrypt/src/ecc.c ../../ctaocrypt/src/ecc_fp.c ../../ctaocrypt/src/error.c ../../ctaocrypt/src/hc128.c ../../ctaocrypt/src/hmac.c ../../ctaocrypt/src/integer.c ../../ctaocrypt/src/logging.c ../../ctaocrypt/src/md2.c ../../ctaocrypt/src/md4.c ../../ctaocrypt/src/md5.c ../../ctaocrypt/src/memory.c ../../ctaocrypt/src/misc.c ../../ctaocrypt/src/pwdbased.c ../../ctaocrypt/src/rabbit.c ../../ctaocrypt/src/random.c ../../ctaocrypt/src/ripemd.c ../../ctaocrypt/src/rsa.c ../../ctaocrypt/src/sha.c ../../ctaocrypt/src/sha256.c ../../ctaocrypt/src/sha512.c ../../ctaocrypt/src/tfm.c ../../ctaocrypt/src/port.c
-
-# Object Files Quoted if spaced
-OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/_ext/1445274692/crl.o ${OBJECTDIR}/_ext/1445274692/internal.o ${OBJECTDIR}/_ext/1445274692/io.o ${OBJECTDIR}/_ext/1445274692/keys.o ${OBJECTDIR}/_ext/1445274692/ocsp.o ${OBJECTDIR}/_ext/1445274692/sniffer.o ${OBJECTDIR}/_ext/1445274692/ssl.o ${OBJECTDIR}/_ext/1445274692/tls.o ${OBJECTDIR}/_ext/1439655260/aes.o ${OBJECTDIR}/_ext/1439655260/arc4.o ${OBJECTDIR}/_ext/1439655260/asm.o ${OBJECTDIR}/_ext/1439655260/asn.o ${OBJECTDIR}/_ext/1439655260/coding.o ${OBJECTDIR}/_ext/1439655260/des3.o ${OBJECTDIR}/_ext/1439655260/dh.o ${OBJECTDIR}/_ext/1439655260/dsa.o ${OBJECTDIR}/_ext/1439655260/ecc.o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ${OBJECTDIR}/_ext/1439655260/error.o ${OBJECTDIR}/_ext/1439655260/hc128.o ${OBJECTDIR}/_ext/1439655260/hmac.o ${OBJECTDIR}/_ext/1439655260/integer.o ${OBJECTDIR}/_ext/1439655260/logging.o ${OBJECTDIR}/_ext/1439655260/md2.o ${OBJECTDIR}/_ext/1439655260/md4.o ${OBJECTDIR}/_ext/1439655260/md5.o ${OBJECTDIR}/_ext/1439655260/memory.o ${OBJECTDIR}/_ext/1439655260/misc.o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ${OBJECTDIR}/_ext/1439655260/rabbit.o ${OBJECTDIR}/_ext/1439655260/random.o ${OBJECTDIR}/_ext/1439655260/ripemd.o ${OBJECTDIR}/_ext/1439655260/rsa.o ${OBJECTDIR}/_ext/1439655260/sha.o ${OBJECTDIR}/_ext/1439655260/sha256.o ${OBJECTDIR}/_ext/1439655260/sha512.o ${OBJECTDIR}/_ext/1439655260/tfm.o ${OBJECTDIR}/_ext/1439655260/port.o
-POSSIBLE_DEPFILES=${OBJECTDIR}/_ext/1445274692/crl.o.d ${OBJECTDIR}/_ext/1445274692/internal.o.d ${OBJECTDIR}/_ext/1445274692/io.o.d ${OBJECTDIR}/_ext/1445274692/keys.o.d ${OBJECTDIR}/_ext/1445274692/ocsp.o.d ${OBJECTDIR}/_ext/1445274692/sniffer.o.d ${OBJECTDIR}/_ext/1445274692/ssl.o.d ${OBJECTDIR}/_ext/1445274692/tls.o.d ${OBJECTDIR}/_ext/1439655260/aes.o.d ${OBJECTDIR}/_ext/1439655260/arc4.o.d ${OBJECTDIR}/_ext/1439655260/asm.o.d ${OBJECTDIR}/_ext/1439655260/asn.o.d ${OBJECTDIR}/_ext/1439655260/coding.o.d ${OBJECTDIR}/_ext/1439655260/des3.o.d ${OBJECTDIR}/_ext/1439655260/dh.o.d ${OBJECTDIR}/_ext/1439655260/dsa.o.d ${OBJECTDIR}/_ext/1439655260/ecc.o.d ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d ${OBJECTDIR}/_ext/1439655260/error.o.d ${OBJECTDIR}/_ext/1439655260/hc128.o.d ${OBJECTDIR}/_ext/1439655260/hmac.o.d ${OBJECTDIR}/_ext/1439655260/integer.o.d ${OBJECTDIR}/_ext/1439655260/logging.o.d ${OBJECTDIR}/_ext/1439655260/md2.o.d ${OBJECTDIR}/_ext/1439655260/md4.o.d ${OBJECTDIR}/_ext/1439655260/md5.o.d ${OBJECTDIR}/_ext/1439655260/memory.o.d ${OBJECTDIR}/_ext/1439655260/misc.o.d ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d ${OBJECTDIR}/_ext/1439655260/rabbit.o.d ${OBJECTDIR}/_ext/1439655260/random.o.d ${OBJECTDIR}/_ext/1439655260/ripemd.o.d ${OBJECTDIR}/_ext/1439655260/rsa.o.d ${OBJECTDIR}/_ext/1439655260/sha.o.d ${OBJECTDIR}/_ext/1439655260/sha256.o.d ${OBJECTDIR}/_ext/1439655260/sha512.o.d ${OBJECTDIR}/_ext/1439655260/tfm.o.d ${OBJECTDIR}/_ext/1439655260/port.o.d
-
-# Object Files
-OBJECTFILES=${OBJECTDIR}/_ext/1445274692/crl.o ${OBJECTDIR}/_ext/1445274692/internal.o ${OBJECTDIR}/_ext/1445274692/io.o ${OBJECTDIR}/_ext/1445274692/keys.o ${OBJECTDIR}/_ext/1445274692/ocsp.o ${OBJECTDIR}/_ext/1445274692/sniffer.o ${OBJECTDIR}/_ext/1445274692/ssl.o ${OBJECTDIR}/_ext/1445274692/tls.o ${OBJECTDIR}/_ext/1439655260/aes.o ${OBJECTDIR}/_ext/1439655260/arc4.o ${OBJECTDIR}/_ext/1439655260/asm.o ${OBJECTDIR}/_ext/1439655260/asn.o ${OBJECTDIR}/_ext/1439655260/coding.o ${OBJECTDIR}/_ext/1439655260/des3.o ${OBJECTDIR}/_ext/1439655260/dh.o ${OBJECTDIR}/_ext/1439655260/dsa.o ${OBJECTDIR}/_ext/1439655260/ecc.o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ${OBJECTDIR}/_ext/1439655260/error.o ${OBJECTDIR}/_ext/1439655260/hc128.o ${OBJECTDIR}/_ext/1439655260/hmac.o ${OBJECTDIR}/_ext/1439655260/integer.o ${OBJECTDIR}/_ext/1439655260/logging.o ${OBJECTDIR}/_ext/1439655260/md2.o ${OBJECTDIR}/_ext/1439655260/md4.o ${OBJECTDIR}/_ext/1439655260/md5.o ${OBJECTDIR}/_ext/1439655260/memory.o ${OBJECTDIR}/_ext/1439655260/misc.o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ${OBJECTDIR}/_ext/1439655260/rabbit.o ${OBJECTDIR}/_ext/1439655260/random.o ${OBJECTDIR}/_ext/1439655260/ripemd.o ${OBJECTDIR}/_ext/1439655260/rsa.o ${OBJECTDIR}/_ext/1439655260/sha.o ${OBJECTDIR}/_ext/1439655260/sha256.o ${OBJECTDIR}/_ext/1439655260/sha512.o ${OBJECTDIR}/_ext/1439655260/tfm.o ${OBJECTDIR}/_ext/1439655260/port.o
-
-# Source Files
-SOURCEFILES=../../src/crl.c ../../src/internal.c ../../src/io.c ../../src/keys.c ../../src/ocsp.c ../../src/sniffer.c ../../src/ssl.c ../../src/tls.c ../../ctaocrypt/src/aes.c ../../ctaocrypt/src/arc4.c ../../ctaocrypt/src/asm.c ../../ctaocrypt/src/asn.c ../../ctaocrypt/src/coding.c ../../ctaocrypt/src/des3.c ../../ctaocrypt/src/dh.c ../../ctaocrypt/src/dsa.c ../../ctaocrypt/src/ecc.c ../../ctaocrypt/src/ecc_fp.c ../../ctaocrypt/src/error.c ../../ctaocrypt/src/hc128.c ../../ctaocrypt/src/hmac.c ../../ctaocrypt/src/integer.c ../../ctaocrypt/src/logging.c ../../ctaocrypt/src/md2.c ../../ctaocrypt/src/md4.c ../../ctaocrypt/src/md5.c ../../ctaocrypt/src/memory.c ../../ctaocrypt/src/misc.c ../../ctaocrypt/src/pwdbased.c ../../ctaocrypt/src/rabbit.c ../../ctaocrypt/src/random.c ../../ctaocrypt/src/ripemd.c ../../ctaocrypt/src/rsa.c ../../ctaocrypt/src/sha.c ../../ctaocrypt/src/sha256.c ../../ctaocrypt/src/sha512.c ../../ctaocrypt/src/tfm.c ../../ctaocrypt/src/port.c
-
-
-CFLAGS=
-ASFLAGS=
-LDLIBSOPTIONS=
-
-############# Tool locations ##########################################
-# If you copy a project from one host to another, the path where the  #
-# compiler is installed may be different.                             #
-# If you open this project with MPLAB X in the new host, this         #
-# makefile will be regenerated and the paths will be corrected.       #
-#######################################################################
-# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
-FIXDEPS=fixDeps
-
-.build-conf:  ${BUILD_SUBPROJECTS}
-	${MAKE} ${MAKE_OPTIONS} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-
-MP_PROCESSOR_OPTION=32MZ2048ECM144
-MP_LINKER_FILE_OPTION=
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assemble
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: assembleWithPreprocess
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compile
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-${OBJECTDIR}/_ext/1445274692/crl.o: ../../src/crl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/crl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/crl.o.d" -o ${OBJECTDIR}/_ext/1445274692/crl.o ../../src/crl.c   
-	
-${OBJECTDIR}/_ext/1445274692/internal.o: ../../src/internal.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/internal.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/internal.o.d" -o ${OBJECTDIR}/_ext/1445274692/internal.o ../../src/internal.c   
-	
-${OBJECTDIR}/_ext/1445274692/io.o: ../../src/io.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/io.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/io.o.d" -o ${OBJECTDIR}/_ext/1445274692/io.o ../../src/io.c   
-	
-${OBJECTDIR}/_ext/1445274692/keys.o: ../../src/keys.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/keys.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/keys.o.d" -o ${OBJECTDIR}/_ext/1445274692/keys.o ../../src/keys.c   
-	
-${OBJECTDIR}/_ext/1445274692/ocsp.o: ../../src/ocsp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" -o ${OBJECTDIR}/_ext/1445274692/ocsp.o ../../src/ocsp.c   
-	
-${OBJECTDIR}/_ext/1445274692/sniffer.o: ../../src/sniffer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" -o ${OBJECTDIR}/_ext/1445274692/sniffer.o ../../src/sniffer.c   
-	
-${OBJECTDIR}/_ext/1445274692/ssl.o: ../../src/ssl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ssl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ssl.o.d" -o ${OBJECTDIR}/_ext/1445274692/ssl.o ../../src/ssl.c   
-	
-${OBJECTDIR}/_ext/1445274692/tls.o: ../../src/tls.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/tls.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/tls.o.d" -o ${OBJECTDIR}/_ext/1445274692/tls.o ../../src/tls.c   
-	
-${OBJECTDIR}/_ext/1439655260/aes.o: ../../ctaocrypt/src/aes.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/aes.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/aes.o.d" -o ${OBJECTDIR}/_ext/1439655260/aes.o ../../ctaocrypt/src/aes.c   
-	
-${OBJECTDIR}/_ext/1439655260/arc4.o: ../../ctaocrypt/src/arc4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/arc4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/arc4.o.d" -o ${OBJECTDIR}/_ext/1439655260/arc4.o ../../ctaocrypt/src/arc4.c   
-	
-${OBJECTDIR}/_ext/1439655260/asm.o: ../../ctaocrypt/src/asm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asm.o.d" -o ${OBJECTDIR}/_ext/1439655260/asm.o ../../ctaocrypt/src/asm.c   
-	
-${OBJECTDIR}/_ext/1439655260/asn.o: ../../ctaocrypt/src/asn.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asn.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asn.o.d" -o ${OBJECTDIR}/_ext/1439655260/asn.o ../../ctaocrypt/src/asn.c   
-	
-${OBJECTDIR}/_ext/1439655260/coding.o: ../../ctaocrypt/src/coding.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/coding.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/coding.o.d" -o ${OBJECTDIR}/_ext/1439655260/coding.o ../../ctaocrypt/src/coding.c   
-	
-${OBJECTDIR}/_ext/1439655260/des3.o: ../../ctaocrypt/src/des3.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/des3.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/des3.o.d" -o ${OBJECTDIR}/_ext/1439655260/des3.o ../../ctaocrypt/src/des3.c   
-	
-${OBJECTDIR}/_ext/1439655260/dh.o: ../../ctaocrypt/src/dh.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dh.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dh.o.d" -o ${OBJECTDIR}/_ext/1439655260/dh.o ../../ctaocrypt/src/dh.c   
-	
-${OBJECTDIR}/_ext/1439655260/dsa.o: ../../ctaocrypt/src/dsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/dsa.o ../../ctaocrypt/src/dsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc.o: ../../ctaocrypt/src/ecc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc.o ../../ctaocrypt/src/ecc.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc_fp.o: ../../ctaocrypt/src/ecc_fp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ../../ctaocrypt/src/ecc_fp.c   
-	
-${OBJECTDIR}/_ext/1439655260/error.o: ../../ctaocrypt/src/error.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/error.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/error.o.d" -o ${OBJECTDIR}/_ext/1439655260/error.o ../../ctaocrypt/src/error.c   
-	
-${OBJECTDIR}/_ext/1439655260/hc128.o: ../../ctaocrypt/src/hc128.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hc128.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hc128.o.d" -o ${OBJECTDIR}/_ext/1439655260/hc128.o ../../ctaocrypt/src/hc128.c   
-	
-${OBJECTDIR}/_ext/1439655260/hmac.o: ../../ctaocrypt/src/hmac.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hmac.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hmac.o.d" -o ${OBJECTDIR}/_ext/1439655260/hmac.o ../../ctaocrypt/src/hmac.c   
-	
-${OBJECTDIR}/_ext/1439655260/integer.o: ../../ctaocrypt/src/integer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/integer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/integer.o.d" -o ${OBJECTDIR}/_ext/1439655260/integer.o ../../ctaocrypt/src/integer.c   
-	
-${OBJECTDIR}/_ext/1439655260/logging.o: ../../ctaocrypt/src/logging.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/logging.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/logging.o.d" -o ${OBJECTDIR}/_ext/1439655260/logging.o ../../ctaocrypt/src/logging.c   
-	
-${OBJECTDIR}/_ext/1439655260/md2.o: ../../ctaocrypt/src/md2.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md2.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md2.o.d" -o ${OBJECTDIR}/_ext/1439655260/md2.o ../../ctaocrypt/src/md2.c   
-	
-${OBJECTDIR}/_ext/1439655260/md4.o: ../../ctaocrypt/src/md4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md4.o.d" -o ${OBJECTDIR}/_ext/1439655260/md4.o ../../ctaocrypt/src/md4.c   
-	
-${OBJECTDIR}/_ext/1439655260/md5.o: ../../ctaocrypt/src/md5.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md5.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md5.o.d" -o ${OBJECTDIR}/_ext/1439655260/md5.o ../../ctaocrypt/src/md5.c   
-	
-${OBJECTDIR}/_ext/1439655260/memory.o: ../../ctaocrypt/src/memory.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/memory.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/memory.o.d" -o ${OBJECTDIR}/_ext/1439655260/memory.o ../../ctaocrypt/src/memory.c   
-	
-${OBJECTDIR}/_ext/1439655260/misc.o: ../../ctaocrypt/src/misc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/misc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/misc.o.d" -o ${OBJECTDIR}/_ext/1439655260/misc.o ../../ctaocrypt/src/misc.c   
-	
-${OBJECTDIR}/_ext/1439655260/pwdbased.o: ../../ctaocrypt/src/pwdbased.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" -o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ../../ctaocrypt/src/pwdbased.c   
-	
-${OBJECTDIR}/_ext/1439655260/rabbit.o: ../../ctaocrypt/src/rabbit.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" -o ${OBJECTDIR}/_ext/1439655260/rabbit.o ../../ctaocrypt/src/rabbit.c   
-	
-${OBJECTDIR}/_ext/1439655260/random.o: ../../ctaocrypt/src/random.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/random.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/random.o.d" -o ${OBJECTDIR}/_ext/1439655260/random.o ../../ctaocrypt/src/random.c   
-	
-${OBJECTDIR}/_ext/1439655260/ripemd.o: ../../ctaocrypt/src/ripemd.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" -o ${OBJECTDIR}/_ext/1439655260/ripemd.o ../../ctaocrypt/src/ripemd.c   
-	
-${OBJECTDIR}/_ext/1439655260/rsa.o: ../../ctaocrypt/src/rsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/rsa.o ../../ctaocrypt/src/rsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha.o: ../../ctaocrypt/src/sha.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha.o ../../ctaocrypt/src/sha.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha256.o: ../../ctaocrypt/src/sha256.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha256.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha256.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha256.o ../../ctaocrypt/src/sha256.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha512.o: ../../ctaocrypt/src/sha512.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha512.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha512.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha512.o ../../ctaocrypt/src/sha512.c   
-	
-${OBJECTDIR}/_ext/1439655260/tfm.o: ../../ctaocrypt/src/tfm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/tfm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/tfm.o.d" -o ${OBJECTDIR}/_ext/1439655260/tfm.o ../../ctaocrypt/src/tfm.c   
-	
-${OBJECTDIR}/_ext/1439655260/port.o: ../../ctaocrypt/src/port.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/port.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE) -g -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/port.o.d" -o ${OBJECTDIR}/_ext/1439655260/port.o ../../ctaocrypt/src/port.c   
-	
-else
-${OBJECTDIR}/_ext/1445274692/crl.o: ../../src/crl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/crl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/crl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/crl.o.d" -o ${OBJECTDIR}/_ext/1445274692/crl.o ../../src/crl.c   
-	
-${OBJECTDIR}/_ext/1445274692/internal.o: ../../src/internal.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/internal.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/internal.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/internal.o.d" -o ${OBJECTDIR}/_ext/1445274692/internal.o ../../src/internal.c   
-	
-${OBJECTDIR}/_ext/1445274692/io.o: ../../src/io.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/io.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/io.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/io.o.d" -o ${OBJECTDIR}/_ext/1445274692/io.o ../../src/io.c   
-	
-${OBJECTDIR}/_ext/1445274692/keys.o: ../../src/keys.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/keys.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/keys.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/keys.o.d" -o ${OBJECTDIR}/_ext/1445274692/keys.o ../../src/keys.c   
-	
-${OBJECTDIR}/_ext/1445274692/ocsp.o: ../../src/ocsp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ocsp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ocsp.o.d" -o ${OBJECTDIR}/_ext/1445274692/ocsp.o ../../src/ocsp.c   
-	
-${OBJECTDIR}/_ext/1445274692/sniffer.o: ../../src/sniffer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/sniffer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/sniffer.o.d" -o ${OBJECTDIR}/_ext/1445274692/sniffer.o ../../src/sniffer.c   
-	
-${OBJECTDIR}/_ext/1445274692/ssl.o: ../../src/ssl.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/ssl.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/ssl.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/ssl.o.d" -o ${OBJECTDIR}/_ext/1445274692/ssl.o ../../src/ssl.c   
-	
-${OBJECTDIR}/_ext/1445274692/tls.o: ../../src/tls.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1445274692 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1445274692/tls.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1445274692/tls.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1445274692/tls.o.d" -o ${OBJECTDIR}/_ext/1445274692/tls.o ../../src/tls.c   
-	
-${OBJECTDIR}/_ext/1439655260/aes.o: ../../ctaocrypt/src/aes.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/aes.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/aes.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/aes.o.d" -o ${OBJECTDIR}/_ext/1439655260/aes.o ../../ctaocrypt/src/aes.c   
-	
-${OBJECTDIR}/_ext/1439655260/arc4.o: ../../ctaocrypt/src/arc4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/arc4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/arc4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/arc4.o.d" -o ${OBJECTDIR}/_ext/1439655260/arc4.o ../../ctaocrypt/src/arc4.c   
-	
-${OBJECTDIR}/_ext/1439655260/asm.o: ../../ctaocrypt/src/asm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asm.o.d" -o ${OBJECTDIR}/_ext/1439655260/asm.o ../../ctaocrypt/src/asm.c   
-	
-${OBJECTDIR}/_ext/1439655260/asn.o: ../../ctaocrypt/src/asn.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/asn.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/asn.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/asn.o.d" -o ${OBJECTDIR}/_ext/1439655260/asn.o ../../ctaocrypt/src/asn.c   
-	
-${OBJECTDIR}/_ext/1439655260/coding.o: ../../ctaocrypt/src/coding.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/coding.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/coding.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/coding.o.d" -o ${OBJECTDIR}/_ext/1439655260/coding.o ../../ctaocrypt/src/coding.c   
-	
-${OBJECTDIR}/_ext/1439655260/des3.o: ../../ctaocrypt/src/des3.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/des3.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/des3.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/des3.o.d" -o ${OBJECTDIR}/_ext/1439655260/des3.o ../../ctaocrypt/src/des3.c   
-	
-${OBJECTDIR}/_ext/1439655260/dh.o: ../../ctaocrypt/src/dh.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dh.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dh.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dh.o.d" -o ${OBJECTDIR}/_ext/1439655260/dh.o ../../ctaocrypt/src/dh.c   
-	
-${OBJECTDIR}/_ext/1439655260/dsa.o: ../../ctaocrypt/src/dsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/dsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/dsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/dsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/dsa.o ../../ctaocrypt/src/dsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc.o: ../../ctaocrypt/src/ecc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc.o ../../ctaocrypt/src/ecc.c   
-	
-${OBJECTDIR}/_ext/1439655260/ecc_fp.o: ../../ctaocrypt/src/ecc_fp.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ecc_fp.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ecc_fp.o.d" -o ${OBJECTDIR}/_ext/1439655260/ecc_fp.o ../../ctaocrypt/src/ecc_fp.c   
-	
-${OBJECTDIR}/_ext/1439655260/error.o: ../../ctaocrypt/src/error.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/error.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/error.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/error.o.d" -o ${OBJECTDIR}/_ext/1439655260/error.o ../../ctaocrypt/src/error.c   
-	
-${OBJECTDIR}/_ext/1439655260/hc128.o: ../../ctaocrypt/src/hc128.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hc128.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hc128.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hc128.o.d" -o ${OBJECTDIR}/_ext/1439655260/hc128.o ../../ctaocrypt/src/hc128.c   
-	
-${OBJECTDIR}/_ext/1439655260/hmac.o: ../../ctaocrypt/src/hmac.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/hmac.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/hmac.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/hmac.o.d" -o ${OBJECTDIR}/_ext/1439655260/hmac.o ../../ctaocrypt/src/hmac.c   
-	
-${OBJECTDIR}/_ext/1439655260/integer.o: ../../ctaocrypt/src/integer.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/integer.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/integer.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/integer.o.d" -o ${OBJECTDIR}/_ext/1439655260/integer.o ../../ctaocrypt/src/integer.c   
-	
-${OBJECTDIR}/_ext/1439655260/logging.o: ../../ctaocrypt/src/logging.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/logging.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/logging.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/logging.o.d" -o ${OBJECTDIR}/_ext/1439655260/logging.o ../../ctaocrypt/src/logging.c   
-	
-${OBJECTDIR}/_ext/1439655260/md2.o: ../../ctaocrypt/src/md2.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md2.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md2.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md2.o.d" -o ${OBJECTDIR}/_ext/1439655260/md2.o ../../ctaocrypt/src/md2.c   
-	
-${OBJECTDIR}/_ext/1439655260/md4.o: ../../ctaocrypt/src/md4.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md4.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md4.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md4.o.d" -o ${OBJECTDIR}/_ext/1439655260/md4.o ../../ctaocrypt/src/md4.c   
-	
-${OBJECTDIR}/_ext/1439655260/md5.o: ../../ctaocrypt/src/md5.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/md5.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/md5.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/md5.o.d" -o ${OBJECTDIR}/_ext/1439655260/md5.o ../../ctaocrypt/src/md5.c   
-	
-${OBJECTDIR}/_ext/1439655260/memory.o: ../../ctaocrypt/src/memory.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/memory.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/memory.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/memory.o.d" -o ${OBJECTDIR}/_ext/1439655260/memory.o ../../ctaocrypt/src/memory.c   
-	
-${OBJECTDIR}/_ext/1439655260/misc.o: ../../ctaocrypt/src/misc.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/misc.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/misc.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/misc.o.d" -o ${OBJECTDIR}/_ext/1439655260/misc.o ../../ctaocrypt/src/misc.c   
-	
-${OBJECTDIR}/_ext/1439655260/pwdbased.o: ../../ctaocrypt/src/pwdbased.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/pwdbased.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/pwdbased.o.d" -o ${OBJECTDIR}/_ext/1439655260/pwdbased.o ../../ctaocrypt/src/pwdbased.c   
-	
-${OBJECTDIR}/_ext/1439655260/rabbit.o: ../../ctaocrypt/src/rabbit.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rabbit.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rabbit.o.d" -o ${OBJECTDIR}/_ext/1439655260/rabbit.o ../../ctaocrypt/src/rabbit.c   
-	
-${OBJECTDIR}/_ext/1439655260/random.o: ../../ctaocrypt/src/random.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/random.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/random.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/random.o.d" -o ${OBJECTDIR}/_ext/1439655260/random.o ../../ctaocrypt/src/random.c   
-	
-${OBJECTDIR}/_ext/1439655260/ripemd.o: ../../ctaocrypt/src/ripemd.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/ripemd.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/ripemd.o.d" -o ${OBJECTDIR}/_ext/1439655260/ripemd.o ../../ctaocrypt/src/ripemd.c   
-	
-${OBJECTDIR}/_ext/1439655260/rsa.o: ../../ctaocrypt/src/rsa.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/rsa.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/rsa.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/rsa.o.d" -o ${OBJECTDIR}/_ext/1439655260/rsa.o ../../ctaocrypt/src/rsa.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha.o: ../../ctaocrypt/src/sha.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha.o ../../ctaocrypt/src/sha.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha256.o: ../../ctaocrypt/src/sha256.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha256.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha256.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha256.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha256.o ../../ctaocrypt/src/sha256.c   
-	
-${OBJECTDIR}/_ext/1439655260/sha512.o: ../../ctaocrypt/src/sha512.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/sha512.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/sha512.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/sha512.o.d" -o ${OBJECTDIR}/_ext/1439655260/sha512.o ../../ctaocrypt/src/sha512.c   
-	
-${OBJECTDIR}/_ext/1439655260/tfm.o: ../../ctaocrypt/src/tfm.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/tfm.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/tfm.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/tfm.o.d" -o ${OBJECTDIR}/_ext/1439655260/tfm.o ../../ctaocrypt/src/tfm.c   
-	
-${OBJECTDIR}/_ext/1439655260/port.o: ../../ctaocrypt/src/port.c  nbproject/Makefile-${CND_CONF}.mk
-	@${MKDIR} ${OBJECTDIR}/_ext/1439655260 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o.d 
-	@${RM} ${OBJECTDIR}/_ext/1439655260/port.o 
-	@${FIXDEPS} "${OBJECTDIR}/_ext/1439655260/port.o.d" $(SILENT) -rsi ${MP_CC_DIR}../  -c ${MP_CC}  $(MP_EXTRA_CC_PRE)  -x c -c -mprocessor=$(MP_PROCESSOR_OPTION) -O3 -DCYASSL_SHA512 -DCYASSL_SHA384 -DHAVE_ECC -I"../../" -I"../" -MMD -MF "${OBJECTDIR}/_ext/1439655260/port.o.d" -o ${OBJECTDIR}/_ext/1439655260/port.o ../../ctaocrypt/src/port.c   
-	
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: compileCPP
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-else
-endif
-
-# ------------------------------------------------------------------------------------
-# Rules for buildStep: archive
-ifeq ($(TYPE_IMAGE), DEBUG_RUN)
-dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk    
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
-else
-dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk   
-	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
-	${MP_AR} $(MP_EXTRA_AR_PRE) r dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED}    
-endif
-
-
-# Subprojects
-.build-subprojects:
-
-
-# Subprojects
-.clean-subprojects:
-
-# Clean Targets
-.clean-conf: ${CLEAN_SUBPROJECTS}
-	${RM} -r build/default
-	${RM} -r dist/default
-
-# Enable dependency checking
-.dep.inc: .depcheck-impl
-
-DEPFILES=$(shell mplabwildcard ${POSSIBLE_DEPFILES})
-ifneq (${DEPFILES},)
-include ${DEPFILES}
-endif
diff --git a/mplabx/cyassl.X/nbproject/Makefile-genesis.properties b/mplabx/cyassl.X/nbproject/Makefile-genesis.properties
deleted file mode 100644
index 8fa40f592..000000000
--- a/mplabx/cyassl.X/nbproject/Makefile-genesis.properties
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-#Tue Mar 04 21:12:12 JST 2014
-default.com-microchip-mplab-nbide-toolchainXC32-XC32LanguageToolchain.md5=cd6a1e93a26f632c22d91cbbe4deaf2c
-default.languagetoolchain.dir=C\:\\Program Files (x86)\\Microchip\\xc32\\v1.30\\bin
-com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=43bd1633f14a944b6e95abd1333fdfc3
-default.languagetoolchain.version=1.30
-host.platform=windows
-conf.ids=default
diff --git a/mplabx/cyassl.X/nbproject/Makefile-impl.mk b/mplabx/cyassl.X/nbproject/Makefile-impl.mk
deleted file mode 100644
index 6f20c0abd..000000000
--- a/mplabx/cyassl.X/nbproject/Makefile-impl.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-# Edit the Makefile in the project folder instead (../Makefile). Each target
-# has a pre- and a post- target defined where you can add customization code.
-#
-# This makefile implements macros and targets common to all configurations.
-#
-# NOCDDL
-
-
-# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
-# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
-# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
-# and .clean-reqprojects-conf unless SUB has the value 'no'
-SUB_no=NO
-SUBPROJECTS=${SUB_${SUB}}
-BUILD_SUBPROJECTS_=.build-subprojects
-BUILD_SUBPROJECTS_NO=
-BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
-CLEAN_SUBPROJECTS_=.clean-subprojects
-CLEAN_SUBPROJECTS_NO=
-CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
-
-
-# Project Name
-PROJECTNAME=cyassl.X
-
-# Active Configuration
-DEFAULTCONF=default
-CONF=${DEFAULTCONF}
-
-# All Configurations
-ALLCONFS=default 
-
-
-# build
-.build-impl: .build-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
-
-
-# clean
-.clean-impl: .clean-pre
-	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
-
-# clobber
-.clobber-impl: .clobber-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
-
-
-
-# all
-.all-impl: .all-pre .depcheck-impl
-	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
-
-
-
-# dependency checking support
-.depcheck-impl:
-#	@echo "# This code depends on make tool being used" >.dep.inc
-#	@if [ -n "${MAKE_VERSION}" ]; then \
-#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
-#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
-#	    echo "include \$${DEPFILES}" >>.dep.inc; \
-#	    echo "endif" >>.dep.inc; \
-#	else \
-#	    echo ".KEEP_STATE:" >>.dep.inc; \
-#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
-#	fi
diff --git a/mplabx/cyassl.X/nbproject/Makefile-local-default.mk b/mplabx/cyassl.X/nbproject/Makefile-local-default.mk
deleted file mode 100644
index 3350f874d..000000000
--- a/mplabx/cyassl.X/nbproject/Makefile-local-default.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Generated Makefile - do not edit!
-#
-#
-# This file contains information about the location of compilers and other tools.
-# If you commmit this file into your revision control server, you will be able to 
-# to checkout the project and build it from the command line with make. However,
-# if more than one person works on the same project, then this file might show
-# conflicts since different users are bound to have compilers in different places.
-# In that case you might choose to not commit this file and let MPLAB X recreate this file
-# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
-# least once so the file gets created and the project can be built. Finally, you can also
-# avoid using this file at all if you are only building from the command line with make.
-# You can invoke make with the values of the macros:
-# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
-#
-SHELL=cmd.exe
-PATH_TO_IDE_BIN=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/
-# Adding MPLAB X bin directory to path.
-PATH:=C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
-# Path to java used to run MPLAB X when this makefile was created
-MP_JAVA_PATH="C:\Program Files (x86)\Microchip\MPLABX-v1.95.RC3\sys\java\jre1.7.0_25-windows-x64\java-windows/bin/"
-OS_CURRENT="$(shell uname -s)"
-MP_CC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-gcc.exe"
-MP_CPPC="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-g++.exe"
-# MP_BC is not defined
-MP_AS="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-as.exe"
-MP_LD="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ld.exe"
-MP_AR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin\xc32-ar.exe"
-DEP_GEN=${MP_JAVA_PATH}java -jar "C:/Program Files (x86)/Microchip/MPLABX-v1.95.RC3/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
-MP_CC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_CPPC_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
-MP_AS_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_LD_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-MP_AR_DIR="C:\Program Files (x86)\Microchip\xc32\v1.30\bin"
-# MP_BC_DIR is not defined
diff --git a/mplabx/cyassl.X/nbproject/Makefile-variables.mk b/mplabx/cyassl.X/nbproject/Makefile-variables.mk
deleted file mode 100644
index b480b107d..000000000
--- a/mplabx/cyassl.X/nbproject/Makefile-variables.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Generated - do not edit!
-#
-# NOCDDL
-#
-CND_BASEDIR=`pwd`
-# default configuration
-CND_ARTIFACT_DIR_default=dist/default/production
-CND_ARTIFACT_NAME_default=cyassl.X.a
-CND_ARTIFACT_PATH_default=dist/default/production/cyassl.X.a
-CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
-CND_PACKAGE_NAME_default=cyassl.X.tar
-CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/cyassl.X.tar
diff --git a/mplabx/cyassl.X/nbproject/Package-default.bash b/mplabx/cyassl.X/nbproject/Package-default.bash
deleted file mode 100644
index baae5e998..000000000
--- a/mplabx/cyassl.X/nbproject/Package-default.bash
+++ /dev/null
@@ -1,73 +0,0 @@
-#!/bin/bash -x
-
-#
-# Generated - do not edit!
-#
-
-# Macros
-TOP=`pwd`
-CND_CONF=default
-CND_DISTDIR=dist
-TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
-TMPDIRNAME=tmp-packaging
-OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/cyassl.X.${OUTPUT_SUFFIX}
-OUTPUT_BASENAME=cyassl.X.${OUTPUT_SUFFIX}
-PACKAGE_TOP_DIR=cyassl.X/
-
-# Functions
-function checkReturnCode
-{
-    rc=$?
-    if [ $rc != 0 ]
-    then
-        exit $rc
-    fi
-}
-function makeDirectory
-# $1 directory path
-# $2 permission (optional)
-{
-    mkdir -p "$1"
-    checkReturnCode
-    if [ "$2" != "" ]
-    then
-      chmod $2 "$1"
-      checkReturnCode
-    fi
-}
-function copyFileToTmpDir
-# $1 from-file path
-# $2 to-file path
-# $3 permission
-{
-    cp "$1" "$2"
-    checkReturnCode
-    if [ "$3" != "" ]
-    then
-        chmod $3 "$2"
-        checkReturnCode
-    fi
-}
-
-# Setup
-cd "${TOP}"
-mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
-rm -rf ${TMPDIR}
-mkdir -p ${TMPDIR}
-
-# Copy files and create directories and links
-cd "${TOP}"
-makeDirectory ${TMPDIR}/cyassl.X/lib
-copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}lib/${OUTPUT_BASENAME}" 0644
-
-
-# Generate tar file
-cd "${TOP}"
-rm -f ${CND_DISTDIR}/${CND_CONF}/package/cyassl.X.tar
-cd ${TMPDIR}
-tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/cyassl.X.tar *
-checkReturnCode
-
-# Cleanup
-cd "${TOP}"
-rm -rf ${TMPDIR}
diff --git a/mplabx/cyassl.X/nbproject/configurations.xml b/mplabx/cyassl.X/nbproject/configurations.xml
index 7c67ebfcc..1a141bb22 100644
--- a/mplabx/cyassl.X/nbproject/configurations.xml
+++ b/mplabx/cyassl.X/nbproject/configurations.xml
@@ -67,7 +67,7 @@
     
       
         localhost
-        PIC32MZ2048ECM144
+        PIC32MX795F512L
         
         
         PKOBSKDEPlatformTool
diff --git a/mplabx/cyassl.X/nbproject/private/private.xml b/mplabx/cyassl.X/nbproject/private/private.xml
deleted file mode 100644
index e39667075..000000000
--- a/mplabx/cyassl.X/nbproject/private/private.xml
+++ /dev/null
@@ -1,3 +0,0 @@
-
-    
-
diff --git a/mplabx/cyassl.X/print_mem.c b/mplabx/cyassl.X/print_mem.c
deleted file mode 100644
index b90e8c55c..000000000
--- a/mplabx/cyassl.X/print_mem.c
+++ /dev/null
@@ -1,7 +0,0 @@
-void print_mem(const unsigned char *p, int size) {
-    for(; size>0; size--, p++) {
-        if(size%4 == 0)printf(" ") ;
-            printf("%02x", (int)*p) ;
-    }
-    puts("") ;
-    }
diff --git a/mplabx/ssl-dummy.c b/mplabx/ssl-dummy.c
deleted file mode 100644
index 88110ce98..000000000
--- a/mplabx/ssl-dummy.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/* ssl-dummy.c
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-#ifdef HAVE_CONFIG_H
-    #include 
-#endif
-
-#include 
-#include 
-
-Signer* GetCA(void* vp, byte* hash) 
-{ 
-    return NULL  ;
-}
-
-int CyaSSL_dtls(CYASSL* ssl)
-{
-    return NULL ;
-}
-
-int CyaSSL_get_using_nonblock(CYASSL* ssl)
-{
-    return NULL ;
-}
-
-Signer* GetCAByName(void* vp, byte* hash)
-{
-    return NULL ;
-}
-
-int CyaSSL_PemCertToDer(const char* fileName, unsigned char* derBuf, int derSz) 
-{
-        return NULL ;
-}
diff --git a/mplabx/test_main.c b/mplabx/test_main.c
index 037315e14..cc9992da3 100644
--- a/mplabx/test_main.c
+++ b/mplabx/test_main.c
@@ -19,17 +19,6 @@
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 
-#ifdef HAVE_CONFIG_H
-    #include 
-#endif
-
-#include 
-    #include 
-    #include 
-    #include "PIC32MZ-serial.h"
-    #define  SYSTEMConfigPerformance /* void out SYSTEMConfigPerformance(); */
-#else
-
 #if defined(CYASSL_MICROCHIP_PIC32MZ)
     #define MICROCHIP_PIC32
     #include 
diff --git a/src/ocsp.c b/src/ocsp.c
index f8107aca1..cb55c4e04 100644
--- a/src/ocsp.c
+++ b/src/ocsp.c
@@ -82,11 +82,10 @@ void FreeOCSP(CYASSL_OCSP* ocsp, int dynamic)
         XFREE(tmp, NULL, DYNAMIC_TYPE_OCSP_ENTRY);
         tmp = next;
     }
+
     FreeMutex(&ocsp->ocspLock);
     if (dynamic)
         XFREE(ocsp, NULL, DYNAMIC_TYPE_OCSP);
-    if (dynamic)
-        XFREE(ocsp, NULL, DYNAMIC_TYPE_OCSP);
 }
 
 
diff --git a/src/ssl.c b/src/ssl.c
index 430afd2ae..8bd06a7e7 100644
--- a/src/ssl.c
+++ b/src/ssl.c
@@ -2252,12 +2252,6 @@ int CyaSSL_CertManagerVerifyBuffer(CYASSL_CERT_MANAGER* cm, const byte* buff,
 
 #ifndef NO_FILESYSTEM
 
-    #if defined(CYASSL_MDK_ARM)
-        extern FILE * CyaSSL_fopen(const char *name, const char *mode) ;
-        #define XFOPEN     CyaSSL_fopen
-    #else
-        #define XFOPEN     fopen
-    #endif
 
 /* process a file with name fname into ctx of format and type
    userChain specifies a user certificate chain to pass during handshake */
diff --git a/src/tls.c b/src/tls.c
index 1556853d1..cd6f96edd 100644
--- a/src/tls.c
+++ b/src/tls.c
@@ -896,34 +896,34 @@ int TLSX_SNI_GetFromBuffer(const byte* clientHello, word32 helloSz,
     offset += HANDSHAKE_HEADER_SZ;
 
     if (offset + len32 > helloSz)
-        return INCOMPLETE_DATA;
+        return BUFFER_ERROR;
 
     /* client hello */
     offset += VERSION_SZ + RAN_LEN; /* version, random */
 
     if (helloSz < offset + clientHello[offset])
-        return INCOMPLETE_DATA;
+        return BUFFER_ERROR;
 
     offset += ENUM_LEN + clientHello[offset]; /* skip session id */
 
     /* cypher suites */
     if (helloSz < offset + OPAQUE16_LEN)
-        return INCOMPLETE_DATA;
+        return BUFFER_ERROR;
 
     ato16(clientHello + offset, &len16);
     offset += OPAQUE16_LEN;
 
     if (helloSz < offset + len16)
-        return INCOMPLETE_DATA;
+        return BUFFER_ERROR;
 
     offset += len16; /* skip cypher suites */
 
     /* compression methods */
     if (helloSz < offset + 1)
-        return INCOMPLETE_DATA;
+        return BUFFER_ERROR;
 
     if (helloSz < offset + clientHello[offset])
-        return INCOMPLETE_DATA;
+        return BUFFER_ERROR;
 
     offset += ENUM_LEN + clientHello[offset]; /* skip compression methods */
 
@@ -935,7 +935,7 @@ int TLSX_SNI_GetFromBuffer(const byte* clientHello, word32 helloSz,
     offset += OPAQUE16_LEN;
 
     if (helloSz < offset + len16)
-        return INCOMPLETE_DATA;
+        return BUFFER_ERROR;
 
     while (len16 > OPAQUE16_LEN + OPAQUE16_LEN) {
         word16 extType;
@@ -948,7 +948,7 @@ int TLSX_SNI_GetFromBuffer(const byte* clientHello, word32 helloSz,
         offset += OPAQUE16_LEN;
 
         if (helloSz < offset + extLen)
-            return INCOMPLETE_DATA;
+            return BUFFER_ERROR;
 
         if (extType != SERVER_NAME_INDICATION) {
             offset += extLen; /* skip extension */
@@ -959,7 +959,7 @@ int TLSX_SNI_GetFromBuffer(const byte* clientHello, word32 helloSz,
             offset += OPAQUE16_LEN;
 
             if (helloSz < offset + listLen)
-                return INCOMPLETE_DATA;
+                return BUFFER_ERROR;
 
             while (listLen > ENUM_LEN + OPAQUE16_LEN) {
                 byte   sniType = clientHello[offset++];
@@ -969,7 +969,7 @@ int TLSX_SNI_GetFromBuffer(const byte* clientHello, word32 helloSz,
                 offset += OPAQUE16_LEN;
 
                 if (helloSz < offset + sniLen)
-                    return INCOMPLETE_DATA;
+                    return BUFFER_ERROR;
 
                 if (sniType != type) {
                     offset  += sniLen;
@@ -1249,13 +1249,13 @@ static int TLSX_EllipticCurve_Parse(CYASSL* ssl, byte* input, word16 length,
     (void) isRequest; /* shut up compiler! */
 
     if (OPAQUE16_LEN > length || length % OPAQUE16_LEN)
-        return INCOMPLETE_DATA;
+        return BUFFER_ERROR;
 
     ato16(input, &offset);
 
     /* validating curve list length */
     if (length != OPAQUE16_LEN + offset)
-        return INCOMPLETE_DATA;
+        return BUFFER_ERROR;
 
     while (offset) {
         ato16(input + offset, &name);
diff --git a/testsuite/testsuite.c b/testsuite/testsuite.c
index 2a5ba498f..909090718 100644
--- a/testsuite/testsuite.c
+++ b/testsuite/testsuite.c
@@ -48,9 +48,9 @@ enum {
 };
 
 #ifndef USE_WINDOWS_API
-    const char outputName[] = "/tmp/output";
+    static const char outputName[] = "/tmp/output";
 #else
-    const char outputName[] = "output";
+    static const char outputName[] = "output";
 #endif
 
 

From 6235c949b38d99b5c2dccbab5e5aa937f8a766a3 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 11 Mar 2014 11:32:16 +0900
Subject: [PATCH 37/43] PIC32MZ

---
 ctaocrypt/benchmark/benchmark.c             |  92 +++++---
 ctaocrypt/src/aes.c                         | 242 ++++++++++++++++++-
 ctaocrypt/src/des3.c                        | 132 +++++++++++
 ctaocrypt/src/hmac.c                        |  16 ++
 ctaocrypt/src/md5.c                         |   8 +-
 ctaocrypt/src/port/pic32/pic32mz-hash.c     | 243 ++++++++++++++++++++
 ctaocrypt/src/pwdbased.c                    |  16 ++
 ctaocrypt/src/random.c                      |  45 +++-
 ctaocrypt/src/sha.c                         |  14 +-
 ctaocrypt/src/sha256.c                      |  14 +-
 cyassl/ctaocrypt/aes.h                      |   7 +-
 cyassl/ctaocrypt/md5.h                      |  12 +-
 cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h |  88 +++++++
 cyassl/ctaocrypt/settings.h                 |  50 +++-
 cyassl/ctaocrypt/sha.h                      |  10 +-
 cyassl/ctaocrypt/sha256.h                   |   7 +
 cyassl/test.h                               |   2 +-
 mplabx/benchmark_main.c                     |   9 +
 mplabx/crypto.h                             |  82 +++++++
 mplabx/ssl-dummy.c                          |  52 +++++
 mplabx/test_main.c                          |  11 +
 src/ssl.c                                   |   6 +
 22 files changed, 1089 insertions(+), 69 deletions(-)
 create mode 100644 ctaocrypt/src/port/pic32/pic32mz-hash.c
 create mode 100644 cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h
 create mode 100644 mplabx/crypto.h
 create mode 100644 mplabx/ssl-dummy.c

diff --git a/ctaocrypt/benchmark/benchmark.c b/ctaocrypt/benchmark/benchmark.c
index 72503131b..5dee5064b 100644
--- a/ctaocrypt/benchmark/benchmark.c
+++ b/ctaocrypt/benchmark/benchmark.c
@@ -85,6 +85,7 @@ void bench_rabbit(void);
 void bench_aes(int);
 void bench_aesgcm(void);
 void bench_aesccm(void);
+void bench_aesctr(void);
 void bench_camellia(void);
 
 void bench_md5(void);
@@ -155,6 +156,11 @@ int benchmark_test(void *args)
 #ifdef HAVE_AESGCM
     bench_aesgcm();
 #endif
+
+#ifdef CYASSL_AES_COUNTER
+    bench_aesctr();
+#endif
+
 #ifdef HAVE_AESCCM
     bench_aesccm();
 #endif
@@ -224,12 +230,15 @@ static const char blockType[] = "kB";  /* used in printf output */
 static const int ntimes      = 1;        /* public key iterations */
 static const int genTimes   = 5;
 static const int agreeTimes = 5;
+const int ntimes      = 1;        /* public key iterations */
+const int genTimes   = 5;
+const int agreeTimes = 5;
 #else
 static const int numBlocks = 5;
 static const char blockType[] = "megs";
-static const int ntimes      = 100;
-static const int genTimes   = 100;
-static const int agreeTimes = 100;
+const int ntimes      = 100;
+const int genTimes   = 100;
+const int agreeTimes = 100;
 #endif
 
 static const byte key[] = 
@@ -285,7 +294,7 @@ void bench_aes(int show)
 #endif
 
     if (show)
-        printf("AES      %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+        printf("AES      %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                                   blockType, total, persec);
 #ifdef HAVE_CAVIUM
     AesFreeCavium(&enc);
@@ -322,13 +331,40 @@ void bench_aesgcm(void)
     persec = persec / 1024;
 #endif
 
-    printf("AES-GCM  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("AES-GCM  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
+                                              blockType, total, persec);
+}
+#endif
+
+#ifdef CYASSL_AES_COUNTER
+void bench_aesctr(void)
+{
+    Aes    enc;
+    double start, total, persec;
+    int    i;
+
+    AesSetKeyDirect(&enc, key, AES_BLOCK_SIZE, iv, AES_ENCRYPTION);
+    start = current_time(1);
+
+    for(i = 0; i < numBlocks; i++)
+        AesCtrEncrypt(&enc, plain, cipher, sizeof(plain));
+
+    total = current_time(0) - start;
+
+    persec = 1 / total * numBlocks;
+#ifdef BENCH_EMBEDDED
+    /* since using kB, convert to MB/s */
+    persec = persec / 1024;
+#endif
+
+    printf("AES-CTR  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
 
 
-#ifdef HAVE_AESCCM
+
+#ifdef CYASSL_AESCCM
 void bench_aesccm(void)
 {
     Aes    enc;
@@ -350,7 +386,7 @@ void bench_aesccm(void)
     persec = persec / 1024;
 #endif
 
-    printf("AES-CCM  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("AES-CCM  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -377,7 +413,7 @@ void bench_camellia(void)
     persec = persec / 1024;
 #endif
 
-    printf("Camellia %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("Camellia %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -408,7 +444,7 @@ void bench_des(void)
     persec = persec / 1024;
 #endif
 
-    printf("3DES     %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("3DES     %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 #ifdef HAVE_CAVIUM
     Des3_FreeCavium(&enc);
@@ -442,7 +478,7 @@ void bench_arc4(void)
     persec = persec / 1024;
 #endif
 
-    printf("ARC4     %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("ARC4     %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 #ifdef HAVE_CAVIUM
     Arc4FreeCavium(&enc);
@@ -471,7 +507,7 @@ void bench_hc128(void)
     persec = persec / 1024;
 #endif
 
-    printf("HC128    %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("HC128    %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif /* HAVE_HC128 */
@@ -497,7 +533,7 @@ void bench_rabbit(void)
     persec = persec / 1024;
 #endif
 
-    printf("RABBIT   %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("RABBIT   %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif /* NO_RABBIT */
@@ -526,7 +562,7 @@ void bench_md5(void)
     persec = persec / 1024;
 #endif
 
-    printf("MD5      %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("MD5      %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif /* NO_MD5 */
@@ -555,7 +591,7 @@ void bench_sha(void)
     persec = persec / 1024;
 #endif
 
-    printf("SHA      %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("SHA      %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif /* NO_SHA */
@@ -584,7 +620,7 @@ void bench_sha256(void)
     persec = persec / 1024;
 #endif
 
-    printf("SHA-256  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("SHA-256  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -612,7 +648,7 @@ void bench_sha512(void)
     persec = persec / 1024;
 #endif
 
-    printf("SHA-512  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("SHA-512  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -640,7 +676,7 @@ void bench_ripemd(void)
     persec = persec / 1024;
 #endif
 
-    printf("RIPEMD   %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("RIPEMD   %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -669,7 +705,7 @@ void bench_blake2(void)
     persec = persec / 1024;
 #endif
 
-    printf("BLAKE2b  %d %s took %5.3f seconds, %6.2f MB/s\n", numBlocks,
+    printf("BLAKE2b  %d %s took %5.3f seconds, %6.3f MB/s\n", numBlocks,
                                               blockType, total, persec);
 }
 #endif
@@ -751,7 +787,7 @@ void bench_rsa(void)
     each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
-    printf("RSA %d encryption took %6.2f milliseconds, avg over %d" 
+    printf("RSA %d encryption took %6.3f milliseconds, avg over %d"
            " iterations\n", rsaKeySz, milliEach, ntimes);
 
     if (ret < 0) {
@@ -770,7 +806,7 @@ void bench_rsa(void)
     each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
-    printf("RSA %d decryption took %6.2f milliseconds, avg over %d" 
+    printf("RSA %d decryption took %6.3f milliseconds, avg over %d"
            " iterations\n", rsaKeySz, milliEach, ntimes);
 
     FreeRsaKey(&rsaKey);
@@ -856,7 +892,7 @@ void bench_dh(void)
     each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
-    printf("DH  %d key generation  %6.2f milliseconds, avg over %d" 
+    printf("DH  %d key generation  %6.3f milliseconds, avg over %d"
            " iterations\n", dhKeySz, milliEach, ntimes);
 
     DhGenerateKeyPair(&dhKey, &rng, priv2, &privSz2, pub2, &pubSz2);
@@ -869,7 +905,7 @@ void bench_dh(void)
     each  = total / ntimes;   /* per second   */
     milliEach = each * 1000; /* milliseconds */
 
-    printf("DH  %d key agreement   %6.2f milliseconds, avg over %d" 
+    printf("DH  %d key agreement   %6.3f milliseconds, avg over %d"
            " iterations\n", dhKeySz, milliEach, ntimes);
 
 #if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048)
@@ -899,7 +935,7 @@ void bench_rsaKeyGen(void)
     each  = total / genTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
     printf("\n");
-    printf("RSA 1024 key generation  %6.2f milliseconds, avg over %d" 
+    printf("RSA 1024 key generation  %6.3f milliseconds, avg over %d"
            " iterations\n", milliEach, genTimes);
 
     /* 2048 bit */
@@ -914,7 +950,7 @@ void bench_rsaKeyGen(void)
     total = current_time(0) - start;
     each  = total / genTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
-    printf("RSA 2048 key generation  %6.2f milliseconds, avg over %d" 
+    printf("RSA 2048 key generation  %6.3f milliseconds, avg over %d"
            " iterations\n", milliEach, genTimes);
 }
 #endif /* CYASSL_KEY_GEN */
@@ -943,7 +979,7 @@ void bench_eccKeyGen(void)
     each  = total / genTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
     printf("\n");
-    printf("ECC  256 key generation  %6.2f milliseconds, avg over %d" 
+    printf("ECC  256 key generation  %6.3f milliseconds, avg over %d"
            " iterations\n", milliEach, genTimes);
 }
 
@@ -993,7 +1029,7 @@ void bench_eccKeyAgree(void)
     total = current_time(0) - start;
     each  = total / agreeTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
-    printf("EC-DHE   key agreement   %6.2f milliseconds, avg over %d" 
+    printf("EC-DHE   key agreement   %6.3f milliseconds, avg over %d"
            " iterations\n", milliEach, agreeTimes);
 
     /* make dummy digest */
@@ -1015,7 +1051,7 @@ void bench_eccKeyAgree(void)
     total = current_time(0) - start;
     each  = total / agreeTimes;  /* per second  */
     milliEach = each * 1000;   /* millisconds */
-    printf("EC-DSA   sign   time     %6.2f milliseconds, avg over %d" 
+    printf("EC-DSA   sign   time     %6.3f milliseconds, avg over %d"
            " iterations\n", milliEach, agreeTimes);
 
     start = current_time(1);
@@ -1032,7 +1068,7 @@ void bench_eccKeyAgree(void)
     total = current_time(0) - start;
     each  = total / agreeTimes;  /* per second  */
     milliEach = each * 1000;     /* millisconds */
-    printf("EC-DSA   verify time     %6.2f milliseconds, avg over %d" 
+    printf("EC-DSA   verify time     %6.3f milliseconds, avg over %d"
            " iterations\n", milliEach, agreeTimes);
 
     ecc_free(&genKey2);
diff --git a/ctaocrypt/src/aes.c b/ctaocrypt/src/aes.c
index 4cb723d31..02a15690a 100644
--- a/ctaocrypt/src/aes.c
+++ b/ctaocrypt/src/aes.c
@@ -55,6 +55,184 @@
                                     word32 length);
 #endif
 
+#if defined(CYASSL_PIC32MZ_CRYPT)
+
+#include "../../cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h"
+#define DEBUG_CYASSL
+
+    /* core hardware crypt engine driver */
+    static void AesCrypt(Aes *aes, byte* out, const byte* in, word32 sz,
+                                            int dir, int algo, int cryptoalgo)
+    {
+        securityAssociation *sa_p ;
+        bufferDescriptor *bd_p ;
+
+        volatile securityAssociation sa __attribute__((aligned (8)));
+        volatile bufferDescriptor bd __attribute__((aligned (8)));
+        volatile int k ;
+
+        /* get uncached address */
+        sa_p = KVA0_TO_KVA1(&sa) ;
+        bd_p = KVA0_TO_KVA1(&bd) ;
+
+        /* Sync cache and physical memory */
+        if(PIC32MZ_IF_RAM(in)) {
+            XMEMCPY((void *)KVA0_TO_KVA1(in), (void *)in, sz);
+        }
+        XMEMSET((void *)KVA0_TO_KVA1(out), 0, sz);
+        /* Set up the Security Association */
+        XMEMSET((byte *)KVA0_TO_KVA1(&sa), 0, sizeof(sa));
+        sa_p->SA_CTRL.ALGO = algo ; /* AES */
+        sa_p->SA_CTRL.LNC = 1;
+        sa_p->SA_CTRL.LOADIV = 1;
+        sa_p->SA_CTRL.FB = 1;
+        sa_p->SA_CTRL.ENCTYPE = dir ; /* Encryption/Decryption */
+        sa_p->SA_CTRL.CRYPTOALGO = cryptoalgo;
+
+        if(cryptoalgo == PIC32_CRYPTOALGO_AES_GCM){
+            switch(aes->keylen) {
+            case 32:
+                sa_p->SA_CTRL.KEYSIZE = PIC32_AES_KEYSIZE_256 ;
+                break ;
+            case 24:
+                sa_p->SA_CTRL.KEYSIZE = PIC32_AES_KEYSIZE_192 ;
+                break ;
+            case 16:
+                sa_p->SA_CTRL.KEYSIZE = PIC32_AES_KEYSIZE_128 ;
+                break ;
+            }
+        } else
+            sa_p->SA_CTRL.KEYSIZE = PIC32_AES_KEYSIZE_128 ;
+
+        ByteReverseWords(
+        (word32 *)KVA0_TO_KVA1(sa.SA_ENCKEY + 8 - aes->keylen/sizeof(word32)),
+                         (word32 *)aes->key_ce, aes->keylen);
+        ByteReverseWords(
+        (word32*)KVA0_TO_KVA1(sa.SA_ENCIV), (word32 *)aes->iv_ce, 16);
+
+        XMEMSET((byte *)KVA0_TO_KVA1(&bd), 0, sizeof(bd));
+        /* Set up the Buffer Descriptor */
+        bd_p->BD_CTRL.BUFLEN = sz;
+        if(cryptoalgo == PIC32_CRYPTOALGO_AES_GCM) {
+            if(sz % 0x10)
+                bd_p->BD_CTRL.BUFLEN = (sz/0x10 + 1) * 0x10 ;
+        }
+        bd_p->BD_CTRL.LIFM = 1;
+        bd_p->BD_CTRL.SA_FETCH_EN = 1;
+        bd_p->BD_CTRL.LAST_BD = 1;
+        bd_p->BD_CTRL.DESC_EN = 1;
+
+        bd_p->SA_ADDR = (unsigned int)KVA_TO_PA(&sa) ; 
+        bd_p->SRCADDR = (unsigned int)KVA_TO_PA(in) ; 
+        bd_p->DSTADDR = (unsigned int)KVA_TO_PA(out); 
+        bd_p->MSGLEN = sz ;
+
+        CECON = 1 << 6;
+        while (CECON);
+
+        /* Run the engine */
+        CEBDPADDR = (unsigned int)KVA_TO_PA(&bd) ;
+        CEINTEN = 0x07;
+        CECON = 0x27;
+
+        WAIT_ENGINE ;
+
+        if((cryptoalgo == PIC32_CRYPTOALGO_CBC) ||
+           (cryptoalgo == PIC32_CRYPTOALGO_TCBC)||
+           (cryptoalgo == PIC32_CRYPTOALGO_RCBC)) {
+            /* set iv for the next call */
+            if(dir == PIC32_ENCRYPTION) {
+	        XMEMCPY((void *)aes->iv_ce,
+                        (void*)KVA0_TO_KVA1(out + sz - AES_BLOCK_SIZE),
+                        AES_BLOCK_SIZE) ;
+	    } else {
+                ByteReverseWords((word32*)aes->iv_ce,
+                        (word32 *)KVA0_TO_KVA1(in + sz - AES_BLOCK_SIZE),
+                        AES_BLOCK_SIZE);
+	    }
+        }
+        XMEMCPY((byte *)out, (byte *)KVA0_TO_KVA1(out), sz) ;
+        ByteReverseWords((word32*)out, (word32 *)out, sz);
+    }
+
+    int AesCbcEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
+    {
+        AesCrypt(aes, out, in, sz, PIC32_ENCRYPTION, PIC32_ALGO_AES,
+                                                      PIC32_CRYPTOALGO_RCBC );
+    }
+
+    int AesCbcDecrypt(Aes* aes, byte* out, const byte* in, word32 sz)
+    {
+        AesCrypt(aes, out, in, sz, PIC32_DECRYPTION, PIC32_ALGO_AES,
+                                                      PIC32_CRYPTOALGO_RCBC);
+    }
+
+    #if defined(CYASSL_AES_COUNTER)
+    void AesCtrEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
+    {
+        int i ;
+        char out_block[AES_BLOCK_SIZE] ;
+        int odd ;
+        int even ;
+        char *tmp ; /* (char *)aes->tmp, for short */
+
+        tmp = (char *)aes->tmp ;
+        if(aes->left) {
+            if((aes->left + sz) >= AES_BLOCK_SIZE){
+                odd = AES_BLOCK_SIZE - aes->left ;
+            } else {
+                odd = sz ;
+            }
+            XMEMCPY(tmp+aes->left, in, odd) ;
+            if((odd+aes->left) == AES_BLOCK_SIZE){
+                AesCrypt(aes, out_block, tmp, AES_BLOCK_SIZE,
+                    PIC32_ENCRYPTION, PIC32_ALGO_AES, PIC32_CRYPTOALGO_RCTR);
+                XMEMCPY(out, out_block+aes->left, odd) ;
+                aes->left = 0 ;
+                XMEMSET(tmp, 0x0, AES_BLOCK_SIZE) ;
+                /* Increment IV */
+                for (i = AES_BLOCK_SIZE - 1; i >= 0; i--) {
+                    if (++((byte *)aes->iv_ce)[i])
+                        break ;
+                }
+            }
+            in += odd ;
+            out+= odd ;
+            sz -= odd ;
+        }
+        odd = sz % AES_BLOCK_SIZE ;  /* if there is tail flagment */
+        if(sz / AES_BLOCK_SIZE) {
+            even = (sz/AES_BLOCK_SIZE)*AES_BLOCK_SIZE ;
+            AesCrypt(aes, out, in, even, PIC32_ENCRYPTION, PIC32_ALGO_AES,
+                                                    PIC32_CRYPTOALGO_RCTR);
+            out += even ;
+            in  += even ;
+            do {  /* Increment IV */
+                for (i = AES_BLOCK_SIZE - 1; i >= 0; i--) {
+                    if (++((byte *)aes->iv_ce)[i])
+                        break ;
+                }
+                even -= AES_BLOCK_SIZE ;
+            } while((int)even > 0) ;
+        }
+        if(odd) {
+            XMEMSET(tmp+aes->left, 0x0, AES_BLOCK_SIZE - aes->left) ;
+            XMEMCPY(tmp+aes->left, in, odd) ;
+            AesCrypt(aes, out_block, tmp, AES_BLOCK_SIZE,
+                    PIC32_ENCRYPTION, PIC32_ALGO_AES, PIC32_CRYPTOALGO_RCTR);
+            XMEMCPY(out, out_block+aes->left,odd) ;
+            aes->left += odd ;
+        }
+    }
+    #endif /* CYASSL_AES_COUNTER */
+
+    #ifdef HAVE_AESGCM
+    #define HAVE_AES_ENGINE
+    /* Hardware AESGCM borows most of the software AESGCM, GMAC */
+    #endif
+
+#endif /* CYASSL_PIC32MZ_CRYPT */
+
 #ifdef STM32F2_CRYPTO
     /*
      * STM32F2 hardware AES support through the STM32F2 standard peripheral
@@ -439,13 +617,11 @@ extern volatile unsigned char __MBAR[];
 
 int AesCbcEncrypt(Aes* aes, byte* po, const byte* pi, word32 sz)
 {
-	//printf("AesCbcEncrypt(%x, %x, %x, %d)\n", aes, po, pi, sz) ;
 	return(AesCbcCrypt(aes, po, pi, sz, SEC_DESC_AES_CBC_ENCRYPT)) ;
 }
 
 int AesCbcDecrypt(Aes* aes, byte* po, const byte* pi, word32 sz)
 {
-	//printf("AesCbcDecrypt(%x, %x, %x, %d)\n", aes, po, pi, sz) ;
 	return(AesCbcCrypt(aes, po, pi, sz, SEC_DESC_AES_CBC_DECRYPT)) ;
 }
 	
@@ -1322,7 +1498,6 @@ static const word32 Td[5][256] = {
 };
 
 
-
 #define GETBYTE(x, y) (word32)((byte)((x) >> (8 * (y))))
 
 
@@ -1487,6 +1662,19 @@ static int AesSetKeyLocal(Aes* aes, const byte* userKey, word32 keylen,
         ByteReverseWords(rk, rk, keylen);
     #endif
 
+#ifdef CYASSL_PIC32MZ_CRYPT
+    {
+        word32 *akey1 = aes->key_ce;
+        word32 *areg = aes->iv_ce ;
+        aes->keylen = keylen ;
+        XMEMCPY(akey1, userKey, keylen);
+        if (iv)
+            XMEMCPY(areg, iv, AES_BLOCK_SIZE);
+        else
+            XMEMSET(areg,  0, AES_BLOCK_SIZE);
+    }
+#endif
+
     switch(keylen)
     {
     case 16:
@@ -1976,7 +2164,7 @@ static void AesDecrypt(Aes* aes, const byte* inBlock, byte* outBlock)
     XMEMCPY(outBlock + 3 * sizeof(s0), &s3, sizeof(s3));
 }
 
-
+#ifndef HAVE_AES_ENGINE
 int AesCbcEncrypt(Aes* aes, byte* out, const byte* in, word32 sz)
 {
     word32 blocks = sz / AES_BLOCK_SIZE;
@@ -2083,7 +2271,7 @@ int AesCbcDecrypt(Aes* aes, byte* out, const byte* in, word32 sz)
 
     return 0;
 }
-
+#endif
 
 #ifdef CYASSL_AES_DIRECT
 
@@ -2116,7 +2304,7 @@ int AesSetKeyDirect(Aes* aes, const byte* userKey, word32 keylen,
 #endif /* CYASSL_AES_DIRECT || CYASSL_AES_COUNTER */
 
 
-#ifdef CYASSL_AES_COUNTER
+#if defined(CYASSL_AES_COUNTER) && !defined(HAVE_AES_ENGINE)
 
 /* Increment AES counter */
 static INLINE void IncrementAesCounter(byte* inOutCtr)
@@ -2806,34 +2994,51 @@ void AesGcmEncrypt(Aes* aes, byte* out, const byte* in, word32 sz,
     word32 partial = sz % AES_BLOCK_SIZE;
     const byte* p = in;
     byte* c = out;
-    byte ctr[AES_BLOCK_SIZE];
+    byte counter[AES_BLOCK_SIZE];
+    byte *ctr ;
     byte scratch[AES_BLOCK_SIZE];
 
     CYASSL_ENTER("AesGcmEncrypt");
 
+#ifdef CYASSL_PIC32MZ_CRYPT
+    ctr = (char *)aes->iv_ce ;
+#else
+    ctr = counter ;
+#endif
+
     XMEMSET(ctr, 0, AES_BLOCK_SIZE);
     XMEMCPY(ctr, iv, ivSz);
     InitGcmCounter(ctr);
 
+#ifdef CYASSL_PIC32MZ_CRYPT
+    if(blocks)
+        AesCrypt(aes, out, in, blocks*AES_BLOCK_SIZE,
+             PIC32_ENCRYPTION, PIC32_ALGO_AES, PIC32_CRYPTOALGO_AES_GCM );
+#endif
     while (blocks--) {
         IncrementGcmCounter(ctr);
+        #ifndef CYASSL_PIC32MZ_CRYPT
         AesEncrypt(aes, ctr, scratch);
         xorbuf(scratch, p, AES_BLOCK_SIZE);
         XMEMCPY(c, scratch, AES_BLOCK_SIZE);
-
+        #endif
         p += AES_BLOCK_SIZE;
         c += AES_BLOCK_SIZE;
     }
+
     if (partial != 0) {
         IncrementGcmCounter(ctr);
         AesEncrypt(aes, ctr, scratch);
         xorbuf(scratch, p, partial);
         XMEMCPY(c, scratch, partial);
+
     }
+
     GHASH(aes, authIn, authInSz, out, sz, authTag, authTagSz);
     InitGcmCounter(ctr);
     AesEncrypt(aes, ctr, scratch);
     xorbuf(authTag, scratch, authTagSz);
+
 }
 
 
@@ -2846,11 +3051,18 @@ int  AesGcmDecrypt(Aes* aes, byte* out, const byte* in, word32 sz,
     word32 partial = sz % AES_BLOCK_SIZE;
     const byte* c = in;
     byte* p = out;
-    byte ctr[AES_BLOCK_SIZE];
+    byte counter[AES_BLOCK_SIZE];
+    byte *ctr ;
     byte scratch[AES_BLOCK_SIZE];
 
     CYASSL_ENTER("AesGcmDecrypt");
 
+#ifdef CYASSL_PIC32MZ_CRYPT
+    ctr = (char *)aes->iv_ce ;
+#else
+    ctr = counter ;
+#endif
+
     XMEMSET(ctr, 0, AES_BLOCK_SIZE);
     XMEMCPY(ctr, iv, ivSz);
     InitGcmCounter(ctr);
@@ -2864,17 +3076,25 @@ int  AesGcmDecrypt(Aes* aes, byte* out, const byte* in, word32 sz,
         GHASH(aes, authIn, authInSz, in, sz, Tprime, sizeof(Tprime));
         AesEncrypt(aes, ctr, EKY0);
         xorbuf(Tprime, EKY0, sizeof(Tprime));
+
         if (XMEMCMP(authTag, Tprime, authTagSz) != 0) {
             return AES_GCM_AUTH_E;
         }
     }
+ 
+#ifdef CYASSL_PIC32MZ_CRYPT
+    if(blocks)
+        AesCrypt(aes, out, in, blocks*AES_BLOCK_SIZE,
+             PIC32_DECRYPTION, PIC32_ALGO_AES, PIC32_CRYPTOALGO_AES_GCM );
+#endif
 
     while (blocks--) {
         IncrementGcmCounter(ctr);
+        #ifndef CYASSL_PIC32MZ_CRYPT
         AesEncrypt(aes, ctr, scratch);
         xorbuf(scratch, c, AES_BLOCK_SIZE);
         XMEMCPY(p, scratch, AES_BLOCK_SIZE);
-
+        #endif
         p += AES_BLOCK_SIZE;
         c += AES_BLOCK_SIZE;
     }
@@ -2884,11 +3104,11 @@ int  AesGcmDecrypt(Aes* aes, byte* out, const byte* in, word32 sz,
         xorbuf(scratch, c, partial);
         XMEMCPY(p, scratch, partial);
     }
-
     return 0;
 }
 
 
+
 CYASSL_API void GmacSetKey(Gmac* gmac, const byte* key, word32 len)
 {
     AesGcmSetKey(&gmac->aes, key, len);
diff --git a/ctaocrypt/src/des3.c b/ctaocrypt/src/des3.c
index 15016b2b3..ea6678bbf 100644
--- a/ctaocrypt/src/des3.c
+++ b/ctaocrypt/src/des3.c
@@ -594,6 +594,138 @@ void Des3_SetKey(Des3* des3, const byte* key, const byte* iv, int dir)
         return;
     }
 
+
+#elif defined(CYASSL_PIC32MZ_CRYPT)
+
+    #include "../../cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h"
+
+void Des_SetIV(Des* des, const byte* iv);
+void Des3_SetIV(Des3* des, const byte* iv);
+
+    void Des_SetKey(Des* des, const byte* key, const byte* iv, int dir)
+    {
+        word32 *dkey = des->key ;
+        word32 *dreg = des->reg ;
+
+        XMEMCPY((byte *)dkey, (byte *)key, 8);
+        ByteReverseWords(dkey, dkey, 8);
+        XMEMCPY((byte *)dreg, (byte *)iv, 8);
+        ByteReverseWords(dreg, dreg, 8);
+    }
+
+    void Des3_SetKey(Des3* des, const byte* key, const byte* iv, int dir)
+    {
+        word32 *dkey1 = des->key[0];
+        word32 *dreg = des->reg ;
+
+        XMEMCPY(dkey1, key, 24);
+        ByteReverseWords(dkey1, dkey1, 24);
+        XMEMCPY(dreg, iv, 8);
+        ByteReverseWords(dreg, dreg, 8) ;
+
+    }
+
+    void DesCrypt(word32 *key, word32 *iv, byte* out, const byte* in, word32 sz,
+                  int dir, int algo, int cryptoalgo)
+    {
+        securityAssociation *sa_p ;
+        bufferDescriptor *bd_p ;
+        const byte *in_p, *in_l ;
+        byte *out_p, *out_l ;
+        volatile securityAssociation sa __attribute__((aligned (8)));
+        volatile bufferDescriptor bd __attribute__((aligned (8)));
+        volatile int k ;
+        
+        /* get uncached address */
+
+        in_l = in;
+        out_l = out ;
+        sa_p = KVA0_TO_KVA1(&sa) ; 
+        bd_p = KVA0_TO_KVA1(&bd) ;
+        in_p = KVA0_TO_KVA1(in_l) ;
+        out_p= KVA0_TO_KVA1(out_l);
+        
+        if(PIC32MZ_IF_RAM(in_p))
+            XMEMCPY((void *)in_p, (void *)in, sz);
+        XMEMSET((void *)out_p, 0, sz);
+
+        /* Set up the Security Association */
+        XMEMSET((byte *)KVA0_TO_KVA1(&sa), 0, sizeof(sa));
+        sa_p->SA_CTRL.ALGO = algo ; 
+        sa_p->SA_CTRL.LNC = 1;
+        sa_p->SA_CTRL.LOADIV = 1;
+        sa_p->SA_CTRL.FB = 1;
+        sa_p->SA_CTRL.ENCTYPE = dir ; /* Encryption/Decryption */
+        sa_p->SA_CTRL.CRYPTOALGO = cryptoalgo;
+        sa_p->SA_CTRL.KEYSIZE = 1 ; /* KEY is 192 bits */
+        XMEMCPY((byte *)KVA0_TO_KVA1(&sa.SA_ENCKEY[algo==PIC32_ALGO_TDES ? 2 : 6]),
+                (byte *)key, algo==PIC32_ALGO_TDES ? 24 : 8);
+        XMEMCPY((byte *)KVA0_TO_KVA1(&sa.SA_ENCIV[2]), (byte *)iv, 8);
+
+        XMEMSET((byte *)KVA0_TO_KVA1(&bd), 0, sizeof(bd));
+        /* Set up the Buffer Descriptor */
+        bd_p->BD_CTRL.BUFLEN = sz;
+        bd_p->BD_CTRL.LIFM = 1;
+        bd_p->BD_CTRL.SA_FETCH_EN = 1;
+        bd_p->BD_CTRL.LAST_BD = 1;
+        bd_p->BD_CTRL.DESC_EN = 1;
+    
+        bd_p->SA_ADDR = (unsigned int)KVA_TO_PA(&sa) ; // (unsigned int)sa_p  ;
+        bd_p->SRCADDR = (unsigned int)KVA_TO_PA(in) ; // (unsigned int)in_p  ;
+        bd_p->DSTADDR = (unsigned int)KVA_TO_PA(out); // (unsigned int)out_p  ;
+        bd_p->NXTPTR = (unsigned int)KVA_TO_PA(&bd);
+        bd_p->MSGLEN = sz ;
+        
+        /* Fire in the hole! */
+        CECON = 1 << 6;
+        while (CECON);
+        
+        /* Run the engine */
+        CEBDPADDR = (unsigned int)KVA_TO_PA(&bd) ; // (unsigned int)bd_p ;
+        CEINTEN = 0x07;
+        CECON = 0x27;
+
+        WAIT_ENGINE ;
+
+        if((cryptoalgo == PIC32_CRYPTOALGO_CBC) ||
+           (cryptoalgo == PIC32_CRYPTOALGO_TCBC)||
+           (cryptoalgo == PIC32_CRYPTOALGO_RCBC)) {
+            /* set iv for the next call */
+            if(dir == PIC32_ENCRYPTION) {
+	        XMEMCPY((void *)iv, (void*)&(out_p[sz-DES_IVLEN]), DES_IVLEN) ;
+	        } else {
+                ByteReverseWords((word32*)iv, (word32 *)&(in_p[sz-DES_IVLEN]), DES_IVLEN);
+	        }
+
+        }
+
+        ByteReverseWords((word32*)out, (word32 *)KVA0_TO_KVA1(out), sz);
+    }
+
+    void Des_CbcEncrypt(Des* des, byte* out, const byte* in, word32 sz)
+    {
+        DesCrypt(des->key, des->reg, out, in, sz, 
+                PIC32_ENCRYPTION, PIC32_ALGO_DES, PIC32_CRYPTOALGO_CBC );
+    }
+
+    void Des_CbcDecrypt(Des* des, byte* out, const byte* in, word32 sz)
+    {
+        DesCrypt(des->key, des->reg, out, in, sz, 
+                PIC32_DECRYPTION, PIC32_ALGO_DES, PIC32_CRYPTOALGO_CBC);
+    }
+
+    void Des3_CbcEncrypt(Des3* des, byte* out, const byte* in, word32 sz)
+    {
+        DesCrypt(des->key[0], des->reg, out, in, sz, 
+                PIC32_ENCRYPTION, PIC32_ALGO_TDES, PIC32_CRYPTOALGO_TCBC);
+    }
+
+    void Des3_CbcDecrypt(Des3* des, byte* out, const byte* in, word32 sz)
+    {
+        DesCrypt(des->key[0], des->reg, out, in, sz, 
+                PIC32_DECRYPTION, PIC32_ALGO_TDES, PIC32_CRYPTOALGO_TCBC);
+    }
+
 #else /* CTaoCrypt software implementation */
 
 /* permuted choice table (key) */
diff --git a/ctaocrypt/src/hmac.c b/ctaocrypt/src/hmac.c
index 71fd0cad4..25c867997 100644
--- a/ctaocrypt/src/hmac.c
+++ b/ctaocrypt/src/hmac.c
@@ -27,6 +27,22 @@
 
 #ifndef NO_HMAC
 
+#ifdef CYASSL_PIC32MZ_HASH
+
+#define InitMd5   InitMd5_sw
+#define Md5Update Md5Update_sw
+#define Md5Final  Md5Final_sw
+
+#define InitSha   InitSha_sw
+#define ShaUpdate ShaUpdate_sw
+#define ShaFinal  ShaFinal_sw
+
+#define InitSha256   InitSha256_sw
+#define Sha256Update Sha256Update_sw
+#define Sha256Final  Sha256Final_sw
+
+#endif
+
 #include 
 #include 
 
diff --git a/ctaocrypt/src/md5.c b/ctaocrypt/src/md5.c
index 96bcc359d..43362327a 100644
--- a/ctaocrypt/src/md5.c
+++ b/ctaocrypt/src/md5.c
@@ -26,7 +26,13 @@
 
 #include 
 
-#ifndef NO_MD5
+#if !defined(NO_MD5)
+
+#ifdef CYASSL_PIC32MZ_HASH
+#define InitMd5   InitMd5_sw
+#define Md5Update Md5Update_sw
+#define Md5Final  Md5Final_sw
+#endif
 
 #include 
 
diff --git a/ctaocrypt/src/port/pic32/pic32mz-hash.c b/ctaocrypt/src/port/pic32/pic32mz-hash.c
new file mode 100644
index 000000000..fe2c1f3e4
--- /dev/null
+++ b/ctaocrypt/src/port/pic32/pic32mz-hash.c
@@ -0,0 +1,243 @@
+/* pic32mz-hash.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+
+#ifdef CYASSL_PIC32MZ_HASH
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#if !defined(NO_MD5) && !defined(NO_SHA) && !defined(NO_SHA256)
+
+static void reset_engine(pic32mz_desc *desc_l, int algo)
+{
+    pic32mz_desc *desc ;
+    desc = KVA0_TO_KVA1(desc_l) ;
+
+    CECON = 1 << 6;
+    while (CECON);
+
+    /* Make sure everything is clear first before we make settings. */
+    XMEMSET((void *)KVA0_TO_KVA1(&desc->sa), 0, sizeof(desc->sa));
+    XMEMSET((void *)KVA0_TO_KVA1(&desc->bd[0]), 0, sizeof(desc->bd[0]));
+    XMEMSET((void *)KVA0_TO_KVA1(&desc->bd[1]), 0, sizeof(desc->bd[1]));
+
+    /* Set up the security association */
+    desc->sa.SA_CTRL.ALGO = algo ;
+    desc->sa.SA_CTRL.LNC = 1;
+    desc->sa.SA_CTRL.FB = 1;
+    desc->sa.SA_CTRL.ENCTYPE = 1;
+    desc->sa.SA_CTRL.LOADIV = 1;
+
+    /* Set up the buffer descriptor */
+    desc->err = 0 ;
+    desc->bd[0].BD_CTRL.LAST_BD = 1;
+    desc->bd[0].BD_CTRL.LIFM = 1;
+    desc->bd[0].SA_ADDR = KVA_TO_PA(&desc->sa);
+    desc->bd[1].BD_CTRL.LAST_BD = 1;
+    desc->bd[1].BD_CTRL.LIFM = 1;
+    desc->bd[1].SA_ADDR = KVA_TO_PA(&desc->sa);
+    desc_l->bdCount = 0 ;
+    CEBDPADDR = KVA_TO_PA(&(desc->bd[0]));
+
+    CECON = 0x27;
+}
+
+#define PIC32MZ_IF_RAM(addr) (KVA_TO_PA(addr) < 0x80000)
+
+static void update_engine(pic32mz_desc *desc_l, const char *input, word32 len,
+                    word32 *hash)
+{
+    pic32mz_desc *desc ;
+    int i ;
+    int total ;
+    desc = KVA0_TO_KVA1(desc_l) ;
+
+    i = desc_l->bdCount ;
+    if(i >= PIC32MZ_MAX_BD) {
+        desc_l->err = 1 ;
+        return ;
+    }
+
+    if(PIC32MZ_IF_RAM(input))
+        XMEMCPY(KVA0_TO_KVA1(input), input, len) ; /* Sync phys with cache */
+    desc->bd[i].SRCADDR = KVA_TO_PA(input);
+    /* Finally, turn on the buffer descriptor */
+    if (len % 4)
+         desc->bd[i].BD_CTRL.BUFLEN = (len + 4) - (len % 4);
+    else desc->bd[i].BD_CTRL.BUFLEN =  len ;
+
+    if(i == 0) {
+        desc->bd[i].MSGLEN =  len ;
+        desc->bd[i].BD_CTRL.SA_FETCH_EN = 1;
+    } else {
+        desc->bd[i-1].NXTPTR  = KVA_TO_PA(&(desc->bd[i])) ;
+        desc->bd[i].BD_CTRL.DESC_EN = 1;
+        desc->bd[i-1].BD_CTRL.LAST_BD = 0 ;
+        desc->bd[i-1].BD_CTRL.LIFM    = 0 ;
+        total = desc->bd[i-1].MSGLEN + len ;
+        desc->bd[i].MSGLEN = total ;
+        desc->bd[i-1].MSGLEN = total ;
+    }
+    desc->bd[i].UPDPTR = KVA_TO_PA(hash);
+    desc_l->bdCount ++ ;
+
+    #ifdef DEBUG_CYASSL
+    printf("Input[bd=%d, len=%d]:%x->\"%s\"\n", desc_l->bdCount, len, input, input) ;
+    print_mem(input, len+4) ;
+    #endif
+}
+
+static void start_engine(pic32mz_desc *desc) {
+    bufferDescriptor *hash_bd[2] ;
+    hash_bd[0] = (bufferDescriptor *)KVA0_TO_KVA1(&(desc->bd[0])) ;
+    hash_bd[0]->BD_CTRL.DESC_EN = 1;
+}
+
+void wait_engine(pic32mz_desc *desc, char *hash, int hash_sz) {
+    unsigned int i;
+    unsigned int *intptr;
+#undef DEBUG_CYASSL
+    #ifdef DEBUG_CYASSL
+    printf("desc(%x)[bd:%d * 2, sz:%d]\n", desc, sizeof(desc->bd[0]),
+                                                 sizeof(desc->sa) );
+    print_mem(KVA0_TO_KVA1(&(desc->bd[0])), sizeof(desc->bd[0])) ;
+    print_mem(KVA0_TO_KVA1(&(desc->bd[1])), sizeof(desc->bd[0])) ;
+    #endif
+
+    WAIT_ENGINE ;
+    
+    XMEMCPY(hash, KVA0_TO_KVA1(hash), hash_sz) ;
+
+    #ifdef DEBUG_CYASSL
+    print_mem(KVA0_TO_KVA1(hash), hash_sz) ;
+    print_mem(             hash , hash_sz) ;
+    #endif
+    for (i = 0, intptr = (unsigned int *)hash; i < hash_sz/sizeof(unsigned int);
+                                                                  i++, intptr++)
+    {
+        *intptr = ntohl(*intptr);
+    }
+}
+
+static int fillBuff(char *buff, int *bufflen, const char *data, int len, int blocksz)
+{
+    int room, copysz ;
+
+    room = blocksz - *bufflen ;
+    copysz = (len <= room) ? len : room ;
+    XMEMCPY(buff, data, copysz) ;
+    *bufflen += copysz ;
+    return (*bufflen == blocksz) ? 1 : 0 ;
+}
+
+#endif
+
+#ifndef NO_MD5
+void InitMd5(Md5* md5)
+{
+    CYASSL_ENTER("InitMd5\n") ;
+    XMEMSET((void *)md5, 0xcc, sizeof(Md5)) ;
+    XMEMSET((void *)KVA0_TO_KVA1(md5), 0xcc, sizeof(Md5)) ;
+    reset_engine(&(md5->desc), PIC32_ALGO_MD5) ;
+
+}
+
+void Md5Update(Md5* md5, const byte* data, word32 len)
+{
+     CYASSL_ENTER("Md5Update\n") ;
+     update_engine(&(md5->desc), data, len, md5->digest) ;
+}
+
+void Md5Final(Md5* md5, byte* hash)
+{
+     CYASSL_ENTER("Md5Final\n") ;
+    start_engine(&(md5->desc)) ;
+    wait_engine(&(md5->desc), (char *)md5->digest, MD5_HASH_SIZE) ;
+    XMEMCPY(hash, md5->digest, MD5_HASH_SIZE) ;
+    InitMd5(md5);  /* reset state */
+}
+#endif
+
+#ifndef NO_SHA
+void InitSha(Sha* sha)
+{
+    CYASSL_ENTER("InitSha\n") ;
+    XMEMSET((void *)sha, 0xcc, sizeof(Sha)) ;
+    XMEMSET((void *)KVA0_TO_KVA1(sha), 0xcc, sizeof(Sha)) ;
+    reset_engine(&(sha->desc), PIC32_ALGO_SHA1) ;
+}
+
+void ShaUpdate(Sha* sha, const byte* data, word32 len)
+{
+    CYASSL_ENTER("ShaUpdate\n") ;
+    update_engine(&(sha->desc), data, len, sha->digest) ;
+}
+
+void ShaFinal(Sha* sha, byte* hash)
+{
+    CYASSL_ENTER("ShaFinal\n") ;
+    start_engine(&(sha->desc)) ;
+    wait_engine(&(sha->desc), (char *)sha->digest, SHA1_HASH_SIZE) ;
+    XMEMCPY(hash, sha->digest, SHA1_HASH_SIZE) ;
+
+    InitSha(sha);  /* reset state */
+}
+#endif /* NO_SHA */
+
+#ifndef NO_SHA256
+void InitSha256(Sha256* sha256)
+{
+    CYASSL_ENTER("InitSha256\n") ;
+    XMEMSET((void *)sha256, 0xcc, sizeof(Sha256)) ;
+    XMEMSET((void *)KVA0_TO_KVA1(sha256), 0xcc, sizeof(Sha256)) ;
+    reset_engine(&(sha256->desc), PIC32_ALGO_SHA256) ;
+}
+
+void Sha256Update(Sha256* sha256, const byte* data, word32 len)
+{
+    CYASSL_ENTER("Sha256Update\n") ;
+    update_engine(&(sha256->desc), data, len, sha256->digest) ;
+}
+
+void Sha256Final(Sha256* sha256, byte* hash)
+{
+    CYASSL_ENTER("Sha256Final\n") ;
+    start_engine(&(sha256->desc)) ;
+    wait_engine(&(sha256->desc), (char *)sha256->digest, SHA256_HASH_SIZE) ;
+    XMEMCPY(hash, sha256->digest, SHA256_HASH_SIZE) ;
+    InitSha256(sha256);  /* reset state */
+}
+#endif /* NO_SHA256 */
+
+#endif
+
+
+
diff --git a/ctaocrypt/src/pwdbased.c b/ctaocrypt/src/pwdbased.c
index 3f330ef4d..6152292ca 100644
--- a/ctaocrypt/src/pwdbased.c
+++ b/ctaocrypt/src/pwdbased.c
@@ -27,6 +27,22 @@
 
 #ifndef NO_PWDBASED
 
+#ifdef CYASSL_PIC32MZ_HASH
+
+#define InitMd5   InitMd5_sw
+#define Md5Update Md5Update_sw
+#define Md5Final  Md5Final_sw
+
+#define InitSha   InitSha_sw
+#define ShaUpdate ShaUpdate_sw
+#define ShaFinal  ShaFinal_sw
+
+#define InitSha256   InitSha256_sw
+#define Sha256Update Sha256Update_sw
+#define Sha256Final  Sha256Final_sw
+
+#endif
+
 #include 
 #include 
 #include 
diff --git a/ctaocrypt/src/random.c b/ctaocrypt/src/random.c
index 0b84af3e5..bf1c9f097 100644
--- a/ctaocrypt/src/random.c
+++ b/ctaocrypt/src/random.c
@@ -51,7 +51,8 @@
     #include 
     #include 
 #else
-    #if !defined(NO_DEV_RANDOM) && !defined(CYASSL_MDK_ARM) 
+    #if !defined(NO_DEV_RANDOM) && !defined(CYASSL_MDK_ARM) \
+                                && !defined(CYASSL_IAR_ARM)
             #include 
         #ifndef EBSNET
             #include 
@@ -468,7 +469,44 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
     #endif
     #define PIC32_SEED_COUNT ReadCoreTimer
 #endif
+    #ifdef CYASSL_MIC32MZ_RNG
+        #include "xc.h"
+        int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
+        {
+            int i ;
+            byte rnd[8] ;
+            word32 *rnd32 = (word32 *)rnd ;
+            word32 size = sz ;
+            byte* op = output ;
 
+            /* This part has to be replaced with better random seed */
+            RNGNUMGEN1 = ReadCoreTimer();
+            RNGPOLY1 = ReadCoreTimer();
+            RNGPOLY2 = ReadCoreTimer();
+            RNGNUMGEN2 = ReadCoreTimer();
+#ifdef DEBUG_CYASSL
+            printf("GenerateSeed::Seed=%08x, %08x\n", RNGNUMGEN1, RNGNUMGEN2) ;
+#endif
+            RNGCONbits.PLEN = 0x40;
+            RNGCONbits.PRNGEN = 1;
+            for(i=0; i<5; i++) { /* wait for RNGNUMGEN ready */
+                volatile int x ;
+                x = RNGNUMGEN1 ;
+                x = RNGNUMGEN2 ;
+            }
+            do {
+                rnd32[0] = RNGNUMGEN1;
+                rnd32[1] = RNGNUMGEN2;
+
+                for(i=0; i<8; i++, op++) {
+                    *op = rnd[i] ;
+                    size -- ;
+                    if(size==0)break ;
+                }
+            } while(size) ;
+            return 0;
+        }
+#else  /* CYASSL_MIC32MZ_RNG */
 /* uses the core timer, in nanoseconds to seed srand */
 int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
 {
@@ -483,8 +521,9 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
 
     return 0;
 }
-
-#elif defined(CYASSL_SAFERTOS) || defined(CYASSL_LEANPSK)
+#endif /* CYASSL_MIC32MZ_RNG */
+#elif defined(CYASSL_SAFERTOS) || defined(CYASSL_LEANPSK) \
+   || defined(CYASSL_IAR_ARM)                               
 
 #warning "write a real random seed!!!!, just for testing now"
 
diff --git a/ctaocrypt/src/sha.c b/ctaocrypt/src/sha.c
index 93683ee95..0bf5359eb 100644
--- a/ctaocrypt/src/sha.c
+++ b/ctaocrypt/src/sha.c
@@ -26,7 +26,13 @@
 
 #include 
 
-#ifndef NO_SHA
+#if !defined(NO_SHA)
+
+#ifdef CYASSL_PIC32MZ_HASH
+#define InitSha   InitSha_sw
+#define ShaUpdate ShaUpdate_sw
+#define ShaFinal  ShaFinal_sw
+#endif
 
 #include 
 #ifdef NO_INLINE
@@ -357,11 +363,11 @@ void ShaFinal(Sha* sha, byte* hash)
 
     #ifdef FREESCALE_MMCAU
         /* Kinetis requires only these bytes reversed */
-        ByteReverseWords(&sha->buffer[SHA_PAD_SIZE/sizeof(word32)],
-                         &sha->buffer[SHA_PAD_SIZE/sizeof(word32)],
-                         2 * sizeof(word32));
+        ByteReverseBytes(&local[SHA_PAD_SIZE], &local[SHA_PAD_SIZE],
+                2 * sizeof(word32));
     #endif
 
+    XTRANSFORM(sha, local);
     XTRANSFORM(sha, local);
     #ifdef LITTLE_ENDIAN_ORDER
         ByteReverseWords(sha->digest, sha->digest, SHA_DIGEST_SIZE);
diff --git a/ctaocrypt/src/sha256.c b/ctaocrypt/src/sha256.c
index 769edf9e2..d859774e7 100644
--- a/ctaocrypt/src/sha256.c
+++ b/ctaocrypt/src/sha256.c
@@ -28,7 +28,13 @@
 
 #include 
 
-#ifndef NO_SHA256
+#if !defined(NO_SHA256)
+
+#ifdef CYASSL_PIC32MZ_HASH
+#define InitSha256   InitSha256_sw
+#define Sha256Update Sha256Update_sw
+#define Sha256Final  Sha256Final_sw
+#endif
 
 #include 
 #ifdef NO_INLINE
@@ -215,11 +221,11 @@ void Sha256Final(Sha256* sha256, byte* hash)
 
     #ifdef FREESCALE_MMCAU
         /* Kinetis requires only these bytes reversed */
-        ByteReverseWords(&sha256->buffer[SHA256_PAD_SIZE/sizeof(word32)],
-                         &sha256->buffer[SHA256_PAD_SIZE/sizeof(word32)],
-                         2 * sizeof(word32));
+        ByteReverseBytes(&local[SHA256_PAD_SIZE], &local[SHA256_PAD_SIZE],
+                2 * sizeof(word32));
     #endif
 
+    XTRANSFORM(sha256, local);
     XTRANSFORM(sha256, local);
     #ifdef LITTLE_ENDIAN_ORDER
         ByteReverseWords(sha256->digest, sha256->digest, SHA256_DIGEST_SIZE);
diff --git a/cyassl/ctaocrypt/aes.h b/cyassl/ctaocrypt/aes.h
index e280e006b..b08e4e86a 100644
--- a/cyassl/ctaocrypt/aes.h
+++ b/cyassl/ctaocrypt/aes.h
@@ -94,7 +94,12 @@ typedef struct Aes {
 #endif
 #ifdef CYASSL_AES_COUNTER
     word32  left;            /* unsued bytes left from last call */
-#endif 
+#endif
+#ifdef CYASSL_PIC32MZ_CRYPT
+    word32 key_ce[AES_BLOCK_SIZE*2/sizeof(word32)] ;
+    word32 iv_ce [AES_BLOCK_SIZE  /sizeof(word32)] ;
+    int    keylen ;
+#endif
 } Aes;
 
 
diff --git a/cyassl/ctaocrypt/md5.h b/cyassl/ctaocrypt/md5.h
index 2ab16b1b9..b669998e3 100644
--- a/cyassl/ctaocrypt/md5.h
+++ b/cyassl/ctaocrypt/md5.h
@@ -42,22 +42,28 @@ enum {
     MD5_PAD_SIZE    = 56
 };
 
+#ifdef CYASSL_PIC32MZ_HASH
+#include "port/pic32/pic32mz-crypt.h"
+#endif
 
 /* MD5 digest */
 typedef struct Md5 {
     word32  buffLen;   /* in bytes          */
     word32  loLen;     /* length in bytes   */
     word32  hiLen;     /* length in bytes   */
-    word32  digest[MD5_DIGEST_SIZE / sizeof(word32)];
     word32  buffer[MD5_BLOCK_SIZE  / sizeof(word32)];
+    #ifndef CYASSL_PIC32MZ_HASH
+    word32  digest[MD5_DIGEST_SIZE / sizeof(word32)];
+    #else
+    word32  digest[PIC32_HASH_SIZE / sizeof(word32)];
+    pic32mz_desc desc ; /* Crypt Engine descripter */
+    #endif
 } Md5;
 
-
 CYASSL_API void InitMd5(Md5*);
 CYASSL_API void Md5Update(Md5*, const byte*, word32);
 CYASSL_API void Md5Final(Md5*, byte*);
 
-
 #ifdef __cplusplus
     } /* extern "C" */
 #endif
diff --git a/cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h b/cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h
new file mode 100644
index 000000000..e52b7d584
--- /dev/null
+++ b/cyassl/ctaocrypt/port/pic32/pic32mz-crypt.h
@@ -0,0 +1,88 @@
+/* pic32mz-crypt.h
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifndef PIC32MZ_CRYPT_H
+#define PIC32MZ_CRYPT_H
+
+#ifdef  CYASSL_PIC32MZ_CRYPT
+
+#define MICROCHIP_PIC32
+#include 
+#include 
+#include 
+#include "../../../../mplabx/crypto.h"
+
+
+#define PIC32_ENCRYPTION      0b1
+#define PIC32_DECRYPTION      0b0
+
+#define PIC32_ALGO_HMAC1     0b01000000
+#define PIC32_ALGO_SHA256    0b00100000
+#define PIC32_ALGO_SHA1      0b00010000
+#define PIC32_ALGO_MD5       0b00001000
+#define PIC32_ALGO_AES       0b00000100
+#define PIC32_ALGO_TDES      0b00000010
+#define PIC32_ALGO_DES       0b00000001
+
+#define PIC32_CRYPTOALGO_AES_GCM 0b1110
+#define PIC32_CRYPTOALGO_RCTR    0b1101
+#define PIC32_CRYPTOALGO_RCBC    0b1001
+#define PIC32_CRYPTOALGO_REBC    0b1000
+#define PIC32_CRYPTOALGO_TCBC    0b0101
+#define PIC32_CRYPTOALGO_CBC     0b0001
+
+#define PIC32_AES_KEYSIZE_256     0b10
+#define PIC32_AES_KEYSIZE_192     0b01
+#define PIC32_AES_KEYSIZE_128     0b00
+
+#define PIC32_AES_BLOCK_SIZE 16
+#define MD5_HASH_SIZE 16
+#define SHA1_HASH_SIZE 20
+#define SHA256_HASH_SIZE 32
+#define PIC32_HASH_SIZE 32
+
+#define PIC32MZ_MAX_BD   2
+typedef struct {      /* Crypt Engine descripter */
+    int bdCount ;
+    int err   ;
+    volatile bufferDescriptor 
+        bd[PIC32MZ_MAX_BD] __attribute__((aligned (8), coherent));
+    securityAssociation 
+        sa                 __attribute__((aligned (8), coherent));
+} pic32mz_desc ;
+
+#define PIC32MZ_IF_RAM(addr) (KVA_TO_PA(addr) < 0x80000)
+
+#define WAIT_ENGINE \
+    { volatile int v ; while (CESTATbits.ACTIVE) ; for(v=0; v<100; v++) ; }
+
+#ifdef DEBUG_CYASSL
+static void print_mem(const unsigned char *p, int size) {
+    for(; size>0; size--, p++) {
+        if(size%4 == 0)printf(" ") ;
+            printf("%02x", (int)*p) ;
+    }
+    puts("") ;
+}
+#endif
+
+#endif
+#endif /* PIC32MZ_CRYPT_H */
diff --git a/cyassl/ctaocrypt/settings.h b/cyassl/ctaocrypt/settings.h
index 7be8ed79a..23e1f5c3f 100644
--- a/cyassl/ctaocrypt/settings.h
+++ b/cyassl/ctaocrypt/settings.h
@@ -51,6 +51,9 @@
 /* Uncomment next line if using Microchip TCP/IP stack, version 6 or later */
 /* #define MICROCHIP_TCPIP */
 
+/* Uncomment next line if using PIC32MZ Crypto Engine */
+/* #define CYASSL_MICROCHIP_PIC32MZ */
+        
 /* Uncomment next line if using FreeRTOS */
 /* #define FREERTOS */
 
@@ -81,6 +84,8 @@
 /* Uncomment next line if using QL SEP settings */
 /* #define CYASSL_QL */
 
+/* Uncomment next line if using LwIP native TCP socket settings */
+/* #define HAVE_LWIP_NATIVE */
 
 #include 
 
@@ -114,7 +119,16 @@
     #include "nx_api.h"
 #endif
 
+#if defined(HAVE_LWIP_NATIVE) /* using LwIP native TCP socket */
+    #define CYASSL_LWIP
+    #define NO_WRITEV
+    #define SINGLE_THREADED
+    #define CYASSL_USER_IO
+    #define NO_FILESYSTEM
+#endif 
+
 #ifdef MICROCHIP_PIC32
+    /* #define CYASSL_MICROCHIP_PIC32MZ */
     #define SIZEOF_LONG_LONG 8
     #define SINGLE_THREADED
     #define CYASSL_USER_IO
@@ -125,6 +139,18 @@
     #define TFM_TIMING_RESISTANT
 #endif
 
+#ifdef CYASSL_MICROCHIP_PIC32MZ
+    #define CYASSL_PIC32MZ_CE
+    #define CYASSL_PIC32MZ_CRYPT
+    #define HAVE_AES_ENGINE
+    #define CYASSL_PIC32MZ_RNG
+    /* #define CYASSL_PIC32MZ_HASH */
+    #define CYASSL_AES_COUNTER
+    #define HAVE_AESGCM
+    #define NO_BIG_INT
+
+#endif
+
 #ifdef MICROCHIP_TCPIP_V5
     /* include timer functions */
     #include "TCPIP Stack/TCPIP.h"
@@ -132,10 +158,10 @@
 
 #ifdef MICROCHIP_TCPIP
     /* include timer, NTP functions */
-    #include "system/system_services.h"
     #ifdef MICROCHIP_MPLAB_HARMONY
         #include "tcpip/tcpip.h"
     #else
+        #include "system/system_services.h"
         #include "tcpip/sntp.h"
     #endif
 #endif
@@ -157,21 +183,21 @@
     #define NO_FILESYSTEM
     #define CYASSL_USER_IO
     #define NO_DEV_RANDOM
-    #define HAVE_HKDF
-    #define NO_MAIN_DRIVER
-    #define CYASSL_LWIP
-
-    /* ECC and optimizations */
-    #define FREESCALE_MMCAU 1
     #define HAVE_ECC
     #define HAVE_ECC_ENCRYPT
+    #define ECC_SHAMIR
+    #define HAVE_HKDF
     #define USE_FAST_MATH
     #define TFM_TIMING_RESISTANT
-    #define TFM_ECC256
-    #define TFM_ARM
-    #define ECC_SHAMIR
-    #define FP_ECC
-    #define FP_ENTRIES 2
+    #define FP_MAX_BITS 512
+    #define NO_OLD_TLS
+    #define NO_MD4
+    #define NO_RABBIT
+    #define NO_HC128
+    #define NO_RSA
+    #define NO_DSA
+    #define NO_PWDBASED
+    #define NO_PSK
     #define FP_LUT 4
     #define FP_MAX_BITS 512
 
diff --git a/cyassl/ctaocrypt/sha.h b/cyassl/ctaocrypt/sha.h
index ce96f2781..4904f9b92 100644
--- a/cyassl/ctaocrypt/sha.h
+++ b/cyassl/ctaocrypt/sha.h
@@ -43,14 +43,22 @@ enum {
     SHA_PAD_SIZE     = 56
 };
 
+#ifdef CYASSL_PIC32MZ_HASH
+#include "port/pic32/pic32mz-crypt.h"
+#endif
 
 /* Sha digest */
 typedef struct Sha {
     word32  buffLen;   /* in bytes          */
     word32  loLen;     /* length in bytes   */
     word32  hiLen;     /* length in bytes   */
-    word32  digest[SHA_DIGEST_SIZE / sizeof(word32)];
     word32  buffer[SHA_BLOCK_SIZE  / sizeof(word32)];
+    #ifndef CYASSL_PIC32MZ_HASH
+    word32  digest[SHA_DIGEST_SIZE / sizeof(word32)];
+    #else
+    word32  digest[PIC32_HASH_SIZE / sizeof(word32)];
+    pic32mz_desc desc ; /* Crypt Engine descripter */
+    #endif
 } Sha;
 
 
diff --git a/cyassl/ctaocrypt/sha256.h b/cyassl/ctaocrypt/sha256.h
index 7c65e133c..7231cfafd 100644
--- a/cyassl/ctaocrypt/sha256.h
+++ b/cyassl/ctaocrypt/sha256.h
@@ -34,6 +34,10 @@
     extern "C" {
 #endif
 
+#ifdef CYASSL_PIC32MZ_HASH
+#include "port/pic32/pic32mz-crypt.h"
+#endif
+
 
 /* in bytes */
 enum {
@@ -51,6 +55,9 @@ typedef struct Sha256 {
     word32  hiLen;     /* length in bytes   */
     word32  digest[SHA256_DIGEST_SIZE / sizeof(word32)];
     word32  buffer[SHA256_BLOCK_SIZE  / sizeof(word32)];
+    #ifdef CYASSL_PIC32MZ_HASH
+        pic32mz_desc desc ; /* Crypt Engine descripter */
+    #endif
 } Sha256;
 
 
diff --git a/cyassl/test.h b/cyassl/test.h
index e176e3b28..644cb96a9 100644
--- a/cyassl/test.h
+++ b/cyassl/test.h
@@ -81,7 +81,7 @@
 
 /* HPUX doesn't use socklent_t for third parameter to accept, unless
    _XOPEN_SOURCE_EXTENDED is defined */
-#if !defined(__hpux__) && !defined(CYASSL_MDK_ARM)
+#if !defined(__hpux__) && !defined(CYASSL_MDK_ARM) && !defined(CYASSL_IAR_ARM)
     typedef socklen_t* ACCEPT_THIRD_T;
 #else
     #if defined _XOPEN_SOURCE_EXTENDED
diff --git a/mplabx/benchmark_main.c b/mplabx/benchmark_main.c
index f9c0bdaef..d17def394 100644
--- a/mplabx/benchmark_main.c
+++ b/mplabx/benchmark_main.c
@@ -18,6 +18,15 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
+#if defined(CYASSL_MICROCHIP_PIC32MZ)
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+    #define SYSTEMConfigPerformance /* void out SYSTEMConfigPerformance(); */
+#else
+
 #if defined(CYASSL_MICROCHIP_PIC32MZ)
     #define MICROCHIP_PIC32
     #include 
diff --git a/mplabx/crypto.h b/mplabx/crypto.h
new file mode 100644
index 000000000..76dccadff
--- /dev/null
+++ b/mplabx/crypto.h
@@ -0,0 +1,82 @@
+/*
+ * File:   crypto.h
+ * Author: C15009
+ *
+ * Created on July 23, 2013, 12:26 PM
+ */
+
+#ifndef CRYPTO_H
+#define	CRYPTO_H
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+    typedef struct saCtrl {
+        unsigned int CRYPTOALGO : 4;
+        unsigned int MULTITASK : 3;
+        unsigned int KEYSIZE : 2;
+        unsigned int ENCTYPE : 1;
+        unsigned int ALGO : 7;
+        unsigned int : 3;
+        unsigned int FLAGS : 1;
+        unsigned int FB : 1;
+        unsigned int LOADIV : 1;
+        unsigned int LNC : 1;
+        unsigned int IRFLAG : 1;
+        unsigned int ICVONLY : 1;
+        unsigned int OR_EN : 1;
+        unsigned int NO_RX : 1;
+        unsigned int : 1;
+        unsigned int VERIFY : 1;
+        unsigned int : 2;
+    } saCtrl;
+
+    typedef struct securityAssociation {
+        saCtrl SA_CTRL;
+        unsigned int SA_AUTHKEY[8];
+        unsigned int SA_ENCKEY[8];
+        unsigned int SA_AUTHIV[8];
+        unsigned int SA_ENCIV[4];
+    } securityAssociation;
+
+    typedef struct bdCtrl {
+        unsigned int BUFLEN : 16;
+        unsigned int CBD_INT_EN : 1;
+        unsigned int PKT_INT_EN : 1;
+        unsigned int LIFM : 1;
+        unsigned int LAST_BD: 1;
+        unsigned int : 2;
+        unsigned int SA_FETCH_EN : 1;
+        unsigned int : 4;
+        unsigned int CRY_MODE: 3;
+        unsigned int : 1;
+        unsigned int DESC_EN : 1;
+        /* Naveen did this
+        unsigned int CRDMA_EN: 1;
+        unsigned int UPD_RES : 1;
+        unsigned int SA_FETCH_EN : 1;
+        unsigned int SEC_CODE : 1;
+        unsigned int : 7;
+        unsigned int DESC_EN : 1; */
+    } bdCtrl;
+
+    typedef struct bufferDescriptor {
+        bdCtrl BD_CTRL;
+//        unsigned int BD_CTRL;
+        unsigned int SA_ADDR;
+        unsigned int SRCADDR;
+        unsigned int DSTADDR;
+        unsigned int NXTPTR;
+        unsigned int UPDPTR;
+        unsigned int MSGLEN;
+        unsigned int ENCOFF;
+    } bufferDescriptor;
+
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif	/* CRYPTO_H */
+
diff --git a/mplabx/ssl-dummy.c b/mplabx/ssl-dummy.c
new file mode 100644
index 000000000..88110ce98
--- /dev/null
+++ b/mplabx/ssl-dummy.c
@@ -0,0 +1,52 @@
+/* ssl-dummy.c
+ *
+ * Copyright (C) 2006-2013 wolfSSL Inc.
+ *
+ * This file is part of CyaSSL.
+ *
+ * CyaSSL is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * CyaSSL is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+#include 
+
+Signer* GetCA(void* vp, byte* hash) 
+{ 
+    return NULL  ;
+}
+
+int CyaSSL_dtls(CYASSL* ssl)
+{
+    return NULL ;
+}
+
+int CyaSSL_get_using_nonblock(CYASSL* ssl)
+{
+    return NULL ;
+}
+
+Signer* GetCAByName(void* vp, byte* hash)
+{
+    return NULL ;
+}
+
+int CyaSSL_PemCertToDer(const char* fileName, unsigned char* derBuf, int derSz) 
+{
+        return NULL ;
+}
diff --git a/mplabx/test_main.c b/mplabx/test_main.c
index cc9992da3..037315e14 100644
--- a/mplabx/test_main.c
+++ b/mplabx/test_main.c
@@ -19,6 +19,17 @@
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 
+#ifdef HAVE_CONFIG_H
+    #include 
+#endif
+
+#include 
+    #include 
+    #include 
+    #include "PIC32MZ-serial.h"
+    #define  SYSTEMConfigPerformance /* void out SYSTEMConfigPerformance(); */
+#else
+
 #if defined(CYASSL_MICROCHIP_PIC32MZ)
     #define MICROCHIP_PIC32
     #include 
diff --git a/src/ssl.c b/src/ssl.c
index 8bd06a7e7..430afd2ae 100644
--- a/src/ssl.c
+++ b/src/ssl.c
@@ -2252,6 +2252,12 @@ int CyaSSL_CertManagerVerifyBuffer(CYASSL_CERT_MANAGER* cm, const byte* buff,
 
 #ifndef NO_FILESYSTEM
 
+    #if defined(CYASSL_MDK_ARM)
+        extern FILE * CyaSSL_fopen(const char *name, const char *mode) ;
+        #define XFOPEN     CyaSSL_fopen
+    #else
+        #define XFOPEN     fopen
+    #endif
 
 /* process a file with name fname into ctx of format and type
    userChain specifies a user certificate chain to pass during handshake */

From 5a6e2482da696ba32d13f3c426cffe3a03880b84 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 11 Mar 2014 12:00:53 +0900
Subject: [PATCH 38/43] Eliminate unused file.

---
 cyassl/internal.h.orig | 2140 ----------------------------------------
 1 file changed, 2140 deletions(-)
 delete mode 100644 cyassl/internal.h.orig

diff --git a/cyassl/internal.h.orig b/cyassl/internal.h.orig
deleted file mode 100644
index 146019236..000000000
--- a/cyassl/internal.h.orig
+++ /dev/null
@@ -1,2140 +0,0 @@
-/* internal.h
- *
- * Copyright (C) 2006-2013 wolfSSL Inc.
- *
- * This file is part of CyaSSL.
- *
- * CyaSSL is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * CyaSSL is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-
-
-#ifndef CYASSL_INT_H
-#define CYASSL_INT_H
-
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#ifndef NO_RC4
-    #include 
-#endif
-#ifdef HAVE_ECC
-    #include 
-#endif
-#ifndef NO_SHA256
-    #include 
-#endif
-#ifdef HAVE_OCSP
-    #include 
-#endif
-#ifdef CYASSL_SHA512
-    #include 
-#endif
-
-#ifdef HAVE_AESGCM
-    #include 
-#endif
-
-#ifdef CYASSL_RIPEMD
-    #include 
-#endif
-
-#ifdef CYASSL_CALLBACKS
-    #include 
-    #include 
-#endif
-
-#ifdef USE_WINDOWS_API 
-    #ifdef CYASSL_GAME_BUILD
-        #include "system/xtl.h"
-    #else
-        #if defined(_WIN32_WCE) || defined(WIN32_LEAN_AND_MEAN)
-            /* On WinCE winsock2.h must be included before windows.h */
-            #include 
-        #endif
-        #include 
-    #endif
-#elif defined(THREADX)
-    #ifndef SINGLE_THREADED
-        #include "tx_api.h"
-    #endif
-#elif defined(MICRIUM)
-    /* do nothing, just don't pick Unix */
-#elif defined(FREERTOS) || defined(CYASSL_SAFERTOS)
-    /* do nothing */
-#elif defined(EBSNET)
-    /* do nothing */
-#elif defined(FREESCALE_MQX)
-    /* do nothing */
-#elif defined(CYASSL_MDK_ARM)
-    #if defined(CYASSL_MDK5)
-         #include "cmsis_os.h"
-    #else
-        #include 
-    #endif
-#else
-    #ifndef SINGLE_THREADED
-        #define CYASSL_PTHREADS
-        #include 
-    #endif
-    #if defined(OPENSSL_EXTRA) || defined(GOAHEAD_WS)
-        #include       /* for close of BIO */
-    #endif
-#endif
-
-
-#ifdef HAVE_LIBZ
-    #include "zlib.h"
-#endif
-
-#ifdef _MSC_VER
-    /* 4996 warning to use MS extensions e.g., strcpy_s instead of strncpy */
-    #pragma warning(disable: 4996)
-#endif
-
-#ifdef NO_AES
-    #if !defined (ALIGN16)
-        #define ALIGN16
-    #endif
-#endif
-
-#ifdef NO_SHA
-    #define SHA_DIGEST_SIZE 20 
-#endif
-
-#ifdef NO_SHA256
-    #define SHA256_DIGEST_SIZE 32 
-#endif
-
-
-#ifdef __cplusplus
-    extern "C" {
-#endif
-
-
-#ifdef USE_WINDOWS_API 
-    typedef unsigned int SOCKET_T;
-#else
-    typedef int SOCKET_T;
-#endif
-
-
-typedef byte word24[3];
-
-/* used by ssl.c and cyassl_int.c */
-void c32to24(word32 in, word24 out);
-
-/* Define or comment out the cipher suites you'd like to be compiled in
-   make sure to use at least one BUILD_SSL_xxx or BUILD_TLS_xxx is defined
-
-   When adding cipher suites, add name to cipher_names, idx to cipher_name_idx
-*/
-#if !defined(NO_RSA) && !defined(NO_RC4)
-  #if !defined(NO_SHA)
-    #define BUILD_SSL_RSA_WITH_RC4_128_SHA
-  #endif
-    #if !defined(NO_MD5)
-        #define BUILD_SSL_RSA_WITH_RC4_128_MD5
-    #endif
-    #if !defined(NO_TLS) && defined(HAVE_NTRU) && !defined(NO_SHA)
-        #define BUILD_TLS_NTRU_RSA_WITH_RC4_128_SHA
-    #endif
-#endif
-
-#if !defined(NO_RSA) && !defined(NO_DES3)
-  #if !defined(NO_SHA)
-    #define BUILD_SSL_RSA_WITH_3DES_EDE_CBC_SHA
-    #if !defined(NO_TLS) && defined(HAVE_NTRU)
-        #define BUILD_TLS_NTRU_RSA_WITH_3DES_EDE_CBC_SHA
-    #endif
-  #endif
-#endif
-
-#if !defined(NO_RSA) && !defined(NO_AES) && !defined(NO_TLS)
-  #if !defined(NO_SHA)
-    #define BUILD_TLS_RSA_WITH_AES_128_CBC_SHA
-    #define BUILD_TLS_RSA_WITH_AES_256_CBC_SHA
-    #if defined(HAVE_NTRU)
-        #define BUILD_TLS_NTRU_RSA_WITH_AES_128_CBC_SHA
-        #define BUILD_TLS_NTRU_RSA_WITH_AES_256_CBC_SHA
-    #endif
-  #endif
-    #if !defined (NO_SHA256)
-        #define BUILD_TLS_RSA_WITH_AES_128_CBC_SHA256
-        #define BUILD_TLS_RSA_WITH_AES_256_CBC_SHA256
-    #endif
-    #if defined (HAVE_AESGCM)
-        #define BUILD_TLS_RSA_WITH_AES_128_GCM_SHA256
-        #if defined (CYASSL_SHA384)
-            #define BUILD_TLS_RSA_WITH_AES_256_GCM_SHA384
-        #endif
-    #endif
-    #if defined (HAVE_AESCCM)
-        #define BUILD_TLS_RSA_WITH_AES_128_CCM_8
-        #define BUILD_TLS_RSA_WITH_AES_256_CCM_8
-    #endif
-    #if defined(HAVE_BLAKE2)
-        #define BUILD_TLS_RSA_WITH_AES_128_CBC_B2B256
-        #define BUILD_TLS_RSA_WITH_AES_256_CBC_B2B256
-    #endif
-#endif
-
-#if defined(HAVE_CAMELLIA) && !defined(NO_TLS)
-    #ifndef NO_RSA
-      #if !defined(NO_SHA)
-        #define BUILD_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
-        #define BUILD_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
-      #endif
-        #ifndef NO_SHA256
-            #define BUILD_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
-            #define BUILD_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
-        #endif
-        #if !defined(NO_DH) && defined(OPENSSL_EXTRA)
-          #if !defined(NO_SHA)
-            #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
-            #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
-          #endif
-            #ifndef NO_SHA256
-                #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
-                #define BUILD_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
-            #endif
-        #endif
-    #endif
-#endif
-
-#if !defined(NO_PSK) && !defined(NO_AES) && !defined(NO_TLS)
-  #if !defined(NO_SHA)
-    #define BUILD_TLS_PSK_WITH_AES_128_CBC_SHA
-    #define BUILD_TLS_PSK_WITH_AES_256_CBC_SHA
-  #endif
-    #ifndef NO_SHA256
-        #define BUILD_TLS_PSK_WITH_AES_128_CBC_SHA256
-        #ifdef HAVE_AESCCM
-            #define BUILD_TLS_PSK_WITH_AES_128_CCM_8
-            #define BUILD_TLS_PSK_WITH_AES_256_CCM_8
-        #endif
-    #endif
-#endif
-
-#if !defined(NO_TLS) && defined(HAVE_NULL_CIPHER)
-    #if !defined(NO_RSA)
-      #if !defined(NO_SHA)
-        #define BUILD_TLS_RSA_WITH_NULL_SHA
-      #endif
-      #ifndef NO_SHA256
-        #define BUILD_TLS_RSA_WITH_NULL_SHA256
-      #endif
-    #endif
-    #if !defined(NO_PSK)
-      #if !defined(NO_SHA)
-        #define BUILD_TLS_PSK_WITH_NULL_SHA
-      #endif
-        #ifndef NO_SHA256
-            #define BUILD_TLS_PSK_WITH_NULL_SHA256
-        #endif
-    #endif
-#endif
-
-#if !defined(NO_HC128) && !defined(NO_RSA) && !defined(NO_TLS)
-    #define BUILD_TLS_RSA_WITH_HC_128_MD5
-  #if !defined(NO_SHA)
-    #define BUILD_TLS_RSA_WITH_HC_128_SHA
-  #endif
-  #if defined(HAVE_BLAKE2)
-    #define BUILD_TLS_RSA_WITH_HC_128_B2B256
-  #endif
-#endif
-
-#if !defined(NO_RABBIT) && !defined(NO_TLS) && !defined(NO_RSA)
-  #if !defined(NO_SHA)
-    #define BUILD_TLS_RSA_WITH_RABBIT_SHA
-  #endif
-#endif
-
-#if !defined(NO_DH) && !defined(NO_AES) && !defined(NO_TLS) && \
-    !defined(NO_RSA) && defined(OPENSSL_EXTRA)
-  #if !defined(NO_SHA)
-    #define BUILD_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
-    #define BUILD_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
-  #endif
-    #if !defined (NO_SHA256)
-        #define BUILD_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
-        #define BUILD_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
-        #if defined (HAVE_AESGCM)
-            #define BUILD_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
-            #if defined (CYASSL_SHA384)
-                #define BUILD_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
-            #endif
-        #endif
-    #endif
-#endif
-
-#if defined(HAVE_ECC) && !defined(NO_TLS)
-    #if !defined(NO_AES)
-        #if !defined(NO_SHA)
-            #if !defined(NO_RSA)
-                #define BUILD_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
-                #define BUILD_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
-                #define BUILD_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
-                #define BUILD_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
-            #endif
-    
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
-    
-            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
-            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
-        #endif /* NO_SHA */
-        #ifndef NO_SHA256
-            #if !defined(NO_RSA)
-                #define BUILD_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
-                #define BUILD_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
-            #endif
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
-            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
-        #endif
-
-        #ifdef CYASSL_SHA384
-            #if !defined(NO_RSA)
-                #define BUILD_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
-                #define BUILD_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
-            #endif
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
-            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
-        #endif
-
-        #if defined (HAVE_AESGCM)
-            #if !defined(NO_RSA)
-                #define BUILD_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
-                #define BUILD_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
-                #if defined(CYASSL_SHA384)
-                    #define BUILD_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
-                    #define BUILD_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
-                #endif
-            #endif
-
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
-            #define BUILD_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
-            
-            #if defined(CYASS_SHA384)
-                #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
-                #define BUILD_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
-            #endif
-        #endif
-        #if defined (HAVE_AESCCM)
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8
-        #endif
-    #endif /* NO_AES */
-    #if !defined(NO_RC4)
-        #if !defined(NO_SHA)
-            #if !defined(NO_RSA)
-                #define BUILD_TLS_ECDHE_RSA_WITH_RC4_128_SHA
-                #define BUILD_TLS_ECDH_RSA_WITH_RC4_128_SHA
-            #endif
-
-            #define BUILD_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
-            #define BUILD_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
-        #endif
-    #endif
-    #if !defined(NO_DES3)
-        #if !defined(NO_RSA)
-            #define BUILD_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
-            #define BUILD_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
-        #endif
-
-        #define BUILD_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
-        #define BUILD_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
-    #endif
-#endif
-
-
-#if defined(BUILD_SSL_RSA_WITH_RC4_128_SHA) || \
-    defined(BUILD_SSL_RSA_WITH_RC4_128_MD5)
-    #define BUILD_ARC4
-#endif
-
-#if defined(BUILD_SSL_RSA_WITH_3DES_EDE_CBC_SHA)
-    #define BUILD_DES3
-#endif
-
-#if defined(BUILD_TLS_RSA_WITH_AES_128_CBC_SHA) || \
-    defined(BUILD_TLS_RSA_WITH_AES_256_CBC_SHA) || \
-    defined(BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256)
-    #undef  BUILD_AES
-    #define BUILD_AES
-#endif
-
-#if defined(BUILD_TLS_RSA_WITH_AES_128_GCM_SHA256) || \
-    defined(BUILD_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256)
-    #define BUILD_AESGCM
-#endif
-
-#if defined(BUILD_TLS_RSA_WITH_HC_128_SHA) || \
-    defined(BUILD_TLS_RSA_WITH_HC_128_MD5) || \
-    defined(BUILD_TLS_RSA_WITH_HC_128_B2B256)
-    #define BUILD_HC128
-#endif
-
-#if defined(BUILD_TLS_RSA_WITH_RABBIT_SHA)
-    #define BUILD_RABBIT
-#endif
-
-#ifdef NO_DES3
-    #define DES_BLOCK_SIZE 8
-#else
-    #undef  BUILD_DES3
-    #define BUILD_DES3
-#endif
-
-#ifdef NO_AES
-    #define AES_BLOCK_SIZE 16
-#else
-    #undef  BUILD_AES
-    #define BUILD_AES
-#endif
-
-#ifndef NO_RC4
-    #undef  BUILD_ARC4
-    #define BUILD_ARC4
-#endif
-
-
-
-#if defined(BUILD_AESGCM) || defined(HAVE_AESCCM)
-    #define HAVE_AEAD
-#endif
-
-
-/* actual cipher values, 2nd byte */
-enum {
-    TLS_DHE_RSA_WITH_AES_256_CBC_SHA  = 0x39,
-    TLS_DHE_RSA_WITH_AES_128_CBC_SHA  = 0x33,
-    TLS_RSA_WITH_AES_256_CBC_SHA      = 0x35,
-    TLS_RSA_WITH_AES_128_CBC_SHA      = 0x2F,
-    TLS_RSA_WITH_NULL_SHA             = 0x02,
-    TLS_PSK_WITH_AES_256_CBC_SHA      = 0x8d,
-    TLS_PSK_WITH_AES_128_CBC_SHA256   = 0xae,
-    TLS_PSK_WITH_AES_128_CBC_SHA      = 0x8c,
-    TLS_PSK_WITH_NULL_SHA256          = 0xb0,
-    TLS_PSK_WITH_NULL_SHA             = 0x2c,
-    SSL_RSA_WITH_RC4_128_SHA          = 0x05,
-    SSL_RSA_WITH_RC4_128_MD5          = 0x04,
-    SSL_RSA_WITH_3DES_EDE_CBC_SHA     = 0x0A,
-
-    /* ECC suites, first byte is 0xC0 (ECC_BYTE) */
-    TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA    = 0x14,
-    TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA    = 0x13,
-    TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA  = 0x0A,
-    TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA  = 0x09,
-    TLS_ECDHE_RSA_WITH_RC4_128_SHA        = 0x11,
-    TLS_ECDHE_ECDSA_WITH_RC4_128_SHA      = 0x07,
-    TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA   = 0x12,
-    TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA = 0x08,
-    TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256   = 0x27,
-    TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 = 0x23,
-    TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384   = 0x28,
-    TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 = 0x24,
-
-    /* static ECDH, first byte is 0xC0 (ECC_BYTE) */
-    TLS_ECDH_RSA_WITH_AES_256_CBC_SHA    = 0x0F,
-    TLS_ECDH_RSA_WITH_AES_128_CBC_SHA    = 0x0E,
-    TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA  = 0x05,
-    TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA  = 0x04,
-    TLS_ECDH_RSA_WITH_RC4_128_SHA        = 0x0C,
-    TLS_ECDH_ECDSA_WITH_RC4_128_SHA      = 0x02,
-    TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA   = 0x0D,
-    TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA = 0x03,
-    TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256   = 0x29,
-    TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 = 0x25,
-    TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384   = 0x2A,
-    TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 = 0x26,
-
-    /* CyaSSL extension - eSTREAM */
-    TLS_RSA_WITH_HC_128_MD5       = 0xFB,
-    TLS_RSA_WITH_HC_128_SHA       = 0xFC,
-    TLS_RSA_WITH_RABBIT_SHA       = 0xFD,
-
-    /* CyaSSL extension - Blake2b 256 */
-    TLS_RSA_WITH_AES_128_CBC_B2B256   = 0xF8,
-    TLS_RSA_WITH_AES_256_CBC_B2B256   = 0xF9,
-    TLS_RSA_WITH_HC_128_B2B256        = 0xFA,   /* eSTREAM too */
-
-    /* CyaSSL extension - NTRU */
-    TLS_NTRU_RSA_WITH_RC4_128_SHA      = 0xe5,
-    TLS_NTRU_RSA_WITH_3DES_EDE_CBC_SHA = 0xe6,
-    TLS_NTRU_RSA_WITH_AES_128_CBC_SHA  = 0xe7,  /* clases w/ official SHA-256 */
-    TLS_NTRU_RSA_WITH_AES_256_CBC_SHA  = 0xe8,
-
-    /* SHA256 */
-    TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 = 0x6b,
-    TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 = 0x67,
-    TLS_RSA_WITH_AES_256_CBC_SHA256     = 0x3d,
-    TLS_RSA_WITH_AES_128_CBC_SHA256     = 0x3c,
-    TLS_RSA_WITH_NULL_SHA256            = 0x3b,
-
-    /* AES-GCM */
-    TLS_RSA_WITH_AES_128_GCM_SHA256          = 0x9c,
-    TLS_RSA_WITH_AES_256_GCM_SHA384          = 0x9d,
-    TLS_DHE_RSA_WITH_AES_128_GCM_SHA256      = 0x9e,
-    TLS_DHE_RSA_WITH_AES_256_GCM_SHA384      = 0x9f,
-
-    /* ECC AES-GCM, first byte is 0xC0 (ECC_BYTE) */
-    TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256  = 0x2b,
-    TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384  = 0x2c,
-    TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256   = 0x2d,
-    TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384   = 0x2e,
-    TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256    = 0x2f,
-    TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384    = 0x30,
-    TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256     = 0x31,
-    TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384     = 0x32,
-
-    /* AES-CCM, first byte is 0xC0 but isn't ECC,
-     * also, in some of the other AES-CCM suites
-     * there will be second byte number conflicts
-     * with non-ECC AES-GCM */
-    TLS_RSA_WITH_AES_128_CCM_8         = 0xa0,
-    TLS_RSA_WITH_AES_256_CCM_8         = 0xa1,
-    TLS_ECDHE_ECDSA_WITH_AES_128_CCM_8 = 0xc6, /* Still TBD, made up */
-    TLS_ECDHE_ECDSA_WITH_AES_256_CCM_8 = 0xc7, /* Still TBD, made up */
-    TLS_PSK_WITH_AES_128_CCM           = 0xa4,
-    TLS_PSK_WITH_AES_256_CCM           = 0xa5,
-    TLS_PSK_WITH_AES_128_CCM_8         = 0xa8,
-    TLS_PSK_WITH_AES_256_CCM_8         = 0xa9,
-
-    TLS_RSA_WITH_CAMELLIA_128_CBC_SHA        = 0x41,
-    TLS_RSA_WITH_CAMELLIA_256_CBC_SHA        = 0x84,
-    TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256     = 0xba,
-    TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256     = 0xc0,
-    TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA    = 0x45,
-    TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA    = 0x88,
-    TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 = 0xbe,
-    TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 = 0xc4,
-
-    /* Renegotiation Indication Extension Special Suite */
-    TLS_EMPTY_RENEGOTIATION_INFO_SCSV        = 0xff
-};
-
-
-enum Misc {
-    ECC_BYTE =  0xC0,           /* ECC first cipher suite byte */
-
-    SEND_CERT       = 1,
-    SEND_BLANK_CERT = 2,
-
-    DTLS_MAJOR      = 0xfe,     /* DTLS major version number */
-    DTLS_MINOR      = 0xff,     /* DTLS minor version number */
-    DTLSv1_2_MINOR  = 0xfd,     /* DTLS minor version number */
-    SSLv3_MAJOR     = 3,        /* SSLv3 and TLSv1+  major version number */
-    SSLv3_MINOR     = 0,        /* TLSv1   minor version number */
-    TLSv1_MINOR     = 1,        /* TLSv1   minor version number */
-    TLSv1_1_MINOR   = 2,        /* TLSv1_1 minor version number */
-    TLSv1_2_MINOR   = 3,        /* TLSv1_2 minor version number */
-    INVALID_BYTE    = 0xff,     /* Used to initialize cipher specs values */
-    NO_COMPRESSION  =  0,
-    ZLIB_COMPRESSION = 221,     /* CyaSSL zlib compression */
-    HELLO_EXT_SIG_ALGO = 13,    /* ID for the sig_algo hello extension */
-    SECRET_LEN      = 48,       /* pre RSA and all master */
-    ENCRYPT_LEN     = 512,      /* allow 4096 bit static buffer */
-    SIZEOF_SENDER   =  4,       /* clnt or srvr           */
-    FINISHED_SZ     = 36,       /* MD5_DIGEST_SIZE + SHA_DIGEST_SIZE */
-    MAX_RECORD_SIZE = 16384,    /* 2^14, max size by standard */
-    MAX_MSG_EXTRA   = 38 + MAX_DIGEST_SIZE,
-                                /* max added to msg, mac + pad  from */
-                                /* RECORD_HEADER_SZ + BLOCK_SZ (pad) + Max
-                                   digest sz + BLOC_SZ (iv) + pad byte (1) */
-    MAX_COMP_EXTRA  = 1024,     /* max compression extra */
-    MAX_MTU         = 1500,     /* max expected MTU */
-    MAX_UDP_SIZE    = 8192 - 100, /* was MAX_MTU - 100 */
-    MAX_DH_SZ       = 612,      /* 2240 p, pub, g + 2 byte size for each */
-    MAX_STR_VERSION = 8,        /* string rep of protocol version */
-
-    PAD_MD5        = 48,       /* pad length for finished */
-    PAD_SHA        = 40,       /* pad length for finished */
-    MAX_PAD_SIZE   = 256,      /* maximum length of padding */
-    COMPRESS_DUMMY_SIZE = 64,  /* compression dummy round size */
-    COMPRESS_CONSTANT   = 13,  /* compression calc constant */
-    COMPRESS_UPPER      = 55,  /* compression calc numerator */
-    COMPRESS_LOWER      = 64,  /* compression calc denominator */
-
-    PEM_LINE_LEN   = 80,       /* PEM line max + fudge */
-    LENGTH_SZ      =  2,       /* length field for HMAC, data only */
-    VERSION_SZ     =  2,       /* length of proctocol version */
-    SEQ_SZ         =  8,       /* 64 bit sequence number  */
-    BYTE3_LEN      =  3,       /* up to 24 bit byte lengths */
-    ALERT_SIZE     =  2,       /* level + description     */
-    REQUEST_HEADER =  2,       /* always use 2 bytes      */
-    VERIFY_HEADER  =  2,       /* always use 2 bytes      */
-    EXT_ID_SZ      =  2,       /* always use 2 bytes      */
-    MAX_DH_SIZE    = 513,      /* 4096 bit plus possible leading 0 */
-
-    MAX_SUITE_SZ = 200,        /* 100 suites for now! */
-    RAN_LEN      = 32,         /* random length           */
-    SEED_LEN     = RAN_LEN * 2, /* tls prf seed length    */
-    ID_LEN       = 32,         /* session id length       */
-    MAX_COOKIE_LEN = 32,       /* max dtls cookie size    */
-    COOKIE_SZ    = 20,         /* use a 20 byte cookie    */
-    SUITE_LEN    =  2,         /* cipher suite sz length  */
-    ENUM_LEN     =  1,         /* always a byte           */
-    OPAQUE8_LEN  =  1,         /* 1 byte                  */
-    OPAQUE16_LEN =  2,         /* 2 bytes                 */
-    OPAQUE24_LEN =  3,         /* 3 bytes                 */
-    COMP_LEN     =  1,         /* compression length      */
-    CURVE_LEN    =  2,         /* ecc named curve length  */
-    SERVER_ID_LEN = 20,        /* server session id length  */
-    
-    HANDSHAKE_HEADER_SZ   = 4,  /* type + length(3)        */
-    RECORD_HEADER_SZ      = 5,  /* type + version + len(2) */
-    CERT_HEADER_SZ        = 3,  /* always 3 bytes          */
-    REQ_HEADER_SZ         = 2,  /* cert request header sz  */
-    HINT_LEN_SZ           = 2,  /* length of hint size field */
-    TRUNCATED_HMAC_SZ     = 10, /* length of hmac w/ truncated hmac extension */
-    HELLO_EXT_TYPE_SZ     = 2,  /* length of a hello extension type */
-    HELLO_EXT_SZ          = 8,  /* total length of the lazy hello extensions */
-    HELLO_EXT_LEN         = 6,  /* length of the lazy hello extensions */
-    HELLO_EXT_SIGALGO_SZ  = 2,  /* length of signature algo extension  */
-    HELLO_EXT_SIGALGO_MAX = 32, /* number of items in the signature algo list */
-
-    DTLS_HANDSHAKE_HEADER_SZ = 12, /* normal + seq(2) + offset(3) + length(3) */
-    DTLS_RECORD_HEADER_SZ    = 13, /* normal + epoch(2) + seq_num(6) */
-    DTLS_HANDSHAKE_EXTRA     = 8,  /* diff from normal */
-    DTLS_RECORD_EXTRA        = 8,  /* diff from normal */
-    DTLS_HANDSHAKE_SEQ_SZ    = 2,  /* handshake header sequence number */
-    DTLS_HANDSHAKE_FRAG_SZ   = 3,  /* fragment offset and length are 24 bit */
-    DTLS_POOL_SZ             = 5,  /* buffers to hold in the retry pool */
-
-    FINISHED_LABEL_SZ   = 15,  /* TLS finished label size */
-    TLS_FINISHED_SZ     = 12,  /* TLS has a shorter size  */
-    MASTER_LABEL_SZ     = 13,  /* TLS master secret label sz */
-    KEY_LABEL_SZ        = 13,  /* TLS key block expansion sz */
-    MAX_PRF_HALF        = 128, /* Maximum half secret len */
-    MAX_PRF_LABSEED     = 128, /* Maximum label + seed len */
-    MAX_PRF_DIG         = 224, /* Maximum digest len      */
-    MAX_REQUEST_SZ      = 256, /* Maximum cert req len (no auth yet */
-    SESSION_FLUSH_COUNT = 256, /* Flush session cache unless user turns off */ 
-
-    RC4_KEY_SIZE        = 16,  /* always 128bit           */
-    DES_KEY_SIZE        =  8,  /* des                     */
-    DES3_KEY_SIZE       = 24,  /* 3 des ede               */
-    DES_IV_SIZE         = DES_BLOCK_SIZE,
-    AES_256_KEY_SIZE    = 32,  /* for 256 bit             */
-    AES_192_KEY_SIZE    = 24,  /* for 192 bit             */
-    AES_IV_SIZE         = 16,  /* always block size       */
-    AES_128_KEY_SIZE    = 16,  /* for 128 bit             */
-
-    AEAD_SEQ_OFFSET     = 4,        /* Auth Data: Sequence number */
-    AEAD_TYPE_OFFSET    = 8,        /* Auth Data: Type            */
-    AEAD_VMAJ_OFFSET    = 9,        /* Auth Data: Major Version   */
-    AEAD_VMIN_OFFSET    = 10,       /* Auth Data: Minor Version   */
-    AEAD_LEN_OFFSET     = 11,       /* Auth Data: Length          */
-    AEAD_AUTH_DATA_SZ   = 13,       /* Size of the data to authenticate */
-    AEAD_IMP_IV_SZ      = 4,        /* Size of the implicit IV     */
-    AEAD_EXP_IV_SZ      = 8,        /* Size of the explicit IV     */
-    AEAD_NONCE_SZ       = AEAD_EXP_IV_SZ + AEAD_IMP_IV_SZ,
-
-    AES_GCM_AUTH_SZ     = 16, /* AES-GCM Auth Tag length    */
-    AES_CCM_16_AUTH_SZ  = 16, /* AES-CCM-16 Auth Tag length */
-    AES_CCM_8_AUTH_SZ   = 8,  /* AES-CCM-8 Auth Tag Length  */
-
-    CAMELLIA_128_KEY_SIZE = 16, /* for 128 bit */
-    CAMELLIA_192_KEY_SIZE = 24, /* for 192 bit */
-    CAMELLIA_256_KEY_SIZE = 32, /* for 256 bit */
-    CAMELLIA_IV_SIZE      = 16, /* always block size */
-
-    HC_128_KEY_SIZE     = 16,  /* 128 bits                */
-    HC_128_IV_SIZE      = 16,  /* also 128 bits           */
-
-    RABBIT_KEY_SIZE     = 16,  /* 128 bits                */
-    RABBIT_IV_SIZE      =  8,  /* 64 bits for iv          */
-
-    EVP_SALT_SIZE       =  8,  /* evp salt size 64 bits   */
-
-    ECDHE_SIZE          = 32,  /* ECHDE server size defaults to 256 bit */
-    MAX_EXPORT_ECC_SZ   = 256, /* Export ANS X9.62 max future size */
-
-    MAX_HELLO_SZ       = 128,  /* max client or server hello */
-    MAX_CERT_VERIFY_SZ = 1024, /* max   */
-    CLIENT_HELLO_FIRST =  35,  /* Protocol + RAN_LEN + sizeof(id_len) */
-    MAX_SUITE_NAME     =  48,  /* maximum length of cipher suite string */
-    DEFAULT_TIMEOUT    = 500,  /* default resumption timeout in seconds */
-
-    DTLS_TIMEOUT_INIT       =  1, /* default timeout init for DTLS receive  */
-    DTLS_TIMEOUT_MAX        = 64, /* default max timeout for DTLS receive */
-    DTLS_TIMEOUT_MULTIPLIER =  2, /* default timeout multiplier for DTLS recv */
-
-    MAX_PSK_ID_LEN     = 128,  /* max psk identity/hint supported */
-    MAX_PSK_KEY_LEN    =  64,  /* max psk key supported */
-
-    MAX_CYASSL_FILE_SIZE = 1024 * 1024 * 4,  /* 4 mb file size alloc limit */
-
-#ifdef FORTRESS
-    MAX_EX_DATA        =   3,  /* allow for three items of ex_data */
-#endif
-
-    MAX_X509_SIZE      = 2048, /* max static x509 buffer size */
-    CERT_MIN_SIZE      =  256, /* min PEM cert size with header/footer */
-    MAX_FILENAME_SZ    =  256, /* max file name length */
-    FILE_BUFFER_SIZE   = 1024, /* default static file buffer size for input,
-                                  will use dynamic buffer if not big enough */
-
-    MAX_NTRU_PUB_KEY_SZ = 1027, /* NTRU max for now */
-    MAX_NTRU_ENCRYPT_SZ = 1027, /* NTRU max for now */
-    MAX_NTRU_BITS       =  256, /* max symmetric bit strength */
-    NO_SNIFF           =   0,  /* not sniffing */
-    SNIFF              =   1,  /* currently sniffing */
-
-    HASH_SIG_SIZE      =   2,  /* default SHA1 RSA */
-
-    NO_CAVIUM_DEVICE   =  -2,  /* invalid cavium device id */
-
-    NO_COPY            =   0,  /* should we copy static buffer for write */
-    COPY               =   1   /* should we copy static buffer for write */
-};
-
-
-#ifdef SESSION_INDEX
-/* Shift values for making a session index */
-#define SESSIDX_ROW_SHIFT 4
-#define SESSIDX_IDX_MASK  0x0F
-#endif
-
-
-/* max cert chain peer depth */
-#ifndef MAX_CHAIN_DEPTH
-    #define MAX_CHAIN_DEPTH 9
-#endif
-
-
-/* don't use extra 3/4k stack space unless need to */
-#ifdef HAVE_NTRU
-    #define MAX_ENCRYPT_SZ MAX_NTRU_ENCRYPT_SZ
-#else
-    #define MAX_ENCRYPT_SZ ENCRYPT_LEN
-#endif
-
-
-/* states */
-enum states {
-    NULL_STATE = 0,
-
-    SERVER_HELLOVERIFYREQUEST_COMPLETE,
-    SERVER_HELLO_COMPLETE,
-    SERVER_CERT_COMPLETE,
-    SERVER_KEYEXCHANGE_COMPLETE,
-    SERVER_HELLODONE_COMPLETE,
-    SERVER_FINISHED_COMPLETE,
-
-    CLIENT_HELLO_COMPLETE,
-    CLIENT_KEYEXCHANGE_COMPLETE,
-    CLIENT_FINISHED_COMPLETE,
-
-    HANDSHAKE_DONE
-};
-
-
-#if defined(__GNUC__)
-    #define CYASSL_PACK __attribute__ ((packed))
-#else
-    #define CYASSL_PACK
-#endif
-
-/* SSL Version */
-typedef struct ProtocolVersion {
-    byte major;
-    byte minor;
-} CYASSL_PACK ProtocolVersion;
-
-
-CYASSL_LOCAL ProtocolVersion MakeSSLv3(void);
-CYASSL_LOCAL ProtocolVersion MakeTLSv1(void);
-CYASSL_LOCAL ProtocolVersion MakeTLSv1_1(void);
-CYASSL_LOCAL ProtocolVersion MakeTLSv1_2(void);
-
-#ifdef CYASSL_DTLS
-    CYASSL_LOCAL ProtocolVersion MakeDTLSv1(void);
-    CYASSL_LOCAL ProtocolVersion MakeDTLSv1_2(void);
-#endif
-
-
-enum BIO_TYPE {
-    BIO_BUFFER = 1,
-    BIO_SOCKET = 2,
-    BIO_SSL    = 3,
-    BIO_MEMORY = 4
-};
-
-
-/* CyaSSL BIO_METHOD type */
-struct CYASSL_BIO_METHOD {
-    byte type;               /* method type */
-};
-
-
-/* CyaSSL BIO type */
-struct CYASSL_BIO {
-    byte        type;          /* method type */
-    byte        close;         /* close flag */
-    byte        eof;           /* eof flag */
-    CYASSL*     ssl;           /* possible associated ssl */
-    byte*       mem;           /* memory buffer */
-    int         memLen;        /* memory buffer length */
-    int         fd;            /* possible file descriptor */
-    CYASSL_BIO* prev;          /* previous in chain */
-    CYASSL_BIO* next;          /* next in chain */
-};
-
-
-/* CyaSSL method type */
-struct CYASSL_METHOD {
-    ProtocolVersion version;
-    byte            side;         /* connection side, server or client */
-    byte            downgrade;    /* whether to downgrade version, default no */
-};
-
-
-/* defautls to client */
-CYASSL_LOCAL void InitSSL_Method(CYASSL_METHOD*, ProtocolVersion);
-
-/* for sniffer */
-CYASSL_LOCAL int DoFinished(CYASSL* ssl, const byte* input, word32* inOutIdx,
-                            int sniff);
-CYASSL_LOCAL int DoApplicationData(CYASSL* ssl, byte* input, word32* inOutIdx);
-
-
-/* CyaSSL buffer type */
-typedef struct buffer {
-    word32 length;
-    byte*  buffer;
-} buffer;
-
-
-enum {
-    FORCED_FREE = 1,
-    NO_FORCED_FREE = 0
-};
-
-
-/* only use compression extra if using compression */
-#ifdef HAVE_LIBZ
-    #define COMP_EXTRA MAX_COMP_EXTRA
-#else
-    #define COMP_EXTRA 0
-#endif
-
-/* only the sniffer needs space in the buffer for extra MTU record(s) */
-#ifdef CYASSL_SNIFFER
-    #define MTU_EXTRA MAX_MTU * 3 
-#else
-    #define MTU_EXTRA 0
-#endif
-
-
-/* embedded callbacks require large static buffers, make sure on */
-#ifdef CYASSL_CALLBACKS
-    #undef  LARGE_STATIC_BUFFERS
-    #define LARGE_STATIC_BUFFERS
-#endif
-
-
-/* give user option to use 16K static buffers */
-#if defined(LARGE_STATIC_BUFFERS)
-    #define RECORD_SIZE MAX_RECORD_SIZE
-#else
-    #ifdef CYASSL_DTLS
-        #define RECORD_SIZE MAX_MTU 
-    #else
-        #define RECORD_SIZE 128 
-    #endif
-#endif
-
-
-/* user option to turn off 16K output option */
-/* if using small static buffers (default) and SSL_write tries to write data
-   larger than the record we have, dynamically get it, unless user says only
-   write in static buffer chuncks  */
-#ifndef STATIC_CHUNKS_ONLY
-    #define OUTPUT_RECORD_SIZE MAX_RECORD_SIZE
-#else
-    #define OUTPUT_RECORD_SIZE RECORD_SIZE
-#endif
-
-/* CyaSSL input buffer
-
-   RFC 2246:
-
-   length
-       The length (in bytes) of the following TLSPlaintext.fragment.
-       The length should not exceed 2^14.
-*/
-#if defined(LARGE_STATIC_BUFFERS)
-    #define STATIC_BUFFER_LEN RECORD_HEADER_SZ + RECORD_SIZE + COMP_EXTRA + \
-             MTU_EXTRA + MAX_MSG_EXTRA
-#else
-    /* zero length arrays may not be supported */
-    #define STATIC_BUFFER_LEN 1
-#endif
-
-typedef struct {
-    word32 length;       /* total buffer length used */
-    word32 idx;          /* idx to part of length already consumed */
-    byte*  buffer;       /* place holder for static or dynamic buffer */
-    word32 bufferSize;   /* current buffer size */
-    ALIGN16 byte staticBuffer[STATIC_BUFFER_LEN];
-    byte   dynamicFlag;  /* dynamic memory currently in use */
-    byte   offset;       /* alignment offset attempt */
-} bufferStatic;
-
-/* Cipher Suites holder */
-typedef struct Suites {
-    int    setSuites;               /* user set suites from default */
-    byte   suites[MAX_SUITE_SZ];  
-    word16 suiteSz;                 /* suite length in bytes        */
-    byte   hashSigAlgo[HELLO_EXT_SIGALGO_MAX]; /* sig/algo to offer */
-    word16 hashSigAlgoSz;           /* SigAlgo extension length in bytes */
-    byte   hashAlgo;                /* selected hash algorithm */
-    byte   sigAlgo;                 /* selected sig algorithm */
-} Suites;
-
-
-CYASSL_LOCAL
-void InitSuites(Suites*, ProtocolVersion,
-                                     byte, byte, byte, byte, byte, byte, int);
-CYASSL_LOCAL
-int  SetCipherList(Suites*, const char* list);
-
-#ifndef PSK_TYPES_DEFINED
-    typedef unsigned int (*psk_client_callback)(CYASSL*, const char*, char*,
-                          unsigned int, unsigned char*, unsigned int);
-    typedef unsigned int (*psk_server_callback)(CYASSL*, const char*,
-                          unsigned char*, unsigned int);
-#endif /* PSK_TYPES_DEFINED */
-
-
-#ifndef CYASSL_USER_IO
-    /* default IO callbacks */
-    CYASSL_LOCAL
-    int EmbedReceive(CYASSL *ssl, char *buf, int sz, void *ctx);
-    CYASSL_LOCAL 
-    int EmbedSend(CYASSL *ssl, char *buf, int sz, void *ctx);
-
-    #ifdef HAVE_OCSP
-        CYASSL_LOCAL
-        int EmbedOcspLookup(void*, const char*, int, byte*, int, byte**);
-        CYASSL_LOCAL
-        void EmbedOcspRespFree(void*, byte*);
-    #endif
-
-    #ifdef CYASSL_DTLS
-        CYASSL_LOCAL
-        int EmbedReceiveFrom(CYASSL *ssl, char *buf, int sz, void *ctx);
-        CYASSL_LOCAL 
-        int EmbedSendTo(CYASSL *ssl, char *buf, int sz, void *ctx);
-        CYASSL_LOCAL
-        int EmbedGenerateCookie(CYASSL* ssl, byte *buf, int sz, void *ctx);
-        CYASSL_LOCAL
-        int IsUDP(void*);
-    #endif /* CYASSL_DTLS */
-#endif /* CYASSL_USER_IO */
-
-#ifdef HAVE_NETX
-    CYASSL_LOCAL int NetX_Receive(CYASSL *ssl, char *buf, int sz, void *ctx);
-    CYASSL_LOCAL int NetX_Send(CYASSL *ssl, char *buf, int sz, void *ctx);
-#endif /* HAVE_NETX */
-
-
-/* CyaSSL Cipher type just points back to SSL */
-struct CYASSL_CIPHER {
-    CYASSL* ssl;
-};
-
-
-typedef struct OCSP_Entry OCSP_Entry;
-
-#ifdef SHA_DIGEST_SIZE
-    #define OCSP_DIGEST_SIZE SHA_DIGEST_SIZE
-#else
-    #define OCSP_DIGEST_SIZE 160
-#endif
-
-#ifdef NO_ASN 
-    /* no_asn won't have */
-    typedef struct CertStatus CertStatus;
-#endif
-
-struct OCSP_Entry {
-    OCSP_Entry* next;                        /* next entry             */
-    byte    issuerHash[OCSP_DIGEST_SIZE];    /* issuer hash            */ 
-    byte    issuerKeyHash[OCSP_DIGEST_SIZE]; /* issuer public key hash */
-    CertStatus* status;                      /* OCSP response list     */
-    int         totalStatus;                 /* number on list         */
-};
-
-
-#ifndef HAVE_OCSP
-    typedef struct CYASSL_OCSP CYASSL_OCSP;
-#endif
-
-/* CyaSSL OCSP controller */
-struct CYASSL_OCSP {
-    CYASSL_CERT_MANAGER* cm;            /* pointer back to cert manager */
-    OCSP_Entry*          ocspList;      /* OCSP response list */
-    CyaSSL_Mutex         ocspLock;      /* OCSP list lock */
-};
-
-#ifndef MAX_DATE_SIZE
-#define MAX_DATE_SIZE 32
-#endif
-
-typedef struct CRL_Entry CRL_Entry;
-
-#ifdef SHA_DIGEST_SIZE
-    #define CRL_DIGEST_SIZE SHA_DIGEST_SIZE
-#else
-    #define CRL_DIGEST_SIZE 160
-#endif
-
-#ifdef NO_ASN 
-    typedef struct RevokedCert RevokedCert;
-#endif
-
-/* Complete CRL */
-struct CRL_Entry {
-    CRL_Entry* next;                      /* next entry */
-    byte    issuerHash[CRL_DIGEST_SIZE];  /* issuer hash                 */ 
-    /* byte    crlHash[CRL_DIGEST_SIZE];      raw crl data hash           */ 
-    /* restore the hash here if needed for optimized comparisons */
-    byte    lastDate[MAX_DATE_SIZE]; /* last date updated  */
-    byte    nextDate[MAX_DATE_SIZE]; /* next update date   */
-    byte    lastDateFormat;          /* last date format */
-    byte    nextDateFormat;          /* next date format */
-    RevokedCert* certs;              /* revoked cert list  */
-    int          totalCerts;         /* number on list     */
-};
-
-
-typedef struct CRL_Monitor CRL_Monitor;
-
-/* CRL directory monitor */
-struct CRL_Monitor {
-    char* path;      /* full dir path, if valid pointer we're using */
-    int   type;      /* PEM or ASN1 type */
-};
-
-
-#ifndef HAVE_CRL
-    typedef struct CYASSL_CRL CYASSL_CRL;
-#endif
-
-/* CyaSSL CRL controller */
-struct CYASSL_CRL {
-    CYASSL_CERT_MANAGER* cm;            /* pointer back to cert manager */
-    CRL_Entry*           crlList;       /* our CRL list */
-    CyaSSL_Mutex         crlLock;       /* CRL list lock */
-    CRL_Monitor          monitors[2];   /* PEM and DER possible */
-#ifdef HAVE_CRL_MONITOR
-    pthread_t            tid;           /* monitoring thread */
-#endif
-};
-
-
-#ifdef NO_ASN 
-    typedef struct Signer Signer;
-#endif
-
-
-#ifndef CA_TABLE_SIZE
-    #define CA_TABLE_SIZE 11
-#endif
-
-/* CyaSSL Certificate Manager */
-struct CYASSL_CERT_MANAGER {
-    Signer*         caTable[CA_TABLE_SIZE]; /* the CA signer table */
-    CyaSSL_Mutex    caLock;             /* CA list lock */
-    CallbackCACache caCacheCallback;    /* CA cache addition callback */
-    void*           heap;               /* heap helper */
-    CYASSL_CRL*     crl;                /* CRL checker */
-    byte            crlEnabled;         /* is CRL on ? */
-    byte            crlCheckAll;        /* always leaf, but all ? */
-    CbMissingCRL    cbMissingCRL;       /* notify through cb of missing crl */
-    CYASSL_OCSP*    ocsp;               /* OCSP checker */
-    byte            ocspEnabled;        /* is OCSP on ? */
-    byte            ocspSendNonce;      /* send the OCSP nonce ? */
-    byte            ocspUseOverrideURL; /* ignore cert's responder, override */
-    char*           ocspOverrideURL;    /* use this responder */
-    void*           ocspIOCtx;          /* I/O callback CTX */
-    CbOCSPIO        ocspIOCb;           /* I/O callback for OCSP lookup */
-    CbOCSPRespFree  ocspRespFreeCb;     /* Frees OCSP Response from IO Cb */
-};
-
-CYASSL_LOCAL int CM_SaveCertCache(CYASSL_CERT_MANAGER*, const char*);
-CYASSL_LOCAL int CM_RestoreCertCache(CYASSL_CERT_MANAGER*, const char*);
-CYASSL_LOCAL int CM_MemSaveCertCache(CYASSL_CERT_MANAGER*, void*, int, int*);
-CYASSL_LOCAL int CM_MemRestoreCertCache(CYASSL_CERT_MANAGER*, const void*, int);
-CYASSL_LOCAL int CM_GetCertCacheMemSize(CYASSL_CERT_MANAGER*);
-
-/* CyaSSL Sock Addr */
-struct CYASSL_SOCKADDR {
-    unsigned int sz; /* sockaddr size */
-    void*        sa; /* pointer to the sockaddr_in or sockaddr_in6 */
-};
-
-typedef struct CYASSL_DTLS_CTX {
-    CYASSL_SOCKADDR peer;
-    int fd;
-} CYASSL_DTLS_CTX;
-
-/* RFC 6066 TLS Extensions */
-#ifdef HAVE_TLS_EXTENSIONS
-
-typedef enum {
-    SERVER_NAME_INDICATION =  0,
-    MAX_FRAGMENT_LENGTH    =  1,
-    TRUNCATED_HMAC         =  4,
-    ELLIPTIC_CURVES        = 10
-} TLSX_Type;
-
-typedef struct TLSX {
-    TLSX_Type    type; /* Extension Type  */
-    void*        data; /* Extension Data  */
-    byte         resp; /* IsResponse Flag */
-    struct TLSX* next; /* List Behavior   */
-} TLSX;
-
-CYASSL_LOCAL TLSX* TLSX_Find(TLSX* list, TLSX_Type type);
-CYASSL_LOCAL void TLSX_FreeAll(TLSX* list);
-
-#ifndef NO_CYASSL_CLIENT
-CYASSL_LOCAL word16 TLSX_GetRequestSize(CYASSL* ssl);
-CYASSL_LOCAL word16 TLSX_WriteRequest(CYASSL* ssl, byte* output);
-#endif
-
-#ifndef NO_CYASSL_SERVER
-CYASSL_LOCAL word16 TLSX_GetResponseSize(CYASSL* ssl);
-CYASSL_LOCAL word16 TLSX_WriteResponse(CYASSL* ssl, byte* output);
-#endif
-
-CYASSL_LOCAL int    TLSX_Parse(CYASSL* ssl, byte* input, word16 length,
-                                                byte isRequest, Suites *suites);
-
-/* Server Name Indication */
-#ifdef HAVE_SNI
-
-typedef struct SNI {
-    byte                       type;    /* SNI Type          */
-    union { char* host_name; } data;    /* SNI Data          */
-    struct SNI*                next;    /* List Behavior     */
-#ifndef NO_CYASSL_SERVER
-    byte                       options; /* Behaviour options */
-    byte                       status;  /* Matching result   */
-#endif
-} SNI;
-
-CYASSL_LOCAL int TLSX_UseSNI(TLSX** extensions, byte type, const void* data,
-                                                                   word16 size);
-
-#ifndef NO_CYASSL_SERVER
-CYASSL_LOCAL void   TLSX_SNI_SetOptions(TLSX* extensions, byte type,
-                                                                  byte options);
-CYASSL_LOCAL byte   TLSX_SNI_Status(TLSX* extensions, byte type);
-CYASSL_LOCAL word16 TLSX_SNI_GetRequest(TLSX* extensions, byte type,
-                                                                   void** data);
-CYASSL_LOCAL int    TLSX_SNI_GetFromBuffer(const byte* buffer, word32 bufferSz,
-                                         byte type, byte* sni, word32* inOutSz);
-#endif
-
-#endif /* HAVE_SNI */
-
-/* Maximum Fragment Length */
-#ifdef HAVE_MAX_FRAGMENT
-
-CYASSL_LOCAL int TLSX_UseMaxFragment(TLSX** extensions, byte mfl);
-
-#endif /* HAVE_MAX_FRAGMENT */
-
-#ifdef HAVE_TRUNCATED_HMAC
-
-CYASSL_LOCAL int TLSX_UseTruncatedHMAC(TLSX** extensions);
-
-#endif /* HAVE_TRUNCATED_HMAC */
-
-#ifdef HAVE_SUPPORTED_CURVES
-
-typedef struct EllipticCurve {
-    word16                name; /* CurveNames    */
-    struct EllipticCurve* next; /* List Behavior */
-
-} EllipticCurve;
-
-CYASSL_LOCAL int TLSX_UseSupportedCurve(TLSX** extensions, word16 name);
-
-#ifndef NO_CYASSL_SERVER
-CYASSL_LOCAL int TLSX_ValidateEllipticCurves(CYASSL* ssl, byte first,
-                                                                   byte second);
-#endif
-
-#endif /* HAVE_SUPPORTED_CURVES */
-
-#endif /* HAVE_TLS_EXTENSIONS */
-
-/* CyaSSL context type */
-struct CYASSL_CTX {
-    CYASSL_METHOD* method;
-    CyaSSL_Mutex   countMutex;    /* reference count mutex */
-    int         refCount;         /* reference count */
-#ifndef NO_CERTS
-    buffer      certificate;
-    buffer      certChain;
-                 /* chain after self, in DER, with leading size for each cert */
-    buffer      privateKey;
-    buffer      serverDH_P;
-    buffer      serverDH_G;
-    CYASSL_CERT_MANAGER* cm;      /* our cert manager, ctx owns SSL will use */
-#endif
-    Suites      suites;
-    void*       heap;             /* for user memory overrides */
-    byte        verifyPeer;
-    byte        verifyNone;
-    byte        failNoCert;
-    byte        sessionCacheOff;
-    byte        sessionCacheFlushOff;
-    byte        sendVerify;       /* for client side */
-    byte        haveRSA;          /* RSA available */
-    byte        haveDH;           /* server DH parms set by user */
-    byte        haveNTRU;         /* server private NTRU  key loaded */
-    byte        haveECDSAsig;     /* server cert signed w/ ECDSA */
-    byte        haveStaticECC;    /* static server ECC private key */
-    byte        partialWrite;     /* only one msg per write call */
-    byte        quietShutdown;    /* don't send close notify */
-    byte        groupMessages;    /* group handshake messages before sending */
-    CallbackIORecv CBIORecv;
-    CallbackIOSend CBIOSend;
-#ifdef CYASSL_DTLS
-    CallbackGenCookie CBIOCookie;       /* gen cookie callback */
-#endif
-    VerifyCallback  verifyCallback;     /* cert verification callback */
-    word32          timeout;            /* session timeout */
-#ifdef HAVE_ECC
-    word16          eccTempKeySz;       /* in octets 20 - 66 */
-    word32          pkCurveOID;         /* curve Ecc_Sum */
-#endif
-#ifndef NO_PSK
-    byte        havePSK;                /* psk key set by user */
-    psk_client_callback client_psk_cb;  /* client callback */
-    psk_server_callback server_psk_cb;  /* server callback */
-    char        server_hint[MAX_PSK_ID_LEN];
-#endif /* NO_PSK */
-#if defined(OPENSSL_EXTRA) || defined(HAVE_WEBSERVER)
-    pem_password_cb passwd_cb;
-    void*            userdata;
-#endif /* OPENSSL_EXTRA */
-#ifdef HAVE_OCSP
-    CYASSL_OCSP      ocsp;
-#endif
-#ifdef HAVE_CAVIUM
-    int              devId;            /* cavium device id to use */
-#endif
-#ifdef HAVE_TLS_EXTENSIONS
-    TLSX* extensions;                  /* RFC 6066 TLS Extensions data */
-#endif
-#ifdef ATOMIC_USER
-    CallbackMacEncrypt    MacEncryptCb;    /* Atomic User Mac/Encrypt Cb */
-    CallbackDecryptVerify DecryptVerifyCb; /* Atomic User Decrypt/Verify Cb */
-#endif
-#ifdef HAVE_PK_CALLBACKS
-    #ifdef HAVE_ECC
-        CallbackEccSign   EccSignCb;    /* User EccSign   Callback handler */
-        CallbackEccVerify EccVerifyCb;  /* User EccVerify Callback handler */
-    #endif /* HAVE_ECC */
-    #ifndef NO_RSA 
-        CallbackRsaSign   RsaSignCb;    /* User RsaSign   Callback handler */
-        CallbackRsaVerify RsaVerifyCb;  /* User RsaVerify Callback handler */
-        CallbackRsaEnc    RsaEncCb;     /* User Rsa Public Encrypt  handler */
-        CallbackRsaDec    RsaDecCb;     /* User Rsa Private Decrypt handler */
-    #endif /* NO_RSA */
-#endif /* HAVE_PK_CALLBACKS */
-};
-
-
-CYASSL_LOCAL
-int InitSSL_Ctx(CYASSL_CTX*, CYASSL_METHOD*);
-CYASSL_LOCAL
-void FreeSSL_Ctx(CYASSL_CTX*);
-CYASSL_LOCAL
-void SSL_CtxResourceFree(CYASSL_CTX*);
-
-CYASSL_LOCAL
-int DeriveTlsKeys(CYASSL* ssl);
-CYASSL_LOCAL
-int ProcessOldClientHello(CYASSL* ssl, const byte* input, word32* inOutIdx,
-                          word32 inSz, word16 sz);
-#ifndef NO_CERTS
-    CYASSL_LOCAL
-    int AddCA(CYASSL_CERT_MANAGER* ctx, buffer der, int type, int verify);
-    CYASSL_LOCAL
-    int AlreadySigner(CYASSL_CERT_MANAGER* cm, byte* hash);
-#endif
-
-/* All cipher suite related info */
-typedef struct CipherSpecs {
-    byte bulk_cipher_algorithm;
-    byte cipher_type;               /* block, stream, or aead */
-    byte mac_algorithm;
-    byte kea;                       /* key exchange algo */
-    byte sig_algo;
-    byte hash_size;
-    byte pad_size;
-    byte static_ecdh;
-    word16 key_size;
-    word16 iv_size;
-    word16 block_size;
-    word16 aead_mac_size;
-} CipherSpecs;
-
-
-void InitCipherSpecs(CipherSpecs* cs);
-
-
-/* Supported Message Authentication Codes from page 43 */
-enum MACAlgorithm { 
-    no_mac,
-    md5_mac,
-    sha_mac,
-    sha224_mac,
-    sha256_mac,
-    sha384_mac,
-    sha512_mac,
-    rmd_mac,
-    blake2b_mac
-};
-
-
-/* Supported Key Exchange Protocols */
-enum KeyExchangeAlgorithm { 
-    no_kea,
-    rsa_kea, 
-    diffie_hellman_kea, 
-    fortezza_kea,
-    psk_kea,
-    ntru_kea,
-    ecc_diffie_hellman_kea,
-    ecc_static_diffie_hellman_kea       /* for verify suite only */
-};
-
-
-/* Supported Authentication Schemes */
-enum SignatureAlgorithm {
-    anonymous_sa_algo,
-    rsa_sa_algo,
-    dsa_sa_algo,
-    ecc_dsa_sa_algo
-};
-
-
-/* Supprted ECC Curve Types */
-enum EccCurves {
-    named_curve = 3
-};
-
-
-/* Supprted ECC Named Curves */
-enum EccNamedCurves {
-    secp256r1 = 0x17,         /* default, OpenSSL also calls it prime256v1 */
-    secp384r1 = 0x18,
-    secp521r1 = 0x19,
-
-    secp160r1 = 0x10,
-    secp192r1 = 0x13,        /*           Openssl also call it prime192v1 */
-    secp224r1 = 0x15
-};
-
-
-/* Valid client certificate request types from page 27 */
-enum ClientCertificateType {    
-    rsa_sign            = 1, 
-    dss_sign            = 2,
-    rsa_fixed_dh        = 3,
-    dss_fixed_dh        = 4,
-    rsa_ephemeral_dh    = 5,
-    dss_ephemeral_dh    = 6,
-    fortezza_kea_cert   = 20
-};
-
-
-enum CipherType { stream, block, aead };
-
-
-#ifdef CYASSL_DTLS
-
-    #ifdef WORD64_AVAILABLE
-        typedef word64 DtlsSeq;
-    #else
-        typedef word32 DtlsSeq;
-    #endif
-    #define DTLS_SEQ_BITS (sizeof(DtlsSeq) * CHAR_BIT)
-
-    typedef struct DtlsState {
-        DtlsSeq window;     /* Sliding window for current epoch    */
-        word16 nextEpoch;   /* Expected epoch in next record       */
-        word32 nextSeq;     /* Expected sequence in next record    */
-
-        word16 curEpoch;    /* Received epoch in current record    */
-        word32 curSeq;      /* Received sequence in current record */
-
-        DtlsSeq prevWindow; /* Sliding window for old epoch        */
-        word32 prevSeq;     /* Next sequence in allowed old epoch  */
-    } DtlsState;
-
-#endif /* CYASSL_DTLS */
-
-
-/* keys and secrets */
-typedef struct Keys {
-    byte client_write_MAC_secret[MAX_DIGEST_SIZE];   /* max sizes */
-    byte server_write_MAC_secret[MAX_DIGEST_SIZE]; 
-    byte client_write_key[AES_256_KEY_SIZE];         /* max sizes */
-    byte server_write_key[AES_256_KEY_SIZE]; 
-    byte client_write_IV[AES_IV_SIZE];               /* max sizes */
-    byte server_write_IV[AES_IV_SIZE];
-#ifdef HAVE_AEAD
-    byte aead_exp_IV[AEAD_EXP_IV_SZ];
-    byte aead_enc_imp_IV[AEAD_IMP_IV_SZ];
-    byte aead_dec_imp_IV[AEAD_IMP_IV_SZ];
-#endif
-
-    word32 peer_sequence_number;
-    word32 sequence_number;
-    
-#ifdef CYASSL_DTLS
-    DtlsState dtls_state;                       /* Peer's state */
-    word16 dtls_peer_handshake_number;
-    word16 dtls_expected_peer_handshake_number;
-
-    word16 dtls_epoch;                          /* Current tx epoch    */
-    word32 dtls_sequence_number;                /* Current tx sequence */
-    word16 dtls_handshake_number;               /* Current tx handshake seq */
-#endif
-
-    word32 encryptSz;             /* last size of encrypted data   */
-    word32 padSz;                 /* how much to advance after decrypt part */
-    byte   encryptionOn;          /* true after change cipher spec */
-    byte   decryptedCur;          /* only decrypt current record once */
-} Keys;
-
-
-/* cipher for now */
-typedef struct Ciphers {
-#ifdef BUILD_ARC4
-    Arc4*   arc4;
-#endif
-#ifdef BUILD_DES3
-    Des3*   des3;
-#endif
-#if defined(BUILD_AES) || defined(BUILD_AESGCM)
-    Aes*    aes;
-#endif
-#ifdef HAVE_CAMELLIA
-    Camellia* cam;
-#endif
-#ifdef HAVE_HC128
-    HC128*  hc128;
-#endif
-#ifdef BUILD_RABBIT
-    Rabbit* rabbit;
-#endif
-    byte    setup;       /* have we set it up flag for detection */
-} Ciphers;
-
-
-CYASSL_LOCAL void InitCiphers(CYASSL* ssl);
-CYASSL_LOCAL void FreeCiphers(CYASSL* ssl);
-
-
-/* hashes type */
-typedef struct Hashes {
-    #ifndef NO_OLD_TLS
-        byte md5[MD5_DIGEST_SIZE];
-    #endif
-    byte sha[SHA_DIGEST_SIZE];
-    #ifndef NO_SHA256
-        byte sha256[SHA256_DIGEST_SIZE];
-    #endif
-    #ifdef CYASSL_SHA384
-        byte sha384[SHA384_DIGEST_SIZE];
-    #endif
-} Hashes;
-
-
-/* Static x509 buffer */
-typedef struct x509_buffer {
-    int  length;                  /* actual size */
-    byte buffer[MAX_X509_SIZE];   /* max static cert size */
-} x509_buffer;
-
-
-/* CyaSSL X509_CHAIN, for no dynamic memory SESSION_CACHE */
-struct CYASSL_X509_CHAIN {
-    int         count;                    /* total number in chain */
-    x509_buffer certs[MAX_CHAIN_DEPTH];   /* only allow max depth 4 for now */
-};
-
-
-/* CyaSSL session type */
-struct CYASSL_SESSION {
-    byte         sessionID[ID_LEN];             /* id for protocol */
-    byte         masterSecret[SECRET_LEN];      /* stored secret */
-    word32       bornOn;                        /* create time in seconds   */
-    word32       timeout;                       /* timeout in seconds       */
-#ifdef SESSION_CERTS
-    CYASSL_X509_CHAIN chain;                    /* peer cert chain, static  */
-    ProtocolVersion version;                    /* which version was used */
-    byte            cipherSuite0;               /* first byte, normally 0 */
-    byte            cipherSuite;                /* 2nd byte, actual suite */
-#endif
-#ifndef NO_CLIENT_CACHE
-    byte         serverID[SERVER_ID_LEN];       /* for easier client lookup */
-    word16       idLen;                         /* serverID length */
-#endif
-};
-
-
-CYASSL_LOCAL
-CYASSL_SESSION* GetSession(CYASSL*, byte*);
-CYASSL_LOCAL
-int          SetSession(CYASSL*, CYASSL_SESSION*);
-
-typedef void (*hmacfp) (CYASSL*, byte*, const byte*, word32, int, int);
-
-#ifndef NO_CLIENT_CACHE
-    CYASSL_SESSION* GetSessionClient(CYASSL*, const byte*, int);
-#endif
-
-/* client connect state for nonblocking restart */
-enum ConnectState {
-    CONNECT_BEGIN = 0,
-    CLIENT_HELLO_SENT,
-    HELLO_AGAIN,               /* HELLO_AGAIN s for DTLS case */
-    HELLO_AGAIN_REPLY,
-    FIRST_REPLY_DONE,
-    FIRST_REPLY_FIRST,
-    FIRST_REPLY_SECOND,
-    FIRST_REPLY_THIRD,
-    FIRST_REPLY_FOURTH,
-    FINISHED_DONE,
-    SECOND_REPLY_DONE
-};
-
-
-/* server accept state for nonblocking restart */
-enum AcceptState {
-    ACCEPT_BEGIN = 0,
-    ACCEPT_CLIENT_HELLO_DONE,
-    HELLO_VERIFY_SENT,
-    ACCEPT_FIRST_REPLY_DONE,
-    SERVER_HELLO_SENT,
-    CERT_SENT,
-    KEY_EXCHANGE_SENT,
-    CERT_REQ_SENT,
-    SERVER_HELLO_DONE,
-    ACCEPT_SECOND_REPLY_DONE,
-    CHANGE_CIPHER_SENT,
-    ACCEPT_FINISHED_DONE,
-    ACCEPT_THIRD_REPLY_DONE
-};
-
-
-typedef struct Buffers {
-#ifndef NO_CERTS
-    buffer          certificate;            /* CYASSL_CTX owns, unless we own */
-    buffer          key;                    /* CYASSL_CTX owns, unless we own */
-    buffer          certChain;              /* CYASSL_CTX owns */
-                 /* chain after self, in DER, with leading size for each cert */
-    buffer          serverDH_P;             /* CYASSL_CTX owns, unless we own */
-    buffer          serverDH_G;             /* CYASSL_CTX owns, unless we own */
-    buffer          serverDH_Pub;
-    buffer          serverDH_Priv;
-#endif
-    buffer          domainName;             /* for client check */
-    bufferStatic    inputBuffer;
-    bufferStatic    outputBuffer;
-    buffer          clearOutputBuffer;
-    int             prevSent;              /* previous plain text bytes sent
-                                              when got WANT_WRITE            */
-    int             plainSz;               /* plain text bytes in buffer to send
-                                              when got WANT_WRITE            */
-    byte            weOwnCert;             /* SSL own cert flag */
-    byte            weOwnKey;              /* SSL own key  flag */
-    byte            weOwnDH;               /* SSL own dh (p,g)  flag */
-#ifdef CYASSL_DTLS
-    CYASSL_DTLS_CTX dtlsCtx;               /* DTLS connection context */
-#endif
-#ifdef HAVE_PK_CALLBACKS
-    #ifdef HAVE_ECC
-        buffer peerEccDsaKey;              /* we own for Ecc Verify Callbacks */
-    #endif /* HAVE_ECC */
-    #ifndef NO_RSA
-        buffer peerRsaKey;                 /* we own for Rsa Verify Callbacks */
-    #endif /* NO_RSA */
-#endif /* HAVE_PK_CALLBACKS */
-} Buffers;
-
-typedef struct Options {
-    byte            sessionCacheOff;
-    byte            sessionCacheFlushOff;
-    byte            cipherSuite0;           /* first byte, normally 0 */
-    byte            cipherSuite;            /* second byte, actual suite */
-    byte            serverState;
-    byte            clientState;
-    byte            handShakeState;
-    byte            side;               /* client or server end */
-    byte            verifyPeer;
-    byte            verifyNone;
-    byte            failNoCert;
-    byte            downgrade;          /* allow downgrade of versions */
-    byte            sendVerify;         /* false = 0, true = 1, sendBlank = 2 */
-    byte            resuming;
-    byte            haveSessionId;      /* server may not send */
-    byte            tls;                /* using TLS ? */
-    byte            tls1_1;             /* using TLSv1.1+ ? */
-    byte            dtls;               /* using datagrams ? */
-    byte            connReset;          /* has the peer reset */
-    byte            isClosed;           /* if we consider conn closed */
-    byte            closeNotify;        /* we've recieved a close notify */
-    byte            sentNotify;         /* we've sent a close notify */
-    byte            connectState;       /* nonblocking resume */
-    byte            acceptState;        /* nonblocking resume */
-    byte            usingCompression;   /* are we using compression */
-    byte            haveRSA;            /* RSA available */
-    byte            haveDH;             /* server DH parms set by user */
-    byte            haveNTRU;           /* server NTRU  private key loaded */
-    byte            haveECDSAsig;       /* server ECDSA signed cert */
-    byte            haveStaticECC;      /* static server ECC private key */
-    byte            havePeerCert;       /* do we have peer's cert */
-    byte            havePeerVerify;     /* and peer's cert verify */
-    byte            usingPSK_cipher;    /* whether we're using psk as cipher */
-    byte            sendAlertState;     /* nonblocking resume */ 
-    byte            processReply;       /* nonblocking resume */
-    byte            partialWrite;       /* only one msg per write call */
-    byte            quietShutdown;      /* don't send close notify */
-    byte            certOnly;           /* stop once we get cert */
-    byte            groupMessages;      /* group handshake messages */
-    byte            usingNonblock;      /* set when using nonblocking socket */
-    byte            saveArrays;         /* save array Memory for user get keys
-                                           or psk */
-#ifndef NO_PSK
-    byte            havePSK;            /* psk key set by user */
-    psk_client_callback client_psk_cb;
-    psk_server_callback server_psk_cb;
-#endif /* NO_PSK */
-} Options;
-
-typedef struct Arrays {
-    byte            clientRandom[RAN_LEN];
-    byte            serverRandom[RAN_LEN];
-    byte            sessionID[ID_LEN];
-    byte            preMasterSecret[ENCRYPT_LEN];
-    byte            masterSecret[SECRET_LEN];
-#ifdef CYASSL_DTLS
-    byte            cookie[MAX_COOKIE_LEN];
-    byte            cookieSz;
-#endif
-#ifndef NO_PSK
-    char            client_identity[MAX_PSK_ID_LEN];
-    char            server_hint[MAX_PSK_ID_LEN];
-    byte            psk_key[MAX_PSK_KEY_LEN];
-    word32          psk_keySz;          /* acutal size */
-#endif
-    word32          preMasterSz;        /* differs for DH, actual size */
-} Arrays;
-
-#ifndef ASN_NAME_MAX
-#define ASN_NAME_MAX 256
-#endif
-
-#ifndef MAX_DATE_SZ
-#define MAX_DATE_SZ 32
-#endif
-
-struct CYASSL_X509_NAME {
-    char  *name;
-    char  staticName[ASN_NAME_MAX];
-    int   dynamicName;
-    int   sz;
-#ifdef OPENSSL_EXTRA
-    DecodedName fullName;
-#endif /* OPENSSL_EXTRA */
-};
-
-#ifndef EXTERNAL_SERIAL_SIZE
-    #define EXTERNAL_SERIAL_SIZE 32
-#endif
-
-#ifdef NO_ASN 
-    typedef struct DNS_entry DNS_entry;
-#endif
-
-struct CYASSL_X509 {
-    int              version;
-    CYASSL_X509_NAME issuer;
-    CYASSL_X509_NAME subject;
-    int              serialSz;
-    byte             serial[EXTERNAL_SERIAL_SIZE];
-    char             subjectCN[ASN_NAME_MAX];        /* common name short cut */
-#ifdef CYASSL_SEP
-    int              deviceTypeSz;
-    byte             deviceType[EXTERNAL_SERIAL_SIZE];
-    int              hwTypeSz;
-    byte             hwType[EXTERNAL_SERIAL_SIZE];
-    int              hwSerialNumSz;
-    byte             hwSerialNum[EXTERNAL_SERIAL_SIZE];
-    #ifdef OPENSSL_EXTRA
-        byte             certPolicySet;
-        byte             certPolicyCrit;
-    #endif /* OPENSSL_EXTRA */
-#endif
-    int              notBeforeSz;
-    byte             notBefore[MAX_DATE_SZ];
-    int              notAfterSz;
-    byte             notAfter[MAX_DATE_SZ];
-    int              sigOID;
-    buffer           sig;
-    int              pubKeyOID;
-    buffer           pubKey;
-    #ifdef HAVE_ECC
-        word32       pkCurveOID;
-    #endif /* HAVE_ECC */
-    buffer           derCert;                        /* may need  */
-    DNS_entry*       altNames;                       /* alt names list */
-    DNS_entry*       altNamesNext;                   /* hint for retrieval */
-    byte             dynamicMemory;                  /* dynamic memory flag */
-    byte             isCa;
-#ifdef OPENSSL_EXTRA
-    word32           pathLength;
-    word16           keyUsage;
-    byte             basicConstSet;
-    byte             basicConstCrit;
-    byte             basicConstPlSet;
-    byte             subjAltNameSet;
-    byte             subjAltNameCrit;
-    byte             authKeyIdSet;
-    byte             authKeyIdCrit;
-    byte*            authKeyId;
-    word32           authKeyIdSz;
-    byte             subjKeyIdSet;
-    byte             subjKeyIdCrit;
-    byte*            subjKeyId;
-    word32           subjKeyIdSz;
-    byte             keyUsageSet;
-    byte             keyUsageCrit;
-#endif /* OPENSSL_EXTRA */
-};
-
-
-/* record layer header for PlainText, Compressed, and CipherText */
-typedef struct RecordLayerHeader {
-    byte            type;
-    byte            pvMajor;
-    byte            pvMinor;
-    byte            length[2];
-} RecordLayerHeader;
-
-
-/* record layer header for DTLS PlainText, Compressed, and CipherText */
-typedef struct DtlsRecordLayerHeader {
-    byte            type;
-    byte            pvMajor;
-    byte            pvMinor;
-    byte            epoch[2];             /* increment on cipher state change */
-    byte            sequence_number[6];   /* per record */
-    byte            length[2];
-} DtlsRecordLayerHeader;
-
-
-typedef struct DtlsPool {
-    buffer          buf[DTLS_POOL_SZ];
-    int             used;
-} DtlsPool;
-
-typedef struct DtlsMsg {
-    struct DtlsMsg* next;
-    word32          seq;       /* Handshake sequence number    */
-    word32          sz;        /* Length of whole mesage       */
-    word32          fragSz;    /* Length of fragments received */
-    byte            type;
-    byte*           buf;
-    byte*           msg;
-} DtlsMsg;
-
-
-#ifdef HAVE_NETX
-
-    /* NETX I/O Callback default */
-    typedef struct NetX_Ctx {
-        NX_TCP_SOCKET* nxSocket;    /* send/recv socket handle */
-        NX_PACKET*     nxPacket;    /* incoming packet handle for short reads */
-        ULONG          nxOffset;    /* offset already read from nxPacket */
-        ULONG          nxWait;      /* wait option flag */
-    } NetX_Ctx;
-
-#endif
-
-
-/* CyaSSL ssl type */
-struct CYASSL {
-    CYASSL_CTX*     ctx;
-    int             error;
-    ProtocolVersion version;            /* negotiated version */
-    ProtocolVersion chVersion;          /* client hello version */
-    Suites*         suites;             /* only need during handshake */
-    Ciphers         encrypt;
-    Ciphers         decrypt;
-    CipherSpecs     specs;
-    Keys            keys;
-    int             rfd;                /* read  file descriptor */
-    int             wfd;                /* write file descriptor */
-    int             rflags;             /* user read  flags */
-    int             wflags;             /* user write flags */
-    CYASSL_BIO*     biord;              /* socket bio read  to free/close */
-    CYASSL_BIO*     biowr;              /* socket bio write to free/close */
-    void*           IOCB_ReadCtx;
-    void*           IOCB_WriteCtx;
-    RNG*            rng;
-#ifndef NO_OLD_TLS
-#ifndef NO_SHA
-    Sha             hashSha;            /* sha hash of handshake msgs */
-#endif
-#ifndef NO_MD5
-    Md5             hashMd5;            /* md5 hash of handshake msgs */
-#endif
-#endif
-#ifndef NO_SHA256
-    Sha256          hashSha256;         /* sha256 hash of handshake msgs */
-#endif
-#ifdef CYASSL_SHA384
-    Sha384          hashSha384;         /* sha384 hash of handshake msgs */
-#endif
-    Hashes          verifyHashes;
-    Hashes          certHashes;         /* for cert verify */
-    Buffers         buffers;
-    Options         options;
-    Arrays*         arrays;
-    CYASSL_SESSION  session;
-    VerifyCallback  verifyCallback;      /* cert verification callback */
-    void*           verifyCbCtx;         /* cert verify callback user ctx*/
-#ifndef NO_RSA
-    RsaKey*         peerRsaKey;
-    byte            peerRsaKeyPresent;
-#endif
-#ifdef HAVE_NTRU
-    word16          peerNtruKeyLen;
-    byte            peerNtruKey[MAX_NTRU_PUB_KEY_SZ];
-    byte            peerNtruKeyPresent;
-#endif
-#ifdef HAVE_ECC
-    ecc_key*        peerEccKey;              /* peer's  ECDHE key */
-    ecc_key*        peerEccDsaKey;           /* peer's  ECDSA key */
-    ecc_key*        eccTempKey;              /* private ECDHE key */
-    ecc_key*        eccDsaKey;               /* private ECDSA key */
-    word16          eccTempKeySz;            /* in octets 20 - 66 */
-    word32          pkCurveOID;              /* curve Ecc_Sum     */
-    byte            peerEccKeyPresent;
-    byte            peerEccDsaKeyPresent;
-    byte            eccTempKeyPresent;
-    byte            eccDsaKeyPresent;
-#endif
-    hmacfp          hmac;
-    void*           heap;               /* for user overrides */
-    RecordLayerHeader curRL;
-    word16            curSize;
-    word32          timeout;            /* session timeout */
-    CYASSL_CIPHER   cipher;
-#ifdef HAVE_LIBZ
-    z_stream        c_stream;           /* compression   stream */
-    z_stream        d_stream;           /* decompression stream */
-    byte            didStreamInit;      /* for stream init and end */
-#endif
-#ifdef CYASSL_DTLS
-    int             dtls_timeout_init;  /* starting timeout vaule */
-    int             dtls_timeout_max;   /* maximum timeout value */
-    int             dtls_timeout;       /* current timeout value, changes */
-    DtlsPool*       dtls_pool;
-    DtlsMsg*        dtls_msg_list;
-    void*           IOCB_CookieCtx;     /* gen cookie ctx */
-    word32          dtls_expected_rx;
-#endif
-#ifdef CYASSL_CALLBACKS
-    HandShakeInfo   handShakeInfo;      /* info saved during handshake */
-    TimeoutInfo     timeoutInfo;        /* info saved during handshake */
-    byte            hsInfoOn;           /* track handshake info        */
-    byte            toInfoOn;           /* track timeout   info        */
-#endif
-#ifdef KEEP_PEER_CERT
-    CYASSL_X509     peerCert;           /* X509 peer cert */
-#endif
-#ifdef FORTRESS
-    void*           ex_data[MAX_EX_DATA]; /* external data, for Fortress */
-#endif
-#ifdef HAVE_CAVIUM
-    int              devId;            /* cavium device id to use */
-#endif
-#ifdef HAVE_TLS_EXTENSIONS
-    TLSX* extensions;                  /* RFC 6066 TLS Extensions data */
-#ifdef HAVE_MAX_FRAGMENT
-    word16 max_fragment;
-#endif
-#ifdef HAVE_TRUNCATED_HMAC
-    byte truncated_hmac;
-#endif
-#endif
-#ifdef HAVE_NETX
-    NetX_Ctx        nxCtx;             /* NetX IO Context */
-#endif
-#ifdef SESSION_INDEX
-    int sessionIndex;                  /* Session's location in the cache. */
-#endif
-    CYASSL_ALERT_HISTORY alert_history;
-#ifdef ATOMIC_USER
-    void*    MacEncryptCtx;    /* Atomic User Mac/Encrypt Callback Context */
-    void*    DecryptVerifyCtx; /* Atomic User Decrypt/Verify Callback Context */
-#endif
-#ifdef HAVE_PK_CALLBACKS
-    #ifdef HAVE_ECC
-        void* EccSignCtx;     /* Ecc Sign   Callback Context */
-        void* EccVerifyCtx;   /* Ecc Verify Callback Context */
-    #endif /* HAVE_ECC */
-    #ifndef NO_RSA 
-        void* RsaSignCtx;     /* Rsa Sign   Callback Context */
-        void* RsaVerifyCtx;   /* Rsa Verify Callback Context */
-        void* RsaEncCtx;      /* Rsa Public  Encrypt   Callback Context */
-        void* RsaDecCtx;      /* Rsa Private Decrypt   Callback Context */
-    #endif /* NO_RSA */
-#endif /* HAVE_PK_CALLBACKS */
-};
-
-
-CYASSL_LOCAL
-int  InitSSL(CYASSL*, CYASSL_CTX*);
-CYASSL_LOCAL
-void FreeSSL(CYASSL*);
-CYASSL_API void SSL_ResourceFree(CYASSL*);   /* Micrium uses */
-
-
-enum {
-    IV_SZ   = 32,          /* max iv sz */
-    NAME_SZ = 80          /* max one line */
-};
-
-
-typedef struct EncryptedInfo {
-    char     name[NAME_SZ];    /* encryption name */
-    byte     iv[IV_SZ];        /* encrypted IV */
-    word32   ivSz;             /* encrypted IV size */
-    long     consumed;         /* tracks PEM bytes consumed */
-    byte     set;              /* if encryption set */
-    CYASSL_CTX* ctx;              /* CTX owner */
-} EncryptedInfo;
-
-
-#ifndef NO_CERTS
-    CYASSL_LOCAL int PemToDer(const unsigned char* buff, long sz, int type,
-                              buffer* der, void* heap, EncryptedInfo* info,
-                              int* eccKey);
-
-    CYASSL_LOCAL int ProcessFile(CYASSL_CTX* ctx, const char* fname, int format,
-                                 int type, CYASSL* ssl, int userChain,
-                                CYASSL_CRL* crl);
-#endif
-
-
-#ifdef CYASSL_CALLBACKS
-    CYASSL_LOCAL
-    void InitHandShakeInfo(HandShakeInfo*);
-    CYASSL_LOCAL 
-    void FinishHandShakeInfo(HandShakeInfo*, const CYASSL*);
-    CYASSL_LOCAL 
-    void AddPacketName(const char*, HandShakeInfo*);
-
-    CYASSL_LOCAL
-    void InitTimeoutInfo(TimeoutInfo*);
-    CYASSL_LOCAL 
-    void FreeTimeoutInfo(TimeoutInfo*, void*);
-    CYASSL_LOCAL 
-    void AddPacketInfo(const char*, TimeoutInfo*, const byte*, int, void*);
-    CYASSL_LOCAL 
-    void AddLateName(const char*, TimeoutInfo*);
-    CYASSL_LOCAL 
-    void AddLateRecordHeader(const RecordLayerHeader* rl, TimeoutInfo* info);
-#endif
-
-
-/* Record Layer Header identifier from page 12 */
-enum ContentType {
-    no_type            = 0,
-    change_cipher_spec = 20, 
-    alert              = 21, 
-    handshake          = 22, 
-    application_data   = 23 
-};
-
-
-/* handshake header, same for each message type, pgs 20/21 */
-typedef struct HandShakeHeader {
-    byte            type;
-    word24          length;
-} HandShakeHeader;
-
-
-/* DTLS handshake header, same for each message type */
-typedef struct DtlsHandShakeHeader {
-    byte            type;
-    word24          length;
-    byte            message_seq[2];    /* start at 0, restransmit gets same # */
-    word24          fragment_offset;   /* bytes in previous fragments */
-    word24          fragment_length;   /* length of this fragment */
-} DtlsHandShakeHeader;
-
-
-enum HandShakeType {
-    no_shake            = -1,
-    hello_request       = 0, 
-    client_hello        = 1, 
-    server_hello        = 2,
-    hello_verify_request = 3,       /* DTLS addition */
-    session_ticket      =  4,
-    certificate         = 11, 
-    server_key_exchange = 12,
-    certificate_request = 13, 
-    server_hello_done   = 14,
-    certificate_verify  = 15, 
-    client_key_exchange = 16,
-    finished            = 20
-};
-
-
-static const byte client[SIZEOF_SENDER] = { 0x43, 0x4C, 0x4E, 0x54 };
-static const byte server[SIZEOF_SENDER] = { 0x53, 0x52, 0x56, 0x52 };
-
-static const byte tls_client[FINISHED_LABEL_SZ + 1] = "client finished";
-static const byte tls_server[FINISHED_LABEL_SZ + 1] = "server finished";
-
-
-/* internal functions */
-CYASSL_LOCAL int SendChangeCipher(CYASSL*);
-CYASSL_LOCAL int SendData(CYASSL*, const void*, int);
-CYASSL_LOCAL int SendCertificate(CYASSL*);
-CYASSL_LOCAL int SendCertificateRequest(CYASSL*);
-CYASSL_LOCAL int SendServerKeyExchange(CYASSL*);
-CYASSL_LOCAL int SendBuffered(CYASSL*);
-CYASSL_LOCAL int ReceiveData(CYASSL*, byte*, int, int);
-CYASSL_LOCAL int SendFinished(CYASSL*);
-CYASSL_LOCAL int SendAlert(CYASSL*, int, int);
-CYASSL_LOCAL int ProcessReply(CYASSL*);
-
-CYASSL_LOCAL int SetCipherSpecs(CYASSL*);
-CYASSL_LOCAL int MakeMasterSecret(CYASSL*);
-
-CYASSL_LOCAL int  AddSession(CYASSL*);
-CYASSL_LOCAL int  DeriveKeys(CYASSL* ssl);
-CYASSL_LOCAL int  StoreKeys(CYASSL* ssl, const byte* keyData);
-
-CYASSL_LOCAL int IsTLS(const CYASSL* ssl);
-CYASSL_LOCAL int IsAtLeastTLSv1_2(const CYASSL* ssl);
-
-CYASSL_LOCAL void FreeHandshakeResources(CYASSL* ssl);
-CYASSL_LOCAL void ShrinkInputBuffer(CYASSL* ssl, int forcedFree);
-CYASSL_LOCAL void ShrinkOutputBuffer(CYASSL* ssl);
-#ifndef NO_CERTS
-    CYASSL_LOCAL Signer* GetCA(void* cm, byte* hash);
-    #ifndef NO_SKID
-        CYASSL_LOCAL Signer* GetCAByName(void* cm, byte* hash);
-    #endif
-#endif
-CYASSL_LOCAL void BuildTlsFinished(CYASSL* ssl, Hashes* hashes,
-                                   const byte* sender);
-CYASSL_LOCAL void FreeArrays(CYASSL* ssl, int keep);
-CYASSL_LOCAL  int CheckAvailableSize(CYASSL *ssl, int size);
-CYASSL_LOCAL  int GrowInputBuffer(CYASSL* ssl, int size, int usedLength);
-
-#ifndef NO_TLS
-    CYASSL_LOCAL int  MakeTlsMasterSecret(CYASSL*);
-    CYASSL_LOCAL void TLS_hmac(CYASSL* ssl, byte* digest, const byte* in,
-                               word32 sz, int content, int verify);
-#endif
-
-#ifndef NO_CYASSL_CLIENT
-    CYASSL_LOCAL int SendClientHello(CYASSL*);
-    CYASSL_LOCAL int SendClientKeyExchange(CYASSL*);
-    CYASSL_LOCAL int SendCertificateVerify(CYASSL*);
-#endif /* NO_CYASSL_CLIENT */
-
-#ifndef NO_CYASSL_SERVER
-    CYASSL_LOCAL int SendServerHello(CYASSL*);
-    CYASSL_LOCAL int SendServerHelloDone(CYASSL*);
-    #ifdef CYASSL_DTLS
-        CYASSL_LOCAL int SendHelloVerifyRequest(CYASSL*);
-    #endif
-#endif /* NO_CYASSL_SERVER */
-
-#ifdef CYASSL_DTLS
-    CYASSL_LOCAL int  DtlsPoolInit(CYASSL*);
-    CYASSL_LOCAL int  DtlsPoolSave(CYASSL*, const byte*, int);
-    CYASSL_LOCAL int  DtlsPoolTimeout(CYASSL*);
-    CYASSL_LOCAL int  DtlsPoolSend(CYASSL*);
-    CYASSL_LOCAL void DtlsPoolReset(CYASSL*);
-
-    CYASSL_LOCAL DtlsMsg* DtlsMsgNew(word32, void*);
-    CYASSL_LOCAL void DtlsMsgDelete(DtlsMsg*, void*);
-    CYASSL_LOCAL void DtlsMsgListDelete(DtlsMsg*, void*);
-    CYASSL_LOCAL void DtlsMsgSet(DtlsMsg*, word32, const byte*, byte,
-                                                             word32, word32);
-    CYASSL_LOCAL DtlsMsg* DtlsMsgFind(DtlsMsg*, word32);
-    CYASSL_LOCAL DtlsMsg* DtlsMsgStore(DtlsMsg*, word32, const byte*, word32,
-                                                byte, word32, word32, void*);
-    CYASSL_LOCAL DtlsMsg* DtlsMsgInsert(DtlsMsg*, DtlsMsg*);
-#endif /* CYASSL_DTLS */
-
-#ifndef NO_TLS
-    
-
-#endif /* NO_TLS */
-
-
-CYASSL_LOCAL word32  LowResTimer(void);
-
-CYASSL_LOCAL void InitX509Name(CYASSL_X509_NAME*, int);
-CYASSL_LOCAL void FreeX509Name(CYASSL_X509_NAME* name);
-CYASSL_LOCAL void InitX509(CYASSL_X509*, int);
-CYASSL_LOCAL void FreeX509(CYASSL_X509*);
-#ifndef NO_CERTS
-    CYASSL_LOCAL int  CopyDecodedToX509(CYASSL_X509*, DecodedCert*);
-#endif
-
-
-#ifdef __cplusplus
-    }  /* extern "C" */
-#endif
-
-#endif /* CyaSSL_INT_H */
-

From 5dbe391d929ed0747a1974b4c9057a1ad7dde594 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 11 Mar 2014 13:43:24 +0900
Subject: [PATCH 39/43] sha256.c, mplabx/test_main.c

---
 ctaocrypt/src/sha256.c | 6 +++---
 mplabx/test_main.c     | 5 -----
 2 files changed, 3 insertions(+), 8 deletions(-)

diff --git a/ctaocrypt/src/sha256.c b/ctaocrypt/src/sha256.c
index d859774e7..d42d137fc 100644
--- a/ctaocrypt/src/sha256.c
+++ b/ctaocrypt/src/sha256.c
@@ -221,11 +221,11 @@ void Sha256Final(Sha256* sha256, byte* hash)
 
     #ifdef FREESCALE_MMCAU
         /* Kinetis requires only these bytes reversed */
-        ByteReverseBytes(&local[SHA256_PAD_SIZE], &local[SHA256_PAD_SIZE],
-                2 * sizeof(word32));
+        ByteReverseWords(&sha256->buffer[SHA256_PAD_SIZE/sizeof(word32)],
+                         &sha256->buffer[SHA256_PAD_SIZE/sizeof(word32)],
+                         2 * sizeof(word32));
     #endif
 
-    XTRANSFORM(sha256, local);
     XTRANSFORM(sha256, local);
     #ifdef LITTLE_ENDIAN_ORDER
         ByteReverseWords(sha256->digest, sha256->digest, SHA256_DIGEST_SIZE);
diff --git a/mplabx/test_main.c b/mplabx/test_main.c
index 037315e14..ee1fa95a5 100644
--- a/mplabx/test_main.c
+++ b/mplabx/test_main.c
@@ -24,11 +24,6 @@
 #endif
 
 #include 
-    #include 
-    #include 
-    #include "PIC32MZ-serial.h"
-    #define  SYSTEMConfigPerformance /* void out SYSTEMConfigPerformance(); */
-#else
 
 #if defined(CYASSL_MICROCHIP_PIC32MZ)
     #define MICROCHIP_PIC32

From e02fa2c571526b348f73cc6c9ce5b6378df02487 Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 11 Mar 2014 13:53:37 +0900
Subject: [PATCH 40/43] random.c, indentation

---
 ctaocrypt/src/random.c | 27 +++++++++++++--------------
 1 file changed, 13 insertions(+), 14 deletions(-)

diff --git a/ctaocrypt/src/random.c b/ctaocrypt/src/random.c
index bf1c9f097..74cf2d6ce 100644
--- a/ctaocrypt/src/random.c
+++ b/ctaocrypt/src/random.c
@@ -506,22 +506,21 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
             } while(size) ;
             return 0;
         }
-#else  /* CYASSL_MIC32MZ_RNG */
-/* uses the core timer, in nanoseconds to seed srand */
-int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
-{
-    int i;
-    srand(PIC32_SEED_COUNT() * 25);
-
-    for (i = 0; i < sz; i++ ) {
-        output[i] = rand() % 256;
-        if ( (i % 8) == 7)
+    #else  /* CYASSL_MIC32MZ_RNG */
+        /* uses the core timer, in nanoseconds to seed srand */
+        int GenerateSeed(OS_Seed* os, byte* output, word32 sz)
+        {
+            int i;
             srand(PIC32_SEED_COUNT() * 25);
-    }
 
-    return 0;
-}
-#endif /* CYASSL_MIC32MZ_RNG */
+            for (i = 0; i < sz; i++ ) {
+                output[i] = rand() % 256;
+                if ( (i % 8) == 7)
+                    srand(PIC32_SEED_COUNT() * 25);
+            }
+            return 0;
+        }
+    #endif /* CYASSL_MIC32MZ_RNG */
 #elif defined(CYASSL_SAFERTOS) || defined(CYASSL_LEANPSK) \
    || defined(CYASSL_IAR_ARM)                               
 

From 974abca729d4457b8c03b910e66ea323011bb33a Mon Sep 17 00:00:00 2001
From: Takashi Kojo 
Date: Tue, 11 Mar 2014 13:59:37 +0900
Subject: [PATCH 41/43] mplabx/benchmark_main.c

---
 mplabx/benchmark_main.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/mplabx/benchmark_main.c b/mplabx/benchmark_main.c
index d17def394..8dc30a7b4 100644
--- a/mplabx/benchmark_main.c
+++ b/mplabx/benchmark_main.c
@@ -24,8 +24,6 @@
 #endif
 
 #include 
-    #define SYSTEMConfigPerformance /* void out SYSTEMConfigPerformance(); */
-#else
 
 #if defined(CYASSL_MICROCHIP_PIC32MZ)
     #define MICROCHIP_PIC32

From dcb39d555426429d5ad3a6fd5cfbd7dbc16eb604 Mon Sep 17 00:00:00 2001
From: John Safranek 
Date: Wed, 12 Mar 2014 05:50:37 -0700
Subject: [PATCH 42/43] bug fixes

---
 ctaocrypt/benchmark/benchmark.c | 2 +-
 ctaocrypt/src/sha.c             | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/ctaocrypt/benchmark/benchmark.c b/ctaocrypt/benchmark/benchmark.c
index 2379313e2..8002986a7 100644
--- a/ctaocrypt/benchmark/benchmark.c
+++ b/ctaocrypt/benchmark/benchmark.c
@@ -365,7 +365,7 @@ void bench_aesctr(void)
 
 
 
-#ifdef CYASSL_AESCCM
+#ifdef HAVE_AESCCM
 void bench_aesccm(void)
 {
     Aes    enc;
diff --git a/ctaocrypt/src/sha.c b/ctaocrypt/src/sha.c
index 0bf5359eb..0d8938ecf 100644
--- a/ctaocrypt/src/sha.c
+++ b/ctaocrypt/src/sha.c
@@ -367,7 +367,6 @@ void ShaFinal(Sha* sha, byte* hash)
                 2 * sizeof(word32));
     #endif
 
-    XTRANSFORM(sha, local);
     XTRANSFORM(sha, local);
     #ifdef LITTLE_ENDIAN_ORDER
         ByteReverseWords(sha->digest, sha->digest, SHA_DIGEST_SIZE);

From dc14fafb2e8282e26eac849659284d6f2ce3300b Mon Sep 17 00:00:00 2001
From: John Safranek 
Date: Wed, 12 Mar 2014 14:32:02 -0700
Subject: [PATCH 43/43] reversed a change to clear a warning, replaced some
 tabs

---
 ctaocrypt/src/sha.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/ctaocrypt/src/sha.c b/ctaocrypt/src/sha.c
index 0d8938ecf..198ca53a8 100644
--- a/ctaocrypt/src/sha.c
+++ b/ctaocrypt/src/sha.c
@@ -56,8 +56,8 @@
      * document (See note in README).
      */
     #include "stm32f2xx.h"
-		#include "stm32f2xx_hash.h"
-		
+    #include "stm32f2xx_hash.h"
+
     void InitSha(Sha* sha)
     {
         /* STM32F2 struct notes:
@@ -363,8 +363,9 @@ void ShaFinal(Sha* sha, byte* hash)
 
     #ifdef FREESCALE_MMCAU
         /* Kinetis requires only these bytes reversed */
-        ByteReverseBytes(&local[SHA_PAD_SIZE], &local[SHA_PAD_SIZE],
-                2 * sizeof(word32));
+        ByteReverseWords(&sha->buffer[SHA_PAD_SIZE/sizeof(word32)],
+                         &sha->buffer[SHA_PAD_SIZE/sizeof(word32)],
+                         2 * sizeof(word32));
     #endif
 
     XTRANSFORM(sha, local);