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addressed review comments

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This commit is contained in:
Hideki Miyazaki
2023-09-15 08:58:13 +09:00
parent 1c9afb8b12
commit 5e97b9fde8
5 changed files with 36 additions and 33 deletions
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50
IDE/Renesas/e2studio/RZN2L/README.md
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@@ -9,7 +9,7 @@ They also include benchmark and cryptography tests for the wolfCrypt library.
The example project contains both the wolfSSL and wolfCrypt libraries. The example project contains both the wolfSSL and wolfCrypt libraries.
It is built as a `Renesas RZ/N C/C++ FSP Project` and contains the Renesas RZ It is built as a `Renesas RZ/N C/C++ FSP Project` and contains the Renesas RZ
configuration. The wolfssl project uses `Renesas Secure IP on RZ` configuration. The wolfssl project uses `Renesas Secure IP on RZ`
as hardware acceleration for cyptography. as hardware acceleration for cyptography.
**Limitation** **Limitation**
@@ -34,9 +34,9 @@ The example project summary is listed below and is relevant for every project.
|Board Support Package Common Files|v1.20|| |Board Support Package Common Files|v1.20||
|I/O Port|v1.2.0|| |I/O Port|v1.2.0||
|Arm CMSIS Version 5 - Core (M)|v5.7.0+renesas.1|| |Arm CMSIS Version 5 - Core (M)|v5.7.0+renesas.1||
|Board support package for R9A07G084M04GBG|v1.2.0|| |Board support package for R9A07G084M04GBG|v1.2.0||
|Board support package for RZN2L|v1.2.0|| |Board support package for RZN2L|v1.2.0||
|Board support package for RZN2L - FSP Data|v1.2.0|| |Board support package for RZN2L - FSP Data|v1.2.0||
|RSK+RZN2L Board Support Files (RAM execution without flash memory)|v1.2.0|| |RSK+RZN2L Board Support Files (RAM execution without flash memory)|v1.2.0||
|FreeRTOS - Buffer Allocation 2|v1.2.0|| |FreeRTOS - Buffer Allocation 2|v1.2.0||
|FreeRTOS - Memory Management - Heap 4|v1.2.0|| |FreeRTOS - Memory Management - Heap 4|v1.2.0||
@@ -60,7 +60,7 @@ The example project summary is listed below and is relevant for every project.
2.) Create a `dummy_application` Renesas RZ/N C/C++ FSP Project. 2.) Create a `dummy_application` Renesas RZ/N C/C++ FSP Project.
+ Click File->New->`RZ/N C/C++ FSP Project`. + Click File->New->`RZ/N C/C++ FSP Project`.
+ Enter project name `dummu_application`. + Enter project name `dummy_application`.
+ Select Board: to `RSK+RZN2L (RAM execution without flash memory)`. + Select Board: to `RSK+RZN2L (RAM execution without flash memory)`.
+ Select Device: to `R9A07G084M04GBG`. Click Next. + Select Device: to `R9A07G084M04GBG`. Click Next.
+ Check to `Executable` + Check to `Executable`
@@ -84,7 +84,7 @@ The example project summary is listed below and is relevant for every project.
+ Add `Heap 4` stack to rzn2l_tst_thread from `New Stack` -> `FreeRTOS` -> `FreeRTOS Heap 4` + Add `Heap 4` stack to rzn2l_tst_thread from `New Stack` -> `FreeRTOS` -> `FreeRTOS Heap 4`
+ Add `UART Driver` stack to rzn2l_tst_thread from `New Stack` -> `Connectivity` -> `UART Driver` + Add `UART Driver` stack to rzn2l_tst_thread from `New Stack` -> `Connectivity` -> `UART Driver`
+ Add `FreeRTOS + TCP` stack to rzn2l_tst_thread from `New Stack` -> -> `FreeRTOS` -> `Libraries` -> `FreeRTOS+TCP` and set properties + Add `FreeRTOS + TCP` stack to rzn2l_tst_thread from `New Stack` -> -> `FreeRTOS` -> `Libraries` -> `FreeRTOS+TCP` and set properties
+ Save `dummy_application` FSP configuration + Save `dummy_application` FSP configuration
+ Copy <u>configuration.xml</u> under `dummy_application` to `test_RZN2L` + Copy <u>configuration.xml</u> under `dummy_application` to `test_RZN2L`
+ Open FSP configuration by clicking copied configuration.xml at `test_RZN2L` + Open FSP configuration by clicking copied configuration.xml at `test_RZN2L`
@@ -104,13 +104,15 @@ The example project summary is listed below and is relevant for every project.
+ um_serial_io_api.h + um_serial_io_api.h
+ um_serial_io_internal.h + um_serial_io_internal.h
+ Open um_serial_io_task_writer.c and re-name printf to uart_printf + Open um_serial_io_task_writer.c and re-name printf to uart_printf
3.) Build `test_RZN2L` project 3.) Build `test_RZN2L` project
## Run `test_RZN2L` ## Run `test_RZN2L`
1). Right click the project and Select menu Debug -> Renesas GDB Hardware debugging 1). Right click the project and Select menu `Debug` -> `Renesas GDB Hardware debugging`
2). Select J-Link ARM and R9A07G084M04 2). Select J-Link ARM and R9A07G084M04
3). Break at Entory point. Change `cpsr` register value from 0xXXXXX1yy to 0xXXXXX1da 3). Break at Entory point. Change `cpsr` register value from 0xXXXXX1yy to 0xXXXXX1da
## Run TLS 1.3 Client ## Run TLS 1.3 Client
@@ -148,9 +150,9 @@ $ make
$./examples/server/server -b -d -i -v 4 $./examples/server/server -b -d -i -v 4
``` ```
+ For ECDSA sign and verify use, + For ECDSA sign and verify use,
Enable the `USE_CRT_BUFFER_256` macro in `wolfssl_demo.h` Enable the `USE_CERT_BUFFER_256` macro in `wolfssl_demo.h`
Disble the `USE_CRT_BUFFER_2048` macro in `wolfssl_demo.h` Disble the `USE_CERT_BUFFER_2048` macro in `wolfssl_demo.h`
+ launch server with the following option. + launch server with the following option.
``` ```
@@ -210,9 +212,9 @@ $ make
$./examples/server/server -b -d -i -v 3 $./examples/server/server -b -d -i -v 3
``` ```
+ For ECDSA sign and verify use, + For ECDSA sign and verify use,
Enable the `USE_CRT_BUFFER_256` macro in `wolfssl_demo.h` Enable the `USE_CERT_BUFFER_256` macro in `wolfssl_demo.h`
Disble the `USE_CRT_BUFFER_2048` macro in `wolfssl_demo.h` Disble the `USE_CERT_BUFFER_2048` macro in `wolfssl_demo.h`
+ launch server with the following option. + launch server with the following option.
``` ```
@@ -277,9 +279,9 @@ static const byte ucIPAddress[4] = { 192, 168, 11, 241 };
3.) Build test_RZN2L project 3.) Build test_RZN2L project
+ For ECDSA sign and verify use, + For ECDSA sign and verify use,
Enable the `USE_CRT_BUFFER_256` macro in `wolfssl_demo.h` Enable the `USE_CERT_BUFFER_256` macro in `wolfssl_demo.h`
Disble the `USE_CRT_BUFFER_2048` macro in `wolfssl_demo.h` Disble the `USE_CERT_BUFFER_2048` macro in `wolfssl_demo.h`
+ launch server from e2studio + launch server from e2studio
@@ -355,9 +357,9 @@ static const byte ucIPAddress[4] = { 192, 168, 11, 241 };
3.) Build test_RZN2L project 3.) Build test_RZN2L project
+ For ECDSA sign and verify use, + For ECDSA sign and verify use,
Enable the `USE_CRT_BUFFER_256` macro in `wolfssl_demo.h` Enable the `USE_CERT_BUFFER_256` macro in `wolfssl_demo.h`
Disble the `USE_CRT_BUFFER_2048` macro in `wolfssl_demo.h` Disble the `USE_CERT_BUFFER_2048` macro in `wolfssl_demo.h`
+ launch server from e2studio + launch server from e2studio
@@ -417,12 +419,12 @@ SSL cipher suite is TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
SSL curve name is SECP256R1 SSL curve name is SECP256R1
I hear ya fa s I hear ya fa s
``` ```
## Run Crypt test ## Run Crypt test
1.) Enable `CRYPT_TEST` macro in `wolfssl_demo.h` 1.) Enable `CRYPT_TEST` macro in `wolfssl_demo.h`
2.) Run `test_RZN2L` from e2studio 2.) Run `test_RZN2L` from e2studio
Sample Output Sample Output
``` ```
------------------------------------------------------------------------------ ------------------------------------------------------------------------------
@@ -470,7 +472,7 @@ Test complete
``` ```
**Note** **Note**
`SHA1/224/256/384/512` and `Randome generation` of RSIP driver are enabled at the sampele output above while running wolfCrypt test. `SHA1/224/256/384/512` and `Random generation` of RSIP driver are enabled at the sampele output above while running wolfCrypt test.
## Run Benchmark ## Run Benchmark
@@ -478,7 +480,7 @@ Test complete
2.) Run `test_RZN2L` from e2studio 2.) Run `test_RZN2L` from e2studio
Sample Output Sample Output
``` ```
Started Serial I/O interface. Start wolfCrypt Benchmark Started Serial I/O interface. Start wolfCrypt Benchmark
wolfCrypt Benchmark (block bytes 1024, min 1.0 sec each) wolfCrypt Benchmark (block bytes 1024, min 1.0 sec each)
@@ -530,7 +532,7 @@ Benchmark complete
End wolfCrypt Benchmark End wolfCrypt Benchmark
``` ```
**Note** **Note**
`SHA1/224/256/384/512` and `Randome generation` of RSIP driver are enabled at the sampele output above. `SHA1/224/256/384/512` and `Random generation` of RSIP driver are enabled at the sampele output above.
## Support ## Support
For support inquiries and questions, please email support@wolfssl.com. Feel free to reach out to info@wolfssl.jp as well. For support inquiries and questions, please email support@wolfssl.com. Feel free to reach out to info@wolfssl.jp as well.

2
IDE/Renesas/e2studio/RZN2L/test/src/wolfssl_dummy.c
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@@ -22,7 +22,7 @@
#include <wolfssl/wolfcrypt/wc_port.h> #include <wolfssl/wolfcrypt/wc_port.h>
#define YEAR 2023 #define YEAR 2023
#define MON 5 #define MON 9
static int tick = 0; static int tick = 0;

2
wolfcrypt/benchmark/benchmark.c
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@@ -2424,7 +2424,7 @@ static void* benchmarks_do(void* args)
!defined(NO_HW_BENCH) !defined(NO_HW_BENCH)
bench_aes_aad_options_wrap(bench_aesgcm, 1); bench_aes_aad_options_wrap(bench_aesgcm, 1);
#endif #endif
#ifndef NO_SW_BENCH #ifndef NO_SW_BENCH
bench_gmac(0); bench_gmac(0);
#endif #endif
#if defined(BENCH_DEVID) #if defined(BENCH_DEVID)

7
wolfcrypt/src/random.c
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@@ -3477,14 +3477,15 @@ int wc_GenerateSeed(OS_Seed* os, byte* output, word32 sz)
#elif defined(WOLFSSL_RENESAS_FSPSM) || \ #elif defined(WOLFSSL_RENESAS_FSPSM) || \
defined(WOLFSSL_RENESAS_FSPSM_CRYPTONLY) defined(WOLFSSL_RENESAS_FSPSM_CRYPTONLY)
#if defined(WOLFSSL_RENESAS_SCEPROTECT) #if defined(WOLFSSL_RENESAS_SCEPROTECT)
#include "r_sce.h" #include "r_sce.h"
#define R_RANDOM_GEN(b) R_SCE_RandomNumberGenerate(b) #define R_RANDOM_GEN(b) R_SCE_RandomNumberGenerate(b)
#elif defined(WOLFSSL_RENESAS_RSIP) #elif defined(WOLFSSL_RENESAS_RSIP)
#include "r_rsip.h" #include "r_rsip.h"
extern rsip_ctrl_t rsip_ctrl; extern rsip_ctrl_t rsip_ctrl;
#define R_RANDOM_GEN(b) R_RSIP_RandomNumberGenerate(&rsip_ctrl,b) #define R_RANDOM_GEN(b) R_RSIP_RandomNumberGenerate(&rsip_ctrl,b)
#endif #endif
int wc_GenerateSeed(OS_Seed* os, byte* output, word32 sz) int wc_GenerateSeed(OS_Seed* os, byte* output, word32 sz)
{ {

8
wolfcrypt/test/test.c
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@@ -11332,7 +11332,7 @@ WOLFSSL_TEST_SUBROUTINE wc_test_ret_t aes256_test(void)
#ifdef HAVE_RENESAS_SYNC #ifdef HAVE_RENESAS_SYNC
byte *key = byte *key =
(byte*)guser_PKCbInfo.wrapped_key_aes256; (byte*)guser_PKCbInfo.wrapped_key_aes256;
int kyeSz = (256/8); int keySz = (256/8);
#else #else
WOLFSSL_SMALL_STACK_STATIC byte key[] = { WOLFSSL_SMALL_STACK_STATIC byte key[] = {
0x60,0x3d,0xeb,0x10,0x15,0xca,0x71,0xbe, 0x60,0x3d,0xeb,0x10,0x15,0xca,0x71,0xbe,
@@ -11340,7 +11340,7 @@ WOLFSSL_TEST_SUBROUTINE wc_test_ret_t aes256_test(void)
0x1f,0x35,0x2c,0x07,0x3b,0x61,0x08,0xd7, 0x1f,0x35,0x2c,0x07,0x3b,0x61,0x08,0xd7,
0x2d,0x98,0x10,0xa3,0x09,0x14,0xdf,0xf4 0x2d,0x98,0x10,0xa3,0x09,0x14,0xdf,0xf4
}; };
int kyeSz = (int)sizeof(key); int keySz = (int)sizeof(key);
#endif #endif
WOLFSSL_SMALL_STACK_STATIC byte iv[] = { WOLFSSL_SMALL_STACK_STATIC byte iv[] = {
0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
@@ -11365,11 +11365,11 @@ WOLFSSL_TEST_SUBROUTINE wc_test_ret_t aes256_test(void)
ERROR_OUT(WC_TEST_RET_ENC_EC(ret), out); ERROR_OUT(WC_TEST_RET_ENC_EC(ret), out);
#endif #endif
ret = wc_AesSetKey(enc, key, kyeSz, iv, AES_ENCRYPTION); ret = wc_AesSetKey(enc, key, keySz, iv, AES_ENCRYPTION);
if (ret != 0) if (ret != 0)
ERROR_OUT(WC_TEST_RET_ENC_EC(ret), out); ERROR_OUT(WC_TEST_RET_ENC_EC(ret), out);
#ifdef HAVE_AES_DECRYPT #ifdef HAVE_AES_DECRYPT
ret = wc_AesSetKey(dec, key, kyeSz, iv, AES_DECRYPTION); ret = wc_AesSetKey(dec, key, keySz, iv, AES_DECRYPTION);
if (ret != 0) if (ret != 0)
ERROR_OUT(WC_TEST_RET_ENC_EC(ret), out); ERROR_OUT(WC_TEST_RET_ENC_EC(ret), out);
#endif #endif