diff --git a/IDE/LPCXPRESSO/lib_wolfssl/lpc_18xx_port.c b/IDE/LPCXPRESSO/lib_wolfssl/lpc_18xx_port.c index dfdff06c4..600173913 100644 --- a/IDE/LPCXPRESSO/lib_wolfssl/lpc_18xx_port.c +++ b/IDE/LPCXPRESSO/lib_wolfssl/lpc_18xx_port.c @@ -1,66 +1,81 @@ -/* - * lpc_18xx_port.c +/* lpc_18xx_port.c * - * Created on: Nov 4, 2015 - * Author: davidgarske + * Copyright (C) 2006-2015 wolfSSL Inc. + * + * This file is part of wolfSSL. (formerly known as CyaSSL) + * + * wolfSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * wolfSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ + #include "board.h" #include "otp_18xx_43xx.h" /* For RNG */ #include "timer_18xx_43xx.h" static uint32_t mTimeInit = 0; -#define TIMER_SCALER 1000000 +#define TIMER_SCALER 1000000 static void init_time(void) { - if(mTimeInit == 0) { - uint32_t timerFreq; + if(mTimeInit == 0) { + uint32_t timerFreq; - /* Set current time for RTC 2:00:00PM, 2012-10-05 */ - RTC_TIME_T FullTime; + /* Set current time for RTC 2:00:00PM, 2012-10-05 */ + RTC_TIME_T FullTime; - Chip_RTC_Init(LPC_RTC); + Chip_RTC_Init(LPC_RTC); - FullTime.time[RTC_TIMETYPE_SECOND] = 0; - FullTime.time[RTC_TIMETYPE_MINUTE] = 0; - FullTime.time[RTC_TIMETYPE_HOUR] = 14; - FullTime.time[RTC_TIMETYPE_DAYOFMONTH] = 5; - FullTime.time[RTC_TIMETYPE_DAYOFWEEK] = 5; - FullTime.time[RTC_TIMETYPE_DAYOFYEAR] = 279; - FullTime.time[RTC_TIMETYPE_MONTH] = 10; - FullTime.time[RTC_TIMETYPE_YEAR] = 2012; + FullTime.time[RTC_TIMETYPE_SECOND] = 0; + FullTime.time[RTC_TIMETYPE_MINUTE] = 0; + FullTime.time[RTC_TIMETYPE_HOUR] = 14; + FullTime.time[RTC_TIMETYPE_DAYOFMONTH] = 5; + FullTime.time[RTC_TIMETYPE_DAYOFWEEK] = 5; + FullTime.time[RTC_TIMETYPE_DAYOFYEAR] = 279; + FullTime.time[RTC_TIMETYPE_MONTH] = 10; + FullTime.time[RTC_TIMETYPE_YEAR] = 2012; - Chip_RTC_SetFullTime(LPC_RTC, &FullTime); + Chip_RTC_SetFullTime(LPC_RTC, &FullTime); - /* Enable RTC (starts increase the tick counter and second counter register) */ - Chip_RTC_Enable(LPC_RTC, ENABLE); + /* Enable RTC (starts increase the tick counter and second counter register) */ + Chip_RTC_Enable(LPC_RTC, ENABLE); - /* Enable timer 1 clock and reset it */ - Chip_TIMER_Init(LPC_TIMER2); - Chip_RGU_TriggerReset(RGU_TIMER2_RST); - while (Chip_RGU_InReset(RGU_TIMER2_RST)) {} + /* Enable timer 1 clock and reset it */ + Chip_TIMER_Init(LPC_TIMER2); + Chip_RGU_TriggerReset(RGU_TIMER2_RST); + while (Chip_RGU_InReset(RGU_TIMER2_RST)) {} - /* Get timer peripheral clock rate */ - timerFreq = Chip_Clock_GetRate(CLK_MX_TIMER2); + /* Get timer peripheral clock rate */ + timerFreq = Chip_Clock_GetRate(CLK_MX_TIMER2); - /* Timer setup */ - Chip_TIMER_Reset(LPC_TIMER2); - Chip_TIMER_PrescaleSet(LPC_TIMER2, timerFreq/TIMER_SCALER); - Chip_TIMER_Enable(LPC_TIMER2); + /* Timer setup */ + Chip_TIMER_Reset(LPC_TIMER2); + Chip_TIMER_PrescaleSet(LPC_TIMER2, timerFreq/TIMER_SCALER); + Chip_TIMER_Enable(LPC_TIMER2); - mTimeInit = 1; - } + mTimeInit = 1; + } } double current_time() { - //RTC_TIME_T FullTime; - uint32_t timerMs; + //RTC_TIME_T FullTime; + uint32_t timerMs; - init_time(); - timerMs = Chip_TIMER_ReadCount(LPC_TIMER2); + init_time(); + timerMs = Chip_TIMER_ReadCount(LPC_TIMER2); - //Chip_RTC_GetFullTime(LPC_RTC, &FullTime); - //(double)FullTime.time[RTC_TIMETYPE_SECOND] + //Chip_RTC_GetFullTime(LPC_RTC, &FullTime); + //(double)FullTime.time[RTC_TIMETYPE_SECOND] return (double)timerMs/TIMER_SCALER; } @@ -71,23 +86,23 @@ static uint32_t mRandInit = 0; static uint32_t mRandIndex = 0; uint32_t rand_gen(void) { - uint32_t rand = 0; - uint32_t status = LPC_OK; - if(mRandIndex == 0) { - if(mRandInit == 0) { - Chip_OTP_Init(); - mRandInit = 1; - } - status = Chip_OTP_GenRand(); - } - if(status == LPC_OK) { - rand = mRandData[mRandIndex]; - } - else { - printf("GenRand Failed 0x%x\n", status); - } - if(++mRandIndex > 4) { - mRandIndex = 0; - } - return rand; + uint32_t rand = 0; + uint32_t status = LPC_OK; + if(mRandIndex == 0) { + if(mRandInit == 0) { + Chip_OTP_Init(); + mRandInit = 1; + } + status = Chip_OTP_GenRand(); + } + if(status == LPC_OK) { + rand = mRandData[mRandIndex]; + } + else { + printf("GenRand Failed 0x%x\n", status); + } + if(++mRandIndex > 4) { + mRandIndex = 0; + } + return rand; } diff --git a/IDE/LPCXPRESSO/wolf_example/src/cr_startup_lpc18xx.c b/IDE/LPCXPRESSO/wolf_example/src/cr_startup_lpc18xx.c deleted file mode 100644 index fe13845e9..000000000 --- a/IDE/LPCXPRESSO/wolf_example/src/cr_startup_lpc18xx.c +++ /dev/null @@ -1,484 +0,0 @@ -//***************************************************************************** -// LPC18xx Microcontroller Startup code for use with LPCXpresso IDE -// -// Version : 141204 -//***************************************************************************** -// -// Copyright(C) NXP Semiconductors, 2013-2014 -// All rights reserved. -// -// Software that is described herein is for illustrative purposes only -// which provides customers with programming information regarding the -// LPC products. This software is supplied "AS IS" without any warranties of -// any kind, and NXP Semiconductors and its licensor disclaim any and -// all warranties, express or implied, including all implied warranties of -// merchantability, fitness for a particular purpose and non-infringement of -// intellectual property rights. NXP Semiconductors assumes no responsibility -// or liability for the use of the software, conveys no license or rights under any -// patent, copyright, mask work right, or any other intellectual property rights in -// or to any products. NXP Semiconductors reserves the right to make changes -// in the software without notification. NXP Semiconductors also makes no -// representation or warranty that such application will be suitable for the -// specified use without further testing or modification. -// -// Permission to use, copy, modify, and distribute this software and its -// documentation is hereby granted, under NXP Semiconductors' and its -// licensor's relevant copyrights in the software, without fee, provided that it -// is used in conjunction with NXP Semiconductors microcontrollers. This -// copyright, permission, and disclaimer notice must appear in all copies of -// this code. -//***************************************************************************** - -#if defined (__cplusplus) -#ifdef __REDLIB__ -#error Redlib does not support C++ -#else -//***************************************************************************** -// -// The entry point for the C++ library startup -// -//***************************************************************************** -extern "C" { - extern void __libc_init_array(void); -} -#endif -#endif - -#define WEAK __attribute__ ((weak)) -#define ALIAS(f) __attribute__ ((weak, alias (#f))) - -//***************************************************************************** -#if defined (__cplusplus) -extern "C" { -#endif - -//***************************************************************************** -#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN) -// Declaration of external SystemInit function -extern void SystemInit(void); -#endif - -//***************************************************************************** -// -// Forward declaration of the default handlers. These are aliased. -// When the application defines a handler (with the same name), this will -// automatically take precedence over these weak definitions -// -//***************************************************************************** - void ResetISR(void); -WEAK void NMI_Handler(void); -WEAK void HardFault_Handler(void); -WEAK void MemManage_Handler(void); -WEAK void BusFault_Handler(void); -WEAK void UsageFault_Handler(void); -WEAK void SVC_Handler(void); -WEAK void DebugMon_Handler(void); -WEAK void PendSV_Handler(void); -WEAK void SysTick_Handler(void); -WEAK void IntDefaultHandler(void); - -//***************************************************************************** -// -// Forward declaration of the specific IRQ handlers. These are aliased -// to the IntDefaultHandler, which is a 'forever' loop. When the application -// defines a handler (with the same name), this will automatically take -// precedence over these weak definitions -// -//***************************************************************************** -void DAC_IRQHandler(void) ALIAS(IntDefaultHandler); -void DMA_IRQHandler(void) ALIAS(IntDefaultHandler); -void FLASHEEPROM_IRQHandler(void) ALIAS(IntDefaultHandler); -void ETH_IRQHandler(void) ALIAS(IntDefaultHandler); -void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler); -void LCD_IRQHandler(void) ALIAS(IntDefaultHandler); -void USB0_IRQHandler(void) ALIAS(IntDefaultHandler); -void USB1_IRQHandler(void) ALIAS(IntDefaultHandler); -void SCT_IRQHandler(void) ALIAS(IntDefaultHandler); -void RIT_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler); -void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler); -void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler); -void ADC0_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler); -void ADC1_IRQHandler(void) ALIAS(IntDefaultHandler); -void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler); -void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART0_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART1_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART2_IRQHandler(void) ALIAS(IntDefaultHandler); -void UART3_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2S0_IRQHandler(void) ALIAS(IntDefaultHandler); -void I2S1_IRQHandler(void) ALIAS(IntDefaultHandler); -void SPIFI_IRQHandler(void) ALIAS(IntDefaultHandler); -void SGPIO_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO0_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO1_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO2_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO3_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO4_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO5_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO6_IRQHandler(void) ALIAS(IntDefaultHandler); -void GPIO7_IRQHandler(void) ALIAS(IntDefaultHandler); -void GINT0_IRQHandler(void) ALIAS(IntDefaultHandler); -void GINT1_IRQHandler(void) ALIAS(IntDefaultHandler); -void EVRT_IRQHandler(void) ALIAS(IntDefaultHandler); -void CAN1_IRQHandler(void) ALIAS(IntDefaultHandler); -void ATIMER_IRQHandler(void) ALIAS(IntDefaultHandler); -void RTC_IRQHandler(void) ALIAS(IntDefaultHandler); -void WDT_IRQHandler(void) ALIAS(IntDefaultHandler); -void CAN0_IRQHandler(void) ALIAS(IntDefaultHandler); -void QEI_IRQHandler(void) ALIAS(IntDefaultHandler); - -//***************************************************************************** -// -// The entry point for the application. -// __main() is the entry point for Redlib based applications -// main() is the entry point for Newlib based applications -// -//***************************************************************************** -#if defined (__REDLIB__) -extern void __main(void); -#endif -extern int main(void); -//***************************************************************************** -// -// External declaration for the pointer to the stack top from the Linker Script -// -//***************************************************************************** -extern void _vStackTop(void); - -//***************************************************************************** -#if defined (__cplusplus) -} // extern "C" -#endif -//***************************************************************************** -// -// The vector table. -// This relies on the linker script to place at correct location in memory. -// -//***************************************************************************** -extern void (* const g_pfnVectors[])(void); -__attribute__ ((used,section(".isr_vector"))) -void (* const g_pfnVectors[])(void) = { - // Core Level - CM3 - &_vStackTop, // The initial stack pointer - ResetISR, // The reset handler - NMI_Handler, // The NMI handler - HardFault_Handler, // The hard fault handler - MemManage_Handler, // The MPU fault handler - BusFault_Handler, // The bus fault handler - UsageFault_Handler, // The usage fault handler - 0, // Reserved - 0, // Reserved - 0, // Reserved - 0, // Reserved - SVC_Handler, // SVCall handler - DebugMon_Handler, // Debug monitor handler - 0, // Reserved - PendSV_Handler, // The PendSV handler - SysTick_Handler, // The SysTick handler - - // Chip Level - LPC18 - DAC_IRQHandler, // 16 - 0, // 17 - DMA_IRQHandler, // 18 - 0, // 19 - FLASHEEPROM_IRQHandler, // 20 ORed flash Bank A, flash Bank B, EEPROM interrupts - ETH_IRQHandler, // 21 - SDIO_IRQHandler, // 22 - LCD_IRQHandler, // 23 - USB0_IRQHandler, // 24 - USB1_IRQHandler, // 25 - SCT_IRQHandler, // 26 - RIT_IRQHandler, // 27 - TIMER0_IRQHandler, // 28 - TIMER1_IRQHandler, // 29 - TIMER2_IRQHandler, // 30 - TIMER3_IRQHandler, // 31 - MCPWM_IRQHandler, // 32 - ADC0_IRQHandler, // 33 - I2C0_IRQHandler, // 34 - I2C1_IRQHandler, // 35 - 0, // 36 - ADC1_IRQHandler, // 37 - SSP0_IRQHandler, // 38 - SSP1_IRQHandler, // 39 - UART0_IRQHandler, // 40 - UART1_IRQHandler, // 41 - UART2_IRQHandler, // 42 - UART3_IRQHandler, // 43 - I2S0_IRQHandler, // 44 - I2S1_IRQHandler, // 45 - SPIFI_IRQHandler, // 46 - SGPIO_IRQHandler, // 47 - GPIO0_IRQHandler, // 48 - GPIO1_IRQHandler, // 49 - GPIO2_IRQHandler, // 50 - GPIO3_IRQHandler, // 51 - GPIO4_IRQHandler, // 52 - GPIO5_IRQHandler, // 53 - GPIO6_IRQHandler, // 54 - GPIO7_IRQHandler, // 55 - GINT0_IRQHandler, // 56 - GINT1_IRQHandler, // 57 - EVRT_IRQHandler, // 58 - CAN1_IRQHandler, // 59 - 0, // 60 - 0, // 61 - ATIMER_IRQHandler, // 62 - RTC_IRQHandler, // 63 - 0, // 64 - WDT_IRQHandler, // 65 - 0, // 66 - CAN0_IRQHandler, // 67 - QEI_IRQHandler, // 68 -}; - -//***************************************************************************** -// Functions to carry out the initialization of RW and BSS data sections. These -// are written as separate functions rather than being inlined within the -// ResetISR() function in order to cope with MCUs with multiple banks of -// memory. -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void data_init(unsigned int romstart, unsigned int start, unsigned int len) { - unsigned int *pulDest = (unsigned int*) start; - unsigned int *pulSrc = (unsigned int*) romstart; - unsigned int loop; - for (loop = 0; loop < len; loop = loop + 4) - *pulDest++ = *pulSrc++; -} - -__attribute__ ((section(".after_vectors"))) -void bss_init(unsigned int start, unsigned int len) { - unsigned int *pulDest = (unsigned int*) start; - unsigned int loop; - for (loop = 0; loop < len; loop = loop + 4) - *pulDest++ = 0; -} - -//***************************************************************************** -// The following symbols are constructs generated by the linker, indicating -// the location of various points in the "Global Section Table". This table is -// created by the linker via the Code Red managed linker script mechanism. It -// contains the load address, execution address and length of each RW data -// section and the execution and length of each BSS (zero initialized) section. -//***************************************************************************** -extern unsigned int __data_section_table; -extern unsigned int __data_section_table_end; -extern unsigned int __bss_section_table; -extern unsigned int __bss_section_table_end; - -//***************************************************************************** -// Reset entry point for your code. -// Sets up a simple runtime environment and initializes the C/C++ -// library. -// -//***************************************************************************** -void -ResetISR(void) { - -// ************************************************************* -// The following conditional block of code manually resets as -// much of the peripheral set of the LPC18 as possible. This is -// done because the LPC18 does not provide a means of triggering -// a full system reset under debugger control, which can cause -// problems in certain circumstances when debugging. -// -// You can prevent this code block being included if you require -// (for example when creating a final executable which you will -// not debug) by setting the define 'DONT_RESET_ON_RESTART'. -// -#ifndef DONT_RESET_ON_RESTART - - // Disable interrupts - __asm volatile ("cpsid i"); - // equivalent to CMSIS '__disable_irq()' function - - unsigned int *RESET_CONTROL = (unsigned int *) 0x40053100; - // LPC_RGU->RESET_CTRL0 @ 0x40053100 - // LPC_RGU->RESET_CTRL1 @ 0x40053104 - // Note that we do not use the CMSIS register access mechanism, - // as there is no guarantee that the project has been configured - // to use CMSIS. - - // Write to LPC_RGU->RESET_CTRL0 - *(RESET_CONTROL+0) = 0x10DF0000; - // GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST| - // USB1_RST|USB0_RST|LCD_RST - - // Write to LPC_RGU->RESET_CTRL1 - *(RESET_CONTROL+1) = 0x00DFF7FF; - // CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST| - // I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST| - // DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST| - // RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST - - // Clear all pending interrupts in the NVIC - volatile unsigned int *NVIC_ICPR = (unsigned int *) 0xE000E280; - unsigned int irqpendloop; - for (irqpendloop = 0; irqpendloop < 8; irqpendloop++) { - *(NVIC_ICPR+irqpendloop)= 0xFFFFFFFF; - } - - // Reenable interrupts - __asm volatile ("cpsie i"); - // equivalent to CMSIS '__enable_irq()' function - -#endif // ifndef DONT_RESET_ON_RESTART -// ************************************************************* - - -#if defined (__USE_LPCOPEN) - SystemInit(); -#endif - - // - // Copy the data sections from flash to SRAM. - // - unsigned int LoadAddr, ExeAddr, SectionLen; - unsigned int *SectionTableAddr; - - // Load base address of Global Section Table - SectionTableAddr = &__data_section_table; - - // Copy the data sections from flash to SRAM. - while (SectionTableAddr < &__data_section_table_end) { - LoadAddr = *SectionTableAddr++; - ExeAddr = *SectionTableAddr++; - SectionLen = *SectionTableAddr++; - data_init(LoadAddr, ExeAddr, SectionLen); - } - // At this point, SectionTableAddr = &__bss_section_table; - // Zero fill the bss segment - while (SectionTableAddr < &__bss_section_table_end) { - ExeAddr = *SectionTableAddr++; - SectionLen = *SectionTableAddr++; - bss_init(ExeAddr, SectionLen); - } - - // ****************************** - // Check to see if we are running the code from a non-zero - // address (eg RAM, external flash), in which case we need - // to modify the VTOR register to tell the CPU that the - // vector table is located at a non-0x0 address. - - // Note that we do not use the CMSIS register access mechanism, - // as there is no guarantee that the project has been configured - // to use CMSIS. - unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08; - if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) { - // CMSIS : SCB->VTOR =
- *pSCB_VTOR = (unsigned int)g_pfnVectors; - } - -#if defined (__USE_CMSIS) - SystemInit(); -#endif - -#if defined (__cplusplus) - // - // Call C++ library initialisation - // - __libc_init_array(); -#endif - -#if defined (__REDLIB__) - // Call the Redlib library, which in turn calls main() - __main() ; -#else - main(); -#endif - - // - // main() shouldn't return, but if it does, we'll just enter an infinite loop - // - while (1) { - ; - } -} - -//***************************************************************************** -// Default exception handlers. Override the ones here by defining your own -// handler routines in your application code. -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void NMI_Handler(void) -{ - while(1) - { - } -} -__attribute__ ((section(".after_vectors"))) -void HardFault_Handler(void) -{ - while(1) - { - } -} -__attribute__ ((section(".after_vectors"))) -void MemManage_Handler(void) -{ - while(1) - { - } -} -__attribute__ ((section(".after_vectors"))) -void BusFault_Handler(void) -{ - while(1) - { - } -} -__attribute__ ((section(".after_vectors"))) -void UsageFault_Handler(void) -{ - while(1) - { - } -} -__attribute__ ((section(".after_vectors"))) -void SVC_Handler(void) -{ - while(1) - { - } -} -__attribute__ ((section(".after_vectors"))) -void DebugMon_Handler(void) -{ - while(1) - { - } -} -__attribute__ ((section(".after_vectors"))) -void PendSV_Handler(void) -{ - while(1) - { - } -} -__attribute__ ((section(".after_vectors"))) -void SysTick_Handler(void) -{ - while(1) - { - } -} - -//***************************************************************************** -// -// Processor ends up here if an unexpected interrupt occurs or a specific -// handler is not present in the application code. -// -//***************************************************************************** -__attribute__ ((section(".after_vectors"))) -void IntDefaultHandler(void) -{ - while(1) - { - } -} diff --git a/IDE/LPCXPRESSO/wolf_example/src/lpc_18xx_startup.c b/IDE/LPCXPRESSO/wolf_example/src/lpc_18xx_startup.c new file mode 100644 index 000000000..893704285 --- /dev/null +++ b/IDE/LPCXPRESSO/wolf_example/src/lpc_18xx_startup.c @@ -0,0 +1,352 @@ +/* lpc_18xx_startup.c + * + * Copyright (C) 2006-2015 wolfSSL Inc. + * + * This file is part of wolfSSL. (formerly known as CyaSSL) + * + * wolfSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * wolfSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#include "board.h" +#include +#include + +/* Top of stack location */ +extern void _vStackTop(void); + +/* Memory locations */ +extern unsigned int __data_section_table; +extern unsigned int __data_section_table_end; +extern unsigned int __bss_section_table; +extern unsigned int __bss_section_table_end; + +/* Copy memory: src=Source, dst_beg=Destination Begin, dst_end=Destination End */ +__attribute__ ((section(".after_vectors"))) +void memcpy32(uint32_t* src, uint32_t* dst_beg, uint32_t len) +{ + unsigned int i; + for (i = 0; i < len; i += sizeof(uint32_t)) { + *dst_beg++ = *src++; + } +} + +/* Zero address in range */ +__attribute__ ((section(".after_vectors"))) +void meminit32(uint32_t* start, uint32_t len) +{ + unsigned int i; + for (i = 0; i < len; i += sizeof(uint32_t)) { + *start++ = 0; + } +} + +/* Reset Entry Point */ +void ResetISR(void) +{ + unsigned int irqPendLoop; + unsigned int *SectionTableAddr; + unsigned int LoadAddr, ExeAddr, SectionLen; + unsigned int *RESET_CONTROL = (unsigned int *) 0x40053100; + volatile unsigned int *NVIC_ICPR = (unsigned int *) 0xE000E280; + + /* Chip cleanup/reset */ + __asm volatile ("cpsid i"); /* Disable interrupts */ + + /* Write to LPC_RGU->RESET_CTRL0 */ + *(RESET_CONTROL+0) = 0x10DF0000; + /* GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST| + * USB1_RST|USB0_RST|LCD_RST */ + + /* Write to LPC_RGU->RESET_CTRL1 */ + *(RESET_CONTROL+1) = 0x00DFF7FF; + /* CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST| + * I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST| + * DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST| + * RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST */ + + /* Clear all pending interrupts in the NVIC */ + for (irqPendLoop = 0; irqPendLoop < 8; irqPendLoop++) { + *(NVIC_ICPR + irqPendLoop) = 0xFFFFFFFF; + } + __asm volatile ("cpsie i"); /* Re-enable interrupts */ + + /* Init sections */ + SectionTableAddr = &__data_section_table; + /* Copy the data sections from flash to SRAM */ + while (SectionTableAddr < &__data_section_table_end) { + LoadAddr = *SectionTableAddr++; + ExeAddr = *SectionTableAddr++; + SectionLen = *SectionTableAddr++; + memcpy32((uint32_t*)LoadAddr, (uint32_t*)ExeAddr, SectionLen); + } + /* Zero fill the bss segment */ + while (SectionTableAddr < &__bss_section_table_end) { + ExeAddr = *SectionTableAddr++; + SectionLen = *SectionTableAddr++; + meminit32((uint32_t*)ExeAddr, SectionLen); + } + +#if defined(__FPU_PRESENT) && __FPU_PRESENT == 1 + fpuInit(); +#endif + + /* Board specific SystemInit */ + Board_SystemInit(); + + /* Start main */ +#if defined (__REDLIB__) + /* Call the Redlib library, which in turn calls main() */ + extern void __main(void); + __main() ; +#else + extern void main(void); + main(); +#endif + + /* Application has ended, so busy wait */ + while(1) {}; +} + +/* Vector Exception/Interrupt Handlers */ +__attribute__ ((section(".after_vectors"))) +static void Default_Handler(void) +{ + /* Loop forever */ + while(1); +} + +void HardFault_HandlerC( uint32_t *hardfault_args ) +{ + /* These are volatile to try and prevent the compiler/linker optimizing them + away as the variables never actually get used. If the debugger won't show the + values of the variables, make them global my moving their declaration outside + of this function. */ + volatile uint32_t stacked_r0; + volatile uint32_t stacked_r1; + volatile uint32_t stacked_r2; + volatile uint32_t stacked_r3; + volatile uint32_t stacked_r12; + volatile uint32_t stacked_lr; + volatile uint32_t stacked_pc; + volatile uint32_t stacked_psr; + volatile uint32_t _CFSR; + volatile uint32_t _HFSR; + volatile uint32_t _DFSR; + volatile uint32_t _AFSR; + volatile uint32_t _BFAR; + volatile uint32_t _MMAR; + + stacked_r0 = ((uint32_t)hardfault_args[0]); + stacked_r1 = ((uint32_t)hardfault_args[1]); + stacked_r2 = ((uint32_t)hardfault_args[2]); + stacked_r3 = ((uint32_t)hardfault_args[3]); + stacked_r12 = ((uint32_t)hardfault_args[4]); + stacked_lr = ((uint32_t)hardfault_args[5]); + stacked_pc = ((uint32_t)hardfault_args[6]); + stacked_psr = ((uint32_t)hardfault_args[7]); + + /* Configurable Fault Status Register */ + /* Consists of MMSR, BFSR and UFSR */ + _CFSR = (*((volatile uint32_t *)(0xE000ED28))); + + /* Hard Fault Status Register */ + _HFSR = (*((volatile uint32_t *)(0xE000ED2C))); + + /* Debug Fault Status Register */ + _DFSR = (*((volatile uint32_t *)(0xE000ED30))); + + /* Auxiliary Fault Status Register */ + _AFSR = (*((volatile uint32_t *)(0xE000ED3C))); + + /* Read the Fault Address Registers. These may not contain valid values. */ + /* Check BFARVALID/MMARVALID to see if they are valid values */ + /* MemManage Fault Address Register */ + _MMAR = (*((volatile uint32_t *)(0xE000ED34))); + /* Bus Fault Address Register */ + _BFAR = (*((volatile uint32_t *)(0xE000ED38))); + + printf ("\n\nHard fault handler (all numbers in hex):\n"); + printf ("R0 = %x\n", stacked_r0); + printf ("R1 = %x\n", stacked_r1); + printf ("R2 = %x\n", stacked_r2); + printf ("R3 = %x\n", stacked_r3); + printf ("R12 = %x\n", stacked_r12); + printf ("LR [R14] = %x subroutine call return address\n", stacked_lr); + printf ("PC [R15] = %x program counter\n", stacked_pc); + printf ("PSR = %x\n", stacked_psr); + printf ("CFSR = %x\n", _CFSR); + printf ("HFSR = %x\n", _HFSR); + printf ("DFSR = %x\n", _DFSR); + printf ("AFSR = %x\n", _AFSR); + printf ("MMAR = %x\n", _MMAR); + printf ("BFAR = %x\n", _BFAR); + + /* Break into the debugger */ + __asm("BKPT #0\n"); +} + +__attribute__( ( naked, section(".after_vectors") ) ) +void HardFault_Handler(void) +{ + __asm volatile + ( + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + " ldr r1, [r0, #24] \n" + " ldr r2, handler2_address_const \n" + " bx r2 \n" + " handler2_address_const: .word HardFault_HandlerC \n" + ); +} + +/* Forward declaration of IRQ handlers */ +#define ALIAS(f) __attribute__ ((weak, alias (#f))) + +void NMI_Handler(void) ALIAS(Default_Handler); +void MemManage_Handler(void) ALIAS(Default_Handler); +void BusFault_Handler(void) ALIAS(Default_Handler); +void UsageFault_Handler(void) ALIAS(Default_Handler); +void SVC_Handler(void) ALIAS(Default_Handler); +void DebugMon_Handler(void) ALIAS(Default_Handler); +void PendSV_Handler(void) ALIAS(Default_Handler); +void SysTick_Handler(void) ALIAS(Default_Handler); + +void DAC_IRQHandler(void) ALIAS(Default_Handler); +void DMA_IRQHandler(void) ALIAS(Default_Handler); +void FLASHEEPROM_IRQHandler(void) ALIAS(Default_Handler); +void ETH_IRQHandler(void) ALIAS(Default_Handler); +void SDIO_IRQHandler(void) ALIAS(Default_Handler); +void LCD_IRQHandler(void) ALIAS(Default_Handler); +void USB0_IRQHandler(void) ALIAS(Default_Handler); +void USB1_IRQHandler(void) ALIAS(Default_Handler); +void SCT_IRQHandler(void) ALIAS(Default_Handler); +void RIT_IRQHandler(void) ALIAS(Default_Handler); +void TIMER0_IRQHandler(void) ALIAS(Default_Handler); +void TIMER1_IRQHandler(void) ALIAS(Default_Handler); +void TIMER2_IRQHandler(void) ALIAS(Default_Handler); +void TIMER3_IRQHandler(void) ALIAS(Default_Handler); +void MCPWM_IRQHandler(void) ALIAS(Default_Handler); +void ADC0_IRQHandler(void) ALIAS(Default_Handler); +void I2C0_IRQHandler(void) ALIAS(Default_Handler); +void I2C1_IRQHandler(void) ALIAS(Default_Handler); +void ADC1_IRQHandler(void) ALIAS(Default_Handler); +void SSP0_IRQHandler(void) ALIAS(Default_Handler); +void SSP1_IRQHandler(void) ALIAS(Default_Handler); +void UART0_IRQHandler(void) ALIAS(Default_Handler); +void UART1_IRQHandler(void) ALIAS(Default_Handler); +void UART2_IRQHandler(void) ALIAS(Default_Handler); +void UART3_IRQHandler(void) ALIAS(Default_Handler); +void I2S0_IRQHandler(void) ALIAS(Default_Handler); +void I2S1_IRQHandler(void) ALIAS(Default_Handler); +void SPIFI_IRQHandler(void) ALIAS(Default_Handler); +void SGPIO_IRQHandler(void) ALIAS(Default_Handler); +void GPIO0_IRQHandler(void) ALIAS(Default_Handler); +void GPIO1_IRQHandler(void) ALIAS(Default_Handler); +void GPIO2_IRQHandler(void) ALIAS(Default_Handler); +void GPIO3_IRQHandler(void) ALIAS(Default_Handler); +void GPIO4_IRQHandler(void) ALIAS(Default_Handler); +void GPIO5_IRQHandler(void) ALIAS(Default_Handler); +void GPIO6_IRQHandler(void) ALIAS(Default_Handler); +void GPIO7_IRQHandler(void) ALIAS(Default_Handler); +void GINT0_IRQHandler(void) ALIAS(Default_Handler); +void GINT1_IRQHandler(void) ALIAS(Default_Handler); +void EVRT_IRQHandler(void) ALIAS(Default_Handler); +void CAN1_IRQHandler(void) ALIAS(Default_Handler); +void ATIMER_IRQHandler(void) ALIAS(Default_Handler); +void RTC_IRQHandler(void) ALIAS(Default_Handler); +void WDT_IRQHandler(void) ALIAS(Default_Handler); +void CAN0_IRQHandler(void) ALIAS(Default_Handler); +void QEI_IRQHandler(void) ALIAS(Default_Handler); + +/* Vectors */ +extern void (* const g_pfnVectors[])(void); +__attribute__ ((used,section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = +{ + // Core Level - CM3 + &_vStackTop, // The initial stack pointer + ResetISR, // The reset handler + NMI_Handler, // The NMI handler + HardFault_Handler, // The hard fault handler + MemManage_Handler, // The MPU fault handler + BusFault_Handler, // The bus fault handler + UsageFault_Handler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + SVC_Handler, // SVCall handler + DebugMon_Handler, // Debug monitor handler + 0, // Reserved + PendSV_Handler, // The PendSV handler + SysTick_Handler, // The SysTick handler + + // Chip Level - LPC18 + DAC_IRQHandler, // 16 + 0, // 17 + DMA_IRQHandler, // 18 + 0, // 19 + FLASHEEPROM_IRQHandler, // 20 + ETH_IRQHandler, // 21 + SDIO_IRQHandler, // 22 + LCD_IRQHandler, // 23 + USB0_IRQHandler, // 24 + USB1_IRQHandler, // 25 + SCT_IRQHandler, // 26 + RIT_IRQHandler, // 27 + TIMER0_IRQHandler, // 28 + TIMER1_IRQHandler, // 29 + TIMER2_IRQHandler, // 30 + TIMER3_IRQHandler, // 31 + MCPWM_IRQHandler, // 32 + ADC0_IRQHandler, // 33 + I2C0_IRQHandler, // 34 + I2C1_IRQHandler, // 35 + 0, // 36 + ADC1_IRQHandler, // 37 + SSP0_IRQHandler, // 38 + SSP1_IRQHandler, // 39 + UART0_IRQHandler, // 40 + UART1_IRQHandler, // 41 + UART2_IRQHandler, // 42 + UART3_IRQHandler, // 43 + I2S0_IRQHandler, // 44 + I2S1_IRQHandler, // 45 + SPIFI_IRQHandler, // 46 + SGPIO_IRQHandler, // 47 + GPIO0_IRQHandler, // 48 + GPIO1_IRQHandler, // 49 + GPIO2_IRQHandler, // 50 + GPIO3_IRQHandler, // 51 + GPIO4_IRQHandler, // 52 + GPIO5_IRQHandler, // 53 + GPIO6_IRQHandler, // 54 + GPIO7_IRQHandler, // 55 + GINT0_IRQHandler, // 56 + GINT1_IRQHandler, // 57 + EVRT_IRQHandler, // 58 + CAN1_IRQHandler, // 59 + 0, // 60 + 0, // 61 + ATIMER_IRQHandler, // 62 + RTC_IRQHandler, // 63 + 0, // 64 + WDT_IRQHandler, // 65 + 0, // 66 + CAN0_IRQHandler, // 67 + QEI_IRQHandler, // 68 +}; diff --git a/IDE/LPCXPRESSO/wolf_example/src/sysinit.c b/IDE/LPCXPRESSO/wolf_example/src/sysinit.c deleted file mode 100644 index 187eebb51..000000000 --- a/IDE/LPCXPRESSO/wolf_example/src/sysinit.c +++ /dev/null @@ -1,89 +0,0 @@ -/* - * @brief Common SystemInit function for LPC18xx/LPC43xx chips - * - * @note - * Copyright(C) NXP Semiconductors, 2013 - * All rights reserved. - * - * @par - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * LPC products. This software is supplied "AS IS" without any warranties of - * any kind, and NXP Semiconductors and its licensor disclaim any and - * all warranties, express or implied, including all implied warranties of - * merchantability, fitness for a particular purpose and non-infringement of - * intellectual property rights. NXP Semiconductors assumes no responsibility - * or liability for the use of the software, conveys no license or rights under any - * patent, copyright, mask work right, or any other intellectual property rights in - * or to any products. NXP Semiconductors reserves the right to make changes - * in the software without notification. NXP Semiconductors also makes no - * representation or warranty that such application will be suitable for the - * specified use without further testing or modification. - * - * @par - * Permission to use, copy, modify, and distribute this software and its - * documentation is hereby granted, under NXP Semiconductors' and its - * licensor's relevant copyrights in the software, without fee, provided that it - * is used in conjunction with NXP Semiconductors microcontrollers. This - * copyright, permission, and disclaimer notice must appear in all copies of - * this code. - */ - -/***************************************************************************** - * Private types/enumerations/variables - ****************************************************************************/ - -/***************************************************************************** - * Public types/enumerations/variables - ****************************************************************************/ - -#if defined(NO_BOARD_LIB) -#include "chip.h" -const uint32_t ExtRateIn = 0; -const uint32_t OscRateIn = 12000000; -#else -#include "board.h" -#endif - -/***************************************************************************** - * Private functions - ****************************************************************************/ - -/***************************************************************************** - * Public functions - ****************************************************************************/ - -/* Set up and initialize hardware prior to call to main */ -void SystemInit(void) -{ -#if defined(CORE_M3) || defined(CORE_M4) - unsigned int *pSCB_VTOR = (unsigned int *) 0xE000ED08; - -#if defined(__IAR_SYSTEMS_ICC__) - extern void *__vector_table; - - *pSCB_VTOR = (unsigned int) &__vector_table; -#elif defined(__CODE_RED) - extern void *g_pfnVectors; - - *pSCB_VTOR = (unsigned int) &g_pfnVectors; -#elif defined(__ARMCC_VERSION) - extern void *__Vectors; - - *pSCB_VTOR = (unsigned int) &__Vectors; -#endif - -#if defined(__FPU_PRESENT) && __FPU_PRESENT == 1 - fpuInit(); -#endif - -#if defined(NO_BOARD_LIB) - /* Chip specific SystemInit */ - Chip_SystemInit(); -#else - /* Board specific SystemInit */ - Board_SystemInit(); -#endif - -#endif /* defined(CORE_M3) || defined(CORE_M4) */ -} diff --git a/IDE/LPCXPRESSO/wolf_example/src/wolfssl_example.c b/IDE/LPCXPRESSO/wolf_example/src/wolfssl_example.c index c60804641..3e394d891 100644 --- a/IDE/LPCXPRESSO/wolf_example/src/wolfssl_example.c +++ b/IDE/LPCXPRESSO/wolf_example/src/wolfssl_example.c @@ -17,8 +17,8 @@ ****************************************************************************/ /* UART definitions */ -#define LPC_UART LPC_USART0 -#define UARTx_IRQn USART0_IRQn +#define LPC_UART LPC_USART0 +#define UARTx_IRQn USART0_IRQn /***************************************************************************** @@ -31,8 +31,8 @@ typedef struct func_args { } func_args; const char menu1[] = "\r\n" - "\tt. WolfSSL Test\r\n" - "\tb. WolfSSL Benchmark\r\n"; + "\tt. WolfSSL Test\r\n" + "\tb. WolfSSL Benchmark\r\n"; /***************************************************************************** * Private functions @@ -43,53 +43,53 @@ const char menu1[] = "\r\n" ****************************************************************************/ int main(void) { - int opt = 0; - uint8_t buffer[1]; - func_args args; - - SystemCoreClockUpdate(); - Board_Init(); - Board_UART_Init(LPC_UART); - Chip_UART_Init(LPC_UART); - Chip_UART_SetBaud(LPC_UART, 115200); - Chip_UART_ConfigData(LPC_UART, UART_LCR_WLEN8 | UART_LCR_SBS_1BIT); /* Default 8-N-1 */ - Chip_UART_TXEnable(LPC_UART); - Chip_UART_SetupFIFOS(LPC_UART, (UART_FCR_FIFO_EN | UART_FCR_RX_RS | - UART_FCR_TX_RS | UART_FCR_DMAMODE_SEL | UART_FCR_TRG_LEV0)); - Chip_UART_IntEnable(LPC_UART, (UART_IER_ABEOINT | UART_IER_ABTOINT)); - NVIC_SetPriority(UARTx_IRQn, 1); - NVIC_EnableIRQ(UARTx_IRQn); + int opt = 0; + uint8_t buffer[1]; + func_args args; - Chip_OTP_Init(); + SystemCoreClockUpdate(); + Board_Init(); + Board_UART_Init(LPC_UART); + Chip_UART_Init(LPC_UART); + Chip_UART_SetBaud(LPC_UART, 115200); + Chip_UART_ConfigData(LPC_UART, UART_LCR_WLEN8 | UART_LCR_SBS_1BIT); /* Default 8-N-1 */ + Chip_UART_TXEnable(LPC_UART); + Chip_UART_SetupFIFOS(LPC_UART, (UART_FCR_FIFO_EN | UART_FCR_RX_RS | + UART_FCR_TX_RS | UART_FCR_DMAMODE_SEL | UART_FCR_TRG_LEV0)); + Chip_UART_IntEnable(LPC_UART, (UART_IER_ABEOINT | UART_IER_ABTOINT)); + NVIC_SetPriority(UARTx_IRQn, 1); + NVIC_EnableIRQ(UARTx_IRQn); - while (1) { - DEBUGOUT("\r\n\t\t\t\tMENU\r\n"); - DEBUGOUT(menu1); - DEBUGOUT("Please select one of the above options: "); + Chip_OTP_Init(); - opt = 0; - while (opt == 0) { - opt = Chip_UART_Read(LPC_UART, buffer, sizeof(buffer)); - } + while (1) { + DEBUGOUT("\r\n\t\t\t\tMENU\r\n"); + DEBUGOUT(menu1); + DEBUGOUT("Please select one of the above options: "); - switch (buffer[0]) { + opt = 0; + while (opt == 0) { + opt = Chip_UART_Read(LPC_UART, buffer, sizeof(buffer)); + } - case 't': - memset(&args, 0, sizeof(args)); - printf("\nCrypt Test\n"); - wolfcrypt_test(&args); - printf("Crypt Test: Return code %d\n", args.return_code); - break; + switch (buffer[0]) { - case 'b': - memset(&args, 0, sizeof(args)); - printf("\nBenchmark Test\n"); - benchmark_test(&args); - printf("Benchmark Test: Return code %d\n", args.return_code); - break; + case 't': + memset(&args, 0, sizeof(args)); + printf("\nCrypt Test\n"); + wolfcrypt_test(&args); + printf("Crypt Test: Return code %d\n", args.return_code); + break; - // All other cases go here - default: DEBUGOUT("\r\nSelection out of range\r\n"); break; - } - } + case 'b': + memset(&args, 0, sizeof(args)); + printf("\nBenchmark Test\n"); + benchmark_test(&args); + printf("Benchmark Test: Return code %d\n", args.return_code); + break; + + // All other cases go here + default: DEBUGOUT("\r\nSelection out of range\r\n"); break; + } + } }