diff --git a/configure.ac b/configure.ac index b1ea55171..c49e60fba 100644 --- a/configure.ac +++ b/configure.ac @@ -2061,6 +2061,7 @@ then esac # Include options.h AM_CCASFLAGS="$AM_CCASFLAGS -DEXTERNAL_OPTS_OPENVPN" + ENABLED_ARMASM_CRYPTO=yes # Check for and set -mstrict-align compiler flag # Used to set assumption that Aarch64 systems will not handle @@ -2077,12 +2078,22 @@ then AM_CPPFLAGS="$AM_CPPFLAGS -mstrict-align" AC_MSG_NOTICE([64bit ARMv8, setting -mstrict-align]);; esac - AC_MSG_NOTICE([64bit ARMv8 found, setting mcpu to generic+crypto]);; + AC_MSG_NOTICE([64bit ARMv8 found, setting mcpu to generic+crypto]) + ;; + armv7a) + AM_CPPFLAGS="$AM_CPPFLAGS -march=armv7-a -mfpu=neon-vfpv3 -DWOLFSSL_ARMASM_NO_CRYPTO" + # Include options.h + AM_CCASFLAGS="$AM_CCASFLAGS -DEXTERNAL_OPTS_OPENVPN" + ENABLED_ARMASM_CRYPTO=no + AC_MSG_NOTICE([32bit ARMv7-a found, setting mfpu to neon-vfpv3]) + ;; *) AM_CPPFLAGS="$AM_CPPFLAGS -mfpu=crypto-neon-fp-armv8" # Include options.h AM_CCASFLAGS="$AM_CCASFLAGS -DEXTERNAL_OPTS_OPENVPN" - AC_MSG_NOTICE([32bit ARMv8 found, setting mfpu to crypto-neon-fp-armv8]);; + ENABLED_ARMASM_CRYPTO=yes + AC_MSG_NOTICE([32bit ARMv8 found, setting mfpu to crypto-neon-fp-armv8]) + ;; esac esac fi @@ -7998,6 +8009,7 @@ AM_CONDITIONAL([BUILD_AESGCM],[test "x$ENABLED_AESGCM" = "xyes" || test "x$ENABL AM_CONDITIONAL([BUILD_AESCCM],[test "x$ENABLED_AESCCM" = "xyes" || test "x$ENABLED_USERSETTINGS" = "xyes"]) AM_CONDITIONAL([BUILD_ARMASM],[test "x$ENABLED_ARMASM" = "xyes"]) AM_CONDITIONAL([BUILD_ARMASM_INLINE],[test "x$ENABLED_ARMASM_INLINE" = "xyes"]) +AM_CONDITIONAL([BUILD_ARMASM_CRYPTO],[test "x$ENABLED_ARMASM_CRYPTO" = "xyes"]) AM_CONDITIONAL([BUILD_XILINX],[test "x$ENABLED_XILINX" = "xyes"]) AM_CONDITIONAL([BUILD_AESNI],[test "x$ENABLED_AESNI" = "xyes"]) AM_CONDITIONAL([BUILD_INTELASM],[test "x$ENABLED_INTELASM" = "xyes"]) diff --git a/src/include.am b/src/include.am index ab12ae4e9..9a8b70a1b 100644 --- a/src/include.am +++ b/src/include.am @@ -187,7 +187,7 @@ endif if BUILD_AES src_libwolfssl_la_SOURCES += wolfcrypt/src/aes.c -if BUILD_ARMASM +if BUILD_ARMASM_CRYPTO src_libwolfssl_la_SOURCES += wolfcrypt/src/port/arm/armv8-aes.c endif endif @@ -203,6 +203,11 @@ endif if BUILD_ARMASM src_libwolfssl_la_SOURCES += wolfcrypt/src/port/arm/armv8-sha256.c +if BUILD_ARMASM_INLINE +src_libwolfssl_la_SOURCES += wolfcrypt/src/port/arm/armv8-32-sha256-asm_c.c +else +src_libwolfssl_la_SOURCES += wolfcrypt/src/port/arm/armv8-32-sha256-asm.S +endif else src_libwolfssl_la_SOURCES += wolfcrypt/src/sha256.c if BUILD_INTELASM @@ -300,10 +305,15 @@ endif endif !BUILD_FIPS_CURRENT if !BUILD_FIPS_CURRENT +src_libwolfssl_la_SOURCES += wolfcrypt/src/sha256.c if BUILD_ARMASM src_libwolfssl_la_SOURCES += wolfcrypt/src/port/arm/armv8-sha256.c +if BUILD_ARMASM_INLINE +src_libwolfssl_la_SOURCES += wolfcrypt/src/port/arm/armv8-32-sha256-asm_c.c +else +src_libwolfssl_la_SOURCES += wolfcrypt/src/port/arm/armv8-32-sha256-asm.S +endif else -src_libwolfssl_la_SOURCES += wolfcrypt/src/sha256.c if BUILD_INTELASM src_libwolfssl_la_SOURCES += wolfcrypt/src/sha256_asm.S endif @@ -383,7 +393,7 @@ endif if !BUILD_FIPS_CURRENT if BUILD_AES src_libwolfssl_la_SOURCES += wolfcrypt/src/aes.c -if BUILD_ARMASM +if BUILD_ARMASM_CRYPTO src_libwolfssl_la_SOURCES += wolfcrypt/src/port/arm/armv8-aes.c endif if BUILD_AFALG diff --git a/wolfcrypt/src/aes.c b/wolfcrypt/src/aes.c index cc1055d43..e8fa52d22 100644 --- a/wolfcrypt/src/aes.c +++ b/wolfcrypt/src/aes.c @@ -306,7 +306,7 @@ block cipher mechanism that uses n-bit binary string parameter key with 128-bits #include #endif -#if !defined(WOLFSSL_ARMASM) +#if !defined(WOLFSSL_ARMASM) || defined(WOLFSSL_ARMASM_NO_CRYPTO) #ifdef WOLFSSL_IMX6_CAAM_BLOB /* case of possibly not using hardware acceleration for AES but using key @@ -4601,7 +4601,7 @@ static WC_INLINE void IncCtr(byte* ctr, word32 ctrSz) #endif -#ifdef WOLFSSL_ARMASM +#if defined(WOLFSSL_ARMASM) && !defined(WOLFSSL_ARMASM_NO_CRYPTO) /* implementation is located in wolfcrypt/src/port/arm/armv8-aes.c */ #elif defined(WOLFSSL_AFALG) @@ -9933,7 +9933,7 @@ int wc_AesCcmCheckTagSize(int sz) return 0; } -#ifdef WOLFSSL_ARMASM +#if defined(WOLFSSL_ARMASM) && !defined(WOLFSSL_ARMASM_NO_CRYPTO) /* implementation located in wolfcrypt/src/port/arm/armv8-aes.c */ #elif defined(HAVE_COLDFIRE_SEC) diff --git a/wolfcrypt/src/port/arm/armv8-32-sha256-asm.S b/wolfcrypt/src/port/arm/armv8-32-sha256-asm.S new file mode 100644 index 000000000..6132aac4a --- /dev/null +++ b/wolfcrypt/src/port/arm/armv8-32-sha256-asm.S @@ -0,0 +1,2504 @@ +/* armv8-32-sha256-asm + * + * Copyright (C) 2006-2021 wolfSSL Inc. + * + * This file is part of wolfSSL. + * + * wolfSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * wolfSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA + */ + +/* Generated using (from wolfssl): + * cd ../scripts + * ruby ./sha2/sha256.rb arm32 ../wolfssl/wolfcrypt/src/port/arm/armv8-32-sha256-asm.S + */ + +#include + +#ifdef WOLFSSL_ARMASM +#ifndef __aarch64__ +#ifndef NO_SHA256 +#ifdef WOLFSSL_ARMASM_NO_NEON + .text + .type L_SHA256_transform_len_k, %object + .size L_SHA256_transform_len_k, 256 + .align 3 +L_SHA256_transform_len_k: + .word 0x428a2f98 + .word 0x71374491 + .word 0xb5c0fbcf + .word 0xe9b5dba5 + .word 0x3956c25b + .word 0x59f111f1 + .word 0x923f82a4 + .word 0xab1c5ed5 + .word 0xd807aa98 + .word 0x12835b01 + .word 0x243185be + .word 0x550c7dc3 + .word 0x72be5d74 + .word 0x80deb1fe + .word 0x9bdc06a7 + .word 0xc19bf174 + .word 0xe49b69c1 + .word 0xefbe4786 + .word 0xfc19dc6 + .word 0x240ca1cc + .word 0x2de92c6f + .word 0x4a7484aa + .word 0x5cb0a9dc + .word 0x76f988da + .word 0x983e5152 + .word 0xa831c66d + .word 0xb00327c8 + .word 0xbf597fc7 + .word 0xc6e00bf3 + .word 0xd5a79147 + .word 0x6ca6351 + .word 0x14292967 + .word 0x27b70a85 + .word 0x2e1b2138 + .word 0x4d2c6dfc + .word 0x53380d13 + .word 0x650a7354 + .word 0x766a0abb + .word 0x81c2c92e + .word 0x92722c85 + .word 0xa2bfe8a1 + .word 0xa81a664b + .word 0xc24b8b70 + .word 0xc76c51a3 + .word 0xd192e819 + .word 0xd6990624 + .word 0xf40e3585 + .word 0x106aa070 + .word 0x19a4c116 + .word 0x1e376c08 + .word 0x2748774c + .word 0x34b0bcb5 + .word 0x391c0cb3 + .word 0x4ed8aa4a + .word 0x5b9cca4f + .word 0x682e6ff3 + .word 0x748f82ee + .word 0x78a5636f + .word 0x84c87814 + .word 0x8cc70208 + .word 0x90befffa + .word 0xa4506ceb + .word 0xbef9a3f7 + .word 0xc67178f2 + .text + .align 2 + .globl Transform_Sha256_Len + .type Transform_Sha256_Len, %function +Transform_Sha256_Len: + push {r4, r5, r6, r7, r8, r9, r10, lr} + sub sp, sp, #0xc0 + adr r3, L_SHA256_transform_len_k + # Copy digest to add in at end + ldr r12, [r0] + ldr lr, [r0, #4] + ldrd r4, r5, [r0, #8] + ldrd r6, r7, [r0, #16] + ldrd r8, r9, [r0, #24] + str r12, [sp, #64] + str lr, [sp, #68] + strd r4, r5, [sp, #72] + strd r6, r7, [sp, #80] + strd r8, r9, [sp, #88] + # Start of loop processing a block +L_SHA256_transform_len_begin: + # Load, Reverse and Store W - 64 bytes + ldr r12, [r1] + ldr lr, [r1, #4] + ldrd r4, r5, [r1, #8] + ldrd r6, r7, [r1, #16] + ldrd r8, r9, [r1, #24] + rev r12, r12 + rev lr, lr + rev r4, r4 + rev r5, r5 + rev r6, r6 + rev r7, r7 + rev r8, r8 + rev r9, r9 + str r12, [sp] + str lr, [sp, #4] + strd r4, r5, [sp, #8] + strd r6, r7, [sp, #16] + strd r8, r9, [sp, #24] + ldr r12, [r1, #32] + ldr lr, [r1, #36] + ldrd r4, r5, [r1, #40] + ldrd r6, r7, [r1, #48] + ldrd r8, r9, [r1, #56] + rev r12, r12 + rev lr, lr + rev r4, r4 + rev r5, r5 + rev r6, r6 + rev r7, r7 + rev r8, r8 + rev r9, r9 + str r12, [sp, #32] + str lr, [sp, #36] + strd r4, r5, [sp, #40] + strd r6, r7, [sp, #48] + strd r8, r9, [sp, #56] + ldr r9, [r0, #4] + ldr r12, [r0, #8] + eor r9, r9, r12 + mov r10, #3 + # Start of 16 rounds +L_SHA256_transform_len_start: + # Round 0 + ldr lr, [r0, #16] + ldr r4, [r0, #20] + ldr r5, [r0, #24] + ldr r7, [r0, #28] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp] + ldr r4, [r3] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0] + ldr r4, [r0, #4] + ldr r5, [r0, #8] + ldr r6, [r0, #12] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #12] + str r7, [r0, #28] + # Calc new W[0] + ldr r4, [sp, #56] + ldr r5, [sp, #36] + ldr r6, [sp, #4] + ldr r7, [sp] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp] + # Round 1 + ldr lr, [r0, #12] + ldr r4, [r0, #16] + ldr r5, [r0, #20] + ldr r7, [r0, #24] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #4] + ldr r4, [r3, #4] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #28] + ldr r4, [r0] + ldr r5, [r0, #4] + ldr r6, [r0, #8] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0, #8] + str r7, [r0, #24] + # Calc new W[1] + ldr r4, [sp, #60] + ldr r5, [sp, #40] + ldr r6, [sp, #8] + ldr r7, [sp, #4] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #4] + # Round 2 + ldr lr, [r0, #8] + ldr r4, [r0, #12] + ldr r5, [r0, #16] + ldr r7, [r0, #20] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #8] + ldr r4, [r3, #8] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #24] + ldr r4, [r0, #28] + ldr r5, [r0] + ldr r6, [r0, #4] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #4] + str r7, [r0, #20] + # Calc new W[2] + ldr r4, [sp] + ldr r5, [sp, #44] + ldr r6, [sp, #12] + ldr r7, [sp, #8] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #8] + # Round 3 + ldr lr, [r0, #4] + ldr r4, [r0, #8] + ldr r5, [r0, #12] + ldr r7, [r0, #16] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #12] + ldr r4, [r3, #12] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #20] + ldr r4, [r0, #24] + ldr r5, [r0, #28] + ldr r6, [r0] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0] + str r7, [r0, #16] + # Calc new W[3] + ldr r4, [sp, #4] + ldr r5, [sp, #48] + ldr r6, [sp, #16] + ldr r7, [sp, #12] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #12] + # Round 4 + ldr lr, [r0] + ldr r4, [r0, #4] + ldr r5, [r0, #8] + ldr r7, [r0, #12] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #16] + ldr r4, [r3, #16] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #16] + ldr r4, [r0, #20] + ldr r5, [r0, #24] + ldr r6, [r0, #28] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #28] + str r7, [r0, #12] + # Calc new W[4] + ldr r4, [sp, #8] + ldr r5, [sp, #52] + ldr r6, [sp, #20] + ldr r7, [sp, #16] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #16] + # Round 5 + ldr lr, [r0, #28] + ldr r4, [r0] + ldr r5, [r0, #4] + ldr r7, [r0, #8] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #20] + ldr r4, [r3, #20] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #12] + ldr r4, [r0, #16] + ldr r5, [r0, #20] + ldr r6, [r0, #24] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0, #24] + str r7, [r0, #8] + # Calc new W[5] + ldr r4, [sp, #12] + ldr r5, [sp, #56] + ldr r6, [sp, #24] + ldr r7, [sp, #20] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #20] + # Round 6 + ldr lr, [r0, #24] + ldr r4, [r0, #28] + ldr r5, [r0] + ldr r7, [r0, #4] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #24] + ldr r4, [r3, #24] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #8] + ldr r4, [r0, #12] + ldr r5, [r0, #16] + ldr r6, [r0, #20] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #20] + str r7, [r0, #4] + # Calc new W[6] + ldr r4, [sp, #16] + ldr r5, [sp, #60] + ldr r6, [sp, #28] + ldr r7, [sp, #24] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #24] + # Round 7 + ldr lr, [r0, #20] + ldr r4, [r0, #24] + ldr r5, [r0, #28] + ldr r7, [r0] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #28] + ldr r4, [r3, #28] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #4] + ldr r4, [r0, #8] + ldr r5, [r0, #12] + ldr r6, [r0, #16] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0, #16] + str r7, [r0] + # Calc new W[7] + ldr r4, [sp, #20] + ldr r5, [sp] + ldr r6, [sp, #32] + ldr r7, [sp, #28] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #28] + # Round 8 + ldr lr, [r0, #16] + ldr r4, [r0, #20] + ldr r5, [r0, #24] + ldr r7, [r0, #28] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #32] + ldr r4, [r3, #32] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0] + ldr r4, [r0, #4] + ldr r5, [r0, #8] + ldr r6, [r0, #12] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #12] + str r7, [r0, #28] + # Calc new W[8] + ldr r4, [sp, #24] + ldr r5, [sp, #4] + ldr r6, [sp, #36] + ldr r7, [sp, #32] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #32] + # Round 9 + ldr lr, [r0, #12] + ldr r4, [r0, #16] + ldr r5, [r0, #20] + ldr r7, [r0, #24] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #36] + ldr r4, [r3, #36] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #28] + ldr r4, [r0] + ldr r5, [r0, #4] + ldr r6, [r0, #8] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0, #8] + str r7, [r0, #24] + # Calc new W[9] + ldr r4, [sp, #28] + ldr r5, [sp, #8] + ldr r6, [sp, #40] + ldr r7, [sp, #36] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #36] + # Round 10 + ldr lr, [r0, #8] + ldr r4, [r0, #12] + ldr r5, [r0, #16] + ldr r7, [r0, #20] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #40] + ldr r4, [r3, #40] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #24] + ldr r4, [r0, #28] + ldr r5, [r0] + ldr r6, [r0, #4] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #4] + str r7, [r0, #20] + # Calc new W[10] + ldr r4, [sp, #32] + ldr r5, [sp, #12] + ldr r6, [sp, #44] + ldr r7, [sp, #40] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #40] + # Round 11 + ldr lr, [r0, #4] + ldr r4, [r0, #8] + ldr r5, [r0, #12] + ldr r7, [r0, #16] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #44] + ldr r4, [r3, #44] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #20] + ldr r4, [r0, #24] + ldr r5, [r0, #28] + ldr r6, [r0] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0] + str r7, [r0, #16] + # Calc new W[11] + ldr r4, [sp, #36] + ldr r5, [sp, #16] + ldr r6, [sp, #48] + ldr r7, [sp, #44] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #44] + # Round 12 + ldr lr, [r0] + ldr r4, [r0, #4] + ldr r5, [r0, #8] + ldr r7, [r0, #12] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #48] + ldr r4, [r3, #48] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #16] + ldr r4, [r0, #20] + ldr r5, [r0, #24] + ldr r6, [r0, #28] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #28] + str r7, [r0, #12] + # Calc new W[12] + ldr r4, [sp, #40] + ldr r5, [sp, #20] + ldr r6, [sp, #52] + ldr r7, [sp, #48] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #48] + # Round 13 + ldr lr, [r0, #28] + ldr r4, [r0] + ldr r5, [r0, #4] + ldr r7, [r0, #8] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #52] + ldr r4, [r3, #52] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #12] + ldr r4, [r0, #16] + ldr r5, [r0, #20] + ldr r6, [r0, #24] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0, #24] + str r7, [r0, #8] + # Calc new W[13] + ldr r4, [sp, #44] + ldr r5, [sp, #24] + ldr r6, [sp, #56] + ldr r7, [sp, #52] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #52] + # Round 14 + ldr lr, [r0, #24] + ldr r4, [r0, #28] + ldr r5, [r0] + ldr r7, [r0, #4] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #56] + ldr r4, [r3, #56] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #8] + ldr r4, [r0, #12] + ldr r5, [r0, #16] + ldr r6, [r0, #20] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #20] + str r7, [r0, #4] + # Calc new W[14] + ldr r4, [sp, #48] + ldr r5, [sp, #28] + ldr r6, [sp, #60] + ldr r7, [sp, #56] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #56] + # Round 15 + ldr lr, [r0, #20] + ldr r4, [r0, #24] + ldr r5, [r0, #28] + ldr r7, [r0] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #60] + ldr r4, [r3, #60] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #4] + ldr r4, [r0, #8] + ldr r5, [r0, #12] + ldr r6, [r0, #16] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0, #16] + str r7, [r0] + # Calc new W[15] + ldr r4, [sp, #52] + ldr r5, [sp, #32] + ldr r6, [sp] + ldr r7, [sp, #60] + ror r12, r4, #17 + ror lr, r6, #7 + eor r12, r12, r4, ror #19 + eor lr, lr, r6, ror #18 + eor r12, r12, r4, lsr #10 + eor lr, lr, r6, lsr #3 + add r7, r7, r5 + add r12, r12, lr + add r7, r7, r12 + str r7, [sp, #60] + add r3, r3, #0x40 + subs r10, r10, #1 + bne L_SHA256_transform_len_start + # Round 0 + ldr lr, [r0, #16] + ldr r4, [r0, #20] + ldr r5, [r0, #24] + ldr r7, [r0, #28] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp] + ldr r4, [r3] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0] + ldr r4, [r0, #4] + ldr r5, [r0, #8] + ldr r6, [r0, #12] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #12] + str r7, [r0, #28] + # Round 1 + ldr lr, [r0, #12] + ldr r4, [r0, #16] + ldr r5, [r0, #20] + ldr r7, [r0, #24] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #4] + ldr r4, [r3, #4] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #28] + ldr r4, [r0] + ldr r5, [r0, #4] + ldr r6, [r0, #8] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0, #8] + str r7, [r0, #24] + # Round 2 + ldr lr, [r0, #8] + ldr r4, [r0, #12] + ldr r5, [r0, #16] + ldr r7, [r0, #20] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #8] + ldr r4, [r3, #8] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #24] + ldr r4, [r0, #28] + ldr r5, [r0] + ldr r6, [r0, #4] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #4] + str r7, [r0, #20] + # Round 3 + ldr lr, [r0, #4] + ldr r4, [r0, #8] + ldr r5, [r0, #12] + ldr r7, [r0, #16] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #12] + ldr r4, [r3, #12] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #20] + ldr r4, [r0, #24] + ldr r5, [r0, #28] + ldr r6, [r0] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0] + str r7, [r0, #16] + # Round 4 + ldr lr, [r0] + ldr r4, [r0, #4] + ldr r5, [r0, #8] + ldr r7, [r0, #12] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #16] + ldr r4, [r3, #16] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #16] + ldr r4, [r0, #20] + ldr r5, [r0, #24] + ldr r6, [r0, #28] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #28] + str r7, [r0, #12] + # Round 5 + ldr lr, [r0, #28] + ldr r4, [r0] + ldr r5, [r0, #4] + ldr r7, [r0, #8] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #20] + ldr r4, [r3, #20] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #12] + ldr r4, [r0, #16] + ldr r5, [r0, #20] + ldr r6, [r0, #24] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0, #24] + str r7, [r0, #8] + # Round 6 + ldr lr, [r0, #24] + ldr r4, [r0, #28] + ldr r5, [r0] + ldr r7, [r0, #4] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #24] + ldr r4, [r3, #24] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #8] + ldr r4, [r0, #12] + ldr r5, [r0, #16] + ldr r6, [r0, #20] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #20] + str r7, [r0, #4] + # Round 7 + ldr lr, [r0, #20] + ldr r4, [r0, #24] + ldr r5, [r0, #28] + ldr r7, [r0] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #28] + ldr r4, [r3, #28] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #4] + ldr r4, [r0, #8] + ldr r5, [r0, #12] + ldr r6, [r0, #16] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0, #16] + str r7, [r0] + # Round 8 + ldr lr, [r0, #16] + ldr r4, [r0, #20] + ldr r5, [r0, #24] + ldr r7, [r0, #28] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #32] + ldr r4, [r3, #32] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0] + ldr r4, [r0, #4] + ldr r5, [r0, #8] + ldr r6, [r0, #12] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #12] + str r7, [r0, #28] + # Round 9 + ldr lr, [r0, #12] + ldr r4, [r0, #16] + ldr r5, [r0, #20] + ldr r7, [r0, #24] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #36] + ldr r4, [r3, #36] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #28] + ldr r4, [r0] + ldr r5, [r0, #4] + ldr r6, [r0, #8] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0, #8] + str r7, [r0, #24] + # Round 10 + ldr lr, [r0, #8] + ldr r4, [r0, #12] + ldr r5, [r0, #16] + ldr r7, [r0, #20] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #40] + ldr r4, [r3, #40] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #24] + ldr r4, [r0, #28] + ldr r5, [r0] + ldr r6, [r0, #4] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #4] + str r7, [r0, #20] + # Round 11 + ldr lr, [r0, #4] + ldr r4, [r0, #8] + ldr r5, [r0, #12] + ldr r7, [r0, #16] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #44] + ldr r4, [r3, #44] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #20] + ldr r4, [r0, #24] + ldr r5, [r0, #28] + ldr r6, [r0] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0] + str r7, [r0, #16] + # Round 12 + ldr lr, [r0] + ldr r4, [r0, #4] + ldr r5, [r0, #8] + ldr r7, [r0, #12] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #48] + ldr r4, [r3, #48] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #16] + ldr r4, [r0, #20] + ldr r5, [r0, #24] + ldr r6, [r0, #28] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #28] + str r7, [r0, #12] + # Round 13 + ldr lr, [r0, #28] + ldr r4, [r0] + ldr r5, [r0, #4] + ldr r7, [r0, #8] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #52] + ldr r4, [r3, #52] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #12] + ldr r4, [r0, #16] + ldr r5, [r0, #20] + ldr r6, [r0, #24] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0, #24] + str r7, [r0, #8] + # Round 14 + ldr lr, [r0, #24] + ldr r4, [r0, #28] + ldr r5, [r0] + ldr r7, [r0, #4] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #56] + ldr r4, [r3, #56] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #8] + ldr r4, [r0, #12] + ldr r5, [r0, #16] + ldr r6, [r0, #20] + ror r12, lr, #2 + eor r8, lr, r4 + eor r12, r12, lr, ror #13 + and r9, r9, r8 + eor r12, r12, lr, ror #22 + eor r9, r9, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r9 + str r6, [r0, #20] + str r7, [r0, #4] + # Round 15 + ldr lr, [r0, #20] + ldr r4, [r0, #24] + ldr r5, [r0, #28] + ldr r7, [r0] + ror r12, lr, #6 + eor r4, r4, r5 + eor r12, r12, lr, ror #11 + and r4, r4, lr + eor r12, r12, lr, ror #25 + eor r4, r4, r5 + add r7, r7, r12 + add r7, r7, r4 + ldr lr, [sp, #60] + ldr r4, [r3, #60] + add r7, r7, lr + add r7, r7, r4 + ldr lr, [r0, #4] + ldr r4, [r0, #8] + ldr r5, [r0, #12] + ldr r6, [r0, #16] + ror r12, lr, #2 + eor r9, lr, r4 + eor r12, r12, lr, ror #13 + and r8, r8, r9 + eor r12, r12, lr, ror #22 + eor r8, r8, r4 + add r6, r6, r7 + add r7, r7, r12 + add r7, r7, r8 + str r6, [r0, #16] + str r7, [r0] + # Add in digest from start + ldr r12, [r0] + ldr lr, [r0, #4] + ldrd r4, r5, [r0, #8] + ldrd r6, r7, [sp, #64] + ldrd r8, r9, [sp, #72] + add r12, r12, r6 + add lr, lr, r7 + add r4, r4, r8 + add r5, r5, r9 + str r12, [r0] + str lr, [r0, #4] + strd r4, r5, [r0, #8] + str r12, [sp, #64] + str lr, [sp, #68] + strd r4, r5, [sp, #72] + ldr r12, [r0, #16] + ldr lr, [r0, #20] + ldrd r4, r5, [r0, #24] + ldrd r6, r7, [sp, #80] + ldrd r8, r9, [sp, #88] + add r12, r12, r6 + add lr, lr, r7 + add r4, r4, r8 + add r5, r5, r9 + str r12, [r0, #16] + str lr, [r0, #20] + strd r4, r5, [r0, #24] + str r12, [sp, #80] + str lr, [sp, #84] + strd r4, r5, [sp, #88] + subs r2, r2, #0x40 + sub r3, r3, #0xc0 + add r1, r1, #0x40 + bne L_SHA256_transform_len_begin + add sp, sp, #0xc0 + pop {r4, r5, r6, r7, r8, r9, r10, pc} + .size Transform_Sha256_Len,.-Transform_Sha256_Len +#endif /* WOLFSSL_ARMASM_NO_NEON */ +#ifndef WOLFSSL_ARMASM_NO_NEON + .text + .type L_SHA256_transform_neon_len_k, %object + .size L_SHA256_transform_neon_len_k, 256 + .align 3 +L_SHA256_transform_neon_len_k: + .word 0x428a2f98 + .word 0x71374491 + .word 0xb5c0fbcf + .word 0xe9b5dba5 + .word 0x3956c25b + .word 0x59f111f1 + .word 0x923f82a4 + .word 0xab1c5ed5 + .word 0xd807aa98 + .word 0x12835b01 + .word 0x243185be + .word 0x550c7dc3 + .word 0x72be5d74 + .word 0x80deb1fe + .word 0x9bdc06a7 + .word 0xc19bf174 + .word 0xe49b69c1 + .word 0xefbe4786 + .word 0xfc19dc6 + .word 0x240ca1cc + .word 0x2de92c6f + .word 0x4a7484aa + .word 0x5cb0a9dc + .word 0x76f988da + .word 0x983e5152 + .word 0xa831c66d + .word 0xb00327c8 + .word 0xbf597fc7 + .word 0xc6e00bf3 + .word 0xd5a79147 + .word 0x6ca6351 + .word 0x14292967 + .word 0x27b70a85 + .word 0x2e1b2138 + .word 0x4d2c6dfc + .word 0x53380d13 + .word 0x650a7354 + .word 0x766a0abb + .word 0x81c2c92e + .word 0x92722c85 + .word 0xa2bfe8a1 + .word 0xa81a664b + .word 0xc24b8b70 + .word 0xc76c51a3 + .word 0xd192e819 + .word 0xd6990624 + .word 0xf40e3585 + .word 0x106aa070 + .word 0x19a4c116 + .word 0x1e376c08 + .word 0x2748774c + .word 0x34b0bcb5 + .word 0x391c0cb3 + .word 0x4ed8aa4a + .word 0x5b9cca4f + .word 0x682e6ff3 + .word 0x748f82ee + .word 0x78a5636f + .word 0x84c87814 + .word 0x8cc70208 + .word 0x90befffa + .word 0xa4506ceb + .word 0xbef9a3f7 + .word 0xc67178f2 + .text + .align 2 + .globl Transform_Sha256_Len + .type Transform_Sha256_Len, %function +Transform_Sha256_Len: + push {r4, r5, r6, r7, r8, r9, r10, lr} + vpush {d8-d11} + sub sp, sp, #24 + strd r0, r1, [sp] + str r2, [sp, #8] + adr r12, L_SHA256_transform_neon_len_k + # Load digest into registers + ldrd r2, r3, [r0] + ldrd r4, r5, [r0, #8] + ldrd r6, r7, [r0, #16] + ldrd r8, r9, [r0, #24] + # Start of loop processing a block +L_SHA256_transform_neon_len_begin: + # Load W + vldm.32 r1!, {d0-d7} + vrev32.8 q0, q0 + vrev32.8 q1, q1 + vrev32.8 q2, q2 + vrev32.8 q3, q3 + str r1, [sp, #4] + mov lr, #3 + # Start of 16 rounds +L_SHA256_transform_neon_len_start: + # Round 0 + vmov r10, d0[0] + ror r0, r6, #6 + eor r1, r7, r8 + eor r0, r0, r6, ror #11 + and r1, r1, r6 + eor r0, r0, r6, ror #25 + eor r1, r1, r8 + add r9, r9, r0 + add r9, r9, r1 + ldr r0, [r12] + add r9, r9, r10 + add r9, r9, r0 + add r5, r5, r9 + ror r0, r2, #2 + eor r1, r2, r3 + eor r0, r0, r2, ror #13 + eor r10, r3, r4 + and r1, r1, r10 + eor r0, r0, r2, ror #22 + eor r1, r1, r3 + add r9, r9, r0 + add r9, r9, r1 + # Round 1 + vmov r10, d0[1] + # Calc new W[0]-W[1] + vext.8 d10, d0, d1, #4 + ror r0, r5, #6 + vshl.u32 d8, d7, #15 + eor r1, r6, r7 + vsri.u32 d8, d7, #17 + eor r0, r0, r5, ror #11 + vshl.u32 d9, d7, #13 + and r1, r1, r5 + vsri.u32 d9, d7, #19 + eor r0, r0, r5, ror #25 + veor d9, d8 + eor r1, r1, r7 + vshr.u32 d8, d7, #10 + add r8, r8, r0 + veor d9, d8 + add r8, r8, r1 + vadd.i32 d0, d9 + ldr r0, [r12, #4] + vext.8 d11, d4, d5, #4 + add r8, r8, r10 + vadd.i32 d0, d11 + add r8, r8, r0 + vshl.u32 d8, d10, #25 + add r4, r4, r8 + vsri.u32 d8, d10, #7 + ror r0, r9, #2 + vshl.u32 d9, d10, #14 + eor r1, r9, r2 + vsri.u32 d9, d10, #18 + eor r0, r0, r9, ror #13 + veor d9, d8 + eor r10, r2, r3 + vshr.u32 d10, #3 + and r1, r1, r10 + veor d9, d10 + eor r0, r0, r9, ror #22 + vadd.i32 d0, d9 + eor r1, r1, r2 + add r8, r8, r0 + add r8, r8, r1 + # Round 2 + vmov r10, d1[0] + ror r0, r4, #6 + eor r1, r5, r6 + eor r0, r0, r4, ror #11 + and r1, r1, r4 + eor r0, r0, r4, ror #25 + eor r1, r1, r6 + add r7, r7, r0 + add r7, r7, r1 + ldr r0, [r12, #8] + add r7, r7, r10 + add r7, r7, r0 + add r3, r3, r7 + ror r0, r8, #2 + eor r1, r8, r9 + eor r0, r0, r8, ror #13 + eor r10, r9, r2 + and r1, r1, r10 + eor r0, r0, r8, ror #22 + eor r1, r1, r9 + add r7, r7, r0 + add r7, r7, r1 + # Round 3 + vmov r10, d1[1] + # Calc new W[2]-W[3] + vext.8 d10, d1, d2, #4 + ror r0, r3, #6 + vshl.u32 d8, d0, #15 + eor r1, r4, r5 + vsri.u32 d8, d0, #17 + eor r0, r0, r3, ror #11 + vshl.u32 d9, d0, #13 + and r1, r1, r3 + vsri.u32 d9, d0, #19 + eor r0, r0, r3, ror #25 + veor d9, d8 + eor r1, r1, r5 + vshr.u32 d8, d0, #10 + add r6, r6, r0 + veor d9, d8 + add r6, r6, r1 + vadd.i32 d1, d9 + ldr r0, [r12, #12] + vext.8 d11, d5, d6, #4 + add r6, r6, r10 + vadd.i32 d1, d11 + add r6, r6, r0 + vshl.u32 d8, d10, #25 + add r2, r2, r6 + vsri.u32 d8, d10, #7 + ror r0, r7, #2 + vshl.u32 d9, d10, #14 + eor r1, r7, r8 + vsri.u32 d9, d10, #18 + eor r0, r0, r7, ror #13 + veor d9, d8 + eor r10, r8, r9 + vshr.u32 d10, #3 + and r1, r1, r10 + veor d9, d10 + eor r0, r0, r7, ror #22 + vadd.i32 d1, d9 + eor r1, r1, r8 + add r6, r6, r0 + add r6, r6, r1 + # Round 4 + vmov r10, d2[0] + ror r0, r2, #6 + eor r1, r3, r4 + eor r0, r0, r2, ror #11 + and r1, r1, r2 + eor r0, r0, r2, ror #25 + eor r1, r1, r4 + add r5, r5, r0 + add r5, r5, r1 + ldr r0, [r12, #16] + add r5, r5, r10 + add r5, r5, r0 + add r9, r9, r5 + ror r0, r6, #2 + eor r1, r6, r7 + eor r0, r0, r6, ror #13 + eor r10, r7, r8 + and r1, r1, r10 + eor r0, r0, r6, ror #22 + eor r1, r1, r7 + add r5, r5, r0 + add r5, r5, r1 + # Round 5 + vmov r10, d2[1] + # Calc new W[4]-W[5] + vext.8 d10, d2, d3, #4 + ror r0, r9, #6 + vshl.u32 d8, d1, #15 + eor r1, r2, r3 + vsri.u32 d8, d1, #17 + eor r0, r0, r9, ror #11 + vshl.u32 d9, d1, #13 + and r1, r1, r9 + vsri.u32 d9, d1, #19 + eor r0, r0, r9, ror #25 + veor d9, d8 + eor r1, r1, r3 + vshr.u32 d8, d1, #10 + add r4, r4, r0 + veor d9, d8 + add r4, r4, r1 + vadd.i32 d2, d9 + ldr r0, [r12, #20] + vext.8 d11, d6, d7, #4 + add r4, r4, r10 + vadd.i32 d2, d11 + add r4, r4, r0 + vshl.u32 d8, d10, #25 + add r8, r8, r4 + vsri.u32 d8, d10, #7 + ror r0, r5, #2 + vshl.u32 d9, d10, #14 + eor r1, r5, r6 + vsri.u32 d9, d10, #18 + eor r0, r0, r5, ror #13 + veor d9, d8 + eor r10, r6, r7 + vshr.u32 d10, #3 + and r1, r1, r10 + veor d9, d10 + eor r0, r0, r5, ror #22 + vadd.i32 d2, d9 + eor r1, r1, r6 + add r4, r4, r0 + add r4, r4, r1 + # Round 6 + vmov r10, d3[0] + ror r0, r8, #6 + eor r1, r9, r2 + eor r0, r0, r8, ror #11 + and r1, r1, r8 + eor r0, r0, r8, ror #25 + eor r1, r1, r2 + add r3, r3, r0 + add r3, r3, r1 + ldr r0, [r12, #24] + add r3, r3, r10 + add r3, r3, r0 + add r7, r7, r3 + ror r0, r4, #2 + eor r1, r4, r5 + eor r0, r0, r4, ror #13 + eor r10, r5, r6 + and r1, r1, r10 + eor r0, r0, r4, ror #22 + eor r1, r1, r5 + add r3, r3, r0 + add r3, r3, r1 + # Round 7 + vmov r10, d3[1] + # Calc new W[6]-W[7] + vext.8 d10, d3, d4, #4 + ror r0, r7, #6 + vshl.u32 d8, d2, #15 + eor r1, r8, r9 + vsri.u32 d8, d2, #17 + eor r0, r0, r7, ror #11 + vshl.u32 d9, d2, #13 + and r1, r1, r7 + vsri.u32 d9, d2, #19 + eor r0, r0, r7, ror #25 + veor d9, d8 + eor r1, r1, r9 + vshr.u32 d8, d2, #10 + add r2, r2, r0 + veor d9, d8 + add r2, r2, r1 + vadd.i32 d3, d9 + ldr r0, [r12, #28] + vext.8 d11, d7, d0, #4 + add r2, r2, r10 + vadd.i32 d3, d11 + add r2, r2, r0 + vshl.u32 d8, d10, #25 + add r6, r6, r2 + vsri.u32 d8, d10, #7 + ror r0, r3, #2 + vshl.u32 d9, d10, #14 + eor r1, r3, r4 + vsri.u32 d9, d10, #18 + eor r0, r0, r3, ror #13 + veor d9, d8 + eor r10, r4, r5 + vshr.u32 d10, #3 + and r1, r1, r10 + veor d9, d10 + eor r0, r0, r3, ror #22 + vadd.i32 d3, d9 + eor r1, r1, r4 + add r2, r2, r0 + add r2, r2, r1 + # Round 8 + vmov r10, d4[0] + ror r0, r6, #6 + eor r1, r7, r8 + eor r0, r0, r6, ror #11 + and r1, r1, r6 + eor r0, r0, r6, ror #25 + eor r1, r1, r8 + add r9, r9, r0 + add r9, r9, r1 + ldr r0, [r12, #32] + add r9, r9, r10 + add r9, r9, r0 + add r5, r5, r9 + ror r0, r2, #2 + eor r1, r2, r3 + eor r0, r0, r2, ror #13 + eor r10, r3, r4 + and r1, r1, r10 + eor r0, r0, r2, ror #22 + eor r1, r1, r3 + add r9, r9, r0 + add r9, r9, r1 + # Round 9 + vmov r10, d4[1] + # Calc new W[8]-W[9] + vext.8 d10, d4, d5, #4 + ror r0, r5, #6 + vshl.u32 d8, d3, #15 + eor r1, r6, r7 + vsri.u32 d8, d3, #17 + eor r0, r0, r5, ror #11 + vshl.u32 d9, d3, #13 + and r1, r1, r5 + vsri.u32 d9, d3, #19 + eor r0, r0, r5, ror #25 + veor d9, d8 + eor r1, r1, r7 + vshr.u32 d8, d3, #10 + add r8, r8, r0 + veor d9, d8 + add r8, r8, r1 + vadd.i32 d4, d9 + ldr r0, [r12, #36] + vext.8 d11, d0, d1, #4 + add r8, r8, r10 + vadd.i32 d4, d11 + add r8, r8, r0 + vshl.u32 d8, d10, #25 + add r4, r4, r8 + vsri.u32 d8, d10, #7 + ror r0, r9, #2 + vshl.u32 d9, d10, #14 + eor r1, r9, r2 + vsri.u32 d9, d10, #18 + eor r0, r0, r9, ror #13 + veor d9, d8 + eor r10, r2, r3 + vshr.u32 d10, #3 + and r1, r1, r10 + veor d9, d10 + eor r0, r0, r9, ror #22 + vadd.i32 d4, d9 + eor r1, r1, r2 + add r8, r8, r0 + add r8, r8, r1 + # Round 10 + vmov r10, d5[0] + ror r0, r4, #6 + eor r1, r5, r6 + eor r0, r0, r4, ror #11 + and r1, r1, r4 + eor r0, r0, r4, ror #25 + eor r1, r1, r6 + add r7, r7, r0 + add r7, r7, r1 + ldr r0, [r12, #40] + add r7, r7, r10 + add r7, r7, r0 + add r3, r3, r7 + ror r0, r8, #2 + eor r1, r8, r9 + eor r0, r0, r8, ror #13 + eor r10, r9, r2 + and r1, r1, r10 + eor r0, r0, r8, ror #22 + eor r1, r1, r9 + add r7, r7, r0 + add r7, r7, r1 + # Round 11 + vmov r10, d5[1] + # Calc new W[10]-W[11] + vext.8 d10, d5, d6, #4 + ror r0, r3, #6 + vshl.u32 d8, d4, #15 + eor r1, r4, r5 + vsri.u32 d8, d4, #17 + eor r0, r0, r3, ror #11 + vshl.u32 d9, d4, #13 + and r1, r1, r3 + vsri.u32 d9, d4, #19 + eor r0, r0, r3, ror #25 + veor d9, d8 + eor r1, r1, r5 + vshr.u32 d8, d4, #10 + add r6, r6, r0 + veor d9, d8 + add r6, r6, r1 + vadd.i32 d5, d9 + ldr r0, [r12, #44] + vext.8 d11, d1, d2, #4 + add r6, r6, r10 + vadd.i32 d5, d11 + add r6, r6, r0 + vshl.u32 d8, d10, #25 + add r2, r2, r6 + vsri.u32 d8, d10, #7 + ror r0, r7, #2 + vshl.u32 d9, d10, #14 + eor r1, r7, r8 + vsri.u32 d9, d10, #18 + eor r0, r0, r7, ror #13 + veor d9, d8 + eor r10, r8, r9 + vshr.u32 d10, #3 + and r1, r1, r10 + veor d9, d10 + eor r0, r0, r7, ror #22 + vadd.i32 d5, d9 + eor r1, r1, r8 + add r6, r6, r0 + add r6, r6, r1 + # Round 12 + vmov r10, d6[0] + ror r0, r2, #6 + eor r1, r3, r4 + eor r0, r0, r2, ror #11 + and r1, r1, r2 + eor r0, r0, r2, ror #25 + eor r1, r1, r4 + add r5, r5, r0 + add r5, r5, r1 + ldr r0, [r12, #48] + add r5, r5, r10 + add r5, r5, r0 + add r9, r9, r5 + ror r0, r6, #2 + eor r1, r6, r7 + eor r0, r0, r6, ror #13 + eor r10, r7, r8 + and r1, r1, r10 + eor r0, r0, r6, ror #22 + eor r1, r1, r7 + add r5, r5, r0 + add r5, r5, r1 + # Round 13 + vmov r10, d6[1] + # Calc new W[12]-W[13] + vext.8 d10, d6, d7, #4 + ror r0, r9, #6 + vshl.u32 d8, d5, #15 + eor r1, r2, r3 + vsri.u32 d8, d5, #17 + eor r0, r0, r9, ror #11 + vshl.u32 d9, d5, #13 + and r1, r1, r9 + vsri.u32 d9, d5, #19 + eor r0, r0, r9, ror #25 + veor d9, d8 + eor r1, r1, r3 + vshr.u32 d8, d5, #10 + add r4, r4, r0 + veor d9, d8 + add r4, r4, r1 + vadd.i32 d6, d9 + ldr r0, [r12, #52] + vext.8 d11, d2, d3, #4 + add r4, r4, r10 + vadd.i32 d6, d11 + add r4, r4, r0 + vshl.u32 d8, d10, #25 + add r8, r8, r4 + vsri.u32 d8, d10, #7 + ror r0, r5, #2 + vshl.u32 d9, d10, #14 + eor r1, r5, r6 + vsri.u32 d9, d10, #18 + eor r0, r0, r5, ror #13 + veor d9, d8 + eor r10, r6, r7 + vshr.u32 d10, #3 + and r1, r1, r10 + veor d9, d10 + eor r0, r0, r5, ror #22 + vadd.i32 d6, d9 + eor r1, r1, r6 + add r4, r4, r0 + add r4, r4, r1 + # Round 14 + vmov r10, d7[0] + ror r0, r8, #6 + eor r1, r9, r2 + eor r0, r0, r8, ror #11 + and r1, r1, r8 + eor r0, r0, r8, ror #25 + eor r1, r1, r2 + add r3, r3, r0 + add r3, r3, r1 + ldr r0, [r12, #56] + add r3, r3, r10 + add r3, r3, r0 + add r7, r7, r3 + ror r0, r4, #2 + eor r1, r4, r5 + eor r0, r0, r4, ror #13 + eor r10, r5, r6 + and r1, r1, r10 + eor r0, r0, r4, ror #22 + eor r1, r1, r5 + add r3, r3, r0 + add r3, r3, r1 + # Round 15 + vmov r10, d7[1] + # Calc new W[14]-W[15] + vext.8 d10, d7, d0, #4 + ror r0, r7, #6 + vshl.u32 d8, d6, #15 + eor r1, r8, r9 + vsri.u32 d8, d6, #17 + eor r0, r0, r7, ror #11 + vshl.u32 d9, d6, #13 + and r1, r1, r7 + vsri.u32 d9, d6, #19 + eor r0, r0, r7, ror #25 + veor d9, d8 + eor r1, r1, r9 + vshr.u32 d8, d6, #10 + add r2, r2, r0 + veor d9, d8 + add r2, r2, r1 + vadd.i32 d7, d9 + ldr r0, [r12, #60] + vext.8 d11, d3, d4, #4 + add r2, r2, r10 + vadd.i32 d7, d11 + add r2, r2, r0 + vshl.u32 d8, d10, #25 + add r6, r6, r2 + vsri.u32 d8, d10, #7 + ror r0, r3, #2 + vshl.u32 d9, d10, #14 + eor r1, r3, r4 + vsri.u32 d9, d10, #18 + eor r0, r0, r3, ror #13 + veor d9, d8 + eor r10, r4, r5 + vshr.u32 d10, #3 + and r1, r1, r10 + veor d9, d10 + eor r0, r0, r3, ror #22 + vadd.i32 d7, d9 + eor r1, r1, r4 + add r2, r2, r0 + add r2, r2, r1 + add r12, r12, #0x40 + subs lr, lr, #1 + bne L_SHA256_transform_neon_len_start + # Round 0 + vmov r10, d0[0] + ror r0, r6, #6 + eor r1, r7, r8 + eor r0, r0, r6, ror #11 + and r1, r1, r6 + eor r0, r0, r6, ror #25 + eor r1, r1, r8 + add r9, r9, r0 + add r9, r9, r1 + ldr r0, [r12] + add r9, r9, r10 + add r9, r9, r0 + add r5, r5, r9 + ror r0, r2, #2 + eor r1, r2, r3 + eor r0, r0, r2, ror #13 + eor r10, r3, r4 + and r1, r1, r10 + eor r0, r0, r2, ror #22 + eor r1, r1, r3 + add r9, r9, r0 + add r9, r9, r1 + # Round 1 + vmov r10, d0[1] + ror r0, r5, #6 + eor r1, r6, r7 + eor r0, r0, r5, ror #11 + and r1, r1, r5 + eor r0, r0, r5, ror #25 + eor r1, r1, r7 + add r8, r8, r0 + add r8, r8, r1 + ldr r0, [r12, #4] + add r8, r8, r10 + add r8, r8, r0 + add r4, r4, r8 + ror r0, r9, #2 + eor r1, r9, r2 + eor r0, r0, r9, ror #13 + eor r10, r2, r3 + and r1, r1, r10 + eor r0, r0, r9, ror #22 + eor r1, r1, r2 + add r8, r8, r0 + add r8, r8, r1 + # Round 2 + vmov r10, d1[0] + ror r0, r4, #6 + eor r1, r5, r6 + eor r0, r0, r4, ror #11 + and r1, r1, r4 + eor r0, r0, r4, ror #25 + eor r1, r1, r6 + add r7, r7, r0 + add r7, r7, r1 + ldr r0, [r12, #8] + add r7, r7, r10 + add r7, r7, r0 + add r3, r3, r7 + ror r0, r8, #2 + eor r1, r8, r9 + eor r0, r0, r8, ror #13 + eor r10, r9, r2 + and r1, r1, r10 + eor r0, r0, r8, ror #22 + eor r1, r1, r9 + add r7, r7, r0 + add r7, r7, r1 + # Round 3 + vmov r10, d1[1] + ror r0, r3, #6 + eor r1, r4, r5 + eor r0, r0, r3, ror #11 + and r1, r1, r3 + eor r0, r0, r3, ror #25 + eor r1, r1, r5 + add r6, r6, r0 + add r6, r6, r1 + ldr r0, [r12, #12] + add r6, r6, r10 + add r6, r6, r0 + add r2, r2, r6 + ror r0, r7, #2 + eor r1, r7, r8 + eor r0, r0, r7, ror #13 + eor r10, r8, r9 + and r1, r1, r10 + eor r0, r0, r7, ror #22 + eor r1, r1, r8 + add r6, r6, r0 + add r6, r6, r1 + # Round 4 + vmov r10, d2[0] + ror r0, r2, #6 + eor r1, r3, r4 + eor r0, r0, r2, ror #11 + and r1, r1, r2 + eor r0, r0, r2, ror #25 + eor r1, r1, r4 + add r5, r5, r0 + add r5, r5, r1 + ldr r0, [r12, #16] + add r5, r5, r10 + add r5, r5, r0 + add r9, r9, r5 + ror r0, r6, #2 + eor r1, r6, r7 + eor r0, r0, r6, ror #13 + eor r10, r7, r8 + and r1, r1, r10 + eor r0, r0, r6, ror #22 + eor r1, r1, r7 + add r5, r5, r0 + add r5, r5, r1 + # Round 5 + vmov r10, d2[1] + ror r0, r9, #6 + eor r1, r2, r3 + eor r0, r0, r9, ror #11 + and r1, r1, r9 + eor r0, r0, r9, ror #25 + eor r1, r1, r3 + add r4, r4, r0 + add r4, r4, r1 + ldr r0, [r12, #20] + add r4, r4, r10 + add r4, r4, r0 + add r8, r8, r4 + ror r0, r5, #2 + eor r1, r5, r6 + eor r0, r0, r5, ror #13 + eor r10, r6, r7 + and r1, r1, r10 + eor r0, r0, r5, ror #22 + eor r1, r1, r6 + add r4, r4, r0 + add r4, r4, r1 + # Round 6 + vmov r10, d3[0] + ror r0, r8, #6 + eor r1, r9, r2 + eor r0, r0, r8, ror #11 + and r1, r1, r8 + eor r0, r0, r8, ror #25 + eor r1, r1, r2 + add r3, r3, r0 + add r3, r3, r1 + ldr r0, [r12, #24] + add r3, r3, r10 + add r3, r3, r0 + add r7, r7, r3 + ror r0, r4, #2 + eor r1, r4, r5 + eor r0, r0, r4, ror #13 + eor r10, r5, r6 + and r1, r1, r10 + eor r0, r0, r4, ror #22 + eor r1, r1, r5 + add r3, r3, r0 + add r3, r3, r1 + # Round 7 + vmov r10, d3[1] + ror r0, r7, #6 + eor r1, r8, r9 + eor r0, r0, r7, ror #11 + and r1, r1, r7 + eor r0, r0, r7, ror #25 + eor r1, r1, r9 + add r2, r2, r0 + add r2, r2, r1 + ldr r0, [r12, #28] + add r2, r2, r10 + add r2, r2, r0 + add r6, r6, r2 + ror r0, r3, #2 + eor r1, r3, r4 + eor r0, r0, r3, ror #13 + eor r10, r4, r5 + and r1, r1, r10 + eor r0, r0, r3, ror #22 + eor r1, r1, r4 + add r2, r2, r0 + add r2, r2, r1 + # Round 8 + vmov r10, d4[0] + ror r0, r6, #6 + eor r1, r7, r8 + eor r0, r0, r6, ror #11 + and r1, r1, r6 + eor r0, r0, r6, ror #25 + eor r1, r1, r8 + add r9, r9, r0 + add r9, r9, r1 + ldr r0, [r12, #32] + add r9, r9, r10 + add r9, r9, r0 + add r5, r5, r9 + ror r0, r2, #2 + eor r1, r2, r3 + eor r0, r0, r2, ror #13 + eor r10, r3, r4 + and r1, r1, r10 + eor r0, r0, r2, ror #22 + eor r1, r1, r3 + add r9, r9, r0 + add r9, r9, r1 + # Round 9 + vmov r10, d4[1] + ror r0, r5, #6 + eor r1, r6, r7 + eor r0, r0, r5, ror #11 + and r1, r1, r5 + eor r0, r0, r5, ror #25 + eor r1, r1, r7 + add r8, r8, r0 + add r8, r8, r1 + ldr r0, [r12, #36] + add r8, r8, r10 + add r8, r8, r0 + add r4, r4, r8 + ror r0, r9, #2 + eor r1, r9, r2 + eor r0, r0, r9, ror #13 + eor r10, r2, r3 + and r1, r1, r10 + eor r0, r0, r9, ror #22 + eor r1, r1, r2 + add r8, r8, r0 + add r8, r8, r1 + # Round 10 + vmov r10, d5[0] + ror r0, r4, #6 + eor r1, r5, r6 + eor r0, r0, r4, ror #11 + and r1, r1, r4 + eor r0, r0, r4, ror #25 + eor r1, r1, r6 + add r7, r7, r0 + add r7, r7, r1 + ldr r0, [r12, #40] + add r7, r7, r10 + add r7, r7, r0 + add r3, r3, r7 + ror r0, r8, #2 + eor r1, r8, r9 + eor r0, r0, r8, ror #13 + eor r10, r9, r2 + and r1, r1, r10 + eor r0, r0, r8, ror #22 + eor r1, r1, r9 + add r7, r7, r0 + add r7, r7, r1 + # Round 11 + vmov r10, d5[1] + ror r0, r3, #6 + eor r1, r4, r5 + eor r0, r0, r3, ror #11 + and r1, r1, r3 + eor r0, r0, r3, ror #25 + eor r1, r1, r5 + add r6, r6, r0 + add r6, r6, r1 + ldr r0, [r12, #44] + add r6, r6, r10 + add r6, r6, r0 + add r2, r2, r6 + ror r0, r7, #2 + eor r1, r7, r8 + eor r0, r0, r7, ror #13 + eor r10, r8, r9 + and r1, r1, r10 + eor r0, r0, r7, ror #22 + eor r1, r1, r8 + add r6, r6, r0 + add r6, r6, r1 + # Round 12 + vmov r10, d6[0] + ror r0, r2, #6 + eor r1, r3, r4 + eor r0, r0, r2, ror #11 + and r1, r1, r2 + eor r0, r0, r2, ror #25 + eor r1, r1, r4 + add r5, r5, r0 + add r5, r5, r1 + ldr r0, [r12, #48] + add r5, r5, r10 + add r5, r5, r0 + add r9, r9, r5 + ror r0, r6, #2 + eor r1, r6, r7 + eor r0, r0, r6, ror #13 + eor r10, r7, r8 + and r1, r1, r10 + eor r0, r0, r6, ror #22 + eor r1, r1, r7 + add r5, r5, r0 + add r5, r5, r1 + # Round 13 + vmov r10, d6[1] + ror r0, r9, #6 + eor r1, r2, r3 + eor r0, r0, r9, ror #11 + and r1, r1, r9 + eor r0, r0, r9, ror #25 + eor r1, r1, r3 + add r4, r4, r0 + add r4, r4, r1 + ldr r0, [r12, #52] + add r4, r4, r10 + add r4, r4, r0 + add r8, r8, r4 + ror r0, r5, #2 + eor r1, r5, r6 + eor r0, r0, r5, ror #13 + eor r10, r6, r7 + and r1, r1, r10 + eor r0, r0, r5, ror #22 + eor r1, r1, r6 + add r4, r4, r0 + add r4, r4, r1 + # Round 14 + vmov r10, d7[0] + ror r0, r8, #6 + eor r1, r9, r2 + eor r0, r0, r8, ror #11 + and r1, r1, r8 + eor r0, r0, r8, ror #25 + eor r1, r1, r2 + add r3, r3, r0 + add r3, r3, r1 + ldr r0, [r12, #56] + add r3, r3, r10 + add r3, r3, r0 + add r7, r7, r3 + ror r0, r4, #2 + eor r1, r4, r5 + eor r0, r0, r4, ror #13 + eor r10, r5, r6 + and r1, r1, r10 + eor r0, r0, r4, ror #22 + eor r1, r1, r5 + add r3, r3, r0 + add r3, r3, r1 + # Round 15 + vmov r10, d7[1] + ror r0, r7, #6 + eor r1, r8, r9 + eor r0, r0, r7, ror #11 + and r1, r1, r7 + eor r0, r0, r7, ror #25 + eor r1, r1, r9 + add r2, r2, r0 + add r2, r2, r1 + ldr r0, [r12, #60] + add r2, r2, r10 + add r2, r2, r0 + add r6, r6, r2 + ror r0, r3, #2 + eor r1, r3, r4 + eor r0, r0, r3, ror #13 + eor r10, r4, r5 + and r1, r1, r10 + eor r0, r0, r3, ror #22 + eor r1, r1, r4 + add r2, r2, r0 + add r2, r2, r1 + ldr r10, [sp] + # Add in digest from start + ldrd r0, r1, [r10] + add r2, r2, r0 + add r3, r3, r1 + strd r2, r3, [r10] + ldrd r0, r1, [r10, #8] + add r4, r4, r0 + add r5, r5, r1 + strd r4, r5, [r10, #8] + ldrd r0, r1, [r10, #16] + add r6, r6, r0 + add r7, r7, r1 + strd r6, r7, [r10, #16] + ldrd r0, r1, [r10, #24] + add r8, r8, r0 + add r9, r9, r1 + strd r8, r9, [r10, #24] + ldr r10, [sp, #8] + ldr r1, [sp, #4] + subs r10, r10, #0x40 + sub r12, r12, #0xc0 + str r10, [sp, #8] + bne L_SHA256_transform_neon_len_begin + add sp, sp, #24 + vpop {d8-d11} + pop {r4, r5, r6, r7, r8, r9, r10, pc} + .size Transform_Sha256_Len,.-Transform_Sha256_Len +#endif /* WOLFSSL_ARMASM_NO_NEON */ +#endif /* !NO_SHA256 */ +#endif /* !__aarch64__ */ +#endif /* WOLFSSL_ARMASM */ + +#if defined(__linux__) && defined(__ELF__) +.section .note.GNU-stack,"",%progbits +#endif diff --git a/wolfcrypt/src/port/arm/armv8-32-sha256-asm_c.c b/wolfcrypt/src/port/arm/armv8-32-sha256-asm_c.c new file mode 100644 index 000000000..73a53027c --- /dev/null +++ b/wolfcrypt/src/port/arm/armv8-32-sha256-asm_c.c @@ -0,0 +1,2499 @@ +/* armv8-32-sha256-asm + * + * Copyright (C) 2006-2021 wolfSSL Inc. + * + * This file is part of wolfSSL. + * + * wolfSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * wolfSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA + */ + +/* Generated using (from wolfssl): + * cd ../scripts + * ruby ./sha2/sha256.rb arm32 ../wolfssl/wolfcrypt/src/port/arm/armv8-32-sha256-asm.c + */ + +#include + +#ifdef WOLFSSL_ARMASM +#ifndef __aarch64__ +#include +#ifdef HAVE_CONFIG_H + #include +#endif /* HAVE_CONFIG_H */ +#include +#ifndef NO_SHA256 +#include + +#ifdef WOLFSSL_ARMASM_NO_NEON +static const uint32_t L_SHA256_transform_len_k[] = { + 0x428a2f98, + 0x71374491, + 0xb5c0fbcf, + 0xe9b5dba5, + 0x3956c25b, + 0x59f111f1, + 0x923f82a4, + 0xab1c5ed5, + 0xd807aa98, + 0x12835b01, + 0x243185be, + 0x550c7dc3, + 0x72be5d74, + 0x80deb1fe, + 0x9bdc06a7, + 0xc19bf174, + 0xe49b69c1, + 0xefbe4786, + 0xfc19dc6, + 0x240ca1cc, + 0x2de92c6f, + 0x4a7484aa, + 0x5cb0a9dc, + 0x76f988da, + 0x983e5152, + 0xa831c66d, + 0xb00327c8, + 0xbf597fc7, + 0xc6e00bf3, + 0xd5a79147, + 0x6ca6351, + 0x14292967, + 0x27b70a85, + 0x2e1b2138, + 0x4d2c6dfc, + 0x53380d13, + 0x650a7354, + 0x766a0abb, + 0x81c2c92e, + 0x92722c85, + 0xa2bfe8a1, + 0xa81a664b, + 0xc24b8b70, + 0xc76c51a3, + 0xd192e819, + 0xd6990624, + 0xf40e3585, + 0x106aa070, + 0x19a4c116, + 0x1e376c08, + 0x2748774c, + 0x34b0bcb5, + 0x391c0cb3, + 0x4ed8aa4a, + 0x5b9cca4f, + 0x682e6ff3, + 0x748f82ee, + 0x78a5636f, + 0x84c87814, + 0x8cc70208, + 0x90befffa, + 0xa4506ceb, + 0xbef9a3f7, + 0xc67178f2, +}; + +void Transform_Sha256_Len(wc_Sha256* sha256, const byte* data, word32 len); +void Transform_Sha256_Len(wc_Sha256* sha256, const byte* data, word32 len) +{ + __asm__ __volatile__ ( + "sub sp, sp, #0xc0\n\t" + "mov r3, %[L_SHA256_transform_len_k]\n\t" + /* Copy digest to add in at end */ + "ldrd r12, lr, [%[sha256]]\n\t" + "ldrd r4, r5, [%[sha256], #8]\n\t" + "ldrd r6, r7, [%[sha256], #16]\n\t" + "ldrd r8, r9, [%[sha256], #24]\n\t" + "strd r12, lr, [sp, #64]\n\t" + "strd r4, r5, [sp, #72]\n\t" + "strd r6, r7, [sp, #80]\n\t" + "strd r8, r9, [sp, #88]\n\t" + /* Start of loop processing a block */ + "\n" + "L_SHA256_transform_len_begin_%=: \n\t" + /* Load, Reverse and Store W - 64 bytes */ + "ldrd r12, lr, [%[data]]\n\t" + "ldrd r4, r5, [%[data], #8]\n\t" + "ldrd r6, r7, [%[data], #16]\n\t" + "ldrd r8, r9, [%[data], #24]\n\t" + "rev r12, r12\n\t" + "rev lr, lr\n\t" + "rev r4, r4\n\t" + "rev r5, r5\n\t" + "rev r6, r6\n\t" + "rev r7, r7\n\t" + "rev r8, r8\n\t" + "rev r9, r9\n\t" + "strd r12, lr, [sp]\n\t" + "strd r4, r5, [sp, #8]\n\t" + "strd r6, r7, [sp, #16]\n\t" + "strd r8, r9, [sp, #24]\n\t" + "ldrd r12, lr, [%[data], #32]\n\t" + "ldrd r4, r5, [%[data], #40]\n\t" + "ldrd r6, r7, [%[data], #48]\n\t" + "ldrd r8, r9, [%[data], #56]\n\t" + "rev r12, r12\n\t" + "rev lr, lr\n\t" + "rev r4, r4\n\t" + "rev r5, r5\n\t" + "rev r6, r6\n\t" + "rev r7, r7\n\t" + "rev r8, r8\n\t" + "rev r9, r9\n\t" + "strd r12, lr, [sp, #32]\n\t" + "strd r4, r5, [sp, #40]\n\t" + "strd r6, r7, [sp, #48]\n\t" + "strd r8, r9, [sp, #56]\n\t" + "ldr r9, [%[sha256], #4]\n\t" + "ldr r12, [%[sha256], #8]\n\t" + "eor r9, r9, r12\n\t" + "mov r10, #3\n\t" + /* Start of 16 rounds */ + "\n" + "L_SHA256_transform_len_start_%=: \n\t" + /* Round 0 */ + "ldr lr, [%[sha256], #16]\n\t" + "ldr r4, [%[sha256], #20]\n\t" + "ldr r5, [%[sha256], #24]\n\t" + "ldr r7, [%[sha256], #28]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp]\n\t" + "ldr r4, [r3]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256]]\n\t" + "ldr r4, [%[sha256], #4]\n\t" + "ldr r5, [%[sha256], #8]\n\t" + "ldr r6, [%[sha256], #12]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #12]\n\t" + "str r7, [%[sha256], #28]\n\t" + /* Calc new W[0] */ + "ldr r4, [sp, #56]\n\t" + "ldr r5, [sp, #36]\n\t" + "ldr r6, [sp, #4]\n\t" + "ldr r7, [sp]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp]\n\t" + /* Round 1 */ + "ldr lr, [%[sha256], #12]\n\t" + "ldr r4, [%[sha256], #16]\n\t" + "ldr r5, [%[sha256], #20]\n\t" + "ldr r7, [%[sha256], #24]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #4]\n\t" + "ldr r4, [r3, #4]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #28]\n\t" + "ldr r4, [%[sha256]]\n\t" + "ldr r5, [%[sha256], #4]\n\t" + "ldr r6, [%[sha256], #8]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256], #8]\n\t" + "str r7, [%[sha256], #24]\n\t" + /* Calc new W[1] */ + "ldr r4, [sp, #60]\n\t" + "ldr r5, [sp, #40]\n\t" + "ldr r6, [sp, #8]\n\t" + "ldr r7, [sp, #4]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #4]\n\t" + /* Round 2 */ + "ldr lr, [%[sha256], #8]\n\t" + "ldr r4, [%[sha256], #12]\n\t" + "ldr r5, [%[sha256], #16]\n\t" + "ldr r7, [%[sha256], #20]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #8]\n\t" + "ldr r4, [r3, #8]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #24]\n\t" + "ldr r4, [%[sha256], #28]\n\t" + "ldr r5, [%[sha256]]\n\t" + "ldr r6, [%[sha256], #4]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #4]\n\t" + "str r7, [%[sha256], #20]\n\t" + /* Calc new W[2] */ + "ldr r4, [sp]\n\t" + "ldr r5, [sp, #44]\n\t" + "ldr r6, [sp, #12]\n\t" + "ldr r7, [sp, #8]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #8]\n\t" + /* Round 3 */ + "ldr lr, [%[sha256], #4]\n\t" + "ldr r4, [%[sha256], #8]\n\t" + "ldr r5, [%[sha256], #12]\n\t" + "ldr r7, [%[sha256], #16]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #12]\n\t" + "ldr r4, [r3, #12]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #20]\n\t" + "ldr r4, [%[sha256], #24]\n\t" + "ldr r5, [%[sha256], #28]\n\t" + "ldr r6, [%[sha256]]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256]]\n\t" + "str r7, [%[sha256], #16]\n\t" + /* Calc new W[3] */ + "ldr r4, [sp, #4]\n\t" + "ldr r5, [sp, #48]\n\t" + "ldr r6, [sp, #16]\n\t" + "ldr r7, [sp, #12]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #12]\n\t" + /* Round 4 */ + "ldr lr, [%[sha256]]\n\t" + "ldr r4, [%[sha256], #4]\n\t" + "ldr r5, [%[sha256], #8]\n\t" + "ldr r7, [%[sha256], #12]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #16]\n\t" + "ldr r4, [r3, #16]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #16]\n\t" + "ldr r4, [%[sha256], #20]\n\t" + "ldr r5, [%[sha256], #24]\n\t" + "ldr r6, [%[sha256], #28]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #28]\n\t" + "str r7, [%[sha256], #12]\n\t" + /* Calc new W[4] */ + "ldr r4, [sp, #8]\n\t" + "ldr r5, [sp, #52]\n\t" + "ldr r6, [sp, #20]\n\t" + "ldr r7, [sp, #16]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #16]\n\t" + /* Round 5 */ + "ldr lr, [%[sha256], #28]\n\t" + "ldr r4, [%[sha256]]\n\t" + "ldr r5, [%[sha256], #4]\n\t" + "ldr r7, [%[sha256], #8]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #20]\n\t" + "ldr r4, [r3, #20]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #12]\n\t" + "ldr r4, [%[sha256], #16]\n\t" + "ldr r5, [%[sha256], #20]\n\t" + "ldr r6, [%[sha256], #24]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256], #24]\n\t" + "str r7, [%[sha256], #8]\n\t" + /* Calc new W[5] */ + "ldr r4, [sp, #12]\n\t" + "ldr r5, [sp, #56]\n\t" + "ldr r6, [sp, #24]\n\t" + "ldr r7, [sp, #20]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #20]\n\t" + /* Round 6 */ + "ldr lr, [%[sha256], #24]\n\t" + "ldr r4, [%[sha256], #28]\n\t" + "ldr r5, [%[sha256]]\n\t" + "ldr r7, [%[sha256], #4]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #24]\n\t" + "ldr r4, [r3, #24]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #8]\n\t" + "ldr r4, [%[sha256], #12]\n\t" + "ldr r5, [%[sha256], #16]\n\t" + "ldr r6, [%[sha256], #20]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #20]\n\t" + "str r7, [%[sha256], #4]\n\t" + /* Calc new W[6] */ + "ldr r4, [sp, #16]\n\t" + "ldr r5, [sp, #60]\n\t" + "ldr r6, [sp, #28]\n\t" + "ldr r7, [sp, #24]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #24]\n\t" + /* Round 7 */ + "ldr lr, [%[sha256], #20]\n\t" + "ldr r4, [%[sha256], #24]\n\t" + "ldr r5, [%[sha256], #28]\n\t" + "ldr r7, [%[sha256]]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #28]\n\t" + "ldr r4, [r3, #28]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #4]\n\t" + "ldr r4, [%[sha256], #8]\n\t" + "ldr r5, [%[sha256], #12]\n\t" + "ldr r6, [%[sha256], #16]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256], #16]\n\t" + "str r7, [%[sha256]]\n\t" + /* Calc new W[7] */ + "ldr r4, [sp, #20]\n\t" + "ldr r5, [sp]\n\t" + "ldr r6, [sp, #32]\n\t" + "ldr r7, [sp, #28]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #28]\n\t" + /* Round 8 */ + "ldr lr, [%[sha256], #16]\n\t" + "ldr r4, [%[sha256], #20]\n\t" + "ldr r5, [%[sha256], #24]\n\t" + "ldr r7, [%[sha256], #28]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #32]\n\t" + "ldr r4, [r3, #32]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256]]\n\t" + "ldr r4, [%[sha256], #4]\n\t" + "ldr r5, [%[sha256], #8]\n\t" + "ldr r6, [%[sha256], #12]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #12]\n\t" + "str r7, [%[sha256], #28]\n\t" + /* Calc new W[8] */ + "ldr r4, [sp, #24]\n\t" + "ldr r5, [sp, #4]\n\t" + "ldr r6, [sp, #36]\n\t" + "ldr r7, [sp, #32]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #32]\n\t" + /* Round 9 */ + "ldr lr, [%[sha256], #12]\n\t" + "ldr r4, [%[sha256], #16]\n\t" + "ldr r5, [%[sha256], #20]\n\t" + "ldr r7, [%[sha256], #24]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #36]\n\t" + "ldr r4, [r3, #36]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #28]\n\t" + "ldr r4, [%[sha256]]\n\t" + "ldr r5, [%[sha256], #4]\n\t" + "ldr r6, [%[sha256], #8]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256], #8]\n\t" + "str r7, [%[sha256], #24]\n\t" + /* Calc new W[9] */ + "ldr r4, [sp, #28]\n\t" + "ldr r5, [sp, #8]\n\t" + "ldr r6, [sp, #40]\n\t" + "ldr r7, [sp, #36]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #36]\n\t" + /* Round 10 */ + "ldr lr, [%[sha256], #8]\n\t" + "ldr r4, [%[sha256], #12]\n\t" + "ldr r5, [%[sha256], #16]\n\t" + "ldr r7, [%[sha256], #20]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #40]\n\t" + "ldr r4, [r3, #40]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #24]\n\t" + "ldr r4, [%[sha256], #28]\n\t" + "ldr r5, [%[sha256]]\n\t" + "ldr r6, [%[sha256], #4]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #4]\n\t" + "str r7, [%[sha256], #20]\n\t" + /* Calc new W[10] */ + "ldr r4, [sp, #32]\n\t" + "ldr r5, [sp, #12]\n\t" + "ldr r6, [sp, #44]\n\t" + "ldr r7, [sp, #40]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #40]\n\t" + /* Round 11 */ + "ldr lr, [%[sha256], #4]\n\t" + "ldr r4, [%[sha256], #8]\n\t" + "ldr r5, [%[sha256], #12]\n\t" + "ldr r7, [%[sha256], #16]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #44]\n\t" + "ldr r4, [r3, #44]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #20]\n\t" + "ldr r4, [%[sha256], #24]\n\t" + "ldr r5, [%[sha256], #28]\n\t" + "ldr r6, [%[sha256]]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256]]\n\t" + "str r7, [%[sha256], #16]\n\t" + /* Calc new W[11] */ + "ldr r4, [sp, #36]\n\t" + "ldr r5, [sp, #16]\n\t" + "ldr r6, [sp, #48]\n\t" + "ldr r7, [sp, #44]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #44]\n\t" + /* Round 12 */ + "ldr lr, [%[sha256]]\n\t" + "ldr r4, [%[sha256], #4]\n\t" + "ldr r5, [%[sha256], #8]\n\t" + "ldr r7, [%[sha256], #12]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #48]\n\t" + "ldr r4, [r3, #48]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #16]\n\t" + "ldr r4, [%[sha256], #20]\n\t" + "ldr r5, [%[sha256], #24]\n\t" + "ldr r6, [%[sha256], #28]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #28]\n\t" + "str r7, [%[sha256], #12]\n\t" + /* Calc new W[12] */ + "ldr r4, [sp, #40]\n\t" + "ldr r5, [sp, #20]\n\t" + "ldr r6, [sp, #52]\n\t" + "ldr r7, [sp, #48]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #48]\n\t" + /* Round 13 */ + "ldr lr, [%[sha256], #28]\n\t" + "ldr r4, [%[sha256]]\n\t" + "ldr r5, [%[sha256], #4]\n\t" + "ldr r7, [%[sha256], #8]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #52]\n\t" + "ldr r4, [r3, #52]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #12]\n\t" + "ldr r4, [%[sha256], #16]\n\t" + "ldr r5, [%[sha256], #20]\n\t" + "ldr r6, [%[sha256], #24]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256], #24]\n\t" + "str r7, [%[sha256], #8]\n\t" + /* Calc new W[13] */ + "ldr r4, [sp, #44]\n\t" + "ldr r5, [sp, #24]\n\t" + "ldr r6, [sp, #56]\n\t" + "ldr r7, [sp, #52]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #52]\n\t" + /* Round 14 */ + "ldr lr, [%[sha256], #24]\n\t" + "ldr r4, [%[sha256], #28]\n\t" + "ldr r5, [%[sha256]]\n\t" + "ldr r7, [%[sha256], #4]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #56]\n\t" + "ldr r4, [r3, #56]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #8]\n\t" + "ldr r4, [%[sha256], #12]\n\t" + "ldr r5, [%[sha256], #16]\n\t" + "ldr r6, [%[sha256], #20]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #20]\n\t" + "str r7, [%[sha256], #4]\n\t" + /* Calc new W[14] */ + "ldr r4, [sp, #48]\n\t" + "ldr r5, [sp, #28]\n\t" + "ldr r6, [sp, #60]\n\t" + "ldr r7, [sp, #56]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #56]\n\t" + /* Round 15 */ + "ldr lr, [%[sha256], #20]\n\t" + "ldr r4, [%[sha256], #24]\n\t" + "ldr r5, [%[sha256], #28]\n\t" + "ldr r7, [%[sha256]]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #60]\n\t" + "ldr r4, [r3, #60]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #4]\n\t" + "ldr r4, [%[sha256], #8]\n\t" + "ldr r5, [%[sha256], #12]\n\t" + "ldr r6, [%[sha256], #16]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256], #16]\n\t" + "str r7, [%[sha256]]\n\t" + /* Calc new W[15] */ + "ldr r4, [sp, #52]\n\t" + "ldr r5, [sp, #32]\n\t" + "ldr r6, [sp]\n\t" + "ldr r7, [sp, #60]\n\t" + "ror r12, r4, #17\n\t" + "ror lr, r6, #7\n\t" + "eor r12, r12, r4, ror 19\n\t" + "eor lr, lr, r6, ror 18\n\t" + "eor r12, r12, r4, lsr 10\n\t" + "eor lr, lr, r6, lsr 3\n\t" + "add r7, r7, r5\n\t" + "add r12, r12, lr\n\t" + "add r7, r7, r12\n\t" + "str r7, [sp, #60]\n\t" + "add r3, r3, #0x40\n\t" + "subs r10, r10, #1\n\t" + "bne L_SHA256_transform_len_start_%=\n\t" + /* Round 0 */ + "ldr lr, [%[sha256], #16]\n\t" + "ldr r4, [%[sha256], #20]\n\t" + "ldr r5, [%[sha256], #24]\n\t" + "ldr r7, [%[sha256], #28]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp]\n\t" + "ldr r4, [r3]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256]]\n\t" + "ldr r4, [%[sha256], #4]\n\t" + "ldr r5, [%[sha256], #8]\n\t" + "ldr r6, [%[sha256], #12]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #12]\n\t" + "str r7, [%[sha256], #28]\n\t" + /* Round 1 */ + "ldr lr, [%[sha256], #12]\n\t" + "ldr r4, [%[sha256], #16]\n\t" + "ldr r5, [%[sha256], #20]\n\t" + "ldr r7, [%[sha256], #24]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #4]\n\t" + "ldr r4, [r3, #4]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #28]\n\t" + "ldr r4, [%[sha256]]\n\t" + "ldr r5, [%[sha256], #4]\n\t" + "ldr r6, [%[sha256], #8]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256], #8]\n\t" + "str r7, [%[sha256], #24]\n\t" + /* Round 2 */ + "ldr lr, [%[sha256], #8]\n\t" + "ldr r4, [%[sha256], #12]\n\t" + "ldr r5, [%[sha256], #16]\n\t" + "ldr r7, [%[sha256], #20]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #8]\n\t" + "ldr r4, [r3, #8]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #24]\n\t" + "ldr r4, [%[sha256], #28]\n\t" + "ldr r5, [%[sha256]]\n\t" + "ldr r6, [%[sha256], #4]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #4]\n\t" + "str r7, [%[sha256], #20]\n\t" + /* Round 3 */ + "ldr lr, [%[sha256], #4]\n\t" + "ldr r4, [%[sha256], #8]\n\t" + "ldr r5, [%[sha256], #12]\n\t" + "ldr r7, [%[sha256], #16]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #12]\n\t" + "ldr r4, [r3, #12]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #20]\n\t" + "ldr r4, [%[sha256], #24]\n\t" + "ldr r5, [%[sha256], #28]\n\t" + "ldr r6, [%[sha256]]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256]]\n\t" + "str r7, [%[sha256], #16]\n\t" + /* Round 4 */ + "ldr lr, [%[sha256]]\n\t" + "ldr r4, [%[sha256], #4]\n\t" + "ldr r5, [%[sha256], #8]\n\t" + "ldr r7, [%[sha256], #12]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #16]\n\t" + "ldr r4, [r3, #16]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #16]\n\t" + "ldr r4, [%[sha256], #20]\n\t" + "ldr r5, [%[sha256], #24]\n\t" + "ldr r6, [%[sha256], #28]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #28]\n\t" + "str r7, [%[sha256], #12]\n\t" + /* Round 5 */ + "ldr lr, [%[sha256], #28]\n\t" + "ldr r4, [%[sha256]]\n\t" + "ldr r5, [%[sha256], #4]\n\t" + "ldr r7, [%[sha256], #8]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #20]\n\t" + "ldr r4, [r3, #20]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #12]\n\t" + "ldr r4, [%[sha256], #16]\n\t" + "ldr r5, [%[sha256], #20]\n\t" + "ldr r6, [%[sha256], #24]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256], #24]\n\t" + "str r7, [%[sha256], #8]\n\t" + /* Round 6 */ + "ldr lr, [%[sha256], #24]\n\t" + "ldr r4, [%[sha256], #28]\n\t" + "ldr r5, [%[sha256]]\n\t" + "ldr r7, [%[sha256], #4]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #24]\n\t" + "ldr r4, [r3, #24]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #8]\n\t" + "ldr r4, [%[sha256], #12]\n\t" + "ldr r5, [%[sha256], #16]\n\t" + "ldr r6, [%[sha256], #20]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #20]\n\t" + "str r7, [%[sha256], #4]\n\t" + /* Round 7 */ + "ldr lr, [%[sha256], #20]\n\t" + "ldr r4, [%[sha256], #24]\n\t" + "ldr r5, [%[sha256], #28]\n\t" + "ldr r7, [%[sha256]]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #28]\n\t" + "ldr r4, [r3, #28]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #4]\n\t" + "ldr r4, [%[sha256], #8]\n\t" + "ldr r5, [%[sha256], #12]\n\t" + "ldr r6, [%[sha256], #16]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256], #16]\n\t" + "str r7, [%[sha256]]\n\t" + /* Round 8 */ + "ldr lr, [%[sha256], #16]\n\t" + "ldr r4, [%[sha256], #20]\n\t" + "ldr r5, [%[sha256], #24]\n\t" + "ldr r7, [%[sha256], #28]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #32]\n\t" + "ldr r4, [r3, #32]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256]]\n\t" + "ldr r4, [%[sha256], #4]\n\t" + "ldr r5, [%[sha256], #8]\n\t" + "ldr r6, [%[sha256], #12]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #12]\n\t" + "str r7, [%[sha256], #28]\n\t" + /* Round 9 */ + "ldr lr, [%[sha256], #12]\n\t" + "ldr r4, [%[sha256], #16]\n\t" + "ldr r5, [%[sha256], #20]\n\t" + "ldr r7, [%[sha256], #24]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #36]\n\t" + "ldr r4, [r3, #36]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #28]\n\t" + "ldr r4, [%[sha256]]\n\t" + "ldr r5, [%[sha256], #4]\n\t" + "ldr r6, [%[sha256], #8]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256], #8]\n\t" + "str r7, [%[sha256], #24]\n\t" + /* Round 10 */ + "ldr lr, [%[sha256], #8]\n\t" + "ldr r4, [%[sha256], #12]\n\t" + "ldr r5, [%[sha256], #16]\n\t" + "ldr r7, [%[sha256], #20]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #40]\n\t" + "ldr r4, [r3, #40]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #24]\n\t" + "ldr r4, [%[sha256], #28]\n\t" + "ldr r5, [%[sha256]]\n\t" + "ldr r6, [%[sha256], #4]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #4]\n\t" + "str r7, [%[sha256], #20]\n\t" + /* Round 11 */ + "ldr lr, [%[sha256], #4]\n\t" + "ldr r4, [%[sha256], #8]\n\t" + "ldr r5, [%[sha256], #12]\n\t" + "ldr r7, [%[sha256], #16]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #44]\n\t" + "ldr r4, [r3, #44]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #20]\n\t" + "ldr r4, [%[sha256], #24]\n\t" + "ldr r5, [%[sha256], #28]\n\t" + "ldr r6, [%[sha256]]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256]]\n\t" + "str r7, [%[sha256], #16]\n\t" + /* Round 12 */ + "ldr lr, [%[sha256]]\n\t" + "ldr r4, [%[sha256], #4]\n\t" + "ldr r5, [%[sha256], #8]\n\t" + "ldr r7, [%[sha256], #12]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #48]\n\t" + "ldr r4, [r3, #48]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #16]\n\t" + "ldr r4, [%[sha256], #20]\n\t" + "ldr r5, [%[sha256], #24]\n\t" + "ldr r6, [%[sha256], #28]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #28]\n\t" + "str r7, [%[sha256], #12]\n\t" + /* Round 13 */ + "ldr lr, [%[sha256], #28]\n\t" + "ldr r4, [%[sha256]]\n\t" + "ldr r5, [%[sha256], #4]\n\t" + "ldr r7, [%[sha256], #8]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #52]\n\t" + "ldr r4, [r3, #52]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #12]\n\t" + "ldr r4, [%[sha256], #16]\n\t" + "ldr r5, [%[sha256], #20]\n\t" + "ldr r6, [%[sha256], #24]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256], #24]\n\t" + "str r7, [%[sha256], #8]\n\t" + /* Round 14 */ + "ldr lr, [%[sha256], #24]\n\t" + "ldr r4, [%[sha256], #28]\n\t" + "ldr r5, [%[sha256]]\n\t" + "ldr r7, [%[sha256], #4]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #56]\n\t" + "ldr r4, [r3, #56]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #8]\n\t" + "ldr r4, [%[sha256], #12]\n\t" + "ldr r5, [%[sha256], #16]\n\t" + "ldr r6, [%[sha256], #20]\n\t" + "ror r12, lr, #2\n\t" + "eor r8, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r9, r9, r8\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r9, r9, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r9\n\t" + "str r6, [%[sha256], #20]\n\t" + "str r7, [%[sha256], #4]\n\t" + /* Round 15 */ + "ldr lr, [%[sha256], #20]\n\t" + "ldr r4, [%[sha256], #24]\n\t" + "ldr r5, [%[sha256], #28]\n\t" + "ldr r7, [%[sha256]]\n\t" + "ror r12, lr, #6\n\t" + "eor r4, r4, r5\n\t" + "eor r12, r12, lr, ror 11\n\t" + "and r4, r4, lr\n\t" + "eor r12, r12, lr, ror 25\n\t" + "eor r4, r4, r5\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [sp, #60]\n\t" + "ldr r4, [r3, #60]\n\t" + "add r7, r7, lr\n\t" + "add r7, r7, r4\n\t" + "ldr lr, [%[sha256], #4]\n\t" + "ldr r4, [%[sha256], #8]\n\t" + "ldr r5, [%[sha256], #12]\n\t" + "ldr r6, [%[sha256], #16]\n\t" + "ror r12, lr, #2\n\t" + "eor r9, lr, r4\n\t" + "eor r12, r12, lr, ror 13\n\t" + "and r8, r8, r9\n\t" + "eor r12, r12, lr, ror 22\n\t" + "eor r8, r8, r4\n\t" + "add r6, r6, r7\n\t" + "add r7, r7, r12\n\t" + "add r7, r7, r8\n\t" + "str r6, [%[sha256], #16]\n\t" + "str r7, [%[sha256]]\n\t" + /* Add in digest from start */ + "ldrd r12, lr, [%[sha256]]\n\t" + "ldrd r4, r5, [%[sha256], #8]\n\t" + "ldrd r6, r7, [sp, #64]\n\t" + "ldrd r8, r9, [sp, #72]\n\t" + "add r12, r12, r6\n\t" + "add lr, lr, r7\n\t" + "add r4, r4, r8\n\t" + "add r5, r5, r9\n\t" + "strd r12, lr, [%[sha256]]\n\t" + "strd r4, r5, [%[sha256], #8]\n\t" + "strd r12, lr, [sp, #64]\n\t" + "strd r4, r5, [sp, #72]\n\t" + "ldrd r12, lr, [%[sha256], #16]\n\t" + "ldrd r4, r5, [%[sha256], #24]\n\t" + "ldrd r6, r7, [sp, #80]\n\t" + "ldrd r8, r9, [sp, #88]\n\t" + "add r12, r12, r6\n\t" + "add lr, lr, r7\n\t" + "add r4, r4, r8\n\t" + "add r5, r5, r9\n\t" + "strd r12, lr, [%[sha256], #16]\n\t" + "strd r4, r5, [%[sha256], #24]\n\t" + "strd r12, lr, [sp, #80]\n\t" + "strd r4, r5, [sp, #88]\n\t" + "subs %[len], %[len], #0x40\n\t" + "sub r3, r3, #0xc0\n\t" + "add %[data], %[data], #0x40\n\t" + "bne L_SHA256_transform_len_begin_%=\n\t" + "add sp, sp, #0xc0\n\t" + : [sha256] "+r" (sha256), [data] "+r" (data), [len] "+r" (len) + : [L_SHA256_transform_len_k] "r" (L_SHA256_transform_len_k) + : "memory", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10" + ); +} + +#endif /* WOLFSSL_ARMASM_NO_NEON */ +#include + +#ifndef WOLFSSL_ARMASM_NO_NEON +static const uint32_t L_SHA256_transform_neon_len_k[] = { + 0x428a2f98, + 0x71374491, + 0xb5c0fbcf, + 0xe9b5dba5, + 0x3956c25b, + 0x59f111f1, + 0x923f82a4, + 0xab1c5ed5, + 0xd807aa98, + 0x12835b01, + 0x243185be, + 0x550c7dc3, + 0x72be5d74, + 0x80deb1fe, + 0x9bdc06a7, + 0xc19bf174, + 0xe49b69c1, + 0xefbe4786, + 0xfc19dc6, + 0x240ca1cc, + 0x2de92c6f, + 0x4a7484aa, + 0x5cb0a9dc, + 0x76f988da, + 0x983e5152, + 0xa831c66d, + 0xb00327c8, + 0xbf597fc7, + 0xc6e00bf3, + 0xd5a79147, + 0x6ca6351, + 0x14292967, + 0x27b70a85, + 0x2e1b2138, + 0x4d2c6dfc, + 0x53380d13, + 0x650a7354, + 0x766a0abb, + 0x81c2c92e, + 0x92722c85, + 0xa2bfe8a1, + 0xa81a664b, + 0xc24b8b70, + 0xc76c51a3, + 0xd192e819, + 0xd6990624, + 0xf40e3585, + 0x106aa070, + 0x19a4c116, + 0x1e376c08, + 0x2748774c, + 0x34b0bcb5, + 0x391c0cb3, + 0x4ed8aa4a, + 0x5b9cca4f, + 0x682e6ff3, + 0x748f82ee, + 0x78a5636f, + 0x84c87814, + 0x8cc70208, + 0x90befffa, + 0xa4506ceb, + 0xbef9a3f7, + 0xc67178f2, +}; + +void Transform_Sha256_Len(wc_Sha256* sha256, const byte* data, word32 len); +void Transform_Sha256_Len(wc_Sha256* sha256, const byte* data, word32 len) +{ + __asm__ __volatile__ ( + "sub sp, sp, #24\n\t" + "strd %[sha256], %[data], [sp]\n\t" + "str %[len], [sp, #8]\n\t" + "mov r12, %[L_SHA256_transform_neon_len_k]\n\t" + /* Load digest into registers */ + "ldrd %[len], r3, [%[sha256]]\n\t" + "ldrd r4, r5, [%[sha256], #8]\n\t" + "ldrd r6, r7, [%[sha256], #16]\n\t" + "ldrd r8, r9, [%[sha256], #24]\n\t" + /* Start of loop processing a block */ + "\n" + "L_SHA256_transform_neon_len_begin_%=: \n\t" + /* Load W */ + "vldm.32 %[data]!, {d0-d7}\n\t" + "vrev32.8 q0, q0\n\t" + "vrev32.8 q1, q1\n\t" + "vrev32.8 q2, q2\n\t" + "vrev32.8 q3, q3\n\t" + "str %[data], [sp, #4]\n\t" + "mov lr, #3\n\t" + /* Start of 16 rounds */ + "\n" + "L_SHA256_transform_neon_len_start_%=: \n\t" + /* Round 0 */ + "vmov r10, d0[0]\n\t" + "ror %[sha256], r6, #6\n\t" + "eor %[data], r7, r8\n\t" + "eor %[sha256], %[sha256], r6, ror 11\n\t" + "and %[data], %[data], r6\n\t" + "eor %[sha256], %[sha256], r6, ror 25\n\t" + "eor %[data], %[data], r8\n\t" + "add r9, r9, %[sha256]\n\t" + "add r9, r9, %[data]\n\t" + "ldr %[sha256], [r12]\n\t" + "add r9, r9, r10\n\t" + "add r9, r9, %[sha256]\n\t" + "add r5, r5, r9\n\t" + "ror %[sha256], %[len], #2\n\t" + "eor %[data], %[len], r3\n\t" + "eor %[sha256], %[sha256], %[len], ror 13\n\t" + "eor r10, r3, r4\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], %[len], ror 22\n\t" + "eor %[data], %[data], r3\n\t" + "add r9, r9, %[sha256]\n\t" + "add r9, r9, %[data]\n\t" + /* Round 1 */ + "vmov r10, d0[1]\n\t" + /* Calc new W[0]-W[1] */ + "vext.8 d10, d0, d1, #4\n\t" + "ror %[sha256], r5, #6\n\t" + "vshl.u32 d8, d7, #15\n\t" + "eor %[data], r6, r7\n\t" + "vsri.u32 d8, d7, #17\n\t" + "eor %[sha256], %[sha256], r5, ror 11\n\t" + "vshl.u32 d9, d7, #13\n\t" + "and %[data], %[data], r5\n\t" + "vsri.u32 d9, d7, #19\n\t" + "eor %[sha256], %[sha256], r5, ror 25\n\t" + "veor d9, d8\n\t" + "eor %[data], %[data], r7\n\t" + "vshr.u32 d8, d7, #10\n\t" + "add r8, r8, %[sha256]\n\t" + "veor d9, d8\n\t" + "add r8, r8, %[data]\n\t" + "vadd.i32 d0, d9\n\t" + "ldr %[sha256], [r12, #4]\n\t" + "vext.8 d11, d4, d5, #4\n\t" + "add r8, r8, r10\n\t" + "vadd.i32 d0, d11\n\t" + "add r8, r8, %[sha256]\n\t" + "vshl.u32 d8, d10, #25\n\t" + "add r4, r4, r8\n\t" + "vsri.u32 d8, d10, #7\n\t" + "ror %[sha256], r9, #2\n\t" + "vshl.u32 d9, d10, #14\n\t" + "eor %[data], r9, %[len]\n\t" + "vsri.u32 d9, d10, #18\n\t" + "eor %[sha256], %[sha256], r9, ror 13\n\t" + "veor d9, d8\n\t" + "eor r10, %[len], r3\n\t" + "vshr.u32 d10, #3\n\t" + "and %[data], %[data], r10\n\t" + "veor d9, d10\n\t" + "eor %[sha256], %[sha256], r9, ror 22\n\t" + "vadd.i32 d0, d9\n\t" + "eor %[data], %[data], %[len]\n\t" + "add r8, r8, %[sha256]\n\t" + "add r8, r8, %[data]\n\t" + /* Round 2 */ + "vmov r10, d1[0]\n\t" + "ror %[sha256], r4, #6\n\t" + "eor %[data], r5, r6\n\t" + "eor %[sha256], %[sha256], r4, ror 11\n\t" + "and %[data], %[data], r4\n\t" + "eor %[sha256], %[sha256], r4, ror 25\n\t" + "eor %[data], %[data], r6\n\t" + "add r7, r7, %[sha256]\n\t" + "add r7, r7, %[data]\n\t" + "ldr %[sha256], [r12, #8]\n\t" + "add r7, r7, r10\n\t" + "add r7, r7, %[sha256]\n\t" + "add r3, r3, r7\n\t" + "ror %[sha256], r8, #2\n\t" + "eor %[data], r8, r9\n\t" + "eor %[sha256], %[sha256], r8, ror 13\n\t" + "eor r10, r9, %[len]\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r8, ror 22\n\t" + "eor %[data], %[data], r9\n\t" + "add r7, r7, %[sha256]\n\t" + "add r7, r7, %[data]\n\t" + /* Round 3 */ + "vmov r10, d1[1]\n\t" + /* Calc new W[2]-W[3] */ + "vext.8 d10, d1, d2, #4\n\t" + "ror %[sha256], r3, #6\n\t" + "vshl.u32 d8, d0, #15\n\t" + "eor %[data], r4, r5\n\t" + "vsri.u32 d8, d0, #17\n\t" + "eor %[sha256], %[sha256], r3, ror 11\n\t" + "vshl.u32 d9, d0, #13\n\t" + "and %[data], %[data], r3\n\t" + "vsri.u32 d9, d0, #19\n\t" + "eor %[sha256], %[sha256], r3, ror 25\n\t" + "veor d9, d8\n\t" + "eor %[data], %[data], r5\n\t" + "vshr.u32 d8, d0, #10\n\t" + "add r6, r6, %[sha256]\n\t" + "veor d9, d8\n\t" + "add r6, r6, %[data]\n\t" + "vadd.i32 d1, d9\n\t" + "ldr %[sha256], [r12, #12]\n\t" + "vext.8 d11, d5, d6, #4\n\t" + "add r6, r6, r10\n\t" + "vadd.i32 d1, d11\n\t" + "add r6, r6, %[sha256]\n\t" + "vshl.u32 d8, d10, #25\n\t" + "add %[len], %[len], r6\n\t" + "vsri.u32 d8, d10, #7\n\t" + "ror %[sha256], r7, #2\n\t" + "vshl.u32 d9, d10, #14\n\t" + "eor %[data], r7, r8\n\t" + "vsri.u32 d9, d10, #18\n\t" + "eor %[sha256], %[sha256], r7, ror 13\n\t" + "veor d9, d8\n\t" + "eor r10, r8, r9\n\t" + "vshr.u32 d10, #3\n\t" + "and %[data], %[data], r10\n\t" + "veor d9, d10\n\t" + "eor %[sha256], %[sha256], r7, ror 22\n\t" + "vadd.i32 d1, d9\n\t" + "eor %[data], %[data], r8\n\t" + "add r6, r6, %[sha256]\n\t" + "add r6, r6, %[data]\n\t" + /* Round 4 */ + "vmov r10, d2[0]\n\t" + "ror %[sha256], %[len], #6\n\t" + "eor %[data], r3, r4\n\t" + "eor %[sha256], %[sha256], %[len], ror 11\n\t" + "and %[data], %[data], %[len]\n\t" + "eor %[sha256], %[sha256], %[len], ror 25\n\t" + "eor %[data], %[data], r4\n\t" + "add r5, r5, %[sha256]\n\t" + "add r5, r5, %[data]\n\t" + "ldr %[sha256], [r12, #16]\n\t" + "add r5, r5, r10\n\t" + "add r5, r5, %[sha256]\n\t" + "add r9, r9, r5\n\t" + "ror %[sha256], r6, #2\n\t" + "eor %[data], r6, r7\n\t" + "eor %[sha256], %[sha256], r6, ror 13\n\t" + "eor r10, r7, r8\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r6, ror 22\n\t" + "eor %[data], %[data], r7\n\t" + "add r5, r5, %[sha256]\n\t" + "add r5, r5, %[data]\n\t" + /* Round 5 */ + "vmov r10, d2[1]\n\t" + /* Calc new W[4]-W[5] */ + "vext.8 d10, d2, d3, #4\n\t" + "ror %[sha256], r9, #6\n\t" + "vshl.u32 d8, d1, #15\n\t" + "eor %[data], %[len], r3\n\t" + "vsri.u32 d8, d1, #17\n\t" + "eor %[sha256], %[sha256], r9, ror 11\n\t" + "vshl.u32 d9, d1, #13\n\t" + "and %[data], %[data], r9\n\t" + "vsri.u32 d9, d1, #19\n\t" + "eor %[sha256], %[sha256], r9, ror 25\n\t" + "veor d9, d8\n\t" + "eor %[data], %[data], r3\n\t" + "vshr.u32 d8, d1, #10\n\t" + "add r4, r4, %[sha256]\n\t" + "veor d9, d8\n\t" + "add r4, r4, %[data]\n\t" + "vadd.i32 d2, d9\n\t" + "ldr %[sha256], [r12, #20]\n\t" + "vext.8 d11, d6, d7, #4\n\t" + "add r4, r4, r10\n\t" + "vadd.i32 d2, d11\n\t" + "add r4, r4, %[sha256]\n\t" + "vshl.u32 d8, d10, #25\n\t" + "add r8, r8, r4\n\t" + "vsri.u32 d8, d10, #7\n\t" + "ror %[sha256], r5, #2\n\t" + "vshl.u32 d9, d10, #14\n\t" + "eor %[data], r5, r6\n\t" + "vsri.u32 d9, d10, #18\n\t" + "eor %[sha256], %[sha256], r5, ror 13\n\t" + "veor d9, d8\n\t" + "eor r10, r6, r7\n\t" + "vshr.u32 d10, #3\n\t" + "and %[data], %[data], r10\n\t" + "veor d9, d10\n\t" + "eor %[sha256], %[sha256], r5, ror 22\n\t" + "vadd.i32 d2, d9\n\t" + "eor %[data], %[data], r6\n\t" + "add r4, r4, %[sha256]\n\t" + "add r4, r4, %[data]\n\t" + /* Round 6 */ + "vmov r10, d3[0]\n\t" + "ror %[sha256], r8, #6\n\t" + "eor %[data], r9, %[len]\n\t" + "eor %[sha256], %[sha256], r8, ror 11\n\t" + "and %[data], %[data], r8\n\t" + "eor %[sha256], %[sha256], r8, ror 25\n\t" + "eor %[data], %[data], %[len]\n\t" + "add r3, r3, %[sha256]\n\t" + "add r3, r3, %[data]\n\t" + "ldr %[sha256], [r12, #24]\n\t" + "add r3, r3, r10\n\t" + "add r3, r3, %[sha256]\n\t" + "add r7, r7, r3\n\t" + "ror %[sha256], r4, #2\n\t" + "eor %[data], r4, r5\n\t" + "eor %[sha256], %[sha256], r4, ror 13\n\t" + "eor r10, r5, r6\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r4, ror 22\n\t" + "eor %[data], %[data], r5\n\t" + "add r3, r3, %[sha256]\n\t" + "add r3, r3, %[data]\n\t" + /* Round 7 */ + "vmov r10, d3[1]\n\t" + /* Calc new W[6]-W[7] */ + "vext.8 d10, d3, d4, #4\n\t" + "ror %[sha256], r7, #6\n\t" + "vshl.u32 d8, d2, #15\n\t" + "eor %[data], r8, r9\n\t" + "vsri.u32 d8, d2, #17\n\t" + "eor %[sha256], %[sha256], r7, ror 11\n\t" + "vshl.u32 d9, d2, #13\n\t" + "and %[data], %[data], r7\n\t" + "vsri.u32 d9, d2, #19\n\t" + "eor %[sha256], %[sha256], r7, ror 25\n\t" + "veor d9, d8\n\t" + "eor %[data], %[data], r9\n\t" + "vshr.u32 d8, d2, #10\n\t" + "add %[len], %[len], %[sha256]\n\t" + "veor d9, d8\n\t" + "add %[len], %[len], %[data]\n\t" + "vadd.i32 d3, d9\n\t" + "ldr %[sha256], [r12, #28]\n\t" + "vext.8 d11, d7, d0, #4\n\t" + "add %[len], %[len], r10\n\t" + "vadd.i32 d3, d11\n\t" + "add %[len], %[len], %[sha256]\n\t" + "vshl.u32 d8, d10, #25\n\t" + "add r6, r6, %[len]\n\t" + "vsri.u32 d8, d10, #7\n\t" + "ror %[sha256], r3, #2\n\t" + "vshl.u32 d9, d10, #14\n\t" + "eor %[data], r3, r4\n\t" + "vsri.u32 d9, d10, #18\n\t" + "eor %[sha256], %[sha256], r3, ror 13\n\t" + "veor d9, d8\n\t" + "eor r10, r4, r5\n\t" + "vshr.u32 d10, #3\n\t" + "and %[data], %[data], r10\n\t" + "veor d9, d10\n\t" + "eor %[sha256], %[sha256], r3, ror 22\n\t" + "vadd.i32 d3, d9\n\t" + "eor %[data], %[data], r4\n\t" + "add %[len], %[len], %[sha256]\n\t" + "add %[len], %[len], %[data]\n\t" + /* Round 8 */ + "vmov r10, d4[0]\n\t" + "ror %[sha256], r6, #6\n\t" + "eor %[data], r7, r8\n\t" + "eor %[sha256], %[sha256], r6, ror 11\n\t" + "and %[data], %[data], r6\n\t" + "eor %[sha256], %[sha256], r6, ror 25\n\t" + "eor %[data], %[data], r8\n\t" + "add r9, r9, %[sha256]\n\t" + "add r9, r9, %[data]\n\t" + "ldr %[sha256], [r12, #32]\n\t" + "add r9, r9, r10\n\t" + "add r9, r9, %[sha256]\n\t" + "add r5, r5, r9\n\t" + "ror %[sha256], %[len], #2\n\t" + "eor %[data], %[len], r3\n\t" + "eor %[sha256], %[sha256], %[len], ror 13\n\t" + "eor r10, r3, r4\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], %[len], ror 22\n\t" + "eor %[data], %[data], r3\n\t" + "add r9, r9, %[sha256]\n\t" + "add r9, r9, %[data]\n\t" + /* Round 9 */ + "vmov r10, d4[1]\n\t" + /* Calc new W[8]-W[9] */ + "vext.8 d10, d4, d5, #4\n\t" + "ror %[sha256], r5, #6\n\t" + "vshl.u32 d8, d3, #15\n\t" + "eor %[data], r6, r7\n\t" + "vsri.u32 d8, d3, #17\n\t" + "eor %[sha256], %[sha256], r5, ror 11\n\t" + "vshl.u32 d9, d3, #13\n\t" + "and %[data], %[data], r5\n\t" + "vsri.u32 d9, d3, #19\n\t" + "eor %[sha256], %[sha256], r5, ror 25\n\t" + "veor d9, d8\n\t" + "eor %[data], %[data], r7\n\t" + "vshr.u32 d8, d3, #10\n\t" + "add r8, r8, %[sha256]\n\t" + "veor d9, d8\n\t" + "add r8, r8, %[data]\n\t" + "vadd.i32 d4, d9\n\t" + "ldr %[sha256], [r12, #36]\n\t" + "vext.8 d11, d0, d1, #4\n\t" + "add r8, r8, r10\n\t" + "vadd.i32 d4, d11\n\t" + "add r8, r8, %[sha256]\n\t" + "vshl.u32 d8, d10, #25\n\t" + "add r4, r4, r8\n\t" + "vsri.u32 d8, d10, #7\n\t" + "ror %[sha256], r9, #2\n\t" + "vshl.u32 d9, d10, #14\n\t" + "eor %[data], r9, %[len]\n\t" + "vsri.u32 d9, d10, #18\n\t" + "eor %[sha256], %[sha256], r9, ror 13\n\t" + "veor d9, d8\n\t" + "eor r10, %[len], r3\n\t" + "vshr.u32 d10, #3\n\t" + "and %[data], %[data], r10\n\t" + "veor d9, d10\n\t" + "eor %[sha256], %[sha256], r9, ror 22\n\t" + "vadd.i32 d4, d9\n\t" + "eor %[data], %[data], %[len]\n\t" + "add r8, r8, %[sha256]\n\t" + "add r8, r8, %[data]\n\t" + /* Round 10 */ + "vmov r10, d5[0]\n\t" + "ror %[sha256], r4, #6\n\t" + "eor %[data], r5, r6\n\t" + "eor %[sha256], %[sha256], r4, ror 11\n\t" + "and %[data], %[data], r4\n\t" + "eor %[sha256], %[sha256], r4, ror 25\n\t" + "eor %[data], %[data], r6\n\t" + "add r7, r7, %[sha256]\n\t" + "add r7, r7, %[data]\n\t" + "ldr %[sha256], [r12, #40]\n\t" + "add r7, r7, r10\n\t" + "add r7, r7, %[sha256]\n\t" + "add r3, r3, r7\n\t" + "ror %[sha256], r8, #2\n\t" + "eor %[data], r8, r9\n\t" + "eor %[sha256], %[sha256], r8, ror 13\n\t" + "eor r10, r9, %[len]\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r8, ror 22\n\t" + "eor %[data], %[data], r9\n\t" + "add r7, r7, %[sha256]\n\t" + "add r7, r7, %[data]\n\t" + /* Round 11 */ + "vmov r10, d5[1]\n\t" + /* Calc new W[10]-W[11] */ + "vext.8 d10, d5, d6, #4\n\t" + "ror %[sha256], r3, #6\n\t" + "vshl.u32 d8, d4, #15\n\t" + "eor %[data], r4, r5\n\t" + "vsri.u32 d8, d4, #17\n\t" + "eor %[sha256], %[sha256], r3, ror 11\n\t" + "vshl.u32 d9, d4, #13\n\t" + "and %[data], %[data], r3\n\t" + "vsri.u32 d9, d4, #19\n\t" + "eor %[sha256], %[sha256], r3, ror 25\n\t" + "veor d9, d8\n\t" + "eor %[data], %[data], r5\n\t" + "vshr.u32 d8, d4, #10\n\t" + "add r6, r6, %[sha256]\n\t" + "veor d9, d8\n\t" + "add r6, r6, %[data]\n\t" + "vadd.i32 d5, d9\n\t" + "ldr %[sha256], [r12, #44]\n\t" + "vext.8 d11, d1, d2, #4\n\t" + "add r6, r6, r10\n\t" + "vadd.i32 d5, d11\n\t" + "add r6, r6, %[sha256]\n\t" + "vshl.u32 d8, d10, #25\n\t" + "add %[len], %[len], r6\n\t" + "vsri.u32 d8, d10, #7\n\t" + "ror %[sha256], r7, #2\n\t" + "vshl.u32 d9, d10, #14\n\t" + "eor %[data], r7, r8\n\t" + "vsri.u32 d9, d10, #18\n\t" + "eor %[sha256], %[sha256], r7, ror 13\n\t" + "veor d9, d8\n\t" + "eor r10, r8, r9\n\t" + "vshr.u32 d10, #3\n\t" + "and %[data], %[data], r10\n\t" + "veor d9, d10\n\t" + "eor %[sha256], %[sha256], r7, ror 22\n\t" + "vadd.i32 d5, d9\n\t" + "eor %[data], %[data], r8\n\t" + "add r6, r6, %[sha256]\n\t" + "add r6, r6, %[data]\n\t" + /* Round 12 */ + "vmov r10, d6[0]\n\t" + "ror %[sha256], %[len], #6\n\t" + "eor %[data], r3, r4\n\t" + "eor %[sha256], %[sha256], %[len], ror 11\n\t" + "and %[data], %[data], %[len]\n\t" + "eor %[sha256], %[sha256], %[len], ror 25\n\t" + "eor %[data], %[data], r4\n\t" + "add r5, r5, %[sha256]\n\t" + "add r5, r5, %[data]\n\t" + "ldr %[sha256], [r12, #48]\n\t" + "add r5, r5, r10\n\t" + "add r5, r5, %[sha256]\n\t" + "add r9, r9, r5\n\t" + "ror %[sha256], r6, #2\n\t" + "eor %[data], r6, r7\n\t" + "eor %[sha256], %[sha256], r6, ror 13\n\t" + "eor r10, r7, r8\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r6, ror 22\n\t" + "eor %[data], %[data], r7\n\t" + "add r5, r5, %[sha256]\n\t" + "add r5, r5, %[data]\n\t" + /* Round 13 */ + "vmov r10, d6[1]\n\t" + /* Calc new W[12]-W[13] */ + "vext.8 d10, d6, d7, #4\n\t" + "ror %[sha256], r9, #6\n\t" + "vshl.u32 d8, d5, #15\n\t" + "eor %[data], %[len], r3\n\t" + "vsri.u32 d8, d5, #17\n\t" + "eor %[sha256], %[sha256], r9, ror 11\n\t" + "vshl.u32 d9, d5, #13\n\t" + "and %[data], %[data], r9\n\t" + "vsri.u32 d9, d5, #19\n\t" + "eor %[sha256], %[sha256], r9, ror 25\n\t" + "veor d9, d8\n\t" + "eor %[data], %[data], r3\n\t" + "vshr.u32 d8, d5, #10\n\t" + "add r4, r4, %[sha256]\n\t" + "veor d9, d8\n\t" + "add r4, r4, %[data]\n\t" + "vadd.i32 d6, d9\n\t" + "ldr %[sha256], [r12, #52]\n\t" + "vext.8 d11, d2, d3, #4\n\t" + "add r4, r4, r10\n\t" + "vadd.i32 d6, d11\n\t" + "add r4, r4, %[sha256]\n\t" + "vshl.u32 d8, d10, #25\n\t" + "add r8, r8, r4\n\t" + "vsri.u32 d8, d10, #7\n\t" + "ror %[sha256], r5, #2\n\t" + "vshl.u32 d9, d10, #14\n\t" + "eor %[data], r5, r6\n\t" + "vsri.u32 d9, d10, #18\n\t" + "eor %[sha256], %[sha256], r5, ror 13\n\t" + "veor d9, d8\n\t" + "eor r10, r6, r7\n\t" + "vshr.u32 d10, #3\n\t" + "and %[data], %[data], r10\n\t" + "veor d9, d10\n\t" + "eor %[sha256], %[sha256], r5, ror 22\n\t" + "vadd.i32 d6, d9\n\t" + "eor %[data], %[data], r6\n\t" + "add r4, r4, %[sha256]\n\t" + "add r4, r4, %[data]\n\t" + /* Round 14 */ + "vmov r10, d7[0]\n\t" + "ror %[sha256], r8, #6\n\t" + "eor %[data], r9, %[len]\n\t" + "eor %[sha256], %[sha256], r8, ror 11\n\t" + "and %[data], %[data], r8\n\t" + "eor %[sha256], %[sha256], r8, ror 25\n\t" + "eor %[data], %[data], %[len]\n\t" + "add r3, r3, %[sha256]\n\t" + "add r3, r3, %[data]\n\t" + "ldr %[sha256], [r12, #56]\n\t" + "add r3, r3, r10\n\t" + "add r3, r3, %[sha256]\n\t" + "add r7, r7, r3\n\t" + "ror %[sha256], r4, #2\n\t" + "eor %[data], r4, r5\n\t" + "eor %[sha256], %[sha256], r4, ror 13\n\t" + "eor r10, r5, r6\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r4, ror 22\n\t" + "eor %[data], %[data], r5\n\t" + "add r3, r3, %[sha256]\n\t" + "add r3, r3, %[data]\n\t" + /* Round 15 */ + "vmov r10, d7[1]\n\t" + /* Calc new W[14]-W[15] */ + "vext.8 d10, d7, d0, #4\n\t" + "ror %[sha256], r7, #6\n\t" + "vshl.u32 d8, d6, #15\n\t" + "eor %[data], r8, r9\n\t" + "vsri.u32 d8, d6, #17\n\t" + "eor %[sha256], %[sha256], r7, ror 11\n\t" + "vshl.u32 d9, d6, #13\n\t" + "and %[data], %[data], r7\n\t" + "vsri.u32 d9, d6, #19\n\t" + "eor %[sha256], %[sha256], r7, ror 25\n\t" + "veor d9, d8\n\t" + "eor %[data], %[data], r9\n\t" + "vshr.u32 d8, d6, #10\n\t" + "add %[len], %[len], %[sha256]\n\t" + "veor d9, d8\n\t" + "add %[len], %[len], %[data]\n\t" + "vadd.i32 d7, d9\n\t" + "ldr %[sha256], [r12, #60]\n\t" + "vext.8 d11, d3, d4, #4\n\t" + "add %[len], %[len], r10\n\t" + "vadd.i32 d7, d11\n\t" + "add %[len], %[len], %[sha256]\n\t" + "vshl.u32 d8, d10, #25\n\t" + "add r6, r6, %[len]\n\t" + "vsri.u32 d8, d10, #7\n\t" + "ror %[sha256], r3, #2\n\t" + "vshl.u32 d9, d10, #14\n\t" + "eor %[data], r3, r4\n\t" + "vsri.u32 d9, d10, #18\n\t" + "eor %[sha256], %[sha256], r3, ror 13\n\t" + "veor d9, d8\n\t" + "eor r10, r4, r5\n\t" + "vshr.u32 d10, #3\n\t" + "and %[data], %[data], r10\n\t" + "veor d9, d10\n\t" + "eor %[sha256], %[sha256], r3, ror 22\n\t" + "vadd.i32 d7, d9\n\t" + "eor %[data], %[data], r4\n\t" + "add %[len], %[len], %[sha256]\n\t" + "add %[len], %[len], %[data]\n\t" + "add r12, r12, #0x40\n\t" + "subs lr, lr, #1\n\t" + "bne L_SHA256_transform_neon_len_start_%=\n\t" + /* Round 0 */ + "vmov r10, d0[0]\n\t" + "ror %[sha256], r6, #6\n\t" + "eor %[data], r7, r8\n\t" + "eor %[sha256], %[sha256], r6, ror 11\n\t" + "and %[data], %[data], r6\n\t" + "eor %[sha256], %[sha256], r6, ror 25\n\t" + "eor %[data], %[data], r8\n\t" + "add r9, r9, %[sha256]\n\t" + "add r9, r9, %[data]\n\t" + "ldr %[sha256], [r12]\n\t" + "add r9, r9, r10\n\t" + "add r9, r9, %[sha256]\n\t" + "add r5, r5, r9\n\t" + "ror %[sha256], %[len], #2\n\t" + "eor %[data], %[len], r3\n\t" + "eor %[sha256], %[sha256], %[len], ror 13\n\t" + "eor r10, r3, r4\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], %[len], ror 22\n\t" + "eor %[data], %[data], r3\n\t" + "add r9, r9, %[sha256]\n\t" + "add r9, r9, %[data]\n\t" + /* Round 1 */ + "vmov r10, d0[1]\n\t" + "ror %[sha256], r5, #6\n\t" + "eor %[data], r6, r7\n\t" + "eor %[sha256], %[sha256], r5, ror 11\n\t" + "and %[data], %[data], r5\n\t" + "eor %[sha256], %[sha256], r5, ror 25\n\t" + "eor %[data], %[data], r7\n\t" + "add r8, r8, %[sha256]\n\t" + "add r8, r8, %[data]\n\t" + "ldr %[sha256], [r12, #4]\n\t" + "add r8, r8, r10\n\t" + "add r8, r8, %[sha256]\n\t" + "add r4, r4, r8\n\t" + "ror %[sha256], r9, #2\n\t" + "eor %[data], r9, %[len]\n\t" + "eor %[sha256], %[sha256], r9, ror 13\n\t" + "eor r10, %[len], r3\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r9, ror 22\n\t" + "eor %[data], %[data], %[len]\n\t" + "add r8, r8, %[sha256]\n\t" + "add r8, r8, %[data]\n\t" + /* Round 2 */ + "vmov r10, d1[0]\n\t" + "ror %[sha256], r4, #6\n\t" + "eor %[data], r5, r6\n\t" + "eor %[sha256], %[sha256], r4, ror 11\n\t" + "and %[data], %[data], r4\n\t" + "eor %[sha256], %[sha256], r4, ror 25\n\t" + "eor %[data], %[data], r6\n\t" + "add r7, r7, %[sha256]\n\t" + "add r7, r7, %[data]\n\t" + "ldr %[sha256], [r12, #8]\n\t" + "add r7, r7, r10\n\t" + "add r7, r7, %[sha256]\n\t" + "add r3, r3, r7\n\t" + "ror %[sha256], r8, #2\n\t" + "eor %[data], r8, r9\n\t" + "eor %[sha256], %[sha256], r8, ror 13\n\t" + "eor r10, r9, %[len]\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r8, ror 22\n\t" + "eor %[data], %[data], r9\n\t" + "add r7, r7, %[sha256]\n\t" + "add r7, r7, %[data]\n\t" + /* Round 3 */ + "vmov r10, d1[1]\n\t" + "ror %[sha256], r3, #6\n\t" + "eor %[data], r4, r5\n\t" + "eor %[sha256], %[sha256], r3, ror 11\n\t" + "and %[data], %[data], r3\n\t" + "eor %[sha256], %[sha256], r3, ror 25\n\t" + "eor %[data], %[data], r5\n\t" + "add r6, r6, %[sha256]\n\t" + "add r6, r6, %[data]\n\t" + "ldr %[sha256], [r12, #12]\n\t" + "add r6, r6, r10\n\t" + "add r6, r6, %[sha256]\n\t" + "add %[len], %[len], r6\n\t" + "ror %[sha256], r7, #2\n\t" + "eor %[data], r7, r8\n\t" + "eor %[sha256], %[sha256], r7, ror 13\n\t" + "eor r10, r8, r9\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r7, ror 22\n\t" + "eor %[data], %[data], r8\n\t" + "add r6, r6, %[sha256]\n\t" + "add r6, r6, %[data]\n\t" + /* Round 4 */ + "vmov r10, d2[0]\n\t" + "ror %[sha256], %[len], #6\n\t" + "eor %[data], r3, r4\n\t" + "eor %[sha256], %[sha256], %[len], ror 11\n\t" + "and %[data], %[data], %[len]\n\t" + "eor %[sha256], %[sha256], %[len], ror 25\n\t" + "eor %[data], %[data], r4\n\t" + "add r5, r5, %[sha256]\n\t" + "add r5, r5, %[data]\n\t" + "ldr %[sha256], [r12, #16]\n\t" + "add r5, r5, r10\n\t" + "add r5, r5, %[sha256]\n\t" + "add r9, r9, r5\n\t" + "ror %[sha256], r6, #2\n\t" + "eor %[data], r6, r7\n\t" + "eor %[sha256], %[sha256], r6, ror 13\n\t" + "eor r10, r7, r8\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r6, ror 22\n\t" + "eor %[data], %[data], r7\n\t" + "add r5, r5, %[sha256]\n\t" + "add r5, r5, %[data]\n\t" + /* Round 5 */ + "vmov r10, d2[1]\n\t" + "ror %[sha256], r9, #6\n\t" + "eor %[data], %[len], r3\n\t" + "eor %[sha256], %[sha256], r9, ror 11\n\t" + "and %[data], %[data], r9\n\t" + "eor %[sha256], %[sha256], r9, ror 25\n\t" + "eor %[data], %[data], r3\n\t" + "add r4, r4, %[sha256]\n\t" + "add r4, r4, %[data]\n\t" + "ldr %[sha256], [r12, #20]\n\t" + "add r4, r4, r10\n\t" + "add r4, r4, %[sha256]\n\t" + "add r8, r8, r4\n\t" + "ror %[sha256], r5, #2\n\t" + "eor %[data], r5, r6\n\t" + "eor %[sha256], %[sha256], r5, ror 13\n\t" + "eor r10, r6, r7\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r5, ror 22\n\t" + "eor %[data], %[data], r6\n\t" + "add r4, r4, %[sha256]\n\t" + "add r4, r4, %[data]\n\t" + /* Round 6 */ + "vmov r10, d3[0]\n\t" + "ror %[sha256], r8, #6\n\t" + "eor %[data], r9, %[len]\n\t" + "eor %[sha256], %[sha256], r8, ror 11\n\t" + "and %[data], %[data], r8\n\t" + "eor %[sha256], %[sha256], r8, ror 25\n\t" + "eor %[data], %[data], %[len]\n\t" + "add r3, r3, %[sha256]\n\t" + "add r3, r3, %[data]\n\t" + "ldr %[sha256], [r12, #24]\n\t" + "add r3, r3, r10\n\t" + "add r3, r3, %[sha256]\n\t" + "add r7, r7, r3\n\t" + "ror %[sha256], r4, #2\n\t" + "eor %[data], r4, r5\n\t" + "eor %[sha256], %[sha256], r4, ror 13\n\t" + "eor r10, r5, r6\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r4, ror 22\n\t" + "eor %[data], %[data], r5\n\t" + "add r3, r3, %[sha256]\n\t" + "add r3, r3, %[data]\n\t" + /* Round 7 */ + "vmov r10, d3[1]\n\t" + "ror %[sha256], r7, #6\n\t" + "eor %[data], r8, r9\n\t" + "eor %[sha256], %[sha256], r7, ror 11\n\t" + "and %[data], %[data], r7\n\t" + "eor %[sha256], %[sha256], r7, ror 25\n\t" + "eor %[data], %[data], r9\n\t" + "add %[len], %[len], %[sha256]\n\t" + "add %[len], %[len], %[data]\n\t" + "ldr %[sha256], [r12, #28]\n\t" + "add %[len], %[len], r10\n\t" + "add %[len], %[len], %[sha256]\n\t" + "add r6, r6, %[len]\n\t" + "ror %[sha256], r3, #2\n\t" + "eor %[data], r3, r4\n\t" + "eor %[sha256], %[sha256], r3, ror 13\n\t" + "eor r10, r4, r5\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r3, ror 22\n\t" + "eor %[data], %[data], r4\n\t" + "add %[len], %[len], %[sha256]\n\t" + "add %[len], %[len], %[data]\n\t" + /* Round 8 */ + "vmov r10, d4[0]\n\t" + "ror %[sha256], r6, #6\n\t" + "eor %[data], r7, r8\n\t" + "eor %[sha256], %[sha256], r6, ror 11\n\t" + "and %[data], %[data], r6\n\t" + "eor %[sha256], %[sha256], r6, ror 25\n\t" + "eor %[data], %[data], r8\n\t" + "add r9, r9, %[sha256]\n\t" + "add r9, r9, %[data]\n\t" + "ldr %[sha256], [r12, #32]\n\t" + "add r9, r9, r10\n\t" + "add r9, r9, %[sha256]\n\t" + "add r5, r5, r9\n\t" + "ror %[sha256], %[len], #2\n\t" + "eor %[data], %[len], r3\n\t" + "eor %[sha256], %[sha256], %[len], ror 13\n\t" + "eor r10, r3, r4\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], %[len], ror 22\n\t" + "eor %[data], %[data], r3\n\t" + "add r9, r9, %[sha256]\n\t" + "add r9, r9, %[data]\n\t" + /* Round 9 */ + "vmov r10, d4[1]\n\t" + "ror %[sha256], r5, #6\n\t" + "eor %[data], r6, r7\n\t" + "eor %[sha256], %[sha256], r5, ror 11\n\t" + "and %[data], %[data], r5\n\t" + "eor %[sha256], %[sha256], r5, ror 25\n\t" + "eor %[data], %[data], r7\n\t" + "add r8, r8, %[sha256]\n\t" + "add r8, r8, %[data]\n\t" + "ldr %[sha256], [r12, #36]\n\t" + "add r8, r8, r10\n\t" + "add r8, r8, %[sha256]\n\t" + "add r4, r4, r8\n\t" + "ror %[sha256], r9, #2\n\t" + "eor %[data], r9, %[len]\n\t" + "eor %[sha256], %[sha256], r9, ror 13\n\t" + "eor r10, %[len], r3\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r9, ror 22\n\t" + "eor %[data], %[data], %[len]\n\t" + "add r8, r8, %[sha256]\n\t" + "add r8, r8, %[data]\n\t" + /* Round 10 */ + "vmov r10, d5[0]\n\t" + "ror %[sha256], r4, #6\n\t" + "eor %[data], r5, r6\n\t" + "eor %[sha256], %[sha256], r4, ror 11\n\t" + "and %[data], %[data], r4\n\t" + "eor %[sha256], %[sha256], r4, ror 25\n\t" + "eor %[data], %[data], r6\n\t" + "add r7, r7, %[sha256]\n\t" + "add r7, r7, %[data]\n\t" + "ldr %[sha256], [r12, #40]\n\t" + "add r7, r7, r10\n\t" + "add r7, r7, %[sha256]\n\t" + "add r3, r3, r7\n\t" + "ror %[sha256], r8, #2\n\t" + "eor %[data], r8, r9\n\t" + "eor %[sha256], %[sha256], r8, ror 13\n\t" + "eor r10, r9, %[len]\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r8, ror 22\n\t" + "eor %[data], %[data], r9\n\t" + "add r7, r7, %[sha256]\n\t" + "add r7, r7, %[data]\n\t" + /* Round 11 */ + "vmov r10, d5[1]\n\t" + "ror %[sha256], r3, #6\n\t" + "eor %[data], r4, r5\n\t" + "eor %[sha256], %[sha256], r3, ror 11\n\t" + "and %[data], %[data], r3\n\t" + "eor %[sha256], %[sha256], r3, ror 25\n\t" + "eor %[data], %[data], r5\n\t" + "add r6, r6, %[sha256]\n\t" + "add r6, r6, %[data]\n\t" + "ldr %[sha256], [r12, #44]\n\t" + "add r6, r6, r10\n\t" + "add r6, r6, %[sha256]\n\t" + "add %[len], %[len], r6\n\t" + "ror %[sha256], r7, #2\n\t" + "eor %[data], r7, r8\n\t" + "eor %[sha256], %[sha256], r7, ror 13\n\t" + "eor r10, r8, r9\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r7, ror 22\n\t" + "eor %[data], %[data], r8\n\t" + "add r6, r6, %[sha256]\n\t" + "add r6, r6, %[data]\n\t" + /* Round 12 */ + "vmov r10, d6[0]\n\t" + "ror %[sha256], %[len], #6\n\t" + "eor %[data], r3, r4\n\t" + "eor %[sha256], %[sha256], %[len], ror 11\n\t" + "and %[data], %[data], %[len]\n\t" + "eor %[sha256], %[sha256], %[len], ror 25\n\t" + "eor %[data], %[data], r4\n\t" + "add r5, r5, %[sha256]\n\t" + "add r5, r5, %[data]\n\t" + "ldr %[sha256], [r12, #48]\n\t" + "add r5, r5, r10\n\t" + "add r5, r5, %[sha256]\n\t" + "add r9, r9, r5\n\t" + "ror %[sha256], r6, #2\n\t" + "eor %[data], r6, r7\n\t" + "eor %[sha256], %[sha256], r6, ror 13\n\t" + "eor r10, r7, r8\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r6, ror 22\n\t" + "eor %[data], %[data], r7\n\t" + "add r5, r5, %[sha256]\n\t" + "add r5, r5, %[data]\n\t" + /* Round 13 */ + "vmov r10, d6[1]\n\t" + "ror %[sha256], r9, #6\n\t" + "eor %[data], %[len], r3\n\t" + "eor %[sha256], %[sha256], r9, ror 11\n\t" + "and %[data], %[data], r9\n\t" + "eor %[sha256], %[sha256], r9, ror 25\n\t" + "eor %[data], %[data], r3\n\t" + "add r4, r4, %[sha256]\n\t" + "add r4, r4, %[data]\n\t" + "ldr %[sha256], [r12, #52]\n\t" + "add r4, r4, r10\n\t" + "add r4, r4, %[sha256]\n\t" + "add r8, r8, r4\n\t" + "ror %[sha256], r5, #2\n\t" + "eor %[data], r5, r6\n\t" + "eor %[sha256], %[sha256], r5, ror 13\n\t" + "eor r10, r6, r7\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r5, ror 22\n\t" + "eor %[data], %[data], r6\n\t" + "add r4, r4, %[sha256]\n\t" + "add r4, r4, %[data]\n\t" + /* Round 14 */ + "vmov r10, d7[0]\n\t" + "ror %[sha256], r8, #6\n\t" + "eor %[data], r9, %[len]\n\t" + "eor %[sha256], %[sha256], r8, ror 11\n\t" + "and %[data], %[data], r8\n\t" + "eor %[sha256], %[sha256], r8, ror 25\n\t" + "eor %[data], %[data], %[len]\n\t" + "add r3, r3, %[sha256]\n\t" + "add r3, r3, %[data]\n\t" + "ldr %[sha256], [r12, #56]\n\t" + "add r3, r3, r10\n\t" + "add r3, r3, %[sha256]\n\t" + "add r7, r7, r3\n\t" + "ror %[sha256], r4, #2\n\t" + "eor %[data], r4, r5\n\t" + "eor %[sha256], %[sha256], r4, ror 13\n\t" + "eor r10, r5, r6\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r4, ror 22\n\t" + "eor %[data], %[data], r5\n\t" + "add r3, r3, %[sha256]\n\t" + "add r3, r3, %[data]\n\t" + /* Round 15 */ + "vmov r10, d7[1]\n\t" + "ror %[sha256], r7, #6\n\t" + "eor %[data], r8, r9\n\t" + "eor %[sha256], %[sha256], r7, ror 11\n\t" + "and %[data], %[data], r7\n\t" + "eor %[sha256], %[sha256], r7, ror 25\n\t" + "eor %[data], %[data], r9\n\t" + "add %[len], %[len], %[sha256]\n\t" + "add %[len], %[len], %[data]\n\t" + "ldr %[sha256], [r12, #60]\n\t" + "add %[len], %[len], r10\n\t" + "add %[len], %[len], %[sha256]\n\t" + "add r6, r6, %[len]\n\t" + "ror %[sha256], r3, #2\n\t" + "eor %[data], r3, r4\n\t" + "eor %[sha256], %[sha256], r3, ror 13\n\t" + "eor r10, r4, r5\n\t" + "and %[data], %[data], r10\n\t" + "eor %[sha256], %[sha256], r3, ror 22\n\t" + "eor %[data], %[data], r4\n\t" + "add %[len], %[len], %[sha256]\n\t" + "add %[len], %[len], %[data]\n\t" + "ldr r10, [sp]\n\t" + /* Add in digest from start */ + "ldrd %[sha256], %[data], [r10]\n\t" + "add %[len], %[len], %[sha256]\n\t" + "add r3, r3, %[data]\n\t" + "strd %[len], r3, [r10]\n\t" + "ldrd %[sha256], %[data], [r10, #8]\n\t" + "add r4, r4, %[sha256]\n\t" + "add r5, r5, %[data]\n\t" + "strd r4, r5, [r10, #8]\n\t" + "ldrd %[sha256], %[data], [r10, #16]\n\t" + "add r6, r6, %[sha256]\n\t" + "add r7, r7, %[data]\n\t" + "strd r6, r7, [r10, #16]\n\t" + "ldrd %[sha256], %[data], [r10, #24]\n\t" + "add r8, r8, %[sha256]\n\t" + "add r9, r9, %[data]\n\t" + "strd r8, r9, [r10, #24]\n\t" + "ldr r10, [sp, #8]\n\t" + "ldr %[data], [sp, #4]\n\t" + "subs r10, r10, #0x40\n\t" + "sub r12, r12, #0xc0\n\t" + "str r10, [sp, #8]\n\t" + "bne L_SHA256_transform_neon_len_begin_%=\n\t" + "add sp, sp, #24\n\t" + : [sha256] "+r" (sha256), [data] "+r" (data), [len] "+r" (len) + : [L_SHA256_transform_len_k] "r" (L_SHA256_transform_len_k), [L_SHA256_transform_neon_len_k] "r" (L_SHA256_transform_neon_len_k) + : "memory", "r3", "r12", "lr", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "d8", "d9", "d10", "d11" + ); +} + +#endif /* WOLFSSL_ARMASM_NO_NEON */ +#endif /* !NO_SHA256 */ +#endif /* !__aarch64__ */ +#endif /* WOLFSSL_ARMASM */ diff --git a/wolfcrypt/src/port/arm/armv8-32-sha512-asm.S b/wolfcrypt/src/port/arm/armv8-32-sha512-asm.S index 69067bea1..83e3aa6a5 100644 --- a/wolfcrypt/src/port/arm/armv8-32-sha512-asm.S +++ b/wolfcrypt/src/port/arm/armv8-32-sha512-asm.S @@ -225,7 +225,7 @@ Transform_Sha512_Len: strd r6, r7, [sp, #176] strd r8, r9, [sp, #184] # Start of loop processing a block -L_sha512_len_neon_begin: +L_SHA512_transform_len_begin: # Load, Reverse and Store W ldr r12, [r1] ldr lr, [r1, #4] @@ -319,7 +319,7 @@ L_sha512_len_neon_begin: eor r9, r9, lr mov r10, #4 # Start of 16 rounds -L_sha512_len_neon_start: +L_SHA512_transform_len_start: # Round 0 ldr r12, [r0, #32] ldr lr, [r0, #36] @@ -2546,7 +2546,7 @@ L_sha512_len_neon_start: str lr, [sp, #124] add r3, r3, #0x80 subs r10, r10, #1 - bne L_sha512_len_neon_start + bne L_SHA512_transform_len_start # Round 0 ldr r12, [r0, #32] ldr lr, [r0, #36] @@ -4035,7 +4035,7 @@ L_sha512_len_neon_start: subs r2, r2, #0x80 sub r3, r3, #0x200 add r1, r1, #0x80 - bne L_sha512_len_neon_begin + bne L_SHA512_transform_len_begin eor r0, r0, r0 add sp, sp, #0xc0 pop {r4, r5, r6, r7, r8, r9, r10, pc} @@ -4216,7 +4216,7 @@ Transform_Sha512_Len: # Load digest into working vars vldm.64 r0, {d0-d7} # Start of loop processing a block -L_sha512_len_neon_begin: +L_SHA512_transform_neon_len_begin: # Load W vldm.64 r1!, {d16-d31} vrev64.8 q8, q8 @@ -4230,7 +4230,7 @@ L_sha512_len_neon_begin: adr r3, L_SHA512_transform_neon_len_k mov r12, #4 # Start of 16 rounds -L_sha512_len_neon_start: +L_SHA512_transform_neon_len_start: # Round 0 vld1.64 {d12}, [r3:64]! vshl.u64 d8, d4, #50 @@ -4856,7 +4856,7 @@ L_sha512_len_neon_start: veor q5, q6 vadd.i64 q15, q5 subs r12, r12, #1 - bne L_sha512_len_neon_start + bne L_SHA512_transform_neon_len_start # Round 0 vld1.64 {d12}, [r3:64]! vshl.u64 d8, d4, #50 @@ -5329,7 +5329,7 @@ L_sha512_len_neon_start: vadd.i64 q3, q3, q7 vstm.64 r0, {d0-d7} subs r2, r2, #0x80 - bne L_sha512_len_neon_begin + bne L_SHA512_transform_neon_len_begin vpop {d8-d15} bx lr .size Transform_Sha512_Len,.-Transform_Sha512_Len diff --git a/wolfcrypt/src/port/arm/armv8-32-sha512-asm_c.c b/wolfcrypt/src/port/arm/armv8-32-sha512-asm_c.c index b67dae8bd..103ad4fa1 100644 --- a/wolfcrypt/src/port/arm/armv8-32-sha512-asm_c.c +++ b/wolfcrypt/src/port/arm/armv8-32-sha512-asm_c.c @@ -120,7 +120,7 @@ static const uint64_t L_SHA512_transform_len_k[] = { 0x6c44198c4a475817UL, }; -void Transform_Sha512_Len(); +void Transform_Sha512_Len(wc_Sha512* sha512, const byte* data, word32 len); void Transform_Sha512_Len(wc_Sha512* sha512, const byte* data, word32 len) { __asm__ __volatile__ ( @@ -145,7 +145,7 @@ void Transform_Sha512_Len(wc_Sha512* sha512, const byte* data, word32 len) "strd r8, r9, [sp, #184]\n\t" /* Start of loop processing a block */ "\n" - "L_sha512_len_neon_begin_%=: \n\t" + "L_SHA512_transform_len_begin_%=: \n\t" /* Load, Reverse and Store W */ "ldrd r12, lr, [%[data]]\n\t" "ldrd r4, r5, [%[data], #8]\n\t" @@ -235,7 +235,7 @@ void Transform_Sha512_Len(wc_Sha512* sha512, const byte* data, word32 len) "mov r10, #4\n\t" /* Start of 16 rounds */ "\n" - "L_sha512_len_neon_start_%=: \n\t" + "L_SHA512_transform_len_start_%=: \n\t" /* Round 0 */ "ldrd r12, lr, [%[sha512], #32]\n\t" "lsrs r4, r12, #14\n\t" @@ -2222,7 +2222,7 @@ void Transform_Sha512_Len(wc_Sha512* sha512, const byte* data, word32 len) "strd r12, lr, [sp, #120]\n\t" "add r3, r3, #0x80\n\t" "subs r10, r10, #1\n\t" - "bne L_sha512_len_neon_start_%=\n\t" + "bne L_SHA512_transform_len_start_%=\n\t" /* Round 0 */ "ldrd r12, lr, [%[sha512], #32]\n\t" "lsrs r4, r12, #14\n\t" @@ -3555,7 +3555,7 @@ void Transform_Sha512_Len(wc_Sha512* sha512, const byte* data, word32 len) "subs %[len], %[len], #0x80\n\t" "sub r3, r3, #0x200\n\t" "add %[data], %[data], #0x80\n\t" - "bne L_sha512_len_neon_begin_%=\n\t" + "bne L_SHA512_transform_len_begin_%=\n\t" "eor r0, r0, r0\n\t" "add sp, sp, #0xc0\n\t" : [sha512] "+r" (sha512), [data] "+r" (data), [len] "+r" (len) @@ -3659,7 +3659,7 @@ void Transform_Sha512_Len(wc_Sha512* sha512, const byte* data, word32 len) "vldm.64 %[sha512], {d0-d7}\n\t" /* Start of loop processing a block */ "\n" - "L_sha512_len_neon_begin_%=: \n\t" + "L_SHA512_transform_neon_len_begin_%=: \n\t" /* Load W */ "vldm.64 %[data]!, {d16-d31}\n\t" "vrev64.8 q8, q8\n\t" @@ -3674,7 +3674,7 @@ void Transform_Sha512_Len(wc_Sha512* sha512, const byte* data, word32 len) "mov r12, #4\n\t" /* Start of 16 rounds */ "\n" - "L_sha512_len_neon_start_%=: \n\t" + "L_SHA512_transform_neon_len_start_%=: \n\t" /* Round 0 */ "vld1.64 {d12}, [r3]!\n\t" "vshl.u64 d8, d4, #50\n\t" @@ -4300,7 +4300,7 @@ void Transform_Sha512_Len(wc_Sha512* sha512, const byte* data, word32 len) "veor q5, q6\n\t" "vadd.i64 q15, q5\n\t" "subs r12, r12, #1\n\t" - "bne L_sha512_len_neon_start_%=\n\t" + "bne L_SHA512_transform_neon_len_start_%=\n\t" /* Round 0 */ "vld1.64 {d12}, [r3]!\n\t" "vshl.u64 d8, d4, #50\n\t" @@ -4773,7 +4773,7 @@ void Transform_Sha512_Len(wc_Sha512* sha512, const byte* data, word32 len) "vadd.i64 q3, q3, q7\n\t" "vstm.64 %[sha512], {d0-d7}\n\t" "subs %[len], %[len], #0x80\n\t" - "bne L_sha512_len_neon_begin_%=\n\t" + "bne L_SHA512_transform_neon_len_begin_%=\n\t" : [sha512] "+r" (sha512), [data] "+r" (data), [len] "+r" (len) : [L_SHA512_transform_neon_len_k] "r" (L_SHA512_transform_neon_len_k) : "memory", "r3", "r12", "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" diff --git a/wolfcrypt/src/port/arm/armv8-aes.c b/wolfcrypt/src/port/arm/armv8-aes.c index 48158f1a6..0056a3ccb 100644 --- a/wolfcrypt/src/port/arm/armv8-aes.c +++ b/wolfcrypt/src/port/arm/armv8-aes.c @@ -32,7 +32,8 @@ #include -#if !defined(NO_AES) && defined(WOLFSSL_ARMASM) +#if !defined(NO_AES) && defined(WOLFSSL_ARMASM) && \ + !defined(WOLFSSL_ARMASM_NO_CRYPTO) #ifdef HAVE_FIPS #undef HAVE_FIPS diff --git a/wolfcrypt/src/port/arm/armv8-sha256.c b/wolfcrypt/src/port/arm/armv8-sha256.c index 139d3a734..4109dd19f 100644 --- a/wolfcrypt/src/port/arm/armv8-sha256.c +++ b/wolfcrypt/src/port/arm/armv8-sha256.c @@ -45,6 +45,7 @@ #endif +#ifndef WOLFSSL_ARMASM_NO_CRYPTO static const ALIGN32 word32 K[64] = { 0x428A2F98L, 0x71374491L, 0xB5C0FBCFL, 0xE9B5DBA5L, 0x3956C25BL, 0x59F111F1L, 0x923F82A4L, 0xAB1C5ED5L, 0xD807AA98L, 0x12835B01L, @@ -60,6 +61,7 @@ static const ALIGN32 word32 K[64] = { 0x682E6FF3L, 0x748F82EEL, 0x78A5636FL, 0x84C87814L, 0x8CC70208L, 0x90BEFFFAL, 0xA4506CEBL, 0xBEF9A3F7L, 0xC67178F2L }; +#endif static int InitSha256(wc_Sha256* sha256) @@ -94,6 +96,8 @@ static WC_INLINE void AddLength(wc_Sha256* sha256, word32 len) } +#ifndef WOLFSSL_ARMASM_NO_CRYPTO + #ifdef __aarch64__ /* First block is in sha256->buffer and rest in data. */ @@ -1306,6 +1310,109 @@ static WC_INLINE int Sha256Final(wc_Sha256* sha256, byte* hash) #endif /* __aarch64__ */ +#else + +extern void Transform_Sha256_Len(wc_Sha256* sha256, const byte* data, + word32 len); + +/* ARMv8 hardware acceleration Aarch32 */ +static WC_INLINE int Sha256Update(wc_Sha256* sha256, const byte* data, word32 len) +{ + int ret = 0; + /* do block size increments */ + byte* local = (byte*)sha256->buffer; + word32 blocksLen; + + /* check that internal buffLen is valid */ + if (sha256->buffLen >= WC_SHA256_BLOCK_SIZE) + return BUFFER_E; + + AddLength(sha256, len); + + if (sha256->buffLen > 0) { + word32 add = min(len, WC_SHA256_BLOCK_SIZE - sha256->buffLen); + if (add > 0) { + XMEMCPY(&local[sha256->buffLen], data, add); + + sha256->buffLen += add; + data += add; + len -= add; + } + + if (sha256->buffLen == WC_SHA256_BLOCK_SIZE) { + Transform_Sha256_Len(sha256, (const byte*)sha256->buffer, + WC_SHA256_BLOCK_SIZE); + sha256->buffLen = 0; + } + } + + blocksLen = len & ~(WC_SHA256_BLOCK_SIZE-1); + if (blocksLen > 0) { + /* Byte reversal performed in function if required. */ + Transform_Sha256_Len(sha256, data, blocksLen); + data += blocksLen; + len -= blocksLen; + } + + if (len > 0) { + XMEMCPY(local, data, len); + sha256->buffLen = len; + } + + return ret; +} + +static WC_INLINE int Sha256Final(wc_Sha256* sha256, byte* hash) +{ + byte* local = (byte*)sha256->buffer; + + if (sha256 == NULL) { + return BAD_FUNC_ARG; + } + + local[sha256->buffLen++] = 0x80; /* add 1 */ + + /* pad with zeros */ + if (sha256->buffLen > WC_SHA256_PAD_SIZE) { + XMEMSET(&local[sha256->buffLen], 0, WC_SHA256_BLOCK_SIZE - + sha256->buffLen); + sha256->buffLen += WC_SHA256_BLOCK_SIZE - sha256->buffLen; + Transform_Sha256_Len(sha256, (const byte*)sha256->buffer, + WC_SHA256_BLOCK_SIZE); + + sha256->buffLen = 0; + } + XMEMSET(&local[sha256->buffLen], 0, WC_SHA256_PAD_SIZE - sha256->buffLen); + + /* put lengths in bits */ + sha256->hiLen = (sha256->loLen >> (8 * sizeof(sha256->loLen) - 3)) + + (sha256->hiLen << 3); + sha256->loLen = sha256->loLen << 3; + + /* store lengths */ + /* ! length ordering dependent on digest endian type ! */ + + sha256->buffer[WC_SHA256_BLOCK_SIZE / sizeof(word32) - 2] = sha256->hiLen; + sha256->buffer[WC_SHA256_BLOCK_SIZE / sizeof(word32) - 1] = sha256->loLen; + + ByteReverseWords( + &(sha256->buffer[WC_SHA256_BLOCK_SIZE / sizeof(word32) - 2]), + &(sha256->buffer[WC_SHA256_BLOCK_SIZE / sizeof(word32) - 2]), + WC_SHA256_BLOCK_SIZE - WC_SHA256_PAD_SIZE); + Transform_Sha256_Len(sha256, (const byte*)sha256->buffer, + WC_SHA256_BLOCK_SIZE); + +#ifdef LITTLE_ENDIAN_ORDER + ByteReverseWords((word32*)hash, sha256->digest, WC_SHA256_DIGEST_SIZE); +#else + XMEMCPY(hash, sha256->digest, WC_SHA256_DIGEST_SIZE); +#endif + + return 0; +} + +#endif /* !WOLFSSL_ARMASM_NO_CRYPTO */ + #ifndef NO_SHA256