diff --git a/wolfcrypt/src/sp_cortexm.c b/wolfcrypt/src/sp_cortexm.c index 4dd112b00..5549a22bf 100644 --- a/wolfcrypt/src/sp_cortexm.c +++ b/wolfcrypt/src/sp_cortexm.c @@ -2369,11 +2369,11 @@ SP_NOINLINE static sp_digit sp_2048_add_64(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6", "r8" @@ -2411,11 +2411,11 @@ SP_NOINLINE static sp_digit sp_2048_sub_in_place_64(sp_digit* a, "add %[a], %[a], #8\n\t" "add %[b], %[b], #8\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [a] "+r" (a), [b] "+r" (b) : : "memory", "r3", "r4", "r5", "r6", "r8" @@ -2473,19 +2473,19 @@ SP_NOINLINE static void sp_2048_mul_64(sp_digit* r, const sp_digit* a, "add %[a], %[a], #4\n\t" "sub %[b], %[b], #4\n\t" "cmp %[a], r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, r9\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r12\n\t" "mov r8, r9\n\t" @@ -2498,11 +2498,11 @@ SP_NOINLINE static void sp_2048_mul_64(sp_digit* r, const sp_digit* a, "lsl r6, r6, #8\n\t" "add r6, r6, #248\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r], r8]\n\t" "mov %[a], r10\n\t" "mov %[b], r11\n\t" @@ -2547,11 +2547,11 @@ SP_NOINLINE static void sp_2048_sqr_64(sp_digit* r, const sp_digit* a) "add r2, r2, r10\n\t" "\n2:\n\t" "cmp r2, %[a]\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 4f\n\t" #else "beq.n 4f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* Multiply * 2: Start */ "ldr r6, [%[a]]\n\t" "ldr r8, [r2]\n\t" @@ -2563,11 +2563,11 @@ SP_NOINLINE static void sp_2048_sqr_64(sp_digit* r, const sp_digit* a) "adcs r4, r4, r8\n\t" "adc r5, r5, %[r]\n\t" /* Multiply * 2: Done */ -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bal 5f\n\t" #else "bal.n 5f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n4:\n\t" /* Square: Start */ "ldr r6, [%[a]]\n\t" @@ -2583,25 +2583,25 @@ SP_NOINLINE static void sp_2048_sqr_64(sp_digit* r, const sp_digit* a) "lsl r6, r6, #8\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "cmp %[a], r2\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bgt 3f\n\t" #else "bgt.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r8, r9\n\t" "add r8, r8, r10\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r11\n\t" "mov r8, r9\n\t" @@ -2615,11 +2615,11 @@ SP_NOINLINE static void sp_2048_sqr_64(sp_digit* r, const sp_digit* a) "lsl r6, r6, #8\n\t" "add r6, r6, #248\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "str r3, [%[r], r8]\n\t" "mov %[r], r12\n\t" @@ -2631,11 +2631,11 @@ SP_NOINLINE static void sp_2048_sqr_64(sp_digit* r, const sp_digit* a) "ldr r6, [%[a], r3]\n\t" "str r6, [%[r], r3]\n\t" "subs r3, r3, #4\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 4b\n\t" #else "bge.n 4b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, #2\n\t" "lsl r6, r6, #8\n\t" "add sp, sp, r6\n\t" @@ -2693,11 +2693,11 @@ SP_NOINLINE static sp_digit sp_2048_add_32(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6", "r8" @@ -2735,11 +2735,11 @@ SP_NOINLINE static sp_digit sp_2048_sub_in_place_32(sp_digit* a, "add %[a], %[a], #8\n\t" "add %[b], %[b], #8\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [a] "+r" (a), [b] "+r" (b) : : "memory", "r3", "r4", "r5", "r6", "r8" @@ -2796,19 +2796,19 @@ SP_NOINLINE static void sp_2048_mul_32(sp_digit* r, const sp_digit* a, "add %[a], %[a], #4\n\t" "sub %[b], %[b], #4\n\t" "cmp %[a], r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, r9\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r12\n\t" "mov r8, r9\n\t" @@ -2819,11 +2819,11 @@ SP_NOINLINE static void sp_2048_mul_32(sp_digit* r, const sp_digit* a, "mov r9, r8\n\t" "mov r6, #248\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r], r8]\n\t" "mov %[a], r10\n\t" "mov %[b], r11\n\t" @@ -2868,11 +2868,11 @@ SP_NOINLINE static void sp_2048_sqr_32(sp_digit* r, const sp_digit* a) "add r2, r2, r10\n\t" "\n2:\n\t" "cmp r2, %[a]\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 4f\n\t" #else "beq.n 4f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* Multiply * 2: Start */ "ldr r6, [%[a]]\n\t" "ldr r8, [r2]\n\t" @@ -2884,11 +2884,11 @@ SP_NOINLINE static void sp_2048_sqr_32(sp_digit* r, const sp_digit* a) "adcs r4, r4, r8\n\t" "adc r5, r5, %[r]\n\t" /* Multiply * 2: Done */ -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bal 5f\n\t" #else "bal.n 5f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n4:\n\t" /* Square: Start */ "ldr r6, [%[a]]\n\t" @@ -2903,25 +2903,25 @@ SP_NOINLINE static void sp_2048_sqr_32(sp_digit* r, const sp_digit* a) "mov r6, #128\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "cmp %[a], r2\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bgt 3f\n\t" #else "bgt.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r8, r9\n\t" "add r8, r8, r10\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r11\n\t" "mov r8, r9\n\t" @@ -2933,11 +2933,11 @@ SP_NOINLINE static void sp_2048_sqr_32(sp_digit* r, const sp_digit* a) "mov r9, r8\n\t" "mov r6, #248\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "str r3, [%[r], r8]\n\t" "mov %[r], r12\n\t" @@ -2947,11 +2947,11 @@ SP_NOINLINE static void sp_2048_sqr_32(sp_digit* r, const sp_digit* a) "ldr r6, [%[a], r3]\n\t" "str r6, [%[r], r3]\n\t" "subs r3, r3, #4\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 4b\n\t" #else "bge.n 4b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, #1\n\t" "lsl r6, r6, #8\n\t" "add sp, sp, r6\n\t" @@ -3014,11 +3014,11 @@ SP_NOINLINE static void sp_2048_mul_d_64(sp_digit* r, const sp_digit* a, "mov r3, r4\n\t" "mov r4, r5\n\t" "cmp %[a], r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a) : [b] "r" (b) @@ -3069,11 +3069,11 @@ SP_NOINLINE static sp_digit sp_2048_cond_sub_32(sp_digit* r, const sp_digit* a, "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -3132,11 +3132,11 @@ SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, "adc r4, r4, #0\n\t" "str r5, [r10], #4\n\t" "cmp r10, r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 2b\n\t" #else "blt.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* a[i+30] += m[30] * mu */ "ldr %[a], [r10]\n\t" "mov r5, #0\n\t" @@ -3169,11 +3169,11 @@ SP_NOINLINE static void sp_2048_mont_reduce_32(sp_digit* a, const sp_digit* m, /* Next word in a */ "sub r10, r10, #120\n\t" "cmp r10, r11\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "mov %[m], r12\n\t" : [ca] "+r" (ca), [a] "+r" (a) @@ -3244,11 +3244,11 @@ SP_NOINLINE static void sp_2048_mul_d_32(sp_digit* r, const sp_digit* a, "mov r3, r4\n\t" "mov r4, r5\n\t" "cmp %[a], r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a) : [b] "r" (b) @@ -3342,11 +3342,11 @@ SP_NOINLINE static sp_int32 sp_2048_cmp_32(const sp_digit* a, const sp_digit* b) "and r3, r3, r8\n\t" "sub r6, r6, #4\n\t" "cmp r6, #0\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 1b\n\t" #else "bge.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [r] "+r" (r) : [a] "r" (a), [b] "r" (b) : "r3", "r4", "r5", "r6", "r8" @@ -3780,11 +3780,11 @@ SP_NOINLINE static sp_digit sp_2048_cond_sub_64(sp_digit* r, const sp_digit* a, "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -3843,11 +3843,11 @@ SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, "adc r4, r4, #0\n\t" "str r5, [r10], #4\n\t" "cmp r10, r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 2b\n\t" #else "blt.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* a[i+62] += m[62] * mu */ "ldr %[a], [r10]\n\t" "mov r5, #0\n\t" @@ -3880,11 +3880,11 @@ SP_NOINLINE static void sp_2048_mont_reduce_64(sp_digit* a, const sp_digit* m, /* Next word in a */ "sub r10, r10, #248\n\t" "cmp r10, r11\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "mov %[m], r12\n\t" : [ca] "+r" (ca), [a] "+r" (a) @@ -3954,11 +3954,11 @@ SP_NOINLINE static sp_digit sp_2048_sub_64(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6" @@ -4338,11 +4338,11 @@ SP_NOINLINE static sp_int32 sp_2048_cmp_64(const sp_digit* a, const sp_digit* b) "and r3, r3, r8\n\t" "sub r6, r6, #4\n\t" "cmp r6, #0\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 1b\n\t" #else "bge.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [r] "+r" (r) : [a] "r" (a), [b] "r" (b) : "r3", "r4", "r5", "r6", "r8" @@ -4897,11 +4897,11 @@ SP_NOINLINE static sp_digit sp_2048_cond_add_32(sp_digit* r, const sp_digit* a, "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -6083,19 +6083,19 @@ SP_NOINLINE static void sp_3072_mul_12(sp_digit* r, const sp_digit* a, "add %[a], %[a], #4\n\t" "sub %[b], %[b], #4\n\t" "cmp %[a], r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, r9\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r12\n\t" "mov r8, r9\n\t" @@ -6106,11 +6106,11 @@ SP_NOINLINE static void sp_3072_mul_12(sp_digit* r, const sp_digit* a, "mov r9, r8\n\t" "mov r6, #88\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r], r8]\n\t" "mov %[a], r10\n\t" "mov %[b], r11\n\t" @@ -7382,11 +7382,11 @@ SP_NOINLINE static void sp_3072_sqr_12(sp_digit* r, const sp_digit* a) "add r2, r2, r10\n\t" "\n2:\n\t" "cmp r2, %[a]\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 4f\n\t" #else "beq.n 4f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* Multiply * 2: Start */ "ldr r6, [%[a]]\n\t" "ldr r8, [r2]\n\t" @@ -7398,11 +7398,11 @@ SP_NOINLINE static void sp_3072_sqr_12(sp_digit* r, const sp_digit* a) "adcs r4, r4, r8\n\t" "adc r5, r5, %[r]\n\t" /* Multiply * 2: Done */ -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bal 5f\n\t" #else "bal.n 5f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n4:\n\t" /* Square: Start */ "ldr r6, [%[a]]\n\t" @@ -7417,25 +7417,25 @@ SP_NOINLINE static void sp_3072_sqr_12(sp_digit* r, const sp_digit* a) "mov r6, #48\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "cmp %[a], r2\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bgt 3f\n\t" #else "bgt.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r8, r9\n\t" "add r8, r8, r10\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r11\n\t" "mov r8, r9\n\t" @@ -7447,11 +7447,11 @@ SP_NOINLINE static void sp_3072_sqr_12(sp_digit* r, const sp_digit* a) "mov r9, r8\n\t" "mov r6, #88\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "str r3, [%[r], r8]\n\t" "mov %[r], r12\n\t" @@ -7461,11 +7461,11 @@ SP_NOINLINE static void sp_3072_sqr_12(sp_digit* r, const sp_digit* a) "ldr r6, [%[a], r3]\n\t" "str r6, [%[r], r3]\n\t" "subs r3, r3, #4\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 4b\n\t" #else "bge.n 4b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, #96\n\t" "add sp, sp, r6\n\t" : @@ -7885,11 +7885,11 @@ SP_NOINLINE static sp_digit sp_3072_add_96(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6", "r8" @@ -7927,11 +7927,11 @@ SP_NOINLINE static sp_digit sp_3072_sub_in_place_96(sp_digit* a, "add %[a], %[a], #8\n\t" "add %[b], %[b], #8\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [a] "+r" (a), [b] "+r" (b) : : "memory", "r3", "r4", "r5", "r6", "r8" @@ -7992,19 +7992,19 @@ SP_NOINLINE static void sp_3072_mul_96(sp_digit* r, const sp_digit* a, "add %[a], %[a], #4\n\t" "sub %[b], %[b], #4\n\t" "cmp %[a], r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, r9\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r12\n\t" "mov r8, r9\n\t" @@ -8017,11 +8017,11 @@ SP_NOINLINE static void sp_3072_mul_96(sp_digit* r, const sp_digit* a, "lsl r6, r6, #8\n\t" "add r6, r6, #248\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r], r8]\n\t" "mov %[a], r10\n\t" "mov %[b], r11\n\t" @@ -8068,11 +8068,11 @@ SP_NOINLINE static void sp_3072_sqr_96(sp_digit* r, const sp_digit* a) "add r2, r2, r10\n\t" "\n2:\n\t" "cmp r2, %[a]\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 4f\n\t" #else "beq.n 4f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* Multiply * 2: Start */ "ldr r6, [%[a]]\n\t" "ldr r8, [r2]\n\t" @@ -8084,11 +8084,11 @@ SP_NOINLINE static void sp_3072_sqr_96(sp_digit* r, const sp_digit* a) "adcs r4, r4, r8\n\t" "adc r5, r5, %[r]\n\t" /* Multiply * 2: Done */ -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bal 5f\n\t" #else "bal.n 5f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n4:\n\t" /* Square: Start */ "ldr r6, [%[a]]\n\t" @@ -8105,25 +8105,25 @@ SP_NOINLINE static void sp_3072_sqr_96(sp_digit* r, const sp_digit* a) "add r6, r6, #128\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "cmp %[a], r2\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bgt 3f\n\t" #else "bgt.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r8, r9\n\t" "add r8, r8, r10\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r11\n\t" "mov r8, r9\n\t" @@ -8137,11 +8137,11 @@ SP_NOINLINE static void sp_3072_sqr_96(sp_digit* r, const sp_digit* a) "lsl r6, r6, #8\n\t" "add r6, r6, #248\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "str r3, [%[r], r8]\n\t" "mov %[r], r12\n\t" @@ -8153,11 +8153,11 @@ SP_NOINLINE static void sp_3072_sqr_96(sp_digit* r, const sp_digit* a) "ldr r6, [%[a], r3]\n\t" "str r6, [%[r], r3]\n\t" "subs r3, r3, #4\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 4b\n\t" #else "bge.n 4b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, #3\n\t" "lsl r6, r6, #8\n\t" "add sp, sp, r6\n\t" @@ -8215,11 +8215,11 @@ SP_NOINLINE static sp_digit sp_3072_add_48(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6", "r8" @@ -8257,11 +8257,11 @@ SP_NOINLINE static sp_digit sp_3072_sub_in_place_48(sp_digit* a, "add %[a], %[a], #8\n\t" "add %[b], %[b], #8\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [a] "+r" (a), [b] "+r" (b) : : "memory", "r3", "r4", "r5", "r6", "r8" @@ -8318,19 +8318,19 @@ SP_NOINLINE static void sp_3072_mul_48(sp_digit* r, const sp_digit* a, "add %[a], %[a], #4\n\t" "sub %[b], %[b], #4\n\t" "cmp %[a], r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, r9\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r12\n\t" "mov r8, r9\n\t" @@ -8343,11 +8343,11 @@ SP_NOINLINE static void sp_3072_mul_48(sp_digit* r, const sp_digit* a, "lsl r6, r6, #8\n\t" "add r6, r6, #120\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r], r8]\n\t" "mov %[a], r10\n\t" "mov %[b], r11\n\t" @@ -8393,11 +8393,11 @@ SP_NOINLINE static void sp_3072_sqr_48(sp_digit* r, const sp_digit* a) "add r2, r2, r10\n\t" "\n2:\n\t" "cmp r2, %[a]\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 4f\n\t" #else "beq.n 4f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* Multiply * 2: Start */ "ldr r6, [%[a]]\n\t" "ldr r8, [r2]\n\t" @@ -8409,11 +8409,11 @@ SP_NOINLINE static void sp_3072_sqr_48(sp_digit* r, const sp_digit* a) "adcs r4, r4, r8\n\t" "adc r5, r5, %[r]\n\t" /* Multiply * 2: Done */ -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bal 5f\n\t" #else "bal.n 5f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n4:\n\t" /* Square: Start */ "ldr r6, [%[a]]\n\t" @@ -8428,25 +8428,25 @@ SP_NOINLINE static void sp_3072_sqr_48(sp_digit* r, const sp_digit* a) "mov r6, #192\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "cmp %[a], r2\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bgt 3f\n\t" #else "bgt.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r8, r9\n\t" "add r8, r8, r10\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r11\n\t" "mov r8, r9\n\t" @@ -8460,11 +8460,11 @@ SP_NOINLINE static void sp_3072_sqr_48(sp_digit* r, const sp_digit* a) "lsl r6, r6, #8\n\t" "add r6, r6, #120\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "str r3, [%[r], r8]\n\t" "mov %[r], r12\n\t" @@ -8476,11 +8476,11 @@ SP_NOINLINE static void sp_3072_sqr_48(sp_digit* r, const sp_digit* a) "ldr r6, [%[a], r3]\n\t" "str r6, [%[r], r3]\n\t" "subs r3, r3, #4\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 4b\n\t" #else "bge.n 4b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, #1\n\t" "lsl r6, r6, #8\n\t" "add r6, r6, #128\n\t" @@ -8544,11 +8544,11 @@ SP_NOINLINE static void sp_3072_mul_d_96(sp_digit* r, const sp_digit* a, "mov r3, r4\n\t" "mov r4, r5\n\t" "cmp %[a], r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a) : [b] "r" (b) @@ -8599,11 +8599,11 @@ SP_NOINLINE static sp_digit sp_3072_cond_sub_48(sp_digit* r, const sp_digit* a, "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -8662,11 +8662,11 @@ SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, "adc r4, r4, #0\n\t" "str r5, [r10], #4\n\t" "cmp r10, r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 2b\n\t" #else "blt.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* a[i+46] += m[46] * mu */ "ldr %[a], [r10]\n\t" "mov r5, #0\n\t" @@ -8699,11 +8699,11 @@ SP_NOINLINE static void sp_3072_mont_reduce_48(sp_digit* a, const sp_digit* m, /* Next word in a */ "sub r10, r10, #184\n\t" "cmp r10, r11\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "mov %[m], r12\n\t" : [ca] "+r" (ca), [a] "+r" (a) @@ -8774,11 +8774,11 @@ SP_NOINLINE static void sp_3072_mul_d_48(sp_digit* r, const sp_digit* a, "mov r3, r4\n\t" "mov r4, r5\n\t" "cmp %[a], r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a) : [b] "r" (b) @@ -8872,11 +8872,11 @@ SP_NOINLINE static sp_int32 sp_3072_cmp_48(const sp_digit* a, const sp_digit* b) "and r3, r3, r8\n\t" "sub r6, r6, #4\n\t" "cmp r6, #0\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 1b\n\t" #else "bge.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [r] "+r" (r) : [a] "r" (a), [b] "r" (b) : "r3", "r4", "r5", "r6", "r8" @@ -9311,11 +9311,11 @@ SP_NOINLINE static sp_digit sp_3072_cond_sub_96(sp_digit* r, const sp_digit* a, "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -9374,11 +9374,11 @@ SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, "adc r4, r4, #0\n\t" "str r5, [r10], #4\n\t" "cmp r10, r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 2b\n\t" #else "blt.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* a[i+94] += m[94] * mu */ "ldr %[a], [r10]\n\t" "mov r5, #0\n\t" @@ -9411,11 +9411,11 @@ SP_NOINLINE static void sp_3072_mont_reduce_96(sp_digit* a, const sp_digit* m, /* Next word in a */ "sub r10, r10, #376\n\t" "cmp r10, r11\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "mov %[m], r12\n\t" : [ca] "+r" (ca), [a] "+r" (a) @@ -9486,11 +9486,11 @@ SP_NOINLINE static sp_digit sp_3072_sub_96(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6" @@ -9952,11 +9952,11 @@ SP_NOINLINE static sp_int32 sp_3072_cmp_96(const sp_digit* a, const sp_digit* b) "and r3, r3, r8\n\t" "sub r6, r6, #4\n\t" "cmp r6, #0\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 1b\n\t" #else "bge.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [r] "+r" (r) : [a] "r" (a), [b] "r" (b) : "r3", "r4", "r5", "r6", "r8" @@ -10511,11 +10511,11 @@ SP_NOINLINE static sp_digit sp_3072_cond_add_48(sp_digit* r, const sp_digit* a, "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -12635,11 +12635,11 @@ SP_NOINLINE static sp_digit sp_4096_add_128(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6", "r8" @@ -12677,11 +12677,11 @@ SP_NOINLINE static sp_digit sp_4096_sub_in_place_128(sp_digit* a, "add %[a], %[a], #8\n\t" "add %[b], %[b], #8\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [a] "+r" (a), [b] "+r" (b) : : "memory", "r3", "r4", "r5", "r6", "r8" @@ -12741,19 +12741,19 @@ SP_NOINLINE static void sp_4096_mul_128(sp_digit* r, const sp_digit* a, "add %[a], %[a], #4\n\t" "sub %[b], %[b], #4\n\t" "cmp %[a], r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, r9\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r12\n\t" "mov r8, r9\n\t" @@ -12766,11 +12766,11 @@ SP_NOINLINE static void sp_4096_mul_128(sp_digit* r, const sp_digit* a, "lsl r6, r6, #8\n\t" "add r6, r6, #248\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r], r8]\n\t" "mov %[a], r10\n\t" "mov %[b], r11\n\t" @@ -12817,11 +12817,11 @@ SP_NOINLINE static void sp_4096_sqr_128(sp_digit* r, const sp_digit* a) "add r2, r2, r10\n\t" "\n2:\n\t" "cmp r2, %[a]\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 4f\n\t" #else "beq.n 4f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* Multiply * 2: Start */ "ldr r6, [%[a]]\n\t" "ldr r8, [r2]\n\t" @@ -12833,11 +12833,11 @@ SP_NOINLINE static void sp_4096_sqr_128(sp_digit* r, const sp_digit* a) "adcs r4, r4, r8\n\t" "adc r5, r5, %[r]\n\t" /* Multiply * 2: Done */ -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bal 5f\n\t" #else "bal.n 5f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n4:\n\t" /* Square: Start */ "ldr r6, [%[a]]\n\t" @@ -12853,25 +12853,25 @@ SP_NOINLINE static void sp_4096_sqr_128(sp_digit* r, const sp_digit* a) "lsl r6, r6, #8\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "cmp %[a], r2\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bgt 3f\n\t" #else "bgt.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r8, r9\n\t" "add r8, r8, r10\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r11\n\t" "mov r8, r9\n\t" @@ -12885,11 +12885,11 @@ SP_NOINLINE static void sp_4096_sqr_128(sp_digit* r, const sp_digit* a) "lsl r6, r6, #8\n\t" "add r6, r6, #248\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "str r3, [%[r], r8]\n\t" "mov %[r], r12\n\t" @@ -12901,11 +12901,11 @@ SP_NOINLINE static void sp_4096_sqr_128(sp_digit* r, const sp_digit* a) "ldr r6, [%[a], r3]\n\t" "str r6, [%[r], r3]\n\t" "subs r3, r3, #4\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 4b\n\t" #else "bge.n 4b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, #4\n\t" "lsl r6, r6, #8\n\t" "add sp, sp, r6\n\t" @@ -12966,11 +12966,11 @@ SP_NOINLINE static void sp_4096_mul_d_128(sp_digit* r, const sp_digit* a, "mov r3, r4\n\t" "mov r4, r5\n\t" "cmp %[a], r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a) : [b] "r" (b) @@ -13023,11 +13023,11 @@ SP_NOINLINE static sp_digit sp_4096_cond_sub_128(sp_digit* r, const sp_digit* a, "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -13086,11 +13086,11 @@ SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, "adc r4, r4, #0\n\t" "str r5, [r10], #4\n\t" "cmp r10, r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 2b\n\t" #else "blt.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* a[i+126] += m[126] * mu */ "ldr %[a], [r10]\n\t" "mov r5, #0\n\t" @@ -13123,11 +13123,11 @@ SP_NOINLINE static void sp_4096_mont_reduce_128(sp_digit* a, const sp_digit* m, /* Next word in a */ "sub r10, r10, #504\n\t" "cmp r10, r11\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "mov %[m], r12\n\t" : [ca] "+r" (ca), [a] "+r" (a) @@ -13197,11 +13197,11 @@ SP_NOINLINE static sp_digit sp_4096_sub_128(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6" @@ -13743,11 +13743,11 @@ SP_NOINLINE static sp_int32 sp_4096_cmp_128(const sp_digit* a, const sp_digit* b "and r3, r3, r8\n\t" "sub r6, r6, #4\n\t" "cmp r6, #0\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 1b\n\t" #else "bge.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [r] "+r" (r) : [a] "r" (a), [b] "r" (b) : "r3", "r4", "r5", "r6", "r8" @@ -14303,11 +14303,11 @@ SP_NOINLINE static sp_digit sp_4096_cond_add_64(sp_digit* r, const sp_digit* a, "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -16596,11 +16596,11 @@ SP_NOINLINE static sp_digit sp_256_add_8(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6", "r8" @@ -16680,11 +16680,11 @@ SP_NOINLINE static sp_digit sp_256_sub_8(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6" @@ -18471,11 +18471,11 @@ SP_NOINLINE static sp_int32 sp_256_cmp_8(const sp_digit* a, const sp_digit* b) "and r3, r3, r8\n\t" "sub r6, r6, #4\n\t" "cmp r6, #0\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 1b\n\t" #else "bge.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [r] "+r" (r) : [a] "r" (a), [b] "r" (b) : "r3", "r4", "r5", "r6", "r8" @@ -18518,11 +18518,11 @@ SP_NOINLINE static sp_digit sp_256_cond_sub_8(sp_digit* r, const sp_digit* a, "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -18612,11 +18612,11 @@ SP_NOINLINE static void sp_256_mont_reduce_8(sp_digit* a, const sp_digit* m, "add %[a], %[a], #4\n\t" "mov r6, #8\n\t" "cmp r9, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "sub %[a], %[a], #32\n\t" "mov r3, r1\n\t" "sub r1, r1, #1\n\t" @@ -18705,11 +18705,11 @@ SP_NOINLINE static void sp_256_mont_reduce_order_8(sp_digit* a, const sp_digit* "adc r4, r4, #0\n\t" "str r5, [r10], #4\n\t" "cmp r10, r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 2b\n\t" #else "blt.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* a[i+6] += m[6] * mu */ "ldr %[a], [r10]\n\t" "mov r5, #0\n\t" @@ -18742,11 +18742,11 @@ SP_NOINLINE static void sp_256_mont_reduce_order_8(sp_digit* a, const sp_digit* /* Next word in a */ "sub r10, r10, #24\n\t" "cmp r10, r11\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "mov %[m], r12\n\t" : [ca] "+r" (ca), [a] "+r" (a) @@ -23079,11 +23079,11 @@ SP_NOINLINE static sp_digit sp_256_sub_in_place_8(sp_digit* a, "add %[a], %[a], #8\n\t" "add %[b], %[b], #8\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [a] "+r" (a), [b] "+r" (b) : : "memory", "r3", "r4", "r5", "r6", "r8" @@ -23165,11 +23165,11 @@ SP_NOINLINE static void sp_256_mul_d_8(sp_digit* r, const sp_digit* a, "mov r3, r4\n\t" "mov r4, r5\n\t" "cmp %[a], r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a) : [b] "r" (b) @@ -25198,19 +25198,19 @@ SP_NOINLINE static void sp_384_mul_12(sp_digit* r, const sp_digit* a, "add %[a], %[a], #4\n\t" "sub %[b], %[b], #4\n\t" "cmp %[a], r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, r9\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r12\n\t" "mov r8, r9\n\t" @@ -25221,11 +25221,11 @@ SP_NOINLINE static void sp_384_mul_12(sp_digit* r, const sp_digit* a, "mov r9, r8\n\t" "mov r6, #88\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r], r8]\n\t" "mov %[a], r10\n\t" "mov %[b], r11\n\t" @@ -25269,11 +25269,11 @@ SP_NOINLINE static void sp_384_sqr_12(sp_digit* r, const sp_digit* a) "add r2, r2, r10\n\t" "\n2:\n\t" "cmp r2, %[a]\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 4f\n\t" #else "beq.n 4f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* Multiply * 2: Start */ "ldr r6, [%[a]]\n\t" "ldr r8, [r2]\n\t" @@ -25285,11 +25285,11 @@ SP_NOINLINE static void sp_384_sqr_12(sp_digit* r, const sp_digit* a) "adcs r4, r4, r8\n\t" "adc r5, r5, %[r]\n\t" /* Multiply * 2: Done */ -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bal 5f\n\t" #else "bal.n 5f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n4:\n\t" /* Square: Start */ "ldr r6, [%[a]]\n\t" @@ -25304,25 +25304,25 @@ SP_NOINLINE static void sp_384_sqr_12(sp_digit* r, const sp_digit* a) "mov r6, #48\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "cmp %[a], r2\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bgt 3f\n\t" #else "bgt.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r8, r9\n\t" "add r8, r8, r10\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r11\n\t" "mov r8, r9\n\t" @@ -25334,11 +25334,11 @@ SP_NOINLINE static void sp_384_sqr_12(sp_digit* r, const sp_digit* a) "mov r9, r8\n\t" "mov r6, #88\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "str r3, [%[r], r8]\n\t" "mov %[r], r12\n\t" @@ -25348,11 +25348,11 @@ SP_NOINLINE static void sp_384_sqr_12(sp_digit* r, const sp_digit* a) "ldr r6, [%[a], r3]\n\t" "str r6, [%[r], r3]\n\t" "subs r3, r3, #4\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 4b\n\t" #else "bge.n 4b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, #96\n\t" "add sp, sp, r6\n\t" : @@ -25390,11 +25390,11 @@ SP_NOINLINE static sp_digit sp_384_add_12(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6", "r8" @@ -25484,11 +25484,11 @@ SP_NOINLINE static sp_digit sp_384_sub_12(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6" @@ -25875,11 +25875,11 @@ SP_NOINLINE static sp_digit sp_384_cond_sub_12(sp_digit* r, const sp_digit* a, "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -25940,11 +25940,11 @@ SP_NOINLINE static void sp_384_mont_reduce_12(sp_digit* a, const sp_digit* m, "adc r4, r4, #0\n\t" "str r5, [r10], #4\n\t" "cmp r10, r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 2b\n\t" #else "blt.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* a[i+10] += m[10] * mu */ "ldr %[a], [r10]\n\t" "mov r5, #0\n\t" @@ -25977,11 +25977,11 @@ SP_NOINLINE static void sp_384_mont_reduce_12(sp_digit* a, const sp_digit* m, /* Next word in a */ "sub r10, r10, #40\n\t" "cmp r10, r11\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "mov %[m], r12\n\t" : [ca] "+r" (ca), [a] "+r" (a) @@ -26168,11 +26168,11 @@ SP_NOINLINE static sp_int32 sp_384_cmp_12(const sp_digit* a, const sp_digit* b) "and r3, r3, r8\n\t" "sub r6, r6, #4\n\t" "cmp r6, #0\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 1b\n\t" #else "bge.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [r] "+r" (r) : [a] "r" (a), [b] "r" (b) : "r3", "r4", "r5", "r6", "r8" @@ -26302,11 +26302,11 @@ SP_NOINLINE static sp_digit sp_384_cond_add_12(sp_digit* r, const sp_digit* a, c "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -30387,11 +30387,11 @@ SP_NOINLINE static sp_digit sp_384_sub_in_place_12(sp_digit* a, "add %[a], %[a], #8\n\t" "add %[b], %[b], #8\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [a] "+r" (a), [b] "+r" (b) : : "memory", "r3", "r4", "r5", "r6", "r8" @@ -30483,11 +30483,11 @@ SP_NOINLINE static void sp_384_mul_d_12(sp_digit* r, const sp_digit* a, "mov r3, r4\n\t" "mov r4, r5\n\t" "cmp %[a], r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a) : [b] "r" (b) @@ -32581,19 +32581,19 @@ SP_NOINLINE static void sp_521_mul_17(sp_digit* r, const sp_digit* a, "add %[a], %[a], #4\n\t" "sub %[b], %[b], #4\n\t" "cmp %[a], r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, r9\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r12\n\t" "mov r8, r9\n\t" @@ -32604,11 +32604,11 @@ SP_NOINLINE static void sp_521_mul_17(sp_digit* r, const sp_digit* a, "mov r9, r8\n\t" "mov r6, #128\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r], r8]\n\t" "mov %[a], r10\n\t" "mov %[b], r11\n\t" @@ -32652,11 +32652,11 @@ SP_NOINLINE static void sp_521_sqr_17(sp_digit* r, const sp_digit* a) "add r2, r2, r10\n\t" "\n2:\n\t" "cmp r2, %[a]\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 4f\n\t" #else "beq.n 4f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* Multiply * 2: Start */ "ldr r6, [%[a]]\n\t" "ldr r8, [r2]\n\t" @@ -32668,11 +32668,11 @@ SP_NOINLINE static void sp_521_sqr_17(sp_digit* r, const sp_digit* a) "adcs r4, r4, r8\n\t" "adc r5, r5, %[r]\n\t" /* Multiply * 2: Done */ -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bal 5f\n\t" #else "bal.n 5f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n4:\n\t" /* Square: Start */ "ldr r6, [%[a]]\n\t" @@ -32687,25 +32687,25 @@ SP_NOINLINE static void sp_521_sqr_17(sp_digit* r, const sp_digit* a) "mov r6, #68\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "cmp %[a], r2\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bgt 3f\n\t" #else "bgt.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r8, r9\n\t" "add r8, r8, r10\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r11\n\t" "mov r8, r9\n\t" @@ -32717,11 +32717,11 @@ SP_NOINLINE static void sp_521_sqr_17(sp_digit* r, const sp_digit* a) "mov r9, r8\n\t" "mov r6, #128\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "str r3, [%[r], r8]\n\t" "mov %[r], r12\n\t" @@ -32731,11 +32731,11 @@ SP_NOINLINE static void sp_521_sqr_17(sp_digit* r, const sp_digit* a) "ldr r6, [%[a], r3]\n\t" "str r6, [%[r], r3]\n\t" "subs r3, r3, #4\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 4b\n\t" #else "bge.n 4b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, #136\n\t" "add sp, sp, r6\n\t" : @@ -32773,11 +32773,11 @@ SP_NOINLINE static sp_digit sp_521_add_17(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6", "r8" @@ -32881,11 +32881,11 @@ SP_NOINLINE static sp_digit sp_521_sub_17(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6" @@ -33202,11 +33202,11 @@ SP_NOINLINE static sp_digit sp_521_cond_sub_17(sp_digit* r, const sp_digit* a, "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -33388,11 +33388,11 @@ SP_NOINLINE static void sp_521_mont_reduce_order_17(sp_digit* a, const sp_digit* "adc r4, r4, #0\n\t" "str r5, [r10], #4\n\t" "cmp r10, r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 2b\n\t" #else "blt.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* a[i+16] += m[16] * mu */ "mov r5, %[ca]\n\t" "mov %[ca], #0\n\t" @@ -33414,11 +33414,11 @@ SP_NOINLINE static void sp_521_mont_reduce_order_17(sp_digit* a, const sp_digit* /* Next word in a */ "sub r10, r10, #60\n\t" "cmp r10, r11\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "sub r10, r10, #4\n\t" "ldr r4, [r10], #4\n\t" "ldr r5, [r10]\n\t" @@ -33671,11 +33671,11 @@ SP_NOINLINE static sp_int32 sp_521_cmp_17(const sp_digit* a, const sp_digit* b) "and r3, r3, r8\n\t" "sub r6, r6, #4\n\t" "cmp r6, #0\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 1b\n\t" #else "bge.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [r] "+r" (r) : [a] "r" (a), [b] "r" (b) : "r3", "r4", "r5", "r6", "r8" @@ -34124,11 +34124,11 @@ SP_NOINLINE static sp_digit sp_521_cond_add_17(sp_digit* r, const sp_digit* a, c "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -39271,11 +39271,11 @@ SP_NOINLINE static sp_digit sp_521_sub_in_place_17(sp_digit* a, "add %[a], %[a], #8\n\t" "add %[b], %[b], #8\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [a] "+r" (a), [b] "+r" (b) : : "memory", "r3", "r4", "r5", "r6", "r8" @@ -39381,11 +39381,11 @@ SP_NOINLINE static void sp_521_mul_d_17(sp_digit* r, const sp_digit* a, "mov r3, r4\n\t" "mov r4, r5\n\t" "cmp %[a], r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a) : [b] "r" (b) @@ -41480,19 +41480,19 @@ SP_NOINLINE static void sp_1024_mul_16(sp_digit* r, const sp_digit* a, "add %[a], %[a], #4\n\t" "sub %[b], %[b], #4\n\t" "cmp %[a], r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, r9\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r12\n\t" "mov r8, r9\n\t" @@ -41503,11 +41503,11 @@ SP_NOINLINE static void sp_1024_mul_16(sp_digit* r, const sp_digit* a, "mov r9, r8\n\t" "mov r6, #120\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r], r8]\n\t" "mov %[a], r10\n\t" "mov %[b], r11\n\t" @@ -41551,11 +41551,11 @@ SP_NOINLINE static void sp_1024_sqr_16(sp_digit* r, const sp_digit* a) "add r2, r2, r10\n\t" "\n2:\n\t" "cmp r2, %[a]\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 4f\n\t" #else "beq.n 4f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* Multiply * 2: Start */ "ldr r6, [%[a]]\n\t" "ldr r8, [r2]\n\t" @@ -41567,11 +41567,11 @@ SP_NOINLINE static void sp_1024_sqr_16(sp_digit* r, const sp_digit* a) "adcs r4, r4, r8\n\t" "adc r5, r5, %[r]\n\t" /* Multiply * 2: Done */ -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bal 5f\n\t" #else "bal.n 5f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n4:\n\t" /* Square: Start */ "ldr r6, [%[a]]\n\t" @@ -41586,25 +41586,25 @@ SP_NOINLINE static void sp_1024_sqr_16(sp_digit* r, const sp_digit* a) "mov r6, #64\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "cmp %[a], r2\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bgt 3f\n\t" #else "bgt.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r8, r9\n\t" "add r8, r8, r10\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r11\n\t" "mov r8, r9\n\t" @@ -41616,11 +41616,11 @@ SP_NOINLINE static void sp_1024_sqr_16(sp_digit* r, const sp_digit* a) "mov r9, r8\n\t" "mov r6, #120\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "str r3, [%[r], r8]\n\t" "mov %[r], r12\n\t" @@ -41630,11 +41630,11 @@ SP_NOINLINE static void sp_1024_sqr_16(sp_digit* r, const sp_digit* a) "ldr r6, [%[a], r3]\n\t" "str r6, [%[r], r3]\n\t" "subs r3, r3, #4\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 4b\n\t" #else "bge.n 4b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, #128\n\t" "add sp, sp, r6\n\t" : @@ -42121,19 +42121,19 @@ SP_NOINLINE static void sp_1024_mul_32(sp_digit* r, const sp_digit* a, "add %[a], %[a], #4\n\t" "sub %[b], %[b], #4\n\t" "cmp %[a], r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, r9\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r12\n\t" "mov r8, r9\n\t" @@ -42144,11 +42144,11 @@ SP_NOINLINE static void sp_1024_mul_32(sp_digit* r, const sp_digit* a, "mov r9, r8\n\t" "mov r6, #248\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r], r8]\n\t" "mov %[a], r10\n\t" "mov %[b], r11\n\t" @@ -42193,11 +42193,11 @@ SP_NOINLINE static void sp_1024_sqr_32(sp_digit* r, const sp_digit* a) "add r2, r2, r10\n\t" "\n2:\n\t" "cmp r2, %[a]\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 4f\n\t" #else "beq.n 4f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* Multiply * 2: Start */ "ldr r6, [%[a]]\n\t" "ldr r8, [r2]\n\t" @@ -42209,11 +42209,11 @@ SP_NOINLINE static void sp_1024_sqr_32(sp_digit* r, const sp_digit* a) "adcs r4, r4, r8\n\t" "adc r5, r5, %[r]\n\t" /* Multiply * 2: Done */ -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bal 5f\n\t" #else "bal.n 5f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n4:\n\t" /* Square: Start */ "ldr r6, [%[a]]\n\t" @@ -42228,25 +42228,25 @@ SP_NOINLINE static void sp_1024_sqr_32(sp_digit* r, const sp_digit* a) "mov r6, #128\n\t" "add r6, r6, r10\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "beq 3f\n\t" #else "beq.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "cmp %[a], r2\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bgt 3f\n\t" #else "bgt.n 3f\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r8, r9\n\t" "add r8, r8, r10\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 2b\n\t" #else "ble.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "\n3:\n\t" "mov %[r], r11\n\t" "mov r8, r9\n\t" @@ -42258,11 +42258,11 @@ SP_NOINLINE static void sp_1024_sqr_32(sp_digit* r, const sp_digit* a) "mov r9, r8\n\t" "mov r6, #248\n\t" "cmp r8, r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "ble 1b\n\t" #else "ble.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov %[a], r10\n\t" "str r3, [%[r], r8]\n\t" "mov %[r], r12\n\t" @@ -42272,11 +42272,11 @@ SP_NOINLINE static void sp_1024_sqr_32(sp_digit* r, const sp_digit* a) "ldr r6, [%[a], r3]\n\t" "str r6, [%[r], r3]\n\t" "subs r3, r3, #4\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 4b\n\t" #else "bge.n 4b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "mov r6, #1\n\t" "lsl r6, r6, #8\n\t" "add sp, sp, r6\n\t" @@ -42400,11 +42400,11 @@ SP_NOINLINE static sp_digit sp_1024_sub_in_place_32(sp_digit* a, "add %[a], %[a], #8\n\t" "add %[b], %[b], #8\n\t" "cmp %[a], r8\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [a] "+r" (a), [b] "+r" (b) : : "memory", "r3", "r4", "r5", "r6", "r8" @@ -42442,11 +42442,11 @@ SP_NOINLINE static sp_digit sp_1024_cond_sub_32(sp_digit* r, const sp_digit* a, "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -42484,11 +42484,11 @@ SP_NOINLINE static sp_digit sp_1024_add_32(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6", "r8" @@ -42528,11 +42528,11 @@ SP_NOINLINE static void sp_1024_mul_d_32(sp_digit* r, const sp_digit* a, "mov r3, r4\n\t" "mov r4, r5\n\t" "cmp %[a], r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "str r3, [%[r]]\n\t" : [r] "+r" (r), [a] "+r" (a) : [b] "r" (b) @@ -42656,11 +42656,11 @@ SP_NOINLINE static sp_int32 sp_1024_cmp_32(const sp_digit* a, const sp_digit* b) "and r3, r3, r8\n\t" "sub r6, r6, #4\n\t" "cmp r6, #0\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bge 1b\n\t" #else "bge.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [r] "+r" (r) : [a] "r" (a), [b] "r" (b) : "r3", "r4", "r5", "r6", "r8" @@ -43044,11 +43044,11 @@ SP_NOINLINE static void sp_1024_mont_reduce_32(sp_digit* a, const sp_digit* m, "adc r4, r4, #0\n\t" "str r5, [r10], #4\n\t" "cmp r10, r14\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 2b\n\t" #else "blt.n 2b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ /* a[i+30] += m[30] * mu */ "ldr %[a], [r10]\n\t" "mov r5, #0\n\t" @@ -43081,11 +43081,11 @@ SP_NOINLINE static void sp_1024_mont_reduce_32(sp_digit* a, const sp_digit* m, /* Next word in a */ "sub r10, r10, #120\n\t" "cmp r10, r11\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ "ldr r6, [%[m]]\n\t" "subs r6, r6, r8\n\t" "neg %[ca], %[ca]\n\t" @@ -44059,11 +44059,11 @@ SP_NOINLINE static sp_digit sp_1024_cond_add_32(sp_digit* r, const sp_digit* a, "str r5, [%[r], r8]\n\t" "add r8, r8, #4\n\t" "cmp r8, r9\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "blt 1b\n\t" #else "blt.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c) : [r] "r" (r), [a] "r" (a), [b] "r" (b), [m] "r" (m) : "memory", "r5", "r6", "r8", "r9" @@ -44446,11 +44446,11 @@ SP_NOINLINE static sp_digit sp_1024_sub_32(sp_digit* r, const sp_digit* a, "add %[b], %[b], #4\n\t" "add %[r], %[r], #4\n\t" "cmp %[a], r6\n\t" -#ifdef __GNUC__ +#if defined(__GNUC__) || defined(__ICCARM__) || defined(__IAR_SYSTEMS_ICC__) "bne 1b\n\t" #else "bne.n 1b\n\t" -#endif /* __GNUC__ */ +#endif /* __GNUC__ || __ICCARM__ || __IAR_SYSTEMS_ICC__ */ : [c] "+r" (c), [r] "+r" (r), [a] "+r" (a), [b] "+r" (b) : : "memory", "r4", "r5", "r6"