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Merge pull request #7469 from douzzer/20240424-fix-ports-whitespace

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20240424-fix-ports-whitespace
This commit is contained in:
Sean Parkinson
2024-04-26 09:00:38 +10:00
committed by GitHub
parent 039fd26baf e862c85db4
commit e22ae7a1f8
35 changed files with 437 additions and 434 deletions
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34
wolfcrypt/src/port/Espressif/esp32_mp.c
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@ -23,15 +23,15 @@
* See ESP32 Technical Reference Manual - RSA Accelerator Chapter * See ESP32 Technical Reference Manual - RSA Accelerator Chapter
* *
* esp_mp_exptmod() Large Number Modular Exponentiation Z = X^Y mod M * esp_mp_exptmod() Large Number Modular Exponentiation Z = X^Y mod M
* esp_mp_mulmod() Large Number Modular Multiplication Z = X × Y mod M * esp_mp_mulmod() Large Number Modular Multiplication Z = X * Y mod M
* esp_mp_mul() Large Number Multiplication Z = X × Y * esp_mp_mul() Large Number Multiplication Z = X * Y
* *
* The ESP32 RSA Accelerator supports operand lengths of: * The ESP32 RSA Accelerator supports operand lengths of:
* N ∈ {512, 1024, 1536, 2048, 2560, 3072, 3584, 4096} bits. The bit length * N in {512, 1024, 1536, 2048, 2560, 3072, 3584, 4096} bits. The bit length
* of arguments Z, X, Y , M, and r can be any one from the N set, but all * of arguments Z, X, Y , M, and r can be any one from the N set, but all
* numbers in a calculation must be of the same length. * numbers in a calculation must be of the same length.
* *
* The bit length of M′ is always 32. * The bit length of M' is always 32.
* *
* Also, beware: "we have uint32_t == unsigned long for both Xtensa and RISC-V" * Also, beware: "we have uint32_t == unsigned long for both Xtensa and RISC-V"
* see https://github.com/espressif/esp-idf/issues/9511#issuecomment-1207342464 * see https://github.com/espressif/esp-idf/issues/9511#issuecomment-1207342464
@ -1285,8 +1285,8 @@ int esp_mp_mul(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* Z)
Zs = Xs + Ys; Zs = Xs + Ys;
/* RSA Accelerator only supports Large Number Multiplication /* RSA Accelerator only supports Large Number Multiplication
* with operand length N = 32 × x, * with operand length N = 32 * x,
* where x ∈ {1, 2, 3, . . . , 64} */ * where x in {1, 2, 3, . . . , 64} */
if (Xs > 64 || Ys > 64) { if (Xs > 64 || Ys > 64) {
return MP_HW_FALLBACK; /* TODO add count metric on size fallback */ return MP_HW_FALLBACK; /* TODO add count metric on size fallback */
} }
@ -1334,7 +1334,7 @@ int esp_mp_mul(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* Z)
/* Y (left-extend) /* Y (left-extend)
* Accelerator supports large-number multiplication with only * Accelerator supports large-number multiplication with only
* four operand lengths of N ∈ {512, 1024, 1536, 2048} */ * four operand lengths of N in {512, 1024, 1536, 2048} */
left_pad_offset = maxWords_sz << 2; left_pad_offset = maxWords_sz << 2;
if (left_pad_offset <= 512 >> 3) { if (left_pad_offset <= 512 >> 3) {
left_pad_offset = 512 >> 3; /* 64 bytes (16 words) */ left_pad_offset = 512 >> 3; /* 64 bytes (16 words) */
@ -1583,10 +1583,10 @@ int esp_mp_mul(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* Z)
* 0 => no interrupt; 1 => interrupt on completion. */ * 0 => no interrupt; 1 => interrupt on completion. */
DPORT_REG_WRITE(RSA_INT_ENA_REG, 0); DPORT_REG_WRITE(RSA_INT_ENA_REG, 0);
/* 2. Write number of words required for result. */ /* 2. Write number of words required for result. */
/* see 21.3.3 Write (/N16 − 1) to the RSA_MODE_REG register */ /* see 21.3.3 Write (/N16 - 1) to the RSA_MODE_REG register */
DPORT_REG_WRITE(RSA_MODE_REG, (hwWords_sz * 2 - 1)); DPORT_REG_WRITE(RSA_MODE_REG, (hwWords_sz * 2 - 1));
/* 3. Write Xi and Yi for ∈ {0, 1, . . . , n − 1} to memory blocks /* 3. Write Xi and Yi for {0, 1, . . . , n - 1} to memory blocks
* RSA_X_MEM and RSA_Z_MEM * RSA_X_MEM and RSA_Z_MEM
* Maximum is 64 words (64*8*4 = 2048 bits) */ * Maximum is 64 words (64*8*4 = 2048 bits) */
esp_mpint_to_memblock(RSA_X_MEM, esp_mpint_to_memblock(RSA_X_MEM,
@ -1796,7 +1796,7 @@ int esp_mp_mul(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* Z)
* *
* See 24.3.3 of the ESP32 Technical Reference Manual * See 24.3.3 of the ESP32 Technical Reference Manual
* *
* Z = X × Y mod M */ * Z = X * Y mod M */
int esp_mp_mulmod(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, MATH_INT_T* Z) int esp_mp_mulmod(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, MATH_INT_T* Z)
{ {
struct esp_mp_helper mph[1]; /* we'll save some values in this mp helper */ struct esp_mp_helper mph[1]; /* we'll save some values in this mp helper */
@ -1839,7 +1839,7 @@ int esp_mp_mulmod(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, MATH_INT_T* Z)
/* do we have an even moduli? */ /* do we have an even moduli? */
if ((M->dp[0] & 1) == 0) { if ((M->dp[0] & 1) == 0) {
#ifndef NO_ESP_MP_MUL_EVEN_ALT_CALC #ifndef NO_ESP_MP_MUL_EVEN_ALT_CALC
/* Z = X × Y mod M in mixed HW & SW*/ /* Z = X * Y mod M in mixed HW & SW*/
ret = esp_mp_mul(X, Y, tmpZ); /* HW X * Y */ ret = esp_mp_mul(X, Y, tmpZ); /* HW X * Y */
if (ret == MP_OKAY) { if (ret == MP_OKAY) {
/* z = tmpZ mod M, 0 <= Z < M */ /* z = tmpZ mod M, 0 <= Z < M */
@ -1973,13 +1973,13 @@ int esp_mp_mulmod(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, MATH_INT_T* Z)
* or until the RSA_INTR interrupt is generated. * or until the RSA_INTR interrupt is generated.
* (Or until the INTER interrupt is generated.) * (Or until the INTER interrupt is generated.)
* 6. Write 1 to RSA_INTERRUPT_REG to clear the interrupt. * 6. Write 1 to RSA_INTERRUPT_REG to clear the interrupt.
* 7. Write Yi (i ∈ [0, n) ∩ N) to RSA_X_MEM * 7. Write Yi (i in [0, n) intersect N) to RSA_X_MEM
* Users need to write to the memory block only according to the length * Users need to write to the memory block only according to the length
* of the number. Data beyond this length is ignored. * of the number. Data beyond this length is ignored.
* 8. Write 1 to RSA_MULT_START_REG * 8. Write 1 to RSA_MULT_START_REG
* 9. Wait for the second operation to be completed. * 9. Wait for the second operation to be completed.
* Poll INTERRUPT_REG until it reads 1. * Poll INTERRUPT_REG until it reads 1.
* 10. Read the Zi (i ∈ [0, n) ∩ N) from RSA_Z_MEM * 10. Read the Zi (i in [0, n) intersect N) from RSA_Z_MEM
* 11. Write 1 to RSA_INTERUPT_REG to clear the interrupt. * 11. Write 1 to RSA_INTERUPT_REG to clear the interrupt.
* *
* post: Release the HW engine * post: Release the HW engine
@ -2500,15 +2500,15 @@ int esp_mp_mulmod(MATH_INT_T* X, MATH_INT_T* Y, MATH_INT_T* M, MATH_INT_T* Z)
* ESP32S3, Section 20.3.1, https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf * ESP32S3, Section 20.3.1, https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf
* *
* The operation is based on Montgomery multiplication. Aside from the * The operation is based on Montgomery multiplication. Aside from the
* arguments X, Y , and M, two additional ones are needed —r and M′ * arguments X, Y , and M, two additional ones are needed -r and M'
.* These arguments are calculated in advance by software. .* These arguments are calculated in advance by software.
.* .*
.* The RSA Accelerator supports operand lengths of N ∈ {512, 1024, 1536, 2048, .* The RSA Accelerator supports operand lengths of N in {512, 1024, 1536, 2048,
.* 2560, 3072, 3584, 4096} bits on the ESP32 and N ∈ [32, 4096] bits .* 2560, 3072, 3584, 4096} bits on the ESP32 and N in [32, 4096] bits
* on the ESP32s3. * on the ESP32s3.
.* The bit length of arguments Z, X, Y , M, and r can be any one from .* The bit length of arguments Z, X, Y , M, and r can be any one from
* the N set, but all numbers in a calculation must be of the same length. * the N set, but all numbers in a calculation must be of the same length.
.* The bit length of M′ is always 32. .* The bit length of M' is always 32.
.* .*
* Z = (X ^ Y) mod M : Espressif generic notation * Z = (X ^ Y) mod M : Espressif generic notation
* Y = (G ^ X) mod P : wolfSSL DH reference notation */ * Y = (G ^ X) mod P : wolfSSL DH reference notation */

28
wolfcrypt/src/port/Renesas/renesas_tsip_util.c
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@ -4047,20 +4047,22 @@ WOLFSSL_LOCAL int tsip_SignEcdsa(wc_CryptoInfo* info, TsipUserCtx* tuc)
#ifdef WOLFSSL_RENESAS_TSIP_CRYPT_DEBUG #ifdef WOLFSSL_RENESAS_TSIP_CRYPT_DEBUG
/* err #if 0
* e_tsip_err /* this is here for documentation purposes. */
enum e_tsip_err {
TSIP_SUCCESS = 0, TSIP_SUCCESS = 0,
TSIP_ERR_SELF_CHECK1, // Self-check 1 fail or TSIP function internal err. TSIP_ERR_SELF_CHECK1, /* Self-check 1 fail or TSIP function internal err. */
TSIP_ERR_RESOURCE_CONFLICT, // A resource conflict occurred. TSIP_ERR_RESOURCE_CONFLICT, /* A resource conflict occurred. */
TSIP_ERR_SELF_CHECK2, // Self-check 2 fail. TSIP_ERR_SELF_CHECK2, /* Self-check 2 fail. */
TSIP_ERR_KEY_SET, // setting the invalid key. TSIP_ERR_KEY_SET, /* setting the invalid key. */
TSIP_ERR_AUTHENTICATION, // Authentication failed. TSIP_ERR_AUTHENTICATION, /* Authentication failed. */
TSIP_ERR_CALLBACK_UNREGIST, // Callback function is not registered. TSIP_ERR_CALLBACK_UNREGIST, /* Callback function is not registered. */
TSIP_ERR_PARAMETER, // Illegal Input data. TSIP_ERR_PARAMETER, /* Illegal Input data. */
TSIP_ERR_PROHIBIT_FUNCTION, // An invalid function call occurred. TSIP_ERR_PROHIBIT_FUNCTION, /* An invalid function call occurred. */
* TSIP_RESUME_FIRMWARE_GENERATE_MAC, TSIP_RESUME_FIRMWARE_GENERATE_MAC
// There is a continuation of R_TSIP_GenerateFirmwareMAC. /* There is a continuation of R_TSIP_GenerateFirmwareMAC. */
*/ };
#endif
static void hexdump(const uint8_t* in, uint32_t len) static void hexdump(const uint8_t* in, uint32_t len)
{ {

2
wolfcrypt/src/port/caam/caam_driver.c
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@ -129,7 +129,7 @@ static Error caamDebugDesc(struct DescStruct* desc)
} }
//D0JQCR_LS /* D0JQCR_LS */
printf("Next command to be executed = 0x%08X\n", CAAM_READ(0x8804)); printf("Next command to be executed = 0x%08X\n", CAAM_READ(0x8804));
printf("Desc = 0x%08X\n", desc->caam->ring.Desc); printf("Desc = 0x%08X\n", desc->caam->ring.Desc);

5
wolfcrypt/src/port/caam/caam_qnx.c
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@ -1641,8 +1641,9 @@ int io_close_ocb(resmgr_context_t *ctp, void *reserved, RESMGR_OCB_T *ocb)
#if 0 #if 0
static int getSupported(char* in) static int getSupported(char* in)
{ {
//printf("CAAM Status [0x%8.8x] = 0x%8.8x\n", /* printf("CAAM Status [0x%8.8x] = 0x%8.8x\n",
// CAAM_STATUS, WC_CAAM_READ(CAAM_STATUS)); * CAAM_STATUS, WC_CAAM_READ(CAAM_STATUS));
*/
printf("CAAM Version MS Register [0x%8.8x] = 0x%8.8x\n", printf("CAAM Version MS Register [0x%8.8x] = 0x%8.8x\n",
CAAM_VERSION_MS, CAAM_READ(CAAM_VERSION_MS)); CAAM_VERSION_MS, CAAM_READ(CAAM_VERSION_MS));
printf("CAAM Version LS Register [0x%8.8x] = 0x%8.8x\n", printf("CAAM Version LS Register [0x%8.8x] = 0x%8.8x\n",

2
wolfcrypt/src/port/cuda/aes-cuda.cu
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@ -77,7 +77,7 @@ block cipher mechanism that uses n-bit binary string parameter key with 128-bits
#define WOLFSSL_MISC_INCLUDED #define WOLFSSL_MISC_INCLUDED
#define WOLFSSL_HAVE_MIN #define WOLFSSL_HAVE_MIN
#define WOLFSSL_HAVE_MAX #define WOLFSSL_HAVE_MAX
// #include <wolfcrypt/src/misc.c> /* #include <wolfcrypt/src/misc.c> */
#endif #endif
/* This routine performs a left circular arithmetic shift of <x> by <y> value. */ /* This routine performs a left circular arithmetic shift of <x> by <y> value. */

2
wolfcrypt/src/port/intel/quickassist_sync.c
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@ -423,7 +423,7 @@ int IntelQaHardwareStart(const char* process_name, int limitDevAccess)
#ifdef QAT_DEBUG #ifdef QAT_DEBUG
/* optionally enable debugging */ /* optionally enable debugging */
//osalLogLevelSet(8); /* osalLogLevelSet(8); */
#endif #endif
status = cpaCyGetNumInstances(&g_numInstances); status = cpaCyGetNumInstances(&g_numInstances);

2
wolfcrypt/src/port/iotsafe/iotsafe.c
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@ -1573,7 +1573,7 @@ int wolfSSL_CTX_iotsafe_enable(WOLFSSL_CTX *ctx)
WOLFSSL_MSG("ECC callbacks set to IoT_safe interface"); WOLFSSL_MSG("ECC callbacks set to IoT_safe interface");
#endif #endif
#ifndef NO_RSA #ifndef NO_RSA
/* wolfSSL_CTX_SetRsaSignCb(wolfIoT_rsa_sign); // TODO: RSA callbacks */ /* wolfSSL_CTX_SetRsaSignCb(wolfIoT_rsa_sign); */ /* TODO: RSA callbacks */
#endif #endif
#else #else
(void)ctx; (void)ctx;

2
wolfcrypt/src/port/maxim/maxq10xx.c
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@ -56,7 +56,7 @@ void dbg_dumphex(const char *identifier, const uint8_t* pdata, uint32_t plen);
#endif /* MAXQ_DEBUG */ #endif /* MAXQ_DEBUG */
#if defined(USE_WINDOWS_API) #if defined(USE_WINDOWS_API)
# define maxq_CryptHwMutexTryLock() (0) # define maxq_CryptHwMutexTryLock() 0
#endif #endif
#define AES_KEY_ID_START (0x2000) #define AES_KEY_ID_START (0x2000)

6
wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h
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@ -200,7 +200,7 @@ enum {
** Even if HW is enabled, do not run HW math tests. See HW_MATH_ENABLED. ** Even if HW is enabled, do not run HW math tests. See HW_MATH_ENABLED.
** **
** NO_ESP_MP_MUL_EVEN_ALT_CALC ** NO_ESP_MP_MUL_EVEN_ALT_CALC
** Used during Z = X × Y mod M ** Used during Z = X * Y mod M
** By default, even moduli use a two step HW esp_mp_mul with SW mp_mod. ** By default, even moduli use a two step HW esp_mp_mul with SW mp_mod.
** Enable this to instead fall back to pure software mp_mulmod. ** Enable this to instead fall back to pure software mp_mulmod.
** **
@ -820,8 +820,8 @@ extern "C"
/* Non-FIFO read may not be needed in chip revision v3.0. */ /* Non-FIFO read may not be needed in chip revision v3.0. */
#define ESP_EM__READ_NON_FIFO_REG {DPORT_SEQUENCE_REG_READ(0x3FF40078);} #define ESP_EM__READ_NON_FIFO_REG {DPORT_SEQUENCE_REG_READ(0x3FF40078);}
/* When the CPU frequency is 160 MHz, add six <EFBFBD>nop<EFBFBD> between two consecutive /* When the CPU frequency is 160 MHz, add six nops between two consecutive
** FIFO reads. When the CPU frequency is 240 MHz, add seven <EFBFBD>nop<EFBFBD> between ** FIFO reads. When the CPU frequency is 240 MHz, add seven nops between
** two consecutive FIFO reads. See 3.16 */ ** two consecutive FIFO reads. See 3.16 */
#if defined(CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80) #if defined(CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80)
#define ESP_EM__3_16 { \ #define ESP_EM__3_16 { \