From 59067825fca4600955515e66ad46c22eed4c7fe1 Mon Sep 17 00:00:00 2001 From: Tim Date: Wed, 6 Jun 2018 16:44:46 -0600 Subject: [PATCH 1/5] Update cpuid.c to optimize intelasm for performance --- wolfcrypt/src/cpuid.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/wolfcrypt/src/cpuid.c b/wolfcrypt/src/cpuid.c index 6fc30979a..81f9ab389 100644 --- a/wolfcrypt/src/cpuid.c +++ b/wolfcrypt/src/cpuid.c @@ -60,16 +60,26 @@ static word32 cpuid_flag(word32 leaf, word32 sub, word32 num, word32 bit) { int got_intel_cpu = 0; + int got_amd_cpu = 0; unsigned int reg[5]; - reg[4] = '\0'; cpuid(reg, 0, 0); + + /* check for Intel cpu */ if (XMEMCMP((char *)&(reg[EBX]), "Genu", 4) == 0 && XMEMCMP((char *)&(reg[EDX]), "ineI", 4) == 0 && XMEMCMP((char *)&(reg[ECX]), "ntel", 4) == 0) { got_intel_cpu = 1; } - if (got_intel_cpu) { + + /* check for AMD cpu */ + if (XMEMCMP((char *)&(reg[EBX]), "Auth", 4) == 0 && + XMEMCMP((char *)&(reg[EDX]), "enti", 4) == 0 && + XMEMCMP((char *)&(reg[ECX]), "cAMD", 4) == 0) { + got_amd_cpu = 1; + } + + if (got_intel_cpu || got_amd_cpu) { cpuid(reg, leaf, sub); return ((reg[num] >> bit) & 0x1); } @@ -98,4 +108,3 @@ return cpuid_flags; } #endif - From c6e2585fbc366dcf33eaffa4bf1b2a3ccbe90535 Mon Sep 17 00:00:00 2001 From: Tim Parrish <--global> Date: Thu, 7 Jun 2018 10:35:54 -0600 Subject: [PATCH 2/5] added check for AMD processor to asm.c --- wolfcrypt/src/asm.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/wolfcrypt/src/asm.c b/wolfcrypt/src/asm.c index c409230ec..91726dd9a 100644 --- a/wolfcrypt/src/asm.c +++ b/wolfcrypt/src/asm.c @@ -81,17 +81,27 @@ static word32 cpuid_check = 0 ; static word32 cpuid_flags = 0 ; static word32 cpuid_flag(word32 leaf, word32 sub, word32 num, word32 bit) { - int got_intel_cpu=0; + int got_intel_cpu = 0; + int got_amd_cpu = 0; unsigned int reg[5]; reg[4] = '\0' ; cpuid(reg, 0, 0); - if(memcmp((char *)&(reg[EBX]), "Genu", 4) == 0 && - memcmp((char *)&(reg[EDX]), "ineI", 4) == 0 && - memcmp((char *)&(reg[ECX]), "ntel", 4) == 0) { + + /* check for intel cpu */ + if( memcmp((char *)&(reg[EBX]), "Genu", 4) == 0 && + memcmp((char *)&(reg[EDX]), "ineI", 4) == 0 && + memcmp((char *)&(reg[ECX]), "ntel", 4) == 0) { got_intel_cpu = 1; } - if (got_intel_cpu) { + + /* check for AMD cpu */ + if( memcmp((char *)&(reg[EBX]), "Auth", 4) == 0 && + memcmp((char *)&(reg[EDX]), "enti", 4) == 0 && + memcmp((char *)&(reg[ECX]), "cAMD", 4) == 0) { + got_amd_cpu = 1; + } + if (got_intel_cpu || got_amd_cpu) { cpuid(reg, leaf, sub); return((reg[num]>>bit)&0x1) ; } From 53b0d2cba39ac911a526bfe4c33832dcea7d3200 Mon Sep 17 00:00:00 2001 From: Tim Parrish <--global> Date: Tue, 12 Jun 2018 10:59:42 -0600 Subject: [PATCH 3/5] updated readme to show that AMD processors are supported --- README.md | 3 +++ 1 file changed, 3 insertions(+) diff --git a/README.md b/README.md index 77fb35441..abe15739f 100644 --- a/README.md +++ b/README.md @@ -65,6 +65,9 @@ wolfSSL_CTX_set_verify(ctx, SSL_VERIFY_NONE, 0); before calling wolfSSL_new(); Though it's not recommended. ``` +# wolfSSL Release x.x.x + +* Added AES performance enhancements on AMD processors using Intel ASM instructions # wolfSSL Release 3.14.0 (3/02/2018) From 26835bef794ba038b5af6ff0c09b41a510099109 Mon Sep 17 00:00:00 2001 From: Tim Parrish <--global> Date: Tue, 12 Jun 2018 13:54:50 -0600 Subject: [PATCH 4/5] Updated README.md --- README.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/README.md b/README.md index 0c8c2d775..919e0e935 100644 --- a/README.md +++ b/README.md @@ -78,6 +78,10 @@ hash function. Instead the name WC_SHA, WC_SHA256, WC_SHA384 and WC_SHA512 should be used for the enum name. ``` +# wolfSSL Release x.x.x + +* Added AES performance enhancements on AMD processors with build option `./configure --enable-intelasm` + # wolfSSL Release 3.15.0 (06/05/2018) Release 3.15.0 of wolfSSL embedded TLS has bug fixes and new features including: From 9448b96afd8b0848f2620e00929e6f0160556466 Mon Sep 17 00:00:00 2001 From: Tim Parrish <--global> Date: Tue, 12 Jun 2018 14:15:57 -0600 Subject: [PATCH 5/5] updated change log --- ChangeLog.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/ChangeLog.md b/ChangeLog.md index 750274aed..5e9ed1641 100644 --- a/ChangeLog.md +++ b/ChangeLog.md @@ -1,3 +1,7 @@ +# wolfSSL Release x.x.x + +* Added AES performance enhancements on AMD processors with build option `./configure --enable-intelasm` + # wolfSSL Release 3.15.0 (06/05/2018) Release 3.15.0 of wolfSSL embedded TLS has bug fixes and new features including: