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Code Pull Requests Activity
18,276 Commits 28 Branches 172 Tags
591101fd8bbb2aea70bf3bba8f5711665111c315
Commit Graph

9 Commits

Author SHA1 Message Date
Sean Parkinson
591101fd8b AES for ARM32 without using crypto hardware instructions 
AES-ECB, AES-CBC, AES-CTR, AES-GCM, AES-CCM
Fix ldrd and strd to use even first first register and have
second register be next after first.
 2022-10-18 08:31:53 +10:00
Sean Parkinson
5a55ec6968 ARM32 assembly code: fixed scripts 
Generation scripts fixed for ARM32.
Regenerated output inlcudes:
  - support for ARM32 architectures less than 7
  - SP code also ensures parameters are in specific registers
 2022-09-29 09:04:05 +10:00
Sean Parkinson
1b9656f72d ARM ASM: add fpu directive to assembly files 2022-09-23 12:31:39 +10:00
Sean Parkinson
2578f2c8f2 ARMv8 32 Inline ASM: fixes 
Force parameters to use specific registers.
Shift/rotate amount must have '#' prepended.
 2022-09-21 10:45:50 +10:00
Sean Parkinson
2c4c7ba6da ARM v7a ASM: 128-bit registers not supported 
Cortex-A5 - Cortex-A9 only support 64-bit wide NEON.
Remove use of WOLFSSL_ARM_ARCH_NO_VREV.
Use WOLFSSL_ARM_ARCH_NEON_64BIT to indicate to use 64-bit NEON registers
and not 128-bit NEON registers.
 2022-09-12 10:00:18 +10:00
Sean Parkinson
0db0032b31 ARM32 ASM: vrev not always available 
Provide alternative assembly instructions to vrev when
WOLFSSL_ARM_ARCH_NO_VREV is defined.
 2022-09-09 10:19:17 +10:00
Sean Parkinson
805b0eb606 ARM ASM: ARMv7a with NEON instructions 
Change to build assembly code for ARMv7a with NEON instruction set.
./configure -host=armv7a --enable-armasm
Added ARM32 SHA-256 NEON only implementation.
 2022-09-07 09:29:56 +10:00
Jacob Barthelmeh
8eaa85e412 update copyright year to 2022 2022-07-19 10:44:31 -06:00
Sean Parkinson
0042a2594c SHA-3, ARM64: add assembly support for crypto instructions 
Add ability to compile ARM assembly from inline C code.
 2022-02-08 12:21:38 +10:00