From 5d1e3fb14fd866969336fafa172d58d8532d7113 Mon Sep 17 00:00:00 2001
From: Khoi Hoang <57012152+khoih-prog@users.noreply.github.com>
Date: Wed, 13 Apr 2022 22:39:15 -0400
Subject: [PATCH] Update `Packages' Patches`

---
 .../hardware/samd/1.6.18-alpha2/boards.txt    | 1730 +++++++++++++++++
 .../hardware/rp2040/2.7.2/boards.txt          |   84 +
 .../variants/Seeed_XIAO_RP2040/pins_arduino.h |  123 ++
 .../lwipstack/include/lwipstack/lwipopts.h    |  347 ++++
 .../2.8.0/portenta_post_install.sh            |   22 +
 .../lwipstack/include/lwipstack/lwipopts.h    |  347 ++++
 .../3.0.0/portenta_post_install.sh            |   22 +
 .../lwipstack/include/lwipstack/lwipopts.h    |  347 ++++
 .../3.0.1/portenta_post_install.sh            |   22 +
 9 files changed, 3044 insertions(+)
 create mode 100644 Packages_Patches/Fab_SAM_Arduino/hardware/samd/1.6.18-alpha2/boards.txt
 create mode 100644 Packages_Patches/Seeeduino/hardware/rp2040/2.7.2/boards.txt
 create mode 100644 Packages_Patches/Seeeduino/hardware/rp2040/2.7.2/variants/Seeed_XIAO_RP2040/pins_arduino.h
 create mode 100644 Packages_Patches/arduino/hardware/mbed_portenta/2.8.0/cores/arduino/mbed/connectivity/lwipstack/include/lwipstack/lwipopts.h
 create mode 100644 Packages_Patches/arduino/hardware/mbed_portenta/2.8.0/portenta_post_install.sh
 create mode 100644 Packages_Patches/arduino/hardware/mbed_portenta/3.0.0/cores/arduino/mbed/connectivity/lwipstack/include/lwipstack/lwipopts.h
 create mode 100644 Packages_Patches/arduino/hardware/mbed_portenta/3.0.0/portenta_post_install.sh
 create mode 100644 Packages_Patches/arduino/hardware/mbed_portenta/3.0.1/cores/arduino/mbed/connectivity/lwipstack/include/lwipstack/lwipopts.h
 create mode 100644 Packages_Patches/arduino/hardware/mbed_portenta/3.0.1/portenta_post_install.sh

diff --git a/Packages_Patches/Fab_SAM_Arduino/hardware/samd/1.6.18-alpha2/boards.txt b/Packages_Patches/Fab_SAM_Arduino/hardware/samd/1.6.18-alpha2/boards.txt
new file mode 100644
index 0000000..ec3f9ff
--- /dev/null
+++ b/Packages_Patches/Fab_SAM_Arduino/hardware/samd/1.6.18-alpha2/boards.txt
@@ -0,0 +1,1730 @@
+# Copyright (c) 2014-2017 Arduino LLC.  All right reserved.
+#
+# This library is free software; you can redistribute it and/or
+# modify it under the terms of the GNU Lesser General Public
+# License as published by the Free Software Foundation; either
+# version 2.1 of the License, or (at your option) any later version.
+#
+# This library is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+# See the GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public
+# License along with this library; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+menu.cpu=Microcontroller
+menu.clock=Clock Source
+menu.usb=USB Config
+menu.serial=Serial Config
+menu.bootloader=Bootloader Size
+menu.timer=Timer PWM Frequency
+menu.float=Floating Point
+menu.config=Build Options
+
+# Generic D11C14A
+d11c14a.name=Generic D11C14A
+d11c14a.vid.0=0x16D0
+d11c14a.pid.0=0x1557
+d11c14a.vid.1=0x16D0
+d11c14a.pid.1=0x1856
+d11c14a.vid.2=0x16D0
+d11c14a.pid.2=0x1B41
+d11c14a.vid.3=0x16D0
+d11c14a.pid.3=0x1B40
+d11c14a.vid.4=0x16D0
+d11c14a.pid.4=0x1A0C
+d11c14a.vid.5=0x16D0
+d11c14a.pid.5=0x1856
+d11c14a.build.mcu=cortex-m0plus
+d11c14a.build.mathlib=arm_cortexM0l_math
+d11c14a.build.f_cpu=48000000L
+d11c14a.build.usb_product="D11C14A"
+d11c14a.build.usb_manufacturer="Fab Foundation"
+d11c14a.build.board=SAMD_ZERO
+d11c14a.build.core=arduino
+d11c14a.build.variant=Generic_D11C14A
+d11c14a.build.variant_system_lib=
+d11c14a.build.vid=0x16D0
+d11c14a.upload.protocol=sam-ba
+d11c14a.bootloader.tool=openocd
+d11c14a.menu.float.default=Print & String use auto-promoted doubles only
+d11c14a.menu.float.default.build.floatconfig=FLOAT_BOTH_DOUBLES_ONLY
+d11c14a.menu.float.print=Print uses separate singles and doubles
+d11c14a.menu.float.print.build.floatconfig=FLOAT_PRINT_SINGLES_DOUBLES
+d11c14a.menu.float.string=String uses separate singles and doubles
+d11c14a.menu.float.string.build.floatconfig=FLOAT_STRING_SINGLES_DOUBLES
+d11c14a.menu.float.both=Print & String use separate singles and doubles
+d11c14a.menu.float.both.build.floatconfig=FLOAT_BOTH_SINGLES_DOUBLES
+d11c14a.menu.config.disabled=config.h disabled
+d11c14a.menu.config.disabled.build.buildconfig=CONFIG_H_DISABLED
+d11c14a.menu.config.enabled=config.h enabled (mostly code size reductions)
+d11c14a.menu.config.enabled.build.buildconfig=CONFIG_H_ENABLED
+d11c14a.menu.clock.internal_usb=INTERNAL_USB_CALIBRATED_OSCILLATOR
+d11c14a.menu.clock.internal_usb.build.clockconfig=CLOCKCONFIG_INTERNAL_USB
+d11c14a.menu.clock.internal=INTERNAL_OSCILLATOR
+d11c14a.menu.clock.internal.build.clockconfig=CLOCKCONFIG_INTERNAL
+d11c14a.menu.clock.crystal_32k=32KHZ_CRYSTAL
+d11c14a.menu.clock.crystal_32k.build.clockconfig=CLOCKCONFIG_32768HZ_CRYSTAL
+d11c14a.menu.clock.crystal_hs=HIGH_SPEED_CRYSTAL
+d11c14a.menu.clock.crystal_hs.build.clockconfig=CLOCKCONFIG_HS_CRYSTAL
+d11c14a.menu.timer.timer_732Hz=732.4Hz (16-bit)
+d11c14a.menu.timer.timer_732Hz.build.timerconfig=TIMER_732Hz
+d11c14a.menu.timer.timer_366Hz=366.2Hz (16-bit)
+d11c14a.menu.timer.timer_366Hz.build.timerconfig=TIMER_366Hz
+d11c14a.menu.timer.timer_244Hz=244.1Hz (16-bit)
+d11c14a.menu.timer.timer_244Hz.build.timerconfig=TIMER_244Hz
+d11c14a.menu.timer.timer_183Hz=183.1Hz (16-bit)
+d11c14a.menu.timer.timer_183Hz.build.timerconfig=TIMER_183Hz
+d11c14a.menu.timer.timer_146Hz=146.5Hz (16-bit)
+d11c14a.menu.timer.timer_146Hz.build.timerconfig=TIMER_146Hz
+d11c14a.menu.timer.timer_122Hz=122.1Hz (16-bit)
+d11c14a.menu.timer.timer_122Hz.build.timerconfig=TIMER_122Hz
+d11c14a.menu.timer.timer_105Hz=104.6Hz (16-bit)
+d11c14a.menu.timer.timer_105Hz.build.timerconfig=TIMER_105Hz
+d11c14a.menu.timer.timer_81Hz=81.38Hz (16-bit)
+d11c14a.menu.timer.timer_81Hz.build.timerconfig=TIMER_81Hz
+d11c14a.menu.timer.timer_61Hz=61.04Hz (16-bit)
+d11c14a.menu.timer.timer_61Hz.build.timerconfig=TIMER_61Hz
+d11c14a.menu.timer.timer_31Hz=30.52Hz (16-bit)
+d11c14a.menu.timer.timer_31Hz.build.timerconfig=TIMER_31Hz
+d11c14a.menu.timer.timer_187500Hz=187500Hz (8-bit)
+d11c14a.menu.timer.timer_187500Hz.build.timerconfig=TIMER_187500Hz
+d11c14a.menu.timer.timer_93750Hz=93750Hz (8-bit)
+d11c14a.menu.timer.timer_93750Hz.build.timerconfig=TIMER_93750Hz
+d11c14a.menu.timer.timer_62500Hz=62500Hz (8-bit)
+d11c14a.menu.timer.timer_62500Hz.build.timerconfig=TIMER_62500Hz
+d11c14a.menu.timer.timer_37500Hz=37500Hz (8-bit)
+d11c14a.menu.timer.timer_37500Hz.build.timerconfig=TIMER_37500Hz
+d11c14a.menu.timer.timer_20833Hz=20833Hz (8-bit)
+d11c14a.menu.timer.timer_20833Hz.build.timerconfig=TIMER_20833Hz
+d11c14a.menu.timer.timer_12500Hz=12500Hz (8-bit)
+d11c14a.menu.timer.timer_12500Hz.build.timerconfig=TIMER_12500Hz
+d11c14a.menu.timer.timer_7500Hz=7500Hz (8-bit)
+d11c14a.menu.timer.timer_7500Hz.build.timerconfig=TIMER_7500Hz
+d11c14a.menu.timer.timer_4166Hz=4166Hz (8-bit)
+d11c14a.menu.timer.timer_4166Hz.build.timerconfig=TIMER_4166Hz
+d11c14a.menu.timer.timer_2930Hz=2930Hz (8-bit)
+d11c14a.menu.timer.timer_2930Hz.build.timerconfig=TIMER_2930Hz
+d11c14a.menu.timer.timer_1465Hz=1465Hz (8-bit)
+d11c14a.menu.timer.timer_1465Hz.build.timerconfig=TIMER_1465Hz
+d11c14a.build.extra_flags=-D__SAMD11C14A__ {build.usb_flags} -DARM_MATH_CM0PLUS
+d11c14a.build.ldscript=flash_16KB.ld
+d11c14a.build.openocdscript=openocd_scripts/SAMD11C14A.cfg
+d11c14a.bootloader.file=zero/binaries/sam_ba_SAMD11C14A.bin
+d11c14a.menu.bootloader.4kb=4KB_BOOTLOADER
+d11c14a.menu.bootloader.4kb.build.bootloader_size=__4KB_BOOTLOADER__
+d11c14a.menu.bootloader.4kb.build.ldscript_path=linker_scripts/gcc/4KB_Bootloader
+d11c14a.menu.bootloader.4kb.upload.tool=Fab_SAM_Arduino:bossac
+d11c14a.menu.bootloader.4kb.upload.use_1200bps_touch=true
+d11c14a.menu.bootloader.4kb.upload.wait_for_upload_port=true
+d11c14a.menu.bootloader.4kb.upload.native_usb=true
+d11c14a.menu.bootloader.4kb.upload.maximum_size=12288
+d11c14a.menu.bootloader.0kb=NO_BOOTLOADER
+d11c14a.menu.bootloader.0kb.build.bootloader_size=__NO_BOOTLOADER__
+d11c14a.menu.bootloader.0kb.build.ldscript_path=linker_scripts/gcc/No_Bootloader
+d11c14a.menu.bootloader.0kb.upload.tool=openocd
+d11c14a.menu.bootloader.0kb.upload.use_1200bps_touch=false
+d11c14a.menu.bootloader.0kb.upload.wait_for_upload_port=false
+d11c14a.menu.bootloader.0kb.upload.native_usb=false
+d11c14a.menu.bootloader.0kb.upload.maximum_size=16384
+d11c14a.menu.serial.one_uart=ONE_UART_ONE_WIRE_NO_SPI
+d11c14a.menu.serial.one_uart.build.serialcom_uart=ONE_UART
+d11c14a.menu.serial.one_uart.build.serialcom_wire=ONE_WIRE
+d11c14a.menu.serial.one_uart.build.serialcom_spi=NO_SPI
+d11c14a.menu.serial.two_uart=TWO_UART_NO_WIRE_NO_SPI
+d11c14a.menu.serial.two_uart.build.serialcom_uart=TWO_UART
+d11c14a.menu.serial.two_uart.build.serialcom_wire=NO_WIRE
+d11c14a.menu.serial.two_uart.build.serialcom_spi=NO_SPI
+d11c14a.menu.serial.one_uart_no_wire_one_spi=ONE_UART_NO_WIRE_ONE_SPI
+d11c14a.menu.serial.one_uart_no_wire_one_spi.build.serialcom_uart=ONE_UART
+d11c14a.menu.serial.one_uart_no_wire_one_spi.build.serialcom_wire=NO_WIRE
+d11c14a.menu.serial.one_uart_no_wire_one_spi.build.serialcom_spi=ONE_SPI
+d11c14a.menu.serial.no_uart=NO_UART_ONE_WIRE_ONE_SPI
+d11c14a.menu.serial.no_uart.build.serialcom_uart=NO_UART
+d11c14a.menu.serial.no_uart.build.serialcom_wire=ONE_WIRE
+d11c14a.menu.serial.no_uart.build.serialcom_spi=ONE_SPI
+d11c14a.menu.usb.cdc=CDC_ONLY
+d11c14a.menu.usb.cdc.build.usbcom=CDC_ONLY
+d11c14a.menu.usb.cdc.build.pid=0x1557
+d11c14a.menu.usb.cdc_hid=CDC_HID
+d11c14a.menu.usb.cdc_hid.build.usbcom=CDC_HID
+d11c14a.menu.usb.cdc_hid.build.pid=0x1856
+d11c14a.menu.usb.withcdc=WITH_CDC
+d11c14a.menu.usb.withcdc.build.usbcom=WITH_CDC
+d11c14a.menu.usb.withcdc.build.pid=0x1B41
+d11c14a.menu.usb.hid=HID_ONLY
+d11c14a.menu.usb.hid.build.usbcom=HID_ONLY
+d11c14a.menu.usb.hid.build.pid=0x1B40
+d11c14a.menu.usb.nocdc=WITHOUT_CDC
+d11c14a.menu.usb.nocdc.build.usbcom=WITHOUT_CDC
+d11c14a.menu.usb.nocdc.build.pid=0x1A0C
+d11c14a.menu.usb.none=USB_DISABLED
+d11c14a.menu.usb.none.build.usbcom=USB_DISABLED
+d11c14a.menu.usb.none.build.pid=0x1856
+
+# Generic D11D14AS
+d11d14as.name=Generic D11D14AS
+d11d14as.vid.0=0x16D0
+d11d14as.pid.0=0x2557
+d11d14as.vid.1=0x16D0
+d11d14as.pid.1=0x2856
+d11d14as.vid.2=0x16D0
+d11d14as.pid.2=0x2B41
+d11d14as.vid.3=0x16D0
+d11d14as.pid.3=0x2B40
+d11d14as.vid.4=0x16D0
+d11d14as.pid.4=0x2A0C
+d11d14as.vid.5=0x16D0
+d11d14as.pid.5=0x2856
+d11d14as.build.mcu=cortex-m0plus
+d11d14as.build.mathlib=arm_cortexM0l_math
+d11d14as.build.f_cpu=48000000L
+d11d14as.build.usb_product="D11D14AS"
+d11d14as.build.usb_manufacturer="Fab Foundation"
+d11d14as.build.board=SAMD_ZERO
+d11d14as.build.core=arduino
+d11d14as.build.variant=Generic_D11D14AS
+d11d14as.build.variant_system_lib=
+d11d14as.build.vid=0x16D0
+d11d14as.upload.protocol=sam-ba
+d11d14as.bootloader.tool=openocd
+d11d14as.menu.float.default=Print & String use auto-promoted doubles only
+d11d14as.menu.float.default.build.floatconfig=FLOAT_BOTH_DOUBLES_ONLY
+d11d14as.menu.float.print=Print uses separate singles and doubles
+d11d14as.menu.float.print.build.floatconfig=FLOAT_PRINT_SINGLES_DOUBLES
+d11d14as.menu.float.string=String uses separate singles and doubles
+d11d14as.menu.float.string.build.floatconfig=FLOAT_STRING_SINGLES_DOUBLES
+d11d14as.menu.float.both=Print & String use separate singles and doubles
+d11d14as.menu.float.both.build.floatconfig=FLOAT_BOTH_SINGLES_DOUBLES
+d11d14as.menu.config.disabled=config.h disabled
+d11d14as.menu.config.disabled.build.buildconfig=CONFIG_H_DISABLED
+d11d14as.menu.config.enabled=config.h enabled (mostly code size reductions)
+d11d14as.menu.config.enabled.build.buildconfig=CONFIG_H_ENABLED
+d11d14as.menu.clock.internal_usb=INTERNAL_USB_CALIBRATED_OSCILLATOR
+d11d14as.menu.clock.internal_usb.build.clockconfig=CLOCKCONFIG_INTERNAL_USB
+d11d14as.menu.clock.internal=INTERNAL_OSCILLATOR
+d11d14as.menu.clock.internal.build.clockconfig=CLOCKCONFIG_INTERNAL
+d11d14as.menu.clock.crystal_32k=32KHZ_CRYSTAL
+d11d14as.menu.clock.crystal_32k.build.clockconfig=CLOCKCONFIG_32768HZ_CRYSTAL
+d11d14as.menu.clock.crystal_hs=HIGH_SPEED_CRYSTAL
+d11d14as.menu.clock.crystal_hs.build.clockconfig=CLOCKCONFIG_HS_CRYSTAL
+d11d14as.menu.timer.timer_732Hz=732.4Hz (16-bit)
+d11d14as.menu.timer.timer_732Hz.build.timerconfig=TIMER_732Hz
+d11d14as.menu.timer.timer_366Hz=366.2Hz (16-bit)
+d11d14as.menu.timer.timer_366Hz.build.timerconfig=TIMER_366Hz
+d11d14as.menu.timer.timer_244Hz=244.1Hz (16-bit)
+d11d14as.menu.timer.timer_244Hz.build.timerconfig=TIMER_244Hz
+d11d14as.menu.timer.timer_183Hz=183.1Hz (16-bit)
+d11d14as.menu.timer.timer_183Hz.build.timerconfig=TIMER_183Hz
+d11d14as.menu.timer.timer_146Hz=146.5Hz (16-bit)
+d11d14as.menu.timer.timer_146Hz.build.timerconfig=TIMER_146Hz
+d11d14as.menu.timer.timer_122Hz=122.1Hz (16-bit)
+d11d14as.menu.timer.timer_122Hz.build.timerconfig=TIMER_122Hz
+d11d14as.menu.timer.timer_105Hz=104.6Hz (16-bit)
+d11d14as.menu.timer.timer_105Hz.build.timerconfig=TIMER_105Hz
+d11d14as.menu.timer.timer_81Hz=81.38Hz (16-bit)
+d11d14as.menu.timer.timer_81Hz.build.timerconfig=TIMER_81Hz
+d11d14as.menu.timer.timer_61Hz=61.04Hz (16-bit)
+d11d14as.menu.timer.timer_61Hz.build.timerconfig=TIMER_61Hz
+d11d14as.menu.timer.timer_31Hz=30.52Hz (16-bit)
+d11d14as.menu.timer.timer_31Hz.build.timerconfig=TIMER_31Hz
+d11d14as.menu.timer.timer_187500Hz=187500Hz (8-bit)
+d11d14as.menu.timer.timer_187500Hz.build.timerconfig=TIMER_187500Hz
+d11d14as.menu.timer.timer_93750Hz=93750Hz (8-bit)
+d11d14as.menu.timer.timer_93750Hz.build.timerconfig=TIMER_93750Hz
+d11d14as.menu.timer.timer_62500Hz=62500Hz (8-bit)
+d11d14as.menu.timer.timer_62500Hz.build.timerconfig=TIMER_62500Hz
+d11d14as.menu.timer.timer_37500Hz=37500Hz (8-bit)
+d11d14as.menu.timer.timer_37500Hz.build.timerconfig=TIMER_37500Hz
+d11d14as.menu.timer.timer_20833Hz=20833Hz (8-bit)
+d11d14as.menu.timer.timer_20833Hz.build.timerconfig=TIMER_20833Hz
+d11d14as.menu.timer.timer_12500Hz=12500Hz (8-bit)
+d11d14as.menu.timer.timer_12500Hz.build.timerconfig=TIMER_12500Hz
+d11d14as.menu.timer.timer_7500Hz=7500Hz (8-bit)
+d11d14as.menu.timer.timer_7500Hz.build.timerconfig=TIMER_7500Hz
+d11d14as.menu.timer.timer_4166Hz=4166Hz (8-bit)
+d11d14as.menu.timer.timer_4166Hz.build.timerconfig=TIMER_4166Hz
+d11d14as.menu.timer.timer_2930Hz=2930Hz (8-bit)
+d11d14as.menu.timer.timer_2930Hz.build.timerconfig=TIMER_2930Hz
+d11d14as.menu.timer.timer_1465Hz=1465Hz (8-bit)
+d11d14as.menu.timer.timer_1465Hz.build.timerconfig=TIMER_1465Hz
+d11d14as.build.extra_flags=-D__SAMD11D14AS__ {build.usb_flags} -DARM_MATH_CM0PLUS
+d11d14as.build.ldscript=flash_16KB.ld
+d11d14as.build.openocdscript=openocd_scripts/SAMD11D14AS.cfg
+d11d14as.bootloader.file=zero/binaries/sam_ba_SAMD11D14AS.bin
+d11d14as.menu.bootloader.4kb=4KB_BOOTLOADER
+d11d14as.menu.bootloader.4kb.build.bootloader_size=__4KB_BOOTLOADER__
+d11d14as.menu.bootloader.4kb.build.ldscript_path=linker_scripts/gcc/4KB_Bootloader
+d11d14as.menu.bootloader.4kb.upload.tool=Fab_SAM_Arduino:bossac
+d11d14as.menu.bootloader.4kb.upload.use_1200bps_touch=true
+d11d14as.menu.bootloader.4kb.upload.wait_for_upload_port=true
+d11d14as.menu.bootloader.4kb.upload.native_usb=true
+d11d14as.menu.bootloader.4kb.upload.maximum_size=12288
+d11d14as.menu.bootloader.0kb=NO_BOOTLOADER
+d11d14as.menu.bootloader.0kb.build.bootloader_size=__NO_BOOTLOADER__
+d11d14as.menu.bootloader.0kb.build.ldscript_path=linker_scripts/gcc/No_Bootloader
+d11d14as.menu.bootloader.0kb.upload.tool=openocd
+d11d14as.menu.bootloader.0kb.upload.use_1200bps_touch=false
+d11d14as.menu.bootloader.0kb.upload.wait_for_upload_port=false
+d11d14as.menu.bootloader.0kb.upload.native_usb=false
+d11d14as.menu.bootloader.0kb.upload.maximum_size=16384
+d11d14as.menu.serial.one_uart=ONE_UART_ONE_WIRE_ONE_SPI
+d11d14as.menu.serial.one_uart.build.serialcom_uart=ONE_UART
+d11d14as.menu.serial.one_uart.build.serialcom_wire=ONE_WIRE
+d11d14as.menu.serial.one_uart.build.serialcom_spi=ONE_SPI
+d11d14as.menu.serial.no_uart=NO_UART_ONE_WIRE_ONE_SPI
+d11d14as.menu.serial.no_uart.build.serialcom_uart=NO_UART
+d11d14as.menu.serial.no_uart.build.serialcom_wire=ONE_WIRE
+d11d14as.menu.serial.no_uart.build.serialcom_spi=ONE_SPI
+d11d14as.menu.serial.two_uart=TWO_UART_ONE_WIRE_NO_SPI
+d11d14as.menu.serial.two_uart.build.serialcom_uart=TWO_UART
+d11d14as.menu.serial.two_uart.build.serialcom_wire=ONE_WIRE
+d11d14as.menu.serial.two_uart.build.serialcom_spi=NO_SPI
+d11d14as.menu.usb.cdc=CDC_ONLY
+d11d14as.menu.usb.cdc.build.usbcom=CDC_ONLY
+d11d14as.menu.usb.cdc.build.pid=0x2557
+d11d14as.menu.usb.cdc_hid=CDC_HID
+d11d14as.menu.usb.cdc_hid.build.usbcom=CDC_HID
+d11d14as.menu.usb.cdc_hid.build.pid=0x2856
+d11d14as.menu.usb.withcdc=WITH_CDC
+d11d14as.menu.usb.withcdc.build.usbcom=WITH_CDC
+d11d14as.menu.usb.withcdc.build.pid=0x2B41
+d11d14as.menu.usb.hid=HID_ONLY
+d11d14as.menu.usb.hid.build.usbcom=HID_ONLY
+d11d14as.menu.usb.hid.build.pid=0x2B40
+d11d14as.menu.usb.nocdc=WITHOUT_CDC
+d11d14as.menu.usb.nocdc.build.usbcom=WITHOUT_CDC
+d11d14as.menu.usb.nocdc.build.pid=0x2A0C
+d11d14as.menu.usb.none=USB_DISABLED
+d11d14as.menu.usb.none.build.usbcom=USB_DISABLED
+d11d14as.menu.usb.none.build.pid=0x2856
+
+# Generic D11D14AM
+d11d14am.name=Generic D11D14AM
+d11d14am.vid.0=0x16D0
+d11d14am.pid.0=0x3557
+d11d14am.vid.1=0x16D0
+d11d14am.pid.1=0x3856
+d11d14am.vid.2=0x16D0
+d11d14am.pid.2=0x3B41
+d11d14am.vid.3=0x16D0
+d11d14am.pid.3=0x3B40
+d11d14am.vid.4=0x16D0
+d11d14am.pid.4=0x3A0C
+d11d14am.vid.5=0x16D0
+d11d14am.pid.5=0x3856
+d11d14am.build.mcu=cortex-m0plus
+d11d14am.build.mathlib=arm_cortexM0l_math
+d11d14am.build.f_cpu=48000000L
+d11d14am.build.usb_product="MT-D11"
+d11d14am.build.usb_manufacturer="Fab Foundation"
+d11d14am.build.board=SAMD_ZERO
+d11d14am.build.core=arduino
+d11d14am.build.variant=Generic_D11D14AM
+d11d14am.build.variant_system_lib=
+d11d14am.build.vid=0x16D0
+d11d14am.upload.protocol=sam-ba
+d11d14am.bootloader.tool=openocd
+d11d14am.menu.float.default=Print & String use auto-promoted doubles only
+d11d14am.menu.float.default.build.floatconfig=FLOAT_BOTH_DOUBLES_ONLY
+d11d14am.menu.float.print=Print uses separate singles and doubles
+d11d14am.menu.float.print.build.floatconfig=FLOAT_PRINT_SINGLES_DOUBLES
+d11d14am.menu.float.string=String uses separate singles and doubles
+d11d14am.menu.float.string.build.floatconfig=FLOAT_STRING_SINGLES_DOUBLES
+d11d14am.menu.float.both=Print & String use separate singles and doubles
+d11d14am.menu.float.both.build.floatconfig=FLOAT_BOTH_SINGLES_DOUBLES
+d11d14am.menu.config.disabled=config.h disabled
+d11d14am.menu.config.disabled.build.buildconfig=CONFIG_H_DISABLED
+d11d14am.menu.config.enabled=config.h enabled (mostly code size reductions)
+d11d14am.menu.config.enabled.build.buildconfig=CONFIG_H_ENABLED
+d11d14am.menu.clock.crystal_32k=32KHZ_CRYSTAL
+d11d14am.menu.clock.crystal_32k.build.clockconfig=CLOCKCONFIG_32768HZ_CRYSTAL
+d11d14am.menu.clock.crystal_hs=HIGH_SPEED_CRYSTAL
+d11d14am.menu.clock.crystal_hs.build.clockconfig=CLOCKCONFIG_HS_CRYSTAL
+d11d14am.menu.clock.internal=INTERNAL_OSCILLATOR
+d11d14am.menu.clock.internal.build.clockconfig=CLOCKCONFIG_INTERNAL
+d11d14am.menu.clock.internal_usb=INTERNAL_USB_CALIBRATED_OSCILLATOR
+d11d14am.menu.clock.internal_usb.build.clockconfig=CLOCKCONFIG_INTERNAL_USB
+d11d14am.menu.timer.timer_732Hz=732.4Hz (16-bit)
+d11d14am.menu.timer.timer_732Hz.build.timerconfig=TIMER_732Hz
+d11d14am.menu.timer.timer_366Hz=366.2Hz (16-bit)
+d11d14am.menu.timer.timer_366Hz.build.timerconfig=TIMER_366Hz
+d11d14am.menu.timer.timer_244Hz=244.1Hz (16-bit)
+d11d14am.menu.timer.timer_244Hz.build.timerconfig=TIMER_244Hz
+d11d14am.menu.timer.timer_183Hz=183.1Hz (16-bit)
+d11d14am.menu.timer.timer_183Hz.build.timerconfig=TIMER_183Hz
+d11d14am.menu.timer.timer_146Hz=146.5Hz (16-bit)
+d11d14am.menu.timer.timer_146Hz.build.timerconfig=TIMER_146Hz
+d11d14am.menu.timer.timer_122Hz=122.1Hz (16-bit)
+d11d14am.menu.timer.timer_122Hz.build.timerconfig=TIMER_122Hz
+d11d14am.menu.timer.timer_105Hz=104.6Hz (16-bit)
+d11d14am.menu.timer.timer_105Hz.build.timerconfig=TIMER_105Hz
+d11d14am.menu.timer.timer_81Hz=81.38Hz (16-bit)
+d11d14am.menu.timer.timer_81Hz.build.timerconfig=TIMER_81Hz
+d11d14am.menu.timer.timer_61Hz=61.04Hz (16-bit)
+d11d14am.menu.timer.timer_61Hz.build.timerconfig=TIMER_61Hz
+d11d14am.menu.timer.timer_31Hz=30.52Hz (16-bit)
+d11d14am.menu.timer.timer_31Hz.build.timerconfig=TIMER_31Hz
+d11d14am.menu.timer.timer_187500Hz=187500Hz (8-bit)
+d11d14am.menu.timer.timer_187500Hz.build.timerconfig=TIMER_187500Hz
+d11d14am.menu.timer.timer_93750Hz=93750Hz (8-bit)
+d11d14am.menu.timer.timer_93750Hz.build.timerconfig=TIMER_93750Hz
+d11d14am.menu.timer.timer_62500Hz=62500Hz (8-bit)
+d11d14am.menu.timer.timer_62500Hz.build.timerconfig=TIMER_62500Hz
+d11d14am.menu.timer.timer_37500Hz=37500Hz (8-bit)
+d11d14am.menu.timer.timer_37500Hz.build.timerconfig=TIMER_37500Hz
+d11d14am.menu.timer.timer_20833Hz=20833Hz (8-bit)
+d11d14am.menu.timer.timer_20833Hz.build.timerconfig=TIMER_20833Hz
+d11d14am.menu.timer.timer_12500Hz=12500Hz (8-bit)
+d11d14am.menu.timer.timer_12500Hz.build.timerconfig=TIMER_12500Hz
+d11d14am.menu.timer.timer_7500Hz=7500Hz (8-bit)
+d11d14am.menu.timer.timer_7500Hz.build.timerconfig=TIMER_7500Hz
+d11d14am.menu.timer.timer_4166Hz=4166Hz (8-bit)
+d11d14am.menu.timer.timer_4166Hz.build.timerconfig=TIMER_4166Hz
+d11d14am.menu.timer.timer_2930Hz=2930Hz (8-bit)
+d11d14am.menu.timer.timer_2930Hz.build.timerconfig=TIMER_2930Hz
+d11d14am.menu.timer.timer_1465Hz=1465Hz (8-bit)
+d11d14am.menu.timer.timer_1465Hz.build.timerconfig=TIMER_1465Hz
+d11d14am.build.extra_flags=-D__SAMD11D14AM__ {build.usb_flags} -DARM_MATH_CM0PLUS
+d11d14am.build.ldscript=flash_16KB.ld
+d11d14am.build.openocdscript=openocd_scripts/SAMD11D14AM.cfg
+d11d14am.bootloader.file=zero/binaries/sam_ba_SAMD11D14AM.bin
+d11d14am.menu.bootloader.4kb=4KB_BOOTLOADER
+d11d14am.menu.bootloader.4kb.build.bootloader_size=__4KB_BOOTLOADER__
+d11d14am.menu.bootloader.4kb.build.ldscript_path=linker_scripts/gcc/4KB_Bootloader
+d11d14am.menu.bootloader.4kb.upload.tool=Fab_SAM_Arduino:bossac
+d11d14am.menu.bootloader.4kb.upload.use_1200bps_touch=true
+d11d14am.menu.bootloader.4kb.upload.wait_for_upload_port=true
+d11d14am.menu.bootloader.4kb.upload.native_usb=true
+d11d14am.menu.bootloader.4kb.upload.maximum_size=12288
+d11d14am.menu.bootloader.0kb=NO_BOOTLOADER
+d11d14am.menu.bootloader.0kb.build.bootloader_size=__NO_BOOTLOADER__
+d11d14am.menu.bootloader.0kb.build.ldscript_path=linker_scripts/gcc/No_Bootloader
+d11d14am.menu.bootloader.0kb.upload.tool=openocd
+d11d14am.menu.bootloader.0kb.upload.use_1200bps_touch=false
+d11d14am.menu.bootloader.0kb.upload.wait_for_upload_port=false
+d11d14am.menu.bootloader.0kb.upload.native_usb=false
+d11d14am.menu.bootloader.0kb.upload.maximum_size=16384
+d11d14am.menu.serial.one_uart=ONE_UART_ONE_WIRE_ONE_SPI
+d11d14am.menu.serial.one_uart.build.serialcom_uart=ONE_UART
+d11d14am.menu.serial.one_uart.build.serialcom_wire=ONE_WIRE
+d11d14am.menu.serial.one_uart.build.serialcom_spi=ONE_SPI
+d11d14am.menu.serial.no_uart=NO_UART_ONE_WIRE_ONE_SPI
+d11d14am.menu.serial.no_uart.build.serialcom_uart=NO_UART
+d11d14am.menu.serial.no_uart.build.serialcom_wire=ONE_WIRE
+d11d14am.menu.serial.no_uart.build.serialcom_spi=ONE_SPI
+d11d14am.menu.serial.two_uart=TWO_UART_ONE_WIRE_NO_SPI
+d11d14am.menu.serial.two_uart.build.serialcom_uart=TWO_UART
+d11d14am.menu.serial.two_uart.build.serialcom_wire=ONE_WIRE
+d11d14am.menu.serial.two_uart.build.serialcom_spi=NO_SPI
+d11d14am.menu.usb.cdc=CDC_ONLY
+d11d14am.menu.usb.cdc.build.usbcom=CDC_ONLY
+d11d14am.menu.usb.cdc.build.pid=0x3557
+d11d14am.menu.usb.cdc_hid=CDC_HID
+d11d14am.menu.usb.cdc_hid.build.usbcom=CDC_HID
+d11d14am.menu.usb.cdc_hid.build.pid=0x3856
+d11d14am.menu.usb.withcdc=WITH_CDC
+d11d14am.menu.usb.withcdc.build.usbcom=WITH_CDC
+d11d14am.menu.usb.withcdc.build.pid=0x3B41
+d11d14am.menu.usb.hid=HID_ONLY
+d11d14am.menu.usb.hid.build.usbcom=HID_ONLY
+d11d14am.menu.usb.hid.build.pid=0x3B40
+d11d14am.menu.usb.nocdc=WITHOUT_CDC
+d11d14am.menu.usb.nocdc.build.usbcom=WITHOUT_CDC
+d11d14am.menu.usb.nocdc.build.pid=0x3A0C
+d11d14am.menu.usb.none=USB_DISABLED
+d11d14am.menu.usb.none.build.usbcom=USB_DISABLED
+d11d14am.menu.usb.none.build.pid=0x3856
+
+# Generic x21E
+x21e.name=Generic x21E
+x21e.vid.0=0x16D0
+x21e.pid.0=0x4557
+x21e.vid.1=0x16D0
+x21e.pid.1=0x4856
+x21e.vid.2=0x16D0
+x21e.pid.2=0x4B41
+x21e.vid.3=0x16D0
+x21e.pid.3=0x4B40
+x21e.vid.4=0x16D0
+x21e.pid.4=0x4A0C
+x21e.vid.5=0x16D0
+x21e.pid.5=0x4856
+x21e.build.mcu=cortex-m0plus
+x21e.build.mathlib=arm_cortexM0l_math
+x21e.build.f_cpu=48000000L
+x21e.build.usb_product="x21E"
+x21e.build.usb_manufacturer="Fab Foundation"
+x21e.build.board=SAMD_ZERO
+x21e.build.core=arduino
+x21e.build.variant=Generic_x21E
+x21e.build.variant_system_lib=
+x21e.build.vid=0x16D0
+x21e.upload.protocol=sam-ba
+x21e.bootloader.tool=openocd
+x21e.menu.float.default=Print & String use auto-promoted doubles only
+x21e.menu.float.default.build.floatconfig=FLOAT_BOTH_DOUBLES_ONLY
+x21e.menu.float.print=Print uses separate singles and doubles
+x21e.menu.float.print.build.floatconfig=FLOAT_PRINT_SINGLES_DOUBLES
+x21e.menu.float.string=String uses separate singles and doubles
+x21e.menu.float.string.build.floatconfig=FLOAT_STRING_SINGLES_DOUBLES
+x21e.menu.float.both=Print & String use separate singles and doubles
+x21e.menu.float.both.build.floatconfig=FLOAT_BOTH_SINGLES_DOUBLES
+x21e.menu.config.disabled=config.h disabled
+x21e.menu.config.disabled.build.buildconfig=CONFIG_H_DISABLED
+x21e.menu.config.enabled=config.h enabled (mostly code size reductions)
+x21e.menu.config.enabled.build.buildconfig=CONFIG_H_ENABLED
+x21e.menu.clock.internal_usb=INTERNAL_USB_CALIBRATED_OSCILLATOR
+x21e.menu.clock.internal_usb.build.clockconfig=CLOCKCONFIG_INTERNAL_USB
+x21e.menu.clock.internal=INTERNAL_OSCILLATOR
+x21e.menu.clock.internal.build.clockconfig=CLOCKCONFIG_INTERNAL
+x21e.menu.clock.crystal_32k=32KHZ_CRYSTAL
+x21e.menu.clock.crystal_32k.build.clockconfig=CLOCKCONFIG_32768HZ_CRYSTAL
+x21e.menu.clock.crystal_hs=HIGH_SPEED_CRYSTAL
+x21e.menu.clock.crystal_hs.build.clockconfig=CLOCKCONFIG_HS_CRYSTAL
+x21e.menu.timer.timer_732Hz=732.4Hz (16-bit)
+x21e.menu.timer.timer_732Hz.build.timerconfig=TIMER_732Hz
+x21e.menu.timer.timer_366Hz=366.2Hz (16-bit)
+x21e.menu.timer.timer_366Hz.build.timerconfig=TIMER_366Hz
+x21e.menu.timer.timer_244Hz=244.1Hz (16-bit)
+x21e.menu.timer.timer_244Hz.build.timerconfig=TIMER_244Hz
+x21e.menu.timer.timer_183Hz=183.1Hz (16-bit)
+x21e.menu.timer.timer_183Hz.build.timerconfig=TIMER_183Hz
+x21e.menu.timer.timer_146Hz=146.5Hz (16-bit)
+x21e.menu.timer.timer_146Hz.build.timerconfig=TIMER_146Hz
+x21e.menu.timer.timer_122Hz=122.1Hz (16-bit)
+x21e.menu.timer.timer_122Hz.build.timerconfig=TIMER_122Hz
+x21e.menu.timer.timer_105Hz=104.6Hz (16-bit)
+x21e.menu.timer.timer_105Hz.build.timerconfig=TIMER_105Hz
+x21e.menu.timer.timer_81Hz=81.38Hz (16-bit)
+x21e.menu.timer.timer_81Hz.build.timerconfig=TIMER_81Hz
+x21e.menu.timer.timer_61Hz=61.04Hz (16-bit)
+x21e.menu.timer.timer_61Hz.build.timerconfig=TIMER_61Hz
+x21e.menu.timer.timer_31Hz=30.52Hz (16-bit)
+x21e.menu.timer.timer_31Hz.build.timerconfig=TIMER_31Hz
+x21e.menu.timer.timer_187500Hz=187500Hz (8-bit)
+x21e.menu.timer.timer_187500Hz.build.timerconfig=TIMER_187500Hz
+x21e.menu.timer.timer_93750Hz=93750Hz (8-bit)
+x21e.menu.timer.timer_93750Hz.build.timerconfig=TIMER_93750Hz
+x21e.menu.timer.timer_62500Hz=62500Hz (8-bit)
+x21e.menu.timer.timer_62500Hz.build.timerconfig=TIMER_62500Hz
+x21e.menu.timer.timer_37500Hz=37500Hz (8-bit)
+x21e.menu.timer.timer_37500Hz.build.timerconfig=TIMER_37500Hz
+x21e.menu.timer.timer_20833Hz=20833Hz (8-bit)
+x21e.menu.timer.timer_20833Hz.build.timerconfig=TIMER_20833Hz
+x21e.menu.timer.timer_12500Hz=12500Hz (8-bit)
+x21e.menu.timer.timer_12500Hz.build.timerconfig=TIMER_12500Hz
+x21e.menu.timer.timer_7500Hz=7500Hz (8-bit)
+x21e.menu.timer.timer_7500Hz.build.timerconfig=TIMER_7500Hz
+x21e.menu.timer.timer_4166Hz=4166Hz (8-bit)
+x21e.menu.timer.timer_4166Hz.build.timerconfig=TIMER_4166Hz
+x21e.menu.timer.timer_2930Hz=2930Hz (8-bit)
+x21e.menu.timer.timer_2930Hz.build.timerconfig=TIMER_2930Hz
+x21e.menu.timer.timer_1465Hz=1465Hz (8-bit)
+x21e.menu.timer.timer_1465Hz.build.timerconfig=TIMER_1465Hz
+x21e.menu.cpu.samd21e15a=SAMD21E15A
+x21e.menu.cpu.samd21e15a.upload.maximum_size=24576
+x21e.menu.cpu.samd21e15a.build.extra_flags=-D__SAMD21E15A__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21e.menu.cpu.samd21e15a.build.ldscript=flash_32KB.ld
+x21e.menu.cpu.samd21e15a.build.openocdscript=openocd_scripts/SAMD21E15A.cfg
+x21e.menu.cpu.samd21e15a.bootloader.file=zero/binaries/sam_ba_SAMD21E15A.bin
+x21e.menu.cpu.samd21e16a=SAMD21E16A
+x21e.menu.cpu.samd21e16a.upload.maximum_size=57344
+x21e.menu.cpu.samd21e16a.build.extra_flags=-D__SAMD21E16A__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21e.menu.cpu.samd21e16a.build.ldscript=flash_64KB.ld
+x21e.menu.cpu.samd21e16a.build.openocdscript=openocd_scripts/SAMD21E16A.cfg
+x21e.menu.cpu.samd21e16a.bootloader.file=zero/binaries/sam_ba_SAMD21E16A.bin
+x21e.menu.cpu.samd21e17a=SAMD21E17A
+x21e.menu.cpu.samd21e17a.upload.maximum_size=122880
+x21e.menu.cpu.samd21e17a.build.extra_flags=-D__SAMD21E17A__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21e.menu.cpu.samd21e17a.build.ldscript=flash_128KB.ld
+x21e.menu.cpu.samd21e17a.build.openocdscript=openocd_scripts/SAMD21E17A.cfg
+x21e.menu.cpu.samd21e17a.bootloader.file=zero/binaries/sam_ba_SAMD21E17A.bin
+x21e.menu.cpu.samd21e18a=SAMD21E18A
+x21e.menu.cpu.samd21e18a.upload.maximum_size=253952
+x21e.menu.cpu.samd21e18a.build.extra_flags=-D__SAMD21E18A__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21e.menu.cpu.samd21e18a.build.ldscript=flash_256KB.ld
+x21e.menu.cpu.samd21e18a.build.openocdscript=openocd_scripts/SAMD21E18A.cfg
+x21e.menu.cpu.samd21e18a.bootloader.file=zero/binaries/sam_ba_SAMD21E18A.bin
+x21e.menu.cpu.saml21e15b=SAML21E15B
+x21e.menu.cpu.saml21e15b.upload.maximum_size=24576
+x21e.menu.cpu.saml21e15b.build.extra_flags=-D__SAML21E15B__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21e.menu.cpu.saml21e15b.build.ldscript=flash_32KB.ld
+x21e.menu.cpu.saml21e15b.build.openocdscript=openocd_scripts/SAML21E15B.cfg
+x21e.menu.cpu.saml21e15b.bootloader.file=zero/binaries/sam_ba_SAML21E15B.bin
+x21e.menu.cpu.saml21e16b=SAML21E16B
+x21e.menu.cpu.saml21e16b.upload.maximum_size=57344
+x21e.menu.cpu.saml21e16b.build.extra_flags=-D__SAML21E16B__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21e.menu.cpu.saml21e16b.build.ldscript=flash_64KB.ld
+x21e.menu.cpu.saml21e16b.build.openocdscript=openocd_scripts/SAML21E16B.cfg
+x21e.menu.cpu.saml21e16b.bootloader.file=zero/binaries/sam_ba_SAML21E16B.bin
+x21e.menu.cpu.saml21e17b=SAML21E17B
+x21e.menu.cpu.saml21e17b.upload.maximum_size=122880
+x21e.menu.cpu.saml21e17b.build.extra_flags=-D__SAML21E17B__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21e.menu.cpu.saml21e17b.build.ldscript=flash_128KB.ld
+x21e.menu.cpu.saml21e17b.build.openocdscript=openocd_scripts/SAML21E17B.cfg
+x21e.menu.cpu.saml21e17b.bootloader.file=zero/binaries/sam_ba_SAML21E17B.bin
+x21e.menu.cpu.saml21e18b=SAML21E18B
+x21e.menu.cpu.saml21e18b.upload.maximum_size=253952
+x21e.menu.cpu.saml21e18b.build.extra_flags=-D__SAML21E18B__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21e.menu.cpu.saml21e18b.build.ldscript=flash_256KB.ld
+x21e.menu.cpu.saml21e18b.build.openocdscript=openocd_scripts/SAML21E18B.cfg
+x21e.menu.cpu.saml21e18b.bootloader.file=zero/binaries/sam_ba_SAML21E18B.bin
+x21e.menu.cpu.samc21e15a=SAMC21E15A
+x21e.menu.cpu.samc21e15a.upload.maximum_size=24576
+x21e.menu.cpu.samc21e15a.build.extra_flags=-D__SAMC21E15A__ -DARM_MATH_CM0PLUS
+x21e.menu.cpu.samc21e15a.build.ldscript=flash_32KB.ld
+x21e.menu.cpu.samc21e15a.build.openocdscript=openocd_scripts/SAMC21E15A.cfg
+x21e.menu.cpu.samc21e15a.bootloader.file=zero/binaries/sam_ba_SAMC21E15A.bin
+x21e.menu.cpu.samc21e16a=SAMC21E16A
+x21e.menu.cpu.samc21e16a.upload.maximum_size=57344
+x21e.menu.cpu.samc21e16a.build.extra_flags=-D__SAMC21E16A__ -DARM_MATH_CM0PLUS
+x21e.menu.cpu.samc21e16a.build.ldscript=flash_64KB.ld
+x21e.menu.cpu.samc21e16a.build.openocdscript=openocd_scripts/SAMC21E16A.cfg
+x21e.menu.cpu.samc21e16a.bootloader.file=zero/binaries/sam_ba_SAMC21E16A.bin
+x21e.menu.cpu.samc21e17a=SAMC21E17A
+x21e.menu.cpu.samc21e17a.upload.maximum_size=122880
+x21e.menu.cpu.samc21e17a.build.extra_flags=-D__SAMC21E17A__ -DARM_MATH_CM0PLUS
+x21e.menu.cpu.samc21e17a.build.ldscript=flash_128KB.ld
+x21e.menu.cpu.samc21e17a.build.openocdscript=openocd_scripts/SAMC21E17A.cfg
+x21e.menu.cpu.samc21e17a.bootloader.file=zero/binaries/sam_ba_SAMC21E17A.bin
+x21e.menu.cpu.samc21e18a=SAMC21E18A
+x21e.menu.cpu.samc21e18a.upload.maximum_size=253952
+x21e.menu.cpu.samc21e18a.build.extra_flags=-D__SAMC21E18A__ -DARM_MATH_CM0PLUS
+x21e.menu.cpu.samc21e18a.build.ldscript=flash_256KB.ld
+x21e.menu.cpu.samc21e18a.build.openocdscript=openocd_scripts/SAMC21E18A.cfg
+x21e.menu.cpu.samc21e18a.bootloader.file=zero/binaries/sam_ba_SAMC21E18A.bin
+x21e.menu.bootloader.8kb=8KB_BOOTLOADER
+x21e.menu.bootloader.8kb.build.bootloader_size=__8KB_BOOTLOADER__
+x21e.menu.bootloader.8kb.build.ldscript_path=linker_scripts/gcc/8KB_Bootloader
+x21e.menu.bootloader.8kb.upload.tool=Fab_SAM_Arduino:bossac
+x21e.menu.bootloader.8kb.upload.use_1200bps_touch=true
+x21e.menu.bootloader.8kb.upload.wait_for_upload_port=true
+x21e.menu.bootloader.8kb.upload.native_usb=true
+x21e.menu.bootloader.16kb=16KB_BOOTLOADER
+x21e.menu.bootloader.16kb.build.bootloader_size=__16KB_BOOTLOADER__
+x21e.menu.bootloader.16kb.build.ldscript_path=linker_scripts/gcc/16KB_Bootloader
+x21e.menu.bootloader.16kb.upload.tool=Fab_SAM_Arduino:bossac
+x21e.menu.bootloader.16kb.upload.use_1200bps_touch=true
+x21e.menu.bootloader.16kb.upload.wait_for_upload_port=true
+x21e.menu.bootloader.16kb.upload.native_usb=true
+x21e.menu.bootloader.0kb=NO_BOOTLOADER
+x21e.menu.bootloader.0kb.build.bootloader_size=__NO_BOOTLOADER__
+x21e.menu.bootloader.0kb.build.ldscript_path=linker_scripts/gcc/No_Bootloader
+x21e.menu.bootloader.0kb.upload.tool=openocd
+x21e.menu.bootloader.0kb.upload.use_1200bps_touch=false
+x21e.menu.bootloader.0kb.upload.wait_for_upload_port=false
+x21e.menu.bootloader.0kb.upload.native_usb=false
+x21e.menu.serial.one_uart=ONE_UART_ONE_WIRE_ONE_SPI
+x21e.menu.serial.one_uart.build.serialcom_uart=ONE_UART
+x21e.menu.serial.one_uart.build.serialcom_wire=ONE_WIRE
+x21e.menu.serial.one_uart.build.serialcom_spi=ONE_SPI
+x21e.menu.serial.one_uart_one_wire_two_spi=ONE_UART_ONE_WIRE_TWO_SPI
+x21e.menu.serial.one_uart_one_wire_two_spi.build.serialcom_uart=ONE_UART
+x21e.menu.serial.one_uart_one_wire_two_spi.build.serialcom_wire=ONE_WIRE
+x21e.menu.serial.one_uart_one_wire_two_spi.build.serialcom_spi=TWO_SPI
+x21e.menu.serial.one_uart_two_wire_one_spi=ONE_UART_TWO_WIRE_ONE_SPI
+x21e.menu.serial.one_uart_two_wire_one_spi.build.serialcom_uart=ONE_UART
+x21e.menu.serial.one_uart_two_wire_one_spi.build.serialcom_wire=TWO_WIRE
+x21e.menu.serial.one_uart_two_wire_one_spi.build.serialcom_spi=ONE_SPI
+x21e.menu.serial.two_uart=TWO_UART_ONE_WIRE_ONE_SPI
+x21e.menu.serial.two_uart.build.serialcom_uart=TWO_UART
+x21e.menu.serial.two_uart.build.serialcom_wire=ONE_WIRE
+x21e.menu.serial.two_uart.build.serialcom_spi=ONE_SPI
+x21e.menu.serial.three_uart_one_wire_no_spi=THREE_UART_ONE_WIRE_NO_SPI
+x21e.menu.serial.three_uart_one_wire_no_spi.build.serialcom_uart=THREE_UART
+x21e.menu.serial.three_uart_one_wire_no_spi.build.serialcom_wire=ONE_WIRE
+x21e.menu.serial.three_uart_one_wire_no_spi.build.serialcom_spi=NO_SPI
+x21e.menu.serial.three_uart_no_wire_one_spi=THREE_UART_NO_WIRE_ONE_SPI
+x21e.menu.serial.three_uart_no_wire_one_spi.build.serialcom_uart=THREE_UART
+x21e.menu.serial.three_uart_no_wire_one_spi.build.serialcom_wire=NO_WIRE
+x21e.menu.serial.three_uart_no_wire_one_spi.build.serialcom_spi=ONE_SPI
+x21e.menu.serial.four_uart=FOUR_UART_NO_WIRE_NO_SPI
+x21e.menu.serial.four_uart.build.serialcom_uart=FOUR_UART
+x21e.menu.serial.four_uart.build.serialcom_wire=NO_WIRE
+x21e.menu.serial.four_uart.build.serialcom_spi=NO_SPI
+x21e.menu.serial.no_uart_one_wire_two_spi=NO_UART_ONE_WIRE_TWO_SPI
+x21e.menu.serial.no_uart_one_wire_two_spi.build.serialcom_uart=NO_UART
+x21e.menu.serial.no_uart_one_wire_two_spi.build.serialcom_wire=ONE_WIRE
+x21e.menu.serial.no_uart_one_wire_two_spi.build.serialcom_spi=TWO_SPI
+x21e.menu.serial.four_uart_one_wire_one_spi=FOUR_UART_ONE_WIRE_ONE_SPI (L21 only)
+x21e.menu.serial.four_uart_one_wire_one_spi.build.serialcom_uart=FOUR_UART
+x21e.menu.serial.four_uart_one_wire_one_spi.build.serialcom_wire=ONE_WIRE
+x21e.menu.serial.four_uart_one_wire_one_spi.build.serialcom_spi=ONE_SPI
+x21e.menu.serial.five_uart_no_wire_one_spi=FIVE_UART_NO_WIRE_ONE_SPI (L21 only)
+x21e.menu.serial.five_uart_no_wire_one_spi.build.serialcom_uart=FIVE_UART
+x21e.menu.serial.five_uart_no_wire_one_spi.build.serialcom_wire=NO_WIRE
+x21e.menu.serial.five_uart_no_wire_one_spi.build.serialcom_spi=ONE_SPI
+x21e.menu.serial.five_uart_one_wire_no_spi=FIVE_UART_ONE_WIRE_NO_SPI (L21 only)
+x21e.menu.serial.five_uart_one_wire_no_spi.build.serialcom_uart=FIVE_UART
+x21e.menu.serial.five_uart_one_wire_no_spi.build.serialcom_wire=ONE_WIRE
+x21e.menu.serial.five_uart_one_wire_no_spi.build.serialcom_spi=NO_SPI
+x21e.menu.serial.six_uart=SIX_UART_NO_WIRE_NO_SPI (L21 only)
+x21e.menu.serial.six_uart.build.serialcom_uart=SIX_UART
+x21e.menu.serial.six_uart.build.serialcom_wire=NO_WIRE
+x21e.menu.serial.six_uart.build.serialcom_spi=NO_SPI
+x21e.menu.usb.cdc=CDC_ONLY
+x21e.menu.usb.cdc.build.usbcom=CDC_ONLY
+x21e.menu.usb.cdc.build.pid=0x4557
+x21e.menu.usb.cdc_hid=CDC_HID
+x21e.menu.usb.cdc_hid.build.usbcom=CDC_HID
+x21e.menu.usb.cdc_hid.build.pid=0x4856
+x21e.menu.usb.withcdc=WITH_CDC
+x21e.menu.usb.withcdc.build.usbcom=WITH_CDC
+x21e.menu.usb.withcdc.build.pid=0x4B41
+x21e.menu.usb.hid=HID_ONLY
+x21e.menu.usb.hid.build.usbcom=HID_ONLY
+x21e.menu.usb.hid.build.pid=0x4B40
+x21e.menu.usb.nocdc=WITHOUT_CDC
+x21e.menu.usb.nocdc.build.usbcom=WITHOUT_CDC
+x21e.menu.usb.nocdc.build.pid=0x4A0C
+x21e.menu.usb.none=USB_DISABLED
+x21e.menu.usb.none.build.usbcom=USB_DISABLED
+x21e.menu.usb.none.build.pid=0x4856
+
+# Generic x21G
+x21g.name=Generic x21G
+x21g.vid.0=0x16D0
+x21g.pid.0=0x5557
+x21g.vid.1=0x16D0
+x21g.pid.1=0x5856
+x21g.vid.2=0x16D0
+x21g.pid.2=0x5B41
+x21g.vid.3=0x16D0
+x21g.pid.3=0x5B40
+x21g.vid.4=0x16D0
+x21g.pid.4=0x5A0C
+x21g.vid.5=0x16D0
+x21g.pid.5=0x5856
+x21g.build.usb_manufacturer="Fab Foundation"
+x21g.build.board=SAMD_ZERO
+x21g.build.core=arduino
+x21g.build.variant=Generic_xx1G
+x21g.build.variant_system_lib=
+x21g.build.vid=0x16D0
+x21g.upload.protocol=sam-ba
+x21g.bootloader.tool=openocd
+x21g.menu.float.default=Print & String use auto-promoted doubles only
+x21g.menu.float.default.build.floatconfig=FLOAT_BOTH_DOUBLES_ONLY
+x21g.menu.float.print=Print uses separate singles and doubles
+x21g.menu.float.print.build.floatconfig=FLOAT_PRINT_SINGLES_DOUBLES
+x21g.menu.float.string=String uses separate singles and doubles
+x21g.menu.float.string.build.floatconfig=FLOAT_STRING_SINGLES_DOUBLES
+x21g.menu.float.both=Print & String use separate singles and doubles
+x21g.menu.float.both.build.floatconfig=FLOAT_BOTH_SINGLES_DOUBLES
+x21g.menu.config.disabled=config.h disabled
+x21g.menu.config.disabled.build.buildconfig=CONFIG_H_DISABLED
+x21g.menu.config.enabled=config.h enabled (mostly code size reductions)
+x21g.menu.config.enabled.build.buildconfig=CONFIG_H_ENABLED
+x21g.menu.clock.internal_usb=INTERNAL_USB_CALIBRATED_OSCILLATOR
+x21g.menu.clock.internal_usb.build.clockconfig=CLOCKCONFIG_INTERNAL_USB
+x21g.menu.clock.internal=INTERNAL_OSCILLATOR
+x21g.menu.clock.internal.build.clockconfig=CLOCKCONFIG_INTERNAL
+x21g.menu.clock.crystal_32k=32KHZ_CRYSTAL
+x21g.menu.clock.crystal_32k.build.clockconfig=CLOCKCONFIG_32768HZ_CRYSTAL
+x21g.menu.clock.crystal_hs=HIGH_SPEED_CRYSTAL
+x21g.menu.clock.crystal_hs.build.clockconfig=CLOCKCONFIG_HS_CRYSTAL
+x21g.menu.timer.timer_732Hz=732.4Hz (16-bit)
+x21g.menu.timer.timer_732Hz.build.timerconfig=TIMER_732Hz
+x21g.menu.timer.timer_366Hz=366.2Hz (16-bit)
+x21g.menu.timer.timer_366Hz.build.timerconfig=TIMER_366Hz
+x21g.menu.timer.timer_244Hz=244.1Hz (16-bit)
+x21g.menu.timer.timer_244Hz.build.timerconfig=TIMER_244Hz
+x21g.menu.timer.timer_183Hz=183.1Hz (16-bit)
+x21g.menu.timer.timer_183Hz.build.timerconfig=TIMER_183Hz
+x21g.menu.timer.timer_146Hz=146.5Hz (16-bit)
+x21g.menu.timer.timer_146Hz.build.timerconfig=TIMER_146Hz
+x21g.menu.timer.timer_122Hz=122.1Hz (16-bit)
+x21g.menu.timer.timer_122Hz.build.timerconfig=TIMER_122Hz
+x21g.menu.timer.timer_105Hz=104.6Hz (16-bit)
+x21g.menu.timer.timer_105Hz.build.timerconfig=TIMER_105Hz
+x21g.menu.timer.timer_81Hz=81.38Hz (16-bit)
+x21g.menu.timer.timer_81Hz.build.timerconfig=TIMER_81Hz
+x21g.menu.timer.timer_61Hz=61.04Hz (16-bit)
+x21g.menu.timer.timer_61Hz.build.timerconfig=TIMER_61Hz
+x21g.menu.timer.timer_31Hz=30.52Hz (16-bit)
+x21g.menu.timer.timer_31Hz.build.timerconfig=TIMER_31Hz
+x21g.menu.timer.timer_187500Hz=187500Hz (8-bit)
+x21g.menu.timer.timer_187500Hz.build.timerconfig=TIMER_187500Hz
+x21g.menu.timer.timer_93750Hz=93750Hz (8-bit)
+x21g.menu.timer.timer_93750Hz.build.timerconfig=TIMER_93750Hz
+x21g.menu.timer.timer_62500Hz=62500Hz (8-bit)
+x21g.menu.timer.timer_62500Hz.build.timerconfig=TIMER_62500Hz
+x21g.menu.timer.timer_37500Hz=37500Hz (8-bit)
+x21g.menu.timer.timer_37500Hz.build.timerconfig=TIMER_37500Hz
+x21g.menu.timer.timer_20833Hz=20833Hz (8-bit)
+x21g.menu.timer.timer_20833Hz.build.timerconfig=TIMER_20833Hz
+x21g.menu.timer.timer_12500Hz=12500Hz (8-bit)
+x21g.menu.timer.timer_12500Hz.build.timerconfig=TIMER_12500Hz
+x21g.menu.timer.timer_7500Hz=7500Hz (8-bit)
+x21g.menu.timer.timer_7500Hz.build.timerconfig=TIMER_7500Hz
+x21g.menu.timer.timer_4166Hz=4166Hz (8-bit)
+x21g.menu.timer.timer_4166Hz.build.timerconfig=TIMER_4166Hz
+x21g.menu.timer.timer_2930Hz=2930Hz (8-bit)
+x21g.menu.timer.timer_2930Hz.build.timerconfig=TIMER_2930Hz
+x21g.menu.timer.timer_1465Hz=1465Hz (8-bit)
+x21g.menu.timer.timer_1465Hz.build.timerconfig=TIMER_1465Hz
+x21g.menu.cpu.samd21g17a=SAMD21G17A
+x21g.menu.cpu.samd21g17a.upload.maximum_size=122880
+x21g.menu.cpu.samd21g17a.build.mcu=cortex-m0plus
+x21g.menu.cpu.samd21g17a.build.mathlib=arm_cortexM0l_math
+x21g.menu.cpu.samd21g17a.build.f_cpu=48000000L
+x21g.menu.cpu.samd21g17a.build.usb_product="D21"
+x21g.menu.cpu.samd21g17a.build.extra_flags=-D__SAMD21G17A__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21g.menu.cpu.samd21g17a.build.ldscript=flash_128KB.ld
+x21g.menu.cpu.samd21g17a.build.openocdscript=openocd_scripts/SAMD21G17A.cfg
+x21g.menu.cpu.samd21g17a.bootloader.file=zero/binaries/sam_ba_SAMD21G17A.bin
+x21g.menu.cpu.samd21g18a=SAMD21G18A
+x21g.menu.cpu.samd21g18a.upload.maximum_size=253952
+x21g.menu.cpu.samd21g18a.build.mcu=cortex-m0plus
+x21g.menu.cpu.samd21g18a.build.mathlib=arm_cortexM0l_math
+x21g.menu.cpu.samd21g18a.build.f_cpu=48000000L
+x21g.menu.cpu.samd21g18a.build.usb_product="D21"
+x21g.menu.cpu.samd21g18a.build.extra_flags=-D__SAMD21G18A__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21g.menu.cpu.samd21g18a.build.ldscript=flash_256KB.ld
+x21g.menu.cpu.samd21g18a.build.openocdscript=openocd_scripts/SAMD21G18A.cfg
+x21g.menu.cpu.samd21g18a.bootloader.file=zero/binaries/sam_ba_SAMD21G18A.bin
+x21g.menu.cpu.samd21g15a=SAMD21G15A
+x21g.menu.cpu.samd21g15a.upload.maximum_size=24576
+x21g.menu.cpu.samd21g15a.build.mcu=cortex-m0plus
+x21g.menu.cpu.samd21g15a.build.mathlib=arm_cortexM0l_math
+x21g.menu.cpu.samd21g15a.build.f_cpu=48000000L
+x21g.menu.cpu.samd21g15a.build.usb_product="D21"
+x21g.menu.cpu.samd21g15a.build.extra_flags=-D__SAMD21G15A__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21g.menu.cpu.samd21g15a.build.ldscript=flash_32KB.ld
+x21g.menu.cpu.samd21g15a.build.openocdscript=openocd_scripts/SAMD21G15A.cfg
+x21g.menu.cpu.samd21g15a.bootloader.file=zero/binaries/sam_ba_SAMD21G15A.bin
+x21g.menu.cpu.samd21g16a=SAMD21G16A
+x21g.menu.cpu.samd21g16a.upload.maximum_size=57344
+x21g.menu.cpu.samd21g16a.build.mcu=cortex-m0plus
+x21g.menu.cpu.samd21g16a.build.mathlib=arm_cortexM0l_math
+x21g.menu.cpu.samd21g16a.build.f_cpu=48000000L
+x21g.menu.cpu.samd21g16a.build.usb_product="D21"
+x21g.menu.cpu.samd21g16a.build.extra_flags=-D__SAMD21G16A__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21g.menu.cpu.samd21g16a.build.ldscript=flash_64KB.ld
+x21g.menu.cpu.samd21g16a.build.openocdscript=openocd_scripts/SAMD21G16A.cfg
+x21g.menu.cpu.samd21g16a.bootloader.file=zero/binaries/sam_ba_SAMD21G16A.bin
+x21g.menu.cpu.saml21g17b=SAML21G17B
+x21g.menu.cpu.saml21g17b.upload.maximum_size=122880
+x21g.menu.cpu.saml21g17b.build.mcu=cortex-m0plus
+x21g.menu.cpu.saml21g17b.build.mathlib=arm_cortexM0l_math
+x21g.menu.cpu.saml21g17b.build.f_cpu=48000000L
+x21g.menu.cpu.saml21g17b.build.usb_product="L21"
+x21g.menu.cpu.saml21g17b.build.extra_flags=-D__SAML21G17B__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21g.menu.cpu.saml21g17b.build.ldscript=flash_128KB.ld
+x21g.menu.cpu.saml21g17b.build.openocdscript=openocd_scripts/SAML21G17B.cfg
+x21g.menu.cpu.saml21g17b.bootloader.file=zero/binaries/sam_ba_SAML21G17B.bin
+x21g.menu.cpu.saml21g18b=SAML21G18B
+x21g.menu.cpu.saml21g18b.upload.maximum_size=253952
+x21g.menu.cpu.saml21g18b.build.mcu=cortex-m0plus
+x21g.menu.cpu.saml21g18b.build.mathlib=arm_cortexM0l_math
+x21g.menu.cpu.saml21g18b.build.f_cpu=48000000L
+x21g.menu.cpu.saml21g18b.build.usb_product="L21"
+x21g.menu.cpu.saml21g18b.build.extra_flags=-D__SAML21G18B__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21g.menu.cpu.saml21g18b.build.ldscript=flash_256KB.ld
+x21g.menu.cpu.saml21g18b.build.openocdscript=openocd_scripts/SAML21G18B.cfg
+x21g.menu.cpu.saml21g18b.bootloader.file=zero/binaries/sam_ba_SAML21G18B.bin
+x21g.menu.cpu.saml21g15b=SAML21G15B
+x21g.menu.cpu.saml21g15b.upload.maximum_size=24576
+x21g.menu.cpu.saml21g15b.build.mcu=cortex-m0plus
+x21g.menu.cpu.saml21g15b.build.mathlib=arm_cortexM0l_math
+x21g.menu.cpu.saml21g15b.build.f_cpu=48000000L
+x21g.menu.cpu.saml21g15b.build.usb_product="L21"
+x21g.menu.cpu.saml21g15b.build.extra_flags=-D__SAML21G15B__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21g.menu.cpu.saml21g15b.build.ldscript=flash_32KB.ld
+x21g.menu.cpu.saml21g15b.build.openocdscript=openocd_scripts/SAML21G15B.cfg
+x21g.menu.cpu.saml21g15b.bootloader.file=zero/binaries/sam_ba_SAML21G15B.bin
+x21g.menu.cpu.saml21g16b=SAML21G16B
+x21g.menu.cpu.saml21g16b.upload.maximum_size=57344
+x21g.menu.cpu.saml21g16b.build.mcu=cortex-m0plus
+x21g.menu.cpu.saml21g16b.build.mathlib=arm_cortexM0l_math
+x21g.menu.cpu.saml21g16b.build.f_cpu=48000000L
+x21g.menu.cpu.saml21g16b.build.usb_product="L21"
+x21g.menu.cpu.saml21g16b.build.extra_flags=-D__SAML21G16B__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21g.menu.cpu.saml21g16b.build.ldscript=flash_64KB.ld
+x21g.menu.cpu.saml21g16b.build.openocdscript=openocd_scripts/SAML21G16B.cfg
+x21g.menu.cpu.saml21g16b.bootloader.file=zero/binaries/sam_ba_SAML21G16B.bin
+x21g.menu.cpu.samc21g17a=SAMC21G17A
+x21g.menu.cpu.samc21g17a.upload.maximum_size=122880
+x21g.menu.cpu.samc21g17a.build.mcu=cortex-m0plus
+x21g.menu.cpu.samc21g17a.build.mathlib=arm_cortexM0l_math
+x21g.menu.cpu.samc21g17a.build.f_cpu=48000000L
+x21g.menu.cpu.samc21g17a.build.usb_product="C21"
+x21g.menu.cpu.samc21g17a.build.extra_flags=-D__SAMC21G17A__ -DARM_MATH_CM0PLUS
+x21g.menu.cpu.samc21g17a.build.ldscript=flash_128KB.ld
+x21g.menu.cpu.samc21g17a.build.openocdscript=openocd_scripts/SAMC21G17A.cfg
+x21g.menu.cpu.samc21g17a.bootloader.file=zero/binaries/sam_ba_SAMC21G17A.bin
+x21g.menu.cpu.samc21g18a=SAMC21G18A
+x21g.menu.cpu.samc21g18a.upload.maximum_size=253952
+x21g.menu.cpu.samc21g18a.build.mcu=cortex-m0plus
+x21g.menu.cpu.samc21g18a.build.mathlib=arm_cortexM0l_math
+x21g.menu.cpu.samc21g18a.build.f_cpu=48000000L
+x21g.menu.cpu.samc21g18a.build.usb_product="C21"
+x21g.menu.cpu.samc21g18a.build.extra_flags=-D__SAMC21G18A__ -DARM_MATH_CM0PLUS
+x21g.menu.cpu.samc21g18a.build.ldscript=flash_256KB.ld
+x21g.menu.cpu.samc21g18a.build.openocdscript=openocd_scripts/SAMC21G18A.cfg
+x21g.menu.cpu.samc21g18a.bootloader.file=zero/binaries/sam_ba_SAMC21G18A.bin
+x21g.menu.cpu.samc21g15a=SAMC21G15A
+x21g.menu.cpu.samc21g15a.upload.maximum_size=24576
+x21g.menu.cpu.samc21g15a.build.mcu=cortex-m0plus
+x21g.menu.cpu.samc21g15a.build.mathlib=arm_cortexM0l_math
+x21g.menu.cpu.samc21g15a.build.f_cpu=48000000L
+x21g.menu.cpu.samc21g15a.build.usb_product="C21"
+x21g.menu.cpu.samc21g15a.build.extra_flags=-D__SAMC21G15A__ -DARM_MATH_CM0PLUS
+x21g.menu.cpu.samc21g15a.build.ldscript=flash_32KB.ld
+x21g.menu.cpu.samc21g15a.build.openocdscript=openocd_scripts/SAMC21G15A.cfg
+x21g.menu.cpu.samc21g15a.bootloader.file=zero/binaries/sam_ba_SAMC21G15A.bin
+x21g.menu.cpu.samc21g16a=SAMC21G16A
+x21g.menu.cpu.samc21g16a.upload.maximum_size=57344
+x21g.menu.cpu.samc21g16a.build.mcu=cortex-m0plus
+x21g.menu.cpu.samc21g16a.build.mathlib=arm_cortexM0l_math
+x21g.menu.cpu.samc21g16a.build.f_cpu=48000000L
+x21g.menu.cpu.samc21g16a.build.usb_product="C21"
+x21g.menu.cpu.samc21g16a.build.extra_flags=-D__SAMC21G16A__ -DARM_MATH_CM0PLUS
+x21g.menu.cpu.samc21g16a.build.ldscript=flash_64KB.ld
+x21g.menu.cpu.samc21g16a.build.openocdscript=openocd_scripts/SAMC21G16A.cfg
+x21g.menu.cpu.samc21g16a.bootloader.file=zero/binaries/sam_ba_SAMC21G16A.bin
+x21g.menu.bootloader.8kb=8KB_BOOTLOADER
+x21g.menu.bootloader.8kb.build.bootloader_size=__8KB_BOOTLOADER__
+x21g.menu.bootloader.8kb.build.ldscript_path=linker_scripts/gcc/8KB_Bootloader
+x21g.menu.bootloader.8kb.upload.tool=Fab_SAM_Arduino:bossac
+x21g.menu.bootloader.8kb.upload.use_1200bps_touch=true
+x21g.menu.bootloader.8kb.upload.wait_for_upload_port=true
+x21g.menu.bootloader.8kb.upload.native_usb=true
+x21g.menu.bootloader.16kb=16KB_BOOTLOADER
+x21g.menu.bootloader.16kb.build.bootloader_size=__16KB_BOOTLOADER__
+x21g.menu.bootloader.16kb.build.ldscript_path=linker_scripts/gcc/16KB_Bootloader
+x21g.menu.bootloader.16kb.upload.tool=Fab_SAM_Arduino:bossac
+x21g.menu.bootloader.16kb.upload.use_1200bps_touch=true
+x21g.menu.bootloader.16kb.upload.wait_for_upload_port=true
+x21g.menu.bootloader.16kb.upload.native_usb=true
+x21g.menu.bootloader.0kb=NO_BOOTLOADER
+x21g.menu.bootloader.0kb.build.bootloader_size=__NO_BOOTLOADER__
+x21g.menu.bootloader.0kb.build.ldscript_path=linker_scripts/gcc/No_Bootloader
+x21g.menu.bootloader.0kb.upload.tool=openocd
+x21g.menu.bootloader.0kb.upload.use_1200bps_touch=false
+x21g.menu.bootloader.0kb.upload.wait_for_upload_port=false
+x21g.menu.bootloader.0kb.upload.native_usb=false
+x21g.menu.serial.one_uart=ONE_UART_ONE_WIRE_ONE_SPI
+x21g.menu.serial.one_uart.build.serialcom_uart=ONE_UART
+x21g.menu.serial.one_uart.build.serialcom_wire=ONE_WIRE
+x21g.menu.serial.one_uart.build.serialcom_spi=ONE_SPI
+x21g.menu.serial.one_uart_two_spi=ONE_UART_ONE_WIRE_TWO_SPI
+x21g.menu.serial.one_uart_two_spi.build.serialcom_uart=ONE_UART
+x21g.menu.serial.one_uart_two_spi.build.serialcom_wire=ONE_WIRE
+x21g.menu.serial.one_uart_two_spi.build.serialcom_spi=TWO_SPI
+x21g.menu.serial.one_uart_two_wire=ONE_UART_TWO_WIRE_ONE_SPI
+x21g.menu.serial.one_uart_two_wire.build.serialcom_uart=ONE_UART
+x21g.menu.serial.one_uart_two_wire.build.serialcom_wire=TWO_WIRE
+x21g.menu.serial.one_uart_two_wire.build.serialcom_spi=ONE_SPI
+x21g.menu.serial.two_uart=TWO_UART_ONE_WIRE_ONE_SPI
+x21g.menu.serial.two_uart.build.serialcom_uart=TWO_UART
+x21g.menu.serial.two_uart.build.serialcom_wire=ONE_WIRE
+x21g.menu.serial.two_uart.build.serialcom_spi=ONE_SPI
+x21g.menu.serial.two_uart_two_spi=TWO_UART_ONE_WIRE_TWO_SPI
+x21g.menu.serial.two_uart_two_spi.build.serialcom_uart=TWO_UART
+x21g.menu.serial.two_uart_two_spi.build.serialcom_wire=ONE_WIRE
+x21g.menu.serial.two_uart_two_spi.build.serialcom_spi=TWO_SPI
+x21g.menu.serial.two_uart_two_wire=TWO_UART_TWO_WIRE_ONE_SPI
+x21g.menu.serial.two_uart_two_wire.build.serialcom_uart=TWO_UART
+x21g.menu.serial.two_uart_two_wire.build.serialcom_wire=TWO_WIRE
+x21g.menu.serial.two_uart_two_wire.build.serialcom_spi=ONE_SPI
+x21g.menu.serial.three_uart=THREE_UART_ONE_WIRE_ONE_SPI
+x21g.menu.serial.three_uart.build.serialcom_uart=THREE_UART
+x21g.menu.serial.three_uart.build.serialcom_wire=ONE_WIRE
+x21g.menu.serial.three_uart.build.serialcom_spi=ONE_SPI
+x21g.menu.serial.three_uart_two_spi=THREE_UART_ONE_WIRE_TWO_SPI
+x21g.menu.serial.three_uart_two_spi.build.serialcom_uart=THREE_UART
+x21g.menu.serial.three_uart_two_spi.build.serialcom_wire=ONE_WIRE
+x21g.menu.serial.three_uart_two_spi.build.serialcom_spi=TWO_SPI
+x21g.menu.serial.three_uart_two_wire=THREE_UART_TWO_WIRE_ONE_SPI
+x21g.menu.serial.three_uart_two_wire.build.serialcom_uart=THREE_UART
+x21g.menu.serial.three_uart_two_wire.build.serialcom_wire=TWO_WIRE
+x21g.menu.serial.three_uart_two_wire.build.serialcom_spi=ONE_SPI
+x21g.menu.serial.no_uart=NO_UART_ONE_WIRE_ONE_SPI
+x21g.menu.serial.no_uart.build.serialcom_uart=NO_UART
+x21g.menu.serial.no_uart.build.serialcom_wire=ONE_WIRE
+x21g.menu.serial.no_uart.build.serialcom_spi=ONE_SPI
+x21g.menu.usb.cdc=CDC_ONLY
+x21g.menu.usb.cdc.build.usbcom=CDC_ONLY
+x21g.menu.usb.cdc.build.pid=0x5557
+x21g.menu.usb.cdc_hid=CDC_HID
+x21g.menu.usb.cdc_hid.build.usbcom=CDC_HID
+x21g.menu.usb.cdc_hid.build.pid=0x5856
+x21g.menu.usb.withcdc=WITH_CDC
+x21g.menu.usb.withcdc.build.usbcom=WITH_CDC
+x21g.menu.usb.withcdc.build.pid=0x5B41
+x21g.menu.usb.hid=HID_ONLY
+x21g.menu.usb.hid.build.usbcom=HID_ONLY
+x21g.menu.usb.hid.build.pid=0x5B40
+x21g.menu.usb.nocdc=WITHOUT_CDC
+x21g.menu.usb.nocdc.build.usbcom=WITHOUT_CDC
+x21g.menu.usb.nocdc.build.pid=0x5A0C
+x21g.menu.usb.none=USB_DISABLED
+x21g.menu.usb.none.build.usbcom=USB_DISABLED
+x21g.menu.usb.none.build.pid=0x5856
+
+# Generic x21J
+x21j.name=Generic x21J
+x21j.vid.0=0x16D0
+x21j.pid.0=0x6557
+x21j.vid.1=0x16D0
+x21j.pid.1=0x6856
+x21j.vid.2=0x16D0
+x21j.pid.2=0x6B41
+x21j.vid.3=0x16D0
+x21j.pid.3=0x6B40
+x21j.vid.4=0x16D0
+x21j.pid.4=0x6A0C
+x21j.vid.5=0x16D0
+x21j.pid.5=0x6856
+x21j.build.usb_manufacturer="Fab Foundation"
+x21j.build.board=SAMD_ZERO
+x21j.build.core=arduino
+x21j.build.variant=Generic_xx1J
+x21j.build.variant_system_lib=
+x21j.build.vid=0x16D0
+x21j.upload.protocol=sam-ba
+x21j.bootloader.tool=openocd
+x21j.menu.float.default=Print & String use auto-promoted doubles only
+x21j.menu.float.default.build.floatconfig=FLOAT_BOTH_DOUBLES_ONLY
+x21j.menu.float.print=Print uses separate singles and doubles
+x21j.menu.float.print.build.floatconfig=FLOAT_PRINT_SINGLES_DOUBLES
+x21j.menu.float.string=String uses separate singles and doubles
+x21j.menu.float.string.build.floatconfig=FLOAT_STRING_SINGLES_DOUBLES
+x21j.menu.float.both=Print & String use separate singles and doubles
+x21j.menu.float.both.build.floatconfig=FLOAT_BOTH_SINGLES_DOUBLES
+x21j.menu.config.disabled=config.h disabled
+x21j.menu.config.disabled.build.buildconfig=CONFIG_H_DISABLED
+x21j.menu.config.enabled=config.h enabled (mostly code size reductions)
+x21j.menu.config.enabled.build.buildconfig=CONFIG_H_ENABLED
+x21j.menu.clock.internal_usb=INTERNAL_USB_CALIBRATED_OSCILLATOR
+x21j.menu.clock.internal_usb.build.clockconfig=CLOCKCONFIG_INTERNAL_USB
+x21j.menu.clock.internal=INTERNAL_OSCILLATOR
+x21j.menu.clock.internal.build.clockconfig=CLOCKCONFIG_INTERNAL
+x21j.menu.clock.crystal_32k=32KHZ_CRYSTAL
+x21j.menu.clock.crystal_32k.build.clockconfig=CLOCKCONFIG_32768HZ_CRYSTAL
+x21j.menu.clock.crystal_hs=HIGH_SPEED_CRYSTAL
+x21j.menu.clock.crystal_hs.build.clockconfig=CLOCKCONFIG_HS_CRYSTAL
+x21j.menu.timer.timer_732Hz=732.4Hz (16-bit)
+x21j.menu.timer.timer_732Hz.build.timerconfig=TIMER_732Hz
+x21j.menu.timer.timer_366Hz=366.2Hz (16-bit)
+x21j.menu.timer.timer_366Hz.build.timerconfig=TIMER_366Hz
+x21j.menu.timer.timer_244Hz=244.1Hz (16-bit)
+x21j.menu.timer.timer_244Hz.build.timerconfig=TIMER_244Hz
+x21j.menu.timer.timer_183Hz=183.1Hz (16-bit)
+x21j.menu.timer.timer_183Hz.build.timerconfig=TIMER_183Hz
+x21j.menu.timer.timer_146Hz=146.5Hz (16-bit)
+x21j.menu.timer.timer_146Hz.build.timerconfig=TIMER_146Hz
+x21j.menu.timer.timer_122Hz=122.1Hz (16-bit)
+x21j.menu.timer.timer_122Hz.build.timerconfig=TIMER_122Hz
+x21j.menu.timer.timer_105Hz=104.6Hz (16-bit)
+x21j.menu.timer.timer_105Hz.build.timerconfig=TIMER_105Hz
+x21j.menu.timer.timer_81Hz=81.38Hz (16-bit)
+x21j.menu.timer.timer_81Hz.build.timerconfig=TIMER_81Hz
+x21j.menu.timer.timer_61Hz=61.04Hz (16-bit)
+x21j.menu.timer.timer_61Hz.build.timerconfig=TIMER_61Hz
+x21j.menu.timer.timer_31Hz=30.52Hz (16-bit)
+x21j.menu.timer.timer_31Hz.build.timerconfig=TIMER_31Hz
+x21j.menu.timer.timer_187500Hz=187500Hz (8-bit)
+x21j.menu.timer.timer_187500Hz.build.timerconfig=TIMER_187500Hz
+x21j.menu.timer.timer_93750Hz=93750Hz (8-bit)
+x21j.menu.timer.timer_93750Hz.build.timerconfig=TIMER_93750Hz
+x21j.menu.timer.timer_62500Hz=62500Hz (8-bit)
+x21j.menu.timer.timer_62500Hz.build.timerconfig=TIMER_62500Hz
+x21j.menu.timer.timer_37500Hz=37500Hz (8-bit)
+x21j.menu.timer.timer_37500Hz.build.timerconfig=TIMER_37500Hz
+x21j.menu.timer.timer_20833Hz=20833Hz (8-bit)
+x21j.menu.timer.timer_20833Hz.build.timerconfig=TIMER_20833Hz
+x21j.menu.timer.timer_12500Hz=12500Hz (8-bit)
+x21j.menu.timer.timer_12500Hz.build.timerconfig=TIMER_12500Hz
+x21j.menu.timer.timer_7500Hz=7500Hz (8-bit)
+x21j.menu.timer.timer_7500Hz.build.timerconfig=TIMER_7500Hz
+x21j.menu.timer.timer_4166Hz=4166Hz (8-bit)
+x21j.menu.timer.timer_4166Hz.build.timerconfig=TIMER_4166Hz
+x21j.menu.timer.timer_2930Hz=2930Hz (8-bit)
+x21j.menu.timer.timer_2930Hz.build.timerconfig=TIMER_2930Hz
+x21j.menu.timer.timer_1465Hz=1465Hz (8-bit)
+x21j.menu.timer.timer_1465Hz.build.timerconfig=TIMER_1465Hz
+x21j.menu.cpu.samd21j17a=SAMD21J17A
+x21j.menu.cpu.samd21j17a.upload.maximum_size=122880
+x21j.menu.cpu.samd21j17a.build.mcu=cortex-m0plus
+x21j.menu.cpu.samd21j17a.build.mathlib=arm_cortexM0l_math
+x21j.menu.cpu.samd21j17a.build.f_cpu=48000000L
+x21j.menu.cpu.samd21j17a.build.usb_product="Xeno D21"
+x21j.menu.cpu.samd21j17a.build.extra_flags=-D__SAMD21J17A__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21j.menu.cpu.samd21j17a.build.ldscript=flash_128KB.ld
+x21j.menu.cpu.samd21j17a.build.openocdscript=openocd_scripts/SAMD21J17A.cfg
+x21j.menu.cpu.samd21j17a.bootloader.file=zero/binaries/sam_ba_SAMD21J17A.bin
+x21j.menu.cpu.samd21j18a=SAMD21J18A
+x21j.menu.cpu.samd21j18a.upload.maximum_size=253952
+x21j.menu.cpu.samd21j18a.build.mcu=cortex-m0plus
+x21j.menu.cpu.samd21j18a.build.mathlib=arm_cortexM0l_math
+x21j.menu.cpu.samd21j18a.build.f_cpu=48000000L
+x21j.menu.cpu.samd21j18a.build.usb_product="Xeno D21"
+x21j.menu.cpu.samd21j18a.build.extra_flags=-D__SAMD21J18A__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21j.menu.cpu.samd21j18a.build.ldscript=flash_256KB.ld
+x21j.menu.cpu.samd21j18a.build.openocdscript=openocd_scripts/SAMD21J18A.cfg
+x21j.menu.cpu.samd21j18a.bootloader.file=zero/binaries/sam_ba_SAMD21J18A.bin
+x21j.menu.cpu.samd21j15a=SAMD21J15A
+x21j.menu.cpu.samd21j15a.upload.maximum_size=24576
+x21j.menu.cpu.samd21j15a.build.mcu=cortex-m0plus
+x21j.menu.cpu.samd21j15a.build.mathlib=arm_cortexM0l_math
+x21j.menu.cpu.samd21j15a.build.f_cpu=48000000L
+x21j.menu.cpu.samd21j15a.build.usb_product="Xeno D21"
+x21j.menu.cpu.samd21j15a.build.extra_flags=-D__SAMD21J15A__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21j.menu.cpu.samd21j15a.build.ldscript=flash_32KB.ld
+x21j.menu.cpu.samd21j15a.build.openocdscript=openocd_scripts/SAMD21J15A.cfg
+x21j.menu.cpu.samd21j15a.bootloader.file=zero/binaries/sam_ba_SAMD21J15A.bin
+x21j.menu.cpu.samd21j16a=SAMD21J16A
+x21j.menu.cpu.samd21j16a.upload.maximum_size=57344
+x21j.menu.cpu.samd21j16a.build.mcu=cortex-m0plus
+x21j.menu.cpu.samd21j16a.build.mathlib=arm_cortexM0l_math
+x21j.menu.cpu.samd21j16a.build.f_cpu=48000000L
+x21j.menu.cpu.samd21j16a.build.usb_product="Xeno D21"
+x21j.menu.cpu.samd21j16a.build.extra_flags=-D__SAMD21J16A__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21j.menu.cpu.samd21j16a.build.ldscript=flash_64KB.ld
+x21j.menu.cpu.samd21j16a.build.openocdscript=openocd_scripts/SAMD21J16A.cfg
+x21j.menu.cpu.samd21j16a.bootloader.file=zero/binaries/sam_ba_SAMD21J16A.bin
+x21j.menu.cpu.saml21j17b=SAML21J17B
+x21j.menu.cpu.saml21j17b.upload.maximum_size=122880
+x21j.menu.cpu.saml21j17b.build.mcu=cortex-m0plus
+x21j.menu.cpu.saml21j17b.build.mathlib=arm_cortexM0l_math
+x21j.menu.cpu.saml21j17b.build.f_cpu=48000000L
+x21j.menu.cpu.saml21j17b.build.usb_product="Xeno L21"
+x21j.menu.cpu.saml21j17b.build.extra_flags=-D__SAML21J17B__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21j.menu.cpu.saml21j17b.build.ldscript=flash_128KB.ld
+x21j.menu.cpu.saml21j17b.build.openocdscript=openocd_scripts/SAML21J17B.cfg
+x21j.menu.cpu.saml21j17b.bootloader.file=zero/binaries/sam_ba_SAML21J17B.bin
+x21j.menu.cpu.saml21j18b=SAML21J18B
+x21j.menu.cpu.saml21j18b.upload.maximum_size=253952
+x21j.menu.cpu.saml21j18b.build.mcu=cortex-m0plus
+x21j.menu.cpu.saml21j18b.build.mathlib=arm_cortexM0l_math
+x21j.menu.cpu.saml21j18b.build.f_cpu=48000000L
+x21j.menu.cpu.saml21j18b.build.usb_product="Xeno L21"
+x21j.menu.cpu.saml21j18b.build.extra_flags=-D__SAML21J18B__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21j.menu.cpu.saml21j18b.build.ldscript=flash_256KB.ld
+x21j.menu.cpu.saml21j18b.build.openocdscript=openocd_scripts/SAML21J18B.cfg
+x21j.menu.cpu.saml21j18b.bootloader.file=zero/binaries/sam_ba_SAML21J18B.bin
+x21j.menu.cpu.saml21j16b=SAML21J16B
+x21j.menu.cpu.saml21j16b.upload.maximum_size=57344
+x21j.menu.cpu.saml21j16b.build.mcu=cortex-m0plus
+x21j.menu.cpu.saml21j16b.build.mathlib=arm_cortexM0l_math
+x21j.menu.cpu.saml21j16b.build.f_cpu=48000000L
+x21j.menu.cpu.saml21j16b.build.usb_product="Xeno L21"
+x21j.menu.cpu.saml21j16b.build.extra_flags=-D__SAML21J16B__ {build.usb_flags} -DARM_MATH_CM0PLUS
+x21j.menu.cpu.saml21j16b.build.ldscript=flash_64KB.ld
+x21j.menu.cpu.saml21j16b.build.openocdscript=openocd_scripts/SAML21J16B.cfg
+x21j.menu.cpu.saml21j16b.bootloader.file=zero/binaries/sam_ba_SAML21J16B.bin
+x21j.menu.cpu.samc21j17a=SAMC21J17A
+x21j.menu.cpu.samc21j17a.upload.maximum_size=122880
+x21j.menu.cpu.samc21j17a.build.mcu=cortex-m0plus
+x21j.menu.cpu.samc21j17a.build.mathlib=arm_cortexM0l_math
+x21j.menu.cpu.samc21j17a.build.f_cpu=48000000L
+x21j.menu.cpu.samc21j17a.build.usb_product="Xeno C21"
+x21j.menu.cpu.samc21j17a.build.extra_flags=-D__SAMC21J17A__ -DARM_MATH_CM0PLUS
+x21j.menu.cpu.samc21j17a.build.ldscript=flash_128KB.ld
+x21j.menu.cpu.samc21j17a.build.openocdscript=openocd_scripts/SAMC21J17A.cfg
+x21j.menu.cpu.samc21j17a.bootloader.file=zero/binaries/sam_ba_SAMC21J17A.bin
+x21j.menu.cpu.samc21j18a=SAMC21J18A
+x21j.menu.cpu.samc21j18a.upload.maximum_size=253952
+x21j.menu.cpu.samc21j18a.build.mcu=cortex-m0plus
+x21j.menu.cpu.samc21j18a.build.mathlib=arm_cortexM0l_math
+x21j.menu.cpu.samc21j18a.build.f_cpu=48000000L
+x21j.menu.cpu.samc21j18a.build.usb_product="Xeno C21"
+x21j.menu.cpu.samc21j18a.build.extra_flags=-D__SAMC21J18A__ -DARM_MATH_CM0PLUS
+x21j.menu.cpu.samc21j18a.build.ldscript=flash_256KB.ld
+x21j.menu.cpu.samc21j18a.build.openocdscript=openocd_scripts/SAMC21J18A.cfg
+x21j.menu.cpu.samc21j18a.bootloader.file=zero/binaries/sam_ba_SAMC21J18A.bin
+x21j.menu.cpu.samc21j15a=SAMC21J15A
+x21j.menu.cpu.samc21j15a.upload.maximum_size=24576
+x21j.menu.cpu.samc21j15a.build.mcu=cortex-m0plus
+x21j.menu.cpu.samc21j15a.build.mathlib=arm_cortexM0l_math
+x21j.menu.cpu.samc21j15a.build.f_cpu=48000000L
+x21j.menu.cpu.samc21j15a.build.usb_product="Xeno C21"
+x21j.menu.cpu.samc21j15a.build.extra_flags=-D__SAMC21J15A__ -DARM_MATH_CM0PLUS
+x21j.menu.cpu.samc21j15a.build.ldscript=flash_32KB.ld
+x21j.menu.cpu.samc21j15a.build.openocdscript=openocd_scripts/SAMC21J15A.cfg
+x21j.menu.cpu.samc21j15a.bootloader.file=zero/binaries/sam_ba_SAMC21J15A.bin
+x21j.menu.cpu.samc21j16a=SAMC21J16A
+x21j.menu.cpu.samc21j16a.upload.maximum_size=57344
+x21j.menu.cpu.samc21j16a.build.mcu=cortex-m0plus
+x21j.menu.cpu.samc21j16a.build.mathlib=arm_cortexM0l_math
+x21j.menu.cpu.samc21j16a.build.f_cpu=48000000L
+x21j.menu.cpu.samc21j16a.build.usb_product="Xeno C21"
+x21j.menu.cpu.samc21j16a.build.extra_flags=-D__SAMC21J16A__ -DARM_MATH_CM0PLUS
+x21j.menu.cpu.samc21j16a.build.ldscript=flash_64KB.ld
+x21j.menu.cpu.samc21j16a.build.openocdscript=openocd_scripts/SAMC21J16A.cfg
+x21j.menu.cpu.samc21j16a.bootloader.file=zero/binaries/sam_ba_SAMC21J16A.bin
+x21j.menu.bootloader.8kb=8KB_BOOTLOADER
+x21j.menu.bootloader.8kb.build.bootloader_size=__8KB_BOOTLOADER__
+x21j.menu.bootloader.8kb.build.ldscript_path=linker_scripts/gcc/8KB_Bootloader
+x21j.menu.bootloader.8kb.upload.tool=Fab_SAM_Arduino:bossac
+x21j.menu.bootloader.8kb.upload.use_1200bps_touch=true
+x21j.menu.bootloader.8kb.upload.wait_for_upload_port=true
+x21j.menu.bootloader.8kb.upload.native_usb=true
+x21j.menu.bootloader.16kb=16KB_BOOTLOADER
+x21j.menu.bootloader.16kb.build.bootloader_size=__16KB_BOOTLOADER__
+x21j.menu.bootloader.16kb.build.ldscript_path=linker_scripts/gcc/16KB_Bootloader
+x21j.menu.bootloader.16kb.upload.tool=Fab_SAM_Arduino:bossac
+x21j.menu.bootloader.16kb.upload.use_1200bps_touch=true
+x21j.menu.bootloader.16kb.upload.wait_for_upload_port=true
+x21j.menu.bootloader.16kb.upload.native_usb=true
+x21j.menu.bootloader.0kb=NO_BOOTLOADER
+x21j.menu.bootloader.0kb.build.bootloader_size=__NO_BOOTLOADER__
+x21j.menu.bootloader.0kb.build.ldscript_path=linker_scripts/gcc/No_Bootloader
+x21j.menu.bootloader.0kb.upload.tool=openocd
+x21j.menu.bootloader.0kb.upload.use_1200bps_touch=false
+x21j.menu.bootloader.0kb.upload.wait_for_upload_port=false
+x21j.menu.bootloader.0kb.upload.native_usb=false
+x21j.menu.serial.one_uart=ONE_UART_ONE_WIRE_ONE_SPI
+x21j.menu.serial.one_uart.build.serialcom_uart=ONE_UART
+x21j.menu.serial.one_uart.build.serialcom_wire=ONE_WIRE
+x21j.menu.serial.one_uart.build.serialcom_spi=ONE_SPI
+x21j.menu.serial.one_uart_two_spi=ONE_UART_ONE_WIRE_TWO_SPI
+x21j.menu.serial.one_uart_two_spi.build.serialcom_uart=ONE_UART
+x21j.menu.serial.one_uart_two_spi.build.serialcom_wire=ONE_WIRE
+x21j.menu.serial.one_uart_two_spi.build.serialcom_spi=TWO_SPI
+x21j.menu.serial.one_uart_two_wire=ONE_UART_TWO_WIRE_ONE_SPI
+x21j.menu.serial.one_uart_two_wire.build.serialcom_uart=ONE_UART
+x21j.menu.serial.one_uart_two_wire.build.serialcom_wire=TWO_WIRE
+x21j.menu.serial.one_uart_two_wire.build.serialcom_spi=ONE_SPI
+x21j.menu.serial.two_uart=TWO_UART_ONE_WIRE_ONE_SPI
+x21j.menu.serial.two_uart.build.serialcom_uart=TWO_UART
+x21j.menu.serial.two_uart.build.serialcom_wire=ONE_WIRE
+x21j.menu.serial.two_uart.build.serialcom_spi=ONE_SPI
+x21j.menu.serial.two_uart_two_spi=TWO_UART_ONE_WIRE_TWO_SPI
+x21j.menu.serial.two_uart_two_spi.build.serialcom_uart=TWO_UART
+x21j.menu.serial.two_uart_two_spi.build.serialcom_wire=ONE_WIRE
+x21j.menu.serial.two_uart_two_spi.build.serialcom_spi=TWO_SPI
+x21j.menu.serial.two_uart_two_wire=TWO_UART_TWO_WIRE_ONE_SPI
+x21j.menu.serial.two_uart_two_wire.build.serialcom_uart=TWO_UART
+x21j.menu.serial.two_uart_two_wire.build.serialcom_wire=TWO_WIRE
+x21j.menu.serial.two_uart_two_wire.build.serialcom_spi=ONE_SPI
+x21j.menu.serial.three_uart=THREE_UART_ONE_WIRE_ONE_SPI
+x21j.menu.serial.three_uart.build.serialcom_uart=THREE_UART
+x21j.menu.serial.three_uart.build.serialcom_wire=ONE_WIRE
+x21j.menu.serial.three_uart.build.serialcom_spi=ONE_SPI
+x21j.menu.serial.three_uart_two_spi=THREE_UART_ONE_WIRE_TWO_SPI
+x21j.menu.serial.three_uart_two_spi.build.serialcom_uart=THREE_UART
+x21j.menu.serial.three_uart_two_spi.build.serialcom_wire=ONE_WIRE
+x21j.menu.serial.three_uart_two_spi.build.serialcom_spi=TWO_SPI
+x21j.menu.serial.three_uart_two_wire=THREE_UART_TWO_WIRE_ONE_SPI
+x21j.menu.serial.three_uart_two_wire.build.serialcom_uart=THREE_UART
+x21j.menu.serial.three_uart_two_wire.build.serialcom_wire=TWO_WIRE
+x21j.menu.serial.three_uart_two_wire.build.serialcom_spi=ONE_SPI
+x21j.menu.serial.no_uart=NO_UART_ONE_WIRE_ONE_SPI
+x21j.menu.serial.no_uart.build.serialcom_uart=NO_UART
+x21j.menu.serial.no_uart.build.serialcom_wire=ONE_WIRE
+x21j.menu.serial.no_uart.build.serialcom_spi=ONE_SPI
+x21j.menu.usb.cdc=CDC_ONLY
+x21j.menu.usb.cdc.build.usbcom=CDC_ONLY
+x21j.menu.usb.cdc.build.pid=0x6557
+x21j.menu.usb.cdc_hid=CDC_HID
+x21j.menu.usb.cdc_hid.build.usbcom=CDC_HID
+x21j.menu.usb.cdc_hid.build.pid=0x6856
+x21j.menu.usb.withcdc=WITH_CDC
+x21j.menu.usb.withcdc.build.usbcom=WITH_CDC
+x21j.menu.usb.withcdc.build.pid=0x6B41
+x21j.menu.usb.hid=HID_ONLY
+x21j.menu.usb.hid.build.usbcom=HID_ONLY
+x21j.menu.usb.hid.build.pid=0x6B40
+x21j.menu.usb.nocdc=WITHOUT_CDC
+x21j.menu.usb.nocdc.build.usbcom=WITHOUT_CDC
+x21j.menu.usb.nocdc.build.pid=0x6A0C
+x21j.menu.usb.none=USB_DISABLED
+x21j.menu.usb.none.build.usbcom=USB_DISABLED
+x21j.menu.usb.none.build.pid=0x6856
+
+# Generic D51G
+d51g.name=Generic D51G
+d51g.vid.0=0x16D0
+d51g.pid.0=0x7557
+d51g.vid.1=0x16D0
+d51g.pid.1=0x7856
+d51g.vid.2=0x16D0
+d51g.pid.2=0x7B41
+d51g.vid.3=0x16D0
+d51g.pid.3=0x7B40
+d51g.vid.4=0x16D0
+d51g.pid.4=0x7A0C
+d51g.vid.5=0x16D0
+d51g.pid.5=0x7856
+d51g.build.usb_manufacturer="Fab Foundation"
+
+# KH mod
+#d51g.build.board=SAMD_ZERO
+d51g.build.board=__SAMD51__
+######
+
+d51g.build.core=arduino
+
+# KH mod
+#d51g.build.variant=Generic_D51G
+d51g.build.variant=Generic_xx1G
+######
+
+d51g.build.variant_system_lib=
+d51g.build.vid=0x16D0
+d51g.upload.protocol=sam-ba
+d51g.bootloader.tool=openocd
+d51g.menu.float.default=Print & String use auto-promoted doubles only
+d51g.menu.float.default.build.floatconfig=FLOAT_BOTH_DOUBLES_ONLY
+d51g.menu.float.print=Print uses separate singles and doubles
+d51g.menu.float.print.build.floatconfig=FLOAT_PRINT_SINGLES_DOUBLES
+d51g.menu.float.string=String uses separate singles and doubles
+d51g.menu.float.string.build.floatconfig=FLOAT_STRING_SINGLES_DOUBLES
+d51g.menu.float.both=Print & String use separate singles and doubles
+d51g.menu.float.both.build.floatconfig=FLOAT_BOTH_SINGLES_DOUBLES
+d51g.menu.config.disabled=config.h disabled
+d51g.menu.config.disabled.build.buildconfig=CONFIG_H_DISABLED
+d51g.menu.config.enabled=config.h enabled (mostly code size reductions)
+d51g.menu.config.enabled.build.buildconfig=CONFIG_H_ENABLED
+d51g.menu.clock.internal_usb=INTERNAL_USB_CALIBRATED_OSCILLATOR
+d51g.menu.clock.internal_usb.build.clockconfig=CLOCKCONFIG_INTERNAL_USB
+d51g.menu.clock.internal=INTERNAL_OSCILLATOR
+d51g.menu.clock.internal.build.clockconfig=CLOCKCONFIG_INTERNAL
+d51g.menu.clock.crystal_32k=32KHZ_CRYSTAL
+d51g.menu.clock.crystal_32k.build.clockconfig=CLOCKCONFIG_32768HZ_CRYSTAL
+d51g.menu.clock.crystal_hs=HIGH_SPEED_CRYSTAL
+d51g.menu.clock.crystal_hs.build.clockconfig=CLOCKCONFIG_HS_CRYSTAL
+d51g.menu.timer.timer_732Hz=732.4Hz (16-bit)
+d51g.menu.timer.timer_732Hz.build.timerconfig=TIMER_732Hz
+d51g.menu.timer.timer_366Hz=366.2Hz (16-bit)
+d51g.menu.timer.timer_366Hz.build.timerconfig=TIMER_366Hz
+d51g.menu.timer.timer_244Hz=244.1Hz (16-bit)
+d51g.menu.timer.timer_244Hz.build.timerconfig=TIMER_244Hz
+d51g.menu.timer.timer_183Hz=183.1Hz (16-bit)
+d51g.menu.timer.timer_183Hz.build.timerconfig=TIMER_183Hz
+d51g.menu.timer.timer_146Hz=146.5Hz (16-bit)
+d51g.menu.timer.timer_146Hz.build.timerconfig=TIMER_146Hz
+d51g.menu.timer.timer_122Hz=122.1Hz (16-bit)
+d51g.menu.timer.timer_122Hz.build.timerconfig=TIMER_122Hz
+d51g.menu.timer.timer_105Hz=104.6Hz (16-bit)
+d51g.menu.timer.timer_105Hz.build.timerconfig=TIMER_105Hz
+d51g.menu.timer.timer_81Hz=81.38Hz (16-bit)
+d51g.menu.timer.timer_81Hz.build.timerconfig=TIMER_81Hz
+d51g.menu.timer.timer_61Hz=61.04Hz (16-bit)
+d51g.menu.timer.timer_61Hz.build.timerconfig=TIMER_61Hz
+d51g.menu.timer.timer_31Hz=30.52Hz (16-bit)
+d51g.menu.timer.timer_31Hz.build.timerconfig=TIMER_31Hz
+d51g.menu.timer.timer_187500Hz=187500Hz (8-bit)
+d51g.menu.timer.timer_187500Hz.build.timerconfig=TIMER_187500Hz
+d51g.menu.timer.timer_93750Hz=93750Hz (8-bit)
+d51g.menu.timer.timer_93750Hz.build.timerconfig=TIMER_93750Hz
+d51g.menu.timer.timer_62500Hz=62500Hz (8-bit)
+d51g.menu.timer.timer_62500Hz.build.timerconfig=TIMER_62500Hz
+d51g.menu.timer.timer_37500Hz=37500Hz (8-bit)
+d51g.menu.timer.timer_37500Hz.build.timerconfig=TIMER_37500Hz
+d51g.menu.timer.timer_20833Hz=20833Hz (8-bit)
+d51g.menu.timer.timer_20833Hz.build.timerconfig=TIMER_20833Hz
+d51g.menu.timer.timer_12500Hz=12500Hz (8-bit)
+d51g.menu.timer.timer_12500Hz.build.timerconfig=TIMER_12500Hz
+d51g.menu.timer.timer_7500Hz=7500Hz (8-bit)
+d51g.menu.timer.timer_7500Hz.build.timerconfig=TIMER_7500Hz
+d51g.menu.timer.timer_4166Hz=4166Hz (8-bit)
+d51g.menu.timer.timer_4166Hz.build.timerconfig=TIMER_4166Hz
+d51g.menu.timer.timer_2930Hz=2930Hz (8-bit)
+d51g.menu.timer.timer_2930Hz.build.timerconfig=TIMER_2930Hz
+d51g.menu.timer.timer_1465Hz=1465Hz (16-bit)
+d51g.menu.timer.timer_1465Hz.build.timerconfig=TIMER_1465Hz
+d51g.menu.cpu.samd51g18a_120=SAMD51G18A_120MHz
+d51g.menu.cpu.samd51g18a_120.upload.maximum_size=253952
+d51g.menu.cpu.samd51g18a_120.build.mcu=cortex-m4
+d51g.menu.cpu.samd51g18a_120.build.mathlib=arm_cortexM4lf_math
+d51g.menu.cpu.samd51g18a_120.build.f_cpu=120000000L
+d51g.menu.cpu.samd51g18a_120.build.usb_product="Xeno Mini D51"
+
+# KH mod
+#d51g.menu.cpu.samd51g18a_120.build.extra_flags=-D__SAMD51G18A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4
+#d51g.menu.cpu.samd51g18a_120.build.extra_flags=-D__SAMD51G18A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4 -D__SAMD51__
+d51g.menu.cpu.samd51g18a_120.build.extra_flags=-D__SAMD51G18A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4 -D__SAMD51__
+######
+
+
+d51g.menu.cpu.samd51g18a_120.build.ldscript=flash_m4f_256KB.ld
+d51g.menu.cpu.samd51g18a_120.build.openocdscript=openocd_scripts/SAMD51G18A.cfg
+d51g.menu.cpu.samd51g18a_120.bootloader.file=zero/binaries/sam_ba_SAMD51G18A.bin
+d51g.menu.cpu.samd51g18a_48=SAMD51G18A_48MHz
+d51g.menu.cpu.samd51g18a_48.upload.maximum_size=253952
+d51g.menu.cpu.samd51g18a_48.build.mcu=cortex-m4
+d51g.menu.cpu.samd51g18a_48.build.mathlib=arm_cortexM4lf_math
+d51g.menu.cpu.samd51g18a_48.build.f_cpu=48000000L
+d51g.menu.cpu.samd51g18a_48.build.usb_product="Xeno Mini D51"
+
+# KH mod
+#d51g.menu.cpu.samd51g18a_48.build.extra_flags=-D__SAMD51G18A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4
+d51g.menu.cpu.samd51g18a_48.build.extra_flags=-D__SAMD51G18A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4 -D__SAMD51__
+######
+
+d51g.menu.cpu.samd51g18a_48.build.ldscript=flash_m4f_256KB.ld
+d51g.menu.cpu.samd51g18a_48.build.openocdscript=openocd_scripts/SAMD51G18A.cfg
+d51g.menu.cpu.samd51g18a_48.bootloader.file=zero/binaries/sam_ba_SAMD51G18A.bin
+d51g.menu.cpu.samd51g19a_120=SAMD51G19A_120MHz
+d51g.menu.cpu.samd51g19a_120.upload.maximum_size=516096
+d51g.menu.cpu.samd51g19a_120.build.mcu=cortex-m4
+d51g.menu.cpu.samd51g19a_120.build.mathlib=arm_cortexM4lf_math
+d51g.menu.cpu.samd51g19a_120.build.f_cpu=120000000L
+d51g.menu.cpu.samd51g19a_120.build.usb_product="Xeno Mini D51"
+
+# KH mod
+#d51g.menu.cpu.samd51g19a_120.build.extra_flags=-D__SAMD51G19A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4
+d51g.menu.cpu.samd51g19a_120.build.extra_flags=-D__SAMD51G19A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4 -D__SAMD51__
+######
+
+d51g.menu.cpu.samd51g19a_120.build.ldscript=flash_m4f_512KB.ld
+d51g.menu.cpu.samd51g19a_120.build.openocdscript=openocd_scripts/SAMD51G19A.cfg
+d51g.menu.cpu.samd51g19a_120.bootloader.file=zero/binaries/sam_ba_SAMD51G19A.bin
+d51g.menu.cpu.samd51g19a_48=SAMD51G19A_48MHz
+d51g.menu.cpu.samd51g19a_48.upload.maximum_size=516096
+d51g.menu.cpu.samd51g19a_48.build.mcu=cortex-m4
+d51g.menu.cpu.samd51g19a_48.build.mathlib=arm_cortexM4lf_math
+d51g.menu.cpu.samd51g19a_48.build.f_cpu=48000000L
+d51g.menu.cpu.samd51g19a_48.build.usb_product="Xeno Mini D51"
+
+# KH mod
+#d51g.menu.cpu.samd51g19a_48.build.extra_flags=-D__SAMD51G19A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4
+d51g.menu.cpu.samd51g19a_48.build.extra_flags=-D__SAMD51G19A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4 -D__SAMD51__
+######
+
+d51g.menu.cpu.samd51g19a_48.build.ldscript=flash_m4f_512KB.ld
+d51g.menu.cpu.samd51g19a_48.build.openocdscript=openocd_scripts/SAMD51G19A.cfg
+d51g.menu.cpu.samd51g19a_48.bootloader.file=zero/binaries/sam_ba_SAMD51G19A.bin
+d51g.menu.bootloader.8kb=8KB_BOOTLOADER
+d51g.menu.bootloader.8kb.build.bootloader_size=__8KB_BOOTLOADER__
+d51g.menu.bootloader.8kb.build.ldscript_path=linker_scripts/gcc/8KB_Bootloader
+d51g.menu.bootloader.8kb.upload.tool=Fab_SAM_Arduino:bossac
+d51g.menu.bootloader.8kb.upload.use_1200bps_touch=true
+d51g.menu.bootloader.8kb.upload.wait_for_upload_port=true
+d51g.menu.bootloader.8kb.upload.native_usb=true
+d51g.menu.bootloader.16kb=16KB_BOOTLOADER
+d51g.menu.bootloader.16kb.build.bootloader_size=__16KB_BOOTLOADER__
+d51g.menu.bootloader.16kb.build.ldscript_path=linker_scripts/gcc/16KB_Bootloader
+d51g.menu.bootloader.16kb.upload.tool=Fab_SAM_Arduino:bossac
+d51g.menu.bootloader.16kb.upload.use_1200bps_touch=true
+d51g.menu.bootloader.16kb.upload.wait_for_upload_port=true
+d51g.menu.bootloader.16kb.upload.native_usb=true
+d51g.menu.bootloader.0kb=NO_BOOTLOADER
+d51g.menu.bootloader.0kb.build.bootloader_size=__NO_BOOTLOADER__
+d51g.menu.bootloader.0kb.build.ldscript_path=linker_scripts/gcc/No_Bootloader
+d51g.menu.bootloader.0kb.upload.tool=openocd
+d51g.menu.bootloader.0kb.upload.use_1200bps_touch=false
+d51g.menu.bootloader.0kb.upload.wait_for_upload_port=false
+d51g.menu.bootloader.0kb.upload.native_usb=false
+d51g.menu.serial.one_uart=ONE_UART_ONE_WIRE_ONE_SPI
+d51g.menu.serial.one_uart.build.serialcom_uart=ONE_UART
+d51g.menu.serial.one_uart.build.serialcom_wire=ONE_WIRE
+d51g.menu.serial.one_uart.build.serialcom_spi=ONE_SPI
+d51g.menu.serial.one_uart_two_spi=ONE_UART_ONE_WIRE_TWO_SPI
+d51g.menu.serial.one_uart_two_spi.build.serialcom_uart=ONE_UART
+d51g.menu.serial.one_uart_two_spi.build.serialcom_wire=ONE_WIRE
+d51g.menu.serial.one_uart_two_spi.build.serialcom_spi=TWO_SPI
+d51g.menu.serial.one_uart_two_wire=ONE_UART_TWO_WIRE_ONE_SPI
+d51g.menu.serial.one_uart_two_wire.build.serialcom_uart=ONE_UART
+d51g.menu.serial.one_uart_two_wire.build.serialcom_wire=TWO_WIRE
+d51g.menu.serial.one_uart_two_wire.build.serialcom_spi=ONE_SPI
+d51g.menu.serial.two_uart=TWO_UART_ONE_WIRE_ONE_SPI
+d51g.menu.serial.two_uart.build.serialcom_uart=TWO_UART
+d51g.menu.serial.two_uart.build.serialcom_wire=ONE_WIRE
+d51g.menu.serial.two_uart.build.serialcom_spi=ONE_SPI
+d51g.menu.serial.two_uart_two_spi=TWO_UART_ONE_WIRE_TWO_SPI
+d51g.menu.serial.two_uart_two_spi.build.serialcom_uart=TWO_UART
+d51g.menu.serial.two_uart_two_spi.build.serialcom_wire=ONE_WIRE
+d51g.menu.serial.two_uart_two_spi.build.serialcom_spi=TWO_SPI
+d51g.menu.serial.two_uart_two_wire=TWO_UART_TWO_WIRE_ONE_SPI
+d51g.menu.serial.two_uart_two_wire.build.serialcom_uart=TWO_UART
+d51g.menu.serial.two_uart_two_wire.build.serialcom_wire=TWO_WIRE
+d51g.menu.serial.two_uart_two_wire.build.serialcom_spi=ONE_SPI
+d51g.menu.serial.three_uart=THREE_UART_ONE_WIRE_ONE_SPI
+d51g.menu.serial.three_uart.build.serialcom_uart=THREE_UART
+d51g.menu.serial.three_uart.build.serialcom_wire=ONE_WIRE
+d51g.menu.serial.three_uart.build.serialcom_spi=ONE_SPI
+d51g.menu.serial.three_uart_two_spi=THREE_UART_ONE_WIRE_TWO_SPI
+d51g.menu.serial.three_uart_two_spi.build.serialcom_uart=THREE_UART
+d51g.menu.serial.three_uart_two_spi.build.serialcom_wire=ONE_WIRE
+d51g.menu.serial.three_uart_two_spi.build.serialcom_spi=TWO_SPI
+d51g.menu.serial.three_uart_two_wire=THREE_UART_TWO_WIRE_ONE_SPI
+d51g.menu.serial.three_uart_two_wire.build.serialcom_uart=THREE_UART
+d51g.menu.serial.three_uart_two_wire.build.serialcom_wire=TWO_WIRE
+d51g.menu.serial.three_uart_two_wire.build.serialcom_spi=ONE_SPI
+d51g.menu.serial.no_uart=NO_UART_ONE_WIRE_ONE_SPI
+d51g.menu.serial.no_uart.build.serialcom_uart=NO_UART
+d51g.menu.serial.no_uart.build.serialcom_wire=ONE_WIRE
+d51g.menu.serial.no_uart.build.serialcom_spi=ONE_SPI
+d51g.menu.usb.cdc=CDC_ONLY
+d51g.menu.usb.cdc.build.usbcom=CDC_ONLY
+d51g.menu.usb.cdc.build.pid=0x7557
+d51g.menu.usb.cdc_hid=CDC_HID
+d51g.menu.usb.cdc_hid.build.usbcom=CDC_HID
+d51g.menu.usb.cdc_hid.build.pid=0x7856
+d51g.menu.usb.withcdc=WITH_CDC
+d51g.menu.usb.withcdc.build.usbcom=WITH_CDC
+d51g.menu.usb.withcdc.build.pid=0x7B41
+d51g.menu.usb.hid=HID_ONLY
+d51g.menu.usb.hid.build.usbcom=HID_ONLY
+d51g.menu.usb.hid.build.pid=0x7B40
+d51g.menu.usb.nocdc=WITHOUT_CDC
+d51g.menu.usb.nocdc.build.usbcom=WITHOUT_CDC
+d51g.menu.usb.nocdc.build.pid=0x7A0C
+d51g.menu.usb.none=USB_DISABLED
+d51g.menu.usb.none.build.usbcom=USB_DISABLED
+d51g.menu.usb.none.build.pid=0x7856
+
+# Generic D51J
+d51j.name=Generic D51J
+d51j.vid.0=0x16D0
+d51j.pid.0=0x8557
+d51j.vid.1=0x16D0
+d51j.pid.1=0x8856
+d51j.vid.2=0x16D0
+d51j.pid.2=0x8B41
+d51j.vid.3=0x16D0
+d51j.pid.3=0x8B40
+d51j.vid.4=0x16D0
+d51j.pid.4=0x8A0C
+d51j.vid.5=0x16D0
+d51j.pid.5=0x8856
+d51j.build.usb_manufacturer="Fab Foundation"
+
+# KH mod
+#d51j.build.board=SAMD_ZERO
+d51j.build.board=__SAMD51__
+######
+
+d51j.build.core=arduino
+d51j.build.variant=Generic_xx1J
+d51j.build.variant_system_lib=
+d51j.build.vid=0x16D0
+d51j.upload.protocol=sam-ba
+d51j.bootloader.tool=openocd
+d51j.menu.float.default=Print & String use auto-promoted doubles only
+d51j.menu.float.default.build.floatconfig=FLOAT_BOTH_DOUBLES_ONLY
+d51j.menu.float.print=Print uses separate singles and doubles
+d51j.menu.float.print.build.floatconfig=FLOAT_PRINT_SINGLES_DOUBLES
+d51j.menu.float.string=String uses separate singles and doubles
+d51j.menu.float.string.build.floatconfig=FLOAT_STRING_SINGLES_DOUBLES
+d51j.menu.float.both=Print & String use separate singles and doubles
+d51j.menu.float.both.build.floatconfig=FLOAT_BOTH_SINGLES_DOUBLES
+d51j.menu.config.disabled=config.h disabled
+d51j.menu.config.disabled.build.buildconfig=CONFIG_H_DISABLED
+d51j.menu.config.enabled=config.h enabled (mostly code size reductions)
+d51j.menu.config.enabled.build.buildconfig=CONFIG_H_ENABLED
+d51j.menu.clock.internal_usb=INTERNAL_USB_CALIBRATED_OSCILLATOR
+d51j.menu.clock.internal_usb.build.clockconfig=CLOCKCONFIG_INTERNAL_USB
+d51j.menu.clock.internal=INTERNAL_OSCILLATOR
+d51j.menu.clock.internal.build.clockconfig=CLOCKCONFIG_INTERNAL
+d51j.menu.clock.crystal_32k=32KHZ_CRYSTAL
+d51j.menu.clock.crystal_32k.build.clockconfig=CLOCKCONFIG_32768HZ_CRYSTAL
+d51j.menu.clock.crystal_hs=HIGH_SPEED_CRYSTAL
+d51j.menu.clock.crystal_hs.build.clockconfig=CLOCKCONFIG_HS_CRYSTAL
+d51j.menu.timer.timer_732Hz=732.4Hz (16-bit)
+d51j.menu.timer.timer_732Hz.build.timerconfig=TIMER_732Hz
+d51j.menu.timer.timer_366Hz=366.2Hz (16-bit)
+d51j.menu.timer.timer_366Hz.build.timerconfig=TIMER_366Hz
+d51j.menu.timer.timer_244Hz=244.1Hz (16-bit)
+d51j.menu.timer.timer_244Hz.build.timerconfig=TIMER_244Hz
+d51j.menu.timer.timer_183Hz=183.1Hz (16-bit)
+d51j.menu.timer.timer_183Hz.build.timerconfig=TIMER_183Hz
+d51j.menu.timer.timer_146Hz=146.5Hz (16-bit)
+d51j.menu.timer.timer_146Hz.build.timerconfig=TIMER_146Hz
+d51j.menu.timer.timer_122Hz=122.1Hz (16-bit)
+d51j.menu.timer.timer_122Hz.build.timerconfig=TIMER_122Hz
+d51j.menu.timer.timer_105Hz=104.6Hz (16-bit)
+d51j.menu.timer.timer_105Hz.build.timerconfig=TIMER_105Hz
+d51j.menu.timer.timer_81Hz=81.38Hz (16-bit)
+d51j.menu.timer.timer_81Hz.build.timerconfig=TIMER_81Hz
+d51j.menu.timer.timer_61Hz=61.04Hz (16-bit)
+d51j.menu.timer.timer_61Hz.build.timerconfig=TIMER_61Hz
+d51j.menu.timer.timer_31Hz=30.52Hz (16-bit)
+d51j.menu.timer.timer_31Hz.build.timerconfig=TIMER_31Hz
+d51j.menu.timer.timer_187500Hz=187500Hz (8-bit)
+d51j.menu.timer.timer_187500Hz.build.timerconfig=TIMER_187500Hz
+d51j.menu.timer.timer_93750Hz=93750Hz (8-bit)
+d51j.menu.timer.timer_93750Hz.build.timerconfig=TIMER_93750Hz
+d51j.menu.timer.timer_62500Hz=62500Hz (8-bit)
+d51j.menu.timer.timer_62500Hz.build.timerconfig=TIMER_62500Hz
+d51j.menu.timer.timer_37500Hz=37500Hz (8-bit)
+d51j.menu.timer.timer_37500Hz.build.timerconfig=TIMER_37500Hz
+d51j.menu.timer.timer_20833Hz=20833Hz (8-bit)
+d51j.menu.timer.timer_20833Hz.build.timerconfig=TIMER_20833Hz
+d51j.menu.timer.timer_12500Hz=12500Hz (8-bit)
+d51j.menu.timer.timer_12500Hz.build.timerconfig=TIMER_12500Hz
+d51j.menu.timer.timer_7500Hz=7500Hz (8-bit)
+d51j.menu.timer.timer_7500Hz.build.timerconfig=TIMER_7500Hz
+d51j.menu.timer.timer_4166Hz=4166Hz (8-bit)
+d51j.menu.timer.timer_4166Hz.build.timerconfig=TIMER_4166Hz
+d51j.menu.timer.timer_2930Hz=2930Hz (8-bit)
+d51j.menu.timer.timer_2930Hz.build.timerconfig=TIMER_2930Hz
+d51j.menu.timer.timer_1465Hz=1465Hz (16-bit)
+d51j.menu.timer.timer_1465Hz.build.timerconfig=TIMER_1465Hz
+d51j.menu.cpu.samd51j18a_120=SAMD51J18A_120MHz
+d51j.menu.cpu.samd51j18a_120.upload.maximum_size=253952
+d51j.menu.cpu.samd51j18a_120.build.mcu=cortex-m4
+d51j.menu.cpu.samd51j18a_120.build.mathlib=arm_cortexM4lf_math
+d51j.menu.cpu.samd51j18a_120.build.f_cpu=120000000L
+d51j.menu.cpu.samd51j18a_120.build.usb_product="Xeno D51"
+
+# KH mod
+#d51j.menu.cpu.samd51j18a_120.build.extra_flags=-D__SAMD51J18A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4
+d51j.menu.cpu.samd51j18a_120.build.extra_flags=-D__SAMD51J18A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4 -D__SAMD51__
+######
+
+d51j.menu.cpu.samd51j18a_120.build.ldscript=flash_m4f_256KB.ld
+d51j.menu.cpu.samd51j18a_120.build.openocdscript=openocd_scripts/SAMD51J18A.cfg
+d51j.menu.cpu.samd51j18a_120.bootloader.file=zero/binaries/sam_ba_SAMD51J18A.bin
+d51j.menu.cpu.samd51j18a_48=SAMD51J18A_48MHz
+d51j.menu.cpu.samd51j18a_48.upload.maximum_size=253952
+d51j.menu.cpu.samd51j18a_48.build.mcu=cortex-m4
+d51j.menu.cpu.samd51j18a_48.build.mathlib=arm_cortexM4lf_math
+d51j.menu.cpu.samd51j18a_48.build.f_cpu=48000000L
+d51j.menu.cpu.samd51j18a_48.build.usb_product="Xeno D51"
+
+# KH mod
+#d51j.menu.cpu.samd51j18a_48.build.extra_flags=-D__SAMD51J18A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4
+d51j.menu.cpu.samd51j18a_48.build.extra_flags=-D__SAMD51J18A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4 -D__SAMD51__
+######
+
+d51j.menu.cpu.samd51j18a_48.build.ldscript=flash_m4f_256KB.ld
+d51j.menu.cpu.samd51j18a_48.build.openocdscript=openocd_scripts/SAMD51J18A.cfg
+d51j.menu.cpu.samd51j18a_48.bootloader.file=zero/binaries/sam_ba_SAMD51J18A.bin
+d51j.menu.cpu.samd51j19a_120=SAMD51J19A_120MHz
+d51j.menu.cpu.samd51j19a_120.upload.maximum_size=516096
+d51j.menu.cpu.samd51j19a_120.build.mcu=cortex-m4
+d51j.menu.cpu.samd51j19a_120.build.mathlib=arm_cortexM4lf_math
+d51j.menu.cpu.samd51j19a_120.build.f_cpu=120000000L
+d51j.menu.cpu.samd51j19a_120.build.usb_product="Xeno D51"
+
+# KH mod
+#d51j.menu.cpu.samd51j19a_120.build.extra_flags=-D__SAMD51J19A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4
+d51j.menu.cpu.samd51j19a_120.build.extra_flags=-D__SAMD51J19A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4 -D__SAMD51__
+######
+
+d51j.menu.cpu.samd51j19a_120.build.ldscript=flash_m4f_512KB.ld
+d51j.menu.cpu.samd51j19a_120.build.openocdscript=openocd_scripts/SAMD51J19A.cfg
+d51j.menu.cpu.samd51j19a_120.bootloader.file=zero/binaries/sam_ba_SAMD51J19A.bin
+d51j.menu.cpu.samd51j19a_48=SAMD51J19A_48MHz
+d51j.menu.cpu.samd51j19a_48.upload.maximum_size=516096
+d51j.menu.cpu.samd51j19a_48.build.mcu=cortex-m4
+d51j.menu.cpu.samd51j19a_48.build.mathlib=arm_cortexM4lf_math
+d51j.menu.cpu.samd51j19a_48.build.f_cpu=48000000L
+d51j.menu.cpu.samd51j19a_48.build.usb_product="Xeno D51"
+
+# KH mod
+#d51j.menu.cpu.samd51j19a_48.build.extra_flags=-D__SAMD51J19A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4
+d51j.menu.cpu.samd51j19a_48.build.extra_flags=-D__SAMD51J19A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4 -D__SAMD51__
+######
+
+d51j.menu.cpu.samd51j19a_48.build.ldscript=flash_m4f_512KB.ld
+d51j.menu.cpu.samd51j19a_48.build.openocdscript=openocd_scripts/SAMD51J19A.cfg
+d51j.menu.cpu.samd51j19a_48.bootloader.file=zero/binaries/sam_ba_SAMD51J19A.bin
+d51j.menu.cpu.samd51j20a_120=SAMD51J20A_120MHz
+d51j.menu.cpu.samd51j20a_120.upload.maximum_size=1040384
+d51j.menu.cpu.samd51j20a_120.build.mcu=cortex-m4
+d51j.menu.cpu.samd51j20a_120.build.mathlib=arm_cortexM4lf_math
+d51j.menu.cpu.samd51j20a_120.build.f_cpu=120000000L
+d51j.menu.cpu.samd51j20a_120.build.usb_product="Xeno D51"
+
+# KH mod
+#d51j.menu.cpu.samd51j20a_120.build.extra_flags=-D__SAMD51J20A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4
+d51j.menu.cpu.samd51j20a_120.build.extra_flags=-D__SAMD51J20A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4 -D__SAMD51__
+######
+
+d51j.menu.cpu.samd51j20a_120.build.ldscript=flash_m4f_1MB.ld
+d51j.menu.cpu.samd51j20a_120.build.openocdscript=openocd_scripts/SAMD51J20A.cfg
+d51j.menu.cpu.samd51j20a_120.bootloader.file=zero/binaries/sam_ba_SAMD51J20A.bin
+d51j.menu.cpu.samd51j20a_48=SAMD51J20A_48MHz
+d51j.menu.cpu.samd51j20a_48.upload.maximum_size=1040384
+d51j.menu.cpu.samd51j20a_48.build.mcu=cortex-m4
+d51j.menu.cpu.samd51j20a_48.build.mathlib=arm_cortexM4lf_math
+d51j.menu.cpu.samd51j20a_48.build.f_cpu=48000000L
+d51j.menu.cpu.samd51j20a_48.build.usb_product="Xeno D51"
+
+# KH mod
+#d51j.menu.cpu.samd51j20a_48.build.extra_flags=-D__SAMD51J20A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4
+d51j.menu.cpu.samd51j20a_48.build.extra_flags=-D__SAMD51J20A__ {build.usb_flags} -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -DARM_MATH_CM4 -D__SAMD51__
+######
+
+d51j.menu.cpu.samd51j20a_48.build.ldscript=flash_m4f_1MB.ld
+d51j.menu.cpu.samd51j20a_48.build.openocdscript=openocd_scripts/SAMD51J20A.cfg
+d51j.menu.cpu.samd51j20a_48.bootloader.file=zero/binaries/sam_ba_SAMD51J20A.bin
+d51j.menu.bootloader.8kb=8KB_BOOTLOADER
+d51j.menu.bootloader.8kb.build.bootloader_size=__8KB_BOOTLOADER__
+d51j.menu.bootloader.8kb.build.ldscript_path=linker_scripts/gcc/8KB_Bootloader
+d51j.menu.bootloader.8kb.upload.tool=Fab_SAM_Arduino:bossac
+d51j.menu.bootloader.8kb.upload.use_1200bps_touch=true
+d51j.menu.bootloader.8kb.upload.wait_for_upload_port=true
+d51j.menu.bootloader.8kb.upload.native_usb=true
+d51j.menu.bootloader.16kb=16KB_BOOTLOADER
+d51j.menu.bootloader.16kb.build.bootloader_size=__16KB_BOOTLOADER__
+d51j.menu.bootloader.16kb.build.ldscript_path=linker_scripts/gcc/16KB_Bootloader
+d51j.menu.bootloader.16kb.upload.tool=Fab_SAM_Arduino:bossac
+d51j.menu.bootloader.16kb.upload.use_1200bps_touch=true
+d51j.menu.bootloader.16kb.upload.wait_for_upload_port=true
+d51j.menu.bootloader.16kb.upload.native_usb=true
+d51j.menu.bootloader.0kb=NO_BOOTLOADER
+d51j.menu.bootloader.0kb.build.bootloader_size=__NO_BOOTLOADER__
+d51j.menu.bootloader.0kb.build.ldscript_path=linker_scripts/gcc/No_Bootloader
+d51j.menu.bootloader.0kb.upload.tool=openocd
+d51j.menu.bootloader.0kb.upload.use_1200bps_touch=false
+d51j.menu.bootloader.0kb.upload.wait_for_upload_port=false
+d51j.menu.bootloader.0kb.upload.native_usb=false
+d51j.menu.serial.one_uart=ONE_UART_ONE_WIRE_ONE_SPI
+d51j.menu.serial.one_uart.build.serialcom_uart=ONE_UART
+d51j.menu.serial.one_uart.build.serialcom_wire=ONE_WIRE
+d51j.menu.serial.one_uart.build.serialcom_spi=ONE_SPI
+d51j.menu.serial.one_uart_two_spi=ONE_UART_ONE_WIRE_TWO_SPI
+d51j.menu.serial.one_uart_two_spi.build.serialcom_uart=ONE_UART
+d51j.menu.serial.one_uart_two_spi.build.serialcom_wire=ONE_WIRE
+d51j.menu.serial.one_uart_two_spi.build.serialcom_spi=TWO_SPI
+d51j.menu.serial.one_uart_two_wire=ONE_UART_TWO_WIRE_ONE_SPI
+d51j.menu.serial.one_uart_two_wire.build.serialcom_uart=ONE_UART
+d51j.menu.serial.one_uart_two_wire.build.serialcom_wire=TWO_WIRE
+d51j.menu.serial.one_uart_two_wire.build.serialcom_spi=ONE_SPI
+d51j.menu.serial.two_uart=TWO_UART_ONE_WIRE_ONE_SPI
+d51j.menu.serial.two_uart.build.serialcom_uart=TWO_UART
+d51j.menu.serial.two_uart.build.serialcom_wire=ONE_WIRE
+d51j.menu.serial.two_uart.build.serialcom_spi=ONE_SPI
+d51j.menu.serial.two_uart_two_spi=TWO_UART_ONE_WIRE_TWO_SPI
+d51j.menu.serial.two_uart_two_spi.build.serialcom_uart=TWO_UART
+d51j.menu.serial.two_uart_two_spi.build.serialcom_wire=ONE_WIRE
+d51j.menu.serial.two_uart_two_spi.build.serialcom_spi=TWO_SPI
+d51j.menu.serial.two_uart_two_wire=TWO_UART_TWO_WIRE_ONE_SPI
+d51j.menu.serial.two_uart_two_wire.build.serialcom_uart=TWO_UART
+d51j.menu.serial.two_uart_two_wire.build.serialcom_wire=TWO_WIRE
+d51j.menu.serial.two_uart_two_wire.build.serialcom_spi=ONE_SPI
+d51j.menu.serial.three_uart=THREE_UART_ONE_WIRE_ONE_SPI
+d51j.menu.serial.three_uart.build.serialcom_uart=THREE_UART
+d51j.menu.serial.three_uart.build.serialcom_wire=ONE_WIRE
+d51j.menu.serial.three_uart.build.serialcom_spi=ONE_SPI
+d51j.menu.serial.three_uart_two_spi=THREE_UART_ONE_WIRE_TWO_SPI
+d51j.menu.serial.three_uart_two_spi.build.serialcom_uart=THREE_UART
+d51j.menu.serial.three_uart_two_spi.build.serialcom_wire=ONE_WIRE
+d51j.menu.serial.three_uart_two_spi.build.serialcom_spi=TWO_SPI
+d51j.menu.serial.three_uart_two_wire=THREE_UART_TWO_WIRE_ONE_SPI
+d51j.menu.serial.three_uart_two_wire.build.serialcom_uart=THREE_UART
+d51j.menu.serial.three_uart_two_wire.build.serialcom_wire=TWO_WIRE
+d51j.menu.serial.three_uart_two_wire.build.serialcom_spi=ONE_SPI
+d51j.menu.serial.no_uart=NO_UART_ONE_WIRE_ONE_SPI
+d51j.menu.serial.no_uart.build.serialcom_uart=NO_UART
+d51j.menu.serial.no_uart.build.serialcom_wire=ONE_WIRE
+d51j.menu.serial.no_uart.build.serialcom_spi=ONE_SPI
+d51j.menu.usb.cdc=CDC_ONLY
+d51j.menu.usb.cdc.build.usbcom=CDC_ONLY
+d51j.menu.usb.cdc.build.pid=0x8557
+d51j.menu.usb.cdc_hid=CDC_HID
+d51j.menu.usb.cdc_hid.build.usbcom=CDC_HID
+d51j.menu.usb.cdc_hid.build.pid=0x8856
+d51j.menu.usb.withcdc=WITH_CDC
+d51j.menu.usb.withcdc.build.usbcom=WITH_CDC
+d51j.menu.usb.withcdc.build.pid=0x8B41
+d51j.menu.usb.hid=HID_ONLY
+d51j.menu.usb.hid.build.usbcom=HID_ONLY
+d51j.menu.usb.hid.build.pid=0x8B40
+d51j.menu.usb.nocdc=WITHOUT_CDC
+d51j.menu.usb.nocdc.build.usbcom=WITHOUT_CDC
+d51j.menu.usb.nocdc.build.pid=0x8A0C
+d51j.menu.usb.none=USB_DISABLED
+d51j.menu.usb.none.build.usbcom=USB_DISABLED
+d51j.menu.usb.none.build.pid=0x8856
diff --git a/Packages_Patches/Seeeduino/hardware/rp2040/2.7.2/boards.txt b/Packages_Patches/Seeeduino/hardware/rp2040/2.7.2/boards.txt
new file mode 100644
index 0000000..6ac0f09
--- /dev/null
+++ b/Packages_Patches/Seeeduino/hardware/rp2040/2.7.2/boards.txt
@@ -0,0 +1,84 @@
+menu.split=Flash split
+Seeed_XIAO_RP2040.name=SEEED XIAO RP2040
+Seeed_XIAO_RP2040.build.core=arduino
+Seeed_XIAO_RP2040.build.crossprefix=arm-none-eabi-
+Seeed_XIAO_RP2040.build.compiler_path={runtime.tools.arm-none-eabi-gcc-7-2017q4.path}/bin/
+
+# KH fix for Linux case-sensitive path
+#Seeed_XIAO_RP2040.build.variant=SEEED_XIAO_RP2040
+Seeed_XIAO_RP2040.build.variant=Seeed_XIAO_RP2040
+######
+
+Seeed_XIAO_RP2040.build.mcu=cortex-m0plus
+Seeed_XIAO_RP2040.build.extra_flags=
+Seeed_XIAO_RP2040.build.fpu=
+Seeed_XIAO_RP2040.build.float-abi=
+Seeed_XIAO_RP2040.build.architecture=cortex-m0plus
+Seeed_XIAO_RP2040.build.board=SEEED_XIAO_RP2040
+Seeed_XIAO_RP2040.build.ldscript=linker_script.ld
+Seeed_XIAO_RP2040.compiler.mbed.arch.define=-DARDUINO_ARCH_RP2040
+Seeed_XIAO_RP2040.compiler.mbed.defines={build.variant.path}/defines.txt
+Seeed_XIAO_RP2040.compiler.mbed.ldflags={build.variant.path}/ldflags.txt
+Seeed_XIAO_RP2040.compiler.mbed.cflags={build.variant.path}/cflags.txt
+Seeed_XIAO_RP2040.compiler.mbed.cxxflags={build.variant.path}/cxxflags.txt
+Seeed_XIAO_RP2040.compiler.mbed.includes={build.variant.path}/includes.txt
+Seeed_XIAO_RP2040.compiler.mbed.extra_ldflags=-lstdc++ -lsupc++ -lm -lc -lgcc -lnosys
+Seeed_XIAO_RP2040.compiler.mbed="{build.variant.path}/libs/libmbed.a"
+Seeed_XIAO_RP2040.vid.0=0x2886
+Seeed_XIAO_RP2040.pid.0=0x8042
+Seeed_XIAO_RP2040.upload_port.0.vid=0x2886
+Seeed_XIAO_RP2040.upload_port.0.pid=0x8042
+Seeed_XIAO_RP2040.upload.tool=picotool
+Seeed_XIAO_RP2040.upload.tool.default=picotool
+Seeed_XIAO_RP2040.upload.protocol=
+Seeed_XIAO_RP2040.upload.transport=
+Seeed_XIAO_RP2040.upload.use_1200bps_touch=true
+Seeed_XIAO_RP2040.upload.wait_for_upload_port=false
+Seeed_XIAO_RP2040.upload.native_usb=true
+Seeed_XIAO_RP2040.upload.maximum_size=16777216
+Seeed_XIAO_RP2040.upload.maximum_data_size=270336
+Seeed_XIAO_RP2040.bootloader.tool=openocd
+Seeed_XIAO_RP2040.bootloader.tool.default=openocd
+Seeed_XIAO_RP2040.bootloader.config=-f target/rp2040.cfg
+Seeed_XIAO_RP2040.bootloader.programmer=-f interface/cmsis-dap.cfg
+
+##############################################################
+
+menu.split=Flash split
+WIO_RP2040_MINI_DEV_BOARD.name=Wio RP2040 Mini Dev Board
+WIO_RP2040_MINI_DEV_BOARD.build.core=arduino
+WIO_RP2040_MINI_DEV_BOARD.build.crossprefix=arm-none-eabi-
+WIO_RP2040_MINI_DEV_BOARD.build.compiler_path={runtime.tools.arm-none-eabi-gcc-7-2017q4.path}/bin/
+WIO_RP2040_MINI_DEV_BOARD.build.variant=WIO_RP2040_MINI_DEV_BOARD
+WIO_RP2040_MINI_DEV_BOARD.build.mcu=cortex-m0plus
+WIO_RP2040_MINI_DEV_BOARD.build.extra_flags=
+WIO_RP2040_MINI_DEV_BOARD.build.fpu=
+WIO_RP2040_MINI_DEV_BOARD.build.float-abi=
+WIO_RP2040_MINI_DEV_BOARD.build.architecture=cortex-m0plus
+WIO_RP2040_MINI_DEV_BOARD.build.board=WIO_RP2040_MINI_DEV_BOARD
+WIO_RP2040_MINI_DEV_BOARD.build.ldscript=linker_script.ld
+WIO_RP2040_MINI_DEV_BOARD.compiler.mbed.arch.define=-DARDUINO_ARCH_RP2040
+WIO_RP2040_MINI_DEV_BOARD.compiler.mbed.defines={build.variant.path}/defines.txt
+WIO_RP2040_MINI_DEV_BOARD.compiler.mbed.ldflags={build.variant.path}/ldflags.txt
+WIO_RP2040_MINI_DEV_BOARD.compiler.mbed.cflags={build.variant.path}/cflags.txt
+WIO_RP2040_MINI_DEV_BOARD.compiler.mbed.cxxflags={build.variant.path}/cxxflags.txt
+WIO_RP2040_MINI_DEV_BOARD.compiler.mbed.includes={build.variant.path}/includes.txt
+WIO_RP2040_MINI_DEV_BOARD.compiler.mbed.extra_ldflags=-lstdc++ -lsupc++ -lm -lc -lgcc -lnosys
+WIO_RP2040_MINI_DEV_BOARD.compiler.mbed="{build.variant.path}/libs/libmbed.a"
+WIO_RP2040_MINI_DEV_BOARD.vid.0=0x2886
+WIO_RP2040_MINI_DEV_BOARD.pid.0=0x8043
+WIO_RP2040_MINI_DEV_BOARD.upload_port.0.vid=0x2886
+WIO_RP2040_MINI_DEV_BOARD.upload_port.0.pid=0x8043
+WIO_RP2040_MINI_DEV_BOARD.upload.tool=picotool
+WIO_RP2040_MINI_DEV_BOARD.upload.tool.default=picotool
+WIO_RP2040_MINI_DEV_BOARD.upload.protocol=
+WIO_RP2040_MINI_DEV_BOARD.upload.transport=
+WIO_RP2040_MINI_DEV_BOARD.upload.use_1200bps_touch=true
+WIO_RP2040_MINI_DEV_BOARD.upload.wait_for_upload_port=false
+WIO_RP2040_MINI_DEV_BOARD.upload.native_usb=true
+WIO_RP2040_MINI_DEV_BOARD.upload.maximum_size=16777216
+WIO_RP2040_MINI_DEV_BOARD.upload.maximum_data_size=270336
+WIO_RP2040_MINI_DEV_BOARD.bootloader.tool=openocd
+WIO_RP2040_MINI_DEV_BOARD.bootloader.tool.default=openocd
+WIO_RP2040_MINI_DEV_BOARD.bootloader.config=-f target/rp2040.cfg
+WIO_RP2040_MINI_DEV_BOARD.bootloader.programmer=-f interface/cmsis-dap.cfg
diff --git a/Packages_Patches/Seeeduino/hardware/rp2040/2.7.2/variants/Seeed_XIAO_RP2040/pins_arduino.h b/Packages_Patches/Seeeduino/hardware/rp2040/2.7.2/variants/Seeed_XIAO_RP2040/pins_arduino.h
new file mode 100644
index 0000000..d51c54c
--- /dev/null
+++ b/Packages_Patches/Seeeduino/hardware/rp2040/2.7.2/variants/Seeed_XIAO_RP2040/pins_arduino.h
@@ -0,0 +1,123 @@
+#pragma once
+#include <macros.h>
+#include <stdint.h>
+
+#ifndef __PINS_ARDUINO__
+#define __PINS_ARDUINO__
+
+#ifdef __cplusplus
+extern "C" unsigned int PINCOUNT_fn();
+#endif
+
+// Pin count
+// ----
+#define PINS_COUNT           (PINCOUNT_fn())
+#define NUM_DIGITAL_PINS     (30u)
+#define NUM_ANALOG_INPUTS    (4u)
+#define NUM_ANALOG_OUTPUTS   (0u)
+
+extern PinName digitalPinToPinName(pin_size_t P);
+
+// LEDs
+// ----
+#define PIN_LED     (25u)
+#define LED_BUILTIN PIN_LED
+
+// Digital pins
+// ----
+#define PIN_D0 (26u)  
+#define PIN_D1 (27u)
+#define PIN_D2 (28u)
+#define PIN_D3 (29u)
+#define PIN_D4 (6u)
+#define PIN_D5 (7u)
+#define PIN_D6 (0u)
+#define PIN_D7 (1u)
+#define PIN_D8 (2u)
+#define PIN_D9 (4u)
+#define PIN_D10 (3u)
+
+static const uint8_t D0 = PIN_D0;
+static const uint8_t D1 = PIN_D1;
+static const uint8_t D2 = PIN_D2;
+static const uint8_t D3 = PIN_D3;
+static const uint8_t D4 = PIN_D4;
+static const uint8_t D5 = PIN_D5;
+static const uint8_t D6 = PIN_D6;
+static const uint8_t D7 = PIN_D7;
+static const uint8_t D8 = PIN_D8;
+static const uint8_t D9 = PIN_D9;
+static const uint8_t D10 = PIN_D10;
+
+
+// Analog pins
+// -----------
+#define PIN_A0 (26u)
+#define PIN_A1 (27u)
+#define PIN_A2 (28u)
+#define PIN_A3 (29u)
+
+static const uint8_t A0  = PIN_A0;
+static const uint8_t A1  = PIN_A1;
+static const uint8_t A2  = PIN_A2;
+static const uint8_t A3  = PIN_A3;
+
+#define ADC_RESOLUTION 12
+
+// Serial
+#define PIN_SERIAL_TX (0ul)
+#define PIN_SERIAL_RX (1ul)
+
+// SPI
+//#define PIN_SPI_MISO  (16u)
+//#define PIN_SPI_MOSI  (19u)
+//#define PIN_SPI_SCK   (18u)
+//#define PIN_SPI_SS    (17u)
+// KH fix wrong pin
+#define PIN_SPI_MISO  (D9)
+#define PIN_SPI_MOSI  (D10)
+#define PIN_SPI_SCK   (D8)
+#define PIN_SPI_SS    (D7)
+//////
+
+static const uint8_t SS   = PIN_SPI_SS;   // SPI Slave SS not used. Set here only for reference.
+static const uint8_t MOSI = PIN_SPI_MOSI;
+static const uint8_t MISO = PIN_SPI_MISO;
+static const uint8_t SCK  = PIN_SPI_SCK;
+
+// Wire
+#define SDA        (6u)
+#define SCL        (7u)
+
+#define SERIAL_HOWMANY		1
+#define SERIAL1_TX			(digitalPinToPinName(PIN_SERIAL_TX))
+#define SERIAL1_RX			(digitalPinToPinName(PIN_SERIAL_RX))
+
+#define SERIAL_CDC			1
+#define HAS_UNIQUE_ISERIAL_DESCRIPTOR
+#define BOARD_VENDORID		0x2886
+#define BOARD_PRODUCTID		0x8042
+#define BOARD_NAME			"RaspberryPi Pico"
+
+uint8_t getUniqueSerialNumber(uint8_t* name);
+void _ontouch1200bps_();
+
+#define SPI_HOWMANY		(1)
+#define SPI_MISO		(digitalPinToPinName(PIN_SPI_MISO))
+#define SPI_MOSI		(digitalPinToPinName(PIN_SPI_MOSI))
+#define SPI_SCK			(digitalPinToPinName(PIN_SPI_SCK))
+
+#define WIRE_HOWMANY	(1)
+#define I2C_SDA			(digitalPinToPinName(SDA))
+#define I2C_SCL			(digitalPinToPinName(SCL))
+
+#define digitalPinToPort(P)		(digitalPinToPinName(P)/32)
+
+#define SERIAL_PORT_USBVIRTUAL      SerialUSB
+#define SERIAL_PORT_MONITOR         SerialUSB
+#define SERIAL_PORT_HARDWARE        Serial1
+#define SERIAL_PORT_HARDWARE_OPEN   Serial1
+
+#define USB_MAX_POWER	(500)
+
+#endif //__PINS_ARDUINO__
diff --git a/Packages_Patches/arduino/hardware/mbed_portenta/2.8.0/cores/arduino/mbed/connectivity/lwipstack/include/lwipstack/lwipopts.h b/Packages_Patches/arduino/hardware/mbed_portenta/2.8.0/cores/arduino/mbed/connectivity/lwipstack/include/lwipstack/lwipopts.h
new file mode 100644
index 0000000..84c18cf
--- /dev/null
+++ b/Packages_Patches/arduino/hardware/mbed_portenta/2.8.0/cores/arduino/mbed/connectivity/lwipstack/include/lwipstack/lwipopts.h
@@ -0,0 +1,347 @@
+/* Copyright (C) 2012 mbed.org, MIT License
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
+ * and associated documentation files (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge, publish, distribute,
+ * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all copies or
+ * substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+ * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef LWIPOPTS_H
+#define LWIPOPTS_H
+
+// Workaround for Linux timeval
+#if defined (TOOLCHAIN_GCC)
+#define LWIP_TIMEVAL_PRIVATE 0
+#include <sys/time.h>
+#endif
+#include "nsapi_types.h"
+#include "mbed_retarget.h"
+
+// KH fix
+#include <mbed_config.h>
+/////////////////////////
+
+// Operating System
+#define NO_SYS                      0
+
+#if !MBED_CONF_LWIP_IPV4_ENABLED && !MBED_CONF_LWIP_IPV6_ENABLED
+#error "Either IPv4 or IPv6 must be enabled."
+#endif
+
+#define LWIP_IPV4                   MBED_CONF_LWIP_IPV4_ENABLED
+
+#define LWIP_IPV6                   MBED_CONF_LWIP_IPV6_ENABLED
+
+#define LWIP_PROVIDE_ERRNO 0
+
+// On dual stack configuration how long to wait for both or preferred stack
+// addresses before completing bring up.
+#if LWIP_IPV4 && LWIP_IPV6
+#if MBED_CONF_LWIP_ADDR_TIMEOUT_MODE
+#define BOTH_ADDR_TIMEOUT           MBED_CONF_LWIP_ADDR_TIMEOUT
+#define PREF_ADDR_TIMEOUT           0
+#else
+#define PREF_ADDR_TIMEOUT           MBED_CONF_LWIP_ADDR_TIMEOUT
+#define BOTH_ADDR_TIMEOUT           0
+#endif
+#else
+#define PREF_ADDR_TIMEOUT           0
+#define BOTH_ADDR_TIMEOUT           0
+#endif
+
+
+#define DHCP_TIMEOUT                MBED_CONF_LWIP_DHCP_TIMEOUT
+
+#define LINK_TIMEOUT                60
+
+#define PREF_IPV4                   1
+#define PREF_IPV6                   2
+
+#if MBED_CONF_LWIP_IP_VER_PREF == 6
+#define IP_VERSION_PREF             PREF_IPV6
+#elif MBED_CONF_LWIP_IP_VER_PREF == 4
+#define IP_VERSION_PREF             PREF_IPV4
+#else
+#error "Either IPv4 or IPv6 must be preferred."
+#endif
+
+#undef  LWIP_DEBUG
+#if MBED_CONF_LWIP_DEBUG_ENABLED
+#define LWIP_DEBUG                  1
+#endif
+
+#if NO_SYS == 0
+#include "cmsis_os2.h"
+
+#define SYS_LIGHTWEIGHT_PROT        1
+
+#define LWIP_RAW                    MBED_CONF_LWIP_RAW_SOCKET_ENABLED
+
+#define MEMP_NUM_TCPIP_MSG_INPKT    MBED_CONF_LWIP_MEMP_NUM_TCPIP_MSG_INPKT
+
+// Thread stacks use 8-byte alignment
+#define LWIP_ALIGN_UP(pos, align) ((pos) % (align) ? (pos) +  ((align) - (pos) % (align)) : (pos))
+
+#ifdef LWIP_DEBUG
+// For LWIP debug, double the stack
+#define TCPIP_THREAD_STACKSIZE      LWIP_ALIGN_UP(MBED_CONF_LWIP_TCPIP_THREAD_STACKSIZE*2, 8)
+#elif MBED_DEBUG
+// When debug is enabled on the build increase stack 25 percent
+#define TCPIP_THREAD_STACKSIZE      LWIP_ALIGN_UP(MBED_CONF_LWIP_TCPIP_THREAD_STACKSIZE + MBED_CONF_LWIP_TCPIP_THREAD_STACKSIZE / 4, 8)
+#else
+#define TCPIP_THREAD_STACKSIZE      LWIP_ALIGN_UP(MBED_CONF_LWIP_TCPIP_THREAD_STACKSIZE, 8)
+#endif
+
+// Thread priority (osPriorityNormal by default)
+#define TCPIP_THREAD_PRIO           (MBED_CONF_LWIP_TCPIP_THREAD_PRIORITY)
+
+#ifdef LWIP_DEBUG
+#define DEFAULT_THREAD_STACKSIZE    LWIP_ALIGN_UP(MBED_CONF_LWIP_DEFAULT_THREAD_STACKSIZE*2, 8)
+#else
+#define DEFAULT_THREAD_STACKSIZE    LWIP_ALIGN_UP(MBED_CONF_LWIP_DEFAULT_THREAD_STACKSIZE, 8)
+#endif
+
+#define MEMP_NUM_SYS_TIMEOUT        16
+
+#define sys_msleep(ms) sys_msleep(ms)
+
+#endif
+
+// 32-bit alignment
+#define MEM_ALIGNMENT               4
+
+#define LWIP_RAM_HEAP_POINTER       lwip_ram_heap
+
+// Number of simultaneously queued TCP segments.
+#define MEMP_NUM_TCP_SEG            MBED_CONF_LWIP_MEMP_NUM_TCP_SEG
+
+// TCP Maximum segment size.
+#define TCP_MSS                     MBED_CONF_LWIP_TCP_MSS
+
+// TCP sender buffer space (bytes).
+#define TCP_SND_BUF                 MBED_CONF_LWIP_TCP_SND_BUF
+
+// TCP sender buffer space (bytes).
+#define TCP_WND                     MBED_CONF_LWIP_TCP_WND
+
+#define TCP_MAXRTX                  MBED_CONF_LWIP_TCP_MAXRTX
+
+#define TCP_SYNMAXRTX               MBED_CONF_LWIP_TCP_SYNMAXRTX
+
+// Number of pool pbufs.
+// Each requires 684 bytes of RAM (if MSS=536 and PBUF_POOL_BUFSIZE defaulting to be based on MSS)
+#define PBUF_POOL_SIZE              MBED_CONF_LWIP_PBUF_POOL_SIZE
+
+#ifdef MBED_CONF_LWIP_PBUF_POOL_BUFSIZE
+#undef PBUF_POOL_BUFSIZE
+#define PBUF_POOL_BUFSIZE           LWIP_MEM_ALIGN_SIZE(MBED_CONF_LWIP_PBUF_POOL_BUFSIZE)
+#else
+#ifndef PBUF_POOL_BUFSIZE
+#if LWIP_IPV6
+#define PBUF_POOL_BUFSIZE               LWIP_MEM_ALIGN_SIZE(TCP_MSS+20+40+PBUF_LINK_ENCAPSULATION_HLEN+PBUF_LINK_HLEN)
+#elif LWIP_IPV4
+#define PBUF_POOL_BUFSIZE               LWIP_MEM_ALIGN_SIZE(TCP_MSS+20+20+PBUF_LINK_ENCAPSULATION_HLEN+PBUF_LINK_HLEN)
+#endif
+#endif
+#endif
+
+#define MEM_SIZE                    MBED_CONF_LWIP_MEM_SIZE
+
+// One tcp_pcb_listen is needed for each TCP server.
+// Each requires 72 bytes of RAM.
+#define MEMP_NUM_TCP_PCB_LISTEN     MBED_CONF_LWIP_TCP_SERVER_MAX
+
+// One is tcp_pcb needed for each TCPSocket.
+// Each requires 196 bytes of RAM.
+#define MEMP_NUM_TCP_PCB            MBED_CONF_LWIP_TCP_SOCKET_MAX
+
+// One udp_pcb is needed for each UDPSocket.
+// Each requires 84 bytes of RAM (total rounded to multiple of 512).
+#define MEMP_NUM_UDP_PCB            MBED_CONF_LWIP_UDP_SOCKET_MAX
+
+// Number of non-pool pbufs.
+// Each requires 92 bytes of RAM.
+#define MEMP_NUM_PBUF               MBED_CONF_LWIP_NUM_PBUF
+
+// Each netbuf requires 64 bytes of RAM.
+#define MEMP_NUM_NETBUF             MBED_CONF_LWIP_NUM_NETBUF
+
+// One netconn is needed for each UDPSocket or TCPSocket.
+// Each requires 236 bytes of RAM (total rounded to multiple of 512).
+#define MEMP_NUM_NETCONN            MBED_CONF_LWIP_SOCKET_MAX
+
+#if MBED_CONF_LWIP_TCP_ENABLED
+#define LWIP_TCP                    1
+#define TCP_OVERSIZE                0
+#define LWIP_TCP_KEEPALIVE          1
+
+#define TCP_CLOSE_TIMEOUT            MBED_CONF_LWIP_TCP_CLOSE_TIMEOUT
+
+#else
+#define LWIP_TCP                    0
+#endif
+
+#define LWIP_DNS                    1
+// Only DNS address storage is enabled
+#define LWIP_FULL_DNS               0
+#define LWIP_SOCKET                 0
+
+#define SO_REUSE                    1
+
+// Support Multicast
+#include "stdlib.h"
+#define LWIP_IGMP                   LWIP_IPV4
+#define LWIP_RAND()                 lwip_get_random()
+
+#define LWIP_COMPAT_SOCKETS         0
+#define LWIP_POSIX_SOCKETS_IO_NAMES 0
+
+#define LWIP_BROADCAST_PING         1
+
+// Fragmentation on, as per IPv4 default
+#define LWIP_IPV6_FRAG              LWIP_IPV6
+
+// Queuing, default is  "disabled", as per IPv4 default (so actually queues 1)
+#define LWIP_ND6_QUEUEING           MBED_CONF_ND6_QUEUEING
+
+// Debug Options
+#define NETIF_DEBUG                 LWIP_DBG_OFF
+#define PBUF_DEBUG                  LWIP_DBG_OFF
+#define API_LIB_DEBUG               LWIP_DBG_OFF
+#define API_MSG_DEBUG               LWIP_DBG_OFF
+#define SOCKETS_DEBUG               LWIP_DBG_OFF
+#define ICMP_DEBUG                  LWIP_DBG_OFF
+#define IGMP_DEBUG                  LWIP_DBG_OFF
+#define INET_DEBUG                  LWIP_DBG_OFF
+#define IP_DEBUG                    LWIP_DBG_OFF
+#define IP_REASS_DEBUG              LWIP_DBG_OFF
+#define RAW_DEBUG                   LWIP_DBG_OFF
+#define MEM_DEBUG                   LWIP_DBG_OFF
+#define MEMP_DEBUG                  LWIP_DBG_OFF
+#define SYS_DEBUG                   LWIP_DBG_OFF
+#define TIMERS_DEBUG                LWIP_DBG_OFF
+#define TCP_DEBUG                   LWIP_DBG_OFF
+#define TCP_INPUT_DEBUG             LWIP_DBG_OFF
+#define TCP_FR_DEBUG                LWIP_DBG_OFF
+#define TCP_RTO_DEBUG               LWIP_DBG_OFF
+#define TCP_CWND_DEBUG              LWIP_DBG_OFF
+#define TCP_WND_DEBUG               LWIP_DBG_OFF
+#define TCP_OUTPUT_DEBUG            LWIP_DBG_OFF
+#define TCP_RST_DEBUG               LWIP_DBG_OFF
+#define TCP_QLEN_DEBUG              LWIP_DBG_OFF
+#define UDP_DEBUG                   LWIP_DBG_OFF
+#define TCPIP_DEBUG                 LWIP_DBG_OFF
+#define SLIP_DEBUG                  LWIP_DBG_OFF
+#define DHCP_DEBUG                  LWIP_DBG_OFF
+#define AUTOIP_DEBUG                LWIP_DBG_OFF
+#define DNS_DEBUG                   LWIP_DBG_OFF
+#define IP6_DEBUG                   LWIP_DBG_OFF
+
+#define ETHARP_DEBUG                LWIP_DBG_OFF
+#define UDP_LPC_EMAC                LWIP_DBG_OFF
+
+#ifdef LWIP_DEBUG
+#define MEMP_OVERFLOW_CHECK         1
+#define MEMP_SANITY_CHECK           1
+#define LWIP_DBG_TYPES_ON           LWIP_DBG_ON
+#define LWIP_DBG_MIN_LEVEL          LWIP_DBG_LEVEL_ALL
+#else
+#define LWIP_NOASSERT               1
+#define LWIP_STATS                  0
+#endif
+
+#define TRACE_TO_ASCII_HEX_DUMP     0
+
+#define LWIP_PLATFORM_BYTESWAP      1
+
+#define LWIP_RANDOMIZE_INITIAL_LOCAL_PORTS 1
+
+// Interface type configuration
+
+#if MBED_CONF_LWIP_ETHERNET_ENABLED
+#define LWIP_ARP                    1
+#define LWIP_ETHERNET               1
+#define LWIP_DHCP                   LWIP_IPV4
+#else
+#define LWIP_ARP                    0
+#define LWIP_ETHERNET               0
+#endif // MBED_CONF_LWIP_ETHERNET_ENABLED
+
+#if MBED_CONF_LWIP_L3IP_ENABLED
+#define LWIP_L3IP                   1
+#else
+#define LWIP_L3IP                   0
+#endif
+
+//Maximum size of network interface name
+#define INTERFACE_NAME_MAX_SIZE NSAPI_INTERFACE_NAME_MAX_SIZE
+// Note generic macro name used rather than MBED_CONF_LWIP_PPP_ENABLED
+// to allow users like PPPCellularInterface to detect that nsapi_ppp.h is available.
+
+// Enable PPP for now either from lwIP PPP configuration (obsolete) or from PPP service configuration
+#if MBED_CONF_PPP_ENABLED || MBED_CONF_LWIP_PPP_ENABLED
+
+#define PPP_SUPPORT                      1
+
+#if MBED_CONF_PPP_IPV4_ENABLED || MBED_CONF_LWIP_IPV4_ENABLED
+#define LWIP 0x11991199
+#if (MBED_CONF_NSAPI_DEFAULT_STACK == LWIP) && !MBED_CONF_LWIP_IPV4_ENABLED
+#error LWIP: IPv4 PPP enabled but not IPv4
+#endif
+#undef LWIP
+#define PPP_IPV4_SUPPORT                 1
+#endif
+
+#if MBED_CONF_PPP_IPV6_ENABLED || MBED_CONF_LWIP_IPV6_ENABLED
+#define LWIP 0x11991199
+#if (MBED_CONF_NSAPI_DEFAULT_STACK == LWIP) && !MBED_CONF_LWIP_IPV6_ENABLED
+#error LWIP: IPv6 PPP enabled but not IPv6
+#endif
+#undef LWIP
+#define PPP_IPV6_SUPPORT                 1
+// Later to be dynamic for use for multiple interfaces
+#define LWIP_IPV6_DUP_DETECT_ATTEMPTS    0
+#endif
+
+#endif
+
+#define LWIP_NETBUF_RECVINFO            MBED_CONF_LWIP_NETBUF_RECVINFO_ENABLED
+
+// Make sure we default these to off, so
+// LWIP doesn't default to on
+#ifndef LWIP_ARP
+#define LWIP_ARP                    0
+#endif
+
+// Checksum-on-copy disabled due to https://savannah.nongnu.org/bugs/?50914
+#define LWIP_CHECKSUM_ON_COPY       0
+
+#define LWIP_NETIF_HOSTNAME         1
+#define LWIP_NETIF_STATUS_CALLBACK  1
+#define LWIP_NETIF_LINK_CALLBACK    1
+
+#define DNS_TABLE_SIZE                  2
+#define DNS_MAX_NAME_LENGTH             128
+
+#include "lwip_random.h"
+#include "lwip_tcp_isn.h"
+#define LWIP_HOOK_TCP_ISN lwip_hook_tcp_isn
+#ifdef MBEDTLS_MD5_C
+#define LWIP_USE_EXTERNAL_MBEDTLS       1
+#else
+#define LWIP_USE_EXTERNAL_MBEDTLS       0
+#endif
+
+#define LWIP_ND6_RDNSS_MAX_DNS_SERVERS  MBED_CONF_LWIP_ND6_RDNSS_MAX_DNS_SERVERS
+
+#endif /* LWIPOPTS_H_ */
diff --git a/Packages_Patches/arduino/hardware/mbed_portenta/2.8.0/portenta_post_install.sh b/Packages_Patches/arduino/hardware/mbed_portenta/2.8.0/portenta_post_install.sh
new file mode 100644
index 0000000..7fe71d6
--- /dev/null
+++ b/Packages_Patches/arduino/hardware/mbed_portenta/2.8.0/portenta_post_install.sh
@@ -0,0 +1,22 @@
+#!/usr/bin/env bash
+
+portenta_h7_rules () {
+    echo ""
+    echo "# Portenta H7 bootloader mode UDEV rules"
+    echo ""
+cat <<EOF
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="2341", ATTRS{idProduct}=="035b", GROUP="plugdev", MODE="0666"
+EOF
+}
+
+if [ "$EUID" -ne 0 ]
+  then echo "Please run as root"
+  exit
+fi
+
+portenta_h7_rules > /etc/udev/rules.d/49-portenta_h7.rules
+
+# reload udev rules
+echo "Reload rules..."
+udevadm trigger
+udevadm control --reload-rules
diff --git a/Packages_Patches/arduino/hardware/mbed_portenta/3.0.0/cores/arduino/mbed/connectivity/lwipstack/include/lwipstack/lwipopts.h b/Packages_Patches/arduino/hardware/mbed_portenta/3.0.0/cores/arduino/mbed/connectivity/lwipstack/include/lwipstack/lwipopts.h
new file mode 100644
index 0000000..84c18cf
--- /dev/null
+++ b/Packages_Patches/arduino/hardware/mbed_portenta/3.0.0/cores/arduino/mbed/connectivity/lwipstack/include/lwipstack/lwipopts.h
@@ -0,0 +1,347 @@
+/* Copyright (C) 2012 mbed.org, MIT License
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
+ * and associated documentation files (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge, publish, distribute,
+ * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all copies or
+ * substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+ * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef LWIPOPTS_H
+#define LWIPOPTS_H
+
+// Workaround for Linux timeval
+#if defined (TOOLCHAIN_GCC)
+#define LWIP_TIMEVAL_PRIVATE 0
+#include <sys/time.h>
+#endif
+#include "nsapi_types.h"
+#include "mbed_retarget.h"
+
+// KH fix
+#include <mbed_config.h>
+/////////////////////////
+
+// Operating System
+#define NO_SYS                      0
+
+#if !MBED_CONF_LWIP_IPV4_ENABLED && !MBED_CONF_LWIP_IPV6_ENABLED
+#error "Either IPv4 or IPv6 must be enabled."
+#endif
+
+#define LWIP_IPV4                   MBED_CONF_LWIP_IPV4_ENABLED
+
+#define LWIP_IPV6                   MBED_CONF_LWIP_IPV6_ENABLED
+
+#define LWIP_PROVIDE_ERRNO 0
+
+// On dual stack configuration how long to wait for both or preferred stack
+// addresses before completing bring up.
+#if LWIP_IPV4 && LWIP_IPV6
+#if MBED_CONF_LWIP_ADDR_TIMEOUT_MODE
+#define BOTH_ADDR_TIMEOUT           MBED_CONF_LWIP_ADDR_TIMEOUT
+#define PREF_ADDR_TIMEOUT           0
+#else
+#define PREF_ADDR_TIMEOUT           MBED_CONF_LWIP_ADDR_TIMEOUT
+#define BOTH_ADDR_TIMEOUT           0
+#endif
+#else
+#define PREF_ADDR_TIMEOUT           0
+#define BOTH_ADDR_TIMEOUT           0
+#endif
+
+
+#define DHCP_TIMEOUT                MBED_CONF_LWIP_DHCP_TIMEOUT
+
+#define LINK_TIMEOUT                60
+
+#define PREF_IPV4                   1
+#define PREF_IPV6                   2
+
+#if MBED_CONF_LWIP_IP_VER_PREF == 6
+#define IP_VERSION_PREF             PREF_IPV6
+#elif MBED_CONF_LWIP_IP_VER_PREF == 4
+#define IP_VERSION_PREF             PREF_IPV4
+#else
+#error "Either IPv4 or IPv6 must be preferred."
+#endif
+
+#undef  LWIP_DEBUG
+#if MBED_CONF_LWIP_DEBUG_ENABLED
+#define LWIP_DEBUG                  1
+#endif
+
+#if NO_SYS == 0
+#include "cmsis_os2.h"
+
+#define SYS_LIGHTWEIGHT_PROT        1
+
+#define LWIP_RAW                    MBED_CONF_LWIP_RAW_SOCKET_ENABLED
+
+#define MEMP_NUM_TCPIP_MSG_INPKT    MBED_CONF_LWIP_MEMP_NUM_TCPIP_MSG_INPKT
+
+// Thread stacks use 8-byte alignment
+#define LWIP_ALIGN_UP(pos, align) ((pos) % (align) ? (pos) +  ((align) - (pos) % (align)) : (pos))
+
+#ifdef LWIP_DEBUG
+// For LWIP debug, double the stack
+#define TCPIP_THREAD_STACKSIZE      LWIP_ALIGN_UP(MBED_CONF_LWIP_TCPIP_THREAD_STACKSIZE*2, 8)
+#elif MBED_DEBUG
+// When debug is enabled on the build increase stack 25 percent
+#define TCPIP_THREAD_STACKSIZE      LWIP_ALIGN_UP(MBED_CONF_LWIP_TCPIP_THREAD_STACKSIZE + MBED_CONF_LWIP_TCPIP_THREAD_STACKSIZE / 4, 8)
+#else
+#define TCPIP_THREAD_STACKSIZE      LWIP_ALIGN_UP(MBED_CONF_LWIP_TCPIP_THREAD_STACKSIZE, 8)
+#endif
+
+// Thread priority (osPriorityNormal by default)
+#define TCPIP_THREAD_PRIO           (MBED_CONF_LWIP_TCPIP_THREAD_PRIORITY)
+
+#ifdef LWIP_DEBUG
+#define DEFAULT_THREAD_STACKSIZE    LWIP_ALIGN_UP(MBED_CONF_LWIP_DEFAULT_THREAD_STACKSIZE*2, 8)
+#else
+#define DEFAULT_THREAD_STACKSIZE    LWIP_ALIGN_UP(MBED_CONF_LWIP_DEFAULT_THREAD_STACKSIZE, 8)
+#endif
+
+#define MEMP_NUM_SYS_TIMEOUT        16
+
+#define sys_msleep(ms) sys_msleep(ms)
+
+#endif
+
+// 32-bit alignment
+#define MEM_ALIGNMENT               4
+
+#define LWIP_RAM_HEAP_POINTER       lwip_ram_heap
+
+// Number of simultaneously queued TCP segments.
+#define MEMP_NUM_TCP_SEG            MBED_CONF_LWIP_MEMP_NUM_TCP_SEG
+
+// TCP Maximum segment size.
+#define TCP_MSS                     MBED_CONF_LWIP_TCP_MSS
+
+// TCP sender buffer space (bytes).
+#define TCP_SND_BUF                 MBED_CONF_LWIP_TCP_SND_BUF
+
+// TCP sender buffer space (bytes).
+#define TCP_WND                     MBED_CONF_LWIP_TCP_WND
+
+#define TCP_MAXRTX                  MBED_CONF_LWIP_TCP_MAXRTX
+
+#define TCP_SYNMAXRTX               MBED_CONF_LWIP_TCP_SYNMAXRTX
+
+// Number of pool pbufs.
+// Each requires 684 bytes of RAM (if MSS=536 and PBUF_POOL_BUFSIZE defaulting to be based on MSS)
+#define PBUF_POOL_SIZE              MBED_CONF_LWIP_PBUF_POOL_SIZE
+
+#ifdef MBED_CONF_LWIP_PBUF_POOL_BUFSIZE
+#undef PBUF_POOL_BUFSIZE
+#define PBUF_POOL_BUFSIZE           LWIP_MEM_ALIGN_SIZE(MBED_CONF_LWIP_PBUF_POOL_BUFSIZE)
+#else
+#ifndef PBUF_POOL_BUFSIZE
+#if LWIP_IPV6
+#define PBUF_POOL_BUFSIZE               LWIP_MEM_ALIGN_SIZE(TCP_MSS+20+40+PBUF_LINK_ENCAPSULATION_HLEN+PBUF_LINK_HLEN)
+#elif LWIP_IPV4
+#define PBUF_POOL_BUFSIZE               LWIP_MEM_ALIGN_SIZE(TCP_MSS+20+20+PBUF_LINK_ENCAPSULATION_HLEN+PBUF_LINK_HLEN)
+#endif
+#endif
+#endif
+
+#define MEM_SIZE                    MBED_CONF_LWIP_MEM_SIZE
+
+// One tcp_pcb_listen is needed for each TCP server.
+// Each requires 72 bytes of RAM.
+#define MEMP_NUM_TCP_PCB_LISTEN     MBED_CONF_LWIP_TCP_SERVER_MAX
+
+// One is tcp_pcb needed for each TCPSocket.
+// Each requires 196 bytes of RAM.
+#define MEMP_NUM_TCP_PCB            MBED_CONF_LWIP_TCP_SOCKET_MAX
+
+// One udp_pcb is needed for each UDPSocket.
+// Each requires 84 bytes of RAM (total rounded to multiple of 512).
+#define MEMP_NUM_UDP_PCB            MBED_CONF_LWIP_UDP_SOCKET_MAX
+
+// Number of non-pool pbufs.
+// Each requires 92 bytes of RAM.
+#define MEMP_NUM_PBUF               MBED_CONF_LWIP_NUM_PBUF
+
+// Each netbuf requires 64 bytes of RAM.
+#define MEMP_NUM_NETBUF             MBED_CONF_LWIP_NUM_NETBUF
+
+// One netconn is needed for each UDPSocket or TCPSocket.
+// Each requires 236 bytes of RAM (total rounded to multiple of 512).
+#define MEMP_NUM_NETCONN            MBED_CONF_LWIP_SOCKET_MAX
+
+#if MBED_CONF_LWIP_TCP_ENABLED
+#define LWIP_TCP                    1
+#define TCP_OVERSIZE                0
+#define LWIP_TCP_KEEPALIVE          1
+
+#define TCP_CLOSE_TIMEOUT            MBED_CONF_LWIP_TCP_CLOSE_TIMEOUT
+
+#else
+#define LWIP_TCP                    0
+#endif
+
+#define LWIP_DNS                    1
+// Only DNS address storage is enabled
+#define LWIP_FULL_DNS               0
+#define LWIP_SOCKET                 0
+
+#define SO_REUSE                    1
+
+// Support Multicast
+#include "stdlib.h"
+#define LWIP_IGMP                   LWIP_IPV4
+#define LWIP_RAND()                 lwip_get_random()
+
+#define LWIP_COMPAT_SOCKETS         0
+#define LWIP_POSIX_SOCKETS_IO_NAMES 0
+
+#define LWIP_BROADCAST_PING         1
+
+// Fragmentation on, as per IPv4 default
+#define LWIP_IPV6_FRAG              LWIP_IPV6
+
+// Queuing, default is  "disabled", as per IPv4 default (so actually queues 1)
+#define LWIP_ND6_QUEUEING           MBED_CONF_ND6_QUEUEING
+
+// Debug Options
+#define NETIF_DEBUG                 LWIP_DBG_OFF
+#define PBUF_DEBUG                  LWIP_DBG_OFF
+#define API_LIB_DEBUG               LWIP_DBG_OFF
+#define API_MSG_DEBUG               LWIP_DBG_OFF
+#define SOCKETS_DEBUG               LWIP_DBG_OFF
+#define ICMP_DEBUG                  LWIP_DBG_OFF
+#define IGMP_DEBUG                  LWIP_DBG_OFF
+#define INET_DEBUG                  LWIP_DBG_OFF
+#define IP_DEBUG                    LWIP_DBG_OFF
+#define IP_REASS_DEBUG              LWIP_DBG_OFF
+#define RAW_DEBUG                   LWIP_DBG_OFF
+#define MEM_DEBUG                   LWIP_DBG_OFF
+#define MEMP_DEBUG                  LWIP_DBG_OFF
+#define SYS_DEBUG                   LWIP_DBG_OFF
+#define TIMERS_DEBUG                LWIP_DBG_OFF
+#define TCP_DEBUG                   LWIP_DBG_OFF
+#define TCP_INPUT_DEBUG             LWIP_DBG_OFF
+#define TCP_FR_DEBUG                LWIP_DBG_OFF
+#define TCP_RTO_DEBUG               LWIP_DBG_OFF
+#define TCP_CWND_DEBUG              LWIP_DBG_OFF
+#define TCP_WND_DEBUG               LWIP_DBG_OFF
+#define TCP_OUTPUT_DEBUG            LWIP_DBG_OFF
+#define TCP_RST_DEBUG               LWIP_DBG_OFF
+#define TCP_QLEN_DEBUG              LWIP_DBG_OFF
+#define UDP_DEBUG                   LWIP_DBG_OFF
+#define TCPIP_DEBUG                 LWIP_DBG_OFF
+#define SLIP_DEBUG                  LWIP_DBG_OFF
+#define DHCP_DEBUG                  LWIP_DBG_OFF
+#define AUTOIP_DEBUG                LWIP_DBG_OFF
+#define DNS_DEBUG                   LWIP_DBG_OFF
+#define IP6_DEBUG                   LWIP_DBG_OFF
+
+#define ETHARP_DEBUG                LWIP_DBG_OFF
+#define UDP_LPC_EMAC                LWIP_DBG_OFF
+
+#ifdef LWIP_DEBUG
+#define MEMP_OVERFLOW_CHECK         1
+#define MEMP_SANITY_CHECK           1
+#define LWIP_DBG_TYPES_ON           LWIP_DBG_ON
+#define LWIP_DBG_MIN_LEVEL          LWIP_DBG_LEVEL_ALL
+#else
+#define LWIP_NOASSERT               1
+#define LWIP_STATS                  0
+#endif
+
+#define TRACE_TO_ASCII_HEX_DUMP     0
+
+#define LWIP_PLATFORM_BYTESWAP      1
+
+#define LWIP_RANDOMIZE_INITIAL_LOCAL_PORTS 1
+
+// Interface type configuration
+
+#if MBED_CONF_LWIP_ETHERNET_ENABLED
+#define LWIP_ARP                    1
+#define LWIP_ETHERNET               1
+#define LWIP_DHCP                   LWIP_IPV4
+#else
+#define LWIP_ARP                    0
+#define LWIP_ETHERNET               0
+#endif // MBED_CONF_LWIP_ETHERNET_ENABLED
+
+#if MBED_CONF_LWIP_L3IP_ENABLED
+#define LWIP_L3IP                   1
+#else
+#define LWIP_L3IP                   0
+#endif
+
+//Maximum size of network interface name
+#define INTERFACE_NAME_MAX_SIZE NSAPI_INTERFACE_NAME_MAX_SIZE
+// Note generic macro name used rather than MBED_CONF_LWIP_PPP_ENABLED
+// to allow users like PPPCellularInterface to detect that nsapi_ppp.h is available.
+
+// Enable PPP for now either from lwIP PPP configuration (obsolete) or from PPP service configuration
+#if MBED_CONF_PPP_ENABLED || MBED_CONF_LWIP_PPP_ENABLED
+
+#define PPP_SUPPORT                      1
+
+#if MBED_CONF_PPP_IPV4_ENABLED || MBED_CONF_LWIP_IPV4_ENABLED
+#define LWIP 0x11991199
+#if (MBED_CONF_NSAPI_DEFAULT_STACK == LWIP) && !MBED_CONF_LWIP_IPV4_ENABLED
+#error LWIP: IPv4 PPP enabled but not IPv4
+#endif
+#undef LWIP
+#define PPP_IPV4_SUPPORT                 1
+#endif
+
+#if MBED_CONF_PPP_IPV6_ENABLED || MBED_CONF_LWIP_IPV6_ENABLED
+#define LWIP 0x11991199
+#if (MBED_CONF_NSAPI_DEFAULT_STACK == LWIP) && !MBED_CONF_LWIP_IPV6_ENABLED
+#error LWIP: IPv6 PPP enabled but not IPv6
+#endif
+#undef LWIP
+#define PPP_IPV6_SUPPORT                 1
+// Later to be dynamic for use for multiple interfaces
+#define LWIP_IPV6_DUP_DETECT_ATTEMPTS    0
+#endif
+
+#endif
+
+#define LWIP_NETBUF_RECVINFO            MBED_CONF_LWIP_NETBUF_RECVINFO_ENABLED
+
+// Make sure we default these to off, so
+// LWIP doesn't default to on
+#ifndef LWIP_ARP
+#define LWIP_ARP                    0
+#endif
+
+// Checksum-on-copy disabled due to https://savannah.nongnu.org/bugs/?50914
+#define LWIP_CHECKSUM_ON_COPY       0
+
+#define LWIP_NETIF_HOSTNAME         1
+#define LWIP_NETIF_STATUS_CALLBACK  1
+#define LWIP_NETIF_LINK_CALLBACK    1
+
+#define DNS_TABLE_SIZE                  2
+#define DNS_MAX_NAME_LENGTH             128
+
+#include "lwip_random.h"
+#include "lwip_tcp_isn.h"
+#define LWIP_HOOK_TCP_ISN lwip_hook_tcp_isn
+#ifdef MBEDTLS_MD5_C
+#define LWIP_USE_EXTERNAL_MBEDTLS       1
+#else
+#define LWIP_USE_EXTERNAL_MBEDTLS       0
+#endif
+
+#define LWIP_ND6_RDNSS_MAX_DNS_SERVERS  MBED_CONF_LWIP_ND6_RDNSS_MAX_DNS_SERVERS
+
+#endif /* LWIPOPTS_H_ */
diff --git a/Packages_Patches/arduino/hardware/mbed_portenta/3.0.0/portenta_post_install.sh b/Packages_Patches/arduino/hardware/mbed_portenta/3.0.0/portenta_post_install.sh
new file mode 100644
index 0000000..7fe71d6
--- /dev/null
+++ b/Packages_Patches/arduino/hardware/mbed_portenta/3.0.0/portenta_post_install.sh
@@ -0,0 +1,22 @@
+#!/usr/bin/env bash
+
+portenta_h7_rules () {
+    echo ""
+    echo "# Portenta H7 bootloader mode UDEV rules"
+    echo ""
+cat <<EOF
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="2341", ATTRS{idProduct}=="035b", GROUP="plugdev", MODE="0666"
+EOF
+}
+
+if [ "$EUID" -ne 0 ]
+  then echo "Please run as root"
+  exit
+fi
+
+portenta_h7_rules > /etc/udev/rules.d/49-portenta_h7.rules
+
+# reload udev rules
+echo "Reload rules..."
+udevadm trigger
+udevadm control --reload-rules
diff --git a/Packages_Patches/arduino/hardware/mbed_portenta/3.0.1/cores/arduino/mbed/connectivity/lwipstack/include/lwipstack/lwipopts.h b/Packages_Patches/arduino/hardware/mbed_portenta/3.0.1/cores/arduino/mbed/connectivity/lwipstack/include/lwipstack/lwipopts.h
new file mode 100644
index 0000000..84c18cf
--- /dev/null
+++ b/Packages_Patches/arduino/hardware/mbed_portenta/3.0.1/cores/arduino/mbed/connectivity/lwipstack/include/lwipstack/lwipopts.h
@@ -0,0 +1,347 @@
+/* Copyright (C) 2012 mbed.org, MIT License
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
+ * and associated documentation files (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge, publish, distribute,
+ * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all copies or
+ * substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+ * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef LWIPOPTS_H
+#define LWIPOPTS_H
+
+// Workaround for Linux timeval
+#if defined (TOOLCHAIN_GCC)
+#define LWIP_TIMEVAL_PRIVATE 0
+#include <sys/time.h>
+#endif
+#include "nsapi_types.h"
+#include "mbed_retarget.h"
+
+// KH fix
+#include <mbed_config.h>
+/////////////////////////
+
+// Operating System
+#define NO_SYS                      0
+
+#if !MBED_CONF_LWIP_IPV4_ENABLED && !MBED_CONF_LWIP_IPV6_ENABLED
+#error "Either IPv4 or IPv6 must be enabled."
+#endif
+
+#define LWIP_IPV4                   MBED_CONF_LWIP_IPV4_ENABLED
+
+#define LWIP_IPV6                   MBED_CONF_LWIP_IPV6_ENABLED
+
+#define LWIP_PROVIDE_ERRNO 0
+
+// On dual stack configuration how long to wait for both or preferred stack
+// addresses before completing bring up.
+#if LWIP_IPV4 && LWIP_IPV6
+#if MBED_CONF_LWIP_ADDR_TIMEOUT_MODE
+#define BOTH_ADDR_TIMEOUT           MBED_CONF_LWIP_ADDR_TIMEOUT
+#define PREF_ADDR_TIMEOUT           0
+#else
+#define PREF_ADDR_TIMEOUT           MBED_CONF_LWIP_ADDR_TIMEOUT
+#define BOTH_ADDR_TIMEOUT           0
+#endif
+#else
+#define PREF_ADDR_TIMEOUT           0
+#define BOTH_ADDR_TIMEOUT           0
+#endif
+
+
+#define DHCP_TIMEOUT                MBED_CONF_LWIP_DHCP_TIMEOUT
+
+#define LINK_TIMEOUT                60
+
+#define PREF_IPV4                   1
+#define PREF_IPV6                   2
+
+#if MBED_CONF_LWIP_IP_VER_PREF == 6
+#define IP_VERSION_PREF             PREF_IPV6
+#elif MBED_CONF_LWIP_IP_VER_PREF == 4
+#define IP_VERSION_PREF             PREF_IPV4
+#else
+#error "Either IPv4 or IPv6 must be preferred."
+#endif
+
+#undef  LWIP_DEBUG
+#if MBED_CONF_LWIP_DEBUG_ENABLED
+#define LWIP_DEBUG                  1
+#endif
+
+#if NO_SYS == 0
+#include "cmsis_os2.h"
+
+#define SYS_LIGHTWEIGHT_PROT        1
+
+#define LWIP_RAW                    MBED_CONF_LWIP_RAW_SOCKET_ENABLED
+
+#define MEMP_NUM_TCPIP_MSG_INPKT    MBED_CONF_LWIP_MEMP_NUM_TCPIP_MSG_INPKT
+
+// Thread stacks use 8-byte alignment
+#define LWIP_ALIGN_UP(pos, align) ((pos) % (align) ? (pos) +  ((align) - (pos) % (align)) : (pos))
+
+#ifdef LWIP_DEBUG
+// For LWIP debug, double the stack
+#define TCPIP_THREAD_STACKSIZE      LWIP_ALIGN_UP(MBED_CONF_LWIP_TCPIP_THREAD_STACKSIZE*2, 8)
+#elif MBED_DEBUG
+// When debug is enabled on the build increase stack 25 percent
+#define TCPIP_THREAD_STACKSIZE      LWIP_ALIGN_UP(MBED_CONF_LWIP_TCPIP_THREAD_STACKSIZE + MBED_CONF_LWIP_TCPIP_THREAD_STACKSIZE / 4, 8)
+#else
+#define TCPIP_THREAD_STACKSIZE      LWIP_ALIGN_UP(MBED_CONF_LWIP_TCPIP_THREAD_STACKSIZE, 8)
+#endif
+
+// Thread priority (osPriorityNormal by default)
+#define TCPIP_THREAD_PRIO           (MBED_CONF_LWIP_TCPIP_THREAD_PRIORITY)
+
+#ifdef LWIP_DEBUG
+#define DEFAULT_THREAD_STACKSIZE    LWIP_ALIGN_UP(MBED_CONF_LWIP_DEFAULT_THREAD_STACKSIZE*2, 8)
+#else
+#define DEFAULT_THREAD_STACKSIZE    LWIP_ALIGN_UP(MBED_CONF_LWIP_DEFAULT_THREAD_STACKSIZE, 8)
+#endif
+
+#define MEMP_NUM_SYS_TIMEOUT        16
+
+#define sys_msleep(ms) sys_msleep(ms)
+
+#endif
+
+// 32-bit alignment
+#define MEM_ALIGNMENT               4
+
+#define LWIP_RAM_HEAP_POINTER       lwip_ram_heap
+
+// Number of simultaneously queued TCP segments.
+#define MEMP_NUM_TCP_SEG            MBED_CONF_LWIP_MEMP_NUM_TCP_SEG
+
+// TCP Maximum segment size.
+#define TCP_MSS                     MBED_CONF_LWIP_TCP_MSS
+
+// TCP sender buffer space (bytes).
+#define TCP_SND_BUF                 MBED_CONF_LWIP_TCP_SND_BUF
+
+// TCP sender buffer space (bytes).
+#define TCP_WND                     MBED_CONF_LWIP_TCP_WND
+
+#define TCP_MAXRTX                  MBED_CONF_LWIP_TCP_MAXRTX
+
+#define TCP_SYNMAXRTX               MBED_CONF_LWIP_TCP_SYNMAXRTX
+
+// Number of pool pbufs.
+// Each requires 684 bytes of RAM (if MSS=536 and PBUF_POOL_BUFSIZE defaulting to be based on MSS)
+#define PBUF_POOL_SIZE              MBED_CONF_LWIP_PBUF_POOL_SIZE
+
+#ifdef MBED_CONF_LWIP_PBUF_POOL_BUFSIZE
+#undef PBUF_POOL_BUFSIZE
+#define PBUF_POOL_BUFSIZE           LWIP_MEM_ALIGN_SIZE(MBED_CONF_LWIP_PBUF_POOL_BUFSIZE)
+#else
+#ifndef PBUF_POOL_BUFSIZE
+#if LWIP_IPV6
+#define PBUF_POOL_BUFSIZE               LWIP_MEM_ALIGN_SIZE(TCP_MSS+20+40+PBUF_LINK_ENCAPSULATION_HLEN+PBUF_LINK_HLEN)
+#elif LWIP_IPV4
+#define PBUF_POOL_BUFSIZE               LWIP_MEM_ALIGN_SIZE(TCP_MSS+20+20+PBUF_LINK_ENCAPSULATION_HLEN+PBUF_LINK_HLEN)
+#endif
+#endif
+#endif
+
+#define MEM_SIZE                    MBED_CONF_LWIP_MEM_SIZE
+
+// One tcp_pcb_listen is needed for each TCP server.
+// Each requires 72 bytes of RAM.
+#define MEMP_NUM_TCP_PCB_LISTEN     MBED_CONF_LWIP_TCP_SERVER_MAX
+
+// One is tcp_pcb needed for each TCPSocket.
+// Each requires 196 bytes of RAM.
+#define MEMP_NUM_TCP_PCB            MBED_CONF_LWIP_TCP_SOCKET_MAX
+
+// One udp_pcb is needed for each UDPSocket.
+// Each requires 84 bytes of RAM (total rounded to multiple of 512).
+#define MEMP_NUM_UDP_PCB            MBED_CONF_LWIP_UDP_SOCKET_MAX
+
+// Number of non-pool pbufs.
+// Each requires 92 bytes of RAM.
+#define MEMP_NUM_PBUF               MBED_CONF_LWIP_NUM_PBUF
+
+// Each netbuf requires 64 bytes of RAM.
+#define MEMP_NUM_NETBUF             MBED_CONF_LWIP_NUM_NETBUF
+
+// One netconn is needed for each UDPSocket or TCPSocket.
+// Each requires 236 bytes of RAM (total rounded to multiple of 512).
+#define MEMP_NUM_NETCONN            MBED_CONF_LWIP_SOCKET_MAX
+
+#if MBED_CONF_LWIP_TCP_ENABLED
+#define LWIP_TCP                    1
+#define TCP_OVERSIZE                0
+#define LWIP_TCP_KEEPALIVE          1
+
+#define TCP_CLOSE_TIMEOUT            MBED_CONF_LWIP_TCP_CLOSE_TIMEOUT
+
+#else
+#define LWIP_TCP                    0
+#endif
+
+#define LWIP_DNS                    1
+// Only DNS address storage is enabled
+#define LWIP_FULL_DNS               0
+#define LWIP_SOCKET                 0
+
+#define SO_REUSE                    1
+
+// Support Multicast
+#include "stdlib.h"
+#define LWIP_IGMP                   LWIP_IPV4
+#define LWIP_RAND()                 lwip_get_random()
+
+#define LWIP_COMPAT_SOCKETS         0
+#define LWIP_POSIX_SOCKETS_IO_NAMES 0
+
+#define LWIP_BROADCAST_PING         1
+
+// Fragmentation on, as per IPv4 default
+#define LWIP_IPV6_FRAG              LWIP_IPV6
+
+// Queuing, default is  "disabled", as per IPv4 default (so actually queues 1)
+#define LWIP_ND6_QUEUEING           MBED_CONF_ND6_QUEUEING
+
+// Debug Options
+#define NETIF_DEBUG                 LWIP_DBG_OFF
+#define PBUF_DEBUG                  LWIP_DBG_OFF
+#define API_LIB_DEBUG               LWIP_DBG_OFF
+#define API_MSG_DEBUG               LWIP_DBG_OFF
+#define SOCKETS_DEBUG               LWIP_DBG_OFF
+#define ICMP_DEBUG                  LWIP_DBG_OFF
+#define IGMP_DEBUG                  LWIP_DBG_OFF
+#define INET_DEBUG                  LWIP_DBG_OFF
+#define IP_DEBUG                    LWIP_DBG_OFF
+#define IP_REASS_DEBUG              LWIP_DBG_OFF
+#define RAW_DEBUG                   LWIP_DBG_OFF
+#define MEM_DEBUG                   LWIP_DBG_OFF
+#define MEMP_DEBUG                  LWIP_DBG_OFF
+#define SYS_DEBUG                   LWIP_DBG_OFF
+#define TIMERS_DEBUG                LWIP_DBG_OFF
+#define TCP_DEBUG                   LWIP_DBG_OFF
+#define TCP_INPUT_DEBUG             LWIP_DBG_OFF
+#define TCP_FR_DEBUG                LWIP_DBG_OFF
+#define TCP_RTO_DEBUG               LWIP_DBG_OFF
+#define TCP_CWND_DEBUG              LWIP_DBG_OFF
+#define TCP_WND_DEBUG               LWIP_DBG_OFF
+#define TCP_OUTPUT_DEBUG            LWIP_DBG_OFF
+#define TCP_RST_DEBUG               LWIP_DBG_OFF
+#define TCP_QLEN_DEBUG              LWIP_DBG_OFF
+#define UDP_DEBUG                   LWIP_DBG_OFF
+#define TCPIP_DEBUG                 LWIP_DBG_OFF
+#define SLIP_DEBUG                  LWIP_DBG_OFF
+#define DHCP_DEBUG                  LWIP_DBG_OFF
+#define AUTOIP_DEBUG                LWIP_DBG_OFF
+#define DNS_DEBUG                   LWIP_DBG_OFF
+#define IP6_DEBUG                   LWIP_DBG_OFF
+
+#define ETHARP_DEBUG                LWIP_DBG_OFF
+#define UDP_LPC_EMAC                LWIP_DBG_OFF
+
+#ifdef LWIP_DEBUG
+#define MEMP_OVERFLOW_CHECK         1
+#define MEMP_SANITY_CHECK           1
+#define LWIP_DBG_TYPES_ON           LWIP_DBG_ON
+#define LWIP_DBG_MIN_LEVEL          LWIP_DBG_LEVEL_ALL
+#else
+#define LWIP_NOASSERT               1
+#define LWIP_STATS                  0
+#endif
+
+#define TRACE_TO_ASCII_HEX_DUMP     0
+
+#define LWIP_PLATFORM_BYTESWAP      1
+
+#define LWIP_RANDOMIZE_INITIAL_LOCAL_PORTS 1
+
+// Interface type configuration
+
+#if MBED_CONF_LWIP_ETHERNET_ENABLED
+#define LWIP_ARP                    1
+#define LWIP_ETHERNET               1
+#define LWIP_DHCP                   LWIP_IPV4
+#else
+#define LWIP_ARP                    0
+#define LWIP_ETHERNET               0
+#endif // MBED_CONF_LWIP_ETHERNET_ENABLED
+
+#if MBED_CONF_LWIP_L3IP_ENABLED
+#define LWIP_L3IP                   1
+#else
+#define LWIP_L3IP                   0
+#endif
+
+//Maximum size of network interface name
+#define INTERFACE_NAME_MAX_SIZE NSAPI_INTERFACE_NAME_MAX_SIZE
+// Note generic macro name used rather than MBED_CONF_LWIP_PPP_ENABLED
+// to allow users like PPPCellularInterface to detect that nsapi_ppp.h is available.
+
+// Enable PPP for now either from lwIP PPP configuration (obsolete) or from PPP service configuration
+#if MBED_CONF_PPP_ENABLED || MBED_CONF_LWIP_PPP_ENABLED
+
+#define PPP_SUPPORT                      1
+
+#if MBED_CONF_PPP_IPV4_ENABLED || MBED_CONF_LWIP_IPV4_ENABLED
+#define LWIP 0x11991199
+#if (MBED_CONF_NSAPI_DEFAULT_STACK == LWIP) && !MBED_CONF_LWIP_IPV4_ENABLED
+#error LWIP: IPv4 PPP enabled but not IPv4
+#endif
+#undef LWIP
+#define PPP_IPV4_SUPPORT                 1
+#endif
+
+#if MBED_CONF_PPP_IPV6_ENABLED || MBED_CONF_LWIP_IPV6_ENABLED
+#define LWIP 0x11991199
+#if (MBED_CONF_NSAPI_DEFAULT_STACK == LWIP) && !MBED_CONF_LWIP_IPV6_ENABLED
+#error LWIP: IPv6 PPP enabled but not IPv6
+#endif
+#undef LWIP
+#define PPP_IPV6_SUPPORT                 1
+// Later to be dynamic for use for multiple interfaces
+#define LWIP_IPV6_DUP_DETECT_ATTEMPTS    0
+#endif
+
+#endif
+
+#define LWIP_NETBUF_RECVINFO            MBED_CONF_LWIP_NETBUF_RECVINFO_ENABLED
+
+// Make sure we default these to off, so
+// LWIP doesn't default to on
+#ifndef LWIP_ARP
+#define LWIP_ARP                    0
+#endif
+
+// Checksum-on-copy disabled due to https://savannah.nongnu.org/bugs/?50914
+#define LWIP_CHECKSUM_ON_COPY       0
+
+#define LWIP_NETIF_HOSTNAME         1
+#define LWIP_NETIF_STATUS_CALLBACK  1
+#define LWIP_NETIF_LINK_CALLBACK    1
+
+#define DNS_TABLE_SIZE                  2
+#define DNS_MAX_NAME_LENGTH             128
+
+#include "lwip_random.h"
+#include "lwip_tcp_isn.h"
+#define LWIP_HOOK_TCP_ISN lwip_hook_tcp_isn
+#ifdef MBEDTLS_MD5_C
+#define LWIP_USE_EXTERNAL_MBEDTLS       1
+#else
+#define LWIP_USE_EXTERNAL_MBEDTLS       0
+#endif
+
+#define LWIP_ND6_RDNSS_MAX_DNS_SERVERS  MBED_CONF_LWIP_ND6_RDNSS_MAX_DNS_SERVERS
+
+#endif /* LWIPOPTS_H_ */
diff --git a/Packages_Patches/arduino/hardware/mbed_portenta/3.0.1/portenta_post_install.sh b/Packages_Patches/arduino/hardware/mbed_portenta/3.0.1/portenta_post_install.sh
new file mode 100644
index 0000000..7fe71d6
--- /dev/null
+++ b/Packages_Patches/arduino/hardware/mbed_portenta/3.0.1/portenta_post_install.sh
@@ -0,0 +1,22 @@
+#!/usr/bin/env bash
+
+portenta_h7_rules () {
+    echo ""
+    echo "# Portenta H7 bootloader mode UDEV rules"
+    echo ""
+cat <<EOF
+SUBSYSTEMS=="usb", ATTRS{idVendor}=="2341", ATTRS{idProduct}=="035b", GROUP="plugdev", MODE="0666"
+EOF
+}
+
+if [ "$EUID" -ne 0 ]
+  then echo "Please run as root"
+  exit
+fi
+
+portenta_h7_rules > /etc/udev/rules.d/49-portenta_h7.rules
+
+# reload udev rules
+echo "Reload rules..."
+udevadm trigger
+udevadm control --reload-rules