diff --git a/HISTORY.rst b/HISTORY.rst
index 631c7f41..aa9d6867 100644
--- a/HISTORY.rst
+++ b/HISTORY.rst
@@ -12,6 +12,9 @@ PlatformIO 2.0
   (`issue #309 <https://github.com/platformio/platformio/issues/309>`_)
 * Added support for Espressif ESP8266 ESP-12E board (NodeMCU)
   (`issue #310 <https://github.com/platformio/platformio/issues/310>`_)
+* Fixed handling of upload port when ``board`` option is not specified in
+  `platformio.ini <http://docs.platformio.org/en/latest/projectconf.html>`__
+  (`issue #313 <https://github.com/platformio/platformio/issues/313>`_)
 
 
 2.3.4 (2015-10-13)
diff --git a/platformio/__init__.py b/platformio/__init__.py
index 4058d077..28c8e0d0 100644
--- a/platformio/__init__.py
+++ b/platformio/__init__.py
@@ -1,7 +1,7 @@
 # Copyright (C) Ivan Kravets <me@ikravets.com>
 # See LICENSE for details.
 
-VERSION = (2, 4, "0.dev0")
+VERSION = (2, 4, "0.dev1")
 __version__ = ".".join([str(s) for s in VERSION])
 
 __title__ = "platformio"
diff --git a/platformio/builder/scripts/atmelavr.py b/platformio/builder/scripts/atmelavr.py
index 6bdc2b62..604e9b70 100644
--- a/platformio/builder/scripts/atmelavr.py
+++ b/platformio/builder/scripts/atmelavr.py
@@ -16,10 +16,6 @@ from platformio.util import get_serialports
 
 def BeforeUpload(target, source, env):  # pylint: disable=W0613,W0621
 
-    def _rpi_sysgpio(path, value):
-        with open(path, "w") as f:
-            f.write(str(value))
-
     if "micronucleus" in env['UPLOADER']:
         print "Please unplug/plug device ..."
 
@@ -35,13 +31,18 @@ def BeforeUpload(target, source, env):  # pylint: disable=W0613,W0621
             "-D"
         ])
 
-    if not upload_options.get("require_upload_port", False):
+    if upload_options and not upload_options.get("require_upload_port", False):
         return
 
     env.AutodetectUploadPort()
     env.Append(UPLOADERFLAGS=["-P", "$UPLOAD_PORT"])
 
     if env.subst("$BOARD") == "raspduino":
+
+        def _rpi_sysgpio(path, value):
+            with open(path, "w") as f:
+                f.write(str(value))
+
         _rpi_sysgpio("/sys/class/gpio/export", 18)
         _rpi_sysgpio("/sys/class/gpio/gpio18/direction", "out")
         _rpi_sysgpio("/sys/class/gpio/gpio18/value", 1)