From 16c0160e63a9b96ee85d5b7d91280b33fee94d64 Mon Sep 17 00:00:00 2001 From: David Garske Date: Wed, 3 Jun 2020 10:41:59 -0700 Subject: [PATCH] Added support for STM32L5. --- wolfssl/wolfcrypt/port/st/stm32.h | 16 ++++++++++++---- wolfssl/wolfcrypt/settings.h | 18 ++++++++++++++---- 2 files changed, 26 insertions(+), 8 deletions(-) diff --git a/wolfssl/wolfcrypt/port/st/stm32.h b/wolfssl/wolfcrypt/port/st/stm32.h index 0e9010756..25e59e1da 100644 --- a/wolfssl/wolfcrypt/port/st/stm32.h +++ b/wolfssl/wolfcrypt/port/st/stm32.h @@ -54,6 +54,9 @@ #if !defined(HASH_DATATYPE_8B) && defined(HASH_DataType_8b) #define HASH_DATATYPE_8B HASH_DataType_8b #endif +#ifndef HASH_STR_NBW + #define HASH_STR_NBW HASH_STR_NBLW +#endif #ifndef STM32_HASH_TIMEOUT #define STM32_HASH_TIMEOUT 0xFFFF @@ -93,19 +96,24 @@ int wc_Stm32_Hash_Final(STM32_HASH_Context* stmCtx, word32 algo, #ifndef NO_AES #if !defined(STM32_CRYPTO_AES_GCM) && (defined(WOLFSSL_STM32F4) || \ - defined(WOLFSSL_STM32F7) || defined(WOLFSSL_STM32L4)) + defined(WOLFSSL_STM32F7) || defined(WOLFSSL_STM32L4) || defined(WOLFSSL_STM32L5)) /* Hardware supports AES GCM acceleration */ #define STM32_CRYPTO_AES_GCM #endif - #ifdef WOLFSSL_STM32L4 - #define STM32_CRYPTO_AES_ONLY /* crypto engine only supports AES */ + #if defined(WOLFSSL_STM32L4) || defined(WOLFSSL_STM32L5) + #ifdef WOLFSSL_STM32L4 + #define STM32_CRYPTO_AES_ONLY /* crypto engine only supports AES */ + #endif #define CRYP AES + #ifndef CRYP_AES_GCM + #define CRYP_AES_GCM CRYP_AES_GCM_GMAC + #endif #endif /* Detect newer CubeMX crypto HAL (HAL_CRYP_Encrypt / HAL_CRYP_Decrypt) */ #if !defined(STM32_HAL_V2) && \ - defined(WOLFSSL_STM32F7) && defined(CRYP_AES_GCM) + (defined(WOLFSSL_STM32F7) || defined(WOLFSSL_STM32L5)) && defined(CRYP_AES_GCM) #define STM32_HAL_V2 #endif diff --git a/wolfssl/wolfcrypt/settings.h b/wolfssl/wolfcrypt/settings.h index 32bf31eb3..fb4879c03 100644 --- a/wolfssl/wolfcrypt/settings.h +++ b/wolfssl/wolfcrypt/settings.h @@ -1203,7 +1203,7 @@ extern void uITRON4_free(void *p) ; #if defined(WOLFSSL_STM32F2) || defined(WOLFSSL_STM32F4) || \ defined(WOLFSSL_STM32F7) || defined(WOLFSSL_STM32F1) || \ - defined(WOLFSSL_STM32L4) + defined(WOLFSSL_STM32L4) || defined(WOLFSSL_STM32L5) #define SIZEOF_LONG_LONG 8 #ifndef CHAR_BIT @@ -1224,7 +1224,7 @@ extern void uITRON4_free(void *p) ; #undef STM32_CRYPTO #define STM32_CRYPTO - #ifdef WOLFSSL_STM32L4 + #if defined(WOLFSSL_STM32L4) || defined(WOLFSSL_STM32L5) #define NO_AES_192 /* hardware does not support 192-bit */ #endif #endif @@ -1239,6 +1239,8 @@ extern void uITRON4_free(void *p) ; #ifdef WOLFSSL_STM32_CUBEMX #if defined(WOLFSSL_STM32F2) #include "stm32f2xx_hal.h" + #elif defined(WOLFSSL_STM32L5) + #include "stm32l5xx_hal.h" #elif defined(WOLFSSL_STM32L4) #include "stm32l4xx_hal.h" #elif defined(WOLFSSL_STM32F4) @@ -1272,7 +1274,15 @@ extern void uITRON4_free(void *p) ; #ifdef STM32_HASH #include "stm32f4xx_hash.h" #endif - #elif defined(WOLFSSL_STM32L4) + #elif defined(WOLFSSL_STM32L5) + #include "stm32l5xx.h" + #ifdef STM32_CRYPTO + #include "stm32l5xx_cryp.h" + #endif + #ifdef STM32_HASH + #include "stm32l5xx_hash.h" + #endif + #elif defined(WOLFSSL_STM32L4) #include "stm32l4xx.h" #ifdef STM32_CRYPTO #include "stm32l4xx_cryp.h" @@ -1286,7 +1296,7 @@ extern void uITRON4_free(void *p) ; #include "stm32f1xx.h" #endif #endif /* WOLFSSL_STM32_CUBEMX */ -#endif /* WOLFSSL_STM32F2 || WOLFSSL_STM32F4 || WOLFSSL_STM32L4 || WOLFSSL_STM32F7 */ +#endif /* WOLFSSL_STM32F2 || WOLFSSL_STM32F4 || WOLFSSL_STM32L4 || WOLFSSL_STM32L5 || WOLFSSL_STM32F7 */ #ifdef WOLFSSL_DEOS #include #include