From 46c704f51f373fb00bf69024e955eb52bef5b327 Mon Sep 17 00:00:00 2001
From: Sean Parkinson <sean@wolfssl.com>
Date: Mon, 24 Nov 2025 10:45:36 +1000
Subject: [PATCH] SP Thumb2/ARM32: P-384 sub not needed for small builds

Don't have an implementation of sp_384_sub when building for small code
size.
---
 wolfcrypt/src/sp_arm32.c   | 55 ++--------------------------------
 wolfcrypt/src/sp_cortexm.c | 60 ++------------------------------------
 2 files changed, 4 insertions(+), 111 deletions(-)

diff --git a/wolfcrypt/src/sp_arm32.c b/wolfcrypt/src/sp_arm32.c
index 73221adb29..168168f094 100644
--- a/wolfcrypt/src/sp_arm32.c
+++ b/wolfcrypt/src/sp_arm32.c
@@ -92181,58 +92181,7 @@ WC_OMIT_FRAME_POINTER static void sp_384_mont_tpl_12(sp_digit* r,
     );
 }
 
-#ifdef WOLFSSL_SP_SMALL
-/* Sub b from a into r. (r = a - b)
- *
- * r  A single precision integer.
- * a  A single precision integer.
- * b  A single precision integer.
- */
-#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
-WC_OMIT_FRAME_POINTER static sp_digit sp_384_sub_12(sp_digit* r_p,
-    const sp_digit* a_p, const sp_digit* b_p)
-#else
-WC_OMIT_FRAME_POINTER static sp_digit sp_384_sub_12(sp_digit* r,
-    const sp_digit* a, const sp_digit* b)
-#endif /* WOLFSSL_NO_VAR_ASSIGN_REG */
-{
-#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
-    register sp_digit* r asm ("r0") = (sp_digit*)r_p;
-    register const sp_digit* a asm ("r1") = (const sp_digit*)a_p;
-    register const sp_digit* b asm ("r2") = (const sp_digit*)b_p;
-#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
-
-    __asm__ __volatile__ (
-        "mov	r12, #0\n\t"
-        "add	lr, %[a], #48\n\t"
-        "\n"
-    "L_sp_384_sub_12_word_%=: \n\t"
-        "rsbs	r12, r12, #0\n\t"
-        "ldm	%[a]!, {r3, r4, r5, r6}\n\t"
-        "ldm	%[b]!, {r7, r8, r9, r10}\n\t"
-        "sbcs	r3, r3, r7\n\t"
-        "sbcs	r4, r4, r8\n\t"
-        "sbcs	r5, r5, r9\n\t"
-        "sbcs	r6, r6, r10\n\t"
-        "stm	%[r]!, {r3, r4, r5, r6}\n\t"
-        "sbc	r12, r3, r3\n\t"
-        "cmp	%[a], lr\n\t"
-        "bne	L_sp_384_sub_12_word_%=\n\t"
-        "mov	%[r], r12\n\t"
-#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
-        : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b)
-        :
-#else
-        :
-        : [r] "r" (r), [a] "r" (a), [b] "r" (b)
-#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
-        : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
-            "r12", "lr"
-    );
-    return (word32)(size_t)r;
-}
-
-#else
+#ifndef WOLFSSL_SP_SMALL
 /* Sub b from a into r. (r = a - b)
  *
  * r  A single precision integer.
@@ -92288,7 +92237,7 @@ WC_OMIT_FRAME_POINTER static sp_digit sp_384_sub_12(sp_digit* r,
     return (word32)(size_t)r;
 }
 
-#endif /* WOLFSSL_SP_SMALL */
+#endif /* !WOLFSSL_SP_SMALL */
 #ifdef WOLFSSL_SP_SMALL
 /* Conditionally add a and b using the mask m.
  * m is -1 to add and 0 when not.
diff --git a/wolfcrypt/src/sp_cortexm.c b/wolfcrypt/src/sp_cortexm.c
index cbb2230d2a..801978d128 100644
--- a/wolfcrypt/src/sp_cortexm.c
+++ b/wolfcrypt/src/sp_cortexm.c
@@ -45506,63 +45506,7 @@ WC_OMIT_FRAME_POINTER SP_NOINLINE static void sp_384_mont_tpl_12(sp_digit* r,
     );
 }
 
-#ifdef WOLFSSL_SP_SMALL
-/* Sub b from a into r. (r = a - b)
- *
- * r  A single precision integer.
- * a  A single precision integer.
- * b  A single precision integer.
- */
-#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
-WC_OMIT_FRAME_POINTER static sp_digit sp_384_sub_12(sp_digit* r_p,
-    const sp_digit* a_p, const sp_digit* b_p)
-#else
-WC_OMIT_FRAME_POINTER static sp_digit sp_384_sub_12(sp_digit* r,
-    const sp_digit* a, const sp_digit* b)
-#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
-{
-#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
-    register sp_digit* r __asm__ ("r0") = (sp_digit*)r_p;
-    register const sp_digit* a __asm__ ("r1") = (const sp_digit*)a_p;
-    register const sp_digit* b __asm__ ("r2") = (const sp_digit*)b_p;
-#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
-
-    __asm__ __volatile__ (
-        "MOV	r11, #0x0\n\t"
-        "ADD	r12, %[a], #0x30\n\t"
-        "\n"
-#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
-    "L_sp_384_sub_12_word:\n\t"
-#else
-    "L_sp_384_sub_12_word_%=:\n\t"
-#endif
-        "RSBS	r11, r11, #0x0\n\t"
-        "LDM	%[a]!, {r3, r4, r5, r6}\n\t"
-        "LDM	%[b]!, {r7, r8, r9, r10}\n\t"
-        "SBCS	r3, r3, r7\n\t"
-        "SBCS	r4, r4, r8\n\t"
-        "SBCS	r5, r5, r9\n\t"
-        "SBCS	r6, r6, r10\n\t"
-        "STM	%[r]!, {r3, r4, r5, r6}\n\t"
-        "SBC	r11, r3, r3\n\t"
-        "CMP	%[a], r12\n\t"
-#if defined(__GNUC__)
-        "BNE	L_sp_384_sub_12_word_%=\n\t"
-#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
-        "BNE.N	L_sp_384_sub_12_word\n\t"
-#else
-        "BNE.N	L_sp_384_sub_12_word_%=\n\t"
-#endif
-        "MOV	%[r], r11\n\t"
-        : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b)
-        :
-        : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
-            "r11", "r12"
-    );
-    return (word32)(size_t)r;
-}
-
-#else
+#ifndef WOLFSSL_SP_SMALL
 /* Sub b from a into r. (r = a - b)
  *
  * r  A single precision integer.
@@ -45613,7 +45557,7 @@ WC_OMIT_FRAME_POINTER static sp_digit sp_384_sub_12(sp_digit* r,
     return (word32)(size_t)r;
 }
 
-#endif /* WOLFSSL_SP_SMALL */
+#endif /* !WOLFSSL_SP_SMALL */
 #ifdef WOLFSSL_SP_SMALL
 /* Conditionally add a and b using the mask m.
  * m is -1 to add and 0 when not.