From 53c36f8529f7fdade6d07f7ec605eedc053c5000 Mon Sep 17 00:00:00 2001
From: David Garske <david@wolfssl.com>
Date: Wed, 13 Aug 2025 22:29:43 +0100
Subject: [PATCH] Add assembly introspection for RISC-V and PPC32.

---
 wolfcrypt/src/wolfmath.c | 49 ++++++++++++++++++++++++++++++++++++++--
 1 file changed, 47 insertions(+), 2 deletions(-)

diff --git a/wolfcrypt/src/wolfmath.c b/wolfcrypt/src/wolfmath.c
index c29e2943b..480b78470 100644
--- a/wolfcrypt/src/wolfmath.c
+++ b/wolfcrypt/src/wolfmath.c
@@ -513,7 +513,8 @@ const char *wc_GetMathInfo(void)
     #endif
 
     /* ARM Assembly speedups */
-    #if defined(WOLFSSL_ARMASM) || defined(USE_INTEL_SPEEDUP)
+    #if defined(WOLFSSL_ARMASM) || defined(USE_INTEL_SPEEDUP) || \
+        defined(WOLFSSL_RISCV_ASM) || defined(WOLFSSL_PPC32_ASM)
         "\n\tAssembly Speedups:"
 
         #ifdef WOLFSSL_ARMASM
@@ -533,7 +534,7 @@ const char *wc_GetMathInfo(void)
             #ifdef WOLFSSL_ARM_ARCH
                 " ARM ARCH=" WC_STRINGIFY(WOLFSSL_ARM_ARCH)
             #endif
-        #endif
+        #endif /* WOLFSSL_ARMASM */
 
         #ifdef USE_INTEL_SPEEDUP
             " INTELASM"
@@ -542,6 +543,50 @@ const char *wc_GetMathInfo(void)
             #endif
         #endif
 
+        #ifdef WOLFSSL_RISCV_ASM
+            " RISCVASM"
+            #ifdef WOLFSSL_RISCV_BASE_BIT_MANIPULATION
+                " REV8"
+            #endif
+            #ifdef WOLFSSL_RISCV_CARRYLESS
+                " CLMUL CLMULH"
+            #endif
+            #ifdef WOLFSSL_RISCV_BIT_MANIPULATION
+                " PACK"
+            #endif
+            #ifdef WOLFSSL_RISCV_BIT_MANIPULATION_TERNARY
+                " FSL FSR FSRI CMOV CMIX"
+            #endif
+            #ifdef WOLFSSL_RISCV_VECTOR_BASE_BIT_MANIPULATION
+                " VBREV8"
+            #endif
+            #ifdef WOLFSSL_RISCV_VECTOR_CARRYLESS
+                " VCLMUL VCLMULH"
+            #endif
+            #ifdef WOLFSSL_RISCV_VECTOR_GCM
+                " VGMUL VHHSH"
+            #endif
+            #ifdef WOLFSSL_RISCV_VECTOR_CRYPTO_ASM
+                " Vector AES SHA-2"
+            #endif
+            #ifdef WOLFSSL_RISCV_SCALAR_CRYPTO_ASM
+                " AES encrypt/decrpyt SHA-2"
+            #endif
+        #endif /* WOLFSSL_RISCV_ASM */
+
+        #ifdef WOLFSSL_PPC32_ASM
+            " PPC32ASM"
+            #ifdef WOLFSSL_PPC32_ASM_INLINE
+                " INLINE"
+            #endif
+            #ifdef WOLFSSL_PPC32_ASM_SMALL
+                " SMALL"
+            #endif
+            #ifdef WOLFSSL_PPC32_ASM_SPE
+                " SPE"
+            #endif
+        #endif /* WOLFSSL_PPC32_ASM */
+
         #ifdef WOLFSSL_USE_ALIGN
             " ALIGN"
         #endif