From 55763ef3186133e384d6317c76e64d80aa749820 Mon Sep 17 00:00:00 2001 From: takashikojo Date: Sun, 19 May 2013 10:02:13 +0900 Subject: [PATCH 01/16] Commit 2.6.2 --- IDE/MDK-ARM/MDK-ARM/CyaSSL/Retarget.c | 269 ++ IDE/MDK-ARM/MDK-ARM/CyaSSL/cert_data.c | 28 + IDE/MDK-ARM/MDK-ARM/CyaSSL/cert_data.h | 39 + IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c | 235 ++ IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h | 110 + IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c | 244 ++ IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c | 628 +++ IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c | 48 + IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt | 1731 ++++++++ IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj | 3565 +++++++++++++++++ configure.ac | 3 +- ctaocrypt/benchmark/benchmark.c | 77 +- ctaocrypt/src/aes.c | 17 +- ctaocrypt/src/asn.c | 76 +- ctaocrypt/src/des3.c | 1 + ctaocrypt/src/hc128.c | 1 + ctaocrypt/src/hmac.c | 1 - ctaocrypt/src/logging.c | 4 + ctaocrypt/src/md5.c | 1 + ctaocrypt/src/memory.c | 16 +- ctaocrypt/src/misc.c | 2 - ctaocrypt/src/pwdbased.c | 3 +- ctaocrypt/src/rabbit.c | 16 +- ctaocrypt/src/random.c | 16 +- ctaocrypt/src/sha.c | 3 +- ctaocrypt/test/test.c | 190 +- cyassl/certs_test.h | 12 +- cyassl/ctaocrypt/random.h | 8 + cyassl/ctaocrypt/settings.h | 15 +- cyassl/ctaocrypt/sha512.h | 2 +- cyassl/ctaocrypt/types.h | 2 +- cyassl/internal.h | 13 +- cyassl/ssl.h | 3 +- cyassl/test.h | 53 +- examples/client/client.c | 31 +- examples/echoclient/echoclient.c | 50 +- examples/echoserver/echoserver.c | 17 +- examples/server/server.c | 26 +- src/internal.c | 16 +- src/ssl.c | 9 +- 40 files changed, 7377 insertions(+), 204 deletions(-) create mode 100644 IDE/MDK-ARM/MDK-ARM/CyaSSL/Retarget.c create mode 100644 IDE/MDK-ARM/MDK-ARM/CyaSSL/cert_data.c create mode 100644 IDE/MDK-ARM/MDK-ARM/CyaSSL/cert_data.h create mode 100644 IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c create mode 100644 IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h create mode 100644 IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c create mode 100644 IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c create mode 100644 IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c create mode 100644 IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt create mode 100644 IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/Retarget.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/Retarget.c new file mode 100644 index 000000000..00aaef181 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/Retarget.c @@ -0,0 +1,269 @@ + +#ifdef HAVE_CONFIG_H + #include +#endif + +#include +#include +#include +#include +#include + + +#include + +#pragma import(__use_no_semihosting_swi) + +/* The following macro definitions may be used to translate this file: + + STDIO - use standard Input/Output device + (default is NOT used) + */ + +/* Standard IO device handles. */ +#define STDIN 0x8001 +#define STDOUT 0x8002 +#define STDERR 0x8003 + +/* Standard IO device name defines. */ +const char __stdin_name[] = "STDIN"; +const char __stdout_name[] = "STDOUT"; +const char __stderr_name[] = "STDERR"; + +struct __FILE { int handle; /* Add whatever you need here */ }; + +#ifdef STDIO +extern int SER_GetChar (void); +extern int SER_PutChar (int ch); + +/*----------------------------------------------------------------------------- + Write character to the Serial Port + *----------------------------------------------------------------------------*/ +int sendchar (int c) +{ + if (c == '\n') { + SER_PutChar ('\r'); + } + SER_PutChar (c); + return (c); +} + + +/*----------------------------------------------------------------------------- + Read character from the Serial Port + *----------------------------------------------------------------------------*/ +int getkey (void) +{ + int ch = SER_GetChar(); + + if (ch < 0) { + return 0; + } + return ch; +} +#endif + +/*--------------------------- _ttywrch ---------------------------------------*/ + +void _ttywrch (int ch) +{ +#ifdef STDIO + sendchar (ch); +#endif +} + +/*--------------------------- _sys_open --------------------------------------*/ +#ifndef NO_FILESYSTEM +static int KEIL_FS_open(const char *name, int openmode) +{ + int i ; int ret ; + #define PATHSIZE 100 + char path[PATHSIZE] ; char *p ; + + if(strlen(name) > PATHSIZE)return(-1) ; + + for(i = 0; i<= strlen(name); i++) { + if(name[i] == '/')path[i] = '\\' ; + else path[i] = name[i] ; + } + if(path[0] == '.' && path[1] == '\\') p = path + 2 ; + else p = path ; + + ret = __sys_open (p, openmode) ; + + return(ret) ; +} +#endif + +FILEHANDLE _sys_open (const char *name, int openmode) +{ + /* Register standard Input Output devices. */ + if (strcmp(name, "STDIN") == 0) { + return (STDIN); + } + if (strcmp(name, "STDOUT") == 0) { + return (STDOUT); + } + if (strcmp(name, "STDERR") == 0) { + return (STDERR); + } + #ifndef NO_FILESYSTEM + return (KEIL_FS_open(name, openmode)); + #else + return(0) ; + #endif +} + +/*--------------------------- _sys_close -------------------------------------*/ + +int _sys_close (FILEHANDLE fh) +{ + if (fh > 0x8000) { + return (0); + } + #ifndef NO_FILESYSTEM + return (__sys_close (fh)); + #else + return(0) ; + #endif +} + +/*--------------------------- _sys_write -------------------------------------*/ + +int _sys_write (FILEHANDLE fh, const U8 *buf, U32 len, int mode) +{ +#ifdef STDIO + if (fh == STDOUT) { + /* Standard Output device. */ + for ( ; len; len--) { + sendchar (*buf++); + } + return (0); + } +#endif + if (fh > 0x8000) { + return (-1); + } + #ifndef NO_FILESYSTEM + return (__sys_write (fh, buf, len)); + #else + return(0) ; + #endif +} + +/*--------------------------- _sys_read --------------------------------------*/ + +int _sys_read (FILEHANDLE fh, U8 *buf, U32 len, int mode) +{ +#ifdef STDIO + if (fh == STDIN) { + /* Standard Input device. */ + int sz ; + while((buf[0] = getkey()) == 0) ; + ; + for (sz = 0 ; sz <= len ; sz ++ ) { + if(buf[sz] == 0) break ; + else sz++ ; + buf[sz] = getkey (); + } + return (sz); + } +#endif + if (fh > 0x8000) { + return (-1); + } + #ifndef NO_FILESYSTEM + return (__sys_read (fh, buf, len)); + #else + return(0) ; + #endif +} + +/*--------------------------- _sys_istty -------------------------------------*/ + +int _sys_istty (FILEHANDLE fh) +{ + if (fh > 0x8000) { + return (1); + } + return (0); +} + +/*--------------------------- _sys_seek --------------------------------------*/ + +int _sys_seek (FILEHANDLE fh, long pos) +{ + if (fh > 0x8000) { + return (-1); + } + #ifndef NO_FILESYSTEM + return (__sys_seek (fh, pos)); + #else + return(0) ; + #endif +} + +/*--------------------------- _sys_ensure ------------------------------------*/ + +int _sys_ensure (FILEHANDLE fh) +{ + if (fh > 0x8000) { + return (-1); + } + #ifndef NO_FILESYSTEM + return (__sys_ensure (fh)); + #else + return(0) ; + #endif +} + +/*--------------------------- _sys_flen --------------------------------------*/ + +long _sys_flen (FILEHANDLE fh) +{ + if (fh > 0x8000) { + return (0); + } + #ifndef NO_FILESYSTEM + return (__sys_flen (fh)); + #else + return(0) ; + #endif +} + + +/*--------------------------- _sys_tmpnam ------------------------------------*/ + +int _sys_tmpnam (char *name, int sig, unsigned maxlen) +{ + return (1); +} + +/*--------------------------- _sys_command_string ----------------------------*/ + +char *_sys_command_string (char *cmd, int len) +{ + return (cmd); +} + +/*--------------------------- _sys_exit --------------------------------------*/ + +void _sys_exit (int return_code) +{ +#ifdef CYASSL_MDK_SHELL + return ; +#else + /* Endless loop. */ + while (1); +#endif + +} + +/*--------------------------- time -----------------------------------------*/ +long time(long *t) +{ + return ((long) 0) ; /** DUMMY TIME() **/ +} +/*----------------------------------------------------------------------------- + * end of file + *----------------------------------------------------------------------------*/ diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cert_data.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cert_data.c new file mode 100644 index 000000000..398d85c70 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cert_data.c @@ -0,0 +1,28 @@ +/* certs_test.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +/* Define initial data for cert buffers */ +#include + diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cert_data.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cert_data.h new file mode 100644 index 000000000..6629ee051 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cert_data.h @@ -0,0 +1,39 @@ +#ifndef CYASSL_CERT_DATA_H +#define CYASSL_CERT_DATA_H + +#ifdef USE_CERT_BUFFERS_1024 +extern const unsigned char client_key_der_1024[] ; +extern int sizeof_client_key_der_1024 ; +/* ./certs/1024/client-cert.der, 1024-bit */ +extern const unsigned char client_cert_der_1024[] ; +extern int sizeof_client_cert_der_1024 ; +/* ./certs/1024/dh1024.der, 1024-bit */ +extern const unsigned char dh_key_der_1024[] ; +extern int sizeof_dh_key_der_1024 ; +/* ./certs/1024/dsa1024.der, 1024-bit */ +extern const unsigned char dsa_key_der_1024[] ; +extern int sizeof_dsa_key_der_1024 ; +/* ./certs/1024/rsa1024.der, 1024-bit */ +extern const unsigned char rsa_key_der_1024[] ; +extern int sizeof_rsa_key_der_1024 ; + +#elif defined(USE_CERT_BUFFERS_2048) +/* ./certs/client-key.der, 2048-bit */ +extern const unsigned char client_key_der_2048[] ; +extern int sizeof_client_key_der_2048 ; +/* ./certs/client-cert.der, 2048-bit */ +extern const unsigned char client_cert_der_2048[] ; +extern int sizeof_client_cert_der_2048 ; +/* ./certs/dh2048.der, 2048-bit */ +extern const unsigned char dh_key_der_2048[] ; +extern int sizeof_dh_key_der_2048 ; +/* ./certs/dsa2048.der, 2048-bit */ +extern const unsigned char dsa_key_der_2048[] ; +extern int sizeof_dsa_key_der_2048; +/* ./certs/rsa2048.der, 2048-bit */ +extern const unsigned char rsa_key_der_2048[] ; +extern int sizeof_rsa_key_der_2048 ; +#endif + +#endif + diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c new file mode 100644 index 000000000..718919b63 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c @@ -0,0 +1,235 @@ +/* cyassl_KEIL_RL.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + + +/***************************************************************************************/ +/** This file is for defining functions for specific to KEIL-RL. **/ +/***************************************************************************************/ +#ifdef HAVE_CONFIG_H + #include +#endif + +#include + +#include +#include "cyassl_MDK_ARM.h" + +#include +#include + + +/** KEIL-RL TCPnet ****/ +/** TCPnet BSD socket does not have following functions. **/ + +char *inet_ntoa(struct in_addr in) +{ + #define NAMESIZE 16 + static char name[NAMESIZE] ; + sprintf(name, "%d.%d.%d.%d", (in.s_addr>>24)&0xff, (in.s_addr>>16)&0xff, (in.s_addr>>8)&0xff, in.s_addr&0xff) ; + return name ; +} + +unsigned long inet_addr(const char *cp) +{ + unsigned int a[4] ; unsigned long ret ; + sscanf(cp, "%d.%d.%d.%d", &a[0], &a[1], &a[2], &a[3]) ; + ret = ((a[3]<<24) + (a[2]<<16) + (a[1]<<8) + a[0]) ; + return(ret) ; +} + + +/*** tcp_connect is actually associated with following syassl_tcp_connect. ***/ +int Cyassl_connect(int sd, const struct sockaddr* sa, int sz) +{ + int ret ; + #if defined(CYASSL_KEIL_TCP_NET) + + SOCKADDR_IN addr ; + + addr = *(SOCKADDR_IN *)sa ; + + do { + #undef connect /* Go to KEIL TCPnet connect */ + ret = connect(sd, (SOCKADDR *)&addr, sizeof(addr)) ; + os_dly_wait(50); + } while(ret == SCK_EWOULDBLOCK) ; + #ifdef DEBUG_CYASSL + { + char msg[50] ; + sprintf(msg, "BSD Connect return code: %d\n", ret) ; + CYASSL_MSG(msg) ; + } + #endif + + #endif /* CYASSL_KEIL_TCP_NET */ + return(ret ) ; +} + + +int Cyassl_accept(int sd, struct sockaddr *addr, int *addrlen) +{ + int ret ; + + #if defined(CYASSL_KEIL_TCP_NET) + while(1) { + #undef accept /* Go to KEIL TCPnet accept */ + ret = accept(sd, addr, addrlen) ; + if(ret != SCK_EWOULDBLOCK) break ; + os_dly_wait(1); + } + #ifdef DEBUG_CYASSL + { + char msg[50] ; + sprintf(msg, "BSD Accept return code: %d\n", ret) ; + CYASSL_MSG(msg) ; + } + #endif + + #endif /* CYASSL_KEIL_TCP_NET */ + return(ret ) ; + +} + +int Cyassl_recv(int sd, void *buf, size_t len, int flags) +{ + int ret ; + #if defined(CYASSL_KEIL_TCP_NET) + while(1) { + #undef recv /* Go to KEIL TCPnet recv */ + ret = recv(sd, buf, len, flags) ; + if(ret != SCK_EWOULDBLOCK) break ; + os_dly_wait(1); + } + #ifdef DEBUG_CYASSL + { + char msg[50] ; + sprintf(msg, "BSD Recv return code: %d\n", ret) ; + CYASSL_MSG(msg) ; + } + #endif + + #endif /* CYASSL_KEIL_TCP_NET */ + return(ret ) ; +} + +int Cyassl_send(int sd, const void *buf, size_t len, int flags) +{ + int ret ; + + #if defined(CYASSL_KEIL_TCP_NET) + while(1) { + #undef send /* Go to KEIL TCPnet send */ + ret = send(sd, buf, len, flags) ; + if(ret != SCK_EWOULDBLOCK) break ; + os_dly_wait(1); + } + #ifdef DEBUG_CYASSL + { + char msg[50] ; + sprintf(msg, "BSD Send return code: %d\n", ret) ; + CYASSL_MSG(msg) ; + } + #endif + +#endif /* CYASSL_KEIL_TCP_NET */ + return(ret) ; + +} + +#if defined(CYASSL_KEIL_TCP_NET) +void Cyassl_sleep(int t) +{ + #if defined(HAVE_KEIL_RTX) + os_dly_wait(t/1000+1) ; + #endif +} + +int Cyassl_tcp_select(int sd, int timeout) +{ + + return 0 ; + +} +#endif + +struct tm *Cyassl_MDK_gmtime(const time_t *c) +{ + + RTC_TimeTypeDef RTC_Time ; + RTC_DateTypeDef RTC_Date ; + static struct tm date ; + + RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; + RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; + + date.tm_year = RTC_Date.RTC_Year + 100 ; + date.tm_mon = RTC_Date.RTC_Month - 1 ; + date.tm_mday = RTC_Date.RTC_Date ; + date.tm_hour = RTC_Time.RTC_Hours ; + date.tm_min = RTC_Time.RTC_Minutes ; + date.tm_sec = RTC_Time.RTC_Seconds ; + + #if defined(DEBUG_CYASSL) + { + char msg[100] ; + sprintf(msg, "Debug::Cyassl_KEIL_gmtime(DATE=/%4d/%02d/%02d TIME=%02d:%02d:%02d)\n", + RTC_Date.RTC_Year+2000, RTC_Date.RTC_Month, RTC_Date.RTC_Date, + RTC_Time.RTC_Hours, RTC_Time.RTC_Minutes, RTC_Time.RTC_Seconds) ; + CYASSL_MSG(msg) ; + } + #endif + + return(&date) ; +} + +double current_time() +{ + return ((double)TIM2->CNT/1000000.0) ; +} + +extern int getkey(void) ; +extern int sendchar(int c) ; + +char * Cyassl_fgets ( char * str, int num, FILE * f ) +{ + int i ; + + for(i = 0 ; i< num ; i++) { + while((str[i] = getkey()) == 0) ; + if(str[i] == '\n' || str[i] == '\012' || str[i] == '\015') { + sendchar('\n') ; + str[i++] = '\n' ; + str[i] = '\0' ; + break ; + } else if(str[i] == '\010') { /* BS */ + if(i) { /* erace one char */ + sendchar('\010') ; sendchar(' ') ; sendchar('\010') ; + i = (i>0 ? (i-2) : -1 ) ; + continue ; + } + } else if(str[i] == '\033' || str[i] == '\004' ) { /* ESC or ^D */ + str[i] = '\0' ; + return(0) ; + } + sendchar(str[i]) ; + } + return(str) ; +} diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h new file mode 100644 index 000000000..3deb41867 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h @@ -0,0 +1,110 @@ +/* cyassl_KEIL_RL.h + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +/******************************************************************************/ +/** This file is for defining types, values for specific to KEIL-MDK-ARM. **/ +/******************************************************************************/ +#ifndef CYASSL_KEIL_RL_H +#define CYASSL_KEIL_RL_H + + + +#include + +/* Go to STDIN */ +#define fgets(buff, sz, fd) Cyassl_fgets(buff, sz, fd) +extern char * Cyassl_fgets ( char * str, int num, FILE * f ) ; + +#define SOCKET_T int + +/*** #include ***/ +#define NUMBITSPERBYTE 8 +#define FD_SETSIZE 10 + +typedef long fd_mask; +#define NFDBITS (sizeof(fd_mask) * NUMBITSPERBYTE) /* bits per mask */ + +typedef struct fd_set { + fd_mask fds_bits[(FD_SETSIZE + NFDBITS - 1) / NFDBITS]; +} fd_set; + +/*** #include ***/ +struct timeval { + long tv_sec; /* seconds */ + long tv_usec; /* microseconds */ +}; + + +/*** #include **/ +/* + int select(int nfds, fd_set *readfds, fd_set *writefds, + fd_set *exceptfds, const struct timeval *timeout); + void FD_CLR(int fd, fd_set *set); + int FD_ISSET(int fd, fd_set *set); + void FD_SET(int fd, fd_set *set); + void FD_ZERO(fd_set *set); +*/ +typedef int socklen_t ; + +/* for avoiding conflict with KEIL-TCPnet BSD socket */ +/* Bodies are in cyassl_KEIL_RL.c */ +#define connect Cyassl_connect +#define accept Cyassl_accept +#define recv Cyassl_recv +#define send Cyassl_send +#define sleep Cyassl_sleep + +/* for avoiding conflicting with KEIL-TCPnet TCP socket */ +/* Bodies are in test.h */ +#define tcp_connect Cyassl_tcp_connect +#define tcp_socket Cyassl_tcp_soket +#define tcp_listen Cyassl_tcp_listen +#define tcp_select Cyassl_tcp_select + +extern int Cyassl_connect(int sd, const struct sockaddr * sa, int sz) ; +extern int Cyassl_accept(int sd, struct sockaddr *addr, socklen_t *addrlen); +extern int Cyassl_recv(int sd, void *buf, size_t len, int flags); +extern int Cyassl_send(int sd, const void *buf, size_t len, int flags); +extern void Cyassl_sleep(int sec) ; +extern int Cyassl_tcp_socket(SOCKET_T* sockfd, int udp) ; +extern void Cyassl_tcp_listen(SOCKET_T* sockfd, int port, + int useAnyAddr, int udp) ; +extern int Cyassl_tcp_select(int sd, int timeout) ; + +/** KEIL-RL TCPnet ****/ +/* TCPnet BSD socket does not have following functions. */ +extern char *inet_ntoa(struct in_addr in); +extern unsigned long inet_addr(const char *cp); +extern int setsockopt(int sockfd, int level, int optname, + const void *optval, socklen_t optlen); +extern int select(int nfds, fd_set *readfds, fd_set *writefds, + fd_set *exceptfds, const struct timeval *timeout); + + +/** KEIL-RL gmtime ****/ + +#include +#include "stm32f2xx_rtc.h" +extern struct tm *gmtime(const time_t *timer); +extern struct tm *Cyassl_MDK_gmtime(const time_t *timer); +extern double current_time(void) ; + +#endif /* CYASSL_KEIL_RL_H */ diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c new file mode 100644 index 000000000..f858f71cd --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c @@ -0,0 +1,244 @@ +/* main.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +#include +#include + +#include +#include +#include "cyassl_MDK_ARM.h" + +#include "stm32f2xx_tim.h" +#include "stm32f2xx_rcc.h" + + +/*----------------------------------------------------------------------------- + * Initialize a Flash Memory Card + *----------------------------------------------------------------------------*/ +#if !defined(NO_FILESYSTEM) +static void init_card (void) +{ + U32 retv; + + while ((retv = finit (NULL)) != 0) { /* Wait until the Card is ready */ + if (retv == 1) { + printf ("\nSD/MMC Init Failed"); + printf ("\nInsert Memory card and press key...\n"); + } else { + printf ("\nSD/MMC Card is Unformatted"); + } + } +} +#endif + + +/*----------------------------------------------------------------------------- + * TCP/IP tasks + *----------------------------------------------------------------------------*/ +#ifdef CYASSL_KEIL_TCP_NET +__task void tcp_tick (void) +{ + + CYASSL_MSG("Time tick started.") ; + #if defined (HAVE_KEIL_RTX) + os_itv_set (10); + #endif + + while (1) { + #if defined (HAVE_KEIL_RTX) + os_itv_wait (); + #endif + /* Timer tick every 100 ms */ + timer_tick (); + } +} + +__task void tcp_poll (void) +{ + CYASSL_MSG("TCP polling started.\n") ; + while (1) { + main_TcpNet (); + #if defined (HAVE_KEIL_RTX) + os_tsk_pass (); + #endif + } +} +#endif + +/*----------------------------------------------------------------------------- + * initialize RTC + *----------------------------------------------------------------------------*/ +#include "stm32f2xx_rtc.h" +#include "stm32f2xx_rcc.h" +#include "stm32f2xx_pwr.h" + +static init_RTC() +{ + RTC_InitTypeDef RTC_InitStruct ; + + RTC_TimeTypeDef RTC_Time ; + RTC_DateTypeDef RTC_Date ; + + + /* Enable the PWR clock */ + RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); + + /* Allow access to RTC */ + PWR_BackupAccessCmd(ENABLE); + +/***Configures the External Low Speed oscillator (LSE)****/ + + RCC_LSEConfig(RCC_LSE_ON); + + /* Wait till LSE is ready */ + while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) + { + } + + /* Select the RTC Clock Source */ + RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); + + /* Enable the RTC Clock */ + RCC_RTCCLKCmd(ENABLE); + + /* Wait for RTC APB registers synchronisation */ + RTC_WaitForSynchro(); + + /* Calendar Configuration with LSI supposed at 32KHz */ + RTC_InitStruct.RTC_AsynchPrediv = 0x7F; + RTC_InitStruct.RTC_SynchPrediv = 0xFF; + RTC_InitStruct.RTC_HourFormat = RTC_HourFormat_24; + RTC_Init(&RTC_InitStruct); + + RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; + RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; +} + +/*----------------------------------------------------------------------------- + * initialize TIM + *----------------------------------------------------------------------------*/ +void init_timer() +{ + TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure ; + + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE) ; + + TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); + TIM_TimeBaseStructure.TIM_Prescaler = 60; + TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; + TIM_TimeBaseStructure.TIM_Period = 0xffffffff; + TIM_TimeBaseStructure.TIM_ClockDivision = 0; + TIM_TimeBaseStructure.TIM_RepetitionCounter = 0; + + TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); + + TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure) ; + TIM_Cmd(TIM2, ENABLE) ; +} + +#if defined(HAVE_KEIL_RTX) && defined(CYASSL_MDK_SHELL) +#define SHELL_STACKSIZE 1000 +static unsigned char Shell_stack[SHELL_STACKSIZE] ; +#endif + + +#if defined(CYASSL_MDK_SHELL) +extern void shell_main(void) ; +#endif + +extern void time_main(int) ; +extern void benchmark_test(void) ; +extern void SER_Init(void) ; + +/*----------------------------------------------------------------------------- + * mian entry + *----------------------------------------------------------------------------*/ + +/*** This is the parent task entry ***/ +void main_task (void) +{ + #ifdef CYASSL_KEIL_TCP_NET + init_TcpNet (); + + os_tsk_create (tcp_tick, 2); + os_tsk_create (tcp_poll, 1); + #endif + + #ifdef CYASSL_MDK_SHELL + #ifdef HAVE_KEIL_RTX + os_tsk_create_user(shell_main, 1, Shell_stack, SHELL_STACKSIZE) ; + #else + shell_main() ; + #endif + #else + + /************************************/ + /*** USER APPLICATION HERE ***/ + /************************************/ + + #endif + + #ifdef HAVE_KEIL_RTX + CYASSL_MSG("Terminating tcp_main\n") ; + os_tsk_delete_self (); + #endif + +} + + + int myoptind = 0; + char* myoptarg = NULL; + + #if defined(DEBUG_CYASSL) + extern void CyaSSL_Debugging_ON(void) ; +#endif + + +/*** main entry ***/ +int main() { + /* stm32_Init (); STM32 setup */ + + #if !defined(NO_FILESYSTEM) + init_card () ; /* initializing SD card */ + #endif + + init_RTC() ; + init_timer() ; + SER_Init() ; + + #if defined(DEBUG_CYASSL) + printf("Turning ON Debug message\n") ; + CyaSSL_Debugging_ON() ; + #endif + + #ifdef HAVE_KEIL_RTX + os_sys_init (main_task) ; + #else + main_task() ; + #endif + + return 0 ; /* There should be no return here */ + +} diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c new file mode 100644 index 000000000..d6268fa80 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c @@ -0,0 +1,628 @@ +/*shell.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + + /*** tiny Shell for CyaSSL apps ***/ + + #ifdef HAVE_CONFIG_H + #include +#endif + +#include "cyassl/internal.h" +#undef RNG +#include + +#if defined(CYASSL_MDK_ARM) + #include + #include + #include + #include + #include "cyassl_MDK_ARM.h" +#endif + +#ifdef CYASSL_KEIL_NET +#include "cyassl/test.h" +#else +typedef struct func_args { + int argc; + char** argv; + int return_code; +} func_args; +#endif + +#ifdef NO_ECHOCLIENT +#define echoclient_test command_not_found +#endif +#ifdef NO_ECHOSERVER +#define echoserver_test command_not_found +#endif +#ifdef NO_SIMPLE_CLIENT +#define client_test command_not_found +#endif +#ifdef NO_SIMPLE_SERVER +#define server_test command_not_found +#endif +#ifdef NO_CRYPT_BENCHMARK +#define benchmark_test command_not_found +#endif +#ifdef NO_CRYPT_TEST +#define ctaocrypt_test command_not_found +#endif + +#ifndef CYASSL_KEIL_NET +#define ipaddr_comm command_not_found +#endif + +#if !defined(HAVE_KEIL_RTX) +#define stack_comm command_not_found +#endif + + +#if !defined(DEBUG_CYASSL) +#define dbg_comm command_not_found +#endif + + +void command_not_found(void *argv) { + printf("Command not found\n") ; +} + +extern void echoclient_test(void *args) ; +extern void echoserver_test(void *args) ; +extern void benchmark_test(void *args) ; +extern void ctaocrypt_test(void *args) ; +extern void client_test(void *args) ; +extern void server_test(void *args) ; +extern void kill_task(void *args) ; +extern void time_main(void *args) ; +extern void ipaddr_comm(void *args) ; +extern void stack_comm(void *args) ; +extern void for_command(void *args) ; +extern void dbg_comm(void *arg) ; +extern void help_comm(void *arg) ; + +#if !defined(NO_CRYPT_TEST) + +#ifndef NO_MD5 +extern void md5_test(void *arg) ; +#endif +#ifdef CYASSL_MD2 +extern void md2_test(void *arg) ; +#endif +#ifndef NO_MD4 +extern void md4_test(void *arg) ; +#endif + +extern void sha_test(void *arg) ; + +#ifndef NO_SHA256 +extern void sha256_test(void *arg) ; +#endif +#ifdef CYASSL_SHA384 +extern void sha384_test(void *arg) ; +#endif + +#ifdef CYASSL_SHA512 +extern void sha512_test(void *arg) ; +#endif + +#ifdef CYASSL_RIPEMD +extern void ripemd_test(void *arg) ; +#endif +#ifndef NO_HMAC + #ifndef NO_MD5 +extern void hmac_md5_test(void *arg) ; + #endif +extern void hmac_sha_test(void *arg) ; + + #ifndef NO_SHA256 +extern void hmac_sha256_test(void *arg) ; + #endif + + #ifdef CYASSL_SHA384 +extern void hmac_sha384_test(void *arg) ; + #endif +#endif +#ifndef NO_RC4 +extern void arc4_test(void *arg) ; +#endif + +#ifndef NO_HC128 +extern void hc128_test(void *arg) ; +#endif + +#ifndef NO_RABBIT +extern void rabbit_test(void *arg) ; +#endif + +#ifndef NO_DES3 +extern void des_test(void *arg) ; +extern void des3_test(void *arg) ; +#endif + +#ifndef NO_AES +extern void aes_test(void *arg) ; +#ifdef HAVE_AESGCM +extern void aesgcm_test(void *arg) ; +#endif + +#ifdef HAVE_AESCCM +extern void aesccm_test(void *arg) ; +#endif +#endif + +#ifdef HAVE_CAMELLIA +extern void camellia_test(void *arg) ; +#endif +extern void random_test(void *arg) ; + +#ifndef NO_RSA +extern void rsa_test(void *arg) ; +#endif + +#ifndef NO_DH +extern void dh_test(void *arg) ; +#endif + +#ifndef NO_DSA +extern void dsa_test(void *arg) ; +#endif + +#ifndef NO_PWDBASED +extern void pwdbased_test(void *arg) ; +#endif + +#ifdef HAVE_ECC +extern void openssl_test(void *arg) ; +#endif + +#ifdef HAVE_ECC +extern void ecc_test(void *arg) ; +#endif + +#endif /* NO_CRYPT_TEST */ + +static struct { + const char *command ; + void (*func)(void *args) ; +} commandTable[] = { + "echoclient", echoclient_test, + "echoserver", echoserver_test, + "benchmark", benchmark_test, + "test", ctaocrypt_test, + "client", client_test, + "server", server_test, + "time", time_main, /* get/set RTC: [-d yy/mm/dd] [-t hh:mm:ss]*/ + "ipaddr", ipaddr_comm, /* TBD */ + "stack", stack_comm, /* On/Off check stack size */ + "for", for_command, /* iterate next command X times */ + "debug", dbg_comm, /* On/Off debug message */ + "help", help_comm, /* Breif description about the commands */ + + /** short name **/ + "ec", echoclient_test, + "es", echoserver_test, + "bm", benchmark_test, + "te", ctaocrypt_test, + "cl", client_test, + "sv", server_test, + "ip", ipaddr_comm, + "st", stack_comm, + "dbg", dbg_comm, + "?", help_comm, + +/*** test suites ****/ +#if !defined(NO_CRYPT_TEST) +#ifndef NO_MD5 + "md5", md5_test, +#endif +#ifdef CYASSL_MD2 + "md2", md2_test, +#endif +#ifndef NO_MD4 + "md4", md4_test, +#endif + "sha", sha_test, +#ifndef NO_SHA256 + "sha256", sha256_test, +#endif +#ifdef CYASSL_SHA384 + "sha384", sha384_test, +#endif +#ifdef CYASSL_SHA512 + "sha512", sha512_test, +#endif +#ifdef CYASSL_RIPEMD + "ripemd", ripemd_test, +#endif +#ifndef NO_HMAC + #ifndef NO_MD5 + "hmac_md5", hmac_md5_test, + #endif + "hmac_sha", hmac_sha_test, + #ifndef NO_SHA256 + "hmac_sha256", hmac_sha256_test, + #endif + #ifdef CYASSL_SHA384 + "hmac_sha384", hmac_sha384_test, + #endif +#endif +#ifndef NO_RC4 + "arc4", arc4_test, +#endif +#ifndef NO_HC128 + "hc128", hc128_test, +#endif +#ifndef NO_RABBIT + "rabbit", rabbit_test, +#endif +#ifndef NO_DES3 + "des", des_test, + "des3", des3_test, +#endif +#ifndef NO_AES + "aes", aes_test, + #ifdef HAVE_AESGCM + "aesgcm", aesgcm_test, + #endif + #ifdef HAVE_AESCCM + "aesccm", aesccm_test, + #endif +#endif + +#ifdef HAVE_CAMELLIA + "camellia", camellia_test, +#endif + "random", random_test, +#ifndef NO_RSA + "rsa", rsa_test, +#endif +#ifndef NO_DH + "dh", dh_test, +#endif +#ifndef NO_DSA + "dsa", dsa_test, +#endif +#ifndef NO_PWDBASED + "pwdbased", pwdbased_test, +#endif +#ifdef OPENSSL_EXTRA + "openssl", openssl_test, +#endif +#ifdef HAVE_ECC + "ecc", ecc_test, +#endif + +#endif /* NO_CRYPT_TEST */ + + "", NULL +} ; + +enum jobtype { FORGROUND, BACKGROUND } ; + +#define IF_DELIMITER(ch) ((ch) == ' ' || (ch) == '\n') + +/******* Get Command Line *****************************/ +static int getline(char * line, int sz, func_args *args, int*bf_flg) +{ + char * ret ; + int i ; + + #define MAXARGS 10 + #define MAXARGLEN 30 + static char *argv[MAXARGS] ; + args->argv = argv ; + + putchar('>') ; + fflush(stdout) ; + ret = fgets(line, sz, stdin) ; + #define SHELL_ERROR_FGETS -102 + if(ret != line) return(SHELL_ERROR_FGETS) ; + + if(line[strlen(line)-2] == '&') { + (*bf_flg) = BACKGROUND ; + line[strlen(line)-2] = '\n' ; + } else { + (*bf_flg) = FORGROUND ; + } + args->argc = 0 ; + for(i=0; iargv[args->argc] = &(line[i]) ; + while(!IF_DELIMITER(line[i])) i++ ; + args->argc++ ; + if(line[i] == '\n') { + line[i] = '\0' ; + break ; + } else { + line[i] = '\0' ; + } + } + return i ; +} + +static int BackGround = 0 ; /* 1: background job is running */ + +/************* Embedded Shell Commands **********************************/ +#define IP_SIZE 16 + +#ifdef CYASSL_KEIL_NET +static void ipaddr_comm(void *args) +{ + if(((func_args *)args)->argc == 1) { + printf("IP addr: %s, port %d\n", yasslIP, yasslPort) ; + } else { + if(BackGround != 0) { + printf("Cannot change IP addr while background server is running\n") ; + } else if(((func_args *)args)->argc == 3 && + ((func_args *)args)->argv[1][0] == '-'&& + ((func_args *)args)->argv[1][1] == 'a' ) { +/* strcpy(yasslIP, ((func_args *)args)->argv[2]) ; */ + } else if(((func_args *)args)->argc == 3 && + ((func_args *)args)->argv[1][0] == '-' && + ((func_args *)args)->argv[1][1] == 'p' ) { +/* yasslPort = atoi(((func_args *)args)->argv[2]) ; */ + } else printf("Invalid argument\n") ; + } +} + +#endif + +static void time_main(void *args) +{ + char * datetime ; + RTC_TimeTypeDef RTC_Time ; + RTC_DateTypeDef RTC_Date ; + int year ; + if( args == NULL || ((func_args *)args)->argc == 1) { + RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; + RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; + printf("Date: %d/%d/%d, Time: %02d:%02d:%02d\n", + RTC_Date.RTC_Month, RTC_Date.RTC_Date, RTC_Date.RTC_Year+2000, + RTC_Time.RTC_Hours, RTC_Time.RTC_Minutes, RTC_Time.RTC_Seconds) ; + } else if(((func_args *)args)->argc == 3 && + ((func_args *)args)->argv[1][0] == '-' && + ((func_args *)args)->argv[1][1] == 'd' ) { + datetime = ((func_args *)args)->argv[2]; + sscanf(datetime, "%d/%d/%d", + (int *)&RTC_Date.RTC_Month, (int *)&RTC_Date.RTC_Date, &year) ; + RTC_Date.RTC_Year = year - 2000 ; + RTC_Date.RTC_WeekDay = 0 ; + RTC_SetDate(RTC_Format_BIN, &RTC_Date) ; + } else if(((func_args *)args)->argc == 3 && + ((func_args *)args)->argv[1][0] == '-' && + ((func_args *)args)->argv[1][1] == 't' ) { + datetime = ((func_args *)args)->argv[2]; + sscanf(datetime, "%d:%d:%d", + (int *)&RTC_Time.RTC_Hours, + (int *)&RTC_Time.RTC_Minutes, + (int *)&RTC_Time.RTC_Seconds + ) ; + RTC_SetTime(RTC_Format_BIN, &RTC_Time) ; + } else printf("Invalid argument\n") ; +} + + +#if defined(HAVE_KEIL_RTX) +static int stack_ck = 0 ; + +static void stack_comm(void *args) +{ + if(stack_ck) { + printf("Stack Check: Off\n") ; + stack_ck = 0 ; + } else { + printf("Stack Check: On\n") ; + stack_ck = 1 ; + } +} + +#define FILL_PATTERN 0xa596695a +void stack_fill(char * stack, int size) +{ + int i ; + + if(stack_ck == 0)return ; + for(i=1; iargc == 1) { + printf("For %d times\n", for_iteration) ; + } else if( args == NULL || ((func_args *)args)->argc == 2) { + for_iteration = atoi(((func_args *)args)->argv[1]) ; + } else printf("Invalid argument\n") ; +} + + +#if defined(DEBUG_CYASSL) + +static int CyasslDebug = 1 ; + +static void dbg_comm(void *args) +{ + if(CyasslDebug == 1) { + CyasslDebug = 0 ; + printf("Turning OFF Debug message\n") ; + CyaSSL_Debugging_OFF() ; + } else { + CyasslDebug = 1 ; + printf("Turning ON Debug message\n") ; + CyaSSL_Debugging_ON() ; + } +} +#endif + +static void help_comm(void *args) +{ + +} + + + +#define BG_JOB_STACK_SIZE 12000 +#if (!defined(NO_SIMPLE_SERVER) && !defined(NO_ECHOSERVER)) && \ + defined(HAVE_KEIL_RTX) +static char bg_job_stack[BG_JOB_STACK_SIZE] ; +#endif + +#define COMMAND_STACK_SIZE 12000 +#if defined(HAVE_KEIL_RTX) +static char command_stack[COMMAND_STACK_SIZE] ; +#endif + + +#ifdef HAVE_KEIL_RTX +static CyaSSL_Mutex command_mutex ; +#endif + +/*********** Invoke Forground Command *********************/ +static void command_invoke(void *args) +{ + void (*func)(void * ) ; + int i,iteration ; + + func = (void(*)(void *))((func_args *)args)->argv[0] ; + #ifdef HAVE_KEIL_RTX + LockMutex((CyaSSL_Mutex *)&command_mutex) ; + #endif + iteration = for_iteration ; + for(i=0; i< iteration; i++) { + if(iteration > 1) printf("--- Start for %d ---->\n", i) ; + #if defined(HAVE_KEIL_RTX) + stack_fill(command_stack, COMMAND_STACK_SIZE) ; + #endif + + func(args) ; /* invoke command */ + + #if defined(HAVE_KEIL_RTX) + stack_check(command_stack, COMMAND_STACK_SIZE) ; + #endif + } + if(iteration > 1) + for_iteration = 1 ; + #ifdef HAVE_KEIL_RTX + UnLockMutex((CyaSSL_Mutex *)&command_mutex) ; + os_tsk_delete_self() ; + #endif +} + +#if (!defined(NO_SIMPLE_SERVER) && !defined(NO_ECHOSERVER)) && \ + defined(HAVE_KEIL_RTX) +/******* Invoke Background Job *******************************/ +static void bg_job_invoke(void *args) +{ + void (*func)(void * ) ; + BackGround = 1 ; + stack_fill(bg_job_stack, BG_JOB_STACK_SIZE) ; + func = (void(*)(void *))((func_args *)args)->argv[0] ; + func(args) ; /* invoke command */ + stack_check(bg_job_stack, BG_JOB_STACK_SIZE) ; + #ifdef CYASSL_KEIL_NET + init_TcpNet (); + #endif + BackGround = 0 ; + os_tsk_delete_self() ; ; +} +#endif + +#define LINESIZE 100 +static char line[LINESIZE] ; + + +/********* SHEULL MAIN LOOP ***********************************/ +void shell_main(void) { + int i ; + func_args args ; + int bf_flg ; + + i = BackGround ; + /* Dummy for avoiding warning: BackGround is defined but not used. */ + + + #if defined(HAVE_KEIL_RTX) + InitMutex(&command_mutex) ; +#endif + time_main(NULL) ; + printf("Starting Shell\n") ; + while(1) { + if(getline(line, LINESIZE, &args, &bf_flg) > 0) { + for(i=0; commandTable[i].func != NULL; i++) { + if(strcmp(commandTable[i].command, args.argv[0]) == 0) { + args.argv[0] = (char *) commandTable[i].func ; + if(bf_flg == FORGROUND) { + #ifdef HAVE_KEIL_RTX + UnLockMutex((CyaSSL_Mutex *)&command_mutex) ; + os_tsk_create_user_ex( (void(*)(void *))&command_invoke, 7, + command_stack, COMMAND_STACK_SIZE, &args) ; + #else + command_invoke(&args) ; + #endif + #ifdef HAVE_KEIL_RTX + LockMutex((CyaSSL_Mutex *)&command_mutex) ; + #endif + } else { + #if (!defined(NO_SIMPLE_SERVER) && \ + !defined(NO_ECHOSERVER)) && \ + defined(HAVE_KEIL_RTX) + if(BackGround != 0) { + printf("Multiple background servers not supported.\n") ; + } else { + printf("\"%s\" is running with the background mode.\n", + commandTable[i].command) ; + os_tsk_create_user_ex( (void(*)(void *))&bg_job_invoke, + 6, bg_job_stack, BG_JOB_STACK_SIZE, &args) ; + } + #else + printf("Invalid Command: no background job\n") ; + #endif + } + break ; + } + } + if(commandTable[i].func == NULL) + printf("Command not found\n") ; + } + } +} + diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c new file mode 100644 index 000000000..e750400f7 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c @@ -0,0 +1,48 @@ +/* ssl-dummy.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +#include +#include +#include +#include + +Signer* GetCA(void* vp, byte* hash) +{ + Signer*s ; + return s ; +} + +int CyaSSL_dtls(CYASSL* ssl) +{ + return ssl->options.dtls; +} + +int CyaSSL_get_using_nonblock(CYASSL* ssl) +{ + CYASSL_ENTER("CyaSSL_get_using_nonblock"); + CYASSL_LEAVE("CyaSSL_get_using_nonblock", ssl->options.usingNonblock); + return ssl->options.usingNonblock; +} + diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt new file mode 100644 index 000000000..49b94308c --- /dev/null +++ b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt @@ -0,0 +1,1731 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + MDK-RTX-TCP-FS + 0x4 + ARM-ADS + + 25000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Flash\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + SARMCM3.DLL + -MPU + DARMSTM.DLL + -pSTM32F207IG + SARMCM3.DLL + -MPU + TARMSTM.DLL + -pSTM32F207IG + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 9 + + + + + + + + + + ..\MDK-ARM\config\STM32_SWO.ini + BIN\ULP2CM3.DLL + + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + ULP2CM3 + -UP1135060 -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO23 -TC10000000 -TP18 -TDX0 -TDD0 -TDS0 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + + + + + + + + MDK-FS + 0x4 + ARM-ADS + + 25000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Flash\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 0 + + 255 + + SARMCM3.DLL + -MPU + DARMSTM.DLL + -pSTM32F207IG + SARMCM3.DLL + -MPU + TARMSTM.DLL + -pSTM32F207IG + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 9 + + + + + + + + + + ..\MDK-ARM\config\STM32_SWO.ini + BIN\ULP2CM3.DLL + + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + ULP2CM3 + -UP1135060 -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO23 -TC10000000 -TP18 -TDX0 -TDD0 -TDS0 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + + + + + + + + MDK-BARE-METAL + 0x4 + ARM-ADS + + 25000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Flash\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 0 + + 255 + + SARMCM3.DLL + -MPU + DARMSTM.DLL + -pSTM32F207IG + SARMCM3.DLL + -MPU + TARMSTM.DLL + -pSTM32F207IG + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 9 + + + + + + + + + + ..\MDK-ARM\config\STM32_SWO.ini + BIN\ULP2CM3.DLL + + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + ULP2CM3 + -UP1135060 -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO23 -TC10000000 -TP18 -TDX0 -TDD0 -TDS0 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + + + + + + + + CyaSSL Apps + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\examples\echoclient\echoclient.c + echoclient.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\examples\echoserver\echoserver.c + echoserver.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\test\test.c + test.c + 0 + 0 + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\benchmark\benchmark.c + benchmark.c + 0 + 0 + + + 1 + 5 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\examples\client\client.c + client.c + 0 + 0 + + + 1 + 6 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\examples\server\server.c + server.c + 0 + 0 + + + 1 + 7 + 1 + 0 + 0 + 0 + 0 + 387 + 396 + 0 + ..\MDK-ARM\CyaSSL\shell.c + shell.c + 0 + 0 + + + 1 + 8 + 1 + 0 + 0 + 0 + 0 + 209 + 220 + 0 + ..\MDK-ARM\CyaSSL\main.c + main.c + 0 + 0 + + + 1 + 9 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\CyaSSL\cert_data.c + cert_data.c + 0 + 0 + + + + + STM32F2xx_StdPeriph_Lib + 0 + 0 + 0 + 0 + + 2 + 10 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_cryp.c + stm32f2xx_cryp.c + 0 + 0 + + + 2 + 11 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_hash.c + stm32f2xx_hash.c + 0 + 0 + + + 2 + 12 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rcc.c + stm32f2xx_rcc.c + 0 + 0 + + + 2 + 13 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rng.c + stm32f2xx_rng.c + 0 + 0 + + + 2 + 14 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rtc.c + stm32f2xx_rtc.c + 0 + 0 + + + 2 + 15 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_pwr.c + stm32f2xx_pwr.c + 0 + 0 + + + 2 + 16 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_tim.c + stm32f2xx_tim.c + 0 + 0 + + + + + MDK-ARM + 1 + 0 + 0 + 0 + + 3 + 17 + 1 + 0 + 0 + 0 + 0 + 42 + 66 + 0 + c:\Keil\ARM\Boards\Keil\MCBSTM32F200\RL\FlashFS\SD_File\Serial.c + Serial.c + 0 + 0 + + + 3 + 18 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + c:\Keil\ARM\RL\FlashFS\Drivers\SDIO_STM32F2xx.c + SDIO_STM32F2xx.c + 0 + 0 + + + 3 + 19 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + c:\Keil\ARM\RV31\LIB\FS_CM3.lib + FS_CM3.lib + 0 + 0 + + + 3 + 20 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + c:\Keil\ARM\RV31\LIB\\RTX_CM3.lib + RTX_CM3.lib + 0 + 0 + + + 3 + 21 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + c:\Keil\ARM\RL\TCPnet\Drivers\ETH_STM32F2xx.c + ETH_STM32F2xx.c + 0 + 0 + + + 3 + 22 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + c:\Keil\ARM\RV31\LIB\TCPD_CM3.lib + TCPD_CM3.lib + 0 + 0 + + + 3 + 23 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + c:\Keil\ARM\RV31\LIB\TCP_CM3.lib + TCP_CM3.lib + 0 + 0 + + + 3 + 24 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil\ARM\Startup\ST\STM32F2xx\system_stm32f2xx.c + system_stm32f2xx.c + 0 + 0 + + + + + CyaSSL Library + 1 + 0 + 0 + 0 + + 4 + 25 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\crl.c + crl.c + 0 + 0 + + + 4 + 26 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\internal.c + internal.c + 0 + 0 + + + 4 + 27 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\io.c + io.c + 0 + 0 + + + 4 + 28 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\keys.c + keys.c + 0 + 0 + + + 4 + 29 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\ocsp.c + ocsp.c + 0 + 0 + + + 4 + 30 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\sniffer.c + sniffer.c + 0 + 0 + + + 4 + 31 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\ssl.c + ssl.c + 0 + 0 + + + 4 + 32 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\tls.c + tls.c + 0 + 0 + + + 4 + 33 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\CyaSSL\ssl-dummy.c + ssl-dummy.c + 0 + 0 + + + + + Crypt/Cipher Library + 1 + 0 + 0 + 0 + + 5 + 34 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\aes.c + aes.c + 0 + 0 + + + 5 + 35 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\arc4.c + arc4.c + 0 + 0 + + + 5 + 36 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\asm.c + asm.c + 0 + 0 + + + 5 + 37 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\asn.c + asn.c + 0 + 0 + + + 5 + 38 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\camellia.c + camellia.c + 0 + 0 + + + 5 + 39 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\coding.c + coding.c + 0 + 0 + + + 5 + 40 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\des3.c + des3.c + 0 + 0 + + + 5 + 41 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\dh.c + dh.c + 0 + 0 + + + 5 + 42 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\dsa.c + dsa.c + 0 + 0 + + + 5 + 43 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\ecc.c + ecc.c + 0 + 0 + + + 5 + 44 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\ecc_fp.c + ecc_fp.c + 0 + 0 + + + 5 + 45 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\error.c + error.c + 0 + 0 + + + 5 + 46 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\hc128.c + hc128.c + 0 + 0 + + + 5 + 47 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\hmac.c + hmac.c + 0 + 0 + + + 5 + 48 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\integer.c + integer.c + 0 + 0 + + + 5 + 49 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\logging.c + logging.c + 0 + 0 + + + 5 + 50 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\md2.c + md2.c + 0 + 0 + + + 5 + 51 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\md4.c + md4.c + 0 + 0 + + + 5 + 52 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\md5.c + md5.c + 0 + 0 + + + 5 + 53 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\memory.c + memory.c + 0 + 0 + + + 5 + 54 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\misc.c + misc.c + 0 + 0 + + + 5 + 55 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\pwdbased.c + pwdbased.c + 0 + 0 + + + 5 + 56 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\rabbit.c + rabbit.c + 0 + 0 + + + 5 + 57 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\random.c + random.c + 0 + 0 + + + 5 + 58 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\ripemd.c + ripemd.c + 0 + 0 + + + 5 + 59 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\rsa.c + rsa.c + 0 + 0 + + + 5 + 60 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\sha.c + sha.c + 0 + 0 + + + 5 + 61 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\sha256.c + sha256.c + 0 + 0 + + + 5 + 62 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\sha512.c + sha512.c + 0 + 0 + + + 5 + 63 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\tfm.c + tfm.c + 0 + 0 + + + + + Configuration + 1 + 0 + 0 + 0 + + 6 + 64 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\config\File_Config.c + File_Config.c + 0 + 0 + + + 6 + 65 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\config\Net_Config.c + Net_Config.c + 0 + 0 + + + 6 + 66 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\CyaSSL\config.h + config.h + 0 + 0 + + + 6 + 67 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\config\RTX_Conf_CM.c + RTX_Conf_CM.c + 0 + 0 + + + 6 + 68 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\config\Net_Debug.c + Net_Debug.c + 0 + 0 + + + 6 + 69 + 5 + 0 + 0 + 18 + 0 + 0 + 0 + 0 + ..\MDK-ARM\CyaSSL\config-FS.h + config-FS.h + 0 + 0 + + + 6 + 70 + 5 + 0 + 0 + 18 + 0 + 0 + 0 + 0 + ..\MDK-ARM\CyaSSL\config-RTX-TCP-FS.h + config-RTX-TCP-FS.h + 0 + 0 + + + 6 + 71 + 5 + 0 + 0 + 18 + 0 + 0 + 0 + 0 + ..\MDK-ARM\CyaSSL\config-BARE-METAL.h + config-BARE-METAL.h + 0 + 0 + + + 6 + 72 + 2 + 0 + 0 + 0 + 0 + 165 + 169 + 0 + ..\MDK-ARM\config\startup_stm32f2xx.s + startup_stm32f2xx.s + 0 + 0 + + + + + CyaSSL-MDK + 0 + 0 + 0 + 0 + + 7 + 73 + 1 + 1 + 0 + 0 + 0 + 200 + 216 + 0 + ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c + cyassl_MDK_ARM.c + 0 + 0 + + + 7 + 74 + 1 + 1 + 0 + 0 + 0 + 52 + 56 + 0 + ..\MDK-ARM\CyaSSL\Retarget.c + Retarget.c + 0 + 0 + + + + diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj new file mode 100644 index 000000000..20def53d7 --- /dev/null +++ b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj @@ -0,0 +1,3565 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + MDK-RTX-TCP-FS + 0x4 + ARM-ADS + + + STM32F207IG + STMicroelectronics + IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M3") + + "STARTUP\ST\STM32F2xx\startup_stm32f2xx.s" ("STM32F2xx Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000) + 5124 + stm32f2xx.h + + + + + + + + + + SFD\ST\STM32F2xx\STM32F20x.sfr + 0 + + + + ST\STM32F2xx\ + ST\STM32F2xx\ + + 0 + 0 + 0 + 0 + 1 + + .\MDK-RTX-TCP-FS\ + MDK-RTX-TCP-FS + 1 + 0 + 0 + 1 + 1 + .\Flash\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DARMSTM.DLL + -pSTM32F207IG + SARMCM3.DLL + -MPU + TARMSTM.DLL + -pSTM32F207IG + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + + 0 + 9 + + + + + + + + + + + + + ..\MDK-ARM\config\STM32_SWO.ini + BIN\ULP2CM3.DLL + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 0 + BIN\ULP2CM3.DLL + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + HAVE_CONFIG_H __DBG_ITM __RTX USE_STDPERIPH_DRIVER MDK_CONF_RTX_TCP_FS + + ..\MDK-ARM\CyaSSL;C:..\STM32F2xx_StdPeriph_Lib\inc;..\..\..\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + CyaSSL Apps + + + echoclient.c + 1 + ..\..\..\examples\echoclient\echoclient.c + + + echoserver.c + 1 + ..\..\..\examples\echoserver\echoserver.c + + + test.c + 1 + ..\..\..\ctaocrypt\test\test.c + + + benchmark.c + 1 + ..\..\..\ctaocrypt\benchmark\benchmark.c + + + client.c + 1 + ..\..\..\examples\client\client.c + + + server.c + 1 + ..\..\..\examples\server\server.c + + + shell.c + 1 + ..\MDK-ARM\CyaSSL\shell.c + + + main.c + 1 + ..\MDK-ARM\CyaSSL\main.c + + + cert_data.c + 1 + ..\MDK-ARM\CyaSSL\cert_data.c + + + + + STM32F2xx_StdPeriph_Lib + + + stm32f2xx_cryp.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_cryp.c + + + stm32f2xx_hash.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_hash.c + + + stm32f2xx_rcc.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rcc.c + + + stm32f2xx_rng.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rng.c + + + stm32f2xx_rtc.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rtc.c + + + stm32f2xx_pwr.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_pwr.c + + + stm32f2xx_tim.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_tim.c + + + + + MDK-ARM + + + Serial.c + 1 + c:\Keil\ARM\Boards\Keil\MCBSTM32F200\RL\FlashFS\SD_File\Serial.c + + + SDIO_STM32F2xx.c + 1 + c:\Keil\ARM\RL\FlashFS\Drivers\SDIO_STM32F2xx.c + + + FS_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\FS_CM3.lib + + + RTX_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\\RTX_CM3.lib + + + ETH_STM32F2xx.c + 1 + c:\Keil\ARM\RL\TCPnet\Drivers\ETH_STM32F2xx.c + + + TCPD_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\TCPD_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + TCP_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\TCP_CM3.lib + + + system_stm32f2xx.c + 1 + C:\Keil\ARM\Startup\ST\STM32F2xx\system_stm32f2xx.c + + + + + CyaSSL Library + + + crl.c + 1 + ..\..\..\src\crl.c + + + internal.c + 1 + ..\..\..\src\internal.c + + + io.c + 1 + ..\..\..\src\io.c + + + keys.c + 1 + ..\..\..\src\keys.c + + + ocsp.c + 1 + ..\..\..\src\ocsp.c + + + sniffer.c + 1 + ..\..\..\src\sniffer.c + + + ssl.c + 1 + ..\..\..\src\ssl.c + + + tls.c + 1 + ..\..\..\src\tls.c + + + ssl-dummy.c + 1 + ..\MDK-ARM\CyaSSL\ssl-dummy.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + + + Crypt/Cipher Library + + + aes.c + 1 + ..\..\..\ctaocrypt\src\aes.c + + + arc4.c + 1 + ..\..\..\ctaocrypt\src\arc4.c + + + asm.c + 1 + ..\..\..\ctaocrypt\src\asm.c + + + asn.c + 1 + ..\..\..\ctaocrypt\src\asn.c + + + camellia.c + 1 + ..\..\..\ctaocrypt\src\camellia.c + + + coding.c + 1 + ..\..\..\ctaocrypt\src\coding.c + + + des3.c + 1 + ..\..\..\ctaocrypt\src\des3.c + + + dh.c + 1 + ..\..\..\ctaocrypt\src\dh.c + + + dsa.c + 1 + ..\..\..\ctaocrypt\src\dsa.c + + + ecc.c + 1 + ..\..\..\ctaocrypt\src\ecc.c + + + ecc_fp.c + 1 + ..\..\..\ctaocrypt\src\ecc_fp.c + + + error.c + 1 + ..\..\..\ctaocrypt\src\error.c + + + hc128.c + 1 + ..\..\..\ctaocrypt\src\hc128.c + + + hmac.c + 1 + ..\..\..\ctaocrypt\src\hmac.c + + + integer.c + 1 + ..\..\..\ctaocrypt\src\integer.c + + + logging.c + 1 + ..\..\..\ctaocrypt\src\logging.c + + + md2.c + 1 + ..\..\..\ctaocrypt\src\md2.c + + + md4.c + 1 + ..\..\..\ctaocrypt\src\md4.c + + + md5.c + 1 + ..\..\..\ctaocrypt\src\md5.c + + + memory.c + 1 + ..\..\..\ctaocrypt\src\memory.c + + + misc.c + 1 + ..\..\..\ctaocrypt\src\misc.c + + + pwdbased.c + 1 + ..\..\..\ctaocrypt\src\pwdbased.c + + + rabbit.c + 1 + ..\..\..\ctaocrypt\src\rabbit.c + + + random.c + 1 + ..\..\..\ctaocrypt\src\random.c + + + ripemd.c + 1 + ..\..\..\ctaocrypt\src\ripemd.c + + + rsa.c + 1 + ..\..\..\ctaocrypt\src\rsa.c + + + sha.c + 1 + ..\..\..\ctaocrypt\src\sha.c + + + sha256.c + 1 + ..\..\..\ctaocrypt\src\sha256.c + + + sha512.c + 1 + ..\..\..\ctaocrypt\src\sha512.c + + + tfm.c + 1 + ..\..\..\ctaocrypt\src\tfm.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + + + Configuration + + + File_Config.c + 1 + ..\MDK-ARM\config\File_Config.c + + + Net_Config.c + 1 + ..\MDK-ARM\config\Net_Config.c + + + config.h + 5 + ..\MDK-ARM\CyaSSL\config.h + + + RTX_Conf_CM.c + 1 + ..\MDK-ARM\config\RTX_Conf_CM.c + + + Net_Debug.c + 1 + ..\MDK-ARM\config\Net_Debug.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + config-FS.h + 5 + ..\MDK-ARM\CyaSSL\config-FS.h + + + config-RTX-TCP-FS.h + 5 + ..\MDK-ARM\CyaSSL\config-RTX-TCP-FS.h + + + config-BARE-METAL.h + 5 + ..\MDK-ARM\CyaSSL\config-BARE-METAL.h + + + startup_stm32f2xx.s + 2 + ..\MDK-ARM\config\startup_stm32f2xx.s + + + + + CyaSSL-MDK + + + cyassl_MDK_ARM.c + 1 + ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c + + + Retarget.c + 1 + ..\MDK-ARM\CyaSSL\Retarget.c + + + + + + + MDK-FS + 0x4 + ARM-ADS + + + STM32F207IG + STMicroelectronics + IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M3") + + "STARTUP\ST\STM32F2xx\startup_stm32f2xx.s" ("STM32F2xx Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000) + 5124 + stm32f2xx.h + + + + + + + + + + SFD\ST\STM32F2xx\STM32F20x.sfr + 0 + + + + ST\STM32F2xx\ + ST\STM32F2xx\ + + 0 + 0 + 0 + 0 + 1 + + .\MDK-FS\ + MDK-FS + 1 + 0 + 0 + 1 + 1 + .\Flash\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DARMSTM.DLL + -pSTM32F207IG + SARMCM3.DLL + -MPU + TARMSTM.DLL + -pSTM32F207IG + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + + 0 + 9 + + + + + + + + + + + + + ..\MDK-ARM\config\STM32_SWO.ini + BIN\ULP2CM3.DLL + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 0 + BIN\ULP2CM3.DLL + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + HAVE_CONFIG_H __DBG_ITM USE_STDPERIPH_DRIVER MDK_CONF_FS + + ..\MDK-ARM\CyaSSL;..\MDK-ARM\inc;..\STM32F2xx_StdPeriph_Lib\inc;..\POSIX\..\..\..\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + CyaSSL Apps + + + echoclient.c + 1 + ..\..\..\examples\echoclient\echoclient.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + echoserver.c + 1 + ..\..\..\examples\echoserver\echoserver.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + test.c + 1 + ..\..\..\ctaocrypt\test\test.c + + + benchmark.c + 1 + ..\..\..\ctaocrypt\benchmark\benchmark.c + + + client.c + 1 + ..\..\..\examples\client\client.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + server.c + 1 + ..\..\..\examples\server\server.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + shell.c + 1 + ..\MDK-ARM\CyaSSL\shell.c + + + main.c + 1 + ..\MDK-ARM\CyaSSL\main.c + + + cert_data.c + 1 + ..\MDK-ARM\CyaSSL\cert_data.c + + + + + STM32F2xx_StdPeriph_Lib + + + stm32f2xx_cryp.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_cryp.c + + + stm32f2xx_hash.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_hash.c + + + stm32f2xx_rcc.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rcc.c + + + stm32f2xx_rng.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rng.c + + + stm32f2xx_rtc.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rtc.c + + + stm32f2xx_pwr.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_pwr.c + + + stm32f2xx_tim.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_tim.c + + + + + MDK-ARM + + + Serial.c + 1 + c:\Keil\ARM\Boards\Keil\MCBSTM32F200\RL\FlashFS\SD_File\Serial.c + + + SDIO_STM32F2xx.c + 1 + c:\Keil\ARM\RL\FlashFS\Drivers\SDIO_STM32F2xx.c + + + FS_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\FS_CM3.lib + + + RTX_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\\RTX_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + ETH_STM32F2xx.c + 1 + c:\Keil\ARM\RL\TCPnet\Drivers\ETH_STM32F2xx.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + TCPD_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\TCPD_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + TCP_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\TCP_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + system_stm32f2xx.c + 1 + C:\Keil\ARM\Startup\ST\STM32F2xx\system_stm32f2xx.c + + + + + CyaSSL Library + + + crl.c + 1 + ..\..\..\src\crl.c + + + internal.c + 1 + ..\..\..\src\internal.c + + + io.c + 1 + ..\..\..\src\io.c + + + keys.c + 1 + ..\..\..\src\keys.c + + + ocsp.c + 1 + ..\..\..\src\ocsp.c + + + sniffer.c + 1 + ..\..\..\src\sniffer.c + + + ssl.c + 1 + ..\..\..\src\ssl.c + + + tls.c + 1 + ..\..\..\src\tls.c + + + ssl-dummy.c + 1 + ..\MDK-ARM\CyaSSL\ssl-dummy.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + + + Crypt/Cipher Library + + + aes.c + 1 + ..\..\..\ctaocrypt\src\aes.c + + + arc4.c + 1 + ..\..\..\ctaocrypt\src\arc4.c + + + asm.c + 1 + ..\..\..\ctaocrypt\src\asm.c + + + asn.c + 1 + ..\..\..\ctaocrypt\src\asn.c + + + camellia.c + 1 + ..\..\..\ctaocrypt\src\camellia.c + + + coding.c + 1 + ..\..\..\ctaocrypt\src\coding.c + + + des3.c + 1 + ..\..\..\ctaocrypt\src\des3.c + + + dh.c + 1 + ..\..\..\ctaocrypt\src\dh.c + + + dsa.c + 1 + ..\..\..\ctaocrypt\src\dsa.c + + + ecc.c + 1 + ..\..\..\ctaocrypt\src\ecc.c + + + ecc_fp.c + 1 + ..\..\..\ctaocrypt\src\ecc_fp.c + + + error.c + 1 + ..\..\..\ctaocrypt\src\error.c + + + hc128.c + 1 + ..\..\..\ctaocrypt\src\hc128.c + + + hmac.c + 1 + ..\..\..\ctaocrypt\src\hmac.c + + + integer.c + 1 + ..\..\..\ctaocrypt\src\integer.c + + + logging.c + 1 + ..\..\..\ctaocrypt\src\logging.c + + + md2.c + 1 + ..\..\..\ctaocrypt\src\md2.c + + + md4.c + 1 + ..\..\..\ctaocrypt\src\md4.c + + + md5.c + 1 + ..\..\..\ctaocrypt\src\md5.c + + + memory.c + 1 + ..\..\..\ctaocrypt\src\memory.c + + + misc.c + 1 + ..\..\..\ctaocrypt\src\misc.c + + + pwdbased.c + 1 + ..\..\..\ctaocrypt\src\pwdbased.c + + + rabbit.c + 1 + ..\..\..\ctaocrypt\src\rabbit.c + + + random.c + 1 + ..\..\..\ctaocrypt\src\random.c + + + ripemd.c + 1 + ..\..\..\ctaocrypt\src\ripemd.c + + + rsa.c + 1 + ..\..\..\ctaocrypt\src\rsa.c + + + sha.c + 1 + ..\..\..\ctaocrypt\src\sha.c + + + sha256.c + 1 + ..\..\..\ctaocrypt\src\sha256.c + + + sha512.c + 1 + ..\..\..\ctaocrypt\src\sha512.c + + + tfm.c + 1 + ..\..\..\ctaocrypt\src\tfm.c + + + + + Configuration + + + File_Config.c + 1 + ..\MDK-ARM\config\File_Config.c + + + Net_Config.c + 1 + ..\MDK-ARM\config\Net_Config.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + config.h + 5 + ..\MDK-ARM\CyaSSL\config.h + + + RTX_Conf_CM.c + 1 + ..\MDK-ARM\config\RTX_Conf_CM.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + Net_Debug.c + 1 + ..\MDK-ARM\config\Net_Debug.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + config-FS.h + 5 + ..\MDK-ARM\CyaSSL\config-FS.h + + + config-RTX-TCP-FS.h + 5 + ..\MDK-ARM\CyaSSL\config-RTX-TCP-FS.h + + + config-BARE-METAL.h + 5 + ..\MDK-ARM\CyaSSL\config-BARE-METAL.h + + + startup_stm32f2xx.s + 2 + ..\MDK-ARM\config\startup_stm32f2xx.s + + + + + CyaSSL-MDK + + + cyassl_MDK_ARM.c + 1 + ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c + + + Retarget.c + 1 + ..\MDK-ARM\CyaSSL\Retarget.c + + + + + + + MDK-BARE-METAL + 0x4 + ARM-ADS + + + STM32F207IG + STMicroelectronics + IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M3") + + "STARTUP\ST\STM32F2xx\startup_stm32f2xx.s" ("STM32F2xx Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000) + 5124 + stm32f2xx.h + + + + + + + + + + SFD\ST\STM32F2xx\STM32F20x.sfr + 0 + + + + ST\STM32F2xx\ + ST\STM32F2xx\ + + 0 + 0 + 0 + 0 + 1 + + .\MDK-BARE-METAL\ + MDK-BARE-METAL + 1 + 0 + 0 + 1 + 1 + .\Flash\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DARMSTM.DLL + -pSTM32F207IG + SARMCM3.DLL + -MPU + TARMSTM.DLL + -pSTM32F207IG + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + + 0 + 9 + + + + + + + + + + + + + ..\MDK-ARM\config\STM32_SWO.ini + BIN\ULP2CM3.DLL + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 0 + BIN\ULP2CM3.DLL + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + HAVE_CONFIG_H __DBG_ITM USE_STDPERIPH_DRIVER MDK_CONF_BARE_METAL + + ..\MDK-ARM\CyaSSL;..\MDK-ARM\inc;..\STM32F2xx_StdPeriph_Lib\inc;..\POSIX;..\..\..\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + CyaSSL Apps + + + echoclient.c + 1 + ..\..\..\examples\echoclient\echoclient.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + echoserver.c + 1 + ..\..\..\examples\echoserver\echoserver.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + test.c + 1 + ..\..\..\ctaocrypt\test\test.c + + + benchmark.c + 1 + ..\..\..\ctaocrypt\benchmark\benchmark.c + + + client.c + 1 + ..\..\..\examples\client\client.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + server.c + 1 + ..\..\..\examples\server\server.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + shell.c + 1 + ..\MDK-ARM\CyaSSL\shell.c + + + main.c + 1 + ..\MDK-ARM\CyaSSL\main.c + + + cert_data.c + 1 + ..\MDK-ARM\CyaSSL\cert_data.c + + + + + STM32F2xx_StdPeriph_Lib + + + stm32f2xx_cryp.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_cryp.c + + + stm32f2xx_hash.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_hash.c + + + stm32f2xx_rcc.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rcc.c + + + stm32f2xx_rng.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rng.c + + + stm32f2xx_rtc.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_rtc.c + + + stm32f2xx_pwr.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_pwr.c + + + stm32f2xx_tim.c + 1 + ..\STM32F2xx_StdPeriph_Lib\src\stm32f2xx_tim.c + + + + + MDK-ARM + + + Serial.c + 1 + c:\Keil\ARM\Boards\Keil\MCBSTM32F200\RL\FlashFS\SD_File\Serial.c + + + SDIO_STM32F2xx.c + 1 + c:\Keil\ARM\RL\FlashFS\Drivers\SDIO_STM32F2xx.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + FS_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\FS_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + RTX_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\\RTX_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + ETH_STM32F2xx.c + 1 + c:\Keil\ARM\RL\TCPnet\Drivers\ETH_STM32F2xx.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + TCPD_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\TCPD_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + TCP_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\TCP_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + system_stm32f2xx.c + 1 + C:\Keil\ARM\Startup\ST\STM32F2xx\system_stm32f2xx.c + + + + + CyaSSL Library + + + crl.c + 1 + ..\..\..\src\crl.c + + + internal.c + 1 + ..\..\..\src\internal.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + io.c + 1 + ..\..\..\src\io.c + + + keys.c + 1 + ..\..\..\src\keys.c + + + ocsp.c + 1 + ..\..\..\src\ocsp.c + + + sniffer.c + 1 + ..\..\..\src\sniffer.c + + + ssl.c + 1 + ..\..\..\src\ssl.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + tls.c + 1 + ..\..\..\src\tls.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + ssl-dummy.c + 1 + ..\MDK-ARM\CyaSSL\ssl-dummy.c + + + + + Crypt/Cipher Library + + + aes.c + 1 + ..\..\..\ctaocrypt\src\aes.c + + + arc4.c + 1 + ..\..\..\ctaocrypt\src\arc4.c + + + asm.c + 1 + ..\..\..\ctaocrypt\src\asm.c + + + asn.c + 1 + ..\..\..\ctaocrypt\src\asn.c + + + camellia.c + 1 + ..\..\..\ctaocrypt\src\camellia.c + + + coding.c + 1 + ..\..\..\ctaocrypt\src\coding.c + + + des3.c + 1 + ..\..\..\ctaocrypt\src\des3.c + + + dh.c + 1 + ..\..\..\ctaocrypt\src\dh.c + + + dsa.c + 1 + ..\..\..\ctaocrypt\src\dsa.c + + + ecc.c + 1 + ..\..\..\ctaocrypt\src\ecc.c + + + ecc_fp.c + 1 + ..\..\..\ctaocrypt\src\ecc_fp.c + + + error.c + 1 + ..\..\..\ctaocrypt\src\error.c + + + hc128.c + 1 + ..\..\..\ctaocrypt\src\hc128.c + + + hmac.c + 1 + ..\..\..\ctaocrypt\src\hmac.c + + + integer.c + 1 + ..\..\..\ctaocrypt\src\integer.c + + + logging.c + 1 + ..\..\..\ctaocrypt\src\logging.c + + + md2.c + 1 + ..\..\..\ctaocrypt\src\md2.c + + + md4.c + 1 + ..\..\..\ctaocrypt\src\md4.c + + + md5.c + 1 + ..\..\..\ctaocrypt\src\md5.c + + + memory.c + 1 + ..\..\..\ctaocrypt\src\memory.c + + + misc.c + 1 + ..\..\..\ctaocrypt\src\misc.c + + + pwdbased.c + 1 + ..\..\..\ctaocrypt\src\pwdbased.c + + + rabbit.c + 1 + ..\..\..\ctaocrypt\src\rabbit.c + + + random.c + 1 + ..\..\..\ctaocrypt\src\random.c + + + ripemd.c + 1 + ..\..\..\ctaocrypt\src\ripemd.c + + + rsa.c + 1 + ..\..\..\ctaocrypt\src\rsa.c + + + sha.c + 1 + ..\..\..\ctaocrypt\src\sha.c + + + sha256.c + 1 + ..\..\..\ctaocrypt\src\sha256.c + + + sha512.c + 1 + ..\..\..\ctaocrypt\src\sha512.c + + + tfm.c + 1 + ..\..\..\ctaocrypt\src\tfm.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + + + Configuration + + + File_Config.c + 1 + ..\MDK-ARM\config\File_Config.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + Net_Config.c + 1 + ..\MDK-ARM\config\Net_Config.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + config.h + 5 + ..\MDK-ARM\CyaSSL\config.h + + + RTX_Conf_CM.c + 1 + ..\MDK-ARM\config\RTX_Conf_CM.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + Net_Debug.c + 1 + ..\MDK-ARM\config\Net_Debug.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + config-FS.h + 5 + ..\MDK-ARM\CyaSSL\config-FS.h + + + config-RTX-TCP-FS.h + 5 + ..\MDK-ARM\CyaSSL\config-RTX-TCP-FS.h + + + config-BARE-METAL.h + 5 + ..\MDK-ARM\CyaSSL\config-BARE-METAL.h + + + startup_stm32f2xx.s + 2 + ..\MDK-ARM\config\startup_stm32f2xx.s + + + + + CyaSSL-MDK + + + cyassl_MDK_ARM.c + 1 + ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c + + + Retarget.c + 1 + ..\MDK-ARM\CyaSSL\Retarget.c + + + + + + + + diff --git a/configure.ac b/configure.ac index fbad0b191..c1d02e8af 100644 --- a/configure.ac +++ b/configure.ac @@ -1061,7 +1061,8 @@ if test "$ENABLED_VALGRIND" = "yes" then AC_CHECK_PROG([HAVE_VALGRIND],[valgrind],[yes],[no]) - if [["$HAVE_VALGRIND" = "no" ]]; then + if test "$HAVE_VALGRIND" = "no" + then AC_MSG_ERROR([Valgrind not found.]) fi enable_shared=no diff --git a/ctaocrypt/benchmark/benchmark.c b/ctaocrypt/benchmark/benchmark.c index 62f80024e..dbc30c9ad 100644 --- a/ctaocrypt/benchmark/benchmark.c +++ b/ctaocrypt/benchmark/benchmark.c @@ -53,7 +53,12 @@ #endif #if defined(USE_CERT_BUFFERS_1024) || defined(USE_CERT_BUFFERS_2048) /* include test cert and key buffers for use with NO_FILESYSTEM */ - #include + #if defined(CYASSL_MDK_ARM) + #include "cert_data.h" /* use certs_test.c for initial data, + so other commands can share the data. */ + #else + #include + #endif #endif @@ -118,13 +123,19 @@ static int OpenNitroxDevice(int dma_mode,int dev_id) /* so embedded projects can pull in tests on their own */ -#ifndef NO_MAIN_DRIVER +#if !defined(NO_MAIN_DRIVER) int main(int argc, char** argv) + { (void)argc; (void)argv; -#ifdef HAVE_CAVIUM +#else +int benchmark_test(void *args) +{ +#endif + + #ifdef HAVE_CAVIUM int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID); if (ret != 0) { printf("Cavium OpenNitroxDevice failed\n"); @@ -200,7 +211,6 @@ int main(int argc, char** argv) return 0; } -#endif /* NO_MAIN_DRIVER */ #ifdef BENCH_EMBEDDED const int numBlocks = 25; /* how many kB/megs to test (en/de)cryption */ @@ -659,6 +669,19 @@ RNG rng; #endif #ifndef NO_RSA + + +#if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) && \ + defined(CYASSL_MDK_SHELL) +static char *certRSAname = "certs/rsa2048.der" ; +void set_Bench_RSA_File(char * cert) { certRSAname = cert ; } + /* set by shell command */ +#elif defined(CYASSL_MDK_SHELL) + /* nothing */ +#else +static const char *certRSAname = "certs/rsa2048.der" ; +#endif + void bench_rsa(void) { int i; @@ -676,18 +699,17 @@ void bench_rsa(void) int rsaKeySz = 2048; /* used in printf */ #ifdef USE_CERT_BUFFERS_1024 - XMEMCPY(tmp, rsa_key_der_1024, sizeof(rsa_key_der_1024)); - bytes = sizeof(rsa_key_der_1024); + XMEMCPY(tmp, rsa_key_der_1024, sizeof_rsa_key_der_1024); + bytes = sizeof_rsa_key_der_1024; rsaKeySz = 1024; #elif defined(USE_CERT_BUFFERS_2048) - XMEMCPY(tmp, rsa_key_der_2048, sizeof(rsa_key_der_2048)); - bytes = sizeof(rsa_key_der_2048); + XMEMCPY(tmp, rsa_key_der_2048, sizeof_rsa_key_der_2048); + bytes = sizeof_rsa_key_der_2048; #else - FILE* file = fopen("./certs/rsa2048.der", "rb"); + FILE* file = fopen(certRSAname, "rb"); if (!file) { - printf("can't find ./certs/rsa2048.der, " - "Please run from CyaSSL home dir\n"); + printf("can't find %s, Please run from CyaSSL home dir\n", certRSAname); return; } @@ -695,6 +717,7 @@ void bench_rsa(void) fclose(file); #endif /* USE_CERT_BUFFERS */ + #ifdef HAVE_CAVIUM if (RsaInitCavium(&rsaKey, CAVIUM_DEV_ID) != 0) printf("RSA init cavium failed\n"); @@ -747,6 +770,19 @@ void bench_rsa(void) #ifndef NO_DH + + +#if !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) && \ + defined(CYASSL_MDK_SHELL) +static char *certDHname = "certs/dh2048.der" ; +void set_Bench_DH_File(char * cert) { certDHname = cert ; } + /* set by shell command */ +#elif defined(CYASSL_MDK_SHELL) + /* nothing */ +#else +static const char *certDHname = "certs/dh2048.der" ; +#endif + void bench_dh(void) { int i; @@ -764,25 +800,26 @@ void bench_dh(void) DhKey dhKey; int dhKeySz = 2048; /* used in printf */ + #ifdef USE_CERT_BUFFERS_1024 - XMEMCPY(tmp, dh_key_der_1024, sizeof(dh_key_der_1024)); - bytes = sizeof(dh_key_der_1024); + XMEMCPY(tmp, dh_key_der_1024, sizeof_dh_key_der_1024); + bytes = sizeof_dh_key_der_1024; dhKeySz = 1024; #elif defined(USE_CERT_BUFFERS_2048) - XMEMCPY(tmp, dh_key_der_2048, sizeof(dh_key_der_2048)); - bytes = sizeof(dh_key_der_2048); + XMEMCPY(tmp, dh_key_der_2048, sizeof_dh_key_der_2048); + bytes = sizeof_dh_key_der_2048; #else - FILE* file = fopen("./certs/dh2048.der", "rb"); + FILE* file = fopen(certDHname, "rb"); if (!file) { - printf("can't find ./certs/dh2048.der, " - "Please run from CyaSSL home dir\n"); + printf("can't find %s, Please run from CyaSSL home dir\n", certDHname); return; } bytes = fread(tmp, 1, sizeof(tmp), file); #endif /* USE_CERT_BUFFERS */ + InitDhKey(&dhKey); bytes = DhKeyDecode(tmp, &idx, &dhKey, (word32)bytes); if (bytes != 0) { @@ -1001,7 +1038,9 @@ void bench_eccKeyAgree(void) /* return seconds as a double */ return ( ns / 1000000000.0 ); } - + +#elif defined CYASSL_MDK_ARM + extern double current_time(int reset) ; #else #include diff --git a/ctaocrypt/src/aes.c b/ctaocrypt/src/aes.c index e0fd66424..26cb53c53 100644 --- a/ctaocrypt/src/aes.c +++ b/ctaocrypt/src/aes.c @@ -59,7 +59,8 @@ * document (See note in README). */ #include "stm32f2xx.h" - + #include "stm32f2xx_cryp.h" + int AesSetKey(Aes* aes, const byte* userKey, word32 keylen, const byte* iv, int dir) { @@ -2212,8 +2213,9 @@ static void GHASH(Aes* aes, const byte* a, word32 aSz, static void GMULT(word64* X, word64* Y) { word64 Z[2] = {0,0}; - word64 V[2] = {X[0], X[1]}; - int i, j; + word64 V[2] ; + int i, j; + V[0] = X[0] ; V[1] = X[1] ; for (i = 0; i < 2; i++) { @@ -2312,7 +2314,8 @@ static void GHASH(Aes* aes, const byte* a, word32 aSz, /* Hash in the lengths in bits of A and C */ { - word64 len[2] = {aSz, cSz}; + word64 len[2] ; + len[0] = aSz ; len[1] = cSz; /* Lengths are in bytes. Convert to bits. */ len[0] *= 8; @@ -2334,9 +2337,11 @@ static void GHASH(Aes* aes, const byte* a, word32 aSz, static void GMULT(word32* X, word32* Y) { word32 Z[4] = {0,0,0,0}; - word32 V[4] = {X[0], X[1], X[2], X[3]}; + word32 V[4] ; int i, j; + V[0] = X[0]; V[1] = X[1]; V[2] = X[2]; V[3] = X[3]; + for (i = 0; i < 4; i++) { word32 y = Y[i]; @@ -2717,7 +2722,7 @@ int AesCcmDecrypt(Aes* aes, byte* out, const byte* in, word32 inSz, byte A[AES_BLOCK_SIZE]; byte B[AES_BLOCK_SIZE]; byte* o; - word32 i, lenSz, oSz, result = 0; + word32 i, lenSz, oSz; int result = 0; o = out; oSz = inSz; diff --git a/ctaocrypt/src/asn.c b/ctaocrypt/src/asn.c index 3b930cc7d..99e28e539 100644 --- a/ctaocrypt/src/asn.c +++ b/ctaocrypt/src/asn.c @@ -44,8 +44,10 @@ #include #include #include + #include + #ifndef NO_RC4 #include #endif @@ -93,11 +95,20 @@ #endif #define NO_TIME_H /* since Micrium not defining XTIME or XGMTIME, CERT_GEN not available */ -#elif defined(MICROCHIP_TCPIP) +#elif defined(MICROCHIP_TCPIP_V5) || defined(MICROCHIP_TCPIP) #include #define XTIME(t1) pic32_time((t1)) #define XGMTIME(c) gmtime((c)) #define XVALIDATE_DATE(d, f, t) ValidateDate((d), (f), (t)) +#elif defined(CYASSL_MDK_ARM) + #include + #undef RNG + #include "cyassl_MDK_ARM.h" + #undef RNG + #define RNG CyaSSL_RNG /*for avoiding name conflict in "stm32f2xx.h" */ + #define XTIME(tl) (0) + #define XGMTIME(c) Cyassl_MDK_gmtime((c)) + #define XVALIDATE_DATE(d, f, t) ValidateDate((d), (f), (t)) #elif defined(USER_TIME) /* user time, and gmtime compatible functions, there is a gmtime implementation here that WINCE uses, so really just need some ticks @@ -129,7 +140,7 @@ #else /* default */ /* uses complete facility */ - #include + #include #define XTIME(tl) time((tl)) #define XGMTIME(c) gmtime((c)) #define XVALIDATE_DATE(d, f, t) ValidateDate((d), (f), (t)) @@ -244,7 +255,7 @@ struct tm* my_gmtime(const time_t* timer) /* has a gmtime() but hangs */ #endif /* THREADX */ -#ifdef MICROCHIP_TCPIP +#if defined(MICROCHIP_TCPIP_V5) || defined(MICROCHIP_TCPIP) /* * time() is just a stub in Microchip libraries. We need our own @@ -252,7 +263,11 @@ struct tm* my_gmtime(const time_t* timer) /* has a gmtime() but hangs */ */ time_t pic32_time(time_t* timer) { +#ifdef MICROCHIP_TCPIP_V5 DWORD sec = 0; +#else + uint32_t sec = 0; +#endif time_t localTime; if (timer == NULL) @@ -462,7 +477,8 @@ static int GetShortInt(const byte* input, word32* inOutIdx, int* number) return *number; } -#endif +#endif /* !NO_PWDBASED */ + /* May not have one, not an error */ static int GetExplicitVersion(const byte* input, word32* inOutIdx, int* version) @@ -1377,7 +1393,7 @@ static int GetKey(DecodedCert* cert) return StoreRsaKey(cert); } - break; + #endif /* NO_RSA */ #ifdef HAVE_NTRU case NTRUk: @@ -1782,8 +1798,8 @@ int ValidateDate(const byte* date, byte format, int dateType) GetTime(&certTime.tm_hour, date, &i); GetTime(&certTime.tm_min, date, &i); GetTime(&certTime.tm_sec, date, &i); - - if (date[i] != 'Z') { /* only Zulu supported for this profile */ + + if (date[i] != 'Z') { /* only Zulu supported for this profile */ CYASSL_MSG("Only Zulu time supported for this profile"); return 0; } @@ -2307,7 +2323,7 @@ static int ConfirmSignature(const byte* buf, word32 bufSz, FreeRsaKey(&pubKey); return ret; } - break; + #endif /* NO_RSA */ #ifdef HAVE_ECC case ECDSAk: @@ -3396,28 +3412,28 @@ static const char* GetOneName(CertName* name, int idx) switch (idx) { case 0: return name->country; - break; + case 1: return name->state; - break; + case 2: return name->locality; - break; + case 3: return name->sur; - break; + case 4: return name->org; - break; + case 5: return name->unit; - break; + case 6: return name->commonName; - break; + case 7: return name->email; - break; + default: return 0; } @@ -3430,29 +3446,29 @@ static byte GetNameId(int idx) switch (idx) { case 0: return ASN_COUNTRY_NAME; - break; + case 1: return ASN_STATE_NAME; - break; + case 2: return ASN_LOCALITY_NAME; - break; + case 3: return ASN_SUR_NAME; - break; + case 4: return ASN_ORG_NAME; - break; + case 5: return ASN_ORGUNIT_NAME; - break; + case 6: return ASN_COMMON_NAME; - break; + case 7: /* email uses different id type */ return 0; - break; + default: return 0; } @@ -3602,10 +3618,14 @@ static int SetName(byte* output, CertName* name) return totalBytes; } - /* encode info from cert into DER enocder format */ -static int EncodeCert(Cert* cert, DerCert* der, RsaKey* rsaKey, RNG* rng, - const byte* ntruKey, word16 ntruSz) +static int EncodeCert( +Cert* cert, +DerCert* der, +RsaKey* rsaKey, +RNG* rng, + const byte* ntruKey, +word16 ntruSz) { (void)ntruKey; (void)ntruSz; @@ -5305,5 +5325,5 @@ int ParseCRL(DecodedCRL* dcrl, const byte* buff, word32 sz, void* cm) } #endif /* HAVE_CRL */ - #endif + diff --git a/ctaocrypt/src/des3.c b/ctaocrypt/src/des3.c index ea3034e0e..473e5e007 100644 --- a/ctaocrypt/src/des3.c +++ b/ctaocrypt/src/des3.c @@ -51,6 +51,7 @@ * Peripheral Library document (See note in README). */ #include "stm32f2xx.h" + #include "stm32f2xx_cryp.h" void Des_SetKey(Des* des, const byte* key, const byte* iv, int dir) { diff --git a/ctaocrypt/src/hc128.c b/ctaocrypt/src/hc128.c index 4913d6b49..7d5090b89 100644 --- a/ctaocrypt/src/hc128.c +++ b/ctaocrypt/src/hc128.c @@ -32,6 +32,7 @@ #include #ifdef NO_INLINE #include + #include #else #include #endif diff --git a/ctaocrypt/src/hmac.c b/ctaocrypt/src/hmac.c index 532baefb2..f9a8b0adf 100644 --- a/ctaocrypt/src/hmac.c +++ b/ctaocrypt/src/hmac.c @@ -38,7 +38,6 @@ word32 length); #endif - static int InitHmac(Hmac* hmac, int type) { hmac->innerHashKeyed = 0; diff --git a/ctaocrypt/src/logging.c b/ctaocrypt/src/logging.c index c3df749bc..061fe6273 100644 --- a/ctaocrypt/src/logging.c +++ b/ctaocrypt/src/logging.c @@ -111,6 +111,10 @@ static void cyassl_log(const int logLevel, const char *const logMessage) #if (NET_SECURE_MGR_CFG_EN == DEF_ENABLED) NetSecure_TraceOut((CPU_CHAR *)logMessage); #endif +#elif defined(CYASSL_MDK_ARM) + fflush(stdout) ; + printf("%s\n", logMessage); + fflush(stdout) ; #else fprintf(stderr, "%s\n", logMessage); #endif diff --git a/ctaocrypt/src/md5.c b/ctaocrypt/src/md5.c index 48c9c9426..176bf44cd 100644 --- a/ctaocrypt/src/md5.c +++ b/ctaocrypt/src/md5.c @@ -53,6 +53,7 @@ * md5->loLen = num bytes that have been written to STM32 FIFO */ XMEMSET(md5->buffer, 0, MD5_REG_SIZE); + md5->buffLen = 0; md5->loLen = 0; diff --git a/ctaocrypt/src/memory.c b/ctaocrypt/src/memory.c index 4e84e4858..ce80ae373 100644 --- a/ctaocrypt/src/memory.c +++ b/ctaocrypt/src/memory.c @@ -25,13 +25,19 @@ #include -/* submitted by eof */ - #ifdef USE_CYASSL_MEMORY #include #include +#ifdef CYASSL_MALLOC_CHECK +#include +static void err_sys(const char* msg) +{ + printf("error = %s\n", msg); + return; +} +#endif /* Set these to default values initially. */ static CyaSSL_Malloc_cb malloc_function = 0; @@ -71,7 +77,11 @@ void* CyaSSL_Malloc(size_t size) res = malloc_function(size); else res = malloc(size); - + #ifdef CYASSL_MALLOC_CHECK + if(res == NULL) + err_sys("CyaSSL_malloc") ; + #endif + return res; } diff --git a/ctaocrypt/src/misc.c b/ctaocrypt/src/misc.c index 4b01a4706..453608957 100644 --- a/ctaocrypt/src/misc.c +++ b/ctaocrypt/src/misc.c @@ -172,7 +172,5 @@ STATIC INLINE void xorbuf(byte* buf, const byte* mask, word32 count) for (i = 0; i < count; i++) buf[i] ^= mask[i]; } } - - #undef STATIC diff --git a/ctaocrypt/src/pwdbased.c b/ctaocrypt/src/pwdbased.c index f6acc282a..61fcdd0ba 100644 --- a/ctaocrypt/src/pwdbased.c +++ b/ctaocrypt/src/pwdbased.c @@ -31,9 +31,10 @@ #include #include #include -#ifdef CYASSL_SHA512 +#if defined(CYASSL_SHA512) || defined(CYASSL_SHA384) #include #endif + #ifdef NO_INLINE #include #else diff --git a/ctaocrypt/src/rabbit.c b/ctaocrypt/src/rabbit.c index dee504361..baa465eb7 100644 --- a/ctaocrypt/src/rabbit.c +++ b/ctaocrypt/src/rabbit.c @@ -249,25 +249,27 @@ static INLINE int DoProcess(Rabbit* ctx, byte* output, const byte* input, if (msglen) { word32 i; - byte buffer[16]; + word32 tmp[4]; + byte* buffer = (byte*)tmp; + + XMEMSET(tmp, 0, sizeof(tmp)); /* help static analysis */ /* Iterate the system */ RABBIT_next_state(&(ctx->workCtx)); /* Generate 16 bytes of pseudo-random data */ - *(word32*)(buffer+ 0) = LITTLE32(ctx->workCtx.x[0] ^ + tmp[0] = LITTLE32(ctx->workCtx.x[0] ^ (ctx->workCtx.x[5]>>16) ^ U32V(ctx->workCtx.x[3]<<16)); - *(word32*)(buffer+ 4) = LITTLE32(ctx->workCtx.x[2] ^ + tmp[1] = LITTLE32(ctx->workCtx.x[2] ^ (ctx->workCtx.x[7]>>16) ^ U32V(ctx->workCtx.x[5]<<16)); - *(word32*)(buffer+ 8) = LITTLE32(ctx->workCtx.x[4] ^ + tmp[2] = LITTLE32(ctx->workCtx.x[4] ^ (ctx->workCtx.x[1]>>16) ^ U32V(ctx->workCtx.x[7]<<16)); - *(word32*)(buffer+12) = LITTLE32(ctx->workCtx.x[6] ^ + tmp[3] = LITTLE32(ctx->workCtx.x[6] ^ (ctx->workCtx.x[3]>>16) ^ U32V(ctx->workCtx.x[1]<<16)); /* Encrypt/decrypt the data */ for (i=0; i #include #else - #ifndef NO_DEV_RANDOM - #include + #if !defined(NO_DEV_RANDOM) && !defined(CYASSL_MDK_ARM) + #include #ifndef EBSNET #include #endif @@ -541,8 +541,9 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz) #endif /* FREESCALE_K70_RNGA */ #elif defined(STM32F2_RNG) - + #undef RNG #include "stm32f2xx_rng.h" + #include "stm32f2xx_rcc.h" /* * Generate a RNG seed using the hardware random number generator * on the STM32F2. Documentation located in STM32F2xx Standard Peripheral @@ -571,8 +572,13 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz) #elif defined(NO_DEV_RANDOM) -#warning "you need to write an os specific GenerateSeed() here" - +#error "you need to write an os specific GenerateSeed() here" +/* +int GenerateSeed(OS_Seed* os, byte* output, word32 sz) +{ + return 0; +} +*/ #else /* !USE_WINDOWS_API && !THREADX && !MICRIUM && !NO_DEV_RANDOM */ diff --git a/ctaocrypt/src/sha.c b/ctaocrypt/src/sha.c index 985cd9d2b..20d2261f5 100644 --- a/ctaocrypt/src/sha.c +++ b/ctaocrypt/src/sha.c @@ -43,7 +43,8 @@ * document (See note in README). */ #include "stm32f2xx.h" - + #include "stm32f2xx_hash.h" + void InitSha(Sha* sha) { /* STM32F2 struct notes: diff --git a/ctaocrypt/test/test.c b/ctaocrypt/test/test.c index e43b22d64..4d832524c 100644 --- a/ctaocrypt/test/test.c +++ b/ctaocrypt/test/test.c @@ -25,6 +25,8 @@ #include +#ifndef NO_CRYPT_TEST + #ifdef CYASSL_TEST_CERT #include #else @@ -72,11 +74,19 @@ #include #endif + #if defined(USE_CERT_BUFFERS_1024) || defined(USE_CERT_BUFFERS_2048) /* include test cert and key buffers for use with NO_FILESYSTEM */ - #include + #if defined(CYASSL_MDK_ARM) + #include "cert_data.h" + /* use certs_test.c for initial data, so other + commands can share the data. */ + #else + #include + #endif #endif + #ifdef HAVE_NTRU #include "crypto_ntru.h" #endif @@ -86,14 +96,12 @@ #include "cavium_ioctl.h" #endif -#include #ifdef FREESCALE_MQX #include #include #else #include #endif -#include #ifdef THREADX @@ -159,10 +167,10 @@ int pbkdf2_test(void); static void err_sys(const char* msg, int es) { printf("%s error = %d\n", msg, es); -#ifndef THREADX - if (msg) + #if !defined(THREADX) && !defined(CYASSL_MDK_ARM) + if (msg) exit(es); -#endif + #endif return; } @@ -193,63 +201,63 @@ void ctaocrypt_test(void* args) #ifndef NO_MD5 - if ( (ret = md5_test()) ) + if ( (ret = md5_test()) != 0) err_sys("MD5 test failed!\n", ret); else printf( "MD5 test passed!\n"); #endif #ifdef CYASSL_MD2 - if ( (ret = md2_test()) ) + if ( (ret = md2_test()) != 0) err_sys("MD2 test failed!\n", ret); else printf( "MD2 test passed!\n"); #endif #ifndef NO_MD4 - if ( (ret = md4_test()) ) + if ( (ret = md4_test()) != 0) err_sys("MD4 test failed!\n", ret); else printf( "MD4 test passed!\n"); #endif #ifndef NO_SHA - if ( (ret = sha_test()) ) + if ( (ret = sha_test()) != 0) err_sys("SHA test failed!\n", ret); else printf( "SHA test passed!\n"); #endif #ifndef NO_SHA256 - if ( (ret = sha256_test()) ) + if ( (ret = sha256_test()) != 0) err_sys("SHA-256 test failed!\n", ret); else printf( "SHA-256 test passed!\n"); #endif #ifdef CYASSL_SHA384 - if ( (ret = sha384_test()) ) + if ( (ret = sha384_test()) != 0) err_sys("SHA-384 test failed!\n", ret); else printf( "SHA-384 test passed!\n"); #endif #ifdef CYASSL_SHA512 - if ( (ret = sha512_test()) ) + if ( (ret = sha512_test()) != 0) err_sys("SHA-512 test failed!\n", ret); else printf( "SHA-512 test passed!\n"); #endif #ifdef CYASSL_RIPEMD - if ( (ret = ripemd_test()) ) + if ( (ret = ripemd_test()) != 0) err_sys("RIPEMD test failed!\n", ret); else printf( "RIPEMD test passed!\n"); #endif #ifdef HAVE_BLAKE2 - if ( (ret = blake2b_test()) ) + if ( (ret = blake2b_test()) != 0) err_sys("BLAKE2b test failed!\n", ret); else printf( "BLAKE2b test passed!\n"); @@ -257,35 +265,35 @@ void ctaocrypt_test(void* args) #ifndef NO_HMAC #ifndef NO_MD5 - if ( (ret = hmac_md5_test()) ) + if ( (ret = hmac_md5_test()) != 0) err_sys("HMAC-MD5 test failed!\n", ret); else printf( "HMAC-MD5 test passed!\n"); #endif #ifndef NO_SHA - if ( (ret = hmac_sha_test()) ) + if ( (ret = hmac_sha_test()) != 0) err_sys("HMAC-SHA test failed!\n", ret); else printf( "HMAC-SHA test passed!\n"); #endif #ifndef NO_SHA256 - if ( (ret = hmac_sha256_test()) ) + if ( (ret = hmac_sha256_test()) != 0) err_sys("HMAC-SHA256 test failed!\n", ret); else printf( "HMAC-SHA256 test passed!\n"); #endif #ifdef CYASSL_SHA384 - if ( (ret = hmac_sha384_test()) ) + if ( (ret = hmac_sha384_test()) != 0) err_sys("HMAC-SHA384 test failed!\n", ret); else printf( "HMAC-SHA384 test passed!\n"); #endif #ifdef CYASSL_SHA512 - if ( (ret = hmac_sha512_test()) ) + if ( (ret = hmac_sha512_test()) != 0) err_sys("HMAC-SHA512 test failed!\n", ret); else printf( "HMAC-SHA512 test passed!\n"); @@ -294,55 +302,55 @@ void ctaocrypt_test(void* args) #endif #ifndef NO_RC4 - if ( (ret = arc4_test()) ) + if ( (ret = arc4_test()) != 0) err_sys("ARC4 test failed!\n", ret); else printf( "ARC4 test passed!\n"); #endif #ifndef NO_HC128 - if ( (ret = hc128_test()) ) + if ( (ret = hc128_test()) != 0) err_sys("HC-128 test failed!\n", ret); else printf( "HC-128 test passed!\n"); #endif #ifndef NO_RABBIT - if ( (ret = rabbit_test()) ) + if ( (ret = rabbit_test()) != 0) err_sys("Rabbit test failed!\n", ret); else printf( "Rabbit test passed!\n"); #endif #ifndef NO_DES3 - if ( (ret = des_test()) ) + if ( (ret = des_test()) != 0) err_sys("DES test failed!\n", ret); else printf( "DES test passed!\n"); #endif #ifndef NO_DES3 - if ( (ret = des3_test()) ) + if ( (ret = des3_test()) != 0) err_sys("DES3 test failed!\n", ret); else printf( "DES3 test passed!\n"); #endif #ifndef NO_AES - if ( (ret = aes_test()) ) + if ( (ret = aes_test()) != 0) err_sys("AES test failed!\n", ret); else printf( "AES test passed!\n"); #ifdef HAVE_AESGCM - if ( (ret = aesgcm_test()) ) + if ( (ret = aesgcm_test()) != 0) err_sys("AES-GCM test failed!\n", ret); else printf( "AES-GCM test passed!\n"); #endif #ifdef HAVE_AESCCM - if ( (ret = aesccm_test()) ) + if ( (ret = aesccm_test()) != 0) err_sys("AES-CCM test failed!\n", ret); else printf( "AES-CCM test passed!\n"); @@ -350,61 +358,61 @@ void ctaocrypt_test(void* args) #endif #ifdef HAVE_CAMELLIA - if ( (ret = camellia_test()) ) + if ( (ret = camellia_test()) != 0) err_sys("CAMELLIA test failed!\n", ret); else printf( "CAMELLIA test passed!\n"); #endif - if ( (ret = random_test()) ) + if ( (ret = random_test()) != 0) err_sys("RANDOM test failed!\n", ret); else printf( "RANDOM test passed!\n"); #ifndef NO_RSA - if ( (ret = rsa_test()) ) + if ( (ret = rsa_test()) != 0) err_sys("RSA test failed!\n", ret); else printf( "RSA test passed!\n"); #endif #ifndef NO_DH - if ( (ret = dh_test()) ) + if ( (ret = dh_test()) != 0) err_sys("DH test failed!\n", ret); else printf( "DH test passed!\n"); #endif #ifndef NO_DSA - if ( (ret = dsa_test()) ) + if ( (ret = dsa_test()) != 0) err_sys("DSA test failed!\n", ret); else printf( "DSA test passed!\n"); #endif #ifndef NO_PWDBASED - if ( (ret = pwdbased_test()) ) + if ( (ret = pwdbased_test()) != 0) err_sys("PWDBASED test failed!\n", ret); else printf( "PWDBASED test passed!\n"); #endif #ifdef OPENSSL_EXTRA - if ( (ret = openssl_test()) ) + if ( (ret = openssl_test()) != 0) err_sys("OPENSSL test failed!\n", ret); else printf( "OPENSSL test passed!\n"); #endif #ifdef HAVE_ECC - if ( (ret = ecc_test()) ) + if ( (ret = ecc_test()) != 0) err_sys("ECC test failed!\n", ret); else printf( "ECC test passed!\n"); #endif #ifdef HAVE_LIBZ - if ( (ret = compress_test()) ) + if ( (ret = compress_test()) != 0) err_sys("COMPRESS test failed!\n", ret); else printf( "COMPRESS test passed!\n"); @@ -443,8 +451,10 @@ static int OpenNitroxDevice(int dma_mode,int dev_id) int main(int argc, char** argv) { + func_args args; + #ifdef HAVE_CAVIUM int ret = OpenNitroxDevice(CAVIUM_DIRECT, CAVIUM_DEV_ID); if (ret != 0) @@ -459,6 +469,7 @@ static int OpenNitroxDevice(int dma_mode,int dev_id) #ifdef HAVE_CAVIUM CspShutdown(CAVIUM_DEV_ID); #endif + return args.return_code; } @@ -1993,102 +2004,102 @@ typedef struct { int camellia_test(void) { /* Camellia ECB Test Plaintext */ - const byte pte[] = + static const byte pte[] = { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10 }; /* Camellia ECB Test Initialization Vector */ - const byte ive[] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; + static const byte ive[] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; /* Test 1: Camellia ECB 128-bit key */ - const byte k1[] = + static const byte k1[] = { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10 }; - const byte c1[] = + static const byte c1[] = { 0x67, 0x67, 0x31, 0x38, 0x54, 0x96, 0x69, 0x73, 0x08, 0x57, 0x06, 0x56, 0x48, 0xea, 0xbe, 0x43 }; /* Test 2: Camellia ECB 192-bit key */ - const byte k2[] = + static const byte k2[] = { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10, 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 }; - const byte c2[] = + static const byte c2[] = { 0xb4, 0x99, 0x34, 0x01, 0xb3, 0xe9, 0x96, 0xf8, 0x4e, 0xe5, 0xce, 0xe7, 0xd7, 0x9b, 0x09, 0xb9 }; /* Test 3: Camellia ECB 256-bit key */ - const byte k3[] = + static const byte k3[] = { 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef, 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10, 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff }; - const byte c3[] = + static const byte c3[] = { 0x9a, 0xcc, 0x23, 0x7d, 0xff, 0x16, 0xd7, 0x6c, 0x20, 0xef, 0x7c, 0x91, 0x9e, 0x3a, 0x75, 0x09 }; /* Camellia CBC Test Plaintext */ - const byte ptc[] = + static const byte ptc[] = { 0x6B, 0xC1, 0xBE, 0xE2, 0x2E, 0x40, 0x9F, 0x96, 0xE9, 0x3D, 0x7E, 0x11, 0x73, 0x93, 0x17, 0x2A }; /* Camellia CBC Test Initialization Vector */ - const byte ivc[] = + static const byte ivc[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F }; /* Test 4: Camellia-CBC 128-bit key */ - const byte k4[] = + static const byte k4[] = { 0x2B, 0x7E, 0x15, 0x16, 0x28, 0xAE, 0xD2, 0xA6, 0xAB, 0xF7, 0x15, 0x88, 0x09, 0xCF, 0x4F, 0x3C }; - const byte c4[] = + static const byte c4[] = { 0x16, 0x07, 0xCF, 0x49, 0x4B, 0x36, 0xBB, 0xF0, 0x0D, 0xAE, 0xB0, 0xB5, 0x03, 0xC8, 0x31, 0xAB }; /* Test 5: Camellia-CBC 192-bit key */ - const byte k5[] = + static const byte k5[] = { 0x8E, 0x73, 0xB0, 0xF7, 0xDA, 0x0E, 0x64, 0x52, 0xC8, 0x10, 0xF3, 0x2B, 0x80, 0x90, 0x79, 0xE5, 0x62, 0xF8, 0xEA, 0xD2, 0x52, 0x2C, 0x6B, 0x7B }; - const byte c5[] = + static const byte c5[] = { 0x2A, 0x48, 0x30, 0xAB, 0x5A, 0xC4, 0xA1, 0xA2, 0x40, 0x59, 0x55, 0xFD, 0x21, 0x95, 0xCF, 0x93 }; /* Test 6: CBC 256-bit key */ - const byte k6[] = + static const byte k6[] = { 0x60, 0x3D, 0xEB, 0x10, 0x15, 0xCA, 0x71, 0xBE, 0x2B, 0x73, 0xAE, 0xF0, 0x85, 0x7D, 0x77, 0x81, 0x1F, 0x35, 0x2C, 0x07, 0x3B, 0x61, 0x08, 0xD7, 0x2D, 0x98, 0x10, 0xA3, 0x09, 0x14, 0xDF, 0xF4 }; - const byte c6[] = + static const byte c6[] = { 0xE6, 0xCF, 0xA3, 0x5F, 0xC0, 0x2B, 0x13, 0x4A, 0x4D, 0x2C, 0x0B, 0x67, 0x37, 0xAC, 0x3E, 0xDA @@ -2233,13 +2244,24 @@ byte GetEntropy(ENTROPY_CMD cmd, byte* out) #ifndef NO_RSA #ifdef FREESCALE_MQX - static const char* clientKey = "a:\certs\\client-key.der"; - static const char* clientCert = "a:\certs\\client-cert.der"; + static const char* clientKey = "a:\\certs\\client-key.der"; + static const char* clientCert = "a:\\certs\\client-cert.der"; #ifdef CYASSL_CERT_GEN - static const char* caKeyFile = "a:\certs\\ca-key.der"; - static const char* caCertFile = "a:\certs\\ca-cert.pem"; + static const char* caKeyFile = "a:\\certs\\ca-key.der"; + static const char* caCertFile = "a:\\certs\\ca-cert.pem"; #endif -#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) +#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) && defined(CYASSL_MKD_SHELL) + static char* clientKey = "certs/client-key.der"; + static char* clientCert = "certs/client-cert.der"; + void set_clientKey(char *key) { clientKey = key ; } /* set by shell command */ + void set_clientCert(char *cert) { clientCert = cert ; } /* set by shell command */ + #ifdef CYASSL_CERT_GEN + static char* caKeyFile = "certs/ca-key.der"; + static char* caCertFile = "certs/ca-cert.pem"; + void set_caKeyFile (char * key) { caKeyFile = key ; } /* set by shell command */ + void set_caCertFile(char * cert) { caCertFile = cert ; } /* set by shell command */ + #endif +#elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) static const char* clientKey = "./certs/client-key.der"; static const char* clientCert = "./certs/client-cert.der"; #ifdef CYASSL_CERT_GEN @@ -2248,6 +2270,8 @@ byte GetEntropy(ENTROPY_CMD cmd, byte* out) #endif #endif + + #define FOURK_BUF 4096 int rsa_test(void) @@ -2274,11 +2298,11 @@ int rsa_test(void) return -40; #ifdef USE_CERT_BUFFERS_1024 - XMEMCPY(tmp, client_key_der_1024, sizeof(client_key_der_1024)); - bytes = sizeof(client_key_der_1024); + XMEMCPY(tmp, client_key_der_1024, sizeof_client_key_der_1024); + bytes = sizeof_client_key_der_1024; #elif defined(USE_CERT_BUFFERS_2048) - XMEMCPY(tmp, client_key_der_2048, sizeof(client_key_der_2048)); - bytes = sizeof(client_key_der_2048); + XMEMCPY(tmp, client_key_der_2048, sizeof_client_key_der_2048); + bytes = sizeof_client_key_der_2048; #else file = fopen(clientKey, "rb"); @@ -2317,12 +2341,16 @@ int rsa_test(void) if (memcmp(plain, in, ret)) return -48; +#if defined(CYASSL_MDK_ARM) + #define sizeof(s) strlen((char *)(s)) +#endif + #ifdef USE_CERT_BUFFERS_1024 - XMEMCPY(tmp, client_cert_der_1024, sizeof(client_cert_der_1024)); - bytes = sizeof(client_cert_der_1024); + XMEMCPY(tmp, client_cert_der_1024, sizeof_client_cert_der_1024); + bytes = sizeof_client_cert_der_1024; #elif defined(USE_CERT_BUFFERS_2048) - XMEMCPY(tmp, client_cert_der_2048, sizeof(client_cert_der_2048)); - bytes = sizeof(client_cert_der_2048); + XMEMCPY(tmp, client_cert_der_2048, sizeof_client_cert_der_2048); + bytes = sizeof_client_cert_der_2048; #else file2 = fopen(clientCert, "rb"); if (!file2) @@ -2332,6 +2360,10 @@ int rsa_test(void) fclose(file2); #endif +#ifdef sizeof + #undef sizeof +#endif + #ifdef CYASSL_TEST_CERT InitDecodedCert(&cert, tmp, (word32)bytes, 0); @@ -2475,6 +2507,7 @@ int rsa_test(void) int pemSz; size_t bytes3; word32 idx3 = 0; + FILE* file3 ; #ifdef CYASSL_TEST_CERT DecodedCert decode; #endif @@ -2486,7 +2519,7 @@ int rsa_test(void) if (pem == NULL) return -312; - FILE* file3 = fopen(caKeyFile, "rb"); + file3 = fopen(caKeyFile, "rb"); if (!file3) return -412; @@ -2703,12 +2736,14 @@ int dh_test(void) DhKey key; DhKey key2; RNG rng; + + #ifdef USE_CERT_BUFFERS_1024 - XMEMCPY(tmp, dh_key_der_1024, sizeof(dh_key_der_1024)); - bytes = sizeof(dh_key_der_1024); + XMEMCPY(tmp, dh_key_der_1024, sizeof_dh_key_der_1024); + bytes = sizeof_dh_key_der_1024; #elif defined(USE_CERT_BUFFERS_2048) - XMEMCPY(tmp, dh_key_der_2048, sizeof(dh_key_der_2048)); - bytes = sizeof(dh_key_der_2048); + XMEMCPY(tmp, dh_key_der_2048, sizeof_dh_key_der_2048); + bytes = sizeof_dh_key_der_2048; #else FILE* file = fopen(dhKey, "rb"); @@ -2759,7 +2794,7 @@ int dh_test(void) #ifndef NO_DSA #ifdef FREESCALE_MQX - static const char* dsaKey = "a:\certs\\dsa2048.der"; + static const char* dsaKey = "a:\\certs\\dsa2048.der"; #elif !defined(USE_CERT_BUFFERS_1024) && !defined(USE_CERT_BUFFERS_2048) static const char* dsaKey = "./certs/dsa2048.der"; #endif @@ -2775,12 +2810,14 @@ int dsa_test(void) Sha sha; byte hash[SHA_DIGEST_SIZE]; byte signature[40]; + + #ifdef USE_CERT_BUFFERS_1024 - XMEMCPY(tmp, dsa_key_der_1024, sizeof(dsa_key_der_1024)); - bytes = sizeof(dsa_key_der_1024); + XMEMCPY(tmp, dsa_key_der_1024, sizeof_dsa_key_der_1024); + bytes = sizeof_dsa_key_der_1024; #elif defined(USE_CERT_BUFFERS_2048) - XMEMCPY(tmp, dsa_key_der_2048, sizeof(dsa_key_der_2048)); - bytes = sizeof(dsa_key_der_2048); + XMEMCPY(tmp, dsa_key_der_2048, sizeof_dsa_key_der_2048); + bytes = sizeof_dsa_key_der_2048; #else FILE* file = fopen(dsaKey, "rb"); @@ -3350,3 +3387,4 @@ int compress_test(void) #endif /* HAVE_LIBZ */ +#endif /* NO_CRYPT_TEST */ diff --git a/cyassl/certs_test.h b/cyassl/certs_test.h index c3b644a38..5d10679a6 100644 --- a/cyassl/certs_test.h +++ b/cyassl/certs_test.h @@ -70,6 +70,7 @@ const unsigned char client_key_der_1024[] = 0xA2, 0xFE, 0xBF, 0x08, 0x6B, 0x1A, 0x5D, 0x3F, 0x90, 0x12, 0xB1, 0x05, 0x86, 0x31, 0x29, 0xDB, 0xD9, 0xE2 }; +const int sizeof_client_key_der_1024 = sizeof(client_key_der_1024) ; /* ./certs/1024/client-cert.der, 1024-bit */ const unsigned char client_cert_der_1024[] = @@ -151,6 +152,7 @@ const unsigned char client_cert_der_1024[] = 0x1B, 0x4E, 0x5D, 0xBC, 0x4E, 0x9A, 0x7C, 0x1F, 0xAB, 0x56, 0x47, 0x4A }; +const int sizeof_client_cert_der_1024 = sizeof(client_cert_der_1024) ; /* ./certs/1024/dh1024.der, 1024-bit */ const unsigned char dh_key_der_1024[] = @@ -170,6 +172,7 @@ const unsigned char dh_key_der_1024[] = 0x8C, 0x63, 0x0A, 0xAD, 0xC7, 0x10, 0xEA, 0xC7, 0xA1, 0xB9, 0x9D, 0xF2, 0xA8, 0x37, 0x73, 0x02, 0x01, 0x02 }; +const int sizeof_dh_key_der_1024 = sizeof(dh_key_der_1024) ; /* ./certs/1024/dsa1024.der, 1024-bit */ const unsigned char dsa_key_der_1024[] = @@ -220,6 +223,7 @@ const unsigned char dsa_key_der_1024[] = 0x3B, 0xA1, 0x19, 0x75, 0xDF, 0x9B, 0xF5, 0x72, 0x53, 0x4F, 0x39, 0xE1, 0x1C, 0xEC, 0x13, 0x84, 0x82, 0x18 }; +const int sizeof_dsa_key_der_1024 = sizeof(dsa_key_der_1024) ; /* ./certs/1024/rsa1024.der, 1024-bit */ const unsigned char rsa_key_der_1024[] = @@ -286,6 +290,7 @@ const unsigned char rsa_key_der_1024[] = 0xB9, 0x9E, 0xD5, 0x5B, 0x2E, 0x87, 0x1C, 0x58, 0xD0, 0x37, 0x89, 0x96, 0xEC, 0x48, 0x54, 0xF5, 0x9F, 0x0F, 0xB3 }; +const int sizeof_rsa_key_der_1024 = sizeof(rsa_key_der_1024) ; #elif defined(USE_CERT_BUFFERS_2048) @@ -413,6 +418,7 @@ const unsigned char client_key_der_2048[] = 0x45, 0x5D, 0x13, 0x39, 0x65, 0x42, 0x46, 0xA1, 0x9F, 0xCD, 0xF5, 0xBF }; +const int sizeof_client_key_der_2048 = sizeof(client_key_der_2048) ; /* ./certs/client-cert.der, 2048-bit */ const unsigned char client_cert_der_2048[] = @@ -537,10 +543,11 @@ const unsigned char client_cert_der_2048[] = 0xC9, 0xB1, 0x71, 0x7E, 0x1B, 0x2B, 0xE1, 0xE3, 0xAF, 0xC0 }; +const int sizeof_client_cert_der_2048 = sizeof(client_cert_der_2048) ; /* ./certs/dh2048.der, 2048-bit */ const unsigned char dh_key_der_2048[] = -{ +{ 0x30, 0x82, 0x01, 0x08, 0x02, 0x82, 0x01, 0x01, 0x00, 0xB0, 0xA1, 0x08, 0x06, 0x9C, 0x08, 0x13, 0xBA, 0x59, 0x06, 0x3C, 0xBC, 0x30, 0xD5, 0xF5, 0x00, 0xC1, 0x4F, 0x44, 0xA7, 0xD6, @@ -569,6 +576,7 @@ const unsigned char dh_key_der_2048[] = 0xC3, 0xA9, 0x41, 0x83, 0xFB, 0xC7, 0xFA, 0xC8, 0xE2, 0x1E, 0x7E, 0xAF, 0x00, 0x3F, 0x93, 0x02, 0x01, 0x02 }; +const int sizeof_dh_key_der_2048 = sizeof(dh_key_der_2048) ; /* ./certs/dsa2048.der, 2048-bit */ const unsigned char dsa_key_der_2048[] = @@ -658,6 +666,7 @@ const unsigned char dsa_key_der_2048[] = 0x3E, 0x75, 0x13, 0x13, 0x06, 0x8F, 0x94, 0xD3, 0xE6, 0xE9, 0x00, 0xCB, 0x62, 0x6D, 0x9A }; +const int sizeof_dsa_key_der_2048 = sizeof(dsa_key_der_2048) ; /* ./certs/rsa2048.der, 2048-bit */ const unsigned char rsa_key_der_2048[] = @@ -783,6 +792,7 @@ const unsigned char rsa_key_der_2048[] = 0x83, 0x0B, 0xD4, 0x74, 0x80, 0xB6, 0x7D, 0x62, 0x45, 0xBF, 0x56 }; +const int sizeof_rsa_key_der_2048 = sizeof(rsa_key_der_2048) ; #endif /* USE_CERT_BUFFERS_1024 */ diff --git a/cyassl/ctaocrypt/random.h b/cyassl/ctaocrypt/random.h index 8aa294296..00be9d163 100644 --- a/cyassl/ctaocrypt/random.h +++ b/cyassl/ctaocrypt/random.h @@ -59,11 +59,18 @@ typedef struct OS_Seed { CYASSL_LOCAL int GenerateSeed(OS_Seed* os, byte* seed, word32 sz); +#if defined(CYASSL_MDK_ARM) +#undef RNG +#define RNG CyaSSL_RNG /* for avoiding name conflict in "stm32f2xx.h" */ +#endif + #ifndef NO_RC4 #define CYASSL_RNG_CAVIUM_MAGIC 0xBEEF0004 /* secure Random Nnumber Generator */ + + typedef struct RNG { OS_Seed seed; Arc4 cipher; @@ -82,6 +89,7 @@ typedef struct RNG { #define DBRG_SEED_LEN (440/8) + /* secure Random Nnumber Generator */ typedef struct RNG { OS_Seed seed; diff --git a/cyassl/ctaocrypt/settings.h b/cyassl/ctaocrypt/settings.h index c8ff60577..a3693d86e 100644 --- a/cyassl/ctaocrypt/settings.h +++ b/cyassl/ctaocrypt/settings.h @@ -45,7 +45,10 @@ /* Uncomment next line if using Microchip PIC32 ethernet starter kit */ /* #define MICROCHIP_PIC32 */ -/* Uncomment next line if using Microchip TCP/IP stack, for time features */ +/* Uncomment next line if using Microchip TCP/IP stack, version 5 */ +/* #define MICROCHIP_TCPIP_V5 */ + +/* Uncomment next line if using Microchip TCP/IP stack, version 6 or later */ /* #define MICROCHIP_TCPIP */ /* Uncomment next line if using FreeRTOS */ @@ -94,11 +97,17 @@ #define TFM_TIMING_RESISTANT #endif -#ifdef MICROCHIP_TCPIP - /* includes timer functions */ +#ifdef MICROCHIP_TCPIP_V5 + /* include timer functions */ #include "TCPIP Stack/TCPIP.h" #endif +#ifdef MICROCHIP_TCPIP + /* include timer, NTP functions */ + #include "system/system_services.h" + #include "tcpip/sntp.h" +#endif + #ifdef MBED #define SINGLE_THREADED #define CYASSL_USER_IO diff --git a/cyassl/ctaocrypt/sha512.h b/cyassl/ctaocrypt/sha512.h index c9ec31a8d..d9e749750 100644 --- a/cyassl/ctaocrypt/sha512.h +++ b/cyassl/ctaocrypt/sha512.h @@ -56,7 +56,7 @@ CYASSL_API void Sha512Update(Sha512*, const byte*, word32); CYASSL_API void Sha512Final(Sha512*, byte*); -#ifdef CYASSL_SHA384 +#if defined(CYASSL_SHA384) || defined(HAVE_AESGCM) /* in bytes */ enum { diff --git a/cyassl/ctaocrypt/types.h b/cyassl/ctaocrypt/types.h index a0a78812d..6f0282798 100644 --- a/cyassl/ctaocrypt/types.h +++ b/cyassl/ctaocrypt/types.h @@ -54,7 +54,7 @@ || defined(__mips64) || defined(__x86_64__)) /* long should be 64bit */ #define SIZEOF_LONG 8 - #elif defined(__i386__) + #elif defined(__i386__) || defined(__CORTEX_M3__) /* long long should be 64bit */ #define SIZEOF_LONG_LONG 8 #endif diff --git a/cyassl/internal.h b/cyassl/internal.h index 431ba2d8c..36c615922 100644 --- a/cyassl/internal.h +++ b/cyassl/internal.h @@ -52,6 +52,11 @@ #ifdef CYASSL_SHA512 #include #endif + +#ifdef HAVE_AESGCM + #include +#endif + #ifdef CYASSL_RIPEMD #include #endif @@ -83,6 +88,8 @@ /* do nothing */ #elif defined(FREESCALE_MQX) /* do nothing */ +#elif defined(CYASSL_MDK_ARM) + #include #else #ifndef SINGLE_THREADED #define CYASSL_PTHREADS @@ -236,7 +243,7 @@ void c32to24(word32 in, word24 out); #define BUILD_TLS_PSK_WITH_NULL_SHA #endif #ifndef NO_SHA256 - #define BUILD_TLS_PSK_WITH_NULL_SHA256 + #define BUILD_TLS_PSK_WITH_NULL_SHA256 #endif #endif #endif @@ -955,6 +962,8 @@ struct CYASSL_CIPHER { typedef RTP_MUTEX CyaSSL_Mutex; #elif defined(FREESCALE_MQX) typedef MUTEX_STRUCT CyaSSL_Mutex; + #elif defined(CYASSL_MDK_ARM) + typedef OS_MUT CyaSSL_Mutex; #else #error Need a mutex type in multithreaded mode #endif /* USE_WINDOWS_API */ @@ -1321,7 +1330,7 @@ typedef struct Ciphers { #ifdef BUILD_DES3 Des3* des3; #endif -#ifdef BUILD_AES +#if defined(BUILD_AES) || defined(BUILD_AESGCM) Aes* aes; #endif #ifdef HAVE_CAMELLIA diff --git a/cyassl/ssl.h b/cyassl/ssl.h index b49493622..1db414ba2 100644 --- a/cyassl/ssl.h +++ b/cyassl/ssl.h @@ -767,6 +767,7 @@ CYASSL_API int CyaSSL_CTX_SetTmpDH(CYASSL_CTX*, const unsigned char* p, CYASSL_API int CyaSSL_CTX_SetTmpDH_buffer(CYASSL_CTX*, const unsigned char* b, long sz, int format); CYASSL_API int CyaSSL_CTX_SetTmpEC_DHE_Sz(CYASSL_CTX*, unsigned short); + #ifndef NO_FILESYSTEM CYASSL_API int CyaSSL_CTX_SetTmpDH_file(CYASSL_CTX*, const char* f, int format); @@ -790,7 +791,7 @@ CYASSL_API int CyaSSL_make_eap_keys(CYASSL*, void* key, unsigned int len, #ifdef __PPU #include #include - #else + #elif !defined(CYASSL_MDK_ARM) #include #endif /* allow writev style writing */ diff --git a/cyassl/test.h b/cyassl/test.h index 0fc632539..97bd6e89d 100644 --- a/cyassl/test.h +++ b/cyassl/test.h @@ -14,11 +14,14 @@ #include #include #ifdef TEST_IPV6 /* don't require newer SDK for IPV4 */ - #include + #include #include #endif #define SOCKET_T SOCKET #define SNPRINTF _snprintf +#elif defined(CYASSL_MDK_ARM) + #include + #define SOCKET_T unsigned int #else #include #include @@ -66,7 +69,7 @@ /* HPUX doesn't use socklent_t for third parameter to accept, unless _XOPEN_SOURCE_EXTENDED is defined */ -#if !defined(__hpux__) +#if !defined(__hpux__) && !defined(CYASSL_MDK_ARM) typedef socklen_t* ACCEPT_THIRD_T; #else #if defined _XOPEN_SOURCE_EXTENDED @@ -80,6 +83,9 @@ #ifdef USE_WINDOWS_API #define CloseSocket(s) closesocket(s) #define StartTCP() { WSADATA wsd; WSAStartup(0x0002, &wsd); } +#elif defined(CYASSL_MDK_ARM) + #define CloseSocket(s) closesocket(s) + #define StartTCP() #else #define CloseSocket(s) close(s) #define StartTCP() @@ -97,6 +103,10 @@ #define CYASSL_THREAD #define INFINITE -1 #define WAIT_OBJECT_0 0L + #elif defined(CYASSL_MDK_ARM) + typedef unsigned int THREAD_RETURN; + typedef int THREAD_TYPE; + #define CYASSL_THREAD #else typedef unsigned int THREAD_RETURN; typedef intptr_t THREAD_TYPE; @@ -172,12 +182,13 @@ void join_thread(THREAD_TYPE); #endif static const word16 yasslPort = 11111; - static INLINE void err_sys(const char* msg) { printf("yassl error: %s\n", msg); + #ifndef CYASSL_MDK_SHELL if (msg) exit(EXIT_FAILURE); + #endif } @@ -278,7 +289,7 @@ static INLINE void ShowX509(CYASSL_X509* x509, const char* hdr) printf("%s\n issuer : %s\n subject: %s\n", hdr, issuer, subject); - while ( (altName = CyaSSL_X509_get_next_altname(x509)) ) + while ( (altName = CyaSSL_X509_get_next_altname(x509)) != NULL) printf(" altname = %s\n", altName); ret = CyaSSL_X509_get_serial_number(x509, serial, &sz); @@ -357,8 +368,13 @@ static INLINE void build_addr(SOCKADDR_IN_T* addr, const char* peer, #ifndef TEST_IPV6 /* peer could be in human readable form */ - if (peer != INADDR_ANY && isalpha((int)peer[0])) { - struct hostent* entry = gethostbyname(peer); + if ( (peer != INADDR_ANY) && isalpha((int)peer[0])) { + #ifdef CYASSL_MDK_ARM + int err; + struct hostent* entry = gethostbyname(peer, &err); + #else + struct hostent* entry = gethostbyname(peer); + #endif if (entry) { memcpy(&addr->sin_addr.s_addr, entry->h_addr_list[0], @@ -372,7 +388,11 @@ static INLINE void build_addr(SOCKADDR_IN_T* addr, const char* peer, #ifndef TEST_IPV6 - addr->sin_family = AF_INET_V; + #if defined(CYASSL_MDK_ARM) + addr->sin_family = PF_INET; + #else + addr->sin_family = AF_INET_V; + #endif addr->sin_port = htons(port); if (peer == INADDR_ANY) addr->sin_addr.s_addr = INADDR_ANY; @@ -440,6 +460,8 @@ static INLINE void tcp_socket(SOCKET_T* sockfd, int udp) if (res < 0) err_sys("setsockopt SO_NOSIGPIPE failed\n"); } +#elif defined(CYASSL_MDK_ARM) + /* nothing to define */ #else /* no S_NOSIGPIPE */ signal(SIGPIPE, SIG_IGN); #endif /* S_NOSIGPIPE */ @@ -457,7 +479,6 @@ static INLINE void tcp_socket(SOCKET_T* sockfd, int udp) #endif /* USE_WINDOWS_API */ } - static INLINE void tcp_connect(SOCKET_T* sockfd, const char* ip, word16 port, int udp) { @@ -486,6 +507,8 @@ enum { TEST_ERROR_READY }; + +#if !defined(CYASSL_MDK_ARM) static INLINE int tcp_select(SOCKET_T socketfd, int to_sec) { fd_set recvfds, errfds; @@ -511,6 +534,7 @@ static INLINE int tcp_select(SOCKET_T socketfd, int to_sec) return TEST_SELECT_FAIL; } +#endif /* !CYASSL_MDK_ARM */ static INLINE void tcp_listen(SOCKET_T* sockfd, int* port, int useAnyAddr, @@ -523,7 +547,7 @@ static INLINE void tcp_listen(SOCKET_T* sockfd, int* port, int useAnyAddr, build_addr(&addr, (useAnyAddr ? INADDR_ANY : yasslIP), *port, udp); tcp_socket(sockfd, udp); -#ifndef USE_WINDOWS_API +#if !defined(USE_WINDOWS_API) && !defined(CYASSL_MDK_ARM) { int res, on = 1; socklen_t len = sizeof(on); @@ -584,7 +608,7 @@ static INLINE void udp_accept(SOCKET_T* sockfd, SOCKET_T* clientfd, tcp_socket(sockfd, 1); -#ifndef USE_WINDOWS_API +#if !defined(USE_WINDOWS_API) && !defined(CYASSL_MDK_ARM) { int res, on = 1; socklen_t len = sizeof(on); @@ -670,6 +694,8 @@ static INLINE void tcp_set_nonblocking(SOCKET_T* sockfd) int ret = ioctlsocket(*sockfd, FIONBIO, &blocking); if (ret == SOCKET_ERROR) err_sys("ioctlsocket failed"); + #elif defined(CYASSL_MDK_ARM) + /* non blocking not suppported, for now */ #else int flags = fcntl(*sockfd, F_GETFL, 0); if (flags < 0) @@ -753,6 +779,7 @@ static INLINE unsigned int my_psk_server_cb(CYASSL* ssl, const char* identity, #else +#if !defined(CYASSL_MDK_ARM) #include static INLINE double current_time(void) @@ -762,7 +789,8 @@ static INLINE unsigned int my_psk_server_cb(CYASSL* ssl, const char* identity, return (double)tv.tv_sec + (double)tv.tv_usec / 1000000; } - + +#endif #endif /* USE_WINDOWS_API */ @@ -853,7 +881,6 @@ static INLINE void CRL_CallBack(const char* url) #endif - #ifndef NO_CERTS static INLINE void CaCb(unsigned char* der, int sz, int type) @@ -984,6 +1011,8 @@ static INLINE int CurrentDir(const char* str) return 0; } +#elif defined(CYASSL_MDK_ARM) + /* KEIL-RL File System does not support relative directry */ #else #ifndef MAX_PATH diff --git a/examples/client/client.c b/examples/client/client.c index 9b8faae54..dc6f6fd70 100644 --- a/examples/client/client.c +++ b/examples/client/client.c @@ -22,6 +22,13 @@ #ifdef HAVE_CONFIG_H #include #endif + +#if defined(CYASSL_MDK_ARM) + #include + #include + #include + #include "cyassl_MDK_ARM.h" +#endif #include @@ -125,6 +132,9 @@ static void Usage(void) #endif } +#ifdef CYASSL_MDK_SHELL +#define exit(code) return +#endif THREAD_RETURN CYASSL_THREAD client_test(void* args) { @@ -314,7 +324,9 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args) case 0: method = CyaSSLv3_client_method(); break; - + + + #ifndef NO_TLS case 1: method = CyaTLSv1_client_method(); break; @@ -322,11 +334,15 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args) case 2: method = CyaTLSv1_1_client_method(); break; -#endif - + #endif /* NO_TLS */ + +#endif /* NO_OLD_TLS */ + +#ifndef NO_TLS case 3: method = CyaTLSv1_2_client_method(); break; +#endif #ifdef CYASSL_DTLS case -1: @@ -436,6 +452,7 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args) for (i = 0; i < times; i++) { tcp_connect(&sockfd, host, port, doDTLS); + ssl = CyaSSL_new(ctx); CyaSSL_set_fd(ssl, sockfd); if (CyaSSL_connect(ssl) != SSL_SUCCESS) @@ -455,7 +472,11 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args) exit(EXIT_SUCCESS); } - + + #if defined(CYASSL_MDK_ARM) + CyaSSL_CTX_set_verify(ctx, SSL_VERIFY_NONE, 0); + #endif + ssl = CyaSSL_new(ctx); if (ssl == NULL) err_sys("unable to get SSL object"); @@ -649,7 +670,7 @@ THREAD_RETURN CYASSL_THREAD client_test(void* args) args.argv = argv; CyaSSL_Init(); -#ifdef DEBUG_CYASSL +#if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL) CyaSSL_Debugging_ON(); #endif if (CurrentDir("client") || CurrentDir("build")) diff --git a/examples/echoclient/echoclient.c b/examples/echoclient/echoclient.c index 95ccb529c..1b6c05c67 100644 --- a/examples/echoclient/echoclient.c +++ b/examples/echoclient/echoclient.c @@ -26,6 +26,14 @@ #include #include + +#if defined(CYASSL_MDK_ARM) + #include + #include + #include + #include "cyassl_MDK_ARM.h" +#endif + #include #include "examples/echoclient/echoclient.h" @@ -34,7 +42,7 @@ void echoclient_test(void* args) { SOCKET_T sockfd = 0; - FILE* fin = stdin; + FILE* fin = stdin ; FILE* fout = stdout; int inCreated = 0; @@ -55,8 +63,11 @@ void echoclient_test(void* args) int port = yasslPort; ((func_args*)args)->return_code = -1; /* error state */ + +#ifndef CYASSL_MDK_SHELL argc = ((func_args*)args)->argc; argv = ((func_args*)args)->argv; +#endif if (argc >= 2) { fin = fopen(argv[1], "r"); @@ -131,7 +142,13 @@ void echoclient_test(void* args) #ifdef OPENSSL_EXTRA SSL_CTX_set_default_passwd_cb(ctx, PasswordCallBack); #endif + + #if defined(CYASSL_MDK_ARM) + CyaSSL_CTX_set_verify(ctx, SSL_VERIFY_NONE, 0); + #endif + ssl = SSL_new(ctx); + if (doDTLS) { SOCKADDR_IN_T addr; @@ -142,16 +159,17 @@ void echoclient_test(void* args) else { tcp_connect(&sockfd, yasslIP, port, 0); } - + SSL_set_fd(ssl, sockfd); #if defined(USE_WINDOWS_API) && defined(CYASSL_DTLS) && defined(NO_MAIN_DRIVER) /* let echoserver bind first, TODO: add Windows signal like pthreads does */ Sleep(100); #endif + if (SSL_connect(ssl) != SSL_SUCCESS) err_sys("SSL_connect failed"); - while (fgets(msg, sizeof(msg), fin)) { - + while (fgets(msg, sizeof(msg), fin) != 0) { + sendSz = (int)strlen(msg); if (SSL_write(ssl, msg, sendSz) != sendSz) @@ -167,18 +185,32 @@ void echoclient_test(void* args) break; } + #ifndef CYASSL_MDK_SHELL while (sendSz) { int got; if ( (got = SSL_read(ssl, reply, sizeof(reply)-1)) > 0) { reply[got] = 0; fputs(reply, fout); + fflush(fout) ; sendSz -= got; } else break; } + #else + { + int got; + if ( (got = SSL_read(ssl, reply, sizeof(reply)-1)) > 0) { + reply[got] = 0; + fputs(reply, fout); + fflush(fout) ; + sendSz -= got; + } + } + #endif } + #ifdef CYASSL_DTLS strncpy(msg, "break", 6); sendSz = (int)strlen(msg); @@ -219,12 +251,14 @@ void echoclient_test(void* args) args.argv = argv; CyaSSL_Init(); -#ifdef DEBUG_CYASSL +#if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL) CyaSSL_Debugging_ON(); #endif + if (CurrentDir("echoclient") || CurrentDir("build")) ChangeDirBack(2); echoclient_test(&args); + CyaSSL_Cleanup(); #ifdef HAVE_CAVIUM @@ -232,11 +266,7 @@ void echoclient_test(void* args) #endif return args.return_code; } - - int myoptind = 0; - char* myoptarg = NULL; - + #endif /* NO_MAIN_DRIVER */ - diff --git a/examples/echoserver/echoserver.c b/examples/echoserver/echoserver.c index 4683e64f5..b35c4bee3 100644 --- a/examples/echoserver/echoserver.c +++ b/examples/echoserver/echoserver.c @@ -25,6 +25,13 @@ #include +#if defined(CYASSL_MDK_ARM) + #include + #include + #include + #include "cyassl_MDK_ARM.h" +#endif + #include #include @@ -39,6 +46,7 @@ CYASSL_API void PrintSessionStats(void); #endif +#define SVR_COMMAND_SIZE 256 static void SignalReady(void* args, int port) { @@ -192,7 +200,7 @@ THREAD_RETURN CYASSL_THREAD echoserver_test(void* args) while (!shutDown) { CYASSL* ssl = 0; - char command[1024+1]; + char command[SVR_COMMAND_SIZE+1]; int echoSz = 0; int clientfd; int firstRead = 1; @@ -328,7 +336,7 @@ THREAD_RETURN CYASSL_THREAD echoserver_test(void* args) args.argv = argv; CyaSSL_Init(); -#ifdef DEBUG_CYASSL +#if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL) CyaSSL_Debugging_ON(); #endif if (CurrentDir("echoserver") || CurrentDir("build")) @@ -342,10 +350,9 @@ THREAD_RETURN CYASSL_THREAD echoserver_test(void* args) return args.return_code; } - int myoptind = 0; - char* myoptarg = NULL; - + #endif /* NO_MAIN_DRIVER */ + diff --git a/examples/server/server.c b/examples/server/server.c index c08bdacda..002467cc9 100644 --- a/examples/server/server.c +++ b/examples/server/server.c @@ -30,6 +30,13 @@ #define CYASSL_TRACK_MEMORY #endif +#if defined(CYASSL_MDK_ARM) + #include + #include + #include + #include "cyassl_MDK_ARM.h" +#endif + #include #include @@ -117,6 +124,10 @@ static void Usage(void) printf("-N Use Non-blocking sockets\n"); } +#ifdef CYASSL_MDK_SHELL +#define exit(code) return(code) +#endif + THREAD_RETURN CYASSL_THREAD server_test(void* args) { @@ -264,19 +275,25 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args) method = SSLv3_server_method(); break; + #ifndef NO_TLS case 1: method = TLSv1_server_method(); break; + case 2: method = TLSv1_1_server_method(); break; + + #endif #endif +#ifndef NO_TLS case 3: method = TLSv1_2_server_method(); break; - +#endif + #ifdef CYASSL_DTLS case -1: method = DTLSv1_server_method(); @@ -432,6 +449,10 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args) if (SSL_write(ssl, msg, sizeof(msg)) != sizeof(msg)) err_sys("SSL_write failed"); + + #if defined(CYASSL_MDK_SHELL) && defined(HAVE_MDK_RTX) + os_dly_wait(500) ; + #endif SSL_shutdown(ssl); SSL_free(ssl); @@ -468,7 +489,7 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args) args.argv = argv; CyaSSL_Init(); -#ifdef DEBUG_CYASSL +#if defined(DEBUG_CYASSL) && !defined(CYASSL_MDK_SHELL) CyaSSL_Debugging_ON(); #endif if (CurrentDir("server") || CurrentDir("build")) @@ -510,4 +531,3 @@ THREAD_RETURN CYASSL_THREAD server_test(void* args) #endif - diff --git a/src/internal.c b/src/internal.c index c26723cb9..07defa7c1 100644 --- a/src/internal.c +++ b/src/internal.c @@ -2088,7 +2088,7 @@ ProtocolVersion MakeDTLSv1_2(void) } -#elif defined(MICROCHIP_TCPIP) +#elif defined(MICROCHIP_TCPIP_V5) word32 LowResTimer(void) { @@ -2096,6 +2096,14 @@ ProtocolVersion MakeDTLSv1_2(void) } +#elif defined(MICROCHIP_TCPIP) + + word32 LowResTimer(void) + { + return (word32) SYS_TICK_Get(); + } + + #elif defined(USER_TICKS) #if 0 word32 LowResTimer(void) @@ -6906,7 +6914,7 @@ int SetCipherList(Suites* s, const char* list) if (ssl->options.haveSessionId && XMEMCMP(ssl->arrays->sessionID, ssl->session.sessionID, ID_LEN) == 0) { if (SetCipherSpecs(ssl) == 0) { - int ret; + int ret = -1; XMEMCPY(ssl->arrays->masterSecret, ssl->session.masterSecret, SECRET_LEN); #ifdef NO_OLD_TLS @@ -9142,7 +9150,7 @@ int SetCipherList(Suites* s, const char* list) ssl->options.haveSessionId = 1; /* DoClientHello uses same resume code */ if (ssl->options.resuming) { /* let's try */ - int ret; + int ret = -1; CYASSL_SESSION* session = GetSession(ssl,ssl->arrays->masterSecret); if (!session) { CYASSL_MSG("Session lookup for resume failed"); @@ -9361,7 +9369,7 @@ int SetCipherList(Suites* s, const char* list) ssl->options.haveSessionId = 1; /* ProcessOld uses same resume code */ if (ssl->options.resuming) { /* let's try */ - int ret; + int ret = -1; CYASSL_SESSION* session = GetSession(ssl,ssl->arrays->masterSecret); if (!session) { CYASSL_MSG("Session lookup for resume failed"); diff --git a/src/ssl.c b/src/ssl.c index 0ea540a68..d208c7be8 100644 --- a/src/ssl.c +++ b/src/ssl.c @@ -160,6 +160,7 @@ CYASSL* CyaSSL_new(CYASSL_CTX* ctx) CYASSL* ssl = NULL; int ret = 0; + (void)ret; CYASSL_ENTER("SSL_new"); if (ctx == NULL) @@ -8184,7 +8185,6 @@ static int initGlobalRNG = 0; byte buff[1024]; RNG tmpRNG; RNG* rng = &tmpRNG; - int ret; int len = bits/8; (void)top; @@ -8199,7 +8199,7 @@ static int initGlobalRNG = 0; if (bits % 8) len++; - if ( (ret = InitRng(&tmpRNG)) != 0) { + if ( (InitRng(&tmpRNG)) != 0) { CYASSL_MSG("Bad RNG Init, trying global"); if (initGlobalRNG == 0) { CYASSL_MSG("Global RNG no Init"); @@ -8467,7 +8467,6 @@ static int initGlobalRNG = 0; word32 privSz = sizeof(priv); RNG tmpRNG; RNG* rng = &tmpRNG; - int ret; CYASSL_MSG("CyaSSL_DH_generate_key"); @@ -8483,7 +8482,7 @@ static int initGlobalRNG = 0; } } - if ( (ret = InitRng(&tmpRNG)) != 0) { + if ( (InitRng(&tmpRNG)) != 0) { CYASSL_MSG("Bad RNG Init, trying global"); if (initGlobalRNG == 0) { CYASSL_MSG("Global RNG no Init"); @@ -9237,11 +9236,9 @@ static int initGlobalRNG = 0; switch(id) { case NID_md5: return CyaSSL_EVP_md5(); - break; case NID_sha1: return CyaSSL_EVP_sha1(); - break; default: CYASSL_MSG("Bad digest id value"); From b430a14032553401bc48439971ef14c8d8077346 Mon Sep 17 00:00:00 2001 From: takashikojo Date: Sun, 19 May 2013 10:33:32 +0900 Subject: [PATCH 02/16] make up for MDK-ARM release --- IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h | 3 --- IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c | 7 +++++- cyassl/test.h | 1 - examples/client/client.c | 2 +- examples/echoclient/echoclient.c | 2 +- examples/echoserver/echoserver.c | 2 +- src/internal.c | 24 +++++++++++++++++++++ src/io.c | 8 +++++++ src/ssl.c | 4 +++- 9 files changed, 44 insertions(+), 9 deletions(-) diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h index 3deb41867..c565b6e15 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h @@ -84,9 +84,6 @@ extern int Cyassl_accept(int sd, struct sockaddr *addr, socklen_t *addrlen); extern int Cyassl_recv(int sd, void *buf, size_t len, int flags); extern int Cyassl_send(int sd, const void *buf, size_t len, int flags); extern void Cyassl_sleep(int sec) ; -extern int Cyassl_tcp_socket(SOCKET_T* sockfd, int udp) ; -extern void Cyassl_tcp_listen(SOCKET_T* sockfd, int port, - int useAnyAddr, int udp) ; extern int Cyassl_tcp_select(int sd, int timeout) ; /** KEIL-RL TCPnet ****/ diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c index e750400f7..024d10373 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c @@ -45,4 +45,9 @@ int CyaSSL_get_using_nonblock(CYASSL* ssl) CYASSL_LEAVE("CyaSSL_get_using_nonblock", ssl->options.usingNonblock); return ssl->options.usingNonblock; } - + +Signer* GetCAByName(void* vp, byte* hash) +{ + Signer * ca ; + return(ca) ; +} diff --git a/cyassl/test.h b/cyassl/test.h index 97bd6e89d..641826a0e 100644 --- a/cyassl/test.h +++ b/cyassl/test.h @@ -21,7 +21,6 @@ #define SNPRINTF _snprintf #elif defined(CYASSL_MDK_ARM) #include - #define SOCKET_T unsigned int #else #include #include diff --git a/examples/client/client.c b/examples/client/client.c index dc6f6fd70..e0479d839 100644 --- a/examples/client/client.c +++ b/examples/client/client.c @@ -133,7 +133,7 @@ static void Usage(void) } #ifdef CYASSL_MDK_SHELL -#define exit(code) return +#define exit(code) return(code) #endif THREAD_RETURN CYASSL_THREAD client_test(void* args) diff --git a/examples/echoclient/echoclient.c b/examples/echoclient/echoclient.c index 1b6c05c67..0c444a2a2 100644 --- a/examples/echoclient/echoclient.c +++ b/examples/echoclient/echoclient.c @@ -93,7 +93,7 @@ void echoclient_test(void* args) doPSK = 1; #endif -#if defined(NO_MAIN_DRIVER) && !defined(USE_WINDOWS_API) +#if defined(NO_MAIN_DRIVER) && !defined(USE_WINDOWS_API) && !defined(CYASSL_MDK_SHELL) port = ((func_args*)args)->signal->port; #endif diff --git a/examples/echoserver/echoserver.c b/examples/echoserver/echoserver.c index b35c4bee3..cc4ed7200 100644 --- a/examples/echoserver/echoserver.c +++ b/examples/echoserver/echoserver.c @@ -107,7 +107,7 @@ THREAD_RETURN CYASSL_THREAD echoserver_test(void* args) #endif #if defined(NO_MAIN_DRIVER) && !defined(USE_WINDOWS_API) && \ - !defined(CYASSL_SNIFFER) + !defined(CYASSL_SNIFFER) && !defined(CYASSL_MDK_SHELL) port = 0; #endif #if defined(USE_ANY_ADDR) diff --git a/src/internal.c b/src/internal.c index 07defa7c1..b7dc206cd 100644 --- a/src/internal.c +++ b/src/internal.c @@ -10189,6 +10189,30 @@ int UnLockMutex(CyaSSL_Mutex *m) else return BAD_MUTEX_ERROR; } + + #elif defined(CYASSL_MDK_ARM) + int InitMutex(CyaSSL_Mutex* m) + { + os_mut_init (m); + return 0; + } + + int FreeMutex(CyaSSL_Mutex* m) + { + return(0) ; + } + + int LockMutex(CyaSSL_Mutex* m) + { + os_mut_wait (m, 0xffff); + return(0) ; + } + + int UnLockMutex(CyaSSL_Mutex* m) + { + os_mut_release (m); + return 0; + } #endif /* USE_WINDOWS_API */ #endif /* SINGLE_THREADED */ diff --git a/src/io.c b/src/io.c index 1324466c8..d16e96f3c 100644 --- a/src/io.c +++ b/src/io.c @@ -55,6 +55,14 @@ #elif defined(FREESCALE_MQX) #include #include + #elif defined(CYASSL_MDK_ARM) + #include + #undef RNG + #include "CYASSL_MDK_ARM.h" + #undef RNG + #define RNG CyaSSL_RNG + /* for avoiding name conflict in "stm32f2xx.h" */ + static int errno ; #else #include #include diff --git a/src/ssl.c b/src/ssl.c index d208c7be8..bec7080eb 100644 --- a/src/ssl.c +++ b/src/ssl.c @@ -5315,7 +5315,9 @@ int CyaSSL_set_compression(CYASSL* ssl) } -#ifdef USE_WINDOWS_API +#ifdef USE_WINDOWS_API + #define CloseSocket(s) closesocket(s) +#elif defined(CYASSL_MDK_ARM) #define CloseSocket(s) closesocket(s) #else #define CloseSocket(s) close(s) From d3ceb89fb01a331ac069268937f5cb3de1e92a6f Mon Sep 17 00:00:00 2001 From: takashikojo Date: Sun, 19 May 2013 10:47:35 +0900 Subject: [PATCH 03/16] make up #2 for MDK-ARM --- IDE/MDK-ARM/MDK-ARM/config/File_Config.c | 387 ++++++++ IDE/MDK-ARM/MDK-ARM/config/Net_Config.c | 892 ++++++++++++++++++ IDE/MDK-ARM/MDK-ARM/config/Net_Debug.c | 139 +++ IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c | 205 ++++ IDE/MDK-ARM/MDK-ARM/config/STM32_SWO.ini | 36 + .../MDK-ARM/config/startup_stm32f2xx.s | 419 ++++++++ 6 files changed, 2078 insertions(+) create mode 100644 IDE/MDK-ARM/MDK-ARM/config/File_Config.c create mode 100644 IDE/MDK-ARM/MDK-ARM/config/Net_Config.c create mode 100644 IDE/MDK-ARM/MDK-ARM/config/Net_Debug.c create mode 100644 IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c create mode 100644 IDE/MDK-ARM/MDK-ARM/config/STM32_SWO.ini create mode 100644 IDE/MDK-ARM/MDK-ARM/config/startup_stm32f2xx.s diff --git a/IDE/MDK-ARM/MDK-ARM/config/File_Config.c b/IDE/MDK-ARM/MDK-ARM/config/File_Config.c new file mode 100644 index 000000000..9c121dac5 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/config/File_Config.c @@ -0,0 +1,387 @@ +/*---------------------------------------------------------------------------- + * RL-ARM - FlashFS + *---------------------------------------------------------------------------- + * Name: FILE_CONFIG.C + * Purpose: Configuration of RL FlashFS by user + * Rev.: V4.50 + *---------------------------------------------------------------------------- + * This code is part of the RealView Run-Time Library. + * Copyright (c) 2004-2012 KEIL - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#include + +//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- +// +// File System +// ============== +// Define File System global parameters + +// Number of open files <4-16> +// Define number of files that can be +// opened at the same time. +// Default: 8 +#define N_FILES 6 + +// CPU Clock Frequency [Hz]<0-1000000000> +// Define the CPU Clock frequency used for +// flash programming and erasing. +#define CPU_CLK 120000000 + +// +// Flash Drive +// ============== +// Enable Embedded Flash Drive [F:] +#define FL0_EN 0 + +// Base address <0x0-0xFFFFF000:0x1000> +// Define the target device Base address +// Default: 0x80000000 +#define FL0_BADR 0x80000000 + +// Device Size <0x4000-0xFFFFF000:0x4000> +// Define the size of Flash device in bytes +// Default: 0x100000 (1MB) +#define FL0_SIZE 0x0200000 + +// Content of Erased Memory <0=>0x00 <0xFF=>0xFF +// Define the initial value for erased Flash data +// Default: 0xFF +#define FL0_INITV 0xFF + +// Device Description file +// Specify a file name with a relative path +// Default: FS_FlashDev.h +#define FL0_HFILE "FS_FlashDev.h" + +// Default Drive [F:] +// Used when Drive letter not specified +#define FL0_DEF 1 + +// +// SPI Flash Drive +// ================== +// Enable SPI Flash Drive [S:] +#define SF0_EN 0 + +// Device Size <0x10000-0xFFFFF000:0x8000> +// Define the size of SPI Flash device in bytes +// Default: 0x100000 (1MB) +#define SF0_SIZE 0x0200000 + +// Content of Erased Memory <0=>0x00 <0xFF=>0xFF +// Define the initial value for erased Flash data +// Default: 0xFF +#define SF0_INITV 0xFF + +// Device Description file +// Specify a file name with a relative path +// Default: FS_SPI_FlashDev.h +#define SF0_HFILE "FS_SPI_FlashDev.h" + +// Default Drive [S:] +// Used when Drive letter not specified +#define SF0_DEF 0 + +// +// RAM Drive +// ============ +// Enable Embedded RAM Drive [R:] +#define RAM0_EN 0 + +// Device Size <0x4000-0xFFFFF000:0x4000> +// Define the size of RAM device in bytes +// Default: 0x40000 +#define RAM0_SIZE 0x004000 + +// Number of Sectors <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 +// Define number of virtual sectors for RAM device +// Default: 32 +#define RAM0_NSECT 64 + +// Relocate Device Buffer +// Locate RAM Device Buffer at a specific address. +// If not enabled, the linker selects base address. +#define RAM0_RELOC 1 + +// Base address <0x0-0xFFFFF000:0x1000> +// Define the target device Base address. +// Default: 0x81000000 +#define RAM0_BADR 0x81010000 + +// +// Default Drive [R:] +// Used when Drive letter not specified +#define RAM0_DEF 0 + +// +// Memory Card Drive 0 +// ====================== +// Enable Memory Card Drive [M0:] +#define MC0_EN 1 + +// Bus Mode <0=>SD-Native <1=>SPI +// Define Memory Card bus interface mode. +// SD-Native mode needs MCI peripheral. +// SPI mode uses SD Card in SPI mode. +#define MC0_SPI 0 + +// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Define System Cache buffer size for file IO. +// Increase this number for faster r/w access. +// Default: 4 kB +#define MC0_CASZ 16 + +// Relocate Cache Buffer +// Locate Cache Buffer at a specific address. +// Some devices like NXP LPC23xx require a Cache buffer +// for DMA transfer located at specific address. +#define MC0_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Define the Cache buffer base address. +// For LPC23xx/24xx devices this is USB RAM +// starting at 0x7FD00000. +#define MC0_CADR 0x7FD00000 + +// +// FAT Journal +// Enable FAT Journal in order to guarantee +// fail-safe FAT file system operation. +#define MC0_FSJ 0 + +// Default Drive [M0:] +// Used when Drive letter not specified +#define MC0_DEF 1 + +// +// Memory Card Drive 1 +// ====================== +// Enable Memory Card Drive [M1:] +#define MC1_EN 0 + +// Bus Mode <0=>SD-Native <1=>SPI +// Define Memory Card bus interface mode. +// SD-Native mode needs MCI peripheral. +// SPI mode uses SD Card in SPI mode. +#define MC1_SPI 1 + +// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Define System Cache buffer size for file IO. +// Increase this number for faster r/w access. +// Default: 4 kB +#define MC1_CASZ 0 + +// Relocate Cache Buffer +// Locate Cache Buffer at a specific address. +// Some devices like NXP LPC23xx require a Cache buffer +// for DMA transfer located at specific address. +#define MC1_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Define the Cache buffer base address. +// For LPC23xx/24xx devices this is USB RAM +// starting at 0x7FD00000. +#define MC1_CADR 0x7FD00000 + +// +// FAT Journal +// Enable FAT Journal in order to guarantee +// fail-safe FAT file system operation. +#define MC1_FSJ 0 + +// Default Drive [M1:] +// Used when Drive letter not specified +#define MC1_DEF 0 + +// +// USB Flash Drive 0 +// ==================== +// Enable USB Flash Drive [U0:] +#define USB0_EN 0 + +// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Define System Cache buffer size for file IO. +// Increase this number for faster r/w access. +// Default: 4 kB +#define USB0_CASZ 8 + +// FAT Journal +// Enable FAT Journal in order to guarantee +// fail-safe FAT file system operation. +#define USB0_FSJ 0 + +// Default Drive [U0:] +// Used when Drive letter not specified +#define USB0_DEF 1 + +// +// USB Flash Drive 1 +// ==================== +// Enable USB Flash Drive [U1:] +#define USB1_EN 0 + +// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Define System Cache buffer size for file IO. +// Increase this number for faster r/w access. +// Default: 4 kB +#define USB1_CASZ 8 + +// FAT Journal +// Enable FAT Journal in order to guarantee +// fail-safe FAT file system operation. +#define USB1_FSJ 0 + +// Default Drive [U1:] +// Used when Drive letter not specified +#define USB1_DEF 1 + +// +// NAND Flash Drive 0 +// =================== +// Enable NAND Flash Drive [N0:] +#define NAND0_EN 0 + +// Page size <528=> 512 + 16 bytes +// <2112=>2048 + 64 bytes +// <4224=>4096 + 128 bytes +// <8448=>8192 + 256 bytes +// Define program Page size in bytes (User + Spare area). +#define NAND0_PGSZ 2112 + +// Block Size <8=>8 pages <16=>16 pages <32=>32 pages +// <64=>64 pages <128=>128 pages <256=>256 pages +// Define number of pages in a block. +#define NAND0_PGCNT 64 + +// Device Size [blocks] <512-32768> +// Define number of blocks in NAND Flash device. +#define NAND0_BLCNT 4096 + +// Page Caching <0=>OFF <1=>1 page <2=>2 pages <4=>4 pages +// <8=>8 pages <16=>16 pages <32=>32 pages +// Define number of cached Pages. +// Default: 4 pages +#define NAND0_CAPG 2 + +// Block Indexing <0=>OFF <1=>1 block <2=>2 blocks <4=>4 blocks +// <8=>8 blocks <16=>16 blocks <32=>32 blocks +// <64=>64 blocks <128=>128 blocks <256=>256 blocks +// Define number of indexed Flash Blocks. +// Increase this number for better performance. +// Default: 16 blocks +#define NAND0_CABL 16 + +// Software ECC <0=>None <1=>Hamming (SLC) +// Enable software ECC calculation only, +// if not supported by hardware. +#define NAND0_SWECC 1 + +// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Define System Cache buffer size for file IO. +// Increase this number for faster r/w access. +// Default: 4 kB +#define NAND0_CASZ 4 + +// Relocate Cache Buffers +// Use this option to locate Cache buffers +// at specific address in RAM or SDRAM. +#define NAND0_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Define base address for Cache Buffers. +#define NAND0_CADR 0x80000000 + +// +// FAT Journal +// Enable FAT Journal in order to guarantee +// fail-safe FAT file system operation. +#define NAND0_FSJ 0 + +// Default Drive [N0:] +// Used when Drive letter not specified +#define NAND0_DEF 0 + +// +// NAND Flash Drive 1 +// =================== +// Enable NAND Flash Drive [N1:] +#define NAND1_EN 0 + +// Page size <528=> 512 + 16 bytes +// <2112=>2048 + 64 bytes +// <4224=>4096 + 128 bytes +// <8448=>8192 + 256 bytes +// Define program Page size in bytes (User + Spare area). +#define NAND1_PGSZ 2112 + +// Block Size <8=>8 pages <16=>16 pages <32=>32 pages +// <64=>64 pages <128=>128 pages <256=>256 pages +// Define number of pages in a block. +#define NAND1_PGCNT 32 + +// Device Size [blocks] <512-32768> +// Define number of blocks in NAND Flash device. +#define NAND1_BLCNT 512 + +// Page Caching <0=>OFF <1=>1 page <2=>2 pages <4=>4 pages +// <8=>8 pages <16=>16 pages <32=>32 pages +// Define number of cached Pages. +// Default: 4 pages +#define NAND1_CAPG 4 + +// Block Indexing <0=>OFF <1=>1 block <2=>2 blocks <4=>4 blocks +// <8=>8 blocks <16=>16 blocks <32=>32 blocks +// <64=>64 blocks <128=>128 blocks <256=>256 blocks +// Define number of indexed Flash Blocks. +// Increase this number for better performance. +// Default: 16 blocks +#define NAND1_CABL 16 + +// Software ECC <0=>None <1=>Hamming (SLC) +// Enable software ECC calculation only, +// if not supported by hardware. +#define NAND1_SWECC 0 + +// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Define System Cache buffer size for file IO. +// Increase this number for faster r/w access. +// Default: 4 kB +#define NAND1_CASZ 4 + +// Relocate Cache Buffers +// Use this option to locate Cache buffers +// at specific address in RAM or SDRAM. +#define NAND1_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Define base address for Cache Buffers. +#define NAND1_CADR 0x80000000 + +// +// FAT Journal +// Enable FAT Journal in order to guarantee +// fail-safe FAT file system operation. +#define NAND1_FSJ 0 + +// Default Drive [N1:] +// Used when Drive letter not specified +#define NAND1_DEF 0 + +// + +//------------- <<< end of configuration section >>> ----------------------- + +#ifndef __NO_FILE_LIB_C +#include +#endif + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/ diff --git a/IDE/MDK-ARM/MDK-ARM/config/Net_Config.c b/IDE/MDK-ARM/MDK-ARM/config/Net_Config.c new file mode 100644 index 000000000..dc0922308 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/config/Net_Config.c @@ -0,0 +1,892 @@ +/*---------------------------------------------------------------------------- + * RL-ARM - TCPnet + *---------------------------------------------------------------------------- + * Name: NET_CONFIG.C + * Purpose: Configuration of RL TCPnet by user. + * Rev.: V4.60 + *---------------------------------------------------------------------------- + * This code is part of the RealView Run-Time Library. + * Copyright (c) 2004-2012 KEIL - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#include + +//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- +// +// System Definitions +// ===================== +// Global TCPnet System definitions +// Local Host Name +// This is the name under which embedded host can be +// accessed on a local area network. +// Default: "mcb2300" +#define LHOST_NAME "mcb2300" + +// Memory Pool size <1500-64000:4><#/4> +// This is the size of a memory pool in bytes. Buffers for +// TCPnet packets are allocated from this memory pool. +// Default: 8000 bytes +#define MEM_SIZE 4000 + +// Tick Timer interval <10=> 10 ms <20=> 20 ms <25=> 25 ms +// <40=> 40 ms <50=> 50 ms <100=> 100 ms +// <200=> 200 ms +// System Tick Timer interval for software timers +// Default: 100 ms +#define TICK_INTERVAL 10 + +// +// Ethernet Network Interface +// ============================= +// Enable or disable Ethernet Network Interface +#define ETH_ENABLE 1 + +// MAC Address +// ============== +// Local Ethernet MAC Address +// Value FF:FF:FF:FF:FF:FF is not allowed. +// It is an ethernet Broadcast MAC address. +// Address byte 1 <0x00-0xff:2> +// LSB is an ethernet Multicast bit. +// Must be 0 for local MAC address. +// Default: 0x00 +#define _MAC1 0x30 + +// Address byte 2 <0x00-0xff> +// Default: 0x30 +#define _MAC2 0x06 + +// Address byte 3 <0x00-0xff> +// Default: 0x6C +#define _MAC3 0x6C + +// Address byte 4 <0x00-0xff> +// Default: 0x00 +#define _MAC4 0x00 + +// Address byte 5 <0x00-0xff> +// Default: 0x00 +#define _MAC5 0x00 + +// Address byte 6 <0x00-0xff> +// Default: 0x01 +#define _MAC6 0x01 + +// +// IP Address +// ============= +// Local Static IP Address +// Value 255.255.255.255 is not allowed. +// It is a Broadcast IP address. +// Address byte 1 <0-255> +// Default: 192 +#define _IP1 192 + +// Address byte 2 <0-255> +// Default: 168 +#define _IP2 168 + +// Address byte 3 <0-255> +// Default: 0 +#define _IP3 0 + +// Address byte 4 <0-255> +// Default: 100 +#define _IP4 100 + +// +// Subnet mask +// ============== +// Local Subnet mask +// Mask byte 1 <0-255> +// Default: 255 +#define _MSK1 255 + +// Mask byte 2 <0-255> +// Default: 255 +#define _MSK2 255 + +// Mask byte 3 <0-255> +// Default: 255 +#define _MSK3 255 + +// Mask byte 4 <0-255> +// Default: 0 +#define _MSK4 0 + +// +// Default Gateway +// ================== +// Default Gateway IP Address +// Address byte 1 <0-255> +// Default: 192 +#define _GW1 192 + +// Address byte 2 <0-255> +// Default: 168 +#define _GW2 168 + +// Address byte 3 <0-255> +// Default: 0 +#define _GW3 0 + +// Address byte 4 <0-255> +// Default: 254 +#define _GW4 254 + +// +// Primary DNS Server +// ===================== +// Primary DNS Server IP Address +// Address byte 1 <0-255> +// Default: 194 +#define _pDNS1 194 + +// Address byte 2 <0-255> +// Default: 25 +#define _pDNS2 25 + +// Address byte 3 <0-255> +// Default: 2 +#define _pDNS3 2 + +// Address byte 4 <0-255> +// Default: 129 +#define _pDNS4 129 + +// +// Secondary DNS Server +// ======================= +// Secondary DNS Server IP Address +// Address byte 1 <0-255> +// Default: 194 +#define _sDNS1 194 + +// Address byte 2 <0-255> +// Default: 25 +#define _sDNS2 25 + +// Address byte 3 <0-255> +// Default: 2 +#define _sDNS3 2 + +// Address byte 4 <0-255> +// Default: 130 +#define _sDNS4 130 + +// +// ARP Definitions +// ================== +// Address Resolution Protocol Definitions +// Cache Table size <5-100> +// Number of cached hardware/IP addresses +// Default: 10 +#define ARP_TABSIZE 10 + +// Cache Timeout in seconds <5-255> +// A timeout for a cached hardware/IP addresses +// Default: 150 +#define ARP_TIMEOUT 150 + +// Number of Retries <0-20> +// Number of Retries to resolve an IP address +// before ARP module gives up +// Default: 4 +#define ARP_MAXRETRY 4 + +// Resend Timeout in seconds <1-10> +// A timeout to resend the ARP Request +// Default: 2 +#define ARP_RESEND 10 + +// Send Notification on Address changes +// When this option is enabled, the embedded host +// will send a Gratuitous ARP notification at startup, +// or when the device IP address has changed. +// Default: Disabled +#define ARP_NOTIFY 1 + +// +// IGMP Group Management +// ======================== +// Enable or disable Internet Group Management Protocol +#define IGMP_ENABLE 0 + +// Membership Table size <2-50> +// Number of Groups this host can join +// Default: 5 +#define IGMP_TABSIZE 5 + +// +// NetBIOS Name Service +// ======================= +// When this option is enabled, the embedded host can be +// accessed by his name on the local LAN using NBNS protocol. +// You need to modify also the number of UDP Sockets, +// because NBNS protocol uses one UDP socket to run. +#define NBNS_ENABLE 0 + +// Dynamic Host Configuration +// ============================= +// When this option is enabled, local IP address, Net Mask +// and Default Gateway are obtained automatically from +// the DHCP Server on local LAN. +// You need to modify also the number of UDP Sockets, +// because DHCP protocol uses one UDP socket to run. +#define DHCP_ENABLE 1 + +// Vendor Class Identifier +// This value is optional. If specified, it is added +// to DHCP request message, identifying vendor type. +// Default: "" +#define DHCP_VCID "" + +// Bootfile Name +// This value is optional. If enabled, the Bootfile Name +// (option 67) is also requested from DHCP server. +// Default: disabled +#define DHCP_BOOTF 1 + +// +// + +// PPP Network Interface +// ======================== +// Enable or disable PPP Network Interface +#define PPP_ENABLE 0 + +// IP Address +// ============= +// Local Static IP Address +// Address byte 1 <0-255> +// Default: 192 +#define _IP1P 192 + +// Address byte 2 <0-255> +// Default: 168 +#define _IP2P 168 + +// Address byte 3 <0-255> +// Default: 125 +#define _IP3P 125 + +// Address byte 4 <0-255> +// Default: 1 +#define _IP4P 1 + +// +// Subnet mask +// ============== +// Local Subnet mask +// Mask byte 1 <0-255> +// Default: 255 +#define _MSK1P 255 + +// Mask byte 2 <0-255> +// Default: 255 +#define _MSK2P 255 + +// Mask byte 3 <0-255> +// Default: 255 +#define _MSK3P 255 + +// Mask byte 4 <0-255> +// Default: 0 +#define _MSK4P 0 + +// +// Primary DNS Server +// ===================== +// Primary DNS Server IP Address +// Address byte 1 <0-255> +// Default: 194 +#define _pDNS1P 194 + +// Address byte 2 <0-255> +// Default: 25 +#define _pDNS2P 25 + +// Address byte 3 <0-255> +// Default: 2 +#define _pDNS3P 2 + +// Address byte 4 <0-255> +// Default: 129 +#define _pDNS4P 129 + +// +// Secondary DNS Server +// ======================= +// Secondary DNS Server IP Address +// Address byte 1 <0-255> +// Default: 194 +#define _sDNS1P 194 + +// Address byte 2 <0-255> +// Default: 25 +#define _sDNS2P 25 + +// Address byte 3 <0-255> +// Default: 2 +#define _sDNS3P 2 + +// Address byte 4 <0-255> +// Default: 130 +#define _sDNS4P 130 + +// +// Logon Authentication +// ======================= +// Enable or disable user authentication +#define PPP_AUTHEN 1 + +// Unsecured password (PAP) +// Allow or use Password Authentication Protocol. +#define PPP_PAPEN 1 + +// Secured password (CHAP-MD5) +// Request or use Challenge Handshake Authentication +// Protocol with MD5 digest algorithm. +#define PPP_CHAPEN 1 + +// +// Obtain Client IP address automatically +// ========================================= +// This option only applies when PPP Dial-up is used to dial +// to remote PPP Server. If checked, network connection +// dynamically obtains an IP address from remote PPP Server. +#define PPP_GETIP 1 + +// Use Default Gateway on remote Network +// ======================================== +// This option only applies when both Ethernet and PPP Dial-up +// are used. If checked, data that cannot be sent to local LAN +// is forwarded to Dial-up network instead. +#define PPP_DEFGW 1 + +// Async Control Character Map <0x0-0xffffffff> +// A bit-map of control characters 0-31, which are +// transmitted escaped as a 2 byte sequence. +// For XON/XOFF set this value to: 0x000A 0000 +// Default: 0x00000000 +#define PPP_ACCM 0x00000000 + +// LCP Echo Interval in seconds <0-3600> +// If no frames are received within this interval, PPP sends an +// Echo Request and expects an Echo Response from the peer. +// If the response is not received, the link is terminated. +// A value of 0 disables the LCP Echo test. +// Default: 30 +#define PPP_ECHOTOUT 30 + +// Number of Retries <0-20> +// How many times PPP will try to retransmit data +// before giving up. Increase this value for links +// with low baud rates or high latency. +// Default: 3 +#define PPP_MAXRETRY 3 + +// Retry Timeout in seconds <1-10> +// If no response received within this time frame, +// PPP module will try to resend the data again. +// Default: 2 +#define PPP_RETRYTOUT 2 + +// +// SLIP Network Interface +// ======================== +// Enable or disable SLIP Network Interface +#define SLIP_ENABLE 0 + +// IP Address +// ============= +// Local Static IP Address +// Address byte 1 <0-255> +// Default: 192 +#define _IP1S 192 + +// Address byte 2 <0-255> +// Default: 168 +#define _IP2S 168 + +// Address byte 3 <0-255> +// Default: 225 +#define _IP3S 225 + +// Address byte 4 <0-255> +// Default: 1 +#define _IP4S 1 + +// +// Subnet mask +// ============== +// Local Subnet mask +// Mask byte 1 <0-255> +// Default: 255 +#define _MSK1S 255 + +// Mask byte 2 <0-255> +// Default: 255 +#define _MSK2S 255 + +// Mask byte 3 <0-255> +// Default: 255 +#define _MSK3S 255 + +// Mask byte 4 <0-255> +// Default: 0 +#define _MSK4S 0 + +// +// Primary DNS Server +// ===================== +// Primary DNS Server IP Address +// Address byte 1 <0-255> +// Default: 194 +#define _pDNS1S 194 + +// Address byte 2 <0-255> +// Default: 25 +#define _pDNS2S 25 + +// Address byte 3 <0-255> +// Default: 2 +#define _pDNS3S 2 + +// Address byte 4 <0-255> +// Default: 129 +#define _pDNS4S 129 + +// +// Secondary DNS Server +// ======================= +// Secondary DNS Server IP Address +// Address byte 1 <0-255> +// Default: 194 +#define _sDNS1S 194 + +// Address byte 2 <0-255> +// Default: 25 +#define _sDNS2S 25 + +// Address byte 3 <0-255> +// Default: 2 +#define _sDNS3S 2 + +// Address byte 4 <0-255> +// Default: 130 +#define _sDNS4S 130 + +// +// Use Default Gateway on remote Network +// ======================================== +// This option only applies when both Ethernet and SLIP Dial-up +// are used. If checked, data that cannot be sent to local LAN +// is forwarded to Dial-up network instead. +#define SLIP_DEFGW 1 + +// +// UDP Sockets +// ============== +// Enable or disable UDP Sockets +#define UDP_ENABLE 1 + +// Number of UDP Sockets <1-20> +// Number of available UDP sockets +// Default: 5 +#define UDP_NUMSOCKS 20 + +// +// TCP Sockets +// ============== +// Enable or disable TCP Sockets +#define TCP_ENABLE 1 + +// Number of TCP Sockets <1-20> +// Number of available TCP sockets +// Default: 5 +#define TCP_NUMSOCKS 10 + +// Number of Retries <0-20> +// How many times TCP module will try to retransmit data +// before giving up. Increase this value for high-latency +// and low_throughput networks. +// Default: 5 +#define TCP_MAXRETRY 20 + +// Retry Timeout in seconds <1-10> +// If data frame not acknowledged within this time frame, +// TCP module will try to resend the data again. +// Default: 4 +#define TCP_RETRYTOUT 4 + +// Default Connect Timeout in seconds <1-600> +// Default TCP Socket Keep Alive timeout. When it expires +// with no TCP data frame send, TCP Connection is closed. +// Default: 120 +#define TCP_DEFTOUT 120 + +// Maximum Segment Size <536-1460> +// The Maximum Segment Size specifies the maximum +// number of bytes in the TCP segment's Data field. +// Default: 1460 +#define TCP_MAXSEGSZ 1460 + +/* TCP fixed timeouts */ +#define TCP_INIT_RETRY_TOUT 1 /* TCP initial Retransmit period in sec. */ +#define TCP_SYN_RETRY_TOUT 2 /* TCP SYN frame retransmit period in sec. */ +#define TCP_CONRETRY 7 /* Number of retries to establish a conn. */ + +// +// HTTP Server +// ============== +// Enable or disable HTTP Server +#define HTTP_ENABLE 0 + +// Number of HTTP Sessions <1-10> +// Number of simultaneously active HTTP Sessions. +// Default: 3 +#define HTTP_NUMSESS 3 + +// Port Number <1-65535> +// Listening port number. +// Default: 80 +#define HTTP_PORTNUM 80 + +// Server-Id header +// This value is optional. If specified, it overrides +// the default HTTP Server header from the library. +// Default: "" +#define HTTP_SRVID "" + +// Enable User Authentication +// When enabled, the user will have to authenticate +// himself by username and password before accessing +// any page on this Embedded WEB server. +#define HTTP_ENAUTH 1 + +// Authentication Realm +// Default: "Embedded WEB Server" +#define HTTP_AUTHREALM "Embedded WEB Server" + +// Authentication Username +// Default: "admin" +#define HTTP_AUTHUSER "admin" + +// Authentication Password +// Default: "" +#define HTTP_AUTHPASSW "" + +// +// +// Telnet Server +// ================ +// Enable or disable Telnet Server +#define TNET_ENABLE 0 + +// Number of Telnet Connections <1-10> +// Number of simultaneously active Telnet Connections. +// Default: 1 +#define TNET_NUMSESS 1 + +// Port Number <1-65535> +// Listening port number. +// Default: 23 +#define TNET_PORTNUM 23 + +// Idle Connection Timeout in seconds <0-3600> +// When timeout expires, the connection is closed. +// A value of 0 disables disconnection on timeout. +// Default: 120 +#define TNET_IDLETOUT 120 + +// Disable Echo +// When disabled, the server will not echo +// characters it receives. +// Default: Not disabled +#define TNET_NOECHO 0 + +// Enable User Authentication +// When enabled, the user will have to authenticate +// himself by username and password before access +// to the system is allowed. +#define TNET_ENAUTH 1 + +// Authentication Username +// Default: "admin" +#define TNET_AUTHUSER "admin" + +// Authentication Password +// Default: "" +#define TNET_AUTHPASSW "" + +// +// +// TFTP Server +// ============== +// Enable or disable TFTP Server +#define TFTP_ENABLE 0 + +// Number of TFTP Sessions <1-10> +// Number of simultaneously active TFTP Sessions +// Default: 1 +#define TFTP_NUMSESS 1 + +// Port Number <1-65535> +// Listening port number. +// Default: 69 +#define TFTP_PORTNUM 69 + +// Enable Firewall Support +// Use the same Port Number to receive +// requests and send answers to clients. +// Default: Not Enabled +#define TFTP_ENFWALL 0 + +// Inactive Session Timeout in seconds <5-120> +// When timeout expires TFTP Session is closed. +// Default: 15 +#define TFTP_DEFTOUT 15 + +// Number of Retries <1-10> +// How many times TFTP Server will try to +// retransmit the data before giving up. +// Default: 4 +#define TFTP_MAXRETRY 4 + +// +// TFTP Client +// ============== +// Enable or disable TFTP Client +#define TFTPC_ENABLE 0 + +// Block Size <128=>128 <256=>256 <512=>512 +// <1024=>1024 <1428=>1428 +// Size of transfer block in bytes. +// Default: 512 +#define TFTPC_BLOCKSZ 512 + +// Number of Retries <1-10> +// How many times TFTP Client will try to +// retransmit the data before giving up. +// Default: 4 +#define TFTPC_MAXRETRY 4 + +// Retry Timeout <2=>200 ms <5=>500 ms <10=>1 sec +// <20=>2 sec <50=>5 sec <100=>10 sec +// If data frame not acknowledged within this time frame, +// TFTP Client will try to resend the data again. +// Default: 500 ms +#define TFTPC_RETRYTO 5 + +// +// FTP Server +// ============== +// Enable or disable FTP Server +#define FTP_ENABLE 0 + +// Number of FTP Sessions <1-10> +// Number of simultaneously active FTP Sessions +// Default: 1 +#define FTP_NUMSESS 1 + +// Port Number <1-65535> +// Listening port number. +// Default: 21 +#define FTP_PORTNUM 21 + +// Welcome Message +// This value is optional. If specified, +// it overrides the default welcome message. +// Default: "" +#define FTP_WELMSG "" + +// Idle Session Timeout in seconds <0-3600> +// When timeout expires, the connection is closed. +// A value of 0 disables disconnection on timeout. +// Default: 120 +#define FTP_IDLETOUT 120 + +// Enable User Authentication +// When enabled, the user will have to authenticate +// himself by username and password before access +// to the system is allowed. +#define FTP_ENAUTH 1 + +// Authentication Username +// Default: "admin" +#define FTP_AUTHUSER "admin" + +// Authentication Password +// Default: "" +#define FTP_AUTHPASSW "" + +// +// +// FTP Client +// ============= +// Enable or disable FTP Client +#define FTPC_ENABLE 0 + +// Response Timeout in seconds <1-120> +// This is a time for FTP Client to wait for a response from +// the Server. If timeout expires, Client aborts operation. +// Default: 10 +#define FTPC_DEFTOUT 10 + +// Passive mode (PASV) +// The client initiates a data connection to the server. +// Default: Not passive (Active) +#define FTPC_PASVMODE 0 + +// +// DNS Client +// ============= +// Enable or disable DNS Client +#define DNS_ENABLE 1 + +// Cache Table size <5-100> +// Number of cached DNS host names/IP addresses +// Default: 20 +#define DNS_TABSIZE 20 + +// +// SMTP Client +// ============== +// Enable or disable SMTP Client +#define SMTP_ENABLE 0 + +// Response Timeout in seconds <5-120> +// This is a time for SMTP Client to wait for a response from +// SMTP Server. If timeout expires, Client aborts operation. +// Default: 20 +#define SMTP_DEFTOUT 20 + +// +// SNMP Agent +// ============= +// Enable or disable SNMP Agent +#define SNMP_ENABLE 0 + +// Community Name +// Defines where an SNMP message is destined for. +// Default: "public" +#define SNMP_COMMUNITY "public" + +// Port Number <1-65535> +// Listening port number. +// Default: 161 +#define SNMP_PORTNUM 161 + +// Trap Port Number <1-65535> +// Port number for Trap operations. +// Default: 162 +#define SNMP_TRAPPORT 162 + +// Trap Server +// ============== +// Trap Server IP Address +// Address byte 1 <0-255> +// Default: 192 +#define SNMP_TRAPIP1 192 + +// Address byte 2 <0-255> +// Default: 168 +#define SNMP_TRAPIP2 168 + +// Address byte 3 <0-255> +// Default: 0 +#define SNMP_TRAPIP3 0 + +// Address byte 4 <0-255> +// Default: 100 +#define SNMP_TRAPIP4 100 + +// +// +// BSD Socket Interface +// ======================= +// Enable or disable Berkeley Socket Programming Interface +#define BSD_ENABLE 1 + +// Number of BSD Sockets <1-20> +// Number of available Berkeley Sockets +// Default: 2 +#define BSD_NUMSOCKS 10 + +// Number of Streaming Server Sockets <0-20> +// Defines a number of Streaming (TCP) Server sockets, +// that listen for an incoming connection from the client. +// Default: 1 +#define BSD_SRVSOCKS 2 + +// Receive Timeout in seconds <0-600> +// A timeout for socket receive in blocking mode. +// Timeout value of 0 means indefinite timeout. +// Default: 20 +#define BSD_RCVTOUT 20 + +// Hostname Resolver +// Enable or disable Berkeley style hostname resolver. +#define BSD_GETHOSTEN 1 + +// +//------------- <<< end of configuration section >>> ----------------------- + +/*---------------------------------------------------------------------------- + * Fatal Error Handler + *---------------------------------------------------------------------------*/ + +void sys_error (ERROR_CODE code) { + /* This function is called when a fatal error is encountered. The normal */ + /* program execution is not possible anymore. Add your crytical error .*/ + /* handler code here. */ + + switch (code) { + case ERR_MEM_ALLOC: + /* Out of memory. */ + break; + + case ERR_MEM_FREE: + /* Trying to release non existing memory block. */ + break; + + case ERR_MEM_CORRUPT: + /* Memory Link pointer is Corrupted. */ + /* More data written than the size of allocated mem block. */ + break; + + case ERR_MEM_LOCK: + /* Locked Memory management function (alloc/free) re-entered. */ + /* RTX multithread protection malfunctioning, not implemented */ + /* or interrupt disable is not functioning correctly. */ + break; + + case ERR_UDP_ALLOC: + /* Out of UDP Sockets. */ + break; + + case ERR_TCP_ALLOC: + /* Out of TCP Sockets. */ + break; + + case ERR_TCP_STATE: + /* TCP State machine in undefined state. */ + break; + } + + /* End-less loop */ + while (1); +} + +/*---------------------------------------------------------------------------- + * TCPnet Config Functions + *---------------------------------------------------------------------------*/ + +#define __NET_CONFIG__ + +#include + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/ diff --git a/IDE/MDK-ARM/MDK-ARM/config/Net_Debug.c b/IDE/MDK-ARM/MDK-ARM/config/Net_Debug.c new file mode 100644 index 000000000..f7a5c9af0 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/config/Net_Debug.c @@ -0,0 +1,139 @@ +/*---------------------------------------------------------------------------- + * RL-ARM - TCPnet + *---------------------------------------------------------------------------- + * Name: NET_DEBUG.C + * Purpose: Debug Module + * Rev.: V4.60 + *---------------------------------------------------------------------------- + * This code is part of the RealView Run-Time Library. + * Copyright (c) 2004-2012 KEIL - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#include + +//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- + +// Print Time Stamp +// =================== +// Enable printing the time-info in debug messages +#define DBG_TIME 1 + +// TCPnet Debug Definitions +// =========================== +// Memory Management Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Dynamic Memory debug messages +#define DBG_MEM 1 + +// Ethernet Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Ethernet debug messages +#define DBG_ETH 1 + +// PPP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off PPP debug messages +#define DBG_PPP 0 + +// SLIP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off SLIP debug messages +#define DBG_SLIP 0 + +// ARP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off ARP debug messages +#define DBG_ARP 1 + +// IP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off IP debug messages +#define DBG_IP 1 + +// ICMP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off ICMP debug messages +#define DBG_ICMP 1 + +// IGMP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off IGMP debug messages +#define DBG_IGMP 1 + +// UDP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off UDP debug messages +#define DBG_UDP 1 + +// TCP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off TCP debug messages +#define DBG_TCP 2 + +// NBNS Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off NetBIOS Name Service debug messages +#define DBG_NBNS 1 + +// DHCP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Dynamic Host Configuration debug messages +#define DBG_DHCP 2 + +// DNS Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Domain Name Service debug messages +#define DBG_DNS 1 + +// SNMP Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Simple Network Management debug messages +#define DBG_SNMP 1 + +// BSD Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off BSD Interface debug messages +#define DBG_BSD 2 + +// +// Application Debug Definitions +// ================================ +// HTTP Server Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Web Server debug messages +#define DBG_HTTP 1 + +// FTP Server Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off FTP Server debug messages +#define DBG_FTP 1 + +// FTP Client Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off FTP Client debug messages +#define DBG_FTPC 1 + +// Telnet Server Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off Telnet Server debug messages +#define DBG_TNET 1 + +// TFTP Server Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off TFTP Server debug messages +#define DBG_TFTP 1 + +// TFTP Client Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off TFTP Client debug messages +#define DBG_TFTPC 1 + +// SMTP Client Debug <0=> Off <1=> Errors only <2=> Full debug +// Turn On/Off SMTP Client debug messages +#define DBG_SMTP 1 + +// + +//------------- <<< end of configuration section >>> ----------------------- + + +/*--------------------------- init_debug ------------------------------------*/ + +void init_debug (void) { + /* Add your code to initialize the Debug output. This is usually the */ + /* serial interface. The function is called at TCPnet system startup. */ + /* You may need to customize also the 'putchar()' function. */ + +} + + +/*---------------------------------------------------------------------------- + * TCPnet Debug Functions + *---------------------------------------------------------------------------*/ + +#define __NET_DEBUG__ + +#include + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/ diff --git a/IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c b/IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c new file mode 100644 index 000000000..2d932a2d1 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c @@ -0,0 +1,205 @@ +/*---------------------------------------------------------------------------- + * RL-ARM - RTX + *---------------------------------------------------------------------------- + * Name: RTX_CONFIG.C + * Purpose: Configuration of RTX Kernel for Cortex-M + * Rev.: V4.60 + *---------------------------------------------------------------------------- + * This code is part of the RealView Run-Time Library. + * Copyright (c) 2004-2012 KEIL - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#include + +/*---------------------------------------------------------------------------- + * RTX User configuration part BEGIN + *---------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- +// +// Task Configuration +// ===================== +// +// Number of concurrent running tasks <0-250> +// Define max. number of tasks that will run at the same time. +// Default: 6 +#ifndef OS_TASKCNT + #define OS_TASKCNT 6 +#endif + +// Number of tasks with user-provided stack <0-250> +// Define the number of tasks that will use a bigger stack. +// The memory space for the stack is provided by the user. +// Default: 0 +#ifndef OS_PRIVCNT + #define OS_PRIVCNT 2 +#endif + +// Task stack size [bytes] <20-4096:8><#/4> +// Set the stack size for tasks which is assigned by the system. +// Default: 512 +#ifndef OS_STKSIZE + #define OS_STKSIZE 250 +#endif + +// Check for the stack overflow +// =============================== +// Include the stack checking code for a stack overflow. +// Note that additional code reduces the Kernel performance. +#ifndef OS_STKCHECK + #define OS_STKCHECK 1 +#endif + +// Run in privileged mode +// ========================= +// Run all Tasks in privileged mode. +// Default: Unprivileged +#ifndef OS_RUNPRIV + #define OS_RUNPRIV 1 +#endif + +// +// Tick Timer Configuration +// ============================= +// Hardware timer <0=> Core SysTick <1=> Peripheral Timer +// Define the on-chip timer used as a time-base for RTX. +// Default: Core SysTick +#ifndef OS_TIMER + #define OS_TIMER 0 +#endif + +// Timer clock value [Hz] <1-1000000000> +// Set the timer clock value for selected timer. +// Default: 6000000 (6MHz) +#ifndef OS_CLOCK + #define OS_CLOCK 120000000 +#endif + +// Timer tick value [us] <1-1000000> +// Set the timer tick value for selected timer. +// Default: 10000 (10ms) +#ifndef OS_TICK + #define OS_TICK 1000 +#endif + +// + +// System Configuration +// ======================= +// Round-Robin Task switching +// ============================= +// Enable Round-Robin Task switching. +#ifndef OS_ROBIN + #define OS_ROBIN 1 +#endif + +// Round-Robin Timeout [ticks] <1-1000> +// Define how long a task will execute before a task switch. +// Default: 5 +#ifndef OS_ROBINTOUT + #define OS_ROBINTOUT 5 +#endif + +// + +// Number of user timers <0-250> +// Define max. number of user timers that will run at the same time. +// Default: 0 (User timers disabled) +#ifndef OS_TIMERCNT + #define OS_TIMERCNT 1 +#endif + +// ISR FIFO Queue size<4=> 4 entries <8=> 8 entries +// <12=> 12 entries <16=> 16 entries +// <24=> 24 entries <32=> 32 entries +// <48=> 48 entries <64=> 64 entries +// <96=> 96 entries +// ISR functions store requests to this buffer, +// when they are called from the iterrupt handler. +// Default: 16 entries +#ifndef OS_FIFOSZ + #define OS_FIFOSZ 16 +#endif + +// + +//------------- <<< end of configuration section >>> ----------------------- + +// Standard library system mutexes +// =============================== +// Define max. number system mutexes that are used to protect +// the arm standard runtime library. For microlib they are not used. +#ifndef OS_MUTEXCNT + #define OS_MUTEXCNT 8 +#endif + +/*---------------------------------------------------------------------------- + * RTX User configuration part END + *---------------------------------------------------------------------------*/ + +#define OS_TRV ((U32)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1) + +/*---------------------------------------------------------------------------- + * Global Functions + *---------------------------------------------------------------------------*/ + +/*--------------------------- os_idle_demon ---------------------------------*/ + +__task void os_idle_demon (void) { + /* The idle demon is a system task, running when no other task is ready */ + /* to run. The 'os_xxx' function calls are not allowed from this task. */ + + for (;;) { + /* HERE: include optional user code to be executed when no task runs.*/ + } +} + +/*--------------------------- os_tick_init ----------------------------------*/ + +#if (OS_TIMER != 0) +int os_tick_init (void) { + /* Initialize hardware timer as system tick timer. */ + /* ... */ + return (-1); /* Return IRQ number of timer (0..239) */ +} +#endif + +/*--------------------------- os_tick_irqack --------------------------------*/ + +#if (OS_TIMER != 0) +void os_tick_irqack (void) { + /* Acknowledge timer interrupt. */ + /* ... */ +} +#endif + +/*--------------------------- os_tmr_call -----------------------------------*/ + +void os_tmr_call (U16 info) { + /* This function is called when the user timer has expired. Parameter */ + /* 'info' holds the value, defined when the timer was created. */ + + /* HERE: include optional user code to be executed on timeout. */ +} + + +/*--------------------------- os_error --------------------------------------*/ + +void os_error (U32 err_code) { + /* This function is called when a runtime error is detected. Parameter */ + /* 'err_code' holds the runtime error code (defined in RTL.H). */ + + /* HERE: include optional code to be executed on runtime error. */ + for (;;); +} + + +/*---------------------------------------------------------------------------- + * RTX Configuration Functions + *---------------------------------------------------------------------------*/ + +#include + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/ diff --git a/IDE/MDK-ARM/MDK-ARM/config/STM32_SWO.ini b/IDE/MDK-ARM/MDK-ARM/config/STM32_SWO.ini new file mode 100644 index 000000000..c6512217a --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/config/STM32_SWO.ini @@ -0,0 +1,36 @@ +/******************************************************************************/ +/* STM32_SWO.ini: STM32 Debugger Initialization File */ +/******************************************************************************/ +// <<< Use Configuration Wizard in Context Menu >>> // +/******************************************************************************/ +/* This file is part of the uVision/ARM development tools. */ +/* Copyright (c) 2005-2009 Keil Software. All rights reserved. */ +/* This software may only be used under the terms of a valid, current, */ +/* end user licence from KEIL for a compatible version of KEIL software */ +/* development tools. Nothing else gives you the right to use this software. */ +/******************************************************************************/ + + +FUNC void DebugSetup (void) { +// Debug MCU Configuration +// DBG_SLEEP Debug Sleep Mode +// DBG_STOP Debug Stop Mode +// DBG_STANDBY Debug Standby Mode +// TRACE_IOEN Trace I/O Enable +// TRACE_MODE Trace Mode +// <0=> Asynchronous +// <1=> Synchronous: TRACEDATA Size 1 +// <2=> Synchronous: TRACEDATA Size 2 +// <3=> Synchronous: TRACEDATA Size 4 +// DBG_IWDG_STOP Independant Watchdog Stopped when Core is halted +// DBG_WWDG_STOP Window Watchdog Stopped when Core is halted +// DBG_TIM1_STOP Timer 1 Stopped when Core is halted +// DBG_TIM2_STOP Timer 2 Stopped when Core is halted +// DBG_TIM3_STOP Timer 3 Stopped when Core is halted +// DBG_TIM4_STOP Timer 4 Stopped when Core is halted +// DBG_CAN_STOP CAN Stopped when Core is halted +// + _WDWORD(0xE0042004, 0x00000027); // DBGMCU_CR +} + +DebugSetup(); // Debugger Setup diff --git a/IDE/MDK-ARM/MDK-ARM/config/startup_stm32f2xx.s b/IDE/MDK-ARM/MDK-ARM/config/startup_stm32f2xx.s new file mode 100644 index 000000000..c31ce1991 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/config/startup_stm32f2xx.s @@ -0,0 +1,419 @@ +;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** +;* File Name : startup_stm32f2xx.s +;* Author : MCD Application Team +;* Version : V1.0.0 +;* Date : 18-April-2011 +;* Description : STM32F2xx devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM3 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS +; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. +; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, +; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE +; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING +; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. +;******************************************************************************* + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00001000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00009000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_IRQHandler ; PVD through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0 + DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1 + DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2 + DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3 + DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4 + DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5 + DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6 + DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s + DCD CAN1_TX_IRQHandler ; CAN1 TX + DCD CAN1_RX0_IRQHandler ; CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9 + DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10 + DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11 + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10]s + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line + DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12 + DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13 + DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14 + DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare + DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7 + DCD FSMC_IRQHandler ; FSMC + DCD SDIO_IRQHandler ; SDIO + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD UART4_IRQHandler ; UART4 + DCD UART5_IRQHandler ; UART5 + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0 + DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1 + DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2 + DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3 + DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4 + DCD ETH_IRQHandler ; Ethernet + DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line + DCD CAN2_TX_IRQHandler ; CAN2 TX + DCD CAN2_RX0_IRQHandler ; CAN2 RX0 + DCD CAN2_RX1_IRQHandler ; CAN2 RX1 + DCD CAN2_SCE_IRQHandler ; CAN2 SCE + DCD OTG_FS_IRQHandler ; USB OTG FS + DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5 + DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6 + DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7 + DCD USART6_IRQHandler ; USART6 + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out + DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In + DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI + DCD OTG_HS_IRQHandler ; USB OTG HS + DCD DCMI_IRQHandler ; DCMI + DCD CRYP_IRQHandler ; CRYP crypto + DCD HASH_RNG_IRQHandler ; Hash and Rng +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Stream0_IRQHandler [WEAK] + EXPORT DMA1_Stream1_IRQHandler [WEAK] + EXPORT DMA1_Stream2_IRQHandler [WEAK] + EXPORT DMA1_Stream3_IRQHandler [WEAK] + EXPORT DMA1_Stream4_IRQHandler [WEAK] + EXPORT DMA1_Stream5_IRQHandler [WEAK] + EXPORT DMA1_Stream6_IRQHandler [WEAK] + EXPORT ADC_IRQHandler [WEAK] + EXPORT CAN1_TX_IRQHandler [WEAK] + EXPORT CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK] + EXPORT TIM1_UP_TIM10_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT OTG_FS_WKUP_IRQHandler [WEAK] + EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK] + EXPORT TIM8_UP_TIM13_IRQHandler [WEAK] + EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK] + EXPORT TIM8_CC_IRQHandler [WEAK] + EXPORT DMA1_Stream7_IRQHandler [WEAK] + EXPORT FSMC_IRQHandler [WEAK] + EXPORT SDIO_IRQHandler [WEAK] + EXPORT TIM5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Stream0_IRQHandler [WEAK] + EXPORT DMA2_Stream1_IRQHandler [WEAK] + EXPORT DMA2_Stream2_IRQHandler [WEAK] + EXPORT DMA2_Stream3_IRQHandler [WEAK] + EXPORT DMA2_Stream4_IRQHandler [WEAK] + EXPORT ETH_IRQHandler [WEAK] + EXPORT ETH_WKUP_IRQHandler [WEAK] + EXPORT CAN2_TX_IRQHandler [WEAK] + EXPORT CAN2_RX0_IRQHandler [WEAK] + EXPORT CAN2_RX1_IRQHandler [WEAK] + EXPORT CAN2_SCE_IRQHandler [WEAK] + EXPORT OTG_FS_IRQHandler [WEAK] + EXPORT DMA2_Stream5_IRQHandler [WEAK] + EXPORT DMA2_Stream6_IRQHandler [WEAK] + EXPORT DMA2_Stream7_IRQHandler [WEAK] + EXPORT USART6_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK] + EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK] + EXPORT OTG_HS_WKUP_IRQHandler [WEAK] + EXPORT OTG_HS_IRQHandler [WEAK] + EXPORT DCMI_IRQHandler [WEAK] + EXPORT CRYP_IRQHandler [WEAK] + EXPORT HASH_RNG_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Stream0_IRQHandler +DMA1_Stream1_IRQHandler +DMA1_Stream2_IRQHandler +DMA1_Stream3_IRQHandler +DMA1_Stream4_IRQHandler +DMA1_Stream5_IRQHandler +DMA1_Stream6_IRQHandler +ADC_IRQHandler +CAN1_TX_IRQHandler +CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_TIM9_IRQHandler +TIM1_UP_TIM10_IRQHandler +TIM1_TRG_COM_TIM11_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +OTG_FS_WKUP_IRQHandler +TIM8_BRK_TIM12_IRQHandler +TIM8_UP_TIM13_IRQHandler +TIM8_TRG_COM_TIM14_IRQHandler +TIM8_CC_IRQHandler +DMA1_Stream7_IRQHandler +FSMC_IRQHandler +SDIO_IRQHandler +TIM5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Stream0_IRQHandler +DMA2_Stream1_IRQHandler +DMA2_Stream2_IRQHandler +DMA2_Stream3_IRQHandler +DMA2_Stream4_IRQHandler +ETH_IRQHandler +ETH_WKUP_IRQHandler +CAN2_TX_IRQHandler +CAN2_RX0_IRQHandler +CAN2_RX1_IRQHandler +CAN2_SCE_IRQHandler +OTG_FS_IRQHandler +DMA2_Stream5_IRQHandler +DMA2_Stream6_IRQHandler +DMA2_Stream7_IRQHandler +USART6_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +OTG_HS_EP1_OUT_IRQHandler +OTG_HS_EP1_IN_IRQHandler +OTG_HS_WKUP_IRQHandler +OTG_HS_IRQHandler +DCMI_IRQHandler +CRYP_IRQHandler +HASH_RNG_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE***** From 04c6a447abe817abf203ae29df6734ad930f74ab Mon Sep 17 00:00:00 2001 From: takashikojo Date: Sun, 19 May 2013 10:56:42 +0900 Subject: [PATCH 04/16] make up #3 for MDK-ARM --- .../MDK-ARM/CyaSSL/config-BARE-METAL.h | 291 +++++++++++++++ IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h | 329 ++++++++++++++++ .../MDK-ARM/CyaSSL/config-RTX-TCP-FS.h | 351 ++++++++++++++++++ IDE/MDK-ARM/MDK-ARM/CyaSSL/config.h | 46 +++ 4 files changed, 1017 insertions(+) create mode 100644 IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h create mode 100644 IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h create mode 100644 IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h create mode 100644 IDE/MDK-ARM/MDK-ARM/CyaSSL/config.h diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h new file mode 100644 index 000000000..680bdaf38 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h @@ -0,0 +1,291 @@ +/* config-BEREFOOT.h + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + + +/**** CyaSSL for KEIL-RL Configuration ****/ + +#define __CORTEX_M3__ +#define CYASSL_MDK_ARM +#define NO_WRITEV +#define NO_CYASSL_DIR +#define NO_MAIN_DRIVER + +#define CYASSL_DER_LOAD +#define HAVE_NULL_CIPHER + +#define SINGLE_THREADED +#define NO_FILESYSTEM +#define NO_TLS + +#define NO_ECHOSERVER +#define NO_ECHOCLIENT +#define NO_SIMPLE_SERVER +#define NO_SIMPLE_CLIENT + +// <<< Use Configuration Wizard in Context Menu >>> + +// Build Target: KEIL-BAREFOOT +// Single Threaded, No File System, No TCP-net +// +// Command Shell +#define MDK_CONF_SHELL 1 +#if MDK_CONF_SHELL == 1 +#define CYASSL_MDK_SHELL +#endif +// +// CyaSSL Apps +// Crypt/Cipher +// Cert Storage <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes) +#define MDK_CONF_CERT_BUFF 1 +#if MDK_CONF_CERT_BUFF == 1 +#define USE_CERT_BUFFERS_1024 +#elif MDK_CONF_CERT_BUFF == 2 +#define USE_CERT_BUFFERS_2048 +#endif + +// Crypt/Cipher Test Suite +#define MDK_CONF_CTaoCryptTest 1 +#if MDK_CONF_CTaoCryptTest == 0 +#define NO_CRYPT_TEST +#endif +// +// Crypt/Cipher Benchmark +#define MDK_CONF_CTaoCryptBenchmark 1 +#if MDK_CONF_CTaoCryptBenchmark == 0 +#define NO_CRYPT_BENCHMARK +#define BENCH_EMBEDDED +#endif +// +// + +// STM32 Hardware Crypt +// STM32F2 Hardware RNG +#define MDK_CONF_STM32F2_RNG 1 +#if MDK_CONF_STM32F2_RNG == 1 +#define STM32F2_RNG +#else +#define NO_DEV_RANDOM +#endif +// +// STM32F2 Hardware Crypt +#define MDK_CONF_STM32F2_CRYPTO 0 +#if MDK_CONF_STM32F2_CRYPTO == 1 +#define STM32F2_CRYPTO +#endif +// + +// + + +// CTaoCrypt Library + +// MD5, SHA, SHA-256, AES, RC4, ASN, RSA +// +// MD2 +#define MDK_CONF_MD2 0 +#if MDK_CONF_MD2 == 1 +#define CYASSL_MD2 +#endif +// +// MD4 +#define MDK_CONF_MD4 1 +#if MDK_CONF_MD4 == 0 +#define NO_MD4 +#endif +// +// SHA-384 +// This has to be with SHA512 +#define MDK_CONF_SHA384 0 +#if MDK_CONF_SHA384 == 1 +#define CYASSL_SHA384 +#endif +// +// SHA-512 +#define MDK_CONF_SHA512 0 +#if MDK_CONF_SHA512 == 1 +#define CYASSL_SHA512 +#endif +// +// RIPEMD +#define MDK_CONF_RIPEMD 0 +#if MDK_CONF_RIPEMD == 1 +#define CYASSL_RIPEMD +#endif +// +// HMAC +#define MDK_CONF_HMAC 1 +#if MDK_CONF_HMAC == 0 +#define NO_HMAC +#endif +// +// HC128 +#define MDK_CONF_HC128 0 +#if MDK_CONF_HC128 == 1 +#define HAVE_HC128 +#endif +// +// RABBIT +#define MDK_CONF_RABBIT 1 +#if MDK_CONF_RABBI == 0 +#define NO_RABBIT +#endif +// + +// AEAD +#define MDK_CONF_AEAD 0 +#if MDK_CONF_AEAD == 1 +#define HAVE_AEAD +#endif +// +// DES3 +#define MDK_CONF_DES3 1 +#if MDK_CONF_DES3 == 0 +#define NO_DES3 +#endif +// +// CAMELLIA +#define MDK_CONF_CAMELLIA 0 +#if MDK_CONF_CAMELLIA == 1 +#define HAVE_CAMELLIA +#endif +// + +// DH +// need this for CYASSL_SERVER, OPENSSL_EXTRA +#define MDK_CONF_DH 1 +#if MDK_CONF_DH == 0 +#define NO_DH +#endif +// +// DSA +#define MDK_CONF_DSA 1 +#if MDK_CONF_DSA == 0 +#define NO_DSA +#endif +// +// PWDBASED +#define MDK_CONF_PWDBASED 1 +#if MDK_CONF_PWDBASED == 0 +#define NO_PWDBASED +#endif +// + +// ECC +#define MDK_CONF_ECC 0 +#if MDK_CONF_ECC == 1 +#define HAVE_ECC +#endif +// +// PSK +#define MDK_CONF_PSK 1 +#if MDK_CONF_PSK == 0 +#define NO_PSK +#endif +// +// AESCCM (Turn off Hardware Crypt) +#define MDK_CONF_AESCCM 0 +#if MDK_CONF_AESCCM == 1 +#define HAVE_AESCCM +#endif +// +// AESGCM (Turn off Hardware Crypt) +#define MDK_CONF_AESGCM 0 +#if MDK_CONF_AESGCM == 1 +#define HAVE_AESGCM +#define BUILD_AESGCM +#endif +// +// NTRU (need License, "crypto_ntru.h") +#define MDK_CONF_NTRU 0 +#if MDK_CONF_NTRU == 1 +#define HAVE_NTRU +#endif +// +// + +// Others + +// Inline +#define MDK_CONF_INLINE 0 +#if MDK_CONF_INLINE == 0 +#define NO_INLINE +#endif +// +// Debug +// Debug Message +#define MDK_CONF_DebugMessage 0 +#if MDK_CONF_DebugMessage == 1 +#define DEBUG_CYASSL +#endif +// +// Check malloc +#define MDK_CONF_CheckMalloc 1 +#if MDK_CONF_CheckMalloc == 1 +#define CYASSL_MALLOC_CHECK +#endif +// + + +// +// ErrNo.h +#define MDK_CONF_ErrNo 0 +#if MDK_CONF_ErrNo == 1 +#define HAVE_ERRNO +#endif +// +// zlib (need "zlib.h") +#define MDK_CONF_LIBZ 0 +#if MDK_CONF_LIBZ == 1 +#define HAVE_LIBZ +#endif +// +// CAVIUM (need CAVIUM headers) +#define MDK_CONF_CAVIUM 0 +#if MDK_CONF_CAVIUM == 1 +#define HAVE_CAVIUM +#endif +// + +// Error Strings +#define MDK_CONF_ErrorStrings 1 +#if MDK_CONF_ErrorStrings == 0 +#define NO_ERROR_STRINGS +#endif +// + +// Small Stack +#define MDK_CONF_SmallStack 1 +#if MDK_CONF_SmallStack == 0 +#define NO_CYASSL_SMALL_STACK +#endif +// +// Use Fast Math +#define MDK_CONF_FASTMATH 0 +#if MDK_CONF_FASTMATH == 1 +#define USE_FAST_MATH +#endif +// + + +// + +// +// <<< end of configuration section >>> diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h new file mode 100644 index 000000000..a1eb9ea7d --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h @@ -0,0 +1,329 @@ +/* config-FS.h + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + + +/**** CyaSSL for KEIL-RL Configuration ****/ + +#define __CORTEX_M3__ +#define CYASSL_KEIL_RL +#define NO_WRITEV +#define NO_CYASSL_DIR +#define NO_MAIN_DRIVER + + +#define CYASSL_DER_LOAD +#define HAVE_NULL_CIPHER + +#define SINGLE_THREADED + +#define NO_ECHOSERVER +#define NO_ECHOCLIENT +#define NO_SIMPLE_SERVER +#define NO_SIMPLE_CLIENT + +// <<< Use Configuration Wizard in Context Menu >>> + +// Build Target: KEIL-FS +// Single Threaded, With File System, No TCP-net +// +// Command Shell +#define MDK_CONF_SHELL 1 +#if MDK_CONF_SHELL == 1 +#define CYASSL_MDK_SHELL +#endif +// +// CyaSSL Apps +// Crypt/Cipher +// Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes) +#define MDK_CONF_CERT_BUFF 0 +#if MDK_CONF_CERT_BUFF== 1 +#define USE_CERT_BUFFERS_1024 +#elif MDK_CONF_CERT_BUFF == 2 +#define USE_CERT_BUFFERS_2048 +#endif + +// Crypt/Cipher Test Suite +#define MDK_CONF_CTaoCryptTest 1 +#if MDK_CONF_CTaoCryptTest == 0 +#define NO_CRYPT_TEST +#endif +// +// Crypt/Cipher Benchmark +#define MDK_CONF_CTaoCryptBenchmark 1 +#if MDK_CONF_CTaoCryptBenchmark == 0 +#define NO_CRYPT_BENCHMARK +#endif +// +// + +// STM32 Hardware Crypt +// STM32F2 Hardware RNG +#define MDK_CONF_STM32F2_RNG 1 +#if MDK_CONF_STM32F2_RNG == 1 +#define STM32F2_RNG +#else +#define NO_DEV_RANDOM +#endif +// +// STM32F2 Hardware Crypt +#define MDK_CONF_STM32F2_CRYPTO 0 +#if MDK_CONF_STM32F2_CRYPTO == 1 +#define STM32F2_CRYPTO +#endif +// + +// + +// CyaSSL Library +// SSL (Included by default) +// + +// TLS +#define MDK_CONF_TLS 1 +#if MDK_CONF_TLS == 0 +#define NO_TLS +#endif +// + +// CertGen +#define MDK_CONF_CERT_GEN 0 +#if MDK_CONF_CERT_GEN == 1 +#define CYASSL_CERT_GEN +#endif +// +// KeyGen +#define MDK_CONF_KEY_GEN 0 +#if MDK_CONF_KEY_GEN == 1 +#define CYASSL_KEY_GEN +#endif +// +// CRL +#define MDK_CONF_DER_LOAD 0 +#if MDK_CONF_DER_LOAD == 1 +#define CYASSL_DER_LOAD +#endif +// +// OpenSSL Extra +#define MDK_CONF_OPENSSL_EXTRA 0 +#if MDK_CONF_OPENSSL_EXTRA == 1 +#define OPENSSL_EXTRA +#endif +// +// CRL Monitor, OCSP (not supported with KEIL) +// + +// + +// CTaoCrypt Library + +// MD5, SHA, SHA-256, AES, RC4, ASN, RSA +// + +// MD2 +#define MDK_CONF_MD2 0 +#if MDK_CONF_MD2 == 1 +#define CYASSL_MD2 +#endif +// +// MD4 +#define MDK_CONF_MD4 1 +#if MDK_CONF_MD4 == 0 +#define NO_MD4 +#endif +// +// SHA-384 +// This has to be with SHA512 +#define MDK_CONF_SHA384 0 +#if MDK_CONF_SHA384 == 1 +#define CYASSL_SHA384 +#endif +// +// SHA-512 +#define MDK_CONF_SHA512 0 +#if MDK_CONF_SHA512 == 1 +#define CYASSL_SHA512 +#endif +// +// RIPEMD +#define MDK_CONF_RIPEMD 0 +#if MDK_CONF_RIPEMD == 1 +#define CYASSL_RIPEMD +#endif +// +// HMAC +#define MDK_CONF_HMAC 1 +#if MDK_CONF_HMAC == 0 +#define NO_HMAC +#endif +// +// HC128 +#define MDK_CONF_HC128 0 +#if MDK_CONF_HC128 == 1 +#define HAVE_HC128 +#endif +// +// RABBIT +#define MDK_CONF_RABBIT 1 +#if MDK_CONF_RABBI == 0 +#define NO_RABBIT +#endif +// + +// AEAD +#define MDK_CONF_AEAD 0 +#if MDK_CONF_AEAD == 1 +#define HAVE_AEAD +#endif +// +// DES3 +#define MDK_CONF_DES3 1 +#if MDK_CONF_DES3 == 0 +#define NO_DES3 +#endif +// +// CAMELLIA +#define MDK_CONF_CAMELLIA 0 +#if MDK_CONF_CAMELLIA == 1 +#define HAVE_CAMELLIA +#endif +// + +// DH +// need this for CYASSL_SERVER, OPENSSL_EXTRA +#define MDK_CONF_DH 1 +#if MDK_CONF_DH == 0 +#define NO_DH +#endif +// +// DSA +#define MDK_CONF_DSA 1 +#if MDK_CONF_DSA == 0 +#define NO_DSA +#endif +// +// PWDBASED +#define MDK_CONF_PWDBASED 1 +#if MDK_CONF_PWDBASED == 0 +#define NO_PWDBASED +#endif +// + +// ECC +#define MDK_CONF_ECC 0 +#if MDK_CONF_ECC == 1 +#define HAVE_ECC +#endif +// +// PSK +#define MDK_CONF_PSK 1 +#if MDK_CONF_PSK == 0 +#define NO_PSK +#endif +// +// AESCCM (Turn off Hardware Crypt) +#define MDK_CONF_AESCCM 0 +#if MDK_CONF_AESCCM == 1 +#define HAVE_AESCCM +#endif +// +// AESGCM (Turn off Hardware Crypt) +#define MDK_CONF_AESGCM 0 +#if MDK_CONF_AESGCM == 1 +#define HAVE_AESGCM +#define BUILD_AESGCM +#endif +// +// NTRU (need License, "crypto_ntru.h") +#define MDK_CONF_NTRU 0 +#if MDK_CONF_NTRU == 1 +#define HAVE_NTRU +#endif +// +// + +// Others + +// Inline +#define MDK_CONF_INLINE 0 +#if MDK_CONF_INLINE == 0 +#define NO_INLINE +#endif +// +// Debug +// Debug Message +#define MDK_CONF_DebugMessage 0 +#if MDK_CONF_DebugMessage == 1 +#define DEBUG_CYASSL +#endif +// +// Check malloc +#define MDK_CONF_CheckMalloc 1 +#if MDK_CONF_CheckMalloc == 1 +#define CYASSL_MALLOC_CHECK +#endif +// + + +// +// ErrNo.h +#define MDK_CONF_ErrNo 0 +#if MDK_CONF_ErrNo == 1 +#define HAVE_ERRNO +#endif +// +// zlib (need "zlib.h") +#define MDK_CONF_LIBZ 0 +#if MDK_CONF_LIBZ == 1 +#define HAVE_LIBZ +#endif +// +// CAVIUM (need CAVIUM headers) +#define MDK_CONF_CAVIUM 0 +#if MDK_CONF_CAVIUM == 1 +#define HAVE_CAVIUM +#endif +// + +// Error Strings +#define MDK_CONF_ErrorStrings 1 +#if MDK_CONF_ErrorStrings == 0 +#define NO_ERROR_STRINGS +#endif +// + +// Small Stack +#define MDK_CONF_SmallStack 1 +#if MDK_CONF_SmallStack == 0 +#define NO_CYASSL_SMALL_STACK +#endif +// +// Use Fast Math +#define MDK_CONF_FASTMATH 0 +#if MDK_CONF_FASTMATH == 1 +#define USE_FAST_MATH +#endif +// + + +// + +// +// <<< end of configuration section >>> diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h new file mode 100644 index 000000000..cd0ff5717 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h @@ -0,0 +1,351 @@ +/* config-RTX-TCP-FS.h + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + + +/**** CyaSSL for KEIL-RL Configuration ****/ + +#define __CORTEX_M3__ +#define CYASSL_MDK_ARM +#define NO_WRITEV +#define NO_CYASSL_DIR +#define NO_MAIN_DRIVER + + +#define CYASSL_DER_LOAD +#define HAVE_NULL_CIPHER + +#define HAVE_KEIL_RTX +#define CYASSL_KEIL_TCP_NET + + +// <<< Use Configuration Wizard in Context Menu >>> +// Build Target: KEIL-RTX-TCP-FS +// RTOS, File System and TCP-net +// +// Command Shell +#define MDK_CONF_SHELL 1 +#if MDK_CONF_SHELL == 1 +#define CYASSL_MDK_SHELL +#endif +// +// CyaSSL Apps +// Crypt/Cipher +// Cert Storage <0=> SD Card <1=> Mem Buff (1024bytes) <2=> Mem Buff (2048bytes) +#define MDK_CONF_CERT_BUFF 0 +#if MDK_CONF_CERT_BUFF== 1 +#define USE_CERT_BUFFERS_1024 +#elif MDK_CONF_CERT_BUFF == 2 +#define USE_CERT_BUFFERS_2048 +#endif + +// Crypt/Cipher Test Suite +#define MDK_CONF_CTaoCryptTest 1 +#if MDK_CONF_CTaoCryptTest == 0 +#define NO_CRYPT_TEST +#endif +// +// Crypt/Cipher Benchmark +#define MDK_CONF_CTaoCryptBenchmark 1 +#if MDK_CONF_CTaoCryptBenchmark == 0 +#define NO_CRYPT_BENCHMARK +#define BENCH_EMBEDDED +#endif +// +// +// SSL/TLS Server/Client +// echoServer +#define MDK_CONF_echoServer 1 +#if MDK_CONF_echoServer == 0 +#define NO_ECHOSERVER +#endif +// +// echoClient +#define MDK_CONF_echoClient 1 +#if MDK_CONF_echoClient == 0 +#define NO_ECHOCLIENT +#endif +// +// SimpleServer +#define MDK_CONF_simpleServer 1 +#if MDK_CONF_simpleServer == 0 +#define NO_SIMPLE_SERVER +#endif +// +// SimpleCliet +#define MDK_CONF_simpleClient 1 +#if MDK_CONF_simpleClient == 0 +#define NO_SIMPLE_CLIENT +#endif +// +// +// +// STM32 Hardware Crypt +// STM32F2 Hardware RNG +#define MDK_CONF_STM32F2_RNG 1 +#if MDK_CONF_STM32F2_RNG == 1 +#define STM32F2_RNG +#else +#define NO_DEV_RANDOM +#endif +// +// STM32F2 Hardware Crypt +#define MDK_CONF_STM32F2_CRYPTO 0 +#if MDK_CONF_STM32F2_CRYPTO == 1 +#define STM32F2_CRYPTO +#endif +// + +// + +// CyaSSL Library +// SSL (Included by default) +// + +// TLS +#define MDK_CONF_TLS 1 +#if MDK_CONF_TLS == 0 +#define NO_TLS +#endif +// + +// CertGen +#define MDK_CONF_CERT_GEN 0 +#if MDK_CONF_CERT_GEN == 1 +#define CYASSL_CERT_GEN +#endif +// +// KeyGen +#define MDK_CONF_KEY_GEN 0 +#if MDK_CONF_KEY_GEN == 1 +#define CYASSL_KEY_GEN +#endif +// +// CRL +#define MDK_CONF_DER_LOAD 0 +#if MDK_CONF_DER_LOAD == 1 +#define CYASSL_DER_LOAD +#endif +// +// OpenSSL Extra +#define MDK_CONF_OPENSSL_EXTRA 1 +#if MDK_CONF_OPENSSL_EXTRA == 1 +#define OPENSSL_EXTRA +#endif +// +// CRL Monitor, OCSP (not supported with KEIL) +// + +// + +// CTaoCrypt Library + +// MD5, SHA, SHA-256, AES, RC4, ASN, RSA +// +// MD2 +#define MDK_CONF_MD2 0 +#if MDK_CONF_MD2 == 1 +#define CYASSL_MD2 +#endif +// +// MD4 +#define MDK_CONF_MD4 1 +#if MDK_CONF_MD4 == 0 +#define NO_MD4 +#endif +// +// SHA-384 +// This has to be with SHA512 +#define MDK_CONF_SHA384 0 +#if MDK_CONF_SHA384 == 1 +#define CYASSL_SHA384 +#endif +// +// SHA-512 +#define MDK_CONF_SHA512 0 +#if MDK_CONF_SHA512 == 1 +#define CYASSL_SHA512 +#endif +// +// RIPEMD +#define MDK_CONF_RIPEMD 1 +#if MDK_CONF_RIPEMD == 1 +#define CYASSL_RIPEMD +#endif +// +// HMAC +#define MDK_CONF_HMAC 1 +#if MDK_CONF_HMAC == 0 +#define NO_HMAC +#endif +// +// HC128 +#define MDK_CONF_HC128 0 +#if MDK_CONF_HC128 == 1 +#define HAVE_HC128 +#endif +// +// RABBIT +#define MDK_CONF_RABBIT 1 +#if MDK_CONF_RABBI == 0 +#define NO_RABBIT +#endif +// + +// AEAD +#define MDK_CONF_AEAD 0 +#if MDK_CONF_AEAD == 1 +#define HAVE_AEAD +#endif +// +// DES3 +#define MDK_CONF_DES3 1 +#if MDK_CONF_DES3 == 0 +#define NO_DES3 +#endif +// +// CAMELLIA +#define MDK_CONF_CAMELLIA 0 +#if MDK_CONF_CAMELLIA == 1 +#define HAVE_CAMELLIA +#endif +// + +// DH +// need this for CYASSL_SERVER, OPENSSL_EXTRA +#define MDK_CONF_DH 1 +#if MDK_CONF_DH == 0 +#define NO_DH +#endif +// +// DSA +#define MDK_CONF_DSA 1 +#if MDK_CONF_DSA == 0 +#define NO_DSA +#endif +// +// PWDBASED +#define MDK_CONF_PWDBASED 1 +#if MDK_CONF_PWDBASED == 0 +#define NO_PWDBASED +#endif +// + +// ECC +#define MDK_CONF_ECC 1 +#if MDK_CONF_ECC == 1 +#define HAVE_ECC +#endif +// +// PSK +#define MDK_CONF_PSK 1 +#if MDK_CONF_PSK == 0 +#define NO_PSK +#endif +// +// AESCCM (Turn off Hardware Crypt) +#define MDK_CONF_AESCCM 0 +#if MDK_CONF_AESCCM == 1 +#define HAVE_AESCCM +#endif +// +// AESGCM (Turn off Hardware Crypt) +#define MDK_CONF_AESGCM 0 +#if MDK_CONF_AESGCM == 1 +#define HAVE_AESGCM +#define BUILD_AESGCM +#endif +// +// NTRU (need License, "crypto_ntru.h") +#define MDK_CONF_NTRU 0 +#if MDK_CONF_NTRU == 1 +#define HAVE_NTRU +#endif +// +// + +// Others + +// Inline +#define MDK_CONF_INLINE 0 +#if MDK_CONF_INLINE == 0 +#define NO_INLINE +#endif +// +// Debug +// Debug Message +#define MDK_CONF_DEBUG_MSG 0 +#if MDK_CONF_DEBUG_MSG == 1 +#define DEBUG_CYASSL +#endif +// +// Check malloc +#define MDK_CONF_CHECK_MALLOC 1 +#if MDK_CONF_CHECK_MALLOC == 1 +#define CYASSL_MALLOC_CHECK +#endif +// + + +// +// ErrNo.h +#define MDK_CONF_ERR_NO 0 +#if MDK_CONF_ERR_NO == 1 +#define HAVE_ERRNO +#endif +// +// zlib (need "zlib.h") +#define MDK_CONF_LIBZ 0 +#if MDK_CONF_LIBZ == 1 +#define HAVE_LIBZ +#endif +// +// CAVIUM (need CAVIUM headers) +#define MDK_CONF_CAVIUM 0 +#if MDK_CONF_CAVIUM == 1 +#define HAVE_CAVIUM +#endif +// + +// Error Strings +#define MDK_CONF_ErrorStrings 1 +#if MDK_CONF_ErrorStrings == 0 +#define NO_ERROR_STRINGS +#endif +// + +// Small Stack +#define MDK_CONF_SMALL_STACK 1 +#if MDK_CONF_SMALL_STACK == 0 +#define NO_CYASSL_SMALL_STACK +#endif +// +// Use Fast Math +#define MDK_CONF_FASTMATH 0 +#if MDK_CONF_FASTMATH == 1 +#define USE_FAST_MATH +#endif +// + + +// + +// +// <<< end of configuration section >>> diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config.h new file mode 100644 index 000000000..21e47c46f --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config.h @@ -0,0 +1,46 @@ +/* config.h + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + + +/**** CyaSSL for KEIL-RL Configuration ****/ + +#define __CORTEX_M3__ +#define CYASSL_MDK_ARM +#define NO_WRITEV +#define NO_CYASSL_DIR + +/* for Retarget.c */ +#define STDIO +#define BENCH_EMBEDDED + +#define CYASSL_DER_LOAD +#define HAVE_NULL_CIPHER + +#if defined(MDK_CONF_RTX_TCP_FS) +#include "config-RTX-TCP-FS.h" +#elif defined(MDK_CONF_TCP_FS) +#include "config-TCP-FS.h" +#elif defined(MDK_CONF_FS) +#include "config-FS.h" +#elif defined(MDK_CONF_BARE_METAL) +#include "config-BARE-METAL.h" +#endif + From 926a62b458c7bb1364dae26b9501f9950d741c2e Mon Sep 17 00:00:00 2001 From: takashikojo Date: Sun, 19 May 2013 11:22:08 +0900 Subject: [PATCH 05/16] make up for MDK-ARM --- src/io.c | 8 ++++++++ src/ssl.c | 4 +--- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/src/io.c b/src/io.c index d16e96f3c..f53e4e25b 100644 --- a/src/io.c +++ b/src/io.c @@ -124,6 +124,14 @@ #define SOCKET_EPIPE EPIPE #define SOCKET_ECONNREFUSED RTCSERR_TCP_CONN_REFUSED #define SOCKET_ECONNABORTED RTCSERR_TCP_CONN_ABORTED +#elif defined(CYASSL_MDK_ARM) + #define SOCKET_EWOULDBLOCK SCK_EWOULDBLOCK + #define SOCKET_EAGAIN SCK_ELOCKED + #define SOCKET_ECONNRESET SCK_ECLOSED + #define SOCKET_EINTR SCK_ERROR + #define SOCKET_EPIPE SCK_ERROR + #define SOCKET_ECONNREFUSED SCK_ERROR + #define SOCKET_ECONNABORTED SCK_ERROR #else #define SOCKET_EWOULDBLOCK EWOULDBLOCK #define SOCKET_EAGAIN EAGAIN diff --git a/src/ssl.c b/src/ssl.c index bec7080eb..d208c7be8 100644 --- a/src/ssl.c +++ b/src/ssl.c @@ -5315,9 +5315,7 @@ int CyaSSL_set_compression(CYASSL* ssl) } -#ifdef USE_WINDOWS_API - #define CloseSocket(s) closesocket(s) -#elif defined(CYASSL_MDK_ARM) +#ifdef USE_WINDOWS_API #define CloseSocket(s) closesocket(s) #else #define CloseSocket(s) close(s) From c2a82bce3d8ab7e9af8f124ebe040557ad2b0f3d Mon Sep 17 00:00:00 2001 From: takashikojo Date: Sun, 19 May 2013 11:36:55 +0900 Subject: [PATCH 06/16] make up for MDK-ARM --- src/ssl.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/ssl.c b/src/ssl.c index d208c7be8..e8e6e571c 100644 --- a/src/ssl.c +++ b/src/ssl.c @@ -5317,6 +5317,8 @@ int CyaSSL_set_compression(CYASSL* ssl) #ifdef USE_WINDOWS_API #define CloseSocket(s) closesocket(s) +#elif defined(CYASSL_MDK_ARM) + #define CloseSocket(s) closesocket(s) #else #define CloseSocket(s) close(s) #endif From da342ea0791a02b4e8cad93bc87b7570a193e3e9 Mon Sep 17 00:00:00 2001 From: kojo Date: Tue, 21 May 2013 09:39:09 +0900 Subject: [PATCH 07/16] initial attempt for MDK-ARM/LPC43xx: --- .gitignore | 1 + .../MDK-ARM/CyaSSL/config-BARE-METAL.h | 2 +- IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h | 2 +- .../MDK-ARM/CyaSSL/config-RTX-TCP-FS.h | 24 +- IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c | 42 +- IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h | 8 +- IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c | 95 +- IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c | 33 - IDE/MDK-ARM/MDK-ARM/config/File_Config.c | 788 ++-- IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c | 2 +- IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt | 1720 ++++++++ IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj | 3455 +++++++++++++++++ ctaocrypt/src/random.c | 23 +- 13 files changed, 5622 insertions(+), 573 deletions(-) create mode 100644 IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt create mode 100644 IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj diff --git a/.gitignore b/.gitignore index 3f73f167e..cfd7970a5 100644 --- a/.gitignore +++ b/.gitignore @@ -81,3 +81,4 @@ cov-int cyassl.tgz *.log *.trs +IDE\MDK-ARM\Projects diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h index 680bdaf38..a88e1bca4 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h @@ -78,7 +78,7 @@ // STM32 Hardware Crypt // STM32F2 Hardware RNG -#define MDK_CONF_STM32F2_RNG 1 +#define MDK_CONF_STM32F2_RNG 0 #if MDK_CONF_STM32F2_RNG == 1 #define STM32F2_RNG #else diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h index a1eb9ea7d..ed2e6d642 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h @@ -76,7 +76,7 @@ // STM32 Hardware Crypt // STM32F2 Hardware RNG -#define MDK_CONF_STM32F2_RNG 1 +#define MDK_CONF_STM32F2_RNG 0 #if MDK_CONF_STM32F2_RNG == 1 #define STM32F2_RNG #else diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h index cd0ff5717..17b644d79 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h @@ -99,7 +99,7 @@ // // STM32 Hardware Crypt // STM32F2 Hardware RNG -#define MDK_CONF_STM32F2_RNG 1 +#define MDK_CONF_STM32F2_RNG 0 #if MDK_CONF_STM32F2_RNG == 1 #define STM32F2_RNG #else @@ -127,19 +127,19 @@ // // CertGen -#define MDK_CONF_CERT_GEN 0 +#define MDK_CONF_CERT_GEN 1 #if MDK_CONF_CERT_GEN == 1 #define CYASSL_CERT_GEN #endif // // KeyGen -#define MDK_CONF_KEY_GEN 0 +#define MDK_CONF_KEY_GEN 1 #if MDK_CONF_KEY_GEN == 1 #define CYASSL_KEY_GEN #endif // // CRL -#define MDK_CONF_DER_LOAD 0 +#define MDK_CONF_DER_LOAD 1 #if MDK_CONF_DER_LOAD == 1 #define CYASSL_DER_LOAD #endif @@ -160,7 +160,7 @@ // MD5, SHA, SHA-256, AES, RC4, ASN, RSA // // MD2 -#define MDK_CONF_MD2 0 +#define MDK_CONF_MD2 1 #if MDK_CONF_MD2 == 1 #define CYASSL_MD2 #endif @@ -173,13 +173,13 @@ // // SHA-384 // This has to be with SHA512 -#define MDK_CONF_SHA384 0 +#define MDK_CONF_SHA384 1 #if MDK_CONF_SHA384 == 1 #define CYASSL_SHA384 #endif // // SHA-512 -#define MDK_CONF_SHA512 0 +#define MDK_CONF_SHA512 1 #if MDK_CONF_SHA512 == 1 #define CYASSL_SHA512 #endif @@ -197,7 +197,7 @@ #endif // // HC128 -#define MDK_CONF_HC128 0 +#define MDK_CONF_HC128 1 #if MDK_CONF_HC128 == 1 #define HAVE_HC128 #endif @@ -210,7 +210,7 @@ // // AEAD -#define MDK_CONF_AEAD 0 +#define MDK_CONF_AEAD 1 #if MDK_CONF_AEAD == 1 #define HAVE_AEAD #endif @@ -222,7 +222,7 @@ #endif // // CAMELLIA -#define MDK_CONF_CAMELLIA 0 +#define MDK_CONF_CAMELLIA 1 #if MDK_CONF_CAMELLIA == 1 #define HAVE_CAMELLIA #endif @@ -261,13 +261,13 @@ #endif // // AESCCM (Turn off Hardware Crypt) -#define MDK_CONF_AESCCM 0 +#define MDK_CONF_AESCCM 1 #if MDK_CONF_AESCCM == 1 #define HAVE_AESCCM #endif // // AESGCM (Turn off Hardware Crypt) -#define MDK_CONF_AESGCM 0 +#define MDK_CONF_AESGCM 1 #if MDK_CONF_AESGCM == 1 #define HAVE_AESGCM #define BUILD_AESGCM diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c index 718919b63..f0959de12 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c @@ -59,7 +59,7 @@ unsigned long inet_addr(const char *cp) /*** tcp_connect is actually associated with following syassl_tcp_connect. ***/ int Cyassl_connect(int sd, const struct sockaddr* sa, int sz) { - int ret ; + int ret = 0 ; #if defined(CYASSL_KEIL_TCP_NET) SOCKADDR_IN addr ; @@ -86,7 +86,7 @@ int Cyassl_connect(int sd, const struct sockaddr* sa, int sz) int Cyassl_accept(int sd, struct sockaddr *addr, int *addrlen) { - int ret ; + int ret = 0 ; #if defined(CYASSL_KEIL_TCP_NET) while(1) { @@ -110,7 +110,7 @@ int Cyassl_accept(int sd, struct sockaddr *addr, int *addrlen) int Cyassl_recv(int sd, void *buf, size_t len, int flags) { - int ret ; + int ret = 0; #if defined(CYASSL_KEIL_TCP_NET) while(1) { #undef recv /* Go to KEIL TCPnet recv */ @@ -132,7 +132,7 @@ int Cyassl_recv(int sd, void *buf, size_t len, int flags) int Cyassl_send(int sd, const void *buf, size_t len, int flags) { - int ret ; + int ret = 0 ; #if defined(CYASSL_KEIL_TCP_NET) while(1) { @@ -170,40 +170,6 @@ int Cyassl_tcp_select(int sd, int timeout) } #endif -struct tm *Cyassl_MDK_gmtime(const time_t *c) -{ - - RTC_TimeTypeDef RTC_Time ; - RTC_DateTypeDef RTC_Date ; - static struct tm date ; - - RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; - RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; - - date.tm_year = RTC_Date.RTC_Year + 100 ; - date.tm_mon = RTC_Date.RTC_Month - 1 ; - date.tm_mday = RTC_Date.RTC_Date ; - date.tm_hour = RTC_Time.RTC_Hours ; - date.tm_min = RTC_Time.RTC_Minutes ; - date.tm_sec = RTC_Time.RTC_Seconds ; - - #if defined(DEBUG_CYASSL) - { - char msg[100] ; - sprintf(msg, "Debug::Cyassl_KEIL_gmtime(DATE=/%4d/%02d/%02d TIME=%02d:%02d:%02d)\n", - RTC_Date.RTC_Year+2000, RTC_Date.RTC_Month, RTC_Date.RTC_Date, - RTC_Time.RTC_Hours, RTC_Time.RTC_Minutes, RTC_Time.RTC_Seconds) ; - CYASSL_MSG(msg) ; - } - #endif - - return(&date) ; -} - -double current_time() -{ - return ((double)TIM2->CNT/1000000.0) ; -} extern int getkey(void) ; extern int sendchar(int c) ; diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h index c565b6e15..052fe2991 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h @@ -95,13 +95,9 @@ extern int setsockopt(int sockfd, int level, int optname, extern int select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *exceptfds, const struct timeval *timeout); - -/** KEIL-RL gmtime ****/ - +/* CyaSSL MDK-ARM time functions */ #include -#include "stm32f2xx_rtc.h" -extern struct tm *gmtime(const time_t *timer); -extern struct tm *Cyassl_MDK_gmtime(const time_t *timer); +struct tm *Cyassl_MDK_gmtime(const time_t *c) ; extern double current_time(void) ; #endif /* CYASSL_KEIL_RL_H */ diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c index f858f71cd..7a39b51f4 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c @@ -30,10 +30,6 @@ #include #include "cyassl_MDK_ARM.h" -#include "stm32f2xx_tim.h" -#include "stm32f2xx_rcc.h" - - /*----------------------------------------------------------------------------- * Initialize a Flash Memory Card *----------------------------------------------------------------------------*/ @@ -87,77 +83,6 @@ __task void tcp_poll (void) } #endif -/*----------------------------------------------------------------------------- - * initialize RTC - *----------------------------------------------------------------------------*/ -#include "stm32f2xx_rtc.h" -#include "stm32f2xx_rcc.h" -#include "stm32f2xx_pwr.h" - -static init_RTC() -{ - RTC_InitTypeDef RTC_InitStruct ; - - RTC_TimeTypeDef RTC_Time ; - RTC_DateTypeDef RTC_Date ; - - - /* Enable the PWR clock */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); - - /* Allow access to RTC */ - PWR_BackupAccessCmd(ENABLE); - -/***Configures the External Low Speed oscillator (LSE)****/ - - RCC_LSEConfig(RCC_LSE_ON); - - /* Wait till LSE is ready */ - while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) - { - } - - /* Select the RTC Clock Source */ - RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); - - /* Enable the RTC Clock */ - RCC_RTCCLKCmd(ENABLE); - - /* Wait for RTC APB registers synchronisation */ - RTC_WaitForSynchro(); - - /* Calendar Configuration with LSI supposed at 32KHz */ - RTC_InitStruct.RTC_AsynchPrediv = 0x7F; - RTC_InitStruct.RTC_SynchPrediv = 0xFF; - RTC_InitStruct.RTC_HourFormat = RTC_HourFormat_24; - RTC_Init(&RTC_InitStruct); - - RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; - RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; -} - -/*----------------------------------------------------------------------------- - * initialize TIM - *----------------------------------------------------------------------------*/ -void init_timer() -{ - TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure ; - - RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE) ; - - TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); - TIM_TimeBaseStructure.TIM_Prescaler = 60; - TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; - TIM_TimeBaseStructure.TIM_Period = 0xffffffff; - TIM_TimeBaseStructure.TIM_ClockDivision = 0; - TIM_TimeBaseStructure.TIM_RepetitionCounter = 0; - - TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); - - TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure) ; - TIM_Cmd(TIM2, ENABLE) ; -} - #if defined(HAVE_KEIL_RTX) && defined(CYASSL_MDK_SHELL) #define SHELL_STACKSIZE 1000 static unsigned char Shell_stack[SHELL_STACKSIZE] ; @@ -193,11 +118,12 @@ void main_task (void) shell_main() ; #endif #else - + /************************************/ /*** USER APPLICATION HERE ***/ /************************************/ - + printf("USER LOGIC STARTED\n") ; + #endif #ifdef HAVE_KEIL_RTX @@ -217,16 +143,19 @@ void main_task (void) /*** main entry ***/ +extern void init_time(void) ; +extern void SystemInit(void); + int main() { - /* stm32_Init (); STM32 setup */ - + + SystemInit(); + SER_Init() ; #if !defined(NO_FILESYSTEM) init_card () ; /* initializing SD card */ #endif - - init_RTC() ; - init_timer() ; - SER_Init() ; + + init_time() ; + #if defined(DEBUG_CYASSL) printf("Turning ON Debug message\n") ; diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c index d6268fa80..1a0b6ad73 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c @@ -384,39 +384,6 @@ static void ipaddr_comm(void *args) #endif -static void time_main(void *args) -{ - char * datetime ; - RTC_TimeTypeDef RTC_Time ; - RTC_DateTypeDef RTC_Date ; - int year ; - if( args == NULL || ((func_args *)args)->argc == 1) { - RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; - RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; - printf("Date: %d/%d/%d, Time: %02d:%02d:%02d\n", - RTC_Date.RTC_Month, RTC_Date.RTC_Date, RTC_Date.RTC_Year+2000, - RTC_Time.RTC_Hours, RTC_Time.RTC_Minutes, RTC_Time.RTC_Seconds) ; - } else if(((func_args *)args)->argc == 3 && - ((func_args *)args)->argv[1][0] == '-' && - ((func_args *)args)->argv[1][1] == 'd' ) { - datetime = ((func_args *)args)->argv[2]; - sscanf(datetime, "%d/%d/%d", - (int *)&RTC_Date.RTC_Month, (int *)&RTC_Date.RTC_Date, &year) ; - RTC_Date.RTC_Year = year - 2000 ; - RTC_Date.RTC_WeekDay = 0 ; - RTC_SetDate(RTC_Format_BIN, &RTC_Date) ; - } else if(((func_args *)args)->argc == 3 && - ((func_args *)args)->argv[1][0] == '-' && - ((func_args *)args)->argv[1][1] == 't' ) { - datetime = ((func_args *)args)->argv[2]; - sscanf(datetime, "%d:%d:%d", - (int *)&RTC_Time.RTC_Hours, - (int *)&RTC_Time.RTC_Minutes, - (int *)&RTC_Time.RTC_Seconds - ) ; - RTC_SetTime(RTC_Format_BIN, &RTC_Time) ; - } else printf("Invalid argument\n") ; -} #if defined(HAVE_KEIL_RTX) diff --git a/IDE/MDK-ARM/MDK-ARM/config/File_Config.c b/IDE/MDK-ARM/MDK-ARM/config/File_Config.c index 9c121dac5..96b6dada2 100644 --- a/IDE/MDK-ARM/MDK-ARM/config/File_Config.c +++ b/IDE/MDK-ARM/MDK-ARM/config/File_Config.c @@ -1,387 +1,401 @@ -/*---------------------------------------------------------------------------- - * RL-ARM - FlashFS - *---------------------------------------------------------------------------- - * Name: FILE_CONFIG.C - * Purpose: Configuration of RL FlashFS by user - * Rev.: V4.50 - *---------------------------------------------------------------------------- - * This code is part of the RealView Run-Time Library. - * Copyright (c) 2004-2012 KEIL - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ - -#include - -//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- -// -// File System -// ============== -// Define File System global parameters - -// Number of open files <4-16> -// Define number of files that can be -// opened at the same time. -// Default: 8 -#define N_FILES 6 - -// CPU Clock Frequency [Hz]<0-1000000000> -// Define the CPU Clock frequency used for -// flash programming and erasing. -#define CPU_CLK 120000000 - -// -// Flash Drive -// ============== -// Enable Embedded Flash Drive [F:] -#define FL0_EN 0 - -// Base address <0x0-0xFFFFF000:0x1000> -// Define the target device Base address -// Default: 0x80000000 -#define FL0_BADR 0x80000000 - -// Device Size <0x4000-0xFFFFF000:0x4000> -// Define the size of Flash device in bytes -// Default: 0x100000 (1MB) -#define FL0_SIZE 0x0200000 - -// Content of Erased Memory <0=>0x00 <0xFF=>0xFF -// Define the initial value for erased Flash data -// Default: 0xFF -#define FL0_INITV 0xFF - -// Device Description file -// Specify a file name with a relative path -// Default: FS_FlashDev.h -#define FL0_HFILE "FS_FlashDev.h" - -// Default Drive [F:] -// Used when Drive letter not specified -#define FL0_DEF 1 - -// -// SPI Flash Drive -// ================== -// Enable SPI Flash Drive [S:] -#define SF0_EN 0 - -// Device Size <0x10000-0xFFFFF000:0x8000> -// Define the size of SPI Flash device in bytes -// Default: 0x100000 (1MB) -#define SF0_SIZE 0x0200000 - -// Content of Erased Memory <0=>0x00 <0xFF=>0xFF -// Define the initial value for erased Flash data -// Default: 0xFF -#define SF0_INITV 0xFF - -// Device Description file -// Specify a file name with a relative path -// Default: FS_SPI_FlashDev.h -#define SF0_HFILE "FS_SPI_FlashDev.h" - -// Default Drive [S:] -// Used when Drive letter not specified -#define SF0_DEF 0 - -// -// RAM Drive -// ============ -// Enable Embedded RAM Drive [R:] -#define RAM0_EN 0 - -// Device Size <0x4000-0xFFFFF000:0x4000> -// Define the size of RAM device in bytes -// Default: 0x40000 -#define RAM0_SIZE 0x004000 - -// Number of Sectors <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 -// Define number of virtual sectors for RAM device -// Default: 32 -#define RAM0_NSECT 64 - -// Relocate Device Buffer -// Locate RAM Device Buffer at a specific address. -// If not enabled, the linker selects base address. -#define RAM0_RELOC 1 - -// Base address <0x0-0xFFFFF000:0x1000> -// Define the target device Base address. -// Default: 0x81000000 -#define RAM0_BADR 0x81010000 - -// -// Default Drive [R:] -// Used when Drive letter not specified -#define RAM0_DEF 0 - -// -// Memory Card Drive 0 -// ====================== -// Enable Memory Card Drive [M0:] -#define MC0_EN 1 - -// Bus Mode <0=>SD-Native <1=>SPI -// Define Memory Card bus interface mode. -// SD-Native mode needs MCI peripheral. -// SPI mode uses SD Card in SPI mode. -#define MC0_SPI 0 - -// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB -// <8=>8 KB <16=>16 KB <32=>32 KB -// Define System Cache buffer size for file IO. -// Increase this number for faster r/w access. -// Default: 4 kB -#define MC0_CASZ 16 - -// Relocate Cache Buffer -// Locate Cache Buffer at a specific address. -// Some devices like NXP LPC23xx require a Cache buffer -// for DMA transfer located at specific address. -#define MC0_RELOC 0 - -// Base address <0x0000-0xFFFFFE00:0x200> -// Define the Cache buffer base address. -// For LPC23xx/24xx devices this is USB RAM -// starting at 0x7FD00000. -#define MC0_CADR 0x7FD00000 - -// -// FAT Journal -// Enable FAT Journal in order to guarantee -// fail-safe FAT file system operation. -#define MC0_FSJ 0 - -// Default Drive [M0:] -// Used when Drive letter not specified -#define MC0_DEF 1 - -// -// Memory Card Drive 1 -// ====================== -// Enable Memory Card Drive [M1:] -#define MC1_EN 0 - -// Bus Mode <0=>SD-Native <1=>SPI -// Define Memory Card bus interface mode. -// SD-Native mode needs MCI peripheral. -// SPI mode uses SD Card in SPI mode. -#define MC1_SPI 1 - -// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB -// <8=>8 KB <16=>16 KB <32=>32 KB -// Define System Cache buffer size for file IO. -// Increase this number for faster r/w access. -// Default: 4 kB -#define MC1_CASZ 0 - -// Relocate Cache Buffer -// Locate Cache Buffer at a specific address. -// Some devices like NXP LPC23xx require a Cache buffer -// for DMA transfer located at specific address. -#define MC1_RELOC 0 - -// Base address <0x0000-0xFFFFFE00:0x200> -// Define the Cache buffer base address. -// For LPC23xx/24xx devices this is USB RAM -// starting at 0x7FD00000. -#define MC1_CADR 0x7FD00000 - -// -// FAT Journal -// Enable FAT Journal in order to guarantee -// fail-safe FAT file system operation. -#define MC1_FSJ 0 - -// Default Drive [M1:] -// Used when Drive letter not specified -#define MC1_DEF 0 - -// -// USB Flash Drive 0 -// ==================== -// Enable USB Flash Drive [U0:] -#define USB0_EN 0 - -// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB -// <8=>8 KB <16=>16 KB <32=>32 KB -// Define System Cache buffer size for file IO. -// Increase this number for faster r/w access. -// Default: 4 kB -#define USB0_CASZ 8 - -// FAT Journal -// Enable FAT Journal in order to guarantee -// fail-safe FAT file system operation. -#define USB0_FSJ 0 - -// Default Drive [U0:] -// Used when Drive letter not specified -#define USB0_DEF 1 - -// -// USB Flash Drive 1 -// ==================== -// Enable USB Flash Drive [U1:] -#define USB1_EN 0 - -// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB -// <8=>8 KB <16=>16 KB <32=>32 KB -// Define System Cache buffer size for file IO. -// Increase this number for faster r/w access. -// Default: 4 kB -#define USB1_CASZ 8 - -// FAT Journal -// Enable FAT Journal in order to guarantee -// fail-safe FAT file system operation. -#define USB1_FSJ 0 - -// Default Drive [U1:] -// Used when Drive letter not specified -#define USB1_DEF 1 - -// -// NAND Flash Drive 0 -// =================== -// Enable NAND Flash Drive [N0:] -#define NAND0_EN 0 - -// Page size <528=> 512 + 16 bytes -// <2112=>2048 + 64 bytes -// <4224=>4096 + 128 bytes -// <8448=>8192 + 256 bytes -// Define program Page size in bytes (User + Spare area). -#define NAND0_PGSZ 2112 - -// Block Size <8=>8 pages <16=>16 pages <32=>32 pages -// <64=>64 pages <128=>128 pages <256=>256 pages -// Define number of pages in a block. -#define NAND0_PGCNT 64 - -// Device Size [blocks] <512-32768> -// Define number of blocks in NAND Flash device. -#define NAND0_BLCNT 4096 - -// Page Caching <0=>OFF <1=>1 page <2=>2 pages <4=>4 pages -// <8=>8 pages <16=>16 pages <32=>32 pages -// Define number of cached Pages. -// Default: 4 pages -#define NAND0_CAPG 2 - -// Block Indexing <0=>OFF <1=>1 block <2=>2 blocks <4=>4 blocks -// <8=>8 blocks <16=>16 blocks <32=>32 blocks -// <64=>64 blocks <128=>128 blocks <256=>256 blocks -// Define number of indexed Flash Blocks. -// Increase this number for better performance. -// Default: 16 blocks -#define NAND0_CABL 16 - -// Software ECC <0=>None <1=>Hamming (SLC) -// Enable software ECC calculation only, -// if not supported by hardware. -#define NAND0_SWECC 1 - -// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB -// <8=>8 KB <16=>16 KB <32=>32 KB -// Define System Cache buffer size for file IO. -// Increase this number for faster r/w access. -// Default: 4 kB -#define NAND0_CASZ 4 - -// Relocate Cache Buffers -// Use this option to locate Cache buffers -// at specific address in RAM or SDRAM. -#define NAND0_RELOC 0 - -// Base address <0x0000-0xFFFFFE00:0x200> -// Define base address for Cache Buffers. -#define NAND0_CADR 0x80000000 - -// -// FAT Journal -// Enable FAT Journal in order to guarantee -// fail-safe FAT file system operation. -#define NAND0_FSJ 0 - -// Default Drive [N0:] -// Used when Drive letter not specified -#define NAND0_DEF 0 - -// -// NAND Flash Drive 1 -// =================== -// Enable NAND Flash Drive [N1:] -#define NAND1_EN 0 - -// Page size <528=> 512 + 16 bytes -// <2112=>2048 + 64 bytes -// <4224=>4096 + 128 bytes -// <8448=>8192 + 256 bytes -// Define program Page size in bytes (User + Spare area). -#define NAND1_PGSZ 2112 - -// Block Size <8=>8 pages <16=>16 pages <32=>32 pages -// <64=>64 pages <128=>128 pages <256=>256 pages -// Define number of pages in a block. -#define NAND1_PGCNT 32 - -// Device Size [blocks] <512-32768> -// Define number of blocks in NAND Flash device. -#define NAND1_BLCNT 512 - -// Page Caching <0=>OFF <1=>1 page <2=>2 pages <4=>4 pages -// <8=>8 pages <16=>16 pages <32=>32 pages -// Define number of cached Pages. -// Default: 4 pages -#define NAND1_CAPG 4 - -// Block Indexing <0=>OFF <1=>1 block <2=>2 blocks <4=>4 blocks -// <8=>8 blocks <16=>16 blocks <32=>32 blocks -// <64=>64 blocks <128=>128 blocks <256=>256 blocks -// Define number of indexed Flash Blocks. -// Increase this number for better performance. -// Default: 16 blocks -#define NAND1_CABL 16 - -// Software ECC <0=>None <1=>Hamming (SLC) -// Enable software ECC calculation only, -// if not supported by hardware. -#define NAND1_SWECC 0 - -// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB -// <8=>8 KB <16=>16 KB <32=>32 KB -// Define System Cache buffer size for file IO. -// Increase this number for faster r/w access. -// Default: 4 kB -#define NAND1_CASZ 4 - -// Relocate Cache Buffers -// Use this option to locate Cache buffers -// at specific address in RAM or SDRAM. -#define NAND1_RELOC 0 - -// Base address <0x0000-0xFFFFFE00:0x200> -// Define base address for Cache Buffers. -#define NAND1_CADR 0x80000000 - -// -// FAT Journal -// Enable FAT Journal in order to guarantee -// fail-safe FAT file system operation. -#define NAND1_FSJ 0 - -// Default Drive [N1:] -// Used when Drive letter not specified -#define NAND1_DEF 0 - -// - -//------------- <<< end of configuration section >>> ----------------------- - -#ifndef __NO_FILE_LIB_C -#include -#endif - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/ +/*---------------------------------------------------------------------------- + * RL-ARM - FlashFS + *---------------------------------------------------------------------------- + * Name: FILE_CONFIG.C + * Purpose: Configuration of RL FlashFS by user + * Rev.: V4.70 + *---------------------------------------------------------------------------- + * This code is part of the RealView Run-Time Library. + * Copyright (c) 2004-2013 KEIL - An ARM Company. All rights reserved. + *---------------------------------------------------------------------------*/ + +#include + +//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- +// +// File System +// ============== +// Define File System global parameters + +// Number of open files <4-16> +// Define number of files that can be +// opened at the same time. +// Default: 8 +#define N_FILES 6 + +// FAT Name Cache Size <0-1000000> +// Define number of cached FAT file or directory names. +// 48 bytes of RAM is required for each cached name. +#define FAT_NAME_CACNT 0 + +// Relocate FAT Name Cache Buffer +// Locate Cache Buffer at a specific address. +#define FAT_NAME_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Define the Cache buffer base address. +#define FAT_NAME_CADR 0x60000000 + +// +// CPU Clock Frequency [Hz]<0-1000000000> +// Define the CPU Clock frequency used for +// flash programming and erasing. +#define CPU_CLK 180000000 + +// +// Flash Drive +// ============== +// Enable Embedded Flash Drive [F:] +#define FL0_EN 0 + +// Base address <0x0-0xFFFFF000:0x1000> +// Define the target device Base address +// Default: 0x80000000 +#define FL0_BADR 0x80000000 + +// Device Size <0x4000-0xFFFFF000:0x4000> +// Define the size of Flash device in bytes +// Default: 0x100000 (1MB) +#define FL0_SIZE 0x0200000 + +// Content of Erased Memory <0=>0x00 <0xFF=>0xFF +// Define the initial value for erased Flash data +// Default: 0xFF +#define FL0_INITV 0xFF + +// Device Description file +// Specify a file name with a relative path +// Default: FS_FlashDev.h +#define FL0_HFILE "FS_FlashDev.h" + +// Default Drive [F:] +// Used when Drive letter not specified +#define FL0_DEF 1 + +// +// SPI Flash Drive +// ================== +// Enable SPI Flash Drive [S:] +#define SF0_EN 0 + +// Device Size <0x10000-0xFFFFF000:0x8000> +// Define the size of SPI Flash device in bytes +// Default: 0x100000 (1MB) +#define SF0_SIZE 0x0200000 + +// Content of Erased Memory <0=>0x00 <0xFF=>0xFF +// Define the initial value for erased Flash data +// Default: 0xFF +#define SF0_INITV 0xFF + +// Device Description file +// Specify a file name with a relative path +// Default: FS_SPI_FlashDev.h +#define SF0_HFILE "FS_SPI_FlashDev.h" + +// Default Drive [S:] +// Used when Drive letter not specified +#define SF0_DEF 0 + +// +// RAM Drive +// ============ +// Enable Embedded RAM Drive [R:] +#define RAM0_EN 0 + +// Device Size <0x4000-0xFFFFF000:0x4000> +// Define the size of RAM device in bytes +// Default: 0x40000 +#define RAM0_SIZE 0x004000 + +// Number of Sectors <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 +// Define number of virtual sectors for RAM device +// Default: 32 +#define RAM0_NSECT 64 + +// Relocate Device Buffer +// Locate RAM Device Buffer at a specific address. +// If not enabled, the linker selects base address. +#define RAM0_RELOC 1 + +// Base address <0x0-0xFFFFF000:0x1000> +// Define the target device Base address. +// Default: 0x81000000 +#define RAM0_BADR 0x81010000 + +// +// Default Drive [R:] +// Used when Drive letter not specified +#define RAM0_DEF 0 + +// +// Memory Card Drive 0 +// ====================== +// Enable Memory Card Drive [M0:] +#define MC0_EN 1 + +// Bus Mode <0=>SD-Native <1=>SPI +// Define Memory Card bus interface mode. +// SD-Native mode needs MCI peripheral. +// SPI mode uses SD Card in SPI mode. +#define MC0_SPI 0 + +// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Define System Cache buffer size for file IO. +// Increase this number for faster r/w access. +// Default: 4 kB +#define MC0_CASZ 4 + +// Relocate Cache Buffer +// Locate Cache Buffer at a specific address. +// Some devices like NXP LPC23xx require a Cache buffer +// for DMA transfer located at specific address. +#define MC0_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Define the Cache buffer base address. +// For LPC23xx/24xx devices this is USB RAM +// starting at 0x7FD00000. +#define MC0_CADR 0x7FD00000 + +// +// FAT Journal +// Enable FAT Journal in order to guarantee +// fail-safe FAT file system operation. +#define MC0_FSJ 0 + +// Default Drive [M0:] +// Used when Drive letter not specified +#define MC0_DEF 1 + +// +// Memory Card Drive 1 +// ====================== +// Enable Memory Card Drive [M1:] +#define MC1_EN 0 + +// Bus Mode <0=>SD-Native <1=>SPI +// Define Memory Card bus interface mode. +// SD-Native mode needs MCI peripheral. +// SPI mode uses SD Card in SPI mode. +#define MC1_SPI 1 + +// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Define System Cache buffer size for file IO. +// Increase this number for faster r/w access. +// Default: 4 kB +#define MC1_CASZ 0 + +// Relocate Cache Buffer +// Locate Cache Buffer at a specific address. +// Some devices like NXP LPC23xx require a Cache buffer +// for DMA transfer located at specific address. +#define MC1_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Define the Cache buffer base address. +// For LPC23xx/24xx devices this is USB RAM +// starting at 0x7FD00000. +#define MC1_CADR 0x7FD00000 + +// +// FAT Journal +// Enable FAT Journal in order to guarantee +// fail-safe FAT file system operation. +#define MC1_FSJ 0 + +// Default Drive [M1:] +// Used when Drive letter not specified +#define MC1_DEF 0 + +// +// USB Flash Drive 0 +// ==================== +// Enable USB Flash Drive [U0:] +#define USB0_EN 0 + +// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Define System Cache buffer size for file IO. +// Increase this number for faster r/w access. +// Default: 4 kB +#define USB0_CASZ 8 + +// FAT Journal +// Enable FAT Journal in order to guarantee +// fail-safe FAT file system operation. +#define USB0_FSJ 0 + +// Default Drive [U0:] +// Used when Drive letter not specified +#define USB0_DEF 0 + +// +// USB Flash Drive 1 +// ==================== +// Enable USB Flash Drive [U1:] +#define USB1_EN 0 + +// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Define System Cache buffer size for file IO. +// Increase this number for faster r/w access. +// Default: 4 kB +#define USB1_CASZ 8 + +// FAT Journal +// Enable FAT Journal in order to guarantee +// fail-safe FAT file system operation. +#define USB1_FSJ 0 + +// Default Drive [U1:] +// Used when Drive letter not specified +#define USB1_DEF 0 + +// +// NAND Flash Drive 0 +// =================== +// Enable NAND Flash Drive [N0:] +#define NAND0_EN 0 + +// Page size <528=> 512 + 16 bytes +// <2112=>2048 + 64 bytes +// <4224=>4096 + 128 bytes +// <8448=>8192 + 256 bytes +// Define program Page size in bytes (User + Spare area). +#define NAND0_PGSZ 2112 + +// Block Size <8=>8 pages <16=>16 pages <32=>32 pages +// <64=>64 pages <128=>128 pages <256=>256 pages +// Define number of pages in a block. +#define NAND0_PGCNT 64 + +// Device Size [blocks] <512-32768> +// Define number of blocks in NAND Flash device. +#define NAND0_BLCNT 4096 + +// Page Caching <0=>OFF <1=>1 page <2=>2 pages <4=>4 pages +// <8=>8 pages <16=>16 pages <32=>32 pages +// Define number of cached Pages. +// Default: 4 pages +#define NAND0_CAPG 2 + +// Block Indexing <0=>OFF <1=>1 block <2=>2 blocks <4=>4 blocks +// <8=>8 blocks <16=>16 blocks <32=>32 blocks +// <64=>64 blocks <128=>128 blocks <256=>256 blocks +// Define number of indexed Flash Blocks. +// Increase this number for better performance. +// Default: 16 blocks +#define NAND0_CABL 16 + +// Software ECC <0=>None <1=>Hamming (SLC) +// Enable software ECC calculation only, +// if not supported by hardware. +#define NAND0_SWECC 1 + +// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Define System Cache buffer size for file IO. +// Increase this number for faster r/w access. +// Default: 4 kB +#define NAND0_CASZ 4 + +// Relocate Cache Buffers +// Use this option to locate Cache buffers +// at specific address in RAM or SDRAM. +#define NAND0_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Define base address for Cache Buffers. +#define NAND0_CADR 0x80000000 + +// +// FAT Journal +// Enable FAT Journal in order to guarantee +// fail-safe FAT file system operation. +#define NAND0_FSJ 0 + +// Default Drive [N0:] +// Used when Drive letter not specified +#define NAND0_DEF 0 + +// +// NAND Flash Drive 1 +// =================== +// Enable NAND Flash Drive [N1:] +#define NAND1_EN 0 + +// Page size <528=> 512 + 16 bytes +// <2112=>2048 + 64 bytes +// <4224=>4096 + 128 bytes +// <8448=>8192 + 256 bytes +// Define program Page size in bytes (User + Spare area). +#define NAND1_PGSZ 2112 + +// Block Size <8=>8 pages <16=>16 pages <32=>32 pages +// <64=>64 pages <128=>128 pages <256=>256 pages +// Define number of pages in a block. +#define NAND1_PGCNT 32 + +// Device Size [blocks] <512-32768> +// Define number of blocks in NAND Flash device. +#define NAND1_BLCNT 512 + +// Page Caching <0=>OFF <1=>1 page <2=>2 pages <4=>4 pages +// <8=>8 pages <16=>16 pages <32=>32 pages +// Define number of cached Pages. +// Default: 4 pages +#define NAND1_CAPG 4 + +// Block Indexing <0=>OFF <1=>1 block <2=>2 blocks <4=>4 blocks +// <8=>8 blocks <16=>16 blocks <32=>32 blocks +// <64=>64 blocks <128=>128 blocks <256=>256 blocks +// Define number of indexed Flash Blocks. +// Increase this number for better performance. +// Default: 16 blocks +#define NAND1_CABL 16 + +// Software ECC <0=>None <1=>Hamming (SLC) +// Enable software ECC calculation only, +// if not supported by hardware. +#define NAND1_SWECC 0 + +// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB +// <8=>8 KB <16=>16 KB <32=>32 KB +// Define System Cache buffer size for file IO. +// Increase this number for faster r/w access. +// Default: 4 kB +#define NAND1_CASZ 4 + +// Relocate Cache Buffers +// Use this option to locate Cache buffers +// at specific address in RAM or SDRAM. +#define NAND1_RELOC 0 + +// Base address <0x0000-0xFFFFFE00:0x200> +// Define base address for Cache Buffers. +#define NAND1_CADR 0x80000000 + +// +// FAT Journal +// Enable FAT Journal in order to guarantee +// fail-safe FAT file system operation. +#define NAND1_FSJ 0 + +// Default Drive [N1:] +// Used when Drive letter not specified +#define NAND1_DEF 0 + +// + +//------------- <<< end of configuration section >>> ----------------------- + +#ifndef __NO_FILE_LIB_C +#include +#endif + +/*---------------------------------------------------------------------------- + * end of file + *---------------------------------------------------------------------------*/ diff --git a/IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c b/IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c index 2d932a2d1..a03892045 100644 --- a/IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c +++ b/IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c @@ -39,7 +39,7 @@ // Set the stack size for tasks which is assigned by the system. // Default: 512 #ifndef OS_STKSIZE - #define OS_STKSIZE 250 + #define OS_STKSIZE 499 #endif // Check for the stack overflow diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt new file mode 100644 index 000000000..14992a665 --- /dev/null +++ b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt @@ -0,0 +1,1720 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + MDK-RTX-TCP-FS + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Lst\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 8 + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 9 + + + + + + + + + + ..\MDK-ARM\config\Dbg_Flash.ini + BIN\ULP2CM3.DLL + + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + ULP2CM3 + -UP1135060 -O974 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP18 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000 + + + + + + 0 + Reset Peripherals + Per_Reset() + + + + 0 + + + 0 + 0 + 1 + 0 + 1 + 0 + 0 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + + + + + + + + MDK-FS + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Lst\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 0 + + 8 + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 9 + + + + + + + + + + ..\MDK-ARM\config\Dbg_Flash.ini + BIN\ULP2CM3.DLL + + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + ULP2CM3 + -UP1135060 -O974 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP18 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000 + + + + + + 0 + Reset Peripherals + Per_Reset() + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + + + + + + + + MDK-BARE-METAL + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Lst\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 0 + + 8 + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 9 + + + + + + + + + + ..\MDK-ARM\config\Dbg_Flash.ini + BIN\ULP2CM3.DLL + + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + ULP2CM3 + -UP1135060 -O1007 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO22 -TC10000000 -TP18 -TDX0 -TDD0 -TDS0 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000 + + + + + + 0 + Reset Peripherals + Per_Reset() + + + + 0 + + + 0 + 0 + 1 + 0 + 1 + 0 + 0 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + + + + + + + + CyaSSL Apps + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\examples\echoclient\echoclient.c + echoclient.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\examples\echoserver\echoserver.c + echoserver.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\test\test.c + test.c + 0 + 0 + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\benchmark\benchmark.c + benchmark.c + 0 + 0 + + + 1 + 5 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\examples\client\client.c + client.c + 0 + 0 + + + 1 + 6 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\examples\server\server.c + server.c + 0 + 0 + + + 1 + 7 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\CyaSSL\shell.c + shell.c + 0 + 0 + + + 1 + 8 + 1 + 0 + 0 + 27 + 0 + 143 + 160 + 0 + ..\MDK-ARM\CyaSSL\main.c + main.c + 0 + 0 + + + 1 + 9 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\CyaSSL\cert_data.c + cert_data.c + 0 + 0 + + + + + LPC43xx + 1 + 0 + 0 + 0 + + 2 + 10 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\LPC43xx\Drivers\source\lpc43xx_rtc.c + lpc43xx_rtc.c + 0 + 0 + + + 2 + 11 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\LPC43xx\Drivers\source\lpc43xx_timer.c + lpc43xx_timer.c + 0 + 0 + + + 2 + 12 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\LPC43xx\Drivers\source\lpc43xx_cgu.c + lpc43xx_cgu.c + 0 + 0 + + + 2 + 13 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\LPC43xx\Drivers\source\lpc43xx_scu.c + lpc43xx_scu.c + 0 + 0 + + + + + MDK-ARM + 1 + 0 + 0 + 0 + + 3 + 14 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + c:\Keil\ARM\RV31\LIB\FS_CM3.lib + FS_CM3.lib + 0 + 0 + + + 3 + 15 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + c:\Keil\ARM\RV31\LIB\\RTX_CM3.lib + RTX_CM3.lib + 0 + 0 + + + 3 + 16 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + c:\Keil\ARM\RV31\LIB\TCPD_CM3.lib + TCPD_CM3.lib + 0 + 0 + + + 3 + 17 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + c:\Keil\ARM\RV31\LIB\TCP_CM3.lib + TCP_CM3.lib + 0 + 0 + + + 3 + 18 + 1 + 0 + 0 + 0 + 0 + 64 + 84 + 0 + C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\Serial.c + Serial.c + 0 + 0 + + + 3 + 19 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil\ARM\RL\TCPnet\Drivers\ETH_LPC43xx.c + ETH_LPC43xx.c + 0 + 0 + + + 3 + 20 + 1 + 0 + 0 + 0 + 0 + 257 + 272 + 0 + C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\SDIO_LPC43xx.c + SDIO_LPC43xx.c + 0 + 0 + + + 3 + 21 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\system_LPC43xx.c + system_LPC43xx.c + 0 + 0 + + + + + CyaSSL Library + 0 + 0 + 0 + 0 + + 4 + 22 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\crl.c + crl.c + 0 + 0 + + + 4 + 23 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\internal.c + internal.c + 0 + 0 + + + 4 + 24 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\io.c + io.c + 0 + 0 + + + 4 + 25 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\keys.c + keys.c + 0 + 0 + + + 4 + 26 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\ocsp.c + ocsp.c + 0 + 0 + + + 4 + 27 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\sniffer.c + sniffer.c + 0 + 0 + + + 4 + 28 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\ssl.c + ssl.c + 0 + 0 + + + 4 + 29 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\src\tls.c + tls.c + 0 + 0 + + + 4 + 30 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\CyaSSL\ssl-dummy.c + ssl-dummy.c + 0 + 0 + + + + + Crypt/Cipher Library + 0 + 0 + 0 + 0 + + 5 + 31 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\aes.c + aes.c + 0 + 0 + + + 5 + 32 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\arc4.c + arc4.c + 0 + 0 + + + 5 + 33 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\asm.c + asm.c + 0 + 0 + + + 5 + 34 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\asn.c + asn.c + 0 + 0 + + + 5 + 35 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\camellia.c + camellia.c + 0 + 0 + + + 5 + 36 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\coding.c + coding.c + 0 + 0 + + + 5 + 37 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\des3.c + des3.c + 0 + 0 + + + 5 + 38 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\dh.c + dh.c + 0 + 0 + + + 5 + 39 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\dsa.c + dsa.c + 0 + 0 + + + 5 + 40 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\ecc.c + ecc.c + 0 + 0 + + + 5 + 41 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\ecc_fp.c + ecc_fp.c + 0 + 0 + + + 5 + 42 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\error.c + error.c + 0 + 0 + + + 5 + 43 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\hc128.c + hc128.c + 0 + 0 + + + 5 + 44 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\hmac.c + hmac.c + 0 + 0 + + + 5 + 45 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\integer.c + integer.c + 0 + 0 + + + 5 + 46 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\logging.c + logging.c + 0 + 0 + + + 5 + 47 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\md2.c + md2.c + 0 + 0 + + + 5 + 48 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\md4.c + md4.c + 0 + 0 + + + 5 + 49 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\md5.c + md5.c + 0 + 0 + + + 5 + 50 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\memory.c + memory.c + 0 + 0 + + + 5 + 51 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\misc.c + misc.c + 0 + 0 + + + 5 + 52 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\pwdbased.c + pwdbased.c + 0 + 0 + + + 5 + 53 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\rabbit.c + rabbit.c + 0 + 0 + + + 5 + 54 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\random.c + random.c + 0 + 0 + + + 5 + 55 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\ripemd.c + ripemd.c + 0 + 0 + + + 5 + 56 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\rsa.c + rsa.c + 0 + 0 + + + 5 + 57 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\sha.c + sha.c + 0 + 0 + + + 5 + 58 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\sha256.c + sha256.c + 0 + 0 + + + 5 + 59 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\sha512.c + sha512.c + 0 + 0 + + + 5 + 60 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\..\..\ctaocrypt\src\tfm.c + tfm.c + 0 + 0 + + + + + Configuration + 1 + 0 + 0 + 0 + + 6 + 61 + 1 + 0 + 0 + 1 + 0 + 1 + 11 + 0 + ..\MDK-ARM\config\File_Config.c + File_Config.c + 0 + 0 + + + 6 + 62 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\config\Net_Config.c + Net_Config.c + 0 + 0 + + + 6 + 63 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\CyaSSL\config.h + config.h + 0 + 0 + + + 6 + 64 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + ..\MDK-ARM\config\RTX_Conf_CM.c + RTX_Conf_CM.c + 0 + 0 + + + 6 + 65 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\config\Net_Debug.c + Net_Debug.c + 0 + 0 + + + 6 + 66 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\CyaSSL\config-FS.h + config-FS.h + 0 + 0 + + + 6 + 67 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\CyaSSL\config-RTX-TCP-FS.h + config-RTX-TCP-FS.h + 0 + 0 + + + 6 + 68 + 5 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\MDK-ARM\CyaSSL\config-BARE-METAL.h + config-BARE-METAL.h + 0 + 0 + + + 6 + 69 + 2 + 0 + 0 + 0 + 0 + 143 + 151 + 0 + ..\LPC43xx\startup_LPC43xx.s + startup_LPC43xx.s + 0 + 0 + + + + + CyaSSL-MDK + 1 + 0 + 0 + 0 + + 7 + 70 + 1 + 0 + 0 + 0 + 0 + 170 + 182 + 0 + ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c + cyassl_MDK_ARM.c + 0 + 0 + + + 7 + 71 + 1 + 0 + 0 + 0 + 0 + 56 + 59 + 0 + ..\MDK-ARM\CyaSSL\Retarget.c + Retarget.c + 0 + 0 + + + 7 + 72 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\LPC43xx\time-LCP43xx.c + time-LCP43xx.c + 0 + 0 + + + + diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj new file mode 100644 index 000000000..e25ffe7de --- /dev/null +++ b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj @@ -0,0 +1,3455 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + MDK-RTX-TCP-FS + 0x4 + ARM-ADS + + + LPC4357 + NXP (founded by Philips) + IRAM(0x10000000-0x10007FFF) IRAM2(0x20000000-0x2000FFFF) IROM(0x1A000000-0x1A07FFFF) IROM2(0x1B000000-0x1B07FFFF) CLOCK(12000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\NXP\LPC43xx\startup_LPC43xx.s" ("NXP LPC43xx Startup Code") + UL2CM3(-O975 -S0 -C0 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000) + 6414 + LPC43xx.H + + + + + + + + + + SFD\NXP\LPC43xx\LPC43xx.SFR + 0 + + + + NXP\LPC43xx\ + NXP\LPC43xx\ + + 0 + 0 + 0 + 0 + 1 + + .\Obj\ + SD_File + 1 + 0 + 0 + 1 + 1 + .\Lst\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + $K\ARM\BIN\ElfDwT.exe !L BASEADDRESS(0x1A000000) + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + + 0 + 9 + + + + + + + + + + + + + ..\MDK-ARM\config\Dbg_Flash.ini + BIN\ULP2CM3.DLL + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 0 + BIN\ULP2CM3.DLL + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 8 + 0 + 0 + 0 + 3 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x10000000 + 0x8000 + + + 1 + 0x1a000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x1a000000 + 0x80000 + + + 1 + 0x1b000000 + 0x80000 + + + 0 + 0x10080000 + 0xa000 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x10000000 + 0x8000 + + + 0 + 0x20000000 + 0x10000 + + + + + + 1 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + HAVE_CONFIG_H CYASSL_LPC43xx CORE_M4 __RTX USE_STDPERIPH_DRIVER MDK_CONF_RTX_TCP_FS + + ..\MDK-ARM\CyaSSL;../../..;..\LPC43xx\Drivers\include;..\LPC43xx\LPC43xx\Include + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + + + + + + + + + + + + + + CyaSSL Apps + + + echoclient.c + 1 + ..\..\..\examples\echoclient\echoclient.c + + + echoserver.c + 1 + ..\..\..\examples\echoserver\echoserver.c + + + test.c + 1 + ..\..\..\ctaocrypt\test\test.c + + + benchmark.c + 1 + ..\..\..\ctaocrypt\benchmark\benchmark.c + + + client.c + 1 + ..\..\..\examples\client\client.c + + + server.c + 1 + ..\..\..\examples\server\server.c + + + shell.c + 1 + ..\MDK-ARM\CyaSSL\shell.c + + + main.c + 1 + ..\MDK-ARM\CyaSSL\main.c + + + cert_data.c + 1 + ..\MDK-ARM\CyaSSL\cert_data.c + + + + + LPC43xx + + + lpc43xx_rtc.c + 1 + ..\LPC43xx\Drivers\source\lpc43xx_rtc.c + + + lpc43xx_timer.c + 1 + ..\LPC43xx\Drivers\source\lpc43xx_timer.c + + + lpc43xx_cgu.c + 1 + ..\LPC43xx\Drivers\source\lpc43xx_cgu.c + + + lpc43xx_scu.c + 1 + ..\LPC43xx\Drivers\source\lpc43xx_scu.c + + + + + MDK-ARM + + + FS_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\FS_CM3.lib + + + RTX_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\\RTX_CM3.lib + + + TCPD_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\TCPD_CM3.lib + + + TCP_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\TCP_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + Serial.c + 1 + C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\Serial.c + + + ETH_LPC43xx.c + 1 + C:\Keil\ARM\RL\TCPnet\Drivers\ETH_LPC43xx.c + + + SDIO_LPC43xx.c + 1 + C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\SDIO_LPC43xx.c + + + system_LPC43xx.c + 1 + C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\system_LPC43xx.c + + + + + CyaSSL Library + + + crl.c + 1 + ..\..\..\src\crl.c + + + internal.c + 1 + ..\..\..\src\internal.c + + + io.c + 1 + ..\..\..\src\io.c + + + keys.c + 1 + ..\..\..\src\keys.c + + + ocsp.c + 1 + ..\..\..\src\ocsp.c + + + sniffer.c + 1 + ..\..\..\src\sniffer.c + + + ssl.c + 1 + ..\..\..\src\ssl.c + + + tls.c + 1 + ..\..\..\src\tls.c + + + ssl-dummy.c + 1 + ..\MDK-ARM\CyaSSL\ssl-dummy.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + + + Crypt/Cipher Library + + + aes.c + 1 + ..\..\..\ctaocrypt\src\aes.c + + + arc4.c + 1 + ..\..\..\ctaocrypt\src\arc4.c + + + asm.c + 1 + ..\..\..\ctaocrypt\src\asm.c + + + asn.c + 1 + ..\..\..\ctaocrypt\src\asn.c + + + camellia.c + 1 + ..\..\..\ctaocrypt\src\camellia.c + + + coding.c + 1 + ..\..\..\ctaocrypt\src\coding.c + + + des3.c + 1 + ..\..\..\ctaocrypt\src\des3.c + + + dh.c + 1 + ..\..\..\ctaocrypt\src\dh.c + + + dsa.c + 1 + ..\..\..\ctaocrypt\src\dsa.c + + + ecc.c + 1 + ..\..\..\ctaocrypt\src\ecc.c + + + ecc_fp.c + 1 + ..\..\..\ctaocrypt\src\ecc_fp.c + + + error.c + 1 + ..\..\..\ctaocrypt\src\error.c + + + hc128.c + 1 + ..\..\..\ctaocrypt\src\hc128.c + + + hmac.c + 1 + ..\..\..\ctaocrypt\src\hmac.c + + + integer.c + 1 + ..\..\..\ctaocrypt\src\integer.c + + + logging.c + 1 + ..\..\..\ctaocrypt\src\logging.c + + + md2.c + 1 + ..\..\..\ctaocrypt\src\md2.c + + + md4.c + 1 + ..\..\..\ctaocrypt\src\md4.c + + + md5.c + 1 + ..\..\..\ctaocrypt\src\md5.c + + + memory.c + 1 + ..\..\..\ctaocrypt\src\memory.c + + + misc.c + 1 + ..\..\..\ctaocrypt\src\misc.c + + + pwdbased.c + 1 + ..\..\..\ctaocrypt\src\pwdbased.c + + + rabbit.c + 1 + ..\..\..\ctaocrypt\src\rabbit.c + + + random.c + 1 + ..\..\..\ctaocrypt\src\random.c + + + ripemd.c + 1 + ..\..\..\ctaocrypt\src\ripemd.c + + + rsa.c + 1 + ..\..\..\ctaocrypt\src\rsa.c + + + sha.c + 1 + ..\..\..\ctaocrypt\src\sha.c + + + sha256.c + 1 + ..\..\..\ctaocrypt\src\sha256.c + + + sha512.c + 1 + ..\..\..\ctaocrypt\src\sha512.c + + + tfm.c + 1 + ..\..\..\ctaocrypt\src\tfm.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + + + Configuration + + + File_Config.c + 1 + ..\MDK-ARM\config\File_Config.c + + + Net_Config.c + 1 + ..\MDK-ARM\config\Net_Config.c + + + config.h + 5 + ..\MDK-ARM\CyaSSL\config.h + + + RTX_Conf_CM.c + 1 + ..\MDK-ARM\config\RTX_Conf_CM.c + + + Net_Debug.c + 1 + ..\MDK-ARM\config\Net_Debug.c + + + config-FS.h + 5 + ..\MDK-ARM\CyaSSL\config-FS.h + + + config-RTX-TCP-FS.h + 5 + ..\MDK-ARM\CyaSSL\config-RTX-TCP-FS.h + + + config-BARE-METAL.h + 5 + ..\MDK-ARM\CyaSSL\config-BARE-METAL.h + + + startup_LPC43xx.s + 2 + ..\LPC43xx\startup_LPC43xx.s + + + + + CyaSSL-MDK + + + cyassl_MDK_ARM.c + 1 + ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c + + + Retarget.c + 1 + ..\MDK-ARM\CyaSSL\Retarget.c + + + time-LCP43xx.c + 1 + ..\LPC43xx\time-LCP43xx.c + + + + + + + MDK-FS + 0x4 + ARM-ADS + + + LPC4357 + NXP (founded by Philips) + IRAM(0x10000000-0x10007FFF) IRAM2(0x20000000-0x2000FFFF) IROM(0x1A000000-0x1A07FFFF) IROM2(0x1B000000-0x1B07FFFF) CLOCK(12000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\NXP\LPC43xx\startup_LPC43xx.s" ("NXP LPC43xx Startup Code") + UL2CM3(-O975 -S0 -C0 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000) + 6414 + LPC43xx.H + + + + + + + + + + SFD\NXP\LPC43xx\LPC43xx.SFR + 0 + + + + NXP\LPC43xx\ + NXP\LPC43xx\ + + 0 + 0 + 0 + 0 + 1 + + .\Obj\ + SD_File + 1 + 0 + 0 + 1 + 1 + .\Lst\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + $K\ARM\BIN\ElfDwT.exe !L BASEADDRESS(0x1A000000) + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + + 0 + 9 + + + + + + + + + + + + + ..\MDK-ARM\config\Dbg_Flash.ini + BIN\ULP2CM3.DLL + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 0 + BIN\ULP2CM3.DLL + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 8 + 0 + 0 + 0 + 3 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x10000000 + 0x8000 + + + 1 + 0x1a000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x1a000000 + 0x80000 + + + 1 + 0x1b000000 + 0x80000 + + + 0 + 0x10080000 + 0xa000 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x10000000 + 0x8000 + + + 0 + 0x20000000 + 0x10000 + + + + + + 1 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + HAVE_CONFIG_H CYASSL_LPC43xx CORE_M4 __RTX USE_STDPERIPH_DRIVER MDK_CONF_FS + + ..\MDK-ARM\CyaSSL;../../..;..\LPC43xx\Drivers\include;..\LPC43xx\LPC43xx\Include + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + + + + + + + + + + + + + + CyaSSL Apps + + + echoclient.c + 1 + ..\..\..\examples\echoclient\echoclient.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + echoserver.c + 1 + ..\..\..\examples\echoserver\echoserver.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + test.c + 1 + ..\..\..\ctaocrypt\test\test.c + + + benchmark.c + 1 + ..\..\..\ctaocrypt\benchmark\benchmark.c + + + client.c + 1 + ..\..\..\examples\client\client.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + server.c + 1 + ..\..\..\examples\server\server.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + shell.c + 1 + ..\MDK-ARM\CyaSSL\shell.c + + + main.c + 1 + ..\MDK-ARM\CyaSSL\main.c + + + cert_data.c + 1 + ..\MDK-ARM\CyaSSL\cert_data.c + + + + + LPC43xx + + + lpc43xx_rtc.c + 1 + ..\LPC43xx\Drivers\source\lpc43xx_rtc.c + + + lpc43xx_timer.c + 1 + ..\LPC43xx\Drivers\source\lpc43xx_timer.c + + + lpc43xx_cgu.c + 1 + ..\LPC43xx\Drivers\source\lpc43xx_cgu.c + + + lpc43xx_scu.c + 1 + ..\LPC43xx\Drivers\source\lpc43xx_scu.c + + + + + MDK-ARM + + + FS_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\FS_CM3.lib + + + RTX_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\\RTX_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + TCPD_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\TCPD_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + TCP_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\TCP_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + Serial.c + 1 + C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\Serial.c + + + ETH_LPC43xx.c + 1 + C:\Keil\ARM\RL\TCPnet\Drivers\ETH_LPC43xx.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + SDIO_LPC43xx.c + 1 + C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\SDIO_LPC43xx.c + + + system_LPC43xx.c + 1 + C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\system_LPC43xx.c + + + + + CyaSSL Library + + + crl.c + 1 + ..\..\..\src\crl.c + + + internal.c + 1 + ..\..\..\src\internal.c + + + io.c + 1 + ..\..\..\src\io.c + + + keys.c + 1 + ..\..\..\src\keys.c + + + ocsp.c + 1 + ..\..\..\src\ocsp.c + + + sniffer.c + 1 + ..\..\..\src\sniffer.c + + + ssl.c + 1 + ..\..\..\src\ssl.c + + + tls.c + 1 + ..\..\..\src\tls.c + + + ssl-dummy.c + 1 + ..\MDK-ARM\CyaSSL\ssl-dummy.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + + + Crypt/Cipher Library + + + aes.c + 1 + ..\..\..\ctaocrypt\src\aes.c + + + arc4.c + 1 + ..\..\..\ctaocrypt\src\arc4.c + + + asm.c + 1 + ..\..\..\ctaocrypt\src\asm.c + + + asn.c + 1 + ..\..\..\ctaocrypt\src\asn.c + + + camellia.c + 1 + ..\..\..\ctaocrypt\src\camellia.c + + + coding.c + 1 + ..\..\..\ctaocrypt\src\coding.c + + + des3.c + 1 + ..\..\..\ctaocrypt\src\des3.c + + + dh.c + 1 + ..\..\..\ctaocrypt\src\dh.c + + + dsa.c + 1 + ..\..\..\ctaocrypt\src\dsa.c + + + ecc.c + 1 + ..\..\..\ctaocrypt\src\ecc.c + + + ecc_fp.c + 1 + ..\..\..\ctaocrypt\src\ecc_fp.c + + + error.c + 1 + ..\..\..\ctaocrypt\src\error.c + + + hc128.c + 1 + ..\..\..\ctaocrypt\src\hc128.c + + + hmac.c + 1 + ..\..\..\ctaocrypt\src\hmac.c + + + integer.c + 1 + ..\..\..\ctaocrypt\src\integer.c + + + logging.c + 1 + ..\..\..\ctaocrypt\src\logging.c + + + md2.c + 1 + ..\..\..\ctaocrypt\src\md2.c + + + md4.c + 1 + ..\..\..\ctaocrypt\src\md4.c + + + md5.c + 1 + ..\..\..\ctaocrypt\src\md5.c + + + memory.c + 1 + ..\..\..\ctaocrypt\src\memory.c + + + misc.c + 1 + ..\..\..\ctaocrypt\src\misc.c + + + pwdbased.c + 1 + ..\..\..\ctaocrypt\src\pwdbased.c + + + rabbit.c + 1 + ..\..\..\ctaocrypt\src\rabbit.c + + + random.c + 1 + ..\..\..\ctaocrypt\src\random.c + + + ripemd.c + 1 + ..\..\..\ctaocrypt\src\ripemd.c + + + rsa.c + 1 + ..\..\..\ctaocrypt\src\rsa.c + + + sha.c + 1 + ..\..\..\ctaocrypt\src\sha.c + + + sha256.c + 1 + ..\..\..\ctaocrypt\src\sha256.c + + + sha512.c + 1 + ..\..\..\ctaocrypt\src\sha512.c + + + tfm.c + 1 + ..\..\..\ctaocrypt\src\tfm.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + + + Configuration + + + File_Config.c + 1 + ..\MDK-ARM\config\File_Config.c + + + Net_Config.c + 1 + ..\MDK-ARM\config\Net_Config.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + config.h + 5 + ..\MDK-ARM\CyaSSL\config.h + + + RTX_Conf_CM.c + 1 + ..\MDK-ARM\config\RTX_Conf_CM.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + Net_Debug.c + 1 + ..\MDK-ARM\config\Net_Debug.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + config-FS.h + 5 + ..\MDK-ARM\CyaSSL\config-FS.h + + + config-RTX-TCP-FS.h + 5 + ..\MDK-ARM\CyaSSL\config-RTX-TCP-FS.h + + + config-BARE-METAL.h + 5 + ..\MDK-ARM\CyaSSL\config-BARE-METAL.h + + + startup_LPC43xx.s + 2 + ..\LPC43xx\startup_LPC43xx.s + + + + + CyaSSL-MDK + + + cyassl_MDK_ARM.c + 1 + ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c + + + Retarget.c + 1 + ..\MDK-ARM\CyaSSL\Retarget.c + + + time-LCP43xx.c + 1 + ..\LPC43xx\time-LCP43xx.c + + + + + + + MDK-BARE-METAL + 0x4 + ARM-ADS + + + LPC4357 + NXP (founded by Philips) + IRAM(0x10000000-0x10007FFF) IRAM2(0x20000000-0x2000FFFF) IROM(0x1A000000-0x1A07FFFF) IROM2(0x1B000000-0x1B07FFFF) CLOCK(12000000) CPUTYPE("Cortex-M4") FPU2 + + "STARTUP\NXP\LPC43xx\startup_LPC43xx.s" ("NXP LPC43xx Startup Code") + UL2CM3(-O975 -S0 -C0 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000) + 6414 + LPC43xx.H + + + + + + + + + + SFD\NXP\LPC43xx\LPC43xx.SFR + 0 + + + + NXP\LPC43xx\ + NXP\LPC43xx\ + + 0 + 0 + 0 + 0 + 1 + + .\Obj\ + SD_File + 1 + 0 + 0 + 1 + 1 + .\Lst\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + $K\ARM\BIN\ElfDwT.exe !L BASEADDRESS(0x1A000000) + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + + 0 + 9 + + + + + + + + + + + + + ..\MDK-ARM\config\Dbg_Flash.ini + BIN\ULP2CM3.DLL + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 0 + BIN\ULP2CM3.DLL + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 8 + 0 + 0 + 0 + 3 + 3 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x10000000 + 0x8000 + + + 1 + 0x1a000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x1a000000 + 0x80000 + + + 1 + 0x1b000000 + 0x80000 + + + 0 + 0x10080000 + 0xa000 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x10000000 + 0x8000 + + + 0 + 0x20000000 + 0x10000 + + + + + + 1 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + HAVE_CONFIG_H CYASSL_LPC43xx CORE_M4 __RTX USE_STDPERIPH_DRIVER MDK_CONF_BARE_METAL + + ..\MDK-ARM\CyaSSL;../../..;..\LPC43xx\Drivers\include;..\LPC43xx\LPC43xx\Include + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + + + + + + + + + + + + + + CyaSSL Apps + + + echoclient.c + 1 + ..\..\..\examples\echoclient\echoclient.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + echoserver.c + 1 + ..\..\..\examples\echoserver\echoserver.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + test.c + 1 + ..\..\..\ctaocrypt\test\test.c + + + benchmark.c + 1 + ..\..\..\ctaocrypt\benchmark\benchmark.c + + + client.c + 1 + ..\..\..\examples\client\client.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + server.c + 1 + ..\..\..\examples\server\server.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + shell.c + 1 + ..\MDK-ARM\CyaSSL\shell.c + + + main.c + 1 + ..\MDK-ARM\CyaSSL\main.c + + + cert_data.c + 1 + ..\MDK-ARM\CyaSSL\cert_data.c + + + + + LPC43xx + + + lpc43xx_rtc.c + 1 + ..\LPC43xx\Drivers\source\lpc43xx_rtc.c + + + lpc43xx_timer.c + 1 + ..\LPC43xx\Drivers\source\lpc43xx_timer.c + + + lpc43xx_cgu.c + 1 + ..\LPC43xx\Drivers\source\lpc43xx_cgu.c + + + lpc43xx_scu.c + 1 + ..\LPC43xx\Drivers\source\lpc43xx_scu.c + + + + + MDK-ARM + + + FS_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\FS_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + RTX_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\\RTX_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + TCPD_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\TCPD_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + TCP_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\TCP_CM3.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + + + Serial.c + 1 + C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\Serial.c + + + ETH_LPC43xx.c + 1 + C:\Keil\ARM\RL\TCPnet\Drivers\ETH_LPC43xx.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + SDIO_LPC43xx.c + 1 + C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\SDIO_LPC43xx.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + system_LPC43xx.c + 1 + C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\system_LPC43xx.c + + + + + CyaSSL Library + + + crl.c + 1 + ..\..\..\src\crl.c + + + internal.c + 1 + ..\..\..\src\internal.c + + + io.c + 1 + ..\..\..\src\io.c + + + keys.c + 1 + ..\..\..\src\keys.c + + + ocsp.c + 1 + ..\..\..\src\ocsp.c + + + sniffer.c + 1 + ..\..\..\src\sniffer.c + + + ssl.c + 1 + ..\..\..\src\ssl.c + + + tls.c + 1 + ..\..\..\src\tls.c + + + ssl-dummy.c + 1 + ..\MDK-ARM\CyaSSL\ssl-dummy.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + + + Crypt/Cipher Library + + + aes.c + 1 + ..\..\..\ctaocrypt\src\aes.c + + + arc4.c + 1 + ..\..\..\ctaocrypt\src\arc4.c + + + asm.c + 1 + ..\..\..\ctaocrypt\src\asm.c + + + asn.c + 1 + ..\..\..\ctaocrypt\src\asn.c + + + camellia.c + 1 + ..\..\..\ctaocrypt\src\camellia.c + + + coding.c + 1 + ..\..\..\ctaocrypt\src\coding.c + + + des3.c + 1 + ..\..\..\ctaocrypt\src\des3.c + + + dh.c + 1 + ..\..\..\ctaocrypt\src\dh.c + + + dsa.c + 1 + ..\..\..\ctaocrypt\src\dsa.c + + + ecc.c + 1 + ..\..\..\ctaocrypt\src\ecc.c + + + ecc_fp.c + 1 + ..\..\..\ctaocrypt\src\ecc_fp.c + + + error.c + 1 + ..\..\..\ctaocrypt\src\error.c + + + hc128.c + 1 + ..\..\..\ctaocrypt\src\hc128.c + + + hmac.c + 1 + ..\..\..\ctaocrypt\src\hmac.c + + + integer.c + 1 + ..\..\..\ctaocrypt\src\integer.c + + + logging.c + 1 + ..\..\..\ctaocrypt\src\logging.c + + + md2.c + 1 + ..\..\..\ctaocrypt\src\md2.c + + + md4.c + 1 + ..\..\..\ctaocrypt\src\md4.c + + + md5.c + 1 + ..\..\..\ctaocrypt\src\md5.c + + + memory.c + 1 + ..\..\..\ctaocrypt\src\memory.c + + + misc.c + 1 + ..\..\..\ctaocrypt\src\misc.c + + + pwdbased.c + 1 + ..\..\..\ctaocrypt\src\pwdbased.c + + + rabbit.c + 1 + ..\..\..\ctaocrypt\src\rabbit.c + + + random.c + 1 + ..\..\..\ctaocrypt\src\random.c + + + ripemd.c + 1 + ..\..\..\ctaocrypt\src\ripemd.c + + + rsa.c + 1 + ..\..\..\ctaocrypt\src\rsa.c + + + sha.c + 1 + ..\..\..\ctaocrypt\src\sha.c + + + sha256.c + 1 + ..\..\..\ctaocrypt\src\sha256.c + + + sha512.c + 1 + ..\..\..\ctaocrypt\src\sha512.c + + + tfm.c + 1 + ..\..\..\ctaocrypt\src\tfm.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + + + Configuration + + + File_Config.c + 1 + ..\MDK-ARM\config\File_Config.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + Net_Config.c + 1 + ..\MDK-ARM\config\Net_Config.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + config.h + 5 + ..\MDK-ARM\CyaSSL\config.h + + + RTX_Conf_CM.c + 1 + ..\MDK-ARM\config\RTX_Conf_CM.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + Net_Debug.c + 1 + ..\MDK-ARM\config\Net_Debug.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + + + + config-FS.h + 5 + ..\MDK-ARM\CyaSSL\config-FS.h + + + config-RTX-TCP-FS.h + 5 + ..\MDK-ARM\CyaSSL\config-RTX-TCP-FS.h + + + config-BARE-METAL.h + 5 + ..\MDK-ARM\CyaSSL\config-BARE-METAL.h + + + startup_LPC43xx.s + 2 + ..\LPC43xx\startup_LPC43xx.s + + + + + CyaSSL-MDK + + + cyassl_MDK_ARM.c + 1 + ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c + + + Retarget.c + 1 + ..\MDK-ARM\CyaSSL\Retarget.c + + + time-LCP43xx.c + 1 + ..\LPC43xx\time-LCP43xx.c + + + + + + + + diff --git a/ctaocrypt/src/random.c b/ctaocrypt/src/random.c index f76abf002..3518ab98c 100644 --- a/ctaocrypt/src/random.c +++ b/ctaocrypt/src/random.c @@ -23,8 +23,6 @@ #include #endif -#include - /* on HPUX 11 you may need to install /dev/random see http://h20293.www2.hp.com/portal/swdepot/displayProductInfo.do?productNumber=KRNG11I @@ -39,6 +37,7 @@ #ifdef NO_INLINE #include #else + #define MISC_DUMM_FUNC misc_dummy_random #include #endif #endif @@ -60,7 +59,6 @@ #endif #endif /* USE_WINDOWS_API */ -#if !defined( NO_CYASSL_RANDOM ) #ifdef NO_RC4 @@ -569,16 +567,20 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz) return 0; } - +#elif defined(CYASSL_LPC43xx) + #warning "write a real random seed!!!!, just for testing now" + int GenerateSeed(OS_Seed* os, byte* output, word32 sz) + { + int i; + for (i = 0; i < sz; i++ ) + output[i] = i; + return 0; + } + #elif defined(NO_DEV_RANDOM) #error "you need to write an os specific GenerateSeed() here" -/* -int GenerateSeed(OS_Seed* os, byte* output, word32 sz) -{ - return 0; -} -*/ +int GenerateSeed(OS_Seed* os, byte* output, word32 sz) { return(0) ; } #else /* !USE_WINDOWS_API && !THREADX && !MICRIUM && !NO_DEV_RANDOM */ @@ -622,4 +624,3 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz) #endif /* USE_WINDOWS_API */ -#endif /* NO_CYASSL_RANDOM */ From 7252b7ecd432ecda462283f4dc9e2274590e814c Mon Sep 17 00:00:00 2001 From: kojo Date: Tue, 21 May 2013 09:58:56 +0900 Subject: [PATCH 08/16] additional files for MDK-ARM/LPC43xx, STM32F2xx --- .gitignore | 5 +- IDE/MDK-ARM/MDK-ARM/config/Dbg_Flash.ini | 22 +++ IDE/MDK-ARM/STM32F2xx/time-STM32F2xx.c | 185 +++++++++++++++++++++++ 3 files changed, 211 insertions(+), 1 deletion(-) create mode 100644 IDE/MDK-ARM/MDK-ARM/config/Dbg_Flash.ini create mode 100644 IDE/MDK-ARM/STM32F2xx/time-STM32F2xx.c diff --git a/.gitignore b/.gitignore index cfd7970a5..c066b2ca9 100644 --- a/.gitignore +++ b/.gitignore @@ -81,4 +81,7 @@ cov-int cyassl.tgz *.log *.trs -IDE\MDK-ARM\Projects +IDE\MDK-ARM\Projects/ +IDE\MDK-ARM\STM32F2xx/ +IDE\MDK-ARM\LPC43xx\Drivers/ +IDE\MDK-ARM\LPC43xx\LPC43xx/ diff --git a/IDE/MDK-ARM/MDK-ARM/config/Dbg_Flash.ini b/IDE/MDK-ARM/MDK-ARM/config/Dbg_Flash.ini new file mode 100644 index 000000000..5f72e1102 --- /dev/null +++ b/IDE/MDK-ARM/MDK-ARM/config/Dbg_Flash.ini @@ -0,0 +1,22 @@ +/******************************************************************************/ +/* Dbg_Flash.ini Initialization File for Debugging from Internal */ +/* Flash for NXP LPC18xx/LPC43xx */ +/******************************************************************************/ +/* This file is part of the uVision/ARM development tools. */ +/* Copyright (c) 2005-2012 Keil Software. All rights reserved. */ +/* This software may only be used under the terms of a valid, current, */ +/* end user licence from KEIL for a compatible version of KEIL software */ +/* development tools. Nothing else gives you the right to use this software. */ +/******************************************************************************/ + +FUNC void Per_Reset (void) { + // Reset peripherals: LCD, USB0, USB1, DMA, SDIO, ETHERNET + _WDWORD(0x40053100, 0x005F0000); // Issue reset + _sleep_(1); +} + +Per_Reset(); // Reset some peripherals + +KILL BUTTON * // Kill all buttons +DEFINE BUTTON "Reset Peripherals", "Per_Reset()" // Create peripheral reset button + diff --git a/IDE/MDK-ARM/STM32F2xx/time-STM32F2xx.c b/IDE/MDK-ARM/STM32F2xx/time-STM32F2xx.c new file mode 100644 index 000000000..66940453a --- /dev/null +++ b/IDE/MDK-ARM/STM32F2xx/time-STM32F2xx.c @@ -0,0 +1,185 @@ +/* main.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +#include "time.h" +#include "stm32f2xx_tim.h" +#include "stm32f2xx_rcc.h" + + +/*----------------------------------------------------------------------------- + * initialize RTC + *----------------------------------------------------------------------------*/ +#include "stm32f2xx_rtc.h" +#include "stm32f2xx_rcc.h" +#include "stm32f2xx_pwr.h" + +static init_RTC() +{ + RTC_InitTypeDef RTC_InitStruct ; + + RTC_TimeTypeDef RTC_Time ; + RTC_DateTypeDef RTC_Date ; + + + /* Enable the PWR clock */ + RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); + + /* Allow access to RTC */ + PWR_BackupAccessCmd(ENABLE); + +/***Configures the External Low Speed oscillator (LSE)****/ + + RCC_LSEConfig(RCC_LSE_ON); + + /* Wait till LSE is ready */ + while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) + { + } + + /* Select the RTC Clock Source */ + RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); + + /* Enable the RTC Clock */ + RCC_RTCCLKCmd(ENABLE); + + /* Wait for RTC APB registers synchronisation */ + RTC_WaitForSynchro(); + + /* Calendar Configuration with LSI supposed at 32KHz */ + RTC_InitStruct.RTC_AsynchPrediv = 0x7F; + RTC_InitStruct.RTC_SynchPrediv = 0xFF; + RTC_InitStruct.RTC_HourFormat = RTC_HourFormat_24; + RTC_Init(&RTC_InitStruct); + + RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; + RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; +} + +/*----------------------------------------------------------------------------- + * initialize TIM + *----------------------------------------------------------------------------*/ +static void init_TIM() +{ + TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure ; + + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE) ; + + TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); + TIM_TimeBaseStructure.TIM_Prescaler = 60; + TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; + TIM_TimeBaseStructure.TIM_Period = 0xffffffff; + TIM_TimeBaseStructure.TIM_ClockDivision = 0; + TIM_TimeBaseStructure.TIM_RepetitionCounter = 0; + + TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); + + TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure) ; + TIM_Cmd(TIM2, ENABLE) ; +} + +void init_time(void) { + init_RTC() ; + init_TIM() ; +} + +struct tm *Cyassl_MDK_gmtime(const time_t *c) +{ + + RTC_TimeTypeDef RTC_Time ; + RTC_DateTypeDef RTC_Date ; + static struct tm date ; + + RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; + RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; + + date.tm_year = RTC_Date.RTC_Year + 100 ; + date.tm_mon = RTC_Date.RTC_Month - 1 ; + date.tm_mday = RTC_Date.RTC_Date ; + date.tm_hour = RTC_Time.RTC_Hours ; + date.tm_min = RTC_Time.RTC_Minutes ; + date.tm_sec = RTC_Time.RTC_Seconds ; + + #if defined(DEBUG_CYASSL) + { + char msg[100] ; + sprintf(msg, "Debug::Cyassl_KEIL_gmtime(DATE=/%4d/%02d/%02d TIME=%02d:%02d:%02d)\n", + RTC_Date.RTC_Year+2000, RTC_Date.RTC_Month, RTC_Date.RTC_Date, + RTC_Time.RTC_Hours, RTC_Time.RTC_Minutes, RTC_Time.RTC_Seconds) ; + CYASSL_MSG(msg) ; + } + #endif + + return(&date) ; +} + +double current_time() +{ + return ((double)TIM2->CNT/1000000.0) ; +} + +typedef struct func_args { + int argc; + char** argv; + int return_code; +} func_args; + + +#include + +void time_main(void *args) +{ + char * datetime ; + RTC_TimeTypeDef RTC_Time ; + RTC_DateTypeDef RTC_Date ; + int year ; + if( args == NULL || ((func_args *)args)->argc == 1) { + RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; + RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; + printf("Date: %d/%d/%d, Time: %02d:%02d:%02d\n", + RTC_Date.RTC_Month, RTC_Date.RTC_Date, RTC_Date.RTC_Year+2000, + RTC_Time.RTC_Hours, RTC_Time.RTC_Minutes, RTC_Time.RTC_Seconds) ; + } else if(((func_args *)args)->argc == 3 && + ((func_args *)args)->argv[1][0] == '-' && + ((func_args *)args)->argv[1][1] == 'd' ) { + datetime = ((func_args *)args)->argv[2]; + sscanf(datetime, "%d/%d/%d", + (int *)&RTC_Date.RTC_Month, (int *)&RTC_Date.RTC_Date, &year) ; + RTC_Date.RTC_Year = year - 2000 ; + RTC_Date.RTC_WeekDay = 0 ; + RTC_SetDate(RTC_Format_BIN, &RTC_Date) ; + } else if(((func_args *)args)->argc == 3 && + ((func_args *)args)->argv[1][0] == '-' && + ((func_args *)args)->argv[1][1] == 't' ) { + datetime = ((func_args *)args)->argv[2]; + sscanf(datetime, "%d:%d:%d", + (int *)&RTC_Time.RTC_Hours, + (int *)&RTC_Time.RTC_Minutes, + (int *)&RTC_Time.RTC_Seconds + ) ; + RTC_SetTime(RTC_Format_BIN, &RTC_Time) ; + } else printf("Invalid argument\n") ; +} + + From 082f5643edb99c887ef75d89733ef0c190992d6f Mon Sep 17 00:00:00 2001 From: kojo Date: Tue, 21 May 2013 17:13:12 +0900 Subject: [PATCH 09/16] OK for LCP43xx project --- .gitignore | 3 +- IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt | 62 +++--- IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj | 20 +- .../STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c | 185 ++++++++++++++++++ ctaocrypt/src/random.c | 20 +- 5 files changed, 238 insertions(+), 52 deletions(-) create mode 100644 IDE/MDK-ARM/STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c diff --git a/.gitignore b/.gitignore index c066b2ca9..c93a89b30 100644 --- a/.gitignore +++ b/.gitignore @@ -82,6 +82,7 @@ cyassl.tgz *.log *.trs IDE\MDK-ARM\Projects/ -IDE\MDK-ARM\STM32F2xx/ +IDE\MDK-ARM\STM32F2xx_StdPeriph_Lib/inc +IDE\MDK-ARM\STM32F2xx_StdPeriph_Lib/src IDE\MDK-ARM\LPC43xx\Drivers/ IDE\MDK-ARM\LPC43xx\LPC43xx/ diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt index 14992a665..2b66588fc 100644 --- a/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt +++ b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt @@ -138,7 +138,7 @@ 0 ULP2CM3 - -UP1135060 -O974 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP18 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000 + -UP1135060 -O974 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO23 -TC10000000 -TP18 -TDX0 -TDD0 -TDS7 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000 @@ -301,7 +301,7 @@ 0 ULP2CM3 - -UP1135060 -O974 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP18 -TDX0 -TDD0 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000 + -UP1135060 -O974 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO23 -TC10000000 -TP18 -TDX0 -TDD0 -TDS7 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000 @@ -320,7 +320,7 @@ 0 1 0 - 0 + 1 0 0 1 @@ -464,7 +464,7 @@ 0 ULP2CM3 - -UP1135060 -O1007 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO22 -TC10000000 -TP18 -TDX0 -TDD0 -TDS0 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000 + -UP1135060 -O975 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO23 -TC10000000 -TP18 -TDX0 -TDD0 -TDS7 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000 @@ -619,8 +619,8 @@ 0 0 0 - 0 - 0 + 1 + 1 0 ..\MDK-ARM\CyaSSL\shell.c shell.c @@ -633,10 +633,10 @@ 1 0 0 - 27 + 0 0 - 143 - 160 + 139 + 156 0 ..\MDK-ARM\CyaSSL\main.c main.c @@ -675,8 +675,8 @@ 0 0 0 - 0 - 0 + 247 + 248 0 ..\LPC43xx\Drivers\source\lpc43xx_rtc.c lpc43xx_rtc.c @@ -811,8 +811,8 @@ 0 0 0 - 64 - 84 + 47 + 58 0 C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\Serial.c Serial.c @@ -843,8 +843,8 @@ 0 0 0 - 257 - 272 + 258 + 260 0 C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\SDIO_LPC43xx.c SDIO_LPC43xx.c @@ -1023,7 +1023,7 @@ Crypt/Cipher Library - 0 + 1 0 0 0 @@ -1403,8 +1403,8 @@ 0 0 0 - 0 - 0 + 1 + 1 0 ..\..\..\ctaocrypt\src\random.c random.c @@ -1523,8 +1523,8 @@ 0 1 0 - 1 - 11 + 0 + 0 0 ..\MDK-ARM\config\File_Config.c File_Config.c @@ -1571,8 +1571,8 @@ 0 0 0 - 1 - 1 + 0 + 0 0 ..\MDK-ARM\config\RTX_Conf_CM.c RTX_Conf_CM.c @@ -1603,8 +1603,8 @@ 0 0 0 - 0 - 0 + 1 + 1 0 ..\MDK-ARM\CyaSSL\config-FS.h config-FS.h @@ -1619,8 +1619,8 @@ 0 0 0 - 0 - 0 + 1 + 1 0 ..\MDK-ARM\CyaSSL\config-RTX-TCP-FS.h config-RTX-TCP-FS.h @@ -1635,8 +1635,8 @@ 0 0 0 - 0 - 0 + 1 + 1 0 ..\MDK-ARM\CyaSSL\config-BARE-METAL.h config-BARE-METAL.h @@ -1651,7 +1651,7 @@ 0 0 0 - 143 + 145 151 0 ..\LPC43xx\startup_LPC43xx.s @@ -1675,7 +1675,7 @@ 0 0 0 - 170 + 163 182 0 ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c @@ -1691,7 +1691,7 @@ 0 0 0 - 56 + 50 59 0 ..\MDK-ARM\CyaSSL\Retarget.c diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj index e25ffe7de..498f50a4c 100644 --- a/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj +++ b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj @@ -43,8 +43,8 @@ 0 1 - .\Obj\ - SD_File + .\MDK-RTX-TCP-FS\ + LCP43xx-MDK-RTX-TCP-FS 1 0 0 @@ -75,7 +75,7 @@ 1 0 - $K\ARM\BIN\ElfDwT.exe !L BASEADDRESS(0x1A000000) + $K\ARM\BIN\ElfDwT.exe !L BASEADDRESS(0x1A00000) 0 0 @@ -349,7 +349,7 @@ 0 - HAVE_CONFIG_H CYASSL_LPC43xx CORE_M4 __RTX USE_STDPERIPH_DRIVER MDK_CONF_RTX_TCP_FS + HAVE_CONFIG_H CYASSL_LPC43xx __DBG_ITM CORE_M4 __RTX USE_STDPERIPH_DRIVER MDK_CONF_RTX_TCP_FS ..\MDK-ARM\CyaSSL;../../..;..\LPC43xx\Drivers\include;..\LPC43xx\LPC43xx\Include @@ -921,8 +921,8 @@ 0 1 - .\Obj\ - SD_File + .\MDK-FS\ + LCP43xx-MDK-FS 1 0 0 @@ -1227,7 +1227,7 @@ 0 - HAVE_CONFIG_H CYASSL_LPC43xx CORE_M4 __RTX USE_STDPERIPH_DRIVER MDK_CONF_FS + HAVE_CONFIG_H CYASSL_LPC43xx __DBG_ITM CORE_M4 __RTX USE_STDPERIPH_DRIVER MDK_CONF_FS ..\MDK-ARM\CyaSSL;../../..;..\LPC43xx\Drivers\include;..\LPC43xx\LPC43xx\Include @@ -2155,8 +2155,8 @@ 0 1 - .\Obj\ - SD_File + .\MDK-BARE-METAL\ + LCP43xx-MDK-BARE-METAL 1 0 0 @@ -2461,7 +2461,7 @@ 0 - HAVE_CONFIG_H CYASSL_LPC43xx CORE_M4 __RTX USE_STDPERIPH_DRIVER MDK_CONF_BARE_METAL + HAVE_CONFIG_H CYASSL_LPC43xx __DBG_ITM CORE_M4 __RTX USE_STDPERIPH_DRIVER MDK_CONF_BARE_METAL ..\MDK-ARM\CyaSSL;../../..;..\LPC43xx\Drivers\include;..\LPC43xx\LPC43xx\Include diff --git a/IDE/MDK-ARM/STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c b/IDE/MDK-ARM/STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c new file mode 100644 index 000000000..66940453a --- /dev/null +++ b/IDE/MDK-ARM/STM32F2xx_StdPeriph_Lib/time-STM32F2xx.c @@ -0,0 +1,185 @@ +/* main.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + +#include "time.h" +#include "stm32f2xx_tim.h" +#include "stm32f2xx_rcc.h" + + +/*----------------------------------------------------------------------------- + * initialize RTC + *----------------------------------------------------------------------------*/ +#include "stm32f2xx_rtc.h" +#include "stm32f2xx_rcc.h" +#include "stm32f2xx_pwr.h" + +static init_RTC() +{ + RTC_InitTypeDef RTC_InitStruct ; + + RTC_TimeTypeDef RTC_Time ; + RTC_DateTypeDef RTC_Date ; + + + /* Enable the PWR clock */ + RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); + + /* Allow access to RTC */ + PWR_BackupAccessCmd(ENABLE); + +/***Configures the External Low Speed oscillator (LSE)****/ + + RCC_LSEConfig(RCC_LSE_ON); + + /* Wait till LSE is ready */ + while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) + { + } + + /* Select the RTC Clock Source */ + RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); + + /* Enable the RTC Clock */ + RCC_RTCCLKCmd(ENABLE); + + /* Wait for RTC APB registers synchronisation */ + RTC_WaitForSynchro(); + + /* Calendar Configuration with LSI supposed at 32KHz */ + RTC_InitStruct.RTC_AsynchPrediv = 0x7F; + RTC_InitStruct.RTC_SynchPrediv = 0xFF; + RTC_InitStruct.RTC_HourFormat = RTC_HourFormat_24; + RTC_Init(&RTC_InitStruct); + + RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; + RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; +} + +/*----------------------------------------------------------------------------- + * initialize TIM + *----------------------------------------------------------------------------*/ +static void init_TIM() +{ + TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure ; + + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE) ; + + TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); + TIM_TimeBaseStructure.TIM_Prescaler = 60; + TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; + TIM_TimeBaseStructure.TIM_Period = 0xffffffff; + TIM_TimeBaseStructure.TIM_ClockDivision = 0; + TIM_TimeBaseStructure.TIM_RepetitionCounter = 0; + + TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); + + TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure) ; + TIM_Cmd(TIM2, ENABLE) ; +} + +void init_time(void) { + init_RTC() ; + init_TIM() ; +} + +struct tm *Cyassl_MDK_gmtime(const time_t *c) +{ + + RTC_TimeTypeDef RTC_Time ; + RTC_DateTypeDef RTC_Date ; + static struct tm date ; + + RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; + RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; + + date.tm_year = RTC_Date.RTC_Year + 100 ; + date.tm_mon = RTC_Date.RTC_Month - 1 ; + date.tm_mday = RTC_Date.RTC_Date ; + date.tm_hour = RTC_Time.RTC_Hours ; + date.tm_min = RTC_Time.RTC_Minutes ; + date.tm_sec = RTC_Time.RTC_Seconds ; + + #if defined(DEBUG_CYASSL) + { + char msg[100] ; + sprintf(msg, "Debug::Cyassl_KEIL_gmtime(DATE=/%4d/%02d/%02d TIME=%02d:%02d:%02d)\n", + RTC_Date.RTC_Year+2000, RTC_Date.RTC_Month, RTC_Date.RTC_Date, + RTC_Time.RTC_Hours, RTC_Time.RTC_Minutes, RTC_Time.RTC_Seconds) ; + CYASSL_MSG(msg) ; + } + #endif + + return(&date) ; +} + +double current_time() +{ + return ((double)TIM2->CNT/1000000.0) ; +} + +typedef struct func_args { + int argc; + char** argv; + int return_code; +} func_args; + + +#include + +void time_main(void *args) +{ + char * datetime ; + RTC_TimeTypeDef RTC_Time ; + RTC_DateTypeDef RTC_Date ; + int year ; + if( args == NULL || ((func_args *)args)->argc == 1) { + RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; + RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; + printf("Date: %d/%d/%d, Time: %02d:%02d:%02d\n", + RTC_Date.RTC_Month, RTC_Date.RTC_Date, RTC_Date.RTC_Year+2000, + RTC_Time.RTC_Hours, RTC_Time.RTC_Minutes, RTC_Time.RTC_Seconds) ; + } else if(((func_args *)args)->argc == 3 && + ((func_args *)args)->argv[1][0] == '-' && + ((func_args *)args)->argv[1][1] == 'd' ) { + datetime = ((func_args *)args)->argv[2]; + sscanf(datetime, "%d/%d/%d", + (int *)&RTC_Date.RTC_Month, (int *)&RTC_Date.RTC_Date, &year) ; + RTC_Date.RTC_Year = year - 2000 ; + RTC_Date.RTC_WeekDay = 0 ; + RTC_SetDate(RTC_Format_BIN, &RTC_Date) ; + } else if(((func_args *)args)->argc == 3 && + ((func_args *)args)->argv[1][0] == '-' && + ((func_args *)args)->argv[1][1] == 't' ) { + datetime = ((func_args *)args)->argv[2]; + sscanf(datetime, "%d:%d:%d", + (int *)&RTC_Time.RTC_Hours, + (int *)&RTC_Time.RTC_Minutes, + (int *)&RTC_Time.RTC_Seconds + ) ; + RTC_SetTime(RTC_Format_BIN, &RTC_Time) ; + } else printf("Invalid argument\n") ; +} + + diff --git a/ctaocrypt/src/random.c b/ctaocrypt/src/random.c index 3518ab98c..05daae965 100644 --- a/ctaocrypt/src/random.c +++ b/ctaocrypt/src/random.c @@ -567,16 +567,16 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz) return 0; } -#elif defined(CYASSL_LPC43xx) - #warning "write a real random seed!!!!, just for testing now" - int GenerateSeed(OS_Seed* os, byte* output, word32 sz) - { - int i; - for (i = 0; i < sz; i++ ) - output[i] = i; - return 0; - } - +#elif defined(CYASSL_LPC43xx) + #warning "write a real random seed!!!!, just for testing now" + int GenerateSeed(OS_Seed* os, byte* output, word32 sz) + { + int i; + for (i = 0; i < sz; i++ ) + output[i] = i; + return 0; + } + #elif defined(NO_DEV_RANDOM) #error "you need to write an os specific GenerateSeed() here" From ff68942ce4cf0ab7b4c3059ef588525b485de9cd Mon Sep 17 00:00:00 2001 From: kojo Date: Tue, 21 May 2013 18:47:54 +0900 Subject: [PATCH 10/16] MDK-ARM ready for LCP/STM --- .../MDK-ARM/CyaSSL/config-BARE-METAL.h | 2 +- IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt | 12 ++--- IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt | 54 ++++++++++++------- IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj | 27 +++++++--- ctaocrypt/src/random.c | 2 +- 5 files changed, 64 insertions(+), 33 deletions(-) diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h index a88e1bca4..680bdaf38 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h @@ -78,7 +78,7 @@ // STM32 Hardware Crypt // STM32F2 Hardware RNG -#define MDK_CONF_STM32F2_RNG 0 +#define MDK_CONF_STM32F2_RNG 1 #if MDK_CONF_STM32F2_RNG == 1 #define STM32F2_RNG #else diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt index 2b66588fc..2a0fae1eb 100644 --- a/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt +++ b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt @@ -635,7 +635,7 @@ 0 0 0 - 139 + 140 156 0 ..\MDK-ARM\CyaSSL\main.c @@ -811,7 +811,7 @@ 0 0 0 - 47 + 48 58 0 C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\Serial.c @@ -843,7 +843,7 @@ 0 0 0 - 258 + 259 260 0 C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\SDIO_LPC43xx.c @@ -1651,7 +1651,7 @@ 0 0 0 - 145 + 146 151 0 ..\LPC43xx\startup_LPC43xx.s @@ -1675,7 +1675,7 @@ 0 0 0 - 163 + 165 182 0 ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c @@ -1691,7 +1691,7 @@ 0 0 0 - 50 + 51 59 0 ..\MDK-ARM\CyaSSL\Retarget.c diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt index 49b94308c..89ee2a1d5 100644 --- a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt +++ b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt @@ -490,7 +490,7 @@ CyaSSL Apps - 1 + 0 0 0 0 @@ -614,8 +614,8 @@ 0 0 0 - 209 - 220 + 135 + 149 0 ..\MDK-ARM\CyaSSL\main.c main.c @@ -762,7 +762,7 @@ MDK-ARM - 1 + 0 0 0 0 @@ -774,8 +774,8 @@ 0 0 0 - 42 - 66 + 39 + 73 0 c:\Keil\ARM\Boards\Keil\MCBSTM32F200\RL\FlashFS\SD_File\Serial.c Serial.c @@ -898,7 +898,7 @@ CyaSSL Library - 1 + 0 0 0 0 @@ -1050,7 +1050,7 @@ Crypt/Cipher Library - 1 + 0 0 0 0 @@ -1428,10 +1428,10 @@ 1 0 0 - 0 + 30 0 - 0 - 0 + 560 + 570 0 ..\..\..\ctaocrypt\src\random.c random.c @@ -1446,8 +1446,8 @@ 0 0 0 - 0 - 0 + 1 + 1 0 ..\..\..\ctaocrypt\src\ripemd.c ripemd.c @@ -1538,7 +1538,7 @@ Configuration - 1 + 0 0 0 0 @@ -1678,7 +1678,7 @@ 0 0 0 - 165 + 163 169 0 ..\MDK-ARM\config\startup_stm32f2xx.s @@ -1698,7 +1698,7 @@ 7 73 1 - 1 + 0 0 0 0 @@ -1714,18 +1714,34 @@ 7 74 1 - 1 + 0 0 0 0 - 52 - 56 + 51 + 57 0 ..\MDK-ARM\CyaSSL\Retarget.c Retarget.c 0 0 + + 7 + 75 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c + time-STM32F2xx.c + 0 + 0 + diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj index 20def53d7..222ef456f 100644 --- a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj +++ b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj @@ -44,7 +44,7 @@ 1 .\MDK-RTX-TCP-FS\ - MDK-RTX-TCP-FS + STM32F2xx-MDK-RTX-TCP-FS 1 0 0 @@ -349,7 +349,7 @@ 0 - HAVE_CONFIG_H __DBG_ITM __RTX USE_STDPERIPH_DRIVER MDK_CONF_RTX_TCP_FS + HAVE_CONFIG_H CYASSL_STM32F2xx __DBG_ITM __RTX USE_STDPERIPH_DRIVER MDK_CONF_RTX_TCP_FS ..\MDK-ARM\CyaSSL;C:..\STM32F2xx_StdPeriph_Lib\inc;..\..\..\ @@ -930,6 +930,11 @@ 1 ..\MDK-ARM\CyaSSL\Retarget.c + + time-STM32F2xx.c + 1 + ..\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c + @@ -972,7 +977,7 @@ 1 .\MDK-FS\ - MDK-FS + STM32F2xx-MDK-FS 1 0 0 @@ -1277,7 +1282,7 @@ 0 - HAVE_CONFIG_H __DBG_ITM USE_STDPERIPH_DRIVER MDK_CONF_FS + HAVE_CONFIG_H CYASSL_STM32F2xx __DBG_ITM USE_STDPERIPH_DRIVER MDK_CONF_FS ..\MDK-ARM\CyaSSL;..\MDK-ARM\inc;..\STM32F2xx_StdPeriph_Lib\inc;..\POSIX\..\..\..\ @@ -2134,6 +2139,11 @@ 1 ..\MDK-ARM\CyaSSL\Retarget.c + + time-STM32F2xx.c + 1 + ..\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c + @@ -2176,7 +2186,7 @@ 1 .\MDK-BARE-METAL\ - MDK-BARE-METAL + STM32F2xx-MDK-BARE-METAL 1 0 0 @@ -2481,7 +2491,7 @@ 0 - HAVE_CONFIG_H __DBG_ITM USE_STDPERIPH_DRIVER MDK_CONF_BARE_METAL + HAVE_CONFIG_H CYASSL_STM32F2xx __DBG_ITM USE_STDPERIPH_DRIVER MDK_CONF_BARE_METAL ..\MDK-ARM\CyaSSL;..\MDK-ARM\inc;..\STM32F2xx_StdPeriph_Lib\inc;..\POSIX;..\..\..\ @@ -3556,6 +3566,11 @@ 1 ..\MDK-ARM\CyaSSL\Retarget.c + + time-STM32F2xx.c + 1 + ..\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c + diff --git a/ctaocrypt/src/random.c b/ctaocrypt/src/random.c index 05daae965..8b3633ad4 100644 --- a/ctaocrypt/src/random.c +++ b/ctaocrypt/src/random.c @@ -567,7 +567,7 @@ int GenerateSeed(OS_Seed* os, byte* output, word32 sz) return 0; } -#elif defined(CYASSL_LPC43xx) +#elif defined(CYASSL_LPC43xx) || defined(CYASSL_STM32F2xx) #warning "write a real random seed!!!!, just for testing now" int GenerateSeed(OS_Seed* os, byte* output, word32 sz) { From 4b3c3c92b3298d069e8653aa01889f6b8ee3c4d8 Mon Sep 17 00:00:00 2001 From: kojo Date: Tue, 21 May 2013 19:02:34 +0900 Subject: [PATCH 11/16] MDK-ARM for LCP/STM --- IDE/MDK-ARM/STM32F2xx/time-STM32F2xx.c | 185 ------------------------- 1 file changed, 185 deletions(-) delete mode 100644 IDE/MDK-ARM/STM32F2xx/time-STM32F2xx.c diff --git a/IDE/MDK-ARM/STM32F2xx/time-STM32F2xx.c b/IDE/MDK-ARM/STM32F2xx/time-STM32F2xx.c deleted file mode 100644 index 66940453a..000000000 --- a/IDE/MDK-ARM/STM32F2xx/time-STM32F2xx.c +++ /dev/null @@ -1,185 +0,0 @@ -/* main.c - * - * Copyright (C) 2006-2013 wolfSSL Inc. - * - * This file is part of CyaSSL. - * - * CyaSSL is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * CyaSSL is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA - */ - -#ifdef HAVE_CONFIG_H - #include -#endif - -#include "time.h" -#include "stm32f2xx_tim.h" -#include "stm32f2xx_rcc.h" - - -/*----------------------------------------------------------------------------- - * initialize RTC - *----------------------------------------------------------------------------*/ -#include "stm32f2xx_rtc.h" -#include "stm32f2xx_rcc.h" -#include "stm32f2xx_pwr.h" - -static init_RTC() -{ - RTC_InitTypeDef RTC_InitStruct ; - - RTC_TimeTypeDef RTC_Time ; - RTC_DateTypeDef RTC_Date ; - - - /* Enable the PWR clock */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); - - /* Allow access to RTC */ - PWR_BackupAccessCmd(ENABLE); - -/***Configures the External Low Speed oscillator (LSE)****/ - - RCC_LSEConfig(RCC_LSE_ON); - - /* Wait till LSE is ready */ - while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) - { - } - - /* Select the RTC Clock Source */ - RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); - - /* Enable the RTC Clock */ - RCC_RTCCLKCmd(ENABLE); - - /* Wait for RTC APB registers synchronisation */ - RTC_WaitForSynchro(); - - /* Calendar Configuration with LSI supposed at 32KHz */ - RTC_InitStruct.RTC_AsynchPrediv = 0x7F; - RTC_InitStruct.RTC_SynchPrediv = 0xFF; - RTC_InitStruct.RTC_HourFormat = RTC_HourFormat_24; - RTC_Init(&RTC_InitStruct); - - RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; - RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; -} - -/*----------------------------------------------------------------------------- - * initialize TIM - *----------------------------------------------------------------------------*/ -static void init_TIM() -{ - TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure ; - - RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE) ; - - TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); - TIM_TimeBaseStructure.TIM_Prescaler = 60; - TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; - TIM_TimeBaseStructure.TIM_Period = 0xffffffff; - TIM_TimeBaseStructure.TIM_ClockDivision = 0; - TIM_TimeBaseStructure.TIM_RepetitionCounter = 0; - - TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); - - TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure) ; - TIM_Cmd(TIM2, ENABLE) ; -} - -void init_time(void) { - init_RTC() ; - init_TIM() ; -} - -struct tm *Cyassl_MDK_gmtime(const time_t *c) -{ - - RTC_TimeTypeDef RTC_Time ; - RTC_DateTypeDef RTC_Date ; - static struct tm date ; - - RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; - RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; - - date.tm_year = RTC_Date.RTC_Year + 100 ; - date.tm_mon = RTC_Date.RTC_Month - 1 ; - date.tm_mday = RTC_Date.RTC_Date ; - date.tm_hour = RTC_Time.RTC_Hours ; - date.tm_min = RTC_Time.RTC_Minutes ; - date.tm_sec = RTC_Time.RTC_Seconds ; - - #if defined(DEBUG_CYASSL) - { - char msg[100] ; - sprintf(msg, "Debug::Cyassl_KEIL_gmtime(DATE=/%4d/%02d/%02d TIME=%02d:%02d:%02d)\n", - RTC_Date.RTC_Year+2000, RTC_Date.RTC_Month, RTC_Date.RTC_Date, - RTC_Time.RTC_Hours, RTC_Time.RTC_Minutes, RTC_Time.RTC_Seconds) ; - CYASSL_MSG(msg) ; - } - #endif - - return(&date) ; -} - -double current_time() -{ - return ((double)TIM2->CNT/1000000.0) ; -} - -typedef struct func_args { - int argc; - char** argv; - int return_code; -} func_args; - - -#include - -void time_main(void *args) -{ - char * datetime ; - RTC_TimeTypeDef RTC_Time ; - RTC_DateTypeDef RTC_Date ; - int year ; - if( args == NULL || ((func_args *)args)->argc == 1) { - RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; - RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; - printf("Date: %d/%d/%d, Time: %02d:%02d:%02d\n", - RTC_Date.RTC_Month, RTC_Date.RTC_Date, RTC_Date.RTC_Year+2000, - RTC_Time.RTC_Hours, RTC_Time.RTC_Minutes, RTC_Time.RTC_Seconds) ; - } else if(((func_args *)args)->argc == 3 && - ((func_args *)args)->argv[1][0] == '-' && - ((func_args *)args)->argv[1][1] == 'd' ) { - datetime = ((func_args *)args)->argv[2]; - sscanf(datetime, "%d/%d/%d", - (int *)&RTC_Date.RTC_Month, (int *)&RTC_Date.RTC_Date, &year) ; - RTC_Date.RTC_Year = year - 2000 ; - RTC_Date.RTC_WeekDay = 0 ; - RTC_SetDate(RTC_Format_BIN, &RTC_Date) ; - } else if(((func_args *)args)->argc == 3 && - ((func_args *)args)->argv[1][0] == '-' && - ((func_args *)args)->argv[1][1] == 't' ) { - datetime = ((func_args *)args)->argv[2]; - sscanf(datetime, "%d:%d:%d", - (int *)&RTC_Time.RTC_Hours, - (int *)&RTC_Time.RTC_Minutes, - (int *)&RTC_Time.RTC_Seconds - ) ; - RTC_SetTime(RTC_Format_BIN, &RTC_Time) ; - } else printf("Invalid argument\n") ; -} - - From a243281ca96c4432571682729eb5147c518f3a3c Mon Sep 17 00:00:00 2001 From: kojo Date: Tue, 21 May 2013 19:14:14 +0900 Subject: [PATCH 12/16] MDK-ARM for LPC/STM --- IDE/MDK-ARM/LPC43xx/startup_LPC43xx.s | 338 +++++++++++++++++++++ IDE/MDK-ARM/LPC43xx/time-LCP43xx.c | 170 +++++++++++ IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt | 10 +- 3 files changed, 513 insertions(+), 5 deletions(-) create mode 100644 IDE/MDK-ARM/LPC43xx/startup_LPC43xx.s create mode 100644 IDE/MDK-ARM/LPC43xx/time-LCP43xx.c diff --git a/IDE/MDK-ARM/LPC43xx/startup_LPC43xx.s b/IDE/MDK-ARM/LPC43xx/startup_LPC43xx.s new file mode 100644 index 000000000..6fdb7ab70 --- /dev/null +++ b/IDE/MDK-ARM/LPC43xx/startup_LPC43xx.s @@ -0,0 +1,338 @@ +;/*********************************************************************** +; * $Id: startup_LPC43xx.s 6473 2011-02-16 17:40:54Z nxp27266 $ +; * +; * Project: LPC43xx CMSIS Package +; * +; * Description: Cortex-M3 Core Device Startup File for the NXP LPC43xx +; * Device Series. +; * +; * Copyright(C) 2011, NXP Semiconductor +; * All rights reserved. +; * +; * modified by KEIL +; *********************************************************************** +; * Software that is described herein is for illustrative purposes only +; * which provides customers with programming information regarding the +; * products. This software is supplied "AS IS" without any warranties. +; * NXP Semiconductors assumes no responsibility or liability for the +; * use of the software, conveys no license or title under any patent, +; * copyright, or mask work right to the product. NXP Semiconductors +; * reserves the right to make changes in the software without +; * notification. NXP Semiconductors also make no representation or +; * warranty that such application will be suitable for the specified +; * use without further testing or modification. +; **********************************************************************/ + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00003000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x0000a000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + +Sign_Value EQU 0x5A5A5A5A + +__Vectors DCD __initial_sp ; 0 Top of Stack + DCD Reset_Handler ; 1 Reset Handler + DCD NMI_Handler ; 2 NMI Handler + DCD HardFault_Handler ; 3 Hard Fault Handler + DCD MemManage_Handler ; 4 MPU Fault Handler + DCD BusFault_Handler ; 5 Bus Fault Handler + DCD UsageFault_Handler ; 6 Usage Fault Handler + DCD Sign_Value ; 7 Reserved + DCD 0 ; 8 Reserved + DCD 0 ; 9 Reserved + DCD 0 ; 10 Reserved + DCD SVC_Handler ; 11 SVCall Handler + DCD DebugMon_Handler ; 12 Debug Monitor Handler + DCD 0 ; 13 Reserved + DCD PendSV_Handler ; 14 PendSV Handler + DCD SysTick_Handler ; 15 SysTick Handler + + ; External Interrupts + DCD DAC_IRQHandler ; 16 D/A Converter + DCD M0CORE_IRQHandler ; 17 M0 Core + DCD DMA_IRQHandler ; 18 General Purpose DMA + DCD EZH_IRQHandler ; 19 EZH/EDM + DCD FLASH_EEPROM_IRQHandler ; 20 Reserved for Typhoon + DCD ETH_IRQHandler ; 21 Ethernet + DCD SDIO_IRQHandler ; 22 SD/MMC + DCD LCD_IRQHandler ; 23 LCD + DCD USB0_IRQHandler ; 24 USB0 + DCD USB1_IRQHandler ; 25 USB1 + DCD SCT_IRQHandler ; 26 State Configurable Timer + DCD RIT_IRQHandler ; 27 Repetitive Interrupt Timer + DCD TIMER0_IRQHandler ; 28 Timer0 + DCD TIMER1_IRQHandler ; 29 Timer1 + DCD TIMER2_IRQHandler ; 30 Timer2 + DCD TIMER3_IRQHandler ; 31 Timer3 + DCD MCPWM_IRQHandler ; 32 Motor Control PWM + DCD ADC0_IRQHandler ; 33 A/D Converter 0 + DCD I2C0_IRQHandler ; 34 I2C0 + DCD I2C1_IRQHandler ; 35 I2C1 + DCD SPI_IRQHandler ; 36 SPI + DCD ADC1_IRQHandler ; 37 A/D Converter 1 + DCD SSP0_IRQHandler ; 38 SSP0 + DCD SSP1_IRQHandler ; 39 SSP1 + DCD UART0_IRQHandler ; 40 UART0 + DCD UART1_IRQHandler ; 41 UART1 + DCD UART2_IRQHandler ; 42 UART2 + DCD UART3_IRQHandler ; 43 UART3 + DCD I2S0_IRQHandler ; 44 I2S0 + DCD I2S1_IRQHandler ; 45 I2S1 + DCD SPIFI_IRQHandler ; 46 SPI Flash Interface + DCD SGPIO_IRQHandler ; 47 SGPIO + DCD GPIO0_IRQHandler ; 48 GPIO0 + DCD GPIO1_IRQHandler ; 49 GPIO1 + DCD GPIO2_IRQHandler ; 50 GPIO2 + DCD GPIO3_IRQHandler ; 51 GPIO3 + DCD GPIO4_IRQHandler ; 52 GPIO4 + DCD GPIO5_IRQHandler ; 53 GPIO5 + DCD GPIO6_IRQHandler ; 54 GPIO6 + DCD GPIO7_IRQHandler ; 55 GPIO7 + DCD GINT0_IRQHandler ; 56 GINT0 + DCD GINT1_IRQHandler ; 57 GINT1 + DCD EVRT_IRQHandler ; 58 Event Router + DCD CAN1_IRQHandler ; 59 C_CAN1 + DCD 0 ; 60 Reserved + DCD VADC_IRQHandler ; 61 VADC + DCD ATIMER_IRQHandler ; 62 ATIMER + DCD RTC_IRQHandler ; 63 RTC + DCD 0 ; 64 Reserved + DCD WDT_IRQHandler ; 65 WDT + DCD M0s_IRQHandler ; 66 M0s + DCD CAN0_IRQHandler ; 67 C_CAN0 + DCD QEI_IRQHandler ; 68 QEI + + +;CRP address at offset 0x2FC relative to the BOOT Bank address + IF :LNOT::DEF:NO_CRP + SPACE (0x2FC - (. - __Vectors)) +; EXPORT CRP_Key +CRP_Key DCD 0xFFFFFFFF +; 0xFFFFFFFF => CRP Disabled +; 0x12345678 => CRP Level 1 +; 0x87654321 => CRP Level 2 +; 0x43218765 => CRP Level 3 (ARE YOU SURE?) +; 0x4E697370 => NO ISP (ARE YOU SURE?) + ENDIF + + AREA |.text|, CODE, READONLY + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT DAC_IRQHandler [WEAK] + EXPORT M0CORE_IRQHandler [WEAK] + EXPORT DMA_IRQHandler [WEAK] + EXPORT EZH_IRQHandler [WEAK] + EXPORT FLASH_EEPROM_IRQHandler [WEAK] + EXPORT ETH_IRQHandler [WEAK] + EXPORT SDIO_IRQHandler [WEAK] + EXPORT LCD_IRQHandler [WEAK] + EXPORT USB0_IRQHandler [WEAK] + EXPORT USB1_IRQHandler [WEAK] + EXPORT SCT_IRQHandler [WEAK] + EXPORT RIT_IRQHandler [WEAK] + EXPORT TIMER0_IRQHandler [WEAK] + EXPORT TIMER1_IRQHandler [WEAK] + EXPORT TIMER2_IRQHandler [WEAK] + EXPORT TIMER3_IRQHandler [WEAK] + EXPORT MCPWM_IRQHandler [WEAK] + EXPORT ADC0_IRQHandler [WEAK] + EXPORT I2C0_IRQHandler [WEAK] + EXPORT I2C1_IRQHandler [WEAK] + EXPORT SPI_IRQHandler [WEAK] + EXPORT ADC1_IRQHandler [WEAK] + EXPORT SSP0_IRQHandler [WEAK] + EXPORT SSP1_IRQHandler [WEAK] + EXPORT UART0_IRQHandler [WEAK] + EXPORT UART1_IRQHandler [WEAK] + EXPORT UART2_IRQHandler [WEAK] + EXPORT UART3_IRQHandler [WEAK] + EXPORT I2S0_IRQHandler [WEAK] + EXPORT I2S1_IRQHandler [WEAK] + EXPORT SPIFI_IRQHandler [WEAK] + EXPORT SGPIO_IRQHandler [WEAK] + EXPORT GPIO0_IRQHandler [WEAK] + EXPORT GPIO1_IRQHandler [WEAK] + EXPORT GPIO2_IRQHandler [WEAK] + EXPORT GPIO3_IRQHandler [WEAK] + EXPORT GPIO4_IRQHandler [WEAK] + EXPORT GPIO5_IRQHandler [WEAK] + EXPORT GPIO6_IRQHandler [WEAK] + EXPORT GPIO7_IRQHandler [WEAK] + EXPORT GINT0_IRQHandler [WEAK] + EXPORT GINT1_IRQHandler [WEAK] + EXPORT EVRT_IRQHandler [WEAK] + EXPORT CAN1_IRQHandler [WEAK] + EXPORT VADC_IRQHandler [WEAK] + EXPORT ATIMER_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT WDT_IRQHandler [WEAK] + EXPORT M0s_IRQHandler [WEAK] + EXPORT CAN0_IRQHandler [WEAK] + EXPORT QEI_IRQHandler [WEAK] + +DAC_IRQHandler +M0CORE_IRQHandler +DMA_IRQHandler +EZH_IRQHandler +FLASH_EEPROM_IRQHandler +ETH_IRQHandler +SDIO_IRQHandler +LCD_IRQHandler +USB0_IRQHandler +USB1_IRQHandler +SCT_IRQHandler +RIT_IRQHandler +TIMER0_IRQHandler +TIMER1_IRQHandler +TIMER2_IRQHandler +TIMER3_IRQHandler +MCPWM_IRQHandler +ADC0_IRQHandler +I2C0_IRQHandler +I2C1_IRQHandler +SPI_IRQHandler +ADC1_IRQHandler +SSP0_IRQHandler +SSP1_IRQHandler +UART0_IRQHandler +UART1_IRQHandler +UART2_IRQHandler +UART3_IRQHandler +I2S0_IRQHandler +I2S1_IRQHandler +SPIFI_IRQHandler +SGPIO_IRQHandler +GPIO0_IRQHandler +GPIO1_IRQHandler +GPIO2_IRQHandler +GPIO3_IRQHandler +GPIO4_IRQHandler +GPIO5_IRQHandler +GPIO6_IRQHandler +GPIO7_IRQHandler +GINT0_IRQHandler +GINT1_IRQHandler +EVRT_IRQHandler +CAN1_IRQHandler +VADC_IRQHandler +ATIMER_IRQHandler +RTC_IRQHandler +WDT_IRQHandler +M0s_IRQHandler +CAN0_IRQHandler +QEI_IRQHandler + + B . + + ENDP + + ALIGN + +; User Initial Stack & Heap + + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + + END diff --git a/IDE/MDK-ARM/LPC43xx/time-LCP43xx.c b/IDE/MDK-ARM/LPC43xx/time-LCP43xx.c new file mode 100644 index 000000000..4efaf2746 --- /dev/null +++ b/IDE/MDK-ARM/LPC43xx/time-LCP43xx.c @@ -0,0 +1,170 @@ +/* time.c + * + * Copyright (C) 2006-2013 wolfSSL Inc. + * + * This file is part of CyaSSL. + * + * CyaSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * CyaSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA + */ + +#ifdef HAVE_CONFIG_H + #include +#endif + + +/*----------------------------------------------------------------------------- + * initialize RTC + *----------------------------------------------------------------------------*/ +#include +#include "lpc43xx_rtc.h" +#include "lpc43xx_cgu.h" + +static void init_RTC() +{ + /* Enable GPIO register interface clock */ + LPC_CCU1->CLK_M4_GPIO_CFG |= 1; + while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 1)) ; + + /* RTC Block section ------------------------------------------------------ */ + /* Init RTC module */ + RTC_Init(LPC_RTC); + + /* Set ALARM time for second */ + RTC_SetAlarmTime (LPC_RTC, RTC_TIMETYPE_SECOND, 30); + + /* Set the AMR for 30s match alarm interrupt */ + RTC_AlarmIntConfig (LPC_RTC, RTC_TIMETYPE_SECOND, ENABLE); + + /* Set the CIIR for minute counter interrupt*/ + RTC_CntIncrIntConfig (LPC_RTC, RTC_TIMETYPE_MINUTE, ENABLE); + + /* Enable rtc (starts increase the tick counter and second counter register) */ + RTC_Cmd(LPC_RTC, ENABLE); + +} + +/*----------------------------------------------------------------------------- + * initialize TIM + *----------------------------------------------------------------------------*/ + +#include "lpc43xx_timer.h" +//#include "lpc43xx_cgu.h" +//#include "lpc43xx_scu.h" +//#include "lpc43xx_libcfg.h" +//#include "debug_frmwrk.h" + +static void init_TIM() +{ + TIM_TIMERCFG_Type TIM_ConfigStruct; + /* Initialize timer 0, prescale count time of 1uS */ + TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_TICKVAL; + TIM_ConfigStruct.PrescaleValue = 204; /* 204MHz */ + /* Set configuration for Tim_config and Tim_MatchConfig */ + TIM_Init(LPC_TIMER2, TIM_TIMER_MODE,&TIM_ConfigStruct); + TIM_ResetCounter(LPC_TIMER2); + /* To start timer 2 */ + TIM_Cmd(LPC_TIMER2,ENABLE); +} + +double current_time() +{ + return (double)LPC_TIMER2->TC/1000000.0; +} + + +void init_time(void) { + init_RTC() ; + init_TIM() ; +} + +#include + +struct tm *Cyassl_MDK_gmtime(const time_t *c) +{ + static struct tm date ; + + RTC_TIME_Type RTCFullTime; + RTC_GetFullTime (LPC_RTC, &RTCFullTime); + + date.tm_year = RTCFullTime.YEAR + 100 ; + date.tm_mon = RTCFullTime.MONTH - 1 ; + date.tm_mday = RTCFullTime.DOM ; + date.tm_hour = RTCFullTime.HOUR ; + date.tm_min = RTCFullTime.MIN ; + date.tm_sec = RTCFullTime.SEC ; + + #if defined(DEBUG_CYASSL) + { + extern void CYASSL_MSG(char *msg) ; + char msg[100] ; + sprintf(msg, "Debug::Cyassl_KEIL_gmtime(DATE=/%4d/%02d/%02d TIME=%02d:%02d:%02d)\n", + RTCFullTime.YEAR+2000, RTCFullTime.MONTH, RTCFullTime.DOM, + RTCFullTime.HOUR, RTCFullTime.MIN, RTCFullTime.SEC) ; + CYASSL_MSG(msg) ; + } + #endif + + return(&date) ; +} + +typedef struct func_args { + int argc; + char** argv; + int return_code; +} func_args; + +#include + +void time_main(void *args) +{ + char * datetime ; + int year ; + RTC_TIME_Type RTCFullTime; + + if( args == NULL || ((func_args *)args)->argc == 1) { + RTC_GetFullTime (LPC_RTC, &RTCFullTime); + printf("Date: %d/%d/%d, Time: %02d:%02d:%02d\n", + RTCFullTime.MONTH, RTCFullTime.DOM, RTCFullTime.YEAR+2000, + RTCFullTime.HOUR, RTCFullTime.MIN, RTCFullTime.SEC) ; + } else if(((func_args *)args)->argc == 3 && + ((func_args *)args)->argv[1][0] == '-' && + ((func_args *)args)->argv[1][1] == 'd' ) { + + datetime = ((func_args *)args)->argv[2]; + sscanf(datetime, "%d/%d/%d", + (int *)&RTCFullTime.MONTH, (int *)&RTCFullTime.DOM, &year) ; + RTCFullTime.YEAR = year - 2000 ; + RTC_SetTime (LPC_RTC, RTC_TIMETYPE_MONTH, RTCFullTime.MONTH); + RTC_SetTime (LPC_RTC, RTC_TIMETYPE_YEAR, RTCFullTime.YEAR); + RTC_SetTime (LPC_RTC, RTC_TIMETYPE_DAYOFMONTH, RTCFullTime.DOM); + } else if(((func_args *)args)->argc == 3 && + ((func_args *)args)->argv[1][0] == '-' && + ((func_args *)args)->argv[1][1] == 't' ) { + RTC_GetFullTime (LPC_RTC, &RTCFullTime); + datetime = ((func_args *)args)->argv[2]; + sscanf(datetime, "%d:%d:%d", + (int *)&RTCFullTime.HOUR, + (int *)&RTCFullTime.MIN, + (int *)&RTCFullTime.SEC + ) ; + RTC_SetTime (LPC_RTC, RTC_TIMETYPE_SECOND, RTCFullTime.SEC); + RTC_SetTime (LPC_RTC, RTC_TIMETYPE_MINUTE, RTCFullTime.MIN); + RTC_SetTime (LPC_RTC, RTC_TIMETYPE_HOUR, RTCFullTime.HOUR); + } else printf("Invalid argument\n") ; +} + + + + diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt index 2a0fae1eb..bf308949e 100644 --- a/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt +++ b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt @@ -635,7 +635,7 @@ 0 0 0 - 140 + 150 156 0 ..\MDK-ARM\CyaSSL\main.c @@ -811,7 +811,7 @@ 0 0 0 - 48 + 52 58 0 C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\Serial.c @@ -1651,7 +1651,7 @@ 0 0 0 - 146 + 147 151 0 ..\LPC43xx\startup_LPC43xx.s @@ -1675,7 +1675,7 @@ 0 0 0 - 165 + 176 182 0 ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c @@ -1691,7 +1691,7 @@ 0 0 0 - 51 + 53 59 0 ..\MDK-ARM\CyaSSL\Retarget.c From 9382f74f2e42949c8afc7d95efc94b9e6e84f5eb Mon Sep 17 00:00:00 2001 From: kojo Date: Sun, 26 May 2013 09:47:51 +0900 Subject: [PATCH 13/16] Marging cyassl/master and STM.LPC --- IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt | 74 ------------------- IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj | 33 --------- src/internal.c | 4 - 3 files changed, 111 deletions(-) diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt index 6cec49314..9489c8c1e 100644 --- a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt +++ b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt @@ -490,11 +490,7 @@ CyaSSL Apps -<<<<<<< HEAD 0 -======= - 1 ->>>>>>> cyassl/master 0 0 0 @@ -618,13 +614,8 @@ 0 0 0 -<<<<<<< HEAD 135 149 -======= - 209 - 220 ->>>>>>> cyassl/master 0 ..\MDK-ARM\CyaSSL\main.c main.c @@ -771,11 +762,7 @@ MDK-ARM -<<<<<<< HEAD 0 -======= - 1 ->>>>>>> cyassl/master 0 0 0 @@ -787,13 +774,8 @@ 0 0 0 -<<<<<<< HEAD 39 73 -======= - 42 - 66 ->>>>>>> cyassl/master 0 c:\Keil\ARM\Boards\Keil\MCBSTM32F200\RL\FlashFS\SD_File\Serial.c Serial.c @@ -916,11 +898,7 @@ CyaSSL Library -<<<<<<< HEAD 0 -======= - 1 ->>>>>>> cyassl/master 0 0 0 @@ -1072,11 +1050,7 @@ Crypt/Cipher Library -<<<<<<< HEAD 0 -======= - 1 ->>>>>>> cyassl/master 0 0 0 @@ -1454,17 +1428,10 @@ 1 0 0 -<<<<<<< HEAD 30 0 560 570 -======= - 0 - 0 - 0 - 0 ->>>>>>> cyassl/master 0 ..\..\..\ctaocrypt\src\random.c random.c @@ -1479,13 +1446,8 @@ 0 0 0 -<<<<<<< HEAD 1 1 -======= - 0 - 0 ->>>>>>> cyassl/master 0 ..\..\..\ctaocrypt\src\ripemd.c ripemd.c @@ -1720,11 +1682,7 @@ 0 0 0 -<<<<<<< HEAD 163 -======= - 165 ->>>>>>> cyassl/master 169 0 ..\MDK-ARM\config\startup_stm32f2xx.s @@ -1744,11 +1702,7 @@ 7 73 1 -<<<<<<< HEAD 0 -======= - 1 ->>>>>>> cyassl/master 0 0 0 @@ -1764,46 +1718,18 @@ 7 74 1 -<<<<<<< HEAD 0 0 0 0 51 57 -======= - 1 - 0 - 0 - 0 - 52 - 56 ->>>>>>> cyassl/master 0 ..\MDK-ARM\CyaSSL\Retarget.c Retarget.c 0 0 -<<<<<<< HEAD - - 7 - 75 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - ..\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c - time-STM32F2xx.c - 0 - 0 - -======= ->>>>>>> cyassl/master diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj index 759667845..222ef456f 100644 --- a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj +++ b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvproj @@ -44,11 +44,7 @@ 1 .\MDK-RTX-TCP-FS\ -<<<<<<< HEAD STM32F2xx-MDK-RTX-TCP-FS -======= - MDK-RTX-TCP-FS ->>>>>>> cyassl/master 1 0 0 @@ -353,11 +349,7 @@ 0 -<<<<<<< HEAD HAVE_CONFIG_H CYASSL_STM32F2xx __DBG_ITM __RTX USE_STDPERIPH_DRIVER MDK_CONF_RTX_TCP_FS -======= - HAVE_CONFIG_H __DBG_ITM __RTX USE_STDPERIPH_DRIVER MDK_CONF_RTX_TCP_FS ->>>>>>> cyassl/master ..\MDK-ARM\CyaSSL;C:..\STM32F2xx_StdPeriph_Lib\inc;..\..\..\ @@ -938,14 +930,11 @@ 1 ..\MDK-ARM\CyaSSL\Retarget.c -<<<<<<< HEAD time-STM32F2xx.c 1 ..\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c -======= ->>>>>>> cyassl/master @@ -988,11 +977,7 @@ 1 .\MDK-FS\ -<<<<<<< HEAD STM32F2xx-MDK-FS -======= - MDK-FS ->>>>>>> cyassl/master 1 0 0 @@ -1297,11 +1282,7 @@ 0 -<<<<<<< HEAD HAVE_CONFIG_H CYASSL_STM32F2xx __DBG_ITM USE_STDPERIPH_DRIVER MDK_CONF_FS -======= - HAVE_CONFIG_H __DBG_ITM USE_STDPERIPH_DRIVER MDK_CONF_FS ->>>>>>> cyassl/master ..\MDK-ARM\CyaSSL;..\MDK-ARM\inc;..\STM32F2xx_StdPeriph_Lib\inc;..\POSIX\..\..\..\ @@ -2158,14 +2139,11 @@ 1 ..\MDK-ARM\CyaSSL\Retarget.c -<<<<<<< HEAD time-STM32F2xx.c 1 ..\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c -======= ->>>>>>> cyassl/master @@ -2208,11 +2186,7 @@ 1 .\MDK-BARE-METAL\ -<<<<<<< HEAD STM32F2xx-MDK-BARE-METAL -======= - MDK-BARE-METAL ->>>>>>> cyassl/master 1 0 0 @@ -2517,11 +2491,7 @@ 0 -<<<<<<< HEAD HAVE_CONFIG_H CYASSL_STM32F2xx __DBG_ITM USE_STDPERIPH_DRIVER MDK_CONF_BARE_METAL -======= - HAVE_CONFIG_H __DBG_ITM USE_STDPERIPH_DRIVER MDK_CONF_BARE_METAL ->>>>>>> cyassl/master ..\MDK-ARM\CyaSSL;..\MDK-ARM\inc;..\STM32F2xx_StdPeriph_Lib\inc;..\POSIX;..\..\..\ @@ -3596,14 +3566,11 @@ 1 ..\MDK-ARM\CyaSSL\Retarget.c -<<<<<<< HEAD time-STM32F2xx.c 1 ..\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c -======= ->>>>>>> cyassl/master diff --git a/src/internal.c b/src/internal.c index 0cf66a8ec..fcfe8f9cc 100644 --- a/src/internal.c +++ b/src/internal.c @@ -9509,12 +9509,8 @@ int SetCipherList(Suites* s, const char* list) ssl->options.haveSessionId = 1; /* ProcessOld uses same resume code */ -<<<<<<< HEAD - if (ssl->options.resuming) { /* let's try */ -======= if (ssl->options.resuming && (!ssl->options.dtls || ssl->options.acceptState == HELLO_VERIFY_SENT)) { /* let's try */ ->>>>>>> cyassl/master int ret = -1; CYASSL_SESSION* session = GetSession(ssl,ssl->arrays->masterSecret); if (!session) { From e4a95342f18042f93d691a02cf7d05ba095c06af Mon Sep 17 00:00:00 2001 From: kojo Date: Sun, 26 May 2013 10:05:35 +0900 Subject: [PATCH 14/16] Merging cyassl/master and STM.LPC --- IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h | 4 - .../MDK-ARM/CyaSSL/config-RTX-TCP-FS.h | 48 --- IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c | 53 --- IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h | 10 - IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c | 102 ----- IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c | 36 -- IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c | 9 - IDE/MDK-ARM/MDK-ARM/config/File_Config.c | 390 ------------------ IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c | 4 - 9 files changed, 656 deletions(-) diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h index 1964338ba..ed2e6d642 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-FS.h @@ -76,11 +76,7 @@ // STM32 Hardware Crypt // STM32F2 Hardware RNG -<<<<<<< HEAD #define MDK_CONF_STM32F2_RNG 0 -======= -#define MDK_CONF_STM32F2_RNG 1 ->>>>>>> cyassl/master #if MDK_CONF_STM32F2_RNG == 1 #define STM32F2_RNG #else diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h index fb1d43424..17b644d79 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h @@ -99,11 +99,7 @@ // // STM32 Hardware Crypt // STM32F2 Hardware RNG -<<<<<<< HEAD #define MDK_CONF_STM32F2_RNG 0 -======= -#define MDK_CONF_STM32F2_RNG 1 ->>>>>>> cyassl/master #if MDK_CONF_STM32F2_RNG == 1 #define STM32F2_RNG #else @@ -131,31 +127,19 @@ // // CertGen -<<<<<<< HEAD #define MDK_CONF_CERT_GEN 1 -======= -#define MDK_CONF_CERT_GEN 0 ->>>>>>> cyassl/master #if MDK_CONF_CERT_GEN == 1 #define CYASSL_CERT_GEN #endif // // KeyGen -<<<<<<< HEAD #define MDK_CONF_KEY_GEN 1 -======= -#define MDK_CONF_KEY_GEN 0 ->>>>>>> cyassl/master #if MDK_CONF_KEY_GEN == 1 #define CYASSL_KEY_GEN #endif // // CRL -<<<<<<< HEAD #define MDK_CONF_DER_LOAD 1 -======= -#define MDK_CONF_DER_LOAD 0 ->>>>>>> cyassl/master #if MDK_CONF_DER_LOAD == 1 #define CYASSL_DER_LOAD #endif @@ -176,11 +160,7 @@ // MD5, SHA, SHA-256, AES, RC4, ASN, RSA // // MD2 -<<<<<<< HEAD #define MDK_CONF_MD2 1 -======= -#define MDK_CONF_MD2 0 ->>>>>>> cyassl/master #if MDK_CONF_MD2 == 1 #define CYASSL_MD2 #endif @@ -193,21 +173,13 @@ // // SHA-384 // This has to be with SHA512 -<<<<<<< HEAD #define MDK_CONF_SHA384 1 -======= -#define MDK_CONF_SHA384 0 ->>>>>>> cyassl/master #if MDK_CONF_SHA384 == 1 #define CYASSL_SHA384 #endif // // SHA-512 -<<<<<<< HEAD #define MDK_CONF_SHA512 1 -======= -#define MDK_CONF_SHA512 0 ->>>>>>> cyassl/master #if MDK_CONF_SHA512 == 1 #define CYASSL_SHA512 #endif @@ -225,11 +197,7 @@ #endif // // HC128 -<<<<<<< HEAD #define MDK_CONF_HC128 1 -======= -#define MDK_CONF_HC128 0 ->>>>>>> cyassl/master #if MDK_CONF_HC128 == 1 #define HAVE_HC128 #endif @@ -242,11 +210,7 @@ // // AEAD -<<<<<<< HEAD #define MDK_CONF_AEAD 1 -======= -#define MDK_CONF_AEAD 0 ->>>>>>> cyassl/master #if MDK_CONF_AEAD == 1 #define HAVE_AEAD #endif @@ -258,11 +222,7 @@ #endif // // CAMELLIA -<<<<<<< HEAD #define MDK_CONF_CAMELLIA 1 -======= -#define MDK_CONF_CAMELLIA 0 ->>>>>>> cyassl/master #if MDK_CONF_CAMELLIA == 1 #define HAVE_CAMELLIA #endif @@ -301,21 +261,13 @@ #endif // // AESCCM (Turn off Hardware Crypt) -<<<<<<< HEAD #define MDK_CONF_AESCCM 1 -======= -#define MDK_CONF_AESCCM 0 ->>>>>>> cyassl/master #if MDK_CONF_AESCCM == 1 #define HAVE_AESCCM #endif // // AESGCM (Turn off Hardware Crypt) -<<<<<<< HEAD #define MDK_CONF_AESGCM 1 -======= -#define MDK_CONF_AESGCM 0 ->>>>>>> cyassl/master #if MDK_CONF_AESGCM == 1 #define HAVE_AESGCM #define BUILD_AESGCM diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c index cf63cddf2..f0959de12 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.c @@ -59,11 +59,7 @@ unsigned long inet_addr(const char *cp) /*** tcp_connect is actually associated with following syassl_tcp_connect. ***/ int Cyassl_connect(int sd, const struct sockaddr* sa, int sz) { -<<<<<<< HEAD int ret = 0 ; -======= - int ret ; ->>>>>>> cyassl/master #if defined(CYASSL_KEIL_TCP_NET) SOCKADDR_IN addr ; @@ -90,11 +86,7 @@ int Cyassl_connect(int sd, const struct sockaddr* sa, int sz) int Cyassl_accept(int sd, struct sockaddr *addr, int *addrlen) { -<<<<<<< HEAD int ret = 0 ; -======= - int ret ; ->>>>>>> cyassl/master #if defined(CYASSL_KEIL_TCP_NET) while(1) { @@ -118,11 +110,7 @@ int Cyassl_accept(int sd, struct sockaddr *addr, int *addrlen) int Cyassl_recv(int sd, void *buf, size_t len, int flags) { -<<<<<<< HEAD int ret = 0; -======= - int ret ; ->>>>>>> cyassl/master #if defined(CYASSL_KEIL_TCP_NET) while(1) { #undef recv /* Go to KEIL TCPnet recv */ @@ -144,11 +132,7 @@ int Cyassl_recv(int sd, void *buf, size_t len, int flags) int Cyassl_send(int sd, const void *buf, size_t len, int flags) { -<<<<<<< HEAD int ret = 0 ; -======= - int ret ; ->>>>>>> cyassl/master #if defined(CYASSL_KEIL_TCP_NET) while(1) { @@ -186,43 +170,6 @@ int Cyassl_tcp_select(int sd, int timeout) } #endif -<<<<<<< HEAD -======= -struct tm *Cyassl_MDK_gmtime(const time_t *c) -{ - - RTC_TimeTypeDef RTC_Time ; - RTC_DateTypeDef RTC_Date ; - static struct tm date ; - - RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; - RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; - - date.tm_year = RTC_Date.RTC_Year + 100 ; - date.tm_mon = RTC_Date.RTC_Month - 1 ; - date.tm_mday = RTC_Date.RTC_Date ; - date.tm_hour = RTC_Time.RTC_Hours ; - date.tm_min = RTC_Time.RTC_Minutes ; - date.tm_sec = RTC_Time.RTC_Seconds ; - - #if defined(DEBUG_CYASSL) - { - char msg[100] ; - sprintf(msg, "Debug::Cyassl_KEIL_gmtime(DATE=/%4d/%02d/%02d TIME=%02d:%02d:%02d)\n", - RTC_Date.RTC_Year+2000, RTC_Date.RTC_Month, RTC_Date.RTC_Date, - RTC_Time.RTC_Hours, RTC_Time.RTC_Minutes, RTC_Time.RTC_Seconds) ; - CYASSL_MSG(msg) ; - } - #endif - - return(&date) ; -} - -double current_time() -{ - return ((double)TIM2->CNT/1000000.0) ; -} ->>>>>>> cyassl/master extern int getkey(void) ; extern int sendchar(int c) ; diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h index 5da8149cd..052fe2991 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/cyassl_MDK_ARM.h @@ -95,19 +95,9 @@ extern int setsockopt(int sockfd, int level, int optname, extern int select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *exceptfds, const struct timeval *timeout); -<<<<<<< HEAD /* CyaSSL MDK-ARM time functions */ #include struct tm *Cyassl_MDK_gmtime(const time_t *c) ; -======= - -/** KEIL-RL gmtime ****/ - -#include -#include "stm32f2xx_rtc.h" -extern struct tm *gmtime(const time_t *timer); -extern struct tm *Cyassl_MDK_gmtime(const time_t *timer); ->>>>>>> cyassl/master extern double current_time(void) ; #endif /* CYASSL_KEIL_RL_H */ diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c index 5781bf2c4..7a39b51f4 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/main.c @@ -30,13 +30,6 @@ #include #include "cyassl_MDK_ARM.h" -<<<<<<< HEAD -======= -#include "stm32f2xx_tim.h" -#include "stm32f2xx_rcc.h" - - ->>>>>>> cyassl/master /*----------------------------------------------------------------------------- * Initialize a Flash Memory Card *----------------------------------------------------------------------------*/ @@ -90,80 +83,6 @@ __task void tcp_poll (void) } #endif -<<<<<<< HEAD -======= -/*----------------------------------------------------------------------------- - * initialize RTC - *----------------------------------------------------------------------------*/ -#include "stm32f2xx_rtc.h" -#include "stm32f2xx_rcc.h" -#include "stm32f2xx_pwr.h" - -static init_RTC() -{ - RTC_InitTypeDef RTC_InitStruct ; - - RTC_TimeTypeDef RTC_Time ; - RTC_DateTypeDef RTC_Date ; - - - /* Enable the PWR clock */ - RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); - - /* Allow access to RTC */ - PWR_BackupAccessCmd(ENABLE); - -/***Configures the External Low Speed oscillator (LSE)****/ - - RCC_LSEConfig(RCC_LSE_ON); - - /* Wait till LSE is ready */ - while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) - { - } - - /* Select the RTC Clock Source */ - RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); - - /* Enable the RTC Clock */ - RCC_RTCCLKCmd(ENABLE); - - /* Wait for RTC APB registers synchronisation */ - RTC_WaitForSynchro(); - - /* Calendar Configuration with LSI supposed at 32KHz */ - RTC_InitStruct.RTC_AsynchPrediv = 0x7F; - RTC_InitStruct.RTC_SynchPrediv = 0xFF; - RTC_InitStruct.RTC_HourFormat = RTC_HourFormat_24; - RTC_Init(&RTC_InitStruct); - - RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; - RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; -} - -/*----------------------------------------------------------------------------- - * initialize TIM - *----------------------------------------------------------------------------*/ -void init_timer() -{ - TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure ; - - RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE) ; - - TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); - TIM_TimeBaseStructure.TIM_Prescaler = 60; - TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; - TIM_TimeBaseStructure.TIM_Period = 0xffffffff; - TIM_TimeBaseStructure.TIM_ClockDivision = 0; - TIM_TimeBaseStructure.TIM_RepetitionCounter = 0; - - TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); - - TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure) ; - TIM_Cmd(TIM2, ENABLE) ; -} - ->>>>>>> cyassl/master #if defined(HAVE_KEIL_RTX) && defined(CYASSL_MDK_SHELL) #define SHELL_STACKSIZE 1000 static unsigned char Shell_stack[SHELL_STACKSIZE] ; @@ -199,20 +118,12 @@ void main_task (void) shell_main() ; #endif #else -<<<<<<< HEAD /************************************/ /*** USER APPLICATION HERE ***/ /************************************/ printf("USER LOGIC STARTED\n") ; -======= - - /************************************/ - /*** USER APPLICATION HERE ***/ - /************************************/ - ->>>>>>> cyassl/master #endif #ifdef HAVE_KEIL_RTX @@ -232,7 +143,6 @@ void main_task (void) /*** main entry ***/ -<<<<<<< HEAD extern void init_time(void) ; extern void SystemInit(void); @@ -246,18 +156,6 @@ int main() { init_time() ; -======= -int main() { - /* stm32_Init (); STM32 setup */ - - #if !defined(NO_FILESYSTEM) - init_card () ; /* initializing SD card */ - #endif - - init_RTC() ; - init_timer() ; - SER_Init() ; ->>>>>>> cyassl/master #if defined(DEBUG_CYASSL) printf("Turning ON Debug message\n") ; diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c index dca753e8b..1a0b6ad73 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/shell.c @@ -384,42 +384,6 @@ static void ipaddr_comm(void *args) #endif -<<<<<<< HEAD -======= -static void time_main(void *args) -{ - char * datetime ; - RTC_TimeTypeDef RTC_Time ; - RTC_DateTypeDef RTC_Date ; - int year ; - if( args == NULL || ((func_args *)args)->argc == 1) { - RTC_GetTime(RTC_Format_BIN, &RTC_Time) ; - RTC_GetDate(RTC_Format_BIN, &RTC_Date) ; - printf("Date: %d/%d/%d, Time: %02d:%02d:%02d\n", - RTC_Date.RTC_Month, RTC_Date.RTC_Date, RTC_Date.RTC_Year+2000, - RTC_Time.RTC_Hours, RTC_Time.RTC_Minutes, RTC_Time.RTC_Seconds) ; - } else if(((func_args *)args)->argc == 3 && - ((func_args *)args)->argv[1][0] == '-' && - ((func_args *)args)->argv[1][1] == 'd' ) { - datetime = ((func_args *)args)->argv[2]; - sscanf(datetime, "%d/%d/%d", - (int *)&RTC_Date.RTC_Month, (int *)&RTC_Date.RTC_Date, &year) ; - RTC_Date.RTC_Year = year - 2000 ; - RTC_Date.RTC_WeekDay = 0 ; - RTC_SetDate(RTC_Format_BIN, &RTC_Date) ; - } else if(((func_args *)args)->argc == 3 && - ((func_args *)args)->argv[1][0] == '-' && - ((func_args *)args)->argv[1][1] == 't' ) { - datetime = ((func_args *)args)->argv[2]; - sscanf(datetime, "%d:%d:%d", - (int *)&RTC_Time.RTC_Hours, - (int *)&RTC_Time.RTC_Minutes, - (int *)&RTC_Time.RTC_Seconds - ) ; - RTC_SetTime(RTC_Format_BIN, &RTC_Time) ; - } else printf("Invalid argument\n") ; -} ->>>>>>> cyassl/master #if defined(HAVE_KEIL_RTX) diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c b/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c index 3229f03be..024d10373 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/ssl-dummy.c @@ -45,18 +45,9 @@ int CyaSSL_get_using_nonblock(CYASSL* ssl) CYASSL_LEAVE("CyaSSL_get_using_nonblock", ssl->options.usingNonblock); return ssl->options.usingNonblock; } -<<<<<<< HEAD Signer* GetCAByName(void* vp, byte* hash) { Signer * ca ; return(ca) ; } -======= - -Signer* GetCAByName(void* vp, byte* hash) -{ - return NULL; -} - ->>>>>>> cyassl/master diff --git a/IDE/MDK-ARM/MDK-ARM/config/File_Config.c b/IDE/MDK-ARM/MDK-ARM/config/File_Config.c index d832d06c4..96b6dada2 100644 --- a/IDE/MDK-ARM/MDK-ARM/config/File_Config.c +++ b/IDE/MDK-ARM/MDK-ARM/config/File_Config.c @@ -1,4 +1,3 @@ -<<<<<<< HEAD /*---------------------------------------------------------------------------- * RL-ARM - FlashFS *---------------------------------------------------------------------------- @@ -400,392 +399,3 @@ /*---------------------------------------------------------------------------- * end of file *---------------------------------------------------------------------------*/ -======= -/*---------------------------------------------------------------------------- - * RL-ARM - FlashFS - *---------------------------------------------------------------------------- - * Name: FILE_CONFIG.C - * Purpose: Configuration of RL FlashFS by user - * Rev.: V4.50 - *---------------------------------------------------------------------------- - * This code is part of the RealView Run-Time Library. - * Copyright (c) 2004-2012 KEIL - An ARM Company. All rights reserved. - *---------------------------------------------------------------------------*/ - -#include - -//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- -// -// File System -// ============== -// Define File System global parameters - -// Number of open files <4-16> -// Define number of files that can be -// opened at the same time. -// Default: 8 -#define N_FILES 6 - -// CPU Clock Frequency [Hz]<0-1000000000> -// Define the CPU Clock frequency used for -// flash programming and erasing. -#define CPU_CLK 120000000 - -// -// Flash Drive -// ============== -// Enable Embedded Flash Drive [F:] -#define FL0_EN 0 - -// Base address <0x0-0xFFFFF000:0x1000> -// Define the target device Base address -// Default: 0x80000000 -#define FL0_BADR 0x80000000 - -// Device Size <0x4000-0xFFFFF000:0x4000> -// Define the size of Flash device in bytes -// Default: 0x100000 (1MB) -#define FL0_SIZE 0x0200000 - -// Content of Erased Memory <0=>0x00 <0xFF=>0xFF -// Define the initial value for erased Flash data -// Default: 0xFF -#define FL0_INITV 0xFF - -// Device Description file -// Specify a file name with a relative path -// Default: FS_FlashDev.h -#define FL0_HFILE "FS_FlashDev.h" - -// Default Drive [F:] -// Used when Drive letter not specified -#define FL0_DEF 1 - -// -// SPI Flash Drive -// ================== -// Enable SPI Flash Drive [S:] -#define SF0_EN 0 - -// Device Size <0x10000-0xFFFFF000:0x8000> -// Define the size of SPI Flash device in bytes -// Default: 0x100000 (1MB) -#define SF0_SIZE 0x0200000 - -// Content of Erased Memory <0=>0x00 <0xFF=>0xFF -// Define the initial value for erased Flash data -// Default: 0xFF -#define SF0_INITV 0xFF - -// Device Description file -// Specify a file name with a relative path -// Default: FS_SPI_FlashDev.h -#define SF0_HFILE "FS_SPI_FlashDev.h" - -// Default Drive [S:] -// Used when Drive letter not specified -#define SF0_DEF 0 - -// -// RAM Drive -// ============ -// Enable Embedded RAM Drive [R:] -#define RAM0_EN 0 - -// Device Size <0x4000-0xFFFFF000:0x4000> -// Define the size of RAM device in bytes -// Default: 0x40000 -#define RAM0_SIZE 0x004000 - -// Number of Sectors <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 -// Define number of virtual sectors for RAM device -// Default: 32 -#define RAM0_NSECT 64 - -// Relocate Device Buffer -// Locate RAM Device Buffer at a specific address. -// If not enabled, the linker selects base address. -#define RAM0_RELOC 1 - -// Base address <0x0-0xFFFFF000:0x1000> -// Define the target device Base address. -// Default: 0x81000000 -#define RAM0_BADR 0x81010000 - -// -// Default Drive [R:] -// Used when Drive letter not specified -#define RAM0_DEF 0 - -// -// Memory Card Drive 0 -// ====================== -// Enable Memory Card Drive [M0:] -#define MC0_EN 1 - -// Bus Mode <0=>SD-Native <1=>SPI -// Define Memory Card bus interface mode. -// SD-Native mode needs MCI peripheral. -// SPI mode uses SD Card in SPI mode. -#define MC0_SPI 0 - -// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB -// <8=>8 KB <16=>16 KB <32=>32 KB -// Define System Cache buffer size for file IO. -// Increase this number for faster r/w access. -// Default: 4 kB -#define MC0_CASZ 16 - -// Relocate Cache Buffer -// Locate Cache Buffer at a specific address. -// Some devices like NXP LPC23xx require a Cache buffer -// for DMA transfer located at specific address. -#define MC0_RELOC 0 - -// Base address <0x0000-0xFFFFFE00:0x200> -// Define the Cache buffer base address. -// For LPC23xx/24xx devices this is USB RAM -// starting at 0x7FD00000. -#define MC0_CADR 0x7FD00000 - -// -// FAT Journal -// Enable FAT Journal in order to guarantee -// fail-safe FAT file system operation. -#define MC0_FSJ 0 - -// Default Drive [M0:] -// Used when Drive letter not specified -#define MC0_DEF 1 - -// -// Memory Card Drive 1 -// ====================== -// Enable Memory Card Drive [M1:] -#define MC1_EN 0 - -// Bus Mode <0=>SD-Native <1=>SPI -// Define Memory Card bus interface mode. -// SD-Native mode needs MCI peripheral. -// SPI mode uses SD Card in SPI mode. -#define MC1_SPI 1 - -// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB -// <8=>8 KB <16=>16 KB <32=>32 KB -// Define System Cache buffer size for file IO. -// Increase this number for faster r/w access. -// Default: 4 kB -#define MC1_CASZ 0 - -// Relocate Cache Buffer -// Locate Cache Buffer at a specific address. -// Some devices like NXP LPC23xx require a Cache buffer -// for DMA transfer located at specific address. -#define MC1_RELOC 0 - -// Base address <0x0000-0xFFFFFE00:0x200> -// Define the Cache buffer base address. -// For LPC23xx/24xx devices this is USB RAM -// starting at 0x7FD00000. -#define MC1_CADR 0x7FD00000 - -// -// FAT Journal -// Enable FAT Journal in order to guarantee -// fail-safe FAT file system operation. -#define MC1_FSJ 0 - -// Default Drive [M1:] -// Used when Drive letter not specified -#define MC1_DEF 0 - -// -// USB Flash Drive 0 -// ==================== -// Enable USB Flash Drive [U0:] -#define USB0_EN 0 - -// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB -// <8=>8 KB <16=>16 KB <32=>32 KB -// Define System Cache buffer size for file IO. -// Increase this number for faster r/w access. -// Default: 4 kB -#define USB0_CASZ 8 - -// FAT Journal -// Enable FAT Journal in order to guarantee -// fail-safe FAT file system operation. -#define USB0_FSJ 0 - -// Default Drive [U0:] -// Used when Drive letter not specified -#define USB0_DEF 1 - -// -// USB Flash Drive 1 -// ==================== -// Enable USB Flash Drive [U1:] -#define USB1_EN 0 - -// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB -// <8=>8 KB <16=>16 KB <32=>32 KB -// Define System Cache buffer size for file IO. -// Increase this number for faster r/w access. -// Default: 4 kB -#define USB1_CASZ 8 - -// FAT Journal -// Enable FAT Journal in order to guarantee -// fail-safe FAT file system operation. -#define USB1_FSJ 0 - -// Default Drive [U1:] -// Used when Drive letter not specified -#define USB1_DEF 1 - -// -// NAND Flash Drive 0 -// =================== -// Enable NAND Flash Drive [N0:] -#define NAND0_EN 0 - -// Page size <528=> 512 + 16 bytes -// <2112=>2048 + 64 bytes -// <4224=>4096 + 128 bytes -// <8448=>8192 + 256 bytes -// Define program Page size in bytes (User + Spare area). -#define NAND0_PGSZ 2112 - -// Block Size <8=>8 pages <16=>16 pages <32=>32 pages -// <64=>64 pages <128=>128 pages <256=>256 pages -// Define number of pages in a block. -#define NAND0_PGCNT 64 - -// Device Size [blocks] <512-32768> -// Define number of blocks in NAND Flash device. -#define NAND0_BLCNT 4096 - -// Page Caching <0=>OFF <1=>1 page <2=>2 pages <4=>4 pages -// <8=>8 pages <16=>16 pages <32=>32 pages -// Define number of cached Pages. -// Default: 4 pages -#define NAND0_CAPG 2 - -// Block Indexing <0=>OFF <1=>1 block <2=>2 blocks <4=>4 blocks -// <8=>8 blocks <16=>16 blocks <32=>32 blocks -// <64=>64 blocks <128=>128 blocks <256=>256 blocks -// Define number of indexed Flash Blocks. -// Increase this number for better performance. -// Default: 16 blocks -#define NAND0_CABL 16 - -// Software ECC <0=>None <1=>Hamming (SLC) -// Enable software ECC calculation only, -// if not supported by hardware. -#define NAND0_SWECC 1 - -// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB -// <8=>8 KB <16=>16 KB <32=>32 KB -// Define System Cache buffer size for file IO. -// Increase this number for faster r/w access. -// Default: 4 kB -#define NAND0_CASZ 4 - -// Relocate Cache Buffers -// Use this option to locate Cache buffers -// at specific address in RAM or SDRAM. -#define NAND0_RELOC 0 - -// Base address <0x0000-0xFFFFFE00:0x200> -// Define base address for Cache Buffers. -#define NAND0_CADR 0x80000000 - -// -// FAT Journal -// Enable FAT Journal in order to guarantee -// fail-safe FAT file system operation. -#define NAND0_FSJ 0 - -// Default Drive [N0:] -// Used when Drive letter not specified -#define NAND0_DEF 0 - -// -// NAND Flash Drive 1 -// =================== -// Enable NAND Flash Drive [N1:] -#define NAND1_EN 0 - -// Page size <528=> 512 + 16 bytes -// <2112=>2048 + 64 bytes -// <4224=>4096 + 128 bytes -// <8448=>8192 + 256 bytes -// Define program Page size in bytes (User + Spare area). -#define NAND1_PGSZ 2112 - -// Block Size <8=>8 pages <16=>16 pages <32=>32 pages -// <64=>64 pages <128=>128 pages <256=>256 pages -// Define number of pages in a block. -#define NAND1_PGCNT 32 - -// Device Size [blocks] <512-32768> -// Define number of blocks in NAND Flash device. -#define NAND1_BLCNT 512 - -// Page Caching <0=>OFF <1=>1 page <2=>2 pages <4=>4 pages -// <8=>8 pages <16=>16 pages <32=>32 pages -// Define number of cached Pages. -// Default: 4 pages -#define NAND1_CAPG 4 - -// Block Indexing <0=>OFF <1=>1 block <2=>2 blocks <4=>4 blocks -// <8=>8 blocks <16=>16 blocks <32=>32 blocks -// <64=>64 blocks <128=>128 blocks <256=>256 blocks -// Define number of indexed Flash Blocks. -// Increase this number for better performance. -// Default: 16 blocks -#define NAND1_CABL 16 - -// Software ECC <0=>None <1=>Hamming (SLC) -// Enable software ECC calculation only, -// if not supported by hardware. -#define NAND1_SWECC 0 - -// File System Cache <0=>OFF <1=>1 KB <2=>2 KB <4=>4 KB -// <8=>8 KB <16=>16 KB <32=>32 KB -// Define System Cache buffer size for file IO. -// Increase this number for faster r/w access. -// Default: 4 kB -#define NAND1_CASZ 4 - -// Relocate Cache Buffers -// Use this option to locate Cache buffers -// at specific address in RAM or SDRAM. -#define NAND1_RELOC 0 - -// Base address <0x0000-0xFFFFFE00:0x200> -// Define base address for Cache Buffers. -#define NAND1_CADR 0x80000000 - -// -// FAT Journal -// Enable FAT Journal in order to guarantee -// fail-safe FAT file system operation. -#define NAND1_FSJ 0 - -// Default Drive [N1:] -// Used when Drive letter not specified -#define NAND1_DEF 0 - -// - -//------------- <<< end of configuration section >>> ----------------------- - -#ifndef __NO_FILE_LIB_C -#include -#endif - -/*---------------------------------------------------------------------------- - * end of file - *---------------------------------------------------------------------------*/ ->>>>>>> cyassl/master diff --git a/IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c b/IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c index 64831708a..a03892045 100644 --- a/IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c +++ b/IDE/MDK-ARM/MDK-ARM/config/RTX_Conf_CM.c @@ -39,11 +39,7 @@ // Set the stack size for tasks which is assigned by the system. // Default: 512 #ifndef OS_STKSIZE -<<<<<<< HEAD #define OS_STKSIZE 499 -======= - #define OS_STKSIZE 250 ->>>>>>> cyassl/master #endif // Check for the stack overflow From 1680b47ac6a9501f3e8c5e0d28a42f4130618fbc Mon Sep 17 00:00:00 2001 From: kojo Date: Sun, 26 May 2013 12:17:06 +0900 Subject: [PATCH 15/16] Release for STM/LPC --- .../MDK-ARM/CyaSSL/config-RTX-TCP-FS.h | 22 +++--- IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt | 29 +++++--- IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj | 50 +++++++++++-- IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt | 70 +++++++++++-------- 4 files changed, 115 insertions(+), 56 deletions(-) diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h index 17b644d79..5a424e0df 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-RTX-TCP-FS.h @@ -127,19 +127,19 @@ // // CertGen -#define MDK_CONF_CERT_GEN 1 +#define MDK_CONF_CERT_GEN 0 #if MDK_CONF_CERT_GEN == 1 #define CYASSL_CERT_GEN #endif // // KeyGen -#define MDK_CONF_KEY_GEN 1 +#define MDK_CONF_KEY_GEN 0 #if MDK_CONF_KEY_GEN == 1 #define CYASSL_KEY_GEN #endif // // CRL -#define MDK_CONF_DER_LOAD 1 +#define MDK_CONF_DER_LOAD 0 #if MDK_CONF_DER_LOAD == 1 #define CYASSL_DER_LOAD #endif @@ -160,7 +160,7 @@ // MD5, SHA, SHA-256, AES, RC4, ASN, RSA // // MD2 -#define MDK_CONF_MD2 1 +#define MDK_CONF_MD2 0 #if MDK_CONF_MD2 == 1 #define CYASSL_MD2 #endif @@ -173,13 +173,13 @@ // // SHA-384 // This has to be with SHA512 -#define MDK_CONF_SHA384 1 +#define MDK_CONF_SHA384 0 #if MDK_CONF_SHA384 == 1 #define CYASSL_SHA384 #endif // // SHA-512 -#define MDK_CONF_SHA512 1 +#define MDK_CONF_SHA512 0 #if MDK_CONF_SHA512 == 1 #define CYASSL_SHA512 #endif @@ -197,7 +197,7 @@ #endif // // HC128 -#define MDK_CONF_HC128 1 +#define MDK_CONF_HC128 0 #if MDK_CONF_HC128 == 1 #define HAVE_HC128 #endif @@ -210,7 +210,7 @@ // // AEAD -#define MDK_CONF_AEAD 1 +#define MDK_CONF_AEAD 0 #if MDK_CONF_AEAD == 1 #define HAVE_AEAD #endif @@ -222,7 +222,7 @@ #endif // // CAMELLIA -#define MDK_CONF_CAMELLIA 1 +#define MDK_CONF_CAMELLIA 0 #if MDK_CONF_CAMELLIA == 1 #define HAVE_CAMELLIA #endif @@ -261,13 +261,13 @@ #endif // // AESCCM (Turn off Hardware Crypt) -#define MDK_CONF_AESCCM 1 +#define MDK_CONF_AESCCM 0 #if MDK_CONF_AESCCM == 1 #define HAVE_AESCCM #endif // // AESGCM (Turn off Hardware Crypt) -#define MDK_CONF_AESGCM 1 +#define MDK_CONF_AESGCM 0 #if MDK_CONF_AESGCM == 1 #define HAVE_AESGCM #define BUILD_AESGCM diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt index bf308949e..eb9077e3e 100644 --- a/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt +++ b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvopt @@ -142,6 +142,13 @@ + + + 1 + 0 + 0x10005960 + + 0 @@ -635,8 +642,8 @@ 0 0 0 - 150 - 156 + 135 + 149 0 ..\MDK-ARM\CyaSSL\main.c main.c @@ -811,8 +818,8 @@ 0 0 0 - 52 - 58 + 54 + 56 0 C:\Keil\ARM\Boards\Keil\MCB4300\RL\FlashFS\SD_File\Serial.c Serial.c @@ -1651,7 +1658,7 @@ 0 0 0 - 147 + 144 151 0 ..\LPC43xx\startup_LPC43xx.s @@ -1673,10 +1680,10 @@ 1 0 0 - 0 + 1 0 - 176 - 182 + 163 + 177 0 ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c cyassl_MDK_ARM.c @@ -1689,10 +1696,10 @@ 1 0 0 - 0 + 8 0 - 53 - 59 + 55 + 62 0 ..\MDK-ARM\CyaSSL\Retarget.c Retarget.c diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj index 498f50a4c..aa30f09ba 100644 --- a/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj +++ b/IDE/MDK-ARM/Projects/MDK-ARM-LCP43xx.uvproj @@ -481,11 +481,6 @@ TCPD_CM3.lib 4 c:\Keil\ARM\RV31\LIB\TCPD_CM3.lib - - - TCP_CM3.lib - 4 - c:\Keil\ARM\RV31\LIB\TCP_CM3.lib 2 @@ -505,6 +500,11 @@ + + TCP_CM3.lib + 4 + c:\Keil\ARM\RV31\LIB\TCP_CM3.lib + Serial.c 1 @@ -839,6 +839,46 @@ Net_Debug.c 1 ..\MDK-ARM\config\Net_Debug.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + + + + + + + + + config-FS.h diff --git a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt index 9489c8c1e..11abf9df1 100644 --- a/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt +++ b/IDE/MDK-ARM/Projects/MDK-ARM-STM32F2xx.uvopt @@ -75,7 +75,7 @@ 0 1 - 255 + 0 SARMCM3.DLL -MPU @@ -138,7 +138,7 @@ 0 ULP2CM3 - -UP1135060 -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO23 -TC10000000 -TP18 -TDX0 -TDD0 -TDS0 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 + -UP1135060 -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO23 -TC10000000 -TP18 -TDX0 -TDD0 -TDS7 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 @@ -227,11 +227,11 @@ 0 - 1 + 0 0 0 - 255 + 0 SARMCM3.DLL -MPU @@ -294,7 +294,7 @@ 0 ULP2CM3 - -UP1135060 -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO23 -TC10000000 -TP18 -TDX0 -TDD0 -TDS0 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 + -UP1135060 -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO23 -TC10000000 -TP18 -TDX0 -TDD0 -TDS7 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 @@ -383,11 +383,11 @@ 0 - 1 + 0 0 0 - 255 + 0 SARMCM3.DLL -MPU @@ -450,7 +450,7 @@ 0 ULP2CM3 - -UP1135060 -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO23 -TC10000000 -TP18 -TDX0 -TDD0 -TDS0 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 + -UP1135060 -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO23 -TC10000000 -TP18 -TDX0 -TDD0 -TDS7 -TDT0 -TDC1F -TIEFFFFFFFF -TIP0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000 @@ -478,7 +478,7 @@ 0 0 1 - 1 + 0 0 0 0 @@ -598,8 +598,8 @@ 0 0 0 - 387 - 396 + 0 + 0 0 ..\MDK-ARM\CyaSSL\shell.c shell.c @@ -614,7 +614,7 @@ 0 0 0 - 135 + 143 149 0 ..\MDK-ARM\CyaSSL\main.c @@ -774,8 +774,8 @@ 0 0 0 - 39 - 73 + 0 + 0 0 c:\Keil\ARM\Boards\Keil\MCBSTM32F200\RL\FlashFS\SD_File\Serial.c Serial.c @@ -1428,10 +1428,10 @@ 1 0 0 - 30 + 0 0 - 560 - 570 + 0 + 0 0 ..\..\..\ctaocrypt\src\random.c random.c @@ -1446,8 +1446,8 @@ 0 0 0 - 1 - 1 + 0 + 0 0 ..\..\..\ctaocrypt\src\ripemd.c ripemd.c @@ -1538,11 +1538,7 @@ Configuration -<<<<<<< HEAD 0 -======= - 1 ->>>>>>> cyassl/master 0 0 0 @@ -1632,7 +1628,7 @@ 5 0 0 - 18 + 0 0 0 0 @@ -1648,7 +1644,7 @@ 5 0 0 - 18 + 0 0 0 0 @@ -1664,7 +1660,7 @@ 5 0 0 - 18 + 0 0 0 0 @@ -1706,8 +1702,8 @@ 0 0 0 - 200 - 216 + 172 + 182 0 ..\MDK-ARM\CyaSSL\cyassl_MDK_ARM.c cyassl_MDK_ARM.c @@ -1722,7 +1718,7 @@ 0 0 0 - 51 + 50 57 0 ..\MDK-ARM\CyaSSL\Retarget.c @@ -1730,6 +1726,22 @@ 0 0 + + 7 + 75 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + ..\STM32F2xx_StdPeriph_Lib\time-STM32F2xx.c + time-STM32F2xx.c + 0 + 0 + From cf25dfb16ee21080d0d3481f791e0813d47b1903 Mon Sep 17 00:00:00 2001 From: kojo Date: Sun, 26 May 2013 14:02:58 +0900 Subject: [PATCH 16/16] Config-BARE-METAL default --- IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h index 680bdaf38..a88e1bca4 100644 --- a/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h +++ b/IDE/MDK-ARM/MDK-ARM/CyaSSL/config-BARE-METAL.h @@ -78,7 +78,7 @@ // STM32 Hardware Crypt // STM32F2 Hardware RNG -#define MDK_CONF_STM32F2_RNG 1 +#define MDK_CONF_STM32F2_RNG 0 #if MDK_CONF_STM32F2_RNG == 1 #define STM32F2_RNG #else