wolfSSL/wolfssl
1
0
Fork 1
mirror of https://github.com/wolfSSL/wolfssl.git synced 2025-07-30 02:37:28 +02:00
Code Issues Packages Projects Releases Wiki Activity

Fix to correct SP 4096-bit enable. Correct nonexistent WOLFSSL_SP_NO_4096, which should be WOLFSSL_SP_4096.

Browse Source
This commit is contained in:
David Garske
2020-06-01 10:49:08 -07:00
parent bfe1760c17
commit b947f69f60
2 changed files with 2 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
wolfcrypt/src/dh.c
View File

@ -1485,7 +1485,7 @@ int wc_DhCheckPubKey_ex(DhKey* key, const byte* pub, word32 pubSz,
} }
else else
#endif #endif
#ifdef WOLFSSL_SP_NO_4096 #ifdef WOLFSSL_SP_4096
if (mp_count_bits(&key->p) == 4096) { if (mp_count_bits(&key->p) == 4096) {
ret = sp_ModExp_4096(y, q, p, y); ret = sp_ModExp_4096(y, q, p, y);
if (ret != 0) if (ret != 0)

3
wolfcrypt/src/sp_int.c
View File

@ -43,7 +43,6 @@
* WOLFSSL_SP_NO_MALLOC: Always use stack, no heap XMALLOC/XFREE allowed * WOLFSSL_SP_NO_MALLOC: Always use stack, no heap XMALLOC/XFREE allowed
* WOLFSSL_SP_NO_2048: Disable RSA/DH 2048-bit support * WOLFSSL_SP_NO_2048: Disable RSA/DH 2048-bit support
* WOLFSSL_SP_NO_3072: Disable RSA/DH 3072-bit support * WOLFSSL_SP_NO_3072: Disable RSA/DH 3072-bit support
* WOLFSSL_SP_NO_4096: Disable RSA/DH 4096-bit support
* WOLFSSL_SP_4096: Enable RSA/RH 4096-bit support * WOLFSSL_SP_4096: Enable RSA/RH 4096-bit support
* WOLFSSL_SP_384 Enable ECC 384-bit SECP384R1 support * WOLFSSL_SP_384 Enable ECC 384-bit SECP384R1 support
* WOLFSSL_SP_NO_256 Disable ECC 256-bit SECP256R1 support * WOLFSSL_SP_NO_256 Disable ECC 256-bit SECP256R1 support
@ -1659,7 +1658,7 @@ int sp_exptmod(sp_int* b, sp_int* e, sp_int* m, sp_int* r)
} }
else else
#endif #endif
#ifdef WOLFSSL_SP_NO_4096 #ifdef WOLFSSL_SP_4096
if ((mBits == 4096) && sp_isodd(m) && (bBits <= 4096) && if ((mBits == 4096) && sp_isodd(m) && (bBits <= 4096) &&
(eBits <= 4096)) { (eBits <= 4096)) {
err = sp_ModExp_4096(b, e, m, r); err = sp_ModExp_4096(b, e, m, r);