diff --git a/.wolfssl_known_macro_extras b/.wolfssl_known_macro_extras index fafab6e0e..61b631e85 100644 --- a/.wolfssl_known_macro_extras +++ b/.wolfssl_known_macro_extras @@ -212,6 +212,7 @@ ESP_PLATFORM ESP_TASK_MAIN_STACK ETHERNET_AVAILABLE EV_TRIGGER +EXTERNAL_LOADER_APP FORCE_FAILURE_GETRANDOM FP_ECC_CONTROL FREERTOS_TCP_WINSIM diff --git a/IDE/Renesas/e2studio/RA6M4/test/src/test_main.c b/IDE/Renesas/e2studio/RA6M4/test/src/test_main.c index b804ffcdc..919471531 100644 --- a/IDE/Renesas/e2studio/RA6M4/test/src/test_main.c +++ b/IDE/Renesas/e2studio/RA6M4/test/src/test_main.c @@ -150,18 +150,27 @@ void Clr_CallbackCtx(FSPSM_ST *g) { (void) g; - #if defined(WOLFSSL_RENESAS_SCEPROTECT_CRYPTONLY) - XFREE(g->wrapped_key_rsapri2048, NULL, DYNAMIC_TYPE_TMP_BUFFER); + if (g == NULL) return; - XFREE(g->wrapped_key_rsapub2048, NULL, DYNAMIC_TYPE_TMP_BUFFER); + if (g->wrapped_key_aes256 != NULL) + g->wrapped_key_aes256 = NULL; - XFREE(g->wrapped_key_rsapri1024, NULL, DYNAMIC_TYPE_TMP_BUFFER); + if (g->wrapped_key_aes128 != NULL) + g->wrapped_key_aes128 = NULL; + + #if defined(WOLFSSL_RENESAS_RSIP_CRYPTONLY) + if (g->wrapped_key_rsapri2048 != NULL) + g->wrapped_key_rsapri2048 = NULL; if (g->wrapped_key_rsapub2048 != NULL) - XFREE(g->wrapped_key_rsapub1024, - NULL, DYNAMIC_TYPE_TMP_BUFFER); + g->wrapped_key_rsapub2048 = NULL; + + if (g->wrapped_key_rsapri1024 != NULL) + g->wrapped_key_rsapri1024 = NULL; + + if (g->wrapped_key_rsapub2048 != NULL) + g->wrapped_key_rsapub2048 = NULL; #endif - XMEMSET(g, 0, sizeof(FSPSM_ST)); } #endif @@ -262,9 +271,6 @@ void sce_test(void) benchmark_test(NULL); printf("End wolfCrypt Benchmark\n"); - /* free */ - Clr_CallbackCtx(&guser_PKCbInfo); - #elif defined(TLS_CLIENT) #include "hal_data.h" #include "r_sce.h" diff --git a/IDE/Renesas/e2studio/RA6M4/test/src/wolfssl_sce_unit_test.c b/IDE/Renesas/e2studio/RA6M4/test/src/wolfssl_sce_unit_test.c index ac359efb9..276a66e88 100644 --- a/IDE/Renesas/e2studio/RA6M4/test/src/wolfssl_sce_unit_test.c +++ b/IDE/Renesas/e2studio/RA6M4/test/src/wolfssl_sce_unit_test.c @@ -37,8 +37,6 @@ #include "FreeRTOS.h" -static const int devId = 7890; - #ifndef NO_SHA int sha_test(); #endif @@ -63,10 +61,9 @@ static byte Aes256_Cbc_multTst_rslt = 0; static byte Aes128_Gcm_multTst_rslt = 0; static byte Aes256_Gcm_multTst_rslt = 0; -int sce_crypt_AesCbc_multitest(); -int sce_crypt_AesGcm_multitest(); -int sce_crypt_Sha_AesCbcGcm_multitest(); -int sce_crypt_sha_multitest(); +int sce_crypt_AesCbc_multitest(int devId); +int sce_crypt_AesGcm_multitest(int devId); +int sce_crypt_Sha_AesCbcGcm_multitest(int devId); int sce_crypt_test(); int sce_crypt_sha256_multitest(); void tskSha256_Test1(void *pvParam); @@ -97,12 +94,13 @@ FSPSM_ST gCbInfo_a; /* for multi testing */ #endif typedef struct tagInfo { + int devId; sce_aes_wrapped_key_t aes_key; } Info; #if defined(HAVE_AES_CBC) && defined(WOLFSSL_AES_128) -static int sce_aes_cbc_test(int prnt, FSPSM_AES_PWKEY aes_key) +static int sce_aes_cbc_test(int prnt, FSPSM_AES_PWKEY aes_key, int devId) { Aes aes[1]; @@ -171,7 +169,7 @@ static void tskAes128_Cbc_Test(void *pvParam) Info *p = (Info*)pvParam; while (exit_loop == 0) { - ret = sce_aes_cbc_test(0, &p->aes_key); + ret = sce_aes_cbc_test(0, &p->aes_key, p->devId); vTaskDelay(10/portTICK_PERIOD_MS); if (ret != 0) { printf(" result was not good(%d). sce_aes_cbc_test\n", ret); @@ -186,7 +184,7 @@ static void tskAes128_Cbc_Test(void *pvParam) #endif #ifdef WOLFSSL_AES_256 -static int sce_aes256_test(int prnt, FSPSM_AES_PWKEY aes_key) +static int sce_aes256_test(int prnt, FSPSM_AES_PWKEY aes_key, int devId) { Aes enc[1]; byte cipher[WC_AES_BLOCK_SIZE]; @@ -269,7 +267,7 @@ static void tskAes256_Cbc_Test(void *pvParam) Info *p = (Info*)pvParam; while (exit_loop == 0) { - ret = sce_aes256_test(0, &p->aes_key); + ret = sce_aes256_test(0, &p->aes_key, p->devId); vTaskDelay(10/portTICK_PERIOD_MS); if (ret != 0) { printf(" result was not good(%d). sce_aes256_test\n", ret); @@ -284,7 +282,7 @@ static void tskAes256_Cbc_Test(void *pvParam) #endif /* WOLFSSL_AES_256 */ #if defined(WOLFSSL_AES_256) -static int sce_aesgcm256_test(int prnt, FSPSM_AES_PWKEY aes256_key) +static int sce_aesgcm256_test(int prnt, FSPSM_AES_PWKEY aes256_key, int devId) { Aes enc[1]; Aes dec[1]; @@ -451,7 +449,7 @@ static void tskAes256_Gcm_Test(void *pvParam) Info *p = (Info*)pvParam; while (exit_loop == 0) { - ret = sce_aesgcm256_test(0, &p->aes_key); + ret = sce_aesgcm256_test(0, &p->aes_key, p->devId); vTaskDelay(10/portTICK_PERIOD_MS); if (ret != 0) { printf(" result was not good(%d). sce_aesgcm256_test\n", ret); @@ -466,7 +464,7 @@ static void tskAes256_Gcm_Test(void *pvParam) #if defined(WOLFSSL_AES_128) -static int sce_aesgcm128_test(int prnt, FSPSM_AES_PWKEY aes128_key) +static int sce_aesgcm128_test(int prnt, FSPSM_AES_PWKEY aes128_key, int devId) { Aes enc[1]; Aes dec[1]; @@ -597,7 +595,7 @@ static void tskAes128_Gcm_Test(void *pvParam) Info *p = (Info*)pvParam; while (exit_loop == 0) { - ret = sce_aesgcm128_test(0, &p->aes_key); + ret = sce_aesgcm128_test(0, &p->aes_key, p->devId); vTaskDelay(10/portTICK_PERIOD_MS); if (ret != 0) { printf(" result was not good(%d). sce_aesgcm128_test\n", ret); @@ -619,7 +617,7 @@ static void tskAes128_Gcm_Test(void *pvParam) #define TEST_STRING_SZ 25 #define RSA_TEST_BYTES 256 /* up to 2048-bit key */ -static int sce_rsa_test(int prnt, int keySize) +static int sce_rsa_test(int prnt, int keySize, int devId) { int ret = 0; @@ -654,7 +652,7 @@ static int sce_rsa_test(int prnt, int keySize) XMEMSET(out, 0, outSz); XMEMSET(out2, 0, outSz); - ret = wc_InitRsaKey_ex(key, NULL, 7890/* fixed devid for TSIP/SCE*/); + ret = wc_InitRsaKey_ex(key, NULL, devId); if (ret != 0) { goto out; } @@ -699,7 +697,7 @@ out: return ret; } -static int sce_rsa_SignVerify_test(int prnt, int keySize) +static int sce_rsa_SignVerify_test(int prnt, int keySize, int devId) { int ret = 0; @@ -730,7 +728,7 @@ static int sce_rsa_SignVerify_test(int prnt, int keySize) XMEMCPY(in, inStr, inLen); XMEMCPY(in2, inStr2, inLen); - ret = wc_InitRsaKey_ex(key, NULL, 7890/* fixed devid for TSIP/SCE*/); + ret = wc_InitRsaKey_ex(key, NULL, devId); if (ret != 0) { goto out; } @@ -781,6 +779,7 @@ static int sce_rsa_SignVerify_test(int prnt, int keySize) int sce_crypt_test() { int ret = 0; + int devId = INVALID_DEVID; fsp_err_t err; Clr_CallbackCtx(&gCbInfo); @@ -817,13 +816,14 @@ int sce_crypt_test() SCE_KeyGeneration(&gCbInfo_a); ret = wc_CryptoCb_CryptInitRenesasCmn(NULL, &gCbInfo); - if ( ret > 0) - ret = 0; - + if ( ret > 0) { + devId = ret; + ret = 0; + } if (ret == 0) { printf(" sce_rsa_test(512)(this will be done" " by SW because SCE doesn't support 512 bits key size.)"); - ret = sce_rsa_test(1, 512); + ret = sce_rsa_test(1, 512, devId); RESULT_STR(ret) } @@ -833,13 +833,13 @@ int sce_crypt_test() gCbInfo.keyflgs_crypt.bits.rsapub1024_installedkey_set = 1; gCbInfo.keyflgs_crypt.bits.rsapri2048_installedkey_set = 0; gCbInfo.keyflgs_crypt.bits.rsapub2048_installedkey_set = 0; - ret = sce_rsa_test(1, 1024); + ret = sce_rsa_test(1, 1024, devId); RESULT_STR(ret) } if (ret == 0) { printf(" sce_rsa_SignVerify_test(1024)"); - ret = sce_rsa_SignVerify_test(1, 1024); + ret = sce_rsa_SignVerify_test(1, 1024, devId); RESULT_STR(ret) } @@ -849,13 +849,13 @@ int sce_crypt_test() gCbInfo.keyflgs_crypt.bits.rsapub1024_installedkey_set = 0; gCbInfo.keyflgs_crypt.bits.rsapri2048_installedkey_set = 1; gCbInfo.keyflgs_crypt.bits.rsapub2048_installedkey_set = 1; - ret = sce_rsa_test(1, 2048); + ret = sce_rsa_test(1, 2048, devId); RESULT_STR(ret) } if (ret == 0 && err == FSP_SUCCESS) { printf(" sce_rsa_SignVerify_test(2048)"); - ret = sce_rsa_SignVerify_test(1, 2048); + ret = sce_rsa_SignVerify_test(1, 2048, devId); RESULT_STR(ret) } @@ -864,16 +864,16 @@ int sce_crypt_test() ret = sha256_test(); RESULT_STR(ret) #endif - ret = sce_aes_cbc_test(1, &g_user_aes128_key_index1); + ret = sce_aes_cbc_test(1, &g_user_aes128_key_index1, devId); if (ret == 0) { - ret = sce_aes256_test(1, &g_user_aes256_key_index1); + ret = sce_aes256_test(1, &g_user_aes256_key_index1, devId); } if (ret == 0) { - ret = sce_aesgcm128_test(1, &g_user_aes128_key_index1); + ret = sce_aesgcm128_test(1, &g_user_aes128_key_index1, devId); } if (ret == 0) { - ret = sce_aesgcm256_test(1, &g_user_aes256_key_index1); + ret = sce_aesgcm256_test(1, &g_user_aes256_key_index1, devId); } printf(" \n"); if (ret == 0) { @@ -882,22 +882,21 @@ int sce_crypt_test() } if (ret == 0) { printf(" multi Aes cbc thread test\n"); - ret = sce_crypt_AesCbc_multitest(); + ret = sce_crypt_AesCbc_multitest(devId); } if (ret == 0) { printf(" multi Aes Gcm thread test\n"); - ret = sce_crypt_AesGcm_multitest(); + ret = sce_crypt_AesGcm_multitest(devId); } if (ret == 0) { printf(" multi sha aescbc aesgcm thread test\n"); - sce_crypt_Sha_AesCbcGcm_multitest(); + sce_crypt_Sha_AesCbcGcm_multitest(devId); } else ret = -1; - #if defined(WOLFSSL_RENESAS_RSIP_CRYPTONLY) - Clr_CallbackCtx(&gCbInfo); - Clr_CallbackCtx(&gCbInfo_a); - #endif + wc_CryptoCb_CleanupRenesasCmn(&devId); + Clr_CallbackCtx(&gCbInfo); + Clr_CallbackCtx(&gCbInfo_a); return ret; } @@ -955,7 +954,7 @@ int sce_crypt_sha256_multitest() sha256_multTst_rslt1 = 0; sha256_multTst_rslt2 = 0; - exit_semaph = xSemaphoreCreateCounting(num, 0); + exit_semaph = xSemaphoreCreateCounting((UBaseType_t)num, 0); xRet = pdPASS; #ifndef NO_SHA256 @@ -994,7 +993,7 @@ int sce_crypt_sha256_multitest() } -int sce_crypt_AesCbc_multitest() +int sce_crypt_AesCbc_multitest(int devId) { int ret = 0; int num = 0; @@ -1015,8 +1014,12 @@ int sce_crypt_AesCbc_multitest() Aes128_Cbc_multTst_rslt = 0; Aes256_Cbc_multTst_rslt = 0; - exit_semaph = xSemaphoreCreateCounting(num, 0); + exit_semaph = xSemaphoreCreateCounting((UBaseType_t)num, 0); xRet = pdPASS; + info_aes1.devId = devId; + info_aes2.devId = devId; + info_aes256_1.devId = devId; + info_aes256_2.devId = devId; #if defined(HAVE_AES_CBC) && defined(WOLFSSL_AES_128) XMEMCPY(&info_aes1.aes_key, &g_user_aes128_key_index1, @@ -1075,7 +1078,7 @@ int sce_crypt_AesCbc_multitest() } -int sce_crypt_AesGcm_multitest() +int sce_crypt_AesGcm_multitest(int devId) { int ret = 0; int num = 0; @@ -1097,9 +1100,12 @@ int sce_crypt_AesGcm_multitest() Aes128_Gcm_multTst_rslt = 0; Aes256_Gcm_multTst_rslt = 0; - exit_semaph = xSemaphoreCreateCounting(num, 0); + exit_semaph = xSemaphoreCreateCounting((UBaseType_t)num, 0); xRet = pdPASS; - + info_aes1.devId = devId; + info_aes2.devId = devId; + info_aes256_1.devId = devId; + info_aes256_2.devId = devId; #if defined(WOLFSSL_AES_128) XMEMCPY(&info_aes1.aes_key, &g_user_aes128_key_index1, sizeof(sce_aes_wrapped_key_t)); @@ -1158,7 +1164,7 @@ int sce_crypt_AesGcm_multitest() return ret; } -int sce_crypt_Sha_AesCbcGcm_multitest() +int sce_crypt_Sha_AesCbcGcm_multitest(int devId) { int ret = 0; int num = 0; @@ -1188,9 +1194,12 @@ int sce_crypt_Sha_AesCbcGcm_multitest() Aes128_Gcm_multTst_rslt = 0; Aes256_Gcm_multTst_rslt = 0; - exit_semaph = xSemaphoreCreateCounting(num, 0); + exit_semaph = xSemaphoreCreateCounting((UBaseType_t)num, 0); xRet = pdPASS; - + info_aes128cbc.devId = devId; + info_aes128gcm.devId = devId; + info_aes256cbc.devId = devId; + info_aes256gcm.devId = devId; #ifndef NO_SHA256 xRet = xTaskCreate(tskSha256_Test1, "sha256_test1", STACK_SIZE, NULL, 3, NULL); diff --git a/IDE/Renesas/e2studio/RX72N/EnvisionKit/Simple/test/src/client/simple_tls_tsip_client.c b/IDE/Renesas/e2studio/RX72N/EnvisionKit/Simple/test/src/client/simple_tls_tsip_client.c index fb2f81c11..c5c19e549 100644 --- a/IDE/Renesas/e2studio/RX72N/EnvisionKit/Simple/test/src/client/simple_tls_tsip_client.c +++ b/IDE/Renesas/e2studio/RX72N/EnvisionKit/Simple/test/src/client/simple_tls_tsip_client.c @@ -32,7 +32,7 @@ #endif #if defined(SIMPLE_TLS_TSIP_CLIENT) || defined(SIMPLE_TLS_CLIENT) -#define SIMPLE_TLSSEVER_IP "192.168.11.11" +#define SIMPLE_TLSSEVER_IP "192.168.11.6" #define SIMPLE_TLSSERVER_PORT "11111" ER t4_tcp_callback(ID cepid, FN fncd , VP p_parblk); @@ -308,10 +308,10 @@ void wolfSSL_TLS_client( ) #else if (ret == 0) { - err = wolfSSL_use_PrivateKey_buffer(ssl, client_key_der_2048, + ret = wolfSSL_use_PrivateKey_buffer(ssl, client_key_der_2048, sizeof_client_key_der_2048, WOLFSSL_FILETYPE_ASN1); - if (err != SSL_SUCCESS) { + if (ret != SSL_SUCCESS) { printf("ERROR wolfSSL_use_PrivateKey_buffer: %d\n", wolfSSL_get_error(ssl, 0)); ret = -1; diff --git a/IDE/Renesas/e2studio/RX72N/EnvisionKit/Simple/test/test.scfg b/IDE/Renesas/e2studio/RX72N/EnvisionKit/Simple/test/test.scfg index c3b4c35b7..020dd9ef3 100644 --- a/IDE/Renesas/e2studio/RX72N/EnvisionKit/Simple/test/test.scfg +++ b/IDE/Renesas/e2studio/RX72N/EnvisionKit/Simple/test/test.scfg @@ -1132,9 +1132,9 @@ - + - + diff --git a/IDE/Renesas/e2studio/RZN2L/README.md b/IDE/Renesas/e2studio/RZN2L/README.md index c53605b79..d3f417548 100644 --- a/IDE/Renesas/e2studio/RZN2L/README.md +++ b/IDE/Renesas/e2studio/RZN2L/README.md @@ -21,37 +21,49 @@ The example project summary is listed below and is relevant for every project. ### Project Summary |Item|Name/Version| |:--|:--| +|e2Studio|2025-04.1 (25.4.1)| |Board|RZN2L| |Device|R9A07G084M08GBG| |Toolchain|GCC for Renesas RZ| |Toolchain Version|10.3.1.20210824| -|FSP Version|1.2.0| +|FSP Version|2.0.0| #### Selected software components |Components|Version|Note| |:--|:--|:--| -|Board Support Package Common Files|v1.20|| -|I/O Port|v1.2.0|| -|Arm CMSIS Version 5 - Core (M)|v5.7.0+renesas.1|| -|Board support package for R9A07G084M04GBG|v1.2.0|Note1| -|Board support package for RZN2L|v1.2.0|| -|Board support package for RZN2L - FSP Data|v1.2.0|| -|RSK+RZN2L Board Support Files (RAM execution without flash memory)|v1.2.0|| -|FreeRTOS - Buffer Allocation 2|v1.2.0|| -|FreeRTOS - Memory Management - Heap 4|v1.2.0|| -|FreeRTOS+TCP|v1.2.0|| -|Ethernet PHY |v1.2.0|| -|Ethernet Selector|v1.2.0|| -|Ethernet|v1.2.0|| -|Ethernet Switch|v1.2.0|| -|SCI UART|v1.2.0|| -|r_ether to FreeRTOS+TCP Wrapper|v1.2.0|| -|Renesas Secure IP Driver|v1.3.0+fsp.1.2.0|Need to contact Renesas to get RSIP module| -|RSIP Engine for RZ/N2L|v1.3.0+fsp.1.2.0|Need to contact Renesas to get RSIP module| +|Board Support Package Common Files|v2.0.0|| +|I/O Port|v2.0.0|| +|Arm CMSIS Version 5 - Core (M)|v5.7.0+renesas.1.fsp.2.0.0|| +|Board support package for R9A07G084M04GBG|v2.0.0|Note1| +|Board support package for RZN2L|v2.0.0|| +|Board support package for RZN2L - FSP Data|v2.0.0|| +|RSK+RZN2L Board Support Files (xSPI0 x1 boot mode)|v2.0.0|| +|FreeRTOS - Buffer Allocation 2|v2.0.0|| +|FreeRTOS - Memory Management - Heap 4|v2.0.0|| +|FreeRTOS+TCP|v2.0.0|| +|Ethernet PHY |v2.0.0|| +|Ethernet Selector|v2.0.0|| +|Ethernet|v2.0.0|| +|Ethernet Switch|v2.0.0|| +|SCI UART|v2.0.0|| +|r_ether to FreeRTOS+TCP Wrapper|v2.0.0|| +|Renesas Secure IP Driver|v1.5.0+fsp.1.3.0|| +|RSIP Engine for RZ/N2L|v1.5.0+fsp.1.3.0|| Note1:\ - To use RSIP driver, a device type should be `R9A07G084M04GBG`. However, choosing `R9A07G084M04GBG` won't allow to select `RSK+RZN2L` board. This example uses LED and external flash memory on `RSK + RZN2L` board. Therefore, the example temporary `R9A07G084M04GBG` for the device type. Updating e2studio or fsp could resolve the issue. + To use RSIP driver, a device type should be `R9A07G084M08GBG`. However, choosing `R9A07G084M04GBG` won't allow to select `RSK+RZN2L` board. This example uses LED and external flash memory on `RSK + RZN2L` board. Therefore, the example temporary `R9A07G084M04GBG` for the device type. Updating e2studio or fsp could resolve the issue. + +## Board Settings +This example program uses `xSPI0 boot`. Therefore, the board's switch and jumper settings required to run the sample program from external flash are shown below. For details on each setting, see the Renesas Starter Kit+ for RZN2L User's Manual. + +|Project|SW4-1|SW4-2|SW4-3|SW4-4|SW4-7| +|:--|:--|:--|:--|:--|:--| +|xSPI0 boot mode|ON|ON|ON|ON|OFF| + +|Project|CN8|CN24| +|:--|:--|:--| +|xSPI0 boot mode|Short 2-3|Short2-3| ## Setup Steps and Build wolfSSL Library @@ -63,7 +75,7 @@ Note1:\ + Click File->New->`RZ/N C/C++ FSP Project`. + Enter project name `dummy_application`. -+ Select Board: to `RSK+RZN2L (RAM execution without flash memory)`. ++ Select Board: to `RSK+RZN2L (xSPI0 x1 boot mode)`. + Select Device: to `R9A07G084M04GBG`. Click Next. + Check to `Executable` + Select FreeRTOS from RTOS selection. Click Finish. @@ -93,31 +105,125 @@ Note1:\ + Click `Generate Project Content` on FSP configuration GUI 3.) Prepare UART to logging - -+ Download Sample package from [BACnet Start-Up](https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/bacnet-start-rzn2l-rsk) ++ Download Example packages from [RZ/N2L Group Example program](https://www.renesas.com/us/en/document/scd/rzn2l-group-example-program?r=1622651) and unzip the archived file. ++ unzip RZN2L_RSK_sci_uart_Rev200.zip ++ unzip RZN2L_RSK_sci_uart_Rev200/basis/gcc/RZN2L_RSK_sci_uart_Rev200a.zip ++ + Copy the following C source files from the project to src/serial_io folder of `test_RZN2L`\ -um_serial_io_uart.c\ -um_serial_io_task_writer.c\ -um_serial_io_cfg.h\ -um_common_api.h\ -um_common_cfg.h\ -um_serial_io.c\ -um_serial_io.h\ -um_serial_io_api.h\ -um_serial_io_internal.h +sio_char.h\ +siochar.c +4.) Prepare loader project ++ Download Example packages from [RZ/N2L Group Example of separating loader program and application program projects](https://www.renesas.com/en/document/scd/11691006?language=en&r=1622651) and unzip the archived file. ++ Unzip `RZN2L_loader_application\gcc\xspi0bootx1\Loader_application_projects.zip ++ Copy `RZN2L_bsp_xspi0bootx1_loader` and `RZN2L_bsp_xspi0bootx1_app` to `\IDE\Renesas\e2studio\RZN2L` folder ++ Import `RZN2L_bsp_xspi0bootx1_loader` from `e2studio` -+ Open um_serial_io_task_writer.c and re-name printf to uart_printf +## Build `test_RZN2L` +1). Modify `fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/startup_core.c`: +ORIGINAL +``` +BSP_TARGET_ARM BSP_ATTRIBUTE_STACKLESS void __Vectors (void) +{ + __asm volatile ( + " ldr pc,=Reset_Handler \n" +``` +==> -3.) Build `test_RZN2L` project +MODIFIED +``` +BSP_TARGET_ARM BSP_ATTRIBUTE_STACKLESS void __Vectors (void) +{ + __asm volatile ( +#if 0 + " ldr pc,=Reset_Handler \n" +#else + " ldr pc,=local_system_init \n" +#endif +``` +1). Modify `fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c`: -## Run `test_RZN2L` +ORIGINAL +``` +void SystemInit (void) +{ +#if BSP_CFG_EARLY_INIT +... +#if BSP_CFG_C_RUNTIME_INIT -1). Right click the project and Select menu `Debug` -> `Renesas GDB Hardware debugging` + /* Copy the loader data from external Flash to internal RAM. */ + bsp_loader_data_init(); -2). Select J-Link ARM and R9A07G084M04 + /* Clear loader bss section in internal RAM. */ + bsp_loader_bss_init(); +#endif +... +#if !(BSP_CFG_RAM_EXECUTION) -3). Break at Entry point. Change `cpsr` register value from 0xXXXXX1yy to 0xXXXXX1da + /* Copy the application program from external Flash to internal RAM. */ + bsp_copy_to_ram(); + + /* Clear bss section in internal RAM. */ + bsp_application_bss_init(); +#endif +... +} +``` + +==> + +MODIFIED +``` +BSP_TARGET_ARM void mpu_cache_init (void) +{ +... +if BSP_CFG_C_RUNTIME_INIT && !defined(EXTERNAL_LOADER_APP) + + /* Copy the loader data from external Flash to internal RAM. */ + bsp_loader_data_init(); + + /* Clear loader bss section in internal RAM. */ + bsp_loader_bss_init(); +#endif +... +#if !(BSP_CFG_RAM_EXECUTION) && !defined(EXTERNAL_LOADER_APP) + + /* Copy the application program from external Flash to internal RAM. */ + /* bsp_copy_to_ram(); */ + + /* Clear bss section in internal RAM. */ + bsp_application_bss_init(); +#endif +... +} +``` +2). Copy contenst of `fsp_xspi0_boot_app.ld` of `RZN2L_bsp_xspi0bootx1_app\script\` to `test_RZN2L\script\fsp_xspi0_boot.ld` + +3). Right click the project and Select menu `Debug` -> `Renesas GDB Hardware debugging` + +4). Select J-Link ARM and R9A07G084M04 +5). Build `test_RZN2L` + +## Build loader project ++ Modify `src/Flash_section.s`: + +ORIGINAL +``` +.incbin "../../RZN2L_bsp_xspi0bootx1_app/Debug/RZN2L_bsp_xspi0bootx1_app.bin" +``` + +==> + +MODIFIED +``` +.incbin "../../test/Debug/test_RZN2L.bin" +``` ++ Modify `Load Image and Symbol`. Open `Debug Configuration` -> Open `Startup` tab -> Replace `RZN2L_bsp_xspi0bootx1_app.elf` to `test_RZN2L.elf` + +## Run loader and `test_RZN2L` ++ Run the loader project ++ Loader download `test_RZN2L` binary from flash to system ram and execute it. ++ Note: It recommends to re-build the loader project when re-building `test_RZN2L` ## Run TLS 1.3 Client 1.) Enable `WOLFSSL_TLS13` macro in `user_settings.h` diff --git a/IDE/Renesas/e2studio/RZN2L/common/user_settings.h b/IDE/Renesas/e2studio/RZN2L/common/user_settings.h index 345f9b150..8aa255aea 100644 --- a/IDE/Renesas/e2studio/RZN2L/common/user_settings.h +++ b/IDE/Renesas/e2studio/RZN2L/common/user_settings.h @@ -20,6 +20,7 @@ */ /* Operating Environment and Threading */ #if defined(WOLFSSL_RENESAS_RSIP) + #define WOLFSSL_RENESAS_RZFSP_VER 200 /* FSP SM stands for Flexible Software Package Security Module * WOLFSSL_RENESAS_FSPSM enables fundamental code when it uses. * e.g. Open/Close/Random generator @@ -104,7 +105,9 @@ #endif #if defined(WOLFSSL_RENESAS_RSIP_CRYPTONLY) + #define WOLF_CRYPTO_CB_RSA_PAD #define WOLFSSL_KEY_GEN + #define RSA_MIN_SIZE 512 #endif int uart_printf (const char *__restrict format, ...); @@ -112,4 +115,7 @@ int uart_printf (const char *__restrict format, ...); #define printf uart_printf #define TEST_SLEEP() vTaskDelay(50) +#if defined(WOLFSSL_RENESAS_RSIP) #define CUSTOM_RAND_GENERATE_BLOCK wc_fspsm_GenerateRandBlock +#endif + diff --git a/IDE/Renesas/e2studio/RZN2L/include.am b/IDE/Renesas/e2studio/RZN2L/include.am index 88ccadfc7..7ffb5eebc 100644 --- a/IDE/Renesas/e2studio/RZN2L/include.am +++ b/IDE/Renesas/e2studio/RZN2L/include.am @@ -7,10 +7,11 @@ EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/.cproject EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/.project EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/rzn2l_tst_thread_entry.c EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/wolfssl_dummy.c +EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/local_system_init.c EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/test/wolf_client.c EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/test/wolf_server.c EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/test/wolfssl_rsip_unit_test.c -EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/serial_io/.gitignore +EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/serial_io/app_print.c EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/wolfCrypt/.gitignore EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/test/src/wolfSSL/.gitignore EXTRA_DIST+= IDE/Renesas/e2studio/RZN2L/common/wolfssl_demo.h diff --git a/IDE/Renesas/e2studio/RZN2L/test/.cproject b/IDE/Renesas/e2studio/RZN2L/test/.cproject index 98caa7842..561cbf7d7 100644 --- a/IDE/Renesas/e2studio/RZN2L/test/.cproject +++ b/IDE/Renesas/e2studio/RZN2L/test/.cproject @@ -43,7 +43,7 @@ @@ -154,7 +184,7 @@