Sean Parkinson
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70854b8eec
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Allow the CPU Id flags to be programmatically set
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2020-09-04 09:01:27 +10:00 |
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Sean Parkinson
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75c14e4c8e
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Only use Intel instruction movbe when available
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2020-04-20 09:09:45 +10:00 |
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Chris Conlon
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45c5a2d39c
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update copyright to 2020
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2020-01-03 15:06:03 -08:00 |
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Jacob Barthelmeh
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171902f1fb
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change detection of AESNI support to read bit 25 from ECX
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2019-09-05 17:02:44 -06:00 |
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John Safranek
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246c444b93
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Updates for v4.0.0
Update the copyright dates on all the source files to the current year.
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2019-03-15 10:37:36 -07:00 |
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Tim
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59067825fc
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Update cpuid.c to optimize intelasm for performance
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2018-06-06 16:44:46 -06:00 |
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David Garske
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b8cc132e99
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Added ability to force 32-bit mode using --enable-32bit. Added ability to disable all inline asembly using --disable-asm. Added check for __EMSCRIPTEN__ define in types.h to properly setup 64-bit type. Fixes for build combinations with SHA512 and CHACHA20.
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2017-11-06 14:37:34 -08:00 |
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David Garske
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911b6f95f8
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Release v3.12.2 (lib 14.0.0). Updated copywright.
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2017-10-22 15:58:35 -07:00 |
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Sean Parkinson
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90f8f67982
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Single Precision maths for RSA (and DH)
Single Precision ECC implementation
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2017-10-17 08:36:39 +10:00 |
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Sean Parkinson
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6a226efd15
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MSVC fix around cpuid check
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2017-09-01 08:43:28 +10:00 |
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Sean Parkinson
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d452f97e99
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Fix cpuid to work with different configs
Fix 'may be uninitialized' warning in aes.c
Fix memory overwrite in AES-CBC when using AESNI.
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2017-07-28 08:41:49 +10:00 |
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Sean Parkinson
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8e38dcc347
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Tidy code up - use local static for cpuid flags
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2017-07-25 08:50:39 +10:00 |
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Sean Parkinson
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bde6a35ac4
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Assembly optimization for AES-NI, and AVX1 and AVX2
Unroll the loop for 8.
Use new optimized maths.
Fix SHA-384 to use SHA-512 assembly code.
Only perform CPU id check in one place.
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2017-07-25 08:50:39 +10:00 |
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