Make a separate AES for IAR that has AES_encrypt_block and
AES_decrypt_block inlined. Default code is relying on compiler to use
specific registers and not modify others.
Improve performance of small SP ASM code for RSA.
memcached support: add required functions/defines.
Fix running unit test when defining DEBUG_WOLFSSL_VERBOSE without OPENSSL_EXTRA.
Break out session_id_context APIs into separate option WOLFSSL_SESSION_ID_CTX, so they can be used without OPENSSL_EXTRA.
Make wolfSSL_ERR_get_error and wolfSSL_CTX_set_mode available for memcached.
Add --enable-memcached.
Include required defines for memcached.
Revert unit test fix, no longer needed.
Add Github actions test for memcached. Stop defining DEBUG_WOLFSSL_VERBOSE for memcached.
Add auto retry to writes.
Memcached CI: correct libevent package name.
Memcached CI: Add pkgconfig path for Github CI wolfSSL prefix.
memcached: Fix WOLFSSL_OP_NO_RENEGOTIATION going outside of int bounds, add LD_LIBRARY_PATH for memcached CI test.
memcached CI: Use correct path for wolfSSL
memcached: Add required perl dependency for SSL tests
memcached: Update to 1.6.22
memcached: actually test tls
memcached: Update wolfSSL_SSL_in_before to be side agnostic.
SECP112r2 and SECP128R2 are Koblitz curves, so don't compile them in
unless HAVE_ECC_KOBLITZ is defined. This requires custom curves which
enables point doubling to support A != -3.
When using Zephyr, we also want to use the proper wc_GenerateSeed
method. However, if one of the defines is set (e.g., NO_STM32_RNG), the
Zephyr option is ignored, although it would work. Hence, we have to
change the order in which these settings for the source of a random seed
are evaluated.
Signed-off-by: Tobias Frauenschläger <t.frauenschlaeger@me.com>
For ASN date validation, the actual wall clock time is needed from an
RTC. This commit adds support to read the RTC time in case it is
available in the Zephyr system. If the RTC is not available or an error
occurs during the readout, we fallback to the old implementation which
only supports relative time since boot.
Signed-off-by: Tobias Frauenschläger <t.frauenschlaeger@me.com>
GCC doesn't like explicit wide branch instruction but will use
appropriate instruction implicitly.
IAR won't widen branch instruction unless explicitly told.
IAR doesn't parse register variable declarations with specified
registers. IAR doesn't even honor the register keyword.
Can use small negative but IAR doesn't like it.
Specify the positive value instead.
Add a small code size version of mont_reduce_full using umlal and umaal.
Make 'asm' usage in variables use keyword '__asm__'.
Explicitly don't inline some functions when compiling with IAR.
JacobBarthelmeh
gojimmypi
Eric Blankenhorn
Sean Parkinson
Kareem
David Garske
Anthony Hu
Daniel Pouzzner
Lealem Amedie
Tobias Frauenschläger
SKlimaRA
Stanislav Klima