Commit Graph

24 Commits

Author SHA1 Message Date
Sean Parkinson fc433b2596 ASM files: generation script refactor output
Refactors the output format of generated assembly files across all
platforms
(x86_64, ARM AArch64, ARMv8-32, Thumb2, PowerPC) for consistency and
  correctness.

  Changes

  Data constant consolidation
- Pack multiple values per directive line (e.g., 4× .long or 8× .short
per
line) instead of one value per line, reducing file sizes significantly
- Normalize hex literal formatting: 64-bit values use full 8-byte
zero-padded
form (e.g., 0x0000000003ffffff instead of 0x3ffffff)

  x86_64 assembly
- Use decimal immediate values for shift counts (e.g., $1 instead of
$0x01)
- .asm (MASM): use hex notation consistently for data constants;
update ALIGN
values to match data width (e.g., ALIGN 32 for 256-bit aligned data)

  ARM .S files
- Move .type directive before .section for data objects (correct
ordering per
ELF convention)

ARM/Thumb2 inline C (_c.c) files
  - Replace asm( with __asm__( for register variable constraints (better
portability)
- Add XALIGNED(8) attribute to constant lookup tables used in inline
asm
- Remove redundant #include <stdint.h> and
<wolfssl/wolfcrypt/libwolfssl_sources.h> headers

Files affected: 71 assembly and companion C files across
wolfcrypt/src/,
wolfcrypt/src/port/arm/, covering AES, ChaCha, Poly1305,
SHA-256/512/3,
  Curve25519, ML-KEM, ML-DSA, and SP math routines.
2026-04-17 09:38:57 +10:00
Sean Parkinson ec958de649 ASM generation fixes
Many comment fixes, label renaming and non-functional changes.

  Bug Fixes

x86_64 (aes_xts_asm.S/.asm)

- Removed a spurious movl %edx, %eax that was clobbering a register,
then
fixed two comparisons to use %edx instead of the now-stale %eax. This
was a
functional bug in AES-XTS key-rounds selection.

x86_64 (fe_x25519_asm.S)

- Changed xor %rbx, %rbx → xorq %rbx, %rbx (explicit 64-bit operand
size
suffix).

ARM32 (sp_arm32.c, sp_cortexm.c)

- Fixed typo in assembly label names: sub_in_pkace → sub_in_place
(both label
definitions and branch targets). Affected 2048-bit and 3072-bit SP
functions.
- Fixed wrong source register in multiply/accumulate sequences: r11 →
r7 and
r3 → r4 (functional register-use bugs).

ARM32 ChaCha (armv8-32-chacha-asm.S/_c.c)

- Fixed label typo: same_keyb_ytes → same_key_bytes
- Fixed NEON instruction syntax: vrev32.i16 → vrev32.16 (invalid
mnemonic →
correct ARM NEON form, affects multiple sites)

ARM32 SHA3 (armv8-32-sha3-asm_c.c, .S)

- Fixed symbol name typo: L_sha3_arm2_neon_rt / L_sha3_arm2_rt →
L_sha3_arm32_neon_rt / L_sha3_arm32_rt

ARM32 AES (armv8-32-aes-asm_c.c, thumb2-aes-asm_c.c, .S variants)

- Fixed #endif comment: WOLFSSL_ARMASM_AES_BLOCK_INLINE →
  !WOLFSSL_ARMASM_AES_BLOCK_INLINE (logic inversion was missing from the
comment)

ARM64 ChaCha (armv8-chacha-asm_c.c/.S)

- Fixed label typo: arm64loop_lt_8 → arm64_loop_lt_8

ARM32 ML-KEM (armv8-32-mlkem-asm.S/_c.c)

- Fixed #endif comment typo: WOLFSLS_ARM_ARCH → WOLFSSL_ARM_ARCH
(across many
  occurrences)

SHA-512 (sha512_asm.S)

- Corrected off-by-one in comments: msg_sched done: 0-3 → 0-1, 2-5 →
2-3, etc.
   (only 2 entries scheduled per block, not 4)
2026-03-20 11:56:25 +10:00
JacobBarthelmeh a156ed7bc7 update Copyright year 2026-02-18 09:52:21 -07:00
Sean Parkinson 648a057147 ML-DSA/Dilithium: Intel x64 ASM
Optimize code knowing it is for Intel x64.
Change signing to calculate one polynomial at a time so that if it isn't
valid then we fail early.
Other minor improvements.
Move the SHA-3 4 blocks at a time assembly into SHA-3 asm file.
Make constants in assembly the same length (front pad with zeros).
2025-08-07 14:01:50 +10:00
JacobBarthelmeh 629c5b4cf6 updating license from GPLv2 to GPLv3 2025-07-10 16:11:36 -06:00
Daniel Pouzzner 3465dde0bb synchronize with scripts#480 (except wolfcrypt/src/sp_arm32.c and wolfcrypt/src/sp_cortexm.c, which have large unrelated desyncs). 2025-04-04 21:41:29 -05:00
Sean Parkinson e90e3aa7c6 Intel AVX1/SSE2 ASM: no ymm/zmm regs no vzeroupper
vzeroupper instruction not needed to be invoked unless ymm or zmm
registers are used.
2025-02-20 22:35:20 +10:00
JacobBarthelmeh 2c24291ed5 update copyright date 2025-01-21 09:55:03 -07:00
JacobBarthelmeh 31a6a2bf59 update copyright to 2024 2024-07-19 13:15:05 -06:00
Sean Parkinson 3ea0fb30dd AES XTS x64 ASM: add AVX1 and AESNI implementations
Adding AES-XTS AVX1 and AESNI implementations.
Fix name in comment at top of x64 assembly files.
2023-09-28 14:44:23 -05:00
Jacob Barthelmeh 9dcc48c8f7 update copyright to 2023 2022-12-30 17:12:11 -07:00
Hayden Roche e3ced9f9ae Make some improvements to user_settings_asm.h.
For the CMake and autotools flows, enabling user_settings.h will define the
macro WOLFSSL_USER_SETTINGS_ASM. This will cause the generated
user_settings_asm.h to be included in the .S assembly files. If the user is
building without autotools or CMake, these files will include user_settings.h
directly, unless WOLFSSL_USER_SETTINGS_ASM is defined.
2022-10-18 09:20:06 -07:00
Hayden Roche 3bcd4b45df Generate an assembler-safe user_settings.h in configure.ac and CMakeLists.txt.
For user_settings.h builds, .S assembly files need to include user_settings.h
in order to get the defines used by the build. However, a user_settings.h may
contain code only understood by a C compiler and not the assembler (e.g. a
typedef). This commit makes it so our autotools and CMake builds produce a file
user_settings_asm.h when doing a user_settings.h build. This generated header
contains only the preprocessor directives from the user_settings.h. As a result,
it can be safely included by our assembly code files.
2022-10-03 16:00:32 -07:00
Sean Parkinson ce8959ea77 SHA-3 improvements
Add x86_64 assembly code:
  - BMI2
  - AVX2 (using ymm, slower than BMI2)
  - AVX2 of 4 similtaneous hashes
Add SHAKE128 functions and tests.
Add Absorb and Squeeze functions for SHAKE128 and SHAK256 and tests.
Add doxygen for SHA-3 and SHAKE functions.
Update other generated x86_64 assembly files to include settings.h.
2022-09-01 17:11:58 +10:00
Jacob Barthelmeh 8eaa85e412 update copyright year to 2022 2022-07-19 10:44:31 -06:00
Jacob Barthelmeh c729318ddd update copyright date 2021-03-11 13:42:46 +07:00
Sean Parkinson 2862a9ce56 SP modinv: add non-constant time modinv
Can only be used in ECC verify - sign operation must be constant time.
Not used for small code.
2020-12-10 09:24:22 +10:00
Sean Parkinson 235ea98b90 SHA-512 AVX2: use register for wk other than rsp
Valgrind thinks that stack values are uninitialised when the stack
pointer is added to.
The asm code was moving rsp around rather than use another register.
Put length to hash onto stack and use that register instead.
2020-11-04 12:02:34 +10:00
Sean Parkinson e8e455bf39 Add section to asm files to avoid exe stack
For Linux ELF need a note section for GNU to indicate stack is not
executable.
2020-06-23 11:58:46 +10:00
Chris Conlon 45c5a2d39c update copyright to 2020 2020-01-03 15:06:03 -08:00
Sean Parkinson 8454bd1077 Fix Poly1305 on Intel AVX2
Fix define checks for other x86_64 assembly code files
2019-08-16 17:42:19 +10:00
John Safranek 246c444b93 Updates for v4.0.0
Update the copyright dates on all the source files to the current year.
2019-03-15 10:37:36 -07:00
Sean Parkinson 16f31cf8c6 Get Mac OS X working with the x86_64 assembly files 2019-02-15 15:08:47 +10:00
Sean Parkinson 7822cef1ac Pull out x86_64 ASM into separate files 2019-01-29 13:08:24 +10:00