night1rider 0066461776 Xilinx Versal Gen2 ASU port: split AES-CTR at the 32-bit counter wrap and carry in software to keep it on hardware

2026-08-08 14:35:12 -06:00

..

benchmark

wolfcrypt/src/falcon.c, configure.ac, wolfcrypt/benchmark/benchmark.c, wolfcrypt/test/test.h, wolfcrypt/test/test.c: Falcon fixes and cleanups:

2026-08-05 13:53:46 -05:00

src

Xilinx Versal Gen2 ASU port: split AES-CTR at the 32-bit counter wrap and carry in software to keep it on hardware

2026-08-08 14:35:12 -06:00

test

Xilinx Versal Gen2 ASU port: split AES-CTR at the 32-bit counter wrap and carry in software to keep it on hardware

2026-08-08 14:35:12 -06:00