mirror of
https://github.com/wolfSSL/wolfssl.git
synced 2026-01-27 05:22:20 +01:00
412 lines
15 KiB
C
412 lines
15 KiB
C
/* cpuid.c
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*
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* Copyright (C) 2006-2025 wolfSSL Inc.
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*
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* This file is part of wolfSSL.
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*
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* wolfSSL is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* wolfSSL is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
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*/
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#include <wolfssl/wolfcrypt/libwolfssl_sources.h>
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#include <wolfssl/wolfcrypt/cpuid.h>
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#if defined(HAVE_CPUID) || defined(HAVE_CPUID_INTEL) || \
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defined(HAVE_CPUID_AARCH64)
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static cpuid_flags_atomic_t cpuid_flags = WC_CPUID_ATOMIC_INITIALIZER;
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#endif
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#if defined(HAVE_CPUID_INTEL) && defined(WOLFSSL_SGX)
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/* @TODO calling cpuid from a trusted enclave needs additional hardening.
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* For initial benchmarking, the cpu support is getting hard set.
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* Another thing of note is cpuid calls cause a SIGILL signal, see
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* github issue #5 on intel/intel-sgx-ssl */
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/* For tying in an actual external call to cpuid this header and function
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* call would be used :
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* #include <sgx_cpuid.h>
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* #define cpuid(reg, leaf, sub) sgx_cpuidex((reg),(leaf),(sub))
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*/
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void cpuid_set_flags(void)
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{
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if (WOLFSSL_ATOMIC_LOAD(cpuid_flags) == WC_CPUID_INITIALIZER) {
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cpuid_flags_t new_cpuid_flags = 0,
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old_cpuid_flags = WC_CPUID_INITIALIZER;
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new_cpuid_flags |= CPUID_AVX1;
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new_cpuid_flags |= CPUID_AVX2;
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new_cpuid_flags |= CPUID_BMI2;
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new_cpuid_flags |= CPUID_RDSEED;
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new_cpuid_flags |= CPUID_AESNI;
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new_cpuid_flags |= CPUID_ADX;
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new_cpuid_flags |= CPUID_MOVBE;
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new_cpuid_flags |= CPUID_BMI1;
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(void)wolfSSL_Atomic_Uint_CompareExchange
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(&cpuid_flags, &old_cpuid_flags, new_cpuid_flags);
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}
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}
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#elif defined(HAVE_CPUID_INTEL)
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/* Each platform needs to query info type 1 from cpuid to see if aesni is
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* supported. Also, let's setup a macro for proper linkage w/o ABI conflicts
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*/
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#ifndef _MSC_VER
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#define cpuid(reg, leaf, sub)\
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__asm__ __volatile__ ("cpuid":\
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"=a" ((reg)[0]), "=b" ((reg)[1]), "=c" ((reg)[2]), "=d" ((reg)[3]) :\
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"a" (leaf), "c"(sub));
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#else
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#include <intrin.h>
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#define cpuid(a,b,c) __cpuidex((int*)a,b,c)
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#endif /* _MSC_VER */
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#define EAX 0
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#define EBX 1
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#define ECX 2
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#define EDX 3
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static cpuid_flags_t cpuid_flag(word32 leaf, word32 sub, word32 num, word32 bit)
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{
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int got_intel_cpu = 0;
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int got_amd_cpu = 0;
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unsigned int reg[5];
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XMEMSET(reg, '\0', sizeof(reg));
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cpuid(reg, 0, 0);
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/* check for Intel cpu */
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if (XMEMCMP((char *)&(reg[EBX]), "Genu", 4) == 0 &&
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XMEMCMP((char *)&(reg[EDX]), "ineI", 4) == 0 &&
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XMEMCMP((char *)&(reg[ECX]), "ntel", 4) == 0) {
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got_intel_cpu = 1;
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}
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/* check for AMD cpu */
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if (XMEMCMP((char *)&(reg[EBX]), "Auth", 4) == 0 &&
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XMEMCMP((char *)&(reg[EDX]), "enti", 4) == 0 &&
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XMEMCMP((char *)&(reg[ECX]), "cAMD", 4) == 0) {
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got_amd_cpu = 1;
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}
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if (got_intel_cpu || got_amd_cpu) {
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cpuid(reg, leaf, sub);
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return ((reg[num] >> bit) & 0x1);
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}
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return 0;
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}
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static WC_INLINE void cpuid_set_flags(void)
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{
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if (WOLFSSL_ATOMIC_LOAD(cpuid_flags) == WC_CPUID_INITIALIZER) {
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cpuid_flags_t new_cpuid_flags = 0,
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old_cpuid_flags = WC_CPUID_INITIALIZER;
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if (cpuid_flag(1, 0, ECX, 28)) { new_cpuid_flags |= CPUID_AVX1 ; }
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if (cpuid_flag(7, 0, EBX, 5)) { new_cpuid_flags |= CPUID_AVX2 ; }
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if (cpuid_flag(7, 0, EBX, 8)) { new_cpuid_flags |= CPUID_BMI2 ; }
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if (cpuid_flag(1, 0, ECX, 30)) { new_cpuid_flags |= CPUID_RDRAND; }
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if (cpuid_flag(7, 0, EBX, 18)) { new_cpuid_flags |= CPUID_RDSEED; }
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if (cpuid_flag(1, 0, ECX, 25)) { new_cpuid_flags |= CPUID_AESNI ; }
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if (cpuid_flag(7, 0, EBX, 19)) { new_cpuid_flags |= CPUID_ADX ; }
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if (cpuid_flag(1, 0, ECX, 22)) { new_cpuid_flags |= CPUID_MOVBE ; }
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if (cpuid_flag(7, 0, EBX, 3)) { new_cpuid_flags |= CPUID_BMI1 ; }
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if (cpuid_flag(7, 0, EBX, 29)) { new_cpuid_flags |= CPUID_SHA ; }
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(void)wolfSSL_Atomic_Uint_CompareExchange
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(&cpuid_flags, &old_cpuid_flags, new_cpuid_flags);
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}
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}
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#elif defined(HAVE_CPUID_AARCH64)
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#define CPUID_AARCH64_FEAT_AES ((word64)1 << 4)
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#define CPUID_AARCH64_FEAT_AES_PMULL ((word64)1 << 5)
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#define CPUID_AARCH64_FEAT_SHA256 ((word64)1 << 12)
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#define CPUID_AARCH64_FEAT_SHA256_512 ((word64)1 << 13)
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#define CPUID_AARCH64_FEAT_RDM ((word64)1 << 28)
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#define CPUID_AARCH64_FEAT_SHA3 ((word64)1 << 32)
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#define CPUID_AARCH64_FEAT_SM3 ((word64)1 << 36)
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#define CPUID_AARCH64_FEAT_SM4 ((word64)1 << 40)
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#ifdef WOLFSSL_AARCH64_PRIVILEGE_MODE
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/* https://developer.arm.com/documentation/ddi0601/2024-09/AArch64-Registers
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* /ID-AA64ISAR0-EL1--AArch64-Instruction-Set-Attribute-Register-0 */
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static WC_INLINE void cpuid_set_flags(void)
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{
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if (WOLFSSL_ATOMIC_LOAD(cpuid_flags) == WC_CPUID_INITIALIZER) {
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cpuid_flags_t new_cpuid_flags = 0,
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old_cpuid_flags = WC_CPUID_INITIALIZER;
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word64 features;
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__asm__ __volatile (
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"mrs %[feat], ID_AA64ISAR0_EL1\n"
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: [feat] "=r" (features)
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:
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:
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);
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if (features & CPUID_AARCH64_FEAT_AES)
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new_cpuid_flags |= CPUID_AES;
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if (features & CPUID_AARCH64_FEAT_AES_PMULL) {
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new_cpuid_flags |= CPUID_AES;
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new_cpuid_flags |= CPUID_PMULL;
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}
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if (features & CPUID_AARCH64_FEAT_SHA256)
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new_cpuid_flags |= CPUID_SHA256;
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if (features & CPUID_AARCH64_FEAT_SHA256_512)
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new_cpuid_flags |= CPUID_SHA256 | CPUID_SHA512;
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if (features & CPUID_AARCH64_FEAT_RDM)
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new_cpuid_flags |= CPUID_RDM;
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if (features & CPUID_AARCH64_FEAT_SHA3)
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new_cpuid_flags |= CPUID_SHA3;
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if (features & CPUID_AARCH64_FEAT_SM3)
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new_cpuid_flags |= CPUID_SM3;
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if (features & CPUID_AARCH64_FEAT_SM4)
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new_cpuid_flags |= CPUID_SM4;
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(void)wolfSSL_Atomic_Uint_CompareExchange
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(&cpuid_flags, &old_cpuid_flags, new_cpuid_flags);
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}
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}
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#elif defined(__linux__)
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/* https://community.arm.com/arm-community-blogs/b/operating-systems-blog/
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* posts/runtime-detection-of-cpu-features-on-an-armv8-a-cpu */
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#include <sys/auxv.h>
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#include <asm/hwcap.h>
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static WC_INLINE void cpuid_set_flags(void)
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{
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if (WOLFSSL_ATOMIC_LOAD(cpuid_flags) == WC_CPUID_INITIALIZER) {
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cpuid_flags_t new_cpuid_flags = 0,
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old_cpuid_flags = WC_CPUID_INITIALIZER;
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word64 hwcaps = getauxval(AT_HWCAP);
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#ifndef WOLFSSL_ARMASM_NO_HW_CRYPTO
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if (hwcaps & HWCAP_AES)
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new_cpuid_flags |= CPUID_AES;
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if (hwcaps & HWCAP_PMULL)
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new_cpuid_flags |= CPUID_PMULL;
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if (hwcaps & HWCAP_SHA2)
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new_cpuid_flags |= CPUID_SHA256;
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#endif
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#ifdef WOLFSSL_ARMASM_CRYPTO_SHA512
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if (hwcaps & HWCAP_SHA512)
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new_cpuid_flags |= CPUID_SHA512;
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#endif
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#if defined(HWCAP_ASIMDRDM) && !defined(WOLFSSL_AARCH64_NO_SQRDMLSH)
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if (hwcaps & HWCAP_ASIMDRDM)
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new_cpuid_flags |= CPUID_RDM;
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#endif
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#ifdef WOLFSSL_ARMASM_CRYPTO_SHA3
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if (hwcaps & HWCAP_SHA3)
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new_cpuid_flags |= CPUID_SHA3;
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#endif
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#ifdef WOLFSSL_ARMASM_CRYPTO_SM3
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if (hwcaps & HWCAP_SM3)
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new_cpuid_flags |= CPUID_SM3;
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#endif
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#ifdef WOLFSSL_ARMASM_CRYPTO_SM4
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if (hwcaps & HWCAP_SM4)
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new_cpuid_flags |= CPUID_SM4;
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#endif
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(void)hwcaps;
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(void)wolfSSL_Atomic_Uint_CompareExchange
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(&cpuid_flags, &old_cpuid_flags, new_cpuid_flags);
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}
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}
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#elif defined(__ANDROID__) || defined(ANDROID)
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/* https://community.arm.com/arm-community-blogs/b/operating-systems-blog/
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* posts/runtime-detection-of-cpu-features-on-an-armv8-a-cpu */
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#include "cpu-features.h"
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static WC_INLINE void cpuid_set_flags(void)
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{
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if (WOLFSSL_ATOMIC_LOAD(cpuid_flags) == WC_CPUID_INITIALIZER) {
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cpuid_flags_t new_cpuid_flags = 0,
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old_cpuid_flags = WC_CPUID_INITIALIZER;
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word64 features = android_getCpuFeatures();
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if (features & ANDROID_CPU_ARM_FEATURE_AES)
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new_cpuid_flags |= CPUID_AES;
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if (features & ANDROID_CPU_ARM_FEATURE_PMULL)
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new_cpuid_flags |= CPUID_PMULL;
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if (features & ANDROID_CPU_ARM_FEATURE_SHA2)
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new_cpuid_flags |= CPUID_SHA256;
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(void)wolfSSL_Atomic_Uint_CompareExchange
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(&cpuid_flags, &old_cpuid_flags, new_cpuid_flags);
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}
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}
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#elif defined(__APPLE__)
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/* https://developer.apple.com/documentation/kernel/1387446-sysctlbyname/
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* determining_instruction_set_characteristics */
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#include <sys/sysctl.h>
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static word64 cpuid_get_sysctlbyname(const char* name)
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{
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word64 ret = 0;
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size_t size = sizeof(ret);
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sysctlbyname(name, &ret, &size, NULL, 0);
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return ret;
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}
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static WC_INLINE void cpuid_set_flags(void)
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{
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if (WOLFSSL_ATOMIC_LOAD(cpuid_flags) == WC_CPUID_INITIALIZER) {
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cpuid_flags_t new_cpuid_flags = 0,
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old_cpuid_flags = WC_CPUID_INITIALIZER;
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if (cpuid_get_sysctlbyname("hw.optional.arm.FEAT_AES") != 0)
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new_cpuid_flags |= CPUID_AES;
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if (cpuid_get_sysctlbyname("hw.optional.arm.FEAT_PMULL") != 0)
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new_cpuid_flags |= CPUID_PMULL;
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if (cpuid_get_sysctlbyname("hw.optional.arm.FEAT_SHA256") != 0)
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new_cpuid_flags |= CPUID_SHA256;
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if (cpuid_get_sysctlbyname("hw.optional.arm.FEAT_SHA512") != 0)
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new_cpuid_flags |= CPUID_SHA512;
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if (cpuid_get_sysctlbyname("hw.optional.arm.FEAT_RDM") != 0)
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new_cpuid_flags |= CPUID_RDM;
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if (cpuid_get_sysctlbyname("hw.optional.arm.FEAT_SHA3") != 0)
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new_cpuid_flags |= CPUID_SHA3;
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#ifdef WOLFSSL_ARMASM_CRYPTO_SM3
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new_cpuid_flags |= CPUID_SM3;
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#endif
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#ifdef WOLFSSL_ARMASM_CRYPTO_SM4
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new_cpuid_flags |= CPUID_SM4;
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#endif
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(void)wolfSSL_Atomic_Uint_CompareExchange
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(&cpuid_flags, &old_cpuid_flags, new_cpuid_flags);
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}
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}
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#elif defined(__FreeBSD__) || defined(__OpenBSD__)
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/* https://man.freebsd.org/cgi/man.cgi?elf_aux_info(3) */
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#include <sys/auxv.h>
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static WC_INLINE void cpuid_set_flags(void)
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{
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if (WOLFSSL_ATOMIC_LOAD(cpuid_flags) == WC_CPUID_INITIALIZER) {
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cpuid_flags_t new_cpuid_flags = 0,
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old_cpuid_flags = WC_CPUID_INITIALIZER;
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word64 features = 0;
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elf_aux_info(AT_HWCAP, &features, sizeof(features));
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if (features & CPUID_AARCH64_FEAT_AES)
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new_cpuid_flags |= CPUID_AES;
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if (features & CPUID_AARCH64_FEAT_AES_PMULL) {
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new_cpuid_flags |= CPUID_AES;
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new_cpuid_flags |= CPUID_PMULL;
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}
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if (features & CPUID_AARCH64_FEAT_SHA256)
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new_cpuid_flags |= CPUID_SHA256;
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if (features & CPUID_AARCH64_FEAT_SHA256_512)
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new_cpuid_flags |= CPUID_SHA256 | CPUID_SHA512;
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if (features & CPUID_AARCH64_FEAT_RDM)
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new_cpuid_flags |= CPUID_RDM;
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if (features & CPUID_AARCH64_FEAT_SHA3)
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new_cpuid_flags |= CPUID_SHA3;
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if (features & CPUID_AARCH64_FEAT_SM3)
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new_cpuid_flags |= CPUID_SM3;
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if (features & CPUID_AARCH64_FEAT_SM4)
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new_cpuid_flags |= CPUID_SM4;
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(void)wolfSSL_Atomic_Uint_CompareExchange
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(&cpuid_flags, &old_cpuid_flags, new_cpuid_flags);
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}
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}
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#else
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static WC_INLINE void cpuid_set_flags(void)
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{
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if (WOLFSSL_ATOMIC_LOAD(cpuid_flags) == WC_CPUID_INITIALIZER) {
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cpuid_flags_t new_cpuid_flags = 0,
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old_cpuid_flags = WC_CPUID_INITIALIZER;
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#ifndef WOLFSSL_ARMASM_NO_HW_CRYPTO
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new_cpuid_flags |= CPUID_AES;
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new_cpuid_flags |= CPUID_PMULL;
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new_cpuid_flags |= CPUID_SHA256;
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#endif
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#ifdef WOLFSSL_ARMASM_CRYPTO_SHA512
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new_cpuid_flags |= CPUID_SHA512;
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#endif
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#ifndef WOLFSSL_AARCH64_NO_SQRDMLSH
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new_cpuid_flags |= CPUID_RDM;
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#endif
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#ifdef WOLFSSL_ARMASM_CRYPTO_SHA3
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new_cpuid_flags |= CPUID_SHA3;
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#endif
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#ifdef WOLFSSL_ARMASM_CRYPTO_SM3
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new_cpuid_flags |= CPUID_SM3;
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#endif
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#ifdef WOLFSSL_ARMASM_CRYPTO_SM4
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new_cpuid_flags |= CPUID_SM4;
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#endif
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(void)wolfSSL_Atomic_Uint_CompareExchange
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(&cpuid_flags, &old_cpuid_flags, new_cpuid_flags);
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}
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}
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#endif
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#elif defined(HAVE_CPUID)
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static WC_INLINE void cpuid_set_flags(void)
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{
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if (WOLFSSL_ATOMIC_LOAD(cpuid_flags) == WC_CPUID_INITIALIZER) {
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cpuid_flags_t new_cpuid_flags = 0,
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old_cpuid_flags = WC_CPUID_INITIALIZER;
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(void)wolfSSL_Atomic_Uint_CompareExchange
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(&cpuid_flags, &old_cpuid_flags, new_cpuid_flags);
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}
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}
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#endif
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#ifdef HAVE_CPUID
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cpuid_flags_t cpuid_get_flags(void)
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{
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cpuid_set_flags();
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return WOLFSSL_ATOMIC_LOAD(cpuid_flags);
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}
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void cpuid_select_flags(cpuid_flags_t flags)
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{
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WOLFSSL_ATOMIC_STORE(cpuid_flags, flags);
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}
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void cpuid_set_flag(cpuid_flags_t flag)
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{
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cpuid_flags_t current_flags = WOLFSSL_ATOMIC_LOAD(cpuid_flags);
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while (! wolfSSL_Atomic_Uint_CompareExchange
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(&cpuid_flags, ¤t_flags, current_flags | flag))
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WC_RELAX_LONG_LOOP();
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}
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void cpuid_clear_flag(cpuid_flags_t flag)
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{
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cpuid_flags_t current_flags = WOLFSSL_ATOMIC_LOAD(cpuid_flags);
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while (! wolfSSL_Atomic_Uint_CompareExchange
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(&cpuid_flags, ¤t_flags, current_flags & ~flag))
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WC_RELAX_LONG_LOOP();
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}
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#endif /* HAVE_CPUID */
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