forked from lucysrausch/hoverboard-firmware-hack
bf9725159d
- Phase Advance is enabled only when Motor Speed > n_motPhaAdvEna (400 rpm). This prevents that during a kick-down (100% duty cycle) the Phase advance kicks in even though we are running at low speed. - This update improves the acceleration response - no impact on code execution time
257 lines
11 KiB
C
257 lines
11 KiB
C
/*
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* Academic License - for use in teaching, academic research, and meeting
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* course requirements at degree granting institutions only. Not for
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* government, commercial, or other organizational use.
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*
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* File: BLDC_controller.h
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*
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* Code generated for Simulink model 'BLDC_controller'.
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*
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* Model version : 1.883
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* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
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* C/C++ source code generated on : Tue Jun 11 21:14:57 2019
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*
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* Target selection: ert.tlc
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* Embedded hardware selection: ARM Compatible->ARM Cortex
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* Emulation hardware selection:
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* Differs from embedded hardware (MATLAB Host)
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* Code generation objectives:
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* 1. Execution efficiency
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* 2. RAM efficiency
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* Validation result: Not run
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*/
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#ifndef RTW_HEADER_BLDC_controller_h_
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#define RTW_HEADER_BLDC_controller_h_
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#include "rtwtypes.h"
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#ifndef BLDC_controller_COMMON_INCLUDES_
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# define BLDC_controller_COMMON_INCLUDES_
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#include "rtwtypes.h"
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#endif /* BLDC_controller_COMMON_INCLUDES_ */
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/* Macros for accessing real-time model data structure */
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/* Forward declaration for rtModel */
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typedef struct tag_RTM RT_MODEL;
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/* Block signals and states (auto storage) for system '<Root>' */
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typedef struct {
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int32_T Switch_PhaAdv; /* '<S8>/Switch_PhaAdv' */
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int32_T UnitDelay2_DSTATE; /* '<S16>/UnitDelay2' */
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int16_T Merge; /* '<S9>/Merge' */
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int16_T Merge1; /* '<S9>/Merge1' */
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int16_T Merge2; /* '<S9>/Merge2' */
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int16_T z_counterRawPrev; /* '<S15>/z_counterRawPrev' */
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int16_T Sum4; /* '<S15>/Sum4' */
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int16_T UnitDelay1_DSTATE; /* '<S17>/UnitDelay1' */
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int16_T UnitDelay1_DSTATE_c; /* '<S14>/UnitDelay1' */
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int16_T z_counter2_DSTATE; /* '<S15>/z_counter2' */
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int8_T UnitDelay1; /* '<S13>/UnitDelay1' */
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int8_T Switch2; /* '<S13>/Switch2' */
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int8_T UnitDelay2_DSTATE_i; /* '<S13>/UnitDelay2' */
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int8_T If1_ActiveSubsystem; /* '<S2>/If1' */
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uint8_T UnitDelay_DSTATE; /* '<S11>/UnitDelay' */
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uint8_T UnitDelay1_DSTATE_i; /* '<S11>/UnitDelay1' */
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uint8_T UnitDelay2_DSTATE_h; /* '<S11>/UnitDelay2' */
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boolean_T n_commDeacv_Mode; /* '<S14>/n_commDeacv' */
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boolean_T dz_counter_Mode; /* '<S14>/dz_counter' */
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} DW;
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/* Constant parameters (auto storage) */
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typedef struct {
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/* Computed Parameter: r_trapPhaA_M1_Table
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* Referenced by: '<S18>/r_trapPhaA_M1'
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*/
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int16_T r_trapPhaA_M1_Table[7];
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/* Computed Parameter: r_trapPhaB_M1_Table
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* Referenced by: '<S18>/r_trapPhaB_M1'
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*/
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int16_T r_trapPhaB_M1_Table[7];
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/* Computed Parameter: r_trapPhaC_M1_Table
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* Referenced by: '<S18>/r_trapPhaC_M1'
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*/
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int16_T r_trapPhaC_M1_Table[7];
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/* Computed Parameter: r_sinPhaA_M1_Table
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* Referenced by: '<S19>/r_sinPhaA_M1'
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*/
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int16_T r_sinPhaA_M1_Table[37];
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/* Computed Parameter: r_sinPhaB_M1_Table
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* Referenced by: '<S19>/r_sinPhaB_M1'
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*/
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int16_T r_sinPhaB_M1_Table[37];
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/* Computed Parameter: r_sinPhaC_M1_Table
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* Referenced by: '<S19>/r_sinPhaC_M1'
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*/
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int16_T r_sinPhaC_M1_Table[37];
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/* Computed Parameter: r_sin3PhaA_M1_Table
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* Referenced by: '<S20>/r_sin3PhaA_M1'
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*/
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int16_T r_sin3PhaA_M1_Table[37];
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/* Computed Parameter: r_sin3PhaB_M1_Table
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* Referenced by: '<S20>/r_sin3PhaB_M1'
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*/
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int16_T r_sin3PhaB_M1_Table[37];
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/* Computed Parameter: r_sin3PhaC_M1_Table
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* Referenced by: '<S20>/r_sin3PhaC_M1'
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*/
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int16_T r_sin3PhaC_M1_Table[37];
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/* Computed Parameter: z_commutMap_M1_table
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* Referenced by: '<S10>/z_commutMap_M1'
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*/
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int16_T z_commutMap_M1_table[18];
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/* Computed Parameter: vec_hallToPos_Value
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* Referenced by: '<S12>/vec_hallToPos'
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*/
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int8_T vec_hallToPos_Value[8];
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} ConstP;
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/* External inputs (root inport signals with auto storage) */
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typedef struct {
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uint8_T b_hallA; /* '<Root>/b_hallA ' */
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uint8_T b_hallB; /* '<Root>/b_hallB' */
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uint8_T b_hallC; /* '<Root>/b_hallC' */
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int32_T r_DC; /* '<Root>/r_DC' */
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} ExtU;
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/* External outputs (root outports fed by signals with auto storage) */
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typedef struct {
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int32_T DC_phaA; /* '<Root>/DC_phaA' */
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int32_T DC_phaB; /* '<Root>/DC_phaB' */
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int32_T DC_phaC; /* '<Root>/DC_phaC' */
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int32_T n_mot; /* '<Root>/n_mot' */
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int32_T a_elecAngle; /* '<Root>/a_elecAngle' */
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} ExtY;
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/* Parameters (auto storage) */
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struct P_ {
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int32_T cf_speedCoef; /* Variable: cf_speedCoef
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* Referenced by: '<S16>/cf_spdCoef'
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*/
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int32_T cf_speedFilt; /* Variable: cf_speedFilt
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* Referenced by: '<S16>/cf_speedFilt'
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*/
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int32_T n_commAcvLo; /* Variable: n_commAcvLo
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* Referenced by: '<S14>/n_commDeacv'
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*/
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int32_T n_commDeacvHi; /* Variable: n_commDeacvHi
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* Referenced by: '<S14>/n_commDeacv'
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*/
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int32_T n_motPhaAdvEna; /* Variable: n_motPhaAdvEna
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* Referenced by: '<S8>/n_motPhaAdvEna'
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*/
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int32_T r_commDCDeacv; /* Variable: r_commDCDeacv
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* Referenced by: '<S14>/r_commDCDeacv'
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*/
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int32_T r_phaAdvDC_XA[11]; /* Variable: r_phaAdvDC_XA
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* Referenced by: '<S8>/r_phaAdvDC_XA'
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*/
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int16_T a_phaAdv_M1[11]; /* Variable: a_phaAdv_M1
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* Referenced by: '<S8>/a_phaAdv_M2'
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*/
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int16_T dz_counterHi; /* Variable: dz_counterHi
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* Referenced by: '<S14>/dz_counter'
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*/
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int16_T dz_counterLo; /* Variable: dz_counterLo
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* Referenced by: '<S14>/dz_counter'
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*/
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int16_T z_maxCntRst; /* Variable: z_maxCntRst
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* Referenced by:
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* '<S15>/z_counter'
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* '<S15>/z_counter2'
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* '<S16>/z_maxCntRst'
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* '<S17>/Constant1'
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* '<S17>/UnitDelay1'
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*/
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uint8_T z_ctrlTypSel; /* Variable: z_ctrlTypSel
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* Referenced by: '<S7>/z_ctrlTypSel1'
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*/
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boolean_T b_phaAdvEna; /* Variable: b_phaAdvEna
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* Referenced by: '<S8>/a_elecPeriod1'
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*/
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};
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/* Parameters (auto storage) */
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typedef struct P_ P;
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/* Real-time Model Data Structure */
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struct tag_RTM {
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P *defaultParam;
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ExtU *inputs;
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ExtY *outputs;
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DW *dwork;
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};
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/* Constant parameters (auto storage) */
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extern const ConstP rtConstP;
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/* Model entry point functions */
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extern void BLDC_controller_initialize(RT_MODEL *const rtM);
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extern void BLDC_controller_step(RT_MODEL *const rtM);
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/*-
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* These blocks were eliminated from the model due to optimizations:
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*
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* Block '<S14>/Scope2' : Unused code path elimination
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* Block '<S8>/Scope' : Unused code path elimination
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*/
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/*-
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* The generated code includes comments that allow you to trace directly
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* back to the appropriate location in the model. The basic format
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* is <system>/block_name, where system is the system number (uniquely
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* assigned by Simulink) and block_name is the name of the block.
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*
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* Note that this particular code originates from a subsystem build,
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* and has its own system numbers different from the parent model.
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* Refer to the system hierarchy for this subsystem below, and use the
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* MATLAB hilite_system command to trace the generated code back
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* to the parent model. For example,
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*
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* hilite_system('BLDCmotorControl_R2017b/BLDC_controller') - opens subsystem BLDCmotorControl_R2017b/BLDC_controller
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* hilite_system('BLDCmotorControl_R2017b/BLDC_controller/Kp') - opens and selects block Kp
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*
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* Here is the system hierarchy for this model
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*
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* '<Root>' : 'BLDCmotorControl_R2017b'
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* '<S1>' : 'BLDCmotorControl_R2017b/BLDC_controller'
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* '<S2>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller'
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* '<S3>' : 'BLDCmotorControl_R2017b/BLDC_controller/signal_log1'
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* '<S4>' : 'BLDCmotorControl_R2017b/BLDC_controller/signal_log2'
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* '<S5>' : 'BLDCmotorControl_R2017b/BLDC_controller/signal_log3'
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* '<S6>' : 'BLDCmotorControl_R2017b/BLDC_controller/signal_log6'
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* '<S7>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F01_Preliminary_Calculations'
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* '<S8>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F02_Electrical_Angle_Calculation'
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* '<S9>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F03_Control_Method_Selection'
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* '<S10>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F04_Control_Type_Management'
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* '<S11>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F01_Preliminary_Calculations/F01_01_Edge_Detector'
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* '<S12>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F01_Preliminary_Calculations/F01_02_Position_Calculation'
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* '<S13>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F01_Preliminary_Calculations/F01_03_Direction_Detection'
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* '<S14>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F01_Preliminary_Calculations/F01_04_Speed_Calculation'
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* '<S15>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F01_Preliminary_Calculations/F01_04_Speed_Calculation/Counter_Hold_and_Error_Calculation'
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* '<S16>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F01_Preliminary_Calculations/F01_04_Speed_Calculation/Motor_Speed_Calculation'
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* '<S17>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F01_Preliminary_Calculations/F01_04_Speed_Calculation/rst_DelayLim'
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* '<S18>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F03_Control_Method_Selection/F03_01_Pure_Trapezoidal_Method'
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* '<S19>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F03_Control_Method_Selection/F03_02_Sinusoidal_Method'
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* '<S20>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F03_Control_Method_Selection/F03_03_Sinusoidal3rd_Method'
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* '<S21>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F03_Control_Method_Selection/signal_log1'
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* '<S22>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F03_Control_Method_Selection/signal_log2'
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* '<S23>' : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller/F03_Control_Method_Selection/signal_log6'
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*/
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#endif /* RTW_HEADER_BLDC_controller_h_ */
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/*
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* File trailer for generated code.
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*
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* [EOF]
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*/
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