Do the right thing with RTC pins regardless of ESP-IDF version.

This commit is contained in:
Brian Bulkowski
2020-09-12 11:56:12 -07:00
parent 81e041d255
commit 69c28ee3f5

View File

@ -31,7 +31,12 @@
// pins in terms of GPIO pin numbers. In 4.1 this was depricated - although it
// could be included through menuconfig - in favor of rtc_io_desc, which is
// indexed by the RTC_IO_PIN, which is looked up from gpio pin through rtc_io_num_map.
// as of 9/2020, have recoded for the new API . This is touched really only in pinMode
// as of 9/2020, have recoded for the new API . This is touched really only in pinMode.
// The obvious way to cover both 4.0 and 4.1++ is to have two versions of that function,
// see below.
#include "esp_idf_version.h"
// #if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4,1,0) --- this is how it's done
const int8_t esp32_adc2gpio[20] = {36, 37, 38, 39, 32, 33, 34, 35, -1, -1, 4, 0, 2, 15, 13, 12, 14, 27, 25, 26};
@ -93,27 +98,70 @@ typedef struct {
} InterruptHandle_t;
static InterruptHandle_t __pinInterruptHandlers[GPIO_PIN_COUNT] = {0,};
//
// we need two versions of this function, because the API has changed
// between 4.0 and 4.1++. You can get the depricated API through a menuconfig
// setting, or you just code it like this.
#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4,1,0)
extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
{
static bool IRAM_ATTR __pinModeLockRTC(uint8_t pin, uint8_t mode) {
if(!digitalPinIsValid(pin)) {
return;
uint32_t rtc_reg = rtc_gpio_desc[pin].reg;
if(mode == ANALOG) {
if(!rtc_reg) {
return(false);//not rtc pin
}
//lock rtc
uint32_t reg_val = ESP_REG(rtc_reg);
if(reg_val & rtc_gpio_desc[pin].mux){
return(false);//already in adc mode
}
reg_val &= ~(
(RTC_IO_TOUCH_PAD1_FUN_SEL_V << rtc_gpio_desc[pin].func)
|rtc_gpio_desc[pin].ie
|rtc_gpio_desc[pin].pullup
|rtc_gpio_desc[pin].pulldown);
ESP_REG(RTC_GPIO_ENABLE_W1TC_REG) = (1 << (rtc_gpio_desc[pin].rtc_num + RTC_GPIO_ENABLE_W1TC_S));
ESP_REG(rtc_reg) = reg_val | rtc_gpio_desc[pin].mux;
//unlock rtc
ESP_REG(DR_REG_IO_MUX_BASE + esp32_gpioMux[pin].reg) = ((uint32_t)2 << MCU_SEL_S) | ((uint32_t)2 << FUN_DRV_S) | FUN_IE;
return(false);
}
//RTC pins PULL settings
if(rtc_reg) {
//lock rtc
ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].mux);
if(mode & PULLUP) {
ESP_REG(rtc_reg) = (ESP_REG(rtc_reg) | rtc_gpio_desc[pin].pullup) & ~(rtc_gpio_desc[pin].pulldown);
} else if(mode & PULLDOWN) {
ESP_REG(rtc_reg) = (ESP_REG(rtc_reg) | rtc_gpio_desc[pin].pulldown) & ~(rtc_gpio_desc[pin].pullup);
} else {
ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_gpio_desc[pin].pullup | rtc_gpio_desc[pin].pulldown);
}
//unlock rtc
}
return(true);
}
#else // ESP_IDF_VERSION >= 4.1
static bool IRAM_ATTR __pinModeLockRTC(uint8_t pin, uint8_t mode) {
// Find out if GPIO pin is RTC pin
int rtc_pin = rtc_io_num_map[pin];
if(mode == ANALOG) {
if(rtc_pin == -1) {
return;//not rtc pin
return(false);//not rtc pin
}
uint32_t rtc_reg = rtc_io_desc[rtc_pin].reg;
//lock rtc
uint32_t reg_val = ESP_REG(rtc_reg);
if(reg_val & rtc_io_desc[rtc_pin].mux){
return;//already in adc mode
return(false);//already in adc mode
}
reg_val &= ~(
(RTC_IO_TOUCH_PAD1_FUN_SEL_V << rtc_io_desc[rtc_pin].func)
@ -124,7 +172,7 @@ extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
ESP_REG(rtc_reg) = reg_val | rtc_io_desc[rtc_pin].mux;
//unlock rtc
ESP_REG(DR_REG_IO_MUX_BASE + esp32_gpioMux[rtc_pin].reg) = ((uint32_t)2 << MCU_SEL_S) | ((uint32_t)2 << FUN_DRV_S) | FUN_IE;
return;
return(false);
}
//RTC pins PULL settings
@ -141,6 +189,22 @@ extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
}
//unlock rtc
}
return(true);
}
#endif // ESP_IDF_VERSION
extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
{
if(!digitalPinIsValid(pin)) {
return;
}
if (false == __pinModeLockRTC(pin, mode)) {
return;
}
uint32_t pinFunction = 0, pinControl = 0;