Merge branch 'feature/reevaluate_headers_include_dirs' into 'master'

esp_hw_support/esp_system: Re-evaluate header inclusions and include directories

See merge request espressif/esp-idf!16763

components/README.md

@@ -150,11 +150,10 @@ The current implementation in `esp_system` can then just register the interrupt
 #### `esp_mac.h`, `esp_chip_info.h`, `esp_random.h` (`esp_hw_support`)
 
 The functions in these headers used to be in `esp_system.h`, but have been split-off.
-However, to maintain backward compatibility, `esp_system.h` includes these headers.
 
 The remaining functions in `esp_system.h` are those that deal with system behavior, such
 as `esp_register_shutdown_handler`, or are proxy for other system components's APIs such as
 `esp_get_free_heap_size`.
 
 The functions split-off from `esp_system.h` are much more hardware manipulation oriented such as:
-`esp_read_mac`, `esp_random` and `esp_chip_info`.
+`esp_read_mac`, `esp_random` and `esp_chip_info`.

components/bootloader_support/src/bootloader_random.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,7 +9,7 @@
 #include "soc/wdev_reg.h"
 
 #ifndef BOOTLOADER_BUILD
-#include "esp_system.h"
+#include "esp_random.h"
 #include "esp_private/periph_ctrl.h"
 
  __attribute__((weak)) void bootloader_fill_random(void *buffer, size_t length)

components/bt/controller/esp32/bt.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -20,7 +20,8 @@
 #include "freertos/portmacro.h"
 #include "xtensa/core-macros.h"
 #include "esp_types.h"
-#include "esp_system.h"
+#include "esp_mac.h"
+#include "esp_random.h"
 #include "esp_task.h"
 #include "esp_intr_alloc.h"
 #include "esp_attr.h"

components/bt/controller/esp32c3/bt.c

@@ -18,7 +18,8 @@
 #include "freertos/semphr.h"
 #include "freertos/portmacro.h"
 #include "esp_types.h"
-#include "esp_system.h"
+#include "esp_mac.h"
+#include "esp_random.h"
 #include "esp_task.h"
 #include "riscv/interrupt.h"
 #include "esp_attr.h"

components/bt/controller/esp32s3/bt.c

@@ -20,7 +20,8 @@
 #include "freertos/portmacro.h"
 #include "xtensa/core-macros.h"
 #include "esp_types.h"
-#include "esp_system.h"
+#include "esp_mac.h"
+#include "esp_random.h"
 #include "esp_task.h"
 #include "esp_attr.h"
 #include "esp_phy_init.h"

components/bt/esp_ble_mesh/mesh_common/mesh_common.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -7,7 +7,7 @@
 #include <string.h>
 #include <errno.h>
 
-#include "esp_system.h"
+#include "esp_random.h"
 
 #include "mesh_main.h"
 #include "client_common.h"

components/bt/test/test_smp.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */
@@ -24,7 +24,7 @@
 #include "esp_heap_caps.h"
 #include "esp_log.h"
 #include "freertos/ringbuf.h"
-#include "esp_system.h"
+#include "esp_random.h"
 #include "nvs_flash.h"
 
 #include "esp_bt.h"

components/driver/i2s.c

@@ -29,7 +29,7 @@
 #include "esp_private/gdma.h"
 #endif
 
-#include "soc/clk_ctrl_os.h"
+#include "clk_ctrl_os.h"
 #include "esp_intr_alloc.h"
 #include "esp_err.h"
 #include "esp_check.h"

components/driver/ledc.c

@@ -18,7 +18,7 @@
 #include "driver/ledc.h"
 #include "esp_rom_gpio.h"
 #include "esp_rom_sys.h"
-#include "soc/clk_ctrl_os.h"
+#include "clk_ctrl_os.h"
 #include "esp_private/periph_ctrl.h"
 
 static __attribute__((unused)) const char *LEDC_TAG = "ledc";

components/driver/test/test_rs485.c

@@ -12,7 +12,7 @@
 #include "test_utils.h"             // unity_send_signal
 #include "driver/uart.h"            // for the uart driver access
 #include "esp_log.h"
-#include "esp_system.h"             // for uint32_t esp_random()
+#include "esp_random.h"             // for uint32_t esp_random()
 
 #define UART_TAG         "Uart"
 #define UART_NUM1        (UART_NUM_1)

components/esp-tls/test/test_esp_tls.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,6 +9,7 @@
 #include "unity.h"
 #include "esp_err.h"
 #include "esp_log.h"
+#include "esp_mac.h"
 #if SOC_SHA_SUPPORT_PARALLEL_ENG
 #include "sha/sha_parallel_engine.h"
 #elif SOC_SHA_SUPPORT_DMA

components/esp_eth/src/esp_eth_mac_esp.c

@@ -13,7 +13,7 @@
 #include "esp_check.h"
 #include "esp_eth.h"
 #include "esp_pm.h"
-#include "esp_system.h"
+#include "esp_mac.h"
 #include "esp_heap_caps.h"
 #include "esp_intr_alloc.h"
 #include "esp_private/esp_clk.h"
@@ -24,7 +24,7 @@
 #include "hal/emac_hal.h"
 #include "hal/gpio_hal.h"
 #include "soc/soc.h"
-#include "soc/clk_ctrl_os.h"
+#include "clk_ctrl_os.h"
 #include "sdkconfig.h"
 #include "esp_rom_gpio.h"
 #include "esp_rom_sys.h"

components/esp_event/event_send_compat.inc

@@ -17,6 +17,7 @@
 #include "esp_event_legacy.h"
 #include "esp_wifi_types.h"
 #include "esp_netif.h"
+#include "esp_mac.h"
 #if CONFIG_ETH_ENABLED
 #include "esp_eth.h"
 #endif

components/esp_hw_support/clk_ctrl_os.c

@@ -1,11 +1,11 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
 #include <freertos/FreeRTOS.h>
-#include "soc/clk_ctrl_os.h"
+#include "clk_ctrl_os.h"
 #include "esp_check.h"
 #include "sdkconfig.h"
 

components/esp_hw_support/compare_set.c

@@ -1,10 +1,10 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#include "soc/compare_set.h"
-#include "soc/spinlock.h"
+#include "compare_set.h"
+#include "spinlock.h"
 #include "soc/soc_caps.h"
 
 #if __XTENSA__ && SOC_SPIRAM_SUPPORTED

components/esp_hw_support/include/clk_ctrl_os.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */

components/esp_hw_support/include/compare_set.h

@@ -0,0 +1,27 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_cpu.h"
+#include "soc/soc_memory_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static inline void __attribute__((always_inline)) compare_and_set_native(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
+{
+    cpu_ll_compare_and_set_native(addr, compare, set);
+}
+
+void compare_and_set_extram(volatile uint32_t *addr, uint32_t compare, uint32_t *set);
+
+#ifdef __cplusplus
+}
+#endif

components/esp_hw_support/include/esp_himem.h

@@ -1,10 +1,17 @@
 /*
- * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
+
 #pragma once
 
+#include "sdkconfig.h"
+
+#if !CONFIG_IDF_TARGET_ESP32
+#error esp_himem is only supported on ESP32
+#else
+
 #include <stddef.h>
 #include "esp_err.h"
 
@@ -141,3 +148,5 @@ size_t esp_himem_reserved_area_size(void);
 #ifdef __cplusplus
 }
 #endif
+
+#endif // !CONFIG_IDF_TARGET_ESP32

components/esp_hw_support/include/esp_random.h

@@ -1,10 +1,11 @@
 /*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#pragma once
+#ifndef __ESP_RANDOM_H__
+#define __ESP_RANDOM_H__
 
 #include <stddef.h>
 #include <stdint.h>
@@ -42,3 +43,5 @@ void esp_fill_random(void *buf, size_t len);
 #ifdef __cplusplus
 }
 #endif
+
+#endif /* __ESP_RANDOM_H__ */

components/esp_hw_support/include/soc/compare_set.h

@@ -1,66 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-
-#include <stdint.h>
-#include <stdbool.h>
-#include "esp_cpu.h"
-#include "soc/soc_memory_types.h"
-
-#if __XTENSA__
-#include "xtensa/xtruntime.h"
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-static inline void __attribute__((always_inline)) compare_and_set_native(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
-{
-#if (XCHAL_HAVE_S32C1I > 0)
-    __asm__ __volatile__ (
-        "WSR 	    %2,SCOMPARE1 \n"
-        "S32C1I     %0, %1, 0	 \n"
-        :"=r"(*set)
-        :"r"(addr), "r"(compare), "0"(*set)
-    );
-#else
-    uint32_t old_value;
-
-#ifdef __XTENSA__
-    // No S32C1I, so do this by disabling and re-enabling interrupts (slower)
-    uint32_t intlevel;
-    __asm__ __volatile__ ("rsil %0, " XTSTR(XCHAL_EXCM_LEVEL) "\n"
-                          : "=r"(intlevel));
-#else
-    unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
-#endif
-
-    old_value = *addr;
-    if (old_value == compare) {
-        *addr = *set;
-    }
-
-#ifdef __XTENSA__
-    __asm__ __volatile__ ("memw \n"
-                          "wsr %0, ps\n"
-                          :: "r"(intlevel));
-
-#else
-    RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
-#endif
-
-    *set = old_value;
-#endif
-}
-
-
-void compare_and_set_extram(volatile uint32_t *addr, uint32_t compare, uint32_t *set);
-
-#ifdef __cplusplus
-}
-#endif

components/esp_hw_support/include/soc/esp_himem.h

@@ -1,2 +0,0 @@
-#warning esp_himem.h has been replaced by esp32/himem.h, please include esp32/himem.h instead
-#include "esp32/himem.h"

components/esp_hw_support/include/soc/esp_spiram.h

@@ -1,2 +0,0 @@
-#warning esp_spiram.h has been replaced by esp32/spiram.h, please include esp32/spiram.h instead
-#include "esp32/spiram.h"

components/esp_hw_support/include/soc_log.h

@@ -1,33 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2016-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#pragma once
-#include "esp_rom_sys.h"
-
-/**
- * @file soc_log.h
- * @brief SOC library logging functions
- *
- * To make SOC library compatible with environments which don't use ESP-IDF,
- * this header file provides wrappers for logging functions.
- */
-
-#ifdef ESP_PLATFORM
-#include "esp_log.h"
-#define SOC_LOGE(tag, fmt, ...) ESP_EARLY_LOGE(tag, fmt, ##__VA_ARGS__)
-#define SOC_LOGW(tag, fmt, ...) ESP_EARLY_LOGW(tag, fmt, ##__VA_ARGS__)
-#define SOC_LOGI(tag, fmt, ...) ESP_EARLY_LOGI(tag, fmt, ##__VA_ARGS__)
-#define SOC_LOGD(tag, fmt, ...) ESP_EARLY_LOGD(tag, fmt, ##__VA_ARGS__)
-#define SOC_LOGV(tag, fmt, ...) ESP_EARLY_LOGV(tag, fmt, ##__VA_ARGS__)
-
-#else
-
-#define SOC_LOGE(tag, fmt, ...) esp_rom_printf("%s(err): " fmt, tag, ##__VA_ARGS__)
-#define SOC_LOGW(tag, fmt, ...) esp_rom_printf("%s(warn): " fmt, tag, ##__VA_ARGS__)
-#define SOC_LOGI(tag, fmt, ...) esp_rom_printf("%s(info): " fmt, tag, ##__VA_ARGS__)
-#define SOC_LOGD(tag, fmt, ...) esp_rom_printf("%s(dbg): " fmt, tag, ##__VA_ARGS__)
-#define SOC_LOGV(tag, fmt, ...) esp_rom_printf("%s: " fmt, tag, ##__VA_ARGS__)
-#endif //ESP_PLATFORM

components/esp_hw_support/include/spinlock.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,7 +9,7 @@
 #include <stdbool.h>
 #include "sdkconfig.h"
 #include "hal/cpu_hal.h"
-#include "soc/compare_set.h"
+#include "compare_set.h"
 
 #if __XTENSA__
 #include "xtensa/xtruntime.h"

components/esp_hw_support/mac_addr.c

@@ -1,12 +1,12 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 #include <string.h>
 #include "sdkconfig.h"
 #include "esp_rom_efuse.h"
-#include "esp_system.h"
+#include "esp_mac.h"
 #include "esp_efuse.h"
 #include "esp_efuse_table.h"
 

components/esp_hw_support/port/esp32/esp_himem.c

@@ -9,7 +9,7 @@
 #include "esp32/spiram.h"
 #include "esp32/rom/cache.h"
 #include "sdkconfig.h"
-#include "esp32/himem.h"
+#include "esp_himem.h"
 #include "soc/soc.h"
 #include "esp_log.h"
 #include "esp_check.h"

components/esp_hw_support/port/esp32/rtc_clk.c

@@ -24,7 +24,7 @@
 #include "hal/gpio_ll.h"
 #include "esp_rom_sys.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "sdkconfig.h"
 #include "rtc_clk_common.h"
 
@@ -287,7 +287,7 @@ uint32_t rtc_clk_apll_coeff_calc(uint32_t freq, uint32_t *_o_div, uint32_t *_sdm
     uint32_t rtc_xtal_freq = (uint32_t)rtc_clk_xtal_freq_get();
     if (rtc_xtal_freq == 0) {
         // xtal_freq has not set yet
-        SOC_LOGE(TAG, "Get xtal clock frequency failed, it has not been set yet");
+        ESP_HW_LOGE(TAG, "Get xtal clock frequency failed, it has not been set yet");
         abort();
     }
     /* Reference formula: apll_freq = xtal_freq * (4 + sdm2 + sdm1/256 + sdm0/65536) / ((o_div + 2) * 2)
@@ -304,7 +304,7 @@ uint32_t rtc_clk_apll_coeff_calc(uint32_t freq, uint32_t *_o_div, uint32_t *_sdm
      * 350 MHz / ((31 + 2) * 2) = 5303031 Hz (for ceil) */
     o_div = (int)(SOC_APLL_MULTIPLIER_OUT_MIN_HZ / (float)(freq * 2) + 1) - 2;
     if (o_div > 31) {
-        SOC_LOGE(TAG, "Expected frequency is too small");
+        ESP_HW_LOGE(TAG, "Expected frequency is too small");
         return 0;
     }
     if (o_div < 0) {
@@ -314,7 +314,7 @@ uint32_t rtc_clk_apll_coeff_calc(uint32_t freq, uint32_t *_o_div, uint32_t *_sdm
          * 500 MHz / ((0 + 2) * 2) = 125000000 Hz */
         o_div = (int)(SOC_APLL_MULTIPLIER_OUT_MAX_HZ / (float)(freq * 2)) - 2;
         if (o_div < 0) {
-            SOC_LOGE(TAG, "Expected frequency is too big");
+            ESP_HW_LOGE(TAG, "Expected frequency is too big");
             return 0;
         }
     }
@@ -585,7 +585,7 @@ static void rtc_clk_cpu_freq_to_pll_mhz(int cpu_freq_mhz)
         dbias = DIG_DBIAS_240M;
         per_conf = DPORT_CPUPERIOD_SEL_240;
     } else {
-        SOC_LOGE(TAG, "invalid frequency");
+        ESP_HW_LOGE(TAG, "invalid frequency");
         abort();
     }
     DPORT_REG_WRITE(DPORT_CPU_PER_CONF_REG, per_conf);
@@ -644,7 +644,7 @@ void rtc_clk_cpu_freq_to_config(rtc_cpu_freq_t cpu_freq, rtc_cpu_freq_config_t*
             freq_mhz = 240;
             break;
         default:
-            SOC_LOGE(TAG, "invalid rtc_cpu_freq_t value");
+            ESP_HW_LOGE(TAG, "invalid rtc_cpu_freq_t value");
             abort();
     }
 
@@ -758,7 +758,7 @@ void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t* out_config)
                 div = 2;
                 freq_mhz = 240;
             } else {
-                SOC_LOGE(TAG, "unsupported frequency configuration");
+                ESP_HW_LOGE(TAG, "unsupported frequency configuration");
                 abort();
             }
             break;
@@ -771,7 +771,7 @@ void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t* out_config)
             break;
         case RTC_CNTL_SOC_CLK_SEL_APLL:
         default:
-            SOC_LOGE(TAG, "unsupported frequency configuration");
+            ESP_HW_LOGE(TAG, "unsupported frequency configuration");
             abort();
     }
     *out_config = (rtc_cpu_freq_config_t) {

components/esp_hw_support/port/esp32/rtc_clk_init.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -17,7 +17,7 @@
 #include "soc/syscon_reg.h"
 #include "hal/cpu_hal.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "sdkconfig.h"
 #include "rtc_clk_common.h"
 
@@ -79,7 +79,7 @@ void rtc_clk_init(rtc_clk_config_t cfg)
             /* Not set yet, estimate XTAL frequency based on RTC_FAST_CLK */
             xtal_freq = rtc_clk_xtal_freq_estimate();
             if (xtal_freq == RTC_XTAL_FREQ_AUTO) {
-                SOC_LOGW(TAG, "Can't estimate XTAL frequency, assuming 26MHz");
+                ESP_HW_LOGW(TAG, "Can't estimate XTAL frequency, assuming 26MHz");
                 xtal_freq = RTC_XTAL_FREQ_26M;
             }
         }
@@ -91,7 +91,7 @@ void rtc_clk_init(rtc_clk_config_t cfg)
 
         rtc_xtal_freq_t est_xtal_freq = rtc_clk_xtal_freq_estimate();
         if (est_xtal_freq != xtal_freq) {
-            SOC_LOGW(TAG, "Possibly invalid CONFIG_ESP32_XTAL_FREQ setting (%dMHz). Detected %d MHz.",
+            ESP_HW_LOGW(TAG, "Possibly invalid CONFIG_ESP32_XTAL_FREQ setting (%dMHz). Detected %d MHz.",
                     xtal_freq, est_xtal_freq);
         }
     }
@@ -106,7 +106,7 @@ void rtc_clk_init(rtc_clk_config_t cfg)
 
     bool res = rtc_clk_cpu_freq_mhz_to_config(cfg.cpu_freq_mhz, &new_config);
     if (!res) {
-        SOC_LOGE(TAG, "invalid CPU frequency value");
+        ESP_HW_LOGE(TAG, "invalid CPU frequency value");
         abort();
     }
     rtc_clk_cpu_freq_set_config(&new_config);
@@ -154,15 +154,15 @@ static rtc_xtal_freq_t rtc_clk_xtal_freq_estimate(void)
         case 21 ... 31:
             return RTC_XTAL_FREQ_26M;
         case 32 ... 33:
-            SOC_LOGW(TAG, "Potentially bogus XTAL frequency: %d MHz, guessing 26 MHz", freq_mhz);
+            ESP_HW_LOGW(TAG, "Potentially bogus XTAL frequency: %d MHz, guessing 26 MHz", freq_mhz);
             return RTC_XTAL_FREQ_26M;
         case 34 ... 35:
-            SOC_LOGW(TAG, "Potentially bogus XTAL frequency: %d MHz, guessing 40 MHz", freq_mhz);
+            ESP_HW_LOGW(TAG, "Potentially bogus XTAL frequency: %d MHz, guessing 40 MHz", freq_mhz);
             return RTC_XTAL_FREQ_40M;
         case 36 ... 45:
             return RTC_XTAL_FREQ_40M;
         default:
-            SOC_LOGW(TAG, "Bogus XTAL frequency: %d MHz", freq_mhz);
+            ESP_HW_LOGW(TAG, "Bogus XTAL frequency: %d MHz", freq_mhz);
             return RTC_XTAL_FREQ_AUTO;
     }
     /* Restore 8M and 8md256 clocks to original state */

components/esp_hw_support/port/esp32/rtc_time.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -8,7 +8,7 @@
 #include "esp_rom_sys.h"
 #include "soc/rtc.h"
 #include "soc/timer_periph.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 
 #define MHZ (1000000)
 
@@ -69,7 +69,7 @@ static uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cyc
     }
     const uint32_t us_timer_max =  TIMG_RTC_CALI_VALUE / (uint32_t) xtal_freq;
     if (us_time_estimate >= us_timer_max) {
-        SOC_LOGE(TAG, "slowclk_cycles value too large, possible overflow");
+        ESP_HW_LOGE(TAG, "slowclk_cycles value too large, possible overflow");
         return 0;
     }
     /* Start calibration */

components/esp_hw_support/port/esp32/spiram.c

@@ -25,7 +25,7 @@ we add more types of external RAM memory, this can be made into a more intellige
 #include "esp_heap_caps_init.h"
 #include "soc/soc_memory_layout.h"
 #include "soc/dport_reg.h"
-#include "esp32/himem.h"
+#include "esp_himem.h"
 #include "esp32/rom/cache.h"
 
 #if CONFIG_FREERTOS_UNICORE

components/esp_hw_support/port/esp32c2/rtc_clk.c

@@ -20,7 +20,7 @@
 #include "soc/syscon_reg.h"
 #include "soc/system_reg.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "rtc_clk_common.h"
 #include "esp_rom_sys.h"
 
@@ -179,7 +179,7 @@ static void rtc_clk_cpu_freq_to_pll_mhz(int cpu_freq_mhz)
     } else if (cpu_freq_mhz == 120) {
         per_conf = DPORT_CPUPERIOD_SEL_120;
     } else {
-        SOC_LOGE(TAG, "invalid frequency");
+        ESP_HW_LOGE(TAG, "invalid frequency");
         abort();
     }
     REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL, per_conf);
@@ -278,7 +278,7 @@ void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t *out_config)
             div = 4;
             freq_mhz = 120;
         } else {
-            SOC_LOGE(TAG, "unsupported frequency configuration");
+            ESP_HW_LOGE(TAG, "unsupported frequency configuration");
             abort();
         }
         break;
@@ -290,7 +290,7 @@ void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t *out_config)
         freq_mhz = source_freq_mhz;
         break;
     default:
-        SOC_LOGE(TAG, "unsupported frequency configuration");
+        ESP_HW_LOGE(TAG, "unsupported frequency configuration");
         abort();
     }
     *out_config = (rtc_cpu_freq_config_t) {
@@ -349,7 +349,7 @@ rtc_xtal_freq_t rtc_clk_xtal_freq_get(void)
 {
     uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG);
     if (!clk_val_is_valid(xtal_freq_reg)) {
-        SOC_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value: 0x%08x", xtal_freq_reg);
+        ESP_HW_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value: 0x%08x", xtal_freq_reg);
         return RTC_XTAL_FREQ_40M;
     }
     return reg_val_to_clk_val(xtal_freq_reg);

components/esp_hw_support/port/esp32c2/rtc_clk_init.c

@@ -16,7 +16,7 @@
 #include "soc/efuse_periph.h"
 #include "hal/cpu_hal.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "sdkconfig.h"
 #include "rtc_clk_common.h"
 #include "esp_rom_uart.h"
@@ -58,7 +58,7 @@ void rtc_clk_init(rtc_clk_config_t cfg)
     uint32_t freq_before = old_config.freq_mhz;
     bool res = rtc_clk_cpu_freq_mhz_to_config(cfg.cpu_freq_mhz, &new_config);
     if (!res) {
-        SOC_LOGE(TAG, "invalid CPU frequency value");
+        ESP_HW_LOGE(TAG, "invalid CPU frequency value");
         abort();
     }
     rtc_clk_cpu_freq_set_config(&new_config);

components/esp_hw_support/port/esp32c2/rtc_init.c

@@ -15,7 +15,7 @@
 #include "soc/extmem_reg.h"
 #include "soc/system_reg.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "esp_efuse.h"
 #include "esp_efuse_table.h"
 
@@ -39,7 +39,7 @@ void rtc_init(rtc_config_t cfg)
         esp_err_t err = esp_efuse_read_field_blob(ESP_EFUSE_BLOCK2_VERSION, &rtc_calib_version, 3);
         if (err != ESP_OK) {
             rtc_calib_version = 0;
-            SOC_LOGW(TAG, "efuse read fail, set default rtc_calib_version: %d\n", rtc_calib_version);
+            ESP_HW_LOGW(TAG, "efuse read fail, set default rtc_calib_version: %d\n", rtc_calib_version);
         }
         if (rtc_calib_version == 1) {
             set_ocode_by_efuse(rtc_calib_version);
@@ -181,7 +181,7 @@ static void calibrate_ocode(void)
             break;
         }
         if (cycle1 >= timeout_cycle) {
-            SOC_LOGW(TAG, "o_code calibration fail\n");
+            ESP_HW_LOGW(TAG, "o_code calibration fail\n");
             break;
         }
     }
@@ -198,7 +198,7 @@ static uint32_t get_dig_dbias_by_efuse(uint8_t chip_version)
     esp_err_t err = esp_efuse_read_field_blob(ESP_EFUSE_DIG_DBIAS_HVT, &dig_dbias, 5);
     if (err != ESP_OK) {
         dig_dbias = 28;
-        SOC_LOGW(TAG, "efuse read fail, set default dig_dbias value: %d\n", dig_dbias);
+        ESP_HW_LOGW(TAG, "efuse read fail, set default dig_dbias value: %d\n", dig_dbias);
     }
     return dig_dbias;
 #endif
@@ -221,7 +221,7 @@ uint32_t get_rtc_dbias_by_efuse(uint8_t chip_version, uint32_t dig_dbias)
         k_dig_ldo = 0;
         v_rtc_bias20 = 0;
         v_dig_bias20 = 0;
-        SOC_LOGW(TAG, "efuse read fail, k_rtc_ldo: %d, k_dig_ldo: %d, v_rtc_bias20: %d,  v_dig_bias20: %d\n", k_rtc_ldo, k_dig_ldo, v_rtc_bias20, v_dig_bias20);
+        ESP_HW_LOGW(TAG, "efuse read fail, k_rtc_ldo: %d, k_dig_ldo: %d, v_rtc_bias20: %d,  v_dig_bias20: %d\n", k_rtc_ldo, k_dig_ldo, v_rtc_bias20, v_dig_bias20);
     }
 
     k_rtc_ldo =  ((k_rtc_ldo & BIT(6)) != 0)? -(k_rtc_ldo & 0x3f): k_rtc_ldo;
@@ -268,11 +268,11 @@ static void set_rtc_dig_dbias()
             rtc_dbias = get_rtc_dbias_by_efuse(chip_version, dig_dbias); // already burn dig_dbias in efuse
         } else {
             dig_dbias = 28;
-            SOC_LOGD(TAG, "not burn core voltage in efuse or burn wrong voltage value in chip version: 0%d\n", chip_version);
+            ESP_HW_LOGD(TAG, "not burn core voltage in efuse or burn wrong voltage value in chip version: 0%d\n", chip_version);
         }
     }
     else {
-        SOC_LOGD(TAG, "chip_version is less than 3, not burn core voltage in efuse\n");
+        ESP_HW_LOGD(TAG, "chip_version is less than 3, not burn core voltage in efuse\n");
     }
     REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_RTC_DREG, rtc_dbias);
     REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG, dig_dbias);

components/esp_hw_support/port/esp32c3/rtc_clk.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -20,7 +20,7 @@
 #include "soc/syscon_reg.h"
 #include "soc/system_reg.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "rtc_clk_common.h"
 #include "esp_rom_sys.h"
 #include "hal/usb_serial_jtag_ll.h"
@@ -280,7 +280,7 @@ static void rtc_clk_cpu_freq_to_pll_mhz(int cpu_freq_mhz)
     } else if (cpu_freq_mhz == 160) {
         per_conf = DPORT_CPUPERIOD_SEL_160;
     } else {
-        SOC_LOGE(TAG, "invalid frequency");
+        ESP_HW_LOGE(TAG, "invalid frequency");
         abort();
     }
     REG_SET_FIELD(SYSTEM_CPU_PER_CONF_REG, SYSTEM_CPUPERIOD_SEL, per_conf);
@@ -383,7 +383,7 @@ void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t *out_config)
             div = 3;
             freq_mhz = 160;
         } else {
-            SOC_LOGE(TAG, "unsupported frequency configuration");
+            ESP_HW_LOGE(TAG, "unsupported frequency configuration");
             abort();
         }
         break;
@@ -395,7 +395,7 @@ void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t *out_config)
         freq_mhz = source_freq_mhz;
         break;
     default:
-        SOC_LOGE(TAG, "unsupported frequency configuration");
+        ESP_HW_LOGE(TAG, "unsupported frequency configuration");
         abort();
     }
     *out_config = (rtc_cpu_freq_config_t) {
@@ -457,7 +457,7 @@ rtc_xtal_freq_t rtc_clk_xtal_freq_get(void)
 {
     uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG);
     if (!clk_val_is_valid(xtal_freq_reg)) {
-        SOC_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value: 0x%08x", xtal_freq_reg);
+        ESP_HW_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value: 0x%08x", xtal_freq_reg);
         return RTC_XTAL_FREQ_40M;
     }
     return reg_val_to_clk_val(xtal_freq_reg);

components/esp_hw_support/port/esp32c3/rtc_clk_init.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -17,7 +17,7 @@
 #include "soc/syscon_reg.h"
 #include "hal/cpu_hal.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "sdkconfig.h"
 #include "rtc_clk_common.h"
 #include "esp_rom_uart.h"
@@ -59,7 +59,7 @@ void rtc_clk_init(rtc_clk_config_t cfg)
     uint32_t freq_before = old_config.freq_mhz;
     bool res = rtc_clk_cpu_freq_mhz_to_config(cfg.cpu_freq_mhz, &new_config);
     if (!res) {
-        SOC_LOGE(TAG, "invalid CPU frequency value");
+        ESP_HW_LOGE(TAG, "invalid CPU frequency value");
         abort();
     }
     rtc_clk_cpu_freq_set_config(&new_config);

components/esp_hw_support/port/esp32c3/rtc_init.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -15,7 +15,7 @@
 #include "soc/extmem_reg.h"
 #include "soc/system_reg.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "esp_efuse.h"
 #include "esp_efuse_table.h"
 
@@ -53,7 +53,7 @@ void rtc_init(rtc_config_t cfg)
         esp_err_t err = esp_efuse_read_field_blob(ESP_EFUSE_BLOCK2_VERSION, &rtc_calib_version, 3);
         if (err != ESP_OK) {
             rtc_calib_version = 0;
-            SOC_LOGW(TAG, "efuse read fail, set default rtc_calib_version: %d\n", rtc_calib_version);
+            ESP_HW_LOGW(TAG, "efuse read fail, set default rtc_calib_version: %d\n", rtc_calib_version);
         }
         if (rtc_calib_version == 1) {
             set_ocode_by_efuse(rtc_calib_version);
@@ -248,7 +248,7 @@ static void calibrate_ocode(void)
             break;
         }
         if (cycle1 >= timeout_cycle) {
-            SOC_LOGW(TAG, "o_code calibration fail\n");
+            ESP_HW_LOGW(TAG, "o_code calibration fail\n");
             break;
         }
     }
@@ -262,7 +262,7 @@ static uint32_t get_dig_dbias_by_efuse(uint8_t chip_version)
     esp_err_t err = esp_efuse_read_field_blob(ESP_EFUSE_DIG_DBIAS_HVT, &dig_dbias, 5);
     if (err != ESP_OK) {
         dig_dbias = 28;
-        SOC_LOGW(TAG, "efuse read fail, set default dig_dbias value: %d\n", dig_dbias);
+        ESP_HW_LOGW(TAG, "efuse read fail, set default dig_dbias value: %d\n", dig_dbias);
     }
     return dig_dbias;
 }
@@ -281,7 +281,7 @@ uint32_t get_rtc_dbias_by_efuse(uint8_t chip_version, uint32_t dig_dbias)
         k_dig_ldo = 0;
         v_rtc_bias20 = 0;
         v_dig_bias20 = 0;
-        SOC_LOGW(TAG, "efuse read fail, k_rtc_ldo: %d, k_dig_ldo: %d, v_rtc_bias20: %d,  v_dig_bias20: %d\n", k_rtc_ldo, k_dig_ldo, v_rtc_bias20, v_dig_bias20);
+        ESP_HW_LOGW(TAG, "efuse read fail, k_rtc_ldo: %d, k_dig_ldo: %d, v_rtc_bias20: %d,  v_dig_bias20: %d\n", k_rtc_ldo, k_dig_ldo, v_rtc_bias20, v_dig_bias20);
     }
 
     k_rtc_ldo =  ((k_rtc_ldo & BIT(6)) != 0)? -(k_rtc_ldo & 0x3f): k_rtc_ldo;
@@ -327,11 +327,11 @@ static void set_rtc_dig_dbias()
             rtc_dbias = get_rtc_dbias_by_efuse(chip_version, dig_dbias); // already burn dig_dbias in efuse
         } else {
             dig_dbias = 28;
-            SOC_LOGD(TAG, "not burn core voltage in efuse or burn wrong voltage value in chip version: 0%d\n", chip_version);
+            ESP_HW_LOGD(TAG, "not burn core voltage in efuse or burn wrong voltage value in chip version: 0%d\n", chip_version);
         }
     }
     else {
-        SOC_LOGD(TAG, "chip_version is less than 3, not burn core voltage in efuse\n");
+        ESP_HW_LOGD(TAG, "chip_version is less than 3, not burn core voltage in efuse\n");
     }
     REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_RTC_DREG, rtc_dbias);
     REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG, dig_dbias);

components/esp_hw_support/port/esp32h2/rtc_clk.c

@@ -21,7 +21,7 @@
 #include "soc/syscon_reg.h"
 #include "soc/system_reg.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "rtc_clk_common.h"
 #include "esp_rom_sys.h"
 
@@ -166,7 +166,7 @@ void rtc_clk_bbpll_configure(rtc_xtal_freq_t xtal_freq, int pll_freq)
     } else {
         div_ref = 0;
         div5_0 = 1;
-        SOC_LOGE(TAG, "invalid pll frequency");
+        ESP_HW_LOGE(TAG, "invalid pll frequency");
     }
 
     REGI2C_WRITE_MASK(I2C_BBPLL, I2C_BBPLL_OC_REF_DIV, div_ref);
@@ -187,7 +187,7 @@ static void rtc_clk_cpu_freq_to_pll_mhz(int cpu_freq_mhz)
     if (RTC_PLL_FREQ_96M % cpu_freq_mhz == 0) {
         div = RTC_PLL_FREQ_96M / cpu_freq_mhz;
     } else {
-        SOC_LOGE(TAG, "invalid frequency");
+        ESP_HW_LOGE(TAG, "invalid frequency");
         abort();
     }
     rtc_clk_cpu_freq_set(DPORT_SOC_CLK_SEL_PLL, div - 1);
@@ -272,7 +272,7 @@ void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t *out_config)
         break;
     }
     default: {
-        SOC_LOGE(TAG, "unsupported frequency configuration");
+        ESP_HW_LOGE(TAG, "unsupported frequency configuration");
         abort();
     }
     }
@@ -328,7 +328,7 @@ rtc_xtal_freq_t rtc_clk_xtal_freq_get(void)
 {
     uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG);
     if (!clk_val_is_valid(xtal_freq_reg)) {
-        SOC_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value: 0x%08x", xtal_freq_reg);
+        ESP_HW_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value: 0x%08x", xtal_freq_reg);
         return RTC_XTAL_FREQ_32M;
     }
     return reg_val_to_clk_val(xtal_freq_reg);
@@ -443,7 +443,7 @@ uint32_t root_clk_slt(uint32_t source)
         rtc_clk_bbpll_disable();
         break;
     default:
-        SOC_LOGE(TAG, "unsupported source clk configuration");
+        ESP_HW_LOGE(TAG, "unsupported source clk configuration");
         root_clk_freq_mhz = RTC_XTAL_FREQ_32M;
         rtc_clk_bbpll_disable();
         source = 0;

components/esp_hw_support/port/esp32h2/rtc_clk_init.c

@@ -20,7 +20,8 @@
 #include "soc/syscon_reg.h"
 #include "hal/cpu_hal.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
+#include "sdkconfig.h"
 #include "rtc_clk_common.h"
 #include "esp_rom_uart.h"
 #include "soc/efuse_reg.h"
@@ -70,7 +71,7 @@ void rtc_clk_init(rtc_clk_config_t cfg)
     root_clk_slt(cfg.root_clk_slt);
     bool res = rtc_clk_cpu_freq_mhz_to_config(cfg.cpu_freq_mhz, &new_config);
     if (!res) {
-        SOC_LOGE(TAG, "invalid CPU frequency value");
+        ESP_HW_LOGE(TAG, "invalid CPU frequency value");
         abort();
     }
     rtc_clk_cpu_freq_set_config(&new_config);

components/esp_hw_support/port/esp32h2/rtc_init.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -17,7 +17,6 @@
 #include "soc/system_reg.h"
 #include "soc/syscon_reg.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
 #include "esp_efuse.h"
 #include "esp_efuse_table.h"
 #include "i2c_pmu.h"

components/esp_hw_support/port/esp32h2/rtc_sleep.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -21,7 +21,7 @@
 #include "regi2c_ctrl.h"
 #include "esp_efuse.h"
 #include "i2c_pmu.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "esp_rom_uart.h"
 
 #if CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2
@@ -81,7 +81,7 @@ void dcdc_ctl(uint32_t mode)
     } else if (mode == 2) {
         REG_SET_FIELD(RTC_CNTL_DCDC_CTRL1_REG, RTC_CNTL_DCDC_MODE_SLP, RTC_CNTL_DCDC_DSLP_MODE);
     } else {
-        SOC_LOGE(TAG, "invalid dcdc mode!\n");
+        ESP_HW_LOGE(TAG, "invalid dcdc mode!\n");
     }
 }
 

components/esp_hw_support/port/esp32s2/rtc_clk.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -22,7 +22,7 @@
 #include "soc/syscon_reg.h"
 #include "esp_rom_sys.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "rtc_clk_common.h"
 #include "sdkconfig.h"
 
@@ -131,7 +131,7 @@ uint32_t rtc_clk_apll_coeff_calc(uint32_t freq, uint32_t *_o_div, uint32_t *_sdm
     uint32_t rtc_xtal_freq = (uint32_t)rtc_clk_xtal_freq_get();
     if (rtc_xtal_freq == 0) {
         // xtal_freq has not set yet
-        SOC_LOGE(TAG, "Get xtal clock frequency failed, it has not been set yet");
+        ESP_HW_LOGE(TAG, "Get xtal clock frequency failed, it has not been set yet");
         abort();
     }
     /* Reference formula: apll_freq = xtal_freq * (4 + sdm2 + sdm1/256 + sdm0/65536) / ((o_div + 2) * 2)
@@ -148,7 +148,7 @@ uint32_t rtc_clk_apll_coeff_calc(uint32_t freq, uint32_t *_o_div, uint32_t *_sdm
      * 350 MHz / ((31 + 2) * 2) = 5303031 Hz (for ceil) */
     o_div = (int)(SOC_APLL_MULTIPLIER_OUT_MIN_HZ / (float)(freq * 2) + 1) - 2;
     if (o_div > 31) {
-        SOC_LOGE(TAG, "Expected frequency is too small");
+        ESP_HW_LOGE(TAG, "Expected frequency is too small");
         return 0;
     }
     if (o_div < 0) {
@@ -158,7 +158,7 @@ uint32_t rtc_clk_apll_coeff_calc(uint32_t freq, uint32_t *_o_div, uint32_t *_sdm
          * 500 MHz / ((0 + 2) * 2) = 125000000 Hz */
         o_div = (int)(SOC_APLL_MULTIPLIER_OUT_MAX_HZ / (float)(freq * 2)) - 2;
         if (o_div < 0) {
-            SOC_LOGE(TAG, "Expected frequency is too big");
+            ESP_HW_LOGE(TAG, "Expected frequency is too big");
             return 0;
         }
     }
@@ -315,7 +315,7 @@ void rtc_clk_bbpll_configure(rtc_xtal_freq_t xtal_freq, int pll_freq)
             break;
         }
         if (ext_cap == 15) {
-            SOC_LOGE(TAG, "BBPLL SOFTWARE CAL FAIL");
+            ESP_HW_LOGE(TAG, "BBPLL SOFTWARE CAL FAIL");
             abort();
         }
     }
@@ -340,7 +340,7 @@ static void rtc_clk_cpu_freq_to_pll_mhz(int cpu_freq_mhz)
         dbias = DIG_DBIAS_240M;
         per_conf = DPORT_CPUPERIOD_SEL_240;
     } else {
-        SOC_LOGE(TAG, "invalid frequency");
+        ESP_HW_LOGE(TAG, "invalid frequency");
         abort();
     }
     REG_SET_FIELD(DPORT_CPU_PER_CONF_REG, DPORT_CPUPERIOD_SEL, per_conf);
@@ -450,7 +450,7 @@ void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t* out_config)
                 div = 2;
                 freq_mhz = 240;
             } else {
-                SOC_LOGE(TAG, "unsupported frequency configuration");
+                ESP_HW_LOGE(TAG, "unsupported frequency configuration");
                 abort();
             }
             break;
@@ -463,7 +463,7 @@ void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t* out_config)
             break;
         case DPORT_SOC_CLK_SEL_APLL:
         default:
-            SOC_LOGE(TAG, "unsupported frequency configuration");
+            ESP_HW_LOGE(TAG, "unsupported frequency configuration");
             abort();
     }
     *out_config = (rtc_cpu_freq_config_t) {

components/esp_hw_support/port/esp32s2/rtc_clk_init.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -17,7 +17,7 @@
 #include "soc/syscon_reg.h"
 #include "hal/cpu_hal.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "sdkconfig.h"
 #include "rtc_clk_common.h"
 
@@ -57,7 +57,7 @@ void rtc_clk_init(rtc_clk_config_t cfg)
     uint32_t freq_before = old_config.freq_mhz;
     bool res = rtc_clk_cpu_freq_mhz_to_config(cfg.cpu_freq_mhz, &new_config);
     if (!res) {
-        SOC_LOGE(TAG, "invalid CPU frequency value");
+        ESP_HW_LOGE(TAG, "invalid CPU frequency value");
         abort();
     }
     rtc_clk_cpu_freq_set_config(&new_config);

components/esp_hw_support/port/esp32s2/rtc_init.c

@@ -15,7 +15,7 @@
 #include "soc/extmem_reg.h"
 #include "regi2c_ulp.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "esp_efuse.h"
 #include "esp_efuse_table.h"
 
@@ -276,7 +276,7 @@ static void calibrate_ocode(void)
         if (odone_flag && bg_odone_flag)
             break;
         if (cycle1 >= timeout_cycle) {
-            SOC_LOGW(TAG, "o_code calibration fail");
+            ESP_HW_LOGW(TAG, "o_code calibration fail");
             break;
         }
     }

components/esp_hw_support/port/esp32s3/rtc_clk.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -22,7 +22,7 @@
 #include "soc/system_reg.h"
 #include "esp_rom_sys.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "rtc_clk_common.h"
 #include "hal/usb_serial_jtag_ll.h"
 #include "sdkconfig.h"
@@ -304,7 +304,7 @@ static void rtc_clk_cpu_freq_to_pll_mhz(int cpu_freq_mhz)
         dbias = DIG_DBIAS_240M;
         per_conf = DPORT_CPUPERIOD_SEL_240;
     } else {
-        SOC_LOGE(TAG, "invalid frequency");
+        ESP_HW_LOGE(TAG, "invalid frequency");
     }
     REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG, dbias);
     wait_dig_dbias_valid(2);
@@ -416,7 +416,7 @@ void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t *out_config)
             div = 2;
             freq_mhz = 240;
         } else {
-            SOC_LOGE(TAG, "unsupported frequency configuration");
+            ESP_HW_LOGE(TAG, "unsupported frequency configuration");
             return;
         }
         break;
@@ -428,7 +428,7 @@ void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t *out_config)
         freq_mhz = source_freq_mhz;
         break;
     default:
-        SOC_LOGE(TAG, "unsupported frequency configuration");
+        ESP_HW_LOGE(TAG, "unsupported frequency configuration");
         return;
     }
     *out_config = (rtc_cpu_freq_config_t) {
@@ -500,7 +500,7 @@ rtc_xtal_freq_t rtc_clk_xtal_freq_get(void)
 {
     uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG);
     if (!clk_val_is_valid(xtal_freq_reg)) {
-        SOC_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value: 0x%08x", xtal_freq_reg);
+        ESP_HW_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value: 0x%08x", xtal_freq_reg);
         return RTC_XTAL_FREQ_40M;
     }
     return reg_val_to_clk_val(xtal_freq_reg);

components/esp_hw_support/port/esp32s3/rtc_clk_init.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -15,7 +15,7 @@
 #include "soc/syscon_reg.h"
 #include "hal/cpu_hal.h"
 #include "regi2c_ctrl.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "rtc_clk_common.h"
 
 static const char *TAG = "rtc_clk_init";
@@ -55,7 +55,7 @@ void rtc_clk_init(rtc_clk_config_t cfg)
     uint32_t freq_before = old_config.freq_mhz;
     bool res = rtc_clk_cpu_freq_mhz_to_config(cfg.cpu_freq_mhz, &new_config);
     if (!res) {
-        SOC_LOGE(TAG, "invalid CPU frequency value");
+        ESP_HW_LOGE(TAG, "invalid CPU frequency value");
         abort();
     }
     rtc_clk_cpu_freq_set_config(&new_config);

components/esp_hw_support/port/esp32s3/rtc_init.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -16,7 +16,7 @@
 #include "soc/syscon_reg.h"
 #include "regi2c_ctrl.h"
 #include "regi2c_ulp.h"
-#include "soc_log.h"
+#include "esp_hw_log.h"
 #include "esp_err.h"
 #include "esp_attr.h"
 #include "esp_efuse.h"
@@ -73,7 +73,7 @@ void rtc_init(rtc_config_t cfg)
         esp_err_t err = esp_efuse_read_field_blob(ESP_EFUSE_BLK_VER_MAJOR, &blk_ver_major, ESP_EFUSE_BLK_VER_MAJOR[0]->bit_count);
         if (err != ESP_OK) {
             blk_ver_major = 0;
-            SOC_LOGW(TAG, "efuse read fail, set default blk_ver_major: %d\n", blk_ver_major);
+            ESP_HW_LOGW(TAG, "efuse read fail, set default blk_ver_major: %d\n", blk_ver_major);
         }
 
         //default blk_ver_major will fallback to using the self-calibration way for OCode
@@ -289,7 +289,7 @@ static void calibrate_ocode(void)
             break;
         }
         if (cycle1 >= timeout_cycle) {
-            SOC_LOGW(TAG, "o_code calibration fail\n");
+            ESP_HW_LOGW(TAG, "o_code calibration fail\n");
             break;
         }
     }

components/esp_hw_support/port/include/esp_hw_log.h

@@ -0,0 +1,33 @@
+/*
+ * SPDX-FileCopyrightText: 2016-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+#include "esp_rom_sys.h"
+
+/**
+ * @file esp_hw_log.h
+ * @brief ESP HW Support logging functions
+ *
+ * This header file provides wrappers for logging functions for libraries which may or
+ * may not use the ESP-IDF environment.
+ */
+
+#ifdef ESP_PLATFORM
+#include "esp_log.h"
+#define ESP_HW_LOGE(tag, fmt, ...) ESP_EARLY_LOGE(tag, fmt, ##__VA_ARGS__)
+#define ESP_HW_LOGW(tag, fmt, ...) ESP_EARLY_LOGW(tag, fmt, ##__VA_ARGS__)
+#define ESP_HW_LOGI(tag, fmt, ...) ESP_EARLY_LOGI(tag, fmt, ##__VA_ARGS__)
+#define ESP_HW_LOGD(tag, fmt, ...) ESP_EARLY_LOGD(tag, fmt, ##__VA_ARGS__)
+#define ESP_HW_LOGV(tag, fmt, ...) ESP_EARLY_LOGV(tag, fmt, ##__VA_ARGS__)
+
+#else
+
+#define ESP_HW_LOGE(tag, fmt, ...) esp_rom_printf("%s(err): " fmt, tag, ##__VA_ARGS__)
+#define ESP_HW_LOGW(tag, fmt, ...) esp_rom_printf("%s(warn): " fmt, tag, ##__VA_ARGS__)
+#define ESP_HW_LOGI(tag, fmt, ...) esp_rom_printf("%s(info): " fmt, tag, ##__VA_ARGS__)
+#define ESP_HW_LOGD(tag, fmt, ...) esp_rom_printf("%s(dbg): " fmt, tag, ##__VA_ARGS__)
+#define ESP_HW_LOGV(tag, fmt, ...) esp_rom_printf("%s: " fmt, tag, ##__VA_ARGS__)
+#endif //ESP_PLATFORM

components/esp_hw_support/port/include/esp_spiram.h

@@ -0,0 +1,15 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#if CONFIG_IDF_TARGET_ESP32
+#include "esp32/spiram.h"
+#elif CONFIG_IDF_TARGET_ESP32S2
+#include "esp32s2/spiram.h"
+#elif CONFIG_IDF_TARGET_ESP32S3
+#include "esp32s3/spiram.h"
+#endif

components/esp_hw_support/rtc_wdt.c

@@ -5,7 +5,7 @@
  */
 
 #include "soc/efuse_periph.h"
-#include "soc/rtc_wdt.h"
+#include "rtc_wdt.h"
 #include "soc/rtc.h"
 #include "hal/efuse_ll.h"
 

components/esp_hw_support/test/test_himem.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -12,9 +12,9 @@
 #include "esp_system.h"
 #include "esp32/rom/cache.h"
 #include "sdkconfig.h"
-#include "esp32/himem.h"
 
 #if CONFIG_IDF_TARGET_ESP32
+#include "esp_himem.h"
 
 #if CONFIG_SPIRAM_BANKSWITCH_ENABLE
 

components/esp_hw_support/test/test_random.c

@@ -1,12 +1,12 @@
 /*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 #include <stdio.h>
 #include <string.h>
 #include "unity.h"
-#include "esp_system.h"
+#include "esp_random.h"
 
 /* Note: these are just sanity tests, not the same as
    entropy tests

components/esp_lcd/test_apps/i80_lcd/main/test_i80_lcd_panel.c

@@ -9,6 +9,7 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "unity.h"
+#include "esp_random.h"
 #include "esp_lcd_panel_io.h"
 #include "esp_lcd_panel_vendor.h"
 #include "esp_lcd_panel_ops.h"

components/esp_lcd/test_apps/rgb_lcd/main/test_rgb_panel.c

@@ -8,7 +8,7 @@
 #include "unity.h"
 #include "esp_lcd_panel_rgb.h"
 #include "esp_lcd_panel_ops.h"
-#include "esp_system.h"
+#include "esp_random.h"
 #include "test_rgb_board.h"
 
 void test_app_include_rgb_lcd(void)

components/esp_lcd/test_apps/spi_lcd/main/test_spi_lcd_panel.c

@@ -12,7 +12,7 @@
 #include "esp_lcd_panel_io.h"
 #include "esp_lcd_panel_vendor.h"
 #include "esp_lcd_panel_ops.h"
-#include "esp_system.h"
+#include "esp_random.h"
 #include "soc/soc_caps.h"
 #include "test_spi_board.h"
 

components/esp_netif/lwip/esp_netif_lwip.c

@@ -13,6 +13,7 @@
 
 #include "esp_netif.h"
 #include "esp_netif_private.h"
+#include "esp_random.h"
 
 #if CONFIG_ESP_NETIF_TCPIP_LWIP
 

components/esp_phy/src/phy_init.c

@@ -13,7 +13,7 @@
 #include "soc/rtc.h"
 #include "esp_err.h"
 #include "esp_phy_init.h"
-#include "esp_system.h"
+#include "esp_mac.h"
 #include "esp_log.h"
 #include "nvs.h"
 #include "nvs_flash.h"

components/esp_system/eh_frame_parser.c

@@ -16,7 +16,7 @@
  * http://dwarfstd.org/Download.php
  */
 
-#include "eh_frame_parser.h"
+#include "esp_private/eh_frame_parser.h"
 #include "esp_private/panic_internal.h"
 #include <string.h>
 

components/esp_system/include/eh_frame_parser.h

@@ -1,35 +0,0 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-
-#ifndef EH_FRAME_PARSER_H
-#define EH_FRAME_PARSER_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @brief Print backtrace for the given execution frame.
- *
- * @param frame_or Snapshot of the CPU registers when the program stopped its
- *                 normal execution. This frame is usually generated on the
- *                 stack when an exception or an interrupt occurs.
- */
-void esp_eh_frame_print_backtrace(const void *frame_or);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif

components/esp_system/include/esp_private/eh_frame_parser.h

@@ -0,0 +1,27 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef EH_FRAME_PARSER_H
+#define EH_FRAME_PARSER_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Print backtrace for the given execution frame.
+ *
+ * @param frame_or Snapshot of the CPU registers when the program stopped its
+ *                 normal execution. This frame is usually generated on the
+ *                 stack when an exception or an interrupt occurs.
+ */
+void esp_eh_frame_print_backtrace(const void *frame_or);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

components/esp_system/include/esp_system.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -14,15 +14,6 @@
 #include "esp_bit_defs.h"
 #include "esp_idf_version.h"
 
-#include "sdkconfig.h"
-
-// For backward compatibility. These headers
-// contains hardware operation functions and definitions
-// that were originally declared in this header.
-#include "esp_mac.h"
-#include "esp_chip_info.h"
-#include "esp_random.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif

components/esp_system/int_wdt.c

@@ -16,6 +16,7 @@
 #include "esp_intr_alloc.h"
 #include "esp_attr.h"
 #include "esp_log.h"
+#include "esp_chip_info.h"
 #include "esp_freertos_hooks.h"
 #include "soc/timer_periph.h"
 #include "esp_private/periph_ctrl.h"

components/esp_system/port/arch/riscv/panic_arch.c

@@ -24,7 +24,7 @@
 #endif
 
 #if CONFIG_ESP_SYSTEM_USE_EH_FRAME
-#include "eh_frame_parser.h"
+#include "esp_private/eh_frame_parser.h"
 #endif
 
 

components/esp_system/port/cpu_start.c

@@ -12,7 +12,7 @@
 #include "esp_err.h"
 
 #include "esp_log.h"
-#include "esp_system.h"
+#include "esp_chip_info.h"
 
 #include "esp_efuse.h"
 #include "esp_private/cache_err_int.h"
@@ -76,7 +76,6 @@
 #include "soc/periph_defs.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spinlock.h"
 
 #if CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX || CONFIG_ESP32S3_TRAX
 #include "esp_private/trax.h"

components/esp_system/port/soc/esp32s2/usb_console.c

@@ -1,16 +1,8 @@
-// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include <stdio.h>
 #include <string.h>
@@ -27,7 +19,6 @@
 #include "soc/rtc_cntl_reg.h"
 #include "soc/usb_struct.h"
 #include "soc/usb_reg.h"
-#include "soc/spinlock.h"
 #include "hal/soc_hal.h"
 #include "esp_rom_uart.h"
 #include "esp_rom_sys.h"

components/esp_system/port/soc/esp32s3/usb_console.c

@@ -1,16 +1,8 @@
-// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include <stdio.h>
 #include <string.h>
@@ -27,7 +19,7 @@
 #include "soc/rtc_cntl_reg.h"
 #include "soc/usb_struct.h"
 #include "soc/usb_reg.h"
-#include "soc/spinlock.h"
+#include "spinlock.h"
 #include "hal/soc_hal.h"
 #include "esp_rom_uart.h"
 #include "esp_rom_sys.h"

components/esp_system/stack_check.c

@@ -1,19 +1,12 @@
-// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include "sdkconfig.h"
 #include "esp_system.h"
+#include "esp_random.h"
 #include "esp_rom_sys.h"
 
 #if CONFIG_COMPILER_STACK_CHECK

components/esp_system/test/test_sleep.c

@@ -26,6 +26,7 @@
 #include "esp_rom_sys.h"
 #include "esp_timer.h"
 #include "esp_private/esp_clk.h"
+#include "esp_random.h"
 
 #define ESP_EXT0_WAKEUP_LEVEL_LOW 0
 #define ESP_EXT0_WAKEUP_LEVEL_HIGH 1

components/esp_system/test_eh_frame_parser/main.c

@@ -1,17 +1,9 @@
 
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 /**
  * @file DWARF Exception Frames parser header
@@ -30,7 +22,7 @@
 #include <stdbool.h>
 #include <assert.h>
 #include <ucontext.h>
-#include "../include/eh_frame_parser.h"
+#include "../include/esp_private/eh_frame_parser.h"
 #include "eh_frame_parser_impl.h"
 
 /**

components/esp_timer/src/esp_timer.c

@@ -15,7 +15,6 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "freertos/semphr.h"
-#include "soc/spinlock.h"
 #include "esp_timer.h"
 #include "esp_timer_impl.h"
 

components/esp_wifi/esp32/esp_adapter.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -20,7 +20,8 @@
 #include "freertos/portmacro.h"
 #include "freertos/xtensa_api.h"
 #include "esp_types.h"
-#include "esp_system.h"
+#include "esp_random.h"
+#include "esp_mac.h"
 #include "esp_task.h"
 #include "esp_intr_alloc.h"
 #include "esp_attr.h"

components/esp_wifi/esp32c3/esp_adapter.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -20,7 +20,8 @@
 #include "riscv/interrupt.h"
 #include "riscv/riscv_interrupts.h"
 #include "esp_types.h"
-#include "esp_system.h"
+#include "esp_random.h"
+#include "esp_mac.h"
 #include "esp_task.h"
 #include "esp_intr_alloc.h"
 #include "esp_attr.h"

components/esp_wifi/esp32s2/esp_adapter.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -20,7 +20,8 @@
 #include "freertos/portmacro.h"
 #include "freertos/xtensa_api.h"
 #include "esp_types.h"
-#include "esp_system.h"
+#include "esp_random.h"
+#include "esp_mac.h"
 #include "esp_task.h"
 #include "esp_intr_alloc.h"
 #include "esp_attr.h"

components/esp_wifi/esp32s3/esp_adapter.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -19,7 +19,8 @@
 #include "freertos/portmacro.h"
 #include "freertos/xtensa_api.h"
 #include "esp_types.h"
-#include "esp_system.h"
+#include "esp_random.h"
+#include "esp_mac.h"
 #include "esp_task.h"
 #include "esp_intr_alloc.h"
 #include "esp_attr.h"

components/esp_wifi/test/test_wifi.c

@@ -12,7 +12,7 @@
 
 #include "string.h"
 #include "unity.h"
-#include "esp_system.h"
+#include "esp_mac.h"
 #include "esp_event.h"
 #include "esp_wifi.h"
 #include "esp_wifi_types.h"

components/espcoredump/include_core_dump/esp_core_dump_common.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -7,7 +7,6 @@
 #define ESP_CORE_DUMP_COMMON_H_
 
 #include "freertos/FreeRTOS.h"
-#include "esp_debug_helpers.h"
 #include "esp_app_format.h"
 #include "esp_core_dump_types.h"
 

components/espcoredump/include_core_dump/esp_core_dump_port.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -18,7 +18,6 @@
 
 #include "sdkconfig.h"
 #include "freertos/FreeRTOS.h"
-#include "esp_debug_helpers.h"
 #include "esp_app_format.h"
 #include "esp_core_dump_types.h"
 #include "esp_core_dump_port_impl.h"

components/fatfs/test/test_fatfs_sdmmc.c

@@ -12,7 +12,7 @@
 #include <sys/unistd.h>
 #include "unity.h"
 #include "esp_log.h"
-#include "esp_system.h"
+#include "esp_random.h"
 #include "esp_vfs.h"
 #include "esp_vfs_fat.h"
 #include "freertos/FreeRTOS.h"

components/fatfs/test/test_fatfs_spiflash.c

@@ -1,16 +1,8 @@
-// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include <stdio.h>
 #include <stdlib.h>
@@ -21,7 +13,7 @@
 #include "unity.h"
 #include "test_utils.h"
 #include "esp_log.h"
-#include "esp_system.h"
+#include "esp_random.h"
 #include "esp_vfs.h"
 #include "esp_vfs_fat.h"
 #include "freertos/FreeRTOS.h"

components/freertos/FreeRTOS-Kernel/portable/riscv/include/freertos/portmacro.h

@@ -42,7 +42,7 @@
 #include <stdlib.h>
 #include <stdbool.h>
 #include <stdio.h>
-#include "soc/spinlock.h"
+#include "spinlock.h"
 #include "soc/interrupt_core0_reg.h"
 #include "esp_macro.h"
 #include "esp_attr.h"

components/freertos/FreeRTOS-Kernel/portable/riscv/port.c

@@ -50,7 +50,6 @@
 #include "esp_attr.h"
 #include "esp_system.h"
 #include "esp_intr_alloc.h"
-#include "esp_debug_helpers.h"
 #include "esp_log.h"
 #include "FreeRTOS.h"       /* This pulls in portmacro.h */
 #include "task.h"

components/freertos/FreeRTOS-Kernel/portable/xtensa/include/freertos/portmacro.h

@@ -71,7 +71,7 @@
 #include <xtensa/hal.h>             /* required for xthal_get_ccount. [refactor-todo] use cpu_hal instead */
 #include <xtensa/xtruntime.h>       /* required for XTOS_SET_INTLEVEL. [refactor-todo] add common intr functions to esp_hw_support */
 #include "xt_instr_macros.h"
-#include "soc/spinlock.h"
+#include "spinlock.h"
 #include "hal/cpu_hal.h"
 #include "esp_private/crosscore_int.h"
 #include "esp_macro.h"

components/freertos/test/test_xtensa_loadstore_handler.c

@@ -1,3 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 /*
  Test for LoadStore exception handlers. This test performs unaligned load and store in 32bit aligned addresses
 */
@@ -6,7 +12,7 @@
 #include <stdio.h>
 #include <esp_heap_caps.h>
 #include "sdkconfig.h"
-#include "esp_system.h"
+#include "esp_random.h"
 #include "unity.h"
 
 #if CONFIG_IDF_TARGET_ARCH_XTENSA

components/hal/esp32/include/hal/cpu_ll.h

@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #pragma once
 
 #include <stdint.h>
@@ -183,6 +175,16 @@ static inline void cpu_ll_waiti(void)
     asm volatile ("waiti 0\n");
 }
 
+static inline void cpu_ll_compare_and_set_native(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
+{
+    __asm__ __volatile__ (
+        "WSR 	    %2,SCOMPARE1 \n"
+        "S32C1I     %0, %1, 0	 \n"
+        :"=r"(*set)
+        :"r"(addr), "r"(compare), "0"(*set)
+    );
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32c2/include/hal/cpu_ll.h

@@ -232,6 +232,21 @@ static inline void cpu_ll_write_dedic_gpio_mask(uint32_t mask, uint32_t value)
     RV_CLEAR_CSR(CSR_GPIO_OUT_USER, mask & ~(value));
 }
 
+static inline void cpu_ll_compare_and_set_native(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
+{
+    uint32_t old_value;
+    unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
+
+    old_value = *addr;
+    if (old_value == compare) {
+        *addr = *set;
+    }
+
+    RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
+
+    *set = old_value;
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32c3/include/hal/cpu_ll.h

@@ -232,6 +232,21 @@ static inline void cpu_ll_write_dedic_gpio_mask(uint32_t mask, uint32_t value)
     RV_CLEAR_CSR(CSR_GPIO_OUT_USER, mask & ~(value));
 }
 
+static inline void cpu_ll_compare_and_set_native(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
+{
+    uint32_t old_value;
+    unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
+
+    old_value = *addr;
+    if (old_value == compare) {
+        *addr = *set;
+    }
+
+    RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
+
+    *set = old_value;
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32h2/include/hal/cpu_ll.h

@@ -225,6 +225,21 @@ static inline void cpu_ll_write_dedic_gpio_mask(uint32_t mask, uint32_t value)
     RV_CLEAR_CSR(CSR_GPIO_OUT_USER, mask & ~(value));
 }
 
+static inline void cpu_ll_compare_and_set_native(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
+{
+    uint32_t old_value;
+    unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
+
+    old_value = *addr;
+    if (old_value == compare) {
+        *addr = *set;
+    }
+
+    RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
+
+    *set = old_value;
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32s2/include/hal/cpu_ll.h

@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #pragma once
 #include <stdint.h>
 
@@ -23,6 +15,7 @@
 #include "xtensa/config/extreg.h"
 #include "esp_bit_defs.h"
 #include "xtensa/config/core.h"
+#include "xtensa/xtruntime.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -202,6 +195,27 @@ static inline void cpu_ll_waiti(void)
     asm volatile ("waiti 0\n");
 }
 
+static inline void cpu_ll_compare_and_set_native(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
+{
+    uint32_t old_value;
+
+    // No S32C1I, so do this by disabling and re-enabling interrupts (slower)
+    uint32_t intlevel;
+    __asm__ __volatile__ ("rsil %0, " XTSTR(XCHAL_EXCM_LEVEL) "\n"
+                          : "=r"(intlevel));
+
+    old_value = *addr;
+    if (old_value == compare) {
+        *addr = *set;
+    }
+
+    __asm__ __volatile__ ("memw \n"
+                          "wsr %0, ps\n"
+                          :: "r"(intlevel));
+
+    *set = old_value;
+}
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32s3/include/hal/cpu_ll.h

@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #pragma once
 
 #include <stdint.h>
@@ -206,6 +198,16 @@ static inline void cpu_ll_write_dedic_gpio_mask(uint32_t mask, uint32_t value)
     asm volatile("ee.wr_mask_gpio_out %0, %1" : : "r"(value), "r"(mask):);
 }
 
+static inline void cpu_ll_compare_and_set_native(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
+{
+    __asm__ __volatile__ (
+        "WSR 	    %2,SCOMPARE1 \n"
+        "S32C1I     %0, %1, 0	 \n"
+        :"=r"(*set)
+        :"r"(addr), "r"(compare), "0"(*set)
+    );
+}
+
 #ifdef __cplusplus
 }
 #endif

components/lwip/port/esp32/include/lwipopts.h

@@ -15,7 +15,7 @@
 #include <sys/types.h>
 #include <sys/select.h>
 #include "esp_task.h"
-#include "esp_system.h"
+#include "esp_random.h"
 #include "sdkconfig.h"
 #include "netif/dhcp_state.h"
 #include "sntp/sntp_get_set_time.h"

components/mbedtls/port/esp_hardware.c

@@ -8,7 +8,7 @@
 #include <sys/types.h>
 #include <stdlib.h>
 #include <stdio.h>
-#include <esp_system.h>
+#include "esp_random.h"
 
 #include <entropy_poll.h>
 

components/mdns/mdns.c

@@ -15,6 +15,8 @@
 #include "mdns.h"
 #include "mdns_private.h"
 #include "mdns_networking.h"
+#include "esp_log.h"
+#include "esp_random.h"
 
 #ifdef MDNS_ENABLE_DEBUG
 void mdns_debug_packet(const uint8_t * data, size_t len);

components/mdns/test_afl_fuzz_host/esp32_mock.h

@@ -52,7 +52,7 @@
 #define ESP_LOGV(a,b,c,d)
 
 #define LWIP_HDR_PBUF_H
-#define __ESP_SYSTEM_H__
+#define __ESP_RANDOM_H__
 #define INC_TASK_H
 
 #define pdMS_TO_TICKS(a) a

components/mqtt/test/test_mqtt.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  *
@@ -22,6 +22,7 @@
 #include "sdkconfig.h"
 #include "test_mqtt_client_broker.h"
 #include "test_mqtt_connection.h"
+#include "esp_mac.h"
 
 static void test_leak_setup(const char * file, long line)
 {

components/mqtt/test/test_mqtt_client_broker.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -7,6 +7,7 @@
 #include "freertos/event_groups.h"
 #include "mqtt_client.h"
 #include "esp_log.h"
+#include "esp_mac.h"
 
 #define WAIT_FOR_EVENT(event) \
     TEST_ASSERT_TRUE(xEventGroupWaitBits(s_event_group, event, pdTRUE, pdTRUE, pdMS_TO_TICKS(COMMON_OPERATION_TIMEOUT)) & event);

components/newlib/random.c

@@ -1,23 +1,15 @@
-// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2018-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #include <sys/random.h>
 #include <sys/param.h>
 #include <assert.h>
 #include <errno.h>
 #include <string.h>
-#include "esp_system.h"
+#include "esp_random.h"
 #include "esp_log.h"
 
 static const char *TAG = "RANDOM";

components/protocomm/src/transports/protocomm_httpd.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2018-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -8,6 +8,7 @@
 #include <freertos/task.h>
 #include <esp_log.h>
 #include <esp_err.h>
+#include "esp_random.h"
 
 #include <esp_http_server.h>
 

components/pthread/test/test_pthread_local_storage.c

@@ -4,7 +4,7 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "test_utils.h"
-#include "esp_system.h"
+#include "esp_random.h"
 
 TEST_CASE("pthread local storage basics", "[pthread]")
 {

components/touch_element/test/test_touch_button.c

@@ -7,6 +7,7 @@
 #include "freertos/queue.h"
 #include "freertos/semphr.h"
 #include "unity.h"
+#include "esp_random.h"
 
 #include "touch_element/touch_element_private.h"
 #include "touch_element/touch_button.h"