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change(soc): rename SOC_CPU_WATCHPOINT_SIZE to SOC_CPU_WATCHPOINT_MAX_REGION_SIZE

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This commit is contained in:
wuzhenghui
2023-11-16 10:26:29 +08:00
committed by BOT
parent 686789de89
commit 0a17593a7f
12 changed files with 27 additions and 27 deletions
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2
components/soc/esp32/include/soc/Kconfig.soc_caps.in
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@ -235,7 +235,7 @@ config SOC_CPU_WATCHPOINTS_NUM
int
default 2
config SOC_CPU_WATCHPOINT_SIZE
config SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
int
default 64

8
components/soc/esp32/include/soc/soc_caps.h
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@ -1,6 +1,6 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -143,9 +143,9 @@
#define SOC_CPU_INTR_NUM 32
#define SOC_CPU_HAS_FPU 1
#define SOC_CPU_BREAKPOINTS_NUM 2
#define SOC_CPU_WATCHPOINTS_NUM 2
#define SOC_CPU_WATCHPOINT_SIZE 64 // bytes
#define SOC_CPU_BREAKPOINTS_NUM 2
#define SOC_CPU_WATCHPOINTS_NUM 2
#define SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 64 // bytes
/*-------------------------- DAC CAPS ----------------------------------------*/
#define SOC_DAC_PERIPH_NUM 2

2
components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
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@ -171,7 +171,7 @@ config SOC_CPU_WATCHPOINTS_NUM
int
default 2
config SOC_CPU_WATCHPOINT_SIZE
config SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
hex
default 0x80000000

8
components/soc/esp32c2/include/soc/soc_caps.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -86,9 +86,9 @@
#define SOC_CPU_INTR_NUM 32
#define SOC_CPU_HAS_FLEXIBLE_INTC 1
#define SOC_CPU_BREAKPOINTS_NUM 2
#define SOC_CPU_WATCHPOINTS_NUM 2
#define SOC_CPU_WATCHPOINT_SIZE 0x80000000 // bytes
#define SOC_CPU_BREAKPOINTS_NUM 2
#define SOC_CPU_WATCHPOINTS_NUM 2
#define SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 0x80000000 // bytes
#define SOC_CPU_IDRAM_SPLIT_USING_PMP 1

2
components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
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@ -255,7 +255,7 @@ config SOC_CPU_WATCHPOINTS_NUM
int
default 8
config SOC_CPU_WATCHPOINT_SIZE
config SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
hex
default 0x80000000

8
components/soc/esp32c3/include/soc/soc_caps.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -117,9 +117,9 @@
#define SOC_CPU_INTR_NUM 32
#define SOC_CPU_HAS_FLEXIBLE_INTC 1
#define SOC_CPU_BREAKPOINTS_NUM 8
#define SOC_CPU_WATCHPOINTS_NUM 8
#define SOC_CPU_WATCHPOINT_SIZE 0x80000000 // bytes
#define SOC_CPU_BREAKPOINTS_NUM 8
#define SOC_CPU_WATCHPOINTS_NUM 8
#define SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 0x80000000 // bytes
/*-------------------------- DIGITAL SIGNATURE CAPS ----------------------------------------*/
/** The maximum length of a Digital Signature in bits. */

2
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
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@ -231,7 +231,7 @@ config SOC_CPU_WATCHPOINTS_NUM
int
default 8
config SOC_CPU_WATCHPOINT_SIZE
config SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
hex
default 0x80000000

2
components/soc/esp32h2/include/soc/soc_caps.h
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@ -116,7 +116,7 @@
#define SOC_CPU_BREAKPOINTS_NUM 8
#define SOC_CPU_WATCHPOINTS_NUM 8
#define SOC_CPU_WATCHPOINT_SIZE 0x80000000 // bytes
#define SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 0x80000000 // bytes
/*-------------------------- DIGITAL SIGNATURE CAPS ----------------------------------------*/
/** The maximum length of a Digital Signature in bits. */

2
components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
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@ -259,7 +259,7 @@ config SOC_CPU_WATCHPOINTS_NUM
int
default 2
config SOC_CPU_WATCHPOINT_SIZE
config SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
int
default 64

8
components/soc/esp32s2/include/soc/soc_caps.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -124,9 +124,9 @@
#define SOC_CPU_CORES_NUM (1U)
#define SOC_CPU_INTR_NUM 32
#define SOC_CPU_BREAKPOINTS_NUM 2
#define SOC_CPU_WATCHPOINTS_NUM 2
#define SOC_CPU_WATCHPOINT_SIZE 64 // bytes
#define SOC_CPU_BREAKPOINTS_NUM 2
#define SOC_CPU_WATCHPOINTS_NUM 2
#define SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 64 // bytes
/*-------------------------- DAC CAPS ----------------------------------------*/
#define SOC_DAC_PERIPH_NUM 2

2
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
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@ -323,7 +323,7 @@ config SOC_CPU_WATCHPOINTS_NUM
int
default 2
config SOC_CPU_WATCHPOINT_SIZE
config SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
int
default 64

8
components/soc/esp32s3/include/soc/soc_caps.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -119,9 +119,9 @@
#define SOC_CPU_INTR_NUM 32
#define SOC_CPU_HAS_FPU 1
#define SOC_CPU_BREAKPOINTS_NUM 2
#define SOC_CPU_WATCHPOINTS_NUM 2
#define SOC_CPU_WATCHPOINT_SIZE 64 // bytes
#define SOC_CPU_BREAKPOINTS_NUM 2
#define SOC_CPU_WATCHPOINTS_NUM 2
#define SOC_CPU_WATCHPOINT_MAX_REGION_SIZE 64 // bytes
/*-------------------------- DIGITAL SIGNATURE CAPS ----------------------------------------*/
/** The maximum length of a Digital Signature in bits. */