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Merge branch 'bugfix/s3_spi_pre_v4.4' into 'release/v4.4'
hal: Fix max value for clkdiv_pre in ESP32-S3 SPI master clock config (v4.4) See merge request espressif/esp-idf!18237
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@ -676,8 +676,8 @@ static inline int spi_ll_master_cal_clock(int fapb, int hz, int duty_cycle, spi_
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if (pre <= 0) {
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pre = 1;
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}
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if (pre > 8192) {
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pre = 8192;
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if (pre > 16) {
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pre = 16;
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}
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errval = abs(spi_ll_freq_for_pre_n(fapb, pre, n) - hz);
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if (bestn == -1 || errval <= besterr) {
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