test(i3c): Add simple test for i2c mode in i3c peripheral

This commit is contained in:
C.S.M
2025-05-26 16:29:04 +08:00
parent 9bec7c3651
commit 1d07729b91
10 changed files with 224 additions and 0 deletions

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# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/esp_driver_i3c/test_apps/i3c_test_apps:
disable:
- if: SOC_I3C_MASTER_SUPPORTED != 1
depends_components:
- esp_driver_i3c

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# This is the project CMakeLists.txt file for the test subproject
cmake_minimum_required(VERSION 3.16)
# "Trim" the build. Include the minimal set of components, main, and anything it depends on.
set(COMPONENTS main)
set(EXTRA_COMPONENT_DIRS
"$ENV{IDF_PATH}/tools/unit-test-app/components"
)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
project(i3c_master_test)
if(CONFIG_COMPILER_DUMP_RTL_FILES)
add_custom_target(check_test_app_sections ALL
COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
--rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_i3c/,${CMAKE_BINARY_DIR}/esp-idf/hal/
--elf-file ${CMAKE_BINARY_DIR}/i3c_master_test.elf
find-refs
--from-sections=.iram0.text
--to-sections=.flash.text,.flash.rodata
--exit-code
DEPENDS ${elf}
)
endif()
message(STATUS "Checking i3c registers are not read-write by half-word")
include($ENV{IDF_PATH}/tools/ci/check_register_rw_half_word.cmake)
check_register_rw_half_word(SOC_MODULES "i3c_mst" "i3c_mst_mem" "hp_sys_clkrst" "lpperi" "lp_clkrst"
HAL_MODULES "i3c_master")

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| Supported Targets | ESP32-P4 |
| ----------------- | -------- |

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set(srcs "test_app_main.c"
"test_i3c_master_common.c"
)
idf_component_register(SRCS ${srcs}
PRIV_REQUIRES unity test_utils esp_driver_i3c
WHOLE_ARCHIVE)

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/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "unity.h"
#include "unity_test_runner.h"
#include "unity_test_utils_memory.h"
#include "esp_heap_caps.h"
#include "sdkconfig.h"
#define LEAKS (700)
void setUp(void)
{
unity_utils_record_free_mem();
}
void tearDown(void)
{
unity_utils_evaluate_leaks_direct(LEAKS);
}
void app_main(void)
{
unity_run_menu();
}

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/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Unlicense OR CC0-1.0
*/
#include <stdio.h>
#include <string.h>
#include "unity.h"
#include "esp_err.h"
#include "driver/i3c_master.h"
#include "driver/i3c_master_i2c.h"
#include "esp_system.h"
#include "freertos/FreeRTOS.h"
#include "esp_log.h"
#include "test_utils.h"
static const char TAG[] = "test-i3c";
TEST_CASE("I3C bus install-uninstall test", "[i3c]")
{
i3c_master_bus_config_t i3c_bus_config = {
.clock_source = I3C_MASTER_CLK_SRC_DEFAULT,
.scl_io_num = 5,
.sda_io_num = 6,
.flags.enable_internal_opendrain = true,
.flags.enable_internal_pullup = true,
.flags.use_dma = true,
.flags.enable_async_trans = true,
.max_transfer_size = 1024,
.trans_queue_depth = 30,
};
i3c_master_bus_handle_t bus_handle;
// Install master bus 0
ESP_LOGI(TAG, "Initialize bus0");
TEST_ESP_OK(i3c_new_master_bus(&i3c_bus_config, &bus_handle));
// Install master bus 0 again
ESP_LOGI(TAG, "Initialize bus0 again");
TEST_ESP_ERR(ESP_ERR_NOT_FOUND, i3c_new_master_bus(&i3c_bus_config, &bus_handle));
ESP_LOGI(TAG, "Delete bus0");
TEST_ESP_OK(i3c_del_master_bus(bus_handle));
}
TEST_CASE("I3C driver memory leaking check", "[i3c]")
{
i3c_master_bus_config_t i3c_bus_config = {
.clock_source = I3C_MASTER_CLK_SRC_DEFAULT,
.scl_io_num = 5,
.sda_io_num = 6,
.flags.enable_internal_opendrain = true,
.flags.enable_internal_pullup = true,
.flags.use_dma = true,
.flags.enable_async_trans = true,
.max_transfer_size = 1024,
.trans_queue_depth = 30,
};
i3c_master_bus_handle_t bus_handle;
int size = esp_get_free_heap_size();
for (uint32_t i = 0; i <= 5; i++) {
TEST_ESP_OK(i3c_new_master_bus(&i3c_bus_config, &bus_handle));
vTaskDelay(10 / portTICK_PERIOD_MS);
TEST_ESP_OK(i3c_del_master_bus(bus_handle));
}
TEST_ASSERT_INT_WITHIN(300, size, esp_get_free_heap_size());
}
TEST_CASE("I3C device add & remove check", "[i3c]")
{
i3c_master_bus_config_t i2c_mst_config_1 = {
.clock_source = I3C_MASTER_CLK_SRC_DEFAULT,
.scl_io_num = 5,
.sda_io_num = 6,
.flags.enable_internal_opendrain = true,
.flags.enable_internal_pullup = true,
.flags.use_dma = true,
.flags.enable_async_trans = true,
.max_transfer_size = 1024,
.trans_queue_depth = 30,
};
i3c_master_bus_handle_t bus_handle;
TEST_ESP_OK(i3c_new_master_bus(&i2c_mst_config_1, &bus_handle));
i3c_device_i2c_config_t dev_cfg_1 = {
.scl_speed_hz = 100 * 1000,
.device_address = 0x10,
};
i3c_master_i2c_device_handle_t dev_1;
i3c_master_bus_add_i2c_device(bus_handle, &dev_cfg_1, &dev_1);
i3c_device_i2c_config_t dev_cfg_2 = {
.scl_speed_hz = 100 * 1000,
.device_address = 0x20,
};
i3c_master_i2c_device_handle_t dev_2;
i3c_master_bus_add_i2c_device(bus_handle, &dev_cfg_2, &dev_2);
i3c_device_i2c_config_t dev_cfg_3 = {
.scl_speed_hz = 100 * 1000,
.device_address = 0x30,
};
i3c_master_i2c_device_handle_t dev_3;
i3c_master_bus_add_i2c_device(bus_handle, &dev_cfg_3, &dev_3);
i3c_master_bus_rm_i2c_device(dev_1);
i3c_master_bus_rm_i2c_device(dev_2);
TEST_ESP_ERR(ESP_ERR_INVALID_STATE, i3c_del_master_bus(bus_handle));
i3c_master_bus_rm_i2c_device(dev_3);
TEST_ESP_OK(i3c_del_master_bus(bus_handle));
}

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# SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: CC0-1.0
import pytest
from pytest_embedded import Dut
from pytest_embedded_idf.utils import idf_parametrize
from pytest_embedded_idf.utils import soc_filtered_targets
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'release',
'cache_safe',
],
indirect=True,
)
@idf_parametrize('target', soc_filtered_targets('SOC_I3C_MASTER_SUPPORTED == 1'), indirect=['target'])
def test_i3c(dut: Dut) -> None:
dut.run_all_single_board_cases()

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CONFIG_PM_ENABLE=y
CONFIG_COMPILER_DUMP_RTL_FILES=y
CONFIG_FREERTOS_USE_TICKLESS_IDLE=y
CONFIG_COMPILER_OPTIMIZATION_NONE=y
CONFIG_ESP_MAIN_TASK_STACK_SIZE=8192
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
CONFIG_I3C_MASTER_ISR_CACHE_SAFE=y

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CONFIG_PM_ENABLE=y
CONFIG_FREERTOS_USE_TICKLESS_IDLE=y
CONFIG_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y

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CONFIG_FREERTOS_HZ=1000
CONFIG_ESP_TASK_WDT_INIT=n