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Merge branch 'change/psram_2t_check_only_on_ap' into 'master'

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psram: limited 2t check only for ap

See merge request espressif/esp-idf!39411
This commit is contained in:
Armando (Dou Yiwen)
2025-05-27 03:10:24 +00:00
parent aebdb81aa6 412b79ed1c
commit 2b81deaca8
2 changed files with 5 additions and 1 deletions
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3
components/esp_psram/device/esp_psram_impl_ap_quad.c
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@ -331,6 +331,7 @@ esp_err_t esp_psram_impl_enable(void)
return ESP_ERR_NOT_SUPPORTED;
}
}
ESP_EARLY_LOGV(TAG, "MFID: 0x%x", PSRAM_QUAD_MFID(psram_id));
if (PSRAM_QUAD_IS_64MBIT_TRIAL(psram_id)) {
s_psram_size = PSRAM_SIZE_8MB;
@ -345,7 +346,7 @@ esp_err_t esp_psram_impl_enable(void)
eid == PSRAM_QUAD_QEMU_16MB_ID ? PSRAM_SIZE_16MB :
eid == PSRAM_QUAD_QEMU_32MB_ID ? PSRAM_SIZE_32MB : 0;
if ((s_psram_size == PSRAM_SIZE_8MB) && s_check_2tmode()) {
if (PSRAM_QUAD_MFID(psram_id) == PSRAM_QUAD_MFID_AP && (s_psram_size == PSRAM_SIZE_8MB) && s_check_2tmode()) {
//2t mode is only valid for EID[47:45] == 0x10 chips
s_psram_size = s_psram_size / 2;
}

3
components/esp_psram/device/esp_quad_psram_defs_ap.h
View File

@ -36,6 +36,8 @@ extern "C" {
// ID
#define PSRAM_QUAD_ID_BITS_NUM 24
#define PSRAM_QUAD_EID_BITS_NUM 48
#define PSRAM_QUAD_MFID_AP 0xD
#define PSRAM_QUAD_MFID_M 0xff
#define PSRAM_QUAD_ID_KGD_M 0xff
#define PSRAM_QUAD_ID_KGD_S 8
#define PSRAM_QUAD_ID_KGD 0x5d
@ -52,6 +54,7 @@ extern "C" {
#define PSRAM_QUAD_EID_BIT_47_45_M 0x07
#define PSRAM_QUAD_EID_BIT_47_45_S 5
#define PSRAM_QUAD_MFID(id) ((id) & PSRAM_QUAD_MFID_M)
#define PSRAM_QUAD_KGD(id) (((id) >> PSRAM_QUAD_ID_KGD_S) & PSRAM_QUAD_ID_KGD_M)
#define PSRAM_QUAD_EID_BIT_47_40(id) (((id) >> PSRAM_QUAD_ID_EID_BIT_47_40_S) & PSRAM_QUAD_ID_EID_BIT_47_40_M)
#define PSRAM_QUAD_SIZE_ID(id) ((PSRAM_QUAD_EID_BIT_47_40(id) >> PSRAM_QUAD_EID_BIT_47_45_S) & PSRAM_QUAD_EID_BIT_47_45_M)