espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-07-29 18:27:20 +02:00
Code Issues Packages Projects Releases Wiki Activity

fix(lp_io): allow edge wakeup types for LP-IO on chips which support it

Browse Source
This commit is contained in:
Marius Vikhammer
2024-11-20 14:30:15 +08:00
parent 4a927ac8d6
commit 2fcebb7483
11 changed files with 25 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
components/esp_driver_gpio/src/rtc_io.c
View File

@ -254,9 +254,11 @@ esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num)
esp_err_t rtc_gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)
{
ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
#if !SOC_RTCIO_EDGE_WAKE_SUPPORTED
if (intr_type == GPIO_INTR_POSEDGE || intr_type == GPIO_INTR_NEGEDGE || intr_type == GPIO_INTR_ANYEDGE) {
return ESP_ERR_INVALID_ARG; // Dont support this mode.
}
#endif //!SOC_RTCIO_EDGE_WAKE_SUPPORTED
RTCIO_ENTER_CRITICAL();
rtcio_hal_wakeup_enable(rtc_io_number_get(gpio_num), intr_type);
RTCIO_EXIT_CRITICAL();

4
components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
View File

@ -567,6 +567,10 @@ config SOC_RTCIO_WAKE_SUPPORTED
bool
default y
config SOC_RTCIO_EDGE_WAKE_SUPPORTED
bool
default y
config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
int
default 8

1
components/soc/esp32c5/include/soc/soc_caps.h
View File

@ -246,6 +246,7 @@
*/
#define SOC_RTCIO_HOLD_SUPPORTED 1
#define SOC_RTCIO_WAKE_SUPPORTED 1
#define SOC_RTCIO_EDGE_WAKE_SUPPORTED 1
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */

4
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
View File

@ -559,6 +559,10 @@ config SOC_RTCIO_WAKE_SUPPORTED
bool
default y
config SOC_RTCIO_EDGE_WAKE_SUPPORTED
bool
default y
config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
int
default 8

1
components/soc/esp32c6/include/soc/soc_caps.h
View File

@ -231,6 +231,7 @@
*/
#define SOC_RTCIO_HOLD_SUPPORTED 1
#define SOC_RTCIO_WAKE_SUPPORTED 1
#define SOC_RTCIO_EDGE_WAKE_SUPPORTED 1
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */

4
components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
View File

@ -387,6 +387,10 @@ config SOC_RTCIO_WAKE_SUPPORTED
bool
default y
config SOC_RTCIO_EDGE_WAKE_SUPPORTED
bool
default y
config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
int
default 8

5
components/soc/esp32c61/include/soc/soc_caps.h
View File

@ -206,8 +206,9 @@
* so it supports unique IOMUX configuration (including IE, OE, PU, PD, DRV etc.)
* when the pins are switched to RTC function.
*/
#define SOC_RTCIO_HOLD_SUPPORTED 1
#define SOC_RTCIO_WAKE_SUPPORTED 1
#define SOC_RTCIO_HOLD_SUPPORTED 1
#define SOC_RTCIO_WAKE_SUPPORTED 1
#define SOC_RTCIO_EDGE_WAKE_SUPPORTED 1
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */

4
components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
View File

@ -731,6 +731,10 @@ config SOC_RTCIO_WAKE_SUPPORTED
bool
default y
config SOC_RTCIO_EDGE_WAKE_SUPPORTED
bool
default y
config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
int
default 8

1
components/soc/esp32p4/include/soc/soc_caps.h
View File

@ -281,6 +281,7 @@
*/
#define SOC_RTCIO_HOLD_SUPPORTED 1
#define SOC_RTCIO_WAKE_SUPPORTED 1
#define SOC_RTCIO_EDGE_WAKE_SUPPORTED 1
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */

2
examples/system/ulp/lp_core/gpio_wakeup/main/lp_core_gpio_wake_up_example_main.c
View File

@ -34,7 +34,7 @@ static void wakeup_gpio_init(void)
rtc_gpio_set_direction(WAKEUP_PIN, RTC_GPIO_MODE_INPUT_ONLY);
rtc_gpio_pulldown_dis(WAKEUP_PIN);
rtc_gpio_pullup_en(WAKEUP_PIN);
rtc_gpio_wakeup_enable(WAKEUP_PIN, GPIO_INTR_LOW_LEVEL);
rtc_gpio_wakeup_enable(WAKEUP_PIN, GPIO_INTR_NEGEDGE);
}
void app_main(void)

3
examples/system/ulp/lp_core/gpio_wakeup/main/ulp/main.c
View File

@ -14,9 +14,6 @@ int main (void)
{
ulp_lp_core_wakeup_main_processor();
/* Wakeup interrupt is a level interrupt, wait 1 sec to
allow user to release button to avoid waking up the ULP multiple times */
ulp_lp_core_delay_us(1000*1000);
ulp_lp_core_gpio_clear_intr_status();
return 0;