espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-07-31 19:24:33 +02:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'fix/i2c_ci_esp32c5' into 'master'

Browse Source 
test(i2c): Re-enable i2c test on esp32c5

Closes IDFCI-2895

See merge request espressif/esp-idf!39040
This commit is contained in:
C.S.M
2025-05-13 14:56:02 +08:00
parent 764d722bec c758af714a
commit 38e84d554a
3 changed files with 27 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
components/esp_driver_i2c/i2c_slave.c
View File

@@ -336,6 +336,14 @@ esp_err_t i2c_slave_transmit(i2c_slave_dev_handle_t i2c_slave, const uint8_t *da
ESP_RETURN_ON_FALSE((i2c_slave->fifo_mode == I2C_SLAVE_FIFO), ESP_ERR_NOT_SUPPORTED, TAG, "non-fifo mode is not supported in this API, please set access_ram_en to false");
esp_err_t ret = ESP_OK;
i2c_hal_context_t *hal = &i2c_slave->base->hal;
#if CONFIG_IDF_TARGET_ESP32C5
// Workaround for c5 digital bug. Please note that following code has no
// functionality. It's just use for workaround the potential issue for avoiding
// secondary transaction.
i2c_ll_slave_enable_auto_start(hal->dev, true);
i2c_ll_start_trans(hal->dev);
i2c_ll_slave_enable_auto_start(hal->dev, false);
#endif
TickType_t wait_ticks = (xfer_timeout_ms == -1) ? portMAX_DELAY : pdMS_TO_TICKS(xfer_timeout_ms);
ESP_RETURN_ON_FALSE(xSemaphoreTake(i2c_slave->slv_tx_mux, wait_ticks) == pdTRUE, ESP_ERR_TIMEOUT, TAG, "transmit timeout");
@@ -358,6 +366,14 @@ esp_err_t i2c_slave_receive(i2c_slave_dev_handle_t i2c_slave, uint8_t *data, siz
ESP_RETURN_ON_FALSE(esp_ptr_internal(data), ESP_ERR_INVALID_ARG, TAG, "buffer must locate in internal RAM if IRAM_SAFE is enabled");
#endif
i2c_hal_context_t *hal = &i2c_slave->base->hal;
#if CONFIG_IDF_TARGET_ESP32C5
// Workaround for c5 digital bug. Please note that following code has no
// functionality. It's just use for workaround the potential issue for avoiding
// secondary transaction.
i2c_ll_slave_enable_auto_start(hal->dev, true);
i2c_ll_start_trans(hal->dev);
i2c_ll_slave_enable_auto_start(hal->dev, false);
#endif
xSemaphoreTake(i2c_slave->slv_rx_mux, portMAX_DELAY);
i2c_slave_receive_t *t = &i2c_slave->receive_desc;

8
components/esp_driver_i2c/i2c_slave_v2.c
View File

@@ -188,6 +188,14 @@ IRAM_ATTR static void i2c_slave_isr_handler(void *arg)
}
#endif
}
#if CONFIG_IDF_TARGET_ESP32C5
// Workaround for c5 digital bug. Please note that following code has no
// functionality. It's just use for workaround the potential issue for avoiding
// secondary transaction.
i2c_ll_slave_enable_auto_start(hal->dev, true);
i2c_ll_start_trans(hal->dev);
i2c_ll_slave_enable_auto_start(hal->dev, false);
#endif
}
#if SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE

3
components/esp_driver_i2c/test_apps/i2c_test_apps/main/test_board.h
View File

@@ -29,6 +29,9 @@ extern "C" {
#if CONFIG_IDF_TARGET_ESP32P4
#define LP_I2C_SCL_IO 4
#define LP_I2C_SDA_IO 5
#elif CONFIG_IDF_TARGET_ESP32C5
#define LP_I2C_SCL_IO 3
#define LP_I2C_SDA_IO 2
#else
#define LP_I2C_SCL_IO 7
#define LP_I2C_SDA_IO 6