feat(sd): sd host driver layer driver NG

This commit is contained in:
armando
2025-05-13 10:43:47 +08:00
parent f9765d0316
commit 402bf0ce58
24 changed files with 2980 additions and 36 deletions

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idf_build_get_property(target IDF_TARGET)
if(${target} STREQUAL "linux")
return() # This component is not supported by the POSIX/Linux simulator
endif()
set(srcs "sd_host.c")
set(public_include "include")
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${public_include}
PRIV_REQUIRES sdmmc)

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# SD Host Driver Interface Layer
This component provides the SD Host driver APIs.

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/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "esp_err.h"
#include "soc/gpio_num.h"
#include "driver/sd_types.h"
#include "sd_protocol_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Configure SD Host slot
*
* @param[in] slot SD Host slot handle
* @param[in] config SD Host slot configuration
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid argument
*/
esp_err_t sd_host_slot_configure(sd_host_slot_handle_t slot, const sd_host_slot_cfg_t *config);
/**
* @brief Do a transaction for the slot
*
* @param[in] slot SD Host slot handle
* @param[in] cmdinfo SD command info, see `sdmmc_command_t`
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid argument
*/
esp_err_t sd_host_slot_do_transaction(sd_host_slot_handle_t slot, sdmmc_command_t *cmdinfo);
/**
* @brief Register SD event callbacks
*
* @note User can deregister a previously registered callback by calling this function and setting the to-be-deregistered callback member in
* the `cbs` structure to NULL.
*
* @param[in] slot SD Host slot handle
* @param[in] cbs Group of callback functions
* @param[in] user_data User data, which will be delivered to the callback functions directly
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid arguments
* - ESP_ERR_INVALID_STATE: Driver state is invalid, you shouldn't call this API at this moment
*/
esp_err_t sd_host_slot_register_event_callbacks(sd_host_slot_handle_t slot, const sd_host_evt_cbs_t *cbs, void *user_data);
/**
* @brief Remove an SD Host slot
*
* @param[in] slot SD Host slot handle
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_STATE: Invalid state, slot is not available
* - ESP_ERR_INVALID_ARG: Invalid argument
*/
esp_err_t sd_host_remove_slot(sd_host_slot_handle_t slot);
/**
* @brief Set an SD Host slot clock always on
*
* @param[in] slot SD Host slot handle
* @param[in] always_on Always on or not
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid argument
*/
esp_err_t sd_host_slot_set_cclk_always_on(sd_host_slot_handle_t slot, bool always_on);
/**
* @brief Enable an SD Host slot IO interrupt
*
* @param[in] slot SD Host slot handle
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid argument
*/
esp_err_t sd_host_slot_enable_io_int(sd_host_slot_handle_t slot);
/**
* @brief Wait for IO interrupt event
*
* @param[in] slot SD Host slot handle
* @param[in] timeout_ticks Timeout ticks
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid argument
* - ESP_ERR_TIMEOUT: Timeout
*/
esp_err_t sd_host_slot_wait_io_int(sd_host_slot_handle_t slot, TickType_t timeout_ticks);
/**
* @brief Get slot info
*
* @param[in] slot SD Host slot handle
* @param[out] info SD slot info
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid argument
*/
esp_err_t sd_host_slot_get_info(sd_host_slot_handle_t slot, sd_host_slot_info_t *info);
/**
* @brief Delete an SD Host controller
*
* @param[in] ctlr SD Host controller handle
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid argument
* - ESP_ERR_INVALID_STATE: Invalid state, there's still registered slot(s)
*/
esp_err_t sd_host_del_controller(sd_host_ctlr_handle_t ctlr);
#ifdef __cplusplus
}
#endif

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/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "esp_err.h"
#include "hal/sd_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief SD Host controller handle
*/
typedef struct sd_host_driver_t *sd_host_ctlr_handle_t;
/**
* @brief SD Host slot handle
*/
typedef struct sd_slot_driver_t *sd_host_slot_handle_t;
/**
* @brief SD Host slot configuration
*/
typedef struct {
struct {
int freq_hz; ///< Frequency in Hz
bool override; ///< If set to true, frequency will be set to freq_hz; If set to false, frequency is unchanged. By default it's false
} freq; ///< Frequency settings
struct {
bool override; ///< If set to true, width will be set to width configured in `sd_host_sdmmc_slot_io_cfg_t`; If set to false, width is unchanged. By default it's false
} width; ///< Bus width settings
struct {
sd_sampling_mode_t mode; ///< Sampling mode, see `sd_sampling_mode_t`
bool override; ///< If set to true, sampling mode will be set to sampling_mode; If set to false, sampling mode is unchanged. By default it's false
} sampling_mode; ///< Sampling mode settings
struct {
sdmmc_delay_phase_t delayphase; ///< Delay phase, see `sdmmc_delay_phase_t`
bool override; ///< If set to true, delay phase will be set to delay_phase; If set to false, delay phase is unchanged. By default it's false
} delay_phase; ///< Delay phase settings
struct {
sdmmc_delay_line_t delayline; ///< Delay line, see `sdmmc_delay_line_t`
bool override; ///< If set to true, delay line will be set to delay_line; If set to false, delay line is unchanged. By default it's false
} delay_line; ///< Delay line settings
} sd_host_slot_cfg_t;
/**
* @brief Slot info
*/
typedef struct {
int freq_hz; ///< Frequency in Hz
uint8_t width; ///< Bus width
sd_mode_t sd_mode; ///< SD mode, see `sd_mode_t`
sd_sampling_mode_t sampling_mode; ///< Sampling mode, see `sd_sampling_mode_t`
} sd_host_slot_info_t;
/*---------------------------------------------
Event Callbacks
----------------------------------------------*/
/**
* @brief SD event data structure
*/
typedef struct {
//leave empty for future-proof
} sd_host_evt_data_t;
/**
* @brief Prototype of SD event callback
*
* @param[in] slot Slot handle
* @param[in] edata SD event data
* @param[in] user_data User registered context, registered when in `esp_isp_register_event_callbacks()`
*
* @return Whether a high priority task is woken up by this function
*/
typedef bool (*sd_host_callback_t)(sd_host_slot_handle_t slot, const sd_host_evt_data_t *edata, void *user_data);
/**
* @brief SD event callbacks
*/
typedef struct {
sd_host_callback_t on_trans_done; ///< Event callback, invoked when one transaction done
sd_host_callback_t on_io_interrupt; ///< Event callback, invoked when IO interrupts
} sd_host_evt_cbs_t;
#ifdef __cplusplus
}
#endif

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/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdbool.h>
#include "esp_err.h"
#include "driver/sd_types.h"
#include "sd_protocol_types.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef struct sd_host_driver_t sd_host_driver_t; /*!< Type of SD driver host context */
typedef struct sd_slot_driver_t sd_slot_driver_t; /*!< Type of SD driver slot context */
/**
* @brief SD driver host driver context
*/
struct sd_host_driver_t {
/**
* @brief Delete an SD Host controller
*
* @param[in] ctlr_ctx SD driver host controller context
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid argument
* - ESP_ERR_INVALID_STATE: Invalid state, there's still registered slot(s)
*/
esp_err_t (*del_ctlr)(sd_host_driver_t *ctlr_ctx);
};
/**
* @brief SD driver API definition
*/
struct sd_slot_driver_t {
/**
* @brief Configure SD Host slot
*
* @param[in] slot_drv SD Host slot driver handle
* @param[in] config SD Host slot configuration
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid argument
*/
esp_err_t (*configure)(sd_slot_driver_t *slot_drv, const sd_host_slot_cfg_t *config);
/**
* @brief Do a transaction for the slot
*
* @param[in] slot_drv SD Host slot driver handle
* @param[in] cmdinfo SD command info, see `sdmmc_command_t`
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid argument
*/
esp_err_t (*do_transaction)(sd_slot_driver_t *slot_drv, sdmmc_command_t *cmdinfo);
/**
* @brief Register SD event callbacks
*
* @note User can deregister a previously registered callback by calling this function and setting the to-be-deregistered callback member in
* the `cbs` structure to NULL.
*
* @param[in] slot_drv SD Host slot driver handle
* @param[in] cbs Group of callback functions
* @param[in] user_data User data, which will be delivered to the callback functions directly
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid arguments
* - ESP_ERR_INVALID_STATE: Driver state is invalid, you shouldn't call this API at this moment
*/
esp_err_t (*register_cbs)(sd_slot_driver_t *slot_drv, const sd_host_evt_cbs_t *cbs, void *user_data);
/**
* @brief Remove an SD Host slot
*
* @param[in] slot_drv SD Host slot driver handle
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_STATE: Invalid state, slot is not available
* - ESP_ERR_INVALID_ARG: Invalid argument
*/
esp_err_t (*remove_slot)(sd_slot_driver_t *slot_drv);
/**
* @brief Set an SD Host slot clock always on
*
* @param[in] slot_drv SD Host slot driver handle
* @param[in] always_on Always on or not
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid argument
*/
esp_err_t (*set_cclk_always_on)(sd_slot_driver_t *slot_drv, bool always_on);
/**
* @brief Enable an SD Host slot IO interrupt
*
* @param[in] slot_drv SD Host slot driver handle
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid argument
*/
esp_err_t (*enable_io_int)(sd_slot_driver_t *slot_drv);
/**
* @brief Wait for IO interrupt event
*
* @param[in] slot SD Host slot handle
* @param[in] timeout_ticks Timeout ticks
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid argument
* - ESP_ERR_TIMEOUT: Timeout
*/
esp_err_t (*wait_io_int)(sd_slot_driver_t *slot_drv, TickType_t timeout_ticks);
/**
* @brief Get slot info
*
* @param[in] slot SD Host slot handle
* @param[out] info SD slot info
*/
esp_err_t (*get_info)(sd_slot_driver_t *slot_drv, sd_host_slot_info_t *info);
};
#ifdef __cplusplus
}
#endif

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/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <string.h>
#include "esp_types.h"
#include "sdkconfig.h"
#include "esp_err.h"
#include "esp_log.h"
#include "esp_check.h"
#include "driver/sd_host.h"
#include "esp_private/sd_driver_interface.h"
static const char *TAG = "SD_HOST";
#define SD_HOST_ARG_CHECK(arg) do { \
if (unlikely(!(arg))) { \
ESP_LOGE(TAG, "invalid argument: null pointer"); \
return ESP_ERR_INVALID_ARG; \
} \
} while(0)
#define SD_HOST_FUNC_CHECK(arg) do { \
if (unlikely(!(arg))) { \
ESP_LOGE(TAG, "controller driver function not supported"); \
return ESP_ERR_NOT_SUPPORTED; \
} \
} while(0)
esp_err_t sd_host_slot_configure(sd_host_slot_handle_t slot, const sd_host_slot_cfg_t *config)
{
SD_HOST_ARG_CHECK(slot && config);
SD_HOST_FUNC_CHECK(slot->configure);
return slot->configure(slot, config);
}
esp_err_t sd_host_slot_do_transaction(sd_host_slot_handle_t slot, sdmmc_command_t *cmdinfo)
{
SD_HOST_ARG_CHECK(slot);
SD_HOST_FUNC_CHECK(slot->do_transaction);
return slot->do_transaction(slot, cmdinfo);
}
esp_err_t sd_host_slot_register_event_callbacks(sd_host_slot_handle_t slot, const sd_host_evt_cbs_t *cbs, void *user_data)
{
SD_HOST_ARG_CHECK(slot);
SD_HOST_FUNC_CHECK(slot->register_cbs);
return slot->register_cbs(slot, cbs, user_data);
}
esp_err_t sd_host_remove_slot(sd_host_slot_handle_t slot)
{
SD_HOST_ARG_CHECK(slot);
SD_HOST_FUNC_CHECK(slot->remove_slot);
return slot->remove_slot(slot);
}
esp_err_t sd_host_del_controller(sd_host_ctlr_handle_t ctlr)
{
SD_HOST_ARG_CHECK(ctlr);
SD_HOST_FUNC_CHECK(ctlr->del_ctlr);
return ctlr->del_ctlr(ctlr);
}
esp_err_t sd_host_slot_set_cclk_always_on(sd_host_slot_handle_t slot, bool always_on)
{
SD_HOST_ARG_CHECK(slot);
SD_HOST_FUNC_CHECK(slot->set_cclk_always_on);
return slot->set_cclk_always_on(slot, always_on);
}
esp_err_t sd_host_slot_enable_io_int(sd_host_slot_handle_t slot)
{
SD_HOST_ARG_CHECK(slot);
SD_HOST_FUNC_CHECK(slot->enable_io_int);
return slot->enable_io_int(slot);
}
esp_err_t sd_host_slot_wait_io_int(sd_host_slot_handle_t slot, TickType_t timeout_ticks)
{
SD_HOST_ARG_CHECK(slot);
SD_HOST_FUNC_CHECK(slot->wait_io_int);
return slot->wait_io_int(slot, timeout_ticks);
}
esp_err_t sd_host_slot_get_info(sd_host_slot_handle_t slot, sd_host_slot_info_t *info)
{
SD_HOST_ARG_CHECK(slot);
SD_HOST_FUNC_CHECK(slot->get_info);
return slot->get_info(slot, info);
}

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@ -8,13 +8,15 @@ set(public_include "include")
if(CONFIG_SOC_SDMMC_HOST_SUPPORTED)
list(APPEND srcs "src/sdmmc_transaction.c"
"src/sdmmc_host.c")
"src/sd_host_sdmmc.c"
"src/sd_trans_sdmmc.c")
endif()
if(${target} STREQUAL "linux")
set(requires "")
set(priv_requires esp_timer)
else()
set(requires sdmmc esp_driver_gpio)
set(requires esp_driver_sd_intf sdmmc esp_driver_gpio)
set(priv_requires esp_timer esp_pm esp_mm)
endif()

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menu "ESP-Driver: SD Host SDMMC Controller Configurations"
depends on SOC_SDMMC_HOST_SUPPORTED
config SD_HOST_SDMMC_ISR_CACHE_SAFE
bool "SD Host ISR Cache-Safe"
default n
help
Ensure the SD Host SDMMC driver ISR is Cache-Safe. When enabled,
the ISR handler will be available when the cache is disabled.
endmenu # SD Host Controller Configurations

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/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "esp_err.h"
#include "soc/gpio_num.h"
#include "driver/sd_types.h"
#ifdef __cplusplus
extern "C" {
#endif
#define SD_HOST_SLOT_WIDTH_DEFAULT 0 ///< use the maximum possible width for the slot
/**
* @brief SD Host SDMMC controller configuration
*/
typedef struct {
uint32_t event_queue_items; ///< Event queue items. If 0, fallback to default queue item number (4)
uint32_t dma_desc_num; ///< Number of DMA descriptor, fallback to default dma descriptor number (4)
} sd_host_sdmmc_cfg_t;
/**
* @brief SD Host slot IO configuration
*/
typedef struct {
sd_bus_width_t width; ///< Slot bus width
gpio_num_t clk_io; ///< Clock
gpio_num_t cmd_io; ///< Command
gpio_num_t cd_io; ///< Card detect
gpio_num_t wp_io; ///< Write protect
gpio_num_t d0_io; ///< Data0
gpio_num_t d1_io; ///< Data1
gpio_num_t d2_io; ///< Data2
gpio_num_t d3_io; ///< Data3
gpio_num_t d4_io; ///< Data4
gpio_num_t d5_io; ///< Data5
gpio_num_t d6_io; ///< Data6
gpio_num_t d7_io; ///< Data7
} sd_host_sdmmc_slot_io_cfg_t;
/**
* @brief SD Host slot init configuration
*/
typedef struct {
int slot_id; ///< Slot ID
sd_mode_t sd_mode; ///< SD mode, see `sd_mode_t`
sd_host_sdmmc_slot_io_cfg_t io_config; ///< IO configuration
struct {
uint32_t internal_pullup: 1; ///< Enable internal pullup or not
uint32_t wp_active_high: 1; ///< WP signal is active high or not
} slot_flags; ///< Slot flags
} sd_host_slot_sdmmc_init_cfg_t;
/**
* @brief Create an SDMMC Host controller
*
* @param[in] config SDMMC Host controller configuration
* @param[out] ret_handle Returned SDMMC Host controller handle
*
* @return
* - ESP_OK: On success
* - ESP_ERR_NO_MEM: Out of memory
* - ESP_ERR_NOT_FOUND: Controller not found
* - ESP_ERR_INVALID_ARG: Invalid argument
*/
esp_err_t sd_host_create_sdmmc_controller(const sd_host_sdmmc_cfg_t *config, sd_host_ctlr_handle_t *ret_handle);
/**
* @brief Add an SD slot to the SDMMC Host controller
*
* @param[in] ctlr SD Host controller handle
* @param[in] config SD Host slot init configuration
* @param[out] ret_handle Returned SD Host slot handle
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_STATE: Invalid state, slot is not available
* - ESP_ERR_INVALID_ARG: Invalid argument
* - ESP_ERR_NO_MEM: Out of memory
*/
esp_err_t sd_host_sdmmc_controller_add_slot(sd_host_ctlr_handle_t ctlr, const sd_host_slot_sdmmc_init_cfg_t *config, sd_host_slot_handle_t *ret_handle);
#ifdef __cplusplus
}
#endif

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/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdbool.h>
#include <stddef.h>
#include <string.h>
#include <sys/param.h>
#include "esp_log.h"
#include "esp_intr_alloc.h"
#include "esp_check.h"
#include "esp_pm.h"
#include "esp_cache.h"
#include "freertos/FreeRTOS.h"
#include "freertos/semphr.h"
#include "driver/sd_host_sdmmc.h"
#include "esp_private/sd_driver_interface.h"
#include "sd_protocol_defs.h"
#include "soc/soc_caps.h"
#if SOC_SDMMC_HOST_SUPPORTED
#include "hal/sdmmc_hal.h"
#include "hal/sd_types.h"
#include "hal/sdmmc_ll.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
#if SOC_SDMMC_HOST_SUPPORTED
#if CONFIG_SD_HOST_SDMMC_ISR_CACHE_SAFE
#define SD_HOST_SDMMC_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
#else
#define SD_HOST_SDMMC_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
#endif
#if !SOC_RCC_IS_INDEPENDENT
// Reset and Clock Control registers are mixing with other peripherals, so we need to use a critical section
#define SD_HOST_SDMMC_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define SD_HOST_SDMMC_RCC_ATOMIC()
#endif
#if SOC_PERIPH_CLK_CTRL_SHARED
// Clock source and related clock settings are mixing with other peripherals, so we need to use a critical section
#define SD_HOST_SDMMC_CLK_SRC_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define SD_HOST_SDMMC_CLK_SRC_ATOMIC()
#endif
#define SD_HOST_SDMMC_CLOCK_UPDATE_CMD_TIMEOUT_US (1000 * 1000)
#define SD_HOST_SDMMC_START_CMD_TIMEOUT_US (1000 * 1000)
#define SD_HOST_SDMMC_RESET_TIMEOUT_US (5000 * 1000)
/* Number of DMA descriptors used for transfer.
* Increasing this value above 4 doesn't improve performance for the usual case
* of SD memory cards (most data transfers are multiples of 512 bytes).
*/
#define SD_HOST_SDMMC_DMA_DESC_CNT 4
#define GPIO_NUM_CHECK(_gpio_num) \
if (!GPIO_IS_VALID_GPIO(_gpio_num)) { \
esp_err_t _err = ESP_ERR_INVALID_ARG; \
ESP_LOGE(TAG, "%s: Invalid GPIO number %d, returned 0x%x", __func__, _gpio_num, _err); \
return _err; \
}
/**
* @brief SD Host SDMMC FSM
*/
typedef enum {
SD_HOST_FSM_INIT = 1,
SD_HOST_FSM_ENABLED,
SD_HOST_FSM_STARTED,
} sd_host_sdmmc_fsm_t;
/**
* @brief SD Host SDMMC event type
*/
typedef struct {
uint32_t sdmmc_status; ///< masked SDMMC interrupt status
uint32_t dma_status; ///< masked DMA interrupt status
} sd_host_sdmmc_event_t;
/**
* @brief SD Host SDMMC slot state
*/
typedef enum sd_host_sdmmc_slot_state_t {
SD_HOST_SLOT_STATE_INIT, ///< Slot is only initialised
SD_HOST_SLOT_STATE_READY, ///< Slot is ready
} sd_host_sdmmc_slot_state_t;
/**
* @brief SD Host SDMMC transaction state
*/
typedef struct {
uint8_t* ptr;
size_t size_remaining;
size_t next_desc;
size_t desc_remaining;
} sd_host_sdmmc_trans_state_t;
typedef struct sd_host_sdmmc_slot_t sd_host_sdmmc_slot_t;
typedef struct sd_host_sdmmc_ctlr_t sd_host_sdmmc_ctlr_t;
/**
* @brief SD Host SDMMC slot context
*/
struct sd_host_sdmmc_slot_t {
sd_slot_driver_t drv;
int slot_id;
sd_mode_t sd_mode;
sd_host_sdmmc_slot_io_cfg_t io_config;
bool use_gpio_matrix;
struct {
int width;
sd_host_sdmmc_slot_state_t width_state;
} width;
struct {
int freq_hz;
sd_host_sdmmc_slot_state_t freq_state;
int real_freq_hz;
} freq;
struct {
sd_sampling_mode_t mode;
sd_host_sdmmc_slot_state_t sampling_mode_state;
} sampling_mode;
struct {
sdmmc_delay_phase_t delayphase;
sd_host_sdmmc_slot_state_t delay_phase_state;
} delay_phase;
struct {
sdmmc_delay_line_t delayline;
sd_host_sdmmc_slot_state_t delay_line_state;
} delay_line;
bool cclk_always_on;
soc_periph_sdmmc_clk_src_t clk_src;
sd_host_sdmmc_ctlr_t *ctlr;
sd_host_evt_cbs_t cbs;
void *user_data;
};
/**
* @brief SD Host context
*/
struct sd_host_sdmmc_ctlr_t {
sd_host_driver_t drv; //host driver
int host_id; //host id
sd_host_sdmmc_slot_t *slot[SOC_SDMMC_NUM_SLOTS]; //slot
int registered_slot_nums; //registered slot nums
sdmmc_hal_context_t hal; //hal context
sdmmc_desc_t *dma_desc; //pointer to dma descriptors
int dma_desc_num; //number of DMA descriptor
sd_host_sdmmc_trans_state_t cur_transfer; //current dma trans
int cur_slot_id; //current slot id
bool is_app_cmd; //this flag is set if the next command is an APP command
portMUX_TYPE spinlock; //spinlock
SemaphoreHandle_t io_intr_sem; //io interrupt semaphore
SemaphoreHandle_t mutex; //mutex
QueueHandle_t event_queue; //event queue
intr_handle_t intr_handle; //interrupt handle
sd_host_evt_cbs_t cbs; //user callbacks
void *cbs_user_data; //callback userdata
esp_pm_lock_handle_t pm_lock; //power management lock
};
/*---------------------------------------------------------------
Internal APIs (not used by other components)
---------------------------------------------------------------*/
/*---------------------------------------------------------------
IO Control
---------------------------------------------------------------*/
/**
* @brief Do a transaction for the slot
*
* @param[in] slot SD Host slot handle
* @param[in] cmdinfo SD command info, see `sdmmc_command_t`
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid argument
*/
esp_err_t sd_host_slot_sdmmc_do_transaction(sd_host_slot_handle_t slot, sdmmc_command_t *cmdinfo);
/*---------------------------------------------------------------
HW Commands
---------------------------------------------------------------*/
/**
* @brief HW command for the slot
*
* @param[in] slot SD Host Slot handle
* @param[in] cmd SD HW command
* @param[in] arg SD command argument
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid arguments
* - ESP_ERR_NOT_FOUND: Command not found
*/
esp_err_t sd_host_slot_start_command(sd_host_sdmmc_slot_t *slot, sdmmc_hw_cmd_t cmd, uint32_t arg);
/*---------------------------------------------------------------
Configuration APIs
---------------------------------------------------------------*/
/**
* @brief Set clock for the slot
*
* @param[in] slot SD Host Slot handle
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid arguments
* - ESP_ERR_NOT_FOUND: Command not found
*/
esp_err_t sd_host_slot_set_card_clk(sd_host_sdmmc_slot_t *slot);
/**
* @brief Set bus width for the slot
*
* @param[in] slot SD Host Slot handle
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid arguments
*/
esp_err_t sd_host_slot_set_bus_width(sd_host_sdmmc_slot_t *slot);
/**
* @brief Set sampling mode for the slot
*
* @param[in] slot SD Host Slot handle
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid arguments
*/
esp_err_t sd_host_slot_set_bus_sampling_mode(sd_host_sdmmc_slot_t *slot);
/**
* @brief Set delay phase for the slot
*
* @param[in] slot SD Host Slot handle
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid arguments
*/
esp_err_t sd_host_set_delay_phase(sd_host_sdmmc_slot_t *slot);
/**
* @brief Set delay line for the slot
*
* @param[in] slot SD Host Slot handle
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid arguments
*/
esp_err_t sd_host_set_delay_line(sd_host_sdmmc_slot_t *slot);
/**
* @brief Set clock always on for the slot
*
* @param[in] slot SD Host Slot handle
* @param[in] always_on always on or not
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid arguments
* - ESP_ERR_NOT_FOUND: Command not found
*/
esp_err_t sd_host_slot_set_cclk_always_on_internal(sd_host_sdmmc_slot_t *slot, bool always_on);
/**
* @brief Enable clock and cmd11 mode
*
* @param[in] slot SD Host Slot handle
* @param[in] enable enable or not
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid arguments
* - ESP_ERR_NOT_FOUND: Command not found
*/
void sd_host_slot_enable_clk_cmd11(sd_host_sdmmc_slot_t *slot, bool enable);
/*---------------------------------------------------------------
DMA APIs
---------------------------------------------------------------*/
/**
* @brief Get free descriptor numbers
*
* @param[in] slot SD Host Slot handle
*
* @return
* Number of free descriptors
*/
size_t sd_host_get_free_descriptors_count(sd_host_sdmmc_slot_t *slot);
/**
* @brief Fill descriptor
*
* @param[in] slot SD Host Slot handle
* @param[in] num_desc Number of descriptors to fill
*/
void sd_host_fill_dma_descriptors(sd_host_sdmmc_slot_t *slot, size_t num_desc);
/**
* @brief Stop DMA
*
* @param[in] slot SD Host Slot handle
*/
void sd_host_dma_stop(sd_host_sdmmc_slot_t *slot);
/**
* @brief Resume DMA
*
* @param[in] slot SD Host Slot handle
*/
void sd_host_dma_resume(sd_host_sdmmc_slot_t *slot);
/**
* @brief Stop DMA
*
* @param[in] slot SD Host Slot handle
* @param[in] data_ptr Pointer to data
* @param[in] data_size Size of data
* @param[in] block_size Block size
*/
void sd_host_dma_prepare(sd_host_sdmmc_slot_t *slot, void* data_ptr, size_t data_size, size_t block_size);
/*---------------------------------------------------------------
Info APIs
---------------------------------------------------------------*/
/**
* @brief Check SD buffer alignment
*
* @param[in] slot SD Host slot handle
* @param[in] buf Buffer pointer
* @param[in] size Buffer size
*
* @return
* - True: alignment requirement is satisfied
* - False: alignment requirement is not satisfied
*/
bool sd_host_check_buffer_alignment(sd_host_sdmmc_slot_t *slot, const void *buf, size_t size);
/**
* @brief Get SD Host slot real frequency
*
* @param[in] slot SD Host Slot handle
* @param[out] real_freq_khz Real frequency in Hz
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid arguments
*/
esp_err_t sd_host_slot_get_real_freq(sd_host_sdmmc_slot_t *slot, int *real_freq_khz);
/**
* @brief Get SD Host slot real calculated frequency
*
* @note This is used to for protocol layer to get frequency
* SD Host driver will only make all registers valid when a real
* transaction is done (in `sd_host_slot_do_transaction`). Whereas protocol
* layer is querying real frequency in quite early stage
*
* @param[in] slot SD Host Slot handle
* @param[out] real_freq_khz Real frequency in Hz
*
* @return
* - ESP_OK: On success
* - ESP_ERR_INVALID_ARG: Invalid arguments
*/
esp_err_t sd_host_slot_get_calc_real_freq(sd_host_sdmmc_slot_t *slot, int *real_freq_khz);
#endif //#if SOC_SDMMC_HOST_SUPPORTED
#ifdef __cplusplus
}
#endif

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/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdbool.h>
#include <stddef.h>
#include <string.h>
#include <unistd.h>
#include <sys/param.h>
#include "esp_log.h"
#include "esp_intr_alloc.h"
#include "esp_check.h"
#include "soc/soc_caps.h"
#include "driver/sd_host.h"
#include "esp_private/sd_host_private.h"
typedef enum {
SDMMC_IDLE,
SDMMC_SENDING_CMD,
SDMMC_SENDING_DATA,
SDMMC_BUSY,
SDMMC_SENDING_VOLTAGE_SWITCH,
SDMMC_WAITING_VOLTAGE_SWITCH,
} sdmmc_req_state_t;
static const char *TAG = "SD_TRANS";
const uint32_t SD_DATA_ERR_MASK =
SDMMC_INTMASK_DTO | SDMMC_INTMASK_DCRC |
SDMMC_INTMASK_HTO | SDMMC_INTMASK_SBE |
SDMMC_INTMASK_EBE;
const uint32_t SD_DMA_DONE_MASK =
SDMMC_IDMAC_INTMASK_RI | SDMMC_IDMAC_INTMASK_TI |
SDMMC_IDMAC_INTMASK_NI;
const uint32_t SD_CMD_ERR_MASK =
SDMMC_INTMASK_RTO |
SDMMC_INTMASK_RCRC |
SDMMC_INTMASK_RESP_ERR;
/*---------------------------------------------------------------
Voltage
---------------------------------------------------------------*/
static void handle_voltage_switch_stage1(sd_host_sdmmc_slot_t *slot, sdmmc_command_t* cmd)
{
ESP_LOGV(TAG, "%s: enabling clock", __func__);
sd_host_slot_set_cclk_always_on_internal(slot, true);
}
static void handle_voltage_switch_stage2(sd_host_sdmmc_slot_t *slot, sdmmc_command_t* cmd)
{
ESP_LOGV(TAG, "%s: disabling clock", __func__);
sd_host_slot_enable_clk_cmd11(slot, false);
usleep(100);
ESP_LOGV(TAG, "%s: switching voltage", __func__);
esp_err_t err = cmd->volt_switch_cb(cmd->volt_switch_cb_arg, 1800);
if (err != ESP_OK) {
ESP_LOGE(TAG, "failed to switch voltage (0x%x)", err);
cmd->error = err;
}
ESP_LOGV(TAG, "%s: waiting 10ms", __func__);
usleep(10000);
ESP_LOGV(TAG, "%s: enabling clock", __func__);
sd_host_slot_enable_clk_cmd11(slot, true);
}
static void handle_voltage_switch_stage3(sd_host_sdmmc_slot_t *slot, sdmmc_command_t* cmd)
{
ESP_LOGV(TAG, "%s: voltage switch complete, clock back to low-power mode", __func__);
sd_host_slot_set_cclk_always_on_internal(slot, false);
}
/*---------------------------------------------------------------
DMA
---------------------------------------------------------------*/
size_t sd_host_get_free_descriptors_count(sd_host_sdmmc_slot_t *slot)
{
const size_t next = slot->ctlr->cur_transfer.next_desc;
size_t count = 0;
/* Starting with the current DMA descriptor, count the number of
* descriptors which have 'owned_by_idmac' set to 0. These are the
* descriptors already processed by the DMA engine.
*/
int dma_desc_num = slot->ctlr->dma_desc_num;
for (size_t i = 0; i < dma_desc_num; ++i) {
sdmmc_desc_t *desc = slot->ctlr->dma_desc + ((next + i) % dma_desc_num);
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
esp_err_t ret = esp_cache_msync((void *)desc, sizeof(sdmmc_desc_t), ESP_CACHE_MSYNC_FLAG_DIR_M2C);
assert(ret == ESP_OK);
#endif
if (desc->owned_by_idmac) {
break;
}
++count;
if (desc->next_desc_ptr == NULL) {
/* final descriptor in the chain */
break;
}
}
return count;
}
void sd_host_fill_dma_descriptors(sd_host_sdmmc_slot_t *slot, size_t num_desc)
{
sd_host_sdmmc_trans_state_t *cur_trans = &slot->ctlr->cur_transfer;
for (size_t i = 0; i < num_desc; ++i) {
if (cur_trans->size_remaining == 0) {
return;
}
const size_t next = cur_trans->next_desc;
sdmmc_desc_t *desc = slot->ctlr->dma_desc + next;
assert(!desc->owned_by_idmac);
size_t size_to_fill =
(cur_trans->size_remaining < SDMMC_DMA_MAX_BUF_LEN) ?
cur_trans->size_remaining : SDMMC_DMA_MAX_BUF_LEN;
bool last = size_to_fill == cur_trans->size_remaining;
desc->last_descriptor = last;
desc->second_address_chained = 1;
desc->owned_by_idmac = 1;
desc->buffer1_ptr = cur_trans->ptr;
desc->next_desc_ptr = (last) ? NULL : slot->ctlr->dma_desc + ((next + 1) % num_desc);
assert(size_to_fill < 4 || size_to_fill % 4 == 0);
desc->buffer1_size = (size_to_fill + 3) & (~3);
cur_trans->size_remaining -= size_to_fill;
cur_trans->ptr += size_to_fill;
cur_trans->next_desc = (cur_trans->next_desc + 1) % num_desc;
ESP_LOGV(TAG, "fill %d desc=%d rem=%d next=%d last=%d sz=%d",
num_desc, next, cur_trans->size_remaining,
cur_trans->next_desc, desc->last_descriptor, desc->buffer1_size);
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
esp_err_t ret = esp_cache_msync((void *)desc, sizeof(sdmmc_desc_t), ESP_CACHE_MSYNC_FLAG_DIR_C2M);
assert(ret == ESP_OK);
#endif
}
}
void sd_host_dma_stop(sd_host_sdmmc_slot_t *slot)
{
sdmmc_ll_stop_dma(slot->ctlr->hal.dev);
}
void sd_host_dma_resume(sd_host_sdmmc_slot_t *slot)
{
sdmmc_ll_poll_demand(slot->ctlr->hal.dev);
}
void sd_host_dma_prepare(sd_host_sdmmc_slot_t *slot, void *data_ptr, size_t data_size, size_t block_size)
{
// this clears "owned by IDMAC" bits
memset(slot->ctlr->dma_desc, 0, sizeof(sdmmc_desc_t) * slot->ctlr->dma_desc_num);
// initialize first descriptor
sdmmc_desc_t *desc = slot->ctlr->dma_desc;
desc->first_descriptor = 1;
// save transfer info
slot->ctlr->cur_transfer.ptr = data_ptr;
slot->ctlr->cur_transfer.size_remaining = data_size;
slot->ctlr->cur_transfer.next_desc = 0;
slot->ctlr->cur_transfer.desc_remaining = (data_size + SDMMC_DMA_MAX_BUF_LEN - 1) / SDMMC_DMA_MAX_BUF_LEN;
// prepare descriptors
sd_host_fill_dma_descriptors(slot, slot->ctlr->dma_desc_num);
// Set size of data and DMA descriptor pointer
sdmmc_ll_set_data_transfer_len(slot->ctlr->hal.dev, data_size);
sdmmc_ll_set_block_size(slot->ctlr->hal.dev, block_size);
sdmmc_ll_set_desc_addr(slot->ctlr->hal.dev, (uint32_t)desc);
// Enable everything needed to use DMA
sdmmc_ll_enable_dma(slot->ctlr->hal.dev, true);
sd_host_dma_resume(slot);
}
/*---------------------------------------------------------------
CMD
---------------------------------------------------------------*/
static bool cmd_needs_auto_stop(const sdmmc_command_t *cmd)
{
/* SDMMC host needs an "auto stop" flag for the following commands: */
return cmd->datalen > 0 &&
(cmd->opcode == MMC_WRITE_BLOCK_MULTIPLE ||
cmd->opcode == MMC_READ_BLOCK_MULTIPLE ||
cmd->opcode == MMC_WRITE_DAT_UNTIL_STOP ||
cmd->opcode == MMC_READ_DAT_UNTIL_STOP);
}
static sdmmc_hw_cmd_t make_hw_cmd(sdmmc_command_t *cmd)
{
sdmmc_hw_cmd_t res = { 0 };
res.cmd_index = cmd->opcode;
if (cmd->opcode == MMC_STOP_TRANSMISSION) {
res.stop_abort_cmd = 1;
} else if (cmd->opcode == MMC_GO_IDLE_STATE) {
res.send_init = 1;
} else if (cmd->opcode == SD_SWITCH_VOLTAGE) {
res.volt_switch = 1;
} else {
res.wait_complete = 1;
}
if (cmd->opcode == MMC_GO_IDLE_STATE) {
res.send_init = 1;
}
if (cmd->flags & SCF_RSP_PRESENT) {
res.response_expect = 1;
if (cmd->flags & SCF_RSP_136) {
res.response_long = 1;
}
}
if (cmd->flags & SCF_RSP_CRC) {
res.check_response_crc = 1;
}
if (cmd->data) {
res.data_expected = 1;
if ((cmd->flags & SCF_CMD_READ) == 0) {
res.rw = 1;
}
assert(cmd->datalen % cmd->blklen == 0);
res.send_auto_stop = cmd_needs_auto_stop(cmd) ? 1 : 0;
}
ESP_LOGV(TAG, "%s: opcode=%d, rexp=%d, crc=%d, auto_stop=%d", __func__,
res.cmd_index, res.response_expect, res.check_response_crc,
res.send_auto_stop);
return res;
}
static inline bool mask_check_and_clear(uint32_t *state, uint32_t mask)
{
bool ret = ((*state) & mask) != 0;
*state &= ~mask;
return ret;
}
static void process_command_response(sd_host_sdmmc_slot_t *slot, uint32_t status, sdmmc_command_t *cmd)
{
if (cmd->flags & SCF_RSP_PRESENT) {
if (cmd->flags & SCF_RSP_136) {
/* Destination is 4-byte aligned, can memcopy from peripheral registers */
memcpy(cmd->response, (uint32_t*) SDMMC.resp, 4 * sizeof(uint32_t));
} else {
cmd->response[0] = SDMMC.resp[0];
cmd->response[1] = 0;
cmd->response[2] = 0;
cmd->response[3] = 0;
}
}
esp_err_t err = ESP_OK;
if (status & SDMMC_INTMASK_RTO) {
// response timeout is only possible when response is expected
assert(cmd->flags & SCF_RSP_PRESENT);
err = ESP_ERR_TIMEOUT;
} else if ((cmd->flags & SCF_RSP_CRC) && (status & SDMMC_INTMASK_RCRC)) {
err = ESP_ERR_INVALID_CRC;
} else if (status & SDMMC_INTMASK_RESP_ERR) {
err = ESP_ERR_INVALID_RESPONSE;
}
if (err != ESP_OK) {
cmd->error = err;
if (cmd->data) {
sd_host_dma_stop(slot);
}
ESP_LOGD(TAG, "%s: error 0x%x (status=%08"PRIx32")", __func__, err, status);
}
}
/*---------------------------------------------------------------
Events
---------------------------------------------------------------*/
static esp_err_t sd_host_wait_for_event(sd_host_sdmmc_slot_t *slot, int tick_count, sd_host_sdmmc_event_t *out_event)
{
assert(out_event);
assert(slot->ctlr->event_queue);
int ret = xQueueReceive(slot->ctlr->event_queue, out_event, tick_count);
if (ret == pdFALSE) {
return ESP_ERR_TIMEOUT;
}
return ESP_OK;
}
static esp_err_t sd_host_handle_idle_state_events(sd_host_sdmmc_slot_t *slot)
{
/* Handle any events which have happened in between transfers.
* Under current assumptions (no SDIO support) only card detect events
* can happen in the idle state.
*/
sd_host_sdmmc_event_t evt;
while (sd_host_wait_for_event(slot, 0, &evt) == ESP_OK) {
if (evt.sdmmc_status & SDMMC_INTMASK_CD) {
ESP_LOGV(TAG, "card detect event");
evt.sdmmc_status &= ~SDMMC_INTMASK_CD;
}
if (evt.sdmmc_status != 0 || evt.dma_status != 0) {
ESP_LOGE(TAG, "handle_idle_state_events unhandled: %08"PRIx32" %08"PRIx32,
evt.sdmmc_status, evt.dma_status);
}
}
return ESP_OK;
}
static void process_data_status(sd_host_sdmmc_slot_t *slot, uint32_t status, sdmmc_command_t *cmd)
{
if (status & SD_DATA_ERR_MASK) {
if (status & SDMMC_INTMASK_DTO) {
cmd->error = ESP_ERR_TIMEOUT;
} else if (status & SDMMC_INTMASK_DCRC) {
cmd->error = ESP_ERR_INVALID_CRC;
} else if ((status & SDMMC_INTMASK_EBE) &&
(cmd->flags & SCF_CMD_READ) == 0) {
cmd->error = ESP_ERR_TIMEOUT;
} else {
cmd->error = ESP_FAIL;
}
SDMMC.ctrl.fifo_reset = 1;
}
if (cmd->error != 0) {
if (cmd->data) {
sd_host_dma_stop(slot);
}
ESP_LOGD(TAG, "%s: error 0x%x (status=%08"PRIx32")", __func__, cmd->error, status);
}
}
static esp_err_t process_events(sd_host_sdmmc_slot_t *slot, sd_host_sdmmc_event_t evt, sdmmc_command_t *cmd,
sdmmc_req_state_t *pstate, sd_host_sdmmc_event_t *unhandled_events)
{
const char* const s_state_names[] __attribute__((unused)) = {
"IDLE",
"SENDING_CMD",
"SENDIND_DATA",
"BUSY",
"SENDING_VOLTAGE_SWITCH",
"WAITING_VOLTAGE_SWITCH",
};
sd_host_sdmmc_event_t orig_evt = evt;
ESP_LOGV(TAG, "%s: slot_id=%d state=%s evt=%"PRIx32" dma=%"PRIx32, __func__, slot->slot_id,
s_state_names[*pstate], evt.sdmmc_status, evt.dma_status);
sdmmc_req_state_t next_state = *pstate;
sdmmc_req_state_t state = (sdmmc_req_state_t) -1;
while (next_state != state) {
state = next_state;
switch (state) {
case SDMMC_IDLE:
break;
case SDMMC_SENDING_CMD:
if (mask_check_and_clear(&evt.sdmmc_status, SD_CMD_ERR_MASK)) {
process_command_response(slot, orig_evt.sdmmc_status, cmd);
// In addition to the error interrupt, CMD_DONE will also be
// reported. It may occur immediately (in the same sd_host_sdmmc_event_t) or
// be delayed until the next interrupt.
}
if (mask_check_and_clear(&evt.sdmmc_status, SDMMC_INTMASK_CMD_DONE)) {
process_command_response(slot, orig_evt.sdmmc_status, cmd);
if (cmd->error != ESP_OK) {
next_state = SDMMC_IDLE;
break;
}
if (cmd->data == NULL) {
next_state = SDMMC_IDLE;
} else {
next_state = SDMMC_SENDING_DATA;
}
}
break;
case SDMMC_SENDING_VOLTAGE_SWITCH:
if (mask_check_and_clear(&evt.sdmmc_status, SD_CMD_ERR_MASK)) {
process_command_response(slot, orig_evt.sdmmc_status, cmd);
next_state = SDMMC_IDLE;
}
if (mask_check_and_clear(&evt.sdmmc_status, SDMMC_INTMASK_VOLT_SW)) {
handle_voltage_switch_stage2(slot, cmd);
if (cmd->error != ESP_OK) {
next_state = SDMMC_IDLE;
} else {
next_state = SDMMC_WAITING_VOLTAGE_SWITCH;
}
}
break;
case SDMMC_WAITING_VOLTAGE_SWITCH:
if (mask_check_and_clear(&evt.sdmmc_status, SD_CMD_ERR_MASK)) {
process_command_response(slot, orig_evt.sdmmc_status, cmd);
next_state = SDMMC_IDLE;
}
if (mask_check_and_clear(&evt.sdmmc_status, SDMMC_INTMASK_VOLT_SW)) {
handle_voltage_switch_stage3(slot, cmd);
next_state = SDMMC_IDLE;
}
break;
case SDMMC_SENDING_DATA:
if (mask_check_and_clear(&evt.sdmmc_status, SD_DATA_ERR_MASK)) {
process_data_status(slot, orig_evt.sdmmc_status, cmd);
sd_host_dma_stop(slot);
}
if (mask_check_and_clear(&evt.dma_status, SD_DMA_DONE_MASK)) {
next_state = SDMMC_BUSY;
}
if (orig_evt.sdmmc_status & (SDMMC_INTMASK_SBE | SDMMC_INTMASK_DATA_OVER)) {
// On start bit error, DATA_DONE interrupt will not be generated
next_state = SDMMC_IDLE;
break;
}
break;
case SDMMC_BUSY:
if (!mask_check_and_clear(&evt.sdmmc_status, SDMMC_INTMASK_DATA_OVER)) {
break;
}
process_data_status(slot, orig_evt.sdmmc_status, cmd);
next_state = SDMMC_IDLE;
break;
}
ESP_LOGV(TAG, "%s state=%s next_state=%s", __func__, s_state_names[state], s_state_names[next_state]);
}
*pstate = state;
*unhandled_events = evt;
return ESP_OK;
}
static esp_err_t handle_event(sd_host_sdmmc_slot_t *slot, sdmmc_command_t* cmd, sdmmc_req_state_t *state,
sd_host_sdmmc_event_t *unhandled_events)
{
sd_host_sdmmc_event_t event;
esp_err_t err = sd_host_wait_for_event(slot, cmd->timeout_ms / portTICK_PERIOD_MS, &event);
if (err != ESP_OK) {
ESP_LOGE(TAG, "sd_host_wait_for_event returned 0x%x", err);
if (err == ESP_ERR_TIMEOUT) {
sd_host_dma_stop(slot);
}
return err;
}
ESP_LOGV(TAG, "sdmmc_handle_event: slot_id %d event %08"PRIx32" %08"PRIx32", unhandled %08"PRIx32" %08"PRIx32,
slot->slot_id, event.sdmmc_status, event.dma_status,
unhandled_events->sdmmc_status, unhandled_events->dma_status);
event.sdmmc_status |= unhandled_events->sdmmc_status;
event.dma_status |= unhandled_events->dma_status;
process_events(slot, event, cmd, state, unhandled_events);
ESP_LOGV(TAG, "sdmmc_handle_event: slot_id %d events unhandled: %08"PRIx32" %08"PRIx32, slot->slot_id, unhandled_events->sdmmc_status, unhandled_events->dma_status);
return ESP_OK;
}
static bool sd_host_card_busy(sd_host_sdmmc_slot_t *slot)
{
return sdmmc_ll_is_card_data_busy(slot->ctlr->hal.dev);
}
static bool wait_for_busy_cleared(sd_host_sdmmc_slot_t *slot, uint32_t timeout_ms)
{
if (timeout_ms == 0) {
return !sd_host_card_busy(slot);
}
/* It would have been nice to do this without polling, however the peripheral
* can only generate Busy Clear Interrupt for data write commands, and waiting
* for busy clear is mostly needed for other commands such as MMC_SWITCH.
*/
uint32_t timeout_ticks = (timeout_ms + portTICK_PERIOD_MS - 1) / portTICK_PERIOD_MS;
while (timeout_ticks-- > 0) {
if (!sd_host_card_busy(slot)) {
return true;
}
vTaskDelay(1);
}
return false;
}
/*---------------------------------------------------------------
Public API Impl
---------------------------------------------------------------*/
esp_err_t sd_host_slot_sdmmc_do_transaction(sd_host_slot_handle_t slot, sdmmc_command_t *cmdinfo)
{
esp_err_t ret = ESP_FAIL;
ESP_RETURN_ON_FALSE(slot && cmdinfo, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
sd_host_sdmmc_slot_t *slot_ctx = __containerof(slot, sd_host_sdmmc_slot_t, drv);
xSemaphoreTake(slot_ctx->ctlr->mutex, portMAX_DELAY);
if (slot_ctx->ctlr->pm_lock) {
ESP_GOTO_ON_ERROR(esp_pm_lock_acquire(slot_ctx->ctlr->pm_lock), out, TAG, "acquire pm_lock failed");
}
slot_ctx->ctlr->cur_slot_id = slot_ctx->slot_id;
// By default, set probing frequency (400kHz) and 1-bit bus
if (slot_ctx->freq.freq_state != SD_HOST_SLOT_STATE_READY) {
ESP_GOTO_ON_ERROR(sd_host_slot_set_card_clk(slot_ctx), out, TAG, "failed to set clk");
} else {
int real_freq_khz = 0;
ret = sd_host_slot_get_real_freq(slot_ctx, &real_freq_khz);
assert(ret == ESP_OK);
if (real_freq_khz != (slot_ctx->freq.freq_hz / 1000)) {
ESP_GOTO_ON_ERROR(sd_host_slot_set_card_clk(slot_ctx), out, TAG, "failed to set clk");
}
}
ESP_GOTO_ON_ERROR(sd_host_slot_set_bus_width(slot_ctx), out, TAG, "failed to set width");
ESP_GOTO_ON_ERROR(sd_host_slot_set_bus_sampling_mode(slot_ctx), out, TAG, "failed to set sampling mode");
ESP_GOTO_ON_ERROR(sd_host_set_delay_phase(slot_ctx), out, TAG, "failed to set delay phase");
ESP_GOTO_ON_ERROR(sd_host_set_delay_line(slot_ctx), out, TAG, "failed to set delay line");
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
// cache sync related
size_t cache_sync_len = 0;
#endif
// dispose of any events which happened asynchronously
sd_host_handle_idle_state_events(slot_ctx);
// special handling for voltage switch command
if (cmdinfo->opcode == SD_SWITCH_VOLTAGE) {
handle_voltage_switch_stage1(slot_ctx, cmdinfo);
}
// convert cmdinfo to hardware register value
sdmmc_hw_cmd_t hw_cmd = make_hw_cmd(cmdinfo);
if (cmdinfo->data) {
// Length should be either <4 or >=4 and =0 (mod 4).
if (cmdinfo->datalen >= 4 && cmdinfo->datalen % 4 != 0) {
ESP_LOGE(TAG, "%s: invalid size: total=%d",
__func__, cmdinfo->datalen);
ret = ESP_ERR_INVALID_SIZE;
goto out;
}
bool is_aligned = sd_host_check_buffer_alignment(slot_ctx, cmdinfo->data, cmdinfo->buflen);
if (!is_aligned) {
ESP_LOGE(TAG, "%s: buffer %p can not be used for DMA", __func__, cmdinfo->data);
ret = ESP_ERR_INVALID_ARG;
goto out;
}
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
cache_sync_len = cmdinfo->buflen;
ret = esp_cache_msync((void *)cmdinfo->data, cache_sync_len, ESP_CACHE_MSYNC_FLAG_DIR_C2M);
if (ret != ESP_OK) {
goto out;
}
#endif
// write transfer info into hardware
sd_host_dma_prepare(slot_ctx, cmdinfo->data, cmdinfo->datalen, cmdinfo->blklen);
}
// write command into hardware, this also sends the command to the card
ret = sd_host_slot_start_command(slot_ctx, hw_cmd, cmdinfo->arg);
if (ret != ESP_OK) {
goto out;
}
// process events until transfer is complete
cmdinfo->error = ESP_OK;
sdmmc_req_state_t state = SDMMC_SENDING_CMD;
if (cmdinfo->opcode == SD_SWITCH_VOLTAGE) {
state = SDMMC_SENDING_VOLTAGE_SWITCH;
}
sd_host_sdmmc_event_t unhandled_events = {};
while (state != SDMMC_IDLE) {
ret = handle_event(slot_ctx, cmdinfo, &state, &unhandled_events);
if (ret != ESP_OK) {
break;
}
}
if (ret == ESP_OK && (cmdinfo->flags & SCF_WAIT_BUSY)) {
if (!wait_for_busy_cleared(slot_ctx, cmdinfo->timeout_ms)) {
ret = ESP_ERR_TIMEOUT;
}
}
slot_ctx->ctlr->is_app_cmd = (ret == ESP_OK && cmdinfo->opcode == MMC_APP_CMD);
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
if (cmdinfo->data) {
ret = esp_cache_msync((void *)cmdinfo->data, cache_sync_len, ESP_CACHE_MSYNC_FLAG_DIR_M2C);
if (ret != ESP_OK) {
goto out;
}
}
#endif
out:
if (slot_ctx->ctlr->pm_lock) {
ESP_RETURN_ON_ERROR(esp_pm_lock_release(slot_ctx->ctlr->pm_lock), TAG, "release pm_lock failed");
}
xSemaphoreGive(slot_ctx->ctlr->mutex);
return ret;
}

View File

@ -84,9 +84,8 @@ extern "C" {
* SDMMC capabilities
*/
#define SDMMC_LL_SLOT_SUPPORT_GPIO_MATRIX(SLOT_ID) 0
#define SDMMC_LL_IOMUX_FUNC 3
#define SDMMC_LL_HOST_CTLR_NUMS 1U
typedef enum {
SDMMC_LL_DELAY_PHASE_0,
@ -102,11 +101,12 @@ typedef enum {
/**
* @brief Enable the bus clock for SDMMC module
*
* @param hw hardware instance address
* @param group_id Group ID
* @param en enable / disable
*/
static inline void sdmmc_ll_enable_bus_clock(sdmmc_dev_t *hw, bool en)
static inline void sdmmc_ll_enable_bus_clock(int group_id, bool en)
{
(void)group_id;
if (en) {
DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_SDIO_HOST_EN);
} else {
@ -121,10 +121,11 @@ static inline void sdmmc_ll_enable_bus_clock(sdmmc_dev_t *hw, bool en)
/**
* @brief Reset the SDMMC module
*
* @param hw hardware instance address
* @param group_id Group ID
*/
static inline void sdmmc_ll_reset_register(sdmmc_dev_t *hw)
static inline void sdmmc_ll_reset_register(int group_id)
{
(void)group_id;
DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, DPORT_SDIO_HOST_RST);
DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, DPORT_SDIO_HOST_RST);
}
@ -256,10 +257,8 @@ static inline uint32_t sdmmc_ll_get_card_clock_div(sdmmc_dev_t *hw, uint32_t slo
uint32_t card_div = 0;
if (slot == 0) {
HAL_ASSERT(hw->clksrc.card0 == 0);
card_div = HAL_FORCE_READ_U32_REG_FIELD(hw->clkdiv, div0);
} else if (slot == 1) {
HAL_ASSERT(hw->clksrc.card1 == 1);
card_div = HAL_FORCE_READ_U32_REG_FIELD(hw->clkdiv, div1);
} else {
HAL_ASSERT(false);

View File

@ -104,11 +104,12 @@ typedef enum {
/**
* @brief Enable the bus clock for SDMMC module
*
* @param hw hardware instance address
* @param group_id Group ID
* @param en enable / disable
*/
static inline void sdmmc_ll_enable_bus_clock(sdmmc_dev_t *hw, bool en)
static inline void sdmmc_ll_enable_bus_clock(int group_id, bool en)
{
(void)group_id;
HP_SYS_CLKRST.soc_clk_ctrl1.reg_sdmmc_sys_clk_en = en;
}
@ -119,10 +120,11 @@ static inline void sdmmc_ll_enable_bus_clock(sdmmc_dev_t *hw, bool en)
/**
* @brief Reset the SDMMC module
*
* @param hw hardware instance address
* @param group_id Group ID
*/
static inline void sdmmc_ll_reset_register(sdmmc_dev_t *hw)
static inline void sdmmc_ll_reset_register(int group_id)
{
(void)group_id;
LP_AON_CLKRST.hp_sdmmc_emac_rst_ctrl.rst_en_sdmmc = 1;
LP_AON_CLKRST.hp_sdmmc_emac_rst_ctrl.rst_en_sdmmc = 0;
}
@ -348,10 +350,8 @@ static inline uint32_t sdmmc_ll_get_card_clock_div(sdmmc_dev_t *hw, uint32_t slo
uint32_t card_div = 0;
if (slot == 0) {
HAL_ASSERT(hw->clksrc.card0 == 0);
card_div = HAL_FORCE_READ_U32_REG_FIELD(hw->clkdiv, clk_divider0);
} else if (slot == 1) {
HAL_ASSERT(hw->clksrc.card1 == 1);
card_div = HAL_FORCE_READ_U32_REG_FIELD(hw->clkdiv, clk_divider1);
} else {
HAL_ASSERT(false);

View File

@ -101,11 +101,12 @@ typedef enum {
/**
* @brief Enable the bus clock for SDMMC module
*
* @param hw hardware instance address
* @param group_id Group ID
* @param en enable / disable
*/
static inline void sdmmc_ll_enable_bus_clock(sdmmc_dev_t *hw, bool en)
static inline void sdmmc_ll_enable_bus_clock(int group_id, bool en)
{
(void)group_id;
SYSTEM.perip_clk_en1.sdio_host_clk_en = en;
}
@ -116,10 +117,11 @@ static inline void sdmmc_ll_enable_bus_clock(sdmmc_dev_t *hw, bool en)
/**
* @brief Reset the SDMMC module
*
* @param hw hardware instance address
* @param group_id Group ID
*/
static inline void sdmmc_ll_reset_register(sdmmc_dev_t *hw)
static inline void sdmmc_ll_reset_register(int group_id)
{
(void)group_id;
SYSTEM.perip_rst_en1.sdio_host_rst = 1;
SYSTEM.perip_rst_en1.sdio_host_rst = 0;
}
@ -292,10 +294,8 @@ static inline uint32_t sdmmc_ll_get_card_clock_div(sdmmc_dev_t *hw, uint32_t slo
uint32_t card_div = 0;
if (slot == 0) {
HAL_ASSERT(hw->clksrc.card0 == 0);
card_div = HAL_FORCE_READ_U32_REG_FIELD(hw->clkdiv, div0);
} else if (slot == 1) {
HAL_ASSERT(hw->clksrc.card1 == 1);
card_div = HAL_FORCE_READ_U32_REG_FIELD(hw->clkdiv, div1);
} else {
HAL_ASSERT(false);

View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -16,11 +16,34 @@ extern "C" {
* @brief SD bus width
*/
typedef enum {
SD_BUS_WIDTH_1_BIT, ///< 1 bit
SD_BUS_WIDTH_4_BIT, ///< 4 bit
SD_BUS_WIDTH_8_BIT, ///< 8 bit
SD_BUS_WIDTH_1_BIT = 1, ///< 1 bit
SD_BUS_WIDTH_4_BIT = 4, ///< 4 bit
SD_BUS_WIDTH_8_BIT = 8, ///< 8 bit
} sd_bus_width_t;
/**
* @brief SD mode
*/
typedef enum {
SD_MODE_NORMAL, ///< Normal SD mode
SD_MODE_UHS1, ///< UHS-I SD mode
} sd_mode_t;
/**
* @brief SD sampling mode
*/
typedef enum {
SD_SAMPLING_MODE_SDR, ///< Single data rate mode
SD_SAMPLING_MODE_DDR, ///< Double data rate mode
} sd_sampling_mode_t;
#if SOC_SDMMC_DATA_WIDTH_MAX
#define SDMMC_DATA_SIG_NUM SOC_SDMMC_DATA_WIDTH_MAX ///< Number of data signals
#else
#define SDMMC_DATA_SIG_NUM 0 ///< Number of data signals
#endif
#define SDMMC_DMA_ALIGNMENT 4
#ifdef __cplusplus
}
#endif

View File

@ -29,6 +29,7 @@
#include "freertos/FreeRTOS.h"
#include "sd_pwr_ctrl.h"
#include "esp_dma_utils.h"
#include "hal/sd_types.h"
#ifdef __cplusplus
extern "C" {

View File

@ -943,6 +943,10 @@ config SOC_SDMMC_NUM_SLOTS
int
default 2
config SOC_SDMMC_DATA_WIDTH_MAX
int
default 8
config SOC_WIFI_WAPI_SUPPORT
bool
default y

View File

@ -444,6 +444,7 @@
*/
#define SOC_SDMMC_USE_IOMUX 1
#define SOC_SDMMC_NUM_SLOTS 2
#define SOC_SDMMC_DATA_WIDTH_MAX 8
/*-------------------------- WI-FI HARDWARE CAPS -------------------------------*/
#define SOC_WIFI_WAPI_SUPPORT (1) /*!< Support WAPI */

View File

@ -1415,9 +1415,13 @@ config SOC_SDMMC_NUM_SLOTS
int
default 2
config SOC_SDMMC_DATA_WIDTH_MAX
int
default 8
config SOC_SDMMC_DELAY_PHASE_NUM
int
default 4
default 8
config SOC_SDMMC_IO_POWER_EXTERNAL
bool

View File

@ -511,8 +511,9 @@
#define SOC_SDMMC_USE_IOMUX 1
#define SOC_SDMMC_USE_GPIO_MATRIX 1
#define SOC_SDMMC_NUM_SLOTS 2
#define SOC_SDMMC_DATA_WIDTH_MAX 8
/* Supported host clock delay phase number */
#define SOC_SDMMC_DELAY_PHASE_NUM 4
#define SOC_SDMMC_DELAY_PHASE_NUM 8
#define SOC_SDMMC_IO_POWER_EXTERNAL 1 ///< SDMMC IO power controlled by external power supply
#define SOC_SDMMC_PSRAM_DMA_CAPABLE 1 ///< SDMMC peripheral can do DMA transfer to/from PSRAM
#define SOC_SDMMC_UHS_I_SUPPORTED 1

View File

@ -1463,6 +1463,10 @@ config SOC_SDMMC_NUM_SLOTS
int
default 2
config SOC_SDMMC_DATA_WIDTH_MAX
int
default 8
config SOC_SDMMC_SUPPORT_XTAL_CLOCK
bool
default y

View File

@ -574,6 +574,7 @@
*/
#define SOC_SDMMC_USE_GPIO_MATRIX 1
#define SOC_SDMMC_NUM_SLOTS 2
#define SOC_SDMMC_DATA_WIDTH_MAX 8
/* Indicates that there is an option to use XTAL clock instead of PLL for SDMMC */
#define SOC_SDMMC_SUPPORT_XTAL_CLOCK 1
/* Supported host clock delay phase number */

View File

@ -134,9 +134,12 @@ INPUT = \
$(PROJECT_PATH)/components/esp_driver_rmt/include/driver/rmt_types.h \
$(PROJECT_PATH)/components/esp_driver_sdio/include/driver/sdio_slave.h \
$(PROJECT_PATH)/components/esp_driver_sdm/include/driver/sdm.h \
$(PROJECT_PATH)/components/esp_driver_sdmmc/include/driver/sdmmc_default_configs.h \
$(PROJECT_PATH)/components/esp_driver_sdmmc/include/driver/sdmmc_host.h \
$(PROJECT_PATH)/components/esp_driver_sdmmc/include/driver/sdmmc_types.h \
$(PROJECT_PATH)/components/esp_driver_sdmmc/include/driver/sd_host_sdmmc.h \
$(PROJECT_PATH)/components/esp_driver_sdmmc/legacy/include/driver/sdmmc_default_configs.h \
$(PROJECT_PATH)/components/esp_driver_sdmmc/legacy/include/driver/sdmmc_host.h \
$(PROJECT_PATH)/components/esp_driver_sdmmc/legacy/include/driver/sdmmc_types.h \
$(PROJECT_PATH)/components/esp_driver_sd_intf/include/driver/sd_host.h \
$(PROJECT_PATH)/components/esp_driver_sd_intf/include/driver/sd_types.h \
$(PROJECT_PATH)/components/esp_driver_sdspi/include/driver/sdspi_host.h \
$(PROJECT_PATH)/components/esp_driver_spi/include/driver/spi_common.h \
$(PROJECT_PATH)/components/esp_driver_spi/include/driver/spi_master.h \