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https://github.com/espressif/esp-idf.git
synced 2025-10-03 10:30:58 +02:00
fix(ble): fixed ble log v2 configuration issues
This commit is contained in:
@@ -33,12 +33,32 @@ if BLE_LOG_ENABLED
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try to use the LBM with spin lock protection. So the more LBMs with atomic
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try to use the LBM with spin lock protection. So the more LBMs with atomic
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lock protection are created, the more ISRs can nest.
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lock protection are created, the more ISRs can nest.
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config BLE_LOG_IS_ESP_CONTROLLER
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bool "Current BLE Controller is ESP BLE Controller"
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depends on BT_CONTROLLER_ENABLED
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depends on SOC_ESP_NIMBLE_CONTROLLER
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default y
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select BT_LE_CONTROLLER_LOG_ENABLED
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select BT_LE_CONTROLLER_LOG_MODE_BLE_LOG_V2
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select BLE_LOG_LL_ENABLED
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help
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Current BLE Controller is ESP BLE Controller
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config BLE_LOG_IS_ESP_LEGACY_CONTROLLER
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bool "Current BLE Controller is ESP BLE Legacy Controller"
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depends on BT_CONTROLLER_ENABLED
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depends on !SOC_ESP_NIMBLE_CONTROLLER
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depends on BT_CTRL_RUN_IN_FLASH_ONLY
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default y
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select BT_CTRL_LE_LOG_EN
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select BLE_LOG_LL_ENABLED
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help
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Current BLE Controller is ESP BLE Legacy Controller
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config BLE_LOG_LL_ENABLED
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config BLE_LOG_LL_ENABLED
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bool "Enable BLE Log for Link Layer"
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bool "Enable BLE Log for Link Layer"
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depends on BT_CONTROLLER_ENABLED
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depends on BT_CONTROLLER_ENABLED
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default y
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default n
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select BT_LE_CONTROLLER_LOG_ENABLED
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select BT_LE_CONTROLLER_LOG_MODE_BLE_LOG
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help
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help
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Enable BLE Log for Link Layer
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Enable BLE Log for Link Layer
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@@ -96,11 +116,13 @@ if BLE_LOG_ENABLED
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config BLE_LOG_PRPH_SPI_MASTER_DMA
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config BLE_LOG_PRPH_SPI_MASTER_DMA
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bool "Utilize SPI master DMA driver as transport"
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bool "Utilize SPI master DMA driver as transport"
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depends on SOC_GPSPI_SUPPORTED
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help
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help
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Utilize SPI master DMA driver as transport
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Utilize SPI master DMA driver as transport
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config BLE_LOG_PRPH_UART_DMA
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config BLE_LOG_PRPH_UART_DMA
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bool "Utilize UART DMA driver as transport"
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bool "Utilize UART DMA driver as transport"
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depends on SOC_UHCI_SUPPORTED
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help
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help
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Utilize UART DMA driver as transport
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Utilize UART DMA driver as transport
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endchoice
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endchoice
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@@ -17,7 +17,6 @@
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#include "freertos/FreeRTOS.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/semphr.h"
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#include "freertos/semphr.h"
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#include "freertos/portmacro.h"
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/* ------------------------- */
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/* ------------------------- */
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/* Log Frame Defines */
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/* Log Frame Defines */
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@@ -17,11 +17,11 @@
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#include <string.h>
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#include <string.h>
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#include "esp_bit_defs.h"
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#include "esp_bit_defs.h"
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#include "freertos/FreeRTOS.h"
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#ifndef UNIT_TEST
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#ifndef UNIT_TEST
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#include "freertos/portmacro.h"
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#include "esp_heap_caps.h"
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#include "esp_heap_caps.h"
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#include "esp_rom_serial_output.h"
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#include "esp_rom_uart.h"
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#endif /* !UNIT_TEST */
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#endif /* !UNIT_TEST */
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/* MACRO */
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/* MACRO */
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@@ -47,18 +47,9 @@
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#define BLE_LOG_MEMSET(ptr, value, len) memset(ptr, value, len)
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#define BLE_LOG_MEMSET(ptr, value, len) memset(ptr, value, len)
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/* Critical section wrapper */
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/* Critical section wrapper */
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#ifndef CONFIG_BLE_LOG_LL_ENABLED
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extern portMUX_TYPE ble_log_spin_lock;
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extern portMUX_TYPE ble_log_spin_lock;
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#define BLE_LOG_ENTER_CRITICAL() portENTER_CRITICAL_SAFE(&ble_log_spin_lock);
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#define BLE_LOG_ENTER_CRITICAL() portENTER_CRITICAL_SAFE(&ble_log_spin_lock);
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#define BLE_LOG_EXIT_CRITICAL() portEXIT_CRITICAL_SAFE(&ble_log_spin_lock);
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#define BLE_LOG_EXIT_CRITICAL() portEXIT_CRITICAL_SAFE(&ble_log_spin_lock);
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#else /* CONFIG_BLE_LOG_LL_ENABLED */
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/* Note
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* It's mandatory to use the same spin lock with Link Layer in multi-core system */
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extern uint32_t npl_freertos_hw_enter_critical(void);
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extern void npl_freertos_hw_exit_critical(uint32_t ctx);
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#define BLE_LOG_ENTER_CRITICAL() npl_freertos_hw_enter_critical()
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#define BLE_LOG_EXIT_CRITICAL() npl_freertos_hw_exit_critical(0)
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#endif /* !CONFIG_BLE_LOG_LL_ENABLED */
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#define BLE_LOG_ACQUIRE_SPIN_LOCK(spin_lock) portENTER_CRITICAL_SAFE(spin_lock)
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#define BLE_LOG_ACQUIRE_SPIN_LOCK(spin_lock) portENTER_CRITICAL_SAFE(spin_lock)
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#define BLE_LOG_RELEASE_SPIN_LOCK(spin_lock) portEXIT_CRITICAL_SAFE(spin_lock)
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#define BLE_LOG_RELEASE_SPIN_LOCK(spin_lock) portEXIT_CRITICAL_SAFE(spin_lock)
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@@ -23,7 +23,7 @@
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/* MACRO */
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/* MACRO */
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#define BLE_LOG_UART_MAX_TRANSFER_SIZE (10240)
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#define BLE_LOG_UART_MAX_TRANSFER_SIZE (10240)
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#define BLE_LOG_UART_RX_BUF_SIZE (32)
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#define BLE_LOG_UART_RX_BUF_SIZE (256)
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#define BLE_LOG_UART_DMA_BURST_SIZE (32)
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#define BLE_LOG_UART_DMA_BURST_SIZE (32)
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#if BLE_LOG_PRPH_UART_DMA_REDIR
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#if BLE_LOG_PRPH_UART_DMA_REDIR
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#define BLE_LOG_UART_REDIR_BUF_SIZE (512)
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#define BLE_LOG_UART_REDIR_BUF_SIZE (512)
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@@ -95,8 +95,6 @@ bool ble_log_prph_init(size_t trans_cnt)
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.data_bits = UART_DATA_8_BITS,
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.data_bits = UART_DATA_8_BITS,
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.parity = UART_PARITY_DISABLE,
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.parity = UART_PARITY_DISABLE,
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.stop_bits = UART_STOP_BITS_1,
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.stop_bits = UART_STOP_BITS_1,
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.flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS,
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.rx_flow_ctrl_thresh = 122,
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};
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};
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if ((uart_param_config(CONFIG_BLE_LOG_PRPH_UART_DMA_PORT, &uart_config) != ESP_OK) ||
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if ((uart_param_config(CONFIG_BLE_LOG_PRPH_UART_DMA_PORT, &uart_config) != ESP_OK) ||
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(uart_set_pin(CONFIG_BLE_LOG_PRPH_UART_DMA_PORT,
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(uart_set_pin(CONFIG_BLE_LOG_PRPH_UART_DMA_PORT,
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