Merge branch 'feature/move_ipc_to_esp_system' into 'master'

IPC: Move ipc sources to esp_system

Closes IDF-2160

See merge request espressif/esp-idf!15234

components/app_trace/CMakeLists.txt

@@ -47,7 +47,7 @@ endif()
 idf_component_register(SRCS "${srcs}"
                        INCLUDE_DIRS "${include_dirs}"
                        PRIV_INCLUDE_DIRS "${priv_include_dirs}"
-                       PRIV_REQUIRES soc esp_ipc
+                       PRIV_REQUIRES soc
                        LDFRAGMENTS linker.lf)
 
 # disable --coverage for this component, as it is used as transport

components/bt/CMakeLists.txt

@@ -602,7 +602,6 @@ idf_component_register(SRCS "${srcs}"
                 INCLUDE_DIRS "${include_dirs}"
                 PRIV_INCLUDE_DIRS "${priv_include_dirs}"
                 REQUIRES nvs_flash soc esp_timer esp_pm esp_phy
-                PRIV_REQUIRES esp_ipc
                 LDFRAGMENTS "linker.lf")
 
 if(CONFIG_BT_ENABLED)

components/driver/CMakeLists.txt

@@ -107,7 +107,7 @@ endif()
 idf_component_register(SRCS "${srcs}"
                     INCLUDE_DIRS ${includes}
                     PRIV_INCLUDE_DIRS "include/driver"
-                    PRIV_REQUIRES efuse esp_timer esp_ipc
+                    PRIV_REQUIRES efuse esp_timer
                     REQUIRES esp_pm esp_ringbuf freertos soc hal esp_hw_support
                     LDFRAGMENTS linker.lf)
 # (REQUIRES cannot hide soc headers, since many arguments in the driver headers are chip-dependent)

components/esp_hw_support/CMakeLists.txt

@@ -21,7 +21,6 @@ if(NOT BOOTLOADER_BUILD)
     if(NOT CONFIG_IDF_TARGET_ESP32 AND NOT CONFIG_IDF_TARGET_ESP32S2)
         list(APPEND srcs "sleep_retention.c")
     endif()
-    list(APPEND requires esp_ipc)
 else()
     # Requires "_esp_error_check_failed()" function
     list(APPEND priv_requires "esp_system")

components/esp_ipc/CMakeLists.txt

@@ -1,10 +0,0 @@
-set(srcs "src/esp_ipc.c")
-
-if(CONFIG_ESP_IPC_ISR_ENABLE)
-    list(APPEND srcs "src/esp_ipc_isr/esp_ipc_isr.c"
-                    "src/esp_ipc_isr/esp_ipc_isr_handler.S"
-                    "src/esp_ipc_isr/esp_ipc_isr_routines.S")
-endif()
-
-idf_component_register(SRCS "${srcs}"
-                    INCLUDE_DIRS "include")

components/esp_ipc/Kconfig

@@ -1,39 +0,0 @@
-menu "IPC (Inter-Processor Call)"
-
-    config ESP_IPC_TASK_STACK_SIZE
-        int "Inter-Processor Call (IPC) task stack size"
-        range 512 65536 if !APPTRACE_ENABLE
-        range 2048 65536 if APPTRACE_ENABLE
-        default 2048 if APPTRACE_ENABLE
-        default 1536
-        help
-            Configure the IPC tasks stack size. One IPC task runs on each core
-            (in dual core mode), and allows for cross-core function calls.
-
-            See IPC documentation for more details.
-
-            The default stack size should be enough for most common use cases.
-            It can be shrunk if you are sure that you do not use any custom
-            IPC functionality.
-
-    config ESP_IPC_USES_CALLERS_PRIORITY
-        bool "IPC runs at caller's priority"
-        default y
-        depends on !FREERTOS_UNICORE
-        help
-            If this option is not enabled then the IPC task will keep behavior
-            same as prior to that of ESP-IDF v4.0, and hence IPC task will run
-            at (configMAX_PRIORITIES - 1) priority.
-
-    config ESP_IPC_ISR_ENABLE
-        bool
-        default y if !FREERTOS_UNICORE
-        help
-            This feature servers a similar purpose to the IPC except that the callback function is run
-            in the context of a level 4 interrupt (i.e., high priority/level interrupt). The IPC ISR
-            feature is intended for low latency execution of simple functions written in assembly on
-            another CPU. Due to being run in higher level interrupt context, the assembly functions
-            should be written in a particular way (see esp_test_ipc_isr_asm() and the "High-Level Interrupts"
-            chapter in hlinterrupts.rst for more details).
-
-endmenu # "IPC (Inter-Processor Call)

components/esp_ipc/component.mk

@@ -1,9 +0,0 @@
-#
-# Component Makefile
-#
-
-COMPONENT_SRCDIRS := src
-ifdef CONFIG_ESP_IPC_ISR_ENABLE
-    COMPONENT_SRCDIRS += src/esp_ipc_isr
-endif
-COMPONENT_ADD_INCLUDEDIRS := include

components/esp_ipc/test/CMakeLists.txt

@@ -1,5 +0,0 @@
-if(IDF_TARGET STREQUAL "esp32" OR IDF_TARGET STREQUAL "esp32s3")
-    idf_component_register(SRC_DIRS "."
-                    PRIV_INCLUDE_DIRS "."
-                    PRIV_REQUIRES cmock test_utils esp_ipc)
-endif()

components/esp_ipc/test/component.mk

@@ -1,2 +0,0 @@
-COMPONENT_SRCDIRS := .
-COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive

components/esp_system/CMakeLists.txt

@@ -12,6 +12,7 @@ if(BOOTLOADER_BUILD)
         idf_component_register(SRCS "${srcs}" REQUIRES spi_flash)
 else()
     list(APPEND srcs "crosscore_int.c"
+            "esp_ipc.c"
             "esp_err.c"
             "freertos_hooks.c"
             "int_wdt.c"
@@ -40,7 +41,7 @@ else()
                                     # should be removable once using component init functions
                                     # link-time registration is used.
                                     esp_pm app_update nvs_flash pthread app_trace esp_gdbstub
-                                    espcoredump esp_phy efuse esp_ipc
+                                    espcoredump esp_phy efuse
                         LDFRAGMENTS "linker.lf" "app.lf")
     add_subdirectory(port)
 

components/esp_system/Kconfig

@@ -502,3 +502,43 @@ menu "ESP System Settings"
     endchoice
 
 endmenu  # ESP System Settings
+
+menu "IPC (Inter-Processor Call)"
+
+    config ESP_IPC_TASK_STACK_SIZE
+        int "Inter-Processor Call (IPC) task stack size"
+        range 512 65536 if !APPTRACE_ENABLE
+        range 2048 65536 if APPTRACE_ENABLE
+        default 2048 if APPTRACE_ENABLE
+        default 1024
+        help
+            Configure the IPC tasks stack size. One IPC task runs on each core
+            (in dual core mode), and allows for cross-core function calls.
+
+            See IPC documentation for more details.
+
+            The default stack size should be enough for most common use cases.
+            It can be shrunk if you are sure that you do not use any custom
+            IPC functionality.
+
+    config ESP_IPC_USES_CALLERS_PRIORITY
+        bool "IPC runs at caller's priority"
+        default y
+        depends on !FREERTOS_UNICORE
+        help
+            If this option is not enabled then the IPC task will keep behavior
+            same as prior to that of ESP-IDF v4.0, and hence IPC task will run
+            at (configMAX_PRIORITIES - 1) priority.
+
+    config ESP_IPC_ISR_ENABLE
+        bool
+        default y if !FREERTOS_UNICORE
+        help
+            This feature serves a similar purpose to the IPC except that the callback function is run
+            in the context of a level 4 interrupt (i.e., high priority/level interrupt). The IPC ISR
+            feature is intended for low latency execution of simple functions written in assembly on
+            another CPU. Due to being run in higher level interrupt context, the assembly functions
+            should be written in a particular way (see esp_test_ipc_isr_asm() and the "High-Level Interrupts"
+            chapter in hlinterrupts.rst for more details).
+
+endmenu # "IPC (Inter-Processor Call)

components/esp_system/include/esp_ipc.h

@@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+/*
-//
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
-// Licensed under the Apache License, Version 2.0 (the "License");
+ *
-// you may not use this file except in compliance with the License.
+ * SPDX-License-Identifier: Apache-2.0
-// You may obtain a copy of the License at
+ */
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
 
 #ifndef __ESP_IPC_H__
 #define __ESP_IPC_H__

components/esp_system/port/soc/esp32/CMakeLists.txt

@@ -12,6 +12,13 @@ set(srcs "highint_hdl.S"
          "../../arch/xtensa/debug_stubs.c"
          "../../arch/xtensa/trax.c"
          )
+
+if(CONFIG_ESP_IPC_ISR_ENABLE)
+    list(APPEND srcs "../../arch/xtensa/esp_ipc_isr.c"
+                     "../../arch/xtensa/esp_ipc_isr_handler.S"
+                     "../../arch/xtensa/esp_ipc_isr_routines.S")
+endif()
+
 add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs})
 
 target_sources(${COMPONENT_LIB} PRIVATE ${srcs})

components/esp_system/port/soc/esp32s2/CMakeLists.txt

@@ -12,6 +12,13 @@ set(srcs "highint_hdl.S"
          "../../arch/xtensa/debug_stubs.c"
          "../../arch/xtensa/trax.c"
          )
+
+if(CONFIG_ESP_IPC_ISR_ENABLE)
+    list(APPEND srcs "../../arch/xtensa/esp_ipc_isr.c"
+                     "../../arch/xtensa/esp_ipc_isr_handler.S"
+                     "../../arch/xtensa/esp_ipc_isr_routines.S")
+endif()
+
 add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs})
 
 target_sources(${COMPONENT_LIB} PRIVATE ${srcs})

components/esp_system/port/soc/esp32s3/CMakeLists.txt

@@ -13,6 +13,13 @@ set(srcs "highint_hdl.S"
          "../../arch/xtensa/debug_stubs.c"
          "../../arch/xtensa/trax.c"
          )
+
+if(CONFIG_ESP_IPC_ISR_ENABLE)
+    list(APPEND srcs "../../arch/xtensa/esp_ipc_isr.c"
+                     "../../arch/xtensa/esp_ipc_isr_handler.S"
+                     "../../arch/xtensa/esp_ipc_isr_routines.S")
+endif()
+
 add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs})
 
 target_sources(${COMPONENT_LIB} PRIVATE ${srcs})

components/esp_system/test/CMakeLists.txt

@@ -1,3 +1,20 @@
+set(requires "unity"
+             "test_utils"
+             "driver")
+
+set(excludes "test_ipc_isr.c"
+             "test_ipc_isr.S"
+             "test_ipc.c")
+
+if(IDF_TARGET STREQUAL "esp32" OR IDF_TARGET STREQUAL "esp32s3")
+    # If the target is esp32 or esp32s3, we can compile the IPC
+    # tests.
+    set(excludes "")
+    # Add a required dependency
+    list(APPEND requires "cmock")
+endif()
+
 idf_component_register(SRC_DIRS .
+                    EXCLUDE_SRCS "${excludes}"
                     PRIV_INCLUDE_DIRS .
-                    PRIV_REQUIRES unity test_utils driver)
+                    PRIV_REQUIRES "${requires}")

components/esp_system/test/test_ipc.c

@@ -1,3 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #include <stdio.h>
 #include "sdkconfig.h"
 #include "freertos/FreeRTOS.h"

components/esp_system/test/test_ipc_isr.c

@@ -1,3 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #include <stdio.h>
 #include "sdkconfig.h"
 #include "freertos/FreeRTOS.h"

components/freertos/test/CMakeLists.txt

@@ -1,5 +1,5 @@
 idf_component_register(SRC_DIRS .
                        PRIV_INCLUDE_DIRS .
-                       PRIV_REQUIRES cmock test_utils esp_ipc driver)
+                       PRIV_REQUIRES cmock test_utils esp_system driver)
 # Enable task snapshots by setting configENABLE_TASK_SNAPSHOT macro
 idf_build_set_property(COMPILE_OPTIONS "-DconfigENABLE_TASK_SNAPSHOT=1" APPEND)

components/spi_flash/CMakeLists.txt

@@ -44,7 +44,7 @@ else()
         "spi_flash_os_func_noos.c")
 
     list(APPEND srcs ${cache_srcs})
-    set(priv_requires bootloader_support app_update soc esp_ipc driver)
+    set(priv_requires bootloader_support app_update soc driver)
 endif()
 
 idf_component_register(SRCS "${srcs}"

docs/doxygen/Doxyfile

@@ -184,7 +184,7 @@ INPUT = \
     $(PROJECT_PATH)/components/esp_system/include/esp_task_wdt.h \
     $(PROJECT_PATH)/components/esp_hw_support/include/esp_crc.h \
     $(PROJECT_PATH)/components/esp_system/include/esp_freertos_hooks.h \
-    $(PROJECT_PATH)/components/esp_ipc/include/esp_ipc.h \
+    $(PROJECT_PATH)/components/esp_system/include/esp_ipc.h \
     $(PROJECT_PATH)/components/esp_system/include/esp_expression_with_stack.h \
     $(PROJECT_PATH)/components/app_update/include/esp_ota_ops.h \
     $(PROJECT_PATH)/components/esp_https_ota/include/esp_https_ota.h \

docs/en/api-reference/system/ipc.rst

@@ -50,7 +50,7 @@ The `esp_ipc_isr_asm...(asm_func, arg)` functions trigger the High-priority inte
 
 :cpp:func:`esp_ipc_isr_stall_other_cpu` stalls the other CPU and the calling CPU disables interrupts with level 3 and lower. To finish stalling the other CPU call :cpp:func:`esp_ipc_isr_release_other_cpu`. The stalled CPU disables interrupts with level 5 and lower.
 
-Functions executed by Hi-priority IPC must be functions of type `void func(void *arg)`. Examples of a assembler function see in :idf_file:`components/esp_ipc/src/esp_ipc_isr/esp_ipc_isr_routines.S`, :idf_file:`components/esp_ipc/test/test_ipc_isr.S` and below. In the asm function, you can use only a few registers as they were saved in the interrupt handler before calling this function, their use is safe. The registers:`a2` as `void *arg`, a3 and a4 are free for use.
+Functions executed by Hi-priority IPC must be functions of type `void func(void *arg)`. Examples of a assembler function see in :idf_file:`components/esp_system/port/arch/xtensa/esp_ipc_isr_routines.S`, :idf_file:`components/esp_system/test/test_ipc_isr.S` and below. In the asm function, you can use only a few registers as they were saved in the interrupt handler before calling this function, their use is safe. The registers:`a2` as `void *arg`, a3 and a4 are free for use.
 
 Some feature:
 

docs/en/migration-guides/index.rst

@@ -7,3 +7,4 @@ ESP-IDF 5.0 Migration Guides
 
     Peripherals <peripherals>
     Build System <build-system>
+    System <system>

docs/en/migration-guides/system.rst

@@ -0,0 +1,10 @@
+Migrate System to ESP-IDF 5.0
+==================================
+
+Inter-Processor Call
+-----------------------
+
+IPC (Inter-Processor Call) component has been moved to ``esp_system``.
+
+Thus, any project presenting a ``CMakeLists.txt`` file with the parameters ``PRIV_REQUIRES esp_ipc`` or ``REQUIRES esp_ipc``, should be modified to simply remove these options as ``esp_system`` component is included by default.
+

docs/zh_CN/migration-guides/index.rst

@@ -7,3 +7,4 @@ ESP-IDF 5.0 迁移指南
 
     外设 <peripherals>
     构建系统 <build-system>
+    系统 <system>

docs/zh_CN/migration-guides/system.rst

@@ -0,0 +1 @@
+.. include:: ../../en/migration-guides/system.rst

tools/ci/check_copyright_ignore.txt

@@ -663,9 +663,6 @@ components/esp_https_ota/src/esp_https_ota.c
 components/esp_hw_support/include/esp_clk.h
 components/esp_hw_support/include/soc/esp_himem.h
 components/esp_hw_support/include/soc/esp_spiram.h
-components/esp_ipc/include/esp_ipc.h
-components/esp_ipc/test/test_ipc.c
-components/esp_ipc/test/test_ipc_isr.c
 components/esp_lcd/test/test_i2c_lcd_panel.c
 components/esp_lcd/test/test_i80_board.h
 components/esp_lcd/test/test_i80_lcd_panel.c

tools/unit-test-app/components/test_utils/CMakeLists.txt

@@ -20,4 +20,4 @@ idf_component_register(SRCS ${srcs}
                     INCLUDE_DIRS include
                     PRIV_INCLUDE_DIRS private_include
                     REQUIRES spi_flash idf_test cmock
-                    PRIV_REQUIRES perfmon esp_ipc driver)
+                    PRIV_REQUIRES perfmon driver)

tools/unit-test-app/components/test_utils/test/CMakeLists.txt

@@ -1,3 +1,3 @@
 idf_component_register(SRC_DIRS "."
     PRIV_INCLUDE_DIRS "."
-    PRIV_REQUIRES cmock test_utils perfmon esp_ipc)
+    PRIV_REQUIRES cmock test_utils perfmon)