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Merge branch 'bugfix/replace_deprecated_options' into 'master'

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kconfig: replace deprecated options with new values

See merge request espressif/esp-idf!17494
This commit is contained in:
Marius Vikhammer
2022-03-16 09:32:55 +08:00
parent cd10ac50cb ca3c056ac9
commit 453516fbbe
10 changed files with 34 additions and 34 deletions
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4
components/bootloader_support/src/bootloader_console.c
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@@ -34,13 +34,13 @@
#include "esp_rom_sys.h" #include "esp_rom_sys.h"
#include "esp_rom_caps.h" #include "esp_rom_caps.h"
#ifdef CONFIG_ESP_CONSOLE_UART_NONE #ifdef CONFIG_ESP_CONSOLE_NONE
void bootloader_console_init(void) void bootloader_console_init(void)
{ {
esp_rom_install_channel_putc(1, NULL); esp_rom_install_channel_putc(1, NULL);
esp_rom_install_channel_putc(2, NULL); esp_rom_install_channel_putc(2, NULL);
} }
#endif // CONFIG_ESP_CONSOLE_UART_NONE #endif // CONFIG_ESP_CONSOLE_NONE
#ifdef CONFIG_ESP_CONSOLE_UART #ifdef CONFIG_ESP_CONSOLE_UART
void bootloader_console_init(void) void bootloader_console_init(void)

4
components/driver/test/test_spi_master.c
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@@ -1300,7 +1300,7 @@ TEST_CASE_MULTIPLE_DEVICES("SPI Master: FD, DMA, Master Single Direction Test",
#endif //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32) //TODO: IDF-3494 #endif //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32) //TODO: IDF-3494
//NOTE: Explained in IDF-1445 | MR !14996 //NOTE: Explained in IDF-1445 | MR !14996
#if !(CONFIG_SPIRAM_SUPPORT) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384) #if !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384)
/******************************************************************************** /********************************************************************************
* Test SPI transaction interval * Test SPI transaction interval
********************************************************************************/ ********************************************************************************/
@@ -1457,4 +1457,4 @@ TEST_CASE("spi_speed", "[spi]")
master_free_device_bus(spi); master_free_device_bus(spi);
} }
#endif // CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE #endif // CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
#endif // !(CONFIG_SPIRAM_SUPPORT) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384) #endif // !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384)

4
components/esp_system/port/cpu_start.c
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@@ -156,10 +156,10 @@ void IRAM_ATTR call_start_cpu1(void)
bootloader_init_mem(); bootloader_init_mem();
#if CONFIG_ESP_CONSOLE_UART_NONE #if CONFIG_ESP_CONSOLE_NONE
esp_rom_install_channel_putc(1, NULL); esp_rom_install_channel_putc(1, NULL);
esp_rom_install_channel_putc(2, NULL); esp_rom_install_channel_putc(2, NULL);
#else // CONFIG_ESP_CONSOLE_UART_NONE #else // CONFIG_ESP_CONSOLE_NONE
esp_rom_install_uart_printf(); esp_rom_install_uart_printf();
esp_rom_uart_set_as_console(CONFIG_ESP_CONSOLE_UART_NUM); esp_rom_uart_set_as_console(CONFIG_ESP_CONSOLE_UART_NUM);
#endif #endif

8
components/esp_system/port/soc/esp32c2/clk.c
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@@ -210,10 +210,10 @@ __attribute__((weak)) void esp_perip_clk_init(void)
wifi_bt_sdio_clk = ~READ_PERI_REG(SYSTEM_WIFI_CLK_EN_REG); wifi_bt_sdio_clk = ~READ_PERI_REG(SYSTEM_WIFI_CLK_EN_REG);
} else { } else {
common_perip_clk = SYSTEM_SPI2_CLK_EN | common_perip_clk = SYSTEM_SPI2_CLK_EN |
#if CONFIG_CONSOLE_UART_NUM != 0 #if CONFIG_ESP_CONSOLE_UART_NUM != 0
SYSTEM_UART_CLK_EN | SYSTEM_UART_CLK_EN |
#endif #endif
#if CONFIG_CONSOLE_UART_NUM != 1 #if CONFIG_ESP_CONSOLE_UART_NUM != 1
SYSTEM_UART1_CLK_EN | SYSTEM_UART1_CLK_EN |
#endif #endif
SYSTEM_LEDC_CLK_EN | SYSTEM_LEDC_CLK_EN |
@@ -230,10 +230,10 @@ __attribute__((weak)) void esp_perip_clk_init(void)
//Reset the communication peripherals like I2C, SPI, UART and bring them to known state. //Reset the communication peripherals like I2C, SPI, UART and bring them to known state.
common_perip_clk |= SYSTEM_SPI2_CLK_EN | common_perip_clk |= SYSTEM_SPI2_CLK_EN |
#if CONFIG_CONSOLE_UART_NUM != 0 #if CONFIG_ESP_CONSOLE_UART_NUM != 0
SYSTEM_UART_CLK_EN | SYSTEM_UART_CLK_EN |
#endif #endif
#if CONFIG_CONSOLE_UART_NUM != 1 #if CONFIG_ESP_CONSOLE_UART_NUM != 1
SYSTEM_UART1_CLK_EN | SYSTEM_UART1_CLK_EN |
#endif #endif
SYSTEM_I2C_EXT0_CLK_EN; SYSTEM_I2C_EXT0_CLK_EN;

8
components/esp_system/port/soc/esp32c3/clk.c
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@@ -216,10 +216,10 @@ __attribute__((weak)) void esp_perip_clk_init(void)
} else { } else {
common_perip_clk = SYSTEM_WDG_CLK_EN | common_perip_clk = SYSTEM_WDG_CLK_EN |
SYSTEM_I2S0_CLK_EN | SYSTEM_I2S0_CLK_EN |
#if CONFIG_CONSOLE_UART_NUM != 0 #if CONFIG_ESP_CONSOLE_UART_NUM != 0
SYSTEM_UART_CLK_EN | SYSTEM_UART_CLK_EN |
#endif #endif
#if CONFIG_CONSOLE_UART_NUM != 1 #if CONFIG_ESP_CONSOLE_UART_NUM != 1
SYSTEM_UART1_CLK_EN | SYSTEM_UART1_CLK_EN |
#endif #endif
SYSTEM_SPI2_CLK_EN | SYSTEM_SPI2_CLK_EN |
@@ -247,10 +247,10 @@ __attribute__((weak)) void esp_perip_clk_init(void)
//Reset the communication peripherals like I2C, SPI, UART, I2S and bring them to known state. //Reset the communication peripherals like I2C, SPI, UART, I2S and bring them to known state.
common_perip_clk |= SYSTEM_I2S0_CLK_EN | common_perip_clk |= SYSTEM_I2S0_CLK_EN |
#if CONFIG_CONSOLE_UART_NUM != 0 #if CONFIG_ESP_CONSOLE_UART_NUM != 0
SYSTEM_UART_CLK_EN | SYSTEM_UART_CLK_EN |
#endif #endif
#if CONFIG_CONSOLE_UART_NUM != 1 #if CONFIG_ESP_CONSOLE_UART_NUM != 1
SYSTEM_UART1_CLK_EN | SYSTEM_UART1_CLK_EN |
#endif #endif
SYSTEM_SPI2_CLK_EN | SYSTEM_SPI2_CLK_EN |

8
components/esp_system/port/soc/esp32h2/clk.c
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@@ -213,10 +213,10 @@ __attribute__((weak)) void esp_perip_clk_init(void)
} else { } else {
common_perip_clk = SYSTEM_WDG_CLK_EN | common_perip_clk = SYSTEM_WDG_CLK_EN |
SYSTEM_I2S0_CLK_EN | SYSTEM_I2S0_CLK_EN |
#if CONFIG_CONSOLE_UART_NUM != 0 #if CONFIG_ESP_CONSOLE_UART_NUM != 0
SYSTEM_UART_CLK_EN | SYSTEM_UART_CLK_EN |
#endif #endif
#if CONFIG_CONSOLE_UART_NUM != 1 #if CONFIG_ESP_CONSOLE_UART_NUM != 1
SYSTEM_UART1_CLK_EN | SYSTEM_UART1_CLK_EN |
#endif #endif
SYSTEM_SPI2_CLK_EN | SYSTEM_SPI2_CLK_EN |
@@ -240,10 +240,10 @@ __attribute__((weak)) void esp_perip_clk_init(void)
//Reset the communication peripherals like I2C, SPI, UART, I2S and bring them to known state. //Reset the communication peripherals like I2C, SPI, UART, I2S and bring them to known state.
common_perip_clk |= SYSTEM_I2S0_CLK_EN | common_perip_clk |= SYSTEM_I2S0_CLK_EN |
#if CONFIG_CONSOLE_UART_NUM != 0 #if CONFIG_ESP_CONSOLE_UART_NUM != 0
SYSTEM_UART_CLK_EN | SYSTEM_UART_CLK_EN |
#endif #endif
#if CONFIG_CONSOLE_UART_NUM != 1 #if CONFIG_ESP_CONSOLE_UART_NUM != 1
SYSTEM_UART1_CLK_EN | SYSTEM_UART1_CLK_EN |
#endif #endif
SYSTEM_SPI2_CLK_EN | SYSTEM_SPI2_CLK_EN |

12
components/esp_system/port/soc/esp32s3/clk.c
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@@ -232,13 +232,13 @@ __attribute__((weak)) void esp_perip_clk_init(void)
} else { } else {
common_perip_clk = SYSTEM_WDG_CLK_EN | common_perip_clk = SYSTEM_WDG_CLK_EN |
SYSTEM_I2S0_CLK_EN | SYSTEM_I2S0_CLK_EN |
#if CONFIG_CONSOLE_UART_NUM != 0 #if CONFIG_ESP_CONSOLE_UART_NUM != 0
SYSTEM_UART_CLK_EN | SYSTEM_UART_CLK_EN |
#endif #endif
#if CONFIG_CONSOLE_UART_NUM != 1 #if CONFIG_ESP_CONSOLE_UART_NUM != 1
SYSTEM_UART1_CLK_EN | SYSTEM_UART1_CLK_EN |
#endif #endif
#if CONFIG_CONSOLE_UART_NUM != 2 #if CONFIG_ESP_CONSOLE_UART_NUM != 2
SYSTEM_UART2_CLK_EN | SYSTEM_UART2_CLK_EN |
#endif #endif
SYSTEM_USB_CLK_EN | SYSTEM_USB_CLK_EN |
@@ -272,13 +272,13 @@ __attribute__((weak)) void esp_perip_clk_init(void)
//Reset the communication peripherals like I2C, SPI, UART, I2S and bring them to known state. //Reset the communication peripherals like I2C, SPI, UART, I2S and bring them to known state.
common_perip_clk |= SYSTEM_I2S0_CLK_EN | common_perip_clk |= SYSTEM_I2S0_CLK_EN |
#if CONFIG_CONSOLE_UART_NUM != 0 #if CONFIG_ESP_CONSOLE_UART_NUM != 0
SYSTEM_UART_CLK_EN | SYSTEM_UART_CLK_EN |
#endif #endif
#if CONFIG_CONSOLE_UART_NUM != 1 #if CONFIG_ESP_CONSOLE_UART_NUM != 1
SYSTEM_UART1_CLK_EN | SYSTEM_UART1_CLK_EN |
#endif #endif
#if CONFIG_CONSOLE_UART_NUM != 2 #if CONFIG_ESP_CONSOLE_UART_NUM != 2
SYSTEM_UART2_CLK_EN | SYSTEM_UART2_CLK_EN |
#endif #endif
SYSTEM_USB_CLK_EN | SYSTEM_USB_CLK_EN |

4
components/esp_system/test/test_sleep.c
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@@ -83,7 +83,7 @@ TEST_CASE("wake up from light sleep using timer", "[deepsleep]")
} }
//NOTE: Explained in IDF-1445 | MR !14996 //NOTE: Explained in IDF-1445 | MR !14996
#if !(CONFIG_SPIRAM_SUPPORT) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384) #if !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384)
static void test_light_sleep(void* arg) static void test_light_sleep(void* arg)
{ {
vTaskDelay(2); vTaskDelay(2);
@@ -139,7 +139,7 @@ TEST_CASE("light sleep stress test with periodic esp_timer", "[deepsleep]")
esp_timer_stop(timer); esp_timer_stop(timer);
esp_timer_delete(timer); esp_timer_delete(timer);
} }
#endif // !(CONFIG_SPIRAM_SUPPORT) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384) #endif // !(CONFIG_SPIRAM) || (CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL >= 16384)
#if defined(CONFIG_ESP_SYSTEM_RTC_EXT_XTAL) #if defined(CONFIG_ESP_SYSTEM_RTC_EXT_XTAL)
#define MAX_SLEEP_TIME_ERROR_US 200 #define MAX_SLEEP_TIME_ERROR_US 200

8
components/spi_flash/cache_utils.c
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@@ -622,7 +622,7 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable, bool dcache_wrap_enable
return ESP_FAIL; return ESP_FAIL;
} }
#ifdef CONFIG_FLASHMODE_QIO #ifdef CONFIG_ESPTOOLPY_FLASHMODE_QIO
flash_support_wrap = true; flash_support_wrap = true;
extern bool spi_flash_support_wrap_size(uint32_t wrap_size); extern bool spi_flash_support_wrap_size(uint32_t wrap_size);
if (!spi_flash_support_wrap_size(flash_wrap_size)) { if (!spi_flash_support_wrap_size(flash_wrap_size)) {
@@ -876,7 +876,7 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable, bool dcache_wrap_enable
return ESP_FAIL; return ESP_FAIL;
} }
#ifdef CONFIG_FLASHMODE_QIO #ifdef CONFIG_ESPTOOLPY_FLASHMODE_QIO
flash_support_wrap = true; flash_support_wrap = true;
extern bool spi_flash_support_wrap_size(uint32_t wrap_size); extern bool spi_flash_support_wrap_size(uint32_t wrap_size);
if (!spi_flash_support_wrap_size(flash_wrap_size)) { if (!spi_flash_support_wrap_size(flash_wrap_size)) {
@@ -944,7 +944,7 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable)
flash_wrap_size = 32; flash_wrap_size = 32;
} }
#ifdef CONFIG_FLASHMODE_QIO #ifdef CONFIG_ESPTOOLPY_FLASHMODE_QIO
flash_support_wrap = true; flash_support_wrap = true;
extern bool spi_flash_support_wrap_size(uint32_t wrap_size); extern bool spi_flash_support_wrap_size(uint32_t wrap_size);
if (!spi_flash_support_wrap_size(flash_wrap_size)) { if (!spi_flash_support_wrap_size(flash_wrap_size)) {
@@ -953,7 +953,7 @@ esp_err_t esp_enable_cache_wrap(bool icache_wrap_enable)
} }
#else #else
ESP_EARLY_LOGW(TAG, "Flash is not in QIO mode, do not support wrap."); ESP_EARLY_LOGW(TAG, "Flash is not in QIO mode, do not support wrap.");
#endif // CONFIG_FLASHMODE_QIO #endif // CONFIG_ESPTOOLPY_FLASHMODE_QIO
extern esp_err_t spi_flash_enable_wrap(uint32_t wrap_size); extern esp_err_t spi_flash_enable_wrap(uint32_t wrap_size);
if (flash_support_wrap && flash_wrap_size > 0) { if (flash_support_wrap && flash_wrap_size > 0) {

8
examples/system/deep_sleep/main/deep_sleep_example_main.c
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@@ -48,13 +48,13 @@ static RTC_DATA_ATTR struct timeval sleep_enter_time;
/* /*
* Offset (in 32-bit words) in RTC Slow memory where the data is placed * Offset (in 32-bit words) in RTC Slow memory where the data is placed
* by the ULP coprocessor. It can be chosen to be any value greater or equal * by the ULP coprocessor. It can be chosen to be any value greater or equal
* to ULP program size, and less than the CONFIG_ESP32_ULP_COPROC_RESERVE_MEM/4 - 6, * to ULP program size, and less than the CONFIG_ULP_COPROC_RESERVE_MEM/4 - 6,
* where 6 is the number of words used by the ULP coprocessor. * where 6 is the number of words used by the ULP coprocessor.
*/ */
#define ULP_DATA_OFFSET 36 #define ULP_DATA_OFFSET 36
_Static_assert(ULP_DATA_OFFSET < CONFIG_ESP32_ULP_COPROC_RESERVE_MEM/4 - 6, _Static_assert(ULP_DATA_OFFSET < CONFIG_ULP_COPROC_RESERVE_MEM/4 - 6,
"ULP_DATA_OFFSET is set too high, or CONFIG_ESP32_ULP_COPROC_RESERVE_MEM is not sufficient"); "ULP_DATA_OFFSET is set too high, or CONFIG_ULP_COPROC_RESERVE_MEM is not sufficient");
/** /**
* @brief Start ULP temperature monitoring program * @brief Start ULP temperature monitoring program
@@ -344,7 +344,7 @@ static void start_ulp_temperature_monitoring(void)
CLEAR_PERI_REG_MASK(SENS_SAR_TSENS_CTRL_REG, SENS_TSENS_POWER_UP_FORCE); CLEAR_PERI_REG_MASK(SENS_SAR_TSENS_CTRL_REG, SENS_TSENS_POWER_UP_FORCE);
// Clear the part of RTC_SLOW_MEM reserved for the ULP. Makes debugging easier. // Clear the part of RTC_SLOW_MEM reserved for the ULP. Makes debugging easier.
memset(RTC_SLOW_MEM, 0, CONFIG_ESP32_ULP_COPROC_RESERVE_MEM); memset(RTC_SLOW_MEM, 0, CONFIG_ULP_COPROC_RESERVE_MEM);
// The first word of memory (at data offset) is used to store the initial temperature (T0) // The first word of memory (at data offset) is used to store the initial temperature (T0)
// Zero it out here, then ULP will update it on the first run. // Zero it out here, then ULP will update it on the first run.