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re-enable riscv ulp gpio support and examples

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This commit is contained in:
Marius Vikhammer
2022-05-26 11:30:31 +08:00
parent b72f987c5c
commit 477844806e
9 changed files with 21 additions and 27 deletions
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4
examples/system/deep_sleep/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-S2 | ESP32-C3 |
| ----------------- | ----- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-S2 | ESP32-S3 | ESP32-C3 |
| ----------------- | ----- | -------- | -------- | -------- |
# Deep Sleep Example

6
examples/system/ulp_riscv/ds18b20_onewire/CMakeLists.txt
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@@ -2,11 +2,5 @@
# in this exact order for cmake to work correctly
cmake_minimum_required(VERSION 3.5)
if(NOT IDF_TARGET STREQUAL "esp32s2")
#IDF-4514
message(FATAL_ERROR "DO NOT BUILD THIS APP FOR ANY TARGET OTHER THAN ESP32-S2 OTHERWISE YOU MAY BRICK YOUR DEVICE")
return()
endif()
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
project(ulp_riscv_ds18b20_example)

1
examples/system/ulp_riscv/ds18b20_onewire/sdkconfig.defaults
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@@ -1,4 +1,3 @@
CONFIG_IDF_TARGET="esp32s2"
# Enable ULP
CONFIG_ESP32S2_ULP_COPROC_ENABLED=y
CONFIG_ESP32S2_ULP_COPROC_RISCV=y

6
examples/system/ulp_riscv/gpio/CMakeLists.txt
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@@ -2,11 +2,5 @@
# in this exact order for cmake to work correctly
cmake_minimum_required(VERSION 3.5)
if(NOT IDF_TARGET STREQUAL "esp32s2")
#IDF-4514
message(FATAL_ERROR "DO NOT BUILD THIS APP FOR ANY TARGET OTHER THAN ESP32-S2 OTHERWISE YOU MAY BRICK YOUR DEVICE")
return()
endif()
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
project(ulp_riscv_example)

12
examples/system/ulp_riscv/gpio/README.md
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@@ -1,12 +1,12 @@
| Supported Targets | ESP32-S2 |
| ----------------- | -------- |
| Supported Targets | ESP32-S2 | ESP32-S3 |
| ----------------- | -------- | -------- |
# ULP-RISC-V simple example with GPIO Polling:
This example demonstrates how to program the ULP-RISC-V coprocessor to poll a gpio and wakeup the main CPU when it changes its state;
ULP program written in C can be found across `ulp/main.c`. The build system compiles and links this program, converts it into binary format, and embeds it into the .rodata section of the ESP-IDF application.
At runtime, the application running inside the main CPU loads ULP program into the `RTC_SLOW_MEM` memory region using `ulp_riscv_load_binary` function. The main code then configures the ULP wakeup period and starts the coprocessor by using `ulp_riscv_run`. Once the ULP program is started, it runs periodically, with the period set by the main program. The main program enables ULP wakeup source and puts the chip into deep sleep mode.
When the ULP program finds an state changing in the pin, it saves the current state and sends a wakeup signal to the main CPU.
@@ -19,13 +19,13 @@ In this example the input signal is connected to GPIO0. Note that this pin was c
## Example output
```
Not a ULP wakeup, initializing it!
Not a ULP wakeup, initializing it!
Entering in deep sleep
...
ULP-RISC-V woke up the main CPU!
ULP-RISC-V read changes in GPIO_0 current is: High
ULP-RISC-V woke up the main CPU!
ULP-RISC-V read changes in GPIO_0 current is: High
Entering in deep sleep
```

6
examples/system/ulp_riscv/gpio/example_test.py
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@@ -1,13 +1,14 @@
from __future__ import unicode_literals
import re
import time
import tiny_test_fw
import ttfw_idf
from tiny_test_fw import DUT
@ttfw_idf.idf_example_test(env_tag='Example_GENERIC', target=['esp32s2'])
@ttfw_idf.idf_example_test(env_tag='deepsleep_temp_tag', target=['esp32s2', 'esp32s3'])
def test_examples_ulp_riscv(env, extra_data): # type: (tiny_test_fw.Env.Env, None) -> None # pylint: disable=unused-argument
dut = env.get_dut('ulp_riscv', 'examples/system/ulp_riscv/gpio')
dut.start_app()
@@ -16,6 +17,9 @@ def test_examples_ulp_riscv(env, extra_data): # type: (tiny_test_fw.Env.Env, No
'Entering in deep sleep',
timeout=30)
# Give the chip time to enter deepsleep
time.sleep(1)
# Run two times to make sure device sleep
# and wake up properly
for i in range(0, 2):

5
examples/system/ulp_riscv/gpio/sdkconfig.defaults
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@@ -1,8 +1,3 @@
CONFIG_IDF_TARGET="esp32s2"
# Enable ULP
CONFIG_ESP32S2_ULP_COPROC_ENABLED=y
CONFIG_ESP32S2_ULP_COPROC_RISCV=y
CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM=4096
# Set log level to Warning to produce clean output
CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y
CONFIG_BOOTLOADER_LOG_LEVEL=2

4
examples/system/ulp_riscv/gpio/sdkconfig.defaults.esp32s2 Normal file
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@@ -0,0 +1,4 @@
# Enable ULP
CONFIG_ESP32S2_ULP_COPROC_ENABLED=y
CONFIG_ESP32S2_ULP_COPROC_RISCV=y
CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM=4096

4
examples/system/ulp_riscv/gpio/sdkconfig.defaults.esp32s3 Normal file
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@@ -0,0 +1,4 @@
# Enable ULP
CONFIG_ESP32S3_ULP_COPROC_ENABLED=y
CONFIG_ESP32S3_ULP_COPROC_RISCV=y
CONFIG_ESP32S3_ULP_COPROC_RESERVE_MEM=4096