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Merge branch 'feat/sleep_retention_expand_module_bitmap_v5.4' into 'release/v5.4'

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backport v5.4: expand the number of sleep retention modules supported on different chips

See merge request espressif/esp-idf!34691
This commit is contained in:
Jiang Jiang Jian
2024-11-20 14:50:52 +08:00
parent 0e966ba0d6 71f83bd02b
commit 4cc82c7d66
49 changed files with 733 additions and 583 deletions
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2
components/bt/controller/esp32c5/bt.c
View File

@@ -385,7 +385,7 @@ static esp_err_t sleep_modem_ble_mac_modem_state_init(uint8_t extra)
int retention_args = extra;
sleep_retention_module_init_param_t init_param = {
.cbs = { .create = { .handle = sleep_modem_ble_mac_retention_init, .arg = &retention_args } },
.depends = BIT(SLEEP_RETENTION_MODULE_BT_BB)
.depends = RETENTION_MODULE_BITMAP_INIT(BT_BB)
};
esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_BLE_MAC, &init_param);
if (err == ESP_OK) {

2
components/bt/controller/esp32c6/bt.c
View File

@@ -593,7 +593,7 @@ static esp_err_t sleep_modem_ble_mac_modem_state_init(uint8_t extra)
int retention_args = extra;
sleep_retention_module_init_param_t init_param = {
.cbs = { .create = { .handle = sleep_modem_ble_mac_retention_init, .arg = &retention_args } },
.depends = BIT(SLEEP_RETENTION_MODULE_BT_BB)
.depends = RETENTION_MODULE_BITMAP_INIT(BT_BB)
};
esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_BLE_MAC, &init_param);
if (err == ESP_OK) {

2
components/bt/controller/esp32h2/bt.c
View File

@@ -585,7 +585,7 @@ static esp_err_t sleep_modem_ble_mac_modem_state_init(uint8_t extra)
int retention_args = extra;
sleep_retention_module_init_param_t init_param = {
.cbs = { .create = { .handle = sleep_modem_ble_mac_retention_init, .arg = &retention_args } },
.depends = BIT(SLEEP_RETENTION_MODULE_BT_BB)
.depends = RETENTION_MODULE_BITMAP_INIT(BT_BB)
};
esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_BLE_MAC, &init_param);
if (err == ESP_OK) {

8
components/driver/twai/twai.c
View File

@@ -336,11 +336,11 @@ static void twai_free_driver_obj(twai_obj_t *p_obj)
#if TWAI_USE_RETENTION_LINK
const periph_retention_module_t retention_id = twai_reg_retention_info[p_obj->controller_id].module_id;
if (sleep_retention_get_created_modules() & BIT(retention_id)) {
assert(sleep_retention_get_inited_modules() & BIT(retention_id));
if (sleep_retention_is_module_created(retention_id)) {
assert(sleep_retention_is_module_inited(retention_id));
sleep_retention_module_free(retention_id);
}
if (sleep_retention_get_inited_modules() & BIT(retention_id)) {
if (sleep_retention_is_module_inited(retention_id)) {
sleep_retention_module_deinit(retention_id);
}
@@ -408,7 +408,7 @@ static esp_err_t twai_alloc_driver_obj(const twai_general_config_t *g_config, tw
.arg = p_obj,
},
},
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM)
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
if (sleep_retention_module_init(module, &init_param) != ESP_OK) {
ESP_LOGW(TWAI_TAG, "init sleep retention failed for TWAI%d, power domain may be turned off during sleep", controller_id);

8
components/esp_driver_gptimer/src/gptimer_common.c
View File

@@ -38,7 +38,7 @@ void gptimer_create_retention_module(gptimer_group_t *group)
int group_id = group->group_id;
sleep_retention_module_t module = tg_timer_reg_retention_info[group_id].module;
_lock_acquire(&s_platform.mutex);
if ((sleep_retention_get_inited_modules() & BIT(module)) && !(sleep_retention_get_created_modules() & BIT(module))) {
if (sleep_retention_is_module_inited(module) && !sleep_retention_is_module_created(module)) {
if (sleep_retention_module_allocate(module) != ESP_OK) {
// even though the sleep retention module create failed, GPTimer driver should still work, so just warning here
ESP_LOGW(TAG, "create retention link failed %d, power domain won't be turned off during sleep", group_id);
@@ -92,7 +92,7 @@ gptimer_group_t *gptimer_acquire_group_handle(int group_id)
.arg = group
},
},
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM)
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
if (sleep_retention_module_init(module, &init_param) != ESP_OK) {
// even though the sleep retention module init failed, RMT driver should still work, so just warning here
@@ -128,10 +128,10 @@ void gptimer_release_group_handle(gptimer_group_t *group)
}
#if GPTIMER_USE_RETENTION_LINK
sleep_retention_module_t module = tg_timer_reg_retention_info[group_id].module;
if (sleep_retention_get_created_modules() & BIT(module)) {
if (sleep_retention_is_module_created(module)) {
sleep_retention_module_free(module);
}
if (sleep_retention_get_inited_modules() & BIT(module)) {
if (sleep_retention_is_module_inited(module)) {
sleep_retention_module_deinit(module);
}
#endif

2
components/esp_driver_i2s/i2s_common.c
View File

@@ -268,7 +268,7 @@ static i2s_controller_t *i2s_acquire_controller_obj(int id)
.arg = i2s_obj,
},
},
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM)
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
if (sleep_retention_module_init(module, &init_param) == ESP_OK) {
i2s_obj->slp_retention_mod = module;

2
components/esp_driver_ledc/src/ledc.c
View File

@@ -434,7 +434,7 @@ static bool ledc_speed_mode_ctx_create(ledc_mode_t speed_mode)
.arg = NULL,
},
},
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
if (sleep_retention_module_init(module, &init_param) != ESP_OK) {
ESP_LOGW(LEDC_TAG, "init sleep retention failed for ledc, power domain may be turned off during sleep");

8
components/esp_driver_mcpwm/src/mcpwm_com.c
View File

@@ -73,7 +73,7 @@ mcpwm_group_t *mcpwm_acquire_group_handle(int group_id)
.arg = group,
},
},
.depends = SLEEP_RETENTION_MODULE_BM_CLOCK_SYSTEM
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
// we only do retention init here. Allocate retention module in the unit initialization
if (sleep_retention_module_init(module, &init_param) != ESP_OK) {
@@ -140,10 +140,10 @@ void mcpwm_release_group_handle(mcpwm_group_t *group)
}
#if MCPWM_USE_RETENTION_LINK
const periph_retention_module_t module_id = mcpwm_reg_retention_info[group_id].retention_module;
if (sleep_retention_get_created_modules() & BIT(module_id)) {
if (sleep_retention_is_module_created(module_id)) {
sleep_retention_module_free(module_id);
}
if (sleep_retention_get_inited_modules() & BIT(module_id)) {
if (sleep_retention_is_module_inited(module_id)) {
sleep_retention_module_deinit(module_id);
}
#endif // MCPWM_USE_RETENTION_LINK
@@ -305,7 +305,7 @@ void mcpwm_create_retention_module(mcpwm_group_t *group)
int group_id = group->group_id;
sleep_retention_module_t module_id = mcpwm_reg_retention_info[group_id].retention_module;
_lock_acquire(&s_platform.mutex);
if ((sleep_retention_get_inited_modules() & BIT(module_id)) && !(sleep_retention_get_created_modules() & BIT(module_id))) {
if (sleep_retention_is_module_inited(module_id) && !sleep_retention_is_module_created(module_id)) {
if (sleep_retention_module_allocate(module_id) != ESP_OK) {
// even though the sleep retention module create failed, MCPWM driver should still work, so just warning here
ESP_LOGW(TAG, "create retention module failed, power domain can't turn off");

10
components/esp_driver_parlio/src/parlio_common.c
View File

@@ -56,7 +56,7 @@ parlio_group_t *parlio_acquire_group_handle(int group_id)
.arg = group,
},
},
.depends = SLEEP_RETENTION_MODULE_BM_CLOCK_SYSTEM
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
// we only do retention init here. Allocate retention module in the unit initialization
if (sleep_retention_module_init(module_id, &init_param) != ESP_OK) {
@@ -107,11 +107,11 @@ void parlio_release_group_handle(parlio_group_t *group)
if (do_deinitialize) {
#if PARLIO_USE_RETENTION_LINK
const periph_retention_module_t module_id = parlio_reg_retention_info[group_id].retention_module;
if (sleep_retention_get_created_modules() & BIT(module_id)) {
assert(sleep_retention_get_inited_modules() & BIT(module_id));
if (sleep_retention_is_module_created(module_id)) {
assert(sleep_retention_is_module_inited(module_id));
sleep_retention_module_free(module_id);
}
if (sleep_retention_get_inited_modules() & BIT(module_id)) {
if (sleep_retention_is_module_inited(module_id)) {
sleep_retention_module_deinit(module_id);
}
#endif // PARLIO_USE_RETENTION_LINK
@@ -195,7 +195,7 @@ void parlio_create_retention_module(parlio_group_t *group)
sleep_retention_module_t module_id = parlio_reg_retention_info[group_id].retention_module;
_lock_acquire(&s_platform.mutex);
if ((sleep_retention_get_inited_modules() & BIT(module_id)) && !(sleep_retention_get_created_modules() & BIT(module_id))) {
if (sleep_retention_is_module_inited(module_id) && !sleep_retention_is_module_created(module_id)) {
if (sleep_retention_module_allocate(module_id) != ESP_OK) {
// even though the sleep retention module create failed, PARLIO driver should still work, so just warning here
ESP_LOGW(TAG, "create retention module failed, power domain can't turn off");

4
components/esp_driver_pcnt/src/pulse_cnt.c
View File

@@ -881,7 +881,7 @@ static pcnt_group_t *pcnt_acquire_group_handle(int group_id)
.arg = group,
},
},
.depends = SLEEP_RETENTION_MODULE_BM_CLOCK_SYSTEM
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
// we only do retention init here. Allocate retention module in the unit initialization
if (sleep_retention_module_init(module_id, &init_param) != ESP_OK) {
@@ -928,7 +928,7 @@ static void pcnt_release_group_handle(pcnt_group_t *group)
if (do_deinitialize) {
#if PCNT_USE_RETENTION_LINK
const periph_retention_module_t module_id = pcnt_reg_retention_info[group_id].retention_module;
if (sleep_retention_get_inited_modules() & BIT(module_id)) {
if (sleep_retention_is_module_inited(module_id)) {
sleep_retention_module_deinit(module_id);
}
#endif // PCNT_USE_RETENTION_LINK

8
components/esp_driver_rmt/src/rmt_common.c
View File

@@ -83,7 +83,7 @@ rmt_group_t *rmt_acquire_group_handle(int group_id)
.arg = group,
},
},
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM)
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
if (sleep_retention_module_init(module, &init_param) != ESP_OK) {
// even though the sleep retention module init failed, RMT driver should still work, so just warning here
@@ -146,10 +146,10 @@ void rmt_release_group_handle(rmt_group_t *group)
if (do_deinitialize) {
#if RMT_USE_RETENTION_LINK
sleep_retention_module_t module = rmt_reg_retention_info[group_id].module;
if (sleep_retention_get_created_modules() & BIT(module)) {
if (sleep_retention_is_module_created(module)) {
sleep_retention_module_free(module);
}
if (sleep_retention_get_inited_modules() & BIT(module)) {
if (sleep_retention_is_module_inited(module)) {
sleep_retention_module_deinit(module);
}
#endif
@@ -313,7 +313,7 @@ void rmt_create_retention_module(rmt_group_t *group)
int group_id = group->group_id;
sleep_retention_module_t module = rmt_reg_retention_info[group_id].module;
_lock_acquire(&s_platform.mutex);
if ((sleep_retention_get_inited_modules() & BIT(module)) && !(sleep_retention_get_created_modules() & BIT(module))) {
if (sleep_retention_is_module_inited(module) && !sleep_retention_is_module_created(module)) {
if (sleep_retention_module_allocate(module) != ESP_OK) {
// even though the sleep retention module create failed, RMT driver should still work, so just warning here
ESP_LOGW(TAG, "create retention link failed, power domain won't be turned off during sleep");

8
components/esp_driver_spi/src/gpspi/spi_common.c
View File

@@ -867,7 +867,7 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
.arg = ctx,
},
},
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
_lock_acquire(&ctx->mutex);
@@ -971,11 +971,11 @@ esp_err_t spi_bus_free(spi_host_device_t host_id)
#if SOC_SPI_SUPPORT_SLEEP_RETENTION && CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
const periph_retention_module_t retention_id = spi_reg_retention_info[host_id - 1].module_id;
_lock_acquire(&ctx->mutex);
if (sleep_retention_get_created_modules() & BIT(retention_id)) {
assert(sleep_retention_get_inited_modules() & BIT(retention_id));
if (sleep_retention_is_module_created(retention_id)) {
assert(sleep_retention_is_module_inited(retention_id));
sleep_retention_module_free(retention_id);
}
if (sleep_retention_get_inited_modules() & BIT(retention_id)) {
if (sleep_retention_is_module_inited(retention_id)) {
sleep_retention_module_deinit(retention_id);
}
_lock_release(&ctx->mutex);

6
components/esp_driver_tsens/src/temperature_sensor.c
View File

@@ -108,7 +108,7 @@ static esp_err_t s_temperature_sensor_sleep_retention_init(void *arg)
void temperature_sensor_create_retention_module(temperature_sensor_handle_t tsens)
{
sleep_retention_module_t module_id = temperature_sensor_regs_retention.module_id;
if ((sleep_retention_get_inited_modules() & BIT(module_id)) && !(sleep_retention_get_created_modules() & BIT(module_id))) {
if (sleep_retention_is_module_inited(module_id) && !sleep_retention_is_module_created(module_id)) {
if (sleep_retention_module_allocate(module_id) != ESP_OK) {
// even though the sleep retention module_id create failed, temperature sensor driver should still work, so just warning here
ESP_LOGW(TAG, "create retention link failed, power domain won't be turned off during sleep");
@@ -196,10 +196,10 @@ esp_err_t temperature_sensor_uninstall(temperature_sensor_handle_t tsens)
#if TEMPERATURE_SENSOR_USE_RETENTION_LINK
sleep_retention_module_t module_id = temperature_sensor_regs_retention.module_id;
if (sleep_retention_get_created_modules() & BIT(module_id)) {
if (sleep_retention_is_module_created(module_id)) {
sleep_retention_module_free(temperature_sensor_regs_retention.module_id);
}
if (sleep_retention_get_inited_modules() & BIT(module_id)) {
if (sleep_retention_is_module_inited(module_id)) {
sleep_retention_module_deinit(temperature_sensor_regs_retention.module_id);
}
#endif // TEMPERATURE_SENSOR_USE_RETENTION_LINK

2
components/esp_driver_uart/src/uart.c
View File

@@ -229,7 +229,7 @@ static void uart_module_enable(uart_port_t uart_num)
.arg = &uart_context[uart_num],
},
},
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
if (sleep_retention_module_init(module, &init_param) == ESP_OK) {
uart_context[uart_num].retention_link_inited = true;

2
components/esp_hw_support/dma/gdma_sleep_retention.c
View File

@@ -49,7 +49,7 @@ esp_err_t gdma_sleep_retention_init(int group_id, int pair_id)
gdma_channel_retention_arg_t arg = { .group_id = group_id, .pair_id = pair_id };
sleep_retention_module_init_param_t init_param = {
.cbs = { .create = { .handle = sleep_gdma_channel_retention_init, .arg = &arg } },
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM)
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
sleep_retention_module_t module = gdma_chx_regs_retention[group_id][pair_id].module_id;
esp_err_t err = sleep_retention_module_init(module, &init_param);

8
components/esp_hw_support/esp_etm.c
View File

@@ -89,7 +89,7 @@ static void etm_create_retention_module(etm_group_t *group)
int group_id = group->group_id;
sleep_retention_module_t module = etm_reg_retention_info[group_id].module;
_lock_acquire(&s_platform.mutex);
if ((sleep_retention_get_inited_modules() & BIT(module)) && !(sleep_retention_get_created_modules() & BIT(module))) {
if (sleep_retention_is_module_inited(module) && !sleep_retention_is_module_created(module)) {
if (sleep_retention_module_allocate(module) != ESP_OK) {
// even though the sleep retention module create failed, ETM driver should still work, so just warning here
ESP_LOGW(TAG, "create retention link failed %d, power domain won't be turned off during sleep", group_id);
@@ -128,7 +128,7 @@ static etm_group_t *etm_acquire_group_handle(int group_id)
.arg = group,
},
},
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM)
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
if (sleep_retention_module_init(module, &init_param) != ESP_OK) {
// even though the sleep retention module init failed, ETM driver may still work, so just warning here
@@ -175,10 +175,10 @@ static void etm_release_group_handle(etm_group_t *group)
if (do_deinitialize) {
#if ETM_USE_RETENTION_LINK
sleep_retention_module_t module = etm_reg_retention_info[group_id].module;
if (sleep_retention_get_created_modules() & BIT(module)) {
if (sleep_retention_is_module_created(module)) {
sleep_retention_module_free(module);
}
if (sleep_retention_get_inited_modules() & BIT(module)) {
if (sleep_retention_is_module_inited(module)) {
sleep_retention_module_deinit(module);
}
#endif

42
components/esp_hw_support/include/esp_private/esp_regdma.h
View File

@@ -35,7 +35,7 @@ extern "C" {
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_continuous(void *backup, void *buff, int len, void *restore, void *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_continuous(void *backup, void *buff, int len, void *restore, void *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a REGDMA addr_map type linked list node without retention buffer and the retention buffer is passed in by the caller
@@ -52,7 +52,7 @@ void *regdma_link_new_continuous(void *backup, void *buff, int len, void *restor
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_addr_map(void *backup, void *buff, uint32_t bitmap[4], int len, void *restore, void *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_addr_map(void *backup, void *buff, uint32_t bitmap[4], int len, void *restore, void *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a REGDMA write type linked list node without retention buffer and the retention buffer is passed in by the caller
@@ -66,7 +66,7 @@ void *regdma_link_new_addr_map(void *backup, void *buff, uint32_t bitmap[4], int
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_write(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_write(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a REGDMA write type linked list node without retention buffer and the retention buffer is passed in by the caller
@@ -80,7 +80,7 @@ void *regdma_link_new_write(void *backup, uint32_t value, uint32_t mask, void *n
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_wait(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_wait(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a REGDMA continuouos branch list node without retention buffer and the retention buffer is passed in by the caller
@@ -95,7 +95,7 @@ void *regdma_link_new_wait(void *backup, uint32_t value, uint32_t mask, void *ne
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_branch_continuous(void *backup, void *buff, int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_branch_continuous(void *backup, void *buff, int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a REGDMA addr_map branch list node without retention buffer and the retention buffer is passed in by the caller
@@ -112,7 +112,7 @@ void *regdma_link_new_branch_continuous(void *backup, void *buff, int len, void
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_branch_addr_map(void *backup, void *buff, uint32_t bitmap[4], int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_branch_addr_map(void *backup, void *buff, uint32_t bitmap[4], int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a REGDMA write branch list node without retention buffer and the retention buffer is passed in by the caller
@@ -126,7 +126,7 @@ void *regdma_link_new_branch_addr_map(void *backup, void *buff, uint32_t bitmap[
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_branch_write(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_branch_write(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a REGDMA wait branch list node without retention buffer and the retention buffer is passed in by the caller
@@ -140,7 +140,7 @@ void *regdma_link_new_branch_write(void *backup, uint32_t value, uint32_t mask,
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_branch_wait(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_branch_wait(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a default REGDMA continuous type linked list node with retention buffer
@@ -154,7 +154,7 @@ void *regdma_link_new_branch_wait(void *backup, uint32_t value, uint32_t mask, r
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_continuous_default(void *backup, int len, void *restore, void *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_continuous_default(void *backup, int len, void *restore, void *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a default REGDMA addr_map type linked list node with retention buffer
@@ -170,7 +170,7 @@ void *regdma_link_new_continuous_default(void *backup, int len, void *restore, v
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_addr_map_default(void *backup, uint32_t bitmap[4], int len, void *restore, void *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_addr_map_default(void *backup, uint32_t bitmap[4], int len, void *restore, void *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a default REGDMA write type linked list node with retention buffer
@@ -184,7 +184,7 @@ void *regdma_link_new_addr_map_default(void *backup, uint32_t bitmap[4], int len
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_write_default(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_write_default(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a default REGDMA wait type linked list node with retention buffer
@@ -198,7 +198,7 @@ void *regdma_link_new_write_default(void *backup, uint32_t value, uint32_t mask,
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_wait_default(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_wait_default(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a default REGDMA continuous branch list node with retention buffer
@@ -212,7 +212,7 @@ void *regdma_link_new_wait_default(void *backup, uint32_t value, uint32_t mask,
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_branch_continuous_default(void *backup, int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_branch_continuous_default(void *backup, int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a default REGDMA addr_map branch list node with retention buffer
@@ -228,7 +228,7 @@ void *regdma_link_new_branch_continuous_default(void *backup, int len, void *res
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_branch_addr_map_default(void *backup, uint32_t bitmap[4], int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_branch_addr_map_default(void *backup, uint32_t bitmap[4], int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a default REGDMA write branch list node with retention buffer
@@ -242,7 +242,7 @@ void *regdma_link_new_branch_addr_map_default(void *backup, uint32_t bitmap[4],
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_branch_write_default(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_branch_write_default(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create a default REGDMA wait branch list node with retention buffer
@@ -256,7 +256,7 @@ void *regdma_link_new_branch_write_default(void *backup, uint32_t value, uint32_
* @param module The module identifier of the current linked list node
* @return Created REGDMA linked list node pointer
*/
void *regdma_link_new_branch_wait_default(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module);
void *regdma_link_new_branch_wait_default(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module);
/**
* @brief Create and initialize a REGDMA linked list node through configuration parameters
@@ -267,7 +267,7 @@ void *regdma_link_new_branch_wait_default(void *backup, uint32_t value, uint32_t
* @param args next pointer, Since REGDMA supports 4 entries, it supports up to 4 variable parameter next pointers, and more will be ignored
* @return Initialized REGDMA linked list head node pointer
*/
void *regdma_link_init(const regdma_link_config_t *config, bool branch, uint32_t module, int nentry, ...);
void *regdma_link_init(const regdma_link_config_t *config, bool branch, int module, int nentry, ...);
/**
* @brief Get REGDMA linked list node mode through configuration parameters
@@ -361,7 +361,7 @@ uint32_t regdma_link_get_owner_bitmap(void *link, void *tail, int entry);
* @param module Module bitmap Identification
* @return The found head node pointer or NULL
*/
void *regdma_find_module_link_head(void *link, void *tail, int entry, uint32_t module);
void *regdma_find_module_link_head(void *link, void *tail, int entry, int module);
/**
* @brief Find the tail node of the specified module in the REGDMA linked list indicated by the
@@ -372,7 +372,7 @@ void *regdma_find_module_link_head(void *link, void *tail, int entry, uint32_t m
* @param module Module bitmap Identification
* @return The found tail node pointer or NULL
*/
void *regdma_find_module_link_tail(void *link, void *tail, int entry, uint32_t module);
void *regdma_find_module_link_tail(void *link, void *tail, int entry, int module);
/**
* @brief Find the tail node of the previous module of the specified module in the REGDMA linked list
@@ -383,7 +383,7 @@ void *regdma_find_module_link_tail(void *link, void *tail, int entry, uint32_t m
* @param module Module bitmap Identification
* @return The found tail node pointer or NULL
*/
void *regdma_find_prev_module_link_tail(void *link, void *tail, int entry, uint32_t module);
void *regdma_find_prev_module_link_tail(void *link, void *tail, int entry, int module);
/**
* @brief Find the head node of the next module of the specified module in the REGDMA linked list
@@ -394,7 +394,7 @@ void *regdma_find_prev_module_link_tail(void *link, void *tail, int entry, uint3
* @param module Module bitmap Identification
* @return The found head node pointer or NULL
*/
void *regdma_find_next_module_link_head(void *link, void *tail, int entry, uint32_t module);
void *regdma_find_next_module_link_head(void *link, void *tail, int entry, int module);
#define regdma_link_init_safe(pcfg, branch, module, ...) regdma_link_init((pcfg), (branch), (module), ESP_VA_NARG(__VA_ARGS__), ##__VA_ARGS__)

78
components/esp_hw_support/include/esp_private/sleep_retention.h
View File

@@ -17,6 +17,8 @@ extern "C" {
#include "esp_regdma.h"
#include "soc/retention_periph_defs.h"
#define SLEEP_RETENTION_MODULE_BITMAP_SZ ((SLEEP_RETENTION_MODULE_MAX >> 5) + 1)
/**
* @file sleep_retention.h
*
@@ -24,7 +26,10 @@ extern "C" {
* includes sleep retention list creation, destruction and debugging interfaces.
*/
typedef periph_retention_module_t sleep_retention_module_t;
typedef periph_retention_module_bitmap_t sleep_retention_module_bitmap_t;
typedef struct {
#define RETENTION_MODULE_BITMAP_INIT(module) { .bitmap[(SLEEP_RETENTION_MODULE_ ## module) >> 5] = BIT((SLEEP_RETENTION_MODULE_ ## module) % 32) }
uint32_t bitmap[SLEEP_RETENTION_MODULE_BITMAP_SZ];
} sleep_retention_module_bitmap_t;
typedef regdma_entry_buf_t sleep_retention_entries_t;
typedef regdma_entries_config_t sleep_retention_entries_config_t;
@@ -171,7 +176,7 @@ esp_err_t sleep_retention_power_lock_release(void);
*
* @return the bitmap for all modules that require sleep retention
*/
uint32_t sleep_retention_get_inited_modules(void);
sleep_retention_module_bitmap_t sleep_retention_get_inited_modules(void);
/**
* @brief Get all created modules that require sleep retention
@@ -184,7 +189,74 @@ uint32_t sleep_retention_get_inited_modules(void);
* @return the bitmap for all modules that have successfully created a sleep
* retention context
*/
uint32_t sleep_retention_get_created_modules(void);
sleep_retention_module_bitmap_t sleep_retention_get_created_modules(void);
/**
* @brief Get the initialization state of module
*
* @param module module number
*
* @return false if the module is not initialized or the module number is
* invalid, otherwise return true
*/
bool sleep_retention_is_module_inited(sleep_retention_module_t module);
/**
* @brief Get the creation state of module
*
* @param module module number
*
* @return false if the module is not created or the module number is
* invalid, otherwise return true
*/
bool sleep_retention_is_module_created(sleep_retention_module_t module);
/**
* @brief Calculates the bitwise logical and of the module bitmap and return results
*
* This is an unprotected interface. It can only be called by the sleep procedure.
*
* @param op0 module bitmap operator 0
* @param op1 module bitmap operator 1
*
* @return the bitwise logical and result of module bitmap
*/
sleep_retention_module_bitmap_t sleep_retention_module_bitmap_and(sleep_retention_module_bitmap_t op0, sleep_retention_module_bitmap_t op1);
/**
* @brief Calculates the bitwise logical or of the module bitmap and return results
*
* This is an unprotected interface. It can only be called by the sleep procedure.
*
* @param op0 module bitmap operator 0
* @param op1 module bitmap operator 1
*
* @return the bitwise logical or result of module bitmap
*/
sleep_retention_module_bitmap_t sleep_retention_module_bitmap_or(sleep_retention_module_bitmap_t op0, sleep_retention_module_bitmap_t op1);
/**
* @brief Calculates the bitwise logical not of the module bitmap and return results
*
* This is an unprotected interface. It can only be called by the sleep procedure.
*
* @param op0 module bitmap operator
*
* @return the bitwise logical not result of module bitmap
*/
sleep_retention_module_bitmap_t sleep_retention_module_bitmap_not(sleep_retention_module_bitmap_t op);
/**
* @brief Compares the module bitmap values are equal and return results
*
* This is an unprotected interface. It can only be called by the sleep procedure.
*
* @param op0 module bitmap operator 0
* @param op1 module bitmap operator 1
*
* @return If the module bitmap values are equal then return true, otherwise return false
*/
bool sleep_retention_module_bitmap_eq(sleep_retention_module_bitmap_t op0, sleep_retention_module_bitmap_t op1);
/**
* @brief Software trigger REGDMA to do extra linked list retention

40
components/esp_hw_support/lowpower/port/esp32c5/sleep_clock.c
View File

@@ -76,36 +76,46 @@ esp_err_t sleep_clock_modem_retention_init(void *arg)
bool clock_domain_pd_allowed(void)
{
const uint32_t inited_modules = sleep_retention_get_inited_modules();
const uint32_t created_modules = sleep_retention_get_created_modules();
const uint32_t sys_clk_dep_modules = (const uint32_t) (BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH));
const sleep_retention_module_bitmap_t inited_modules = sleep_retention_get_inited_modules();
const sleep_retention_module_bitmap_t created_modules = sleep_retention_get_created_modules();
const sleep_retention_module_bitmap_t sys_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap[SLEEP_RETENTION_MODULE_SYS_PERIPH >> 5] = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH % 32) };
/* The clock and reset of MODEM (WiFi, BLE and 15.4) modules are managed
* through MODEM_SYSCON, when one or more MODEMs are initialized, it is
* necessary to check the state of CLOCK_MODEM to determine MODEM domain on
* or off. The clock and reset of digital peripherals are managed through
* PCR, with TOP domain similar to MODEM domain. */
uint32_t modem_clk_dep_modules = 0;
sleep_retention_module_bitmap_t modem_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
#if SOC_WIFI_SUPPORTED
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_WIFI_MAC) | BIT(SLEEP_RETENTION_MODULE_WIFI_BB);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_WIFI_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_MAC % 32);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_WIFI_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_BB % 32);
#endif
#if SOC_BT_SUPPORTED
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BLE_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC % 32);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
#endif
#if SOC_IEEE802154_SUPPORTED
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_802154_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_802154_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_802154_MAC % 32);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
#endif
uint32_t mask = 0;
if (inited_modules & sys_clk_dep_modules) {
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
const sleep_retention_module_bitmap_t null_module = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
sleep_retention_module_bitmap_t mask = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
const sleep_retention_module_bitmap_t system_modules = sleep_retention_module_bitmap_and(inited_modules, sys_clk_dep_modules);
if (!sleep_retention_module_bitmap_eq(system_modules, null_module)) {
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32);
}
if (inited_modules & modem_clk_dep_modules) {
#if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED || SOC_IEEE802154_SUPPORTED
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM);
#endif
const sleep_retention_module_bitmap_t modem_modules = sleep_retention_module_bitmap_and(inited_modules, modem_clk_dep_modules);
if (!sleep_retention_module_bitmap_eq(modem_modules, null_module)) {
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
}
return ((inited_modules & mask) == (created_modules & mask));
#endif
const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
return sleep_retention_module_bitmap_eq(clock_domain_inited_modules, clock_domain_created_modules);
}
ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)
@@ -119,7 +129,7 @@ ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)
#if CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
init_param = (sleep_retention_module_init_param_t) {
.cbs = { .create = { .handle = sleep_clock_modem_retention_init, .arg = NULL } },
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
.depends.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32),
.attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE
};
sleep_retention_module_init(SLEEP_RETENTION_MODULE_CLOCK_MODEM, &init_param);

38
components/esp_hw_support/lowpower/port/esp32c6/sleep_clock.c
View File

@@ -47,36 +47,46 @@ esp_err_t sleep_clock_modem_retention_init(void *arg)
bool clock_domain_pd_allowed(void)
{
const uint32_t inited_modules = sleep_retention_get_inited_modules();
const uint32_t created_modules = sleep_retention_get_created_modules();
const uint32_t sys_clk_dep_modules = (const uint32_t) (BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH));
const sleep_retention_module_bitmap_t inited_modules = sleep_retention_get_inited_modules();
const sleep_retention_module_bitmap_t created_modules = sleep_retention_get_created_modules();
const sleep_retention_module_bitmap_t sys_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap[SLEEP_RETENTION_MODULE_SYS_PERIPH >> 5] = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH % 32) };
/* The clock and reset of MODEM (WiFi, BLE and 15.4) modules are managed
* through MODEM_SYSCON, when one or more MODEMs are initialized, it is
* necessary to check the state of CLOCK_MODEM to determine MODEM domain on
* or off. The clock and reset of digital peripherals are managed through
* PCR, with TOP domain similar to MODEM domain. */
uint32_t modem_clk_dep_modules = 0;
sleep_retention_module_bitmap_t modem_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
#if SOC_WIFI_SUPPORTED
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_WIFI_MAC) | BIT(SLEEP_RETENTION_MODULE_WIFI_BB);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_WIFI_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_MAC % 32);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_WIFI_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_BB % 32);
#endif
#if SOC_BT_SUPPORTED
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BLE_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC % 32);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
#endif
#if SOC_IEEE802154_SUPPORTED
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_802154_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_802154_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_802154_MAC % 32);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
#endif
uint32_t mask = 0;
if (inited_modules & sys_clk_dep_modules) {
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
const sleep_retention_module_bitmap_t null_module = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
sleep_retention_module_bitmap_t mask = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
const sleep_retention_module_bitmap_t system_modules = sleep_retention_module_bitmap_and(inited_modules, sys_clk_dep_modules);
if (!sleep_retention_module_bitmap_eq(system_modules, null_module)) {
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32);
}
if (inited_modules & modem_clk_dep_modules) {
#if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED || SOC_IEEE802154_SUPPORTED
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM);
#endif
const sleep_retention_module_bitmap_t modem_modules = sleep_retention_module_bitmap_and(inited_modules, modem_clk_dep_modules);
if (!sleep_retention_module_bitmap_eq(modem_modules, null_module)) {
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
}
return ((inited_modules & mask) == (created_modules & mask));
#endif
const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
return sleep_retention_module_bitmap_eq(clock_domain_inited_modules, clock_domain_created_modules);
}
ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)

42
components/esp_hw_support/lowpower/port/esp32c61/sleep_clock.c
View File

@@ -54,36 +54,42 @@ esp_err_t sleep_clock_modem_retention_init(void *arg)
bool clock_domain_pd_allowed(void)
{
const uint32_t inited_modules = sleep_retention_get_inited_modules();
const uint32_t created_modules = sleep_retention_get_created_modules();
const uint32_t sys_clk_dep_modules = (const uint32_t) (BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH));
const sleep_retention_module_bitmap_t inited_modules = sleep_retention_get_inited_modules();
const sleep_retention_module_bitmap_t created_modules = sleep_retention_get_created_modules();
const sleep_retention_module_bitmap_t sys_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap[SLEEP_RETENTION_MODULE_SYS_PERIPH >> 5] = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH % 32) };
/* The clock and reset of MODEM (WiFi, BLE and 15.4) modules are managed
* through MODEM_SYSCON, when one or more MODEMs are initialized, it is
* necessary to check the state of CLOCK_MODEM to determine MODEM domain on
* or off. The clock and reset of digital peripherals are managed through
* PCR, with TOP domain similar to MODEM domain. */
uint32_t modem_clk_dep_modules = 0;
sleep_retention_module_bitmap_t modem_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
#if SOC_WIFI_SUPPORTED
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_WIFI_MAC) | BIT(SLEEP_RETENTION_MODULE_WIFI_BB);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_WIFI_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_MAC % 32);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_WIFI_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_BB % 32);
#endif
#if SOC_BT_SUPPORTED
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
#endif
#if SOC_IEEE802154_SUPPORTED
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_802154_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BLE_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC % 32);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
#endif
uint32_t mask = 0;
if (inited_modules & sys_clk_dep_modules) {
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
const sleep_retention_module_bitmap_t null_module = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
sleep_retention_module_bitmap_t mask = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
const sleep_retention_module_bitmap_t system_modules = sleep_retention_module_bitmap_and(inited_modules, sys_clk_dep_modules);
if (!sleep_retention_module_bitmap_eq(system_modules, null_module)) {
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32);
}
#if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED
const sleep_retention_module_bitmap_t modem_modules = sleep_retention_module_bitmap_and(inited_modules, modem_clk_dep_modules);
if (!sleep_retention_module_bitmap_eq(modem_modules, null_module)) {
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
}
if (inited_modules & modem_clk_dep_modules) {
#if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED || SOC_IEEE802154_SUPPORTED
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM);
#endif
}
return ((inited_modules & mask) == (created_modules & mask));
const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
return sleep_retention_module_bitmap_eq(clock_domain_inited_modules, clock_domain_created_modules);
}
ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)
@@ -97,7 +103,7 @@ ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)
#if CONFIG_MAC_BB_PD || CONFIG_BT_LE_SLEEP_ENABLE || CONFIG_IEEE802154_SLEEP_ENABLE
init_param = (sleep_retention_module_init_param_t) {
.cbs = { .create = { .handle = sleep_clock_modem_retention_init, .arg = NULL } },
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
.depends.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32),
.attribute = SLEEP_RETENTION_MODULE_ATTR_PASSIVE
};
sleep_retention_module_init(SLEEP_RETENTION_MODULE_CLOCK_MODEM, &init_param);

35
components/esp_hw_support/lowpower/port/esp32h2/sleep_clock.c
View File

@@ -56,33 +56,42 @@ esp_err_t sleep_clock_modem_retention_init(void *arg)
bool clock_domain_pd_allowed(void)
{
const uint32_t inited_modules = sleep_retention_get_inited_modules();
const uint32_t created_modules = sleep_retention_get_created_modules();
const uint32_t sys_clk_dep_modules = (const uint32_t) (BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH));
const sleep_retention_module_bitmap_t inited_modules = sleep_retention_get_inited_modules();
const sleep_retention_module_bitmap_t created_modules = sleep_retention_get_created_modules();
const sleep_retention_module_bitmap_t sys_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap[SLEEP_RETENTION_MODULE_SYS_PERIPH >> 5] = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH % 32) };
/* The clock and reset of MODEM (WiFi, BLE and 15.4) modules are managed
* through MODEM_SYSCON, when one or more MODEMs are initialized, it is
* necessary to check the state of CLOCK_MODEM to determine MODEM domain on
* or off. The clock and reset of digital peripherals are managed through
* PCR, with TOP domain similar to MODEM domain. */
uint32_t modem_clk_dep_modules = 0;
sleep_retention_module_bitmap_t modem_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
#if SOC_BT_SUPPORTED
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BLE_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC % 32);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
#endif
#if SOC_IEEE802154_SUPPORTED
modem_clk_dep_modules |= BIT(SLEEP_RETENTION_MODULE_802154_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_802154_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_802154_MAC % 32);
modem_clk_dep_modules.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
#endif
uint32_t mask = 0;
if (inited_modules & sys_clk_dep_modules) {
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
const sleep_retention_module_bitmap_t null_module = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
sleep_retention_module_bitmap_t mask = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
const sleep_retention_module_bitmap_t system_modules = sleep_retention_module_bitmap_and(inited_modules, sys_clk_dep_modules);
if (!sleep_retention_module_bitmap_eq(system_modules, null_module)) {
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32);
}
if (inited_modules & modem_clk_dep_modules) {
#if SOC_BT_SUPPORTED || SOC_IEEE802154_SUPPORTED
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM);
#endif
const sleep_retention_module_bitmap_t modem_modules = sleep_retention_module_bitmap_and(inited_modules, modem_clk_dep_modules);
if (!sleep_retention_module_bitmap_eq(modem_modules, null_module)) {
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
}
return ((inited_modules & mask) == (created_modules & mask));
#endif
const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
return sleep_retention_module_bitmap_eq(clock_domain_inited_modules, clock_domain_created_modules);
}
ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)

20
components/esp_hw_support/lowpower/port/esp32p4/sleep_clock.c
View File

@@ -31,15 +31,21 @@ esp_err_t sleep_clock_system_retention_init(void *arg)
bool clock_domain_pd_allowed(void)
{
const uint32_t inited_modules = sleep_retention_get_inited_modules();
const uint32_t created_modules = sleep_retention_get_created_modules();
const uint32_t sys_clk_dep_modules = (const uint32_t) (BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH));
const sleep_retention_module_bitmap_t inited_modules = sleep_retention_get_inited_modules();
const sleep_retention_module_bitmap_t created_modules = sleep_retention_get_created_modules();
const sleep_retention_module_bitmap_t sys_clk_dep_modules = (sleep_retention_module_bitmap_t){ .bitmap[SLEEP_RETENTION_MODULE_SYS_PERIPH >> 5] = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH % 32) };
uint32_t mask = 0;
if (inited_modules & sys_clk_dep_modules) {
mask |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM);
const sleep_retention_module_bitmap_t null_module = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
sleep_retention_module_bitmap_t mask = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
const sleep_retention_module_bitmap_t system_modules = sleep_retention_module_bitmap_and(inited_modules, sys_clk_dep_modules);
if (!sleep_retention_module_bitmap_eq(system_modules, null_module)) {
mask.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32);
}
return ((inited_modules & mask) == (created_modules & mask));
const sleep_retention_module_bitmap_t clock_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
const sleep_retention_module_bitmap_t clock_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
return sleep_retention_module_bitmap_eq(clock_domain_inited_modules, clock_domain_created_modules);
}
ESP_SYSTEM_INIT_FN(sleep_clock_startup_init, SECONDARY, BIT(0), 106)

68
components/esp_hw_support/port/regdma_link.c
View File

@@ -22,7 +22,7 @@
#define REGDMA_LINK_ADDR_ALIGN (4)
#define REGDMA_LINK_MEM_TYPE_CAPS (MALLOC_CAP_DMA | MALLOC_CAP_DEFAULT)
void * regdma_link_new_continuous(void *backup, void *buff, int len, void *restore, void *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_continuous(void *backup, void *buff, int len, void *restore, void *next, bool skip_b, bool skip_r, int id, int module)
{
regdma_link_continuous_t *link = (regdma_link_continuous_t *)heap_caps_aligned_alloc(
REGDMA_LINK_ADDR_ALIGN,
@@ -38,7 +38,7 @@ void * regdma_link_new_continuous(void *backup, void *buff, int len, void *resto
return NULL;
}
void * regdma_link_new_addr_map(void *backup, void *buff, uint32_t bitmap[4], int len, void *restore, void *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_addr_map(void *backup, void *buff, uint32_t bitmap[4], int len, void *restore, void *next, bool skip_b, bool skip_r, int id, int module)
{
regdma_link_addr_map_t *link = (regdma_link_addr_map_t *)heap_caps_aligned_alloc(
REGDMA_LINK_ADDR_ALIGN,
@@ -54,7 +54,7 @@ void * regdma_link_new_addr_map(void *backup, void *buff, uint32_t bitmap[4], in
return NULL;
}
void * regdma_link_new_write(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_write(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, int module)
{
regdma_link_write_wait_t *link = (regdma_link_write_wait_t *)heap_caps_aligned_alloc(
REGDMA_LINK_ADDR_ALIGN, sizeof(regdma_link_write_wait_t), REGDMA_LINK_MEM_TYPE_CAPS);
@@ -66,7 +66,7 @@ void * regdma_link_new_write(void *backup, uint32_t value, uint32_t mask, void *
return NULL;
}
void * regdma_link_new_wait(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_wait(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, int module)
{
regdma_link_write_wait_t *link = (regdma_link_write_wait_t *)heap_caps_aligned_alloc(
REGDMA_LINK_ADDR_ALIGN, sizeof(regdma_link_write_wait_t), REGDMA_LINK_MEM_TYPE_CAPS);
@@ -78,7 +78,7 @@ void * regdma_link_new_wait(void *backup, uint32_t value, uint32_t mask, void *n
return NULL;
}
void * regdma_link_new_branch_continuous(void *backup, void *buff, int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_branch_continuous(void *backup, void *buff, int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module)
{
regdma_link_branch_continuous_t *link = (regdma_link_branch_continuous_t *)heap_caps_aligned_alloc(
REGDMA_LINK_ADDR_ALIGN,
@@ -94,7 +94,7 @@ void * regdma_link_new_branch_continuous(void *backup, void *buff, int len, void
return NULL;
}
void * regdma_link_new_branch_addr_map(void *backup, void *buff, uint32_t bitmap[4], int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_branch_addr_map(void *backup, void *buff, uint32_t bitmap[4], int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module)
{
regdma_link_branch_addr_map_t *link = (regdma_link_branch_addr_map_t *)heap_caps_aligned_alloc(
REGDMA_LINK_ADDR_ALIGN,
@@ -110,7 +110,7 @@ void * regdma_link_new_branch_addr_map(void *backup, void *buff, uint32_t bitmap
return NULL;
}
void * regdma_link_new_branch_write(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_branch_write(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module)
{
regdma_link_branch_write_wait_t *link = (regdma_link_branch_write_wait_t *)heap_caps_aligned_alloc(
REGDMA_LINK_ADDR_ALIGN, sizeof(regdma_link_branch_write_wait_t), REGDMA_LINK_MEM_TYPE_CAPS);
@@ -122,7 +122,7 @@ void * regdma_link_new_branch_write(void *backup, uint32_t value, uint32_t mask,
return NULL;
}
void * regdma_link_new_branch_wait(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_branch_wait(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module)
{
regdma_link_branch_write_wait_t *link = (regdma_link_branch_write_wait_t *)heap_caps_aligned_alloc(
REGDMA_LINK_ADDR_ALIGN, sizeof(regdma_link_branch_write_wait_t), REGDMA_LINK_MEM_TYPE_CAPS);
@@ -134,48 +134,48 @@ void * regdma_link_new_branch_wait(void *backup, uint32_t value, uint32_t mask,
return NULL;
}
void * regdma_link_new_continuous_default(void *backup, int len, void *restore, void *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_continuous_default(void *backup, int len, void *restore, void *next, bool skip_b, bool skip_r, int id, int module)
{
return regdma_link_new_continuous(backup, NULL, len, restore, next, skip_b, skip_r, id, module);
}
void * regdma_link_new_addr_map_default(void *backup, uint32_t bitmap[4], int len, void *restore, void *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_addr_map_default(void *backup, uint32_t bitmap[4], int len, void *restore, void *next, bool skip_b, bool skip_r, int id, int module)
{
return regdma_link_new_addr_map(backup, NULL, bitmap, len, restore, next, skip_b, skip_r, id, module);
}
void * regdma_link_new_write_default(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_write_default(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, int module)
{
return regdma_link_new_write(backup, value, mask, next, skip_b, skip_r, id, module);
}
void * regdma_link_new_wait_default(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_wait_default(void *backup, uint32_t value, uint32_t mask, void *next, bool skip_b, bool skip_r, int id, int module)
{
return regdma_link_new_wait(backup, value, mask, next, skip_b, skip_r, id, module);
}
void * regdma_link_new_branch_continuous_default(void *backup, int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_branch_continuous_default(void *backup, int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module)
{
return regdma_link_new_branch_continuous(backup, NULL, len, restore, next, skip_b, skip_r, id, module);
}
void * regdma_link_new_branch_addr_map_default(void *backup, uint32_t bitmap[4], int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_branch_addr_map_default(void *backup, uint32_t bitmap[4], int len, void *restore, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module)
{
return regdma_link_new_branch_addr_map(backup, NULL, bitmap, len, restore, next, skip_b, skip_r, id, module);
}
void * regdma_link_new_branch_write_default(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_branch_write_default(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module)
{
return regdma_link_new_branch_write(backup, value, mask, next, skip_b, skip_r, id, module);
}
void * regdma_link_new_branch_wait_default(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, uint32_t module)
void * regdma_link_new_branch_wait_default(void *backup, uint32_t value, uint32_t mask, regdma_entry_buf_t *next, bool skip_b, bool skip_r, int id, int module)
{
return regdma_link_new_branch_wait(backup, value, mask, next, skip_b, skip_r, id, module);
}
static void * regdma_link_init_continuous_wrapper(const regdma_link_config_t *config, uint32_t module, int n, va_list args)
static void * regdma_link_init_continuous_wrapper(const regdma_link_config_t *config, int module, int n, va_list args)
{
regdma_entry_buf_t next;
@@ -188,7 +188,7 @@ static void * regdma_link_init_continuous_wrapper(const regdma_link_config_t *co
config->head.skip_r, config->id, module);
}
static void * regdma_link_init_addr_map_wrapper(const regdma_link_config_t *config, uint32_t module, int n, va_list args)
static void * regdma_link_init_addr_map_wrapper(const regdma_link_config_t *config, int module, int n, va_list args)
{
regdma_entry_buf_t next;
@@ -201,7 +201,7 @@ static void * regdma_link_init_addr_map_wrapper(const regdma_link_config_t *conf
config->head.skip_r, config->id, module);
}
static void * regdma_link_init_write_wrapper(const regdma_link_config_t *config, uint32_t module, int n, va_list args)
static void * regdma_link_init_write_wrapper(const regdma_link_config_t *config, int module, int n, va_list args)
{
regdma_entry_buf_t next;
@@ -214,7 +214,7 @@ static void * regdma_link_init_write_wrapper(const regdma_link_config_t *config,
config->id, module);
}
static void * regdma_link_init_wait_wrapper(const regdma_link_config_t *config, uint32_t module, int n, va_list args)
static void * regdma_link_init_wait_wrapper(const regdma_link_config_t *config, int module, int n, va_list args)
{
regdma_entry_buf_t next;
@@ -227,7 +227,7 @@ static void * regdma_link_init_wait_wrapper(const regdma_link_config_t *config,
config->id, module);
}
static void * regdma_link_init_branch_continuous_wrapper(const regdma_link_config_t *config, uint32_t module, int n, va_list args)
static void * regdma_link_init_branch_continuous_wrapper(const regdma_link_config_t *config, int module, int n, va_list args)
{
regdma_entry_buf_t next;
@@ -240,7 +240,7 @@ static void * regdma_link_init_branch_continuous_wrapper(const regdma_link_confi
config->head.skip_b, config->head.skip_r, config->id, module);
}
static void * regdma_link_init_branch_addr_map_wrapper(const regdma_link_config_t *config, uint32_t module, int n, va_list args)
static void * regdma_link_init_branch_addr_map_wrapper(const regdma_link_config_t *config, int module, int n, va_list args)
{
regdma_entry_buf_t next;
@@ -253,7 +253,7 @@ static void * regdma_link_init_branch_addr_map_wrapper(const regdma_link_config_
&next, config->head.skip_b, config->head.skip_r, config->id, module);
}
static void * regdma_link_init_branch_write_wrapper(const regdma_link_config_t *config, uint32_t module, int n, va_list args)
static void * regdma_link_init_branch_write_wrapper(const regdma_link_config_t *config, int module, int n, va_list args)
{
regdma_entry_buf_t next;
@@ -266,7 +266,7 @@ static void * regdma_link_init_branch_write_wrapper(const regdma_link_config_t *
config->head.skip_r, config->id, module);
}
static void * regdma_link_init_branch_wait_wrapper(const regdma_link_config_t *config, uint32_t module, int n, va_list args)
static void * regdma_link_init_branch_wait_wrapper(const regdma_link_config_t *config, int module, int n, va_list args)
{
regdma_entry_buf_t next;
@@ -279,7 +279,7 @@ static void * regdma_link_init_branch_wait_wrapper(const regdma_link_config_t *c
config->head.skip_r, config->id, module);
}
static void * regdma_link_init_wrapper(const regdma_link_config_t *config, bool branch, uint32_t module, int nentry, va_list args)
static void * regdma_link_init_wrapper(const regdma_link_config_t *config, bool branch, int module, int nentry, va_list args)
{
typedef void * (*init_fn_t)(const void *, uint32_t, int, va_list);
@@ -302,7 +302,7 @@ static void * regdma_link_init_wrapper(const regdma_link_config_t *config, bool
return (*pfn)(config, module, nentry, args);
}
void * regdma_link_init(const regdma_link_config_t *config, bool branch, uint32_t module, int nentry, ...)
void * regdma_link_init(const regdma_link_config_t *config, bool branch, int module, int nentry, ...)
{
assert(config != NULL);
@@ -643,7 +643,7 @@ uint32_t regdma_link_get_owner_bitmap(void *link, void *tail, int entry)
return owner;
}
void * regdma_find_module_link_head(void *link, void *tail, int entry, uint32_t module)
void * regdma_find_module_link_head(void *link, void *tail, int entry, int module)
{
assert(entry < REGDMA_LINK_ENTRY_NUM);
@@ -651,7 +651,7 @@ void * regdma_find_module_link_head(void *link, void *tail, int entry, uint32_t
void *next = link;
if (link) {
do {
if (regdma_link_get_stats(next)->module & module) {
if (regdma_link_get_stats(next)->module == module) {
find_link = next;
break;
}
@@ -663,7 +663,7 @@ void * regdma_find_module_link_head(void *link, void *tail, int entry, uint32_t
return find_link;
}
void * regdma_find_module_link_tail(void *link, void *tail, int entry, uint32_t module)
void * regdma_find_module_link_tail(void *link, void *tail, int entry, int module)
{
assert(entry < REGDMA_LINK_ENTRY_NUM);
@@ -673,13 +673,13 @@ void * regdma_find_module_link_tail(void *link, void *tail, int entry, uint32_t
do {
if (next != tail) {
void *temp = regdma_link_get_next(next, entry);
if ((regdma_link_get_stats(next)->module & module) &&
!(regdma_link_get_stats(temp)->module & module)) {
if ((regdma_link_get_stats(next)->module == module) &&
!(regdma_link_get_stats(temp)->module == module)) {
find_tail = next;
break;
}
} else {
if (regdma_link_get_stats(next)->module & module) {
if (regdma_link_get_stats(next)->module == module) {
find_tail = next;
break;
}
@@ -689,7 +689,7 @@ void * regdma_find_module_link_tail(void *link, void *tail, int entry, uint32_t
return find_tail;
}
void * regdma_find_next_module_link_head(void *link, void *tail, int entry, uint32_t module)
void * regdma_find_next_module_link_head(void *link, void *tail, int entry, int module)
{
assert(entry < REGDMA_LINK_ENTRY_NUM);
void *find_tail = regdma_find_module_link_tail(link, tail, entry, module);
@@ -699,7 +699,7 @@ void * regdma_find_next_module_link_head(void *link, void *tail, int entry, uint
return NULL;
}
void * regdma_find_prev_module_link_tail(void *link, void *tail, int entry, uint32_t module)
void * regdma_find_prev_module_link_tail(void *link, void *tail, int entry, int module)
{
assert(entry < REGDMA_LINK_ENTRY_NUM);
void *find_head = regdma_find_module_link_head(link, tail, entry, module);

19
components/esp_hw_support/sleep_modem.c
View File

@@ -196,21 +196,26 @@ inline __attribute__((always_inline)) bool sleep_modem_wifi_modem_link_done(void
bool modem_domain_pd_allowed(void)
{
#if SOC_PM_MODEM_RETENTION_BY_REGDMA
const uint32_t inited_modules = sleep_retention_get_inited_modules();
const uint32_t created_modules = sleep_retention_get_created_modules();
const sleep_retention_module_bitmap_t inited_modules = sleep_retention_get_inited_modules();
const sleep_retention_module_bitmap_t created_modules = sleep_retention_get_created_modules();
uint32_t mask = 0;
sleep_retention_module_bitmap_t mask = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
#if SOC_WIFI_SUPPORTED
mask |= BIT(SLEEP_RETENTION_MODULE_WIFI_MAC) | BIT(SLEEP_RETENTION_MODULE_WIFI_BB);
mask.bitmap[SLEEP_RETENTION_MODULE_WIFI_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_MAC % 32);
mask.bitmap[SLEEP_RETENTION_MODULE_WIFI_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_BB % 32);
#endif
#if SOC_BT_SUPPORTED
mask |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
mask.bitmap[SLEEP_RETENTION_MODULE_BLE_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_BLE_MAC % 32);
mask.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
#endif
#if SOC_IEEE802154_SUPPORTED
mask |= BIT(SLEEP_RETENTION_MODULE_802154_MAC) | BIT(SLEEP_RETENTION_MODULE_BT_BB);
mask.bitmap[SLEEP_RETENTION_MODULE_802154_MAC >> 5] |= BIT(SLEEP_RETENTION_MODULE_802154_MAC % 32);
mask.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
#endif
return ((inited_modules & mask) == (created_modules & mask));
const sleep_retention_module_bitmap_t modem_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
const sleep_retention_module_bitmap_t modem_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
return sleep_retention_module_bitmap_eq(modem_domain_inited_modules, modem_domain_created_modules);
#else
return false; /* MODEM power domain is controlled by each module (WiFi, Bluetooth or 15.4) of modem */
#endif

198
components/esp_hw_support/sleep_retention.c
View File

@@ -43,8 +43,8 @@ struct sleep_retention_module_object {
static inline void sleep_retention_module_object_ctor(struct sleep_retention_module_object * const self, sleep_retention_module_callbacks_t *cbs)
{
self->cbs = *cbs;
self->dependents = 0;
self->references = 0;
self->dependents = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
self->references = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
self->attributes = 0;
}
@@ -60,7 +60,7 @@ static inline void set_dependencies(struct sleep_retention_module_object * const
static inline void clr_dependencies(struct sleep_retention_module_object * const self)
{
self->dependents = 0;
self->dependents = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } };
}
static inline sleep_retention_module_bitmap_t get_dependencies(struct sleep_retention_module_object * const self)
@@ -70,12 +70,12 @@ static inline sleep_retention_module_bitmap_t get_dependencies(struct sleep_rete
static inline void set_reference(struct sleep_retention_module_object * const self, sleep_retention_module_t module)
{
self->references |= BIT(module);
self->references.bitmap[module >> 5] |= BIT(module % 32);
}
static inline void clr_reference(struct sleep_retention_module_object * const self, sleep_retention_module_t module)
{
self->references &= ~BIT(module);
self->references.bitmap[module >> 5] &= ~BIT(module % 32);
}
static inline sleep_retention_module_bitmap_t get_references(struct sleep_retention_module_object * const self)
@@ -85,7 +85,12 @@ static inline sleep_retention_module_bitmap_t get_references(struct sleep_retent
static inline bool references_exist(struct sleep_retention_module_object * const self)
{
return (get_references(self) != 0);
uint32_t references = 0;
sleep_retention_module_bitmap_t map = get_references(self);
for (int i = 0; i < SLEEP_RETENTION_MODULE_BITMAP_SZ; i++) {
references |= map.bitmap[i];
}
return (references != 0);
}
static inline void set_attributes(struct sleep_retention_module_object * const self, sleep_retention_module_attribute_t attributes)
@@ -110,12 +115,14 @@ static inline bool module_is_passive(struct sleep_retention_module_object * cons
static inline bool module_is_inited(sleep_retention_module_t module)
{
return (sleep_retention_get_inited_modules() & BIT(module)) ? true : false;
sleep_retention_module_bitmap_t inited_modules = sleep_retention_get_inited_modules();
return (inited_modules.bitmap[module >> 5] & BIT(module % 32)) ? true : false;
}
static inline bool module_is_created(sleep_retention_module_t module)
{
return (sleep_retention_get_created_modules() & BIT(module)) ? true : false;
sleep_retention_module_bitmap_t created_modules = sleep_retention_get_created_modules();
return (created_modules.bitmap[module >> 5] & BIT(module % 32)) ? true : false;
}
/**
@@ -189,16 +196,18 @@ typedef struct {
} lists[SLEEP_RETENTION_REGDMA_LINK_NR_PRIORITIES];
_lock_t lock;
regdma_link_priority_t highpri;
uint32_t inited_modules;
uint32_t created_modules;
sleep_retention_module_bitmap_t inited_modules;
sleep_retention_module_bitmap_t created_modules;
struct sleep_retention_module_object instance[32];
struct sleep_retention_module_object instance[SLEEP_RETENTION_MODULE_MAX + 1];
#define EXTRA_LINK_NUM (REGDMA_LINK_ENTRY_NUM - 1)
} sleep_retention_t;
static DRAM_ATTR __attribute__((unused)) sleep_retention_t s_retention = {
.highpri = (uint8_t)-1, .inited_modules = 0, .created_modules = 0
.highpri = (uint8_t)-1,
.inited_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } },
.created_modules = (sleep_retention_module_bitmap_t){ .bitmap = { 0 } }
};
#define SLEEP_RETENTION_ENTRY_BITMAP_MASK (BIT(REGDMA_LINK_ENTRY_NUM) - 1)
@@ -207,11 +216,6 @@ static DRAM_ATTR __attribute__((unused)) sleep_retention_t s_retention = {
static esp_err_t sleep_retention_entries_create_impl(const sleep_retention_entries_config_t retent[], int num, regdma_link_priority_t priority, sleep_retention_module_t module);
static void sleep_retention_entries_join(void);
static inline sleep_retention_module_bitmap_t module_num2map(sleep_retention_module_t module)
{
return (module == SLEEP_RETENTION_MODULE_INVALID) ? 0 : BIT(module);
}
static inline bool sleep_retention_entries_require_branch(uint32_t owner, uint32_t runtime_bitmap)
{
bool use_new_entry = SLEEP_RETENTION_ENTRY_BITMAP(owner & ~runtime_bitmap) ? true : false;
@@ -273,9 +277,8 @@ static void * sleep_retention_entries_try_create(const regdma_link_config_t *con
_lock_acquire_recursive(&s_retention.lock);
if (sleep_retention_entries_require_branch(owner, s_retention.lists[priority].runtime_bitmap)) {
if (sleep_retention_entries_check_and_create_default(owner, s_retention.lists[priority].runtime_bitmap,
s_retention.lists[priority].entries_bitmap, priority, module_num2map(module)) == ESP_OK) { /* branch node can't as tail node */
link = regdma_link_init_safe(
config, true, module_num2map(module),
s_retention.lists[priority].entries_bitmap, priority, module) == ESP_OK) { /* branch node can't as tail node */
link = regdma_link_init_safe(config, true, module,
(owner & BIT(0)) ? s_retention.lists[priority].entries[0] : NULL,
(owner & BIT(1)) ? s_retention.lists[priority].entries[1] : NULL,
(owner & BIT(2)) ? s_retention.lists[priority].entries[2] : NULL,
@@ -286,7 +289,7 @@ static void * sleep_retention_entries_try_create(const regdma_link_config_t *con
);
}
} else {
link = regdma_link_init_safe(config, false, module_num2map(module), s_retention.lists[priority].entries[__builtin_ffs(owner) - 1]);
link = regdma_link_init_safe(config, false, module, s_retention.lists[priority].entries[__builtin_ffs(owner) - 1]);
}
_lock_release_recursive(&s_retention.lock);
return link;
@@ -296,8 +299,7 @@ static void * sleep_retention_entries_try_create_bonding(const regdma_link_confi
{
assert(owner > 0 && owner < BIT(REGDMA_LINK_ENTRY_NUM));
_lock_acquire_recursive(&s_retention.lock);
void *link = regdma_link_init_safe(
config, true, module_num2map(module),
void *link = regdma_link_init_safe(config, true, module,
(owner & BIT(0)) ? s_retention.lists[priority].entries[0] : NULL,
(owner & BIT(1)) ? s_retention.lists[priority].entries[1] : NULL,
(owner & BIT(2)) ? s_retention.lists[priority].entries[2] : NULL,
@@ -323,12 +325,10 @@ static void sleep_retention_entries_stats(void)
void sleep_retention_dump_modules(FILE *out)
{
uint32_t inited_modules = sleep_retention_get_inited_modules();
uint32_t created_modules = sleep_retention_get_created_modules();
for (int i = SLEEP_RETENTION_MODULE_MIN; i <= SLEEP_RETENTION_MODULE_MAX; i++) {
bool inited = (inited_modules & BIT(i)) != 0;
bool created = (created_modules & BIT(i)) != 0;
bool is_top = (TOP_DOMAIN_PERIPHERALS_BM & BIT(i)) != 0;
bool inited = sleep_retention_is_module_inited(i);
bool created = sleep_retention_is_module_created(i);
bool is_top = is_top_domain_module(i);
const char* status = !inited? "-":
created? "CREATED":
@@ -387,13 +387,13 @@ static bool sleep_retention_entries_get_destroy_context(regdma_link_priority_t p
_lock_acquire_recursive(&s_retention.lock);
for (int entry = 0; entry < ARRAY_SIZE(s_retention.lists[priority].entries); entry++) {
(*destroy_entries)[entry] = regdma_find_module_link_head(
s_retention.lists[priority].entries[entry], s_retention.lists[priority].entries_tail, entry, module_num2map(module));
s_retention.lists[priority].entries[entry], s_retention.lists[priority].entries_tail, entry, module);
destroy_tails [entry] = regdma_find_module_link_tail(
s_retention.lists[priority].entries[entry], s_retention.lists[priority].entries_tail, entry, module_num2map(module));
s_retention.lists[priority].entries[entry], s_retention.lists[priority].entries_tail, entry, module);
(*next_entries) [entry] = regdma_find_next_module_link_head(
s_retention.lists[priority].entries[entry], s_retention.lists[priority].entries_tail, entry, module_num2map(module));
s_retention.lists[priority].entries[entry], s_retention.lists[priority].entries_tail, entry, module);
prev_tails [entry] = regdma_find_prev_module_link_tail(
s_retention.lists[priority].entries[entry], s_retention.lists[priority].entries_tail, entry, module_num2map(module));
s_retention.lists[priority].entries[entry], s_retention.lists[priority].entries_tail, entry, module);
if ((*destroy_entries)[entry] && destroy_tails[entry]) {
exist = true;
}
@@ -459,7 +459,11 @@ static void sleep_retention_entries_check_and_distroy_final_default(void)
{
_lock_acquire_recursive(&s_retention.lock);
assert(s_retention.highpri == SLEEP_RETENTION_REGDMA_LINK_LOWEST_PRIORITY);
assert(s_retention.created_modules == 0);
uint32_t created_modules = 0;
for (int i = 0; i < SLEEP_RETENTION_MODULE_BITMAP_SZ; i++) {
created_modules |= s_retention.created_modules.bitmap[i];
}
assert(created_modules == 0);
sleep_retention_entries_destroy_wrapper(&s_retention.lists[SLEEP_RETENTION_REGDMA_LINK_LOWEST_PRIORITY].entries);
_lock_release_recursive(&s_retention.lock);
}
@@ -485,7 +489,7 @@ static void sleep_retention_entries_all_destroy_wrapper(sleep_retention_module_t
priority++;
}
} while (priority < SLEEP_RETENTION_REGDMA_LINK_NR_PRIORITIES);
s_retention.created_modules &= ~module_num2map(module);
s_retention.created_modules.bitmap[module >> 5] &= ~BIT(module % 32);
_lock_release_recursive(&s_retention.lock);
}
@@ -504,7 +508,11 @@ static void sleep_retention_entries_destroy(sleep_retention_module_t module)
assert(SLEEP_RETENTION_MODULE_MIN <= module && module <= SLEEP_RETENTION_MODULE_MAX);
_lock_acquire_recursive(&s_retention.lock);
sleep_retention_entries_do_destroy(module);
if (s_retention.created_modules == 0) {
uint32_t created_modules = 0;
for (int i = 0; i < SLEEP_RETENTION_MODULE_BITMAP_SZ; i++) {
created_modules |= s_retention.created_modules.bitmap[i];
}
if (created_modules == 0) {
sleep_retention_entries_check_and_distroy_final_default();
pmu_sleep_disable_regdma_backup();
memset((void *)s_retention.lists, 0, sizeof(s_retention.lists));
@@ -610,7 +618,7 @@ static esp_err_t sleep_retention_entries_create_wrapper(const sleep_retention_en
if(err) goto error;
err = sleep_retention_entries_create_bonding(priority, module);
if(err) goto error;
s_retention.created_modules |= module_num2map(module);
s_retention.created_modules.bitmap[module >> 5] |= BIT(module % 32);
sleep_retention_entries_join();
error:
@@ -651,16 +659,72 @@ void sleep_retention_entries_get(sleep_retention_entries_t *entries)
_lock_release_recursive(&s_retention.lock);
}
uint32_t IRAM_ATTR sleep_retention_get_inited_modules(void)
sleep_retention_module_bitmap_t IRAM_ATTR sleep_retention_get_inited_modules(void)
{
return s_retention.inited_modules;
}
uint32_t IRAM_ATTR sleep_retention_get_created_modules(void)
sleep_retention_module_bitmap_t IRAM_ATTR sleep_retention_get_created_modules(void)
{
return s_retention.created_modules;
}
bool sleep_retention_is_module_inited(sleep_retention_module_t module)
{
if (module < SLEEP_RETENTION_MODULE_MIN || module > SLEEP_RETENTION_MODULE_MAX) {
return false;
}
_lock_acquire_recursive(&s_retention.lock);
bool inited = module_is_inited(module);
_lock_release_recursive(&s_retention.lock);
return inited;
}
bool sleep_retention_is_module_created(sleep_retention_module_t module)
{
if (module < SLEEP_RETENTION_MODULE_MIN || module > SLEEP_RETENTION_MODULE_MAX) {
return false;
}
_lock_acquire_recursive(&s_retention.lock);
bool created = module_is_created(module);
_lock_release_recursive(&s_retention.lock);
return created;
}
sleep_retention_module_bitmap_t IRAM_ATTR sleep_retention_module_bitmap_and(sleep_retention_module_bitmap_t op0, sleep_retention_module_bitmap_t op1)
{
sleep_retention_module_bitmap_t and;
for (int i = 0; i < ARRAY_SIZE(and.bitmap); i++) {
and.bitmap[i] = op0.bitmap[i] & op1.bitmap[i];
}
return and;
}
sleep_retention_module_bitmap_t IRAM_ATTR sleep_retention_module_bitmap_or(sleep_retention_module_bitmap_t op0, sleep_retention_module_bitmap_t op1)
{
sleep_retention_module_bitmap_t or;
for (int i = 0; i < ARRAY_SIZE(or.bitmap); i++) {
or.bitmap[i] = op0.bitmap[i] | op1.bitmap[i];
}
return or;
}
sleep_retention_module_bitmap_t IRAM_ATTR sleep_retention_module_bitmap_not(sleep_retention_module_bitmap_t op)
{
sleep_retention_module_bitmap_t not;
for (int i = 0; i < ARRAY_SIZE(not.bitmap); i++) {
not.bitmap[i] = ~op.bitmap[i];
}
return not;
}
bool IRAM_ATTR sleep_retention_module_bitmap_eq(sleep_retention_module_bitmap_t op0, sleep_retention_module_bitmap_t op1)
{
for (int i = 0; i < ARRAY_SIZE(op0.bitmap); i++) {
if (op0.bitmap[i] != op1.bitmap[i]) {
return false;
}
}
return true;
}
esp_err_t sleep_retention_module_init(sleep_retention_module_t module, sleep_retention_module_init_param_t *param)
{
if (module < SLEEP_RETENTION_MODULE_MIN || module > SLEEP_RETENTION_MODULE_MAX) {
@@ -688,7 +752,7 @@ esp_err_t sleep_retention_module_init(sleep_retention_module_t module, sleep_ret
sleep_retention_module_object_ctor(&s_retention.instance[module], &param->cbs);
set_dependencies(&s_retention.instance[module], param->depends);
set_attributes(&s_retention.instance[module], param->attribute);
s_retention.inited_modules |= module_num2map(module);
s_retention.inited_modules.bitmap[module >> 5] |= BIT(module % 32);
}
_lock_release_recursive(&s_retention.lock);
return err;
@@ -709,8 +773,12 @@ esp_err_t sleep_retention_module_deinit(sleep_retention_module_t module)
clr_attributes(&s_retention.instance[module]);
clr_dependencies(&s_retention.instance[module]);
sleep_retention_module_object_dtor(&s_retention.instance[module]);
s_retention.inited_modules &= ~module_num2map(module);
do_lock_release = (sleep_retention_get_inited_modules() == 0);
s_retention.inited_modules.bitmap[module >> 5] &= ~BIT(module % 32);
uint32_t inited_modules = 0;
for (int i = 0; i < SLEEP_RETENTION_MODULE_BITMAP_SZ; i++) {
inited_modules |= s_retention.inited_modules.bitmap[i];
}
do_lock_release = (inited_modules == 0);
}
_lock_release_recursive(&s_retention.lock);
@@ -731,10 +799,13 @@ static esp_err_t sleep_retention_passive_module_allocate(sleep_retention_module_
assert(module_is_inited(module) && "All passive module must be inited first!");
if (!module_is_created(module)) {
sleep_retention_module_bitmap_t depends = get_dependencies(&s_retention.instance[module]);
for (int i = 0; (err == ESP_OK) && depends; depends >>= 1, i++) {
if (depends & BIT(0)) {
set_reference(&s_retention.instance[i], module);
err = sleep_retention_passive_module_allocate(i);
for (int i = 0; ((err == ESP_OK) && (i < SLEEP_RETENTION_MODULE_BITMAP_SZ)); i++) {
uint32_t bitmap = depends.bitmap[i];
for (int j = 0; (err == ESP_OK) && bitmap; bitmap >>= 1, j++) {
if (bitmap & BIT(0)) {
set_reference(&s_retention.instance[(i << 5) + j], module);
err = sleep_retention_passive_module_allocate((i << 5) + j);
}
}
}
if (err == ESP_OK) {
@@ -759,11 +830,14 @@ esp_err_t sleep_retention_module_allocate(sleep_retention_module_t module)
if (!module_is_passive(&s_retention.instance[module])) {
if (module_is_inited(module) && !module_is_created(module)) {
sleep_retention_module_bitmap_t depends = get_dependencies(&s_retention.instance[module]);
for (int i = 0; (err == ESP_OK) && depends; depends >>= 1, i++) {
if (depends & BIT(0)) {
set_reference(&s_retention.instance[i], module);
if (module_is_passive(&s_retention.instance[i])) { /* the callee ensures this module is inited */
err = sleep_retention_passive_module_allocate(i);
for (int i = 0; ((err == ESP_OK) && (i < SLEEP_RETENTION_MODULE_BITMAP_SZ)); i++) {
uint32_t bitmap = depends.bitmap[i];
for (int j = 0; (err == ESP_OK) && bitmap; bitmap >>= 1, j++) {
if (bitmap & BIT(0)) {
set_reference(&s_retention.instance[(i << 5) + j], module);
if (module_is_passive(&s_retention.instance[(i << 5) + j])) { /* the callee ensures this module is inited */
err = sleep_retention_passive_module_allocate((i << 5) + j);
}
}
}
}
@@ -796,10 +870,13 @@ static esp_err_t sleep_retention_passive_module_free(sleep_retention_module_t mo
sleep_retention_entries_destroy(module);
sleep_retention_module_bitmap_t depends = get_dependencies(&s_retention.instance[module]);
for (int i = 0; (err == ESP_OK) && depends; depends >>= 1, i++) {
if (depends & BIT(0)) {
clr_reference(&s_retention.instance[i], module);
err = sleep_retention_passive_module_free(i);
for (int i = 0; ((err == ESP_OK) && (i < SLEEP_RETENTION_MODULE_BITMAP_SZ)); i++) {
uint32_t bitmap = depends.bitmap[i];
for (int j = 0; (err == ESP_OK) && bitmap; bitmap >>= 1, j++) {
if (bitmap & BIT(0)) {
clr_reference(&s_retention.instance[(i << 5) + j], module);
err = sleep_retention_passive_module_free((i << 5) + j);
}
}
}
}
@@ -821,11 +898,14 @@ esp_err_t sleep_retention_module_free(sleep_retention_module_t module)
sleep_retention_entries_destroy(module);
sleep_retention_module_bitmap_t depends = get_dependencies(&s_retention.instance[module]);
for (int i = 0; (err == ESP_OK) && depends; depends >>= 1, i++) {
if (depends & BIT(0)) {
clr_reference(&s_retention.instance[i], module);
if (module_is_passive(&s_retention.instance[i])) {
err = sleep_retention_passive_module_free(i);
for (int i = 0; ((err == ESP_OK) && (i < SLEEP_RETENTION_MODULE_BITMAP_SZ)); i++) {
uint32_t bitmap = depends.bitmap[i];
for (int j = 0; (err == ESP_OK) && bitmap; bitmap >>= 1, j++) {
if (bitmap & BIT(0)) {
clr_reference(&s_retention.instance[(i << 5) + j], module);
if (module_is_passive(&s_retention.instance[(i << 5) + j])) {
err = sleep_retention_passive_module_free((i << 5) + j);
}
}
}
}

122
components/esp_hw_support/sleep_system_peripheral.c
View File

@@ -161,9 +161,123 @@ error:
bool peripheral_domain_pd_allowed(void)
{
#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
const uint32_t inited_modules = sleep_retention_get_inited_modules();
const uint32_t created_modules = sleep_retention_get_created_modules();
return (((inited_modules ^ created_modules) & TOP_DOMAIN_PERIPHERALS_BM) == 0);
const sleep_retention_module_bitmap_t inited_modules = sleep_retention_get_inited_modules();
const sleep_retention_module_bitmap_t created_modules = sleep_retention_get_created_modules();
sleep_retention_module_bitmap_t mask = RETENTION_MODULE_BITMAP_INIT(NULL);
mask.bitmap[SLEEP_RETENTION_MODULE_SYS_PERIPH >> 5] |= BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH % 32);
#if SOC_MWDT_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_TG0_WDT >> 5] |= BIT(SLEEP_RETENTION_MODULE_TG0_WDT % 32);
mask.bitmap[SLEEP_RETENTION_MODULE_TG1_WDT >> 5] |= BIT(SLEEP_RETENTION_MODULE_TG1_WDT % 32);
#endif
#if SOC_TIMER_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_TG0_TIMER >> 5] |= BIT(SLEEP_RETENTION_MODULE_TG0_TIMER % 32);
mask.bitmap[SLEEP_RETENTION_MODULE_TG1_TIMER >> 5] |= BIT(SLEEP_RETENTION_MODULE_TG1_TIMER % 32);
#endif
#if SOC_ADC_SUPPORTED && !CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-11369
mask.bitmap[SLEEP_RETENTION_MODULE_ADC >> 5] |= BIT(SLEEP_RETENTION_MODULE_ADC % 32);
#endif
#if SOC_UART_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_UART0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_UART0 % 32);
mask.bitmap[SLEEP_RETENTION_MODULE_UART1 >> 5] |= BIT(SLEEP_RETENTION_MODULE_UART1 % 32);
# if (SOC_UART_HP_NUM > 2) && !CONFIG_IDF_TARGET_ESP32C61 // TODO: IDF-11370
mask.bitmap[SLEEP_RETENTION_MODULE_UART2 >> 5] |= BIT(SLEEP_RETENTION_MODULE_UART2 % 32);
# endif
# if (SOC_UART_HP_NUM > 3)
mask.bitmap[SLEEP_RETENTION_MODULE_UART3 >> 5] |= BIT(SLEEP_RETENTION_MODULE_UART3 % 32);
# endif
# if (SOC_UART_HP_NUM > 4)
mask.bitmap[SLEEP_RETENTION_MODULE_UART4 >> 5] |= BIT(SLEEP_RETENTION_MODULE_UART4 % 32);
# endif
#endif /* SOC_UART_SUPPORT_SLEEP_RETENTION */
#if SOC_RMT_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_RMT0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_RMT0 % 32);
#endif
#if SOC_GDMA_SUPPORT_SLEEP_RETENTION
# if SOC_GDMA_SUPPORTED && !CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-11371
mask.bitmap[SLEEP_RETENTION_MODULE_GDMA_CH0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_GDMA_CH0 % 32);
mask.bitmap[SLEEP_RETENTION_MODULE_GDMA_CH1 >> 5] |= BIT(SLEEP_RETENTION_MODULE_GDMA_CH1 % 32);
# if (SOC_GDMA_PAIRS_PER_GROUP_MAX > 2)
mask.bitmap[SLEEP_RETENTION_MODULE_GDMA_CH2 >> 5] |= BIT(SLEEP_RETENTION_MODULE_GDMA_CH2 % 32);
# endif
# endif /* SOC_GDMA_SUPPORTED */
# if SOC_AHB_GDMA_SUPPORTED && CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-11372
mask.bitmap[SLEEP_RETENTION_MODULE_AHB_DMA_CH0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_AHB_DMA_CH0 % 32);
mask.bitmap[SLEEP_RETENTION_MODULE_AHB_DMA_CH1 >> 5] |= BIT(SLEEP_RETENTION_MODULE_AHB_DMA_CH1 % 32);
mask.bitmap[SLEEP_RETENTION_MODULE_AHB_DMA_CH2 >> 5] |= BIT(SLEEP_RETENTION_MODULE_AHB_DMA_CH2 % 32);
# endif /* SOC_AHB_GDMA_SUPPORTED */
# if SOC_AXI_GDMA_SUPPORTED
mask.bitmap[SLEEP_RETENTION_MODULE_AXI_DMA_CH0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_AXI_DMA_CH0 % 32);
mask.bitmap[SLEEP_RETENTION_MODULE_AXI_DMA_CH1 >> 5] |= BIT(SLEEP_RETENTION_MODULE_AXI_DMA_CH1 % 32);
mask.bitmap[SLEEP_RETENTION_MODULE_AXI_DMA_CH2 >> 5] |= BIT(SLEEP_RETENTION_MODULE_AXI_DMA_CH2 % 32);
# endif /* SOC_AXI_GDMA_SUPPORTED */
#endif /* SOC_GDMA_SUPPORT_SLEEP_RETENTION */
#if SOC_I2S_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_I2S0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_I2S0 % 32);
# if (SOC_I2S_NUM > 1)
mask.bitmap[SLEEP_RETENTION_MODULE_I2S1 >> 5] |= BIT(SLEEP_RETENTION_MODULE_I2S1 % 32);
# endif
# if (SOC_I2S_NUM > 2)
mask.bitmap[SLEEP_RETENTION_MODULE_I2S2 >> 5] |= BIT(SLEEP_RETENTION_MODULE_I2S2 % 32);
# endif
#endif /* SOC_I2S_SUPPORT_SLEEP_RETENTION */
#if SOC_I2C_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_I2C0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_I2C0 % 32);
# if (SOC_HP_I2C_NUM > 1)
mask.bitmap[SLEEP_RETENTION_MODULE_I2C1 >> 5] |= BIT(SLEEP_RETENTION_MODULE_I2C1 % 32);
# endif
#endif /* SOC_I2C_SUPPORT_SLEEP_RETENTION */
#if SOC_ETM_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_ETM0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_ETM0 % 32);
#endif
#if SOC_TEMP_SENSOR_SUPPORTED && !CONFIG_IDF_TARGET_ESP32P4
mask.bitmap[SLEEP_RETENTION_MODULE_TEMP_SENSOR >> 5] |= BIT(SLEEP_RETENTION_MODULE_TEMP_SENSOR % 32);
#endif
#if SOC_TWAI_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_TWAI0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_TWAI0 % 32);
# if (SOC_TWAI_CONTROLLER_NUM > 1)
mask.bitmap[SLEEP_RETENTION_MODULE_TWAI1 >> 5] |= BIT(SLEEP_RETENTION_MODULE_TWAI1 % 32);
# endif
# if (SOC_TWAI_CONTROLLER_NUM > 2)
mask.bitmap[SLEEP_RETENTION_MODULE_TWAI2 >> 5] |= BIT(SLEEP_RETENTION_MODULE_TWAI2 % 32);
# endif
#endif /* SOC_TWAI_SUPPORT_SLEEP_RETENTION */
#if SOC_PARLIO_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_PARLIO0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_PARLIO0 % 32);
#endif
#if SOC_GPSPI_SUPPORTED
mask.bitmap[SLEEP_RETENTION_MODULE_GPSPI2 >> 5] |= BIT(SLEEP_RETENTION_MODULE_GPSPI2 % 32);
# if CONFIG_IDF_TARGET_ESP32P4
mask.bitmap[SLEEP_RETENTION_MODULE_GPSPI3 >> 5] |= BIT(SLEEP_RETENTION_MODULE_GPSPI3 % 32);
# endif
#endif
#if SOC_LEDC_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_LEDC >> 5] |= BIT(SLEEP_RETENTION_MODULE_LEDC % 32);
#endif
#if SOC_PCNT_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_PCNT0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_PCNT0 % 32);
#endif
#if SOC_MCPWM_SUPPORT_SLEEP_RETENTION
mask.bitmap[SLEEP_RETENTION_MODULE_MCPWM0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_MCPWM0 % 32);
#endif
const sleep_retention_module_bitmap_t peripheral_domain_inited_modules = sleep_retention_module_bitmap_and(inited_modules, mask);
const sleep_retention_module_bitmap_t peripheral_domain_created_modules = sleep_retention_module_bitmap_and(created_modules, mask);
return sleep_retention_module_bitmap_eq(peripheral_domain_inited_modules, peripheral_domain_created_modules);
#else
return false;
#endif
@@ -174,7 +288,7 @@ ESP_SYSTEM_INIT_FN(sleep_sys_periph_startup_init, SECONDARY, BIT(0), 107)
{
sleep_retention_module_init_param_t init_param = {
.cbs = { .create = { .handle = sleep_sys_periph_retention_init, .arg = NULL } },
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM)
.depends.bitmap[SLEEP_RETENTION_MODULE_CLOCK_SYSTEM >> 5] = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM % 32)
};
esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_SYS_PERIPH, &init_param);
if (err == ESP_OK) {

2
components/esp_phy/src/btbb_init.c
View File

@@ -63,7 +63,7 @@ void esp_btbb_enable(void)
#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE
sleep_retention_module_init_param_t init_param = {
.cbs = { .create = { .handle = btbb_sleep_retention_init, .arg = NULL } },
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM)
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_MODEM)
};
esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_BT_BB, &init_param);
if (err == ESP_OK) {

2
components/esp_phy/src/phy_init.c
View File

@@ -516,7 +516,7 @@ void esp_mac_bb_pd_mem_init(void)
#elif SOC_PM_MODEM_RETENTION_BY_REGDMA
sleep_retention_module_init_param_t init_param = {
.cbs = { .create = { .handle = sleep_retention_wifi_bb_init, .arg = NULL } },
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM)
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_MODEM)
};
esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_WIFI_BB, &init_param);
if (err != ESP_OK) {

2
components/esp_system/int_wdt.c
View File

@@ -72,7 +72,7 @@ static esp_err_t esp_int_wdt_retention_enable(uint32_t group_id)
{
sleep_retention_module_init_param_t init_param = {
.cbs = { .create = { .handle = sleep_int_wdt_retention_init, .arg = &group_id } },
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM)
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
esp_err_t err = sleep_retention_module_init((group_id == 0) ? SLEEP_RETENTION_MODULE_TG0_WDT : SLEEP_RETENTION_MODULE_TG1_WDT, &init_param);
if (err == ESP_OK) {

2
components/esp_system/task_wdt/task_wdt_impl_timergroup.c
View File

@@ -65,7 +65,7 @@ static esp_err_t esp_task_wdt_retention_enable(uint32_t group_id)
{
sleep_retention_module_init_param_t init_param = {
.cbs = { .create = { .handle = sleep_task_wdt_retention_init, .arg = &group_id } },
.depends = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM)
.depends = RETENTION_MODULE_BITMAP_INIT(CLOCK_SYSTEM)
};
esp_err_t err = sleep_retention_module_init((group_id == 0) ? SLEEP_RETENTION_MODULE_TG0_WDT : SLEEP_RETENTION_MODULE_TG1_WDT, &init_param);
if (err == ESP_OK) {

3
components/esp_wifi/src/wifi_init.c
View File

@@ -352,8 +352,9 @@ esp_err_t esp_wifi_init(const wifi_init_config_t *config)
#if SOC_PM_MODEM_RETENTION_BY_REGDMA
sleep_retention_module_init_param_t init_param = {
.cbs = { .create = { .handle = init_wifi_mac_sleep_retention, .arg = NULL } },
.depends = BIT(SLEEP_RETENTION_MODULE_WIFI_BB) | BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM)
};
init_param.depends.bitmap[SLEEP_RETENTION_MODULE_WIFI_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_WIFI_BB % 32);
init_param.depends.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
esp_err_t err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_WIFI_MAC, &init_param);
if (err != ESP_OK) {
ESP_LOGW(TAG, "WiFi MAC sleep retention init failed");

7
components/ieee802154/driver/esp_ieee802154_dev.c
View File

@@ -998,10 +998,9 @@ static esp_err_t ieee802154_sleep_init(void)
{
esp_err_t err = ESP_OK;
#if CONFIG_PM_ENABLE
sleep_retention_module_init_param_t init_param = {
.cbs = { .create = { .handle = ieee802154_sleep_retention_init, .arg = NULL } },
.depends = BIT(SLEEP_RETENTION_MODULE_BT_BB) | BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM)
};
sleep_retention_module_init_param_t init_param = { .cbs = { .create = { .handle = ieee802154_sleep_retention_init, .arg = NULL } } };
init_param.depends.bitmap[SLEEP_RETENTION_MODULE_BT_BB >> 5] |= BIT(SLEEP_RETENTION_MODULE_BT_BB % 32);
init_param.depends.bitmap[SLEEP_RETENTION_MODULE_CLOCK_MODEM >> 5] |= BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM % 32);
err = sleep_retention_module_init(SLEEP_RETENTION_MODULE_802154_MAC, &init_param);
if (err == ESP_OK) {
err = sleep_retention_module_allocate(SLEEP_RETENTION_MODULE_802154_MAC);

4
components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
View File

@@ -1403,6 +1403,10 @@ config SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE
bool
default y
config SOC_PM_RETENTION_MODULE_NUM
int
default 32
config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
bool
default y

97
components/soc/esp32c5/include/soc/retention_periph_defs.h
View File

@@ -7,7 +7,7 @@
#pragma once
#include <stdint.h>
#include "esp_bit_defs.h"
#include "soc_caps.h"
#ifdef __cplusplus
extern "C" {
@@ -53,76 +53,37 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_BT_BB = 29,
SLEEP_RETENTION_MODULE_802154_MAC = 30,
SLEEP_RETENTION_MODULE_MODEM_PHY = 31,
SLEEP_RETENTION_MODULE_MAX = 31
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
typedef enum periph_retention_module_bitmap {
SLEEP_RETENTION_MODULE_BM_NULL = BIT(SLEEP_RETENTION_MODULE_NULL),
#define is_top_domain_module(m) \
( ((m) == SLEEP_RETENTION_MODULE_NULL) ? true \
: ((m) == SLEEP_RETENTION_MODULE_CLOCK_SYSTEM) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SYS_PERIPH) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_TIMER) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_TIMER) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ADC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_RMT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ETM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TEMP_SENSOR) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PCNT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: false)
/* clock module, which includes system and modem */
SLEEP_RETENTION_MODULE_BM_CLOCK_SYSTEM = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
SLEEP_RETENTION_MODULE_BM_CLOCK_MODEM = BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM),
/* modem module, which includes WiFi, BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_BM_WIFI_MAC = BIT(SLEEP_RETENTION_MODULE_WIFI_MAC),
SLEEP_RETENTION_MODULE_BM_WIFI_BB = BIT(SLEEP_RETENTION_MODULE_WIFI_BB),
SLEEP_RETENTION_MODULE_BM_BLE_MAC = BIT(SLEEP_RETENTION_MODULE_BLE_MAC),
SLEEP_RETENTION_MODULE_BM_BT_BB = BIT(SLEEP_RETENTION_MODULE_BT_BB),
SLEEP_RETENTION_MODULE_BM_802154_MAC = BIT(SLEEP_RETENTION_MODULE_802154_MAC),
SLEEP_RETENTION_MODULE_BM_MODEM_PHY = BIT(SLEEP_RETENTION_MODULE_MODEM_PHY),
/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
* TEE, APM, IOMUX, SPIMEM, SysTimer, etc.. */
SLEEP_RETENTION_MODULE_BM_SYS_PERIPH = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH),
/* Timer Group by target*/
SLEEP_RETENTION_MODULE_BM_TASK_WDT = BIT(SLEEP_RETENTION_MODULE_TG0_WDT),
SLEEP_RETENTION_MODULE_BM_INT_WDT = BIT(SLEEP_RETENTION_MODULE_TG1_WDT),
SLEEP_RETENTION_MODULE_BM_TG0_TIMER = BIT(SLEEP_RETENTION_MODULE_TG0_TIMER),
SLEEP_RETENTION_MODULE_BM_TG1_TIMER = BIT(SLEEP_RETENTION_MODULE_TG1_TIMER),
/* MISC Peripherals */
SLEEP_RETENTION_MODULE_BM_ADC = BIT(SLEEP_RETENTION_MODULE_ADC),
SLEEP_RETENTION_MODULE_BM_I2C0 = BIT(SLEEP_RETENTION_MODULE_I2C0),
SLEEP_RETENTION_MODULE_BM_RMT0 = BIT(SLEEP_RETENTION_MODULE_RMT0),
SLEEP_RETENTION_MODULE_BM_UART0 = BIT(SLEEP_RETENTION_MODULE_UART0),
SLEEP_RETENTION_MODULE_BM_UART1 = BIT(SLEEP_RETENTION_MODULE_UART1),
SLEEP_RETENTION_MODULE_BM_I2S0 = BIT(SLEEP_RETENTION_MODULE_I2S0),
SLEEP_RETENTION_MODULE_BM_ETM0 = BIT(SLEEP_RETENTION_MODULE_ETM0),
SLEEP_RETENTION_MODULE_BM_TEMP_SENSOR = BIT(SLEEP_RETENTION_MODULE_TEMP_SENSOR),
SLEEP_RETENTION_MODULE_BM_PARLIO0 = BIT(SLEEP_RETENTION_MODULE_PARLIO0),
SLEEP_RETENTION_MODULE_BM_GPSPI2 = BIT(SLEEP_RETENTION_MODULE_GPSPI2),
SLEEP_RETENTION_MODULE_BM_LEDC = BIT(SLEEP_RETENTION_MODULE_LEDC),
SLEEP_RETENTION_MODULE_BM_PCNT0 = BIT(SLEEP_RETENTION_MODULE_PCNT0),
SLEEP_RETENTION_MODULE_BM_MCPWM0 = BIT(SLEEP_RETENTION_MODULE_MCPWM0),
SLEEP_RETENTION_MODULE_BM_GDMA_CH0 = BIT(SLEEP_RETENTION_MODULE_GDMA_CH0),
SLEEP_RETENTION_MODULE_BM_GDMA_CH1 = BIT(SLEEP_RETENTION_MODULE_GDMA_CH1),
SLEEP_RETENTION_MODULE_BM_GDMA_CH2 = BIT(SLEEP_RETENTION_MODULE_GDMA_CH2),
SLEEP_RETENTION_MODULE_BM_ALL = (uint32_t)-1
} periph_retention_module_bitmap_t;
#define TOP_DOMAIN_PERIPHERALS_BM ( SLEEP_RETENTION_MODULE_BM_SYS_PERIPH \
| SLEEP_RETENTION_MODULE_BM_TASK_WDT \
| SLEEP_RETENTION_MODULE_BM_INT_WDT \
| SLEEP_RETENTION_MODULE_BM_TG0_TIMER \
| SLEEP_RETENTION_MODULE_BM_TG1_TIMER \
| SLEEP_RETENTION_MODULE_BM_GDMA_CH0 \
| SLEEP_RETENTION_MODULE_BM_GDMA_CH1 \
| SLEEP_RETENTION_MODULE_BM_GDMA_CH2 \
| SLEEP_RETENTION_MODULE_BM_ADC \
| SLEEP_RETENTION_MODULE_BM_I2C0 \
| SLEEP_RETENTION_MODULE_BM_RMT0 \
| SLEEP_RETENTION_MODULE_BM_UART0 \
| SLEEP_RETENTION_MODULE_BM_UART1 \
| SLEEP_RETENTION_MODULE_BM_I2S0 \
| SLEEP_RETENTION_MODULE_BM_ETM0 \
| SLEEP_RETENTION_MODULE_BM_TEMP_SENSOR \
| SLEEP_RETENTION_MODULE_BM_PARLIO0 \
| SLEEP_RETENTION_MODULE_BM_GPSPI2 \
| SLEEP_RETENTION_MODULE_BM_LEDC \
| SLEEP_RETENTION_MODULE_BM_PCNT0 \
| SLEEP_RETENTION_MODULE_BM_MCPWM0 \
| SLEEP_RETENTION_MODULE_BM_NULL \
)
#ifdef __cplusplus
}
#endif

2
components/soc/esp32c5/include/soc/soc_caps.h
View File

@@ -587,6 +587,8 @@
#define SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE (1)
#define SOC_PM_RETENTION_MODULE_NUM (32)
/*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
#define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1)
#define SOC_MODEM_CLOCK_IS_INDEPENDENT (1)

4
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
View File

@@ -1447,6 +1447,10 @@ config SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE
bool
default y
config SOC_PM_RETENTION_MODULE_NUM
int
default 32
config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
bool
default y

100
components/soc/esp32c6/include/soc/retention_periph_defs.h
View File

@@ -7,7 +7,7 @@
#pragma once
#include <stdint.h>
#include "esp_bit_defs.h"
#include "soc_caps.h"
#ifdef __cplusplus
extern "C" {
@@ -54,77 +54,37 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_BLE_MAC = 28,
SLEEP_RETENTION_MODULE_BT_BB = 29,
SLEEP_RETENTION_MODULE_802154_MAC = 30,
SLEEP_RETENTION_MODULE_MAX = 31
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
typedef enum periph_retention_module_bitmap {
SLEEP_RETENTION_MODULE_BM_NULL = BIT(SLEEP_RETENTION_MODULE_NULL),
/* clock module, which includes system and modem */
SLEEP_RETENTION_MODULE_BM_CLOCK_SYSTEM = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
SLEEP_RETENTION_MODULE_BM_CLOCK_MODEM = BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM),
/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
* TEE, APM, IOMUX, SPIMEM, SysTimer, etc.. */
SLEEP_RETENTION_MODULE_BM_SYS_PERIPH = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH),
/* Timer Group by target*/
SLEEP_RETENTION_MODULE_BM_TASK_WDT = BIT(SLEEP_RETENTION_MODULE_TG0_WDT),
SLEEP_RETENTION_MODULE_BM_INT_WDT = BIT(SLEEP_RETENTION_MODULE_TG1_WDT),
SLEEP_RETENTION_MODULE_BM_TG0_TIMER = BIT(SLEEP_RETENTION_MODULE_TG0_TIMER),
SLEEP_RETENTION_MODULE_BM_TG1_TIMER = BIT(SLEEP_RETENTION_MODULE_TG1_TIMER),
/* GDMA by channel */
SLEEP_RETENTION_MODULE_BM_GDMA_CH0 = BIT(SLEEP_RETENTION_MODULE_GDMA_CH0),
SLEEP_RETENTION_MODULE_BM_GDMA_CH1 = BIT(SLEEP_RETENTION_MODULE_GDMA_CH1),
SLEEP_RETENTION_MODULE_BM_GDMA_CH2 = BIT(SLEEP_RETENTION_MODULE_GDMA_CH2),
/* MISC Peripherals */
SLEEP_RETENTION_MODULE_BM_ADC = BIT(SLEEP_RETENTION_MODULE_ADC),
SLEEP_RETENTION_MODULE_BM_I2C0 = BIT(SLEEP_RETENTION_MODULE_I2C0),
SLEEP_RETENTION_MODULE_BM_RMT0 = BIT(SLEEP_RETENTION_MODULE_RMT0),
SLEEP_RETENTION_MODULE_BM_UART0 = BIT(SLEEP_RETENTION_MODULE_UART0),
SLEEP_RETENTION_MODULE_BM_UART1 = BIT(SLEEP_RETENTION_MODULE_UART1),
SLEEP_RETENTION_MODULE_BM_I2S0 = BIT(SLEEP_RETENTION_MODULE_I2S0),
SLEEP_RETENTION_MODULE_BM_ETM0 = BIT(SLEEP_RETENTION_MODULE_ETM0),
SLEEP_RETENTION_MODULE_BM_TEMP_SENSOR = BIT(SLEEP_RETENTION_MODULE_TEMP_SENSOR),
SLEEP_RETENTION_MODULE_BM_TWAI0 = BIT(SLEEP_RETENTION_MODULE_TWAI0),
SLEEP_RETENTION_MODULE_BM_TWAI1 = BIT(SLEEP_RETENTION_MODULE_TWAI1),
SLEEP_RETENTION_MODULE_BM_PARLIO0 = BIT(SLEEP_RETENTION_MODULE_PARLIO0),
SLEEP_RETENTION_MODULE_BM_GPSPI2 = BIT(SLEEP_RETENTION_MODULE_GPSPI2),
SLEEP_RETENTION_MODULE_BM_LEDC = BIT(SLEEP_RETENTION_MODULE_LEDC),
SLEEP_RETENTION_MODULE_BM_PCNT0 = BIT(SLEEP_RETENTION_MODULE_PCNT0),
SLEEP_RETENTION_MODULE_BM_MCPWM0 = BIT(SLEEP_RETENTION_MODULE_MCPWM0),
/* modem module, which includes WiFi, BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_BM_WIFI_MAC = BIT(SLEEP_RETENTION_MODULE_WIFI_MAC),
SLEEP_RETENTION_MODULE_BM_WIFI_BB = BIT(SLEEP_RETENTION_MODULE_WIFI_BB),
SLEEP_RETENTION_MODULE_BM_BLE_MAC = BIT(SLEEP_RETENTION_MODULE_BLE_MAC),
SLEEP_RETENTION_MODULE_BM_BT_BB = BIT(SLEEP_RETENTION_MODULE_BT_BB),
SLEEP_RETENTION_MODULE_BM_802154_MAC = BIT(SLEEP_RETENTION_MODULE_802154_MAC),
SLEEP_RETENTION_MODULE_BM_ALL = (uint32_t)-1
} periph_retention_module_bitmap_t;
#define TOP_DOMAIN_PERIPHERALS_BM ( SLEEP_RETENTION_MODULE_BM_SYS_PERIPH \
| SLEEP_RETENTION_MODULE_BM_TASK_WDT \
| SLEEP_RETENTION_MODULE_BM_INT_WDT \
| SLEEP_RETENTION_MODULE_BM_TG0_TIMER \
| SLEEP_RETENTION_MODULE_BM_TG1_TIMER \
| SLEEP_RETENTION_MODULE_BM_GDMA_CH0 \
| SLEEP_RETENTION_MODULE_BM_GDMA_CH1 \
| SLEEP_RETENTION_MODULE_BM_GDMA_CH2 \
| SLEEP_RETENTION_MODULE_BM_ADC \
| SLEEP_RETENTION_MODULE_BM_I2C0 \
| SLEEP_RETENTION_MODULE_BM_RMT0 \
| SLEEP_RETENTION_MODULE_BM_UART0 \
| SLEEP_RETENTION_MODULE_BM_UART1 \
| SLEEP_RETENTION_MODULE_BM_I2S0 \
| SLEEP_RETENTION_MODULE_BM_ETM0 \
| SLEEP_RETENTION_MODULE_BM_TEMP_SENSOR \
| SLEEP_RETENTION_MODULE_BM_TWAI0 \
| SLEEP_RETENTION_MODULE_BM_TWAI1 \
| SLEEP_RETENTION_MODULE_BM_PARLIO0 \
| SLEEP_RETENTION_MODULE_BM_GPSPI2 \
| SLEEP_RETENTION_MODULE_BM_LEDC \
| SLEEP_RETENTION_MODULE_BM_PCNT0 \
| SLEEP_RETENTION_MODULE_BM_MCPWM0 \
| SLEEP_RETENTION_MODULE_BM_NULL \
)
#define is_top_domain_module(m) \
( ((m) == SLEEP_RETENTION_MODULE_NULL) ? true \
: ((m) == SLEEP_RETENTION_MODULE_CLOCK_SYSTEM) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SYS_PERIPH) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_TIMER) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_TIMER) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ADC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_RMT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ETM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TEMP_SENSOR) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PCNT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: false)
#ifdef __cplusplus
}

2
components/soc/esp32c6/include/soc/soc_caps.h
View File

@@ -566,6 +566,8 @@
#define SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE (1)
#define SOC_PM_RETENTION_MODULE_NUM (32)
/*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
#define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1)
#define SOC_MODEM_CLOCK_IS_INDEPENDENT (1)

4
components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
View File

@@ -1011,6 +1011,10 @@ config SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE
bool
default y
config SOC_PM_RETENTION_MODULE_NUM
int
default 32
config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
bool
default y

72
components/soc/esp32c61/include/soc/retention_periph_defs.h
View File

@@ -7,7 +7,7 @@
#pragma once
#include <stdint.h>
#include "esp_bit_defs.h"
#include "soc_caps.h"
#ifdef __cplusplus
extern "C" {
@@ -45,59 +45,27 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_BLE_MAC = 28,
SLEEP_RETENTION_MODULE_BT_BB = 29,
SLEEP_RETENTION_MODULE_802154_MAC = 30,
SLEEP_RETENTION_MODULE_MAX = 31
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
typedef enum periph_retention_module_bitmap {
SLEEP_RETENTION_MODULE_BM_NULL = BIT(SLEEP_RETENTION_MODULE_NULL),
/* clock module, which includes system and modem */
SLEEP_RETENTION_MODULE_BM_CLOCK_SYSTEM = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
SLEEP_RETENTION_MODULE_BM_CLOCK_MODEM = BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM),
/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
* TEE, APM, IOMUX, SPIMEM, SysTimer, etc.. */
SLEEP_RETENTION_MODULE_BM_SYS_PERIPH = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH),
/* Timer Group by target*/
SLEEP_RETENTION_MODULE_BM_TASK_WDT = BIT(SLEEP_RETENTION_MODULE_TG0_WDT),
SLEEP_RETENTION_MODULE_BM_INT_WDT = BIT(SLEEP_RETENTION_MODULE_TG1_WDT),
SLEEP_RETENTION_MODULE_BM_TG0_TIMER = BIT(SLEEP_RETENTION_MODULE_TG0_TIMER),
SLEEP_RETENTION_MODULE_BM_TG1_TIMER = BIT(SLEEP_RETENTION_MODULE_TG1_TIMER),
/* GDMA by channel */
SLEEP_RETENTION_MODULE_BM_GDMA_CH0 = BIT(SLEEP_RETENTION_MODULE_GDMA_CH0),
SLEEP_RETENTION_MODULE_BM_GDMA_CH1 = BIT(SLEEP_RETENTION_MODULE_GDMA_CH1),
/* MISC Peripherals */
SLEEP_RETENTION_MODULE_BM_I2C0 = BIT(SLEEP_RETENTION_MODULE_I2C0),
SLEEP_RETENTION_MODULE_BM_UART0 = BIT(SLEEP_RETENTION_MODULE_UART0),
SLEEP_RETENTION_MODULE_BM_UART1 = BIT(SLEEP_RETENTION_MODULE_UART1),
SLEEP_RETENTION_MODULE_BM_ETM0 = BIT(SLEEP_RETENTION_MODULE_ETM0),
SLEEP_RETENTION_MODULE_BM_GPSPI2 = BIT(SLEEP_RETENTION_MODULE_GPSPI2),
SLEEP_RETENTION_MODULE_BM_LEDC = BIT(SLEEP_RETENTION_MODULE_LEDC),
SLEEP_RETENTION_MODULE_BM_I2S0 = BIT(SLEEP_RETENTION_MODULE_I2S0),
/* modem module, which includes WiFi, BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_BM_WIFI_MAC = BIT(SLEEP_RETENTION_MODULE_WIFI_MAC),
SLEEP_RETENTION_MODULE_BM_WIFI_BB = BIT(SLEEP_RETENTION_MODULE_WIFI_BB),
SLEEP_RETENTION_MODULE_BM_BLE_MAC = BIT(SLEEP_RETENTION_MODULE_BLE_MAC),
SLEEP_RETENTION_MODULE_BM_BT_BB = BIT(SLEEP_RETENTION_MODULE_BT_BB),
SLEEP_RETENTION_MODULE_BM_802154_MAC = BIT(SLEEP_RETENTION_MODULE_802154_MAC),
SLEEP_RETENTION_MODULE_BM_ALL = (uint32_t)-1
} periph_retention_module_bitmap_t;
#define TOP_DOMAIN_PERIPHERALS_BM ( SLEEP_RETENTION_MODULE_BM_SYS_PERIPH \
| SLEEP_RETENTION_MODULE_BM_TASK_WDT \
| SLEEP_RETENTION_MODULE_BM_INT_WDT \
| SLEEP_RETENTION_MODULE_BM_TG0_TIMER \
| SLEEP_RETENTION_MODULE_BM_TG1_TIMER \
| SLEEP_RETENTION_MODULE_BM_GDMA_CH0 \
| SLEEP_RETENTION_MODULE_BM_GDMA_CH1 \
| SLEEP_RETENTION_MODULE_BM_I2C0 \
| SLEEP_RETENTION_MODULE_BM_UART0 \
| SLEEP_RETENTION_MODULE_BM_UART1 \
| SLEEP_RETENTION_MODULE_BM_ETM0 \
| SLEEP_RETENTION_MODULE_BM_GPSPI2 \
| SLEEP_RETENTION_MODULE_BM_LEDC \
| SLEEP_RETENTION_MODULE_BM_I2S0 \
| SLEEP_RETENTION_MODULE_BM_NULL \
)
#define is_top_domain_module(m) \
( ((m) == SLEEP_RETENTION_MODULE_NULL) ? true \
: ((m) == SLEEP_RETENTION_MODULE_CLOCK_SYSTEM) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SYS_PERIPH) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_TIMER) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_TIMER) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ETM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: false)
#ifdef __cplusplus
}

2
components/soc/esp32c61/include/soc/soc_caps.h
View File

@@ -456,6 +456,8 @@
#define SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE (1)
#define SOC_PM_RETENTION_MODULE_NUM (32)
/*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/
#define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1)
#define SOC_MODEM_CLOCK_IS_INDEPENDENT (1)

4
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
View File

@@ -1387,6 +1387,10 @@ config SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE
bool
default y
config SOC_PM_RETENTION_MODULE_NUM
int
default 32
config SOC_EXT_MEM_CACHE_TAG_IN_CPU_DOMAIN
bool
default y

98
components/soc/esp32h2/include/soc/retention_periph_defs.h
View File

@@ -7,7 +7,7 @@
#pragma once
#include <stdint.h>
#include "esp_bit_defs.h"
#include "soc_caps.h"
#ifdef __cplusplus
extern "C" {
@@ -52,75 +52,37 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_BLE_MAC = 28,
SLEEP_RETENTION_MODULE_BT_BB = 29,
SLEEP_RETENTION_MODULE_802154_MAC = 30,
SLEEP_RETENTION_MODULE_MAX = 31
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
typedef enum periph_retention_module_bitmap {
SLEEP_RETENTION_MODULE_BM_NULL = BIT(SLEEP_RETENTION_MODULE_NULL),
/* clock module, which includes system and modem */
SLEEP_RETENTION_MODULE_BM_CLOCK_SYSTEM = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
SLEEP_RETENTION_MODULE_BM_CLOCK_MODEM = BIT(SLEEP_RETENTION_MODULE_CLOCK_MODEM),
/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
* TEE, APM, UART, Timer Group, IOMUX, SPIMEM, SysTimer, etc.. */
SLEEP_RETENTION_MODULE_BM_SYS_PERIPH = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH),
/* Timer Group by target*/
SLEEP_RETENTION_MODULE_BM_TASK_WDT = BIT(SLEEP_RETENTION_MODULE_TG0_WDT),
SLEEP_RETENTION_MODULE_BM_INT_WDT = BIT(SLEEP_RETENTION_MODULE_TG1_WDT),
SLEEP_RETENTION_MODULE_BM_TG0_TIMER = BIT(SLEEP_RETENTION_MODULE_TG0_TIMER),
SLEEP_RETENTION_MODULE_BM_TG1_TIMER = BIT(SLEEP_RETENTION_MODULE_TG1_TIMER),
/* GDMA by channel */
SLEEP_RETENTION_MODULE_BM_GDMA_CH0 = BIT(SLEEP_RETENTION_MODULE_GDMA_CH0),
SLEEP_RETENTION_MODULE_BM_GDMA_CH1 = BIT(SLEEP_RETENTION_MODULE_GDMA_CH1),
SLEEP_RETENTION_MODULE_BM_GDMA_CH2 = BIT(SLEEP_RETENTION_MODULE_GDMA_CH2),
/* MISC Peripherals */
SLEEP_RETENTION_MODULE_BM_ADC = BIT(SLEEP_RETENTION_MODULE_ADC),
SLEEP_RETENTION_MODULE_BM_I2C0 = BIT(SLEEP_RETENTION_MODULE_I2C0),
SLEEP_RETENTION_MODULE_BM_I2C1 = BIT(SLEEP_RETENTION_MODULE_I2C1),
SLEEP_RETENTION_MODULE_BM_RMT0 = BIT(SLEEP_RETENTION_MODULE_RMT0),
SLEEP_RETENTION_MODULE_BM_UART0 = BIT(SLEEP_RETENTION_MODULE_UART0),
SLEEP_RETENTION_MODULE_BM_UART1 = BIT(SLEEP_RETENTION_MODULE_UART1),
SLEEP_RETENTION_MODULE_BM_I2S0 = BIT(SLEEP_RETENTION_MODULE_I2S0),
SLEEP_RETENTION_MODULE_BM_ETM0 = BIT(SLEEP_RETENTION_MODULE_ETM0),
SLEEP_RETENTION_MODULE_BM_TEMP_SENSOR = BIT(SLEEP_RETENTION_MODULE_TEMP_SENSOR),
SLEEP_RETENTION_MODULE_BM_TWAI0 = BIT(SLEEP_RETENTION_MODULE_TWAI0),
SLEEP_RETENTION_MODULE_BM_PARLIO0 = BIT(SLEEP_RETENTION_MODULE_PARLIO0),
SLEEP_RETENTION_MODULE_BM_GPSPI2 = BIT(SLEEP_RETENTION_MODULE_GPSPI2),
SLEEP_RETENTION_MODULE_BM_LEDC = BIT(SLEEP_RETENTION_MODULE_LEDC),
SLEEP_RETENTION_MODULE_BM_PCNT0 = BIT(SLEEP_RETENTION_MODULE_PCNT0),
SLEEP_RETENTION_MODULE_BM_MCPWM0 = BIT(SLEEP_RETENTION_MODULE_MCPWM0),
/* modem module, which includes BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_BM_BLE_MAC = BIT(SLEEP_RETENTION_MODULE_BLE_MAC),
SLEEP_RETENTION_MODULE_BM_BT_BB = BIT(SLEEP_RETENTION_MODULE_BT_BB),
SLEEP_RETENTION_MODULE_BM_802154_MAC = BIT(SLEEP_RETENTION_MODULE_802154_MAC),
SLEEP_RETENTION_MODULE_BM_ALL = (uint32_t) -1
} periph_retention_module_bitmap_t;
#define TOP_DOMAIN_PERIPHERALS_BM ( SLEEP_RETENTION_MODULE_BM_SYS_PERIPH \
| SLEEP_RETENTION_MODULE_BM_TASK_WDT \
| SLEEP_RETENTION_MODULE_BM_INT_WDT \
| SLEEP_RETENTION_MODULE_BM_TG0_TIMER \
| SLEEP_RETENTION_MODULE_BM_TG1_TIMER \
| SLEEP_RETENTION_MODULE_BM_GDMA_CH0 \
| SLEEP_RETENTION_MODULE_BM_GDMA_CH1 \
| SLEEP_RETENTION_MODULE_BM_GDMA_CH2 \
| SLEEP_RETENTION_MODULE_BM_ADC \
| SLEEP_RETENTION_MODULE_BM_I2C0 \
| SLEEP_RETENTION_MODULE_BM_I2C1 \
| SLEEP_RETENTION_MODULE_BM_RMT0 \
| SLEEP_RETENTION_MODULE_BM_UART0 \
| SLEEP_RETENTION_MODULE_BM_UART1 \
| SLEEP_RETENTION_MODULE_BM_I2S0 \
| SLEEP_RETENTION_MODULE_BM_ETM0 \
| SLEEP_RETENTION_MODULE_BM_TEMP_SENSOR \
| SLEEP_RETENTION_MODULE_BM_TWAI0 \
| SLEEP_RETENTION_MODULE_BM_PARLIO0 \
| SLEEP_RETENTION_MODULE_BM_GPSPI2 \
| SLEEP_RETENTION_MODULE_BM_LEDC \
| SLEEP_RETENTION_MODULE_BM_PCNT0 \
| SLEEP_RETENTION_MODULE_BM_MCPWM0 \
| SLEEP_RETENTION_MODULE_BM_NULL \
)
#define is_top_domain_module(m) \
( ((m) == SLEEP_RETENTION_MODULE_NULL) ? true \
: ((m) == SLEEP_RETENTION_MODULE_CLOCK_SYSTEM) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SYS_PERIPH) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_TIMER) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_TIMER) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ADC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_RMT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ETM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TEMP_SENSOR) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PCNT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: false)
#ifdef __cplusplus
}

2
components/soc/esp32h2/include/soc/soc_caps.h
View File

@@ -543,6 +543,8 @@
#define SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE (1)
#define SOC_PM_RETENTION_MODULE_NUM (32)
#define SOC_EXT_MEM_CACHE_TAG_IN_CPU_DOMAIN (1)
#define SOC_PM_CPU_RETENTION_BY_SW (1)
#define SOC_PM_MODEM_RETENTION_BY_REGDMA (1)

4
components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
View File

@@ -1935,6 +1935,10 @@ config SOC_SLEEP_TGWDT_STOP_WORKAROUND
bool
default y
config SOC_PM_RETENTION_MODULE_NUM
int
default 64
config SOC_PSRAM_VDD_POWER_MPLL
bool
default y

115
components/soc/esp32p4/include/soc/retention_periph_defs.h
View File

@@ -7,7 +7,7 @@
#pragma once
#include <stdint.h>
#include "esp_bit_defs.h"
#include "soc_caps.h"
#ifdef __cplusplus
extern "C" {
@@ -55,86 +55,43 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_GPSPI3 = 30,
SLEEP_RETENTION_MODULE_LEDC = 31,
SLEEP_RETENTION_MODULE_MAX = 31
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
typedef enum periph_retention_module_bitmap {
SLEEP_RETENTION_MODULE_BM_NULL = BIT(SLEEP_RETENTION_MODULE_NULL),
/* clock module, which includes system and modem */
SLEEP_RETENTION_MODULE_BM_CLOCK_SYSTEM = BIT(SLEEP_RETENTION_MODULE_CLOCK_SYSTEM),
/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
* TEE, APM, UART, Timer Group, IOMUX, SPIMEM, SysTimer, etc.. */
SLEEP_RETENTION_MODULE_BM_SYS_PERIPH = BIT(SLEEP_RETENTION_MODULE_SYS_PERIPH),
/* Timer Group by target*/
SLEEP_RETENTION_MODULE_BM_TG0_WDT = BIT(SLEEP_RETENTION_MODULE_TG0_WDT),
SLEEP_RETENTION_MODULE_BM_TG1_WDT = BIT(SLEEP_RETENTION_MODULE_TG1_WDT),
SLEEP_RETENTION_MODULE_BM_TG0_TIMER = BIT(SLEEP_RETENTION_MODULE_TG0_TIMER),
SLEEP_RETENTION_MODULE_BM_TG1_TIMER = BIT(SLEEP_RETENTION_MODULE_TG1_TIMER),
/* AHB_DMA by channel */
SLEEP_RETENTION_MODULE_BM_AHB_DMA_CH0 = BIT(SLEEP_RETENTION_MODULE_AHB_DMA_CH0),
SLEEP_RETENTION_MODULE_BM_AHB_DMA_CH1 = BIT(SLEEP_RETENTION_MODULE_AHB_DMA_CH1),
SLEEP_RETENTION_MODULE_BM_AHB_DMA_CH2 = BIT(SLEEP_RETENTION_MODULE_AHB_DMA_CH2),
/* AXI_DMA by channel */
SLEEP_RETENTION_MODULE_BM_AXI_DMA_CH0 = BIT(SLEEP_RETENTION_MODULE_AXI_DMA_CH0),
SLEEP_RETENTION_MODULE_BM_AXI_DMA_CH1 = BIT(SLEEP_RETENTION_MODULE_AXI_DMA_CH1),
SLEEP_RETENTION_MODULE_BM_AXI_DMA_CH2 = BIT(SLEEP_RETENTION_MODULE_AXI_DMA_CH2),
/* MISC Peripherals */
SLEEP_RETENTION_MODULE_BM_UART0 = BIT(SLEEP_RETENTION_MODULE_UART0),
SLEEP_RETENTION_MODULE_BM_UART1 = BIT(SLEEP_RETENTION_MODULE_UART1),
SLEEP_RETENTION_MODULE_BM_UART2 = BIT(SLEEP_RETENTION_MODULE_UART2),
SLEEP_RETENTION_MODULE_BM_UART3 = BIT(SLEEP_RETENTION_MODULE_UART3),
SLEEP_RETENTION_MODULE_BM_UART4 = BIT(SLEEP_RETENTION_MODULE_UART4),
SLEEP_RETENTION_MODULE_BM_RMT0 = BIT(SLEEP_RETENTION_MODULE_RMT0),
SLEEP_RETENTION_MODULE_BM_I2S0 = BIT(SLEEP_RETENTION_MODULE_I2S0),
SLEEP_RETENTION_MODULE_BM_I2S1 = BIT(SLEEP_RETENTION_MODULE_I2S1),
SLEEP_RETENTION_MODULE_BM_I2S2 = BIT(SLEEP_RETENTION_MODULE_I2S2),
SLEEP_RETENTION_MODULE_BM_ETM0 = BIT(SLEEP_RETENTION_MODULE_ETM0),
SLEEP_RETENTION_MODULE_BM_I2C0 = BIT(SLEEP_RETENTION_MODULE_I2C0),
SLEEP_RETENTION_MODULE_BM_I2C1 = BIT(SLEEP_RETENTION_MODULE_I2C1),
SLEEP_RETENTION_MODULE_BM_TWAI0 = BIT(SLEEP_RETENTION_MODULE_TWAI0),
SLEEP_RETENTION_MODULE_BM_TWAI1 = BIT(SLEEP_RETENTION_MODULE_TWAI1),
SLEEP_RETENTION_MODULE_BM_TWAI2 = BIT(SLEEP_RETENTION_MODULE_TWAI2),
SLEEP_RETENTION_MODULE_BM_PARLIO0 = BIT(SLEEP_RETENTION_MODULE_PARLIO0),
SLEEP_RETENTION_MODULE_BM_GPSPI2 = BIT(SLEEP_RETENTION_MODULE_GPSPI2),
SLEEP_RETENTION_MODULE_BM_GPSPI3 = BIT(SLEEP_RETENTION_MODULE_GPSPI3),
SLEEP_RETENTION_MODULE_BM_LEDC = BIT(SLEEP_RETENTION_MODULE_LEDC),
SLEEP_RETENTION_MODULE_BM_ALL = (uint32_t)-1
} periph_retention_module_bitmap_t;
#define TOP_DOMAIN_PERIPHERALS_BM ( SLEEP_RETENTION_MODULE_BM_SYS_PERIPH \
| SLEEP_RETENTION_MODULE_BM_TG0_WDT \
| SLEEP_RETENTION_MODULE_BM_TG1_WDT \
| SLEEP_RETENTION_MODULE_BM_TG0_TIMER \
| SLEEP_RETENTION_MODULE_BM_TG1_TIMER \
| SLEEP_RETENTION_MODULE_BM_AHB_DMA_CH0 \
| SLEEP_RETENTION_MODULE_BM_AHB_DMA_CH1 \
| SLEEP_RETENTION_MODULE_BM_AHB_DMA_CH2 \
| SLEEP_RETENTION_MODULE_BM_AXI_DMA_CH0 \
| SLEEP_RETENTION_MODULE_BM_AXI_DMA_CH1 \
| SLEEP_RETENTION_MODULE_BM_AXI_DMA_CH2 \
| SLEEP_RETENTION_MODULE_BM_UART0 \
| SLEEP_RETENTION_MODULE_BM_UART1 \
| SLEEP_RETENTION_MODULE_BM_UART2 \
| SLEEP_RETENTION_MODULE_BM_UART3 \
| SLEEP_RETENTION_MODULE_BM_UART4 \
| SLEEP_RETENTION_MODULE_BM_RMT0 \
| SLEEP_RETENTION_MODULE_BM_I2S0 \
| SLEEP_RETENTION_MODULE_BM_I2S1 \
| SLEEP_RETENTION_MODULE_BM_I2S2 \
| SLEEP_RETENTION_MODULE_BM_ETM0 \
| SLEEP_RETENTION_MODULE_BM_I2C0 \
| SLEEP_RETENTION_MODULE_BM_I2C1 \
| SLEEP_RETENTION_MODULE_BM_TWAI0 \
| SLEEP_RETENTION_MODULE_BM_TWAI1 \
| SLEEP_RETENTION_MODULE_BM_TWAI2 \
| SLEEP_RETENTION_MODULE_BM_PARLIO0 \
| SLEEP_RETENTION_MODULE_BM_GPSPI2 \
| SLEEP_RETENTION_MODULE_BM_GPSPI3 \
| SLEEP_RETENTION_MODULE_BM_LEDC \
| SLEEP_RETENTION_MODULE_BM_NULL \
)
#define is_top_domain_module(m) \
( ((m) == SLEEP_RETENTION_MODULE_NULL) ? true \
: ((m) == SLEEP_RETENTION_MODULE_CLOCK_SYSTEM) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SYS_PERIPH) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_TIMER) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_TIMER) ? true \
: ((m) == SLEEP_RETENTION_MODULE_AHB_DMA_CH0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_AHB_DMA_CH1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_AHB_DMA_CH2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_AXI_DMA_CH0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_AXI_DMA_CH1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_AXI_DMA_CH2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART3) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART4) ? true \
: ((m) == SLEEP_RETENTION_MODULE_RMT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ETM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI3) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: false)
#ifdef __cplusplus
}

2
components/soc/esp32p4/include/soc/soc_caps.h
View File

@@ -726,6 +726,8 @@
#define SOC_SLEEP_SYSTIMER_STALL_WORKAROUND 1 //TODO IDF-11381: replace with all xtal field clk gate control
#define SOC_SLEEP_TGWDT_STOP_WORKAROUND 1 //TODO IDF-11381: replace with all xtal field clk gate control
#define SOC_PM_RETENTION_MODULE_NUM (64)
/*-------------------------- PSRAM CAPS ----------------------------*/
#define SOC_PSRAM_VDD_POWER_MPLL (1)

2
components/soc/include/soc/regdma.h
View File

@@ -179,7 +179,7 @@ typedef struct regdma_link_stats {
reserve: 16-REGDMA_LINK_ENTRY_NUM,
#endif
id: 16; /* REGDMA linked list node unique identifier */
volatile uint32_t module; /* a bitmap used to identify the module to which the current node belongs */
volatile int module; /* a number used to identify the module to which the current node belongs */
} regdma_link_stats_t;
typedef struct regdma_link_continuous {