mirror of
https://github.com/espressif/esp-idf.git
synced 2025-07-29 18:27:20 +02:00
Add fixes for gcc8 psram fix improvement
This commit is contained in:
committed by
Anton Maklakov
parent
69895387ee
commit
4eec4fbc99
@ -101,5 +101,19 @@ else()
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target_compile_options(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-issue)
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# also, make sure we link with this option so correct toolchain libs are pulled in
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target_link_libraries(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-issue)
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# set strategy selected
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# note that we don't need to set link options as the library linked is independent of this
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if(CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST)
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target_compile_options(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-strategy=dupldst)
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target_link_libraries(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-strategy=dupldst)
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endif()
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if(CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW)
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target_compile_options(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-strategy=memw)
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target_link_libraries(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-strategy=memw)
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endif()
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if(CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_NOPS)
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target_compile_options(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-strategy=nops)
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target_link_libraries(${COMPONENT_LIB} PUBLIC -mfix-esp32-psram-cache-strategy=nops)
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endif()
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endif()
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endif()
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@ -129,6 +129,40 @@ menu "ESP32-specific"
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The workaround is not required for ESP32 revision 3 and above.
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menu "SPIRAM cache workaround debugging"
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choice SPIRAM_CACHE_WORKAROUND_STRATEGY
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prompt "Workaround strategy"
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depends on SPIRAM_CACHE_WORKAROUND
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default SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW
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help
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Select the workaround strategy. Note that the strategy for precompiled
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libraries (libgcc, newlib, bt, wifi) is not affected by this selection.
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Unless you know you need a different strategy, it's suggested you stay
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with the default MEMW strategy. Note that DUPLDST can interfere with hardware
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encryption and this will be automatically disabled if this workaround is selected.
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'Insert nops' is the workaround that was used in older esp-idf versions. This workaround
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still can cause faulty data transfers from/to SPI RAM in some situation.
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config SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW
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bool "Insert memw after vulnerable instructions (default)"
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config SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST
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bool "Duplicate LD/ST for 32-bit, memw for 8/16 bit"
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config SPIRAM_CACHE_WORKAROUND_STRATEGY_NOPS
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bool "Insert nops between vulnerable loads/stores (old strategy, obsolete)"
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endchoice
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#This needs to be Y only for the dupldst workaround
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config SPIRAM_WORKAROUND_NEED_VOLATILE_SPINLOCK
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bool
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default "y" if SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST
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endmenu
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config SPIRAM_BANKSWITCH_ENABLE
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bool "Enable bank switching for >4MiB external RAM"
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default y
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@ -1,9 +1,24 @@
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# Enable psram cache bug workaround in compiler if selected
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ifdef CONFIG_SPIRAM_CACHE_WORKAROUND
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CFLAGS+=-mfix-esp32-psram-cache-issue
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CXXFLAGS+=-mfix-esp32-psram-cache-issue
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LDFLAGS+=-mfix-esp32-psram-cache-issue
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SPIRAM_CACHE_WORKAROUND_FLAGS = -mfix-esp32-psram-cache-issue
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ifdef CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST
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SPIRAM_CACHE_WORKAROUND_FLAGS += -mfix-esp32-psram-cache-strategy=dupldst
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endif
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ifdef CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW
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SPIRAM_CACHE_WORKAROUND_FLAGS += -mfix-esp32-psram-cache-strategy=memw
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endif
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ifdef CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_NOPS
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SPIRAM_CACHE_WORKAROUND_FLAGS += -mfix-esp32-psram-cache-strategy=nops
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endif
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CFLAGS+=$(SPIRAM_CACHE_WORKAROUND_FLAGS)
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CXXFLAGS+=$(SPIRAM_CACHE_WORKAROUND_FLAGS)
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LDFLAGS+=$(SPIRAM_CACHE_WORKAROUND_FLAGS)
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endif
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# Enable dynamic esp_timer overflow value if building unit tests
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ifneq ("$(filter esp32,$(TEST_COMPONENTS_LIST))","")
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@ -4,6 +4,16 @@ if(CONFIG_SPIRAM_CACHE_WORKAROUND)
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# non-IDF CMakeLists.txt file is imported into a component) don't depend
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# on the esp32 component so don't get the extra flag. This handles that case.
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idf_build_set_property(COMPILE_OPTIONS "-mfix-esp32-psram-cache-issue" APPEND)
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# note that we don't need to set link options as the library linked is independent of this
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if(CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST)
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idf_build_set_property(COMPILE_OPTIONS "-mfix-esp32-psram-cache-strategy=dupldst" APPEND)
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endif()
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if(CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW)
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idf_build_set_property(COMPILE_OPTIONS "-mfix-esp32-psram-cache-strategy=memw" APPEND)
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endif()
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if(CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_NOPS)
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idf_build_set_property(COMPILE_OPTIONS "-mfix-esp32-psram-cache-strategy=nops" APPEND)
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endif()
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endif()
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# Check toolchain is configured properly in cmake
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@ -133,6 +133,12 @@ typedef unsigned portBASE_TYPE UBaseType_t;
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#include "sdkconfig.h"
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#include "esp_attr.h"
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#ifdef CONFIG_SPIRAM_WORKAROUND_NEED_VOLATILE_SPINLOCK
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#define NEED_VOLATILE_MUX volatile
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#else
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#define NEED_VOLATILE_MUX
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#endif
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/* "mux" data structure (spinlock) */
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typedef struct {
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/* owner field values:
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@ -146,12 +152,12 @@ typedef struct {
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*
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* Any value other than portMUX_FREE_VAL, CORE_ID_REGVAL_PRO, CORE_ID_REGVAL_APP indicates corruption
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*/
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uint32_t owner;
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NEED_VOLATILE_MUX uint32_t owner;
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/* count field:
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* If mux is unlocked, count should be zero.
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* If mux is locked, count is non-zero & represents the number of recursive locks on the mux.
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*/
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uint32_t count;
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NEED_VOLATILE_MUX uint32_t count;
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#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
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const char *lastLockedFn;
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int lastLockedLine;
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@ -38,8 +38,8 @@
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#define IDF_PERFORMANCE_MAX_ISR_ENTER_CYCLES 290
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#define IDF_PERFORMANCE_MAX_ISR_EXIT_CYCLES 565
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#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_TOHOST_4BIT 12500
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#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_FRHOST_4BIT 12500
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#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_TOHOST_4BIT 12200
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#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_FRHOST_4BIT 12200
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#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_TOHOST_1BIT 4000
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#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_FRHOST_1BIT 4000
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#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_TOHOST_SPI 1000
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@ -132,6 +132,7 @@ menu "mbedTLS"
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config MBEDTLS_HARDWARE_AES
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bool "Enable hardware AES acceleration"
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default y
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depends on !SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST
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help
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Enable hardware accelerated AES encryption & decryption.
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@ -141,6 +142,7 @@ menu "mbedTLS"
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config MBEDTLS_HARDWARE_MPI
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bool "Enable hardware MPI (bignum) acceleration"
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default y
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depends on !SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST
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help
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Enable hardware accelerated multiple precision integer operations.
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@ -152,6 +154,7 @@ menu "mbedTLS"
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config MBEDTLS_HARDWARE_SHA
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bool "Enable hardware SHA acceleration"
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default y
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depends on !SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST
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help
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Enable hardware accelerated SHA1, SHA256, SHA384 & SHA512 in mbedTLS.
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@ -444,6 +444,21 @@ function run_tests()
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grep -q '"command"' build/compile_commands.json || failure "compile_commands.json missing or has no no 'commands' in it"
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(grep '"command"' build/compile_commands.json | grep -v mfix-esp32-psram-cache-issue) && failure "All commands in compile_commands.json should use PSRAM cache workaround"
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rm -r build
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#Test for various strategies
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for strat in MEMW NOPS DUPLDST; do
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rm -r build sdkconfig.defaults sdkconfig sdkconfig.defaults.esp32
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stratlc=`echo $strat | tr A-Z a-z`
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mkdir build && touch build/sdkconfig
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echo "CONFIG_ESP32_SPIRAM_SUPPORT=y" > sdkconfig.defaults
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echo "CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_$strat=y" >> sdkconfig.defaults
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echo "CONFIG_SPIRAM_CACHE_WORKAROUND=y" >> sdkconfig.defaults
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# note: we do 'reconfigure' here, as we just need to run cmake
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idf.py reconfigure
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grep -q '"command"' build/compile_commands.json || failure "compile_commands.json missing or has no no 'commands' in it"
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(grep '"command"' build/compile_commands.json | grep -v mfix-esp32-psram-cache-strategy=$stratlc) && failure "All commands in compile_commands.json should use PSRAM cache workaround strategy $strat when selected"
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echo ${PWD}
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rm -r sdkconfig.defaults build
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done
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print_status "Displays partition table when executing target partition_table"
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idf.py partition_table | grep -E "# Espressif .+ Partition Table"
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