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Driver(adc): Disable the synchronization operation function of ADC1 and DAC

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Closes IDF-1585
This commit is contained in:
fuzhibo
2020-06-28 15:17:57 +08:00
committed by bot
parent 5ef1b39002
commit 4fc12259dd
5 changed files with 38 additions and 0 deletions
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4
components/driver/adc.c
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@ -30,6 +30,7 @@
#include "hal/adc_types.h"
#include "hal/adc_hal.h"
#include "hal/dac_hal.h"
#define ADC_MAX_MEAS_NUM_DEFAULT (255)
#define ADC_MEAS_NUM_LIM_DEFAULT (1)
@ -260,6 +261,9 @@ esp_err_t adc1_config_channel_atten(adc1_channel_t channel, adc_atten_t atten)
ADC_CHANNEL_CHECK(ADC_NUM_1, channel);
ADC_CHECK(atten < ADC_ATTEN_MAX, "ADC Atten Err", ESP_ERR_INVALID_ARG);
adc_gpio_init(ADC_UNIT_1, channel);
/* Workaround: Disable the synchronization operation function of ADC1 and DAC.
If enabled(default), ADC RTC controller sampling will cause the DAC channel output voltage. */
dac_hal_rtc_sync_by_adc(false);
adc_hal_set_atten(ADC_NUM_1, channel, atten);
return ESP_OK;
}

1
components/driver/dac.c
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@ -68,6 +68,7 @@ esp_err_t dac_output_enable(dac_channel_t channel)
dac_rtc_pad_init(channel);
portENTER_CRITICAL(&rtc_spinlock);
dac_hal_power_on(channel);
dac_hal_rtc_sync_by_adc(false);
portEXIT_CRITICAL(&rtc_spinlock);
return ESP_OK;

12
components/soc/esp32/include/hal/dac_ll.h
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@ -65,6 +65,18 @@ static inline void dac_ll_update_output_value(dac_channel_t channel, uint8_t val
}
}
/**
* Enable/disable the synchronization operation function of ADC1 and DAC.
*
* @note If enabled(default), ADC RTC controller sampling will cause the DAC channel output voltage.
*
* @param enable Enable or disable adc and dac synchronization function.
*/
static inline void dac_ll_rtc_sync_by_adc(bool enable)
{
SENS.sar_meas_ctrl2.sar1_dac_xpd_fsm = enable;
}
/************************************/
/* DAC cosine wave generator API's */
/************************************/

12
components/soc/esp32s2beta/include/hal/dac_ll.h
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@ -65,6 +65,18 @@ static inline void dac_ll_update_output_value(dac_channel_t channel, uint8_t val
}
}
/**
* Enable/disable the synchronization operation function of ADC1 and DAC.
*
* @note If enabled(default), ADC RTC controller sampling will cause the DAC channel output voltage.
*
* @param enable Enable or disable adc and dac synchronization function.
*/
static inline void dac_ll_rtc_sync_by_adc(bool enable)
{
SENS.sar_amp_ctrl3.sar1_dac_xpd_fsm = enable;
}
/************************************/
/* DAC cosine wave generator API's */
/************************************/

9
components/soc/include/hal/dac_hal.h
View File

@ -39,6 +39,15 @@
*/
#define dac_hal_power_down(channel) dac_ll_power_down(channel)
/**
* Enable/disable the synchronization operation function of ADC1 and DAC.
*
* @note If enabled(default), ADC RTC controller sampling will cause the DAC channel output voltage.
*
* @param enable Enable or disable adc and dac synchronization function.
*/
#define dac_hal_rtc_sync_by_adc(enable) dac_ll_rtc_sync_by_adc(enable)
/**
* Output voltage with value (8 bit).
*