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https://github.com/espressif/esp-idf.git
synced 2025-07-31 19:24:33 +02:00
Driver(adc): Disable the synchronization operation function of ADC1 and DAC
Closes IDF-1585
This commit is contained in:
@@ -30,6 +30,7 @@
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#include "hal/adc_types.h"
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#include "hal/adc_types.h"
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#include "hal/adc_hal.h"
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#include "hal/adc_hal.h"
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#include "hal/dac_hal.h"
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#define ADC_MAX_MEAS_NUM_DEFAULT (255)
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#define ADC_MAX_MEAS_NUM_DEFAULT (255)
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#define ADC_MEAS_NUM_LIM_DEFAULT (1)
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#define ADC_MEAS_NUM_LIM_DEFAULT (1)
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@@ -260,6 +261,9 @@ esp_err_t adc1_config_channel_atten(adc1_channel_t channel, adc_atten_t atten)
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ADC_CHANNEL_CHECK(ADC_NUM_1, channel);
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ADC_CHANNEL_CHECK(ADC_NUM_1, channel);
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ADC_CHECK(atten < ADC_ATTEN_MAX, "ADC Atten Err", ESP_ERR_INVALID_ARG);
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ADC_CHECK(atten < ADC_ATTEN_MAX, "ADC Atten Err", ESP_ERR_INVALID_ARG);
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adc_gpio_init(ADC_UNIT_1, channel);
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adc_gpio_init(ADC_UNIT_1, channel);
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/* Workaround: Disable the synchronization operation function of ADC1 and DAC.
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If enabled(default), ADC RTC controller sampling will cause the DAC channel output voltage. */
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dac_hal_rtc_sync_by_adc(false);
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adc_hal_set_atten(ADC_NUM_1, channel, atten);
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adc_hal_set_atten(ADC_NUM_1, channel, atten);
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return ESP_OK;
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return ESP_OK;
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}
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}
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@@ -68,6 +68,7 @@ esp_err_t dac_output_enable(dac_channel_t channel)
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dac_rtc_pad_init(channel);
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dac_rtc_pad_init(channel);
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portENTER_CRITICAL(&rtc_spinlock);
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portENTER_CRITICAL(&rtc_spinlock);
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dac_hal_power_on(channel);
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dac_hal_power_on(channel);
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dac_hal_rtc_sync_by_adc(false);
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portEXIT_CRITICAL(&rtc_spinlock);
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portEXIT_CRITICAL(&rtc_spinlock);
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return ESP_OK;
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return ESP_OK;
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@@ -65,6 +65,18 @@ static inline void dac_ll_update_output_value(dac_channel_t channel, uint8_t val
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}
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}
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}
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}
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/**
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* Enable/disable the synchronization operation function of ADC1 and DAC.
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*
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* @note If enabled(default), ADC RTC controller sampling will cause the DAC channel output voltage.
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*
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* @param enable Enable or disable adc and dac synchronization function.
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*/
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static inline void dac_ll_rtc_sync_by_adc(bool enable)
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{
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SENS.sar_meas_ctrl2.sar1_dac_xpd_fsm = enable;
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}
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/************************************/
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/************************************/
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/* DAC cosine wave generator API's */
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/* DAC cosine wave generator API's */
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/************************************/
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/************************************/
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@@ -65,6 +65,18 @@ static inline void dac_ll_update_output_value(dac_channel_t channel, uint8_t val
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}
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}
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}
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}
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/**
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* Enable/disable the synchronization operation function of ADC1 and DAC.
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*
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* @note If enabled(default), ADC RTC controller sampling will cause the DAC channel output voltage.
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*
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* @param enable Enable or disable adc and dac synchronization function.
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*/
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static inline void dac_ll_rtc_sync_by_adc(bool enable)
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{
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SENS.sar_amp_ctrl3.sar1_dac_xpd_fsm = enable;
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}
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/************************************/
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/************************************/
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/* DAC cosine wave generator API's */
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/* DAC cosine wave generator API's */
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/************************************/
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/************************************/
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@@ -39,6 +39,15 @@
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*/
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*/
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#define dac_hal_power_down(channel) dac_ll_power_down(channel)
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#define dac_hal_power_down(channel) dac_ll_power_down(channel)
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/**
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* Enable/disable the synchronization operation function of ADC1 and DAC.
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*
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* @note If enabled(default), ADC RTC controller sampling will cause the DAC channel output voltage.
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*
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* @param enable Enable or disable adc and dac synchronization function.
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*/
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#define dac_hal_rtc_sync_by_adc(enable) dac_ll_rtc_sync_by_adc(enable)
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/**
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/**
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* Output voltage with value (8 bit).
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* Output voltage with value (8 bit).
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*
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*
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