soc_caps: remove SOC_GPIO_SUPPORT_SLP_SWITCH

all esp chips support this feature
2025-08-01 03:34:32 +02:00 · 2022-12-23 17:27:36 +08:00
parent 885e501d99
commit 50feb8f75b
20 changed files with 8 additions and 64 deletions
--- a/components/driver/gpio/gpio.c
+++ b/components/driver/gpio/gpio.c
@@ -579,7 +579,7 @@ esp_err_t gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)
        portENTER_CRITICAL(&gpio_context.gpio_spinlock);
        gpio_hal_set_intr_type(gpio_context.gpio_hal, gpio_num, intr_type);
        gpio_hal_wakeup_enable(gpio_context.gpio_hal, gpio_num);
-#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
+#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
        gpio_hal_sleep_sel_dis(gpio_context.gpio_hal, gpio_num);
 #endif
        portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
@@ -602,7 +602,7 @@ esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num)
 #endif
    portENTER_CRITICAL(&gpio_context.gpio_spinlock);
    gpio_hal_wakeup_disable(gpio_context.gpio_hal, gpio_num);
-#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
+#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
    gpio_hal_sleep_sel_en(gpio_context.gpio_hal, gpio_num);
 #endif
    portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
@@ -740,7 +740,6 @@ void gpio_iomux_out(uint8_t gpio_num, int func, bool oen_inv)
    gpio_hal_iomux_out(gpio_context.gpio_hal, gpio_num, func, (uint32_t)oen_inv);
 }

-#if SOC_GPIO_SUPPORT_SLP_SWITCH
 static esp_err_t gpio_sleep_pullup_en(gpio_num_t gpio_num)
 {
    GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
@@ -912,7 +911,6 @@ esp_err_t gpio_sleep_pupd_config_unapply(gpio_num_t gpio_num)
    return ESP_OK;
 }
 #endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
-#endif // SOC_GPIO_SUPPORT_SLP_SWITCH

 #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
 esp_err_t gpio_deep_sleep_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)
@@ -927,7 +925,7 @@ esp_err_t gpio_deep_sleep_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t int
    }
    portENTER_CRITICAL(&gpio_context.gpio_spinlock);
    gpio_hal_deepsleep_wakeup_enable(gpio_context.gpio_hal, gpio_num, intr_type);
-#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
+#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
    gpio_hal_sleep_sel_dis(gpio_context.gpio_hal, gpio_num);
 #endif
    portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
@@ -942,7 +940,7 @@ esp_err_t gpio_deep_sleep_wakeup_disable(gpio_num_t gpio_num)
    }
    portENTER_CRITICAL(&gpio_context.gpio_spinlock);
    gpio_hal_deepsleep_wakeup_disable(gpio_context.gpio_hal, gpio_num);
-#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
+#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
    gpio_hal_sleep_sel_en(gpio_context.gpio_hal, gpio_num);
 #endif
    portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
--- a/components/driver/include/driver/gpio.h
+++ b/components/driver/include/driver/gpio.h
@@ -446,7 +446,6 @@ esp_err_t gpio_force_hold_all(void);
 esp_err_t gpio_force_unhold_all(void);
 #endif

-#if SOC_GPIO_SUPPORT_SLP_SWITCH
 /**
  * @brief Enable SLP_SEL to change GPIO status automantically in lightsleep.
  * @param gpio_num GPIO number of the pad.
@@ -493,7 +492,6 @@ esp_err_t gpio_sleep_set_direction(gpio_num_t gpio_num, gpio_mode_t mode);
 *     - ESP_ERR_INVALID_ARG : Parameter error
 */
 esp_err_t gpio_sleep_set_pull_mode(gpio_num_t gpio_num, gpio_pull_mode_t pull);
-#endif

 #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP

--- a/components/driver/include/esp_private/gpio.h
+++ b/components/driver/include/esp_private/gpio.h
@@ -12,7 +12,6 @@
 #include "soc/soc_caps.h"
 #include "driver/gpio.h"

-#if SOC_GPIO_SUPPORT_SLP_SWITCH
 #if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
 /**
  * @brief Emulate ESP32S2 behaviour to backup FUN_PU, FUN_PD information
@@ -34,4 +33,3 @@ esp_err_t gpio_sleep_pupd_config_apply(gpio_num_t gpio_num);
  */
 esp_err_t gpio_sleep_pupd_config_unapply(gpio_num_t gpio_num);
 #endif
-#endif
--- a/components/esp_hw_support/include/esp_private/sleep_gpio.h
+++ b/components/esp_hw_support/include/esp_private/sleep_gpio.h
@@ -18,7 +18,7 @@ extern "C" {
 * This file contains declarations of GPIO related functions in light sleep mode.
 */

-#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
+#if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL

 /**
 * @brief Save GPIO pull-up and pull-down configuration information in the wake-up state
@@ -39,7 +39,7 @@ void gpio_sleep_mode_config_apply(void);
 */
 void gpio_sleep_mode_config_unapply(void);

-#endif // SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
+#endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL

 #ifdef __cplusplus
 }
--- a/components/esp_hw_support/include/esp_sleep.h
+++ b/components/esp_hw_support/include/esp_sleep.h
@@ -479,7 +479,6 @@ void esp_deep_sleep_disable_rom_logging(void);
 esp_err_t esp_sleep_cpu_pd_low_init(bool enable);
 #endif

-#if SOC_GPIO_SUPPORT_SLP_SWITCH
 /**
 * @brief Configure to isolate all GPIO pins in sleep state
 */
@@ -490,7 +489,6 @@ void esp_sleep_config_gpio_isolate(void);
 * @param enable decide whether to switch status or not
 */
 void esp_sleep_enable_gpio_switch(bool enable);
-#endif

 #if CONFIG_MAC_BB_PD
 /**
--- a/components/esp_hw_support/sleep_gpio.c
+++ b/components/esp_hw_support/sleep_gpio.c
@@ -25,8 +25,6 @@

 static const char *TAG = "sleep";

-#if SOC_GPIO_SUPPORT_SLP_SWITCH
-
 #if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
 void gpio_sleep_mode_config_apply(void)
 {
@@ -95,8 +93,6 @@ void esp_sleep_enable_gpio_switch(bool enable)
    }
 }

-#endif // SOC_GPIO_SUPPORT_SLP_SWITCH
-
 // IDF does not officially support esp32h2 in v5.0
 #if !CONFIG_IDF_TARGET_ESP32H2
 IRAM_ATTR void esp_sleep_isolate_digital_gpio(void)
--- a/components/esp_pm/pm_impl.c
+++ b/components/esp_pm/pm_impl.c
@@ -300,7 +300,7 @@ esp_err_t esp_pm_configure(const void* vconfig)
    s_config_changed = true;
    portEXIT_CRITICAL(&s_switch_lock);

-#if CONFIG_PM_SLP_DISABLE_GPIO && SOC_GPIO_SUPPORT_SLP_SWITCH
+#if CONFIG_PM_SLP_DISABLE_GPIO
    esp_sleep_enable_gpio_switch(config->light_sleep_enable);
 #endif

@@ -744,7 +744,7 @@ void esp_pm_impl_init(void)
    esp_pm_trace_init();
 #endif

-#if CONFIG_PM_SLP_DISABLE_GPIO && SOC_GPIO_SUPPORT_SLP_SWITCH
+#if CONFIG_PM_SLP_DISABLE_GPIO
    esp_sleep_config_gpio_isolate();
 #endif
    ESP_ERROR_CHECK(esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "rtos0",
--- a/components/hal/include/hal/gpio_hal.h
+++ b/components/hal/include/hal/gpio_hal.h
@@ -350,7 +350,6 @@ void gpio_hal_intr_disable(gpio_hal_context_t *hal, uint32_t gpio_num);
 #define gpio_hal_force_unhold_all() gpio_ll_force_unhold_all()
 #endif

-#if SOC_GPIO_SUPPORT_SLP_SWITCH
 /**
  * @brief Enable pull-up on GPIO when system sleep.
  *
@@ -448,7 +447,6 @@ void gpio_hal_sleep_pupd_config_apply(gpio_hal_context_t *hal, uint32_t gpio_num
 */
 void gpio_hal_sleep_pupd_config_unapply(gpio_hal_context_t *hal, uint32_t gpio_num);
 #endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
-#endif //SOC_GPIO_SUPPORT_SLP_SWITCH

 #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP

--- a/components/soc/esp32/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32/include/soc/Kconfig.soc_caps.in
@@ -259,10 +259,6 @@ config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK
    hex
    default 0xEF0FEA

-config SOC_GPIO_SUPPORT_SLP_SWITCH
-    bool
-    default y
-
 config SOC_I2C_NUM
    int
    default 2
--- a/components/soc/esp32/include/soc/soc_caps.h
+++ b/components/soc/esp32/include/soc/soc_caps.h
@@ -167,9 +167,6 @@
 // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM: 1, 3, 5, 6, 7, 8, 9, 10, 11, 16, 17, 18, 19, 21, 22, 23)
 #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0xEF0FEAULL

-// Support to configure slept status
-#define SOC_GPIO_SUPPORT_SLP_SWITCH  (1)
-
 /*-------------------------- I2C CAPS ----------------------------------------*/
 // ESP32 has 2 I2C
 #define SOC_I2C_NUM             (2)
--- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
@@ -215,10 +215,6 @@ config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK
    hex
    default 0x00000000001FFFC0

-config SOC_GPIO_SUPPORT_SLP_SWITCH
-    bool
-    default y
-
 config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
    int
    default 8
--- a/components/soc/esp32c2/include/soc/soc_caps.h
+++ b/components/soc/esp32c2/include/soc/soc_caps.h
@@ -114,9 +114,6 @@
 // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_6~GPIO_NUM_20)
 #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x00000000001FFFC0ULL

-// Support to configure sleep status
-#define SOC_GPIO_SUPPORT_SLP_SWITCH  (1)
-
 /*-------------------------- Dedicated GPIO CAPS -----------------------------*/
 #define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */
 #define SOC_DEDIC_GPIO_IN_CHANNELS_NUM  (8) /*!< 8 inward channels on each CPU core */
--- a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
@@ -311,10 +311,6 @@ config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK
    hex
    default 0x00000000003FFFC0

-config SOC_GPIO_SUPPORT_SLP_SWITCH
-    bool
-    default y
-
 config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
    int
    default 8
--- a/components/soc/esp32c3/include/soc/soc_caps.h
+++ b/components/soc/esp32c3/include/soc/soc_caps.h
@@ -157,9 +157,6 @@
 // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_6~GPIO_NUM_21)
 #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x00000000003FFFC0ULL

-// Support to configure sleep status
-#define SOC_GPIO_SUPPORT_SLP_SWITCH  (1)
-
 /*-------------------------- Dedicated GPIO CAPS -----------------------------*/
 #define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */
 #define SOC_DEDIC_GPIO_IN_CHANNELS_NUM  (8) /*!< 8 inward channels on each CPU core */
--- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
@@ -287,10 +287,6 @@ config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK
    hex
    default 0x000001FFFFFFFFC0

-config SOC_GPIO_SUPPORT_SLP_SWITCH
-    bool
-    default y
-
 config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
    int
    default 8
--- a/components/soc/esp32h2/include/soc/soc_caps.h
+++ b/components/soc/esp32h2/include/soc/soc_caps.h
@@ -163,9 +163,6 @@
 #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x0000000003FFE07FULL
 #endif

-// Support to configure sleep status
-#define SOC_GPIO_SUPPORT_SLP_SWITCH  (1)
-
 /*-------------------------- Dedicated GPIO CAPS -----------------------------*/
 #define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */
 #define SOC_DEDIC_GPIO_IN_CHANNELS_NUM  (8) /*!< 8 inward channels on each CPU core */
--- a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
@@ -295,10 +295,6 @@ config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK
    hex
    default 0x00007FFFFC000000

-config SOC_GPIO_SUPPORT_SLP_SWITCH
-    bool
-    default y
-
 config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
    int
    default 8
--- a/components/soc/esp32s2/include/soc/soc_caps.h
+++ b/components/soc/esp32s2/include/soc/soc_caps.h
@@ -151,9 +151,6 @@
 // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_26~GPIO_NUM_46)
 #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK  0x00007FFFFC000000ULL

-// Support to configure slept status
-#define SOC_GPIO_SUPPORT_SLP_SWITCH  (1)
-
 /*-------------------------- Dedicated GPIO CAPS ---------------------------------------*/
 #define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */
 #define SOC_DEDIC_GPIO_IN_CHANNELS_NUM  (8) /*!< 8 inward channels on each CPU core */
--- a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
@@ -379,10 +379,6 @@ config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK
    hex
    default 0x0001FFFFFC000000

-config SOC_GPIO_SUPPORT_SLP_SWITCH
-    bool
-    default y
-
 config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
    int
    default 8
--- a/components/soc/esp32s3/include/soc/soc_caps.h
+++ b/components/soc/esp32s3/include/soc/soc_caps.h
@@ -157,9 +157,6 @@
 // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_26~GPIO_NUM_48)
 #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x0001FFFFFC000000ULL

-// Support to configure slept status
-#define SOC_GPIO_SUPPORT_SLP_SWITCH  (1)
-

 /*-------------------------- Dedicated GPIO CAPS -----------------------------*/
 #define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */